Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 12:22:58.660419 lava-dispatcher, installed at version: 2023.10
2 12:22:58.660634 start: 0 validate
3 12:22:58.660768 Start time: 2023-11-08 12:22:58.660761+00:00 (UTC)
4 12:22:58.660901 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:22:58.661036 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 12:22:58.921154 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:22:58.921333 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:23:04.426761 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:23:04.427503 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:23:04.690072 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:23:04.690805 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:23:05.196043 validate duration: 6.54
14 12:23:05.196380 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:23:05.196478 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:23:05.196566 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:23:05.196692 Not decompressing ramdisk as can be used compressed.
18 12:23:05.196780 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230623.0/amd64/initrd.cpio.gz
19 12:23:05.196845 saving as /var/lib/lava/dispatcher/tmp/11967691/tftp-deploy-j6rlaj9j/ramdisk/initrd.cpio.gz
20 12:23:05.196909 total size: 6134299 (5 MB)
21 12:23:05.198033 progress 0 % (0 MB)
22 12:23:05.199994 progress 5 % (0 MB)
23 12:23:05.201742 progress 10 % (0 MB)
24 12:23:05.203594 progress 15 % (0 MB)
25 12:23:05.205243 progress 20 % (1 MB)
26 12:23:05.207089 progress 25 % (1 MB)
27 12:23:05.208998 progress 30 % (1 MB)
28 12:23:05.210832 progress 35 % (2 MB)
29 12:23:05.212624 progress 40 % (2 MB)
30 12:23:05.214460 progress 45 % (2 MB)
31 12:23:05.216088 progress 50 % (2 MB)
32 12:23:05.217717 progress 55 % (3 MB)
33 12:23:05.219592 progress 60 % (3 MB)
34 12:23:05.221227 progress 65 % (3 MB)
35 12:23:05.223087 progress 70 % (4 MB)
36 12:23:05.224757 progress 75 % (4 MB)
37 12:23:05.226424 progress 80 % (4 MB)
38 12:23:05.228230 progress 85 % (5 MB)
39 12:23:05.230020 progress 90 % (5 MB)
40 12:23:05.231644 progress 95 % (5 MB)
41 12:23:05.233557 progress 100 % (5 MB)
42 12:23:05.233701 5 MB downloaded in 0.04 s (159.01 MB/s)
43 12:23:05.233858 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:23:05.234113 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:23:05.234202 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:23:05.234290 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:23:05.234479 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:23:05.234550 saving as /var/lib/lava/dispatcher/tmp/11967691/tftp-deploy-j6rlaj9j/kernel/bzImage
50 12:23:05.234611 total size: 11571200 (11 MB)
51 12:23:05.234670 No compression specified
52 12:23:05.235904 progress 0 % (0 MB)
53 12:23:05.239131 progress 5 % (0 MB)
54 12:23:05.242547 progress 10 % (1 MB)
55 12:23:05.245561 progress 15 % (1 MB)
56 12:23:05.248773 progress 20 % (2 MB)
57 12:23:05.252132 progress 25 % (2 MB)
58 12:23:05.255358 progress 30 % (3 MB)
59 12:23:05.258561 progress 35 % (3 MB)
60 12:23:05.261881 progress 40 % (4 MB)
61 12:23:05.265026 progress 45 % (4 MB)
62 12:23:05.268410 progress 50 % (5 MB)
63 12:23:05.271832 progress 55 % (6 MB)
64 12:23:05.275058 progress 60 % (6 MB)
65 12:23:05.278531 progress 65 % (7 MB)
66 12:23:05.281945 progress 70 % (7 MB)
67 12:23:05.285043 progress 75 % (8 MB)
68 12:23:05.288438 progress 80 % (8 MB)
69 12:23:05.291586 progress 85 % (9 MB)
70 12:23:05.294547 progress 90 % (9 MB)
71 12:23:05.297661 progress 95 % (10 MB)
72 12:23:05.300857 progress 100 % (11 MB)
73 12:23:05.300994 11 MB downloaded in 0.07 s (166.24 MB/s)
74 12:23:05.301148 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:23:05.301388 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:23:05.301487 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:23:05.301575 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:23:05.301717 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 12:23:05.301788 saving as /var/lib/lava/dispatcher/tmp/11967691/tftp-deploy-j6rlaj9j/nfsrootfs/full.rootfs.tar
81 12:23:05.301850 total size: 202699900 (193 MB)
82 12:23:05.301913 Using unxz to decompress xz
83 12:23:05.306175 progress 0 % (0 MB)
84 12:23:05.911034 progress 5 % (9 MB)
85 12:23:06.454394 progress 10 % (19 MB)
86 12:23:07.071483 progress 15 % (29 MB)
87 12:23:07.378654 progress 20 % (38 MB)
88 12:23:07.941081 progress 25 % (48 MB)
89 12:23:08.539411 progress 30 % (58 MB)
90 12:23:09.130373 progress 35 % (67 MB)
91 12:23:09.721064 progress 40 % (77 MB)
92 12:23:10.314967 progress 45 % (87 MB)
93 12:23:10.960713 progress 50 % (96 MB)
94 12:23:11.597732 progress 55 % (106 MB)
95 12:23:12.305231 progress 60 % (116 MB)
96 12:23:12.773295 progress 65 % (125 MB)
97 12:23:12.871951 progress 70 % (135 MB)
98 12:23:13.038613 progress 75 % (145 MB)
99 12:23:13.148989 progress 80 % (154 MB)
100 12:23:13.234765 progress 85 % (164 MB)
101 12:23:13.344636 progress 90 % (174 MB)
102 12:23:13.721916 progress 95 % (183 MB)
103 12:23:14.357020 progress 100 % (193 MB)
104 12:23:14.363458 193 MB downloaded in 9.06 s (21.33 MB/s)
105 12:23:14.363741 end: 1.3.1 http-download (duration 00:00:09) [common]
107 12:23:14.364014 end: 1.3 download-retry (duration 00:00:09) [common]
108 12:23:14.364110 start: 1.4 download-retry (timeout 00:09:51) [common]
109 12:23:14.364210 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 12:23:14.364360 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:23:14.364436 saving as /var/lib/lava/dispatcher/tmp/11967691/tftp-deploy-j6rlaj9j/modules/modules.tar
112 12:23:14.364500 total size: 483720 (0 MB)
113 12:23:14.364567 Using unxz to decompress xz
114 12:23:14.368765 progress 6 % (0 MB)
115 12:23:14.369199 progress 13 % (0 MB)
116 12:23:14.369444 progress 20 % (0 MB)
117 12:23:14.371100 progress 27 % (0 MB)
118 12:23:14.373164 progress 33 % (0 MB)
119 12:23:14.375109 progress 40 % (0 MB)
120 12:23:14.377128 progress 47 % (0 MB)
121 12:23:14.379099 progress 54 % (0 MB)
122 12:23:14.381175 progress 60 % (0 MB)
123 12:23:14.383257 progress 67 % (0 MB)
124 12:23:14.385308 progress 74 % (0 MB)
125 12:23:14.387415 progress 81 % (0 MB)
126 12:23:14.389433 progress 88 % (0 MB)
127 12:23:14.391415 progress 94 % (0 MB)
128 12:23:14.394018 progress 100 % (0 MB)
129 12:23:14.400685 0 MB downloaded in 0.04 s (12.75 MB/s)
130 12:23:14.400972 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:23:14.401245 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:23:14.401343 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 12:23:14.401443 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 12:23:18.177393 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11967691/extract-nfsrootfs-q_m79uwl
136 12:23:18.177587 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
137 12:23:18.177691 start: 1.5.2 lava-overlay (timeout 00:09:47) [common]
138 12:23:18.177870 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017
139 12:23:18.178009 makedir: /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin
140 12:23:18.178118 makedir: /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/tests
141 12:23:18.178223 makedir: /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/results
142 12:23:18.178328 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-add-keys
143 12:23:18.178483 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-add-sources
144 12:23:18.178630 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-background-process-start
145 12:23:18.178772 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-background-process-stop
146 12:23:18.178907 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-common-functions
147 12:23:18.179039 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-echo-ipv4
148 12:23:18.179172 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-install-packages
149 12:23:18.179302 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-installed-packages
150 12:23:18.179448 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-os-build
151 12:23:18.179582 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-probe-channel
152 12:23:18.179712 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-probe-ip
153 12:23:18.179842 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-target-ip
154 12:23:18.179971 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-target-mac
155 12:23:18.180101 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-target-storage
156 12:23:18.180769 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-test-case
157 12:23:18.180912 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-test-event
158 12:23:18.181045 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-test-feedback
159 12:23:18.181178 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-test-raise
160 12:23:18.181310 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-test-reference
161 12:23:18.181470 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-test-runner
162 12:23:18.181604 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-test-set
163 12:23:18.181738 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-test-shell
164 12:23:18.181869 Updating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-add-keys (debian)
165 12:23:18.182028 Updating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-add-sources (debian)
166 12:23:18.182175 Updating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-install-packages (debian)
167 12:23:18.182319 Updating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-installed-packages (debian)
168 12:23:18.182463 Updating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/bin/lava-os-build (debian)
169 12:23:18.182588 Creating /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/environment
170 12:23:18.182688 LAVA metadata
171 12:23:18.182762 - LAVA_JOB_ID=11967691
172 12:23:18.182829 - LAVA_DISPATCHER_IP=192.168.201.1
173 12:23:18.182932 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:47) [common]
174 12:23:18.183003 skipped lava-vland-overlay
175 12:23:18.183081 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 12:23:18.183174 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:47) [common]
177 12:23:18.183239 skipped lava-multinode-overlay
178 12:23:18.183315 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 12:23:18.183397 start: 1.5.2.3 test-definition (timeout 00:09:47) [common]
180 12:23:18.183473 Loading test definitions
181 12:23:18.183565 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:47) [common]
182 12:23:18.183640 Using /lava-11967691 at stage 0
183 12:23:18.183945 uuid=11967691_1.5.2.3.1 testdef=None
184 12:23:18.184037 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 12:23:18.184124 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
186 12:23:18.184606 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 12:23:18.184835 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
189 12:23:18.185408 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 12:23:18.185699 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
192 12:23:18.186258 runner path: /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/0/tests/0_timesync-off test_uuid 11967691_1.5.2.3.1
193 12:23:18.186417 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 12:23:18.186649 start: 1.5.2.3.5 git-repo-action (timeout 00:09:47) [common]
196 12:23:18.186724 Using /lava-11967691 at stage 0
197 12:23:18.186822 Fetching tests from https://github.com/kernelci/test-definitions.git
198 12:23:18.186902 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/0/tests/1_kselftest-alsa'
199 12:23:28.760666 Running '/usr/bin/git checkout kernelci.org
200 12:23:28.914560 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
201 12:23:28.915399 uuid=11967691_1.5.2.3.5 testdef=None
202 12:23:28.915594 end: 1.5.2.3.5 git-repo-action (duration 00:00:11) [common]
204 12:23:28.915857 start: 1.5.2.3.6 test-overlay (timeout 00:09:36) [common]
205 12:23:28.916682 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 12:23:28.917002 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:36) [common]
208 12:23:28.917994 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 12:23:28.918235 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:36) [common]
211 12:23:28.919339 runner path: /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/0/tests/1_kselftest-alsa test_uuid 11967691_1.5.2.3.5
212 12:23:28.919435 BOARD='asus-cx9400-volteer'
213 12:23:28.919500 BRANCH='cip-gitlab'
214 12:23:28.919560 SKIPFILE='/dev/null'
215 12:23:28.919619 SKIP_INSTALL='True'
216 12:23:28.919678 TESTPROG_URL='None'
217 12:23:28.919735 TST_CASENAME=''
218 12:23:28.919837 TST_CMDFILES='alsa'
219 12:23:28.919999 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 12:23:28.920210 Creating lava-test-runner.conf files
222 12:23:28.920311 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11967691/lava-overlay-6t3kj017/lava-11967691/0 for stage 0
223 12:23:28.920409 - 0_timesync-off
224 12:23:28.920481 - 1_kselftest-alsa
225 12:23:28.920581 end: 1.5.2.3 test-definition (duration 00:00:11) [common]
226 12:23:28.920670 start: 1.5.2.4 compress-overlay (timeout 00:09:36) [common]
227 12:23:36.557960 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
228 12:23:36.558131 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:29) [common]
229 12:23:36.558242 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 12:23:36.558373 end: 1.5.2 lava-overlay (duration 00:00:18) [common]
231 12:23:36.558466 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:29) [common]
232 12:23:36.723529 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 12:23:36.723921 start: 1.5.4 extract-modules (timeout 00:09:28) [common]
234 12:23:36.724048 extracting modules file /var/lib/lava/dispatcher/tmp/11967691/tftp-deploy-j6rlaj9j/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967691/extract-nfsrootfs-q_m79uwl
235 12:23:36.746553 extracting modules file /var/lib/lava/dispatcher/tmp/11967691/tftp-deploy-j6rlaj9j/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967691/extract-overlay-ramdisk-mxc2uqd8/ramdisk
236 12:23:36.769396 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 12:23:36.769545 start: 1.5.5 apply-overlay-tftp (timeout 00:09:28) [common]
238 12:23:36.769643 [common] Applying overlay to NFS
239 12:23:36.769718 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11967691/compress-overlay-fqdqsqqb/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11967691/extract-nfsrootfs-q_m79uwl
240 12:23:37.723387 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 12:23:37.723548 start: 1.5.6 configure-preseed-file (timeout 00:09:27) [common]
242 12:23:37.723690 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 12:23:37.723814 start: 1.5.7 compress-ramdisk (timeout 00:09:27) [common]
244 12:23:37.723943 Building ramdisk /var/lib/lava/dispatcher/tmp/11967691/extract-overlay-ramdisk-mxc2uqd8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11967691/extract-overlay-ramdisk-mxc2uqd8/ramdisk
245 12:23:37.820698 >> 34863 blocks
246 12:23:38.524027 rename /var/lib/lava/dispatcher/tmp/11967691/extract-overlay-ramdisk-mxc2uqd8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11967691/tftp-deploy-j6rlaj9j/ramdisk/ramdisk.cpio.gz
247 12:23:38.524506 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 12:23:38.524634 start: 1.5.8 prepare-kernel (timeout 00:09:27) [common]
249 12:23:38.524754 start: 1.5.8.1 prepare-fit (timeout 00:09:27) [common]
250 12:23:38.524866 No mkimage arch provided, not using FIT.
251 12:23:38.524964 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 12:23:38.525057 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 12:23:38.525161 end: 1.5 prepare-tftp-overlay (duration 00:00:24) [common]
254 12:23:38.525262 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:27) [common]
255 12:23:38.525359 No LXC device requested
256 12:23:38.525447 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 12:23:38.525540 start: 1.7 deploy-device-env (timeout 00:09:27) [common]
258 12:23:38.525626 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 12:23:38.525708 Checking files for TFTP limit of 4294967296 bytes.
260 12:23:38.526153 end: 1 tftp-deploy (duration 00:00:33) [common]
261 12:23:38.526259 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 12:23:38.526371 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 12:23:38.526499 substitutions:
264 12:23:38.526568 - {DTB}: None
265 12:23:38.526635 - {INITRD}: 11967691/tftp-deploy-j6rlaj9j/ramdisk/ramdisk.cpio.gz
266 12:23:38.526697 - {KERNEL}: 11967691/tftp-deploy-j6rlaj9j/kernel/bzImage
267 12:23:38.526757 - {LAVA_MAC}: None
268 12:23:38.526837 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11967691/extract-nfsrootfs-q_m79uwl
269 12:23:38.526941 - {NFS_SERVER_IP}: 192.168.201.1
270 12:23:38.527037 - {PRESEED_CONFIG}: None
271 12:23:38.527133 - {PRESEED_LOCAL}: None
272 12:23:38.527229 - {RAMDISK}: 11967691/tftp-deploy-j6rlaj9j/ramdisk/ramdisk.cpio.gz
273 12:23:38.527309 - {ROOT_PART}: None
274 12:23:38.527411 - {ROOT}: None
275 12:23:38.527505 - {SERVER_IP}: 192.168.201.1
276 12:23:38.527575 - {TEE}: None
277 12:23:38.527655 Parsed boot commands:
278 12:23:38.527726 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 12:23:38.527964 Parsed boot commands: tftpboot 192.168.201.1 11967691/tftp-deploy-j6rlaj9j/kernel/bzImage 11967691/tftp-deploy-j6rlaj9j/kernel/cmdline 11967691/tftp-deploy-j6rlaj9j/ramdisk/ramdisk.cpio.gz
280 12:23:38.528095 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 12:23:38.528244 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 12:23:38.528358 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 12:23:38.528456 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 12:23:38.528533 Not connected, no need to disconnect.
285 12:23:38.528614 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 12:23:38.528706 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 12:23:38.528779 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-3'
288 12:23:38.532998 Setting prompt string to ['lava-test: # ']
289 12:23:38.533397 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 12:23:38.533532 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 12:23:38.533634 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 12:23:38.533725 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 12:23:38.533928 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
294 12:23:43.675019 >> Command sent successfully.
295 12:23:43.678087 Returned 0 in 5 seconds
296 12:23:43.778478 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 12:23:43.778935 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 12:23:43.779088 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 12:23:43.779220 Setting prompt string to 'Starting depthcharge on Voema...'
301 12:23:43.779332 Changing prompt to 'Starting depthcharge on Voema...'
302 12:23:43.779443 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
303 12:23:43.779726 [Enter `^Ec?' for help]
304 12:23:45.380038
305 12:23:45.380212
306 12:23:45.389957 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
307 12:23:45.396197 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
308 12:23:45.399776 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
309 12:23:45.403096 CPU: AES supported, TXT NOT supported, VT supported
310 12:23:45.409847 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
311 12:23:45.416084 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
312 12:23:45.419448 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
313 12:23:45.423189 VBOOT: Loading verstage.
314 12:23:45.426402 FMAP: Found "FLASH" version 1.1 at 0x1804000.
315 12:23:45.433306 FMAP: base = 0x0 size = 0x2000000 #areas = 32
316 12:23:45.436616 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
317 12:23:45.447278 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
318 12:23:45.453402 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
319 12:23:45.453489
320 12:23:45.453577
321 12:23:45.466670 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
322 12:23:45.480271 Probing TPM: . done!
323 12:23:45.483748 TPM ready after 0 ms
324 12:23:45.487166 Connected to device vid:did:rid of 1ae0:0028:00
325 12:23:45.498839 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
326 12:23:45.505110 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
327 12:23:45.508585 Initialized TPM device CR50 revision 0
328 12:23:45.558756 tlcl_send_startup: Startup return code is 0
329 12:23:45.558862 TPM: setup succeeded
330 12:23:45.573443 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
331 12:23:45.587230 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
332 12:23:45.600506 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
333 12:23:45.610428 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
334 12:23:45.614177 Chrome EC: UHEPI supported
335 12:23:45.617480 Phase 1
336 12:23:45.620385 FMAP: area GBB found @ 1805000 (458752 bytes)
337 12:23:45.630484 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
338 12:23:45.636881 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
339 12:23:45.643686 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
340 12:23:45.650225 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
341 12:23:45.653798 Recovery requested (1009000e)
342 12:23:45.656915 TPM: Extending digest for VBOOT: boot mode into PCR 0
343 12:23:45.668875 tlcl_extend: response is 0
344 12:23:45.675664 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
345 12:23:45.685128 tlcl_extend: response is 0
346 12:23:45.691820 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
347 12:23:45.698257 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
348 12:23:45.705187 BS: verstage times (exec / console): total (unknown) / 142 ms
349 12:23:45.705287
350 12:23:45.705354
351 12:23:45.718261 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
352 12:23:45.725147 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
353 12:23:45.728602 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
354 12:23:45.731563 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
355 12:23:45.738495 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
356 12:23:45.741456 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
357 12:23:45.745056 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
358 12:23:45.748391 TCO_STS: 0000 0000
359 12:23:45.751400 GEN_PMCON: d0015038 00002200
360 12:23:45.754852 GBLRST_CAUSE: 00000000 00000000
361 12:23:45.754957 HPR_CAUSE0: 00000000
362 12:23:45.757994 prev_sleep_state 5
363 12:23:45.761458 Boot Count incremented to 24980
364 12:23:45.768208 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
365 12:23:45.774925 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
366 12:23:45.781262 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
367 12:23:45.788123 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
368 12:23:45.792756 Chrome EC: UHEPI supported
369 12:23:45.799649 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
370 12:23:45.812691 Probing TPM: done!
371 12:23:45.819440 Connected to device vid:did:rid of 1ae0:0028:00
372 12:23:45.830673 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
373 12:23:45.837630 Initialized TPM device CR50 revision 0
374 12:23:45.847952 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
375 12:23:45.854243 MRC: Hash idx 0x100b comparison successful.
376 12:23:45.857842 MRC cache found, size faa8
377 12:23:45.857928 bootmode is set to: 2
378 12:23:45.861300 SPD index = 0
379 12:23:45.867608 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
380 12:23:45.870900 SPD: module type is LPDDR4X
381 12:23:45.874334 SPD: module part number is MT53E512M64D4NW-046
382 12:23:45.881157 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
383 12:23:45.884589 SPD: device width 16 bits, bus width 16 bits
384 12:23:45.891133 SPD: module size is 1024 MB (per channel)
385 12:23:46.323146 CBMEM:
386 12:23:46.326013 IMD: root @ 0x76fff000 254 entries.
387 12:23:46.329396 IMD: root @ 0x76ffec00 62 entries.
388 12:23:46.332892 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
389 12:23:46.339407 FMAP: area RW_VPD found @ f35000 (8192 bytes)
390 12:23:46.342805 External stage cache:
391 12:23:46.345892 IMD: root @ 0x7b3ff000 254 entries.
392 12:23:46.349045 IMD: root @ 0x7b3fec00 62 entries.
393 12:23:46.364783 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
394 12:23:46.371285 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
395 12:23:46.378226 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
396 12:23:46.391941 MRC: 'RECOVERY_MRC_CACHE' does not need update.
397 12:23:46.398370 cse_lite: Skip switching to RW in the recovery path
398 12:23:46.398461 8 DIMMs found
399 12:23:46.398549 SMM Memory Map
400 12:23:46.402370 SMRAM : 0x7b000000 0x800000
401 12:23:46.406281 Subregion 0: 0x7b000000 0x200000
402 12:23:46.409750 Subregion 1: 0x7b200000 0x200000
403 12:23:46.412764 Subregion 2: 0x7b400000 0x400000
404 12:23:46.416274 top_of_ram = 0x77000000
405 12:23:46.422802 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
406 12:23:46.426452 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
407 12:23:46.432649 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
408 12:23:46.436143 MTRR Range: Start=ff000000 End=0 (Size 1000000)
409 12:23:46.446441 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
410 12:23:46.449403 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
411 12:23:46.461432 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
412 12:23:46.467708 Processing 211 relocs. Offset value of 0x74c0b000
413 12:23:46.474363 BS: romstage times (exec / console): total (unknown) / 277 ms
414 12:23:46.480405
415 12:23:46.480493
416 12:23:46.490501 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
417 12:23:46.493980 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
418 12:23:46.503932 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
419 12:23:46.510556 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
420 12:23:46.517291 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
421 12:23:46.524094 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
422 12:23:46.570332 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
423 12:23:46.577270 Processing 5008 relocs. Offset value of 0x75d98000
424 12:23:46.580169 BS: postcar times (exec / console): total (unknown) / 59 ms
425 12:23:46.583656
426 12:23:46.583742
427 12:23:46.593923 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
428 12:23:46.594031 Normal boot
429 12:23:46.597195 FW_CONFIG value is 0x804c02
430 12:23:46.600489 PCI: 00:07.0 disabled by fw_config
431 12:23:46.603752 PCI: 00:07.1 disabled by fw_config
432 12:23:46.607104 PCI: 00:0d.2 disabled by fw_config
433 12:23:46.610416 PCI: 00:1c.7 disabled by fw_config
434 12:23:46.617118 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
435 12:23:46.623983 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
436 12:23:46.627324 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
437 12:23:46.630575 GENERIC: 0.0 disabled by fw_config
438 12:23:46.633861 GENERIC: 1.0 disabled by fw_config
439 12:23:46.640903 fw_config match found: DB_USB=USB3_ACTIVE
440 12:23:46.644251 fw_config match found: DB_USB=USB3_ACTIVE
441 12:23:46.646969 fw_config match found: DB_USB=USB3_ACTIVE
442 12:23:46.653976 fw_config match found: DB_USB=USB3_ACTIVE
443 12:23:46.656971 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
444 12:23:46.663884 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
445 12:23:46.673914 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
446 12:23:46.680123 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
447 12:23:46.683560 microcode: sig=0x806c1 pf=0x80 revision=0x86
448 12:23:46.690250 microcode: Update skipped, already up-to-date
449 12:23:46.696900 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
450 12:23:46.723745 Detected 4 core, 8 thread CPU.
451 12:23:46.727137 Setting up SMI for CPU
452 12:23:46.730679 IED base = 0x7b400000
453 12:23:46.730768 IED size = 0x00400000
454 12:23:46.734073 Will perform SMM setup.
455 12:23:46.740802 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
456 12:23:46.747540 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
457 12:23:46.753806 Processing 16 relocs. Offset value of 0x00030000
458 12:23:46.757195 Attempting to start 7 APs
459 12:23:46.760680 Waiting for 10ms after sending INIT.
460 12:23:46.776453 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
461 12:23:46.779876 AP: slot 3 apic_id 6.
462 12:23:46.782811 AP: slot 7 apic_id 7.
463 12:23:46.782892 AP: slot 6 apic_id 4.
464 12:23:46.786221 AP: slot 2 apic_id 5.
465 12:23:46.789480 AP: slot 5 apic_id 2.
466 12:23:46.789566 done.
467 12:23:46.789633 AP: slot 4 apic_id 3.
468 12:23:46.796217 Waiting for 2nd SIPI to complete...done.
469 12:23:46.802923 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
470 12:23:46.809240 Processing 13 relocs. Offset value of 0x00038000
471 12:23:46.809323 Unable to locate Global NVS
472 12:23:46.819324 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
473 12:23:46.822889 Installing permanent SMM handler to 0x7b000000
474 12:23:46.832677 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
475 12:23:46.836231 Processing 794 relocs. Offset value of 0x7b010000
476 12:23:46.845648 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
477 12:23:46.849145 Processing 13 relocs. Offset value of 0x7b008000
478 12:23:46.855589 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
479 12:23:46.862485 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
480 12:23:46.865567 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
481 12:23:46.872536 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
482 12:23:46.879218 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
483 12:23:46.885795 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
484 12:23:46.892540 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
485 12:23:46.892625 Unable to locate Global NVS
486 12:23:46.901881 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
487 12:23:46.905337 Clearing SMI status registers
488 12:23:46.905418 SMI_STS: PM1
489 12:23:46.908823 PM1_STS: PWRBTN
490 12:23:46.915185 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
491 12:23:46.918745 In relocation handler: CPU 0
492 12:23:46.922233 New SMBASE=0x7b000000 IEDBASE=0x7b400000
493 12:23:46.928770 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 12:23:46.928910 Relocation complete.
495 12:23:46.938572 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
496 12:23:46.938651 In relocation handler: CPU 1
497 12:23:46.945582 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
498 12:23:46.945661 Relocation complete.
499 12:23:46.952124 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
500 12:23:46.955605 In relocation handler: CPU 7
501 12:23:46.962201 New SMBASE=0x7affe400 IEDBASE=0x7b400000
502 12:23:46.962282 Relocation complete.
503 12:23:46.968822 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
504 12:23:46.972340 In relocation handler: CPU 3
505 12:23:46.978722 New SMBASE=0x7afff400 IEDBASE=0x7b400000
506 12:23:46.982098 Writing SMRR. base = 0x7b000006, mask=0xff800c00
507 12:23:46.985499 Relocation complete.
508 12:23:46.992340 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
509 12:23:46.995600 In relocation handler: CPU 5
510 12:23:46.998964 New SMBASE=0x7affec00 IEDBASE=0x7b400000
511 12:23:47.002383 Writing SMRR. base = 0x7b000006, mask=0xff800c00
512 12:23:47.005730 Relocation complete.
513 12:23:47.011957 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
514 12:23:47.015306 In relocation handler: CPU 4
515 12:23:47.018780 New SMBASE=0x7afff000 IEDBASE=0x7b400000
516 12:23:47.022178 Relocation complete.
517 12:23:47.028934 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
518 12:23:47.032333 In relocation handler: CPU 2
519 12:23:47.035261 New SMBASE=0x7afff800 IEDBASE=0x7b400000
520 12:23:47.038559 Relocation complete.
521 12:23:47.045159 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
522 12:23:47.048653 In relocation handler: CPU 6
523 12:23:47.051971 New SMBASE=0x7affe800 IEDBASE=0x7b400000
524 12:23:47.058812 Writing SMRR. base = 0x7b000006, mask=0xff800c00
525 12:23:47.058900 Relocation complete.
526 12:23:47.061701 Initializing CPU #0
527 12:23:47.065694 CPU: vendor Intel device 806c1
528 12:23:47.069854 CPU: family 06, model 8c, stepping 01
529 12:23:47.073406 Clearing out pending MCEs
530 12:23:47.073490 Setting up local APIC...
531 12:23:47.076681 apic_id: 0x00 done.
532 12:23:47.080382 Turbo is available but hidden
533 12:23:47.083399 Turbo is available and visible
534 12:23:47.086763 microcode: Update skipped, already up-to-date
535 12:23:47.090342 CPU #0 initialized
536 12:23:47.093198 Initializing CPU #2
537 12:23:47.093281 Initializing CPU #6
538 12:23:47.096701 CPU: vendor Intel device 806c1
539 12:23:47.100044 CPU: family 06, model 8c, stepping 01
540 12:23:47.103290 CPU: vendor Intel device 806c1
541 12:23:47.106854 CPU: family 06, model 8c, stepping 01
542 12:23:47.110039 Clearing out pending MCEs
543 12:23:47.113332 Clearing out pending MCEs
544 12:23:47.116926 Setting up local APIC...
545 12:23:47.117002 Initializing CPU #5
546 12:23:47.119848 Initializing CPU #4
547 12:23:47.123231 CPU: vendor Intel device 806c1
548 12:23:47.126817 CPU: family 06, model 8c, stepping 01
549 12:23:47.129704 CPU: vendor Intel device 806c1
550 12:23:47.133027 CPU: family 06, model 8c, stepping 01
551 12:23:47.136561 Clearing out pending MCEs
552 12:23:47.139851 Clearing out pending MCEs
553 12:23:47.139976 Setting up local APIC...
554 12:23:47.143393 Initializing CPU #1
555 12:23:47.146648 Setting up local APIC...
556 12:23:47.150132 CPU: vendor Intel device 806c1
557 12:23:47.152992 CPU: family 06, model 8c, stepping 01
558 12:23:47.156358 Initializing CPU #3
559 12:23:47.156434 Initializing CPU #7
560 12:23:47.159687 CPU: vendor Intel device 806c1
561 12:23:47.163046 CPU: family 06, model 8c, stepping 01
562 12:23:47.166622 CPU: vendor Intel device 806c1
563 12:23:47.169897 CPU: family 06, model 8c, stepping 01
564 12:23:47.172895 Clearing out pending MCEs
565 12:23:47.176369 Clearing out pending MCEs
566 12:23:47.179741 Setting up local APIC...
567 12:23:47.179861 Setting up local APIC...
568 12:23:47.182831 apic_id: 0x04 done.
569 12:23:47.186096 apic_id: 0x05 done.
570 12:23:47.189979 microcode: Update skipped, already up-to-date
571 12:23:47.193219 microcode: Update skipped, already up-to-date
572 12:23:47.196084 CPU #6 initialized
573 12:23:47.199357 CPU #2 initialized
574 12:23:47.199441 apic_id: 0x06 done.
575 12:23:47.202848 Setting up local APIC...
576 12:23:47.206431 Clearing out pending MCEs
577 12:23:47.209573 apic_id: 0x03 done.
578 12:23:47.209658 apic_id: 0x02 done.
579 12:23:47.216394 microcode: Update skipped, already up-to-date
580 12:23:47.219688 microcode: Update skipped, already up-to-date
581 12:23:47.223054 CPU #4 initialized
582 12:23:47.223139 apic_id: 0x07 done.
583 12:23:47.229415 microcode: Update skipped, already up-to-date
584 12:23:47.232814 microcode: Update skipped, already up-to-date
585 12:23:47.236205 CPU #3 initialized
586 12:23:47.236304 CPU #7 initialized
587 12:23:47.239714 CPU #5 initialized
588 12:23:47.239797 Setting up local APIC...
589 12:23:47.243141 apic_id: 0x01 done.
590 12:23:47.249468 microcode: Update skipped, already up-to-date
591 12:23:47.249555 CPU #1 initialized
592 12:23:47.252618 bsp_do_flight_plan done after 455 msecs.
593 12:23:47.255992 CPU: frequency set to 4000 MHz
594 12:23:47.259497 Enabling SMIs.
595 12:23:47.266074 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
596 12:23:47.281048 SATAXPCIE1 indicates PCIe NVMe is present
597 12:23:47.284685 Probing TPM: done!
598 12:23:47.288079 Connected to device vid:did:rid of 1ae0:0028:00
599 12:23:47.298397 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
600 12:23:47.302070 Initialized TPM device CR50 revision 0
601 12:23:47.305293 Enabling S0i3.4
602 12:23:47.311999 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
603 12:23:47.315107 Found a VBT of 8704 bytes after decompression
604 12:23:47.321952 cse_lite: CSE RO boot. HybridStorageMode disabled
605 12:23:47.328348 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
606 12:23:47.404961 FSPS returned 0
607 12:23:47.407670 Executing Phase 1 of FspMultiPhaseSiInit
608 12:23:47.418015 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
609 12:23:47.421612 port C0 DISC req: usage 1 usb3 1 usb2 5
610 12:23:47.424357 Raw Buffer output 0 00000511
611 12:23:47.427627 Raw Buffer output 1 00000000
612 12:23:47.431846 pmc_send_ipc_cmd succeeded
613 12:23:47.434977 port C1 DISC req: usage 1 usb3 2 usb2 3
614 12:23:47.438471 Raw Buffer output 0 00000321
615 12:23:47.441477 Raw Buffer output 1 00000000
616 12:23:47.445506 pmc_send_ipc_cmd succeeded
617 12:23:47.451040 Detected 4 core, 8 thread CPU.
618 12:23:47.453974 Detected 4 core, 8 thread CPU.
619 12:23:47.688335 Display FSP Version Info HOB
620 12:23:47.691671 Reference Code - CPU = a.0.4c.31
621 12:23:47.695136 uCode Version = 0.0.0.86
622 12:23:47.698377 TXT ACM version = ff.ff.ff.ffff
623 12:23:47.701825 Reference Code - ME = a.0.4c.31
624 12:23:47.705273 MEBx version = 0.0.0.0
625 12:23:47.708486 ME Firmware Version = Consumer SKU
626 12:23:47.711388 Reference Code - PCH = a.0.4c.31
627 12:23:47.714827 PCH-CRID Status = Disabled
628 12:23:47.718443 PCH-CRID Original Value = ff.ff.ff.ffff
629 12:23:47.721725 PCH-CRID New Value = ff.ff.ff.ffff
630 12:23:47.725100 OPROM - RST - RAID = ff.ff.ff.ffff
631 12:23:47.728666 PCH Hsio Version = 4.0.0.0
632 12:23:47.731371 Reference Code - SA - System Agent = a.0.4c.31
633 12:23:47.735045 Reference Code - MRC = 2.0.0.1
634 12:23:47.738265 SA - PCIe Version = a.0.4c.31
635 12:23:47.741941 SA-CRID Status = Disabled
636 12:23:47.744752 SA-CRID Original Value = 0.0.0.1
637 12:23:47.748129 SA-CRID New Value = 0.0.0.1
638 12:23:47.751561 OPROM - VBIOS = ff.ff.ff.ffff
639 12:23:47.754796 IO Manageability Engine FW Version = 11.1.4.0
640 12:23:47.758048 PHY Build Version = 0.0.0.e0
641 12:23:47.761890 Thunderbolt(TM) FW Version = 0.0.0.0
642 12:23:47.767913 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
643 12:23:47.771406 ITSS IRQ Polarities Before:
644 12:23:47.771496 IPC0: 0xffffffff
645 12:23:47.774839 IPC1: 0xffffffff
646 12:23:47.774925 IPC2: 0xffffffff
647 12:23:47.778116 IPC3: 0xffffffff
648 12:23:47.781336 ITSS IRQ Polarities After:
649 12:23:47.781438 IPC0: 0xffffffff
650 12:23:47.785052 IPC1: 0xffffffff
651 12:23:47.785140 IPC2: 0xffffffff
652 12:23:47.788438 IPC3: 0xffffffff
653 12:23:47.791716 Found PCIe Root Port #9 at PCI: 00:1d.0.
654 12:23:47.804709 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
655 12:23:47.814777 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
656 12:23:47.828093 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
657 12:23:47.834420 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
658 12:23:47.834510 Enumerating buses...
659 12:23:47.841274 Show all devs... Before device enumeration.
660 12:23:47.841363 Root Device: enabled 1
661 12:23:47.844542 DOMAIN: 0000: enabled 1
662 12:23:47.847952 CPU_CLUSTER: 0: enabled 1
663 12:23:47.851490 PCI: 00:00.0: enabled 1
664 12:23:47.851579 PCI: 00:02.0: enabled 1
665 12:23:47.854344 PCI: 00:04.0: enabled 1
666 12:23:47.858043 PCI: 00:05.0: enabled 1
667 12:23:47.861448 PCI: 00:06.0: enabled 0
668 12:23:47.861537 PCI: 00:07.0: enabled 0
669 12:23:47.864555 PCI: 00:07.1: enabled 0
670 12:23:47.868283 PCI: 00:07.2: enabled 0
671 12:23:47.871437 PCI: 00:07.3: enabled 0
672 12:23:47.871526 PCI: 00:08.0: enabled 1
673 12:23:47.874590 PCI: 00:09.0: enabled 0
674 12:23:47.877869 PCI: 00:0a.0: enabled 0
675 12:23:47.881189 PCI: 00:0d.0: enabled 1
676 12:23:47.881273 PCI: 00:0d.1: enabled 0
677 12:23:47.884677 PCI: 00:0d.2: enabled 0
678 12:23:47.887901 PCI: 00:0d.3: enabled 0
679 12:23:47.887989 PCI: 00:0e.0: enabled 0
680 12:23:47.891124 PCI: 00:10.2: enabled 1
681 12:23:47.894473 PCI: 00:10.6: enabled 0
682 12:23:47.897925 PCI: 00:10.7: enabled 0
683 12:23:47.898013 PCI: 00:12.0: enabled 0
684 12:23:47.901401 PCI: 00:12.6: enabled 0
685 12:23:47.904448 PCI: 00:13.0: enabled 0
686 12:23:47.907666 PCI: 00:14.0: enabled 1
687 12:23:47.907773 PCI: 00:14.1: enabled 0
688 12:23:47.911545 PCI: 00:14.2: enabled 1
689 12:23:47.914297 PCI: 00:14.3: enabled 1
690 12:23:47.917610 PCI: 00:15.0: enabled 1
691 12:23:47.917699 PCI: 00:15.1: enabled 1
692 12:23:47.921115 PCI: 00:15.2: enabled 1
693 12:23:47.924636 PCI: 00:15.3: enabled 1
694 12:23:47.924750 PCI: 00:16.0: enabled 1
695 12:23:47.927517 PCI: 00:16.1: enabled 0
696 12:23:47.930988 PCI: 00:16.2: enabled 0
697 12:23:47.934423 PCI: 00:16.3: enabled 0
698 12:23:47.934537 PCI: 00:16.4: enabled 0
699 12:23:47.937902 PCI: 00:16.5: enabled 0
700 12:23:47.940779 PCI: 00:17.0: enabled 1
701 12:23:47.944102 PCI: 00:19.0: enabled 0
702 12:23:47.944214 PCI: 00:19.1: enabled 1
703 12:23:47.947645 PCI: 00:19.2: enabled 0
704 12:23:47.950966 PCI: 00:1c.0: enabled 1
705 12:23:47.954430 PCI: 00:1c.1: enabled 0
706 12:23:47.954510 PCI: 00:1c.2: enabled 0
707 12:23:47.957766 PCI: 00:1c.3: enabled 0
708 12:23:47.960681 PCI: 00:1c.4: enabled 0
709 12:23:47.964131 PCI: 00:1c.5: enabled 0
710 12:23:47.964241 PCI: 00:1c.6: enabled 1
711 12:23:47.967460 PCI: 00:1c.7: enabled 0
712 12:23:47.970845 PCI: 00:1d.0: enabled 1
713 12:23:47.974195 PCI: 00:1d.1: enabled 0
714 12:23:47.974278 PCI: 00:1d.2: enabled 1
715 12:23:47.977535 PCI: 00:1d.3: enabled 0
716 12:23:47.980793 PCI: 00:1e.0: enabled 1
717 12:23:47.980869 PCI: 00:1e.1: enabled 0
718 12:23:47.984132 PCI: 00:1e.2: enabled 1
719 12:23:47.987061 PCI: 00:1e.3: enabled 1
720 12:23:47.990736 PCI: 00:1f.0: enabled 1
721 12:23:47.990854 PCI: 00:1f.1: enabled 0
722 12:23:47.994007 PCI: 00:1f.2: enabled 1
723 12:23:47.997258 PCI: 00:1f.3: enabled 1
724 12:23:48.000673 PCI: 00:1f.4: enabled 0
725 12:23:48.000750 PCI: 00:1f.5: enabled 1
726 12:23:48.003909 PCI: 00:1f.6: enabled 0
727 12:23:48.007313 PCI: 00:1f.7: enabled 0
728 12:23:48.007392 APIC: 00: enabled 1
729 12:23:48.010798 GENERIC: 0.0: enabled 1
730 12:23:48.013793 GENERIC: 0.0: enabled 1
731 12:23:48.017202 GENERIC: 1.0: enabled 1
732 12:23:48.017280 GENERIC: 0.0: enabled 1
733 12:23:48.020334 GENERIC: 1.0: enabled 1
734 12:23:48.023603 USB0 port 0: enabled 1
735 12:23:48.026922 GENERIC: 0.0: enabled 1
736 12:23:48.027003 USB0 port 0: enabled 1
737 12:23:48.030243 GENERIC: 0.0: enabled 1
738 12:23:48.033662 I2C: 00:1a: enabled 1
739 12:23:48.033758 I2C: 00:31: enabled 1
740 12:23:48.037039 I2C: 00:32: enabled 1
741 12:23:48.040386 I2C: 00:10: enabled 1
742 12:23:48.040470 I2C: 00:15: enabled 1
743 12:23:48.043849 GENERIC: 0.0: enabled 0
744 12:23:48.046889 GENERIC: 1.0: enabled 0
745 12:23:48.050168 GENERIC: 0.0: enabled 1
746 12:23:48.050255 SPI: 00: enabled 1
747 12:23:48.053725 SPI: 00: enabled 1
748 12:23:48.057270 PNP: 0c09.0: enabled 1
749 12:23:48.057346 GENERIC: 0.0: enabled 1
750 12:23:48.060028 USB3 port 0: enabled 1
751 12:23:48.063527 USB3 port 1: enabled 1
752 12:23:48.063603 USB3 port 2: enabled 0
753 12:23:48.067023 USB3 port 3: enabled 0
754 12:23:48.070011 USB2 port 0: enabled 0
755 12:23:48.070116 USB2 port 1: enabled 1
756 12:23:48.073303 USB2 port 2: enabled 1
757 12:23:48.076728 USB2 port 3: enabled 0
758 12:23:48.080179 USB2 port 4: enabled 1
759 12:23:48.080270 USB2 port 5: enabled 0
760 12:23:48.083740 USB2 port 6: enabled 0
761 12:23:48.086966 USB2 port 7: enabled 0
762 12:23:48.087043 USB2 port 8: enabled 0
763 12:23:48.090288 USB2 port 9: enabled 0
764 12:23:48.093708 USB3 port 0: enabled 0
765 12:23:48.096940 USB3 port 1: enabled 1
766 12:23:48.097021 USB3 port 2: enabled 0
767 12:23:48.100197 USB3 port 3: enabled 0
768 12:23:48.103307 GENERIC: 0.0: enabled 1
769 12:23:48.103411 GENERIC: 1.0: enabled 1
770 12:23:48.106580 APIC: 01: enabled 1
771 12:23:48.110229 APIC: 05: enabled 1
772 12:23:48.110312 APIC: 06: enabled 1
773 12:23:48.113286 APIC: 03: enabled 1
774 12:23:48.116909 APIC: 02: enabled 1
775 12:23:48.116991 APIC: 04: enabled 1
776 12:23:48.120168 APIC: 07: enabled 1
777 12:23:48.120279 Compare with tree...
778 12:23:48.123327 Root Device: enabled 1
779 12:23:48.126713 DOMAIN: 0000: enabled 1
780 12:23:48.129767 PCI: 00:00.0: enabled 1
781 12:23:48.129871 PCI: 00:02.0: enabled 1
782 12:23:48.133212 PCI: 00:04.0: enabled 1
783 12:23:48.136487 GENERIC: 0.0: enabled 1
784 12:23:48.139912 PCI: 00:05.0: enabled 1
785 12:23:48.143099 PCI: 00:06.0: enabled 0
786 12:23:48.143178 PCI: 00:07.0: enabled 0
787 12:23:48.146566 GENERIC: 0.0: enabled 1
788 12:23:48.149982 PCI: 00:07.1: enabled 0
789 12:23:48.153541 GENERIC: 1.0: enabled 1
790 12:23:48.156581 PCI: 00:07.2: enabled 0
791 12:23:48.160131 GENERIC: 0.0: enabled 1
792 12:23:48.160249 PCI: 00:07.3: enabled 0
793 12:23:48.163051 GENERIC: 1.0: enabled 1
794 12:23:48.166830 PCI: 00:08.0: enabled 1
795 12:23:48.169676 PCI: 00:09.0: enabled 0
796 12:23:48.173021 PCI: 00:0a.0: enabled 0
797 12:23:48.173101 PCI: 00:0d.0: enabled 1
798 12:23:48.176378 USB0 port 0: enabled 1
799 12:23:48.179918 USB3 port 0: enabled 1
800 12:23:48.183386 USB3 port 1: enabled 1
801 12:23:48.186277 USB3 port 2: enabled 0
802 12:23:48.186390 USB3 port 3: enabled 0
803 12:23:48.189870 PCI: 00:0d.1: enabled 0
804 12:23:48.193370 PCI: 00:0d.2: enabled 0
805 12:23:48.196168 GENERIC: 0.0: enabled 1
806 12:23:48.199964 PCI: 00:0d.3: enabled 0
807 12:23:48.200068 PCI: 00:0e.0: enabled 0
808 12:23:48.202808 PCI: 00:10.2: enabled 1
809 12:23:48.206670 PCI: 00:10.6: enabled 0
810 12:23:48.209882 PCI: 00:10.7: enabled 0
811 12:23:48.213202 PCI: 00:12.0: enabled 0
812 12:23:48.213340 PCI: 00:12.6: enabled 0
813 12:23:48.216557 PCI: 00:13.0: enabled 0
814 12:23:48.219867 PCI: 00:14.0: enabled 1
815 12:23:48.223055 USB0 port 0: enabled 1
816 12:23:48.226311 USB2 port 0: enabled 0
817 12:23:48.226394 USB2 port 1: enabled 1
818 12:23:48.229865 USB2 port 2: enabled 1
819 12:23:48.232983 USB2 port 3: enabled 0
820 12:23:48.236402 USB2 port 4: enabled 1
821 12:23:48.239711 USB2 port 5: enabled 0
822 12:23:48.239791 USB2 port 6: enabled 0
823 12:23:48.242729 USB2 port 7: enabled 0
824 12:23:48.246355 USB2 port 8: enabled 0
825 12:23:48.249825 USB2 port 9: enabled 0
826 12:23:48.253127 USB3 port 0: enabled 0
827 12:23:48.256059 USB3 port 1: enabled 1
828 12:23:48.256153 USB3 port 2: enabled 0
829 12:23:48.259643 USB3 port 3: enabled 0
830 12:23:48.263074 PCI: 00:14.1: enabled 0
831 12:23:48.266439 PCI: 00:14.2: enabled 1
832 12:23:48.269436 PCI: 00:14.3: enabled 1
833 12:23:48.269519 GENERIC: 0.0: enabled 1
834 12:23:48.272825 PCI: 00:15.0: enabled 1
835 12:23:48.276326 I2C: 00:1a: enabled 1
836 12:23:48.279630 I2C: 00:31: enabled 1
837 12:23:48.282973 I2C: 00:32: enabled 1
838 12:23:48.283070 PCI: 00:15.1: enabled 1
839 12:23:48.286004 I2C: 00:10: enabled 1
840 12:23:48.289914 PCI: 00:15.2: enabled 1
841 12:23:48.292854 PCI: 00:15.3: enabled 1
842 12:23:48.292941 PCI: 00:16.0: enabled 1
843 12:23:48.296306 PCI: 00:16.1: enabled 0
844 12:23:48.299702 PCI: 00:16.2: enabled 0
845 12:23:48.303053 PCI: 00:16.3: enabled 0
846 12:23:48.306014 PCI: 00:16.4: enabled 0
847 12:23:48.306094 PCI: 00:16.5: enabled 0
848 12:23:48.309867 PCI: 00:17.0: enabled 1
849 12:23:48.313729 PCI: 00:19.0: enabled 0
850 12:23:48.317722 PCI: 00:19.1: enabled 1
851 12:23:48.317816 I2C: 00:15: enabled 1
852 12:23:48.320901 PCI: 00:19.2: enabled 0
853 12:23:48.324129 PCI: 00:1d.0: enabled 1
854 12:23:48.327413 GENERIC: 0.0: enabled 1
855 12:23:48.327493 PCI: 00:1e.0: enabled 1
856 12:23:48.330746 PCI: 00:1e.1: enabled 0
857 12:23:48.334111 PCI: 00:1e.2: enabled 1
858 12:23:48.337617 SPI: 00: enabled 1
859 12:23:48.337702 PCI: 00:1e.3: enabled 1
860 12:23:48.340635 SPI: 00: enabled 1
861 12:23:48.386406 PCI: 00:1f.0: enabled 1
862 12:23:48.386535 PNP: 0c09.0: enabled 1
863 12:23:48.386980 PCI: 00:1f.1: enabled 0
864 12:23:48.387067 PCI: 00:1f.2: enabled 1
865 12:23:48.387133 GENERIC: 0.0: enabled 1
866 12:23:48.387412 GENERIC: 0.0: enabled 1
867 12:23:48.387483 GENERIC: 1.0: enabled 1
868 12:23:48.387545 PCI: 00:1f.3: enabled 1
869 12:23:48.387613 PCI: 00:1f.4: enabled 0
870 12:23:48.387672 PCI: 00:1f.5: enabled 1
871 12:23:48.387730 PCI: 00:1f.6: enabled 0
872 12:23:48.387790 PCI: 00:1f.7: enabled 0
873 12:23:48.387849 CPU_CLUSTER: 0: enabled 1
874 12:23:48.387905 APIC: 00: enabled 1
875 12:23:48.387962 APIC: 01: enabled 1
876 12:23:48.388017 APIC: 05: enabled 1
877 12:23:48.388071 APIC: 06: enabled 1
878 12:23:48.391083 APIC: 03: enabled 1
879 12:23:48.391179 APIC: 02: enabled 1
880 12:23:48.391259 APIC: 04: enabled 1
881 12:23:48.394547 APIC: 07: enabled 1
882 12:23:48.397358 Root Device scanning...
883 12:23:48.400855 scan_static_bus for Root Device
884 12:23:48.404276 DOMAIN: 0000 enabled
885 12:23:48.404355 CPU_CLUSTER: 0 enabled
886 12:23:48.407694 DOMAIN: 0000 scanning...
887 12:23:48.410739 PCI: pci_scan_bus for bus 00
888 12:23:48.413963 PCI: 00:00.0 [8086/0000] ops
889 12:23:48.417301 PCI: 00:00.0 [8086/9a12] enabled
890 12:23:48.420734 PCI: 00:02.0 [8086/0000] bus ops
891 12:23:48.423857 PCI: 00:02.0 [8086/9a40] enabled
892 12:23:48.427650 PCI: 00:04.0 [8086/0000] bus ops
893 12:23:48.430823 PCI: 00:04.0 [8086/9a03] enabled
894 12:23:48.433936 PCI: 00:05.0 [8086/9a19] enabled
895 12:23:48.437110 PCI: 00:07.0 [0000/0000] hidden
896 12:23:48.440556 PCI: 00:08.0 [8086/9a11] enabled
897 12:23:48.444059 PCI: 00:0a.0 [8086/9a0d] disabled
898 12:23:48.447130 PCI: 00:0d.0 [8086/0000] bus ops
899 12:23:48.450390 PCI: 00:0d.0 [8086/9a13] enabled
900 12:23:48.454060 PCI: 00:14.0 [8086/0000] bus ops
901 12:23:48.457646 PCI: 00:14.0 [8086/a0ed] enabled
902 12:23:48.460638 PCI: 00:14.2 [8086/a0ef] enabled
903 12:23:48.464011 PCI: 00:14.3 [8086/0000] bus ops
904 12:23:48.467235 PCI: 00:14.3 [8086/a0f0] enabled
905 12:23:48.470576 PCI: 00:15.0 [8086/0000] bus ops
906 12:23:48.474087 PCI: 00:15.0 [8086/a0e8] enabled
907 12:23:48.477710 PCI: 00:15.1 [8086/0000] bus ops
908 12:23:48.480426 PCI: 00:15.1 [8086/a0e9] enabled
909 12:23:48.483766 PCI: 00:15.2 [8086/0000] bus ops
910 12:23:48.487109 PCI: 00:15.2 [8086/a0ea] enabled
911 12:23:48.490372 PCI: 00:15.3 [8086/0000] bus ops
912 12:23:48.494267 PCI: 00:15.3 [8086/a0eb] enabled
913 12:23:48.497033 PCI: 00:16.0 [8086/0000] ops
914 12:23:48.500422 PCI: 00:16.0 [8086/a0e0] enabled
915 12:23:48.507375 PCI: Static device PCI: 00:17.0 not found, disabling it.
916 12:23:48.510279 PCI: 00:19.0 [8086/0000] bus ops
917 12:23:48.513699 PCI: 00:19.0 [8086/a0c5] disabled
918 12:23:48.517102 PCI: 00:19.1 [8086/0000] bus ops
919 12:23:48.520504 PCI: 00:19.1 [8086/a0c6] enabled
920 12:23:48.523808 PCI: 00:1d.0 [8086/0000] bus ops
921 12:23:48.527303 PCI: 00:1d.0 [8086/a0b0] enabled
922 12:23:48.530354 PCI: 00:1e.0 [8086/0000] ops
923 12:23:48.534063 PCI: 00:1e.0 [8086/a0a8] enabled
924 12:23:48.536988 PCI: 00:1e.2 [8086/0000] bus ops
925 12:23:48.540913 PCI: 00:1e.2 [8086/a0aa] enabled
926 12:23:48.543926 PCI: 00:1e.3 [8086/0000] bus ops
927 12:23:48.547014 PCI: 00:1e.3 [8086/a0ab] enabled
928 12:23:48.550408 PCI: 00:1f.0 [8086/0000] bus ops
929 12:23:48.553853 PCI: 00:1f.0 [8086/a087] enabled
930 12:23:48.553938 RTC Init
931 12:23:48.556947 Set power on after power failure.
932 12:23:48.560450 Disabling Deep S3
933 12:23:48.560532 Disabling Deep S3
934 12:23:48.563619 Disabling Deep S4
935 12:23:48.563710 Disabling Deep S4
936 12:23:48.566920 Disabling Deep S5
937 12:23:48.570328 Disabling Deep S5
938 12:23:48.573622 PCI: 00:1f.2 [0000/0000] hidden
939 12:23:48.577075 PCI: 00:1f.3 [8086/0000] bus ops
940 12:23:48.580545 PCI: 00:1f.3 [8086/a0c8] enabled
941 12:23:48.583968 PCI: 00:1f.5 [8086/0000] bus ops
942 12:23:48.586779 PCI: 00:1f.5 [8086/a0a4] enabled
943 12:23:48.586915 PCI: Leftover static devices:
944 12:23:48.590753 PCI: 00:10.2
945 12:23:48.590836 PCI: 00:10.6
946 12:23:48.593588 PCI: 00:10.7
947 12:23:48.593684 PCI: 00:06.0
948 12:23:48.597320 PCI: 00:07.1
949 12:23:48.597402 PCI: 00:07.2
950 12:23:48.597493 PCI: 00:07.3
951 12:23:48.600707 PCI: 00:09.0
952 12:23:48.600789 PCI: 00:0d.1
953 12:23:48.603628 PCI: 00:0d.2
954 12:23:48.603710 PCI: 00:0d.3
955 12:23:48.603776 PCI: 00:0e.0
956 12:23:48.607063 PCI: 00:12.0
957 12:23:48.607175 PCI: 00:12.6
958 12:23:48.610635 PCI: 00:13.0
959 12:23:48.610718 PCI: 00:14.1
960 12:23:48.610823 PCI: 00:16.1
961 12:23:48.613458 PCI: 00:16.2
962 12:23:48.613541 PCI: 00:16.3
963 12:23:48.616891 PCI: 00:16.4
964 12:23:48.616974 PCI: 00:16.5
965 12:23:48.620414 PCI: 00:17.0
966 12:23:48.620496 PCI: 00:19.2
967 12:23:48.620562 PCI: 00:1e.1
968 12:23:48.623798 PCI: 00:1f.1
969 12:23:48.623880 PCI: 00:1f.4
970 12:23:48.626859 PCI: 00:1f.6
971 12:23:48.626943 PCI: 00:1f.7
972 12:23:48.630222 PCI: Check your devicetree.cb.
973 12:23:48.633878 PCI: 00:02.0 scanning...
974 12:23:48.637098 scan_generic_bus for PCI: 00:02.0
975 12:23:48.640387 scan_generic_bus for PCI: 00:02.0 done
976 12:23:48.643781 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
977 12:23:48.646946 PCI: 00:04.0 scanning...
978 12:23:48.650172 scan_generic_bus for PCI: 00:04.0
979 12:23:48.653855 GENERIC: 0.0 enabled
980 12:23:48.660147 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
981 12:23:48.663418 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
982 12:23:48.667164 PCI: 00:0d.0 scanning...
983 12:23:48.670373 scan_static_bus for PCI: 00:0d.0
984 12:23:48.673706 USB0 port 0 enabled
985 12:23:48.673789 USB0 port 0 scanning...
986 12:23:48.676811 scan_static_bus for USB0 port 0
987 12:23:48.680009 USB3 port 0 enabled
988 12:23:48.683372 USB3 port 1 enabled
989 12:23:48.683455 USB3 port 2 disabled
990 12:23:48.686696 USB3 port 3 disabled
991 12:23:48.690057 USB3 port 0 scanning...
992 12:23:48.693547 scan_static_bus for USB3 port 0
993 12:23:48.696921 scan_static_bus for USB3 port 0 done
994 12:23:48.700124 scan_bus: bus USB3 port 0 finished in 6 msecs
995 12:23:48.703412 USB3 port 1 scanning...
996 12:23:48.706791 scan_static_bus for USB3 port 1
997 12:23:48.710218 scan_static_bus for USB3 port 1 done
998 12:23:48.713774 scan_bus: bus USB3 port 1 finished in 6 msecs
999 12:23:48.720030 scan_static_bus for USB0 port 0 done
1000 12:23:48.723429 scan_bus: bus USB0 port 0 finished in 43 msecs
1001 12:23:48.726424 scan_static_bus for PCI: 00:0d.0 done
1002 12:23:48.733149 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
1003 12:23:48.733228 PCI: 00:14.0 scanning...
1004 12:23:48.736696 scan_static_bus for PCI: 00:14.0
1005 12:23:48.740181 USB0 port 0 enabled
1006 12:23:48.743098 USB0 port 0 scanning...
1007 12:23:48.746316 scan_static_bus for USB0 port 0
1008 12:23:48.746391 USB2 port 0 disabled
1009 12:23:48.749653 USB2 port 1 enabled
1010 12:23:48.753317 USB2 port 2 enabled
1011 12:23:48.753393 USB2 port 3 disabled
1012 12:23:48.756158 USB2 port 4 enabled
1013 12:23:48.759518 USB2 port 5 disabled
1014 12:23:48.759587 USB2 port 6 disabled
1015 12:23:48.762982 USB2 port 7 disabled
1016 12:23:48.766381 USB2 port 8 disabled
1017 12:23:48.766454 USB2 port 9 disabled
1018 12:23:48.769875 USB3 port 0 disabled
1019 12:23:48.772788 USB3 port 1 enabled
1020 12:23:48.772861 USB3 port 2 disabled
1021 12:23:48.776064 USB3 port 3 disabled
1022 12:23:48.779853 USB2 port 1 scanning...
1023 12:23:48.782866 scan_static_bus for USB2 port 1
1024 12:23:48.785991 scan_static_bus for USB2 port 1 done
1025 12:23:48.789659 scan_bus: bus USB2 port 1 finished in 6 msecs
1026 12:23:48.792790 USB2 port 2 scanning...
1027 12:23:48.796403 scan_static_bus for USB2 port 2
1028 12:23:48.799675 scan_static_bus for USB2 port 2 done
1029 12:23:48.803030 scan_bus: bus USB2 port 2 finished in 6 msecs
1030 12:23:48.805972 USB2 port 4 scanning...
1031 12:23:48.809688 scan_static_bus for USB2 port 4
1032 12:23:48.812694 scan_static_bus for USB2 port 4 done
1033 12:23:48.819315 scan_bus: bus USB2 port 4 finished in 6 msecs
1034 12:23:48.819400 USB3 port 1 scanning...
1035 12:23:48.822876 scan_static_bus for USB3 port 1
1036 12:23:48.829815 scan_static_bus for USB3 port 1 done
1037 12:23:48.833186 scan_bus: bus USB3 port 1 finished in 6 msecs
1038 12:23:48.836139 scan_static_bus for USB0 port 0 done
1039 12:23:48.839824 scan_bus: bus USB0 port 0 finished in 93 msecs
1040 12:23:48.845881 scan_static_bus for PCI: 00:14.0 done
1041 12:23:48.849309 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1042 12:23:48.852658 PCI: 00:14.3 scanning...
1043 12:23:48.855889 scan_static_bus for PCI: 00:14.3
1044 12:23:48.859342 GENERIC: 0.0 enabled
1045 12:23:48.862767 scan_static_bus for PCI: 00:14.3 done
1046 12:23:48.865910 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1047 12:23:48.869163 PCI: 00:15.0 scanning...
1048 12:23:48.872456 scan_static_bus for PCI: 00:15.0
1049 12:23:48.875874 I2C: 00:1a enabled
1050 12:23:48.875950 I2C: 00:31 enabled
1051 12:23:48.879395 I2C: 00:32 enabled
1052 12:23:48.882661 scan_static_bus for PCI: 00:15.0 done
1053 12:23:48.886080 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1054 12:23:48.890022 PCI: 00:15.1 scanning...
1055 12:23:48.893857 scan_static_bus for PCI: 00:15.1
1056 12:23:48.893943 I2C: 00:10 enabled
1057 12:23:48.900316 scan_static_bus for PCI: 00:15.1 done
1058 12:23:48.904019 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1059 12:23:48.906823 PCI: 00:15.2 scanning...
1060 12:23:48.910630 scan_static_bus for PCI: 00:15.2
1061 12:23:48.913514 scan_static_bus for PCI: 00:15.2 done
1062 12:23:48.916722 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1063 12:23:48.920134 PCI: 00:15.3 scanning...
1064 12:23:48.923695 scan_static_bus for PCI: 00:15.3
1065 12:23:48.927183 scan_static_bus for PCI: 00:15.3 done
1066 12:23:48.933369 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1067 12:23:48.933447 PCI: 00:19.1 scanning...
1068 12:23:48.937443 scan_static_bus for PCI: 00:19.1
1069 12:23:48.940189 I2C: 00:15 enabled
1070 12:23:48.943725 scan_static_bus for PCI: 00:19.1 done
1071 12:23:48.950697 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1072 12:23:48.950775 PCI: 00:1d.0 scanning...
1073 12:23:48.956852 do_pci_scan_bridge for PCI: 00:1d.0
1074 12:23:48.956937 PCI: pci_scan_bus for bus 01
1075 12:23:48.960229 PCI: 01:00.0 [1c5c/174a] enabled
1076 12:23:48.963873 GENERIC: 0.0 enabled
1077 12:23:48.967270 Enabling Common Clock Configuration
1078 12:23:48.973847 L1 Sub-State supported from root port 29
1079 12:23:48.973926 L1 Sub-State Support = 0xf
1080 12:23:48.977108 CommonModeRestoreTime = 0x28
1081 12:23:48.983990 Power On Value = 0x16, Power On Scale = 0x0
1082 12:23:48.984069 ASPM: Enabled L1
1083 12:23:48.986846 PCIe: Max_Payload_Size adjusted to 128
1084 12:23:48.993647 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1085 12:23:48.993728 PCI: 00:1e.2 scanning...
1086 12:23:49.000704 scan_generic_bus for PCI: 00:1e.2
1087 12:23:49.000783 SPI: 00 enabled
1088 12:23:49.006981 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1089 12:23:49.010244 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1090 12:23:49.013897 PCI: 00:1e.3 scanning...
1091 12:23:49.017086 scan_generic_bus for PCI: 00:1e.3
1092 12:23:49.020229 SPI: 00 enabled
1093 12:23:49.023858 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1094 12:23:49.030143 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1095 12:23:49.033619 PCI: 00:1f.0 scanning...
1096 12:23:49.037047 scan_static_bus for PCI: 00:1f.0
1097 12:23:49.037127 PNP: 0c09.0 enabled
1098 12:23:49.040553 PNP: 0c09.0 scanning...
1099 12:23:49.043549 scan_static_bus for PNP: 0c09.0
1100 12:23:49.046914 scan_static_bus for PNP: 0c09.0 done
1101 12:23:49.053683 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1102 12:23:49.056969 scan_static_bus for PCI: 00:1f.0 done
1103 12:23:49.060406 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1104 12:23:49.063783 PCI: 00:1f.2 scanning...
1105 12:23:49.066951 scan_static_bus for PCI: 00:1f.2
1106 12:23:49.070488 GENERIC: 0.0 enabled
1107 12:23:49.070559 GENERIC: 0.0 scanning...
1108 12:23:49.073965 scan_static_bus for GENERIC: 0.0
1109 12:23:49.077260 GENERIC: 0.0 enabled
1110 12:23:49.080501 GENERIC: 1.0 enabled
1111 12:23:49.083755 scan_static_bus for GENERIC: 0.0 done
1112 12:23:49.087235 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1113 12:23:49.093438 scan_static_bus for PCI: 00:1f.2 done
1114 12:23:49.096858 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1115 12:23:49.100372 PCI: 00:1f.3 scanning...
1116 12:23:49.103595 scan_static_bus for PCI: 00:1f.3
1117 12:23:49.106899 scan_static_bus for PCI: 00:1f.3 done
1118 12:23:49.110572 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1119 12:23:49.113860 PCI: 00:1f.5 scanning...
1120 12:23:49.117415 scan_generic_bus for PCI: 00:1f.5
1121 12:23:49.120359 scan_generic_bus for PCI: 00:1f.5 done
1122 12:23:49.127037 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1123 12:23:49.130216 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1124 12:23:49.133992 scan_static_bus for Root Device done
1125 12:23:49.140317 scan_bus: bus Root Device finished in 737 msecs
1126 12:23:49.140447 done
1127 12:23:49.146879 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1128 12:23:49.150390 Chrome EC: UHEPI supported
1129 12:23:49.157182 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1130 12:23:49.163950 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1131 12:23:49.166881 SPI flash protection: WPSW=0 SRP0=0
1132 12:23:49.170262 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1133 12:23:49.177118 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1134 12:23:49.180529 found VGA at PCI: 00:02.0
1135 12:23:49.183904 Setting up VGA for PCI: 00:02.0
1136 12:23:49.187105 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1137 12:23:49.193849 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1138 12:23:49.193932 Allocating resources...
1139 12:23:49.197012 Reading resources...
1140 12:23:49.200447 Root Device read_resources bus 0 link: 0
1141 12:23:49.206769 DOMAIN: 0000 read_resources bus 0 link: 0
1142 12:23:49.209946 PCI: 00:04.0 read_resources bus 1 link: 0
1143 12:23:49.216789 PCI: 00:04.0 read_resources bus 1 link: 0 done
1144 12:23:49.219824 PCI: 00:0d.0 read_resources bus 0 link: 0
1145 12:23:49.223148 USB0 port 0 read_resources bus 0 link: 0
1146 12:23:49.230560 USB0 port 0 read_resources bus 0 link: 0 done
1147 12:23:49.234136 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1148 12:23:49.240532 PCI: 00:14.0 read_resources bus 0 link: 0
1149 12:23:49.243873 USB0 port 0 read_resources bus 0 link: 0
1150 12:23:49.250807 USB0 port 0 read_resources bus 0 link: 0 done
1151 12:23:49.253846 PCI: 00:14.0 read_resources bus 0 link: 0 done
1152 12:23:49.260506 PCI: 00:14.3 read_resources bus 0 link: 0
1153 12:23:49.264094 PCI: 00:14.3 read_resources bus 0 link: 0 done
1154 12:23:49.270339 PCI: 00:15.0 read_resources bus 0 link: 0
1155 12:23:49.274247 PCI: 00:15.0 read_resources bus 0 link: 0 done
1156 12:23:49.280538 PCI: 00:15.1 read_resources bus 0 link: 0
1157 12:23:49.283979 PCI: 00:15.1 read_resources bus 0 link: 0 done
1158 12:23:49.290929 PCI: 00:19.1 read_resources bus 0 link: 0
1159 12:23:49.294217 PCI: 00:19.1 read_resources bus 0 link: 0 done
1160 12:23:49.300997 PCI: 00:1d.0 read_resources bus 1 link: 0
1161 12:23:49.304516 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1162 12:23:49.311103 PCI: 00:1e.2 read_resources bus 2 link: 0
1163 12:23:49.314419 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1164 12:23:49.320787 PCI: 00:1e.3 read_resources bus 3 link: 0
1165 12:23:49.324150 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1166 12:23:49.331013 PCI: 00:1f.0 read_resources bus 0 link: 0
1167 12:23:49.334416 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1168 12:23:49.337345 PCI: 00:1f.2 read_resources bus 0 link: 0
1169 12:23:49.344153 GENERIC: 0.0 read_resources bus 0 link: 0
1170 12:23:49.347605 GENERIC: 0.0 read_resources bus 0 link: 0 done
1171 12:23:49.353979 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1172 12:23:49.360591 DOMAIN: 0000 read_resources bus 0 link: 0 done
1173 12:23:49.363993 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1174 12:23:49.370732 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1175 12:23:49.374122 Root Device read_resources bus 0 link: 0 done
1176 12:23:49.377274 Done reading resources.
1177 12:23:49.380509 Show resources in subtree (Root Device)...After reading.
1178 12:23:49.387593 Root Device child on link 0 DOMAIN: 0000
1179 12:23:49.390388 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1180 12:23:49.400319 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1181 12:23:49.410356 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1182 12:23:49.410447 PCI: 00:00.0
1183 12:23:49.420306 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1184 12:23:49.430150 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1185 12:23:49.439960 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1186 12:23:49.449838 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1187 12:23:49.459872 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1188 12:23:49.466417 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1189 12:23:49.476265 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1190 12:23:49.486139 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1191 12:23:49.496394 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1192 12:23:49.505954 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1193 12:23:49.515821 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1194 12:23:49.522805 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1195 12:23:49.532813 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1196 12:23:49.542365 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1197 12:23:49.552110 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1198 12:23:49.562433 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1199 12:23:49.572160 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1200 12:23:49.582058 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1201 12:23:49.588822 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1202 12:23:49.598767 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1203 12:23:49.601976 PCI: 00:02.0
1204 12:23:49.611830 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1205 12:23:49.621991 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1206 12:23:49.631630 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1207 12:23:49.634799 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1208 12:23:49.644858 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1209 12:23:49.648347 GENERIC: 0.0
1210 12:23:49.648425 PCI: 00:05.0
1211 12:23:49.658094 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1212 12:23:49.665145 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1213 12:23:49.665223 GENERIC: 0.0
1214 12:23:49.667976 PCI: 00:08.0
1215 12:23:49.678184 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 12:23:49.678272 PCI: 00:0a.0
1217 12:23:49.681111 PCI: 00:0d.0 child on link 0 USB0 port 0
1218 12:23:49.691368 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1219 12:23:49.697706 USB0 port 0 child on link 0 USB3 port 0
1220 12:23:49.697783 USB3 port 0
1221 12:23:49.701125 USB3 port 1
1222 12:23:49.701200 USB3 port 2
1223 12:23:49.704480 USB3 port 3
1224 12:23:49.707831 PCI: 00:14.0 child on link 0 USB0 port 0
1225 12:23:49.717866 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1226 12:23:49.724500 USB0 port 0 child on link 0 USB2 port 0
1227 12:23:49.724606 USB2 port 0
1228 12:23:49.727985 USB2 port 1
1229 12:23:49.728119 USB2 port 2
1230 12:23:49.731239 USB2 port 3
1231 12:23:49.731313 USB2 port 4
1232 12:23:49.734659 USB2 port 5
1233 12:23:49.734742 USB2 port 6
1234 12:23:49.737684 USB2 port 7
1235 12:23:49.737768 USB2 port 8
1236 12:23:49.741214 USB2 port 9
1237 12:23:49.741354 USB3 port 0
1238 12:23:49.744319 USB3 port 1
1239 12:23:49.744399 USB3 port 2
1240 12:23:49.747729 USB3 port 3
1241 12:23:49.750894 PCI: 00:14.2
1242 12:23:49.760947 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 12:23:49.770834 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1244 12:23:49.774222 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1245 12:23:49.784341 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1246 12:23:49.784422 GENERIC: 0.0
1247 12:23:49.790492 PCI: 00:15.0 child on link 0 I2C: 00:1a
1248 12:23:49.800878 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1249 12:23:49.800959 I2C: 00:1a
1250 12:23:49.804347 I2C: 00:31
1251 12:23:49.804431 I2C: 00:32
1252 12:23:49.807793 PCI: 00:15.1 child on link 0 I2C: 00:10
1253 12:23:49.817347 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 12:23:49.820773 I2C: 00:10
1255 12:23:49.820854 PCI: 00:15.2
1256 12:23:49.830357 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 12:23:49.833814 PCI: 00:15.3
1258 12:23:49.844128 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 12:23:49.844238 PCI: 00:16.0
1260 12:23:49.853995 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1261 12:23:49.857019 PCI: 00:19.0
1262 12:23:49.860819 PCI: 00:19.1 child on link 0 I2C: 00:15
1263 12:23:49.870310 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 12:23:49.873666 I2C: 00:15
1265 12:23:49.877094 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1266 12:23:49.887282 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1267 12:23:49.897055 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1268 12:23:49.903641 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1269 12:23:49.907034 GENERIC: 0.0
1270 12:23:49.907117 PCI: 01:00.0
1271 12:23:49.916961 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 12:23:49.927069 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1273 12:23:49.936752 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1274 12:23:49.936837 PCI: 00:1e.0
1275 12:23:49.950384 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1276 12:23:49.953561 PCI: 00:1e.2 child on link 0 SPI: 00
1277 12:23:49.963353 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1278 12:23:49.963437 SPI: 00
1279 12:23:49.969973 PCI: 00:1e.3 child on link 0 SPI: 00
1280 12:23:49.979857 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1281 12:23:49.979961 SPI: 00
1282 12:23:49.983184 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1283 12:23:49.993446 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1284 12:23:49.993582 PNP: 0c09.0
1285 12:23:50.003359 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1286 12:23:50.006828 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1287 12:23:50.016760 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1288 12:23:50.026782 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1289 12:23:50.030071 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1290 12:23:50.033035 GENERIC: 0.0
1291 12:23:50.036568 GENERIC: 1.0
1292 12:23:50.036660 PCI: 00:1f.3
1293 12:23:50.046703 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1294 12:23:50.056469 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1295 12:23:50.059996 PCI: 00:1f.5
1296 12:23:50.066229 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1297 12:23:50.072880 CPU_CLUSTER: 0 child on link 0 APIC: 00
1298 12:23:50.072980 APIC: 00
1299 12:23:50.073080 APIC: 01
1300 12:23:50.076292 APIC: 05
1301 12:23:50.076392 APIC: 06
1302 12:23:50.079589 APIC: 03
1303 12:23:50.079687 APIC: 02
1304 12:23:50.079768 APIC: 04
1305 12:23:50.082992 APIC: 07
1306 12:23:50.089709 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1307 12:23:50.096033 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1308 12:23:50.102786 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1309 12:23:50.106230 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1310 12:23:50.112848 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1311 12:23:50.116372 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1312 12:23:50.119318 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1313 12:23:50.126000 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1314 12:23:50.136078 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1315 12:23:50.143008 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1316 12:23:50.149393 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1317 12:23:50.156230 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1318 12:23:50.162533 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1319 12:23:50.172386 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1320 12:23:50.179014 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1321 12:23:50.182388 DOMAIN: 0000: Resource ranges:
1322 12:23:50.185885 * Base: 1000, Size: 800, Tag: 100
1323 12:23:50.189304 * Base: 1900, Size: e700, Tag: 100
1324 12:23:50.195690 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1325 12:23:50.202373 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1326 12:23:50.209466 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1327 12:23:50.215563 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1328 12:23:50.222437 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1329 12:23:50.232468 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1330 12:23:50.239124 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1331 12:23:50.245631 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1332 12:23:50.255853 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1333 12:23:50.262072 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1334 12:23:50.269053 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1335 12:23:50.278964 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1336 12:23:50.285346 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1337 12:23:50.292032 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1338 12:23:50.302267 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1339 12:23:50.308923 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1340 12:23:50.315301 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1341 12:23:50.321708 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1342 12:23:50.331608 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1343 12:23:50.338613 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1344 12:23:50.348574 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1345 12:23:50.354869 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1346 12:23:50.361916 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1347 12:23:50.368149 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1348 12:23:50.378003 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1349 12:23:50.381315 DOMAIN: 0000: Resource ranges:
1350 12:23:50.384732 * Base: 7fc00000, Size: 40400000, Tag: 200
1351 12:23:50.388074 * Base: d0000000, Size: 28000000, Tag: 200
1352 12:23:50.394572 * Base: fa000000, Size: 1000000, Tag: 200
1353 12:23:50.398103 * Base: fb001000, Size: 2fff000, Tag: 200
1354 12:23:50.401493 * Base: fe010000, Size: 2e000, Tag: 200
1355 12:23:50.408124 * Base: fe03f000, Size: d41000, Tag: 200
1356 12:23:50.411306 * Base: fed88000, Size: 8000, Tag: 200
1357 12:23:50.414722 * Base: fed93000, Size: d000, Tag: 200
1358 12:23:50.418266 * Base: feda2000, Size: 1e000, Tag: 200
1359 12:23:50.421599 * Base: fede0000, Size: 1220000, Tag: 200
1360 12:23:50.428012 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1361 12:23:50.434594 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1362 12:23:50.441249 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1363 12:23:50.447711 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1364 12:23:50.454640 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1365 12:23:50.461233 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1366 12:23:50.467880 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1367 12:23:50.474312 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1368 12:23:50.481161 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1369 12:23:50.487951 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1370 12:23:50.494275 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1371 12:23:50.501004 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1372 12:23:50.507653 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1373 12:23:50.514040 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1374 12:23:50.520807 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1375 12:23:50.527562 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1376 12:23:50.533633 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1377 12:23:50.540298 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1378 12:23:50.547036 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1379 12:23:50.554004 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1380 12:23:50.560528 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1381 12:23:50.567002 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1382 12:23:50.573793 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1383 12:23:50.580480 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1384 12:23:50.590071 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1385 12:23:50.593516 PCI: 00:1d.0: Resource ranges:
1386 12:23:50.596979 * Base: 7fc00000, Size: 100000, Tag: 200
1387 12:23:50.603298 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1388 12:23:50.610001 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1389 12:23:50.616710 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1390 12:23:50.626307 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1391 12:23:50.632874 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1392 12:23:50.636292 Root Device assign_resources, bus 0 link: 0
1393 12:23:50.642919 DOMAIN: 0000 assign_resources, bus 0 link: 0
1394 12:23:50.649961 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1395 12:23:50.659425 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1396 12:23:50.666286 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1397 12:23:50.673037 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1398 12:23:50.679217 PCI: 00:04.0 assign_resources, bus 1 link: 0
1399 12:23:50.682630 PCI: 00:04.0 assign_resources, bus 1 link: 0
1400 12:23:50.692641 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1401 12:23:50.699043 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1402 12:23:50.709054 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1403 12:23:50.712464 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1404 12:23:50.715735 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1405 12:23:50.726026 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1406 12:23:50.729331 PCI: 00:14.0 assign_resources, bus 0 link: 0
1407 12:23:50.735939 PCI: 00:14.0 assign_resources, bus 0 link: 0
1408 12:23:50.742775 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1409 12:23:50.752360 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1410 12:23:50.759208 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1411 12:23:50.762649 PCI: 00:14.3 assign_resources, bus 0 link: 0
1412 12:23:50.768967 PCI: 00:14.3 assign_resources, bus 0 link: 0
1413 12:23:50.775711 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1414 12:23:50.782617 PCI: 00:15.0 assign_resources, bus 0 link: 0
1415 12:23:50.786057 PCI: 00:15.0 assign_resources, bus 0 link: 0
1416 12:23:50.795621 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1417 12:23:50.799134 PCI: 00:15.1 assign_resources, bus 0 link: 0
1418 12:23:50.802526 PCI: 00:15.1 assign_resources, bus 0 link: 0
1419 12:23:50.812331 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1420 12:23:50.818886 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1421 12:23:50.828794 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1422 12:23:50.835457 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1423 12:23:50.841870 PCI: 00:19.1 assign_resources, bus 0 link: 0
1424 12:23:50.845304 PCI: 00:19.1 assign_resources, bus 0 link: 0
1425 12:23:50.855283 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1426 12:23:50.865110 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1427 12:23:50.872064 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1428 12:23:50.879036 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1429 12:23:50.885313 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1430 12:23:50.892083 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1431 12:23:50.901794 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1432 12:23:50.905317 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1433 12:23:50.915407 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1434 12:23:50.918785 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1435 12:23:50.925104 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1436 12:23:50.931738 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1437 12:23:50.934757 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1438 12:23:50.941678 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1439 12:23:50.945134 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1440 12:23:50.951796 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1441 12:23:50.954879 LPC: Trying to open IO window from 800 size 1ff
1442 12:23:50.964879 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1443 12:23:50.971479 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1444 12:23:50.981608 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1445 12:23:50.985016 DOMAIN: 0000 assign_resources, bus 0 link: 0
1446 12:23:50.987940 Root Device assign_resources, bus 0 link: 0
1447 12:23:50.991426 Done setting resources.
1448 12:23:50.998245 Show resources in subtree (Root Device)...After assigning values.
1449 12:23:51.001701 Root Device child on link 0 DOMAIN: 0000
1450 12:23:51.008116 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1451 12:23:51.017725 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1452 12:23:51.024643 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1453 12:23:51.027875 PCI: 00:00.0
1454 12:23:51.038274 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1455 12:23:51.047742 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1456 12:23:51.057710 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1457 12:23:51.064254 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1458 12:23:51.074393 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1459 12:23:51.084361 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1460 12:23:51.094393 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1461 12:23:51.104226 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1462 12:23:51.114073 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1463 12:23:51.121002 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1464 12:23:51.130968 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1465 12:23:51.140802 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1466 12:23:51.150685 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1467 12:23:51.157291 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1468 12:23:51.167037 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1469 12:23:51.176898 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1470 12:23:51.187085 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1471 12:23:51.196861 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1472 12:23:51.206784 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1473 12:23:51.217061 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1474 12:23:51.217147 PCI: 00:02.0
1475 12:23:51.227328 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1476 12:23:51.240004 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1477 12:23:51.246907 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1478 12:23:51.253292 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1479 12:23:51.263568 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1480 12:23:51.263654 GENERIC: 0.0
1481 12:23:51.266977 PCI: 00:05.0
1482 12:23:51.277041 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1483 12:23:51.283255 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1484 12:23:51.283340 GENERIC: 0.0
1485 12:23:51.286839 PCI: 00:08.0
1486 12:23:51.296664 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1487 12:23:51.296744 PCI: 00:0a.0
1488 12:23:51.303168 PCI: 00:0d.0 child on link 0 USB0 port 0
1489 12:23:51.313461 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1490 12:23:51.316828 USB0 port 0 child on link 0 USB3 port 0
1491 12:23:51.319765 USB3 port 0
1492 12:23:51.319865 USB3 port 1
1493 12:23:51.323481 USB3 port 2
1494 12:23:51.323556 USB3 port 3
1495 12:23:51.326748 PCI: 00:14.0 child on link 0 USB0 port 0
1496 12:23:51.340219 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1497 12:23:51.343369 USB0 port 0 child on link 0 USB2 port 0
1498 12:23:51.343507 USB2 port 0
1499 12:23:51.346747 USB2 port 1
1500 12:23:51.346829 USB2 port 2
1501 12:23:51.350237 USB2 port 3
1502 12:23:51.353619 USB2 port 4
1503 12:23:51.353714 USB2 port 5
1504 12:23:51.356720 USB2 port 6
1505 12:23:51.356796 USB2 port 7
1506 12:23:51.360210 USB2 port 8
1507 12:23:51.360298 USB2 port 9
1508 12:23:51.363143 USB3 port 0
1509 12:23:51.363214 USB3 port 1
1510 12:23:51.366477 USB3 port 2
1511 12:23:51.366550 USB3 port 3
1512 12:23:51.369946 PCI: 00:14.2
1513 12:23:51.379864 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1514 12:23:51.389705 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1515 12:23:51.393212 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1516 12:23:51.406138 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1517 12:23:51.406257 GENERIC: 0.0
1518 12:23:51.409632 PCI: 00:15.0 child on link 0 I2C: 00:1a
1519 12:23:51.422722 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1520 12:23:51.422815 I2C: 00:1a
1521 12:23:51.422879 I2C: 00:31
1522 12:23:51.426286 I2C: 00:32
1523 12:23:51.429266 PCI: 00:15.1 child on link 0 I2C: 00:10
1524 12:23:51.439367 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1525 12:23:51.442769 I2C: 00:10
1526 12:23:51.442848 PCI: 00:15.2
1527 12:23:51.452557 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1528 12:23:51.456167 PCI: 00:15.3
1529 12:23:51.465805 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1530 12:23:51.469426 PCI: 00:16.0
1531 12:23:51.478934 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1532 12:23:51.479043 PCI: 00:19.0
1533 12:23:51.486102 PCI: 00:19.1 child on link 0 I2C: 00:15
1534 12:23:51.495386 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1535 12:23:51.495468 I2C: 00:15
1536 12:23:51.502252 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1537 12:23:51.509115 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1538 12:23:51.521963 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1539 12:23:51.532080 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1540 12:23:51.535633 GENERIC: 0.0
1541 12:23:51.535714 PCI: 01:00.0
1542 12:23:51.545166 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1543 12:23:51.554873 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1544 12:23:51.568190 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1545 12:23:51.568308 PCI: 00:1e.0
1546 12:23:51.578152 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1547 12:23:51.584893 PCI: 00:1e.2 child on link 0 SPI: 00
1548 12:23:51.595069 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1549 12:23:51.595188 SPI: 00
1550 12:23:51.598643 PCI: 00:1e.3 child on link 0 SPI: 00
1551 12:23:51.608343 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1552 12:23:51.611176 SPI: 00
1553 12:23:51.614567 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1554 12:23:51.624256 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1555 12:23:51.624341 PNP: 0c09.0
1556 12:23:51.634318 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1557 12:23:51.638032 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1558 12:23:51.647545 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1559 12:23:51.657883 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1560 12:23:51.660720 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1561 12:23:51.663856 GENERIC: 0.0
1562 12:23:51.663947 GENERIC: 1.0
1563 12:23:51.667452 PCI: 00:1f.3
1564 12:23:51.677565 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1565 12:23:51.687657 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1566 12:23:51.690608 PCI: 00:1f.5
1567 12:23:51.700701 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1568 12:23:51.703667 CPU_CLUSTER: 0 child on link 0 APIC: 00
1569 12:23:51.707158 APIC: 00
1570 12:23:51.707265 APIC: 01
1571 12:23:51.707357 APIC: 05
1572 12:23:51.710645 APIC: 06
1573 12:23:51.710757 APIC: 03
1574 12:23:51.710846 APIC: 02
1575 12:23:51.714056 APIC: 04
1576 12:23:51.714155 APIC: 07
1577 12:23:51.717547 Done allocating resources.
1578 12:23:51.724000 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1579 12:23:51.730650 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1580 12:23:51.733618 Configure GPIOs for I2S audio on UP4.
1581 12:23:51.740525 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1582 12:23:51.743981 Enabling resources...
1583 12:23:51.747085 PCI: 00:00.0 subsystem <- 8086/9a12
1584 12:23:51.750364 PCI: 00:00.0 cmd <- 06
1585 12:23:51.753691 PCI: 00:02.0 subsystem <- 8086/9a40
1586 12:23:51.753774 PCI: 00:02.0 cmd <- 03
1587 12:23:51.760617 PCI: 00:04.0 subsystem <- 8086/9a03
1588 12:23:51.760717 PCI: 00:04.0 cmd <- 02
1589 12:23:51.764067 PCI: 00:05.0 subsystem <- 8086/9a19
1590 12:23:51.767551 PCI: 00:05.0 cmd <- 02
1591 12:23:51.770391 PCI: 00:08.0 subsystem <- 8086/9a11
1592 12:23:51.774195 PCI: 00:08.0 cmd <- 06
1593 12:23:51.777108 PCI: 00:0d.0 subsystem <- 8086/9a13
1594 12:23:51.780808 PCI: 00:0d.0 cmd <- 02
1595 12:23:51.783803 PCI: 00:14.0 subsystem <- 8086/a0ed
1596 12:23:51.787102 PCI: 00:14.0 cmd <- 02
1597 12:23:51.790436 PCI: 00:14.2 subsystem <- 8086/a0ef
1598 12:23:51.794096 PCI: 00:14.2 cmd <- 02
1599 12:23:51.797032 PCI: 00:14.3 subsystem <- 8086/a0f0
1600 12:23:51.797108 PCI: 00:14.3 cmd <- 02
1601 12:23:51.803812 PCI: 00:15.0 subsystem <- 8086/a0e8
1602 12:23:51.803894 PCI: 00:15.0 cmd <- 02
1603 12:23:51.807131 PCI: 00:15.1 subsystem <- 8086/a0e9
1604 12:23:51.810659 PCI: 00:15.1 cmd <- 02
1605 12:23:51.813867 PCI: 00:15.2 subsystem <- 8086/a0ea
1606 12:23:51.817255 PCI: 00:15.2 cmd <- 02
1607 12:23:51.820509 PCI: 00:15.3 subsystem <- 8086/a0eb
1608 12:23:51.824010 PCI: 00:15.3 cmd <- 02
1609 12:23:51.827358 PCI: 00:16.0 subsystem <- 8086/a0e0
1610 12:23:51.830767 PCI: 00:16.0 cmd <- 02
1611 12:23:51.834218 PCI: 00:19.1 subsystem <- 8086/a0c6
1612 12:23:51.837124 PCI: 00:19.1 cmd <- 02
1613 12:23:51.840475 PCI: 00:1d.0 bridge ctrl <- 0013
1614 12:23:51.844080 PCI: 00:1d.0 subsystem <- 8086/a0b0
1615 12:23:51.844174 PCI: 00:1d.0 cmd <- 06
1616 12:23:51.852105 PCI: 00:1e.0 subsystem <- 8086/a0a8
1617 12:23:51.852211 PCI: 00:1e.0 cmd <- 06
1618 12:23:51.854435 PCI: 00:1e.2 subsystem <- 8086/a0aa
1619 12:23:51.857667 PCI: 00:1e.2 cmd <- 06
1620 12:23:51.861080 PCI: 00:1e.3 subsystem <- 8086/a0ab
1621 12:23:51.864122 PCI: 00:1e.3 cmd <- 02
1622 12:23:51.867783 PCI: 00:1f.0 subsystem <- 8086/a087
1623 12:23:51.870581 PCI: 00:1f.0 cmd <- 407
1624 12:23:51.874113 PCI: 00:1f.3 subsystem <- 8086/a0c8
1625 12:23:51.877656 PCI: 00:1f.3 cmd <- 02
1626 12:23:51.880667 PCI: 00:1f.5 subsystem <- 8086/a0a4
1627 12:23:51.884042 PCI: 00:1f.5 cmd <- 406
1628 12:23:51.887434 PCI: 01:00.0 cmd <- 02
1629 12:23:51.891553 done.
1630 12:23:51.894951 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1631 12:23:51.898240 Initializing devices...
1632 12:23:51.901841 Root Device init
1633 12:23:51.905355 Chrome EC: Set SMI mask to 0x0000000000000000
1634 12:23:51.911900 Chrome EC: clear events_b mask to 0x0000000000000000
1635 12:23:51.918175 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1636 12:23:51.921984 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1637 12:23:51.928561 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1638 12:23:51.935170 Chrome EC: Set WAKE mask to 0x0000000000000000
1639 12:23:51.938160 fw_config match found: DB_USB=USB3_ACTIVE
1640 12:23:51.945196 Configure Right Type-C port orientation for retimer
1641 12:23:51.948106 Root Device init finished in 43 msecs
1642 12:23:51.951811 PCI: 00:00.0 init
1643 12:23:51.955385 CPU TDP = 9 Watts
1644 12:23:51.955465 CPU PL1 = 9 Watts
1645 12:23:51.958205 CPU PL2 = 40 Watts
1646 12:23:51.958282 CPU PL4 = 83 Watts
1647 12:23:51.965114 PCI: 00:00.0 init finished in 8 msecs
1648 12:23:51.965199 PCI: 00:02.0 init
1649 12:23:51.968159 GMA: Found VBT in CBFS
1650 12:23:51.971657 GMA: Found valid VBT in CBFS
1651 12:23:51.978089 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1652 12:23:51.984558 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1653 12:23:51.987996 PCI: 00:02.0 init finished in 18 msecs
1654 12:23:51.991322 PCI: 00:05.0 init
1655 12:23:51.995003 PCI: 00:05.0 init finished in 0 msecs
1656 12:23:51.997983 PCI: 00:08.0 init
1657 12:23:52.001425 PCI: 00:08.0 init finished in 0 msecs
1658 12:23:52.004756 PCI: 00:14.0 init
1659 12:23:52.007784 PCI: 00:14.0 init finished in 0 msecs
1660 12:23:52.007872 PCI: 00:14.2 init
1661 12:23:52.014284 PCI: 00:14.2 init finished in 0 msecs
1662 12:23:52.014369 PCI: 00:15.0 init
1663 12:23:52.017882 I2C bus 0 version 0x3230302a
1664 12:23:52.020851 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1665 12:23:52.027391 PCI: 00:15.0 init finished in 6 msecs
1666 12:23:52.027479 PCI: 00:15.1 init
1667 12:23:52.030915 I2C bus 1 version 0x3230302a
1668 12:23:52.034238 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1669 12:23:52.037619 PCI: 00:15.1 init finished in 6 msecs
1670 12:23:52.041104 PCI: 00:15.2 init
1671 12:23:52.044581 I2C bus 2 version 0x3230302a
1672 12:23:52.047439 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1673 12:23:52.050609 PCI: 00:15.2 init finished in 6 msecs
1674 12:23:52.053920 PCI: 00:15.3 init
1675 12:23:52.057633 I2C bus 3 version 0x3230302a
1676 12:23:52.060650 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1677 12:23:52.063814 PCI: 00:15.3 init finished in 6 msecs
1678 12:23:52.067199 PCI: 00:16.0 init
1679 12:23:52.070645 PCI: 00:16.0 init finished in 0 msecs
1680 12:23:52.074214 PCI: 00:19.1 init
1681 12:23:52.074301 I2C bus 5 version 0x3230302a
1682 12:23:52.080684 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1683 12:23:52.084319 PCI: 00:19.1 init finished in 6 msecs
1684 12:23:52.084406 PCI: 00:1d.0 init
1685 12:23:52.086993 Initializing PCH PCIe bridge.
1686 12:23:52.090555 PCI: 00:1d.0 init finished in 3 msecs
1687 12:23:52.094979 PCI: 00:1f.0 init
1688 12:23:52.098456 IOAPIC: Initializing IOAPIC at 0xfec00000
1689 12:23:52.104700 IOAPIC: Bootstrap Processor Local APIC = 0x00
1690 12:23:52.104789 IOAPIC: ID = 0x02
1691 12:23:52.108101 IOAPIC: Dumping registers
1692 12:23:52.111771 reg 0x0000: 0x02000000
1693 12:23:52.114721 reg 0x0001: 0x00770020
1694 12:23:52.114812 reg 0x0002: 0x00000000
1695 12:23:52.121924 PCI: 00:1f.0 init finished in 21 msecs
1696 12:23:52.122012 PCI: 00:1f.2 init
1697 12:23:52.124900 Disabling ACPI via APMC.
1698 12:23:52.128467 APMC done.
1699 12:23:52.131842 PCI: 00:1f.2 init finished in 5 msecs
1700 12:23:52.143207 PCI: 01:00.0 init
1701 12:23:52.146718 PCI: 01:00.0 init finished in 0 msecs
1702 12:23:52.150293 PNP: 0c09.0 init
1703 12:23:52.153144 Google Chrome EC uptime: 8.403 seconds
1704 12:23:52.160046 Google Chrome AP resets since EC boot: 1
1705 12:23:52.163260 Google Chrome most recent AP reset causes:
1706 12:23:52.166653 0.347: 32775 shutdown: entering G3
1707 12:23:52.173227 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1708 12:23:52.176294 PNP: 0c09.0 init finished in 22 msecs
1709 12:23:52.182356 Devices initialized
1710 12:23:52.185677 Show all devs... After init.
1711 12:23:52.188996 Root Device: enabled 1
1712 12:23:52.189087 DOMAIN: 0000: enabled 1
1713 12:23:52.192299 CPU_CLUSTER: 0: enabled 1
1714 12:23:52.195240 PCI: 00:00.0: enabled 1
1715 12:23:52.198611 PCI: 00:02.0: enabled 1
1716 12:23:52.198723 PCI: 00:04.0: enabled 1
1717 12:23:52.201925 PCI: 00:05.0: enabled 1
1718 12:23:52.205410 PCI: 00:06.0: enabled 0
1719 12:23:52.208744 PCI: 00:07.0: enabled 0
1720 12:23:52.208831 PCI: 00:07.1: enabled 0
1721 12:23:52.211832 PCI: 00:07.2: enabled 0
1722 12:23:52.215320 PCI: 00:07.3: enabled 0
1723 12:23:52.218898 PCI: 00:08.0: enabled 1
1724 12:23:52.218991 PCI: 00:09.0: enabled 0
1725 12:23:52.221877 PCI: 00:0a.0: enabled 0
1726 12:23:52.225273 PCI: 00:0d.0: enabled 1
1727 12:23:52.228673 PCI: 00:0d.1: enabled 0
1728 12:23:52.228765 PCI: 00:0d.2: enabled 0
1729 12:23:52.231987 PCI: 00:0d.3: enabled 0
1730 12:23:52.235077 PCI: 00:0e.0: enabled 0
1731 12:23:52.235161 PCI: 00:10.2: enabled 1
1732 12:23:52.238469 PCI: 00:10.6: enabled 0
1733 12:23:52.241897 PCI: 00:10.7: enabled 0
1734 12:23:52.245300 PCI: 00:12.0: enabled 0
1735 12:23:52.245411 PCI: 00:12.6: enabled 0
1736 12:23:52.248550 PCI: 00:13.0: enabled 0
1737 12:23:52.252060 PCI: 00:14.0: enabled 1
1738 12:23:52.255392 PCI: 00:14.1: enabled 0
1739 12:23:52.255477 PCI: 00:14.2: enabled 1
1740 12:23:52.258969 PCI: 00:14.3: enabled 1
1741 12:23:52.261878 PCI: 00:15.0: enabled 1
1742 12:23:52.265229 PCI: 00:15.1: enabled 1
1743 12:23:52.265317 PCI: 00:15.2: enabled 1
1744 12:23:52.268572 PCI: 00:15.3: enabled 1
1745 12:23:52.271935 PCI: 00:16.0: enabled 1
1746 12:23:52.272021 PCI: 00:16.1: enabled 0
1747 12:23:52.275317 PCI: 00:16.2: enabled 0
1748 12:23:52.278738 PCI: 00:16.3: enabled 0
1749 12:23:52.282040 PCI: 00:16.4: enabled 0
1750 12:23:52.282135 PCI: 00:16.5: enabled 0
1751 12:23:52.284820 PCI: 00:17.0: enabled 0
1752 12:23:52.288220 PCI: 00:19.0: enabled 0
1753 12:23:52.291460 PCI: 00:19.1: enabled 1
1754 12:23:52.291562 PCI: 00:19.2: enabled 0
1755 12:23:52.295150 PCI: 00:1c.0: enabled 1
1756 12:23:52.298998 PCI: 00:1c.1: enabled 0
1757 12:23:52.301682 PCI: 00:1c.2: enabled 0
1758 12:23:52.301767 PCI: 00:1c.3: enabled 0
1759 12:23:52.305278 PCI: 00:1c.4: enabled 0
1760 12:23:52.308346 PCI: 00:1c.5: enabled 0
1761 12:23:52.308446 PCI: 00:1c.6: enabled 1
1762 12:23:52.311450 PCI: 00:1c.7: enabled 0
1763 12:23:52.315137 PCI: 00:1d.0: enabled 1
1764 12:23:52.317966 PCI: 00:1d.1: enabled 0
1765 12:23:52.318045 PCI: 00:1d.2: enabled 1
1766 12:23:52.321437 PCI: 00:1d.3: enabled 0
1767 12:23:52.324855 PCI: 00:1e.0: enabled 1
1768 12:23:52.328334 PCI: 00:1e.1: enabled 0
1769 12:23:52.328489 PCI: 00:1e.2: enabled 1
1770 12:23:52.331265 PCI: 00:1e.3: enabled 1
1771 12:23:52.334728 PCI: 00:1f.0: enabled 1
1772 12:23:52.338236 PCI: 00:1f.1: enabled 0
1773 12:23:52.338352 PCI: 00:1f.2: enabled 1
1774 12:23:52.341599 PCI: 00:1f.3: enabled 1
1775 12:23:52.345083 PCI: 00:1f.4: enabled 0
1776 12:23:52.347965 PCI: 00:1f.5: enabled 1
1777 12:23:52.348049 PCI: 00:1f.6: enabled 0
1778 12:23:52.351305 PCI: 00:1f.7: enabled 0
1779 12:23:52.354578 APIC: 00: enabled 1
1780 12:23:52.354662 GENERIC: 0.0: enabled 1
1781 12:23:52.357674 GENERIC: 0.0: enabled 1
1782 12:23:52.361138 GENERIC: 1.0: enabled 1
1783 12:23:52.364517 GENERIC: 0.0: enabled 1
1784 12:23:52.364602 GENERIC: 1.0: enabled 1
1785 12:23:52.368041 USB0 port 0: enabled 1
1786 12:23:52.371430 GENERIC: 0.0: enabled 1
1787 12:23:52.371516 USB0 port 0: enabled 1
1788 12:23:52.374658 GENERIC: 0.0: enabled 1
1789 12:23:52.377683 I2C: 00:1a: enabled 1
1790 12:23:52.381143 I2C: 00:31: enabled 1
1791 12:23:52.381227 I2C: 00:32: enabled 1
1792 12:23:52.384658 I2C: 00:10: enabled 1
1793 12:23:52.387943 I2C: 00:15: enabled 1
1794 12:23:52.388089 GENERIC: 0.0: enabled 0
1795 12:23:52.390864 GENERIC: 1.0: enabled 0
1796 12:23:52.394801 GENERIC: 0.0: enabled 1
1797 12:23:52.394883 SPI: 00: enabled 1
1798 12:23:52.397785 SPI: 00: enabled 1
1799 12:23:52.401251 PNP: 0c09.0: enabled 1
1800 12:23:52.401333 GENERIC: 0.0: enabled 1
1801 12:23:52.404423 USB3 port 0: enabled 1
1802 12:23:52.407921 USB3 port 1: enabled 1
1803 12:23:52.410778 USB3 port 2: enabled 0
1804 12:23:52.410865 USB3 port 3: enabled 0
1805 12:23:52.414624 USB2 port 0: enabled 0
1806 12:23:52.417763 USB2 port 1: enabled 1
1807 12:23:52.417868 USB2 port 2: enabled 1
1808 12:23:52.420913 USB2 port 3: enabled 0
1809 12:23:52.424272 USB2 port 4: enabled 1
1810 12:23:52.427475 USB2 port 5: enabled 0
1811 12:23:52.427576 USB2 port 6: enabled 0
1812 12:23:52.430810 USB2 port 7: enabled 0
1813 12:23:52.434403 USB2 port 8: enabled 0
1814 12:23:52.434502 USB2 port 9: enabled 0
1815 12:23:52.437642 USB3 port 0: enabled 0
1816 12:23:52.440852 USB3 port 1: enabled 1
1817 12:23:52.440967 USB3 port 2: enabled 0
1818 12:23:52.443865 USB3 port 3: enabled 0
1819 12:23:52.447782 GENERIC: 0.0: enabled 1
1820 12:23:52.451307 GENERIC: 1.0: enabled 1
1821 12:23:52.451390 APIC: 01: enabled 1
1822 12:23:52.454075 APIC: 05: enabled 1
1823 12:23:52.454158 APIC: 06: enabled 1
1824 12:23:52.457568 APIC: 03: enabled 1
1825 12:23:52.460734 APIC: 02: enabled 1
1826 12:23:52.460816 APIC: 04: enabled 1
1827 12:23:52.464174 APIC: 07: enabled 1
1828 12:23:52.467614 PCI: 01:00.0: enabled 1
1829 12:23:52.471020 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1830 12:23:52.477740 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1831 12:23:52.480673 ELOG: NV offset 0xf30000 size 0x1000
1832 12:23:52.487376 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1833 12:23:52.494324 ELOG: Event(17) added with size 13 at 2023-11-08 12:23:51 UTC
1834 12:23:52.500710 ELOG: Event(92) added with size 9 at 2023-11-08 12:23:51 UTC
1835 12:23:52.507412 ELOG: Event(93) added with size 9 at 2023-11-08 12:23:51 UTC
1836 12:23:52.514357 ELOG: Event(9E) added with size 10 at 2023-11-08 12:23:51 UTC
1837 12:23:52.520729 ELOG: Event(9F) added with size 14 at 2023-11-08 12:23:51 UTC
1838 12:23:52.527201 ELOG: Event(16) added with size 11 at 2023-11-08 12:23:51 UTC
1839 12:23:52.530569 Erasing flash addr f30000 + 4 KiB
1840 12:23:52.585890 BS: BS_DEV_INIT exit times (exec / console): 30 / 55 ms
1841 12:23:52.592014 ELOG: Event(A1) added with size 10 at 2023-11-08 12:23:51 UTC
1842 12:23:52.598950 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1843 12:23:52.605394 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1844 12:23:52.605477 Finalize devices...
1845 12:23:52.608877 Devices finalized
1846 12:23:52.615189 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1847 12:23:52.618747 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1848 12:23:52.625099 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1849 12:23:52.628497 ME: HFSTS1 : 0x80030055
1850 12:23:52.635282 ME: HFSTS2 : 0x30280116
1851 12:23:52.638656 ME: HFSTS3 : 0x00000050
1852 12:23:52.641875 ME: HFSTS4 : 0x00004000
1853 12:23:52.648283 ME: HFSTS5 : 0x00000000
1854 12:23:52.651641 ME: HFSTS6 : 0x00400006
1855 12:23:52.655153 ME: Manufacturing Mode : YES
1856 12:23:52.657955 ME: SPI Protection Mode Enabled : NO
1857 12:23:52.661419 ME: FW Partition Table : OK
1858 12:23:52.668319 ME: Bringup Loader Failure : NO
1859 12:23:52.671456 ME: Firmware Init Complete : NO
1860 12:23:52.674916 ME: Boot Options Present : NO
1861 12:23:52.678374 ME: Update In Progress : NO
1862 12:23:52.681113 ME: D0i3 Support : YES
1863 12:23:52.684615 ME: Low Power State Enabled : NO
1864 12:23:52.687984 ME: CPU Replaced : YES
1865 12:23:52.691315 ME: CPU Replacement Valid : YES
1866 12:23:52.698141 ME: Current Working State : 5
1867 12:23:52.701148 ME: Current Operation State : 1
1868 12:23:52.704540 ME: Current Operation Mode : 3
1869 12:23:52.708077 ME: Error Code : 0
1870 12:23:52.711607 ME: Enhanced Debug Mode : NO
1871 12:23:52.714677 ME: CPU Debug Disabled : YES
1872 12:23:52.717699 ME: TXT Support : NO
1873 12:23:52.724707 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1874 12:23:52.730953 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1875 12:23:52.734372 CBFS: 'fallback/slic' not found.
1876 12:23:52.740840 ACPI: Writing ACPI tables at 76b01000.
1877 12:23:52.740917 ACPI: * FACS
1878 12:23:52.744104 ACPI: * DSDT
1879 12:23:52.747429 Ramoops buffer: 0x100000@0x76a00000.
1880 12:23:52.750907 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1881 12:23:52.757644 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1882 12:23:52.761013 Google Chrome EC: version:
1883 12:23:52.763899 ro: voema_v2.0.7540-147f8d37d1
1884 12:23:52.767355 rw: voema_v2.0.7540-147f8d37d1
1885 12:23:52.767430 running image: 2
1886 12:23:52.773987 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1887 12:23:52.778561 ACPI: * FADT
1888 12:23:52.778644 SCI is IRQ9
1889 12:23:52.785368 ACPI: added table 1/32, length now 40
1890 12:23:52.785451 ACPI: * SSDT
1891 12:23:52.788410 Found 1 CPU(s) with 8 core(s) each.
1892 12:23:52.795336 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1893 12:23:52.798496 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1894 12:23:52.801717 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1895 12:23:52.805150 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1896 12:23:52.811666 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1897 12:23:52.818581 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1898 12:23:52.821857 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1899 12:23:52.828245 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1900 12:23:52.835042 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1901 12:23:52.838232 \_SB.PCI0.RP09: Added StorageD3Enable property
1902 12:23:52.841612 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1903 12:23:52.848309 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1904 12:23:52.854800 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1905 12:23:52.858106 PS2K: Passing 80 keymaps to kernel
1906 12:23:52.864548 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1907 12:23:52.871325 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1908 12:23:52.878235 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1909 12:23:52.884450 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1910 12:23:52.891509 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1911 12:23:52.897772 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1912 12:23:52.904805 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1913 12:23:52.910956 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1914 12:23:52.914912 ACPI: added table 2/32, length now 44
1915 12:23:52.914997 ACPI: * MCFG
1916 12:23:52.918099 ACPI: added table 3/32, length now 48
1917 12:23:52.921408 ACPI: * TPM2
1918 12:23:52.924448 TPM2 log created at 0x769f0000
1919 12:23:52.928088 ACPI: added table 4/32, length now 52
1920 12:23:52.931242 ACPI: * MADT
1921 12:23:52.931324 SCI is IRQ9
1922 12:23:52.934459 ACPI: added table 5/32, length now 56
1923 12:23:52.937628 current = 76b09850
1924 12:23:52.937776 ACPI: * DMAR
1925 12:23:52.940984 ACPI: added table 6/32, length now 60
1926 12:23:52.944475 ACPI: added table 7/32, length now 64
1927 12:23:52.948085 ACPI: * HPET
1928 12:23:52.950801 ACPI: added table 8/32, length now 68
1929 12:23:52.954290 ACPI: done.
1930 12:23:52.954413 ACPI tables: 35216 bytes.
1931 12:23:52.957665 smbios_write_tables: 769ef000
1932 12:23:52.961080 EC returned error result code 3
1933 12:23:52.964609 Couldn't obtain OEM name from CBI
1934 12:23:52.968396 Create SMBIOS type 16
1935 12:23:52.971562 Create SMBIOS type 17
1936 12:23:52.974857 GENERIC: 0.0 (WIFI Device)
1937 12:23:52.974974 SMBIOS tables: 1750 bytes.
1938 12:23:52.981852 Writing table forward entry at 0x00000500
1939 12:23:52.988209 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1940 12:23:52.991489 Writing coreboot table at 0x76b25000
1941 12:23:52.998082 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1942 12:23:53.001725 1. 0000000000001000-000000000009ffff: RAM
1943 12:23:53.005192 2. 00000000000a0000-00000000000fffff: RESERVED
1944 12:23:53.011611 3. 0000000000100000-00000000769eefff: RAM
1945 12:23:53.014951 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1946 12:23:53.021731 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1947 12:23:53.028293 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1948 12:23:53.031637 7. 0000000077000000-000000007fbfffff: RESERVED
1949 12:23:53.034466 8. 00000000c0000000-00000000cfffffff: RESERVED
1950 12:23:53.041180 9. 00000000f8000000-00000000f9ffffff: RESERVED
1951 12:23:53.044590 10. 00000000fb000000-00000000fb000fff: RESERVED
1952 12:23:53.051132 11. 00000000fe000000-00000000fe00ffff: RESERVED
1953 12:23:53.054922 12. 00000000fed80000-00000000fed87fff: RESERVED
1954 12:23:53.061511 13. 00000000fed90000-00000000fed92fff: RESERVED
1955 12:23:53.064459 14. 00000000feda0000-00000000feda1fff: RESERVED
1956 12:23:53.071497 15. 00000000fedc0000-00000000feddffff: RESERVED
1957 12:23:53.074390 16. 0000000100000000-00000002803fffff: RAM
1958 12:23:53.077824 Passing 4 GPIOs to payload:
1959 12:23:53.081375 NAME | PORT | POLARITY | VALUE
1960 12:23:53.087722 lid | undefined | high | high
1961 12:23:53.091328 power | undefined | high | low
1962 12:23:53.097595 oprom | undefined | high | low
1963 12:23:53.104680 EC in RW | 0x000000e5 | high | high
1964 12:23:53.110686 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 1656
1965 12:23:53.110801 coreboot table: 1576 bytes.
1966 12:23:53.117776 IMD ROOT 0. 0x76fff000 0x00001000
1967 12:23:53.120980 IMD SMALL 1. 0x76ffe000 0x00001000
1968 12:23:53.124309 FSP MEMORY 2. 0x76c4e000 0x003b0000
1969 12:23:53.127793 VPD 3. 0x76c4d000 0x00000367
1970 12:23:53.131290 RO MCACHE 4. 0x76c4c000 0x00000fdc
1971 12:23:53.134322 CONSOLE 5. 0x76c2c000 0x00020000
1972 12:23:53.137824 FMAP 6. 0x76c2b000 0x00000578
1973 12:23:53.141148 TIME STAMP 7. 0x76c2a000 0x00000910
1974 12:23:53.147754 VBOOT WORK 8. 0x76c16000 0x00014000
1975 12:23:53.151167 ROMSTG STCK 9. 0x76c15000 0x00001000
1976 12:23:53.154488 AFTER CAR 10. 0x76c0a000 0x0000b000
1977 12:23:53.157593 RAMSTAGE 11. 0x76b97000 0x00073000
1978 12:23:53.160911 REFCODE 12. 0x76b42000 0x00055000
1979 12:23:53.164285 SMM BACKUP 13. 0x76b32000 0x00010000
1980 12:23:53.167865 4f444749 14. 0x76b30000 0x00002000
1981 12:23:53.170834 EXT VBT15. 0x76b2d000 0x0000219f
1982 12:23:53.174376 COREBOOT 16. 0x76b25000 0x00008000
1983 12:23:53.180527 ACPI 17. 0x76b01000 0x00024000
1984 12:23:53.183975 ACPI GNVS 18. 0x76b00000 0x00001000
1985 12:23:53.187265 RAMOOPS 19. 0x76a00000 0x00100000
1986 12:23:53.190543 TPM2 TCGLOG20. 0x769f0000 0x00010000
1987 12:23:53.194064 SMBIOS 21. 0x769ef000 0x00000800
1988 12:23:53.197445 IMD small region:
1989 12:23:53.200908 IMD ROOT 0. 0x76ffec00 0x00000400
1990 12:23:53.204313 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1991 12:23:53.207701 POWER STATE 2. 0x76ffeb80 0x00000044
1992 12:23:53.210601 ROMSTAGE 3. 0x76ffeb60 0x00000004
1993 12:23:53.213911 MEM INFO 4. 0x76ffe980 0x000001e0
1994 12:23:53.220824 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1995 12:23:53.223784 MTRR: Physical address space:
1996 12:23:53.230574 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1997 12:23:53.237119 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1998 12:23:53.243689 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1999 12:23:53.250358 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2000 12:23:53.257359 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2001 12:23:53.260573 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2002 12:23:53.267352 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2003 12:23:53.273885 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 12:23:53.277549 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 12:23:53.280386 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 12:23:53.283633 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 12:23:53.286947 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 12:23:53.293836 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 12:23:53.297097 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 12:23:53.300380 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 12:23:53.303750 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 12:23:53.310183 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 12:23:53.313961 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 12:23:53.316841 call enable_fixed_mtrr()
2015 12:23:53.320422 CPU physical address size: 39 bits
2016 12:23:53.323862 MTRR: default type WB/UC MTRR counts: 6/6.
2017 12:23:53.326854 MTRR: UC selected as default type.
2018 12:23:53.333835 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2019 12:23:53.340356 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2020 12:23:53.347213 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2021 12:23:53.353432 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2022 12:23:53.360160 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2023 12:23:53.366781 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2024 12:23:53.370114 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 12:23:53.376869 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 12:23:53.380185 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 12:23:53.383836 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 12:23:53.386608 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 12:23:53.393335 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 12:23:53.397033 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 12:23:53.399974 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 12:23:53.403221 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 12:23:53.406444 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 12:23:53.413573 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 12:23:53.413659
2036 12:23:53.413726 MTRR check
2037 12:23:53.416818 call enable_fixed_mtrr()
2038 12:23:53.420196 Fixed MTRRs : Enabled
2039 12:23:53.423767 Variable MTRRs: Enabled
2040 12:23:53.423844
2041 12:23:53.426490 CPU physical address size: 39 bits
2042 12:23:53.433443 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
2043 12:23:53.436382 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 12:23:53.439945 MTRR: Fixed MSR 0x250 0x0606060606060606
2045 12:23:53.446447 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 12:23:53.449905 MTRR: Fixed MSR 0x259 0x0000000000000000
2047 12:23:53.453261 MTRR: Fixed MSR 0x268 0x0606060606060606
2048 12:23:53.456748 MTRR: Fixed MSR 0x269 0x0606060606060606
2049 12:23:53.463242 MTRR: Fixed MSR 0x26a 0x0606060606060606
2050 12:23:53.466456 MTRR: Fixed MSR 0x26b 0x0606060606060606
2051 12:23:53.469822 MTRR: Fixed MSR 0x26c 0x0606060606060606
2052 12:23:53.473015 MTRR: Fixed MSR 0x26d 0x0606060606060606
2053 12:23:53.480067 MTRR: Fixed MSR 0x26e 0x0606060606060606
2054 12:23:53.482816 MTRR: Fixed MSR 0x26f 0x0606060606060606
2055 12:23:53.486159 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 12:23:53.489560 call enable_fixed_mtrr()
2057 12:23:53.493103 MTRR: Fixed MSR 0x259 0x0000000000000000
2058 12:23:53.499783 MTRR: Fixed MSR 0x268 0x0606060606060606
2059 12:23:53.502703 MTRR: Fixed MSR 0x269 0x0606060606060606
2060 12:23:53.505898 MTRR: Fixed MSR 0x26a 0x0606060606060606
2061 12:23:53.509332 MTRR: Fixed MSR 0x26b 0x0606060606060606
2062 12:23:53.513003 MTRR: Fixed MSR 0x26c 0x0606060606060606
2063 12:23:53.519376 MTRR: Fixed MSR 0x26d 0x0606060606060606
2064 12:23:53.522586 MTRR: Fixed MSR 0x26e 0x0606060606060606
2065 12:23:53.525947 MTRR: Fixed MSR 0x26f 0x0606060606060606
2066 12:23:53.530098 CPU physical address size: 39 bits
2067 12:23:53.536349 call enable_fixed_mtrr()
2068 12:23:53.541730 Checking cr50 for pending updates
2069 12:23:53.541815 MTRR: Fixed MSR 0x250 0x0606060606060606
2070 12:23:53.548486 MTRR: Fixed MSR 0x250 0x0606060606060606
2071 12:23:53.551372 MTRR: Fixed MSR 0x258 0x0606060606060606
2072 12:23:53.554796 MTRR: Fixed MSR 0x259 0x0000000000000000
2073 12:23:53.558140 MTRR: Fixed MSR 0x268 0x0606060606060606
2074 12:23:53.561355 MTRR: Fixed MSR 0x269 0x0606060606060606
2075 12:23:53.568189 MTRR: Fixed MSR 0x26a 0x0606060606060606
2076 12:23:53.571156 MTRR: Fixed MSR 0x26b 0x0606060606060606
2077 12:23:53.574470 MTRR: Fixed MSR 0x26c 0x0606060606060606
2078 12:23:53.577865 MTRR: Fixed MSR 0x26d 0x0606060606060606
2079 12:23:53.584804 MTRR: Fixed MSR 0x26e 0x0606060606060606
2080 12:23:53.588277 MTRR: Fixed MSR 0x26f 0x0606060606060606
2081 12:23:53.591080 MTRR: Fixed MSR 0x258 0x0606060606060606
2082 12:23:53.597879 MTRR: Fixed MSR 0x259 0x0000000000000000
2083 12:23:53.601109 MTRR: Fixed MSR 0x268 0x0606060606060606
2084 12:23:53.604672 MTRR: Fixed MSR 0x269 0x0606060606060606
2085 12:23:53.608058 MTRR: Fixed MSR 0x26a 0x0606060606060606
2086 12:23:53.614521 MTRR: Fixed MSR 0x26b 0x0606060606060606
2087 12:23:53.617839 MTRR: Fixed MSR 0x26c 0x0606060606060606
2088 12:23:53.620999 MTRR: Fixed MSR 0x26d 0x0606060606060606
2089 12:23:53.624455 MTRR: Fixed MSR 0x26e 0x0606060606060606
2090 12:23:53.631141 MTRR: Fixed MSR 0x26f 0x0606060606060606
2091 12:23:53.634466 call enable_fixed_mtrr()
2092 12:23:53.634539 call enable_fixed_mtrr()
2093 12:23:53.637946 Reading cr50 TPM mode
2094 12:23:53.641432 MTRR: Fixed MSR 0x250 0x0606060606060606
2095 12:23:53.644944 MTRR: Fixed MSR 0x250 0x0606060606060606
2096 12:23:53.651477 MTRR: Fixed MSR 0x258 0x0606060606060606
2097 12:23:53.654961 MTRR: Fixed MSR 0x259 0x0000000000000000
2098 12:23:53.658524 MTRR: Fixed MSR 0x268 0x0606060606060606
2099 12:23:53.661716 MTRR: Fixed MSR 0x269 0x0606060606060606
2100 12:23:53.668158 MTRR: Fixed MSR 0x26a 0x0606060606060606
2101 12:23:53.671660 MTRR: Fixed MSR 0x26b 0x0606060606060606
2102 12:23:53.674705 MTRR: Fixed MSR 0x26c 0x0606060606060606
2103 12:23:53.678180 MTRR: Fixed MSR 0x26d 0x0606060606060606
2104 12:23:53.681631 MTRR: Fixed MSR 0x26e 0x0606060606060606
2105 12:23:53.687881 MTRR: Fixed MSR 0x26f 0x0606060606060606
2106 12:23:53.691549 MTRR: Fixed MSR 0x258 0x0606060606060606
2107 12:23:53.694844 call enable_fixed_mtrr()
2108 12:23:53.698134 MTRR: Fixed MSR 0x259 0x0000000000000000
2109 12:23:53.701379 MTRR: Fixed MSR 0x268 0x0606060606060606
2110 12:23:53.708090 MTRR: Fixed MSR 0x269 0x0606060606060606
2111 12:23:53.711758 MTRR: Fixed MSR 0x26a 0x0606060606060606
2112 12:23:53.714464 MTRR: Fixed MSR 0x26b 0x0606060606060606
2113 12:23:53.717923 MTRR: Fixed MSR 0x26c 0x0606060606060606
2114 12:23:53.724320 MTRR: Fixed MSR 0x26d 0x0606060606060606
2115 12:23:53.727707 MTRR: Fixed MSR 0x26e 0x0606060606060606
2116 12:23:53.731229 MTRR: Fixed MSR 0x26f 0x0606060606060606
2117 12:23:53.734726 CPU physical address size: 39 bits
2118 12:23:53.741349 call enable_fixed_mtrr()
2119 12:23:53.744545 CPU physical address size: 39 bits
2120 12:23:53.747716 CPU physical address size: 39 bits
2121 12:23:53.751071 CPU physical address size: 39 bits
2122 12:23:53.754585 CPU physical address size: 39 bits
2123 12:23:53.761390 BS: BS_PAYLOAD_LOAD entry times (exec / console): 204 / 6 ms
2124 12:23:53.767646 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2125 12:23:53.774685 Checking segment from ROM address 0xffc02b38
2126 12:23:53.777983 Checking segment from ROM address 0xffc02b54
2127 12:23:53.781019 Loading segment from ROM address 0xffc02b38
2128 12:23:53.784576 code (compression=0)
2129 12:23:53.794246 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2130 12:23:53.801440 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2131 12:23:53.804264 it's not compressed!
2132 12:23:53.942812 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2133 12:23:53.949258 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2134 12:23:53.956106 Loading segment from ROM address 0xffc02b54
2135 12:23:53.956256 Entry Point 0x30000000
2136 12:23:53.959551 Loaded segments
2137 12:23:53.965592 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2138 12:23:54.008920 Finalizing chipset.
2139 12:23:54.012106 Finalizing SMM.
2140 12:23:54.012252 APMC done.
2141 12:23:54.018584 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2142 12:23:54.022103 mp_park_aps done after 0 msecs.
2143 12:23:54.025502 Jumping to boot code at 0x30000000(0x76b25000)
2144 12:23:54.035216 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2145 12:23:54.035300
2146 12:23:54.035365
2147 12:23:54.035424
2148 12:23:54.038775 Starting depthcharge on Voema...
2149 12:23:54.038852
2150 12:23:54.039199 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2151 12:23:54.039303 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2152 12:23:54.039385 Setting prompt string to ['volteer:']
2153 12:23:54.039464 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2154 12:23:54.048537 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2155 12:23:54.048623
2156 12:23:54.055366 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2157 12:23:54.055442
2158 12:23:54.058398 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2159 12:23:54.061989
2160 12:23:54.065313 Failed to find eMMC card reader
2161 12:23:54.065386
2162 12:23:54.065446 Wipe memory regions:
2163 12:23:54.065523
2164 12:23:54.071897 [0x00000000001000, 0x000000000a0000)
2165 12:23:54.071969
2166 12:23:54.075160 [0x00000000100000, 0x00000030000000)
2167 12:23:54.100184
2168 12:23:54.103266 [0x00000032662db0, 0x000000769ef000)
2169 12:23:54.139148
2170 12:23:54.142229 [0x00000100000000, 0x00000280400000)
2171 12:23:54.345040
2172 12:23:54.348591 ec_init: CrosEC protocol v3 supported (256, 256)
2173 12:23:54.348683
2174 12:23:54.354689 update_port_state: port C0 state: usb enable 1 mux conn 0
2175 12:23:54.354765
2176 12:23:54.364848 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2177 12:23:54.364934
2178 12:23:54.371400 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2179 12:23:54.371478
2180 12:23:54.374961 send_conn_disc_msg: pmc_send_cmd succeeded
2181 12:23:54.807967
2182 12:23:54.808127 R8152: Initializing
2183 12:23:54.808233
2184 12:23:54.811260 Version 6 (ocp_data = 5c30)
2185 12:23:54.811334
2186 12:23:54.814483 R8152: Done initializing
2187 12:23:54.814558
2188 12:23:54.817978 Adding net device
2189 12:23:55.119805
2190 12:23:55.123166 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2191 12:23:55.123256
2192 12:23:55.123331
2193 12:23:55.123421
2194 12:23:55.126338 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2196 12:23:55.226766 volteer: tftpboot 192.168.201.1 11967691/tftp-deploy-j6rlaj9j/kernel/bzImage 11967691/tftp-deploy-j6rlaj9j/kernel/cmdline 11967691/tftp-deploy-j6rlaj9j/ramdisk/ramdisk.cpio.gz
2197 12:23:55.226912 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2198 12:23:55.227038 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2199 12:23:55.231551 tftpboot 192.168.201.1 11967691/tftp-deploy-j6rlaj9j/kernel/bzIploy-j6rlaj9j/kernel/cmdline 11967691/tftp-deploy-j6rlaj9j/ramdisk/ramdisk.cpio.gz
2200 12:23:55.231651
2201 12:23:55.231745 Waiting for link
2202 12:23:55.434438
2203 12:23:55.434571 done.
2204 12:23:55.434638
2205 12:23:55.434700 MAC: 00:24:32:30:7c:e4
2206 12:23:55.434760
2207 12:23:55.438349 Sending DHCP discover... done.
2208 12:23:55.438427
2209 12:23:55.441144 Waiting for reply... done.
2210 12:23:55.441217
2211 12:23:55.444668 Sending DHCP request... done.
2212 12:23:55.444748
2213 12:23:55.448157 Waiting for reply... done.
2214 12:23:55.448237
2215 12:23:55.450985 My ip is 192.168.201.23
2216 12:23:55.451058
2217 12:23:55.454678 The DHCP server ip is 192.168.201.1
2218 12:23:55.454750
2219 12:23:55.460879 TFTP server IP predefined by user: 192.168.201.1
2220 12:23:55.460960
2221 12:23:55.468136 Bootfile predefined by user: 11967691/tftp-deploy-j6rlaj9j/kernel/bzImage
2222 12:23:55.468248
2223 12:23:55.471014 Sending tftp read request... done.
2224 12:23:55.471088
2225 12:23:55.474554 Waiting for the transfer...
2226 12:23:55.474630
2227 12:23:55.998844 00000000 ################################################################
2228 12:23:55.998976
2229 12:23:56.523651 00080000 ################################################################
2230 12:23:56.523826
2231 12:23:57.043770 00100000 ################################################################
2232 12:23:57.043918
2233 12:23:57.562463 00180000 ################################################################
2234 12:23:57.562597
2235 12:23:58.089519 00200000 ################################################################
2236 12:23:58.089672
2237 12:23:58.615489 00280000 ################################################################
2238 12:23:58.615623
2239 12:23:59.158023 00300000 ################################################################
2240 12:23:59.158199
2241 12:23:59.693744 00380000 ################################################################
2242 12:23:59.693885
2243 12:24:00.217638 00400000 ################################################################
2244 12:24:00.217807
2245 12:24:00.748129 00480000 ################################################################
2246 12:24:00.748309
2247 12:24:01.277251 00500000 ################################################################
2248 12:24:01.277427
2249 12:24:01.819347 00580000 ################################################################
2250 12:24:01.819560
2251 12:24:02.344048 00600000 ################################################################
2252 12:24:02.344252
2253 12:24:02.861551 00680000 ################################################################
2254 12:24:02.861693
2255 12:24:03.385599 00700000 ################################################################
2256 12:24:03.385748
2257 12:24:03.904982 00780000 ################################################################
2258 12:24:03.905153
2259 12:24:04.426418 00800000 ################################################################
2260 12:24:04.426589
2261 12:24:04.951854 00880000 ################################################################
2262 12:24:04.952038
2263 12:24:05.484053 00900000 ################################################################
2264 12:24:05.484274
2265 12:24:06.005528 00980000 ################################################################
2266 12:24:06.005678
2267 12:24:06.525372 00a00000 ################################################################
2268 12:24:06.525509
2269 12:24:07.047437 00a80000 ################################################################
2270 12:24:07.047598
2271 12:24:07.084975 00b00000 ##### done.
2272 12:24:07.085086
2273 12:24:07.088183 The bootfile was 11571200 bytes long.
2274 12:24:07.088280
2275 12:24:07.091437 Sending tftp read request... done.
2276 12:24:07.091550
2277 12:24:07.094901 Waiting for the transfer...
2278 12:24:07.094988
2279 12:24:07.613826 00000000 ################################################################
2280 12:24:07.613963
2281 12:24:08.135081 00080000 ################################################################
2282 12:24:08.135224
2283 12:24:08.683672 00100000 ################################################################
2284 12:24:08.683806
2285 12:24:09.228178 00180000 ################################################################
2286 12:24:09.228350
2287 12:24:09.772218 00200000 ################################################################
2288 12:24:09.772368
2289 12:24:10.303777 00280000 ################################################################
2290 12:24:10.303940
2291 12:24:10.839846 00300000 ################################################################
2292 12:24:10.839984
2293 12:24:11.375343 00380000 ################################################################
2294 12:24:11.375489
2295 12:24:11.923104 00400000 ################################################################
2296 12:24:11.923273
2297 12:24:12.459111 00480000 ################################################################
2298 12:24:12.459244
2299 12:24:13.003549 00500000 ################################################################
2300 12:24:13.003681
2301 12:24:13.539911 00580000 ################################################################
2302 12:24:13.540070
2303 12:24:14.060870 00600000 ################################################################
2304 12:24:14.061001
2305 12:24:14.101903 00680000 ###### done.
2306 12:24:14.102021
2307 12:24:14.105310 Sending tftp read request... done.
2308 12:24:14.105399
2309 12:24:14.109014 Waiting for the transfer...
2310 12:24:14.109115
2311 12:24:14.109183 00000000 # done.
2312 12:24:14.109246
2313 12:24:14.118569 Command line loaded dynamically from TFTP file: 11967691/tftp-deploy-j6rlaj9j/kernel/cmdline
2314 12:24:14.118673
2315 12:24:14.141464 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11967691/extract-nfsrootfs-q_m79uwl,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2316 12:24:14.148566
2317 12:24:14.151427 Shutting down all USB controllers.
2318 12:24:14.151508
2319 12:24:14.151573 Removing current net device
2320 12:24:14.151635
2321 12:24:14.155061 Finalizing coreboot
2322 12:24:14.155141
2323 12:24:14.161618 Exiting depthcharge with code 4 at timestamp: 28820678
2324 12:24:14.161700
2325 12:24:14.161765
2326 12:24:14.161826 Starting kernel ...
2327 12:24:14.161885
2328 12:24:14.161943
2329 12:24:14.162317 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2330 12:24:14.162414 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2331 12:24:14.162490 Setting prompt string to ['Linux version [0-9]']
2332 12:24:14.162560 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2333 12:24:14.162630 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2335 12:28:38.163551 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2337 12:28:38.164771 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2339 12:28:38.165622 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2342 12:28:38.167118 end: 2 depthcharge-action (duration 00:05:00) [common]
2344 12:28:38.167804 Cleaning after the job
2345 12:28:38.167890 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967691/tftp-deploy-j6rlaj9j/ramdisk
2346 12:28:38.168956 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967691/tftp-deploy-j6rlaj9j/kernel
2347 12:28:38.170699 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967691/tftp-deploy-j6rlaj9j/nfsrootfs
2348 12:28:38.264277 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967691/tftp-deploy-j6rlaj9j/modules
2349 12:28:38.265242 start: 4.1 power-off (timeout 00:00:30) [common]
2350 12:28:38.265414 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
2351 12:28:38.344126 >> Command sent successfully.
2352 12:28:38.348886 Returned 0 in 0 seconds
2353 12:28:38.449453 end: 4.1 power-off (duration 00:00:00) [common]
2355 12:28:38.449795 start: 4.2 read-feedback (timeout 00:10:00) [common]
2356 12:28:38.450062 Listened to connection for namespace 'common' for up to 1s
2357 12:28:39.451335 Finalising connection for namespace 'common'
2358 12:28:39.452031 Disconnecting from shell: Finalise
2359 12:28:39.452518
2360 12:28:39.553589 end: 4.2 read-feedback (duration 00:00:01) [common]
2361 12:28:39.554270 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11967691
2362 12:28:40.145134 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11967691
2363 12:28:40.145333 JobError: Your job cannot terminate cleanly.