Boot log: asus-C436FA-Flip-hatch

    1 12:23:05.646295  lava-dispatcher, installed at version: 2023.10
    2 12:23:05.646518  start: 0 validate
    3 12:23:05.646650  Start time: 2023-11-08 12:23:05.646643+00:00 (UTC)
    4 12:23:05.646770  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:23:05.646897  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:23:05.918288  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:23:05.918953  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:23:05.923865  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:23:05.924467  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:23:06.192284  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:23:06.192545  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:23:06.196052  validate duration: 0.55
   14 12:23:06.196423  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:23:06.196572  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:23:06.196710  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:23:06.196884  Not decompressing ramdisk as can be used compressed.
   18 12:23:06.197021  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
   19 12:23:06.197120  saving as /var/lib/lava/dispatcher/tmp/11967649/tftp-deploy-59_fvudr/ramdisk/initrd.cpio.gz
   20 12:23:06.197237  total size: 5432480 (5 MB)
   21 12:23:06.198720  progress   0 % (0 MB)
   22 12:23:06.201196  progress   5 % (0 MB)
   23 12:23:06.203474  progress  10 % (0 MB)
   24 12:23:06.205807  progress  15 % (0 MB)
   25 12:23:06.208428  progress  20 % (1 MB)
   26 12:23:06.210727  progress  25 % (1 MB)
   27 12:23:06.213037  progress  30 % (1 MB)
   28 12:23:06.215602  progress  35 % (1 MB)
   29 12:23:06.217947  progress  40 % (2 MB)
   30 12:23:06.220227  progress  45 % (2 MB)
   31 12:23:06.222547  progress  50 % (2 MB)
   32 12:23:06.224931  progress  55 % (2 MB)
   33 12:23:06.226603  progress  60 % (3 MB)
   34 12:23:06.228029  progress  65 % (3 MB)
   35 12:23:06.229631  progress  70 % (3 MB)
   36 12:23:06.231021  progress  75 % (3 MB)
   37 12:23:06.232453  progress  80 % (4 MB)
   38 12:23:06.233836  progress  85 % (4 MB)
   39 12:23:06.235380  progress  90 % (4 MB)
   40 12:23:06.236826  progress  95 % (4 MB)
   41 12:23:06.238233  progress 100 % (5 MB)
   42 12:23:06.238444  5 MB downloaded in 0.04 s (125.72 MB/s)
   43 12:23:06.238600  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 12:23:06.238841  end: 1.1 download-retry (duration 00:00:00) [common]
   46 12:23:06.238926  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 12:23:06.239008  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 12:23:06.239138  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   49 12:23:06.239206  saving as /var/lib/lava/dispatcher/tmp/11967649/tftp-deploy-59_fvudr/kernel/bzImage
   50 12:23:06.239265  total size: 11571200 (11 MB)
   51 12:23:06.239324  No compression specified
   52 12:23:06.240434  progress   0 % (0 MB)
   53 12:23:06.243449  progress   5 % (0 MB)
   54 12:23:06.246637  progress  10 % (1 MB)
   55 12:23:06.249773  progress  15 % (1 MB)
   56 12:23:06.252969  progress  20 % (2 MB)
   57 12:23:06.256059  progress  25 % (2 MB)
   58 12:23:06.259016  progress  30 % (3 MB)
   59 12:23:06.262138  progress  35 % (3 MB)
   60 12:23:06.265285  progress  40 % (4 MB)
   61 12:23:06.268199  progress  45 % (4 MB)
   62 12:23:06.271318  progress  50 % (5 MB)
   63 12:23:06.274481  progress  55 % (6 MB)
   64 12:23:06.277461  progress  60 % (6 MB)
   65 12:23:06.280583  progress  65 % (7 MB)
   66 12:23:06.283621  progress  70 % (7 MB)
   67 12:23:06.286522  progress  75 % (8 MB)
   68 12:23:06.289590  progress  80 % (8 MB)
   69 12:23:06.292639  progress  85 % (9 MB)
   70 12:23:06.295524  progress  90 % (9 MB)
   71 12:23:06.298586  progress  95 % (10 MB)
   72 12:23:06.301714  progress 100 % (11 MB)
   73 12:23:06.301831  11 MB downloaded in 0.06 s (176.38 MB/s)
   74 12:23:06.301973  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:23:06.302198  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:23:06.302287  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 12:23:06.302370  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 12:23:06.302494  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
   80 12:23:06.302566  saving as /var/lib/lava/dispatcher/tmp/11967649/tftp-deploy-59_fvudr/nfsrootfs/full.rootfs.tar
   81 12:23:06.302627  total size: 207157356 (197 MB)
   82 12:23:06.302689  Using unxz to decompress xz
   83 12:23:06.306948  progress   0 % (0 MB)
   84 12:23:06.860410  progress   5 % (9 MB)
   85 12:23:07.390891  progress  10 % (19 MB)
   86 12:23:07.997893  progress  15 % (29 MB)
   87 12:23:08.358610  progress  20 % (39 MB)
   88 12:23:08.715357  progress  25 % (49 MB)
   89 12:23:09.311700  progress  30 % (59 MB)
   90 12:23:09.860818  progress  35 % (69 MB)
   91 12:23:10.458839  progress  40 % (79 MB)
   92 12:23:11.015916  progress  45 % (88 MB)
   93 12:23:11.601936  progress  50 % (98 MB)
   94 12:23:12.233804  progress  55 % (108 MB)
   95 12:23:12.928334  progress  60 % (118 MB)
   96 12:23:13.066083  progress  65 % (128 MB)
   97 12:23:13.204633  progress  70 % (138 MB)
   98 12:23:13.298172  progress  75 % (148 MB)
   99 12:23:13.368165  progress  80 % (158 MB)
  100 12:23:13.438726  progress  85 % (167 MB)
  101 12:23:13.538322  progress  90 % (177 MB)
  102 12:23:13.814037  progress  95 % (187 MB)
  103 12:23:14.403705  progress 100 % (197 MB)
  104 12:23:14.410086  197 MB downloaded in 8.11 s (24.37 MB/s)
  105 12:23:14.410324  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 12:23:14.410586  end: 1.3 download-retry (duration 00:00:08) [common]
  108 12:23:14.410675  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 12:23:14.410763  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 12:23:14.410917  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
  111 12:23:14.410990  saving as /var/lib/lava/dispatcher/tmp/11967649/tftp-deploy-59_fvudr/modules/modules.tar
  112 12:23:14.411051  total size: 483720 (0 MB)
  113 12:23:14.411114  Using unxz to decompress xz
  114 12:23:14.415228  progress   6 % (0 MB)
  115 12:23:14.415649  progress  13 % (0 MB)
  116 12:23:14.415890  progress  20 % (0 MB)
  117 12:23:14.417627  progress  27 % (0 MB)
  118 12:23:14.419615  progress  33 % (0 MB)
  119 12:23:14.421562  progress  40 % (0 MB)
  120 12:23:14.423521  progress  47 % (0 MB)
  121 12:23:14.425518  progress  54 % (0 MB)
  122 12:23:14.427483  progress  60 % (0 MB)
  123 12:23:14.429496  progress  67 % (0 MB)
  124 12:23:14.431461  progress  74 % (0 MB)
  125 12:23:14.433564  progress  81 % (0 MB)
  126 12:23:14.435457  progress  88 % (0 MB)
  127 12:23:14.437436  progress  94 % (0 MB)
  128 12:23:14.439875  progress 100 % (0 MB)
  129 12:23:14.446391  0 MB downloaded in 0.04 s (13.06 MB/s)
  130 12:23:14.446638  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 12:23:14.446900  end: 1.4 download-retry (duration 00:00:00) [common]
  133 12:23:14.446994  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  134 12:23:14.447088  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  135 12:23:18.107923  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11967649/extract-nfsrootfs-d8b9d8mq
  136 12:23:18.108111  end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
  137 12:23:18.108239  start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
  138 12:23:18.108702  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_
  139 12:23:18.108873  makedir: /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin
  140 12:23:18.108977  makedir: /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/tests
  141 12:23:18.109077  makedir: /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/results
  142 12:23:18.109181  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-add-keys
  143 12:23:18.109330  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-add-sources
  144 12:23:18.109463  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-background-process-start
  145 12:23:18.109593  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-background-process-stop
  146 12:23:18.109723  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-common-functions
  147 12:23:18.109853  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-echo-ipv4
  148 12:23:18.109983  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-install-packages
  149 12:23:18.110112  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-installed-packages
  150 12:23:18.110239  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-os-build
  151 12:23:18.110367  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-probe-channel
  152 12:23:18.110533  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-probe-ip
  153 12:23:18.110665  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-target-ip
  154 12:23:18.110791  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-target-mac
  155 12:23:18.110917  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-target-storage
  156 12:23:18.111046  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-test-case
  157 12:23:18.111175  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-test-event
  158 12:23:18.111302  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-test-feedback
  159 12:23:18.111429  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-test-raise
  160 12:23:18.111554  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-test-reference
  161 12:23:18.111684  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-test-runner
  162 12:23:18.111811  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-test-set
  163 12:23:18.111939  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-test-shell
  164 12:23:18.112068  Updating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-add-keys (debian)
  165 12:23:18.112282  Updating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-add-sources (debian)
  166 12:23:18.112484  Updating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-install-packages (debian)
  167 12:23:18.112629  Updating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-installed-packages (debian)
  168 12:23:18.112772  Updating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/bin/lava-os-build (debian)
  169 12:23:18.112897  Creating /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/environment
  170 12:23:18.112995  LAVA metadata
  171 12:23:18.113066  - LAVA_JOB_ID=11967649
  172 12:23:18.113130  - LAVA_DISPATCHER_IP=192.168.201.1
  173 12:23:18.113231  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
  174 12:23:18.113297  skipped lava-vland-overlay
  175 12:23:18.113371  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  176 12:23:18.113450  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
  177 12:23:18.113525  skipped lava-multinode-overlay
  178 12:23:18.113598  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  179 12:23:18.113677  start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
  180 12:23:18.113749  Loading test definitions
  181 12:23:18.113837  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
  182 12:23:18.113907  Using /lava-11967649 at stage 0
  183 12:23:18.114190  uuid=11967649_1.5.2.3.1 testdef=None
  184 12:23:18.114276  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  185 12:23:18.114362  start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
  186 12:23:18.114819  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  188 12:23:18.115036  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
  189 12:23:18.115601  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  191 12:23:18.115862  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
  192 12:23:18.116453  runner path: /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/0/tests/0_timesync-off test_uuid 11967649_1.5.2.3.1
  193 12:23:18.116610  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  195 12:23:18.116833  start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
  196 12:23:18.116904  Using /lava-11967649 at stage 0
  197 12:23:18.117000  Fetching tests from https://github.com/kernelci/test-definitions.git
  198 12:23:18.117078  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/0/tests/1_kselftest-filesystems'
  199 12:23:25.880407  Running '/usr/bin/git checkout kernelci.org
  200 12:23:26.031416  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
  201 12:23:26.032170  uuid=11967649_1.5.2.3.5 testdef=None
  202 12:23:26.032365  end: 1.5.2.3.5 git-repo-action (duration 00:00:08) [common]
  204 12:23:26.032634  start: 1.5.2.3.6 test-overlay (timeout 00:09:40) [common]
  205 12:23:26.033444  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  207 12:23:26.033676  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:40) [common]
  208 12:23:26.034714  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  210 12:23:26.034947  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:40) [common]
  211 12:23:26.036123  runner path: /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/0/tests/1_kselftest-filesystems test_uuid 11967649_1.5.2.3.5
  212 12:23:26.036246  BOARD='asus-C436FA-Flip-hatch'
  213 12:23:26.036361  BRANCH='cip-gitlab'
  214 12:23:26.036467  SKIPFILE='/dev/null'
  215 12:23:26.036554  SKIP_INSTALL='True'
  216 12:23:26.036639  TESTPROG_URL='None'
  217 12:23:26.036759  TST_CASENAME=''
  218 12:23:26.036843  TST_CMDFILES='filesystems'
  219 12:23:26.037030  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  221 12:23:26.037373  Creating lava-test-runner.conf files
  222 12:23:26.037464  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11967649/lava-overlay-x8qbn4z_/lava-11967649/0 for stage 0
  223 12:23:26.037588  - 0_timesync-off
  224 12:23:26.037689  - 1_kselftest-filesystems
  225 12:23:26.037845  end: 1.5.2.3 test-definition (duration 00:00:08) [common]
  226 12:23:26.037978  start: 1.5.2.4 compress-overlay (timeout 00:09:40) [common]
  227 12:23:33.648265  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  228 12:23:33.648475  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
  229 12:23:33.648571  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  230 12:23:33.648678  end: 1.5.2 lava-overlay (duration 00:00:16) [common]
  231 12:23:33.648773  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
  232 12:23:33.788499  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  233 12:23:33.788892  start: 1.5.4 extract-modules (timeout 00:09:32) [common]
  234 12:23:33.789010  extracting modules file /var/lib/lava/dispatcher/tmp/11967649/tftp-deploy-59_fvudr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967649/extract-nfsrootfs-d8b9d8mq
  235 12:23:33.810955  extracting modules file /var/lib/lava/dispatcher/tmp/11967649/tftp-deploy-59_fvudr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967649/extract-overlay-ramdisk-4eel2xjh/ramdisk
  236 12:23:33.832839  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  237 12:23:33.832990  start: 1.5.5 apply-overlay-tftp (timeout 00:09:32) [common]
  238 12:23:33.833089  [common] Applying overlay to NFS
  239 12:23:33.833162  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11967649/compress-overlay-3k80130t/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11967649/extract-nfsrootfs-d8b9d8mq
  240 12:23:34.777142  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  241 12:23:34.777313  start: 1.5.6 configure-preseed-file (timeout 00:09:31) [common]
  242 12:23:34.777409  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  243 12:23:34.777498  start: 1.5.7 compress-ramdisk (timeout 00:09:31) [common]
  244 12:23:34.777583  Building ramdisk /var/lib/lava/dispatcher/tmp/11967649/extract-overlay-ramdisk-4eel2xjh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11967649/extract-overlay-ramdisk-4eel2xjh/ramdisk
  245 12:23:34.867800  >> 30353 blocks

  246 12:23:35.455744  rename /var/lib/lava/dispatcher/tmp/11967649/extract-overlay-ramdisk-4eel2xjh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11967649/tftp-deploy-59_fvudr/ramdisk/ramdisk.cpio.gz
  247 12:23:35.456200  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  248 12:23:35.456351  start: 1.5.8 prepare-kernel (timeout 00:09:31) [common]
  249 12:23:35.456478  start: 1.5.8.1 prepare-fit (timeout 00:09:31) [common]
  250 12:23:35.456575  No mkimage arch provided, not using FIT.
  251 12:23:35.456666  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  252 12:23:35.456755  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  253 12:23:35.456861  end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
  254 12:23:35.456974  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:31) [common]
  255 12:23:35.457059  No LXC device requested
  256 12:23:35.457142  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  257 12:23:35.457236  start: 1.7 deploy-device-env (timeout 00:09:31) [common]
  258 12:23:35.457320  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  259 12:23:35.457394  Checking files for TFTP limit of 4294967296 bytes.
  260 12:23:35.457834  end: 1 tftp-deploy (duration 00:00:29) [common]
  261 12:23:35.457934  start: 2 depthcharge-action (timeout 00:05:00) [common]
  262 12:23:35.458083  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  263 12:23:35.458209  substitutions:
  264 12:23:35.458280  - {DTB}: None
  265 12:23:35.458342  - {INITRD}: 11967649/tftp-deploy-59_fvudr/ramdisk/ramdisk.cpio.gz
  266 12:23:35.458402  - {KERNEL}: 11967649/tftp-deploy-59_fvudr/kernel/bzImage
  267 12:23:35.458460  - {LAVA_MAC}: None
  268 12:23:35.458534  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11967649/extract-nfsrootfs-d8b9d8mq
  269 12:23:35.458597  - {NFS_SERVER_IP}: 192.168.201.1
  270 12:23:35.458653  - {PRESEED_CONFIG}: None
  271 12:23:35.458709  - {PRESEED_LOCAL}: None
  272 12:23:35.458764  - {RAMDISK}: 11967649/tftp-deploy-59_fvudr/ramdisk/ramdisk.cpio.gz
  273 12:23:35.458819  - {ROOT_PART}: None
  274 12:23:35.458874  - {ROOT}: None
  275 12:23:35.458928  - {SERVER_IP}: 192.168.201.1
  276 12:23:35.458982  - {TEE}: None
  277 12:23:35.459043  Parsed boot commands:
  278 12:23:35.459106  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  279 12:23:35.459291  Parsed boot commands: tftpboot 192.168.201.1 11967649/tftp-deploy-59_fvudr/kernel/bzImage 11967649/tftp-deploy-59_fvudr/kernel/cmdline 11967649/tftp-deploy-59_fvudr/ramdisk/ramdisk.cpio.gz
  280 12:23:35.459381  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  281 12:23:35.459467  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  282 12:23:35.459558  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  283 12:23:35.459663  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  284 12:23:35.459739  Not connected, no need to disconnect.
  285 12:23:35.459813  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  286 12:23:35.459895  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  287 12:23:35.459963  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
  288 12:23:35.464206  Setting prompt string to ['lava-test: # ']
  289 12:23:35.464623  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  290 12:23:35.464735  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  291 12:23:35.464836  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  292 12:23:35.464925  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  293 12:23:35.465160  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  294 12:23:40.603724  >> Command sent successfully.

  295 12:23:40.606276  Returned 0 in 5 seconds
  296 12:23:40.706688  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  298 12:23:40.707050  end: 2.2.2 reset-device (duration 00:00:05) [common]
  299 12:23:40.707160  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  300 12:23:40.707255  Setting prompt string to 'Starting depthcharge on Helios...'
  301 12:23:40.707323  Changing prompt to 'Starting depthcharge on Helios...'
  302 12:23:40.707392  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  303 12:23:40.707741  [Enter `^Ec?' for help]

  304 12:23:41.326787  

  305 12:23:41.326942  

  306 12:23:41.337270  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  307 12:23:41.340269  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  308 12:23:41.346827  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  309 12:23:41.350310  CPU: AES supported, TXT NOT supported, VT supported

  310 12:23:41.357310  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  311 12:23:41.360472  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  312 12:23:41.367395  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  313 12:23:41.370214  VBOOT: Loading verstage.

  314 12:23:41.374460  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  315 12:23:41.380685  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  316 12:23:41.384033  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  317 12:23:41.386977  CBFS @ c08000 size 3f8000

  318 12:23:41.393842  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  319 12:23:41.396960  CBFS: Locating 'fallback/verstage'

  320 12:23:41.400196  CBFS: Found @ offset 10fb80 size 1072c

  321 12:23:41.403562  

  322 12:23:41.403661  

  323 12:23:41.413618  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  324 12:23:41.427828  Probing TPM: . done!

  325 12:23:41.431098  TPM ready after 0 ms

  326 12:23:41.434716  Connected to device vid:did:rid of 1ae0:0028:00

  327 12:23:41.444646  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  328 12:23:41.448115  Initialized TPM device CR50 revision 0

  329 12:23:41.508533  tlcl_send_startup: Startup return code is 0

  330 12:23:41.508628  TPM: setup succeeded

  331 12:23:41.520640  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  332 12:23:41.524715  Chrome EC: UHEPI supported

  333 12:23:41.527707  Phase 1

  334 12:23:41.531353  FMAP: area GBB found @ c05000 (12288 bytes)

  335 12:23:41.538102  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  336 12:23:41.541265  Phase 2

  337 12:23:41.541366  Phase 3

  338 12:23:41.544512  FMAP: area GBB found @ c05000 (12288 bytes)

  339 12:23:41.551225  VB2:vb2_report_dev_firmware() This is developer signed firmware

  340 12:23:41.557673  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  341 12:23:41.561241  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  342 12:23:41.567719  VB2:vb2_verify_keyblock() Checking keyblock signature...

  343 12:23:41.583400  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  344 12:23:41.587071  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  345 12:23:41.593375  VB2:vb2_verify_fw_preamble() Verifying preamble.

  346 12:23:41.597598  Phase 4

  347 12:23:41.600706  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  348 12:23:41.607646  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  349 12:23:41.787397  VB2:vb2_rsa_verify_digest() Digest check failed!

  350 12:23:41.793434  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  351 12:23:41.793549  Saving nvdata

  352 12:23:41.796720  Reboot requested (10020007)

  353 12:23:41.800188  board_reset() called!

  354 12:23:41.800291  full_reset() called!

  355 12:23:46.294078  

  356 12:23:46.294216  

  357 12:23:46.303998  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  358 12:23:46.307190  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  359 12:23:46.313689  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  360 12:23:46.317115  CPU: AES supported, TXT NOT supported, VT supported

  361 12:23:46.323880  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  362 12:23:46.327313  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  363 12:23:46.334019  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  364 12:23:46.336985  VBOOT: Loading verstage.

  365 12:23:46.340570  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  366 12:23:46.347314  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  367 12:23:46.350136  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  368 12:23:46.353624  CBFS @ c08000 size 3f8000

  369 12:23:46.360147  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  370 12:23:46.363440  CBFS: Locating 'fallback/verstage'

  371 12:23:46.366874  CBFS: Found @ offset 10fb80 size 1072c

  372 12:23:46.370896  

  373 12:23:46.370979  

  374 12:23:46.380523  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  375 12:23:46.395490  Probing TPM: . done!

  376 12:23:46.398325  TPM ready after 0 ms

  377 12:23:46.401624  Connected to device vid:did:rid of 1ae0:0028:00

  378 12:23:46.412469  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  379 12:23:46.415657  Initialized TPM device CR50 revision 0

  380 12:23:46.476841  tlcl_send_startup: Startup return code is 0

  381 12:23:46.477359  TPM: setup succeeded

  382 12:23:46.489362  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  383 12:23:46.493397  Chrome EC: UHEPI supported

  384 12:23:46.496277  Phase 1

  385 12:23:46.499972  FMAP: area GBB found @ c05000 (12288 bytes)

  386 12:23:46.506215  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  387 12:23:46.512902  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  388 12:23:46.516727  Recovery requested (1009000e)

  389 12:23:46.522259  Saving nvdata

  390 12:23:46.528486  tlcl_extend: response is 0

  391 12:23:46.536968  tlcl_extend: response is 0

  392 12:23:46.543937  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  393 12:23:46.547515  CBFS @ c08000 size 3f8000

  394 12:23:46.553884  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  395 12:23:46.557572  CBFS: Locating 'fallback/romstage'

  396 12:23:46.560613  CBFS: Found @ offset 80 size 145fc

  397 12:23:46.563938  Accumulated console time in verstage 98 ms

  398 12:23:46.564422  

  399 12:23:46.564773  

  400 12:23:46.577055  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  401 12:23:46.583933  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  402 12:23:46.587155  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  403 12:23:46.589973  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  404 12:23:46.597044  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  405 12:23:46.600151  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  406 12:23:46.603313  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  407 12:23:46.606701  TCO_STS:   0000 0000

  408 12:23:46.610186  GEN_PMCON: e0015238 00000200

  409 12:23:46.613198  GBLRST_CAUSE: 00000000 00000000

  410 12:23:46.613669  prev_sleep_state 5

  411 12:23:46.617077  Boot Count incremented to 72759

  412 12:23:46.623659  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  413 12:23:46.627110  CBFS @ c08000 size 3f8000

  414 12:23:46.630274  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  415 12:23:46.633882  CBFS: Locating 'fspm.bin'

  416 12:23:46.637208  CBFS: Found @ offset 5ffc0 size 71000

  417 12:23:46.641361  Chrome EC: UHEPI supported

  418 12:23:46.648562  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  419 12:23:46.653424  Probing TPM:  done!

  420 12:23:46.660398  Connected to device vid:did:rid of 1ae0:0028:00

  421 12:23:46.670270  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602

  422 12:23:46.676326  Initialized TPM device CR50 revision 0

  423 12:23:46.685231  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  424 12:23:46.692028  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  425 12:23:46.695389  MRC cache found, size 1948

  426 12:23:46.698392  bootmode is set to: 2

  427 12:23:46.701921  PRMRR disabled by config.

  428 12:23:46.702460  SPD INDEX = 1

  429 12:23:46.708401  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  430 12:23:46.711763  CBFS @ c08000 size 3f8000

  431 12:23:46.718696  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  432 12:23:46.719128  CBFS: Locating 'spd.bin'

  433 12:23:46.721729  CBFS: Found @ offset 5fb80 size 400

  434 12:23:46.725008  SPD: module type is LPDDR3

  435 12:23:46.728324  SPD: module part is 

  436 12:23:46.735303  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  437 12:23:46.738357  SPD: device width 4 bits, bus width 8 bits

  438 12:23:46.741695  SPD: module size is 4096 MB (per channel)

  439 12:23:46.744917  memory slot: 0 configuration done.

  440 12:23:46.748420  memory slot: 2 configuration done.

  441 12:23:46.799749  CBMEM:

  442 12:23:46.803423  IMD: root @ 99fff000 254 entries.

  443 12:23:46.806565  IMD: root @ 99ffec00 62 entries.

  444 12:23:46.809788  External stage cache:

  445 12:23:46.813077  IMD: root @ 9abff000 254 entries.

  446 12:23:46.816681  IMD: root @ 9abfec00 62 entries.

  447 12:23:46.819453  Chrome EC: clear events_b mask to 0x0000000020004000

  448 12:23:46.835415  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  449 12:23:46.849317  tlcl_write: response is 0

  450 12:23:46.858229  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  451 12:23:46.864709  MRC: TPM MRC hash updated successfully.

  452 12:23:46.865178  2 DIMMs found

  453 12:23:46.868872  SMM Memory Map

  454 12:23:46.871299  SMRAM       : 0x9a000000 0x1000000

  455 12:23:46.874713   Subregion 0: 0x9a000000 0xa00000

  456 12:23:46.877951   Subregion 1: 0x9aa00000 0x200000

  457 12:23:46.881472   Subregion 2: 0x9ac00000 0x400000

  458 12:23:46.884591  top_of_ram = 0x9a000000

  459 12:23:46.887967  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  460 12:23:46.894406  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  461 12:23:46.898163  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  462 12:23:46.904248  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  463 12:23:46.907732  CBFS @ c08000 size 3f8000

  464 12:23:46.911129  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  465 12:23:46.914352  CBFS: Locating 'fallback/postcar'

  466 12:23:46.921024  CBFS: Found @ offset 107000 size 4b44

  467 12:23:46.924458  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  468 12:23:46.936861  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  469 12:23:46.940451  Processing 180 relocs. Offset value of 0x97c0c000

  470 12:23:46.948876  Accumulated console time in romstage 286 ms

  471 12:23:46.949421  

  472 12:23:46.949792  

  473 12:23:46.958738  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  474 12:23:46.965073  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  475 12:23:46.968505  CBFS @ c08000 size 3f8000

  476 12:23:46.975033  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  477 12:23:46.978629  CBFS: Locating 'fallback/ramstage'

  478 12:23:46.981746  CBFS: Found @ offset 43380 size 1b9e8

  479 12:23:46.988296  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  480 12:23:47.020062  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  481 12:23:47.023483  Processing 3976 relocs. Offset value of 0x98db0000

  482 12:23:47.030855  Accumulated console time in postcar 52 ms

  483 12:23:47.031437  

  484 12:23:47.031806  

  485 12:23:47.040315  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  486 12:23:47.047058  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  487 12:23:47.050101  WARNING: RO_VPD is uninitialized or empty.

  488 12:23:47.053557  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  489 12:23:47.060533  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  490 12:23:47.061091  Normal boot.

  491 12:23:47.067355  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  492 12:23:47.070093  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  493 12:23:47.073405  CBFS @ c08000 size 3f8000

  494 12:23:47.080253  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  495 12:23:47.083293  CBFS: Locating 'cpu_microcode_blob.bin'

  496 12:23:47.086674  CBFS: Found @ offset 14700 size 2ec00

  497 12:23:47.090234  microcode: sig=0x806ec pf=0x4 revision=0xc9

  498 12:23:47.093703  Skip microcode update

  499 12:23:47.096918  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  500 12:23:47.100257  CBFS @ c08000 size 3f8000

  501 12:23:47.106894  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  502 12:23:47.110192  CBFS: Locating 'fsps.bin'

  503 12:23:47.113417  CBFS: Found @ offset d1fc0 size 35000

  504 12:23:47.138468  Detected 4 core, 8 thread CPU.

  505 12:23:47.141602  Setting up SMI for CPU

  506 12:23:47.145229  IED base = 0x9ac00000

  507 12:23:47.145747  IED size = 0x00400000

  508 12:23:47.148535  Will perform SMM setup.

  509 12:23:47.155156  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  510 12:23:47.161414  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  511 12:23:47.165029  Processing 16 relocs. Offset value of 0x00030000

  512 12:23:47.168859  Attempting to start 7 APs

  513 12:23:47.171645  Waiting for 10ms after sending INIT.

  514 12:23:47.187977  Waiting for 1st SIPI to complete...done.

  515 12:23:47.188319  AP: slot 5 apic_id 4.

  516 12:23:47.191246  AP: slot 6 apic_id 5.

  517 12:23:47.194768  AP: slot 1 apic_id 3.

  518 12:23:47.194960  AP: slot 4 apic_id 2.

  519 12:23:47.197561  AP: slot 3 apic_id 1.

  520 12:23:47.201221  Waiting for 2nd SIPI to complete...done.

  521 12:23:47.204550  AP: slot 7 apic_id 7.

  522 12:23:47.207945  AP: slot 2 apic_id 6.

  523 12:23:47.214423  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  524 12:23:47.218124  Processing 13 relocs. Offset value of 0x00038000

  525 12:23:47.224374  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  526 12:23:47.231206  Installing SMM handler to 0x9a000000

  527 12:23:47.237792  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  528 12:23:47.241236  Processing 658 relocs. Offset value of 0x9a010000

  529 12:23:47.250823  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  530 12:23:47.254481  Processing 13 relocs. Offset value of 0x9a008000

  531 12:23:47.261094  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  532 12:23:47.267385  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  533 12:23:47.270756  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  534 12:23:47.277291  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  535 12:23:47.283878  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  536 12:23:47.290308  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  537 12:23:47.294217  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  538 12:23:47.300261  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  539 12:23:47.303855  Clearing SMI status registers

  540 12:23:47.306948  SMI_STS: PM1 

  541 12:23:47.307032  PM1_STS: PWRBTN 

  542 12:23:47.310243  TCO_STS: SECOND_TO 

  543 12:23:47.313827  New SMBASE 0x9a000000

  544 12:23:47.317018  In relocation handler: CPU 0

  545 12:23:47.320189  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  546 12:23:47.323575  Writing SMRR. base = 0x9a000006, mask=0xff000800

  547 12:23:47.327148  Relocation complete.

  548 12:23:47.330664  New SMBASE 0x99fff400

  549 12:23:47.330754  In relocation handler: CPU 3

  550 12:23:47.337498  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  551 12:23:47.340897  Writing SMRR. base = 0x9a000006, mask=0xff000800

  552 12:23:47.344155  Relocation complete.

  553 12:23:47.347417  New SMBASE 0x99fff000

  554 12:23:47.347839  In relocation handler: CPU 4

  555 12:23:47.354111  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  556 12:23:47.357445  Writing SMRR. base = 0x9a000006, mask=0xff000800

  557 12:23:47.360790  Relocation complete.

  558 12:23:47.361233  New SMBASE 0x99fffc00

  559 12:23:47.364242  In relocation handler: CPU 1

  560 12:23:47.371007  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  561 12:23:47.374476  Writing SMRR. base = 0x9a000006, mask=0xff000800

  562 12:23:47.377600  Relocation complete.

  563 12:23:47.378175  New SMBASE 0x99ffe800

  564 12:23:47.380458  In relocation handler: CPU 6

  565 12:23:47.384310  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  566 12:23:47.390535  Writing SMRR. base = 0x9a000006, mask=0xff000800

  567 12:23:47.394111  Relocation complete.

  568 12:23:47.394573  New SMBASE 0x99ffec00

  569 12:23:47.397294  In relocation handler: CPU 5

  570 12:23:47.400472  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  571 12:23:47.407337  Writing SMRR. base = 0x9a000006, mask=0xff000800

  572 12:23:47.410856  Relocation complete.

  573 12:23:47.411387  New SMBASE 0x99fff800

  574 12:23:47.413944  In relocation handler: CPU 2

  575 12:23:47.417420  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  576 12:23:47.423752  Writing SMRR. base = 0x9a000006, mask=0xff000800

  577 12:23:47.424325  Relocation complete.

  578 12:23:47.427514  New SMBASE 0x99ffe400

  579 12:23:47.430505  In relocation handler: CPU 7

  580 12:23:47.433811  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  581 12:23:47.440499  Writing SMRR. base = 0x9a000006, mask=0xff000800

  582 12:23:47.441094  Relocation complete.

  583 12:23:47.443821  Initializing CPU #0

  584 12:23:47.447258  CPU: vendor Intel device 806ec

  585 12:23:47.450777  CPU: family 06, model 8e, stepping 0c

  586 12:23:47.453792  Clearing out pending MCEs

  587 12:23:47.457350  Setting up local APIC...

  588 12:23:47.457811   apic_id: 0x00 done.

  589 12:23:47.460383  Turbo is available but hidden

  590 12:23:47.463989  Turbo is available and visible

  591 12:23:47.467181  VMX status: enabled

  592 12:23:47.470578  IA32_FEATURE_CONTROL status: locked

  593 12:23:47.473869  Skip microcode update

  594 12:23:47.474334  CPU #0 initialized

  595 12:23:47.477282  Initializing CPU #3

  596 12:23:47.477825  Initializing CPU #7

  597 12:23:47.480800  Initializing CPU #2

  598 12:23:47.483688  CPU: vendor Intel device 806ec

  599 12:23:47.486990  CPU: family 06, model 8e, stepping 0c

  600 12:23:47.490323  CPU: vendor Intel device 806ec

  601 12:23:47.493658  CPU: family 06, model 8e, stepping 0c

  602 12:23:47.496925  Clearing out pending MCEs

  603 12:23:47.500564  Clearing out pending MCEs

  604 12:23:47.503694  Setting up local APIC...

  605 12:23:47.507266  CPU: vendor Intel device 806ec

  606 12:23:47.510231  CPU: family 06, model 8e, stepping 0c

  607 12:23:47.510699  Clearing out pending MCEs

  608 12:23:47.513499  Initializing CPU #1

  609 12:23:47.516473  Initializing CPU #4

  610 12:23:47.520213  CPU: vendor Intel device 806ec

  611 12:23:47.523540  CPU: family 06, model 8e, stepping 0c

  612 12:23:47.526850  CPU: vendor Intel device 806ec

  613 12:23:47.530253  CPU: family 06, model 8e, stepping 0c

  614 12:23:47.533824  Clearing out pending MCEs

  615 12:23:47.534296  Clearing out pending MCEs

  616 12:23:47.536728  Setting up local APIC...

  617 12:23:47.540417  Initializing CPU #6

  618 12:23:47.540981  Initializing CPU #5

  619 12:23:47.543485  CPU: vendor Intel device 806ec

  620 12:23:47.550089  CPU: family 06, model 8e, stepping 0c

  621 12:23:47.550658  CPU: vendor Intel device 806ec

  622 12:23:47.556744  CPU: family 06, model 8e, stepping 0c

  623 12:23:47.557269  Clearing out pending MCEs

  624 12:23:47.560094  Clearing out pending MCEs

  625 12:23:47.563139  Setting up local APIC...

  626 12:23:47.566676  Setting up local APIC...

  627 12:23:47.567171   apic_id: 0x05 done.

  628 12:23:47.569702  Setting up local APIC...

  629 12:23:47.573172   apic_id: 0x03 done.

  630 12:23:47.576819  Setting up local APIC...

  631 12:23:47.577287  Setting up local APIC...

  632 12:23:47.579914  VMX status: enabled

  633 12:23:47.583422   apic_id: 0x04 done.

  634 12:23:47.586662  IA32_FEATURE_CONTROL status: locked

  635 12:23:47.587208  VMX status: enabled

  636 12:23:47.590086  Skip microcode update

  637 12:23:47.593166  IA32_FEATURE_CONTROL status: locked

  638 12:23:47.596459  CPU #6 initialized

  639 12:23:47.597128  Skip microcode update

  640 12:23:47.599625   apic_id: 0x01 done.

  641 12:23:47.600186  CPU #5 initialized

  642 12:23:47.603164   apic_id: 0x06 done.

  643 12:23:47.606339   apic_id: 0x07 done.

  644 12:23:47.606898  VMX status: enabled

  645 12:23:47.609721  VMX status: enabled

  646 12:23:47.613247  IA32_FEATURE_CONTROL status: locked

  647 12:23:47.616382  IA32_FEATURE_CONTROL status: locked

  648 12:23:47.619778  Skip microcode update

  649 12:23:47.620113  Skip microcode update

  650 12:23:47.623020  CPU #2 initialized

  651 12:23:47.626082  CPU #7 initialized

  652 12:23:47.626321   apic_id: 0x02 done.

  653 12:23:47.629375  VMX status: enabled

  654 12:23:47.632930  VMX status: enabled

  655 12:23:47.636063  IA32_FEATURE_CONTROL status: locked

  656 12:23:47.639586  IA32_FEATURE_CONTROL status: locked

  657 12:23:47.639746  Skip microcode update

  658 12:23:47.642619  VMX status: enabled

  659 12:23:47.646057  CPU #1 initialized

  660 12:23:47.646174  Skip microcode update

  661 12:23:47.649038  IA32_FEATURE_CONTROL status: locked

  662 12:23:47.652752  CPU #4 initialized

  663 12:23:47.655811  Skip microcode update

  664 12:23:47.655904  CPU #3 initialized

  665 12:23:47.662241  bsp_do_flight_plan done after 457 msecs.

  666 12:23:47.662326  CPU: frequency set to 4200 MHz

  667 12:23:47.665772  Enabling SMIs.

  668 12:23:47.665853  Locking SMM.

  669 12:23:47.681997  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  670 12:23:47.685211  CBFS @ c08000 size 3f8000

  671 12:23:47.692113  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  672 12:23:47.692260  CBFS: Locating 'vbt.bin'

  673 12:23:47.695205  CBFS: Found @ offset 5f5c0 size 499

  674 12:23:47.701704  Found a VBT of 4608 bytes after decompression

  675 12:23:47.882683  Display FSP Version Info HOB

  676 12:23:47.885353  Reference Code - CPU = 9.0.1e.30

  677 12:23:47.888796  uCode Version = 0.0.0.ca

  678 12:23:47.891734  TXT ACM version = ff.ff.ff.ffff

  679 12:23:47.895209  Display FSP Version Info HOB

  680 12:23:47.898915  Reference Code - ME = 9.0.1e.30

  681 12:23:47.902036  MEBx version = 0.0.0.0

  682 12:23:47.905589  ME Firmware Version = Consumer SKU

  683 12:23:47.908612  Display FSP Version Info HOB

  684 12:23:47.911554  Reference Code - CML PCH = 9.0.1e.30

  685 12:23:47.915041  PCH-CRID Status = Disabled

  686 12:23:47.918667  PCH-CRID Original Value = ff.ff.ff.ffff

  687 12:23:47.921813  PCH-CRID New Value = ff.ff.ff.ffff

  688 12:23:47.924949  OPROM - RST - RAID = ff.ff.ff.ffff

  689 12:23:47.928293  ChipsetInit Base Version = ff.ff.ff.ffff

  690 12:23:47.931522  ChipsetInit Oem Version = ff.ff.ff.ffff

  691 12:23:47.935048  Display FSP Version Info HOB

  692 12:23:47.941655  Reference Code - SA - System Agent = 9.0.1e.30

  693 12:23:47.945168  Reference Code - MRC = 0.7.1.6c

  694 12:23:47.945614  SA - PCIe Version = 9.0.1e.30

  695 12:23:47.948167  SA-CRID Status = Disabled

  696 12:23:47.951912  SA-CRID Original Value = 0.0.0.c

  697 12:23:47.954947  SA-CRID New Value = 0.0.0.c

  698 12:23:47.958271  OPROM - VBIOS = ff.ff.ff.ffff

  699 12:23:47.961363  RTC Init

  700 12:23:47.965018  Set power on after power failure.

  701 12:23:47.965463  Disabling Deep S3

  702 12:23:47.968278  Disabling Deep S3

  703 12:23:47.968753  Disabling Deep S4

  704 12:23:47.972016  Disabling Deep S4

  705 12:23:47.972501  Disabling Deep S5

  706 12:23:47.974962  Disabling Deep S5

  707 12:23:47.981398  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1

  708 12:23:47.981844  Enumerating buses...

  709 12:23:47.987650  Show all devs... Before device enumeration.

  710 12:23:47.987736  Root Device: enabled 1

  711 12:23:47.991201  CPU_CLUSTER: 0: enabled 1

  712 12:23:47.994252  DOMAIN: 0000: enabled 1

  713 12:23:47.997443  APIC: 00: enabled 1

  714 12:23:47.997529  PCI: 00:00.0: enabled 1

  715 12:23:48.000924  PCI: 00:02.0: enabled 1

  716 12:23:48.004602  PCI: 00:04.0: enabled 0

  717 12:23:48.007466  PCI: 00:05.0: enabled 0

  718 12:23:48.007552  PCI: 00:12.0: enabled 1

  719 12:23:48.011295  PCI: 00:12.5: enabled 0

  720 12:23:48.014102  PCI: 00:12.6: enabled 0

  721 12:23:48.014188  PCI: 00:14.0: enabled 1

  722 12:23:48.017624  PCI: 00:14.1: enabled 0

  723 12:23:48.021133  PCI: 00:14.3: enabled 1

  724 12:23:48.023996  PCI: 00:14.5: enabled 0

  725 12:23:48.024081  PCI: 00:15.0: enabled 1

  726 12:23:48.027514  PCI: 00:15.1: enabled 1

  727 12:23:48.030774  PCI: 00:15.2: enabled 0

  728 12:23:48.033965  PCI: 00:15.3: enabled 0

  729 12:23:48.034051  PCI: 00:16.0: enabled 1

  730 12:23:48.037332  PCI: 00:16.1: enabled 0

  731 12:23:48.040725  PCI: 00:16.2: enabled 0

  732 12:23:48.043818  PCI: 00:16.3: enabled 0

  733 12:23:48.043903  PCI: 00:16.4: enabled 0

  734 12:23:48.047359  PCI: 00:16.5: enabled 0

  735 12:23:48.050314  PCI: 00:17.0: enabled 1

  736 12:23:48.053965  PCI: 00:19.0: enabled 1

  737 12:23:48.054051  PCI: 00:19.1: enabled 0

  738 12:23:48.057471  PCI: 00:19.2: enabled 0

  739 12:23:48.060352  PCI: 00:1a.0: enabled 0

  740 12:23:48.060438  PCI: 00:1c.0: enabled 0

  741 12:23:48.063851  PCI: 00:1c.1: enabled 0

  742 12:23:48.067102  PCI: 00:1c.2: enabled 0

  743 12:23:48.070361  PCI: 00:1c.3: enabled 0

  744 12:23:48.070479  PCI: 00:1c.4: enabled 0

  745 12:23:48.073935  PCI: 00:1c.5: enabled 0

  746 12:23:48.076816  PCI: 00:1c.6: enabled 0

  747 12:23:48.080318  PCI: 00:1c.7: enabled 0

  748 12:23:48.080412  PCI: 00:1d.0: enabled 1

  749 12:23:48.084254  PCI: 00:1d.1: enabled 0

  750 12:23:48.087073  PCI: 00:1d.2: enabled 0

  751 12:23:48.090585  PCI: 00:1d.3: enabled 0

  752 12:23:48.090714  PCI: 00:1d.4: enabled 0

  753 12:23:48.093482  PCI: 00:1d.5: enabled 1

  754 12:23:48.097051  PCI: 00:1e.0: enabled 1

  755 12:23:48.097134  PCI: 00:1e.1: enabled 0

  756 12:23:48.100090  PCI: 00:1e.2: enabled 1

  757 12:23:48.103706  PCI: 00:1e.3: enabled 1

  758 12:23:48.106881  PCI: 00:1f.0: enabled 1

  759 12:23:48.106964  PCI: 00:1f.1: enabled 1

  760 12:23:48.110380  PCI: 00:1f.2: enabled 1

  761 12:23:48.113760  PCI: 00:1f.3: enabled 1

  762 12:23:48.117088  PCI: 00:1f.4: enabled 1

  763 12:23:48.117171  PCI: 00:1f.5: enabled 1

  764 12:23:48.120274  PCI: 00:1f.6: enabled 0

  765 12:23:48.123991  USB0 port 0: enabled 1

  766 12:23:48.124073  I2C: 00:15: enabled 1

  767 12:23:48.126983  I2C: 00:5d: enabled 1

  768 12:23:48.130601  GENERIC: 0.0: enabled 1

  769 12:23:48.130684  I2C: 00:1a: enabled 1

  770 12:23:48.133567  I2C: 00:38: enabled 1

  771 12:23:48.136980  I2C: 00:39: enabled 1

  772 12:23:48.140245  I2C: 00:3a: enabled 1

  773 12:23:48.140361  I2C: 00:3b: enabled 1

  774 12:23:48.143576  PCI: 00:00.0: enabled 1

  775 12:23:48.146799  SPI: 00: enabled 1

  776 12:23:48.146882  SPI: 01: enabled 1

  777 12:23:48.150486  PNP: 0c09.0: enabled 1

  778 12:23:48.153499  USB2 port 0: enabled 1

  779 12:23:48.153582  USB2 port 1: enabled 1

  780 12:23:48.156949  USB2 port 2: enabled 0

  781 12:23:48.159963  USB2 port 3: enabled 0

  782 12:23:48.160045  USB2 port 5: enabled 0

  783 12:23:48.163450  USB2 port 6: enabled 1

  784 12:23:48.166521  USB2 port 9: enabled 1

  785 12:23:48.166604  USB3 port 0: enabled 1

  786 12:23:48.170016  USB3 port 1: enabled 1

  787 12:23:48.173512  USB3 port 2: enabled 1

  788 12:23:48.176943  USB3 port 3: enabled 1

  789 12:23:48.177027  USB3 port 4: enabled 0

  790 12:23:48.180128  APIC: 03: enabled 1

  791 12:23:48.180210  APIC: 06: enabled 1

  792 12:23:48.183271  APIC: 01: enabled 1

  793 12:23:48.186718  APIC: 02: enabled 1

  794 12:23:48.186801  APIC: 04: enabled 1

  795 12:23:48.189813  APIC: 05: enabled 1

  796 12:23:48.193267  APIC: 07: enabled 1

  797 12:23:48.193350  Compare with tree...

  798 12:23:48.196684  Root Device: enabled 1

  799 12:23:48.199808   CPU_CLUSTER: 0: enabled 1

  800 12:23:48.199890    APIC: 00: enabled 1

  801 12:23:48.202959    APIC: 03: enabled 1

  802 12:23:48.206324    APIC: 06: enabled 1

  803 12:23:48.206407    APIC: 01: enabled 1

  804 12:23:48.209644    APIC: 02: enabled 1

  805 12:23:48.213095    APIC: 04: enabled 1

  806 12:23:48.213178    APIC: 05: enabled 1

  807 12:23:48.216505    APIC: 07: enabled 1

  808 12:23:48.219615   DOMAIN: 0000: enabled 1

  809 12:23:48.223193    PCI: 00:00.0: enabled 1

  810 12:23:48.226300    PCI: 00:02.0: enabled 1

  811 12:23:48.226383    PCI: 00:04.0: enabled 0

  812 12:23:48.229766    PCI: 00:05.0: enabled 0

  813 12:23:48.232935    PCI: 00:12.0: enabled 1

  814 12:23:48.236454    PCI: 00:12.5: enabled 0

  815 12:23:48.236536    PCI: 00:12.6: enabled 0

  816 12:23:48.239498    PCI: 00:14.0: enabled 1

  817 12:23:48.243038     USB0 port 0: enabled 1

  818 12:23:48.246060      USB2 port 0: enabled 1

  819 12:23:48.249689      USB2 port 1: enabled 1

  820 12:23:48.253060      USB2 port 2: enabled 0

  821 12:23:48.253151      USB2 port 3: enabled 0

  822 12:23:48.256155      USB2 port 5: enabled 0

  823 12:23:48.259266      USB2 port 6: enabled 1

  824 12:23:48.262614      USB2 port 9: enabled 1

  825 12:23:48.266143      USB3 port 0: enabled 1

  826 12:23:48.266227      USB3 port 1: enabled 1

  827 12:23:48.269598      USB3 port 2: enabled 1

  828 12:23:48.272634      USB3 port 3: enabled 1

  829 12:23:48.275821      USB3 port 4: enabled 0

  830 12:23:48.279428    PCI: 00:14.1: enabled 0

  831 12:23:48.282493    PCI: 00:14.3: enabled 1

  832 12:23:48.282610    PCI: 00:14.5: enabled 0

  833 12:23:48.285741    PCI: 00:15.0: enabled 1

  834 12:23:48.289145     I2C: 00:15: enabled 1

  835 12:23:48.292497    PCI: 00:15.1: enabled 1

  836 12:23:48.292581     I2C: 00:5d: enabled 1

  837 12:23:48.296541     GENERIC: 0.0: enabled 1

  838 12:23:48.299566    PCI: 00:15.2: enabled 0

  839 12:23:48.302752    PCI: 00:15.3: enabled 0

  840 12:23:48.306001    PCI: 00:16.0: enabled 1

  841 12:23:48.306084    PCI: 00:16.1: enabled 0

  842 12:23:48.309431    PCI: 00:16.2: enabled 0

  843 12:23:48.312292    PCI: 00:16.3: enabled 0

  844 12:23:48.315978    PCI: 00:16.4: enabled 0

  845 12:23:48.319039    PCI: 00:16.5: enabled 0

  846 12:23:48.319123    PCI: 00:17.0: enabled 1

  847 12:23:48.322484    PCI: 00:19.0: enabled 1

  848 12:23:48.326101     I2C: 00:1a: enabled 1

  849 12:23:48.329377     I2C: 00:38: enabled 1

  850 12:23:48.329460     I2C: 00:39: enabled 1

  851 12:23:48.332502     I2C: 00:3a: enabled 1

  852 12:23:48.336001     I2C: 00:3b: enabled 1

  853 12:23:48.339112    PCI: 00:19.1: enabled 0

  854 12:23:48.342794    PCI: 00:19.2: enabled 0

  855 12:23:48.342877    PCI: 00:1a.0: enabled 0

  856 12:23:48.345745    PCI: 00:1c.0: enabled 0

  857 12:23:48.349311    PCI: 00:1c.1: enabled 0

  858 12:23:48.352406    PCI: 00:1c.2: enabled 0

  859 12:23:48.355448    PCI: 00:1c.3: enabled 0

  860 12:23:48.355531    PCI: 00:1c.4: enabled 0

  861 12:23:48.358923    PCI: 00:1c.5: enabled 0

  862 12:23:48.363020    PCI: 00:1c.6: enabled 0

  863 12:23:48.365602    PCI: 00:1c.7: enabled 0

  864 12:23:48.365686    PCI: 00:1d.0: enabled 1

  865 12:23:48.368871    PCI: 00:1d.1: enabled 0

  866 12:23:48.372604    PCI: 00:1d.2: enabled 0

  867 12:23:48.375573    PCI: 00:1d.3: enabled 0

  868 12:23:48.379076    PCI: 00:1d.4: enabled 0

  869 12:23:48.379159    PCI: 00:1d.5: enabled 1

  870 12:23:48.382500     PCI: 00:00.0: enabled 1

  871 12:23:48.385536    PCI: 00:1e.0: enabled 1

  872 12:23:48.388967    PCI: 00:1e.1: enabled 0

  873 12:23:48.392283    PCI: 00:1e.2: enabled 1

  874 12:23:48.392376     SPI: 00: enabled 1

  875 12:23:48.396097    PCI: 00:1e.3: enabled 1

  876 12:23:48.399070     SPI: 01: enabled 1

  877 12:23:48.402531    PCI: 00:1f.0: enabled 1

  878 12:23:48.402614     PNP: 0c09.0: enabled 1

  879 12:23:48.405778    PCI: 00:1f.1: enabled 1

  880 12:23:48.408767    PCI: 00:1f.2: enabled 1

  881 12:23:48.412173    PCI: 00:1f.3: enabled 1

  882 12:23:48.415195    PCI: 00:1f.4: enabled 1

  883 12:23:48.415278    PCI: 00:1f.5: enabled 1

  884 12:23:48.418788    PCI: 00:1f.6: enabled 0

  885 12:23:48.422177  Root Device scanning...

  886 12:23:48.425523  scan_static_bus for Root Device

  887 12:23:48.428783  CPU_CLUSTER: 0 enabled

  888 12:23:48.428865  DOMAIN: 0000 enabled

  889 12:23:48.431968  DOMAIN: 0000 scanning...

  890 12:23:48.435678  PCI: pci_scan_bus for bus 00

  891 12:23:48.438795  PCI: 00:00.0 [8086/0000] ops

  892 12:23:48.441911  PCI: 00:00.0 [8086/9b61] enabled

  893 12:23:48.445356  PCI: 00:02.0 [8086/0000] bus ops

  894 12:23:48.448621  PCI: 00:02.0 [8086/9b41] enabled

  895 12:23:48.452215  PCI: 00:04.0 [8086/1903] disabled

  896 12:23:48.455090  PCI: 00:08.0 [8086/1911] enabled

  897 12:23:48.458848  PCI: 00:12.0 [8086/02f9] enabled

  898 12:23:48.461822  PCI: 00:14.0 [8086/0000] bus ops

  899 12:23:48.465364  PCI: 00:14.0 [8086/02ed] enabled

  900 12:23:48.468780  PCI: 00:14.2 [8086/02ef] enabled

  901 12:23:48.471795  PCI: 00:14.3 [8086/02f0] enabled

  902 12:23:48.475101  PCI: 00:15.0 [8086/0000] bus ops

  903 12:23:48.478816  PCI: 00:15.0 [8086/02e8] enabled

  904 12:23:48.482009  PCI: 00:15.1 [8086/0000] bus ops

  905 12:23:48.485018  PCI: 00:15.1 [8086/02e9] enabled

  906 12:23:48.488500  PCI: 00:16.0 [8086/0000] ops

  907 12:23:48.492012  PCI: 00:16.0 [8086/02e0] enabled

  908 12:23:48.495436  PCI: 00:17.0 [8086/0000] ops

  909 12:23:48.498527  PCI: 00:17.0 [8086/02d3] enabled

  910 12:23:48.502074  PCI: 00:19.0 [8086/0000] bus ops

  911 12:23:48.505504  PCI: 00:19.0 [8086/02c5] enabled

  912 12:23:48.508888  PCI: 00:1d.0 [8086/0000] bus ops

  913 12:23:48.512148  PCI: 00:1d.0 [8086/02b0] enabled

  914 12:23:48.515365  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  915 12:23:48.518804  PCI: 00:1e.0 [8086/0000] ops

  916 12:23:48.522011  PCI: 00:1e.0 [8086/02a8] enabled

  917 12:23:48.525487  PCI: 00:1e.2 [8086/0000] bus ops

  918 12:23:48.528947  PCI: 00:1e.2 [8086/02aa] enabled

  919 12:23:48.531817  PCI: 00:1e.3 [8086/0000] bus ops

  920 12:23:48.535404  PCI: 00:1e.3 [8086/02ab] enabled

  921 12:23:48.538408  PCI: 00:1f.0 [8086/0000] bus ops

  922 12:23:48.541961  PCI: 00:1f.0 [8086/0284] enabled

  923 12:23:48.548683  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  924 12:23:48.555442  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  925 12:23:48.558678  PCI: 00:1f.3 [8086/0000] bus ops

  926 12:23:48.561831  PCI: 00:1f.3 [8086/02c8] enabled

  927 12:23:48.565334  PCI: 00:1f.4 [8086/0000] bus ops

  928 12:23:48.568567  PCI: 00:1f.4 [8086/02a3] enabled

  929 12:23:48.572297  PCI: 00:1f.5 [8086/0000] bus ops

  930 12:23:48.575144  PCI: 00:1f.5 [8086/02a4] enabled

  931 12:23:48.578299  PCI: Leftover static devices:

  932 12:23:48.578739  PCI: 00:05.0

  933 12:23:48.579191  PCI: 00:12.5

  934 12:23:48.581668  PCI: 00:12.6

  935 12:23:48.582106  PCI: 00:14.1

  936 12:23:48.585220  PCI: 00:14.5

  937 12:23:48.585660  PCI: 00:15.2

  938 12:23:48.588414  PCI: 00:15.3

  939 12:23:48.588855  PCI: 00:16.1

  940 12:23:48.589304  PCI: 00:16.2

  941 12:23:48.591688  PCI: 00:16.3

  942 12:23:48.592124  PCI: 00:16.4

  943 12:23:48.594990  PCI: 00:16.5

  944 12:23:48.595429  PCI: 00:19.1

  945 12:23:48.595877  PCI: 00:19.2

  946 12:23:48.598562  PCI: 00:1a.0

  947 12:23:48.598998  PCI: 00:1c.0

  948 12:23:48.601907  PCI: 00:1c.1

  949 12:23:48.602347  PCI: 00:1c.2

  950 12:23:48.602799  PCI: 00:1c.3

  951 12:23:48.604954  PCI: 00:1c.4

  952 12:23:48.605402  PCI: 00:1c.5

  953 12:23:48.608650  PCI: 00:1c.6

  954 12:23:48.609107  PCI: 00:1c.7

  955 12:23:48.609551  PCI: 00:1d.1

  956 12:23:48.611497  PCI: 00:1d.2

  957 12:23:48.612085  PCI: 00:1d.3

  958 12:23:48.614824  PCI: 00:1d.4

  959 12:23:48.615333  PCI: 00:1d.5

  960 12:23:48.618513  PCI: 00:1e.1

  961 12:23:48.618952  PCI: 00:1f.1

  962 12:23:48.619400  PCI: 00:1f.2

  963 12:23:48.621468  PCI: 00:1f.6

  964 12:23:48.624953  PCI: Check your devicetree.cb.

  965 12:23:48.625391  PCI: 00:02.0 scanning...

  966 12:23:48.631701  scan_generic_bus for PCI: 00:02.0

  967 12:23:48.635222  scan_generic_bus for PCI: 00:02.0 done

  968 12:23:48.638193  scan_bus: scanning of bus PCI: 00:02.0 took 10179 usecs

  969 12:23:48.641952  PCI: 00:14.0 scanning...

  970 12:23:48.645069  scan_static_bus for PCI: 00:14.0

  971 12:23:48.648726  USB0 port 0 enabled

  972 12:23:48.651957  USB0 port 0 scanning...

  973 12:23:48.655043  scan_static_bus for USB0 port 0

  974 12:23:48.655482  USB2 port 0 enabled

  975 12:23:48.658446  USB2 port 1 enabled

  976 12:23:48.661383  USB2 port 2 disabled

  977 12:23:48.661842  USB2 port 3 disabled

  978 12:23:48.664740  USB2 port 5 disabled

  979 12:23:48.665156  USB2 port 6 enabled

  980 12:23:48.668381  USB2 port 9 enabled

  981 12:23:48.671485  USB3 port 0 enabled

  982 12:23:48.671940  USB3 port 1 enabled

  983 12:23:48.674991  USB3 port 2 enabled

  984 12:23:48.678023  USB3 port 3 enabled

  985 12:23:48.678461  USB3 port 4 disabled

  986 12:23:48.681757  USB2 port 0 scanning...

  987 12:23:48.684750  scan_static_bus for USB2 port 0

  988 12:23:48.688159  scan_static_bus for USB2 port 0 done

  989 12:23:48.694871  scan_bus: scanning of bus USB2 port 0 took 9707 usecs

  990 12:23:48.695309  USB2 port 1 scanning...

  991 12:23:48.698365  scan_static_bus for USB2 port 1

  992 12:23:48.704853  scan_static_bus for USB2 port 1 done

  993 12:23:48.708406  scan_bus: scanning of bus USB2 port 1 took 9700 usecs

  994 12:23:48.711730  USB2 port 6 scanning...

  995 12:23:48.715142  scan_static_bus for USB2 port 6

  996 12:23:48.718059  scan_static_bus for USB2 port 6 done

  997 12:23:48.724528  scan_bus: scanning of bus USB2 port 6 took 9707 usecs

  998 12:23:48.725088  USB2 port 9 scanning...

  999 12:23:48.728384  scan_static_bus for USB2 port 9

 1000 12:23:48.734965  scan_static_bus for USB2 port 9 done

 1001 12:23:48.738063  scan_bus: scanning of bus USB2 port 9 took 9700 usecs

 1002 12:23:48.741592  USB3 port 0 scanning...

 1003 12:23:48.744949  scan_static_bus for USB3 port 0

 1004 12:23:48.748357  scan_static_bus for USB3 port 0 done

 1005 12:23:48.754528  scan_bus: scanning of bus USB3 port 0 took 9708 usecs

 1006 12:23:48.755030  USB3 port 1 scanning...

 1007 12:23:48.758507  scan_static_bus for USB3 port 1

 1008 12:23:48.764783  scan_static_bus for USB3 port 1 done

 1009 12:23:48.768841  scan_bus: scanning of bus USB3 port 1 took 9700 usecs

 1010 12:23:48.771804  USB3 port 2 scanning...

 1011 12:23:48.775114  scan_static_bus for USB3 port 2

 1012 12:23:48.778620  scan_static_bus for USB3 port 2 done

 1013 12:23:48.785228  scan_bus: scanning of bus USB3 port 2 took 9708 usecs

 1014 12:23:48.785647  USB3 port 3 scanning...

 1015 12:23:48.788113  scan_static_bus for USB3 port 3

 1016 12:23:48.794725  scan_static_bus for USB3 port 3 done

 1017 12:23:48.798062  scan_bus: scanning of bus USB3 port 3 took 9706 usecs

 1018 12:23:48.801637  scan_static_bus for USB0 port 0 done

 1019 12:23:48.807966  scan_bus: scanning of bus USB0 port 0 took 155474 usecs

 1020 12:23:48.811347  scan_static_bus for PCI: 00:14.0 done

 1021 12:23:48.818328  scan_bus: scanning of bus PCI: 00:14.0 took 173100 usecs

 1022 12:23:48.821198  PCI: 00:15.0 scanning...

 1023 12:23:48.824537  scan_generic_bus for PCI: 00:15.0

 1024 12:23:48.828023  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1025 12:23:48.831579  scan_generic_bus for PCI: 00:15.0 done

 1026 12:23:48.837909  scan_bus: scanning of bus PCI: 00:15.0 took 14314 usecs

 1027 12:23:48.841413  PCI: 00:15.1 scanning...

 1028 12:23:48.844479  scan_generic_bus for PCI: 00:15.1

 1029 12:23:48.847700  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1030 12:23:48.851016  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1031 12:23:48.854684  scan_generic_bus for PCI: 00:15.1 done

 1032 12:23:48.860826  scan_bus: scanning of bus PCI: 00:15.1 took 18590 usecs

 1033 12:23:48.864141  PCI: 00:19.0 scanning...

 1034 12:23:48.867947  scan_generic_bus for PCI: 00:19.0

 1035 12:23:48.870988  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1036 12:23:48.874278  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1037 12:23:48.880747  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1038 12:23:48.884288  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1039 12:23:48.887322  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1040 12:23:48.890813  scan_generic_bus for PCI: 00:19.0 done

 1041 12:23:48.897399  scan_bus: scanning of bus PCI: 00:19.0 took 30728 usecs

 1042 12:23:48.901091  PCI: 00:1d.0 scanning...

 1043 12:23:48.903983  do_pci_scan_bridge for PCI: 00:1d.0

 1044 12:23:48.907350  PCI: pci_scan_bus for bus 01

 1045 12:23:48.910649  PCI: 01:00.0 [1c5c/1327] enabled

 1046 12:23:48.914278  Enabling Common Clock Configuration

 1047 12:23:48.917455  L1 Sub-State supported from root port 29

 1048 12:23:48.920760  L1 Sub-State Support = 0xf

 1049 12:23:48.924103  CommonModeRestoreTime = 0x28

 1050 12:23:48.927257  Power On Value = 0x16, Power On Scale = 0x0

 1051 12:23:48.930524  ASPM: Enabled L1

 1052 12:23:48.937221  scan_bus: scanning of bus PCI: 00:1d.0 took 32788 usecs

 1053 12:23:48.937639  PCI: 00:1e.2 scanning...

 1054 12:23:48.940556  scan_generic_bus for PCI: 00:1e.2

 1055 12:23:48.947393  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1056 12:23:48.950511  scan_generic_bus for PCI: 00:1e.2 done

 1057 12:23:48.953870  scan_bus: scanning of bus PCI: 00:1e.2 took 14004 usecs

 1058 12:23:48.957056  PCI: 00:1e.3 scanning...

 1059 12:23:48.960054  scan_generic_bus for PCI: 00:1e.3

 1060 12:23:48.963338  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1061 12:23:48.970375  scan_generic_bus for PCI: 00:1e.3 done

 1062 12:23:48.973668  scan_bus: scanning of bus PCI: 00:1e.3 took 13999 usecs

 1063 12:23:48.977268  PCI: 00:1f.0 scanning...

 1064 12:23:48.980139  scan_static_bus for PCI: 00:1f.0

 1065 12:23:48.983536  PNP: 0c09.0 enabled

 1066 12:23:48.986657  scan_static_bus for PCI: 00:1f.0 done

 1067 12:23:48.993226  scan_bus: scanning of bus PCI: 00:1f.0 took 12057 usecs

 1068 12:23:48.993648  PCI: 00:1f.3 scanning...

 1069 12:23:49.000189  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs

 1070 12:23:49.003129  PCI: 00:1f.4 scanning...

 1071 12:23:49.006852  scan_generic_bus for PCI: 00:1f.4

 1072 12:23:49.010097  scan_generic_bus for PCI: 00:1f.4 done

 1073 12:23:49.016754  scan_bus: scanning of bus PCI: 00:1f.4 took 10186 usecs

 1074 12:23:49.019863  PCI: 00:1f.5 scanning...

 1075 12:23:49.023646  scan_generic_bus for PCI: 00:1f.5

 1076 12:23:49.026658  scan_generic_bus for PCI: 00:1f.5 done

 1077 12:23:49.033432  scan_bus: scanning of bus PCI: 00:1f.5 took 10197 usecs

 1078 12:23:49.036785  scan_bus: scanning of bus DOMAIN: 0000 took 605129 usecs

 1079 12:23:49.040055  scan_static_bus for Root Device done

 1080 12:23:49.046566  scan_bus: scanning of bus Root Device took 625000 usecs

 1081 12:23:49.047008  done

 1082 12:23:49.049728  Chrome EC: UHEPI supported

 1083 12:23:49.056233  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1084 12:23:49.063353  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1085 12:23:49.069568  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1086 12:23:49.076376  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1087 12:23:49.079666  SPI flash protection: WPSW=0 SRP0=0

 1088 12:23:49.082888  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1089 12:23:49.089797  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2

 1090 12:23:49.092822  found VGA at PCI: 00:02.0

 1091 12:23:49.096365  Setting up VGA for PCI: 00:02.0

 1092 12:23:49.099408  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1093 12:23:49.106370  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1094 12:23:49.109448  Allocating resources...

 1095 12:23:49.109886  Reading resources...

 1096 12:23:49.113004  Root Device read_resources bus 0 link: 0

 1097 12:23:49.119640  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1098 12:23:49.122744  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1099 12:23:49.129411  DOMAIN: 0000 read_resources bus 0 link: 0

 1100 12:23:49.135854  PCI: 00:14.0 read_resources bus 0 link: 0

 1101 12:23:49.139494  USB0 port 0 read_resources bus 0 link: 0

 1102 12:23:49.146964  USB0 port 0 read_resources bus 0 link: 0 done

 1103 12:23:49.149861  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1104 12:23:49.157421  PCI: 00:15.0 read_resources bus 1 link: 0

 1105 12:23:49.160523  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1106 12:23:49.167360  PCI: 00:15.1 read_resources bus 2 link: 0

 1107 12:23:49.170739  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1108 12:23:49.178099  PCI: 00:19.0 read_resources bus 3 link: 0

 1109 12:23:49.184978  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1110 12:23:49.188496  PCI: 00:1d.0 read_resources bus 1 link: 0

 1111 12:23:49.194799  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1112 12:23:49.197810  PCI: 00:1e.2 read_resources bus 4 link: 0

 1113 12:23:49.204887  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1114 12:23:49.207945  PCI: 00:1e.3 read_resources bus 5 link: 0

 1115 12:23:49.214879  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1116 12:23:49.217913  PCI: 00:1f.0 read_resources bus 0 link: 0

 1117 12:23:49.224535  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1118 12:23:49.231063  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1119 12:23:49.234987  Root Device read_resources bus 0 link: 0 done

 1120 12:23:49.237924  Done reading resources.

 1121 12:23:49.241338  Show resources in subtree (Root Device)...After reading.

 1122 12:23:49.247621   Root Device child on link 0 CPU_CLUSTER: 0

 1123 12:23:49.250915    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1124 12:23:49.251402     APIC: 00

 1125 12:23:49.254266     APIC: 03

 1126 12:23:49.254833     APIC: 06

 1127 12:23:49.257880     APIC: 01

 1128 12:23:49.258460     APIC: 02

 1129 12:23:49.258991     APIC: 04

 1130 12:23:49.261509     APIC: 05

 1131 12:23:49.262000     APIC: 07

 1132 12:23:49.264699    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1133 12:23:49.314608    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1134 12:23:49.315576    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1135 12:23:49.316105     PCI: 00:00.0

 1136 12:23:49.316631     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1137 12:23:49.317205     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1138 12:23:49.317721     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1139 12:23:49.356877     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1140 12:23:49.357697     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1141 12:23:49.358564     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1142 12:23:49.359184     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1143 12:23:49.361538     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1144 12:23:49.371190     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1145 12:23:49.377947     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1146 12:23:49.388041     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1147 12:23:49.398033     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1148 12:23:49.408047     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1149 12:23:49.417777     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1150 12:23:49.427582     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1151 12:23:49.437561     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1152 12:23:49.438037     PCI: 00:02.0

 1153 12:23:49.447772     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1154 12:23:49.457449     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1155 12:23:49.467690     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1156 12:23:49.468113     PCI: 00:04.0

 1157 12:23:49.470874     PCI: 00:08.0

 1158 12:23:49.480490     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1159 12:23:49.480917     PCI: 00:12.0

 1160 12:23:49.490810     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1161 12:23:49.497167     PCI: 00:14.0 child on link 0 USB0 port 0

 1162 12:23:49.507130     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1163 12:23:49.510602      USB0 port 0 child on link 0 USB2 port 0

 1164 12:23:49.514200       USB2 port 0

 1165 12:23:49.514653       USB2 port 1

 1166 12:23:49.517113       USB2 port 2

 1167 12:23:49.517524       USB2 port 3

 1168 12:23:49.521189       USB2 port 5

 1169 12:23:49.521603       USB2 port 6

 1170 12:23:49.523846       USB2 port 9

 1171 12:23:49.524260       USB3 port 0

 1172 12:23:49.527290       USB3 port 1

 1173 12:23:49.527724       USB3 port 2

 1174 12:23:49.530766       USB3 port 3

 1175 12:23:49.531213       USB3 port 4

 1176 12:23:49.533779     PCI: 00:14.2

 1177 12:23:49.543708     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1178 12:23:49.553654     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1179 12:23:49.554095     PCI: 00:14.3

 1180 12:23:49.563546     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1181 12:23:49.570242     PCI: 00:15.0 child on link 0 I2C: 01:15

 1182 12:23:49.580407     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1183 12:23:49.580831      I2C: 01:15

 1184 12:23:49.583563     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1185 12:23:49.593369     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1186 12:23:49.596942      I2C: 02:5d

 1187 12:23:49.597403      GENERIC: 0.0

 1188 12:23:49.600462     PCI: 00:16.0

 1189 12:23:49.610291     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 12:23:49.610756     PCI: 00:17.0

 1191 12:23:49.619997     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1192 12:23:49.629945     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1193 12:23:49.636619     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1194 12:23:49.646448     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1195 12:23:49.653065     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1196 12:23:49.662939     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1197 12:23:49.666347     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1198 12:23:49.676634     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1199 12:23:49.679548      I2C: 03:1a

 1200 12:23:49.680039      I2C: 03:38

 1201 12:23:49.683010      I2C: 03:39

 1202 12:23:49.683492      I2C: 03:3a

 1203 12:23:49.686313      I2C: 03:3b

 1204 12:23:49.689601     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1205 12:23:49.699537     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1206 12:23:49.709954     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1207 12:23:49.716167     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1208 12:23:49.719841      PCI: 01:00.0

 1209 12:23:49.729564      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1210 12:23:49.730075     PCI: 00:1e.0

 1211 12:23:49.742767     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1212 12:23:49.752497     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1213 12:23:49.756068     PCI: 00:1e.2 child on link 0 SPI: 00

 1214 12:23:49.766217     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1215 12:23:49.766646      SPI: 00

 1216 12:23:49.769656     PCI: 00:1e.3 child on link 0 SPI: 01

 1217 12:23:49.779384     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1218 12:23:49.782729      SPI: 01

 1219 12:23:49.785912     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1220 12:23:49.795661     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1221 12:23:49.802453     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1222 12:23:49.805839      PNP: 0c09.0

 1223 12:23:49.815852      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1224 12:23:49.816449     PCI: 00:1f.3

 1225 12:23:49.825935     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1226 12:23:49.836060     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1227 12:23:49.839235     PCI: 00:1f.4

 1228 12:23:49.845575     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1229 12:23:49.855602     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1230 12:23:49.859055     PCI: 00:1f.5

 1231 12:23:49.869111     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1232 12:23:49.872608  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1233 12:23:49.879147  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1234 12:23:49.885708  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1235 12:23:49.888990  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1236 12:23:49.895431  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1237 12:23:49.898871  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1238 12:23:49.902488  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1239 12:23:49.908689  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1240 12:23:49.915701  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1241 12:23:49.921886  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1242 12:23:49.931794  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1243 12:23:49.938596  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1244 12:23:49.941819  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1245 12:23:49.948451  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1246 12:23:49.955090  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1247 12:23:49.958157  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1248 12:23:49.964886  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1249 12:23:49.968324  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1250 12:23:49.974667  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1251 12:23:49.978122  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1252 12:23:49.984724  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1253 12:23:49.988458  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1254 12:23:49.994727  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1255 12:23:49.998151  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1256 12:23:50.001254  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1257 12:23:50.008189  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1258 12:23:50.011871  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1259 12:23:50.017991  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1260 12:23:50.021115  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1261 12:23:50.027875  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1262 12:23:50.031368  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1263 12:23:50.038016  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1264 12:23:50.041220  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1265 12:23:50.048099  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1266 12:23:50.051087  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1267 12:23:50.057745  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1268 12:23:50.061227  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1269 12:23:50.071312  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1270 12:23:50.074436  avoid_fixed_resources: DOMAIN: 0000

 1271 12:23:50.078284  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1272 12:23:50.084552  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1273 12:23:50.094441  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1274 12:23:50.101098  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1275 12:23:50.107588  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1276 12:23:50.114271  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1277 12:23:50.123926  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1278 12:23:50.130490  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1279 12:23:50.136900  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1280 12:23:50.146890  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1281 12:23:50.153815  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1282 12:23:50.160308  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1283 12:23:50.163774  Setting resources...

 1284 12:23:50.170302  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1285 12:23:50.173766  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1286 12:23:50.176925  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1287 12:23:50.180486  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1288 12:23:50.183322  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1289 12:23:50.189974  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1290 12:23:50.196865  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1291 12:23:50.203407  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1292 12:23:50.210011  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1293 12:23:50.216780  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1294 12:23:50.219782  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1295 12:23:50.226835  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1296 12:23:50.229772  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1297 12:23:50.236827  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1298 12:23:50.240442  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1299 12:23:50.246828  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1300 12:23:50.250123  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1301 12:23:50.256846  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1302 12:23:50.259600  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1303 12:23:50.266310  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1304 12:23:50.269851  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1305 12:23:50.276443  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1306 12:23:50.279826  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1307 12:23:50.282881  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1308 12:23:50.289475  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1309 12:23:50.292759  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1310 12:23:50.299552  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1311 12:23:50.303022  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1312 12:23:50.309512  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1313 12:23:50.312864  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1314 12:23:50.319473  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1315 12:23:50.323049  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1316 12:23:50.329643  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1317 12:23:50.339550  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1318 12:23:50.346021  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1319 12:23:50.352632  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1320 12:23:50.359858  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1321 12:23:50.366201  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1322 12:23:50.369901  Root Device assign_resources, bus 0 link: 0

 1323 12:23:50.376177  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1324 12:23:50.382626  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1325 12:23:50.392871  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1326 12:23:50.399215  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1327 12:23:50.409676  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1328 12:23:50.416031  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1329 12:23:50.425817  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1330 12:23:50.429302  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1331 12:23:50.432727  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1332 12:23:50.442514  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1333 12:23:50.449231  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1334 12:23:50.459098  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1335 12:23:50.465847  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1336 12:23:50.472452  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1337 12:23:50.475460  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1338 12:23:50.486067  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1339 12:23:50.488800  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1340 12:23:50.492243  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1341 12:23:50.501787  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1342 12:23:50.508630  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1343 12:23:50.518298  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1344 12:23:50.525186  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1345 12:23:50.531678  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1346 12:23:50.541337  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1347 12:23:50.548222  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1348 12:23:50.554886  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1349 12:23:50.561193  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1350 12:23:50.564507  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1351 12:23:50.574375  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1352 12:23:50.584306  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1353 12:23:50.591320  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1354 12:23:50.594399  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1355 12:23:50.604491  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1356 12:23:50.608024  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1357 12:23:50.617876  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1358 12:23:50.624214  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1359 12:23:50.631192  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1360 12:23:50.634513  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1361 12:23:50.644222  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1362 12:23:50.647605  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1363 12:23:50.650759  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1364 12:23:50.657683  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1365 12:23:50.661224  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1366 12:23:50.667915  LPC: Trying to open IO window from 800 size 1ff

 1367 12:23:50.674517  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1368 12:23:50.684073  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1369 12:23:50.690794  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1370 12:23:50.700616  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1371 12:23:50.703831  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1372 12:23:50.710668  Root Device assign_resources, bus 0 link: 0

 1373 12:23:50.710750  Done setting resources.

 1374 12:23:50.717310  Show resources in subtree (Root Device)...After assigning values.

 1375 12:23:50.723593   Root Device child on link 0 CPU_CLUSTER: 0

 1376 12:23:50.727135    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1377 12:23:50.727215     APIC: 00

 1378 12:23:50.730255     APIC: 03

 1379 12:23:50.730334     APIC: 06

 1380 12:23:50.730397     APIC: 01

 1381 12:23:50.733651     APIC: 02

 1382 12:23:50.733730     APIC: 04

 1383 12:23:50.736903     APIC: 05

 1384 12:23:50.736983     APIC: 07

 1385 12:23:50.740111    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1386 12:23:50.750162    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1387 12:23:50.763179    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1388 12:23:50.763260     PCI: 00:00.0

 1389 12:23:50.773431     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1390 12:23:50.783508     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1391 12:23:50.793504     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1392 12:23:50.799808     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1393 12:23:50.810285     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1394 12:23:50.819724     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1395 12:23:50.829319     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1396 12:23:50.839279     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1397 12:23:50.849471     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1398 12:23:50.855895     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1399 12:23:50.866337     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1400 12:23:50.875804     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1401 12:23:50.885885     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1402 12:23:50.895352     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1403 12:23:50.905288     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1404 12:23:50.912044     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1405 12:23:50.915194     PCI: 00:02.0

 1406 12:23:50.925290     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1407 12:23:50.935157     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1408 12:23:50.945268     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1409 12:23:50.948208     PCI: 00:04.0

 1410 12:23:50.948308     PCI: 00:08.0

 1411 12:23:50.958538     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1412 12:23:50.961528     PCI: 00:12.0

 1413 12:23:50.971452     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1414 12:23:50.974876     PCI: 00:14.0 child on link 0 USB0 port 0

 1415 12:23:50.984769     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1416 12:23:50.991670      USB0 port 0 child on link 0 USB2 port 0

 1417 12:23:50.991774       USB2 port 0

 1418 12:23:50.994934       USB2 port 1

 1419 12:23:50.995004       USB2 port 2

 1420 12:23:50.998040       USB2 port 3

 1421 12:23:50.998106       USB2 port 5

 1422 12:23:51.001677       USB2 port 6

 1423 12:23:51.001743       USB2 port 9

 1424 12:23:51.004612       USB3 port 0

 1425 12:23:51.004678       USB3 port 1

 1426 12:23:51.008286       USB3 port 2

 1427 12:23:51.011280       USB3 port 3

 1428 12:23:51.011349       USB3 port 4

 1429 12:23:51.014690     PCI: 00:14.2

 1430 12:23:51.024571     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1431 12:23:51.034627     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1432 12:23:51.034731     PCI: 00:14.3

 1433 12:23:51.044437     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1434 12:23:51.050878     PCI: 00:15.0 child on link 0 I2C: 01:15

 1435 12:23:51.060832     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1436 12:23:51.060912      I2C: 01:15

 1437 12:23:51.067397     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1438 12:23:51.077425     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1439 12:23:51.077503      I2C: 02:5d

 1440 12:23:51.080970      GENERIC: 0.0

 1441 12:23:51.081037     PCI: 00:16.0

 1442 12:23:51.090874     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1443 12:23:51.093869     PCI: 00:17.0

 1444 12:23:51.103894     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1445 12:23:51.113721     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1446 12:23:51.123721     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1447 12:23:51.130721     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1448 12:23:51.140308     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1449 12:23:51.150284     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1450 12:23:51.157034     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1451 12:23:51.166244     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1452 12:23:51.166348      I2C: 03:1a

 1453 12:23:51.169687      I2C: 03:38

 1454 12:23:51.169757      I2C: 03:39

 1455 12:23:51.173005      I2C: 03:3a

 1456 12:23:51.173076      I2C: 03:3b

 1457 12:23:51.179603     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1458 12:23:51.186472     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1459 12:23:51.195966     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1460 12:23:51.209514     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1461 12:23:51.209616      PCI: 01:00.0

 1462 12:23:51.219342      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1463 12:23:51.222297     PCI: 00:1e.0

 1464 12:23:51.232551     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1465 12:23:51.242138     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1466 12:23:51.245852     PCI: 00:1e.2 child on link 0 SPI: 00

 1467 12:23:51.258984     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1468 12:23:51.259093      SPI: 00

 1469 12:23:51.262036     PCI: 00:1e.3 child on link 0 SPI: 01

 1470 12:23:51.272111     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1471 12:23:51.275409      SPI: 01

 1472 12:23:51.278851     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1473 12:23:51.288436     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1474 12:23:51.295111     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1475 12:23:51.298482      PNP: 0c09.0

 1476 12:23:51.304866      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1477 12:23:51.308389     PCI: 00:1f.3

 1478 12:23:51.318363     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1479 12:23:51.328484     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1480 12:23:51.331564     PCI: 00:1f.4

 1481 12:23:51.338005     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1482 12:23:51.351302     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1483 12:23:51.351386     PCI: 00:1f.5

 1484 12:23:51.361209     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1485 12:23:51.364488  Done allocating resources.

 1486 12:23:51.370992  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1487 12:23:51.371074  Enabling resources...

 1488 12:23:51.378903  PCI: 00:00.0 subsystem <- 8086/9b61

 1489 12:23:51.379010  PCI: 00:00.0 cmd <- 06

 1490 12:23:51.382446  PCI: 00:02.0 subsystem <- 8086/9b41

 1491 12:23:51.385245  PCI: 00:02.0 cmd <- 03

 1492 12:23:51.388717  PCI: 00:08.0 cmd <- 06

 1493 12:23:51.392148  PCI: 00:12.0 subsystem <- 8086/02f9

 1494 12:23:51.395313  PCI: 00:12.0 cmd <- 02

 1495 12:23:51.398729  PCI: 00:14.0 subsystem <- 8086/02ed

 1496 12:23:51.401918  PCI: 00:14.0 cmd <- 02

 1497 12:23:51.405283  PCI: 00:14.2 cmd <- 02

 1498 12:23:51.408465  PCI: 00:14.3 subsystem <- 8086/02f0

 1499 12:23:51.408569  PCI: 00:14.3 cmd <- 02

 1500 12:23:51.415757  PCI: 00:15.0 subsystem <- 8086/02e8

 1501 12:23:51.415859  PCI: 00:15.0 cmd <- 02

 1502 12:23:51.418623  PCI: 00:15.1 subsystem <- 8086/02e9

 1503 12:23:51.421939  PCI: 00:15.1 cmd <- 02

 1504 12:23:51.425357  PCI: 00:16.0 subsystem <- 8086/02e0

 1505 12:23:51.428699  PCI: 00:16.0 cmd <- 02

 1506 12:23:51.432119  PCI: 00:17.0 subsystem <- 8086/02d3

 1507 12:23:51.435110  PCI: 00:17.0 cmd <- 03

 1508 12:23:51.438713  PCI: 00:19.0 subsystem <- 8086/02c5

 1509 12:23:51.441706  PCI: 00:19.0 cmd <- 02

 1510 12:23:51.445225  PCI: 00:1d.0 bridge ctrl <- 0013

 1511 12:23:51.448264  PCI: 00:1d.0 subsystem <- 8086/02b0

 1512 12:23:51.451826  PCI: 00:1d.0 cmd <- 06

 1513 12:23:51.455201  PCI: 00:1e.0 subsystem <- 8086/02a8

 1514 12:23:51.458191  PCI: 00:1e.0 cmd <- 06

 1515 12:23:51.461876  PCI: 00:1e.2 subsystem <- 8086/02aa

 1516 12:23:51.461957  PCI: 00:1e.2 cmd <- 06

 1517 12:23:51.468942  PCI: 00:1e.3 subsystem <- 8086/02ab

 1518 12:23:51.469024  PCI: 00:1e.3 cmd <- 02

 1519 12:23:51.471968  PCI: 00:1f.0 subsystem <- 8086/0284

 1520 12:23:51.475346  PCI: 00:1f.0 cmd <- 407

 1521 12:23:51.478377  PCI: 00:1f.3 subsystem <- 8086/02c8

 1522 12:23:51.481908  PCI: 00:1f.3 cmd <- 02

 1523 12:23:51.485188  PCI: 00:1f.4 subsystem <- 8086/02a3

 1524 12:23:51.488424  PCI: 00:1f.4 cmd <- 03

 1525 12:23:51.492007  PCI: 00:1f.5 subsystem <- 8086/02a4

 1526 12:23:51.495013  PCI: 00:1f.5 cmd <- 406

 1527 12:23:51.503716  PCI: 01:00.0 cmd <- 02

 1528 12:23:51.509214  done.

 1529 12:23:51.521320  ME: Version: 14.0.39.1367

 1530 12:23:51.527734  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12

 1531 12:23:51.530924  Initializing devices...

 1532 12:23:51.531109  Root Device init ...

 1533 12:23:51.537871  Chrome EC: Set SMI mask to 0x0000000000000000

 1534 12:23:51.540985  Chrome EC: clear events_b mask to 0x0000000000000000

 1535 12:23:51.548227  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1536 12:23:51.554619  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1537 12:23:51.560906  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1538 12:23:51.564476  Chrome EC: Set WAKE mask to 0x0000000000000000

 1539 12:23:51.567843  Root Device init finished in 35161 usecs

 1540 12:23:51.571273  CPU_CLUSTER: 0 init ...

 1541 12:23:51.577472  CPU_CLUSTER: 0 init finished in 2448 usecs

 1542 12:23:51.581956  PCI: 00:00.0 init ...

 1543 12:23:51.584999  CPU TDP: 15 Watts

 1544 12:23:51.588493  CPU PL2 = 64 Watts

 1545 12:23:51.592127  PCI: 00:00.0 init finished in 7070 usecs

 1546 12:23:51.594986  PCI: 00:02.0 init ...

 1547 12:23:51.598492  PCI: 00:02.0 init finished in 2253 usecs

 1548 12:23:51.601963  PCI: 00:08.0 init ...

 1549 12:23:51.605437  PCI: 00:08.0 init finished in 2251 usecs

 1550 12:23:51.608781  PCI: 00:12.0 init ...

 1551 12:23:51.612085  PCI: 00:12.0 init finished in 2253 usecs

 1552 12:23:51.615395  PCI: 00:14.0 init ...

 1553 12:23:51.618549  PCI: 00:14.0 init finished in 2253 usecs

 1554 12:23:51.621917  PCI: 00:14.2 init ...

 1555 12:23:51.625259  PCI: 00:14.2 init finished in 2252 usecs

 1556 12:23:51.628151  PCI: 00:14.3 init ...

 1557 12:23:51.631829  PCI: 00:14.3 init finished in 2268 usecs

 1558 12:23:51.635126  PCI: 00:15.0 init ...

 1559 12:23:51.638105  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1560 12:23:51.641556  PCI: 00:15.0 init finished in 5974 usecs

 1561 12:23:51.644987  PCI: 00:15.1 init ...

 1562 12:23:51.648595  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1563 12:23:51.651524  PCI: 00:15.1 init finished in 5973 usecs

 1564 12:23:51.655034  PCI: 00:16.0 init ...

 1565 12:23:51.658602  PCI: 00:16.0 init finished in 2252 usecs

 1566 12:23:51.662291  PCI: 00:19.0 init ...

 1567 12:23:51.665739  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1568 12:23:51.672470  PCI: 00:19.0 init finished in 5976 usecs

 1569 12:23:51.672551  PCI: 00:1d.0 init ...

 1570 12:23:51.675714  Initializing PCH PCIe bridge.

 1571 12:23:51.678766  PCI: 00:1d.0 init finished in 5283 usecs

 1572 12:23:51.683932  PCI: 00:1f.0 init ...

 1573 12:23:51.686962  IOAPIC: Initializing IOAPIC at 0xfec00000

 1574 12:23:51.693541  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1575 12:23:51.693621  IOAPIC: ID = 0x02

 1576 12:23:51.696825  IOAPIC: Dumping registers

 1577 12:23:51.700271    reg 0x0000: 0x02000000

 1578 12:23:51.703997    reg 0x0001: 0x00770020

 1579 12:23:51.704077    reg 0x0002: 0x00000000

 1580 12:23:51.710234  PCI: 00:1f.0 init finished in 23528 usecs

 1581 12:23:51.713750  PCI: 00:1f.4 init ...

 1582 12:23:51.716831  PCI: 00:1f.4 init finished in 2261 usecs

 1583 12:23:51.728122  PCI: 01:00.0 init ...

 1584 12:23:51.731341  PCI: 01:00.0 init finished in 2252 usecs

 1585 12:23:51.736189  PNP: 0c09.0 init ...

 1586 12:23:51.739548  Google Chrome EC uptime: 11.106 seconds

 1587 12:23:51.745901  Google Chrome AP resets since EC boot: 0

 1588 12:23:51.748764  Google Chrome most recent AP reset causes:

 1589 12:23:51.755877  Google Chrome EC reset flags at last EC boot: reset-pin

 1590 12:23:51.758979  PNP: 0c09.0 init finished in 20566 usecs

 1591 12:23:51.762417  Devices initialized

 1592 12:23:51.762580  Show all devs... After init.

 1593 12:23:51.765370  Root Device: enabled 1

 1594 12:23:51.768824  CPU_CLUSTER: 0: enabled 1

 1595 12:23:51.772310  DOMAIN: 0000: enabled 1

 1596 12:23:51.772551  APIC: 00: enabled 1

 1597 12:23:51.775900  PCI: 00:00.0: enabled 1

 1598 12:23:51.779137  PCI: 00:02.0: enabled 1

 1599 12:23:51.782737  PCI: 00:04.0: enabled 0

 1600 12:23:51.783077  PCI: 00:05.0: enabled 0

 1601 12:23:51.785797  PCI: 00:12.0: enabled 1

 1602 12:23:51.788948  PCI: 00:12.5: enabled 0

 1603 12:23:51.789462  PCI: 00:12.6: enabled 0

 1604 12:23:51.792268  PCI: 00:14.0: enabled 1

 1605 12:23:51.795783  PCI: 00:14.1: enabled 0

 1606 12:23:51.798656  PCI: 00:14.3: enabled 1

 1607 12:23:51.799213  PCI: 00:14.5: enabled 0

 1608 12:23:51.802073  PCI: 00:15.0: enabled 1

 1609 12:23:51.805884  PCI: 00:15.1: enabled 1

 1610 12:23:51.808846  PCI: 00:15.2: enabled 0

 1611 12:23:51.809293  PCI: 00:15.3: enabled 0

 1612 12:23:51.812085  PCI: 00:16.0: enabled 1

 1613 12:23:51.815150  PCI: 00:16.1: enabled 0

 1614 12:23:51.818539  PCI: 00:16.2: enabled 0

 1615 12:23:51.818947  PCI: 00:16.3: enabled 0

 1616 12:23:51.821962  PCI: 00:16.4: enabled 0

 1617 12:23:51.825765  PCI: 00:16.5: enabled 0

 1618 12:23:51.828529  PCI: 00:17.0: enabled 1

 1619 12:23:51.828941  PCI: 00:19.0: enabled 1

 1620 12:23:51.832009  PCI: 00:19.1: enabled 0

 1621 12:23:51.834887  PCI: 00:19.2: enabled 0

 1622 12:23:51.835398  PCI: 00:1a.0: enabled 0

 1623 12:23:51.838689  PCI: 00:1c.0: enabled 0

 1624 12:23:51.841535  PCI: 00:1c.1: enabled 0

 1625 12:23:51.845105  PCI: 00:1c.2: enabled 0

 1626 12:23:51.845515  PCI: 00:1c.3: enabled 0

 1627 12:23:51.848399  PCI: 00:1c.4: enabled 0

 1628 12:23:51.851674  PCI: 00:1c.5: enabled 0

 1629 12:23:51.855063  PCI: 00:1c.6: enabled 0

 1630 12:23:51.855473  PCI: 00:1c.7: enabled 0

 1631 12:23:51.858629  PCI: 00:1d.0: enabled 1

 1632 12:23:51.861672  PCI: 00:1d.1: enabled 0

 1633 12:23:51.864901  PCI: 00:1d.2: enabled 0

 1634 12:23:51.865310  PCI: 00:1d.3: enabled 0

 1635 12:23:51.868179  PCI: 00:1d.4: enabled 0

 1636 12:23:51.871553  PCI: 00:1d.5: enabled 0

 1637 12:23:51.871964  PCI: 00:1e.0: enabled 1

 1638 12:23:51.875097  PCI: 00:1e.1: enabled 0

 1639 12:23:51.878064  PCI: 00:1e.2: enabled 1

 1640 12:23:51.881753  PCI: 00:1e.3: enabled 1

 1641 12:23:51.882165  PCI: 00:1f.0: enabled 1

 1642 12:23:51.884717  PCI: 00:1f.1: enabled 0

 1643 12:23:51.888292  PCI: 00:1f.2: enabled 0

 1644 12:23:51.891271  PCI: 00:1f.3: enabled 1

 1645 12:23:51.891680  PCI: 00:1f.4: enabled 1

 1646 12:23:51.894676  PCI: 00:1f.5: enabled 1

 1647 12:23:51.898119  PCI: 00:1f.6: enabled 0

 1648 12:23:51.901187  USB0 port 0: enabled 1

 1649 12:23:51.901598  I2C: 01:15: enabled 1

 1650 12:23:51.904477  I2C: 02:5d: enabled 1

 1651 12:23:51.907609  GENERIC: 0.0: enabled 1

 1652 12:23:51.908020  I2C: 03:1a: enabled 1

 1653 12:23:51.911162  I2C: 03:38: enabled 1

 1654 12:23:51.914788  I2C: 03:39: enabled 1

 1655 12:23:51.915199  I2C: 03:3a: enabled 1

 1656 12:23:51.917817  I2C: 03:3b: enabled 1

 1657 12:23:51.921179  PCI: 00:00.0: enabled 1

 1658 12:23:51.921591  SPI: 00: enabled 1

 1659 12:23:51.924291  SPI: 01: enabled 1

 1660 12:23:51.927968  PNP: 0c09.0: enabled 1

 1661 12:23:51.928418  USB2 port 0: enabled 1

 1662 12:23:51.931171  USB2 port 1: enabled 1

 1663 12:23:51.934340  USB2 port 2: enabled 0

 1664 12:23:51.934751  USB2 port 3: enabled 0

 1665 12:23:51.937754  USB2 port 5: enabled 0

 1666 12:23:51.941136  USB2 port 6: enabled 1

 1667 12:23:51.944445  USB2 port 9: enabled 1

 1668 12:23:51.944868  USB3 port 0: enabled 1

 1669 12:23:51.947404  USB3 port 1: enabled 1

 1670 12:23:51.950844  USB3 port 2: enabled 1

 1671 12:23:51.951271  USB3 port 3: enabled 1

 1672 12:23:51.954849  USB3 port 4: enabled 0

 1673 12:23:51.957558  APIC: 03: enabled 1

 1674 12:23:51.957969  APIC: 06: enabled 1

 1675 12:23:51.960945  APIC: 01: enabled 1

 1676 12:23:51.964062  APIC: 02: enabled 1

 1677 12:23:51.964506  APIC: 04: enabled 1

 1678 12:23:51.967426  APIC: 05: enabled 1

 1679 12:23:51.967835  APIC: 07: enabled 1

 1680 12:23:51.970868  PCI: 00:08.0: enabled 1

 1681 12:23:51.973851  PCI: 00:14.2: enabled 1

 1682 12:23:51.977300  PCI: 01:00.0: enabled 1

 1683 12:23:51.980785  Disabling ACPI via APMC:

 1684 12:23:51.981197  done.

 1685 12:23:51.987381  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1686 12:23:51.990842  ELOG: NV offset 0xaf0000 size 0x4000

 1687 12:23:51.997342  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1688 12:23:52.004101  ELOG: Event(17) added with size 13 at 2023-11-08 12:23:52 UTC

 1689 12:23:52.010684  ELOG: Event(92) added with size 9 at 2023-11-08 12:23:52 UTC

 1690 12:23:52.017267  ELOG: Event(93) added with size 9 at 2023-11-08 12:23:52 UTC

 1691 12:23:52.024235  ELOG: Event(9A) added with size 9 at 2023-11-08 12:23:52 UTC

 1692 12:23:52.030528  ELOG: Event(9E) added with size 10 at 2023-11-08 12:23:52 UTC

 1693 12:23:52.037293  ELOG: Event(9F) added with size 14 at 2023-11-08 12:23:52 UTC

 1694 12:23:52.040225  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1695 12:23:52.047719  ELOG: Event(A1) added with size 10 at 2023-11-08 12:23:52 UTC

 1696 12:23:52.057835  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1697 12:23:52.064203  ELOG: Event(A0) added with size 9 at 2023-11-08 12:23:52 UTC

 1698 12:23:52.067568  elog_add_boot_reason: Logged dev mode boot

 1699 12:23:52.068123  Finalize devices...

 1700 12:23:52.071189  PCI: 00:17.0 final

 1701 12:23:52.074296  Devices finalized

 1702 12:23:52.077609  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1703 12:23:52.084379  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1704 12:23:52.087553  ME: HFSTS1                  : 0x90000245

 1705 12:23:52.091225  ME: HFSTS2                  : 0x3B850126

 1706 12:23:52.097707  ME: HFSTS3                  : 0x00000020

 1707 12:23:52.100608  ME: HFSTS4                  : 0x00004800

 1708 12:23:52.104233  ME: HFSTS5                  : 0x00000000

 1709 12:23:52.107216  ME: HFSTS6                  : 0x40400006

 1710 12:23:52.110356  ME: Manufacturing Mode      : NO

 1711 12:23:52.113855  ME: FW Partition Table      : OK

 1712 12:23:52.117236  ME: Bringup Loader Failure  : NO

 1713 12:23:52.120443  ME: Firmware Init Complete  : YES

 1714 12:23:52.124322  ME: Boot Options Present    : NO

 1715 12:23:52.127120  ME: Update In Progress      : NO

 1716 12:23:52.130751  ME: D0i3 Support            : YES

 1717 12:23:52.133521  ME: Low Power State Enabled : NO

 1718 12:23:52.137113  ME: CPU Replaced            : NO

 1719 12:23:52.140258  ME: CPU Replacement Valid   : YES

 1720 12:23:52.143405  ME: Current Working State   : 5

 1721 12:23:52.146837  ME: Current Operation State : 1

 1722 12:23:52.150273  ME: Current Operation Mode  : 0

 1723 12:23:52.153851  ME: Error Code              : 0

 1724 12:23:52.157032  ME: CPU Debug Disabled      : YES

 1725 12:23:52.160316  ME: TXT Support             : NO

 1726 12:23:52.167088  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1727 12:23:52.173173  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1728 12:23:52.173588  CBFS @ c08000 size 3f8000

 1729 12:23:52.179893  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1730 12:23:52.183213  CBFS: Locating 'fallback/dsdt.aml'

 1731 12:23:52.186852  CBFS: Found @ offset 10bb80 size 3fa5

 1732 12:23:52.193232  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1733 12:23:52.196362  CBFS @ c08000 size 3f8000

 1734 12:23:52.199762  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1735 12:23:52.202955  CBFS: Locating 'fallback/slic'

 1736 12:23:52.208295  CBFS: 'fallback/slic' not found.

 1737 12:23:52.214986  ACPI: Writing ACPI tables at 99b3e000.

 1738 12:23:52.215397  ACPI:    * FACS

 1739 12:23:52.218134  ACPI:    * DSDT

 1740 12:23:52.221642  Ramoops buffer: 0x100000@0x99a3d000.

 1741 12:23:52.224503  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1742 12:23:52.231102  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1743 12:23:52.234825  Google Chrome EC: version:

 1744 12:23:52.237898  	ro: helios_v2.0.2659-56403530b

 1745 12:23:52.241224  	rw: helios_v2.0.2849-c41de27e7d

 1746 12:23:52.241634    running image: 1

 1747 12:23:52.245795  ACPI:    * FADT

 1748 12:23:52.246204  SCI is IRQ9

 1749 12:23:52.252119  ACPI: added table 1/32, length now 40

 1750 12:23:52.252603  ACPI:     * SSDT

 1751 12:23:52.255808  Found 1 CPU(s) with 8 core(s) each.

 1752 12:23:52.259139  Error: Could not locate 'wifi_sar' in VPD.

 1753 12:23:52.265388  Checking CBFS for default SAR values

 1754 12:23:52.268666  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1755 12:23:52.271979  CBFS @ c08000 size 3f8000

 1756 12:23:52.278794  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1757 12:23:52.282391  CBFS: Locating 'wifi_sar_defaults.hex'

 1758 12:23:52.285331  CBFS: Found @ offset 5fac0 size 77

 1759 12:23:52.288761  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1760 12:23:52.295129  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1761 12:23:52.298745  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1762 12:23:52.305400  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1763 12:23:52.308500  failed to find key in VPD: dsm_calib_r0_0

 1764 12:23:52.318637  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1765 12:23:52.321582  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1766 12:23:52.325163  failed to find key in VPD: dsm_calib_r0_1

 1767 12:23:52.334927  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1768 12:23:52.341772  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1769 12:23:52.345200  failed to find key in VPD: dsm_calib_r0_2

 1770 12:23:52.355059  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1771 12:23:52.358099  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1772 12:23:52.364878  failed to find key in VPD: dsm_calib_r0_3

 1773 12:23:52.371369  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1774 12:23:52.377926  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1775 12:23:52.381169  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1776 12:23:52.387579  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1777 12:23:52.391492  EC returned error result code 1

 1778 12:23:52.394878  EC returned error result code 1

 1779 12:23:52.398352  EC returned error result code 1

 1780 12:23:52.401348  PS2K: Bad resp from EC. Vivaldi disabled!

 1781 12:23:52.407986  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1782 12:23:52.414887  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1783 12:23:52.418228  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1784 12:23:52.424518  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1785 12:23:52.428024  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1786 12:23:52.434818  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1787 12:23:52.441174  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1788 12:23:52.447850  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1789 12:23:52.451239  ACPI: added table 2/32, length now 44

 1790 12:23:52.451770  ACPI:    * MCFG

 1791 12:23:52.457764  ACPI: added table 3/32, length now 48

 1792 12:23:52.458229  ACPI:    * TPM2

 1793 12:23:52.460904  TPM2 log created at 99a2d000

 1794 12:23:52.464418  ACPI: added table 4/32, length now 52

 1795 12:23:52.467595  ACPI:    * MADT

 1796 12:23:52.468046  SCI is IRQ9

 1797 12:23:52.471001  ACPI: added table 5/32, length now 56

 1798 12:23:52.474072  current = 99b43ac0

 1799 12:23:52.474481  ACPI:    * DMAR

 1800 12:23:52.478066  ACPI: added table 6/32, length now 60

 1801 12:23:52.480765  ACPI:    * IGD OpRegion

 1802 12:23:52.484241  GMA: Found VBT in CBFS

 1803 12:23:52.487371  GMA: Found valid VBT in CBFS

 1804 12:23:52.490597  ACPI: added table 7/32, length now 64

 1805 12:23:52.491009  ACPI:    * HPET

 1806 12:23:52.494224  ACPI: added table 8/32, length now 68

 1807 12:23:52.497161  ACPI: done.

 1808 12:23:52.500808  ACPI tables: 31744 bytes.

 1809 12:23:52.504155  smbios_write_tables: 99a2c000

 1810 12:23:52.507288  EC returned error result code 3

 1811 12:23:52.510789  Couldn't obtain OEM name from CBI

 1812 12:23:52.513991  Create SMBIOS type 17

 1813 12:23:52.517058  PCI: 00:00.0 (Intel Cannonlake)

 1814 12:23:52.517468  PCI: 00:14.3 (Intel WiFi)

 1815 12:23:52.520464  SMBIOS tables: 939 bytes.

 1816 12:23:52.523678  Writing table forward entry at 0x00000500

 1817 12:23:52.530597  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1818 12:23:52.533437  Writing coreboot table at 0x99b62000

 1819 12:23:52.540326   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1820 12:23:52.543703   1. 0000000000001000-000000000009ffff: RAM

 1821 12:23:52.550470   2. 00000000000a0000-00000000000fffff: RESERVED

 1822 12:23:52.553913   3. 0000000000100000-0000000099a2bfff: RAM

 1823 12:23:52.560299   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1824 12:23:52.563160   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1825 12:23:52.570058   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1826 12:23:52.576511   7. 000000009a000000-000000009f7fffff: RESERVED

 1827 12:23:52.579448   8. 00000000e0000000-00000000efffffff: RESERVED

 1828 12:23:52.586362   9. 00000000fc000000-00000000fc000fff: RESERVED

 1829 12:23:52.589779  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1830 12:23:52.592896  11. 00000000fed10000-00000000fed17fff: RESERVED

 1831 12:23:52.599251  12. 00000000fed80000-00000000fed83fff: RESERVED

 1832 12:23:52.602976  13. 00000000fed90000-00000000fed91fff: RESERVED

 1833 12:23:52.609346  14. 00000000feda0000-00000000feda1fff: RESERVED

 1834 12:23:52.613049  15. 0000000100000000-000000045e7fffff: RAM

 1835 12:23:52.615709  Graphics framebuffer located at 0xc0000000

 1836 12:23:52.618883  Passing 5 GPIOs to payload:

 1837 12:23:52.625779              NAME |       PORT | POLARITY |     VALUE

 1838 12:23:52.628992     write protect |  undefined |     high |       low

 1839 12:23:52.635924               lid |  undefined |     high |      high

 1840 12:23:52.642259             power |  undefined |     high |       low

 1841 12:23:52.645814             oprom |  undefined |     high |       low

 1842 12:23:52.652511          EC in RW | 0x000000cb |     high |       low

 1843 12:23:52.652600  Board ID: 4

 1844 12:23:52.658831  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1845 12:23:52.658915  CBFS @ c08000 size 3f8000

 1846 12:23:52.665692  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1847 12:23:52.672086  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa

 1848 12:23:52.675708  coreboot table: 1492 bytes.

 1849 12:23:52.678718  IMD ROOT    0. 99fff000 00001000

 1850 12:23:52.682230  IMD SMALL   1. 99ffe000 00001000

 1851 12:23:52.685677  FSP MEMORY  2. 99c4e000 003b0000

 1852 12:23:52.688968  CONSOLE     3. 99c2e000 00020000

 1853 12:23:52.692246  FMAP        4. 99c2d000 0000054e

 1854 12:23:52.695591  TIME STAMP  5. 99c2c000 00000910

 1855 12:23:52.698746  VBOOT WORK  6. 99c18000 00014000

 1856 12:23:52.702472  MRC DATA    7. 99c16000 00001958

 1857 12:23:52.705497  ROMSTG STCK 8. 99c15000 00001000

 1858 12:23:52.708803  AFTER CAR   9. 99c0b000 0000a000

 1859 12:23:52.712193  RAMSTAGE   10. 99baf000 0005c000

 1860 12:23:52.715983  REFCODE    11. 99b7a000 00035000

 1861 12:23:52.718460  SMM BACKUP 12. 99b6a000 00010000

 1862 12:23:52.722154  COREBOOT   13. 99b62000 00008000

 1863 12:23:52.725146  ACPI       14. 99b3e000 00024000

 1864 12:23:52.728462  ACPI GNVS  15. 99b3d000 00001000

 1865 12:23:52.732189  RAMOOPS    16. 99a3d000 00100000

 1866 12:23:52.735390  TPM2 TCGLOG17. 99a2d000 00010000

 1867 12:23:52.739085  SMBIOS     18. 99a2c000 00000800

 1868 12:23:52.739166  IMD small region:

 1869 12:23:52.745491    IMD ROOT    0. 99ffec00 00000400

 1870 12:23:52.748453    FSP RUNTIME 1. 99ffebe0 00000004

 1871 12:23:52.751751    EC HOSTEVENT 2. 99ffebc0 00000008

 1872 12:23:52.755148    POWER STATE 3. 99ffeb80 00000040

 1873 12:23:52.758332    ROMSTAGE    4. 99ffeb60 00000004

 1874 12:23:52.761724    MEM INFO    5. 99ffe9a0 000001b9

 1875 12:23:52.764916    VPD         6. 99ffe920 0000006c

 1876 12:23:52.768272  MTRR: Physical address space:

 1877 12:23:52.775041  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1878 12:23:52.781692  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1879 12:23:52.787924  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1880 12:23:52.791387  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1881 12:23:52.797879  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1882 12:23:52.804510  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1883 12:23:52.811407  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1884 12:23:52.814505  MTRR: Fixed MSR 0x250 0x0606060606060606

 1885 12:23:52.821368  MTRR: Fixed MSR 0x258 0x0606060606060606

 1886 12:23:52.824766  MTRR: Fixed MSR 0x259 0x0000000000000000

 1887 12:23:52.827853  MTRR: Fixed MSR 0x268 0x0606060606060606

 1888 12:23:52.831312  MTRR: Fixed MSR 0x269 0x0606060606060606

 1889 12:23:52.834433  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1890 12:23:52.840966  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1891 12:23:52.844741  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1892 12:23:52.847875  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1893 12:23:52.850793  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1894 12:23:52.857518  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1895 12:23:52.861035  call enable_fixed_mtrr()

 1896 12:23:52.864175  CPU physical address size: 39 bits

 1897 12:23:52.867769  MTRR: default type WB/UC MTRR counts: 6/8.

 1898 12:23:52.871177  MTRR: WB selected as default type.

 1899 12:23:52.877609  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1900 12:23:52.884107  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1901 12:23:52.890969  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1902 12:23:52.897294  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1903 12:23:52.900801  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1904 12:23:52.907557  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1905 12:23:52.914519  MTRR: Fixed MSR 0x250 0x0606060606060606

 1906 12:23:52.917534  MTRR: Fixed MSR 0x258 0x0606060606060606

 1907 12:23:52.921056  MTRR: Fixed MSR 0x259 0x0000000000000000

 1908 12:23:52.924533  MTRR: Fixed MSR 0x268 0x0606060606060606

 1909 12:23:52.930910  MTRR: Fixed MSR 0x269 0x0606060606060606

 1910 12:23:52.934293  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1911 12:23:52.937936  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1912 12:23:52.940947  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1913 12:23:52.947585  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1914 12:23:52.950631  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1915 12:23:52.954033  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1916 12:23:52.954111  

 1917 12:23:52.957660  MTRR check

 1918 12:23:52.957734  Fixed MTRRs   : Enabled

 1919 12:23:52.960537  Variable MTRRs: Enabled

 1920 12:23:52.960607  

 1921 12:23:52.963919  call enable_fixed_mtrr()

 1922 12:23:52.970666  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1923 12:23:52.974036  CPU physical address size: 39 bits

 1924 12:23:52.977066  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1925 12:23:52.980396  MTRR: Fixed MSR 0x250 0x0606060606060606

 1926 12:23:52.987150  MTRR: Fixed MSR 0x250 0x0606060606060606

 1927 12:23:52.990434  MTRR: Fixed MSR 0x258 0x0606060606060606

 1928 12:23:52.993629  MTRR: Fixed MSR 0x259 0x0000000000000000

 1929 12:23:52.996778  MTRR: Fixed MSR 0x268 0x0606060606060606

 1930 12:23:53.003845  MTRR: Fixed MSR 0x269 0x0606060606060606

 1931 12:23:53.006812  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1932 12:23:53.010412  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1933 12:23:53.013347  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1934 12:23:53.019904  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1935 12:23:53.023557  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1936 12:23:53.026750  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1937 12:23:53.030392  MTRR: Fixed MSR 0x258 0x0606060606060606

 1938 12:23:53.036726  MTRR: Fixed MSR 0x259 0x0000000000000000

 1939 12:23:53.040122  MTRR: Fixed MSR 0x268 0x0606060606060606

 1940 12:23:53.043439  MTRR: Fixed MSR 0x269 0x0606060606060606

 1941 12:23:53.046947  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1942 12:23:53.053217  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1943 12:23:53.056321  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1944 12:23:53.059760  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1945 12:23:53.063137  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1946 12:23:53.069530  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1947 12:23:53.069611  call enable_fixed_mtrr()

 1948 12:23:53.072791  call enable_fixed_mtrr()

 1949 12:23:53.076484  CPU physical address size: 39 bits

 1950 12:23:53.080178  CPU physical address size: 39 bits

 1951 12:23:53.086556  MTRR: Fixed MSR 0x250 0x0606060606060606

 1952 12:23:53.089640  MTRR: Fixed MSR 0x258 0x0606060606060606

 1953 12:23:53.093062  MTRR: Fixed MSR 0x259 0x0000000000000000

 1954 12:23:53.096049  MTRR: Fixed MSR 0x268 0x0606060606060606

 1955 12:23:53.102987  MTRR: Fixed MSR 0x269 0x0606060606060606

 1956 12:23:53.106334  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1957 12:23:53.109311  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1958 12:23:53.112776  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1959 12:23:53.116113  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1960 12:23:53.122736  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1961 12:23:53.126233  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1962 12:23:53.129467  MTRR: Fixed MSR 0x250 0x0606060606060606

 1963 12:23:53.132618  call enable_fixed_mtrr()

 1964 12:23:53.136162  MTRR: Fixed MSR 0x258 0x0606060606060606

 1965 12:23:53.142419  MTRR: Fixed MSR 0x259 0x0000000000000000

 1966 12:23:53.145844  MTRR: Fixed MSR 0x268 0x0606060606060606

 1967 12:23:53.149310  MTRR: Fixed MSR 0x269 0x0606060606060606

 1968 12:23:53.152618  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1969 12:23:53.155955  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1970 12:23:53.162312  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1971 12:23:53.165716  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1972 12:23:53.169314  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1973 12:23:53.172226  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1974 12:23:53.178631  CPU physical address size: 39 bits

 1975 12:23:53.178733  call enable_fixed_mtrr()

 1976 12:23:53.185745  MTRR: Fixed MSR 0x250 0x0606060606060606

 1977 12:23:53.188832  MTRR: Fixed MSR 0x250 0x0606060606060606

 1978 12:23:53.192075  MTRR: Fixed MSR 0x258 0x0606060606060606

 1979 12:23:53.195470  MTRR: Fixed MSR 0x259 0x0000000000000000

 1980 12:23:53.202011  MTRR: Fixed MSR 0x268 0x0606060606060606

 1981 12:23:53.205158  MTRR: Fixed MSR 0x269 0x0606060606060606

 1982 12:23:53.208520  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1983 12:23:53.211839  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1984 12:23:53.218724  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1985 12:23:53.221978  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1986 12:23:53.224981  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1987 12:23:53.228538  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1988 12:23:53.235368  MTRR: Fixed MSR 0x258 0x0606060606060606

 1989 12:23:53.235472  call enable_fixed_mtrr()

 1990 12:23:53.241881  MTRR: Fixed MSR 0x259 0x0000000000000000

 1991 12:23:53.245304  MTRR: Fixed MSR 0x268 0x0606060606060606

 1992 12:23:53.248425  MTRR: Fixed MSR 0x269 0x0606060606060606

 1993 12:23:53.251807  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1994 12:23:53.255559  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1995 12:23:53.261730  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1996 12:23:53.265106  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1997 12:23:53.268475  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1998 12:23:53.272273  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1999 12:23:53.278603  CPU physical address size: 39 bits

 2000 12:23:53.278713  call enable_fixed_mtrr()

 2001 12:23:53.285172  CPU physical address size: 39 bits

 2002 12:23:53.288665  CPU physical address size: 39 bits

 2003 12:23:53.288799  CBFS @ c08000 size 3f8000

 2004 12:23:53.295233  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 2005 12:23:53.298428  CBFS: Locating 'fallback/payload'

 2006 12:23:53.305113  CBFS: Found @ offset 1c96c0 size 3f798

 2007 12:23:53.308435  Checking segment from ROM address 0xffdd16f8

 2008 12:23:53.311535  Checking segment from ROM address 0xffdd1714

 2009 12:23:53.318376  Loading segment from ROM address 0xffdd16f8

 2010 12:23:53.318807    code (compression=0)

 2011 12:23:53.328182    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 2012 12:23:53.338445  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 2013 12:23:53.338905  it's not compressed!

 2014 12:23:53.430996  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2015 12:23:53.437749  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2016 12:23:53.440917  Loading segment from ROM address 0xffdd1714

 2017 12:23:53.444419    Entry Point 0x30000000

 2018 12:23:53.447385  Loaded segments

 2019 12:23:53.453082  Finalizing chipset.

 2020 12:23:53.456623  Finalizing SMM.

 2021 12:23:53.460066  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5

 2022 12:23:53.463448  mp_park_aps done after 0 msecs.

 2023 12:23:53.470081  Jumping to boot code at 30000000(99b62000)

 2024 12:23:53.476647  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2025 12:23:53.477102  

 2026 12:23:53.477487  

 2027 12:23:53.477917  

 2028 12:23:53.479690  Starting depthcharge on Helios...

 2029 12:23:53.480107  

 2030 12:23:53.481240  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2031 12:23:53.481723  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2032 12:23:53.482137  Setting prompt string to ['hatch:']
 2033 12:23:53.482517  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2034 12:23:53.489777  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2035 12:23:53.490226  

 2036 12:23:53.496794  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2037 12:23:53.497206  

 2038 12:23:53.502631  board_setup: Info: eMMC controller not present; skipping

 2039 12:23:53.503312  

 2040 12:23:53.506300  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2041 12:23:53.506716  

 2042 12:23:53.512817  board_setup: Info: SDHCI controller not present; skipping

 2043 12:23:53.513228  

 2044 12:23:53.519495  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2045 12:23:53.519971  

 2046 12:23:53.520294  Wipe memory regions:

 2047 12:23:53.520635  

 2048 12:23:53.522513  	[0x00000000001000, 0x000000000a0000)

 2049 12:23:53.522924  

 2050 12:23:53.526023  	[0x00000000100000, 0x00000030000000)

 2051 12:23:53.592527  

 2052 12:23:53.595265  	[0x00000030657430, 0x00000099a2c000)

 2053 12:23:53.732151  

 2054 12:23:53.735750  	[0x00000100000000, 0x0000045e800000)

 2055 12:23:55.119008  

 2056 12:23:55.119561  R8152: Initializing

 2057 12:23:55.119926  

 2058 12:23:55.122285  Version 9 (ocp_data = 6010)

 2059 12:23:55.126090  

 2060 12:23:55.126643  R8152: Done initializing

 2061 12:23:55.127009  

 2062 12:23:55.129174  Adding net device

 2063 12:23:55.738508  

 2064 12:23:55.738789  R8152: Initializing

 2065 12:23:55.738943  

 2066 12:23:55.742119  Version 6 (ocp_data = 5c30)

 2067 12:23:55.742309  

 2068 12:23:55.745262  R8152: Done initializing

 2069 12:23:55.745439  

 2070 12:23:55.748241  net_add_device: Attemp to include the same device

 2071 12:23:55.752085  

 2072 12:23:55.759201  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2073 12:23:55.759380  

 2074 12:23:55.759475  

 2075 12:23:55.759555  

 2076 12:23:55.759876  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2078 12:23:55.860648  hatch: tftpboot 192.168.201.1 11967649/tftp-deploy-59_fvudr/kernel/bzImage 11967649/tftp-deploy-59_fvudr/kernel/cmdline 11967649/tftp-deploy-59_fvudr/ramdisk/ramdisk.cpio.gz

 2079 12:23:55.861315  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2080 12:23:55.861889  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2081 12:23:55.865961  tftpboot 192.168.201.1 11967649/tftp-deploy-59_fvudr/kernel/bzIploy-59_fvudr/kernel/cmdline 11967649/tftp-deploy-59_fvudr/ramdisk/ramdisk.cpio.gz

 2082 12:23:55.866449  

 2083 12:23:55.866815  Waiting for link

 2084 12:23:56.067188  

 2085 12:23:56.067760  done.

 2086 12:23:56.068133  

 2087 12:23:56.068514  MAC: 00:24:32:50:1a:5f

 2088 12:23:56.068850  

 2089 12:23:56.070441  Sending DHCP discover... done.

 2090 12:23:56.070906  

 2091 12:23:56.073986  Waiting for reply... done.

 2092 12:23:56.074448  

 2093 12:23:56.076983  Sending DHCP request... done.

 2094 12:23:56.077868  

 2095 12:23:56.088355  Waiting for reply... done.

 2096 12:23:56.088918  

 2097 12:23:56.089287  My ip is 192.168.201.21

 2098 12:23:56.089628  

 2099 12:23:56.091422  The DHCP server ip is 192.168.201.1

 2100 12:23:56.094362  

 2101 12:23:56.097997  TFTP server IP predefined by user: 192.168.201.1

 2102 12:23:56.098597  

 2103 12:23:56.104814  Bootfile predefined by user: 11967649/tftp-deploy-59_fvudr/kernel/bzImage

 2104 12:23:56.105439  

 2105 12:23:56.108017  Sending tftp read request... done.

 2106 12:23:56.108531  

 2107 12:23:56.117240  Waiting for the transfer... 

 2108 12:23:56.117781  

 2109 12:23:56.826634  00000000 ################################################################

 2110 12:23:56.827210  

 2111 12:23:57.525079  00080000 ################################################################

 2112 12:23:57.525650  

 2113 12:23:58.227068  00100000 ################################################################

 2114 12:23:58.227633  

 2115 12:23:58.963414  00180000 ################################################################

 2116 12:23:58.964099  

 2117 12:23:59.679681  00200000 ################################################################

 2118 12:23:59.680251  

 2119 12:24:00.411050  00280000 ################################################################

 2120 12:24:00.411639  

 2121 12:24:01.146289  00300000 ################################################################

 2122 12:24:01.146855  

 2123 12:24:01.859048  00380000 ################################################################

 2124 12:24:01.859623  

 2125 12:24:02.596413  00400000 ################################################################

 2126 12:24:02.596980  

 2127 12:24:03.293284  00480000 ################################################################

 2128 12:24:03.293849  

 2129 12:24:03.955702  00500000 ################################################################

 2130 12:24:03.956208  

 2131 12:24:04.630278  00580000 ################################################################

 2132 12:24:04.630978  

 2133 12:24:05.304109  00600000 ################################################################

 2134 12:24:05.304738  

 2135 12:24:05.996675  00680000 ################################################################

 2136 12:24:05.997419  

 2137 12:24:06.700040  00700000 ################################################################

 2138 12:24:06.700788  

 2139 12:24:07.412925  00780000 ################################################################

 2140 12:24:07.413506  

 2141 12:24:08.140983  00800000 ################################################################

 2142 12:24:08.141581  

 2143 12:24:08.854404  00880000 ################################################################

 2144 12:24:08.854982  

 2145 12:24:09.555550  00900000 ################################################################

 2146 12:24:09.555711  

 2147 12:24:10.234155  00980000 ################################################################

 2148 12:24:10.234593  

 2149 12:24:10.915436  00a00000 ################################################################

 2150 12:24:10.915999  

 2151 12:24:11.612861  00a80000 ################################################################

 2152 12:24:11.613439  

 2153 12:24:11.663047  00b00000 ##### done.

 2154 12:24:11.663598  

 2155 12:24:11.666970  The bootfile was 11571200 bytes long.

 2156 12:24:11.667536  

 2157 12:24:11.669694  Sending tftp read request... done.

 2158 12:24:11.670325  

 2159 12:24:11.672895  Waiting for the transfer... 

 2160 12:24:11.673355  

 2161 12:24:12.395534  00000000 ################################################################

 2162 12:24:12.396126  

 2163 12:24:13.046915  00080000 ################################################################

 2164 12:24:13.047066  

 2165 12:24:13.642141  00100000 ################################################################

 2166 12:24:13.642292  

 2167 12:24:14.237950  00180000 ################################################################

 2168 12:24:14.238100  

 2169 12:24:14.833600  00200000 ################################################################

 2170 12:24:14.833752  

 2171 12:24:15.512839  00280000 ################################################################

 2172 12:24:15.513532  

 2173 12:24:16.220481  00300000 ################################################################

 2174 12:24:16.221007  

 2175 12:24:16.923174  00380000 ################################################################

 2176 12:24:16.923797  

 2177 12:24:17.624369  00400000 ################################################################

 2178 12:24:17.624941  

 2179 12:24:18.341600  00480000 ################################################################

 2180 12:24:18.342213  

 2181 12:24:19.061044  00500000 ################################################################

 2182 12:24:19.061705  

 2183 12:24:19.591029  00580000 ################################################ done.

 2184 12:24:19.591544  

 2185 12:24:19.594377  Sending tftp read request... done.

 2186 12:24:19.594788  

 2187 12:24:19.597714  Waiting for the transfer... 

 2188 12:24:19.598126  

 2189 12:24:19.598456  00000000 # done.

 2190 12:24:19.598771  

 2191 12:24:19.607362  Command line loaded dynamically from TFTP file: 11967649/tftp-deploy-59_fvudr/kernel/cmdline

 2192 12:24:19.607794  

 2193 12:24:19.637329  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11967649/extract-nfsrootfs-d8b9d8mq,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2194 12:24:19.637925  

 2195 12:24:19.643977  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2196 12:24:19.647741  

 2197 12:24:19.651125  Shutting down all USB controllers.

 2198 12:24:19.651691  

 2199 12:24:19.652181  Removing current net device

 2200 12:24:19.659120  

 2201 12:24:19.659694  Finalizing coreboot

 2202 12:24:19.660187  

 2203 12:24:19.666036  Exiting depthcharge with code 4 at timestamp: 33575223

 2204 12:24:19.666594  

 2205 12:24:19.666953  

 2206 12:24:19.667286  Starting kernel ...

 2207 12:24:19.667607  

 2208 12:24:19.667919  

 2209 12:24:19.669230  end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
 2210 12:24:19.669740  start: 2.2.5 auto-login-action (timeout 00:04:16) [common]
 2211 12:24:19.670138  Setting prompt string to ['Linux version [0-9]']
 2212 12:24:19.670501  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2213 12:24:19.670871  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2215 12:28:35.670642  end: 2.2.5 auto-login-action (duration 00:04:16) [common]
 2217 12:28:35.671741  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 256 seconds'
 2219 12:28:35.672731  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2222 12:28:35.674159  end: 2 depthcharge-action (duration 00:05:00) [common]
 2224 12:28:35.675320  Cleaning after the job
 2225 12:28:35.675793  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967649/tftp-deploy-59_fvudr/ramdisk
 2226 12:28:35.681025  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967649/tftp-deploy-59_fvudr/kernel
 2227 12:28:35.689891  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967649/tftp-deploy-59_fvudr/nfsrootfs
 2228 12:28:35.806768  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967649/tftp-deploy-59_fvudr/modules
 2229 12:28:35.807682  start: 4.1 power-off (timeout 00:00:30) [common]
 2230 12:28:35.807857  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2231 12:28:35.887842  >> Command sent successfully.

 2232 12:28:35.892750  Returned 0 in 0 seconds
 2233 12:28:35.993813  end: 4.1 power-off (duration 00:00:00) [common]
 2235 12:28:35.995324  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2236 12:28:35.996634  Listened to connection for namespace 'common' for up to 1s
 2238 12:28:35.998015  Listened to connection for namespace 'common' for up to 1s
 2239 12:28:36.996643  Finalising connection for namespace 'common'
 2240 12:28:36.997319  Disconnecting from shell: Finalise
 2241 12:28:36.997730  
 2242 12:28:37.098951  end: 4.2 read-feedback (duration 00:00:01) [common]
 2243 12:28:37.099568  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11967649
 2244 12:28:37.667627  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11967649
 2245 12:28:37.667825  JobError: Your job cannot terminate cleanly.