Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 12:25:10.209086 lava-dispatcher, installed at version: 2023.10
2 12:25:10.209294 start: 0 validate
3 12:25:10.209423 Start time: 2023-11-08 12:25:10.209415+00:00 (UTC)
4 12:25:10.209540 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:25:10.209680 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 12:25:10.471771 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:25:10.471950 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:25:13.973838 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:25:13.974593 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:25:14.243821 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:25:14.244520 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:25:14.750977 validate duration: 4.54
14 12:25:14.751360 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:25:14.751494 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:25:14.751629 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:25:14.751796 Not decompressing ramdisk as can be used compressed.
18 12:25:14.751932 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
19 12:25:14.752033 saving as /var/lib/lava/dispatcher/tmp/11967705/tftp-deploy-zr1z_em9/ramdisk/initrd.cpio.gz
20 12:25:14.752127 total size: 5432480 (5 MB)
21 12:25:14.753610 progress 0 % (0 MB)
22 12:25:14.756116 progress 5 % (0 MB)
23 12:25:14.758374 progress 10 % (0 MB)
24 12:25:14.760577 progress 15 % (0 MB)
25 12:25:14.763063 progress 20 % (1 MB)
26 12:25:14.765421 progress 25 % (1 MB)
27 12:25:14.767712 progress 30 % (1 MB)
28 12:25:14.770209 progress 35 % (1 MB)
29 12:25:14.772420 progress 40 % (2 MB)
30 12:25:14.774622 progress 45 % (2 MB)
31 12:25:14.776804 progress 50 % (2 MB)
32 12:25:14.779243 progress 55 % (2 MB)
33 12:25:14.781415 progress 60 % (3 MB)
34 12:25:14.783594 progress 65 % (3 MB)
35 12:25:14.786036 progress 70 % (3 MB)
36 12:25:14.787460 progress 75 % (3 MB)
37 12:25:14.788843 progress 80 % (4 MB)
38 12:25:14.790298 progress 85 % (4 MB)
39 12:25:14.791852 progress 90 % (4 MB)
40 12:25:14.793271 progress 95 % (4 MB)
41 12:25:14.794709 progress 100 % (5 MB)
42 12:25:14.794921 5 MB downloaded in 0.04 s (121.06 MB/s)
43 12:25:14.795076 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:25:14.795320 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:25:14.795405 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:25:14.795487 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:25:14.795627 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:25:14.795695 saving as /var/lib/lava/dispatcher/tmp/11967705/tftp-deploy-zr1z_em9/kernel/bzImage
50 12:25:14.795754 total size: 11571200 (11 MB)
51 12:25:14.795813 No compression specified
52 12:25:14.796955 progress 0 % (0 MB)
53 12:25:14.800023 progress 5 % (0 MB)
54 12:25:14.803153 progress 10 % (1 MB)
55 12:25:14.806116 progress 15 % (1 MB)
56 12:25:14.809197 progress 20 % (2 MB)
57 12:25:14.812365 progress 25 % (2 MB)
58 12:25:14.815386 progress 30 % (3 MB)
59 12:25:14.818471 progress 35 % (3 MB)
60 12:25:14.821853 progress 40 % (4 MB)
61 12:25:14.824772 progress 45 % (4 MB)
62 12:25:14.827892 progress 50 % (5 MB)
63 12:25:14.831048 progress 55 % (6 MB)
64 12:25:14.834006 progress 60 % (6 MB)
65 12:25:14.837199 progress 65 % (7 MB)
66 12:25:14.840390 progress 70 % (7 MB)
67 12:25:14.843291 progress 75 % (8 MB)
68 12:25:14.846404 progress 80 % (8 MB)
69 12:25:14.849527 progress 85 % (9 MB)
70 12:25:14.852435 progress 90 % (9 MB)
71 12:25:14.855527 progress 95 % (10 MB)
72 12:25:14.858694 progress 100 % (11 MB)
73 12:25:14.858820 11 MB downloaded in 0.06 s (174.99 MB/s)
74 12:25:14.858968 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:25:14.859193 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:25:14.859283 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:25:14.859365 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:25:14.859508 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 12:25:14.859574 saving as /var/lib/lava/dispatcher/tmp/11967705/tftp-deploy-zr1z_em9/nfsrootfs/full.rootfs.tar
81 12:25:14.859634 total size: 207157356 (197 MB)
82 12:25:14.859694 Using unxz to decompress xz
83 12:25:14.863745 progress 0 % (0 MB)
84 12:25:15.456700 progress 5 % (9 MB)
85 12:25:16.009751 progress 10 % (19 MB)
86 12:25:16.671583 progress 15 % (29 MB)
87 12:25:17.053890 progress 20 % (39 MB)
88 12:25:17.447456 progress 25 % (49 MB)
89 12:25:18.064896 progress 30 % (59 MB)
90 12:25:18.638198 progress 35 % (69 MB)
91 12:25:19.261246 progress 40 % (79 MB)
92 12:25:19.836624 progress 45 % (88 MB)
93 12:25:20.461616 progress 50 % (98 MB)
94 12:25:21.118003 progress 55 % (108 MB)
95 12:25:21.856539 progress 60 % (118 MB)
96 12:25:22.005454 progress 65 % (128 MB)
97 12:25:22.149111 progress 70 % (138 MB)
98 12:25:22.245435 progress 75 % (148 MB)
99 12:25:22.318209 progress 80 % (158 MB)
100 12:25:22.389426 progress 85 % (167 MB)
101 12:25:22.490756 progress 90 % (177 MB)
102 12:25:22.775457 progress 95 % (187 MB)
103 12:25:23.377248 progress 100 % (197 MB)
104 12:25:23.383708 197 MB downloaded in 8.52 s (23.18 MB/s)
105 12:25:23.383968 end: 1.3.1 http-download (duration 00:00:09) [common]
107 12:25:23.384232 end: 1.3 download-retry (duration 00:00:09) [common]
108 12:25:23.384323 start: 1.4 download-retry (timeout 00:09:51) [common]
109 12:25:23.384410 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 12:25:23.384562 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:25:23.384634 saving as /var/lib/lava/dispatcher/tmp/11967705/tftp-deploy-zr1z_em9/modules/modules.tar
112 12:25:23.384696 total size: 483720 (0 MB)
113 12:25:23.384760 Using unxz to decompress xz
114 12:25:23.388723 progress 6 % (0 MB)
115 12:25:23.389124 progress 13 % (0 MB)
116 12:25:23.389358 progress 20 % (0 MB)
117 12:25:23.391017 progress 27 % (0 MB)
118 12:25:23.393011 progress 33 % (0 MB)
119 12:25:23.394926 progress 40 % (0 MB)
120 12:25:23.396894 progress 47 % (0 MB)
121 12:25:23.398857 progress 54 % (0 MB)
122 12:25:23.400815 progress 60 % (0 MB)
123 12:25:23.403019 progress 67 % (0 MB)
124 12:25:23.405160 progress 74 % (0 MB)
125 12:25:23.407363 progress 81 % (0 MB)
126 12:25:23.409475 progress 88 % (0 MB)
127 12:25:23.411568 progress 94 % (0 MB)
128 12:25:23.414145 progress 100 % (0 MB)
129 12:25:23.420742 0 MB downloaded in 0.04 s (12.80 MB/s)
130 12:25:23.420996 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:25:23.421314 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:25:23.421408 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 12:25:23.421504 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 12:25:27.067370 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11967705/extract-nfsrootfs-gmik82zk
136 12:25:27.067571 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
137 12:25:27.067673 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 12:25:27.067854 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt
139 12:25:27.067998 makedir: /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin
140 12:25:27.068104 makedir: /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/tests
141 12:25:27.068214 makedir: /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/results
142 12:25:27.068319 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-add-keys
143 12:25:27.068511 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-add-sources
144 12:25:27.068694 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-background-process-start
145 12:25:27.068836 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-background-process-stop
146 12:25:27.068966 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-common-functions
147 12:25:27.069096 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-echo-ipv4
148 12:25:27.069226 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-install-packages
149 12:25:27.069354 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-installed-packages
150 12:25:27.069496 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-os-build
151 12:25:27.069658 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-probe-channel
152 12:25:27.069795 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-probe-ip
153 12:25:27.069933 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-target-ip
154 12:25:27.070060 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-target-mac
155 12:25:27.070208 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-target-storage
156 12:25:27.070366 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-test-case
157 12:25:27.070549 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-test-event
158 12:25:27.070719 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-test-feedback
159 12:25:27.070851 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-test-raise
160 12:25:27.071023 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-test-reference
161 12:25:27.071154 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-test-runner
162 12:25:27.071282 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-test-set
163 12:25:27.071411 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-test-shell
164 12:25:27.071542 Updating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-add-keys (debian)
165 12:25:27.071695 Updating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-add-sources (debian)
166 12:25:27.071839 Updating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-install-packages (debian)
167 12:25:27.071990 Updating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-installed-packages (debian)
168 12:25:27.072144 Updating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/bin/lava-os-build (debian)
169 12:25:27.072271 Creating /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/environment
170 12:25:27.072370 LAVA metadata
171 12:25:27.072442 - LAVA_JOB_ID=11967705
172 12:25:27.072540 - LAVA_DISPATCHER_IP=192.168.201.1
173 12:25:27.072694 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
174 12:25:27.072766 skipped lava-vland-overlay
175 12:25:27.072842 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 12:25:27.072986 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
177 12:25:27.073092 skipped lava-multinode-overlay
178 12:25:27.073199 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 12:25:27.073309 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
180 12:25:27.073415 Loading test definitions
181 12:25:27.073537 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
182 12:25:27.073630 Using /lava-11967705 at stage 0
183 12:25:27.073925 uuid=11967705_1.5.2.3.1 testdef=None
184 12:25:27.074014 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 12:25:27.074099 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
186 12:25:27.074567 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 12:25:27.074788 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
189 12:25:27.075363 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 12:25:27.075670 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
192 12:25:27.076231 runner path: /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/0/tests/0_timesync-off test_uuid 11967705_1.5.2.3.1
193 12:25:27.076401 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 12:25:27.076634 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
196 12:25:27.076707 Using /lava-11967705 at stage 0
197 12:25:27.076808 Fetching tests from https://github.com/kernelci/test-definitions.git
198 12:25:27.076889 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/0/tests/1_kselftest-futex'
199 12:25:30.989295 Running '/usr/bin/git checkout kernelci.org
200 12:25:31.137997 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
201 12:25:31.138737 uuid=11967705_1.5.2.3.5 testdef=None
202 12:25:31.138893 end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
204 12:25:31.139141 start: 1.5.2.3.6 test-overlay (timeout 00:09:44) [common]
205 12:25:31.139906 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 12:25:31.140137 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:44) [common]
208 12:25:31.141209 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 12:25:31.141440 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:44) [common]
211 12:25:31.142480 runner path: /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/0/tests/1_kselftest-futex test_uuid 11967705_1.5.2.3.5
212 12:25:31.142573 BOARD='asus-C436FA-Flip-hatch'
213 12:25:31.142639 BRANCH='cip-gitlab'
214 12:25:31.142729 SKIPFILE='/dev/null'
215 12:25:31.142817 SKIP_INSTALL='True'
216 12:25:31.142902 TESTPROG_URL='None'
217 12:25:31.142990 TST_CASENAME=''
218 12:25:31.143050 TST_CMDFILES='futex'
219 12:25:31.143193 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 12:25:31.143398 Creating lava-test-runner.conf files
222 12:25:31.143462 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11967705/lava-overlay-c9n4itbt/lava-11967705/0 for stage 0
223 12:25:31.143553 - 0_timesync-off
224 12:25:31.143621 - 1_kselftest-futex
225 12:25:31.143720 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
226 12:25:31.143806 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
227 12:25:39.000696 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
228 12:25:39.000881 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
229 12:25:39.000969 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 12:25:39.001067 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
231 12:25:39.001154 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
232 12:25:39.143043 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 12:25:39.143429 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
234 12:25:39.143546 extracting modules file /var/lib/lava/dispatcher/tmp/11967705/tftp-deploy-zr1z_em9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967705/extract-nfsrootfs-gmik82zk
235 12:25:39.164549 extracting modules file /var/lib/lava/dispatcher/tmp/11967705/tftp-deploy-zr1z_em9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967705/extract-overlay-ramdisk-36jx17mt/ramdisk
236 12:25:39.185447 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 12:25:39.185714 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
238 12:25:39.185813 [common] Applying overlay to NFS
239 12:25:39.185887 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11967705/compress-overlay-9zoqoql4/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11967705/extract-nfsrootfs-gmik82zk
240 12:25:40.162590 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 12:25:40.162755 start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
242 12:25:40.162854 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 12:25:40.162946 start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
244 12:25:40.163030 Building ramdisk /var/lib/lava/dispatcher/tmp/11967705/extract-overlay-ramdisk-36jx17mt/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11967705/extract-overlay-ramdisk-36jx17mt/ramdisk
245 12:25:40.247736 >> 30353 blocks
246 12:25:40.862911 rename /var/lib/lava/dispatcher/tmp/11967705/extract-overlay-ramdisk-36jx17mt/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11967705/tftp-deploy-zr1z_em9/ramdisk/ramdisk.cpio.gz
247 12:25:40.863365 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 12:25:40.863487 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
249 12:25:40.863592 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
250 12:25:40.863694 No mkimage arch provided, not using FIT.
251 12:25:40.863785 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 12:25:40.863871 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 12:25:40.863979 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
254 12:25:40.864072 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
255 12:25:40.864153 No LXC device requested
256 12:25:40.864232 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 12:25:40.864329 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
258 12:25:40.864414 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 12:25:40.864492 Checking files for TFTP limit of 4294967296 bytes.
260 12:25:40.864916 end: 1 tftp-deploy (duration 00:00:26) [common]
261 12:25:40.865018 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 12:25:40.865114 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 12:25:40.865252 substitutions:
264 12:25:40.865322 - {DTB}: None
265 12:25:40.865385 - {INITRD}: 11967705/tftp-deploy-zr1z_em9/ramdisk/ramdisk.cpio.gz
266 12:25:40.865446 - {KERNEL}: 11967705/tftp-deploy-zr1z_em9/kernel/bzImage
267 12:25:40.865504 - {LAVA_MAC}: None
268 12:25:40.865561 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11967705/extract-nfsrootfs-gmik82zk
269 12:25:40.865635 - {NFS_SERVER_IP}: 192.168.201.1
270 12:25:40.865693 - {PRESEED_CONFIG}: None
271 12:25:40.865749 - {PRESEED_LOCAL}: None
272 12:25:40.865805 - {RAMDISK}: 11967705/tftp-deploy-zr1z_em9/ramdisk/ramdisk.cpio.gz
273 12:25:40.865860 - {ROOT_PART}: None
274 12:25:40.865915 - {ROOT}: None
275 12:25:40.865969 - {SERVER_IP}: 192.168.201.1
276 12:25:40.866024 - {TEE}: None
277 12:25:40.866077 Parsed boot commands:
278 12:25:40.866131 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 12:25:40.866313 Parsed boot commands: tftpboot 192.168.201.1 11967705/tftp-deploy-zr1z_em9/kernel/bzImage 11967705/tftp-deploy-zr1z_em9/kernel/cmdline 11967705/tftp-deploy-zr1z_em9/ramdisk/ramdisk.cpio.gz
280 12:25:40.866403 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 12:25:40.866489 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 12:25:40.866584 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 12:25:40.866675 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 12:25:40.866750 Not connected, no need to disconnect.
285 12:25:40.866824 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 12:25:40.866906 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 12:25:40.866973 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
288 12:25:40.870940 Setting prompt string to ['lava-test: # ']
289 12:25:40.871321 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 12:25:40.871434 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 12:25:40.871538 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 12:25:40.871632 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 12:25:40.871833 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
294 12:25:46.005159 >> Command sent successfully.
295 12:25:46.008094 Returned 0 in 5 seconds
296 12:25:46.108510 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 12:25:46.108834 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 12:25:46.108942 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 12:25:46.109033 Setting prompt string to 'Starting depthcharge on Helios...'
301 12:25:46.109104 Changing prompt to 'Starting depthcharge on Helios...'
302 12:25:46.109174 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
303 12:25:46.109427 [Enter `^Ec?' for help]
304 12:25:46.730545
305 12:25:46.730714
306 12:25:46.740635 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 12:25:46.744692 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 12:25:46.750838 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 12:25:46.754109 CPU: AES supported, TXT NOT supported, VT supported
310 12:25:46.761350 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 12:25:46.764054 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 12:25:46.770858 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 12:25:46.774315 VBOOT: Loading verstage.
314 12:25:46.777527 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 12:25:46.784139 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 12:25:46.787897 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 12:25:46.791113 CBFS @ c08000 size 3f8000
318 12:25:46.797532 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 12:25:46.800738 CBFS: Locating 'fallback/verstage'
320 12:25:46.804075 CBFS: Found @ offset 10fb80 size 1072c
321 12:25:46.807821
322 12:25:46.807933
323 12:25:46.817410 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 12:25:46.831770 Probing TPM: . done!
325 12:25:46.834878 TPM ready after 0 ms
326 12:25:46.838288 Connected to device vid:did:rid of 1ae0:0028:00
327 12:25:46.848613 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
328 12:25:46.887761 Initialized TPM device CR50 revision 0
329 12:25:46.896862 tlcl_send_startup: Startup return code is 0
330 12:25:46.896987 TPM: setup succeeded
331 12:25:46.909444 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 12:25:46.912808 Chrome EC: UHEPI supported
333 12:25:46.916312 Phase 1
334 12:25:46.919625 FMAP: area GBB found @ c05000 (12288 bytes)
335 12:25:46.926393 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
336 12:25:46.926513 Phase 2
337 12:25:46.929466 Phase 3
338 12:25:46.933362 FMAP: area GBB found @ c05000 (12288 bytes)
339 12:25:46.939374 VB2:vb2_report_dev_firmware() This is developer signed firmware
340 12:25:46.946438 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
341 12:25:46.949914 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
342 12:25:46.956096 VB2:vb2_verify_keyblock() Checking keyblock signature...
343 12:25:46.971966 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
344 12:25:46.975366 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
345 12:25:46.981356 VB2:vb2_verify_fw_preamble() Verifying preamble.
346 12:25:46.986100 Phase 4
347 12:25:46.989329 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
348 12:25:46.995811 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
349 12:25:47.175157 VB2:vb2_rsa_verify_digest() Digest check failed!
350 12:25:47.182108 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
351 12:25:47.182207 Saving nvdata
352 12:25:47.185380 Reboot requested (10020007)
353 12:25:47.188787 board_reset() called!
354 12:25:47.188893 full_reset() called!
355 12:25:51.697191
356 12:25:51.697352
357 12:25:51.707121 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
358 12:25:51.710399 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
359 12:25:51.716978 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
360 12:25:51.720383 CPU: AES supported, TXT NOT supported, VT supported
361 12:25:51.727364 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
362 12:25:51.730300 PCH: device id 0284 (rev 00) is Cometlake-U Premium
363 12:25:51.737307 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
364 12:25:51.740554 VBOOT: Loading verstage.
365 12:25:51.743480 FMAP: Found "FLASH" version 1.1 at 0xc04000.
366 12:25:51.750649 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
367 12:25:51.756854 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 12:25:51.756955 CBFS @ c08000 size 3f8000
369 12:25:51.763425 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 12:25:51.766793 CBFS: Locating 'fallback/verstage'
371 12:25:51.770150 CBFS: Found @ offset 10fb80 size 1072c
372 12:25:51.774079
373 12:25:51.774167
374 12:25:51.783959 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
375 12:25:51.798396 Probing TPM: . done!
376 12:25:51.801897 TPM ready after 0 ms
377 12:25:51.805168 Connected to device vid:did:rid of 1ae0:0028:00
378 12:25:51.815164 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
379 12:25:51.819221 Initialized TPM device CR50 revision 0
380 12:25:51.863505 tlcl_send_startup: Startup return code is 0
381 12:25:51.863642 TPM: setup succeeded
382 12:25:51.876081 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
383 12:25:51.879723 Chrome EC: UHEPI supported
384 12:25:51.883164 Phase 1
385 12:25:51.886542 FMAP: area GBB found @ c05000 (12288 bytes)
386 12:25:51.892838 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
387 12:25:51.899501 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
388 12:25:51.903262 Recovery requested (1009000e)
389 12:25:51.908646 Saving nvdata
390 12:25:51.914668 tlcl_extend: response is 0
391 12:25:51.923445 tlcl_extend: response is 0
392 12:25:51.930244 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
393 12:25:51.933539 CBFS @ c08000 size 3f8000
394 12:25:51.940169 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
395 12:25:51.943468 CBFS: Locating 'fallback/romstage'
396 12:25:51.947139 CBFS: Found @ offset 80 size 145fc
397 12:25:51.950265 Accumulated console time in verstage 98 ms
398 12:25:51.950352
399 12:25:51.950419
400 12:25:51.963788 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
401 12:25:51.970226 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
402 12:25:51.973560 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
403 12:25:51.976778 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
404 12:25:51.983628 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
405 12:25:51.987166 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
406 12:25:51.990179 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
407 12:25:51.993678 TCO_STS: 0000 0000
408 12:25:51.996742 GEN_PMCON: e0015238 00000200
409 12:25:51.999939 GBLRST_CAUSE: 00000000 00000000
410 12:25:52.000018 prev_sleep_state 5
411 12:25:52.003364 Boot Count incremented to 326
412 12:25:52.009847 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
413 12:25:52.013615 CBFS @ c08000 size 3f8000
414 12:25:52.016815 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
415 12:25:52.019938 CBFS: Locating 'fspm.bin'
416 12:25:52.023301 CBFS: Found @ offset 5ffc0 size 71000
417 12:25:52.027289 Chrome EC: UHEPI supported
418 12:25:52.034762 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
419 12:25:52.040087 Probing TPM: done!
420 12:25:52.046809 Connected to device vid:did:rid of 1ae0:0028:00
421 12:25:52.056438 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
422 12:25:52.061977 Initialized TPM device CR50 revision 0
423 12:25:52.071284 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 12:25:52.077746 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
425 12:25:52.081053 MRC cache found, size 1948
426 12:25:52.084500 bootmode is set to: 2
427 12:25:52.087766 PRMRR disabled by config.
428 12:25:52.087865 SPD INDEX = 1
429 12:25:52.094173 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
430 12:25:52.097924 CBFS @ c08000 size 3f8000
431 12:25:52.104773 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
432 12:25:52.104858 CBFS: Locating 'spd.bin'
433 12:25:52.108032 CBFS: Found @ offset 5fb80 size 400
434 12:25:52.111024 SPD: module type is LPDDR3
435 12:25:52.114739 SPD: module part is
436 12:25:52.121358 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
437 12:25:52.124447 SPD: device width 4 bits, bus width 8 bits
438 12:25:52.127792 SPD: module size is 4096 MB (per channel)
439 12:25:52.130876 memory slot: 0 configuration done.
440 12:25:52.133971 memory slot: 2 configuration done.
441 12:25:52.186390 CBMEM:
442 12:25:52.189740 IMD: root @ 99fff000 254 entries.
443 12:25:52.193026 IMD: root @ 99ffec00 62 entries.
444 12:25:52.196297 External stage cache:
445 12:25:52.199568 IMD: root @ 9abff000 254 entries.
446 12:25:52.202838 IMD: root @ 9abfec00 62 entries.
447 12:25:52.205983 Chrome EC: clear events_b mask to 0x0000000020004000
448 12:25:52.222507 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
449 12:25:52.235774 tlcl_write: response is 0
450 12:25:52.245188 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
451 12:25:52.251856 MRC: TPM MRC hash updated successfully.
452 12:25:52.251941 2 DIMMs found
453 12:25:52.255277 SMM Memory Map
454 12:25:52.257999 SMRAM : 0x9a000000 0x1000000
455 12:25:52.261327 Subregion 0: 0x9a000000 0xa00000
456 12:25:52.264602 Subregion 1: 0x9aa00000 0x200000
457 12:25:52.267911 Subregion 2: 0x9ac00000 0x400000
458 12:25:52.271286 top_of_ram = 0x9a000000
459 12:25:52.274411 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
460 12:25:52.281601 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
461 12:25:52.284980 MTRR Range: Start=ff000000 End=0 (Size 1000000)
462 12:25:52.291014 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 12:25:52.294418 CBFS @ c08000 size 3f8000
464 12:25:52.297810 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 12:25:52.301101 CBFS: Locating 'fallback/postcar'
466 12:25:52.307818 CBFS: Found @ offset 107000 size 4b44
467 12:25:52.311162 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
468 12:25:52.323942 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
469 12:25:52.327112 Processing 180 relocs. Offset value of 0x97c0c000
470 12:25:52.335561 Accumulated console time in romstage 285 ms
471 12:25:52.335675
472 12:25:52.335771
473 12:25:52.345462 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
474 12:25:52.352426 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
475 12:25:52.355433 CBFS @ c08000 size 3f8000
476 12:25:52.358543 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
477 12:25:52.365473 CBFS: Locating 'fallback/ramstage'
478 12:25:52.368692 CBFS: Found @ offset 43380 size 1b9e8
479 12:25:52.375496 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
480 12:25:52.407227 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
481 12:25:52.410461 Processing 3976 relocs. Offset value of 0x98db0000
482 12:25:52.417060 Accumulated console time in postcar 52 ms
483 12:25:52.417168
484 12:25:52.417261
485 12:25:52.427173 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
486 12:25:52.433649 FMAP: area RO_VPD found @ c00000 (16384 bytes)
487 12:25:52.436997 WARNING: RO_VPD is uninitialized or empty.
488 12:25:52.440199 FMAP: area RW_VPD found @ af8000 (8192 bytes)
489 12:25:52.446924 FMAP: area RW_VPD found @ af8000 (8192 bytes)
490 12:25:52.447016 Normal boot.
491 12:25:52.453404 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
492 12:25:52.456764 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 12:25:52.460613 CBFS @ c08000 size 3f8000
494 12:25:52.466842 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 12:25:52.470131 CBFS: Locating 'cpu_microcode_blob.bin'
496 12:25:52.473365 CBFS: Found @ offset 14700 size 2ec00
497 12:25:52.477175 microcode: sig=0x806ec pf=0x4 revision=0xc9
498 12:25:52.479923 Skip microcode update
499 12:25:52.486581 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
500 12:25:52.486675 CBFS @ c08000 size 3f8000
501 12:25:52.493603 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
502 12:25:52.496529 CBFS: Locating 'fsps.bin'
503 12:25:52.500279 CBFS: Found @ offset d1fc0 size 35000
504 12:25:52.525325 Detected 4 core, 8 thread CPU.
505 12:25:52.528683 Setting up SMI for CPU
506 12:25:52.531929 IED base = 0x9ac00000
507 12:25:52.532036 IED size = 0x00400000
508 12:25:52.535228 Will perform SMM setup.
509 12:25:52.542215 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
510 12:25:52.548514 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
511 12:25:52.551754 Processing 16 relocs. Offset value of 0x00030000
512 12:25:52.555640 Attempting to start 7 APs
513 12:25:52.558922 Waiting for 10ms after sending INIT.
514 12:25:52.574862 Waiting for 1st SIPI to complete...done.
515 12:25:52.574953 AP: slot 3 apic_id 1.
516 12:25:52.581487 Waiting for 2nd SIPI to complete...done.
517 12:25:52.581608 AP: slot 5 apic_id 5.
518 12:25:52.585182 AP: slot 6 apic_id 4.
519 12:25:52.588644 AP: slot 4 apic_id 2.
520 12:25:52.588748 AP: slot 1 apic_id 3.
521 12:25:52.591981 AP: slot 2 apic_id 6.
522 12:25:52.595283 AP: slot 7 apic_id 7.
523 12:25:52.601457 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
524 12:25:52.605063 Processing 13 relocs. Offset value of 0x00038000
525 12:25:52.611377 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
526 12:25:52.617981 Installing SMM handler to 0x9a000000
527 12:25:52.624706 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
528 12:25:52.628003 Processing 658 relocs. Offset value of 0x9a010000
529 12:25:52.637863 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
530 12:25:52.641624 Processing 13 relocs. Offset value of 0x9a008000
531 12:25:52.648049 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
532 12:25:52.655027 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
533 12:25:52.658362 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
534 12:25:52.664805 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
535 12:25:52.671417 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
536 12:25:52.678215 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
537 12:25:52.681372 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
538 12:25:52.687808 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
539 12:25:52.691573 Clearing SMI status registers
540 12:25:52.694409 SMI_STS: PM1
541 12:25:52.694495 PM1_STS: PWRBTN
542 12:25:52.697734 TCO_STS: SECOND_TO
543 12:25:52.701154 New SMBASE 0x9a000000
544 12:25:52.704528 In relocation handler: CPU 0
545 12:25:52.707690 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
546 12:25:52.711014 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 12:25:52.714693 Relocation complete.
548 12:25:52.717779 New SMBASE 0x99fff400
549 12:25:52.717863 In relocation handler: CPU 3
550 12:25:52.724549 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
551 12:25:52.727933 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 12:25:52.731061 Relocation complete.
553 12:25:52.731145 New SMBASE 0x99fffc00
554 12:25:52.734392 In relocation handler: CPU 1
555 12:25:52.741165 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
556 12:25:52.744479 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 12:25:52.747715 Relocation complete.
558 12:25:52.747841 New SMBASE 0x99fff000
559 12:25:52.751135 In relocation handler: CPU 4
560 12:25:52.757564 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
561 12:25:52.761293 Writing SMRR. base = 0x9a000006, mask=0xff000800
562 12:25:52.764475 Relocation complete.
563 12:25:52.764562 New SMBASE 0x99fff800
564 12:25:52.767756 In relocation handler: CPU 2
565 12:25:52.771472 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
566 12:25:52.778078 Writing SMRR. base = 0x9a000006, mask=0xff000800
567 12:25:52.781159 Relocation complete.
568 12:25:52.781281 New SMBASE 0x99ffe400
569 12:25:52.784225 In relocation handler: CPU 7
570 12:25:52.787550 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
571 12:25:52.794683 Writing SMRR. base = 0x9a000006, mask=0xff000800
572 12:25:52.794786 Relocation complete.
573 12:25:52.797934 New SMBASE 0x99ffe800
574 12:25:52.801208 In relocation handler: CPU 6
575 12:25:52.804580 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
576 12:25:52.810642 Writing SMRR. base = 0x9a000006, mask=0xff000800
577 12:25:52.810729 Relocation complete.
578 12:25:52.814548 New SMBASE 0x99ffec00
579 12:25:52.817759 In relocation handler: CPU 5
580 12:25:52.820987 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
581 12:25:52.827796 Writing SMRR. base = 0x9a000006, mask=0xff000800
582 12:25:52.827884 Relocation complete.
583 12:25:52.831170 Initializing CPU #0
584 12:25:52.834510 CPU: vendor Intel device 806ec
585 12:25:52.837556 CPU: family 06, model 8e, stepping 0c
586 12:25:52.841017 Clearing out pending MCEs
587 12:25:52.844322 Setting up local APIC...
588 12:25:52.844433 apic_id: 0x00 done.
589 12:25:52.847620 Turbo is available but hidden
590 12:25:52.850973 Turbo is available and visible
591 12:25:52.854097 VMX status: enabled
592 12:25:52.857443 IA32_FEATURE_CONTROL status: locked
593 12:25:52.860756 Skip microcode update
594 12:25:52.860909 CPU #0 initialized
595 12:25:52.864054 Initializing CPU #3
596 12:25:52.864139 Initializing CPU #6
597 12:25:52.867305 Initializing CPU #7
598 12:25:52.870391 Initializing CPU #2
599 12:25:52.873830 CPU: vendor Intel device 806ec
600 12:25:52.877022 CPU: family 06, model 8e, stepping 0c
601 12:25:52.880776 CPU: vendor Intel device 806ec
602 12:25:52.883849 CPU: family 06, model 8e, stepping 0c
603 12:25:52.887007 Clearing out pending MCEs
604 12:25:52.887093 Clearing out pending MCEs
605 12:25:52.890722 Setting up local APIC...
606 12:25:52.893796 Initializing CPU #5
607 12:25:52.896965 Setting up local APIC...
608 12:25:52.897056 Initializing CPU #1
609 12:25:52.900722 Initializing CPU #4
610 12:25:52.903812 CPU: vendor Intel device 806ec
611 12:25:52.907042 CPU: family 06, model 8e, stepping 0c
612 12:25:52.910133 CPU: vendor Intel device 806ec
613 12:25:52.913570 CPU: family 06, model 8e, stepping 0c
614 12:25:52.916753 Clearing out pending MCEs
615 12:25:52.920402 Clearing out pending MCEs
616 12:25:52.920487 Setting up local APIC...
617 12:25:52.923612 CPU: vendor Intel device 806ec
618 12:25:52.926811 CPU: family 06, model 8e, stepping 0c
619 12:25:52.930029 CPU: vendor Intel device 806ec
620 12:25:52.933541 CPU: family 06, model 8e, stepping 0c
621 12:25:52.937055 Clearing out pending MCEs
622 12:25:52.940138 CPU: vendor Intel device 806ec
623 12:25:52.943296 CPU: family 06, model 8e, stepping 0c
624 12:25:52.946612 Clearing out pending MCEs
625 12:25:52.949820 apic_id: 0x06 done.
626 12:25:52.949907 apic_id: 0x07 done.
627 12:25:52.953686 VMX status: enabled
628 12:25:52.956437 VMX status: enabled
629 12:25:52.960067 IA32_FEATURE_CONTROL status: locked
630 12:25:52.963196 IA32_FEATURE_CONTROL status: locked
631 12:25:52.966447 Skip microcode update
632 12:25:52.966534 Skip microcode update
633 12:25:52.970415 apic_id: 0x03 done.
634 12:25:52.973555 Setting up local APIC...
635 12:25:52.973649 Setting up local APIC...
636 12:25:52.976713 CPU #2 initialized
637 12:25:52.980040 CPU #7 initialized
638 12:25:52.980134 VMX status: enabled
639 12:25:52.983584 apic_id: 0x02 done.
640 12:25:52.986646 IA32_FEATURE_CONTROL status: locked
641 12:25:52.986733 VMX status: enabled
642 12:25:52.990245 Skip microcode update
643 12:25:52.993120 IA32_FEATURE_CONTROL status: locked
644 12:25:52.996757 CPU #1 initialized
645 12:25:52.999781 Skip microcode update
646 12:25:52.999901 apic_id: 0x01 done.
647 12:25:53.003233 Setting up local APIC...
648 12:25:53.006777 CPU #4 initialized
649 12:25:53.006865 apic_id: 0x05 done.
650 12:25:53.009883 Clearing out pending MCEs
651 12:25:53.012945 VMX status: enabled
652 12:25:53.013033 Setting up local APIC...
653 12:25:53.016676 VMX status: enabled
654 12:25:53.019887 IA32_FEATURE_CONTROL status: locked
655 12:25:53.023153 apic_id: 0x04 done.
656 12:25:53.023237 Skip microcode update
657 12:25:53.026208 VMX status: enabled
658 12:25:53.029360 CPU #5 initialized
659 12:25:53.033303 IA32_FEATURE_CONTROL status: locked
660 12:25:53.036574 IA32_FEATURE_CONTROL status: locked
661 12:25:53.036661 Skip microcode update
662 12:25:53.039705 Skip microcode update
663 12:25:53.043206 CPU #6 initialized
664 12:25:53.043284 CPU #3 initialized
665 12:25:53.046298 bsp_do_flight_plan done after 465 msecs.
666 12:25:53.049449 CPU: frequency set to 4200 MHz
667 12:25:53.052709 Enabling SMIs.
668 12:25:53.052785 Locking SMM.
669 12:25:53.068749 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
670 12:25:53.072006 CBFS @ c08000 size 3f8000
671 12:25:53.079144 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
672 12:25:53.079232 CBFS: Locating 'vbt.bin'
673 12:25:53.082403 CBFS: Found @ offset 5f5c0 size 499
674 12:25:53.088856 Found a VBT of 4608 bytes after decompression
675 12:25:53.269437 Display FSP Version Info HOB
676 12:25:53.272979 Reference Code - CPU = 9.0.1e.30
677 12:25:53.276106 uCode Version = 0.0.0.ca
678 12:25:53.279378 TXT ACM version = ff.ff.ff.ffff
679 12:25:53.282576 Display FSP Version Info HOB
680 12:25:53.286427 Reference Code - ME = 9.0.1e.30
681 12:25:53.289722 MEBx version = 0.0.0.0
682 12:25:53.292946 ME Firmware Version = Consumer SKU
683 12:25:53.296215 Display FSP Version Info HOB
684 12:25:53.299421 Reference Code - CML PCH = 9.0.1e.30
685 12:25:53.302548 PCH-CRID Status = Disabled
686 12:25:53.306480 PCH-CRID Original Value = ff.ff.ff.ffff
687 12:25:53.309601 PCH-CRID New Value = ff.ff.ff.ffff
688 12:25:53.312678 OPROM - RST - RAID = ff.ff.ff.ffff
689 12:25:53.315922 ChipsetInit Base Version = ff.ff.ff.ffff
690 12:25:53.319148 ChipsetInit Oem Version = ff.ff.ff.ffff
691 12:25:53.322856 Display FSP Version Info HOB
692 12:25:53.329184 Reference Code - SA - System Agent = 9.0.1e.30
693 12:25:53.332428 Reference Code - MRC = 0.7.1.6c
694 12:25:53.332507 SA - PCIe Version = 9.0.1e.30
695 12:25:53.336050 SA-CRID Status = Disabled
696 12:25:53.339381 SA-CRID Original Value = 0.0.0.c
697 12:25:53.342447 SA-CRID New Value = 0.0.0.c
698 12:25:53.345594 OPROM - VBIOS = ff.ff.ff.ffff
699 12:25:53.349436 RTC Init
700 12:25:53.352383 Set power on after power failure.
701 12:25:53.352467 Disabling Deep S3
702 12:25:53.356056 Disabling Deep S3
703 12:25:53.356139 Disabling Deep S4
704 12:25:53.359099 Disabling Deep S4
705 12:25:53.359212 Disabling Deep S5
706 12:25:53.362171 Disabling Deep S5
707 12:25:53.368733 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
708 12:25:53.368824 Enumerating buses...
709 12:25:53.375729 Show all devs... Before device enumeration.
710 12:25:53.375810 Root Device: enabled 1
711 12:25:53.378740 CPU_CLUSTER: 0: enabled 1
712 12:25:53.382244 DOMAIN: 0000: enabled 1
713 12:25:53.385713 APIC: 00: enabled 1
714 12:25:53.385802 PCI: 00:00.0: enabled 1
715 12:25:53.388888 PCI: 00:02.0: enabled 1
716 12:25:53.392057 PCI: 00:04.0: enabled 0
717 12:25:53.395196 PCI: 00:05.0: enabled 0
718 12:25:53.395302 PCI: 00:12.0: enabled 1
719 12:25:53.399036 PCI: 00:12.5: enabled 0
720 12:25:53.402234 PCI: 00:12.6: enabled 0
721 12:25:53.405560 PCI: 00:14.0: enabled 1
722 12:25:53.405680 PCI: 00:14.1: enabled 0
723 12:25:53.408791 PCI: 00:14.3: enabled 1
724 12:25:53.411840 PCI: 00:14.5: enabled 0
725 12:25:53.411917 PCI: 00:15.0: enabled 1
726 12:25:53.415616 PCI: 00:15.1: enabled 1
727 12:25:53.418679 PCI: 00:15.2: enabled 0
728 12:25:53.421965 PCI: 00:15.3: enabled 0
729 12:25:53.422066 PCI: 00:16.0: enabled 1
730 12:25:53.425197 PCI: 00:16.1: enabled 0
731 12:25:53.428349 PCI: 00:16.2: enabled 0
732 12:25:53.432088 PCI: 00:16.3: enabled 0
733 12:25:53.432195 PCI: 00:16.4: enabled 0
734 12:25:53.435401 PCI: 00:16.5: enabled 0
735 12:25:53.438609 PCI: 00:17.0: enabled 1
736 12:25:53.441889 PCI: 00:19.0: enabled 1
737 12:25:53.441967 PCI: 00:19.1: enabled 0
738 12:25:53.445231 PCI: 00:19.2: enabled 0
739 12:25:53.448458 PCI: 00:1a.0: enabled 0
740 12:25:53.448560 PCI: 00:1c.0: enabled 0
741 12:25:53.451683 PCI: 00:1c.1: enabled 0
742 12:25:53.455482 PCI: 00:1c.2: enabled 0
743 12:25:53.458603 PCI: 00:1c.3: enabled 0
744 12:25:53.458707 PCI: 00:1c.4: enabled 0
745 12:25:53.461830 PCI: 00:1c.5: enabled 0
746 12:25:53.464912 PCI: 00:1c.6: enabled 0
747 12:25:53.468638 PCI: 00:1c.7: enabled 0
748 12:25:53.468726 PCI: 00:1d.0: enabled 1
749 12:25:53.471657 PCI: 00:1d.1: enabled 0
750 12:25:53.475277 PCI: 00:1d.2: enabled 0
751 12:25:53.475380 PCI: 00:1d.3: enabled 0
752 12:25:53.478412 PCI: 00:1d.4: enabled 0
753 12:25:53.481427 PCI: 00:1d.5: enabled 1
754 12:25:53.484836 PCI: 00:1e.0: enabled 1
755 12:25:53.484939 PCI: 00:1e.1: enabled 0
756 12:25:53.488113 PCI: 00:1e.2: enabled 1
757 12:25:53.491587 PCI: 00:1e.3: enabled 1
758 12:25:53.495116 PCI: 00:1f.0: enabled 1
759 12:25:53.495192 PCI: 00:1f.1: enabled 1
760 12:25:53.497995 PCI: 00:1f.2: enabled 1
761 12:25:53.501556 PCI: 00:1f.3: enabled 1
762 12:25:53.504824 PCI: 00:1f.4: enabled 1
763 12:25:53.504905 PCI: 00:1f.5: enabled 1
764 12:25:53.507997 PCI: 00:1f.6: enabled 0
765 12:25:53.511323 USB0 port 0: enabled 1
766 12:25:53.511402 I2C: 00:15: enabled 1
767 12:25:53.514572 I2C: 00:5d: enabled 1
768 12:25:53.517756 GENERIC: 0.0: enabled 1
769 12:25:53.521520 I2C: 00:1a: enabled 1
770 12:25:53.521693 I2C: 00:38: enabled 1
771 12:25:53.524774 I2C: 00:39: enabled 1
772 12:25:53.527940 I2C: 00:3a: enabled 1
773 12:25:53.528043 I2C: 00:3b: enabled 1
774 12:25:53.531682 PCI: 00:00.0: enabled 1
775 12:25:53.534869 SPI: 00: enabled 1
776 12:25:53.534955 SPI: 01: enabled 1
777 12:25:53.537930 PNP: 0c09.0: enabled 1
778 12:25:53.541182 USB2 port 0: enabled 1
779 12:25:53.541317 USB2 port 1: enabled 1
780 12:25:53.544351 USB2 port 2: enabled 0
781 12:25:53.547623 USB2 port 3: enabled 0
782 12:25:53.547705 USB2 port 5: enabled 0
783 12:25:53.551357 USB2 port 6: enabled 1
784 12:25:53.554519 USB2 port 9: enabled 1
785 12:25:53.554598 USB3 port 0: enabled 1
786 12:25:53.557711 USB3 port 1: enabled 1
787 12:25:53.560894 USB3 port 2: enabled 1
788 12:25:53.564158 USB3 port 3: enabled 1
789 12:25:53.564244 USB3 port 4: enabled 0
790 12:25:53.568058 APIC: 03: enabled 1
791 12:25:53.571332 APIC: 06: enabled 1
792 12:25:53.571413 APIC: 01: enabled 1
793 12:25:53.574466 APIC: 02: enabled 1
794 12:25:53.574554 APIC: 05: enabled 1
795 12:25:53.577641 APIC: 04: enabled 1
796 12:25:53.581420 APIC: 07: enabled 1
797 12:25:53.581511 Compare with tree...
798 12:25:53.584644 Root Device: enabled 1
799 12:25:53.587687 CPU_CLUSTER: 0: enabled 1
800 12:25:53.587773 APIC: 00: enabled 1
801 12:25:53.590778 APIC: 03: enabled 1
802 12:25:53.594533 APIC: 06: enabled 1
803 12:25:53.594623 APIC: 01: enabled 1
804 12:25:53.597653 APIC: 02: enabled 1
805 12:25:53.601062 APIC: 05: enabled 1
806 12:25:53.601153 APIC: 04: enabled 1
807 12:25:53.604521 APIC: 07: enabled 1
808 12:25:53.607928 DOMAIN: 0000: enabled 1
809 12:25:53.610691 PCI: 00:00.0: enabled 1
810 12:25:53.614183 PCI: 00:02.0: enabled 1
811 12:25:53.614274 PCI: 00:04.0: enabled 0
812 12:25:53.617460 PCI: 00:05.0: enabled 0
813 12:25:53.620639 PCI: 00:12.0: enabled 1
814 12:25:53.623897 PCI: 00:12.5: enabled 0
815 12:25:53.624003 PCI: 00:12.6: enabled 0
816 12:25:53.627785 PCI: 00:14.0: enabled 1
817 12:25:53.631079 USB0 port 0: enabled 1
818 12:25:53.634342 USB2 port 0: enabled 1
819 12:25:53.637477 USB2 port 1: enabled 1
820 12:25:53.640568 USB2 port 2: enabled 0
821 12:25:53.640651 USB2 port 3: enabled 0
822 12:25:53.644171 USB2 port 5: enabled 0
823 12:25:53.647319 USB2 port 6: enabled 1
824 12:25:53.650405 USB2 port 9: enabled 1
825 12:25:53.654180 USB3 port 0: enabled 1
826 12:25:53.654256 USB3 port 1: enabled 1
827 12:25:53.657349 USB3 port 2: enabled 1
828 12:25:53.660556 USB3 port 3: enabled 1
829 12:25:53.663560 USB3 port 4: enabled 0
830 12:25:53.667513 PCI: 00:14.1: enabled 0
831 12:25:53.670795 PCI: 00:14.3: enabled 1
832 12:25:53.670876 PCI: 00:14.5: enabled 0
833 12:25:53.674032 PCI: 00:15.0: enabled 1
834 12:25:53.677204 I2C: 00:15: enabled 1
835 12:25:53.680158 PCI: 00:15.1: enabled 1
836 12:25:53.680243 I2C: 00:5d: enabled 1
837 12:25:53.684022 GENERIC: 0.0: enabled 1
838 12:25:53.687309 PCI: 00:15.2: enabled 0
839 12:25:53.690513 PCI: 00:15.3: enabled 0
840 12:25:53.693592 PCI: 00:16.0: enabled 1
841 12:25:53.693680 PCI: 00:16.1: enabled 0
842 12:25:53.696802 PCI: 00:16.2: enabled 0
843 12:25:53.700047 PCI: 00:16.3: enabled 0
844 12:25:53.703398 PCI: 00:16.4: enabled 0
845 12:25:53.707224 PCI: 00:16.5: enabled 0
846 12:25:53.707333 PCI: 00:17.0: enabled 1
847 12:25:53.710152 PCI: 00:19.0: enabled 1
848 12:25:53.713644 I2C: 00:1a: enabled 1
849 12:25:53.716698 I2C: 00:38: enabled 1
850 12:25:53.716784 I2C: 00:39: enabled 1
851 12:25:53.720203 I2C: 00:3a: enabled 1
852 12:25:53.723409 I2C: 00:3b: enabled 1
853 12:25:53.726977 PCI: 00:19.1: enabled 0
854 12:25:53.730212 PCI: 00:19.2: enabled 0
855 12:25:53.730297 PCI: 00:1a.0: enabled 0
856 12:25:53.733459 PCI: 00:1c.0: enabled 0
857 12:25:53.736796 PCI: 00:1c.1: enabled 0
858 12:25:53.739795 PCI: 00:1c.2: enabled 0
859 12:25:53.743629 PCI: 00:1c.3: enabled 0
860 12:25:53.743709 PCI: 00:1c.4: enabled 0
861 12:25:53.746826 PCI: 00:1c.5: enabled 0
862 12:25:53.749916 PCI: 00:1c.6: enabled 0
863 12:25:53.753657 PCI: 00:1c.7: enabled 0
864 12:25:53.756685 PCI: 00:1d.0: enabled 1
865 12:25:53.756770 PCI: 00:1d.1: enabled 0
866 12:25:53.759792 PCI: 00:1d.2: enabled 0
867 12:25:53.763332 PCI: 00:1d.3: enabled 0
868 12:25:53.766523 PCI: 00:1d.4: enabled 0
869 12:25:53.766631 PCI: 00:1d.5: enabled 1
870 12:25:53.769512 PCI: 00:00.0: enabled 1
871 12:25:53.773511 PCI: 00:1e.0: enabled 1
872 12:25:53.776788 PCI: 00:1e.1: enabled 0
873 12:25:53.779864 PCI: 00:1e.2: enabled 1
874 12:25:53.779947 SPI: 00: enabled 1
875 12:25:53.782990 PCI: 00:1e.3: enabled 1
876 12:25:53.786290 SPI: 01: enabled 1
877 12:25:53.789509 PCI: 00:1f.0: enabled 1
878 12:25:53.789624 PNP: 0c09.0: enabled 1
879 12:25:53.792745 PCI: 00:1f.1: enabled 1
880 12:25:53.796643 PCI: 00:1f.2: enabled 1
881 12:25:53.799748 PCI: 00:1f.3: enabled 1
882 12:25:53.802785 PCI: 00:1f.4: enabled 1
883 12:25:53.802869 PCI: 00:1f.5: enabled 1
884 12:25:53.806519 PCI: 00:1f.6: enabled 0
885 12:25:53.809810 Root Device scanning...
886 12:25:53.813110 scan_static_bus for Root Device
887 12:25:53.816316 CPU_CLUSTER: 0 enabled
888 12:25:53.816400 DOMAIN: 0000 enabled
889 12:25:53.819422 DOMAIN: 0000 scanning...
890 12:25:53.823139 PCI: pci_scan_bus for bus 00
891 12:25:53.826301 PCI: 00:00.0 [8086/0000] ops
892 12:25:53.829471 PCI: 00:00.0 [8086/9b61] enabled
893 12:25:53.832810 PCI: 00:02.0 [8086/0000] bus ops
894 12:25:53.836207 PCI: 00:02.0 [8086/9b41] enabled
895 12:25:53.839420 PCI: 00:04.0 [8086/1903] disabled
896 12:25:53.842554 PCI: 00:08.0 [8086/1911] enabled
897 12:25:53.845829 PCI: 00:12.0 [8086/02f9] enabled
898 12:25:53.849681 PCI: 00:14.0 [8086/0000] bus ops
899 12:25:53.852874 PCI: 00:14.0 [8086/02ed] enabled
900 12:25:53.856085 PCI: 00:14.2 [8086/02ef] enabled
901 12:25:53.859303 PCI: 00:14.3 [8086/02f0] enabled
902 12:25:53.862532 PCI: 00:15.0 [8086/0000] bus ops
903 12:25:53.866208 PCI: 00:15.0 [8086/02e8] enabled
904 12:25:53.869175 PCI: 00:15.1 [8086/0000] bus ops
905 12:25:53.872366 PCI: 00:15.1 [8086/02e9] enabled
906 12:25:53.875827 PCI: 00:16.0 [8086/0000] ops
907 12:25:53.879481 PCI: 00:16.0 [8086/02e0] enabled
908 12:25:53.882739 PCI: 00:17.0 [8086/0000] ops
909 12:25:53.885928 PCI: 00:17.0 [8086/02d3] enabled
910 12:25:53.889051 PCI: 00:19.0 [8086/0000] bus ops
911 12:25:53.892324 PCI: 00:19.0 [8086/02c5] enabled
912 12:25:53.895736 PCI: 00:1d.0 [8086/0000] bus ops
913 12:25:53.899099 PCI: 00:1d.0 [8086/02b0] enabled
914 12:25:53.905643 PCI: Static device PCI: 00:1d.5 not found, disabling it.
915 12:25:53.905721 PCI: 00:1e.0 [8086/0000] ops
916 12:25:53.908824 PCI: 00:1e.0 [8086/02a8] enabled
917 12:25:53.912557 PCI: 00:1e.2 [8086/0000] bus ops
918 12:25:53.915756 PCI: 00:1e.2 [8086/02aa] enabled
919 12:25:53.918892 PCI: 00:1e.3 [8086/0000] bus ops
920 12:25:53.922048 PCI: 00:1e.3 [8086/02ab] enabled
921 12:25:53.925890 PCI: 00:1f.0 [8086/0000] bus ops
922 12:25:53.929063 PCI: 00:1f.0 [8086/0284] enabled
923 12:25:53.935886 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 12:25:53.942328 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 12:25:53.945711 PCI: 00:1f.3 [8086/0000] bus ops
926 12:25:53.948989 PCI: 00:1f.3 [8086/02c8] enabled
927 12:25:53.952051 PCI: 00:1f.4 [8086/0000] bus ops
928 12:25:53.955335 PCI: 00:1f.4 [8086/02a3] enabled
929 12:25:53.958668 PCI: 00:1f.5 [8086/0000] bus ops
930 12:25:53.962337 PCI: 00:1f.5 [8086/02a4] enabled
931 12:25:53.965566 PCI: Leftover static devices:
932 12:25:53.965683 PCI: 00:05.0
933 12:25:53.968807 PCI: 00:12.5
934 12:25:53.968901 PCI: 00:12.6
935 12:25:53.968966 PCI: 00:14.1
936 12:25:53.971976 PCI: 00:14.5
937 12:25:53.972045 PCI: 00:15.2
938 12:25:53.975582 PCI: 00:15.3
939 12:25:53.975655 PCI: 00:16.1
940 12:25:53.978769 PCI: 00:16.2
941 12:25:53.978843 PCI: 00:16.3
942 12:25:53.978904 PCI: 00:16.4
943 12:25:53.981734 PCI: 00:16.5
944 12:25:53.981808 PCI: 00:19.1
945 12:25:53.985424 PCI: 00:19.2
946 12:25:53.985526 PCI: 00:1a.0
947 12:25:53.985646 PCI: 00:1c.0
948 12:25:53.988516 PCI: 00:1c.1
949 12:25:53.988584 PCI: 00:1c.2
950 12:25:53.992010 PCI: 00:1c.3
951 12:25:53.992082 PCI: 00:1c.4
952 12:25:53.992151 PCI: 00:1c.5
953 12:25:53.995251 PCI: 00:1c.6
954 12:25:53.995335 PCI: 00:1c.7
955 12:25:53.998463 PCI: 00:1d.1
956 12:25:53.998535 PCI: 00:1d.2
957 12:25:53.998594 PCI: 00:1d.3
958 12:25:54.002388 PCI: 00:1d.4
959 12:25:54.002470 PCI: 00:1d.5
960 12:25:54.005064 PCI: 00:1e.1
961 12:25:54.005129 PCI: 00:1f.1
962 12:25:54.008761 PCI: 00:1f.2
963 12:25:54.008829 PCI: 00:1f.6
964 12:25:54.012015 PCI: Check your devicetree.cb.
965 12:25:54.015350 PCI: 00:02.0 scanning...
966 12:25:54.018425 scan_generic_bus for PCI: 00:02.0
967 12:25:54.022194 scan_generic_bus for PCI: 00:02.0 done
968 12:25:54.028408 scan_bus: scanning of bus PCI: 00:02.0 took 10187 usecs
969 12:25:54.028489 PCI: 00:14.0 scanning...
970 12:25:54.031731 scan_static_bus for PCI: 00:14.0
971 12:25:54.034921 USB0 port 0 enabled
972 12:25:54.038753 USB0 port 0 scanning...
973 12:25:54.041889 scan_static_bus for USB0 port 0
974 12:25:54.045109 USB2 port 0 enabled
975 12:25:54.045185 USB2 port 1 enabled
976 12:25:54.048212 USB2 port 2 disabled
977 12:25:54.048294 USB2 port 3 disabled
978 12:25:54.051874 USB2 port 5 disabled
979 12:25:54.054956 USB2 port 6 enabled
980 12:25:54.055032 USB2 port 9 enabled
981 12:25:54.058344 USB3 port 0 enabled
982 12:25:54.061846 USB3 port 1 enabled
983 12:25:54.061933 USB3 port 2 enabled
984 12:25:54.065158 USB3 port 3 enabled
985 12:25:54.065240 USB3 port 4 disabled
986 12:25:54.068447 USB2 port 0 scanning...
987 12:25:54.071720 scan_static_bus for USB2 port 0
988 12:25:54.074986 scan_static_bus for USB2 port 0 done
989 12:25:54.081956 scan_bus: scanning of bus USB2 port 0 took 9700 usecs
990 12:25:54.085115 USB2 port 1 scanning...
991 12:25:54.088257 scan_static_bus for USB2 port 1
992 12:25:54.091766 scan_static_bus for USB2 port 1 done
993 12:25:54.094835 scan_bus: scanning of bus USB2 port 1 took 9706 usecs
994 12:25:54.098465 USB2 port 6 scanning...
995 12:25:54.101419 scan_static_bus for USB2 port 6
996 12:25:54.104586 scan_static_bus for USB2 port 6 done
997 12:25:54.111569 scan_bus: scanning of bus USB2 port 6 took 9707 usecs
998 12:25:54.114713 USB2 port 9 scanning...
999 12:25:54.118521 scan_static_bus for USB2 port 9
1000 12:25:54.121861 scan_static_bus for USB2 port 9 done
1001 12:25:54.125066 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
1002 12:25:54.128192 USB3 port 0 scanning...
1003 12:25:54.131392 scan_static_bus for USB3 port 0
1004 12:25:54.134628 scan_static_bus for USB3 port 0 done
1005 12:25:54.141436 scan_bus: scanning of bus USB3 port 0 took 9698 usecs
1006 12:25:54.144643 USB3 port 1 scanning...
1007 12:25:54.147899 scan_static_bus for USB3 port 1
1008 12:25:54.151127 scan_static_bus for USB3 port 1 done
1009 12:25:54.158173 scan_bus: scanning of bus USB3 port 1 took 9705 usecs
1010 12:25:54.158256 USB3 port 2 scanning...
1011 12:25:54.161345 scan_static_bus for USB3 port 2
1012 12:25:54.164351 scan_static_bus for USB3 port 2 done
1013 12:25:54.171464 scan_bus: scanning of bus USB3 port 2 took 9705 usecs
1014 12:25:54.174712 USB3 port 3 scanning...
1015 12:25:54.178052 scan_static_bus for USB3 port 3
1016 12:25:54.181225 scan_static_bus for USB3 port 3 done
1017 12:25:54.187550 scan_bus: scanning of bus USB3 port 3 took 9708 usecs
1018 12:25:54.191270 scan_static_bus for USB0 port 0 done
1019 12:25:54.194467 scan_bus: scanning of bus USB0 port 0 took 155410 usecs
1020 12:25:54.200843 scan_static_bus for PCI: 00:14.0 done
1021 12:25:54.204197 scan_bus: scanning of bus PCI: 00:14.0 took 173027 usecs
1022 12:25:54.207922 PCI: 00:15.0 scanning...
1023 12:25:54.211022 scan_generic_bus for PCI: 00:15.0
1024 12:25:54.214132 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1025 12:25:54.220754 scan_generic_bus for PCI: 00:15.0 done
1026 12:25:54.223994 scan_bus: scanning of bus PCI: 00:15.0 took 14299 usecs
1027 12:25:54.227950 PCI: 00:15.1 scanning...
1028 12:25:54.231001 scan_generic_bus for PCI: 00:15.1
1029 12:25:54.234354 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1030 12:25:54.241083 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1031 12:25:54.244360 scan_generic_bus for PCI: 00:15.1 done
1032 12:25:54.247472 scan_bus: scanning of bus PCI: 00:15.1 took 18598 usecs
1033 12:25:54.250754 PCI: 00:19.0 scanning...
1034 12:25:54.253904 scan_generic_bus for PCI: 00:19.0
1035 12:25:54.260388 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1036 12:25:54.264041 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1037 12:25:54.267392 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1038 12:25:54.270405 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1039 12:25:54.276999 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1040 12:25:54.280643 scan_generic_bus for PCI: 00:19.0 done
1041 12:25:54.283867 scan_bus: scanning of bus PCI: 00:19.0 took 30733 usecs
1042 12:25:54.287022 PCI: 00:1d.0 scanning...
1043 12:25:54.290273 do_pci_scan_bridge for PCI: 00:1d.0
1044 12:25:54.293451 PCI: pci_scan_bus for bus 01
1045 12:25:54.297172 PCI: 01:00.0 [1c5c/1327] enabled
1046 12:25:54.300282 Enabling Common Clock Configuration
1047 12:25:54.307163 L1 Sub-State supported from root port 29
1048 12:25:54.307244 L1 Sub-State Support = 0xf
1049 12:25:54.310392 CommonModeRestoreTime = 0x28
1050 12:25:54.317121 Power On Value = 0x16, Power On Scale = 0x0
1051 12:25:54.317201 ASPM: Enabled L1
1052 12:25:54.323837 scan_bus: scanning of bus PCI: 00:1d.0 took 32790 usecs
1053 12:25:54.326853 PCI: 00:1e.2 scanning...
1054 12:25:54.330461 scan_generic_bus for PCI: 00:1e.2
1055 12:25:54.333641 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1056 12:25:54.336855 scan_generic_bus for PCI: 00:1e.2 done
1057 12:25:54.343276 scan_bus: scanning of bus PCI: 00:1e.2 took 13980 usecs
1058 12:25:54.343357 PCI: 00:1e.3 scanning...
1059 12:25:54.350322 scan_generic_bus for PCI: 00:1e.3
1060 12:25:54.354001 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1061 12:25:54.357200 scan_generic_bus for PCI: 00:1e.3 done
1062 12:25:54.363739 scan_bus: scanning of bus PCI: 00:1e.3 took 14001 usecs
1063 12:25:54.363821 PCI: 00:1f.0 scanning...
1064 12:25:54.366943 scan_static_bus for PCI: 00:1f.0
1065 12:25:54.370115 PNP: 0c09.0 enabled
1066 12:25:54.373980 scan_static_bus for PCI: 00:1f.0 done
1067 12:25:54.380262 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1068 12:25:54.383251 PCI: 00:1f.3 scanning...
1069 12:25:54.386736 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1070 12:25:54.390570 PCI: 00:1f.4 scanning...
1071 12:25:54.393788 scan_generic_bus for PCI: 00:1f.4
1072 12:25:54.396999 scan_generic_bus for PCI: 00:1f.4 done
1073 12:25:54.403805 scan_bus: scanning of bus PCI: 00:1f.4 took 10185 usecs
1074 12:25:54.406783 PCI: 00:1f.5 scanning...
1075 12:25:54.410449 scan_generic_bus for PCI: 00:1f.5
1076 12:25:54.413503 scan_generic_bus for PCI: 00:1f.5 done
1077 12:25:54.419989 scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs
1078 12:25:54.423740 scan_bus: scanning of bus DOMAIN: 0000 took 605092 usecs
1079 12:25:54.430338 scan_static_bus for Root Device done
1080 12:25:54.433460 scan_bus: scanning of bus Root Device took 624978 usecs
1081 12:25:54.433541 done
1082 12:25:54.436840 Chrome EC: UHEPI supported
1083 12:25:54.443924 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1084 12:25:54.450014 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1085 12:25:54.457003 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1086 12:25:54.463841 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1087 12:25:54.466988 SPI flash protection: WPSW=0 SRP0=0
1088 12:25:54.470358 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1089 12:25:54.476985 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1090 12:25:54.480206 found VGA at PCI: 00:02.0
1091 12:25:54.483442 Setting up VGA for PCI: 00:02.0
1092 12:25:54.486698 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1093 12:25:54.493160 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1094 12:25:54.496374 Allocating resources...
1095 12:25:54.496454 Reading resources...
1096 12:25:54.503391 Root Device read_resources bus 0 link: 0
1097 12:25:54.506562 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1098 12:25:54.509752 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1099 12:25:54.516539 DOMAIN: 0000 read_resources bus 0 link: 0
1100 12:25:54.523238 PCI: 00:14.0 read_resources bus 0 link: 0
1101 12:25:54.526975 USB0 port 0 read_resources bus 0 link: 0
1102 12:25:54.534051 USB0 port 0 read_resources bus 0 link: 0 done
1103 12:25:54.537168 PCI: 00:14.0 read_resources bus 0 link: 0 done
1104 12:25:54.544759 PCI: 00:15.0 read_resources bus 1 link: 0
1105 12:25:54.547919 PCI: 00:15.0 read_resources bus 1 link: 0 done
1106 12:25:54.554700 PCI: 00:15.1 read_resources bus 2 link: 0
1107 12:25:54.557733 PCI: 00:15.1 read_resources bus 2 link: 0 done
1108 12:25:54.565766 PCI: 00:19.0 read_resources bus 3 link: 0
1109 12:25:54.572011 PCI: 00:19.0 read_resources bus 3 link: 0 done
1110 12:25:54.575321 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 12:25:54.582056 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 12:25:54.585218 PCI: 00:1e.2 read_resources bus 4 link: 0
1113 12:25:54.591725 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1114 12:25:54.595426 PCI: 00:1e.3 read_resources bus 5 link: 0
1115 12:25:54.602012 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1116 12:25:54.605227 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 12:25:54.612122 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 12:25:54.618463 DOMAIN: 0000 read_resources bus 0 link: 0 done
1119 12:25:54.621744 Root Device read_resources bus 0 link: 0 done
1120 12:25:54.625314 Done reading resources.
1121 12:25:54.628740 Show resources in subtree (Root Device)...After reading.
1122 12:25:54.635062 Root Device child on link 0 CPU_CLUSTER: 0
1123 12:25:54.638821 CPU_CLUSTER: 0 child on link 0 APIC: 00
1124 12:25:54.638922 APIC: 00
1125 12:25:54.642068 APIC: 03
1126 12:25:54.642146 APIC: 06
1127 12:25:54.645308 APIC: 01
1128 12:25:54.645386 APIC: 02
1129 12:25:54.645484 APIC: 05
1130 12:25:54.648430 APIC: 04
1131 12:25:54.648532 APIC: 07
1132 12:25:54.652141 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1133 12:25:54.661965 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1134 12:25:54.704070 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1135 12:25:54.704401 PCI: 00:00.0
1136 12:25:54.704518 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1137 12:25:54.704632 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1138 12:25:54.704723 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1139 12:25:54.711260 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1140 12:25:54.721374 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1141 12:25:54.730961 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1142 12:25:54.741306 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1143 12:25:54.747629 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1144 12:25:54.757738 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1145 12:25:54.767347 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1146 12:25:54.777420 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1147 12:25:54.787393 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1148 12:25:54.793918 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1149 12:25:54.804243 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1150 12:25:54.813787 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1151 12:25:54.823565 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1152 12:25:54.823653 PCI: 00:02.0
1153 12:25:54.836924 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 12:25:54.846775 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 12:25:54.853311 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 12:25:54.857040 PCI: 00:04.0
1157 12:25:54.857114 PCI: 00:08.0
1158 12:25:54.866546 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 12:25:54.870381 PCI: 00:12.0
1160 12:25:54.879922 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 12:25:54.883751 PCI: 00:14.0 child on link 0 USB0 port 0
1162 12:25:54.893380 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 12:25:54.896572 USB0 port 0 child on link 0 USB2 port 0
1164 12:25:54.900386 USB2 port 0
1165 12:25:54.900489 USB2 port 1
1166 12:25:54.903514 USB2 port 2
1167 12:25:54.903583 USB2 port 3
1168 12:25:54.906586 USB2 port 5
1169 12:25:54.910286 USB2 port 6
1170 12:25:54.910355 USB2 port 9
1171 12:25:54.913244 USB3 port 0
1172 12:25:54.913338 USB3 port 1
1173 12:25:54.916535 USB3 port 2
1174 12:25:54.916601 USB3 port 3
1175 12:25:54.920150 USB3 port 4
1176 12:25:54.920219 PCI: 00:14.2
1177 12:25:54.929905 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1178 12:25:54.940056 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 12:25:54.943349 PCI: 00:14.3
1180 12:25:54.953256 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 12:25:54.956425 PCI: 00:15.0 child on link 0 I2C: 01:15
1182 12:25:54.966485 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 12:25:54.966570 I2C: 01:15
1184 12:25:54.973353 PCI: 00:15.1 child on link 0 I2C: 02:5d
1185 12:25:54.982852 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 12:25:54.982965 I2C: 02:5d
1187 12:25:54.985890 GENERIC: 0.0
1188 12:25:54.985969 PCI: 00:16.0
1189 12:25:54.996279 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 12:25:54.999435 PCI: 00:17.0
1191 12:25:55.009491 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1192 12:25:55.015726 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1193 12:25:55.025723 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1194 12:25:55.032331 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1195 12:25:55.042328 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1196 12:25:55.049164 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1197 12:25:55.055657 PCI: 00:19.0 child on link 0 I2C: 03:1a
1198 12:25:55.066002 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 12:25:55.066085 I2C: 03:1a
1200 12:25:55.069116 I2C: 03:38
1201 12:25:55.069196 I2C: 03:39
1202 12:25:55.072778 I2C: 03:3a
1203 12:25:55.072859 I2C: 03:3b
1204 12:25:55.075609 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1205 12:25:55.085438 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1206 12:25:55.095476 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1207 12:25:55.105687 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1208 12:25:55.105775 PCI: 01:00.0
1209 12:25:55.115745 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 12:25:55.118850 PCI: 00:1e.0
1211 12:25:55.128695 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 12:25:55.138394 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1213 12:25:55.141893 PCI: 00:1e.2 child on link 0 SPI: 00
1214 12:25:55.151987 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 12:25:55.155129 SPI: 00
1216 12:25:55.158403 PCI: 00:1e.3 child on link 0 SPI: 01
1217 12:25:55.168589 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 12:25:55.168674 SPI: 01
1219 12:25:55.174925 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 12:25:55.181818 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 12:25:55.191433 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 12:25:55.191532 PNP: 0c09.0
1223 12:25:55.201199 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 12:25:55.204425 PCI: 00:1f.3
1225 12:25:55.214697 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 12:25:55.224764 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 12:25:55.224875 PCI: 00:1f.4
1228 12:25:55.234757 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 12:25:55.244358 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1230 12:25:55.244479 PCI: 00:1f.5
1231 12:25:55.254578 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 12:25:55.260952 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1233 12:25:55.267740 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1234 12:25:55.274124 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1235 12:25:55.277313 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1236 12:25:55.280489 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1237 12:25:55.284305 PCI: 00:17.0 18 * [0x60 - 0x67] io
1238 12:25:55.287516 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1239 12:25:55.294327 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1240 12:25:55.300620 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1241 12:25:55.310641 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1242 12:25:55.317019 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1243 12:25:55.323694 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1244 12:25:55.330055 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1245 12:25:55.336794 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 12:25:55.340019 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1247 12:25:55.346860 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1248 12:25:55.350141 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1249 12:25:55.356705 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1250 12:25:55.360472 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1251 12:25:55.366436 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1252 12:25:55.369978 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1253 12:25:55.376587 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1254 12:25:55.379739 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1255 12:25:55.386809 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1256 12:25:55.390004 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1257 12:25:55.396357 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1258 12:25:55.400045 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1259 12:25:55.403026 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1260 12:25:55.409731 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1261 12:25:55.412932 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1262 12:25:55.419757 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1263 12:25:55.423002 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1264 12:25:55.429703 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1265 12:25:55.432921 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1266 12:25:55.439531 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1267 12:25:55.443111 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1268 12:25:55.449411 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1269 12:25:55.456356 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1270 12:25:55.459517 avoid_fixed_resources: DOMAIN: 0000
1271 12:25:55.465837 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1272 12:25:55.472736 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1273 12:25:55.479099 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1274 12:25:55.489015 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1275 12:25:55.495568 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1276 12:25:55.501933 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1277 12:25:55.512048 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1278 12:25:55.518869 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 12:25:55.525452 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1280 12:25:55.531741 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1281 12:25:55.541964 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1282 12:25:55.548764 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1283 12:25:55.551855 Setting resources...
1284 12:25:55.555063 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1285 12:25:55.561229 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1286 12:25:55.564801 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1287 12:25:55.568057 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1288 12:25:55.571288 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1289 12:25:55.578220 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1290 12:25:55.584928 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1291 12:25:55.591304 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1292 12:25:55.597726 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1293 12:25:55.604384 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1294 12:25:55.607669 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1295 12:25:55.614661 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1296 12:25:55.617849 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1297 12:25:55.624522 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1298 12:25:55.627438 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1299 12:25:55.634456 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1300 12:25:55.637475 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1301 12:25:55.643931 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1302 12:25:55.647871 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1303 12:25:55.654036 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1304 12:25:55.657186 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1305 12:25:55.664022 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1306 12:25:55.667285 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1307 12:25:55.670458 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1308 12:25:55.677547 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1309 12:25:55.680786 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1310 12:25:55.687113 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1311 12:25:55.690353 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1312 12:25:55.697032 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1313 12:25:55.700502 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1314 12:25:55.707210 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1315 12:25:55.710503 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1316 12:25:55.720402 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1317 12:25:55.726810 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1318 12:25:55.733375 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1319 12:25:55.740070 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1320 12:25:55.746830 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1321 12:25:55.753152 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1322 12:25:55.756458 Root Device assign_resources, bus 0 link: 0
1323 12:25:55.763212 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 12:25:55.769504 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1325 12:25:55.779832 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1326 12:25:55.786497 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1327 12:25:55.796079 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1328 12:25:55.803420 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1329 12:25:55.813071 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1330 12:25:55.816158 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 12:25:55.819473 PCI: 00:14.0 assign_resources, bus 0 link: 0
1332 12:25:55.829305 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1333 12:25:55.836356 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1334 12:25:55.845975 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1335 12:25:55.852822 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1336 12:25:55.859705 PCI: 00:15.0 assign_resources, bus 1 link: 0
1337 12:25:55.862797 PCI: 00:15.0 assign_resources, bus 1 link: 0
1338 12:25:55.872934 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1339 12:25:55.876048 PCI: 00:15.1 assign_resources, bus 2 link: 0
1340 12:25:55.879419 PCI: 00:15.1 assign_resources, bus 2 link: 0
1341 12:25:55.889345 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1342 12:25:55.896089 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1343 12:25:55.905804 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1344 12:25:55.912636 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1345 12:25:55.918864 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1346 12:25:55.928928 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1347 12:25:55.935789 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1348 12:25:55.942065 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1349 12:25:55.949086 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 12:25:55.952166 PCI: 00:19.0 assign_resources, bus 3 link: 0
1351 12:25:55.962422 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1352 12:25:55.972161 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 12:25:55.978486 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1354 12:25:55.982201 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 12:25:55.991946 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1356 12:25:55.995539 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 12:25:56.005146 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1358 12:25:56.012190 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1359 12:25:56.018644 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 12:25:56.021712 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1361 12:25:56.031844 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1362 12:25:56.035426 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 12:25:56.038794 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1364 12:25:56.045187 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 12:25:56.048388 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 12:25:56.054999 LPC: Trying to open IO window from 800 size 1ff
1367 12:25:56.061681 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1368 12:25:56.071517 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1369 12:25:56.078396 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1370 12:25:56.088498 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1371 12:25:56.091775 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 12:25:56.098029 Root Device assign_resources, bus 0 link: 0
1373 12:25:56.098133 Done setting resources.
1374 12:25:56.104895 Show resources in subtree (Root Device)...After assigning values.
1375 12:25:56.111251 Root Device child on link 0 CPU_CLUSTER: 0
1376 12:25:56.114478 CPU_CLUSTER: 0 child on link 0 APIC: 00
1377 12:25:56.114581 APIC: 00
1378 12:25:56.117931 APIC: 03
1379 12:25:56.118045 APIC: 06
1380 12:25:56.118150 APIC: 01
1381 12:25:56.121503 APIC: 02
1382 12:25:56.121617 APIC: 05
1383 12:25:56.124623 APIC: 04
1384 12:25:56.124719 APIC: 07
1385 12:25:56.127768 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1386 12:25:56.137712 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1387 12:25:56.147909 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1388 12:25:56.151058 PCI: 00:00.0
1389 12:25:56.160816 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1390 12:25:56.170872 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1391 12:25:56.181068 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1392 12:25:56.187630 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1393 12:25:56.197230 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1394 12:25:56.207100 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1395 12:25:56.217273 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1396 12:25:56.227222 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1397 12:25:56.237297 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1398 12:25:56.243403 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1399 12:25:56.253675 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1400 12:25:56.263236 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1401 12:25:56.273263 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1402 12:25:56.283509 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1403 12:25:56.293248 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1404 12:25:56.300095 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1405 12:25:56.303264 PCI: 00:02.0
1406 12:25:56.313081 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 12:25:56.323017 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 12:25:56.333115 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 12:25:56.336222 PCI: 00:04.0
1410 12:25:56.336354 PCI: 00:08.0
1411 12:25:56.345972 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1412 12:25:56.349499 PCI: 00:12.0
1413 12:25:56.359231 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1414 12:25:56.363008 PCI: 00:14.0 child on link 0 USB0 port 0
1415 12:25:56.372903 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1416 12:25:56.379190 USB0 port 0 child on link 0 USB2 port 0
1417 12:25:56.379306 USB2 port 0
1418 12:25:56.382354 USB2 port 1
1419 12:25:56.382456 USB2 port 2
1420 12:25:56.386040 USB2 port 3
1421 12:25:56.386147 USB2 port 5
1422 12:25:56.389221 USB2 port 6
1423 12:25:56.389331 USB2 port 9
1424 12:25:56.392222 USB3 port 0
1425 12:25:56.392335 USB3 port 1
1426 12:25:56.396080 USB3 port 2
1427 12:25:56.396203 USB3 port 3
1428 12:25:56.399091 USB3 port 4
1429 12:25:56.399196 PCI: 00:14.2
1430 12:25:56.411971 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1431 12:25:56.422293 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1432 12:25:56.422434 PCI: 00:14.3
1433 12:25:56.431919 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1434 12:25:56.438978 PCI: 00:15.0 child on link 0 I2C: 01:15
1435 12:25:56.448626 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1436 12:25:56.448755 I2C: 01:15
1437 12:25:56.451850 PCI: 00:15.1 child on link 0 I2C: 02:5d
1438 12:25:56.464911 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1439 12:25:56.465025 I2C: 02:5d
1440 12:25:56.468725 GENERIC: 0.0
1441 12:25:56.468840 PCI: 00:16.0
1442 12:25:56.478431 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1443 12:25:56.481831 PCI: 00:17.0
1444 12:25:56.491764 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1445 12:25:56.501338 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1446 12:25:56.511370 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1447 12:25:56.518304 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1448 12:25:56.528122 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1449 12:25:56.538287 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1450 12:25:56.544709 PCI: 00:19.0 child on link 0 I2C: 03:1a
1451 12:25:56.554728 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1452 12:25:56.554946 I2C: 03:1a
1453 12:25:56.557995 I2C: 03:38
1454 12:25:56.558197 I2C: 03:39
1455 12:25:56.561151 I2C: 03:3a
1456 12:25:56.561320 I2C: 03:3b
1457 12:25:56.564338 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1458 12:25:56.574201 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1459 12:25:56.584195 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1460 12:25:56.593771 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1461 12:25:56.597505 PCI: 01:00.0
1462 12:25:56.607323 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1463 12:25:56.610604 PCI: 00:1e.0
1464 12:25:56.620517 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1465 12:25:56.630187 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1466 12:25:56.633415 PCI: 00:1e.2 child on link 0 SPI: 00
1467 12:25:56.643590 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1468 12:25:56.646824 SPI: 00
1469 12:25:56.650082 PCI: 00:1e.3 child on link 0 SPI: 01
1470 12:25:56.660459 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1471 12:25:56.660591 SPI: 01
1472 12:25:56.666818 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1473 12:25:56.673159 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1474 12:25:56.683366 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1475 12:25:56.686556 PNP: 0c09.0
1476 12:25:56.693538 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 12:25:56.696734 PCI: 00:1f.3
1478 12:25:56.706527 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1479 12:25:56.716511 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1480 12:25:56.716715 PCI: 00:1f.4
1481 12:25:56.726522 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1482 12:25:56.736499 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1483 12:25:56.739433 PCI: 00:1f.5
1484 12:25:56.749597 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1485 12:25:56.752475 Done allocating resources.
1486 12:25:56.756122 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1487 12:25:56.759256 Enabling resources...
1488 12:25:56.766113 PCI: 00:00.0 subsystem <- 8086/9b61
1489 12:25:56.766197 PCI: 00:00.0 cmd <- 06
1490 12:25:56.769328 PCI: 00:02.0 subsystem <- 8086/9b41
1491 12:25:56.772486 PCI: 00:02.0 cmd <- 03
1492 12:25:56.776385 PCI: 00:08.0 cmd <- 06
1493 12:25:56.779612 PCI: 00:12.0 subsystem <- 8086/02f9
1494 12:25:56.782889 PCI: 00:12.0 cmd <- 02
1495 12:25:56.786181 PCI: 00:14.0 subsystem <- 8086/02ed
1496 12:25:56.789146 PCI: 00:14.0 cmd <- 02
1497 12:25:56.789256 PCI: 00:14.2 cmd <- 02
1498 12:25:56.796107 PCI: 00:14.3 subsystem <- 8086/02f0
1499 12:25:56.796245 PCI: 00:14.3 cmd <- 02
1500 12:25:56.799812 PCI: 00:15.0 subsystem <- 8086/02e8
1501 12:25:56.802864 PCI: 00:15.0 cmd <- 02
1502 12:25:56.806488 PCI: 00:15.1 subsystem <- 8086/02e9
1503 12:25:56.809767 PCI: 00:15.1 cmd <- 02
1504 12:25:56.812955 PCI: 00:16.0 subsystem <- 8086/02e0
1505 12:25:56.816008 PCI: 00:16.0 cmd <- 02
1506 12:25:56.819235 PCI: 00:17.0 subsystem <- 8086/02d3
1507 12:25:56.822939 PCI: 00:17.0 cmd <- 03
1508 12:25:56.826138 PCI: 00:19.0 subsystem <- 8086/02c5
1509 12:25:56.829169 PCI: 00:19.0 cmd <- 02
1510 12:25:56.832891 PCI: 00:1d.0 bridge ctrl <- 0013
1511 12:25:56.836135 PCI: 00:1d.0 subsystem <- 8086/02b0
1512 12:25:56.839309 PCI: 00:1d.0 cmd <- 06
1513 12:25:56.842420 PCI: 00:1e.0 subsystem <- 8086/02a8
1514 12:25:56.845712 PCI: 00:1e.0 cmd <- 06
1515 12:25:56.849294 PCI: 00:1e.2 subsystem <- 8086/02aa
1516 12:25:56.849430 PCI: 00:1e.2 cmd <- 06
1517 12:25:56.856002 PCI: 00:1e.3 subsystem <- 8086/02ab
1518 12:25:56.856150 PCI: 00:1e.3 cmd <- 02
1519 12:25:56.859165 PCI: 00:1f.0 subsystem <- 8086/0284
1520 12:25:56.862341 PCI: 00:1f.0 cmd <- 407
1521 12:25:56.865942 PCI: 00:1f.3 subsystem <- 8086/02c8
1522 12:25:56.869476 PCI: 00:1f.3 cmd <- 02
1523 12:25:56.872631 PCI: 00:1f.4 subsystem <- 8086/02a3
1524 12:25:56.875601 PCI: 00:1f.4 cmd <- 03
1525 12:25:56.878940 PCI: 00:1f.5 subsystem <- 8086/02a4
1526 12:25:56.882527 PCI: 00:1f.5 cmd <- 406
1527 12:25:56.890839 PCI: 01:00.0 cmd <- 02
1528 12:25:56.896346 done.
1529 12:25:56.909913 ME: Version: 14.0.39.1367
1530 12:25:56.916587 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1531 12:25:56.919838 Initializing devices...
1532 12:25:56.919955 Root Device init ...
1533 12:25:56.926440 Chrome EC: Set SMI mask to 0x0000000000000000
1534 12:25:56.929554 Chrome EC: clear events_b mask to 0x0000000000000000
1535 12:25:56.936432 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1536 12:25:56.943096 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1537 12:25:56.949463 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1538 12:25:56.952764 Chrome EC: Set WAKE mask to 0x0000000000000000
1539 12:25:56.956664 Root Device init finished in 35197 usecs
1540 12:25:56.959815 CPU_CLUSTER: 0 init ...
1541 12:25:56.966324 CPU_CLUSTER: 0 init finished in 2447 usecs
1542 12:25:56.970966 PCI: 00:00.0 init ...
1543 12:25:56.973881 CPU TDP: 15 Watts
1544 12:25:56.976911 CPU PL2 = 64 Watts
1545 12:25:56.980616 PCI: 00:00.0 init finished in 7070 usecs
1546 12:25:56.983789 PCI: 00:02.0 init ...
1547 12:25:56.987396 PCI: 00:02.0 init finished in 2253 usecs
1548 12:25:56.990283 PCI: 00:08.0 init ...
1549 12:25:56.994093 PCI: 00:08.0 init finished in 2251 usecs
1550 12:25:56.997331 PCI: 00:12.0 init ...
1551 12:25:57.000539 PCI: 00:12.0 init finished in 2252 usecs
1552 12:25:57.003796 PCI: 00:14.0 init ...
1553 12:25:57.006958 PCI: 00:14.0 init finished in 2251 usecs
1554 12:25:57.010178 PCI: 00:14.2 init ...
1555 12:25:57.014133 PCI: 00:14.2 init finished in 2253 usecs
1556 12:25:57.017508 PCI: 00:14.3 init ...
1557 12:25:57.020466 PCI: 00:14.3 init finished in 2269 usecs
1558 12:25:57.023819 PCI: 00:15.0 init ...
1559 12:25:57.027015 DW I2C bus 0 at 0xd121f000 (400 KHz)
1560 12:25:57.030345 PCI: 00:15.0 init finished in 5965 usecs
1561 12:25:57.033537 PCI: 00:15.1 init ...
1562 12:25:57.036841 DW I2C bus 1 at 0xd1220000 (400 KHz)
1563 12:25:57.039947 PCI: 00:15.1 init finished in 5975 usecs
1564 12:25:57.043620 PCI: 00:16.0 init ...
1565 12:25:57.047488 PCI: 00:16.0 init finished in 2252 usecs
1566 12:25:57.051128 PCI: 00:19.0 init ...
1567 12:25:57.054609 DW I2C bus 4 at 0xd1222000 (400 KHz)
1568 12:25:57.061056 PCI: 00:19.0 init finished in 5969 usecs
1569 12:25:57.061169 PCI: 00:1d.0 init ...
1570 12:25:57.064308 Initializing PCH PCIe bridge.
1571 12:25:57.067755 PCI: 00:1d.0 init finished in 5284 usecs
1572 12:25:57.072453 PCI: 00:1f.0 init ...
1573 12:25:57.075714 IOAPIC: Initializing IOAPIC at 0xfec00000
1574 12:25:57.082258 IOAPIC: Bootstrap Processor Local APIC = 0x00
1575 12:25:57.082350 IOAPIC: ID = 0x02
1576 12:25:57.085898 IOAPIC: Dumping registers
1577 12:25:57.089145 reg 0x0000: 0x02000000
1578 12:25:57.092393 reg 0x0001: 0x00770020
1579 12:25:57.092478 reg 0x0002: 0x00000000
1580 12:25:57.099282 PCI: 00:1f.0 init finished in 23539 usecs
1581 12:25:57.102177 PCI: 00:1f.4 init ...
1582 12:25:57.105408 PCI: 00:1f.4 init finished in 2262 usecs
1583 12:25:57.116853 PCI: 01:00.0 init ...
1584 12:25:57.120022 PCI: 01:00.0 init finished in 2252 usecs
1585 12:25:57.124402 PNP: 0c09.0 init ...
1586 12:25:57.127557 Google Chrome EC uptime: 11.091 seconds
1587 12:25:57.133784 Google Chrome AP resets since EC boot: 0
1588 12:25:57.137812 Google Chrome most recent AP reset causes:
1589 12:25:57.143731 Google Chrome EC reset flags at last EC boot: reset-pin
1590 12:25:57.147105 PNP: 0c09.0 init finished in 20596 usecs
1591 12:25:57.150781 Devices initialized
1592 12:25:57.153794 Show all devs... After init.
1593 12:25:57.153905 Root Device: enabled 1
1594 12:25:57.157421 CPU_CLUSTER: 0: enabled 1
1595 12:25:57.160324 DOMAIN: 0000: enabled 1
1596 12:25:57.160467 APIC: 00: enabled 1
1597 12:25:57.163665 PCI: 00:00.0: enabled 1
1598 12:25:57.166887 PCI: 00:02.0: enabled 1
1599 12:25:57.170748 PCI: 00:04.0: enabled 0
1600 12:25:57.170868 PCI: 00:05.0: enabled 0
1601 12:25:57.173426 PCI: 00:12.0: enabled 1
1602 12:25:57.176857 PCI: 00:12.5: enabled 0
1603 12:25:57.180197 PCI: 00:12.6: enabled 0
1604 12:25:57.180302 PCI: 00:14.0: enabled 1
1605 12:25:57.183427 PCI: 00:14.1: enabled 0
1606 12:25:57.187216 PCI: 00:14.3: enabled 1
1607 12:25:57.187300 PCI: 00:14.5: enabled 0
1608 12:25:57.190253 PCI: 00:15.0: enabled 1
1609 12:25:57.193371 PCI: 00:15.1: enabled 1
1610 12:25:57.196724 PCI: 00:15.2: enabled 0
1611 12:25:57.196836 PCI: 00:15.3: enabled 0
1612 12:25:57.200136 PCI: 00:16.0: enabled 1
1613 12:25:57.203354 PCI: 00:16.1: enabled 0
1614 12:25:57.206722 PCI: 00:16.2: enabled 0
1615 12:25:57.206807 PCI: 00:16.3: enabled 0
1616 12:25:57.210445 PCI: 00:16.4: enabled 0
1617 12:25:57.213419 PCI: 00:16.5: enabled 0
1618 12:25:57.216811 PCI: 00:17.0: enabled 1
1619 12:25:57.216920 PCI: 00:19.0: enabled 1
1620 12:25:57.220201 PCI: 00:19.1: enabled 0
1621 12:25:57.223739 PCI: 00:19.2: enabled 0
1622 12:25:57.226857 PCI: 00:1a.0: enabled 0
1623 12:25:57.226972 PCI: 00:1c.0: enabled 0
1624 12:25:57.229961 PCI: 00:1c.1: enabled 0
1625 12:25:57.233387 PCI: 00:1c.2: enabled 0
1626 12:25:57.233469 PCI: 00:1c.3: enabled 0
1627 12:25:57.236426 PCI: 00:1c.4: enabled 0
1628 12:25:57.239610 PCI: 00:1c.5: enabled 0
1629 12:25:57.243439 PCI: 00:1c.6: enabled 0
1630 12:25:57.243524 PCI: 00:1c.7: enabled 0
1631 12:25:57.246786 PCI: 00:1d.0: enabled 1
1632 12:25:57.250067 PCI: 00:1d.1: enabled 0
1633 12:25:57.253542 PCI: 00:1d.2: enabled 0
1634 12:25:57.253634 PCI: 00:1d.3: enabled 0
1635 12:25:57.256484 PCI: 00:1d.4: enabled 0
1636 12:25:57.259874 PCI: 00:1d.5: enabled 0
1637 12:25:57.263162 PCI: 00:1e.0: enabled 1
1638 12:25:57.263246 PCI: 00:1e.1: enabled 0
1639 12:25:57.266260 PCI: 00:1e.2: enabled 1
1640 12:25:57.269370 PCI: 00:1e.3: enabled 1
1641 12:25:57.269474 PCI: 00:1f.0: enabled 1
1642 12:25:57.272727 PCI: 00:1f.1: enabled 0
1643 12:25:57.276364 PCI: 00:1f.2: enabled 0
1644 12:25:57.279706 PCI: 00:1f.3: enabled 1
1645 12:25:57.279783 PCI: 00:1f.4: enabled 1
1646 12:25:57.283044 PCI: 00:1f.5: enabled 1
1647 12:25:57.286502 PCI: 00:1f.6: enabled 0
1648 12:25:57.289853 USB0 port 0: enabled 1
1649 12:25:57.289964 I2C: 01:15: enabled 1
1650 12:25:57.293093 I2C: 02:5d: enabled 1
1651 12:25:57.296298 GENERIC: 0.0: enabled 1
1652 12:25:57.296425 I2C: 03:1a: enabled 1
1653 12:25:57.299534 I2C: 03:38: enabled 1
1654 12:25:57.302420 I2C: 03:39: enabled 1
1655 12:25:57.302545 I2C: 03:3a: enabled 1
1656 12:25:57.305756 I2C: 03:3b: enabled 1
1657 12:25:57.309048 PCI: 00:00.0: enabled 1
1658 12:25:57.309153 SPI: 00: enabled 1
1659 12:25:57.312368 SPI: 01: enabled 1
1660 12:25:57.315808 PNP: 0c09.0: enabled 1
1661 12:25:57.315917 USB2 port 0: enabled 1
1662 12:25:57.319016 USB2 port 1: enabled 1
1663 12:25:57.322464 USB2 port 2: enabled 0
1664 12:25:57.325580 USB2 port 3: enabled 0
1665 12:25:57.325692 USB2 port 5: enabled 0
1666 12:25:57.329366 USB2 port 6: enabled 1
1667 12:25:57.332359 USB2 port 9: enabled 1
1668 12:25:57.332495 USB3 port 0: enabled 1
1669 12:25:57.335848 USB3 port 1: enabled 1
1670 12:25:57.338868 USB3 port 2: enabled 1
1671 12:25:57.338959 USB3 port 3: enabled 1
1672 12:25:57.342395 USB3 port 4: enabled 0
1673 12:25:57.345798 APIC: 03: enabled 1
1674 12:25:57.345885 APIC: 06: enabled 1
1675 12:25:57.349152 APIC: 01: enabled 1
1676 12:25:57.352485 APIC: 02: enabled 1
1677 12:25:57.352573 APIC: 05: enabled 1
1678 12:25:57.355722 APIC: 04: enabled 1
1679 12:25:57.355831 APIC: 07: enabled 1
1680 12:25:57.359138 PCI: 00:08.0: enabled 1
1681 12:25:57.362125 PCI: 00:14.2: enabled 1
1682 12:25:57.365478 PCI: 01:00.0: enabled 1
1683 12:25:57.368871 Disabling ACPI via APMC:
1684 12:25:57.372674 done.
1685 12:25:57.375882 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1686 12:25:57.378927 ELOG: NV offset 0xaf0000 size 0x4000
1687 12:25:57.385476 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1688 12:25:57.392819 ELOG: Event(17) added with size 13 at 2023-11-08 12:23:48 UTC
1689 12:25:57.399126 ELOG: Event(92) added with size 9 at 2023-11-08 12:23:48 UTC
1690 12:25:57.405589 ELOG: Event(93) added with size 9 at 2023-11-08 12:23:48 UTC
1691 12:25:57.412166 ELOG: Event(9A) added with size 9 at 2023-11-08 12:23:48 UTC
1692 12:25:57.418899 ELOG: Event(9E) added with size 10 at 2023-11-08 12:23:48 UTC
1693 12:25:57.425519 ELOG: Event(9F) added with size 14 at 2023-11-08 12:23:48 UTC
1694 12:25:57.428949 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1695 12:25:57.436122 ELOG: Event(A1) added with size 10 at 2023-11-08 12:23:48 UTC
1696 12:25:57.446241 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1697 12:25:57.452606 ELOG: Event(A0) added with size 9 at 2023-11-08 12:23:48 UTC
1698 12:25:57.455701 elog_add_boot_reason: Logged dev mode boot
1699 12:25:57.459553 Finalize devices...
1700 12:25:57.459640 PCI: 00:17.0 final
1701 12:25:57.462538 Devices finalized
1702 12:25:57.465824 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1703 12:25:57.472381 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1704 12:25:57.475787 ME: HFSTS1 : 0x90000245
1705 12:25:57.479010 ME: HFSTS2 : 0x3B850126
1706 12:25:57.485520 ME: HFSTS3 : 0x00000020
1707 12:25:57.488809 ME: HFSTS4 : 0x00004800
1708 12:25:57.492572 ME: HFSTS5 : 0x00000000
1709 12:25:57.495585 ME: HFSTS6 : 0x40400006
1710 12:25:57.499346 ME: Manufacturing Mode : NO
1711 12:25:57.502581 ME: FW Partition Table : OK
1712 12:25:57.505476 ME: Bringup Loader Failure : NO
1713 12:25:57.508783 ME: Firmware Init Complete : YES
1714 12:25:57.512003 ME: Boot Options Present : NO
1715 12:25:57.515837 ME: Update In Progress : NO
1716 12:25:57.518903 ME: D0i3 Support : YES
1717 12:25:57.522383 ME: Low Power State Enabled : NO
1718 12:25:57.525612 ME: CPU Replaced : NO
1719 12:25:57.528927 ME: CPU Replacement Valid : YES
1720 12:25:57.532291 ME: Current Working State : 5
1721 12:25:57.535546 ME: Current Operation State : 1
1722 12:25:57.538960 ME: Current Operation Mode : 0
1723 12:25:57.542404 ME: Error Code : 0
1724 12:25:57.545066 ME: CPU Debug Disabled : YES
1725 12:25:57.548348 ME: TXT Support : NO
1726 12:25:57.555386 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1727 12:25:57.561973 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 12:25:57.562082 CBFS @ c08000 size 3f8000
1729 12:25:57.568397 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1730 12:25:57.571565 CBFS: Locating 'fallback/dsdt.aml'
1731 12:25:57.575298 CBFS: Found @ offset 10bb80 size 3fa5
1732 12:25:57.581406 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 12:25:57.584841 CBFS @ c08000 size 3f8000
1734 12:25:57.588427 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 12:25:57.591422 CBFS: Locating 'fallback/slic'
1736 12:25:57.596728 CBFS: 'fallback/slic' not found.
1737 12:25:57.603443 ACPI: Writing ACPI tables at 99b3e000.
1738 12:25:57.603529 ACPI: * FACS
1739 12:25:57.606427 ACPI: * DSDT
1740 12:25:57.610326 Ramoops buffer: 0x100000@0x99a3d000.
1741 12:25:57.613562 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1742 12:25:57.620048 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1743 12:25:57.623369 Google Chrome EC: version:
1744 12:25:57.626428 ro: helios_v2.0.2659-56403530b
1745 12:25:57.629797 rw: helios_v2.0.2849-c41de27e7d
1746 12:25:57.629880 running image: 1
1747 12:25:57.633838 ACPI: * FADT
1748 12:25:57.633921 SCI is IRQ9
1749 12:25:57.640487 ACPI: added table 1/32, length now 40
1750 12:25:57.640574 ACPI: * SSDT
1751 12:25:57.643827 Found 1 CPU(s) with 8 core(s) each.
1752 12:25:57.647048 Error: Could not locate 'wifi_sar' in VPD.
1753 12:25:57.653699 Checking CBFS for default SAR values
1754 12:25:57.657074 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1755 12:25:57.660235 CBFS @ c08000 size 3f8000
1756 12:25:57.667362 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1757 12:25:57.670691 CBFS: Locating 'wifi_sar_defaults.hex'
1758 12:25:57.673647 CBFS: Found @ offset 5fac0 size 77
1759 12:25:57.676841 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1760 12:25:57.683902 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1761 12:25:57.687046 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1762 12:25:57.693856 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1763 12:25:57.697247 failed to find key in VPD: dsm_calib_r0_0
1764 12:25:57.706925 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1765 12:25:57.710486 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1766 12:25:57.713410 failed to find key in VPD: dsm_calib_r0_1
1767 12:25:57.723407 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1768 12:25:57.730053 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1769 12:25:57.733129 failed to find key in VPD: dsm_calib_r0_2
1770 12:25:57.743549 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1771 12:25:57.746872 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1772 12:25:57.752969 failed to find key in VPD: dsm_calib_r0_3
1773 12:25:57.759565 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1774 12:25:57.766700 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1775 12:25:57.769887 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1776 12:25:57.773140 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1777 12:25:57.777176 EC returned error result code 1
1778 12:25:57.780442 EC returned error result code 1
1779 12:25:57.784596 EC returned error result code 1
1780 12:25:57.791411 PS2K: Bad resp from EC. Vivaldi disabled!
1781 12:25:57.794733 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1782 12:25:57.800659 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1783 12:25:57.807514 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1784 12:25:57.810833 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1785 12:25:57.817629 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1786 12:25:57.824093 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1787 12:25:57.830559 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1788 12:25:57.834197 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1789 12:25:57.840622 ACPI: added table 2/32, length now 44
1790 12:25:57.840708 ACPI: * MCFG
1791 12:25:57.844249 ACPI: added table 3/32, length now 48
1792 12:25:57.847436 ACPI: * TPM2
1793 12:25:57.850624 TPM2 log created at 99a2d000
1794 12:25:57.853948 ACPI: added table 4/32, length now 52
1795 12:25:57.854031 ACPI: * MADT
1796 12:25:57.857466 SCI is IRQ9
1797 12:25:57.860721 ACPI: added table 5/32, length now 56
1798 12:25:57.860828 current = 99b43ac0
1799 12:25:57.863418 ACPI: * DMAR
1800 12:25:57.867235 ACPI: added table 6/32, length now 60
1801 12:25:57.870568 ACPI: * IGD OpRegion
1802 12:25:57.870668 GMA: Found VBT in CBFS
1803 12:25:57.873765 GMA: Found valid VBT in CBFS
1804 12:25:57.876852 ACPI: added table 7/32, length now 64
1805 12:25:57.880169 ACPI: * HPET
1806 12:25:57.883576 ACPI: added table 8/32, length now 68
1807 12:25:57.886876 ACPI: done.
1808 12:25:57.886992 ACPI tables: 31744 bytes.
1809 12:25:57.890161 smbios_write_tables: 99a2c000
1810 12:25:57.894189 EC returned error result code 3
1811 12:25:57.897384 Couldn't obtain OEM name from CBI
1812 12:25:57.900792 Create SMBIOS type 17
1813 12:25:57.903542 PCI: 00:00.0 (Intel Cannonlake)
1814 12:25:57.906855 PCI: 00:14.3 (Intel WiFi)
1815 12:25:57.910571 SMBIOS tables: 939 bytes.
1816 12:25:57.913590 Writing table forward entry at 0x00000500
1817 12:25:57.920212 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1818 12:25:57.923396 Writing coreboot table at 0x99b62000
1819 12:25:57.930330 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1820 12:25:57.933518 1. 0000000000001000-000000000009ffff: RAM
1821 12:25:57.936748 2. 00000000000a0000-00000000000fffff: RESERVED
1822 12:25:57.943219 3. 0000000000100000-0000000099a2bfff: RAM
1823 12:25:57.949573 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1824 12:25:57.953271 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1825 12:25:57.959881 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1826 12:25:57.963505 7. 000000009a000000-000000009f7fffff: RESERVED
1827 12:25:57.969668 8. 00000000e0000000-00000000efffffff: RESERVED
1828 12:25:57.972851 9. 00000000fc000000-00000000fc000fff: RESERVED
1829 12:25:57.979395 10. 00000000fe000000-00000000fe00ffff: RESERVED
1830 12:25:57.982625 11. 00000000fed10000-00000000fed17fff: RESERVED
1831 12:25:57.985931 12. 00000000fed80000-00000000fed83fff: RESERVED
1832 12:25:57.992703 13. 00000000fed90000-00000000fed91fff: RESERVED
1833 12:25:57.996076 14. 00000000feda0000-00000000feda1fff: RESERVED
1834 12:25:58.002912 15. 0000000100000000-000000045e7fffff: RAM
1835 12:25:58.005522 Graphics framebuffer located at 0xc0000000
1836 12:25:58.009472 Passing 5 GPIOs to payload:
1837 12:25:58.012715 NAME | PORT | POLARITY | VALUE
1838 12:25:58.018740 write protect | undefined | high | low
1839 12:25:58.025790 lid | undefined | high | high
1840 12:25:58.028769 power | undefined | high | low
1841 12:25:58.035482 oprom | undefined | high | low
1842 12:25:58.038613 EC in RW | 0x000000cb | high | low
1843 12:25:58.042261 Board ID: 4
1844 12:25:58.045521 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1845 12:25:58.048843 CBFS @ c08000 size 3f8000
1846 12:25:58.055204 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1847 12:25:58.061754 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1848 12:25:58.065025 coreboot table: 1492 bytes.
1849 12:25:58.068446 IMD ROOT 0. 99fff000 00001000
1850 12:25:58.072071 IMD SMALL 1. 99ffe000 00001000
1851 12:25:58.075020 FSP MEMORY 2. 99c4e000 003b0000
1852 12:25:58.078607 CONSOLE 3. 99c2e000 00020000
1853 12:25:58.081613 FMAP 4. 99c2d000 0000054e
1854 12:25:58.085008 TIME STAMP 5. 99c2c000 00000910
1855 12:25:58.088474 VBOOT WORK 6. 99c18000 00014000
1856 12:25:58.091809 MRC DATA 7. 99c16000 00001958
1857 12:25:58.095056 ROMSTG STCK 8. 99c15000 00001000
1858 12:25:58.098408 AFTER CAR 9. 99c0b000 0000a000
1859 12:25:58.101617 RAMSTAGE 10. 99baf000 0005c000
1860 12:25:58.104921 REFCODE 11. 99b7a000 00035000
1861 12:25:58.108335 SMM BACKUP 12. 99b6a000 00010000
1862 12:25:58.111526 COREBOOT 13. 99b62000 00008000
1863 12:25:58.114811 ACPI 14. 99b3e000 00024000
1864 12:25:58.118122 ACPI GNVS 15. 99b3d000 00001000
1865 12:25:58.121497 RAMOOPS 16. 99a3d000 00100000
1866 12:25:58.124802 TPM2 TCGLOG17. 99a2d000 00010000
1867 12:25:58.128050 SMBIOS 18. 99a2c000 00000800
1868 12:25:58.128126 IMD small region:
1869 12:25:58.131997 IMD ROOT 0. 99ffec00 00000400
1870 12:25:58.135017 FSP RUNTIME 1. 99ffebe0 00000004
1871 12:25:58.138308 EC HOSTEVENT 2. 99ffebc0 00000008
1872 12:25:58.141386 POWER STATE 3. 99ffeb80 00000040
1873 12:25:58.148177 ROMSTAGE 4. 99ffeb60 00000004
1874 12:25:58.151313 MEM INFO 5. 99ffe9a0 000001b9
1875 12:25:58.154514 VPD 6. 99ffe920 0000006c
1876 12:25:58.158394 MTRR: Physical address space:
1877 12:25:58.161585 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1878 12:25:58.167771 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1879 12:25:58.174325 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1880 12:25:58.180845 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1881 12:25:58.187381 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1882 12:25:58.194424 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1883 12:25:58.200991 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1884 12:25:58.204290 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 12:25:58.207192 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 12:25:58.214272 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 12:25:58.217584 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 12:25:58.220761 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 12:25:58.224130 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 12:25:58.230789 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 12:25:58.233997 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 12:25:58.237251 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 12:25:58.240629 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 12:25:58.243730 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 12:25:58.247616 call enable_fixed_mtrr()
1896 12:25:58.251008 CPU physical address size: 39 bits
1897 12:25:58.257464 MTRR: default type WB/UC MTRR counts: 6/8.
1898 12:25:58.261072 MTRR: WB selected as default type.
1899 12:25:58.267602 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1900 12:25:58.271331 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1901 12:25:58.277271 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1902 12:25:58.284081 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1903 12:25:58.290669 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1904 12:25:58.297329 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1905 12:25:58.300804 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 12:25:58.307230 MTRR: Fixed MSR 0x258 0x0606060606060606
1907 12:25:58.310905 MTRR: Fixed MSR 0x259 0x0000000000000000
1908 12:25:58.314368 MTRR: Fixed MSR 0x268 0x0606060606060606
1909 12:25:58.317460 MTRR: Fixed MSR 0x269 0x0606060606060606
1910 12:25:58.323786 MTRR: Fixed MSR 0x26a 0x0606060606060606
1911 12:25:58.327141 MTRR: Fixed MSR 0x26b 0x0606060606060606
1912 12:25:58.330709 MTRR: Fixed MSR 0x26c 0x0606060606060606
1913 12:25:58.333507 MTRR: Fixed MSR 0x26d 0x0606060606060606
1914 12:25:58.340548 MTRR: Fixed MSR 0x26e 0x0606060606060606
1915 12:25:58.343718 MTRR: Fixed MSR 0x26f 0x0606060606060606
1916 12:25:58.343833
1917 12:25:58.343926 MTRR check
1918 12:25:58.346775 Fixed MTRRs : Enabled
1919 12:25:58.350680 Variable MTRRs: Enabled
1920 12:25:58.350791
1921 12:25:58.353925 call enable_fixed_mtrr()
1922 12:25:58.357051 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1923 12:25:58.360472 CPU physical address size: 39 bits
1924 12:25:58.367509 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1925 12:25:58.370730 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 12:25:58.373608 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 12:25:58.380341 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 12:25:58.383546 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 12:25:58.386947 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 12:25:58.390669 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 12:25:58.397206 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 12:25:58.400505 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 12:25:58.403851 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 12:25:58.407229 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 12:25:58.410441 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 12:25:58.416826 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 12:25:58.420065 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 12:25:58.423434 call enable_fixed_mtrr()
1939 12:25:58.426850 CBFS @ c08000 size 3f8000
1940 12:25:58.430240 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 12:25:58.433649 MTRR: Fixed MSR 0x250 0x0606060606060606
1942 12:25:58.436933 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 12:25:58.442973 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 12:25:58.446482 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 12:25:58.449668 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 12:25:58.453312 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 12:25:58.456292 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 12:25:58.463087 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 12:25:58.466193 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 12:25:58.470022 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 12:25:58.473233 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 12:25:58.479809 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 12:25:58.483208 call enable_fixed_mtrr()
1954 12:25:58.486139 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 12:25:58.489723 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 12:25:58.492936 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 12:25:58.496115 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 12:25:58.502712 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 12:25:58.505840 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 12:25:58.509221 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 12:25:58.512605 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 12:25:58.519044 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 12:25:58.523065 CPU physical address size: 39 bits
1964 12:25:58.526046 call enable_fixed_mtrr()
1965 12:25:58.529539 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 12:25:58.532764 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 12:25:58.536017 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 12:25:58.542891 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 12:25:58.545480 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 12:25:58.549506 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 12:25:58.552336 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 12:25:58.559031 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 12:25:58.562075 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 12:25:58.565901 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 12:25:58.568842 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 12:25:58.575433 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 12:25:58.575514 call enable_fixed_mtrr()
1978 12:25:58.582291 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 12:25:58.585536 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 12:25:58.588915 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 12:25:58.592161 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 12:25:58.595991 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 12:25:58.602151 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 12:25:58.605509 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 12:25:58.608516 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 12:25:58.612039 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 12:25:58.618470 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 12:25:58.622269 CPU physical address size: 39 bits
1989 12:25:58.625390 call enable_fixed_mtrr()
1990 12:25:58.628594 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 12:25:58.632046 CPU physical address size: 39 bits
1992 12:25:58.635295 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 12:25:58.642137 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 12:25:58.645411 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 12:25:58.648739 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 12:25:58.651972 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 12:25:58.655374 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 12:25:58.662040 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 12:25:58.665367 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 12:25:58.668701 CPU physical address size: 39 bits
2001 12:25:58.671988 call enable_fixed_mtrr()
2002 12:25:58.674772 CPU physical address size: 39 bits
2003 12:25:58.678001 CPU physical address size: 39 bits
2004 12:25:58.685260 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2005 12:25:58.688578 CBFS: Locating 'fallback/payload'
2006 12:25:58.691698 CBFS: Found @ offset 1c96c0 size 3f798
2007 12:25:58.695104 Checking segment from ROM address 0xffdd16f8
2008 12:25:58.701478 Checking segment from ROM address 0xffdd1714
2009 12:25:58.704511 Loading segment from ROM address 0xffdd16f8
2010 12:25:58.708329 code (compression=0)
2011 12:25:58.714577 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2012 12:25:58.724515 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2013 12:25:58.727729 it's not compressed!
2014 12:25:58.819156 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2015 12:25:58.825806 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2016 12:25:58.829052 Loading segment from ROM address 0xffdd1714
2017 12:25:58.832356 Entry Point 0x30000000
2018 12:25:58.835659 Loaded segments
2019 12:25:58.841757 Finalizing chipset.
2020 12:25:58.844814 Finalizing SMM.
2021 12:25:58.847743 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2022 12:25:58.851448 mp_park_aps done after 0 msecs.
2023 12:25:58.857541 Jumping to boot code at 30000000(99b62000)
2024 12:25:58.864175 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2025 12:25:58.864274
2026 12:25:58.864340
2027 12:25:58.864419
2028 12:25:58.867685 Starting depthcharge on Helios...
2029 12:25:58.867788
2030 12:25:58.868224 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2031 12:25:58.868360 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2032 12:25:58.868481 Setting prompt string to ['hatch:']
2033 12:25:58.868591 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2034 12:25:58.877309 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2035 12:25:58.877432
2036 12:25:58.883944 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2037 12:25:58.884051
2038 12:25:58.891020 board_setup: Info: eMMC controller not present; skipping
2039 12:25:58.891127
2040 12:25:58.894300 New NVMe Controller 0x30053ac0 @ 00:1d:00
2041 12:25:58.894379
2042 12:25:58.900466 board_setup: Info: SDHCI controller not present; skipping
2043 12:25:58.900571
2044 12:25:58.907085 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2045 12:25:58.907194
2046 12:25:58.907288 Wipe memory regions:
2047 12:25:58.907379
2048 12:25:58.910453 [0x00000000001000, 0x000000000a0000)
2049 12:25:58.910554
2050 12:25:58.917155 [0x00000000100000, 0x00000030000000)
2051 12:25:58.980634
2052 12:25:58.983808 [0x00000030657430, 0x00000099a2c000)
2053 12:25:59.121403
2054 12:25:59.124424 [0x00000100000000, 0x0000045e800000)
2055 12:26:00.506951
2056 12:26:00.507093 R8152: Initializing
2057 12:26:00.507192
2058 12:26:00.510188 Version 9 (ocp_data = 6010)
2059 12:26:00.514061
2060 12:26:00.514160 R8152: Done initializing
2061 12:26:00.514226
2062 12:26:00.517316 Adding net device
2063 12:26:01.000727
2064 12:26:01.000885 R8152: Initializing
2065 12:26:01.001014
2066 12:26:01.003978 Version 6 (ocp_data = 5c30)
2067 12:26:01.004077
2068 12:26:01.007317 R8152: Done initializing
2069 12:26:01.007392
2070 12:26:01.010469 net_add_device: Attemp to include the same device
2071 12:26:01.013791
2072 12:26:01.021065 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2073 12:26:01.021173
2074 12:26:01.021264
2075 12:26:01.021355
2076 12:26:01.021650 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2078 12:26:01.122003 hatch: tftpboot 192.168.201.1 11967705/tftp-deploy-zr1z_em9/kernel/bzImage 11967705/tftp-deploy-zr1z_em9/kernel/cmdline 11967705/tftp-deploy-zr1z_em9/ramdisk/ramdisk.cpio.gz
2079 12:26:01.122176 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2080 12:26:01.122292 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2081 12:26:01.126803 tftpboot 192.168.201.1 11967705/tftp-deploy-zr1z_em9/kernel/bzIploy-zr1z_em9/kernel/cmdline 11967705/tftp-deploy-zr1z_em9/ramdisk/ramdisk.cpio.gz
2082 12:26:01.126913
2083 12:26:01.127004 Waiting for link
2084 12:26:01.327495
2085 12:26:01.327659 done.
2086 12:26:01.327757
2087 12:26:01.327847 MAC: 00:24:32:50:19:be
2088 12:26:01.327937
2089 12:26:01.331267 Sending DHCP discover... done.
2090 12:26:01.331369
2091 12:26:01.334018 Waiting for reply... done.
2092 12:26:01.334094
2093 12:26:01.336998 Sending DHCP request... done.
2094 12:26:01.337101
2095 12:26:01.347811 Waiting for reply... done.
2096 12:26:01.347921
2097 12:26:01.348017 My ip is 192.168.201.15
2098 12:26:01.348108
2099 12:26:01.351453 The DHCP server ip is 192.168.201.1
2100 12:26:01.354905
2101 12:26:01.357889 TFTP server IP predefined by user: 192.168.201.1
2102 12:26:01.357989
2103 12:26:01.364597 Bootfile predefined by user: 11967705/tftp-deploy-zr1z_em9/kernel/bzImage
2104 12:26:01.364696
2105 12:26:01.368203 Sending tftp read request... done.
2106 12:26:01.368300
2107 12:26:01.374228 Waiting for the transfer...
2108 12:26:01.374344
2109 12:26:01.903182 00000000 ################################################################
2110 12:26:01.903428
2111 12:26:02.495309 00080000 ################################################################
2112 12:26:02.495827
2113 12:26:03.184684 00100000 ################################################################
2114 12:26:03.185226
2115 12:26:03.900602 00180000 ################################################################
2116 12:26:03.901244
2117 12:26:04.512495 00200000 ################################################################
2118 12:26:04.512993
2119 12:26:05.116128 00280000 ################################################################
2120 12:26:05.116623
2121 12:26:05.783494 00300000 ################################################################
2122 12:26:05.783995
2123 12:26:06.413235 00380000 ################################################################
2124 12:26:06.413775
2125 12:26:07.067920 00400000 ################################################################
2126 12:26:07.068064
2127 12:26:07.730604 00480000 ################################################################
2128 12:26:07.731185
2129 12:26:08.373712 00500000 ################################################################
2130 12:26:08.374308
2131 12:26:09.047590 00580000 ################################################################
2132 12:26:09.047881
2133 12:26:09.603243 00600000 ################################################################
2134 12:26:09.603413
2135 12:26:10.139954 00680000 ################################################################
2136 12:26:10.140102
2137 12:26:10.677498 00700000 ################################################################
2138 12:26:10.677696
2139 12:26:11.221769 00780000 ################################################################
2140 12:26:11.221912
2141 12:26:11.776522 00800000 ################################################################
2142 12:26:11.776671
2143 12:26:12.380671 00880000 ################################################################
2144 12:26:12.381184
2145 12:26:12.990671 00900000 ################################################################
2146 12:26:12.990814
2147 12:26:13.587022 00980000 ################################################################
2148 12:26:13.587533
2149 12:26:14.221432 00a00000 ################################################################
2150 12:26:14.221564
2151 12:26:14.822062 00a80000 ################################################################
2152 12:26:14.822255
2153 12:26:14.869850 00b00000 ##### done.
2154 12:26:14.870551
2155 12:26:14.873549 The bootfile was 11571200 bytes long.
2156 12:26:14.874229
2157 12:26:14.876581 Sending tftp read request... done.
2158 12:26:14.877197
2159 12:26:14.879661 Waiting for the transfer...
2160 12:26:14.880258
2161 12:26:15.495904 00000000 ################################################################
2162 12:26:15.496033
2163 12:26:16.051358 00080000 ################################################################
2164 12:26:16.051491
2165 12:26:16.661548 00100000 ################################################################
2166 12:26:16.662117
2167 12:26:17.309878 00180000 ################################################################
2168 12:26:17.310046
2169 12:26:17.884492 00200000 ################################################################
2170 12:26:17.884648
2171 12:26:18.463815 00280000 ################################################################
2172 12:26:18.463993
2173 12:26:19.045743 00300000 ################################################################
2174 12:26:19.045884
2175 12:26:19.633188 00380000 ################################################################
2176 12:26:19.633346
2177 12:26:20.299609 00400000 ################################################################
2178 12:26:20.300117
2179 12:26:20.995925 00480000 ################################################################
2180 12:26:20.996435
2181 12:26:21.680843 00500000 ################################################################
2182 12:26:21.681364
2183 12:26:22.189467 00580000 ################################################ done.
2184 12:26:22.190015
2185 12:26:22.192752 Sending tftp read request... done.
2186 12:26:22.193134
2187 12:26:22.196150 Waiting for the transfer...
2188 12:26:22.196600
2189 12:26:22.199532 00000000 # done.
2190 12:26:22.199959
2191 12:26:22.209673 Command line loaded dynamically from TFTP file: 11967705/tftp-deploy-zr1z_em9/kernel/cmdline
2192 12:26:22.210175
2193 12:26:22.235711 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11967705/extract-nfsrootfs-gmik82zk,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2194 12:26:22.239487
2195 12:26:22.242514 ec_init(0): CrosEC protocol v3 supported (256, 256)
2196 12:26:22.248368
2197 12:26:22.251162 Shutting down all USB controllers.
2198 12:26:22.251651
2199 12:26:22.252019 Removing current net device
2200 12:26:22.255463
2201 12:26:22.256014 Finalizing coreboot
2202 12:26:22.256378
2203 12:26:22.261470 Exiting depthcharge with code 4 at timestamp: 30751716
2204 12:26:22.262029
2205 12:26:22.262391
2206 12:26:22.262726 Starting kernel ...
2207 12:26:22.263049
2208 12:26:22.263359
2209 12:26:22.264663 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2210 12:26:22.265181 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2211 12:26:22.265636 Setting prompt string to ['Linux version [0-9]']
2212 12:26:22.266034 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2213 12:26:22.266407 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2215 12:30:41.266200 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2217 12:30:41.267306 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2219 12:30:41.268136 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2222 12:30:41.269639 end: 2 depthcharge-action (duration 00:05:00) [common]
2224 12:30:41.270813 Cleaning after the job
2225 12:30:41.271297 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967705/tftp-deploy-zr1z_em9/ramdisk
2226 12:30:41.276130 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967705/tftp-deploy-zr1z_em9/kernel
2227 12:30:41.285136 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967705/tftp-deploy-zr1z_em9/nfsrootfs
2228 12:30:41.396843 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967705/tftp-deploy-zr1z_em9/modules
2229 12:30:41.397548 start: 4.1 power-off (timeout 00:00:30) [common]
2230 12:30:41.397755 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2231 12:30:41.476694 >> Command sent successfully.
2232 12:30:41.481072 Returned 0 in 0 seconds
2233 12:30:41.582187 end: 4.1 power-off (duration 00:00:00) [common]
2235 12:30:41.583731 start: 4.2 read-feedback (timeout 00:10:00) [common]
2236 12:30:41.585033 Listened to connection for namespace 'common' for up to 1s
2238 12:30:41.586472 Listened to connection for namespace 'common' for up to 1s
2239 12:30:42.585730 Finalising connection for namespace 'common'
2240 12:30:42.586390 Disconnecting from shell: Finalise
2241 12:30:42.586781
2242 12:30:42.687949 end: 4.2 read-feedback (duration 00:00:01) [common]
2243 12:30:42.688693 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11967705
2244 12:30:43.248625 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11967705
2245 12:30:43.248815 JobError: Your job cannot terminate cleanly.