Boot log: asus-cx9400-volteer

    1 12:23:05.851798  lava-dispatcher, installed at version: 2023.10
    2 12:23:05.852026  start: 0 validate
    3 12:23:05.852162  Start time: 2023-11-08 12:23:05.852153+00:00 (UTC)
    4 12:23:05.852329  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:23:05.852462  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:23:06.121908  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:23:06.122092  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:23:10.634084  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:23:10.634948  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:23:10.906584  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:23:10.907458  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:23:11.415293  validate duration: 5.56
   14 12:23:11.415623  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:23:11.415738  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:23:11.415842  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:23:11.415974  Not decompressing ramdisk as can be used compressed.
   18 12:23:11.416076  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
   19 12:23:11.416176  saving as /var/lib/lava/dispatcher/tmp/11967714/tftp-deploy-df2rktnn/ramdisk/initrd.cpio.gz
   20 12:23:11.416311  total size: 5671549 (5 MB)
   21 12:23:11.417992  progress   0 % (0 MB)
   22 12:23:11.419906  progress   5 % (0 MB)
   23 12:23:11.421751  progress  10 % (0 MB)
   24 12:23:11.423403  progress  15 % (0 MB)
   25 12:23:11.425204  progress  20 % (1 MB)
   26 12:23:11.426955  progress  25 % (1 MB)
   27 12:23:11.428609  progress  30 % (1 MB)
   28 12:23:11.430354  progress  35 % (1 MB)
   29 12:23:11.432001  progress  40 % (2 MB)
   30 12:23:11.433573  progress  45 % (2 MB)
   31 12:23:11.435290  progress  50 % (2 MB)
   32 12:23:11.437087  progress  55 % (3 MB)
   33 12:23:11.438547  progress  60 % (3 MB)
   34 12:23:11.440338  progress  65 % (3 MB)
   35 12:23:11.442075  progress  70 % (3 MB)
   36 12:23:11.443705  progress  75 % (4 MB)
   37 12:23:11.445443  progress  80 % (4 MB)
   38 12:23:11.447163  progress  85 % (4 MB)
   39 12:23:11.448825  progress  90 % (4 MB)
   40 12:23:11.450696  progress  95 % (5 MB)
   41 12:23:11.452563  progress 100 % (5 MB)
   42 12:23:11.452706  5 MB downloaded in 0.04 s (148.62 MB/s)
   43 12:23:11.452963  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 12:23:11.453262  end: 1.1 download-retry (duration 00:00:00) [common]
   46 12:23:11.453383  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 12:23:11.453499  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 12:23:11.453685  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   49 12:23:11.453769  saving as /var/lib/lava/dispatcher/tmp/11967714/tftp-deploy-df2rktnn/kernel/bzImage
   50 12:23:11.453832  total size: 11571200 (11 MB)
   51 12:23:11.453954  No compression specified
   52 12:23:11.455477  progress   0 % (0 MB)
   53 12:23:11.458759  progress   5 % (0 MB)
   54 12:23:11.462142  progress  10 % (1 MB)
   55 12:23:11.465309  progress  15 % (1 MB)
   56 12:23:11.468645  progress  20 % (2 MB)
   57 12:23:11.472070  progress  25 % (2 MB)
   58 12:23:11.475245  progress  30 % (3 MB)
   59 12:23:11.478578  progress  35 % (3 MB)
   60 12:23:11.482075  progress  40 % (4 MB)
   61 12:23:11.485385  progress  45 % (4 MB)
   62 12:23:11.488782  progress  50 % (5 MB)
   63 12:23:11.492260  progress  55 % (6 MB)
   64 12:23:11.495452  progress  60 % (6 MB)
   65 12:23:11.498779  progress  65 % (7 MB)
   66 12:23:11.502196  progress  70 % (7 MB)
   67 12:23:11.505285  progress  75 % (8 MB)
   68 12:23:11.508644  progress  80 % (8 MB)
   69 12:23:11.511890  progress  85 % (9 MB)
   70 12:23:11.515094  progress  90 % (9 MB)
   71 12:23:11.518479  progress  95 % (10 MB)
   72 12:23:11.521939  progress 100 % (11 MB)
   73 12:23:11.522110  11 MB downloaded in 0.07 s (161.64 MB/s)
   74 12:23:11.522279  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:23:11.522581  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:23:11.522701  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 12:23:11.522830  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 12:23:11.523014  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
   80 12:23:11.523110  saving as /var/lib/lava/dispatcher/tmp/11967714/tftp-deploy-df2rktnn/nfsrootfs/full.rootfs.tar
   81 12:23:11.523203  total size: 126031368 (120 MB)
   82 12:23:11.523295  Using unxz to decompress xz
   83 12:23:11.527591  progress   0 % (0 MB)
   84 12:23:12.061278  progress   5 % (6 MB)
   85 12:23:12.585553  progress  10 % (12 MB)
   86 12:23:13.126867  progress  15 % (18 MB)
   87 12:23:13.689729  progress  20 % (24 MB)
   88 12:23:14.075227  progress  25 % (30 MB)
   89 12:23:14.438062  progress  30 % (36 MB)
   90 12:23:14.738600  progress  35 % (42 MB)
   91 12:23:14.929694  progress  40 % (48 MB)
   92 12:23:15.318737  progress  45 % (54 MB)
   93 12:23:15.714089  progress  50 % (60 MB)
   94 12:23:16.076335  progress  55 % (66 MB)
   95 12:23:16.460481  progress  60 % (72 MB)
   96 12:23:16.826105  progress  65 % (78 MB)
   97 12:23:17.231814  progress  70 % (84 MB)
   98 12:23:17.683593  progress  75 % (90 MB)
   99 12:23:18.131090  progress  80 % (96 MB)
  100 12:23:18.239223  progress  85 % (102 MB)
  101 12:23:18.405636  progress  90 % (108 MB)
  102 12:23:18.769908  progress  95 % (114 MB)
  103 12:23:19.167971  progress 100 % (120 MB)
  104 12:23:19.175154  120 MB downloaded in 7.65 s (15.71 MB/s)
  105 12:23:19.175502  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 12:23:19.175792  end: 1.3 download-retry (duration 00:00:08) [common]
  108 12:23:19.175885  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 12:23:19.175976  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 12:23:19.176152  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
  111 12:23:19.176280  saving as /var/lib/lava/dispatcher/tmp/11967714/tftp-deploy-df2rktnn/modules/modules.tar
  112 12:23:19.176380  total size: 483720 (0 MB)
  113 12:23:19.176468  Using unxz to decompress xz
  114 12:23:19.180770  progress   6 % (0 MB)
  115 12:23:19.181263  progress  13 % (0 MB)
  116 12:23:19.181515  progress  20 % (0 MB)
  117 12:23:19.183246  progress  27 % (0 MB)
  118 12:23:19.185341  progress  33 % (0 MB)
  119 12:23:19.187249  progress  40 % (0 MB)
  120 12:23:19.189300  progress  47 % (0 MB)
  121 12:23:19.191315  progress  54 % (0 MB)
  122 12:23:19.193496  progress  60 % (0 MB)
  123 12:23:19.195627  progress  67 % (0 MB)
  124 12:23:19.197749  progress  74 % (0 MB)
  125 12:23:19.199874  progress  81 % (0 MB)
  126 12:23:19.201839  progress  88 % (0 MB)
  127 12:23:19.203935  progress  94 % (0 MB)
  128 12:23:19.206476  progress 100 % (0 MB)
  129 12:23:19.213144  0 MB downloaded in 0.04 s (12.55 MB/s)
  130 12:23:19.213496  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 12:23:19.213916  end: 1.4 download-retry (duration 00:00:00) [common]
  133 12:23:19.214063  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  134 12:23:19.214210  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  135 12:23:22.511642  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11967714/extract-nfsrootfs-qt2enz78
  136 12:23:22.511846  end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
  137 12:23:22.511950  start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
  138 12:23:22.512115  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km
  139 12:23:22.512264  makedir: /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin
  140 12:23:22.512370  makedir: /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/tests
  141 12:23:22.512470  makedir: /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/results
  142 12:23:22.512572  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-add-keys
  143 12:23:22.512716  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-add-sources
  144 12:23:22.512846  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-background-process-start
  145 12:23:22.512975  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-background-process-stop
  146 12:23:22.513102  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-common-functions
  147 12:23:22.513228  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-echo-ipv4
  148 12:23:22.513391  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-install-packages
  149 12:23:22.513535  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-installed-packages
  150 12:23:22.513664  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-os-build
  151 12:23:22.513791  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-probe-channel
  152 12:23:22.513920  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-probe-ip
  153 12:23:22.514049  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-target-ip
  154 12:23:22.514174  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-target-mac
  155 12:23:22.514299  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-target-storage
  156 12:23:22.514426  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-test-case
  157 12:23:22.514554  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-test-event
  158 12:23:22.514679  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-test-feedback
  159 12:23:22.514803  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-test-raise
  160 12:23:22.514927  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-test-reference
  161 12:23:22.515052  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-test-runner
  162 12:23:22.515176  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-test-set
  163 12:23:22.515300  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-test-shell
  164 12:23:22.515426  Updating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-install-packages (oe)
  165 12:23:22.576496  Updating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/bin/lava-installed-packages (oe)
  166 12:23:22.576726  Creating /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/environment
  167 12:23:22.576838  LAVA metadata
  168 12:23:22.576915  - LAVA_JOB_ID=11967714
  169 12:23:22.576979  - LAVA_DISPATCHER_IP=192.168.201.1
  170 12:23:22.577095  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
  171 12:23:22.577163  skipped lava-vland-overlay
  172 12:23:22.577236  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  173 12:23:22.577313  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
  174 12:23:22.577372  skipped lava-multinode-overlay
  175 12:23:22.577441  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  176 12:23:22.577516  start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
  177 12:23:22.577589  Loading test definitions
  178 12:23:22.577675  start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
  179 12:23:22.577745  Using /lava-11967714 at stage 0
  180 12:23:22.577835  Fetching tests from https://github.com/kernelci/test-definitions
  181 12:23:22.577911  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/0/tests/0_ltp-ipc'
  182 12:23:32.493769  Running '/usr/bin/git checkout kernelci.org
  183 12:23:32.658906  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
  184 12:23:32.659740  uuid=11967714_1.5.2.3.1 testdef=None
  185 12:23:32.659924  end: 1.5.2.3.1 git-repo-action (duration 00:00:10) [common]
  187 12:23:32.660310  start: 1.5.2.3.2 test-overlay (timeout 00:09:39) [common]
  188 12:23:32.661148  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  190 12:23:32.661392  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:39) [common]
  191 12:23:32.662472  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  193 12:23:32.662714  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:39) [common]
  194 12:23:32.663771  runner path: /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/0/tests/0_ltp-ipc test_uuid 11967714_1.5.2.3.1
  195 12:23:32.663861  SKIPFILE='skipfile-lkft.yaml'
  196 12:23:32.663928  SKIP_INSTALL='true'
  197 12:23:32.663987  TST_CMDFILES='ipc'
  198 12:23:32.664133  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  200 12:23:32.664356  Creating lava-test-runner.conf files
  201 12:23:32.664419  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11967714/lava-overlay-7qgx93km/lava-11967714/0 for stage 0
  202 12:23:32.664511  - 0_ltp-ipc
  203 12:23:32.664615  end: 1.5.2.3 test-definition (duration 00:00:10) [common]
  204 12:23:32.664702  start: 1.5.2.4 compress-overlay (timeout 00:09:39) [common]
  205 12:23:40.418438  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  206 12:23:40.418586  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:31) [common]
  207 12:23:40.418682  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  208 12:23:40.418783  end: 1.5.2 lava-overlay (duration 00:00:18) [common]
  209 12:23:40.418873  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:31) [common]
  210 12:23:40.573407  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  211 12:23:40.573908  start: 1.5.4 extract-modules (timeout 00:09:31) [common]
  212 12:23:40.574091  extracting modules file /var/lib/lava/dispatcher/tmp/11967714/tftp-deploy-df2rktnn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967714/extract-nfsrootfs-qt2enz78
  213 12:23:40.607073  extracting modules file /var/lib/lava/dispatcher/tmp/11967714/tftp-deploy-df2rktnn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967714/extract-overlay-ramdisk-55c8l4jt/ramdisk
  214 12:23:40.639178  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  215 12:23:40.639392  start: 1.5.5 apply-overlay-tftp (timeout 00:09:31) [common]
  216 12:23:40.639523  [common] Applying overlay to NFS
  217 12:23:40.639634  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11967714/compress-overlay-rxiki0xc/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11967714/extract-nfsrootfs-qt2enz78
  218 12:23:41.747740  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  219 12:23:41.747937  start: 1.5.6 configure-preseed-file (timeout 00:09:30) [common]
  220 12:23:41.748064  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  221 12:23:41.748184  start: 1.5.7 compress-ramdisk (timeout 00:09:30) [common]
  222 12:23:41.748307  Building ramdisk /var/lib/lava/dispatcher/tmp/11967714/extract-overlay-ramdisk-55c8l4jt/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11967714/extract-overlay-ramdisk-55c8l4jt/ramdisk
  223 12:23:41.836798  >> 31372 blocks

  224 12:23:42.478231  rename /var/lib/lava/dispatcher/tmp/11967714/extract-overlay-ramdisk-55c8l4jt/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11967714/tftp-deploy-df2rktnn/ramdisk/ramdisk.cpio.gz
  225 12:23:42.478750  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  226 12:23:42.478900  start: 1.5.8 prepare-kernel (timeout 00:09:29) [common]
  227 12:23:42.479036  start: 1.5.8.1 prepare-fit (timeout 00:09:29) [common]
  228 12:23:42.479163  No mkimage arch provided, not using FIT.
  229 12:23:42.479280  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  230 12:23:42.479392  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  231 12:23:42.479530  end: 1.5 prepare-tftp-overlay (duration 00:00:23) [common]
  232 12:23:42.479651  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:29) [common]
  233 12:23:42.479757  No LXC device requested
  234 12:23:42.479861  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  235 12:23:42.479986  start: 1.7 deploy-device-env (timeout 00:09:29) [common]
  236 12:23:42.480106  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  237 12:23:42.480202  Checking files for TFTP limit of 4294967296 bytes.
  238 12:23:42.480783  end: 1 tftp-deploy (duration 00:00:31) [common]
  239 12:23:42.480947  start: 2 depthcharge-action (timeout 00:05:00) [common]
  240 12:23:42.481070  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  241 12:23:42.481241  substitutions:
  242 12:23:42.481315  - {DTB}: None
  243 12:23:42.481380  - {INITRD}: 11967714/tftp-deploy-df2rktnn/ramdisk/ramdisk.cpio.gz
  244 12:23:42.481438  - {KERNEL}: 11967714/tftp-deploy-df2rktnn/kernel/bzImage
  245 12:23:42.481494  - {LAVA_MAC}: None
  246 12:23:42.481553  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11967714/extract-nfsrootfs-qt2enz78
  247 12:23:42.481641  - {NFS_SERVER_IP}: 192.168.201.1
  248 12:23:42.481725  - {PRESEED_CONFIG}: None
  249 12:23:42.481807  - {PRESEED_LOCAL}: None
  250 12:23:42.481893  - {RAMDISK}: 11967714/tftp-deploy-df2rktnn/ramdisk/ramdisk.cpio.gz
  251 12:23:42.481977  - {ROOT_PART}: None
  252 12:23:42.482060  - {ROOT}: None
  253 12:23:42.482185  - {SERVER_IP}: 192.168.201.1
  254 12:23:42.482283  - {TEE}: None
  255 12:23:42.482337  Parsed boot commands:
  256 12:23:42.482419  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  257 12:23:42.482656  Parsed boot commands: tftpboot 192.168.201.1 11967714/tftp-deploy-df2rktnn/kernel/bzImage 11967714/tftp-deploy-df2rktnn/kernel/cmdline 11967714/tftp-deploy-df2rktnn/ramdisk/ramdisk.cpio.gz
  258 12:23:42.482775  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  259 12:23:42.482891  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  260 12:23:42.483014  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  261 12:23:42.483129  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  262 12:23:42.483227  Not connected, no need to disconnect.
  263 12:23:42.483330  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  264 12:23:42.483437  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  265 12:23:42.483528  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-2'
  266 12:23:42.487810  Setting prompt string to ['lava-test: # ']
  267 12:23:42.488284  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  268 12:23:42.488443  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  269 12:23:42.488617  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  270 12:23:42.488803  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  271 12:23:42.489191  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
  272 12:23:47.623196  >> Command sent successfully.

  273 12:23:47.626170  Returned 0 in 5 seconds
  274 12:23:47.726575  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  276 12:23:47.727000  end: 2.2.2 reset-device (duration 00:00:05) [common]
  277 12:23:47.727130  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  278 12:23:47.727247  Setting prompt string to 'Starting depthcharge on Voema...'
  279 12:23:47.727336  Changing prompt to 'Starting depthcharge on Voema...'
  280 12:23:47.727402  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  281 12:23:47.727667  [Enter `^Ec?' for help]

  282 12:23:49.328407  

  283 12:23:49.328605  

  284 12:23:49.338162  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  285 12:23:49.344701  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  286 12:23:49.347807  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  287 12:23:49.351538  CPU: AES supported, TXT NOT supported, VT supported

  288 12:23:49.357708  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  289 12:23:49.364482  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  290 12:23:49.367483  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  291 12:23:49.371202  VBOOT: Loading verstage.

  292 12:23:49.377426  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  293 12:23:49.380762  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  294 12:23:49.387385  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  295 12:23:49.394102  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  296 12:23:49.400849  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  297 12:23:49.404431  

  298 12:23:49.404538  

  299 12:23:49.414031  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  300 12:23:49.429395  Probing TPM: . done!

  301 12:23:49.432533  TPM ready after 0 ms

  302 12:23:49.435767  Connected to device vid:did:rid of 1ae0:0028:00

  303 12:23:49.446805  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  304 12:23:49.453724  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  305 12:23:49.457384  Initialized TPM device CR50 revision 0

  306 12:23:49.577263  tlcl_send_startup: Startup return code is 0

  307 12:23:49.577425  TPM: setup succeeded

  308 12:23:49.592408  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  309 12:23:49.606376  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  310 12:23:49.619677  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  311 12:23:49.629351  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  312 12:23:49.633428  Chrome EC: UHEPI supported

  313 12:23:49.637138  Phase 1

  314 12:23:49.640331  FMAP: area GBB found @ 1805000 (458752 bytes)

  315 12:23:49.650281  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  316 12:23:49.656883  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  317 12:23:49.663752  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  318 12:23:49.670291  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  319 12:23:49.673325  Recovery requested (1009000e)

  320 12:23:49.676659  TPM: Extending digest for VBOOT: boot mode into PCR 0

  321 12:23:49.688507  tlcl_extend: response is 0

  322 12:23:49.695046  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  323 12:23:49.705387  tlcl_extend: response is 0

  324 12:23:49.712135  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  325 12:23:49.718193  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  326 12:23:49.724876  BS: verstage times (exec / console): total (unknown) / 142 ms

  327 12:23:49.724957  

  328 12:23:49.725020  

  329 12:23:49.738385  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  330 12:23:49.744483  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  331 12:23:49.748075  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  332 12:23:49.751666  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  333 12:23:49.758161  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  334 12:23:49.761724  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  335 12:23:49.764765  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  336 12:23:49.768244  TCO_STS:   0000 0000

  337 12:23:49.771448  GEN_PMCON: d0015038 00002200

  338 12:23:49.774415  GBLRST_CAUSE: 00000000 00000000

  339 12:23:49.777874  HPR_CAUSE0: 00000000

  340 12:23:49.777980  prev_sleep_state 5

  341 12:23:49.781651  Boot Count incremented to 25108

  342 12:23:49.789089  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  343 12:23:49.795152  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  344 12:23:49.802125  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  345 12:23:49.808178  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  346 12:23:49.812366  Chrome EC: UHEPI supported

  347 12:23:49.820437  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  348 12:23:49.833235  Probing TPM:  done!

  349 12:23:49.839740  Connected to device vid:did:rid of 1ae0:0028:00

  350 12:23:49.850158  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  351 12:23:49.853877  Initialized TPM device CR50 revision 0

  352 12:23:49.868191  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  353 12:23:49.875040  MRC: Hash idx 0x100b comparison successful.

  354 12:23:49.878048  MRC cache found, size faa8

  355 12:23:49.878133  bootmode is set to: 2

  356 12:23:49.881769  SPD index = 0

  357 12:23:49.888334  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  358 12:23:49.891362  SPD: module type is LPDDR4X

  359 12:23:49.895177  SPD: module part number is MT53E512M64D4NW-046

  360 12:23:49.901288  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  361 12:23:49.907797  SPD: device width 16 bits, bus width 16 bits

  362 12:23:49.911368  SPD: module size is 1024 MB (per channel)

  363 12:23:50.344619  CBMEM:

  364 12:23:50.347435  IMD: root @ 0x76fff000 254 entries.

  365 12:23:50.351072  IMD: root @ 0x76ffec00 62 entries.

  366 12:23:50.354389  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  367 12:23:50.360716  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  368 12:23:50.364806  External stage cache:

  369 12:23:50.367880  IMD: root @ 0x7b3ff000 254 entries.

  370 12:23:50.371365  IMD: root @ 0x7b3fec00 62 entries.

  371 12:23:50.385792  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  372 12:23:50.392583  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  373 12:23:50.399246  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  374 12:23:50.413559  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  375 12:23:50.420321  cse_lite: Skip switching to RW in the recovery path

  376 12:23:50.420411  8 DIMMs found

  377 12:23:50.420482  SMM Memory Map

  378 12:23:50.426285  SMRAM       : 0x7b000000 0x800000

  379 12:23:50.429981   Subregion 0: 0x7b000000 0x200000

  380 12:23:50.432890   Subregion 1: 0x7b200000 0x200000

  381 12:23:50.436311   Subregion 2: 0x7b400000 0x400000

  382 12:23:50.436395  top_of_ram = 0x77000000

  383 12:23:50.443085  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  384 12:23:50.450002  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  385 12:23:50.452955  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  386 12:23:50.459844  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  387 12:23:50.466381  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  388 12:23:50.472577  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  389 12:23:50.482730  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  390 12:23:50.489381  Processing 211 relocs. Offset value of 0x74c0b000

  391 12:23:50.496282  BS: romstage times (exec / console): total (unknown) / 277 ms

  392 12:23:50.502177  

  393 12:23:50.502260  

  394 12:23:50.512415  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  395 12:23:50.515574  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  396 12:23:50.525270  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  397 12:23:50.531947  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  398 12:23:50.538577  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  399 12:23:50.545011  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  400 12:23:50.592309  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  401 12:23:50.599012  Processing 5008 relocs. Offset value of 0x75d98000

  402 12:23:50.602050  BS: postcar times (exec / console): total (unknown) / 59 ms

  403 12:23:50.605063  

  404 12:23:50.605141  

  405 12:23:50.614903  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  406 12:23:50.614989  Normal boot

  407 12:23:50.618342  FW_CONFIG value is 0x804c02

  408 12:23:50.622222  PCI: 00:07.0 disabled by fw_config

  409 12:23:50.625148  PCI: 00:07.1 disabled by fw_config

  410 12:23:50.631777  PCI: 00:0d.2 disabled by fw_config

  411 12:23:50.635373  PCI: 00:1c.7 disabled by fw_config

  412 12:23:50.638424  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  413 12:23:50.645167  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  414 12:23:50.651821  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  415 12:23:50.654747  GENERIC: 0.0 disabled by fw_config

  416 12:23:50.658224  GENERIC: 1.0 disabled by fw_config

  417 12:23:50.661525  fw_config match found: DB_USB=USB3_ACTIVE

  418 12:23:50.664842  fw_config match found: DB_USB=USB3_ACTIVE

  419 12:23:50.667899  fw_config match found: DB_USB=USB3_ACTIVE

  420 12:23:50.674520  fw_config match found: DB_USB=USB3_ACTIVE

  421 12:23:50.678201  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  422 12:23:50.688189  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  423 12:23:50.694733  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  424 12:23:50.701618  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  425 12:23:50.707631  microcode: sig=0x806c1 pf=0x80 revision=0x86

  426 12:23:50.711312  microcode: Update skipped, already up-to-date

  427 12:23:50.717890  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  428 12:23:50.745809  Detected 4 core, 8 thread CPU.

  429 12:23:50.749311  Setting up SMI for CPU

  430 12:23:50.752759  IED base = 0x7b400000

  431 12:23:50.752849  IED size = 0x00400000

  432 12:23:50.755901  Will perform SMM setup.

  433 12:23:50.762540  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  434 12:23:50.769105  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  435 12:23:50.775422  Processing 16 relocs. Offset value of 0x00030000

  436 12:23:50.778881  Attempting to start 7 APs

  437 12:23:50.782198  Waiting for 10ms after sending INIT.

  438 12:23:50.797769  Waiting for 1st SIPI to complete...done.

  439 12:23:50.797889  AP: slot 4 apic_id 7.

  440 12:23:50.800982  AP: slot 1 apic_id 1.

  441 12:23:50.804644  Waiting for 2nd SIPI to complete...done.

  442 12:23:50.807723  AP: slot 6 apic_id 2.

  443 12:23:50.811322  AP: slot 2 apic_id 3.

  444 12:23:50.811408  AP: slot 5 apic_id 6.

  445 12:23:50.814623  AP: slot 3 apic_id 5.

  446 12:23:50.817518  AP: slot 7 apic_id 4.

  447 12:23:50.824239  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  448 12:23:50.830809  Processing 13 relocs. Offset value of 0x00038000

  449 12:23:50.834389  Unable to locate Global NVS

  450 12:23:50.840977  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  451 12:23:50.843987  Installing permanent SMM handler to 0x7b000000

  452 12:23:50.854300  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  453 12:23:50.857299  Processing 794 relocs. Offset value of 0x7b010000

  454 12:23:50.867662  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  455 12:23:50.870571  Processing 13 relocs. Offset value of 0x7b008000

  456 12:23:50.877273  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  457 12:23:50.884010  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  458 12:23:50.887495  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  459 12:23:50.893780  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  460 12:23:50.900397  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  461 12:23:50.906970  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  462 12:23:50.914188  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  463 12:23:50.914283  Unable to locate Global NVS

  464 12:23:50.923682  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  465 12:23:50.927272  Clearing SMI status registers

  466 12:23:50.927382  SMI_STS: PM1 

  467 12:23:50.930348  PM1_STS: PWRBTN 

  468 12:23:50.937129  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  469 12:23:50.940573  In relocation handler: CPU 0

  470 12:23:50.943651  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  471 12:23:50.950342  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  472 12:23:50.950425  Relocation complete.

  473 12:23:50.960499  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  474 12:23:50.963475  In relocation handler: CPU 1

  475 12:23:50.967179  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  476 12:23:50.967293  Relocation complete.

  477 12:23:50.976886  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  478 12:23:50.976968  In relocation handler: CPU 6

  479 12:23:50.983811  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  480 12:23:50.986605  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  481 12:23:50.989903  Relocation complete.

  482 12:23:50.996873  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  483 12:23:50.999857  In relocation handler: CPU 2

  484 12:23:51.003366  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  485 12:23:51.006330  Relocation complete.

  486 12:23:51.013204  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  487 12:23:51.016565  In relocation handler: CPU 3

  488 12:23:51.019971  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  489 12:23:51.023244  Relocation complete.

  490 12:23:51.030535  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  491 12:23:51.033882  In relocation handler: CPU 7

  492 12:23:51.037456  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  493 12:23:51.041085  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  494 12:23:51.044635  Relocation complete.

  495 12:23:51.050894  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  496 12:23:51.054545  In relocation handler: CPU 5

  497 12:23:51.057375  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  498 12:23:51.064403  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  499 12:23:51.064508  Relocation complete.

  500 12:23:51.074004  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  501 12:23:51.074095  In relocation handler: CPU 4

  502 12:23:51.080715  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  503 12:23:51.080807  Relocation complete.

  504 12:23:51.083758  Initializing CPU #0

  505 12:23:51.087294  CPU: vendor Intel device 806c1

  506 12:23:51.090387  CPU: family 06, model 8c, stepping 01

  507 12:23:51.093869  Clearing out pending MCEs

  508 12:23:51.097165  Setting up local APIC...

  509 12:23:51.097268   apic_id: 0x00 done.

  510 12:23:51.100404  Turbo is available but hidden

  511 12:23:51.103798  Turbo is available and visible

  512 12:23:51.110347  microcode: Update skipped, already up-to-date

  513 12:23:51.110468  CPU #0 initialized

  514 12:23:51.113834  Initializing CPU #3

  515 12:23:51.117131  Initializing CPU #7

  516 12:23:51.119965  CPU: vendor Intel device 806c1

  517 12:23:51.123569  CPU: family 06, model 8c, stepping 01

  518 12:23:51.127364  CPU: vendor Intel device 806c1

  519 12:23:51.130218  CPU: family 06, model 8c, stepping 01

  520 12:23:51.133341  Clearing out pending MCEs

  521 12:23:51.133464  Clearing out pending MCEs

  522 12:23:51.136608  Setting up local APIC...

  523 12:23:51.140245  Initializing CPU #5

  524 12:23:51.140324  Initializing CPU #4

  525 12:23:51.143498  CPU: vendor Intel device 806c1

  526 12:23:51.146791  CPU: family 06, model 8c, stepping 01

  527 12:23:51.149823  Initializing CPU #2

  528 12:23:51.153541  Initializing CPU #6

  529 12:23:51.157046  CPU: vendor Intel device 806c1

  530 12:23:51.160024  CPU: family 06, model 8c, stepping 01

  531 12:23:51.163578  CPU: vendor Intel device 806c1

  532 12:23:51.166641  CPU: family 06, model 8c, stepping 01

  533 12:23:51.169979  Clearing out pending MCEs

  534 12:23:51.170055  Clearing out pending MCEs

  535 12:23:51.173394  Setting up local APIC...

  536 12:23:51.176358  CPU: vendor Intel device 806c1

  537 12:23:51.180222  CPU: family 06, model 8c, stepping 01

  538 12:23:51.183054  Clearing out pending MCEs

  539 12:23:51.186677  Clearing out pending MCEs

  540 12:23:51.189758  Setting up local APIC...

  541 12:23:51.189835  Setting up local APIC...

  542 12:23:51.193374   apic_id: 0x03 done.

  543 12:23:51.196554  Setting up local APIC...

  544 12:23:51.200145   apic_id: 0x05 done.

  545 12:23:51.200270   apic_id: 0x04 done.

  546 12:23:51.206770  microcode: Update skipped, already up-to-date

  547 12:23:51.209874  microcode: Update skipped, already up-to-date

  548 12:23:51.209959  CPU #3 initialized

  549 12:23:51.213145  CPU #7 initialized

  550 12:23:51.216836  Setting up local APIC...

  551 12:23:51.219869  microcode: Update skipped, already up-to-date

  552 12:23:51.223366   apic_id: 0x02 done.

  553 12:23:51.223451  CPU #2 initialized

  554 12:23:51.229712  microcode: Update skipped, already up-to-date

  555 12:23:51.229802   apic_id: 0x06 done.

  556 12:23:51.233086   apic_id: 0x07 done.

  557 12:23:51.240100  microcode: Update skipped, already up-to-date

  558 12:23:51.243286  microcode: Update skipped, already up-to-date

  559 12:23:51.243372  CPU #5 initialized

  560 12:23:51.246201  CPU #4 initialized

  561 12:23:51.249932  CPU #6 initialized

  562 12:23:51.250030  Initializing CPU #1

  563 12:23:51.252760  CPU: vendor Intel device 806c1

  564 12:23:51.256522  CPU: family 06, model 8c, stepping 01

  565 12:23:51.259485  Clearing out pending MCEs

  566 12:23:51.262708  Setting up local APIC...

  567 12:23:51.266220   apic_id: 0x01 done.

  568 12:23:51.269301  microcode: Update skipped, already up-to-date

  569 12:23:51.273103  CPU #1 initialized

  570 12:23:51.275945  bsp_do_flight_plan done after 466 msecs.

  571 12:23:51.279347  CPU: frequency set to 4000 MHz

  572 12:23:51.279432  Enabling SMIs.

  573 12:23:51.286048  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms

  574 12:23:51.303143  SATAXPCIE1 indicates PCIe NVMe is present

  575 12:23:51.306682  Probing TPM:  done!

  576 12:23:51.310418  Connected to device vid:did:rid of 1ae0:0028:00

  577 12:23:51.320342  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  578 12:23:51.324101  Initialized TPM device CR50 revision 0

  579 12:23:51.327222  Enabling S0i3.4

  580 12:23:51.334224  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  581 12:23:51.337464  Found a VBT of 8704 bytes after decompression

  582 12:23:51.343916  cse_lite: CSE RO boot. HybridStorageMode disabled

  583 12:23:51.350434  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  584 12:23:51.426705  FSPS returned 0

  585 12:23:51.429941  Executing Phase 1 of FspMultiPhaseSiInit

  586 12:23:51.439855  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  587 12:23:51.442781  port C0 DISC req: usage 1 usb3 1 usb2 5

  588 12:23:51.446257  Raw Buffer output 0 00000511

  589 12:23:51.449546  Raw Buffer output 1 00000000

  590 12:23:51.453143  pmc_send_ipc_cmd succeeded

  591 12:23:51.460055  port C1 DISC req: usage 1 usb3 2 usb2 3

  592 12:23:51.460174  Raw Buffer output 0 00000321

  593 12:23:51.463583  Raw Buffer output 1 00000000

  594 12:23:51.467499  pmc_send_ipc_cmd succeeded

  595 12:23:51.472962  Detected 4 core, 8 thread CPU.

  596 12:23:51.475988  Detected 4 core, 8 thread CPU.

  597 12:23:51.710178  Display FSP Version Info HOB

  598 12:23:51.713100  Reference Code - CPU = a.0.4c.31

  599 12:23:51.716679  uCode Version = 0.0.0.86

  600 12:23:51.719765  TXT ACM version = ff.ff.ff.ffff

  601 12:23:51.723487  Reference Code - ME = a.0.4c.31

  602 12:23:51.726669  MEBx version = 0.0.0.0

  603 12:23:51.729721  ME Firmware Version = Consumer SKU

  604 12:23:51.733415  Reference Code - PCH = a.0.4c.31

  605 12:23:51.736500  PCH-CRID Status = Disabled

  606 12:23:51.740058  PCH-CRID Original Value = ff.ff.ff.ffff

  607 12:23:51.743008  PCH-CRID New Value = ff.ff.ff.ffff

  608 12:23:51.746592  OPROM - RST - RAID = ff.ff.ff.ffff

  609 12:23:51.749613  PCH Hsio Version = 4.0.0.0

  610 12:23:51.753249  Reference Code - SA - System Agent = a.0.4c.31

  611 12:23:51.756296  Reference Code - MRC = 2.0.0.1

  612 12:23:51.759861  SA - PCIe Version = a.0.4c.31

  613 12:23:51.762906  SA-CRID Status = Disabled

  614 12:23:51.766454  SA-CRID Original Value = 0.0.0.1

  615 12:23:51.769956  SA-CRID New Value = 0.0.0.1

  616 12:23:51.773114  OPROM - VBIOS = ff.ff.ff.ffff

  617 12:23:51.776199  IO Manageability Engine FW Version = 11.1.4.0

  618 12:23:51.779883  PHY Build Version = 0.0.0.e0

  619 12:23:51.783065  Thunderbolt(TM) FW Version = 0.0.0.0

  620 12:23:51.789438  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  621 12:23:51.792688  ITSS IRQ Polarities Before:

  622 12:23:51.792767  IPC0: 0xffffffff

  623 12:23:51.796015  IPC1: 0xffffffff

  624 12:23:51.796120  IPC2: 0xffffffff

  625 12:23:51.799370  IPC3: 0xffffffff

  626 12:23:51.802884  ITSS IRQ Polarities After:

  627 12:23:51.802999  IPC0: 0xffffffff

  628 12:23:51.806125  IPC1: 0xffffffff

  629 12:23:51.806203  IPC2: 0xffffffff

  630 12:23:51.809493  IPC3: 0xffffffff

  631 12:23:51.812545  Found PCIe Root Port #9 at PCI: 00:1d.0.

  632 12:23:51.825956  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  633 12:23:51.835804  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  634 12:23:51.849110  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  635 12:23:51.855683  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms

  636 12:23:51.859291  Enumerating buses...

  637 12:23:51.862356  Show all devs... Before device enumeration.

  638 12:23:51.865392  Root Device: enabled 1

  639 12:23:51.865467  DOMAIN: 0000: enabled 1

  640 12:23:51.869086  CPU_CLUSTER: 0: enabled 1

  641 12:23:51.872062  PCI: 00:00.0: enabled 1

  642 12:23:51.875733  PCI: 00:02.0: enabled 1

  643 12:23:51.875847  PCI: 00:04.0: enabled 1

  644 12:23:51.878741  PCI: 00:05.0: enabled 1

  645 12:23:51.881998  PCI: 00:06.0: enabled 0

  646 12:23:51.885894  PCI: 00:07.0: enabled 0

  647 12:23:51.885975  PCI: 00:07.1: enabled 0

  648 12:23:51.888870  PCI: 00:07.2: enabled 0

  649 12:23:51.891894  PCI: 00:07.3: enabled 0

  650 12:23:51.895347  PCI: 00:08.0: enabled 1

  651 12:23:51.895456  PCI: 00:09.0: enabled 0

  652 12:23:51.898684  PCI: 00:0a.0: enabled 0

  653 12:23:51.902401  PCI: 00:0d.0: enabled 1

  654 12:23:51.902479  PCI: 00:0d.1: enabled 0

  655 12:23:51.905326  PCI: 00:0d.2: enabled 0

  656 12:23:51.908588  PCI: 00:0d.3: enabled 0

  657 12:23:51.912078  PCI: 00:0e.0: enabled 0

  658 12:23:51.912183  PCI: 00:10.2: enabled 1

  659 12:23:51.915374  PCI: 00:10.6: enabled 0

  660 12:23:51.918579  PCI: 00:10.7: enabled 0

  661 12:23:51.922077  PCI: 00:12.0: enabled 0

  662 12:23:51.922159  PCI: 00:12.6: enabled 0

  663 12:23:51.925462  PCI: 00:13.0: enabled 0

  664 12:23:51.928477  PCI: 00:14.0: enabled 1

  665 12:23:51.932361  PCI: 00:14.1: enabled 0

  666 12:23:51.932440  PCI: 00:14.2: enabled 1

  667 12:23:51.935253  PCI: 00:14.3: enabled 1

  668 12:23:51.938338  PCI: 00:15.0: enabled 1

  669 12:23:51.941976  PCI: 00:15.1: enabled 1

  670 12:23:51.942047  PCI: 00:15.2: enabled 1

  671 12:23:51.945222  PCI: 00:15.3: enabled 1

  672 12:23:51.948742  PCI: 00:16.0: enabled 1

  673 12:23:51.951635  PCI: 00:16.1: enabled 0

  674 12:23:51.951748  PCI: 00:16.2: enabled 0

  675 12:23:51.955485  PCI: 00:16.3: enabled 0

  676 12:23:51.958400  PCI: 00:16.4: enabled 0

  677 12:23:51.958477  PCI: 00:16.5: enabled 0

  678 12:23:51.961570  PCI: 00:17.0: enabled 1

  679 12:23:51.965183  PCI: 00:19.0: enabled 0

  680 12:23:51.968264  PCI: 00:19.1: enabled 1

  681 12:23:51.968400  PCI: 00:19.2: enabled 0

  682 12:23:51.971508  PCI: 00:1c.0: enabled 1

  683 12:23:51.975076  PCI: 00:1c.1: enabled 0

  684 12:23:51.978165  PCI: 00:1c.2: enabled 0

  685 12:23:51.978237  PCI: 00:1c.3: enabled 0

  686 12:23:51.981370  PCI: 00:1c.4: enabled 0

  687 12:23:51.984836  PCI: 00:1c.5: enabled 0

  688 12:23:51.988051  PCI: 00:1c.6: enabled 1

  689 12:23:51.988159  PCI: 00:1c.7: enabled 0

  690 12:23:51.991525  PCI: 00:1d.0: enabled 1

  691 12:23:51.994537  PCI: 00:1d.1: enabled 0

  692 12:23:51.997884  PCI: 00:1d.2: enabled 1

  693 12:23:51.997998  PCI: 00:1d.3: enabled 0

  694 12:23:52.001250  PCI: 00:1e.0: enabled 1

  695 12:23:52.004509  PCI: 00:1e.1: enabled 0

  696 12:23:52.007828  PCI: 00:1e.2: enabled 1

  697 12:23:52.007904  PCI: 00:1e.3: enabled 1

  698 12:23:52.011381  PCI: 00:1f.0: enabled 1

  699 12:23:52.014622  PCI: 00:1f.1: enabled 0

  700 12:23:52.014734  PCI: 00:1f.2: enabled 1

  701 12:23:52.018276  PCI: 00:1f.3: enabled 1

  702 12:23:52.021332  PCI: 00:1f.4: enabled 0

  703 12:23:52.024278  PCI: 00:1f.5: enabled 1

  704 12:23:52.024355  PCI: 00:1f.6: enabled 0

  705 12:23:52.027618  PCI: 00:1f.7: enabled 0

  706 12:23:52.031049  APIC: 00: enabled 1

  707 12:23:52.034324  GENERIC: 0.0: enabled 1

  708 12:23:52.034404  GENERIC: 0.0: enabled 1

  709 12:23:52.037648  GENERIC: 1.0: enabled 1

  710 12:23:52.041005  GENERIC: 0.0: enabled 1

  711 12:23:52.041083  GENERIC: 1.0: enabled 1

  712 12:23:52.044140  USB0 port 0: enabled 1

  713 12:23:52.047774  GENERIC: 0.0: enabled 1

  714 12:23:52.050968  USB0 port 0: enabled 1

  715 12:23:52.051044  GENERIC: 0.0: enabled 1

  716 12:23:52.054411  I2C: 00:1a: enabled 1

  717 12:23:52.057492  I2C: 00:31: enabled 1

  718 12:23:52.057580  I2C: 00:32: enabled 1

  719 12:23:52.061146  I2C: 00:10: enabled 1

  720 12:23:52.064097  I2C: 00:15: enabled 1

  721 12:23:52.064181  GENERIC: 0.0: enabled 0

  722 12:23:52.067835  GENERIC: 1.0: enabled 0

  723 12:23:52.070819  GENERIC: 0.0: enabled 1

  724 12:23:52.073847  SPI: 00: enabled 1

  725 12:23:52.073931  SPI: 00: enabled 1

  726 12:23:52.077578  PNP: 0c09.0: enabled 1

  727 12:23:52.080519  GENERIC: 0.0: enabled 1

  728 12:23:52.080603  USB3 port 0: enabled 1

  729 12:23:52.084292  USB3 port 1: enabled 1

  730 12:23:52.087444  USB3 port 2: enabled 0

  731 12:23:52.087532  USB3 port 3: enabled 0

  732 12:23:52.090506  USB2 port 0: enabled 0

  733 12:23:52.094295  USB2 port 1: enabled 1

  734 12:23:52.097337  USB2 port 2: enabled 1

  735 12:23:52.097420  USB2 port 3: enabled 0

  736 12:23:52.100942  USB2 port 4: enabled 1

  737 12:23:52.103737  USB2 port 5: enabled 0

  738 12:23:52.103821  USB2 port 6: enabled 0

  739 12:23:52.107127  USB2 port 7: enabled 0

  740 12:23:52.110426  USB2 port 8: enabled 0

  741 12:23:52.113699  USB2 port 9: enabled 0

  742 12:23:52.113815  USB3 port 0: enabled 0

  743 12:23:52.117091  USB3 port 1: enabled 1

  744 12:23:52.120538  USB3 port 2: enabled 0

  745 12:23:52.120623  USB3 port 3: enabled 0

  746 12:23:52.124016  GENERIC: 0.0: enabled 1

  747 12:23:52.127336  GENERIC: 1.0: enabled 1

  748 12:23:52.127420  APIC: 01: enabled 1

  749 12:23:52.130401  APIC: 03: enabled 1

  750 12:23:52.133872  APIC: 05: enabled 1

  751 12:23:52.133971  APIC: 07: enabled 1

  752 12:23:52.137014  APIC: 06: enabled 1

  753 12:23:52.140312  APIC: 02: enabled 1

  754 12:23:52.140391  APIC: 04: enabled 1

  755 12:23:52.143185  Compare with tree...

  756 12:23:52.146753  Root Device: enabled 1

  757 12:23:52.146857   DOMAIN: 0000: enabled 1

  758 12:23:52.150401    PCI: 00:00.0: enabled 1

  759 12:23:52.153399    PCI: 00:02.0: enabled 1

  760 12:23:52.156977    PCI: 00:04.0: enabled 1

  761 12:23:52.159742     GENERIC: 0.0: enabled 1

  762 12:23:52.159839    PCI: 00:05.0: enabled 1

  763 12:23:52.163318    PCI: 00:06.0: enabled 0

  764 12:23:52.167063    PCI: 00:07.0: enabled 0

  765 12:23:52.170125     GENERIC: 0.0: enabled 1

  766 12:23:52.173121    PCI: 00:07.1: enabled 0

  767 12:23:52.173203     GENERIC: 1.0: enabled 1

  768 12:23:52.176808    PCI: 00:07.2: enabled 0

  769 12:23:52.179914     GENERIC: 0.0: enabled 1

  770 12:23:52.183451    PCI: 00:07.3: enabled 0

  771 12:23:52.186537     GENERIC: 1.0: enabled 1

  772 12:23:52.186622    PCI: 00:08.0: enabled 1

  773 12:23:52.190186    PCI: 00:09.0: enabled 0

  774 12:23:52.193154    PCI: 00:0a.0: enabled 0

  775 12:23:52.196926    PCI: 00:0d.0: enabled 1

  776 12:23:52.199847     USB0 port 0: enabled 1

  777 12:23:52.199930      USB3 port 0: enabled 1

  778 12:23:52.202954      USB3 port 1: enabled 1

  779 12:23:52.206658      USB3 port 2: enabled 0

  780 12:23:52.209701      USB3 port 3: enabled 0

  781 12:23:52.213201    PCI: 00:0d.1: enabled 0

  782 12:23:52.216126    PCI: 00:0d.2: enabled 0

  783 12:23:52.216241     GENERIC: 0.0: enabled 1

  784 12:23:52.219834    PCI: 00:0d.3: enabled 0

  785 12:23:52.222994    PCI: 00:0e.0: enabled 0

  786 12:23:52.226286    PCI: 00:10.2: enabled 1

  787 12:23:52.229891    PCI: 00:10.6: enabled 0

  788 12:23:52.229974    PCI: 00:10.7: enabled 0

  789 12:23:52.233133    PCI: 00:12.0: enabled 0

  790 12:23:52.236035    PCI: 00:12.6: enabled 0

  791 12:23:52.239576    PCI: 00:13.0: enabled 0

  792 12:23:52.242749    PCI: 00:14.0: enabled 1

  793 12:23:52.242833     USB0 port 0: enabled 1

  794 12:23:52.246212      USB2 port 0: enabled 0

  795 12:23:52.249346      USB2 port 1: enabled 1

  796 12:23:52.252721      USB2 port 2: enabled 1

  797 12:23:52.255722      USB2 port 3: enabled 0

  798 12:23:52.255822      USB2 port 4: enabled 1

  799 12:23:52.259343      USB2 port 5: enabled 0

  800 12:23:52.262328      USB2 port 6: enabled 0

  801 12:23:52.265748      USB2 port 7: enabled 0

  802 12:23:52.269087      USB2 port 8: enabled 0

  803 12:23:52.272764      USB2 port 9: enabled 0

  804 12:23:52.272863      USB3 port 0: enabled 0

  805 12:23:52.275902      USB3 port 1: enabled 1

  806 12:23:52.279456      USB3 port 2: enabled 0

  807 12:23:52.329380      USB3 port 3: enabled 0

  808 12:23:52.329480    PCI: 00:14.1: enabled 0

  809 12:23:52.329785    PCI: 00:14.2: enabled 1

  810 12:23:52.329883    PCI: 00:14.3: enabled 1

  811 12:23:52.329975     GENERIC: 0.0: enabled 1

  812 12:23:52.330090    PCI: 00:15.0: enabled 1

  813 12:23:52.330194     I2C: 00:1a: enabled 1

  814 12:23:52.330381     I2C: 00:31: enabled 1

  815 12:23:52.330471     I2C: 00:32: enabled 1

  816 12:23:52.330558    PCI: 00:15.1: enabled 1

  817 12:23:52.330643     I2C: 00:10: enabled 1

  818 12:23:52.330729    PCI: 00:15.2: enabled 1

  819 12:23:52.330826    PCI: 00:15.3: enabled 1

  820 12:23:52.330908    PCI: 00:16.0: enabled 1

  821 12:23:52.330994    PCI: 00:16.1: enabled 0

  822 12:23:52.331079    PCI: 00:16.2: enabled 0

  823 12:23:52.331161    PCI: 00:16.3: enabled 0

  824 12:23:52.331256    PCI: 00:16.4: enabled 0

  825 12:23:52.331341    PCI: 00:16.5: enabled 0

  826 12:23:52.374738    PCI: 00:17.0: enabled 1

  827 12:23:52.374927    PCI: 00:19.0: enabled 0

  828 12:23:52.375250    PCI: 00:19.1: enabled 1

  829 12:23:52.375382     I2C: 00:15: enabled 1

  830 12:23:52.375472    PCI: 00:19.2: enabled 0

  831 12:23:52.375576    PCI: 00:1d.0: enabled 1

  832 12:23:52.375678     GENERIC: 0.0: enabled 1

  833 12:23:52.375762    PCI: 00:1e.0: enabled 1

  834 12:23:52.375846    PCI: 00:1e.1: enabled 0

  835 12:23:52.375962    PCI: 00:1e.2: enabled 1

  836 12:23:52.376044     SPI: 00: enabled 1

  837 12:23:52.376127    PCI: 00:1e.3: enabled 1

  838 12:23:52.376250     SPI: 00: enabled 1

  839 12:23:52.376352    PCI: 00:1f.0: enabled 1

  840 12:23:52.376435     PNP: 0c09.0: enabled 1

  841 12:23:52.376518    PCI: 00:1f.1: enabled 0

  842 12:23:52.376600    PCI: 00:1f.2: enabled 1

  843 12:23:52.378965     GENERIC: 0.0: enabled 1

  844 12:23:52.379094      GENERIC: 0.0: enabled 1

  845 12:23:52.382161      GENERIC: 1.0: enabled 1

  846 12:23:52.385926    PCI: 00:1f.3: enabled 1

  847 12:23:52.388842    PCI: 00:1f.4: enabled 0

  848 12:23:52.388952    PCI: 00:1f.5: enabled 1

  849 12:23:52.391886    PCI: 00:1f.6: enabled 0

  850 12:23:52.395572    PCI: 00:1f.7: enabled 0

  851 12:23:52.398637   CPU_CLUSTER: 0: enabled 1

  852 12:23:52.398720    APIC: 00: enabled 1

  853 12:23:52.402293    APIC: 01: enabled 1

  854 12:23:52.405362    APIC: 03: enabled 1

  855 12:23:52.405445    APIC: 05: enabled 1

  856 12:23:52.408497    APIC: 07: enabled 1

  857 12:23:52.412074    APIC: 06: enabled 1

  858 12:23:52.412161    APIC: 02: enabled 1

  859 12:23:52.415140    APIC: 04: enabled 1

  860 12:23:52.418754  Root Device scanning...

  861 12:23:52.422405  scan_static_bus for Root Device

  862 12:23:52.425254  DOMAIN: 0000 enabled

  863 12:23:52.428829  CPU_CLUSTER: 0 enabled

  864 12:23:52.428920  DOMAIN: 0000 scanning...

  865 12:23:52.431720  PCI: pci_scan_bus for bus 00

  866 12:23:52.435476  PCI: 00:00.0 [8086/0000] ops

  867 12:23:52.438493  PCI: 00:00.0 [8086/9a12] enabled

  868 12:23:52.441777  PCI: 00:02.0 [8086/0000] bus ops

  869 12:23:52.445291  PCI: 00:02.0 [8086/9a40] enabled

  870 12:23:52.448262  PCI: 00:04.0 [8086/0000] bus ops

  871 12:23:52.451704  PCI: 00:04.0 [8086/9a03] enabled

  872 12:23:52.455129  PCI: 00:05.0 [8086/9a19] enabled

  873 12:23:52.458660  PCI: 00:07.0 [0000/0000] hidden

  874 12:23:52.461513  PCI: 00:08.0 [8086/9a11] enabled

  875 12:23:52.464892  PCI: 00:0a.0 [8086/9a0d] disabled

  876 12:23:52.468135  PCI: 00:0d.0 [8086/0000] bus ops

  877 12:23:52.471660  PCI: 00:0d.0 [8086/9a13] enabled

  878 12:23:52.474773  PCI: 00:14.0 [8086/0000] bus ops

  879 12:23:52.478361  PCI: 00:14.0 [8086/a0ed] enabled

  880 12:23:52.481545  PCI: 00:14.2 [8086/a0ef] enabled

  881 12:23:52.484703  PCI: 00:14.3 [8086/0000] bus ops

  882 12:23:52.488165  PCI: 00:14.3 [8086/a0f0] enabled

  883 12:23:52.491209  PCI: 00:15.0 [8086/0000] bus ops

  884 12:23:52.494787  PCI: 00:15.0 [8086/a0e8] enabled

  885 12:23:52.497765  PCI: 00:15.1 [8086/0000] bus ops

  886 12:23:52.501443  PCI: 00:15.1 [8086/a0e9] enabled

  887 12:23:52.504435  PCI: 00:15.2 [8086/0000] bus ops

  888 12:23:52.508147  PCI: 00:15.2 [8086/a0ea] enabled

  889 12:23:52.511177  PCI: 00:15.3 [8086/0000] bus ops

  890 12:23:52.514840  PCI: 00:15.3 [8086/a0eb] enabled

  891 12:23:52.517959  PCI: 00:16.0 [8086/0000] ops

  892 12:23:52.521535  PCI: 00:16.0 [8086/a0e0] enabled

  893 12:23:52.528113  PCI: Static device PCI: 00:17.0 not found, disabling it.

  894 12:23:52.531106  PCI: 00:19.0 [8086/0000] bus ops

  895 12:23:52.534765  PCI: 00:19.0 [8086/a0c5] disabled

  896 12:23:52.537811  PCI: 00:19.1 [8086/0000] bus ops

  897 12:23:52.540901  PCI: 00:19.1 [8086/a0c6] enabled

  898 12:23:52.544216  PCI: 00:1d.0 [8086/0000] bus ops

  899 12:23:52.547809  PCI: 00:1d.0 [8086/a0b0] enabled

  900 12:23:52.551178  PCI: 00:1e.0 [8086/0000] ops

  901 12:23:52.554580  PCI: 00:1e.0 [8086/a0a8] enabled

  902 12:23:52.557623  PCI: 00:1e.2 [8086/0000] bus ops

  903 12:23:52.561197  PCI: 00:1e.2 [8086/a0aa] enabled

  904 12:23:52.564148  PCI: 00:1e.3 [8086/0000] bus ops

  905 12:23:52.567298  PCI: 00:1e.3 [8086/a0ab] enabled

  906 12:23:52.570845  PCI: 00:1f.0 [8086/0000] bus ops

  907 12:23:52.574130  PCI: 00:1f.0 [8086/a087] enabled

  908 12:23:52.577718  RTC Init

  909 12:23:52.580531  Set power on after power failure.

  910 12:23:52.580615  Disabling Deep S3

  911 12:23:52.583976  Disabling Deep S3

  912 12:23:52.584058  Disabling Deep S4

  913 12:23:52.587365  Disabling Deep S4

  914 12:23:52.587449  Disabling Deep S5

  915 12:23:52.590291  Disabling Deep S5

  916 12:23:52.594041  PCI: 00:1f.2 [0000/0000] hidden

  917 12:23:52.597083  PCI: 00:1f.3 [8086/0000] bus ops

  918 12:23:52.600641  PCI: 00:1f.3 [8086/a0c8] enabled

  919 12:23:52.603701  PCI: 00:1f.5 [8086/0000] bus ops

  920 12:23:52.607217  PCI: 00:1f.5 [8086/a0a4] enabled

  921 12:23:52.610305  PCI: Leftover static devices:

  922 12:23:52.610388  PCI: 00:10.2

  923 12:23:52.614051  PCI: 00:10.6

  924 12:23:52.614134  PCI: 00:10.7

  925 12:23:52.616816  PCI: 00:06.0

  926 12:23:52.616899  PCI: 00:07.1

  927 12:23:52.616966  PCI: 00:07.2

  928 12:23:52.620633  PCI: 00:07.3

  929 12:23:52.620716  PCI: 00:09.0

  930 12:23:52.623702  PCI: 00:0d.1

  931 12:23:52.623784  PCI: 00:0d.2

  932 12:23:52.626635  PCI: 00:0d.3

  933 12:23:52.626770  PCI: 00:0e.0

  934 12:23:52.626836  PCI: 00:12.0

  935 12:23:52.630415  PCI: 00:12.6

  936 12:23:52.630497  PCI: 00:13.0

  937 12:23:52.633919  PCI: 00:14.1

  938 12:23:52.634017  PCI: 00:16.1

  939 12:23:52.634082  PCI: 00:16.2

  940 12:23:52.636717  PCI: 00:16.3

  941 12:23:52.636800  PCI: 00:16.4

  942 12:23:52.639855  PCI: 00:16.5

  943 12:23:52.639937  PCI: 00:17.0

  944 12:23:52.643628  PCI: 00:19.2

  945 12:23:52.643710  PCI: 00:1e.1

  946 12:23:52.643814  PCI: 00:1f.1

  947 12:23:52.646773  PCI: 00:1f.4

  948 12:23:52.646874  PCI: 00:1f.6

  949 12:23:52.649945  PCI: 00:1f.7

  950 12:23:52.653804  PCI: Check your devicetree.cb.

  951 12:23:52.653887  PCI: 00:02.0 scanning...

  952 12:23:52.656628  scan_generic_bus for PCI: 00:02.0

  953 12:23:52.663518  scan_generic_bus for PCI: 00:02.0 done

  954 12:23:52.666845  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  955 12:23:52.669862  PCI: 00:04.0 scanning...

  956 12:23:52.673423  scan_generic_bus for PCI: 00:04.0

  957 12:23:52.676429  GENERIC: 0.0 enabled

  958 12:23:52.679757  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  959 12:23:52.686209  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  960 12:23:52.689690  PCI: 00:0d.0 scanning...

  961 12:23:52.693176  scan_static_bus for PCI: 00:0d.0

  962 12:23:52.693259  USB0 port 0 enabled

  963 12:23:52.696410  USB0 port 0 scanning...

  964 12:23:52.699740  scan_static_bus for USB0 port 0

  965 12:23:52.703173  USB3 port 0 enabled

  966 12:23:52.703256  USB3 port 1 enabled

  967 12:23:52.705944  USB3 port 2 disabled

  968 12:23:52.709509  USB3 port 3 disabled

  969 12:23:52.709592  USB3 port 0 scanning...

  970 12:23:52.712545  scan_static_bus for USB3 port 0

  971 12:23:52.719394  scan_static_bus for USB3 port 0 done

  972 12:23:52.722447  scan_bus: bus USB3 port 0 finished in 6 msecs

  973 12:23:52.726193  USB3 port 1 scanning...

  974 12:23:52.729237  scan_static_bus for USB3 port 1

  975 12:23:52.732898  scan_static_bus for USB3 port 1 done

  976 12:23:52.735893  scan_bus: bus USB3 port 1 finished in 6 msecs

  977 12:23:52.739349  scan_static_bus for USB0 port 0 done

  978 12:23:52.746047  scan_bus: bus USB0 port 0 finished in 43 msecs

  979 12:23:52.749082  scan_static_bus for PCI: 00:0d.0 done

  980 12:23:52.752574  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  981 12:23:52.756074  PCI: 00:14.0 scanning...

  982 12:23:52.759207  scan_static_bus for PCI: 00:14.0

  983 12:23:52.762782  USB0 port 0 enabled

  984 12:23:52.765665  USB0 port 0 scanning...

  985 12:23:52.769084  scan_static_bus for USB0 port 0

  986 12:23:52.769168  USB2 port 0 disabled

  987 12:23:52.772459  USB2 port 1 enabled

  988 12:23:52.775977  USB2 port 2 enabled

  989 12:23:52.776060  USB2 port 3 disabled

  990 12:23:52.778940  USB2 port 4 enabled

  991 12:23:52.779023  USB2 port 5 disabled

  992 12:23:52.782574  USB2 port 6 disabled

  993 12:23:52.785447  USB2 port 7 disabled

  994 12:23:52.785530  USB2 port 8 disabled

  995 12:23:52.788771  USB2 port 9 disabled

  996 12:23:52.792425  USB3 port 0 disabled

  997 12:23:52.792508  USB3 port 1 enabled

  998 12:23:52.795872  USB3 port 2 disabled

  999 12:23:52.799008  USB3 port 3 disabled

 1000 12:23:52.799113  USB2 port 1 scanning...

 1001 12:23:52.802420  scan_static_bus for USB2 port 1

 1002 12:23:52.808926  scan_static_bus for USB2 port 1 done

 1003 12:23:52.812401  scan_bus: bus USB2 port 1 finished in 6 msecs

 1004 12:23:52.815312  USB2 port 2 scanning...

 1005 12:23:52.818955  scan_static_bus for USB2 port 2

 1006 12:23:52.822097  scan_static_bus for USB2 port 2 done

 1007 12:23:52.825271  scan_bus: bus USB2 port 2 finished in 6 msecs

 1008 12:23:52.828859  USB2 port 4 scanning...

 1009 12:23:52.831902  scan_static_bus for USB2 port 4

 1010 12:23:52.835481  scan_static_bus for USB2 port 4 done

 1011 12:23:52.838917  scan_bus: bus USB2 port 4 finished in 6 msecs

 1012 12:23:52.841729  USB3 port 1 scanning...

 1013 12:23:52.845405  scan_static_bus for USB3 port 1

 1014 12:23:52.848384  scan_static_bus for USB3 port 1 done

 1015 12:23:52.855081  scan_bus: bus USB3 port 1 finished in 6 msecs

 1016 12:23:52.858473  scan_static_bus for USB0 port 0 done

 1017 12:23:52.862106  scan_bus: bus USB0 port 0 finished in 93 msecs

 1018 12:23:52.865827  scan_static_bus for PCI: 00:14.0 done

 1019 12:23:52.872456  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

 1020 12:23:52.875451  PCI: 00:14.3 scanning...

 1021 12:23:52.878665  scan_static_bus for PCI: 00:14.3

 1022 12:23:52.878748  GENERIC: 0.0 enabled

 1023 12:23:52.882317  scan_static_bus for PCI: 00:14.3 done

 1024 12:23:52.888827  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1025 12:23:52.891847  PCI: 00:15.0 scanning...

 1026 12:23:52.895300  scan_static_bus for PCI: 00:15.0

 1027 12:23:52.895381  I2C: 00:1a enabled

 1028 12:23:52.898611  I2C: 00:31 enabled

 1029 12:23:52.901601  I2C: 00:32 enabled

 1030 12:23:52.905078  scan_static_bus for PCI: 00:15.0 done

 1031 12:23:52.908443  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1032 12:23:52.911455  PCI: 00:15.1 scanning...

 1033 12:23:52.915223  scan_static_bus for PCI: 00:15.1

 1034 12:23:52.917959  I2C: 00:10 enabled

 1035 12:23:52.921558  scan_static_bus for PCI: 00:15.1 done

 1036 12:23:52.925106  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1037 12:23:52.928223  PCI: 00:15.2 scanning...

 1038 12:23:52.931952  scan_static_bus for PCI: 00:15.2

 1039 12:23:52.934844  scan_static_bus for PCI: 00:15.2 done

 1040 12:23:52.941488  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1041 12:23:52.941571  PCI: 00:15.3 scanning...

 1042 12:23:52.944451  scan_static_bus for PCI: 00:15.3

 1043 12:23:52.951101  scan_static_bus for PCI: 00:15.3 done

 1044 12:23:52.954737  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1045 12:23:52.957753  PCI: 00:19.1 scanning...

 1046 12:23:52.961289  scan_static_bus for PCI: 00:19.1

 1047 12:23:52.961398  I2C: 00:15 enabled

 1048 12:23:52.967738  scan_static_bus for PCI: 00:19.1 done

 1049 12:23:52.971247  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1050 12:23:52.974191  PCI: 00:1d.0 scanning...

 1051 12:23:52.977835  do_pci_scan_bridge for PCI: 00:1d.0

 1052 12:23:52.980840  PCI: pci_scan_bus for bus 01

 1053 12:23:52.984437  PCI: 01:00.0 [1c5c/174a] enabled

 1054 12:23:52.987264  GENERIC: 0.0 enabled

 1055 12:23:52.991100  Enabling Common Clock Configuration

 1056 12:23:52.994136  L1 Sub-State supported from root port 29

 1057 12:23:52.997297  L1 Sub-State Support = 0xf

 1058 12:23:53.000688  CommonModeRestoreTime = 0x28

 1059 12:23:53.004151  Power On Value = 0x16, Power On Scale = 0x0

 1060 12:23:53.006854  ASPM: Enabled L1

 1061 12:23:53.010676  PCIe: Max_Payload_Size adjusted to 128

 1062 12:23:53.013520  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1063 12:23:53.017086  PCI: 00:1e.2 scanning...

 1064 12:23:53.020552  scan_generic_bus for PCI: 00:1e.2

 1065 12:23:53.023547  SPI: 00 enabled

 1066 12:23:53.027135  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1067 12:23:53.033434  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1068 12:23:53.036915  PCI: 00:1e.3 scanning...

 1069 12:23:53.039894  scan_generic_bus for PCI: 00:1e.3

 1070 12:23:53.039977  SPI: 00 enabled

 1071 12:23:53.046704  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1072 12:23:53.053209  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1073 12:23:53.053332  PCI: 00:1f.0 scanning...

 1074 12:23:53.056892  scan_static_bus for PCI: 00:1f.0

 1075 12:23:53.059999  PNP: 0c09.0 enabled

 1076 12:23:53.062996  PNP: 0c09.0 scanning...

 1077 12:23:53.066546  scan_static_bus for PNP: 0c09.0

 1078 12:23:53.069434  scan_static_bus for PNP: 0c09.0 done

 1079 12:23:53.073056  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1080 12:23:53.079605  scan_static_bus for PCI: 00:1f.0 done

 1081 12:23:53.083278  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1082 12:23:53.086212  PCI: 00:1f.2 scanning...

 1083 12:23:53.089280  scan_static_bus for PCI: 00:1f.2

 1084 12:23:53.089362  GENERIC: 0.0 enabled

 1085 12:23:53.092826  GENERIC: 0.0 scanning...

 1086 12:23:53.096128  scan_static_bus for GENERIC: 0.0

 1087 12:23:53.099507  GENERIC: 0.0 enabled

 1088 12:23:53.102665  GENERIC: 1.0 enabled

 1089 12:23:53.106207  scan_static_bus for GENERIC: 0.0 done

 1090 12:23:53.109372  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1091 12:23:53.112684  scan_static_bus for PCI: 00:1f.2 done

 1092 12:23:53.119522  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1093 12:23:53.122546  PCI: 00:1f.3 scanning...

 1094 12:23:53.126095  scan_static_bus for PCI: 00:1f.3

 1095 12:23:53.129437  scan_static_bus for PCI: 00:1f.3 done

 1096 12:23:53.132483  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1097 12:23:53.135531  PCI: 00:1f.5 scanning...

 1098 12:23:53.139137  scan_generic_bus for PCI: 00:1f.5

 1099 12:23:53.142174  scan_generic_bus for PCI: 00:1f.5 done

 1100 12:23:53.149062  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1101 12:23:53.151918  scan_bus: bus DOMAIN: 0000 finished in 718 msecs

 1102 12:23:53.155425  scan_static_bus for Root Device done

 1103 12:23:53.162064  scan_bus: bus Root Device finished in 737 msecs

 1104 12:23:53.162177  done

 1105 12:23:53.168690  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1106 12:23:53.171941  Chrome EC: UHEPI supported

 1107 12:23:53.178270  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1108 12:23:53.184734  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1109 12:23:53.188644  SPI flash protection: WPSW=0 SRP0=0

 1110 12:23:53.191374  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1111 12:23:53.198003  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1112 12:23:53.201556  found VGA at PCI: 00:02.0

 1113 12:23:53.204907  Setting up VGA for PCI: 00:02.0

 1114 12:23:53.208070  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1115 12:23:53.214764  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1116 12:23:53.218349  Allocating resources...

 1117 12:23:53.218447  Reading resources...

 1118 12:23:53.221383  Root Device read_resources bus 0 link: 0

 1119 12:23:53.228106  DOMAIN: 0000 read_resources bus 0 link: 0

 1120 12:23:53.231200  PCI: 00:04.0 read_resources bus 1 link: 0

 1121 12:23:53.237961  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1122 12:23:53.241142  PCI: 00:0d.0 read_resources bus 0 link: 0

 1123 12:23:53.248034  USB0 port 0 read_resources bus 0 link: 0

 1124 12:23:53.251103  USB0 port 0 read_resources bus 0 link: 0 done

 1125 12:23:53.257744  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1126 12:23:53.261074  PCI: 00:14.0 read_resources bus 0 link: 0

 1127 12:23:53.264083  USB0 port 0 read_resources bus 0 link: 0

 1128 12:23:53.271808  USB0 port 0 read_resources bus 0 link: 0 done

 1129 12:23:53.275429  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1130 12:23:53.282138  PCI: 00:14.3 read_resources bus 0 link: 0

 1131 12:23:53.285768  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1132 12:23:53.292050  PCI: 00:15.0 read_resources bus 0 link: 0

 1133 12:23:53.295696  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1134 12:23:53.302423  PCI: 00:15.1 read_resources bus 0 link: 0

 1135 12:23:53.305519  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1136 12:23:53.312695  PCI: 00:19.1 read_resources bus 0 link: 0

 1137 12:23:53.316062  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1138 12:23:53.322327  PCI: 00:1d.0 read_resources bus 1 link: 0

 1139 12:23:53.326004  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1140 12:23:53.332336  PCI: 00:1e.2 read_resources bus 2 link: 0

 1141 12:23:53.335839  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1142 12:23:53.342931  PCI: 00:1e.3 read_resources bus 3 link: 0

 1143 12:23:53.345647  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1144 12:23:53.352376  PCI: 00:1f.0 read_resources bus 0 link: 0

 1145 12:23:53.355855  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1146 12:23:53.362074  PCI: 00:1f.2 read_resources bus 0 link: 0

 1147 12:23:53.365674  GENERIC: 0.0 read_resources bus 0 link: 0

 1148 12:23:53.372215  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1149 12:23:53.375902  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1150 12:23:53.382306  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1151 12:23:53.385414  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1152 12:23:53.392134  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1153 12:23:53.395616  Root Device read_resources bus 0 link: 0 done

 1154 12:23:53.398724  Done reading resources.

 1155 12:23:53.405515  Show resources in subtree (Root Device)...After reading.

 1156 12:23:53.408606   Root Device child on link 0 DOMAIN: 0000

 1157 12:23:53.411841    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1158 12:23:53.421799    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1159 12:23:53.431900    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1160 12:23:53.431986     PCI: 00:00.0

 1161 12:23:53.441793     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1162 12:23:53.451969     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1163 12:23:53.461749     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1164 12:23:53.472012     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1165 12:23:53.481868     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1166 12:23:53.491465     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1167 12:23:53.498396     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1168 12:23:53.508153     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1169 12:23:53.518217     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1170 12:23:53.527661     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1171 12:23:53.537893     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1172 12:23:53.544363     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1173 12:23:53.554298     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1174 12:23:53.564409     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1175 12:23:53.574474     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1176 12:23:53.584151     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1177 12:23:53.594258     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1178 12:23:53.603863     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1179 12:23:53.610702     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1180 12:23:53.620879     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1181 12:23:53.623893     PCI: 00:02.0

 1182 12:23:53.633946     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1183 12:23:53.643638     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1184 12:23:53.653561     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1185 12:23:53.656744     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1186 12:23:53.666659     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1187 12:23:53.670058      GENERIC: 0.0

 1188 12:23:53.670142     PCI: 00:05.0

 1189 12:23:53.680110     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1190 12:23:53.683158     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1191 12:23:53.686692      GENERIC: 0.0

 1192 12:23:53.690228     PCI: 00:08.0

 1193 12:23:53.700462     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 12:23:53.700575     PCI: 00:0a.0

 1195 12:23:53.703256     PCI: 00:0d.0 child on link 0 USB0 port 0

 1196 12:23:53.713340     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1197 12:23:53.719859      USB0 port 0 child on link 0 USB3 port 0

 1198 12:23:53.719954       USB3 port 0

 1199 12:23:53.723352       USB3 port 1

 1200 12:23:53.723440       USB3 port 2

 1201 12:23:53.726487       USB3 port 3

 1202 12:23:53.729431     PCI: 00:14.0 child on link 0 USB0 port 0

 1203 12:23:53.739827     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1204 12:23:53.746393      USB0 port 0 child on link 0 USB2 port 0

 1205 12:23:53.746488       USB2 port 0

 1206 12:23:53.749369       USB2 port 1

 1207 12:23:53.749451       USB2 port 2

 1208 12:23:53.752829       USB2 port 3

 1209 12:23:53.752912       USB2 port 4

 1210 12:23:53.756032       USB2 port 5

 1211 12:23:53.756114       USB2 port 6

 1212 12:23:53.759356       USB2 port 7

 1213 12:23:53.759439       USB2 port 8

 1214 12:23:53.763019       USB2 port 9

 1215 12:23:53.763101       USB3 port 0

 1216 12:23:53.766220       USB3 port 1

 1217 12:23:53.769231       USB3 port 2

 1218 12:23:53.769338       USB3 port 3

 1219 12:23:53.772458     PCI: 00:14.2

 1220 12:23:53.782461     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1221 12:23:53.792954     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1222 12:23:53.795799     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1223 12:23:53.805752     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1224 12:23:53.809311      GENERIC: 0.0

 1225 12:23:53.812177     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1226 12:23:53.822317     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1227 12:23:53.822400      I2C: 00:1a

 1228 12:23:53.825975      I2C: 00:31

 1229 12:23:53.826060      I2C: 00:32

 1230 12:23:53.832480     PCI: 00:15.1 child on link 0 I2C: 00:10

 1231 12:23:53.841960     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1232 12:23:53.842044      I2C: 00:10

 1233 12:23:53.845540     PCI: 00:15.2

 1234 12:23:53.855238     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1235 12:23:53.855324     PCI: 00:15.3

 1236 12:23:53.865093     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1237 12:23:53.868502     PCI: 00:16.0

 1238 12:23:53.878099     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1239 12:23:53.878181     PCI: 00:19.0

 1240 12:23:53.881495     PCI: 00:19.1 child on link 0 I2C: 00:15

 1241 12:23:53.891858     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1242 12:23:53.895345      I2C: 00:15

 1243 12:23:53.897951     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1244 12:23:53.908319     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1245 12:23:53.918273     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1246 12:23:53.927967     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1247 12:23:53.928050      GENERIC: 0.0

 1248 12:23:53.931380      PCI: 01:00.0

 1249 12:23:53.941641      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1250 12:23:53.948148      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1251 12:23:53.957624      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1252 12:23:53.961418     PCI: 00:1e.0

 1253 12:23:53.971260     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1254 12:23:53.974314     PCI: 00:1e.2 child on link 0 SPI: 00

 1255 12:23:53.984715     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1256 12:23:53.987653      SPI: 00

 1257 12:23:53.990706     PCI: 00:1e.3 child on link 0 SPI: 00

 1258 12:23:54.000436     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1259 12:23:54.000539      SPI: 00

 1260 12:23:54.007456     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1261 12:23:54.014045     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1262 12:23:54.017324      PNP: 0c09.0

 1263 12:23:54.023929      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1264 12:23:54.030599     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1265 12:23:54.040577     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1266 12:23:54.047302     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1267 12:23:54.053599      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1268 12:23:54.053683       GENERIC: 0.0

 1269 12:23:54.057282       GENERIC: 1.0

 1270 12:23:54.060141     PCI: 00:1f.3

 1271 12:23:54.070368     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1272 12:23:54.080492     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1273 12:23:54.080576     PCI: 00:1f.5

 1274 12:23:54.090176     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1275 12:23:54.093284    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1276 12:23:54.096564     APIC: 00

 1277 12:23:54.096646     APIC: 01

 1278 12:23:54.096710     APIC: 03

 1279 12:23:54.099816     APIC: 05

 1280 12:23:54.099900     APIC: 07

 1281 12:23:54.100003     APIC: 06

 1282 12:23:54.102848     APIC: 02

 1283 12:23:54.102929     APIC: 04

 1284 12:23:54.113293  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1285 12:23:54.116239   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1286 12:23:54.122952   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1287 12:23:54.129795   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1288 12:23:54.132726    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1289 12:23:54.139762    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1290 12:23:54.142739    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1291 12:23:54.149520   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1292 12:23:54.155979   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1293 12:23:54.166277   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1294 12:23:54.172799  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1295 12:23:54.179418  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1296 12:23:54.186142   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1297 12:23:54.192658   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1298 12:23:54.198859   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1299 12:23:54.202645   DOMAIN: 0000: Resource ranges:

 1300 12:23:54.205739   * Base: 1000, Size: 800, Tag: 100

 1301 12:23:54.212691   * Base: 1900, Size: e700, Tag: 100

 1302 12:23:54.215786    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1303 12:23:54.222590  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1304 12:23:54.229202  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1305 12:23:54.238986   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1306 12:23:54.245523   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1307 12:23:54.252350   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1308 12:23:54.262054   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1309 12:23:54.268768   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1310 12:23:54.275563   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1311 12:23:54.285005   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1312 12:23:54.291698   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1313 12:23:54.298128   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1314 12:23:54.308056   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1315 12:23:54.314850   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1316 12:23:54.321750   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1317 12:23:54.331509   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1318 12:23:54.338078   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1319 12:23:54.344594   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1320 12:23:54.351134   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1321 12:23:54.361308   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1322 12:23:54.367903   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1323 12:23:54.378112   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1324 12:23:54.384756   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1325 12:23:54.391216   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1326 12:23:54.401112   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1327 12:23:54.404284   DOMAIN: 0000: Resource ranges:

 1328 12:23:54.407407   * Base: 7fc00000, Size: 40400000, Tag: 200

 1329 12:23:54.410910   * Base: d0000000, Size: 28000000, Tag: 200

 1330 12:23:54.414294   * Base: fa000000, Size: 1000000, Tag: 200

 1331 12:23:54.420742   * Base: fb001000, Size: 2fff000, Tag: 200

 1332 12:23:54.424074   * Base: fe010000, Size: 2e000, Tag: 200

 1333 12:23:54.427662   * Base: fe03f000, Size: d41000, Tag: 200

 1334 12:23:54.430523   * Base: fed88000, Size: 8000, Tag: 200

 1335 12:23:54.437127   * Base: fed93000, Size: d000, Tag: 200

 1336 12:23:54.441176   * Base: feda2000, Size: 1e000, Tag: 200

 1337 12:23:54.444194   * Base: fede0000, Size: 1220000, Tag: 200

 1338 12:23:54.450675   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1339 12:23:54.457113    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1340 12:23:54.464011    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1341 12:23:54.470351    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1342 12:23:54.476946    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1343 12:23:54.483547    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1344 12:23:54.490107    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1345 12:23:54.496820    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1346 12:23:54.503793    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1347 12:23:54.510238    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1348 12:23:54.516622    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1349 12:23:54.523398    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1350 12:23:54.530193    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1351 12:23:54.536786    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1352 12:23:54.543224    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1353 12:23:54.549986    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1354 12:23:54.556638    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1355 12:23:54.563037    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1356 12:23:54.569429    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1357 12:23:54.575986    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1358 12:23:54.582640    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1359 12:23:54.589318    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1360 12:23:54.595973    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1361 12:23:54.602717  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1362 12:23:54.612825  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1363 12:23:54.615988   PCI: 00:1d.0: Resource ranges:

 1364 12:23:54.619619   * Base: 7fc00000, Size: 100000, Tag: 200

 1365 12:23:54.625922    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1366 12:23:54.632638    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1367 12:23:54.639199    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1368 12:23:54.645757  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1369 12:23:54.655723  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1370 12:23:54.659063  Root Device assign_resources, bus 0 link: 0

 1371 12:23:54.662173  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1372 12:23:54.671804  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1373 12:23:54.678674  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1374 12:23:54.688422  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1375 12:23:54.695248  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1376 12:23:54.701739  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1377 12:23:54.704895  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1378 12:23:54.715166  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1379 12:23:54.721774  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1380 12:23:54.731518  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1381 12:23:54.735059  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1382 12:23:54.737893  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1383 12:23:54.747781  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1384 12:23:54.751417  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1385 12:23:54.757949  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1386 12:23:54.764438  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1387 12:23:54.774518  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1388 12:23:54.781169  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1389 12:23:54.783932  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1390 12:23:54.790742  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1391 12:23:54.797415  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1392 12:23:54.804084  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1393 12:23:54.807761  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1394 12:23:54.817281  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1395 12:23:54.820318  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1396 12:23:54.823733  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1397 12:23:54.833879  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1398 12:23:54.840469  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1399 12:23:54.850580  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1400 12:23:54.857205  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1401 12:23:54.863710  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1402 12:23:54.867303  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1403 12:23:54.876846  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1404 12:23:54.886537  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1405 12:23:54.893480  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1406 12:23:54.899842  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1407 12:23:54.906771  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1408 12:23:54.916545  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1409 12:23:54.923007  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1410 12:23:54.925984  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1411 12:23:54.936752  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1412 12:23:54.940196  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1413 12:23:54.946290  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1414 12:23:54.953054  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1415 12:23:54.959569  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1416 12:23:54.962745  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1417 12:23:54.966371  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1418 12:23:54.973020  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1419 12:23:54.976493  LPC: Trying to open IO window from 800 size 1ff

 1420 12:23:54.986321  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1421 12:23:54.993058  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1422 12:23:55.002897  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1423 12:23:55.005880  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1424 12:23:55.012924  Root Device assign_resources, bus 0 link: 0

 1425 12:23:55.013034  Done setting resources.

 1426 12:23:55.018941  Show resources in subtree (Root Device)...After assigning values.

 1427 12:23:55.025728   Root Device child on link 0 DOMAIN: 0000

 1428 12:23:55.029123    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1429 12:23:55.039270    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1430 12:23:55.048739    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1431 12:23:55.048837     PCI: 00:00.0

 1432 12:23:55.058536     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1433 12:23:55.068905     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1434 12:23:55.078802     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1435 12:23:55.089105     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1436 12:23:55.098669     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1437 12:23:55.105077     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1438 12:23:55.115170     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1439 12:23:55.125261     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1440 12:23:55.134948     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1441 12:23:55.145180     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1442 12:23:55.151470     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1443 12:23:55.161739     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1444 12:23:55.171531     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1445 12:23:55.181574     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1446 12:23:55.191563     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1447 12:23:55.201008     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1448 12:23:55.211103     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1449 12:23:55.218172     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1450 12:23:55.227945     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1451 12:23:55.238002     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1452 12:23:55.241411     PCI: 00:02.0

 1453 12:23:55.250940     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1454 12:23:55.260942     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1455 12:23:55.270795     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1456 12:23:55.274113     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1457 12:23:55.283937     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1458 12:23:55.287318      GENERIC: 0.0

 1459 12:23:55.287400     PCI: 00:05.0

 1460 12:23:55.300504     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1461 12:23:55.303939     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1462 12:23:55.307228      GENERIC: 0.0

 1463 12:23:55.307312     PCI: 00:08.0

 1464 12:23:55.317312     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1465 12:23:55.320646     PCI: 00:0a.0

 1466 12:23:55.323555     PCI: 00:0d.0 child on link 0 USB0 port 0

 1467 12:23:55.333667     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1468 12:23:55.337129      USB0 port 0 child on link 0 USB3 port 0

 1469 12:23:55.340724       USB3 port 0

 1470 12:23:55.343391       USB3 port 1

 1471 12:23:55.343493       USB3 port 2

 1472 12:23:55.347055       USB3 port 3

 1473 12:23:55.350415     PCI: 00:14.0 child on link 0 USB0 port 0

 1474 12:23:55.360279     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1475 12:23:55.363362      USB0 port 0 child on link 0 USB2 port 0

 1476 12:23:55.367090       USB2 port 0

 1477 12:23:55.367191       USB2 port 1

 1478 12:23:55.370100       USB2 port 2

 1479 12:23:55.373465       USB2 port 3

 1480 12:23:55.373564       USB2 port 4

 1481 12:23:55.376778       USB2 port 5

 1482 12:23:55.376884       USB2 port 6

 1483 12:23:55.379981       USB2 port 7

 1484 12:23:55.380089       USB2 port 8

 1485 12:23:55.383640       USB2 port 9

 1486 12:23:55.383749       USB3 port 0

 1487 12:23:55.386476       USB3 port 1

 1488 12:23:55.386575       USB3 port 2

 1489 12:23:55.389913       USB3 port 3

 1490 12:23:55.390013     PCI: 00:14.2

 1491 12:23:55.403128     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1492 12:23:55.413243     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1493 12:23:55.416215     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1494 12:23:55.426357     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1495 12:23:55.429801      GENERIC: 0.0

 1496 12:23:55.433076     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1497 12:23:55.443346     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1498 12:23:55.446102      I2C: 00:1a

 1499 12:23:55.446185      I2C: 00:31

 1500 12:23:55.446249      I2C: 00:32

 1501 12:23:55.453197     PCI: 00:15.1 child on link 0 I2C: 00:10

 1502 12:23:55.463226     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1503 12:23:55.463317      I2C: 00:10

 1504 12:23:55.466282     PCI: 00:15.2

 1505 12:23:55.476494     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1506 12:23:55.476578     PCI: 00:15.3

 1507 12:23:55.489350     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1508 12:23:55.489436     PCI: 00:16.0

 1509 12:23:55.499297     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1510 12:23:55.502350     PCI: 00:19.0

 1511 12:23:55.506142     PCI: 00:19.1 child on link 0 I2C: 00:15

 1512 12:23:55.516440     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1513 12:23:55.519533      I2C: 00:15

 1514 12:23:55.522720     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1515 12:23:55.532314     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1516 12:23:55.542288     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1517 12:23:55.552737     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1518 12:23:55.555575      GENERIC: 0.0

 1519 12:23:55.559264      PCI: 01:00.0

 1520 12:23:55.568813      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1521 12:23:55.578664      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1522 12:23:55.588569      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1523 12:23:55.588690     PCI: 00:1e.0

 1524 12:23:55.602004     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1525 12:23:55.605269     PCI: 00:1e.2 child on link 0 SPI: 00

 1526 12:23:55.615217     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1527 12:23:55.618203      SPI: 00

 1528 12:23:55.621929     PCI: 00:1e.3 child on link 0 SPI: 00

 1529 12:23:55.631569     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1530 12:23:55.631687      SPI: 00

 1531 12:23:55.638096     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1532 12:23:55.645183     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1533 12:23:55.648015      PNP: 0c09.0

 1534 12:23:55.654661      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1535 12:23:55.661382     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1536 12:23:55.671267     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1537 12:23:55.678090     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1538 12:23:55.684625      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1539 12:23:55.684734       GENERIC: 0.0

 1540 12:23:55.687603       GENERIC: 1.0

 1541 12:23:55.687710     PCI: 00:1f.3

 1542 12:23:55.701282     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1543 12:23:55.710929     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1544 12:23:55.711024     PCI: 00:1f.5

 1545 12:23:55.721072     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1546 12:23:55.727795    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1547 12:23:55.727887     APIC: 00

 1548 12:23:55.727954     APIC: 01

 1549 12:23:55.731229     APIC: 03

 1550 12:23:55.731324     APIC: 05

 1551 12:23:55.733934     APIC: 07

 1552 12:23:55.734019     APIC: 06

 1553 12:23:55.734086     APIC: 02

 1554 12:23:55.737321     APIC: 04

 1555 12:23:55.740664  Done allocating resources.

 1556 12:23:55.744217  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1557 12:23:55.750907  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1558 12:23:55.754257  Configure GPIOs for I2S audio on UP4.

 1559 12:23:55.761663  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1560 12:23:55.764895  Enabling resources...

 1561 12:23:55.768651  PCI: 00:00.0 subsystem <- 8086/9a12

 1562 12:23:55.771565  PCI: 00:00.0 cmd <- 06

 1563 12:23:55.775136  PCI: 00:02.0 subsystem <- 8086/9a40

 1564 12:23:55.778189  PCI: 00:02.0 cmd <- 03

 1565 12:23:55.781832  PCI: 00:04.0 subsystem <- 8086/9a03

 1566 12:23:55.784704  PCI: 00:04.0 cmd <- 02

 1567 12:23:55.787913  PCI: 00:05.0 subsystem <- 8086/9a19

 1568 12:23:55.788020  PCI: 00:05.0 cmd <- 02

 1569 12:23:55.795271  PCI: 00:08.0 subsystem <- 8086/9a11

 1570 12:23:55.795353  PCI: 00:08.0 cmd <- 06

 1571 12:23:55.798238  PCI: 00:0d.0 subsystem <- 8086/9a13

 1572 12:23:55.801687  PCI: 00:0d.0 cmd <- 02

 1573 12:23:55.804648  PCI: 00:14.0 subsystem <- 8086/a0ed

 1574 12:23:55.807754  PCI: 00:14.0 cmd <- 02

 1575 12:23:55.811355  PCI: 00:14.2 subsystem <- 8086/a0ef

 1576 12:23:55.814895  PCI: 00:14.2 cmd <- 02

 1577 12:23:55.817734  PCI: 00:14.3 subsystem <- 8086/a0f0

 1578 12:23:55.820958  PCI: 00:14.3 cmd <- 02

 1579 12:23:55.824717  PCI: 00:15.0 subsystem <- 8086/a0e8

 1580 12:23:55.827779  PCI: 00:15.0 cmd <- 02

 1581 12:23:55.831151  PCI: 00:15.1 subsystem <- 8086/a0e9

 1582 12:23:55.834493  PCI: 00:15.1 cmd <- 02

 1583 12:23:55.837447  PCI: 00:15.2 subsystem <- 8086/a0ea

 1584 12:23:55.837635  PCI: 00:15.2 cmd <- 02

 1585 12:23:55.845132  PCI: 00:15.3 subsystem <- 8086/a0eb

 1586 12:23:55.845260  PCI: 00:15.3 cmd <- 02

 1587 12:23:55.847993  PCI: 00:16.0 subsystem <- 8086/a0e0

 1588 12:23:55.850997  PCI: 00:16.0 cmd <- 02

 1589 12:23:55.854453  PCI: 00:19.1 subsystem <- 8086/a0c6

 1590 12:23:55.857989  PCI: 00:19.1 cmd <- 02

 1591 12:23:55.861393  PCI: 00:1d.0 bridge ctrl <- 0013

 1592 12:23:55.864201  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1593 12:23:55.867686  PCI: 00:1d.0 cmd <- 06

 1594 12:23:55.870825  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1595 12:23:55.874055  PCI: 00:1e.0 cmd <- 06

 1596 12:23:55.877464  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1597 12:23:55.881042  PCI: 00:1e.2 cmd <- 06

 1598 12:23:55.884009  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1599 12:23:55.887430  PCI: 00:1e.3 cmd <- 02

 1600 12:23:55.890545  PCI: 00:1f.0 subsystem <- 8086/a087

 1601 12:23:55.894032  PCI: 00:1f.0 cmd <- 407

 1602 12:23:55.897475  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1603 12:23:55.897585  PCI: 00:1f.3 cmd <- 02

 1604 12:23:55.904102  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1605 12:23:55.904210  PCI: 00:1f.5 cmd <- 406

 1606 12:23:55.908914  PCI: 01:00.0 cmd <- 02

 1607 12:23:55.913552  done.

 1608 12:23:55.917119  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1609 12:23:55.920095  Initializing devices...

 1610 12:23:55.923691  Root Device init

 1611 12:23:55.926586  Chrome EC: Set SMI mask to 0x0000000000000000

 1612 12:23:55.934008  Chrome EC: clear events_b mask to 0x0000000000000000

 1613 12:23:55.940575  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1614 12:23:55.947127  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1615 12:23:55.954064  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1616 12:23:55.957257  Chrome EC: Set WAKE mask to 0x0000000000000000

 1617 12:23:55.965020  fw_config match found: DB_USB=USB3_ACTIVE

 1618 12:23:55.968479  Configure Right Type-C port orientation for retimer

 1619 12:23:55.971471  Root Device init finished in 46 msecs

 1620 12:23:55.975808  PCI: 00:00.0 init

 1621 12:23:55.979198  CPU TDP = 9 Watts

 1622 12:23:55.979280  CPU PL1 = 9 Watts

 1623 12:23:55.982589  CPU PL2 = 40 Watts

 1624 12:23:55.985671  CPU PL4 = 83 Watts

 1625 12:23:55.988894  PCI: 00:00.0 init finished in 8 msecs

 1626 12:23:55.989000  PCI: 00:02.0 init

 1627 12:23:55.992307  GMA: Found VBT in CBFS

 1628 12:23:55.995925  GMA: Found valid VBT in CBFS

 1629 12:23:56.002484  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1630 12:23:56.009095                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1631 12:23:56.012175  PCI: 00:02.0 init finished in 18 msecs

 1632 12:23:56.015823  PCI: 00:05.0 init

 1633 12:23:56.018589  PCI: 00:05.0 init finished in 0 msecs

 1634 12:23:56.022180  PCI: 00:08.0 init

 1635 12:23:56.025038  PCI: 00:08.0 init finished in 0 msecs

 1636 12:23:56.028891  PCI: 00:14.0 init

 1637 12:23:56.032155  PCI: 00:14.0 init finished in 0 msecs

 1638 12:23:56.035052  PCI: 00:14.2 init

 1639 12:23:56.038518  PCI: 00:14.2 init finished in 0 msecs

 1640 12:23:56.042000  PCI: 00:15.0 init

 1641 12:23:56.044946  I2C bus 0 version 0x3230302a

 1642 12:23:56.048278  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1643 12:23:56.051654  PCI: 00:15.0 init finished in 6 msecs

 1644 12:23:56.051770  PCI: 00:15.1 init

 1645 12:23:56.055256  I2C bus 1 version 0x3230302a

 1646 12:23:56.058259  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1647 12:23:56.065042  PCI: 00:15.1 init finished in 6 msecs

 1648 12:23:56.065155  PCI: 00:15.2 init

 1649 12:23:56.068186  I2C bus 2 version 0x3230302a

 1650 12:23:56.071500  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1651 12:23:56.075026  PCI: 00:15.2 init finished in 6 msecs

 1652 12:23:56.078564  PCI: 00:15.3 init

 1653 12:23:56.081847  I2C bus 3 version 0x3230302a

 1654 12:23:56.085321  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1655 12:23:56.088377  PCI: 00:15.3 init finished in 6 msecs

 1656 12:23:56.091810  PCI: 00:16.0 init

 1657 12:23:56.095077  PCI: 00:16.0 init finished in 0 msecs

 1658 12:23:56.098316  PCI: 00:19.1 init

 1659 12:23:56.101233  I2C bus 5 version 0x3230302a

 1660 12:23:56.104734  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1661 12:23:56.107896  PCI: 00:19.1 init finished in 6 msecs

 1662 12:23:56.111340  PCI: 00:1d.0 init

 1663 12:23:56.114490  Initializing PCH PCIe bridge.

 1664 12:23:56.118014  PCI: 00:1d.0 init finished in 3 msecs

 1665 12:23:56.121018  PCI: 00:1f.0 init

 1666 12:23:56.124693  IOAPIC: Initializing IOAPIC at 0xfec00000

 1667 12:23:56.128167  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1668 12:23:56.131227  IOAPIC: ID = 0x02

 1669 12:23:56.134133  IOAPIC: Dumping registers

 1670 12:23:56.134269    reg 0x0000: 0x02000000

 1671 12:23:56.137522    reg 0x0001: 0x00770020

 1672 12:23:56.140909    reg 0x0002: 0x00000000

 1673 12:23:56.144464  PCI: 00:1f.0 init finished in 21 msecs

 1674 12:23:56.147374  PCI: 00:1f.2 init

 1675 12:23:56.151028  Disabling ACPI via APMC.

 1676 12:23:56.151141  APMC done.

 1677 12:23:56.157723  PCI: 00:1f.2 init finished in 5 msecs

 1678 12:23:56.168313  PCI: 01:00.0 init

 1679 12:23:56.171584  PCI: 01:00.0 init finished in 0 msecs

 1680 12:23:56.174887  PNP: 0c09.0 init

 1681 12:23:56.181649  Google Chrome EC uptime: 8.437 seconds

 1682 12:23:56.184902  Google Chrome AP resets since EC boot: 1

 1683 12:23:56.187885  Google Chrome most recent AP reset causes:

 1684 12:23:56.191610  	0.346: 32775 shutdown: entering G3

 1685 12:23:56.198128  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1686 12:23:56.201444  PNP: 0c09.0 init finished in 23 msecs

 1687 12:23:56.207668  Devices initialized

 1688 12:23:56.211115  Show all devs... After init.

 1689 12:23:56.214697  Root Device: enabled 1

 1690 12:23:56.214780  DOMAIN: 0000: enabled 1

 1691 12:23:56.217713  CPU_CLUSTER: 0: enabled 1

 1692 12:23:56.221478  PCI: 00:00.0: enabled 1

 1693 12:23:56.224487  PCI: 00:02.0: enabled 1

 1694 12:23:56.224596  PCI: 00:04.0: enabled 1

 1695 12:23:56.227975  PCI: 00:05.0: enabled 1

 1696 12:23:56.231057  PCI: 00:06.0: enabled 0

 1697 12:23:56.234594  PCI: 00:07.0: enabled 0

 1698 12:23:56.234702  PCI: 00:07.1: enabled 0

 1699 12:23:56.237622  PCI: 00:07.2: enabled 0

 1700 12:23:56.241002  PCI: 00:07.3: enabled 0

 1701 12:23:56.244062  PCI: 00:08.0: enabled 1

 1702 12:23:56.244157  PCI: 00:09.0: enabled 0

 1703 12:23:56.247628  PCI: 00:0a.0: enabled 0

 1704 12:23:56.251054  PCI: 00:0d.0: enabled 1

 1705 12:23:56.254076  PCI: 00:0d.1: enabled 0

 1706 12:23:56.254151  PCI: 00:0d.2: enabled 0

 1707 12:23:56.257702  PCI: 00:0d.3: enabled 0

 1708 12:23:56.261084  PCI: 00:0e.0: enabled 0

 1709 12:23:56.261183  PCI: 00:10.2: enabled 1

 1710 12:23:56.264271  PCI: 00:10.6: enabled 0

 1711 12:23:56.267714  PCI: 00:10.7: enabled 0

 1712 12:23:56.270605  PCI: 00:12.0: enabled 0

 1713 12:23:56.270709  PCI: 00:12.6: enabled 0

 1714 12:23:56.274162  PCI: 00:13.0: enabled 0

 1715 12:23:56.277784  PCI: 00:14.0: enabled 1

 1716 12:23:56.280790  PCI: 00:14.1: enabled 0

 1717 12:23:56.280900  PCI: 00:14.2: enabled 1

 1718 12:23:56.284608  PCI: 00:14.3: enabled 1

 1719 12:23:56.287789  PCI: 00:15.0: enabled 1

 1720 12:23:56.290697  PCI: 00:15.1: enabled 1

 1721 12:23:56.290778  PCI: 00:15.2: enabled 1

 1722 12:23:56.294081  PCI: 00:15.3: enabled 1

 1723 12:23:56.297573  PCI: 00:16.0: enabled 1

 1724 12:23:56.297649  PCI: 00:16.1: enabled 0

 1725 12:23:56.301155  PCI: 00:16.2: enabled 0

 1726 12:23:56.304271  PCI: 00:16.3: enabled 0

 1727 12:23:56.307295  PCI: 00:16.4: enabled 0

 1728 12:23:56.307367  PCI: 00:16.5: enabled 0

 1729 12:23:56.310847  PCI: 00:17.0: enabled 0

 1730 12:23:56.314039  PCI: 00:19.0: enabled 0

 1731 12:23:56.317384  PCI: 00:19.1: enabled 1

 1732 12:23:56.317465  PCI: 00:19.2: enabled 0

 1733 12:23:56.320921  PCI: 00:1c.0: enabled 1

 1734 12:23:56.324119  PCI: 00:1c.1: enabled 0

 1735 12:23:56.327174  PCI: 00:1c.2: enabled 0

 1736 12:23:56.327254  PCI: 00:1c.3: enabled 0

 1737 12:23:56.330597  PCI: 00:1c.4: enabled 0

 1738 12:23:56.334059  PCI: 00:1c.5: enabled 0

 1739 12:23:56.337147  PCI: 00:1c.6: enabled 1

 1740 12:23:56.337233  PCI: 00:1c.7: enabled 0

 1741 12:23:56.340168  PCI: 00:1d.0: enabled 1

 1742 12:23:56.343755  PCI: 00:1d.1: enabled 0

 1743 12:23:56.343844  PCI: 00:1d.2: enabled 1

 1744 12:23:56.347332  PCI: 00:1d.3: enabled 0

 1745 12:23:56.350364  PCI: 00:1e.0: enabled 1

 1746 12:23:56.353849  PCI: 00:1e.1: enabled 0

 1747 12:23:56.353996  PCI: 00:1e.2: enabled 1

 1748 12:23:56.357024  PCI: 00:1e.3: enabled 1

 1749 12:23:56.360332  PCI: 00:1f.0: enabled 1

 1750 12:23:56.364046  PCI: 00:1f.1: enabled 0

 1751 12:23:56.364155  PCI: 00:1f.2: enabled 1

 1752 12:23:56.367001  PCI: 00:1f.3: enabled 1

 1753 12:23:56.370323  PCI: 00:1f.4: enabled 0

 1754 12:23:56.373509  PCI: 00:1f.5: enabled 1

 1755 12:23:56.373606  PCI: 00:1f.6: enabled 0

 1756 12:23:56.376989  PCI: 00:1f.7: enabled 0

 1757 12:23:56.380434  APIC: 00: enabled 1

 1758 12:23:56.380520  GENERIC: 0.0: enabled 1

 1759 12:23:56.383499  GENERIC: 0.0: enabled 1

 1760 12:23:56.387160  GENERIC: 1.0: enabled 1

 1761 12:23:56.390229  GENERIC: 0.0: enabled 1

 1762 12:23:56.390306  GENERIC: 1.0: enabled 1

 1763 12:23:56.393886  USB0 port 0: enabled 1

 1764 12:23:56.397098  GENERIC: 0.0: enabled 1

 1765 12:23:56.397183  USB0 port 0: enabled 1

 1766 12:23:56.400748  GENERIC: 0.0: enabled 1

 1767 12:23:56.403352  I2C: 00:1a: enabled 1

 1768 12:23:56.406724  I2C: 00:31: enabled 1

 1769 12:23:56.406812  I2C: 00:32: enabled 1

 1770 12:23:56.410272  I2C: 00:10: enabled 1

 1771 12:23:56.413313  I2C: 00:15: enabled 1

 1772 12:23:56.413397  GENERIC: 0.0: enabled 0

 1773 12:23:56.416612  GENERIC: 1.0: enabled 0

 1774 12:23:56.420089  GENERIC: 0.0: enabled 1

 1775 12:23:56.420201  SPI: 00: enabled 1

 1776 12:23:56.423527  SPI: 00: enabled 1

 1777 12:23:56.426414  PNP: 0c09.0: enabled 1

 1778 12:23:56.426500  GENERIC: 0.0: enabled 1

 1779 12:23:56.430060  USB3 port 0: enabled 1

 1780 12:23:56.433111  USB3 port 1: enabled 1

 1781 12:23:56.436178  USB3 port 2: enabled 0

 1782 12:23:56.436272  USB3 port 3: enabled 0

 1783 12:23:56.439857  USB2 port 0: enabled 0

 1784 12:23:56.442983  USB2 port 1: enabled 1

 1785 12:23:56.443075  USB2 port 2: enabled 1

 1786 12:23:56.446421  USB2 port 3: enabled 0

 1787 12:23:56.449557  USB2 port 4: enabled 1

 1788 12:23:56.453021  USB2 port 5: enabled 0

 1789 12:23:56.453107  USB2 port 6: enabled 0

 1790 12:23:56.456408  USB2 port 7: enabled 0

 1791 12:23:56.459824  USB2 port 8: enabled 0

 1792 12:23:56.459911  USB2 port 9: enabled 0

 1793 12:23:56.462878  USB3 port 0: enabled 0

 1794 12:23:56.466288  USB3 port 1: enabled 1

 1795 12:23:56.469328  USB3 port 2: enabled 0

 1796 12:23:56.469412  USB3 port 3: enabled 0

 1797 12:23:56.473023  GENERIC: 0.0: enabled 1

 1798 12:23:56.475994  GENERIC: 1.0: enabled 1

 1799 12:23:56.476105  APIC: 01: enabled 1

 1800 12:23:56.479473  APIC: 03: enabled 1

 1801 12:23:56.482529  APIC: 05: enabled 1

 1802 12:23:56.482632  APIC: 07: enabled 1

 1803 12:23:56.485966  APIC: 06: enabled 1

 1804 12:23:56.486071  APIC: 02: enabled 1

 1805 12:23:56.489392  APIC: 04: enabled 1

 1806 12:23:56.493009  PCI: 01:00.0: enabled 1

 1807 12:23:56.496007  BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms

 1808 12:23:56.502664  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1809 12:23:56.505787  ELOG: NV offset 0xf30000 size 0x1000

 1810 12:23:56.512922  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1811 12:23:56.519660  ELOG: Event(17) added with size 13 at 2023-11-08 12:23:56 UTC

 1812 12:23:56.526244  ELOG: Event(92) added with size 9 at 2023-11-08 12:23:56 UTC

 1813 12:23:56.532704  ELOG: Event(93) added with size 9 at 2023-11-08 12:23:56 UTC

 1814 12:23:56.539140  ELOG: Event(9E) added with size 10 at 2023-11-08 12:23:56 UTC

 1815 12:23:56.545688  ELOG: Event(9F) added with size 14 at 2023-11-08 12:23:56 UTC

 1816 12:23:56.552440  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1817 12:23:56.559032  ELOG: Event(A1) added with size 10 at 2023-11-08 12:23:56 UTC

 1818 12:23:56.565922  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1819 12:23:56.572481  ELOG: Event(A0) added with size 9 at 2023-11-08 12:23:56 UTC

 1820 12:23:56.575517  elog_add_boot_reason: Logged dev mode boot

 1821 12:23:56.582427  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1822 12:23:56.585340  Finalize devices...

 1823 12:23:56.585424  Devices finalized

 1824 12:23:56.591995  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1825 12:23:56.595257  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1826 12:23:56.601589  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1827 12:23:56.605226  ME: HFSTS1                      : 0x80030055

 1828 12:23:56.611760  ME: HFSTS2                      : 0x30280116

 1829 12:23:56.615346  ME: HFSTS3                      : 0x00000050

 1830 12:23:56.621484  ME: HFSTS4                      : 0x00004000

 1831 12:23:56.625070  ME: HFSTS5                      : 0x00000000

 1832 12:23:56.628181  ME: HFSTS6                      : 0x00400006

 1833 12:23:56.631527  ME: Manufacturing Mode          : YES

 1834 12:23:56.638038  ME: SPI Protection Mode Enabled : NO

 1835 12:23:56.641437  ME: FW Partition Table          : OK

 1836 12:23:56.645030  ME: Bringup Loader Failure      : NO

 1837 12:23:56.648161  ME: Firmware Init Complete      : NO

 1838 12:23:56.651366  ME: Boot Options Present        : NO

 1839 12:23:56.654674  ME: Update In Progress          : NO

 1840 12:23:56.658020  ME: D0i3 Support                : YES

 1841 12:23:56.661477  ME: Low Power State Enabled     : NO

 1842 12:23:56.667523  ME: CPU Replaced                : YES

 1843 12:23:56.670959  ME: CPU Replacement Valid       : YES

 1844 12:23:56.674614  ME: Current Working State       : 5

 1845 12:23:56.677714  ME: Current Operation State     : 1

 1846 12:23:56.681404  ME: Current Operation Mode      : 3

 1847 12:23:56.684223  ME: Error Code                  : 0

 1848 12:23:56.687934  ME: Enhanced Debug Mode         : NO

 1849 12:23:56.690978  ME: CPU Debug Disabled          : YES

 1850 12:23:56.697631  ME: TXT Support                 : NO

 1851 12:23:56.701023  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1852 12:23:56.710660  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1853 12:23:56.714139  CBFS: 'fallback/slic' not found.

 1854 12:23:56.717822  ACPI: Writing ACPI tables at 76b01000.

 1855 12:23:56.717908  ACPI:    * FACS

 1856 12:23:56.720793  ACPI:    * DSDT

 1857 12:23:56.723880  Ramoops buffer: 0x100000@0x76a00000.

 1858 12:23:56.727368  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1859 12:23:56.734034  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1860 12:23:56.737741  Google Chrome EC: version:

 1861 12:23:56.740898  	ro: voema_v2.0.7540-147f8d37d1

 1862 12:23:56.744117  	rw: voema_v2.0.7540-147f8d37d1

 1863 12:23:56.744245    running image: 2

 1864 12:23:56.750280  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1865 12:23:56.755389  ACPI:    * FADT

 1866 12:23:56.755479  SCI is IRQ9

 1867 12:23:56.762352  ACPI: added table 1/32, length now 40

 1868 12:23:56.762491  ACPI:     * SSDT

 1869 12:23:56.765649  Found 1 CPU(s) with 8 core(s) each.

 1870 12:23:56.772093  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1871 12:23:56.775522  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1872 12:23:56.779197  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1873 12:23:56.782233  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1874 12:23:56.788936  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1875 12:23:56.795475  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1876 12:23:56.798470  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1877 12:23:56.805699  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1878 12:23:56.812036  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1879 12:23:56.815650  \_SB.PCI0.RP09: Added StorageD3Enable property

 1880 12:23:56.821842  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1881 12:23:56.825452  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1882 12:23:56.832036  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1883 12:23:56.835081  PS2K: Passing 80 keymaps to kernel

 1884 12:23:56.842142  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1885 12:23:56.848550  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1886 12:23:56.855330  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1887 12:23:56.861658  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1888 12:23:56.868125  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1889 12:23:56.874813  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1890 12:23:56.881897  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1891 12:23:56.888206  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1892 12:23:56.891841  ACPI: added table 2/32, length now 44

 1893 12:23:56.894750  ACPI:    * MCFG

 1894 12:23:56.898285  ACPI: added table 3/32, length now 48

 1895 12:23:56.898394  ACPI:    * TPM2

 1896 12:23:56.901330  TPM2 log created at 0x769f0000

 1897 12:23:56.904872  ACPI: added table 4/32, length now 52

 1898 12:23:56.908467  ACPI:    * MADT

 1899 12:23:56.908550  SCI is IRQ9

 1900 12:23:56.911387  ACPI: added table 5/32, length now 56

 1901 12:23:56.915013  current = 76b09850

 1902 12:23:56.915129  ACPI:    * DMAR

 1903 12:23:56.921763  ACPI: added table 6/32, length now 60

 1904 12:23:56.924736  ACPI: added table 7/32, length now 64

 1905 12:23:56.924822  ACPI:    * HPET

 1906 12:23:56.928044  ACPI: added table 8/32, length now 68

 1907 12:23:56.931267  ACPI: done.

 1908 12:23:56.934982  ACPI tables: 35216 bytes.

 1909 12:23:56.935086  smbios_write_tables: 769ef000

 1910 12:23:56.937901  EC returned error result code 3

 1911 12:23:56.941680  Couldn't obtain OEM name from CBI

 1912 12:23:56.945299  Create SMBIOS type 16

 1913 12:23:56.948721  Create SMBIOS type 17

 1914 12:23:56.952139  GENERIC: 0.0 (WIFI Device)

 1915 12:23:56.952260  SMBIOS tables: 1750 bytes.

 1916 12:23:56.958609  Writing table forward entry at 0x00000500

 1917 12:23:56.965106  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1918 12:23:56.968526  Writing coreboot table at 0x76b25000

 1919 12:23:56.975322   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1920 12:23:56.978869   1. 0000000000001000-000000000009ffff: RAM

 1921 12:23:56.981656   2. 00000000000a0000-00000000000fffff: RESERVED

 1922 12:23:56.988746   3. 0000000000100000-00000000769eefff: RAM

 1923 12:23:56.991890   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1924 12:23:56.998534   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1925 12:23:57.005014   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1926 12:23:57.008709   7. 0000000077000000-000000007fbfffff: RESERVED

 1927 12:23:57.011759   8. 00000000c0000000-00000000cfffffff: RESERVED

 1928 12:23:57.018512   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1929 12:23:57.021614  10. 00000000fb000000-00000000fb000fff: RESERVED

 1930 12:23:57.028777  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1931 12:23:57.031976  12. 00000000fed80000-00000000fed87fff: RESERVED

 1932 12:23:57.038111  13. 00000000fed90000-00000000fed92fff: RESERVED

 1933 12:23:57.041657  14. 00000000feda0000-00000000feda1fff: RESERVED

 1934 12:23:57.048445  15. 00000000fedc0000-00000000feddffff: RESERVED

 1935 12:23:57.051480  16. 0000000100000000-00000002803fffff: RAM

 1936 12:23:57.055019  Passing 4 GPIOs to payload:

 1937 12:23:57.058028              NAME |       PORT | POLARITY |     VALUE

 1938 12:23:57.065031               lid |  undefined |     high |      high

 1939 12:23:57.068238             power |  undefined |     high |       low

 1940 12:23:57.074957             oprom |  undefined |     high |       low

 1941 12:23:57.081251          EC in RW | 0x000000e5 |     high |      high

 1942 12:23:57.088085  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f967

 1943 12:23:57.088201  coreboot table: 1576 bytes.

 1944 12:23:57.094806  IMD ROOT    0. 0x76fff000 0x00001000

 1945 12:23:57.098307  IMD SMALL   1. 0x76ffe000 0x00001000

 1946 12:23:57.101356  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1947 12:23:57.104916  VPD         3. 0x76c4d000 0x00000367

 1948 12:23:57.108096  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1949 12:23:57.111082  CONSOLE     5. 0x76c2c000 0x00020000

 1950 12:23:57.114704  FMAP        6. 0x76c2b000 0x00000578

 1951 12:23:57.117729  TIME STAMP  7. 0x76c2a000 0x00000910

 1952 12:23:57.124404  VBOOT WORK  8. 0x76c16000 0x00014000

 1953 12:23:57.128031  ROMSTG STCK 9. 0x76c15000 0x00001000

 1954 12:23:57.131321  AFTER CAR  10. 0x76c0a000 0x0000b000

 1955 12:23:57.134645  RAMSTAGE   11. 0x76b97000 0x00073000

 1956 12:23:57.137667  REFCODE    12. 0x76b42000 0x00055000

 1957 12:23:57.141089  SMM BACKUP 13. 0x76b32000 0x00010000

 1958 12:23:57.144337  4f444749   14. 0x76b30000 0x00002000

 1959 12:23:57.147628  EXT VBT15. 0x76b2d000 0x0000219f

 1960 12:23:57.150832  COREBOOT   16. 0x76b25000 0x00008000

 1961 12:23:57.157260  ACPI       17. 0x76b01000 0x00024000

 1962 12:23:57.160815  ACPI GNVS  18. 0x76b00000 0x00001000

 1963 12:23:57.163861  RAMOOPS    19. 0x76a00000 0x00100000

 1964 12:23:57.167474  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1965 12:23:57.170981  SMBIOS     21. 0x769ef000 0x00000800

 1966 12:23:57.174025  IMD small region:

 1967 12:23:57.177163    IMD ROOT    0. 0x76ffec00 0x00000400

 1968 12:23:57.180545    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1969 12:23:57.183804    POWER STATE 2. 0x76ffeb80 0x00000044

 1970 12:23:57.187022    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1971 12:23:57.193779    MEM INFO    4. 0x76ffe980 0x000001e0

 1972 12:23:57.197268  BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms

 1973 12:23:57.200260  MTRR: Physical address space:

 1974 12:23:57.207249  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1975 12:23:57.213957  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1976 12:23:57.220149  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1977 12:23:57.226792  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1978 12:23:57.233527  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1979 12:23:57.240027  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1980 12:23:57.247274  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1981 12:23:57.249959  MTRR: Fixed MSR 0x250 0x0606060606060606

 1982 12:23:57.253070  MTRR: Fixed MSR 0x258 0x0606060606060606

 1983 12:23:57.256543  MTRR: Fixed MSR 0x259 0x0000000000000000

 1984 12:23:57.262989  MTRR: Fixed MSR 0x268 0x0606060606060606

 1985 12:23:57.266600  MTRR: Fixed MSR 0x269 0x0606060606060606

 1986 12:23:57.269646  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1987 12:23:57.273081  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1988 12:23:57.276630  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1989 12:23:57.283262  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1990 12:23:57.286807  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1991 12:23:57.289641  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1992 12:23:57.293740  call enable_fixed_mtrr()

 1993 12:23:57.296435  CPU physical address size: 39 bits

 1994 12:23:57.303458  MTRR: default type WB/UC MTRR counts: 6/6.

 1995 12:23:57.306413  MTRR: UC selected as default type.

 1996 12:23:57.313456  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1997 12:23:57.316403  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1998 12:23:57.323211  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1999 12:23:57.329770  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 2000 12:23:57.336402  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2001 12:23:57.343017  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 2002 12:23:57.343159  

 2003 12:23:57.346252  MTRR check

 2004 12:23:57.349547  Fixed MTRRs   : Enabled

 2005 12:23:57.349657  Variable MTRRs: Enabled

 2006 12:23:57.349728  

 2007 12:23:57.356583  MTRR: Fixed MSR 0x250 0x0606060606060606

 2008 12:23:57.359797  MTRR: Fixed MSR 0x258 0x0606060606060606

 2009 12:23:57.362890  MTRR: Fixed MSR 0x259 0x0000000000000000

 2010 12:23:57.366169  MTRR: Fixed MSR 0x268 0x0606060606060606

 2011 12:23:57.369705  MTRR: Fixed MSR 0x269 0x0606060606060606

 2012 12:23:57.376130  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2013 12:23:57.379739  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2014 12:23:57.382761  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2015 12:23:57.386420  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2016 12:23:57.393093  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2017 12:23:57.396061  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2018 12:23:57.399477  MTRR: Fixed MSR 0x250 0x0606060606060606

 2019 12:23:57.402904  MTRR: Fixed MSR 0x250 0x0606060606060606

 2020 12:23:57.409674  MTRR: Fixed MSR 0x258 0x0606060606060606

 2021 12:23:57.412872  MTRR: Fixed MSR 0x259 0x0000000000000000

 2022 12:23:57.416370  MTRR: Fixed MSR 0x268 0x0606060606060606

 2023 12:23:57.419157  MTRR: Fixed MSR 0x269 0x0606060606060606

 2024 12:23:57.425824  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2025 12:23:57.429260  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2026 12:23:57.432376  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2027 12:23:57.435951  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2028 12:23:57.439513  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2029 12:23:57.446389  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2030 12:23:57.449127  MTRR: Fixed MSR 0x258 0x0606060606060606

 2031 12:23:57.452627  call enable_fixed_mtrr()

 2032 12:23:57.455957  MTRR: Fixed MSR 0x259 0x0000000000000000

 2033 12:23:57.462581  MTRR: Fixed MSR 0x268 0x0606060606060606

 2034 12:23:57.465461  MTRR: Fixed MSR 0x269 0x0606060606060606

 2035 12:23:57.468905  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2036 12:23:57.472113  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2037 12:23:57.475380  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2038 12:23:57.482019  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2039 12:23:57.485815  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2040 12:23:57.488742  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2041 12:23:57.496029  CPU physical address size: 39 bits

 2042 12:23:57.499212  call enable_fixed_mtrr()

 2043 12:23:57.502756  MTRR: Fixed MSR 0x250 0x0606060606060606

 2044 12:23:57.505744  MTRR: Fixed MSR 0x250 0x0606060606060606

 2045 12:23:57.509258  MTRR: Fixed MSR 0x258 0x0606060606060606

 2046 12:23:57.515533  MTRR: Fixed MSR 0x259 0x0000000000000000

 2047 12:23:57.518859  MTRR: Fixed MSR 0x268 0x0606060606060606

 2048 12:23:57.522037  MTRR: Fixed MSR 0x269 0x0606060606060606

 2049 12:23:57.525570  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2050 12:23:57.531892  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2051 12:23:57.535391  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2052 12:23:57.538467  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2053 12:23:57.541903  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2054 12:23:57.548581  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2055 12:23:57.551568  MTRR: Fixed MSR 0x258 0x0606060606060606

 2056 12:23:57.555073  call enable_fixed_mtrr()

 2057 12:23:57.558107  MTRR: Fixed MSR 0x259 0x0000000000000000

 2058 12:23:57.561574  MTRR: Fixed MSR 0x268 0x0606060606060606

 2059 12:23:57.568261  MTRR: Fixed MSR 0x269 0x0606060606060606

 2060 12:23:57.571666  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2061 12:23:57.574590  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2062 12:23:57.578176  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2063 12:23:57.584563  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2064 12:23:57.588041  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2065 12:23:57.591204  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2066 12:23:57.594728  CPU physical address size: 39 bits

 2067 12:23:57.601190  call enable_fixed_mtrr()

 2068 12:23:57.604125  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 2069 12:23:57.607534  call enable_fixed_mtrr()

 2070 12:23:57.611521  Checking cr50 for pending updates

 2071 12:23:57.615550  CPU physical address size: 39 bits

 2072 12:23:57.619034  CPU physical address size: 39 bits

 2073 12:23:57.623396  Reading cr50 TPM mode

 2074 12:23:57.623481  CPU physical address size: 39 bits

 2075 12:23:57.629805  MTRR: Fixed MSR 0x250 0x0606060606060606

 2076 12:23:57.633164  MTRR: Fixed MSR 0x250 0x0606060606060606

 2077 12:23:57.636607  MTRR: Fixed MSR 0x258 0x0606060606060606

 2078 12:23:57.640091  MTRR: Fixed MSR 0x259 0x0000000000000000

 2079 12:23:57.643129  MTRR: Fixed MSR 0x268 0x0606060606060606

 2080 12:23:57.650200  MTRR: Fixed MSR 0x269 0x0606060606060606

 2081 12:23:57.653268  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2082 12:23:57.656560  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2083 12:23:57.659705  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2084 12:23:57.666267  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2085 12:23:57.669832  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2086 12:23:57.672900  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2087 12:23:57.679996  MTRR: Fixed MSR 0x258 0x0606060606060606

 2088 12:23:57.680083  call enable_fixed_mtrr()

 2089 12:23:57.686572  MTRR: Fixed MSR 0x259 0x0000000000000000

 2090 12:23:57.689642  MTRR: Fixed MSR 0x268 0x0606060606060606

 2091 12:23:57.693107  MTRR: Fixed MSR 0x269 0x0606060606060606

 2092 12:23:57.696415  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2093 12:23:57.702966  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2094 12:23:57.706312  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2095 12:23:57.709344  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2096 12:23:57.712915  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2097 12:23:57.719655  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2098 12:23:57.723151  CPU physical address size: 39 bits

 2099 12:23:57.726134  call enable_fixed_mtrr()

 2100 12:23:57.732449  BS: BS_PAYLOAD_LOAD entry times (exec / console): 14 / 6 ms

 2101 12:23:57.736337  CPU physical address size: 39 bits

 2102 12:23:57.742736  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2103 12:23:57.746174  Checking segment from ROM address 0xffc02b38

 2104 12:23:57.752892  Checking segment from ROM address 0xffc02b54

 2105 12:23:57.755848  Loading segment from ROM address 0xffc02b38

 2106 12:23:57.759664    code (compression=0)

 2107 12:23:57.766028    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2108 12:23:57.775949  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2109 12:23:57.779439  it's not compressed!

 2110 12:23:57.917003  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2111 12:23:57.923709  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2112 12:23:57.930227  Loading segment from ROM address 0xffc02b54

 2113 12:23:57.933689    Entry Point 0x30000000

 2114 12:23:57.933809  Loaded segments

 2115 12:23:57.939999  BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms

 2116 12:23:57.983439  Finalizing chipset.

 2117 12:23:57.986432  Finalizing SMM.

 2118 12:23:57.986542  APMC done.

 2119 12:23:57.992890  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2120 12:23:57.996460  mp_park_aps done after 0 msecs.

 2121 12:23:57.999424  Jumping to boot code at 0x30000000(0x76b25000)

 2122 12:23:58.009824  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2123 12:23:58.009934  

 2124 12:23:58.010034  

 2125 12:23:58.012792  

 2126 12:23:58.012870  Starting depthcharge on Voema...

 2127 12:23:58.013249  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2128 12:23:58.013358  start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
 2129 12:23:58.013454  Setting prompt string to ['volteer:']
 2130 12:23:58.013580  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
 2131 12:23:58.016483  

 2132 12:23:58.022672  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2133 12:23:58.022791  

 2134 12:23:58.029696  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2135 12:23:58.029871  

 2136 12:23:58.036147  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2137 12:23:58.036282  

 2138 12:23:58.039459  Failed to find eMMC card reader

 2139 12:23:58.039550  

 2140 12:23:58.039617  Wipe memory regions:

 2141 12:23:58.042751  

 2142 12:23:58.046259  	[0x00000000001000, 0x000000000a0000)

 2143 12:23:58.046347  

 2144 12:23:58.049307  	[0x00000000100000, 0x00000030000000)

 2145 12:23:58.074685  

 2146 12:23:58.077640  	[0x00000032662db0, 0x000000769ef000)

 2147 12:23:58.112841  

 2148 12:23:58.115867  	[0x00000100000000, 0x00000280400000)

 2149 12:23:58.317741  

 2150 12:23:58.320874  ec_init: CrosEC protocol v3 supported (256, 256)

 2151 12:23:58.320998  

 2152 12:23:58.327364  update_port_state: port C0 state: usb enable 1 mux conn 0

 2153 12:23:58.327478  

 2154 12:23:58.337629  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2155 12:23:58.337764  

 2156 12:23:58.344097  pmc_check_ipc_sts: STS_BUSY done after 1562 us

 2157 12:23:58.344224  

 2158 12:23:58.347877  send_conn_disc_msg: pmc_send_cmd succeeded

 2159 12:23:59.023526  

 2160 12:23:59.023765  R8152: Initializing

 2161 12:23:59.023911  

 2162 12:23:59.024022  Version 6 (ocp_data = 5c30)

 2163 12:23:59.024138  

 2164 12:23:59.024242  R8152: Done initializing

 2165 12:23:59.024357  

 2166 12:23:59.024451  Adding net device

 2167 12:23:59.092951  

 2168 12:23:59.095946  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2169 12:23:59.096026  

 2170 12:23:59.096089  

 2171 12:23:59.096188  

 2172 12:23:59.099718  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2174 12:23:59.200135  volteer: tftpboot 192.168.201.1 11967714/tftp-deploy-df2rktnn/kernel/bzImage 11967714/tftp-deploy-df2rktnn/kernel/cmdline 11967714/tftp-deploy-df2rktnn/ramdisk/ramdisk.cpio.gz

 2175 12:23:59.200375  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2176 12:23:59.200494  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2177 12:23:59.204572  tftpboot 192.168.201.1 11967714/tftp-deploy-df2rktnn/kernel/bzIploy-df2rktnn/kernel/cmdline 11967714/tftp-deploy-df2rktnn/ramdisk/ramdisk.cpio.gz

 2178 12:23:59.204688  

 2179 12:23:59.204780  Waiting for link

 2180 12:23:59.408068  

 2181 12:23:59.408260  done.

 2182 12:23:59.408347  

 2183 12:23:59.408407  MAC: 00:24:32:30:79:06

 2184 12:23:59.408497  

 2185 12:23:59.411331  Sending DHCP discover... done.

 2186 12:23:59.411442  

 2187 12:23:59.414842  Waiting for reply... done.

 2188 12:23:59.414953  

 2189 12:23:59.417663  Sending DHCP request... done.

 2190 12:23:59.417785  

 2191 12:23:59.421049  Waiting for reply... done.

 2192 12:23:59.421162  

 2193 12:23:59.424425  My ip is 192.168.201.23

 2194 12:23:59.424510  

 2195 12:23:59.428062  The DHCP server ip is 192.168.201.1

 2196 12:23:59.428144  

 2197 12:23:59.431184  TFTP server IP predefined by user: 192.168.201.1

 2198 12:23:59.431259  

 2199 12:23:59.438214  Bootfile predefined by user: 11967714/tftp-deploy-df2rktnn/kernel/bzImage

 2200 12:23:59.438294  

 2201 12:23:59.444358  Sending tftp read request... done.

 2202 12:23:59.444449  

 2203 12:23:59.448904  Waiting for the transfer... 

 2204 12:23:59.448982  

 2205 12:23:59.986881  00000000 ################################################################

 2206 12:23:59.987041  

 2207 12:24:00.509504  00080000 ################################################################

 2208 12:24:00.509673  

 2209 12:24:01.030263  00100000 ################################################################

 2210 12:24:01.030397  

 2211 12:24:01.559113  00180000 ################################################################

 2212 12:24:01.559250  

 2213 12:24:02.091317  00200000 ################################################################

 2214 12:24:02.091486  

 2215 12:24:02.628418  00280000 ################################################################

 2216 12:24:02.628590  

 2217 12:24:03.158364  00300000 ################################################################

 2218 12:24:03.158530  

 2219 12:24:03.704747  00380000 ################################################################

 2220 12:24:03.704884  

 2221 12:24:04.241198  00400000 ################################################################

 2222 12:24:04.241360  

 2223 12:24:04.776467  00480000 ################################################################

 2224 12:24:04.776631  

 2225 12:24:05.297190  00500000 ################################################################

 2226 12:24:05.297325  

 2227 12:24:05.807435  00580000 ################################################################

 2228 12:24:05.807598  

 2229 12:24:06.320446  00600000 ################################################################

 2230 12:24:06.320586  

 2231 12:24:06.838612  00680000 ################################################################

 2232 12:24:06.838774  

 2233 12:24:07.360632  00700000 ################################################################

 2234 12:24:07.360772  

 2235 12:24:07.883400  00780000 ################################################################

 2236 12:24:07.883537  

 2237 12:24:08.417009  00800000 ################################################################

 2238 12:24:08.417146  

 2239 12:24:08.953209  00880000 ################################################################

 2240 12:24:08.953343  

 2241 12:24:09.485405  00900000 ################################################################

 2242 12:24:09.485567  

 2243 12:24:10.024224  00980000 ################################################################

 2244 12:24:10.024424  

 2245 12:24:10.566707  00a00000 ################################################################

 2246 12:24:10.566865  

 2247 12:24:11.120713  00a80000 ################################################################

 2248 12:24:11.120876  

 2249 12:24:11.158743  00b00000 ##### done.

 2250 12:24:11.158875  

 2251 12:24:11.162274  The bootfile was 11571200 bytes long.

 2252 12:24:11.162392  

 2253 12:24:11.165273  Sending tftp read request... done.

 2254 12:24:11.165383  

 2255 12:24:11.168845  Waiting for the transfer... 

 2256 12:24:11.168952  

 2257 12:24:11.702580  00000000 ################################################################

 2258 12:24:11.702745  

 2259 12:24:12.248008  00080000 ################################################################

 2260 12:24:12.248223  

 2261 12:24:12.846765  00100000 ################################################################

 2262 12:24:12.846931  

 2263 12:24:13.447567  00180000 ################################################################

 2264 12:24:13.448063  

 2265 12:24:14.126745  00200000 ################################################################

 2266 12:24:14.127398  

 2267 12:24:14.680618  00280000 ################################################################

 2268 12:24:14.680771  

 2269 12:24:15.222656  00300000 ################################################################

 2270 12:24:15.222815  

 2271 12:24:15.775231  00380000 ################################################################

 2272 12:24:15.775419  

 2273 12:24:16.325677  00400000 ################################################################

 2274 12:24:16.325820  

 2275 12:24:16.870667  00480000 ################################################################

 2276 12:24:16.870815  

 2277 12:24:17.403480  00500000 ################################################################

 2278 12:24:17.403615  

 2279 12:24:17.919101  00580000 ################################################################

 2280 12:24:17.919245  

 2281 12:24:18.022100  00600000 ############# done.

 2282 12:24:18.022249  

 2283 12:24:18.025565  Sending tftp read request... done.

 2284 12:24:18.025639  

 2285 12:24:18.028758  Waiting for the transfer... 

 2286 12:24:18.028841  

 2287 12:24:18.028906  00000000 # done.

 2288 12:24:18.028967  

 2289 12:24:18.038675  Command line loaded dynamically from TFTP file: 11967714/tftp-deploy-df2rktnn/kernel/cmdline

 2290 12:24:18.038754  

 2291 12:24:18.061751  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11967714/extract-nfsrootfs-qt2enz78,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2292 12:24:18.068607  

 2293 12:24:18.071872  Shutting down all USB controllers.

 2294 12:24:18.071948  

 2295 12:24:18.072014  Removing current net device

 2296 12:24:18.072075  

 2297 12:24:18.075077  Finalizing coreboot

 2298 12:24:18.075148  

 2299 12:24:18.081558  Exiting depthcharge with code 4 at timestamp: 28792294

 2300 12:24:18.081635  

 2301 12:24:18.081697  

 2302 12:24:18.081755  Starting kernel ...

 2303 12:24:18.081811  

 2304 12:24:18.081864  

 2305 12:24:18.082229  end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
 2306 12:24:18.082324  start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
 2307 12:24:18.082397  Setting prompt string to ['Linux version [0-9]']
 2308 12:24:18.082463  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2309 12:24:18.082527  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2311 12:28:42.083394  end: 2.2.5 auto-login-action (duration 00:04:24) [common]
 2313 12:28:42.084682  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
 2315 12:28:42.085564  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2318 12:28:42.086995  end: 2 depthcharge-action (duration 00:05:00) [common]
 2320 12:28:42.087796  Cleaning after the job
 2321 12:28:42.087882  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967714/tftp-deploy-df2rktnn/ramdisk
 2322 12:28:42.088871  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967714/tftp-deploy-df2rktnn/kernel
 2323 12:28:42.090491  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967714/tftp-deploy-df2rktnn/nfsrootfs
 2324 12:28:42.207730  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967714/tftp-deploy-df2rktnn/modules
 2325 12:28:42.208485  start: 4.1 power-off (timeout 00:00:30) [common]
 2326 12:28:42.208654  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
 2327 12:28:42.287714  >> Command sent successfully.

 2328 12:28:42.293783  Returned 0 in 0 seconds
 2329 12:28:42.394878  end: 4.1 power-off (duration 00:00:00) [common]
 2331 12:28:42.396555  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2332 12:28:42.398028  Listened to connection for namespace 'common' for up to 1s
 2333 12:28:43.398494  Finalising connection for namespace 'common'
 2334 12:28:43.399315  Disconnecting from shell: Finalise
 2335 12:28:43.399736  

 2336 12:28:43.500623  end: 4.2 read-feedback (duration 00:00:01) [common]
 2337 12:28:43.501286  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11967714
 2338 12:28:44.054278  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11967714
 2339 12:28:44.054450  JobError: Your job cannot terminate cleanly.