Boot log: asus-C436FA-Flip-hatch

    1 12:23:30.829659  lava-dispatcher, installed at version: 2023.10
    2 12:23:30.829884  start: 0 validate
    3 12:23:30.830037  Start time: 2023-11-08 12:23:30.830024+00:00 (UTC)
    4 12:23:30.830177  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:23:30.830323  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:23:31.097516  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:23:31.097710  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:23:31.355777  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:23:31.355970  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:23:35.870503  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:23:35.871230  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.297-cip104-63-ge7301d2e196ae%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:23:36.874613  validate duration: 6.04
   14 12:23:36.874906  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:23:36.875016  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:23:36.875115  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:23:36.875256  Not decompressing ramdisk as can be used compressed.
   18 12:23:36.875351  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
   19 12:23:36.875424  saving as /var/lib/lava/dispatcher/tmp/11967644/tftp-deploy-9fg29701/ramdisk/initrd.cpio.gz
   20 12:23:36.875499  total size: 5671549 (5 MB)
   21 12:23:36.876692  progress   0 % (0 MB)
   22 12:23:36.878493  progress   5 % (0 MB)
   23 12:23:36.880298  progress  10 % (0 MB)
   24 12:23:36.881911  progress  15 % (0 MB)
   25 12:23:36.883693  progress  20 % (1 MB)
   26 12:23:36.885507  progress  25 % (1 MB)
   27 12:23:36.887114  progress  30 % (1 MB)
   28 12:23:36.888880  progress  35 % (1 MB)
   29 12:23:36.890628  progress  40 % (2 MB)
   30 12:23:36.892192  progress  45 % (2 MB)
   31 12:23:36.894000  progress  50 % (2 MB)
   32 12:23:36.895754  progress  55 % (3 MB)
   33 12:23:36.897325  progress  60 % (3 MB)
   34 12:23:36.899089  progress  65 % (3 MB)
   35 12:23:36.900871  progress  70 % (3 MB)
   36 12:23:36.902433  progress  75 % (4 MB)
   37 12:23:36.904172  progress  80 % (4 MB)
   38 12:23:36.905912  progress  85 % (4 MB)
   39 12:23:36.907534  progress  90 % (4 MB)
   40 12:23:36.910392  progress  95 % (5 MB)
   41 12:23:36.912363  progress 100 % (5 MB)
   42 12:23:36.912512  5 MB downloaded in 0.04 s (146.14 MB/s)
   43 12:23:36.912681  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 12:23:36.912951  end: 1.1 download-retry (duration 00:00:00) [common]
   46 12:23:36.913048  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 12:23:36.913142  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 12:23:36.913286  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   49 12:23:36.913366  saving as /var/lib/lava/dispatcher/tmp/11967644/tftp-deploy-9fg29701/kernel/bzImage
   50 12:23:36.913440  total size: 11571200 (11 MB)
   51 12:23:36.913510  No compression specified
   52 12:23:36.915582  progress   0 % (0 MB)
   53 12:23:36.919365  progress   5 % (0 MB)
   54 12:23:36.922970  progress  10 % (1 MB)
   55 12:23:36.926426  progress  15 % (1 MB)
   56 12:23:36.930124  progress  20 % (2 MB)
   57 12:23:36.933682  progress  25 % (2 MB)
   58 12:23:36.937169  progress  30 % (3 MB)
   59 12:23:36.940810  progress  35 % (3 MB)
   60 12:23:36.944973  progress  40 % (4 MB)
   61 12:23:36.949341  progress  45 % (4 MB)
   62 12:23:36.955034  progress  50 % (5 MB)
   63 12:23:36.959390  progress  55 % (6 MB)
   64 12:23:36.962745  progress  60 % (6 MB)
   65 12:23:36.966349  progress  65 % (7 MB)
   66 12:23:36.969915  progress  70 % (7 MB)
   67 12:23:36.973206  progress  75 % (8 MB)
   68 12:23:36.976719  progress  80 % (8 MB)
   69 12:23:36.980265  progress  85 % (9 MB)
   70 12:23:36.983576  progress  90 % (9 MB)
   71 12:23:36.987033  progress  95 % (10 MB)
   72 12:23:36.990527  progress 100 % (11 MB)
   73 12:23:36.990685  11 MB downloaded in 0.08 s (142.87 MB/s)
   74 12:23:36.990858  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:23:36.991128  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:23:36.991226  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 12:23:36.991326  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 12:23:36.991466  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
   80 12:23:36.991545  saving as /var/lib/lava/dispatcher/tmp/11967644/tftp-deploy-9fg29701/nfsrootfs/full.rootfs.tar
   81 12:23:36.991615  total size: 126031368 (120 MB)
   82 12:23:36.991686  Using unxz to decompress xz
   83 12:23:36.996304  progress   0 % (0 MB)
   84 12:23:37.560120  progress   5 % (6 MB)
   85 12:23:38.116704  progress  10 % (12 MB)
   86 12:23:38.678415  progress  15 % (18 MB)
   87 12:23:39.260424  progress  20 % (24 MB)
   88 12:23:39.643681  progress  25 % (30 MB)
   89 12:23:40.026030  progress  30 % (36 MB)
   90 12:23:40.323209  progress  35 % (42 MB)
   91 12:23:40.530627  progress  40 % (48 MB)
   92 12:23:40.939789  progress  45 % (54 MB)
   93 12:23:41.364713  progress  50 % (60 MB)
   94 12:23:41.747627  progress  55 % (66 MB)
   95 12:23:42.145434  progress  60 % (72 MB)
   96 12:23:42.520945  progress  65 % (78 MB)
   97 12:23:42.967658  progress  70 % (84 MB)
   98 12:23:43.445023  progress  75 % (90 MB)
   99 12:23:43.917896  progress  80 % (96 MB)
  100 12:23:44.028661  progress  85 % (102 MB)
  101 12:23:44.205439  progress  90 % (108 MB)
  102 12:23:44.585076  progress  95 % (114 MB)
  103 12:23:45.003513  progress 100 % (120 MB)
  104 12:23:45.009021  120 MB downloaded in 8.02 s (14.99 MB/s)
  105 12:23:45.009374  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 12:23:45.009819  end: 1.3 download-retry (duration 00:00:08) [common]
  108 12:23:45.009968  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 12:23:45.010109  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 12:23:45.010340  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.297-cip104-63-ge7301d2e196ae/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
  111 12:23:45.010463  saving as /var/lib/lava/dispatcher/tmp/11967644/tftp-deploy-9fg29701/modules/modules.tar
  112 12:23:45.010571  total size: 483720 (0 MB)
  113 12:23:45.010681  Using unxz to decompress xz
  114 12:23:45.015722  progress   6 % (0 MB)
  115 12:23:45.016183  progress  13 % (0 MB)
  116 12:23:45.016468  progress  20 % (0 MB)
  117 12:23:45.018203  progress  27 % (0 MB)
  118 12:23:45.020436  progress  33 % (0 MB)
  119 12:23:45.022600  progress  40 % (0 MB)
  120 12:23:45.024785  progress  47 % (0 MB)
  121 12:23:45.026914  progress  54 % (0 MB)
  122 12:23:45.029177  progress  60 % (0 MB)
  123 12:23:45.031526  progress  67 % (0 MB)
  124 12:23:45.033844  progress  74 % (0 MB)
  125 12:23:45.036205  progress  81 % (0 MB)
  126 12:23:45.038335  progress  88 % (0 MB)
  127 12:23:45.040521  progress  94 % (0 MB)
  128 12:23:45.043288  progress 100 % (0 MB)
  129 12:23:45.050508  0 MB downloaded in 0.04 s (11.55 MB/s)
  130 12:23:45.050778  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 12:23:45.051069  end: 1.4 download-retry (duration 00:00:00) [common]
  133 12:23:45.051173  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  134 12:23:45.051277  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  135 12:23:48.383879  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11967644/extract-nfsrootfs-m14r2q5l
  136 12:23:48.384078  end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
  137 12:23:48.384191  start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
  138 12:23:48.384538  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5
  139 12:23:48.384692  makedir: /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin
  140 12:23:48.384809  makedir: /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/tests
  141 12:23:48.384922  makedir: /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/results
  142 12:23:48.385038  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-add-keys
  143 12:23:48.385203  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-add-sources
  144 12:23:48.385350  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-background-process-start
  145 12:23:48.385497  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-background-process-stop
  146 12:23:48.385665  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-common-functions
  147 12:23:48.385814  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-echo-ipv4
  148 12:23:48.385961  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-install-packages
  149 12:23:48.386104  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-installed-packages
  150 12:23:48.386246  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-os-build
  151 12:23:48.386391  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-probe-channel
  152 12:23:48.386534  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-probe-ip
  153 12:23:48.386676  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-target-ip
  154 12:23:48.386817  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-target-mac
  155 12:23:48.387002  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-target-storage
  156 12:23:48.387151  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-test-case
  157 12:23:48.387297  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-test-event
  158 12:23:48.387438  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-test-feedback
  159 12:23:48.387581  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-test-raise
  160 12:23:48.387722  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-test-reference
  161 12:23:48.387868  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-test-runner
  162 12:23:48.388012  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-test-set
  163 12:23:48.388154  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-test-shell
  164 12:23:48.388298  Updating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-install-packages (oe)
  165 12:23:48.388478  Updating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/bin/lava-installed-packages (oe)
  166 12:23:48.388617  Creating /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/environment
  167 12:23:48.388725  LAVA metadata
  168 12:23:48.388804  - LAVA_JOB_ID=11967644
  169 12:23:48.388898  - LAVA_DISPATCHER_IP=192.168.201.1
  170 12:23:48.389016  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
  171 12:23:48.389092  skipped lava-vland-overlay
  172 12:23:48.389175  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  173 12:23:48.389266  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
  174 12:23:48.389335  skipped lava-multinode-overlay
  175 12:23:48.389426  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  176 12:23:48.389519  start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
  177 12:23:48.389602  Loading test definitions
  178 12:23:48.389707  start: 1.5.2.3.1 git-repo-action (timeout 00:09:48) [common]
  179 12:23:48.389787  Using /lava-11967644 at stage 0
  180 12:23:48.389898  Fetching tests from https://github.com/kernelci/test-definitions
  181 12:23:48.389986  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/0/tests/0_ltp-mm'
  182 12:23:51.982600  Running '/usr/bin/git checkout kernelci.org
  183 12:23:52.146134  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
  184 12:23:52.147066  uuid=11967644_1.5.2.3.1 testdef=None
  185 12:23:52.147252  end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
  187 12:23:52.147536  start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
  188 12:23:52.148461  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  190 12:23:52.148728  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
  191 12:23:52.149967  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  193 12:23:52.150237  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
  194 12:23:52.151747  runner path: /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/0/tests/0_ltp-mm test_uuid 11967644_1.5.2.3.1
  195 12:23:52.151882  SKIPFILE='skipfile-lkft.yaml'
  196 12:23:52.151990  SKIP_INSTALL='true'
  197 12:23:52.152091  TST_CMDFILES='mm'
  198 12:23:52.152298  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  200 12:23:52.152567  Creating lava-test-runner.conf files
  201 12:23:52.152641  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11967644/lava-overlay-2ontyek5/lava-11967644/0 for stage 0
  202 12:23:52.152754  - 0_ltp-mm
  203 12:23:52.152885  end: 1.5.2.3 test-definition (duration 00:00:04) [common]
  204 12:23:52.152988  start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
  205 12:24:00.527252  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  206 12:24:00.527412  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
  207 12:24:00.527516  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  208 12:24:00.527636  end: 1.5.2 lava-overlay (duration 00:00:12) [common]
  209 12:24:00.527741  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
  210 12:24:00.688025  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  211 12:24:00.688469  start: 1.5.4 extract-modules (timeout 00:09:36) [common]
  212 12:24:00.688605  extracting modules file /var/lib/lava/dispatcher/tmp/11967644/tftp-deploy-9fg29701/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967644/extract-nfsrootfs-m14r2q5l
  213 12:24:00.712070  extracting modules file /var/lib/lava/dispatcher/tmp/11967644/tftp-deploy-9fg29701/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11967644/extract-overlay-ramdisk-2bzown57/ramdisk
  214 12:24:00.735731  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  215 12:24:00.735900  start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
  216 12:24:00.736002  [common] Applying overlay to NFS
  217 12:24:00.736084  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11967644/compress-overlay-_k710vtu/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11967644/extract-nfsrootfs-m14r2q5l
  218 12:24:01.787203  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  219 12:24:01.787387  start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
  220 12:24:01.787494  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  221 12:24:01.787593  start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
  222 12:24:01.787692  Building ramdisk /var/lib/lava/dispatcher/tmp/11967644/extract-overlay-ramdisk-2bzown57/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11967644/extract-overlay-ramdisk-2bzown57/ramdisk
  223 12:24:01.879932  >> 31372 blocks

  224 12:24:02.582137  rename /var/lib/lava/dispatcher/tmp/11967644/extract-overlay-ramdisk-2bzown57/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11967644/tftp-deploy-9fg29701/ramdisk/ramdisk.cpio.gz
  225 12:24:02.582694  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  226 12:24:02.582843  start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
  227 12:24:02.582990  start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
  228 12:24:02.583111  No mkimage arch provided, not using FIT.
  229 12:24:02.583215  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  230 12:24:02.583316  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  231 12:24:02.583433  end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
  232 12:24:02.583538  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
  233 12:24:02.583625  No LXC device requested
  234 12:24:02.583721  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  235 12:24:02.583829  start: 1.7 deploy-device-env (timeout 00:09:34) [common]
  236 12:24:02.583925  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  237 12:24:02.584013  Checking files for TFTP limit of 4294967296 bytes.
  238 12:24:02.584502  end: 1 tftp-deploy (duration 00:00:26) [common]
  239 12:24:02.584622  start: 2 depthcharge-action (timeout 00:05:00) [common]
  240 12:24:02.584725  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  241 12:24:02.584879  substitutions:
  242 12:24:02.584963  - {DTB}: None
  243 12:24:02.585036  - {INITRD}: 11967644/tftp-deploy-9fg29701/ramdisk/ramdisk.cpio.gz
  244 12:24:02.585104  - {KERNEL}: 11967644/tftp-deploy-9fg29701/kernel/bzImage
  245 12:24:02.585170  - {LAVA_MAC}: None
  246 12:24:02.585238  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11967644/extract-nfsrootfs-m14r2q5l
  247 12:24:02.585316  - {NFS_SERVER_IP}: 192.168.201.1
  248 12:24:02.585382  - {PRESEED_CONFIG}: None
  249 12:24:02.585445  - {PRESEED_LOCAL}: None
  250 12:24:02.585512  - {RAMDISK}: 11967644/tftp-deploy-9fg29701/ramdisk/ramdisk.cpio.gz
  251 12:24:02.585578  - {ROOT_PART}: None
  252 12:24:02.585641  - {ROOT}: None
  253 12:24:02.585706  - {SERVER_IP}: 192.168.201.1
  254 12:24:02.585766  - {TEE}: None
  255 12:24:02.585834  Parsed boot commands:
  256 12:24:02.585895  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  257 12:24:02.586110  Parsed boot commands: tftpboot 192.168.201.1 11967644/tftp-deploy-9fg29701/kernel/bzImage 11967644/tftp-deploy-9fg29701/kernel/cmdline 11967644/tftp-deploy-9fg29701/ramdisk/ramdisk.cpio.gz
  258 12:24:02.586214  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  259 12:24:02.586327  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  260 12:24:02.586429  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  261 12:24:02.586526  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  262 12:24:02.586607  Not connected, no need to disconnect.
  263 12:24:02.586691  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  264 12:24:02.586786  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  265 12:24:02.586871  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
  266 12:24:02.591431  Setting prompt string to ['lava-test: # ']
  267 12:24:02.591905  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  268 12:24:02.592030  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  269 12:24:02.592163  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  270 12:24:02.592263  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  271 12:24:02.592504  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
  272 12:24:07.727238  >> Command sent successfully.

  273 12:24:07.729871  Returned 0 in 5 seconds
  274 12:24:07.830265  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  276 12:24:07.830634  end: 2.2.2 reset-device (duration 00:00:05) [common]
  277 12:24:07.830756  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  278 12:24:07.830863  Setting prompt string to 'Starting depthcharge on Helios...'
  279 12:24:07.830942  Changing prompt to 'Starting depthcharge on Helios...'
  280 12:24:07.831017  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  281 12:24:07.831329  [Enter `^Ec?' for help]

  282 12:24:08.452873  

  283 12:24:08.453041  

  284 12:24:08.463682  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  285 12:24:08.466863  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  286 12:24:08.473138  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  287 12:24:08.476875  CPU: AES supported, TXT NOT supported, VT supported

  288 12:24:08.483364  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  289 12:24:08.486939  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  290 12:24:08.493260  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  291 12:24:08.496970  VBOOT: Loading verstage.

  292 12:24:08.499856  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  293 12:24:08.507173  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  294 12:24:08.510161  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  295 12:24:08.513595  CBFS @ c08000 size 3f8000

  296 12:24:08.520522  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  297 12:24:08.523879  CBFS: Locating 'fallback/verstage'

  298 12:24:08.526771  CBFS: Found @ offset 10fb80 size 1072c

  299 12:24:08.526865  

  300 12:24:08.526938  

  301 12:24:08.540017  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  302 12:24:08.553727  Probing TPM: . done!

  303 12:24:08.557566  TPM ready after 0 ms

  304 12:24:08.560394  Connected to device vid:did:rid of 1ae0:0028:00

  305 12:24:08.570905  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  306 12:24:08.574603  Initialized TPM device CR50 revision 0

  307 12:24:08.620888  tlcl_send_startup: Startup return code is 0

  308 12:24:08.621000  TPM: setup succeeded

  309 12:24:08.633774  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  310 12:24:08.637309  Chrome EC: UHEPI supported

  311 12:24:08.640664  Phase 1

  312 12:24:08.644523  FMAP: area GBB found @ c05000 (12288 bytes)

  313 12:24:08.651067  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  314 12:24:08.651157  Phase 2

  315 12:24:08.654188  Phase 3

  316 12:24:08.657597  FMAP: area GBB found @ c05000 (12288 bytes)

  317 12:24:08.663896  VB2:vb2_report_dev_firmware() This is developer signed firmware

  318 12:24:08.670932  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  319 12:24:08.674581  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  320 12:24:08.681380  VB2:vb2_verify_keyblock() Checking keyblock signature...

  321 12:24:08.696005  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  322 12:24:08.699758  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  323 12:24:08.706416  VB2:vb2_verify_fw_preamble() Verifying preamble.

  324 12:24:08.710489  Phase 4

  325 12:24:08.713449  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  326 12:24:08.719991  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  327 12:24:08.900076  VB2:vb2_rsa_verify_digest() Digest check failed!

  328 12:24:08.906406  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  329 12:24:08.906511  Saving nvdata

  330 12:24:08.909860  Reboot requested (10020007)

  331 12:24:08.912884  board_reset() called!

  332 12:24:08.912965  full_reset() called!

  333 12:24:13.419446  

  334 12:24:13.419604  

  335 12:24:13.429620  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  336 12:24:13.433047  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  337 12:24:13.439543  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  338 12:24:13.442991  CPU: AES supported, TXT NOT supported, VT supported

  339 12:24:13.449187  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  340 12:24:13.452729  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  341 12:24:13.459595  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  342 12:24:13.463075  VBOOT: Loading verstage.

  343 12:24:13.466225  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  344 12:24:13.472855  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  345 12:24:13.476210  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  346 12:24:13.479333  CBFS @ c08000 size 3f8000

  347 12:24:13.485965  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  348 12:24:13.489090  CBFS: Locating 'fallback/verstage'

  349 12:24:13.492848  CBFS: Found @ offset 10fb80 size 1072c

  350 12:24:13.496367  

  351 12:24:13.496460  

  352 12:24:13.506084  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  353 12:24:13.520433  Probing TPM: . done!

  354 12:24:13.523983  TPM ready after 0 ms

  355 12:24:13.527444  Connected to device vid:did:rid of 1ae0:0028:00

  356 12:24:13.537636  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  357 12:24:13.541486  Initialized TPM device CR50 revision 0

  358 12:24:13.587937  tlcl_send_startup: Startup return code is 0

  359 12:24:13.588079  TPM: setup succeeded

  360 12:24:13.600899  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  361 12:24:13.604582  Chrome EC: UHEPI supported

  362 12:24:13.607996  Phase 1

  363 12:24:13.610980  FMAP: area GBB found @ c05000 (12288 bytes)

  364 12:24:13.617466  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  365 12:24:13.624395  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  366 12:24:13.627415  Recovery requested (1009000e)

  367 12:24:13.633028  Saving nvdata

  368 12:24:13.639198  tlcl_extend: response is 0

  369 12:24:13.648144  tlcl_extend: response is 0

  370 12:24:13.655549  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  371 12:24:13.658465  CBFS @ c08000 size 3f8000

  372 12:24:13.665239  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  373 12:24:13.668557  CBFS: Locating 'fallback/romstage'

  374 12:24:13.671727  CBFS: Found @ offset 80 size 145fc

  375 12:24:13.675430  Accumulated console time in verstage 98 ms

  376 12:24:13.675554  

  377 12:24:13.675664  

  378 12:24:13.688544  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  379 12:24:13.695355  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  380 12:24:13.698681  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  381 12:24:13.701752  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  382 12:24:13.708459  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  383 12:24:13.711636  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  384 12:24:13.715130  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  385 12:24:13.718289  TCO_STS:   0000 0000

  386 12:24:13.721368  GEN_PMCON: e0015238 00000200

  387 12:24:13.724876  GBLRST_CAUSE: 00000000 00000000

  388 12:24:13.724970  prev_sleep_state 5

  389 12:24:13.728271  Boot Count incremented to 65331

  390 12:24:13.735123  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  391 12:24:13.738450  CBFS @ c08000 size 3f8000

  392 12:24:13.744910  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  393 12:24:13.745026  CBFS: Locating 'fspm.bin'

  394 12:24:13.751486  CBFS: Found @ offset 5ffc0 size 71000

  395 12:24:13.754500  Chrome EC: UHEPI supported

  396 12:24:13.761349  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  397 12:24:13.764942  Probing TPM:  done!

  398 12:24:13.772366  Connected to device vid:did:rid of 1ae0:0028:00

  399 12:24:13.782129  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  400 12:24:13.787382  Initialized TPM device CR50 revision 0

  401 12:24:13.797018  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  402 12:24:13.803370  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  403 12:24:13.806526  MRC cache found, size 1948

  404 12:24:13.810124  bootmode is set to: 2

  405 12:24:13.813138  PRMRR disabled by config.

  406 12:24:13.813240  SPD INDEX = 1

  407 12:24:13.819910  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  408 12:24:13.823378  CBFS @ c08000 size 3f8000

  409 12:24:13.826518  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  410 12:24:13.830086  CBFS: Locating 'spd.bin'

  411 12:24:13.833032  CBFS: Found @ offset 5fb80 size 400

  412 12:24:13.836454  SPD: module type is LPDDR3

  413 12:24:13.839656  SPD: module part is 

  414 12:24:13.846746  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  415 12:24:13.849833  SPD: device width 4 bits, bus width 8 bits

  416 12:24:13.853309  SPD: module size is 4096 MB (per channel)

  417 12:24:13.856373  memory slot: 0 configuration done.

  418 12:24:13.859549  memory slot: 2 configuration done.

  419 12:24:13.911425  CBMEM:

  420 12:24:13.914622  IMD: root @ 99fff000 254 entries.

  421 12:24:13.917683  IMD: root @ 99ffec00 62 entries.

  422 12:24:13.921165  External stage cache:

  423 12:24:13.924850  IMD: root @ 9abff000 254 entries.

  424 12:24:13.928084  IMD: root @ 9abfec00 62 entries.

  425 12:24:13.931474  Chrome EC: clear events_b mask to 0x0000000020004000

  426 12:24:13.946979  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  427 12:24:13.960468  tlcl_write: response is 0

  428 12:24:13.969083  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  429 12:24:13.975762  MRC: TPM MRC hash updated successfully.

  430 12:24:13.975862  2 DIMMs found

  431 12:24:13.979282  SMM Memory Map

  432 12:24:13.982435  SMRAM       : 0x9a000000 0x1000000

  433 12:24:13.985867   Subregion 0: 0x9a000000 0xa00000

  434 12:24:13.989027   Subregion 1: 0x9aa00000 0x200000

  435 12:24:13.992631   Subregion 2: 0x9ac00000 0x400000

  436 12:24:13.995975  top_of_ram = 0x9a000000

  437 12:24:13.999279  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  438 12:24:14.005741  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  439 12:24:14.009202  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  440 12:24:14.015728  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  441 12:24:14.019248  CBFS @ c08000 size 3f8000

  442 12:24:14.022341  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  443 12:24:14.026027  CBFS: Locating 'fallback/postcar'

  444 12:24:14.032413  CBFS: Found @ offset 107000 size 4b44

  445 12:24:14.035821  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  446 12:24:14.048018  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  447 12:24:14.051537  Processing 180 relocs. Offset value of 0x97c0c000

  448 12:24:14.059805  Accumulated console time in romstage 285 ms

  449 12:24:14.059953  

  450 12:24:14.060061  

  451 12:24:14.069653  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  452 12:24:14.076251  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  453 12:24:14.079648  CBFS @ c08000 size 3f8000

  454 12:24:14.083418  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  455 12:24:14.086296  CBFS: Locating 'fallback/ramstage'

  456 12:24:14.092774  CBFS: Found @ offset 43380 size 1b9e8

  457 12:24:14.099755  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  458 12:24:14.131617  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  459 12:24:14.134481  Processing 3976 relocs. Offset value of 0x98db0000

  460 12:24:14.141118  Accumulated console time in postcar 52 ms

  461 12:24:14.141249  

  462 12:24:14.141372  

  463 12:24:14.151170  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  464 12:24:14.157832  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  465 12:24:14.161322  WARNING: RO_VPD is uninitialized or empty.

  466 12:24:14.165076  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  467 12:24:14.171499  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  468 12:24:14.171598  Normal boot.

  469 12:24:14.178262  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  470 12:24:14.181216  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  471 12:24:14.184444  CBFS @ c08000 size 3f8000

  472 12:24:14.191281  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  473 12:24:14.194724  CBFS: Locating 'cpu_microcode_blob.bin'

  474 12:24:14.198136  CBFS: Found @ offset 14700 size 2ec00

  475 12:24:14.201293  microcode: sig=0x806ec pf=0x4 revision=0xc9

  476 12:24:14.204523  Skip microcode update

  477 12:24:14.208007  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  478 12:24:14.210849  CBFS @ c08000 size 3f8000

  479 12:24:14.218090  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  480 12:24:14.221038  CBFS: Locating 'fsps.bin'

  481 12:24:14.224503  CBFS: Found @ offset d1fc0 size 35000

  482 12:24:14.249351  Detected 4 core, 8 thread CPU.

  483 12:24:14.252734  Setting up SMI for CPU

  484 12:24:14.255698  IED base = 0x9ac00000

  485 12:24:14.255789  IED size = 0x00400000

  486 12:24:14.259621  Will perform SMM setup.

  487 12:24:14.265907  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  488 12:24:14.272471  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  489 12:24:14.276029  Processing 16 relocs. Offset value of 0x00030000

  490 12:24:14.279523  Attempting to start 7 APs

  491 12:24:14.283339  Waiting for 10ms after sending INIT.

  492 12:24:14.298987  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  493 12:24:14.299119  done.

  494 12:24:14.302543  AP: slot 6 apic_id 5.

  495 12:24:14.305737  AP: slot 7 apic_id 4.

  496 12:24:14.305862  AP: slot 4 apic_id 7.

  497 12:24:14.308830  AP: slot 2 apic_id 6.

  498 12:24:14.312447  AP: slot 5 apic_id 2.

  499 12:24:14.312579  AP: slot 3 apic_id 3.

  500 12:24:14.319328  Waiting for 2nd SIPI to complete...done.

  501 12:24:14.326001  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  502 12:24:14.329051  Processing 13 relocs. Offset value of 0x00038000

  503 12:24:14.335723  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  504 12:24:14.339139  Installing SMM handler to 0x9a000000

  505 12:24:14.349344  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  506 12:24:14.352112  Processing 658 relocs. Offset value of 0x9a010000

  507 12:24:14.362913  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  508 12:24:14.365754  Processing 13 relocs. Offset value of 0x9a008000

  509 12:24:14.372425  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  510 12:24:14.378811  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  511 12:24:14.382160  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  512 12:24:14.389009  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  513 12:24:14.395765  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  514 12:24:14.402325  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  515 12:24:14.405466  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  516 12:24:14.412142  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  517 12:24:14.415494  Clearing SMI status registers

  518 12:24:14.418978  SMI_STS: PM1 

  519 12:24:14.419097  PM1_STS: PWRBTN 

  520 12:24:14.422254  TCO_STS: SECOND_TO 

  521 12:24:14.425217  New SMBASE 0x9a000000

  522 12:24:14.425341  In relocation handler: CPU 0

  523 12:24:14.431997  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  524 12:24:14.435469  Writing SMRR. base = 0x9a000006, mask=0xff000800

  525 12:24:14.438575  Relocation complete.

  526 12:24:14.438664  New SMBASE 0x99fffc00

  527 12:24:14.442050  In relocation handler: CPU 1

  528 12:24:14.448714  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  529 12:24:14.451841  Writing SMRR. base = 0x9a000006, mask=0xff000800

  530 12:24:14.455092  Relocation complete.

  531 12:24:14.455179  New SMBASE 0x99fff800

  532 12:24:14.458693  In relocation handler: CPU 2

  533 12:24:14.465373  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  534 12:24:14.468637  Writing SMRR. base = 0x9a000006, mask=0xff000800

  535 12:24:14.472303  Relocation complete.

  536 12:24:14.472408  New SMBASE 0x99fff000

  537 12:24:14.475246  In relocation handler: CPU 4

  538 12:24:14.478896  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  539 12:24:14.485478  Writing SMRR. base = 0x9a000006, mask=0xff000800

  540 12:24:14.485574  Relocation complete.

  541 12:24:14.489002  New SMBASE 0x99ffe400

  542 12:24:14.492033  In relocation handler: CPU 7

  543 12:24:14.495511  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  544 12:24:14.502715  Writing SMRR. base = 0x9a000006, mask=0xff000800

  545 12:24:14.502845  Relocation complete.

  546 12:24:14.505557  New SMBASE 0x99ffe800

  547 12:24:14.509418  In relocation handler: CPU 6

  548 12:24:14.512076  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  549 12:24:14.519177  Writing SMRR. base = 0x9a000006, mask=0xff000800

  550 12:24:14.519297  Relocation complete.

  551 12:24:14.522137  New SMBASE 0x99fff400

  552 12:24:14.525747  In relocation handler: CPU 3

  553 12:24:14.528807  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  554 12:24:14.535936  Writing SMRR. base = 0x9a000006, mask=0xff000800

  555 12:24:14.536056  Relocation complete.

  556 12:24:14.538797  New SMBASE 0x99ffec00

  557 12:24:14.542424  In relocation handler: CPU 5

  558 12:24:14.545804  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  559 12:24:14.549032  Writing SMRR. base = 0x9a000006, mask=0xff000800

  560 12:24:14.552279  Relocation complete.

  561 12:24:14.555874  Initializing CPU #0

  562 12:24:14.558781  CPU: vendor Intel device 806ec

  563 12:24:14.562992  CPU: family 06, model 8e, stepping 0c

  564 12:24:14.566077  Clearing out pending MCEs

  565 12:24:14.566199  Setting up local APIC...

  566 12:24:14.568697   apic_id: 0x00 done.

  567 12:24:14.572694  Turbo is available but hidden

  568 12:24:14.575892  Turbo is available and visible

  569 12:24:14.576025  VMX status: enabled

  570 12:24:14.582014  IA32_FEATURE_CONTROL status: locked

  571 12:24:14.582111  Skip microcode update

  572 12:24:14.585654  CPU #0 initialized

  573 12:24:14.588879  Initializing CPU #1

  574 12:24:14.588961  Initializing CPU #3

  575 12:24:14.592257  Initializing CPU #5

  576 12:24:14.595615  CPU: vendor Intel device 806ec

  577 12:24:14.598597  CPU: family 06, model 8e, stepping 0c

  578 12:24:14.602197  CPU: vendor Intel device 806ec

  579 12:24:14.605275  CPU: family 06, model 8e, stepping 0c

  580 12:24:14.608742  Clearing out pending MCEs

  581 12:24:14.608828  Clearing out pending MCEs

  582 12:24:14.612396  Setting up local APIC...

  583 12:24:14.615468  Initializing CPU #2

  584 12:24:14.615562  Initializing CPU #4

  585 12:24:14.618977  Initializing CPU #6

  586 12:24:14.621952  Initializing CPU #7

  587 12:24:14.625940  CPU: vendor Intel device 806ec

  588 12:24:14.628716  CPU: family 06, model 8e, stepping 0c

  589 12:24:14.632283  CPU: vendor Intel device 806ec

  590 12:24:14.635304  CPU: family 06, model 8e, stepping 0c

  591 12:24:14.638930  Clearing out pending MCEs

  592 12:24:14.639029  Clearing out pending MCEs

  593 12:24:14.642304  Setting up local APIC...

  594 12:24:14.645460  CPU: vendor Intel device 806ec

  595 12:24:14.648994  CPU: family 06, model 8e, stepping 0c

  596 12:24:14.652142  Clearing out pending MCEs

  597 12:24:14.655582   apic_id: 0x03 done.

  598 12:24:14.655675  Setting up local APIC...

  599 12:24:14.658899  Setting up local APIC...

  600 12:24:14.662148  VMX status: enabled

  601 12:24:14.662242   apic_id: 0x02 done.

  602 12:24:14.668778  IA32_FEATURE_CONTROL status: locked

  603 12:24:14.668868  VMX status: enabled

  604 12:24:14.672297  Skip microcode update

  605 12:24:14.675431  IA32_FEATURE_CONTROL status: locked

  606 12:24:14.678476  CPU #3 initialized

  607 12:24:14.678565  Skip microcode update

  608 12:24:14.682124   apic_id: 0x01 done.

  609 12:24:14.682223  CPU #5 initialized

  610 12:24:14.685493  Setting up local APIC...

  611 12:24:14.688830  VMX status: enabled

  612 12:24:14.688935   apic_id: 0x04 done.

  613 12:24:14.691638   apic_id: 0x05 done.

  614 12:24:14.695592  VMX status: enabled

  615 12:24:14.695695  VMX status: enabled

  616 12:24:14.698539  IA32_FEATURE_CONTROL status: locked

  617 12:24:14.701817  IA32_FEATURE_CONTROL status: locked

  618 12:24:14.705383  Skip microcode update

  619 12:24:14.708450  Skip microcode update

  620 12:24:14.708540  CPU #7 initialized

  621 12:24:14.712021  CPU #6 initialized

  622 12:24:14.715501  IA32_FEATURE_CONTROL status: locked

  623 12:24:14.718510  CPU: vendor Intel device 806ec

  624 12:24:14.721982  CPU: family 06, model 8e, stepping 0c

  625 12:24:14.724977  CPU: vendor Intel device 806ec

  626 12:24:14.728579  CPU: family 06, model 8e, stepping 0c

  627 12:24:14.732109  Clearing out pending MCEs

  628 12:24:14.735267  Clearing out pending MCEs

  629 12:24:14.738913  Setting up local APIC...

  630 12:24:14.739003  Skip microcode update

  631 12:24:14.741569  Setting up local APIC...

  632 12:24:14.745214  CPU #1 initialized

  633 12:24:14.745301   apic_id: 0x07 done.

  634 12:24:14.748332   apic_id: 0x06 done.

  635 12:24:14.751935  VMX status: enabled

  636 12:24:14.752018  VMX status: enabled

  637 12:24:14.754904  IA32_FEATURE_CONTROL status: locked

  638 12:24:14.758533  IA32_FEATURE_CONTROL status: locked

  639 12:24:14.761535  Skip microcode update

  640 12:24:14.765203  Skip microcode update

  641 12:24:14.765293  CPU #4 initialized

  642 12:24:14.768466  CPU #2 initialized

  643 12:24:14.771640  bsp_do_flight_plan done after 452 msecs.

  644 12:24:14.775192  CPU: frequency set to 4200 MHz

  645 12:24:14.778437  Enabling SMIs.

  646 12:24:14.778526  Locking SMM.

  647 12:24:14.792872  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  648 12:24:14.796016  CBFS @ c08000 size 3f8000

  649 12:24:14.803050  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  650 12:24:14.803149  CBFS: Locating 'vbt.bin'

  651 12:24:14.806076  CBFS: Found @ offset 5f5c0 size 499

  652 12:24:14.813122  Found a VBT of 4608 bytes after decompression

  653 12:24:14.995394  Display FSP Version Info HOB

  654 12:24:14.998686  Reference Code - CPU = 9.0.1e.30

  655 12:24:15.002198  uCode Version = 0.0.0.ca

  656 12:24:15.005387  TXT ACM version = ff.ff.ff.ffff

  657 12:24:15.009043  Display FSP Version Info HOB

  658 12:24:15.011927  Reference Code - ME = 9.0.1e.30

  659 12:24:15.015614  MEBx version = 0.0.0.0

  660 12:24:15.018632  ME Firmware Version = Consumer SKU

  661 12:24:15.022468  Display FSP Version Info HOB

  662 12:24:15.025453  Reference Code - CML PCH = 9.0.1e.30

  663 12:24:15.028987  PCH-CRID Status = Disabled

  664 12:24:15.031882  PCH-CRID Original Value = ff.ff.ff.ffff

  665 12:24:15.035236  PCH-CRID New Value = ff.ff.ff.ffff

  666 12:24:15.038903  OPROM - RST - RAID = ff.ff.ff.ffff

  667 12:24:15.042019  ChipsetInit Base Version = ff.ff.ff.ffff

  668 12:24:15.045539  ChipsetInit Oem Version = ff.ff.ff.ffff

  669 12:24:15.049112  Display FSP Version Info HOB

  670 12:24:15.055663  Reference Code - SA - System Agent = 9.0.1e.30

  671 12:24:15.058640  Reference Code - MRC = 0.7.1.6c

  672 12:24:15.058754  SA - PCIe Version = 9.0.1e.30

  673 12:24:15.061920  SA-CRID Status = Disabled

  674 12:24:15.065188  SA-CRID Original Value = 0.0.0.c

  675 12:24:15.068827  SA-CRID New Value = 0.0.0.c

  676 12:24:15.071935  OPROM - VBIOS = ff.ff.ff.ffff

  677 12:24:15.072056  RTC Init

  678 12:24:15.078870  Set power on after power failure.

  679 12:24:15.079003  Disabling Deep S3

  680 12:24:15.082233  Disabling Deep S3

  681 12:24:15.082354  Disabling Deep S4

  682 12:24:15.085828  Disabling Deep S4

  683 12:24:15.085961  Disabling Deep S5

  684 12:24:15.088694  Disabling Deep S5

  685 12:24:15.095201  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1

  686 12:24:15.095321  Enumerating buses...

  687 12:24:15.102196  Show all devs... Before device enumeration.

  688 12:24:15.102325  Root Device: enabled 1

  689 12:24:15.105239  CPU_CLUSTER: 0: enabled 1

  690 12:24:15.108635  DOMAIN: 0000: enabled 1

  691 12:24:15.108745  APIC: 00: enabled 1

  692 12:24:15.111960  PCI: 00:00.0: enabled 1

  693 12:24:15.115282  PCI: 00:02.0: enabled 1

  694 12:24:15.118941  PCI: 00:04.0: enabled 0

  695 12:24:15.119056  PCI: 00:05.0: enabled 0

  696 12:24:15.122138  PCI: 00:12.0: enabled 1

  697 12:24:15.125549  PCI: 00:12.5: enabled 0

  698 12:24:15.129028  PCI: 00:12.6: enabled 0

  699 12:24:15.129155  PCI: 00:14.0: enabled 1

  700 12:24:15.131925  PCI: 00:14.1: enabled 0

  701 12:24:15.135465  PCI: 00:14.3: enabled 1

  702 12:24:15.138363  PCI: 00:14.5: enabled 0

  703 12:24:15.138453  PCI: 00:15.0: enabled 1

  704 12:24:15.141819  PCI: 00:15.1: enabled 1

  705 12:24:15.145509  PCI: 00:15.2: enabled 0

  706 12:24:15.145623  PCI: 00:15.3: enabled 0

  707 12:24:15.148564  PCI: 00:16.0: enabled 1

  708 12:24:15.151862  PCI: 00:16.1: enabled 0

  709 12:24:15.155221  PCI: 00:16.2: enabled 0

  710 12:24:15.155349  PCI: 00:16.3: enabled 0

  711 12:24:15.158954  PCI: 00:16.4: enabled 0

  712 12:24:15.161651  PCI: 00:16.5: enabled 0

  713 12:24:15.165484  PCI: 00:17.0: enabled 1

  714 12:24:15.165568  PCI: 00:19.0: enabled 1

  715 12:24:15.168266  PCI: 00:19.1: enabled 0

  716 12:24:15.171707  PCI: 00:19.2: enabled 0

  717 12:24:15.175160  PCI: 00:1a.0: enabled 0

  718 12:24:15.175297  PCI: 00:1c.0: enabled 0

  719 12:24:15.178587  PCI: 00:1c.1: enabled 0

  720 12:24:15.181941  PCI: 00:1c.2: enabled 0

  721 12:24:15.182067  PCI: 00:1c.3: enabled 0

  722 12:24:15.185049  PCI: 00:1c.4: enabled 0

  723 12:24:15.188303  PCI: 00:1c.5: enabled 0

  724 12:24:15.191852  PCI: 00:1c.6: enabled 0

  725 12:24:15.191933  PCI: 00:1c.7: enabled 0

  726 12:24:15.195384  PCI: 00:1d.0: enabled 1

  727 12:24:15.198635  PCI: 00:1d.1: enabled 0

  728 12:24:15.201905  PCI: 00:1d.2: enabled 0

  729 12:24:15.202026  PCI: 00:1d.3: enabled 0

  730 12:24:15.205296  PCI: 00:1d.4: enabled 0

  731 12:24:15.209012  PCI: 00:1d.5: enabled 1

  732 12:24:15.209104  PCI: 00:1e.0: enabled 1

  733 12:24:15.211817  PCI: 00:1e.1: enabled 0

  734 12:24:15.215388  PCI: 00:1e.2: enabled 1

  735 12:24:15.218912  PCI: 00:1e.3: enabled 1

  736 12:24:15.218996  PCI: 00:1f.0: enabled 1

  737 12:24:15.221679  PCI: 00:1f.1: enabled 1

  738 12:24:15.225601  PCI: 00:1f.2: enabled 1

  739 12:24:15.228307  PCI: 00:1f.3: enabled 1

  740 12:24:15.228397  PCI: 00:1f.4: enabled 1

  741 12:24:15.231843  PCI: 00:1f.5: enabled 1

  742 12:24:15.234941  PCI: 00:1f.6: enabled 0

  743 12:24:15.235026  USB0 port 0: enabled 1

  744 12:24:15.238380  I2C: 00:15: enabled 1

  745 12:24:15.241796  I2C: 00:5d: enabled 1

  746 12:24:15.245324  GENERIC: 0.0: enabled 1

  747 12:24:15.245409  I2C: 00:1a: enabled 1

  748 12:24:15.248229  I2C: 00:38: enabled 1

  749 12:24:15.251770  I2C: 00:39: enabled 1

  750 12:24:15.251851  I2C: 00:3a: enabled 1

  751 12:24:15.255387  I2C: 00:3b: enabled 1

  752 12:24:15.258543  PCI: 00:00.0: enabled 1

  753 12:24:15.258626  SPI: 00: enabled 1

  754 12:24:15.261324  SPI: 01: enabled 1

  755 12:24:15.264970  PNP: 0c09.0: enabled 1

  756 12:24:15.265056  USB2 port 0: enabled 1

  757 12:24:15.268218  USB2 port 1: enabled 1

  758 12:24:15.271754  USB2 port 2: enabled 0

  759 12:24:15.271842  USB2 port 3: enabled 0

  760 12:24:15.274919  USB2 port 5: enabled 0

  761 12:24:15.278413  USB2 port 6: enabled 1

  762 12:24:15.278501  USB2 port 9: enabled 1

  763 12:24:15.281372  USB3 port 0: enabled 1

  764 12:24:15.284661  USB3 port 1: enabled 1

  765 12:24:15.288322  USB3 port 2: enabled 1

  766 12:24:15.288418  USB3 port 3: enabled 1

  767 12:24:15.291650  USB3 port 4: enabled 0

  768 12:24:15.295029  APIC: 01: enabled 1

  769 12:24:15.295120  APIC: 06: enabled 1

  770 12:24:15.298477  APIC: 03: enabled 1

  771 12:24:15.298556  APIC: 07: enabled 1

  772 12:24:15.301355  APIC: 02: enabled 1

  773 12:24:15.304713  APIC: 05: enabled 1

  774 12:24:15.304802  APIC: 04: enabled 1

  775 12:24:15.308495  Compare with tree...

  776 12:24:15.311505  Root Device: enabled 1

  777 12:24:15.311591   CPU_CLUSTER: 0: enabled 1

  778 12:24:15.314510    APIC: 00: enabled 1

  779 12:24:15.318103    APIC: 01: enabled 1

  780 12:24:15.318192    APIC: 06: enabled 1

  781 12:24:15.321570    APIC: 03: enabled 1

  782 12:24:15.325212    APIC: 07: enabled 1

  783 12:24:15.327904    APIC: 02: enabled 1

  784 12:24:15.327994    APIC: 05: enabled 1

  785 12:24:15.331394    APIC: 04: enabled 1

  786 12:24:15.334797   DOMAIN: 0000: enabled 1

  787 12:24:15.334886    PCI: 00:00.0: enabled 1

  788 12:24:15.337964    PCI: 00:02.0: enabled 1

  789 12:24:15.341270    PCI: 00:04.0: enabled 0

  790 12:24:15.344433    PCI: 00:05.0: enabled 0

  791 12:24:15.347770    PCI: 00:12.0: enabled 1

  792 12:24:15.347856    PCI: 00:12.5: enabled 0

  793 12:24:15.351297    PCI: 00:12.6: enabled 0

  794 12:24:15.354706    PCI: 00:14.0: enabled 1

  795 12:24:15.357679     USB0 port 0: enabled 1

  796 12:24:15.361388      USB2 port 0: enabled 1

  797 12:24:15.361475      USB2 port 1: enabled 1

  798 12:24:15.364297      USB2 port 2: enabled 0

  799 12:24:15.367804      USB2 port 3: enabled 0

  800 12:24:15.371203      USB2 port 5: enabled 0

  801 12:24:15.374836      USB2 port 6: enabled 1

  802 12:24:15.378199      USB2 port 9: enabled 1

  803 12:24:15.378284      USB3 port 0: enabled 1

  804 12:24:15.381097      USB3 port 1: enabled 1

  805 12:24:15.384775      USB3 port 2: enabled 1

  806 12:24:15.387765      USB3 port 3: enabled 1

  807 12:24:15.391391      USB3 port 4: enabled 0

  808 12:24:15.391479    PCI: 00:14.1: enabled 0

  809 12:24:15.394505    PCI: 00:14.3: enabled 1

  810 12:24:15.398041    PCI: 00:14.5: enabled 0

  811 12:24:15.401088    PCI: 00:15.0: enabled 1

  812 12:24:15.401176     I2C: 00:15: enabled 1

  813 12:24:15.404368    PCI: 00:15.1: enabled 1

  814 12:24:15.407966     I2C: 00:5d: enabled 1

  815 12:24:15.411176     GENERIC: 0.0: enabled 1

  816 12:24:15.414605    PCI: 00:15.2: enabled 0

  817 12:24:15.414693    PCI: 00:15.3: enabled 0

  818 12:24:15.418376    PCI: 00:16.0: enabled 1

  819 12:24:15.421676    PCI: 00:16.1: enabled 0

  820 12:24:15.424925    PCI: 00:16.2: enabled 0

  821 12:24:15.427878    PCI: 00:16.3: enabled 0

  822 12:24:15.428000    PCI: 00:16.4: enabled 0

  823 12:24:15.431433    PCI: 00:16.5: enabled 0

  824 12:24:15.435130    PCI: 00:17.0: enabled 1

  825 12:24:15.437962    PCI: 00:19.0: enabled 1

  826 12:24:15.438061     I2C: 00:1a: enabled 1

  827 12:24:15.441410     I2C: 00:38: enabled 1

  828 12:24:15.444576     I2C: 00:39: enabled 1

  829 12:24:15.448049     I2C: 00:3a: enabled 1

  830 12:24:15.451007     I2C: 00:3b: enabled 1

  831 12:24:15.451125    PCI: 00:19.1: enabled 0

  832 12:24:15.454473    PCI: 00:19.2: enabled 0

  833 12:24:15.457941    PCI: 00:1a.0: enabled 0

  834 12:24:15.460980    PCI: 00:1c.0: enabled 0

  835 12:24:15.461073    PCI: 00:1c.1: enabled 0

  836 12:24:15.464381    PCI: 00:1c.2: enabled 0

  837 12:24:15.467923    PCI: 00:1c.3: enabled 0

  838 12:24:15.470858    PCI: 00:1c.4: enabled 0

  839 12:24:15.474467    PCI: 00:1c.5: enabled 0

  840 12:24:15.474547    PCI: 00:1c.6: enabled 0

  841 12:24:15.477393    PCI: 00:1c.7: enabled 0

  842 12:24:15.480817    PCI: 00:1d.0: enabled 1

  843 12:24:15.484310    PCI: 00:1d.1: enabled 0

  844 12:24:15.487354    PCI: 00:1d.2: enabled 0

  845 12:24:15.487438    PCI: 00:1d.3: enabled 0

  846 12:24:15.490873    PCI: 00:1d.4: enabled 0

  847 12:24:15.494027    PCI: 00:1d.5: enabled 1

  848 12:24:15.497650     PCI: 00:00.0: enabled 1

  849 12:24:15.500700    PCI: 00:1e.0: enabled 1

  850 12:24:15.500785    PCI: 00:1e.1: enabled 0

  851 12:24:15.503766    PCI: 00:1e.2: enabled 1

  852 12:24:15.507397     SPI: 00: enabled 1

  853 12:24:15.511014    PCI: 00:1e.3: enabled 1

  854 12:24:15.511100     SPI: 01: enabled 1

  855 12:24:15.513956    PCI: 00:1f.0: enabled 1

  856 12:24:15.517409     PNP: 0c09.0: enabled 1

  857 12:24:15.520528    PCI: 00:1f.1: enabled 1

  858 12:24:15.524223    PCI: 00:1f.2: enabled 1

  859 12:24:15.524343    PCI: 00:1f.3: enabled 1

  860 12:24:15.527478    PCI: 00:1f.4: enabled 1

  861 12:24:15.530257    PCI: 00:1f.5: enabled 1

  862 12:24:15.534902    PCI: 00:1f.6: enabled 0

  863 12:24:15.537062  Root Device scanning...

  864 12:24:15.540174  scan_static_bus for Root Device

  865 12:24:15.540308  CPU_CLUSTER: 0 enabled

  866 12:24:15.543755  DOMAIN: 0000 enabled

  867 12:24:15.547245  DOMAIN: 0000 scanning...

  868 12:24:15.550243  PCI: pci_scan_bus for bus 00

  869 12:24:15.553916  PCI: 00:00.0 [8086/0000] ops

  870 12:24:15.556809  PCI: 00:00.0 [8086/9b61] enabled

  871 12:24:15.560330  PCI: 00:02.0 [8086/0000] bus ops

  872 12:24:15.563450  PCI: 00:02.0 [8086/9b41] enabled

  873 12:24:15.566610  PCI: 00:04.0 [8086/1903] disabled

  874 12:24:15.570333  PCI: 00:08.0 [8086/1911] enabled

  875 12:24:15.573461  PCI: 00:12.0 [8086/02f9] enabled

  876 12:24:15.576903  PCI: 00:14.0 [8086/0000] bus ops

  877 12:24:15.580462  PCI: 00:14.0 [8086/02ed] enabled

  878 12:24:15.583403  PCI: 00:14.2 [8086/02ef] enabled

  879 12:24:15.586562  PCI: 00:14.3 [8086/02f0] enabled

  880 12:24:15.590207  PCI: 00:15.0 [8086/0000] bus ops

  881 12:24:15.593651  PCI: 00:15.0 [8086/02e8] enabled

  882 12:24:15.596669  PCI: 00:15.1 [8086/0000] bus ops

  883 12:24:15.600446  PCI: 00:15.1 [8086/02e9] enabled

  884 12:24:15.603337  PCI: 00:16.0 [8086/0000] ops

  885 12:24:15.606656  PCI: 00:16.0 [8086/02e0] enabled

  886 12:24:15.606786  PCI: 00:17.0 [8086/0000] ops

  887 12:24:15.610543  PCI: 00:17.0 [8086/02d3] enabled

  888 12:24:15.613570  PCI: 00:19.0 [8086/0000] bus ops

  889 12:24:15.617018  PCI: 00:19.0 [8086/02c5] enabled

  890 12:24:15.619989  PCI: 00:1d.0 [8086/0000] bus ops

  891 12:24:15.623360  PCI: 00:1d.0 [8086/02b0] enabled

  892 12:24:15.630261  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  893 12:24:15.633190  PCI: 00:1e.0 [8086/0000] ops

  894 12:24:15.636744  PCI: 00:1e.0 [8086/02a8] enabled

  895 12:24:15.639959  PCI: 00:1e.2 [8086/0000] bus ops

  896 12:24:15.643657  PCI: 00:1e.2 [8086/02aa] enabled

  897 12:24:15.647124  PCI: 00:1e.3 [8086/0000] bus ops

  898 12:24:15.650401  PCI: 00:1e.3 [8086/02ab] enabled

  899 12:24:15.653397  PCI: 00:1f.0 [8086/0000] bus ops

  900 12:24:15.656450  PCI: 00:1f.0 [8086/0284] enabled

  901 12:24:15.663291  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  902 12:24:15.666718  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  903 12:24:15.669873  PCI: 00:1f.3 [8086/0000] bus ops

  904 12:24:15.673524  PCI: 00:1f.3 [8086/02c8] enabled

  905 12:24:15.676649  PCI: 00:1f.4 [8086/0000] bus ops

  906 12:24:15.680021  PCI: 00:1f.4 [8086/02a3] enabled

  907 12:24:15.683186  PCI: 00:1f.5 [8086/0000] bus ops

  908 12:24:15.686420  PCI: 00:1f.5 [8086/02a4] enabled

  909 12:24:15.689724  PCI: Leftover static devices:

  910 12:24:15.693253  PCI: 00:05.0

  911 12:24:15.693368  PCI: 00:12.5

  912 12:24:15.696746  PCI: 00:12.6

  913 12:24:15.696841  PCI: 00:14.1

  914 12:24:15.696916  PCI: 00:14.5

  915 12:24:15.700036  PCI: 00:15.2

  916 12:24:15.700168  PCI: 00:15.3

  917 12:24:15.703437  PCI: 00:16.1

  918 12:24:15.703538  PCI: 00:16.2

  919 12:24:15.703622  PCI: 00:16.3

  920 12:24:15.706510  PCI: 00:16.4

  921 12:24:15.706621  PCI: 00:16.5

  922 12:24:15.710074  PCI: 00:19.1

  923 12:24:15.710194  PCI: 00:19.2

  924 12:24:15.710321  PCI: 00:1a.0

  925 12:24:15.713120  PCI: 00:1c.0

  926 12:24:15.713236  PCI: 00:1c.1

  927 12:24:15.716654  PCI: 00:1c.2

  928 12:24:15.716748  PCI: 00:1c.3

  929 12:24:15.719849  PCI: 00:1c.4

  930 12:24:15.719968  PCI: 00:1c.5

  931 12:24:15.720070  PCI: 00:1c.6

  932 12:24:15.723365  PCI: 00:1c.7

  933 12:24:15.723473  PCI: 00:1d.1

  934 12:24:15.726687  PCI: 00:1d.2

  935 12:24:15.726798  PCI: 00:1d.3

  936 12:24:15.726908  PCI: 00:1d.4

  937 12:24:15.729748  PCI: 00:1d.5

  938 12:24:15.729835  PCI: 00:1e.1

  939 12:24:15.733613  PCI: 00:1f.1

  940 12:24:15.733741  PCI: 00:1f.2

  941 12:24:15.733827  PCI: 00:1f.6

  942 12:24:15.736467  PCI: Check your devicetree.cb.

  943 12:24:15.739942  PCI: 00:02.0 scanning...

  944 12:24:15.742939  scan_generic_bus for PCI: 00:02.0

  945 12:24:15.746535  scan_generic_bus for PCI: 00:02.0 done

  946 12:24:15.752915  scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs

  947 12:24:15.756334  PCI: 00:14.0 scanning...

  948 12:24:15.759501  scan_static_bus for PCI: 00:14.0

  949 12:24:15.763095  USB0 port 0 enabled

  950 12:24:15.763212  USB0 port 0 scanning...

  951 12:24:15.766049  scan_static_bus for USB0 port 0

  952 12:24:15.769484  USB2 port 0 enabled

  953 12:24:15.773448  USB2 port 1 enabled

  954 12:24:15.773540  USB2 port 2 disabled

  955 12:24:15.776374  USB2 port 3 disabled

  956 12:24:15.779718  USB2 port 5 disabled

  957 12:24:15.779835  USB2 port 6 enabled

  958 12:24:15.783139  USB2 port 9 enabled

  959 12:24:15.783252  USB3 port 0 enabled

  960 12:24:15.786497  USB3 port 1 enabled

  961 12:24:15.789618  USB3 port 2 enabled

  962 12:24:15.789704  USB3 port 3 enabled

  963 12:24:15.792966  USB3 port 4 disabled

  964 12:24:15.796326  USB2 port 0 scanning...

  965 12:24:15.799871  scan_static_bus for USB2 port 0

  966 12:24:15.803257  scan_static_bus for USB2 port 0 done

  967 12:24:15.806189  scan_bus: scanning of bus USB2 port 0 took 9701 usecs

  968 12:24:15.809868  USB2 port 1 scanning...

  969 12:24:15.812835  scan_static_bus for USB2 port 1

  970 12:24:15.816402  scan_static_bus for USB2 port 1 done

  971 12:24:15.823016  scan_bus: scanning of bus USB2 port 1 took 9710 usecs

  972 12:24:15.826115  USB2 port 6 scanning...

  973 12:24:15.829657  scan_static_bus for USB2 port 6

  974 12:24:15.832586  scan_static_bus for USB2 port 6 done

  975 12:24:15.836086  scan_bus: scanning of bus USB2 port 6 took 9710 usecs

  976 12:24:15.839409  USB2 port 9 scanning...

  977 12:24:15.843009  scan_static_bus for USB2 port 9

  978 12:24:15.846205  scan_static_bus for USB2 port 9 done

  979 12:24:15.852794  scan_bus: scanning of bus USB2 port 9 took 9711 usecs

  980 12:24:15.856386  USB3 port 0 scanning...

  981 12:24:15.859301  scan_static_bus for USB3 port 0

  982 12:24:15.862550  scan_static_bus for USB3 port 0 done

  983 12:24:15.865818  scan_bus: scanning of bus USB3 port 0 took 9710 usecs

  984 12:24:15.869502  USB3 port 1 scanning...

  985 12:24:15.872675  scan_static_bus for USB3 port 1

  986 12:24:15.876399  scan_static_bus for USB3 port 1 done

  987 12:24:15.882852  scan_bus: scanning of bus USB3 port 1 took 9700 usecs

  988 12:24:15.886177  USB3 port 2 scanning...

  989 12:24:15.889480  scan_static_bus for USB3 port 2

  990 12:24:15.892494  scan_static_bus for USB3 port 2 done

  991 12:24:15.897063  scan_bus: scanning of bus USB3 port 2 took 9703 usecs

  992 12:24:15.899586  USB3 port 3 scanning...

  993 12:24:15.902527  scan_static_bus for USB3 port 3

  994 12:24:15.905848  scan_static_bus for USB3 port 3 done

  995 12:24:15.912554  scan_bus: scanning of bus USB3 port 3 took 9704 usecs

  996 12:24:15.915891  scan_static_bus for USB0 port 0 done

  997 12:24:15.922548  scan_bus: scanning of bus USB0 port 0 took 155430 usecs

  998 12:24:15.925828  scan_static_bus for PCI: 00:14.0 done

  999 12:24:15.932254  scan_bus: scanning of bus PCI: 00:14.0 took 173047 usecs

 1000 12:24:15.932385  PCI: 00:15.0 scanning...

 1001 12:24:15.938859  scan_generic_bus for PCI: 00:15.0

 1002 12:24:15.942703  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1003 12:24:15.945441  scan_generic_bus for PCI: 00:15.0 done

 1004 12:24:15.952157  scan_bus: scanning of bus PCI: 00:15.0 took 14303 usecs

 1005 12:24:15.952279  PCI: 00:15.1 scanning...

 1006 12:24:15.955781  scan_generic_bus for PCI: 00:15.1

 1007 12:24:15.962639  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1008 12:24:15.965548  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1009 12:24:15.969176  scan_generic_bus for PCI: 00:15.1 done

 1010 12:24:15.975748  scan_bus: scanning of bus PCI: 00:15.1 took 18598 usecs

 1011 12:24:15.978850  PCI: 00:19.0 scanning...

 1012 12:24:15.982283  scan_generic_bus for PCI: 00:19.0

 1013 12:24:15.985925  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1014 12:24:15.989057  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1015 12:24:15.992021  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1016 12:24:15.999037  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1017 12:24:16.002481  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1018 12:24:16.005726  scan_generic_bus for PCI: 00:19.0 done

 1019 12:24:16.011968  scan_bus: scanning of bus PCI: 00:19.0 took 30762 usecs

 1020 12:24:16.012096  PCI: 00:1d.0 scanning...

 1021 12:24:16.019573  do_pci_scan_bridge for PCI: 00:1d.0

 1022 12:24:16.019669  PCI: pci_scan_bus for bus 01

 1023 12:24:16.022554  PCI: 01:00.0 [1c5c/1327] enabled

 1024 12:24:16.029383  Enabling Common Clock Configuration

 1025 12:24:16.032576  L1 Sub-State supported from root port 29

 1026 12:24:16.035937  L1 Sub-State Support = 0xf

 1027 12:24:16.039432  CommonModeRestoreTime = 0x28

 1028 12:24:16.042677  Power On Value = 0x16, Power On Scale = 0x0

 1029 12:24:16.042790  ASPM: Enabled L1

 1030 12:24:16.049394  scan_bus: scanning of bus PCI: 00:1d.0 took 32804 usecs

 1031 12:24:16.052251  PCI: 00:1e.2 scanning...

 1032 12:24:16.055799  scan_generic_bus for PCI: 00:1e.2

 1033 12:24:16.059169  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1034 12:24:16.062333  scan_generic_bus for PCI: 00:1e.2 done

 1035 12:24:16.069417  scan_bus: scanning of bus PCI: 00:1e.2 took 13986 usecs

 1036 12:24:16.072361  PCI: 00:1e.3 scanning...

 1037 12:24:16.076151  scan_generic_bus for PCI: 00:1e.3

 1038 12:24:16.079000  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1039 12:24:16.082610  scan_generic_bus for PCI: 00:1e.3 done

 1040 12:24:16.089289  scan_bus: scanning of bus PCI: 00:1e.3 took 14010 usecs

 1041 12:24:16.092565  PCI: 00:1f.0 scanning...

 1042 12:24:16.095977  scan_static_bus for PCI: 00:1f.0

 1043 12:24:16.096087  PNP: 0c09.0 enabled

 1044 12:24:16.099187  scan_static_bus for PCI: 00:1f.0 done

 1045 12:24:16.105850  scan_bus: scanning of bus PCI: 00:1f.0 took 12063 usecs

 1046 12:24:16.109268  PCI: 00:1f.3 scanning...

 1047 12:24:16.115522  scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs

 1048 12:24:16.115610  PCI: 00:1f.4 scanning...

 1049 12:24:16.118742  scan_generic_bus for PCI: 00:1f.4

 1050 12:24:16.125923  scan_generic_bus for PCI: 00:1f.4 done

 1051 12:24:16.129219  scan_bus: scanning of bus PCI: 00:1f.4 took 10197 usecs

 1052 12:24:16.132782  PCI: 00:1f.5 scanning...

 1053 12:24:16.136079  scan_generic_bus for PCI: 00:1f.5

 1054 12:24:16.138862  scan_generic_bus for PCI: 00:1f.5 done

 1055 12:24:16.145544  scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs

 1056 12:24:16.152122  scan_bus: scanning of bus DOMAIN: 0000 took 605316 usecs

 1057 12:24:16.155477  scan_static_bus for Root Device done

 1058 12:24:16.158812  scan_bus: scanning of bus Root Device took 625197 usecs

 1059 12:24:16.162468  done

 1060 12:24:16.166157  Chrome EC: UHEPI supported

 1061 12:24:16.168861  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1062 12:24:16.175614  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1063 12:24:16.182643  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1064 12:24:16.189240  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1065 12:24:16.192159  SPI flash protection: WPSW=0 SRP0=0

 1066 12:24:16.198855  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1067 12:24:16.202730  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1068 12:24:16.205500  found VGA at PCI: 00:02.0

 1069 12:24:16.209143  Setting up VGA for PCI: 00:02.0

 1070 12:24:16.215742  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1071 12:24:16.218783  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1072 12:24:16.222039  Allocating resources...

 1073 12:24:16.225502  Reading resources...

 1074 12:24:16.228309  Root Device read_resources bus 0 link: 0

 1075 12:24:16.231864  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1076 12:24:16.238755  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1077 12:24:16.241715  DOMAIN: 0000 read_resources bus 0 link: 0

 1078 12:24:16.249392  PCI: 00:14.0 read_resources bus 0 link: 0

 1079 12:24:16.252385  USB0 port 0 read_resources bus 0 link: 0

 1080 12:24:16.260661  USB0 port 0 read_resources bus 0 link: 0 done

 1081 12:24:16.263714  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1082 12:24:16.271235  PCI: 00:15.0 read_resources bus 1 link: 0

 1083 12:24:16.274921  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1084 12:24:16.281136  PCI: 00:15.1 read_resources bus 2 link: 0

 1085 12:24:16.284287  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1086 12:24:16.291679  PCI: 00:19.0 read_resources bus 3 link: 0

 1087 12:24:16.298285  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1088 12:24:16.301933  PCI: 00:1d.0 read_resources bus 1 link: 0

 1089 12:24:16.308499  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1090 12:24:16.311728  PCI: 00:1e.2 read_resources bus 4 link: 0

 1091 12:24:16.318582  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1092 12:24:16.322211  PCI: 00:1e.3 read_resources bus 5 link: 0

 1093 12:24:16.328512  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1094 12:24:16.331824  PCI: 00:1f.0 read_resources bus 0 link: 0

 1095 12:24:16.338437  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1096 12:24:16.341966  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1097 12:24:16.349116  Root Device read_resources bus 0 link: 0 done

 1098 12:24:16.352497  Done reading resources.

 1099 12:24:16.355434  Show resources in subtree (Root Device)...After reading.

 1100 12:24:16.361930   Root Device child on link 0 CPU_CLUSTER: 0

 1101 12:24:16.366064    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1102 12:24:16.366149     APIC: 00

 1103 12:24:16.368814     APIC: 01

 1104 12:24:16.368927     APIC: 06

 1105 12:24:16.369031     APIC: 03

 1106 12:24:16.372628     APIC: 07

 1107 12:24:16.372721     APIC: 02

 1108 12:24:16.375733     APIC: 05

 1109 12:24:16.375815     APIC: 04

 1110 12:24:16.378696    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1111 12:24:16.389096    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1112 12:24:16.441651    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1113 12:24:16.441969     PCI: 00:00.0

 1114 12:24:16.442093     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1115 12:24:16.442427     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1116 12:24:16.442538     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1117 12:24:16.442665     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1118 12:24:16.476316     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1119 12:24:16.476654     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1120 12:24:16.476739     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1121 12:24:16.480414     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1122 12:24:16.483817     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1123 12:24:16.493447     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1124 12:24:16.503608     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1125 12:24:16.513002     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1126 12:24:16.523168     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1127 12:24:16.532994     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1128 12:24:16.540100     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1129 12:24:16.549758     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1130 12:24:16.553161     PCI: 00:02.0

 1131 12:24:16.563320     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1132 12:24:16.573198     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1133 12:24:16.579440     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1134 12:24:16.583283     PCI: 00:04.0

 1135 12:24:16.583408     PCI: 00:08.0

 1136 12:24:16.593073     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1137 12:24:16.596381     PCI: 00:12.0

 1138 12:24:16.606387     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1139 12:24:16.609806     PCI: 00:14.0 child on link 0 USB0 port 0

 1140 12:24:16.619472     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1141 12:24:16.622867      USB0 port 0 child on link 0 USB2 port 0

 1142 12:24:16.626544       USB2 port 0

 1143 12:24:16.629408       USB2 port 1

 1144 12:24:16.629527       USB2 port 2

 1145 12:24:16.632782       USB2 port 3

 1146 12:24:16.632864       USB2 port 5

 1147 12:24:16.636379       USB2 port 6

 1148 12:24:16.636460       USB2 port 9

 1149 12:24:16.639828       USB3 port 0

 1150 12:24:16.639938       USB3 port 1

 1151 12:24:16.643010       USB3 port 2

 1152 12:24:16.643120       USB3 port 3

 1153 12:24:16.646142       USB3 port 4

 1154 12:24:16.646251     PCI: 00:14.2

 1155 12:24:16.656192     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1156 12:24:16.666359     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1157 12:24:16.669231     PCI: 00:14.3

 1158 12:24:16.679544     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1159 12:24:16.682723     PCI: 00:15.0 child on link 0 I2C: 01:15

 1160 12:24:16.692694     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1161 12:24:16.695746      I2C: 01:15

 1162 12:24:16.699328     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1163 12:24:16.709201     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1164 12:24:16.709294      I2C: 02:5d

 1165 12:24:16.712235      GENERIC: 0.0

 1166 12:24:16.712356     PCI: 00:16.0

 1167 12:24:16.722575     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1168 12:24:16.725428     PCI: 00:17.0

 1169 12:24:16.735679     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1170 12:24:16.742375     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1171 12:24:16.752208     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1172 12:24:16.759089     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1173 12:24:16.768857     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1174 12:24:16.775969     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1175 12:24:16.782300     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1176 12:24:16.792368     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1177 12:24:16.792460      I2C: 03:1a

 1178 12:24:16.795775      I2C: 03:38

 1179 12:24:16.795891      I2C: 03:39

 1180 12:24:16.798744      I2C: 03:3a

 1181 12:24:16.798856      I2C: 03:3b

 1182 12:24:16.802268     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1183 12:24:16.812326     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1184 12:24:16.821924     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1185 12:24:16.831948     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1186 12:24:16.832068      PCI: 01:00.0

 1187 12:24:16.842086      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1188 12:24:16.845567     PCI: 00:1e.0

 1189 12:24:16.855174     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1190 12:24:16.865150     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1191 12:24:16.868673     PCI: 00:1e.2 child on link 0 SPI: 00

 1192 12:24:16.878839     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1193 12:24:16.882087      SPI: 00

 1194 12:24:16.885557     PCI: 00:1e.3 child on link 0 SPI: 01

 1195 12:24:16.895648     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1196 12:24:16.895765      SPI: 01

 1197 12:24:16.901919     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1198 12:24:16.908449     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1199 12:24:16.918470     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1200 12:24:16.918589      PNP: 0c09.0

 1201 12:24:16.928149      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1202 12:24:16.928275     PCI: 00:1f.3

 1203 12:24:16.938207     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1204 12:24:16.951458     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1205 12:24:16.951552     PCI: 00:1f.4

 1206 12:24:16.961716     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1207 12:24:16.971597     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1208 12:24:16.971724     PCI: 00:1f.5

 1209 12:24:16.981211     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1210 12:24:16.988136  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1211 12:24:16.994736  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1212 12:24:17.001410  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1213 12:24:17.004626  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1214 12:24:17.007917  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1215 12:24:17.011536  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1216 12:24:17.014465  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1217 12:24:17.021444  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1218 12:24:17.028074  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1219 12:24:17.037903  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1220 12:24:17.044551  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1221 12:24:17.051413  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1222 12:24:17.054874  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1223 12:24:17.064634  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1224 12:24:17.068122  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1225 12:24:17.074658  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1226 12:24:17.077650  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1227 12:24:17.081145  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1228 12:24:17.087665  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1229 12:24:17.091008  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1230 12:24:17.098036  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1231 12:24:17.101300  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1232 12:24:17.107523  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1233 12:24:17.111330  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1234 12:24:17.118128  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1235 12:24:17.121362  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1236 12:24:17.127771  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1237 12:24:17.131288  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1238 12:24:17.138003  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1239 12:24:17.141346  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1240 12:24:17.147633  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1241 12:24:17.150867  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1242 12:24:17.154570  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1243 12:24:17.160951  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1244 12:24:17.164207  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1245 12:24:17.171036  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1246 12:24:17.174074  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1247 12:24:17.183924  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1248 12:24:17.187490  avoid_fixed_resources: DOMAIN: 0000

 1249 12:24:17.194133  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1250 12:24:17.200554  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1251 12:24:17.207256  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1252 12:24:17.213894  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1253 12:24:17.224755  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1254 12:24:17.230004  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1255 12:24:17.236979  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1256 12:24:17.247043  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1257 12:24:17.253396  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1258 12:24:17.260166  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1259 12:24:17.266514  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1260 12:24:17.276447  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1261 12:24:17.276536  Setting resources...

 1262 12:24:17.283512  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1263 12:24:17.286638  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1264 12:24:17.289554  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1265 12:24:17.296651  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1266 12:24:17.299705  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1267 12:24:17.306055  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1268 12:24:17.312946  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1269 12:24:17.319623  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1270 12:24:17.326163  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1271 12:24:17.329695  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1272 12:24:17.336015  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1273 12:24:17.339339  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1274 12:24:17.345840  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1275 12:24:17.349481  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1276 12:24:17.355780  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1277 12:24:17.359381  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1278 12:24:17.365885  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1279 12:24:17.369385  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1280 12:24:17.375656  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1281 12:24:17.379254  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1282 12:24:17.385699  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1283 12:24:17.389277  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1284 12:24:17.395720  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1285 12:24:17.398697  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1286 12:24:17.405838  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1287 12:24:17.408679  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1288 12:24:17.412425  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1289 12:24:17.418974  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1290 12:24:17.422417  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1291 12:24:17.428738  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1292 12:24:17.432081  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1293 12:24:17.438747  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1294 12:24:17.445393  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1295 12:24:17.452427  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1296 12:24:17.458847  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1297 12:24:17.468731  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1298 12:24:17.471675  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1299 12:24:17.478474  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1300 12:24:17.485503  Root Device assign_resources, bus 0 link: 0

 1301 12:24:17.488383  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1302 12:24:17.498483  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1303 12:24:17.505293  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1304 12:24:17.514773  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1305 12:24:17.521816  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1306 12:24:17.532060  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1307 12:24:17.537732  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1308 12:24:17.544555  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1309 12:24:17.548118  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1310 12:24:17.554972  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1311 12:24:17.564650  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1312 12:24:17.570831  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1313 12:24:17.581116  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1314 12:24:17.584694  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1315 12:24:17.591101  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1316 12:24:17.597727  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1317 12:24:17.604058  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1318 12:24:17.607816  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1319 12:24:17.614516  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1320 12:24:17.624376  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1321 12:24:17.631254  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1322 12:24:17.641031  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1323 12:24:17.647691  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1324 12:24:17.654568  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1325 12:24:17.661405  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1326 12:24:17.671359  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1327 12:24:17.674544  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1328 12:24:17.681347  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1329 12:24:17.687854  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1330 12:24:17.697971  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1331 12:24:17.707886  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1332 12:24:17.710873  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1333 12:24:17.717559  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1334 12:24:17.724326  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1335 12:24:17.730660  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1336 12:24:17.740963  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1337 12:24:17.743966  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1338 12:24:17.751037  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1339 12:24:17.757482  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1340 12:24:17.760715  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1341 12:24:17.767851  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1342 12:24:17.770850  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1343 12:24:17.777533  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1344 12:24:17.780746  LPC: Trying to open IO window from 800 size 1ff

 1345 12:24:17.790730  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1346 12:24:17.797628  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1347 12:24:17.807253  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1348 12:24:17.814070  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1349 12:24:17.820453  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1350 12:24:17.823683  Root Device assign_resources, bus 0 link: 0

 1351 12:24:17.827048  Done setting resources.

 1352 12:24:17.833855  Show resources in subtree (Root Device)...After assigning values.

 1353 12:24:17.837479   Root Device child on link 0 CPU_CLUSTER: 0

 1354 12:24:17.840600    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1355 12:24:17.844072     APIC: 00

 1356 12:24:17.844180     APIC: 01

 1357 12:24:17.844280     APIC: 06

 1358 12:24:17.847003     APIC: 03

 1359 12:24:17.847114     APIC: 07

 1360 12:24:17.850479     APIC: 02

 1361 12:24:17.850593     APIC: 05

 1362 12:24:17.850665     APIC: 04

 1363 12:24:17.856938    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1364 12:24:17.866721    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1365 12:24:17.876826    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1366 12:24:17.876954     PCI: 00:00.0

 1367 12:24:17.886692     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1368 12:24:17.897091     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1369 12:24:17.906547     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1370 12:24:17.916446     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1371 12:24:17.926655     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1372 12:24:17.936332     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1373 12:24:17.943234     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1374 12:24:17.952858     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1375 12:24:17.962852     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1376 12:24:17.972802     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1377 12:24:17.982600     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1378 12:24:17.989481     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1379 12:24:17.998805     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1380 12:24:18.009336     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1381 12:24:18.018943     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1382 12:24:18.028667     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1383 12:24:18.028784     PCI: 00:02.0

 1384 12:24:18.042481     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1385 12:24:18.052131     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1386 12:24:18.061831     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1387 12:24:18.061952     PCI: 00:04.0

 1388 12:24:18.065364     PCI: 00:08.0

 1389 12:24:18.075337     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1390 12:24:18.075440     PCI: 00:12.0

 1391 12:24:18.085431     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1392 12:24:18.091859     PCI: 00:14.0 child on link 0 USB0 port 0

 1393 12:24:18.101784     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1394 12:24:18.104862      USB0 port 0 child on link 0 USB2 port 0

 1395 12:24:18.108180       USB2 port 0

 1396 12:24:18.108296       USB2 port 1

 1397 12:24:18.112063       USB2 port 2

 1398 12:24:18.112180       USB2 port 3

 1399 12:24:18.115407       USB2 port 5

 1400 12:24:18.115499       USB2 port 6

 1401 12:24:18.118499       USB2 port 9

 1402 12:24:18.118614       USB3 port 0

 1403 12:24:18.122031       USB3 port 1

 1404 12:24:18.122144       USB3 port 2

 1405 12:24:18.125230       USB3 port 3

 1406 12:24:18.125346       USB3 port 4

 1407 12:24:18.128284     PCI: 00:14.2

 1408 12:24:18.138405     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1409 12:24:18.147931     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1410 12:24:18.151407     PCI: 00:14.3

 1411 12:24:18.161261     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1412 12:24:18.164618     PCI: 00:15.0 child on link 0 I2C: 01:15

 1413 12:24:18.174534     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1414 12:24:18.178247      I2C: 01:15

 1415 12:24:18.181540     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1416 12:24:18.190959     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1417 12:24:18.194496      I2C: 02:5d

 1418 12:24:18.194608      GENERIC: 0.0

 1419 12:24:18.197958     PCI: 00:16.0

 1420 12:24:18.207626     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1421 12:24:18.207760     PCI: 00:17.0

 1422 12:24:18.217950     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1423 12:24:18.227696     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1424 12:24:18.237467     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1425 12:24:18.247161     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1426 12:24:18.257691     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1427 12:24:18.267309     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1428 12:24:18.270646     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1429 12:24:18.280610     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1430 12:24:18.283647      I2C: 03:1a

 1431 12:24:18.283763      I2C: 03:38

 1432 12:24:18.283870      I2C: 03:39

 1433 12:24:18.287127      I2C: 03:3a

 1434 12:24:18.287237      I2C: 03:3b

 1435 12:24:18.293755     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1436 12:24:18.303960     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1437 12:24:18.313383     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1438 12:24:18.323726     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1439 12:24:18.323924      PCI: 01:00.0

 1440 12:24:18.333444      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1441 12:24:18.336932     PCI: 00:1e.0

 1442 12:24:18.346615     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1443 12:24:18.356868     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1444 12:24:18.363332     PCI: 00:1e.2 child on link 0 SPI: 00

 1445 12:24:18.373123     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1446 12:24:18.373309      SPI: 00

 1447 12:24:18.376362     PCI: 00:1e.3 child on link 0 SPI: 01

 1448 12:24:18.386316     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1449 12:24:18.389816      SPI: 01

 1450 12:24:18.393398     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1451 12:24:18.402855     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1452 12:24:18.409803     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1453 12:24:18.412717      PNP: 0c09.0

 1454 12:24:18.422993      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1455 12:24:18.423122     PCI: 00:1f.3

 1456 12:24:18.432911     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1457 12:24:18.443147     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1458 12:24:18.446207     PCI: 00:1f.4

 1459 12:24:18.456170     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1460 12:24:18.466003     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1461 12:24:18.466111     PCI: 00:1f.5

 1462 12:24:18.475942     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1463 12:24:18.479338  Done allocating resources.

 1464 12:24:18.485697  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1465 12:24:18.489171  Enabling resources...

 1466 12:24:18.492310  PCI: 00:00.0 subsystem <- 8086/9b61

 1467 12:24:18.495731  PCI: 00:00.0 cmd <- 06

 1468 12:24:18.499051  PCI: 00:02.0 subsystem <- 8086/9b41

 1469 12:24:18.502538  PCI: 00:02.0 cmd <- 03

 1470 12:24:18.502634  PCI: 00:08.0 cmd <- 06

 1471 12:24:18.509019  PCI: 00:12.0 subsystem <- 8086/02f9

 1472 12:24:18.509110  PCI: 00:12.0 cmd <- 02

 1473 12:24:18.512511  PCI: 00:14.0 subsystem <- 8086/02ed

 1474 12:24:18.515593  PCI: 00:14.0 cmd <- 02

 1475 12:24:18.519122  PCI: 00:14.2 cmd <- 02

 1476 12:24:18.522590  PCI: 00:14.3 subsystem <- 8086/02f0

 1477 12:24:18.525893  PCI: 00:14.3 cmd <- 02

 1478 12:24:18.528783  PCI: 00:15.0 subsystem <- 8086/02e8

 1479 12:24:18.532117  PCI: 00:15.0 cmd <- 02

 1480 12:24:18.535518  PCI: 00:15.1 subsystem <- 8086/02e9

 1481 12:24:18.538747  PCI: 00:15.1 cmd <- 02

 1482 12:24:18.542280  PCI: 00:16.0 subsystem <- 8086/02e0

 1483 12:24:18.542373  PCI: 00:16.0 cmd <- 02

 1484 12:24:18.549256  PCI: 00:17.0 subsystem <- 8086/02d3

 1485 12:24:18.549362  PCI: 00:17.0 cmd <- 03

 1486 12:24:18.552649  PCI: 00:19.0 subsystem <- 8086/02c5

 1487 12:24:18.555789  PCI: 00:19.0 cmd <- 02

 1488 12:24:18.559456  PCI: 00:1d.0 bridge ctrl <- 0013

 1489 12:24:18.562624  PCI: 00:1d.0 subsystem <- 8086/02b0

 1490 12:24:18.565658  PCI: 00:1d.0 cmd <- 06

 1491 12:24:18.569077  PCI: 00:1e.0 subsystem <- 8086/02a8

 1492 12:24:18.572638  PCI: 00:1e.0 cmd <- 06

 1493 12:24:18.575945  PCI: 00:1e.2 subsystem <- 8086/02aa

 1494 12:24:18.579463  PCI: 00:1e.2 cmd <- 06

 1495 12:24:18.582184  PCI: 00:1e.3 subsystem <- 8086/02ab

 1496 12:24:18.585704  PCI: 00:1e.3 cmd <- 02

 1497 12:24:18.589187  PCI: 00:1f.0 subsystem <- 8086/0284

 1498 12:24:18.592179  PCI: 00:1f.0 cmd <- 407

 1499 12:24:18.595620  PCI: 00:1f.3 subsystem <- 8086/02c8

 1500 12:24:18.598788  PCI: 00:1f.3 cmd <- 02

 1501 12:24:18.602532  PCI: 00:1f.4 subsystem <- 8086/02a3

 1502 12:24:18.602626  PCI: 00:1f.4 cmd <- 03

 1503 12:24:18.609485  PCI: 00:1f.5 subsystem <- 8086/02a4

 1504 12:24:18.609578  PCI: 00:1f.5 cmd <- 406

 1505 12:24:18.618761  PCI: 01:00.0 cmd <- 02

 1506 12:24:18.624148  done.

 1507 12:24:18.634559  ME: Version: 14.0.39.1367

 1508 12:24:18.641308  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10

 1509 12:24:18.644686  Initializing devices...

 1510 12:24:18.644781  Root Device init ...

 1511 12:24:18.650872  Chrome EC: Set SMI mask to 0x0000000000000000

 1512 12:24:18.654634  Chrome EC: clear events_b mask to 0x0000000000000000

 1513 12:24:18.661189  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1514 12:24:18.667802  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1515 12:24:18.673995  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1516 12:24:18.677609  Chrome EC: Set WAKE mask to 0x0000000000000000

 1517 12:24:18.681033  Root Device init finished in 35234 usecs

 1518 12:24:18.684481  CPU_CLUSTER: 0 init ...

 1519 12:24:18.691162  CPU_CLUSTER: 0 init finished in 2448 usecs

 1520 12:24:18.695309  PCI: 00:00.0 init ...

 1521 12:24:18.698949  CPU TDP: 15 Watts

 1522 12:24:18.701819  CPU PL2 = 64 Watts

 1523 12:24:18.705300  PCI: 00:00.0 init finished in 7086 usecs

 1524 12:24:18.708467  PCI: 00:02.0 init ...

 1525 12:24:18.711939  PCI: 00:02.0 init finished in 2253 usecs

 1526 12:24:18.715596  PCI: 00:08.0 init ...

 1527 12:24:18.718529  PCI: 00:08.0 init finished in 2253 usecs

 1528 12:24:18.721876  PCI: 00:12.0 init ...

 1529 12:24:18.725003  PCI: 00:12.0 init finished in 2252 usecs

 1530 12:24:18.728495  PCI: 00:14.0 init ...

 1531 12:24:18.731956  PCI: 00:14.0 init finished in 2243 usecs

 1532 12:24:18.735442  PCI: 00:14.2 init ...

 1533 12:24:18.738459  PCI: 00:14.2 init finished in 2253 usecs

 1534 12:24:18.741586  PCI: 00:14.3 init ...

 1535 12:24:18.745077  PCI: 00:14.3 init finished in 2272 usecs

 1536 12:24:18.748302  PCI: 00:15.0 init ...

 1537 12:24:18.751778  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1538 12:24:18.755260  PCI: 00:15.0 init finished in 5977 usecs

 1539 12:24:18.758184  PCI: 00:15.1 init ...

 1540 12:24:18.761848  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1541 12:24:18.767886  PCI: 00:15.1 init finished in 5969 usecs

 1542 12:24:18.767982  PCI: 00:16.0 init ...

 1543 12:24:18.774623  PCI: 00:16.0 init finished in 2253 usecs

 1544 12:24:18.774728  PCI: 00:19.0 init ...

 1545 12:24:18.781389  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1546 12:24:18.784614  PCI: 00:19.0 init finished in 5977 usecs

 1547 12:24:18.787879  PCI: 00:1d.0 init ...

 1548 12:24:18.791398  Initializing PCH PCIe bridge.

 1549 12:24:18.794316  PCI: 00:1d.0 init finished in 5285 usecs

 1550 12:24:18.797850  PCI: 00:1f.0 init ...

 1551 12:24:18.801532  IOAPIC: Initializing IOAPIC at 0xfec00000

 1552 12:24:18.808086  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1553 12:24:18.808178  IOAPIC: ID = 0x02

 1554 12:24:18.811345  IOAPIC: Dumping registers

 1555 12:24:18.814717    reg 0x0000: 0x02000000

 1556 12:24:18.817533    reg 0x0001: 0x00770020

 1557 12:24:18.817623    reg 0x0002: 0x00000000

 1558 12:24:18.824072  PCI: 00:1f.0 init finished in 23534 usecs

 1559 12:24:18.827451  PCI: 00:1f.4 init ...

 1560 12:24:18.831025  PCI: 00:1f.4 init finished in 2262 usecs

 1561 12:24:18.841472  PCI: 01:00.0 init ...

 1562 12:24:18.845057  PCI: 01:00.0 init finished in 2245 usecs

 1563 12:24:18.849100  PNP: 0c09.0 init ...

 1564 12:24:18.852475  Google Chrome EC uptime: 11.054 seconds

 1565 12:24:18.859218  Google Chrome AP resets since EC boot: 0

 1566 12:24:18.862003  Google Chrome most recent AP reset causes:

 1567 12:24:18.869042  Google Chrome EC reset flags at last EC boot: reset-pin

 1568 12:24:18.872366  PNP: 0c09.0 init finished in 20571 usecs

 1569 12:24:18.875350  Devices initialized

 1570 12:24:18.875462  Show all devs... After init.

 1571 12:24:18.878687  Root Device: enabled 1

 1572 12:24:18.881889  CPU_CLUSTER: 0: enabled 1

 1573 12:24:18.885244  DOMAIN: 0000: enabled 1

 1574 12:24:18.885345  APIC: 00: enabled 1

 1575 12:24:18.888881  PCI: 00:00.0: enabled 1

 1576 12:24:18.892160  PCI: 00:02.0: enabled 1

 1577 12:24:18.895386  PCI: 00:04.0: enabled 0

 1578 12:24:18.895487  PCI: 00:05.0: enabled 0

 1579 12:24:18.898775  PCI: 00:12.0: enabled 1

 1580 12:24:18.902264  PCI: 00:12.5: enabled 0

 1581 12:24:18.902384  PCI: 00:12.6: enabled 0

 1582 12:24:18.905349  PCI: 00:14.0: enabled 1

 1583 12:24:18.908785  PCI: 00:14.1: enabled 0

 1584 12:24:18.912276  PCI: 00:14.3: enabled 1

 1585 12:24:18.912380  PCI: 00:14.5: enabled 0

 1586 12:24:18.915354  PCI: 00:15.0: enabled 1

 1587 12:24:18.918578  PCI: 00:15.1: enabled 1

 1588 12:24:18.921803  PCI: 00:15.2: enabled 0

 1589 12:24:18.921895  PCI: 00:15.3: enabled 0

 1590 12:24:18.925627  PCI: 00:16.0: enabled 1

 1591 12:24:18.928322  PCI: 00:16.1: enabled 0

 1592 12:24:18.932045  PCI: 00:16.2: enabled 0

 1593 12:24:18.932147  PCI: 00:16.3: enabled 0

 1594 12:24:18.935440  PCI: 00:16.4: enabled 0

 1595 12:24:18.938448  PCI: 00:16.5: enabled 0

 1596 12:24:18.938539  PCI: 00:17.0: enabled 1

 1597 12:24:18.941682  PCI: 00:19.0: enabled 1

 1598 12:24:18.944849  PCI: 00:19.1: enabled 0

 1599 12:24:18.948248  PCI: 00:19.2: enabled 0

 1600 12:24:18.948380  PCI: 00:1a.0: enabled 0

 1601 12:24:18.951399  PCI: 00:1c.0: enabled 0

 1602 12:24:18.954947  PCI: 00:1c.1: enabled 0

 1603 12:24:18.958407  PCI: 00:1c.2: enabled 0

 1604 12:24:18.958501  PCI: 00:1c.3: enabled 0

 1605 12:24:18.961539  PCI: 00:1c.4: enabled 0

 1606 12:24:18.965091  PCI: 00:1c.5: enabled 0

 1607 12:24:18.968522  PCI: 00:1c.6: enabled 0

 1608 12:24:18.968699  PCI: 00:1c.7: enabled 0

 1609 12:24:18.971416  PCI: 00:1d.0: enabled 1

 1610 12:24:18.974984  PCI: 00:1d.1: enabled 0

 1611 12:24:18.978685  PCI: 00:1d.2: enabled 0

 1612 12:24:18.978784  PCI: 00:1d.3: enabled 0

 1613 12:24:18.981237  PCI: 00:1d.4: enabled 0

 1614 12:24:18.984904  PCI: 00:1d.5: enabled 0

 1615 12:24:18.985000  PCI: 00:1e.0: enabled 1

 1616 12:24:18.988473  PCI: 00:1e.1: enabled 0

 1617 12:24:18.991179  PCI: 00:1e.2: enabled 1

 1618 12:24:18.994912  PCI: 00:1e.3: enabled 1

 1619 12:24:18.995035  PCI: 00:1f.0: enabled 1

 1620 12:24:18.998011  PCI: 00:1f.1: enabled 0

 1621 12:24:19.001480  PCI: 00:1f.2: enabled 0

 1622 12:24:19.004719  PCI: 00:1f.3: enabled 1

 1623 12:24:19.004814  PCI: 00:1f.4: enabled 1

 1624 12:24:19.008314  PCI: 00:1f.5: enabled 1

 1625 12:24:19.011194  PCI: 00:1f.6: enabled 0

 1626 12:24:19.014736  USB0 port 0: enabled 1

 1627 12:24:19.014829  I2C: 01:15: enabled 1

 1628 12:24:19.017827  I2C: 02:5d: enabled 1

 1629 12:24:19.021348  GENERIC: 0.0: enabled 1

 1630 12:24:19.021442  I2C: 03:1a: enabled 1

 1631 12:24:19.024640  I2C: 03:38: enabled 1

 1632 12:24:19.027841  I2C: 03:39: enabled 1

 1633 12:24:19.027936  I2C: 03:3a: enabled 1

 1634 12:24:19.030886  I2C: 03:3b: enabled 1

 1635 12:24:19.034497  PCI: 00:00.0: enabled 1

 1636 12:24:19.034594  SPI: 00: enabled 1

 1637 12:24:19.037973  SPI: 01: enabled 1

 1638 12:24:19.041083  PNP: 0c09.0: enabled 1

 1639 12:24:19.041184  USB2 port 0: enabled 1

 1640 12:24:19.044427  USB2 port 1: enabled 1

 1641 12:24:19.047950  USB2 port 2: enabled 0

 1642 12:24:19.048100  USB2 port 3: enabled 0

 1643 12:24:19.050826  USB2 port 5: enabled 0

 1644 12:24:19.054390  USB2 port 6: enabled 1

 1645 12:24:19.057263  USB2 port 9: enabled 1

 1646 12:24:19.057439  USB3 port 0: enabled 1

 1647 12:24:19.060950  USB3 port 1: enabled 1

 1648 12:24:19.064184  USB3 port 2: enabled 1

 1649 12:24:19.064331  USB3 port 3: enabled 1

 1650 12:24:19.067713  USB3 port 4: enabled 0

 1651 12:24:19.071070  APIC: 01: enabled 1

 1652 12:24:19.071190  APIC: 06: enabled 1

 1653 12:24:19.074129  APIC: 03: enabled 1

 1654 12:24:19.077906  APIC: 07: enabled 1

 1655 12:24:19.078030  APIC: 02: enabled 1

 1656 12:24:19.080687  APIC: 05: enabled 1

 1657 12:24:19.080802  APIC: 04: enabled 1

 1658 12:24:19.083893  PCI: 00:08.0: enabled 1

 1659 12:24:19.087131  PCI: 00:14.2: enabled 1

 1660 12:24:19.090501  PCI: 01:00.0: enabled 1

 1661 12:24:19.094538  Disabling ACPI via APMC:

 1662 12:24:19.094699  done.

 1663 12:24:19.100965  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1664 12:24:19.104610  ELOG: NV offset 0xaf0000 size 0x4000

 1665 12:24:19.110729  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1666 12:24:19.117240  ELOG: Event(17) added with size 13 at 2023-11-08 12:23:54 UTC

 1667 12:24:19.124253  ELOG: Event(92) added with size 9 at 2023-11-08 12:23:54 UTC

 1668 12:24:19.130492  ELOG: Event(93) added with size 9 at 2023-11-08 12:23:54 UTC

 1669 12:24:19.137325  ELOG: Event(9A) added with size 9 at 2023-11-08 12:23:54 UTC

 1670 12:24:19.143822  ELOG: Event(9E) added with size 10 at 2023-11-08 12:23:54 UTC

 1671 12:24:19.150357  ELOG: Event(9F) added with size 14 at 2023-11-08 12:23:54 UTC

 1672 12:24:19.153898  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6

 1673 12:24:19.160920  ELOG: Event(A1) added with size 10 at 2023-11-08 12:23:54 UTC

 1674 12:24:19.170834  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1675 12:24:19.177240  ELOG: Event(A0) added with size 9 at 2023-11-08 12:23:54 UTC

 1676 12:24:19.180584  elog_add_boot_reason: Logged dev mode boot

 1677 12:24:19.180711  Finalize devices...

 1678 12:24:19.183925  PCI: 00:17.0 final

 1679 12:24:19.187609  Devices finalized

 1680 12:24:19.190872  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1681 12:24:19.197336  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1682 12:24:19.201168  ME: HFSTS1                  : 0x90000245

 1683 12:24:19.204050  ME: HFSTS2                  : 0x3B850126

 1684 12:24:19.210582  ME: HFSTS3                  : 0x00000020

 1685 12:24:19.213647  ME: HFSTS4                  : 0x00004800

 1686 12:24:19.217127  ME: HFSTS5                  : 0x00000000

 1687 12:24:19.220328  ME: HFSTS6                  : 0x40400006

 1688 12:24:19.223764  ME: Manufacturing Mode      : NO

 1689 12:24:19.226916  ME: FW Partition Table      : OK

 1690 12:24:19.230253  ME: Bringup Loader Failure  : NO

 1691 12:24:19.233864  ME: Firmware Init Complete  : YES

 1692 12:24:19.237154  ME: Boot Options Present    : NO

 1693 12:24:19.240523  ME: Update In Progress      : NO

 1694 12:24:19.243390  ME: D0i3 Support            : YES

 1695 12:24:19.246844  ME: Low Power State Enabled : NO

 1696 12:24:19.250509  ME: CPU Replaced            : NO

 1697 12:24:19.253552  ME: CPU Replacement Valid   : YES

 1698 12:24:19.256970  ME: Current Working State   : 5

 1699 12:24:19.259945  ME: Current Operation State : 1

 1700 12:24:19.263623  ME: Current Operation Mode  : 0

 1701 12:24:19.266962  ME: Error Code              : 0

 1702 12:24:19.270558  ME: CPU Debug Disabled      : YES

 1703 12:24:19.273379  ME: TXT Support             : NO

 1704 12:24:19.279790  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1705 12:24:19.286468  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1706 12:24:19.286557  CBFS @ c08000 size 3f8000

 1707 12:24:19.293458  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1708 12:24:19.296463  CBFS: Locating 'fallback/dsdt.aml'

 1709 12:24:19.299823  CBFS: Found @ offset 10bb80 size 3fa5

 1710 12:24:19.306754  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1711 12:24:19.309994  CBFS @ c08000 size 3f8000

 1712 12:24:19.313129  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1713 12:24:19.316462  CBFS: Locating 'fallback/slic'

 1714 12:24:19.321948  CBFS: 'fallback/slic' not found.

 1715 12:24:19.327904  ACPI: Writing ACPI tables at 99b3e000.

 1716 12:24:19.327994  ACPI:    * FACS

 1717 12:24:19.331562  ACPI:    * DSDT

 1718 12:24:19.334550  Ramoops buffer: 0x100000@0x99a3d000.

 1719 12:24:19.338043  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1720 12:24:19.344301  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1721 12:24:19.347800  Google Chrome EC: version:

 1722 12:24:19.351182  	ro: helios_v2.0.2659-56403530b

 1723 12:24:19.354479  	rw: helios_v2.0.2849-c41de27e7d

 1724 12:24:19.354578    running image: 1

 1725 12:24:19.358600  ACPI:    * FADT

 1726 12:24:19.358690  SCI is IRQ9

 1727 12:24:19.365584  ACPI: added table 1/32, length now 40

 1728 12:24:19.365668  ACPI:     * SSDT

 1729 12:24:19.368474  Found 1 CPU(s) with 8 core(s) each.

 1730 12:24:19.371870  Error: Could not locate 'wifi_sar' in VPD.

 1731 12:24:19.378304  Checking CBFS for default SAR values

 1732 12:24:19.381746  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1733 12:24:19.385481  CBFS @ c08000 size 3f8000

 1734 12:24:19.391867  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1735 12:24:19.395328  CBFS: Locating 'wifi_sar_defaults.hex'

 1736 12:24:19.398343  CBFS: Found @ offset 5fac0 size 77

 1737 12:24:19.401853  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1738 12:24:19.405332  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1739 12:24:19.411722  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1740 12:24:19.418705  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1741 12:24:19.421603  failed to find key in VPD: dsm_calib_r0_0

 1742 12:24:19.431624  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1743 12:24:19.434861  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1744 12:24:19.438453  failed to find key in VPD: dsm_calib_r0_1

 1745 12:24:19.448143  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1746 12:24:19.455032  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1747 12:24:19.458047  failed to find key in VPD: dsm_calib_r0_2

 1748 12:24:19.468065  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1749 12:24:19.471468  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1750 12:24:19.477888  failed to find key in VPD: dsm_calib_r0_3

 1751 12:24:19.484271  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1752 12:24:19.491158  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1753 12:24:19.494100  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1754 12:24:19.497768  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1755 12:24:19.501771  EC returned error result code 1

 1756 12:24:19.505293  EC returned error result code 1

 1757 12:24:19.508866  EC returned error result code 1

 1758 12:24:19.515376  PS2K: Bad resp from EC. Vivaldi disabled!

 1759 12:24:19.518814  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1760 12:24:19.525389  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1761 12:24:19.531900  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1762 12:24:19.535469  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1763 12:24:19.542154  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1764 12:24:19.548741  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1765 12:24:19.555160  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1766 12:24:19.558533  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1767 12:24:19.565084  ACPI: added table 2/32, length now 44

 1768 12:24:19.565185  ACPI:    * MCFG

 1769 12:24:19.568441  ACPI: added table 3/32, length now 48

 1770 12:24:19.571646  ACPI:    * TPM2

 1771 12:24:19.574841  TPM2 log created at 99a2d000

 1772 12:24:19.578337  ACPI: added table 4/32, length now 52

 1773 12:24:19.578420  ACPI:    * MADT

 1774 12:24:19.581850  SCI is IRQ9

 1775 12:24:19.584890  ACPI: added table 5/32, length now 56

 1776 12:24:19.584971  current = 99b43ac0

 1777 12:24:19.587953  ACPI:    * DMAR

 1778 12:24:19.591221  ACPI: added table 6/32, length now 60

 1779 12:24:19.594788  ACPI:    * IGD OpRegion

 1780 12:24:19.597855  GMA: Found VBT in CBFS

 1781 12:24:19.597934  GMA: Found valid VBT in CBFS

 1782 12:24:19.604736  ACPI: added table 7/32, length now 64

 1783 12:24:19.604829  ACPI:    * HPET

 1784 12:24:19.608199  ACPI: added table 8/32, length now 68

 1785 12:24:19.611054  ACPI: done.

 1786 12:24:19.611141  ACPI tables: 31744 bytes.

 1787 12:24:19.615031  smbios_write_tables: 99a2c000

 1788 12:24:19.618491  EC returned error result code 3

 1789 12:24:19.621522  Couldn't obtain OEM name from CBI

 1790 12:24:19.624991  Create SMBIOS type 17

 1791 12:24:19.628591  PCI: 00:00.0 (Intel Cannonlake)

 1792 12:24:19.631457  PCI: 00:14.3 (Intel WiFi)

 1793 12:24:19.635060  SMBIOS tables: 939 bytes.

 1794 12:24:19.638019  Writing table forward entry at 0x00000500

 1795 12:24:19.645123  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1796 12:24:19.647983  Writing coreboot table at 0x99b62000

 1797 12:24:19.654621   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1798 12:24:19.657871   1. 0000000000001000-000000000009ffff: RAM

 1799 12:24:19.664639   2. 00000000000a0000-00000000000fffff: RESERVED

 1800 12:24:19.668098   3. 0000000000100000-0000000099a2bfff: RAM

 1801 12:24:19.674459   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1802 12:24:19.677775   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1803 12:24:19.684414   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1804 12:24:19.687333   7. 000000009a000000-000000009f7fffff: RESERVED

 1805 12:24:19.694354   8. 00000000e0000000-00000000efffffff: RESERVED

 1806 12:24:19.697718   9. 00000000fc000000-00000000fc000fff: RESERVED

 1807 12:24:19.704418  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1808 12:24:19.707799  11. 00000000fed10000-00000000fed17fff: RESERVED

 1809 12:24:19.710771  12. 00000000fed80000-00000000fed83fff: RESERVED

 1810 12:24:19.717313  13. 00000000fed90000-00000000fed91fff: RESERVED

 1811 12:24:19.720751  14. 00000000feda0000-00000000feda1fff: RESERVED

 1812 12:24:19.727482  15. 0000000100000000-000000045e7fffff: RAM

 1813 12:24:19.730305  Graphics framebuffer located at 0xc0000000

 1814 12:24:19.733973  Passing 5 GPIOs to payload:

 1815 12:24:19.737505              NAME |       PORT | POLARITY |     VALUE

 1816 12:24:19.743883     write protect |  undefined |     high |       low

 1817 12:24:19.750294               lid |  undefined |     high |      high

 1818 12:24:19.753736             power |  undefined |     high |       low

 1819 12:24:19.760183             oprom |  undefined |     high |       low

 1820 12:24:19.763474          EC in RW | 0x000000cb |     high |       low

 1821 12:24:19.767284  Board ID: 4

 1822 12:24:19.770634  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1823 12:24:19.773369  CBFS @ c08000 size 3f8000

 1824 12:24:19.779940  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1825 12:24:19.786643  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264

 1826 12:24:19.790401  coreboot table: 1492 bytes.

 1827 12:24:19.793528  IMD ROOT    0. 99fff000 00001000

 1828 12:24:19.796491  IMD SMALL   1. 99ffe000 00001000

 1829 12:24:19.799849  FSP MEMORY  2. 99c4e000 003b0000

 1830 12:24:19.803469  CONSOLE     3. 99c2e000 00020000

 1831 12:24:19.806967  FMAP        4. 99c2d000 0000054e

 1832 12:24:19.809935  TIME STAMP  5. 99c2c000 00000910

 1833 12:24:19.813435  VBOOT WORK  6. 99c18000 00014000

 1834 12:24:19.816838  MRC DATA    7. 99c16000 00001958

 1835 12:24:19.820634  ROMSTG STCK 8. 99c15000 00001000

 1836 12:24:19.823719  AFTER CAR   9. 99c0b000 0000a000

 1837 12:24:19.826391  RAMSTAGE   10. 99baf000 0005c000

 1838 12:24:19.830007  REFCODE    11. 99b7a000 00035000

 1839 12:24:19.833203  SMM BACKUP 12. 99b6a000 00010000

 1840 12:24:19.836477  COREBOOT   13. 99b62000 00008000

 1841 12:24:19.840076  ACPI       14. 99b3e000 00024000

 1842 12:24:19.843596  ACPI GNVS  15. 99b3d000 00001000

 1843 12:24:19.846474  RAMOOPS    16. 99a3d000 00100000

 1844 12:24:19.850077  TPM2 TCGLOG17. 99a2d000 00010000

 1845 12:24:19.853168  SMBIOS     18. 99a2c000 00000800

 1846 12:24:19.853250  IMD small region:

 1847 12:24:19.856384    IMD ROOT    0. 99ffec00 00000400

 1848 12:24:19.859946    FSP RUNTIME 1. 99ffebe0 00000004

 1849 12:24:19.863345    EC HOSTEVENT 2. 99ffebc0 00000008

 1850 12:24:19.866703    POWER STATE 3. 99ffeb80 00000040

 1851 12:24:19.870173    ROMSTAGE    4. 99ffeb60 00000004

 1852 12:24:19.873231    MEM INFO    5. 99ffe9a0 000001b9

 1853 12:24:19.879863    VPD         6. 99ffe920 0000006c

 1854 12:24:19.879952  MTRR: Physical address space:

 1855 12:24:19.886250  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1856 12:24:19.893288  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1857 12:24:19.899451  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1858 12:24:19.906318  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1859 12:24:19.912719  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1860 12:24:19.919728  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1861 12:24:19.925909  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1862 12:24:19.929095  MTRR: Fixed MSR 0x250 0x0606060606060606

 1863 12:24:19.932650  MTRR: Fixed MSR 0x258 0x0606060606060606

 1864 12:24:19.936112  MTRR: Fixed MSR 0x259 0x0000000000000000

 1865 12:24:19.942622  MTRR: Fixed MSR 0x268 0x0606060606060606

 1866 12:24:19.945781  MTRR: Fixed MSR 0x269 0x0606060606060606

 1867 12:24:19.949374  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1868 12:24:19.952335  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1869 12:24:19.959346  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1870 12:24:19.962177  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1871 12:24:19.965946  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1872 12:24:19.968830  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1873 12:24:19.972204  call enable_fixed_mtrr()

 1874 12:24:19.975846  CPU physical address size: 39 bits

 1875 12:24:19.982325  MTRR: default type WB/UC MTRR counts: 6/8.

 1876 12:24:19.985701  MTRR: WB selected as default type.

 1877 12:24:19.992158  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1878 12:24:19.995630  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1879 12:24:20.001984  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1880 12:24:20.008526  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1881 12:24:20.015508  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1882 12:24:20.022290  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1883 12:24:20.025263  MTRR: Fixed MSR 0x250 0x0606060606060606

 1884 12:24:20.032012  MTRR: Fixed MSR 0x258 0x0606060606060606

 1885 12:24:20.035514  MTRR: Fixed MSR 0x259 0x0000000000000000

 1886 12:24:20.038541  MTRR: Fixed MSR 0x268 0x0606060606060606

 1887 12:24:20.042138  MTRR: Fixed MSR 0x269 0x0606060606060606

 1888 12:24:20.048885  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1889 12:24:20.051927  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1890 12:24:20.055387  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1891 12:24:20.058521  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1892 12:24:20.065242  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1893 12:24:20.068816  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1894 12:24:20.068896  

 1895 12:24:20.068967  MTRR check

 1896 12:24:20.071747  Fixed MTRRs   : Enabled

 1897 12:24:20.075365  Variable MTRRs: Enabled

 1898 12:24:20.075449  

 1899 12:24:20.078615  call enable_fixed_mtrr()

 1900 12:24:20.082279  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1901 12:24:20.085397  CPU physical address size: 39 bits

 1902 12:24:20.092018  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1903 12:24:20.094958  CBFS @ c08000 size 3f8000

 1904 12:24:20.098424  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1905 12:24:20.102086  CBFS: Locating 'fallback/payload'

 1906 12:24:20.108504  MTRR: Fixed MSR 0x250 0x0606060606060606

 1907 12:24:20.111902  MTRR: Fixed MSR 0x258 0x0606060606060606

 1908 12:24:20.114922  MTRR: Fixed MSR 0x259 0x0000000000000000

 1909 12:24:20.118019  MTRR: Fixed MSR 0x268 0x0606060606060606

 1910 12:24:20.125075  MTRR: Fixed MSR 0x269 0x0606060606060606

 1911 12:24:20.128009  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1912 12:24:20.131403  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1913 12:24:20.134705  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1914 12:24:20.141626  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1915 12:24:20.144589  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1916 12:24:20.148077  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1917 12:24:20.151543  CBFS: Found @ offset 1c96c0 size 3f798

 1918 12:24:20.154474  call enable_fixed_mtrr()

 1919 12:24:20.158064  MTRR: Fixed MSR 0x250 0x0606060606060606

 1920 12:24:20.161076  CPU physical address size: 39 bits

 1921 12:24:20.167793  MTRR: Fixed MSR 0x258 0x0606060606060606

 1922 12:24:20.171898  MTRR: Fixed MSR 0x259 0x0000000000000000

 1923 12:24:20.174925  MTRR: Fixed MSR 0x268 0x0606060606060606

 1924 12:24:20.178250  MTRR: Fixed MSR 0x269 0x0606060606060606

 1925 12:24:20.184410  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1926 12:24:20.187970  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1927 12:24:20.190998  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1928 12:24:20.194344  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1929 12:24:20.197993  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1930 12:24:20.204400  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1931 12:24:20.208099  Checking segment from ROM address 0xffdd16f8

 1932 12:24:20.210967  call enable_fixed_mtrr()

 1933 12:24:20.214502  MTRR: Fixed MSR 0x250 0x0606060606060606

 1934 12:24:20.217828  MTRR: Fixed MSR 0x250 0x0606060606060606

 1935 12:24:20.224262  MTRR: Fixed MSR 0x258 0x0606060606060606

 1936 12:24:20.227565  MTRR: Fixed MSR 0x259 0x0000000000000000

 1937 12:24:20.230774  MTRR: Fixed MSR 0x268 0x0606060606060606

 1938 12:24:20.234157  MTRR: Fixed MSR 0x269 0x0606060606060606

 1939 12:24:20.237706  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1940 12:24:20.244213  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1941 12:24:20.247445  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1942 12:24:20.250438  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1943 12:24:20.254328  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1944 12:24:20.260764  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1945 12:24:20.263638  MTRR: Fixed MSR 0x258 0x0606060606060606

 1946 12:24:20.267035  call enable_fixed_mtrr()

 1947 12:24:20.270500  MTRR: Fixed MSR 0x259 0x0000000000000000

 1948 12:24:20.273971  MTRR: Fixed MSR 0x268 0x0606060606060606

 1949 12:24:20.277357  MTRR: Fixed MSR 0x269 0x0606060606060606

 1950 12:24:20.283752  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1951 12:24:20.286815  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1952 12:24:20.290477  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1953 12:24:20.294096  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1954 12:24:20.300455  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1955 12:24:20.303462  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1956 12:24:20.306984  CPU physical address size: 39 bits

 1957 12:24:20.310510  call enable_fixed_mtrr()

 1958 12:24:20.313476  Checking segment from ROM address 0xffdd1714

 1959 12:24:20.317232  CPU physical address size: 39 bits

 1960 12:24:20.319966  CPU physical address size: 39 bits

 1961 12:24:20.327056  Loading segment from ROM address 0xffdd16f8

 1962 12:24:20.330022  MTRR: Fixed MSR 0x250 0x0606060606060606

 1963 12:24:20.333300  MTRR: Fixed MSR 0x258 0x0606060606060606

 1964 12:24:20.336469  MTRR: Fixed MSR 0x259 0x0000000000000000

 1965 12:24:20.343457  MTRR: Fixed MSR 0x268 0x0606060606060606

 1966 12:24:20.346402  MTRR: Fixed MSR 0x269 0x0606060606060606

 1967 12:24:20.350197  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1968 12:24:20.353088  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1969 12:24:20.359661  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1970 12:24:20.363407  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1971 12:24:20.366600  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1972 12:24:20.369972  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1973 12:24:20.376416  MTRR: Fixed MSR 0x250 0x0606060606060606

 1974 12:24:20.376507  call enable_fixed_mtrr()

 1975 12:24:20.383608  MTRR: Fixed MSR 0x258 0x0606060606060606

 1976 12:24:20.386495  MTRR: Fixed MSR 0x259 0x0000000000000000

 1977 12:24:20.389893  MTRR: Fixed MSR 0x268 0x0606060606060606

 1978 12:24:20.393240  MTRR: Fixed MSR 0x269 0x0606060606060606

 1979 12:24:20.396441  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1980 12:24:20.402860  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1981 12:24:20.406423  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1982 12:24:20.409564  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1983 12:24:20.413007  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1984 12:24:20.419510  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1985 12:24:20.422989  CPU physical address size: 39 bits

 1986 12:24:20.426268  call enable_fixed_mtrr()

 1987 12:24:20.426387    code (compression=0)

 1988 12:24:20.436314    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1989 12:24:20.439793  CPU physical address size: 39 bits

 1990 12:24:20.449450  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1991 12:24:20.449537  it's not compressed!

 1992 12:24:20.542182  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1993 12:24:20.548737  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1994 12:24:20.551938  Loading segment from ROM address 0xffdd1714

 1995 12:24:20.555459    Entry Point 0x30000000

 1996 12:24:20.559103  Loaded segments

 1997 12:24:20.564185  Finalizing chipset.

 1998 12:24:20.567705  Finalizing SMM.

 1999 12:24:20.571319  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2000 12:24:20.574388  mp_park_aps done after 0 msecs.

 2001 12:24:20.581168  Jumping to boot code at 30000000(99b62000)

 2002 12:24:20.587626  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2003 12:24:20.587718  

 2004 12:24:20.587791  

 2005 12:24:20.587857  

 2006 12:24:20.590651  Starting depthcharge on Helios...

 2007 12:24:20.590735  

 2008 12:24:20.591103  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2009 12:24:20.591220  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2010 12:24:20.591319  Setting prompt string to ['hatch:']
 2011 12:24:20.591410  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2012 12:24:20.600727  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2013 12:24:20.600824  

 2014 12:24:20.607278  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2015 12:24:20.607366  

 2016 12:24:20.613785  board_setup: Info: eMMC controller not present; skipping

 2017 12:24:20.613881  

 2018 12:24:20.617372  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2019 12:24:20.617466  

 2020 12:24:20.623989  board_setup: Info: SDHCI controller not present; skipping

 2021 12:24:20.624083  

 2022 12:24:20.630522  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2023 12:24:20.630619  

 2024 12:24:20.630694  Wipe memory regions:

 2025 12:24:20.630763  

 2026 12:24:20.633797  	[0x00000000001000, 0x000000000a0000)

 2027 12:24:20.633890  

 2028 12:24:20.637506  	[0x00000000100000, 0x00000030000000)

 2029 12:24:20.703679  

 2030 12:24:20.706741  	[0x00000030657430, 0x00000099a2c000)

 2031 12:24:20.853520  

 2032 12:24:20.856277  	[0x00000100000000, 0x0000045e800000)

 2033 12:24:22.312146  

 2034 12:24:22.312306  R8152: Initializing

 2035 12:24:22.312397  

 2036 12:24:22.315336  Version 9 (ocp_data = 6010)

 2037 12:24:22.320104  

 2038 12:24:22.320198  R8152: Done initializing

 2039 12:24:22.320274  

 2040 12:24:22.323098  Adding net device

 2041 12:24:22.805761  

 2042 12:24:22.805913  R8152: Initializing

 2043 12:24:22.805994  

 2044 12:24:22.809298  Version 6 (ocp_data = 5c30)

 2045 12:24:22.809379  

 2046 12:24:22.812386  R8152: Done initializing

 2047 12:24:22.812503  

 2048 12:24:22.815976  net_add_device: Attemp to include the same device

 2049 12:24:22.819335  

 2050 12:24:22.826450  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2051 12:24:22.826538  

 2052 12:24:22.826616  

 2053 12:24:22.826685  

 2054 12:24:22.826980  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2056 12:24:22.927304  hatch: tftpboot 192.168.201.1 11967644/tftp-deploy-9fg29701/kernel/bzImage 11967644/tftp-deploy-9fg29701/kernel/cmdline 11967644/tftp-deploy-9fg29701/ramdisk/ramdisk.cpio.gz

 2057 12:24:22.927474  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2058 12:24:22.927566  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2059 12:24:22.932131  tftpboot 192.168.201.1 11967644/tftp-deploy-9fg29701/kernel/bzIploy-9fg29701/kernel/cmdline 11967644/tftp-deploy-9fg29701/ramdisk/ramdisk.cpio.gz

 2060 12:24:22.932223  

 2061 12:24:22.932301  Waiting for link

 2062 12:24:23.132684  

 2063 12:24:23.132822  done.

 2064 12:24:23.132897  

 2065 12:24:23.132973  MAC: 00:24:32:50:1a:59

 2066 12:24:23.133044  

 2067 12:24:23.135909  Sending DHCP discover... done.

 2068 12:24:23.135997  

 2069 12:24:23.139282  Waiting for reply... done.

 2070 12:24:23.139363  

 2071 12:24:23.142938  Sending DHCP request... done.

 2072 12:24:23.143029  

 2073 12:24:23.146306  Waiting for reply... done.

 2074 12:24:23.146392  

 2075 12:24:23.149564  My ip is 192.168.201.14

 2076 12:24:23.149647  

 2077 12:24:23.152788  The DHCP server ip is 192.168.201.1

 2078 12:24:23.152876  

 2079 12:24:23.155810  TFTP server IP predefined by user: 192.168.201.1

 2080 12:24:23.155922  

 2081 12:24:23.162474  Bootfile predefined by user: 11967644/tftp-deploy-9fg29701/kernel/bzImage

 2082 12:24:23.162583  

 2083 12:24:23.165974  Sending tftp read request... done.

 2084 12:24:23.166066  

 2085 12:24:23.173113  Waiting for the transfer... 

 2086 12:24:23.173216  

 2087 12:24:23.708644  00000000 ################################################################

 2088 12:24:23.708787  

 2089 12:24:24.246131  00080000 ################################################################

 2090 12:24:24.246274  

 2091 12:24:24.777917  00100000 ################################################################

 2092 12:24:24.778096  

 2093 12:24:25.316459  00180000 ################################################################

 2094 12:24:25.316641  

 2095 12:24:25.851833  00200000 ################################################################

 2096 12:24:25.852019  

 2097 12:24:26.386585  00280000 ################################################################

 2098 12:24:26.386776  

 2099 12:24:26.910059  00300000 ################################################################

 2100 12:24:26.910237  

 2101 12:24:27.440429  00380000 ################################################################

 2102 12:24:27.440612  

 2103 12:24:27.971617  00400000 ################################################################

 2104 12:24:27.971792  

 2105 12:24:28.508673  00480000 ################################################################

 2106 12:24:28.508847  

 2107 12:24:29.049808  00500000 ################################################################

 2108 12:24:29.049982  

 2109 12:24:29.587695  00580000 ################################################################

 2110 12:24:29.587880  

 2111 12:24:30.126682  00600000 ################################################################

 2112 12:24:30.126866  

 2113 12:24:30.659629  00680000 ################################################################

 2114 12:24:30.659787  

 2115 12:24:31.194415  00700000 ################################################################

 2116 12:24:31.194573  

 2117 12:24:31.730038  00780000 ################################################################

 2118 12:24:31.730219  

 2119 12:24:32.263318  00800000 ################################################################

 2120 12:24:32.263509  

 2121 12:24:32.797017  00880000 ################################################################

 2122 12:24:32.797184  

 2123 12:24:33.334046  00900000 ################################################################

 2124 12:24:33.334196  

 2125 12:24:33.917712  00980000 ################################################################

 2126 12:24:33.917868  

 2127 12:24:34.526965  00a00000 ################################################################

 2128 12:24:34.527478  

 2129 12:24:35.212296  00a80000 ################################################################

 2130 12:24:35.212907  

 2131 12:24:35.264487  00b00000 ##### done.

 2132 12:24:35.265021  

 2133 12:24:35.267657  The bootfile was 11571200 bytes long.

 2134 12:24:35.268193  

 2135 12:24:35.270572  Sending tftp read request... done.

 2136 12:24:35.271001  

 2137 12:24:35.273746  Waiting for the transfer... 

 2138 12:24:35.274194  

 2139 12:24:35.888462  00000000 ################################################################

 2140 12:24:35.888612  

 2141 12:24:36.455925  00080000 ################################################################

 2142 12:24:36.456074  

 2143 12:24:37.020616  00100000 ################################################################

 2144 12:24:37.020760  

 2145 12:24:37.565615  00180000 ################################################################

 2146 12:24:37.565792  

 2147 12:24:38.180710  00200000 ################################################################

 2148 12:24:38.181280  

 2149 12:24:38.858302  00280000 ################################################################

 2150 12:24:38.858534  

 2151 12:24:39.485184  00300000 ################################################################

 2152 12:24:39.485362  

 2153 12:24:40.094484  00380000 ################################################################

 2154 12:24:40.094986  

 2155 12:24:40.805187  00400000 ################################################################

 2156 12:24:40.805706  

 2157 12:24:41.516649  00480000 ################################################################

 2158 12:24:41.517228  

 2159 12:24:42.234262  00500000 ################################################################

 2160 12:24:42.234790  

 2161 12:24:42.948704  00580000 ################################################################

 2162 12:24:42.949419  

 2163 12:24:43.093221  00600000 ############# done.

 2164 12:24:43.093777  

 2165 12:24:43.096460  Sending tftp read request... done.

 2166 12:24:43.096923  

 2167 12:24:43.100173  Waiting for the transfer... 

 2168 12:24:43.100642  

 2169 12:24:43.100986  00000000 # done.

 2170 12:24:43.101310  

 2171 12:24:43.110169  Command line loaded dynamically from TFTP file: 11967644/tftp-deploy-9fg29701/kernel/cmdline

 2172 12:24:43.110758  

 2173 12:24:43.140122  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11967644/extract-nfsrootfs-m14r2q5l,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2174 12:24:43.140698  

 2175 12:24:43.143098  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2176 12:24:43.149776  

 2177 12:24:43.153451  Shutting down all USB controllers.

 2178 12:24:43.153969  

 2179 12:24:43.154307  Removing current net device

 2180 12:24:43.157282  

 2181 12:24:43.157706  Finalizing coreboot

 2182 12:24:43.158048  

 2183 12:24:43.163667  Exiting depthcharge with code 4 at timestamp: 29926988

 2184 12:24:43.164094  

 2185 12:24:43.164477  

 2186 12:24:43.164799  Starting kernel ...

 2187 12:24:43.165103  

 2188 12:24:43.165403  

 2189 12:24:43.166848  end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
 2190 12:24:43.167341  start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
 2191 12:24:43.167720  Setting prompt string to ['Linux version [0-9]']
 2192 12:24:43.168061  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2193 12:24:43.168446  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2195 12:29:02.168425  end: 2.2.5 auto-login-action (duration 00:04:19) [common]
 2197 12:29:02.169548  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
 2199 12:29:02.170423  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2202 12:29:02.172001  end: 2 depthcharge-action (duration 00:05:00) [common]
 2204 12:29:02.173212  Cleaning after the job
 2205 12:29:02.173310  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967644/tftp-deploy-9fg29701/ramdisk
 2206 12:29:02.174448  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967644/tftp-deploy-9fg29701/kernel
 2207 12:29:02.176343  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967644/tftp-deploy-9fg29701/nfsrootfs
 2208 12:29:02.304972  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11967644/tftp-deploy-9fg29701/modules
 2209 12:29:02.305769  start: 4.1 power-off (timeout 00:00:30) [common]
 2210 12:29:02.305960  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
 2211 12:29:02.393358  >> Command sent successfully.

 2212 12:29:02.404012  Returned 0 in 0 seconds
 2213 12:29:02.505240  end: 4.1 power-off (duration 00:00:00) [common]
 2215 12:29:02.506646  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2216 12:29:02.507828  Listened to connection for namespace 'common' for up to 1s
 2218 12:29:02.509136  Listened to connection for namespace 'common' for up to 1s
 2219 12:29:03.508517  Finalising connection for namespace 'common'
 2220 12:29:03.509141  Disconnecting from shell: Finalise
 2221 12:29:03.509666  
 2222 12:29:03.610901  end: 4.2 read-feedback (duration 00:00:01) [common]
 2223 12:29:03.611545  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11967644
 2224 12:29:04.165962  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11967644
 2225 12:29:04.166179  JobError: Your job cannot terminate cleanly.