Boot log: acer-chromebox-cxi4-puff
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 12:17:39.880204 lava-dispatcher, installed at version: 2023.10
2 12:17:39.880429 start: 0 validate
3 12:17:39.880570 Start time: 2023-12-08 12:17:39.880563+00:00 (UTC)
4 12:17:39.880703 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:17:39.880839 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:17:40.162135 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:17:40.162306 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:17:40.441780 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:17:40.442002 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:17:48.320942 validate duration: 8.44
12 12:17:48.321233 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:17:48.321340 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:17:48.321432 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:17:48.321554 Not decompressing ramdisk as can be used compressed.
16 12:17:48.321643 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:17:48.321711 saving as /var/lib/lava/dispatcher/tmp/12217913/tftp-deploy-yljilj5t/ramdisk/rootfs.cpio.gz
18 12:17:48.321775 total size: 8418130 (8 MB)
19 12:17:49.087734 progress 0 % (0 MB)
20 12:17:49.090182 progress 5 % (0 MB)
21 12:17:49.092499 progress 10 % (0 MB)
22 12:17:49.094871 progress 15 % (1 MB)
23 12:17:49.097218 progress 20 % (1 MB)
24 12:17:49.099550 progress 25 % (2 MB)
25 12:17:49.101853 progress 30 % (2 MB)
26 12:17:49.104021 progress 35 % (2 MB)
27 12:17:49.106382 progress 40 % (3 MB)
28 12:17:49.108680 progress 45 % (3 MB)
29 12:17:49.111018 progress 50 % (4 MB)
30 12:17:49.113368 progress 55 % (4 MB)
31 12:17:49.115725 progress 60 % (4 MB)
32 12:17:49.117808 progress 65 % (5 MB)
33 12:17:49.120104 progress 70 % (5 MB)
34 12:17:49.122504 progress 75 % (6 MB)
35 12:17:49.124837 progress 80 % (6 MB)
36 12:17:49.127198 progress 85 % (6 MB)
37 12:17:49.129458 progress 90 % (7 MB)
38 12:17:49.131744 progress 95 % (7 MB)
39 12:17:49.133846 progress 100 % (8 MB)
40 12:17:49.134123 8 MB downloaded in 0.81 s (9.88 MB/s)
41 12:17:49.134306 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:17:49.134546 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:17:49.134638 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:17:49.134726 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:17:49.134883 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:17:49.134978 saving as /var/lib/lava/dispatcher/tmp/12217913/tftp-deploy-yljilj5t/kernel/bzImage
48 12:17:49.135072 total size: 11571200 (11 MB)
49 12:17:49.135159 No compression specified
50 12:17:49.136588 progress 0 % (0 MB)
51 12:17:49.139801 progress 5 % (0 MB)
52 12:17:49.143007 progress 10 % (1 MB)
53 12:17:49.146257 progress 15 % (1 MB)
54 12:17:49.149411 progress 20 % (2 MB)
55 12:17:49.152718 progress 25 % (2 MB)
56 12:17:49.155904 progress 30 % (3 MB)
57 12:17:49.159185 progress 35 % (3 MB)
58 12:17:49.162697 progress 40 % (4 MB)
59 12:17:49.166003 progress 45 % (4 MB)
60 12:17:49.169161 progress 50 % (5 MB)
61 12:17:49.172530 progress 55 % (6 MB)
62 12:17:49.175661 progress 60 % (6 MB)
63 12:17:49.179003 progress 65 % (7 MB)
64 12:17:49.182332 progress 70 % (7 MB)
65 12:17:49.185357 progress 75 % (8 MB)
66 12:17:49.188756 progress 80 % (8 MB)
67 12:17:49.191936 progress 85 % (9 MB)
68 12:17:49.195078 progress 90 % (9 MB)
69 12:17:49.198378 progress 95 % (10 MB)
70 12:17:49.203509 progress 100 % (11 MB)
71 12:17:49.203779 11 MB downloaded in 0.07 s (160.63 MB/s)
72 12:17:49.204043 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:17:49.204678 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:17:49.204919 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:17:49.205116 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:17:49.205381 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:17:49.205566 saving as /var/lib/lava/dispatcher/tmp/12217913/tftp-deploy-yljilj5t/modules/modules.tar
79 12:17:49.205695 total size: 483904 (0 MB)
80 12:17:49.205828 Using unxz to decompress xz
81 12:17:49.211667 progress 6 % (0 MB)
82 12:17:49.212399 progress 13 % (0 MB)
83 12:17:49.212812 progress 20 % (0 MB)
84 12:17:49.214408 progress 27 % (0 MB)
85 12:17:49.216632 progress 33 % (0 MB)
86 12:17:49.218805 progress 40 % (0 MB)
87 12:17:49.220911 progress 47 % (0 MB)
88 12:17:49.222968 progress 54 % (0 MB)
89 12:17:49.225163 progress 60 % (0 MB)
90 12:17:49.227423 progress 67 % (0 MB)
91 12:17:49.229552 progress 74 % (0 MB)
92 12:17:49.231857 progress 81 % (0 MB)
93 12:17:49.234215 progress 88 % (0 MB)
94 12:17:49.236511 progress 94 % (0 MB)
95 12:17:49.239328 progress 100 % (0 MB)
96 12:17:49.246627 0 MB downloaded in 0.04 s (11.28 MB/s)
97 12:17:49.247107 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:17:49.247707 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:17:49.247938 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 12:17:49.248114 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 12:17:49.248272 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:17:49.248447 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 12:17:49.248803 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp
105 12:17:49.249039 makedir: /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin
106 12:17:49.249226 makedir: /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/tests
107 12:17:49.249408 makedir: /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/results
108 12:17:49.249611 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-add-keys
109 12:17:49.249873 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-add-sources
110 12:17:49.250178 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-background-process-start
111 12:17:49.250401 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-background-process-stop
112 12:17:49.250746 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-common-functions
113 12:17:49.250972 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-echo-ipv4
114 12:17:49.251191 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-install-packages
115 12:17:49.251410 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-installed-packages
116 12:17:49.251731 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-os-build
117 12:17:49.251948 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-probe-channel
118 12:17:49.252170 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-probe-ip
119 12:17:49.252388 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-target-ip
120 12:17:49.252607 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-target-mac
121 12:17:49.252824 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-target-storage
122 12:17:49.253047 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-test-case
123 12:17:49.253233 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-test-event
124 12:17:49.253401 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-test-feedback
125 12:17:49.253572 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-test-raise
126 12:17:49.253743 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-test-reference
127 12:17:49.253954 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-test-runner
128 12:17:49.254118 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-test-set
129 12:17:49.254295 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-test-shell
130 12:17:49.254469 Updating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-install-packages (oe)
131 12:17:49.254715 Updating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/bin/lava-installed-packages (oe)
132 12:17:49.254922 Creating /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/environment
133 12:17:49.255145 LAVA metadata
134 12:17:49.255288 - LAVA_JOB_ID=12217913
135 12:17:49.255463 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:17:49.255658 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 12:17:49.255795 skipped lava-vland-overlay
138 12:17:49.255943 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:17:49.256098 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 12:17:49.256226 skipped lava-multinode-overlay
141 12:17:49.256371 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:17:49.256526 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 12:17:49.256680 Loading test definitions
144 12:17:49.256862 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 12:17:49.257012 Using /lava-12217913 at stage 0
146 12:17:49.257632 uuid=12217913_1.4.2.3.1 testdef=None
147 12:17:49.257811 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:17:49.258018 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 12:17:49.259084 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:17:49.259595 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 12:17:49.260879 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:17:49.261426 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 12:17:49.270479 runner path: /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/0/tests/0_dmesg test_uuid 12217913_1.4.2.3.1
156 12:17:49.270792 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:17:49.271354 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 12:17:49.271536 Using /lava-12217913 at stage 1
160 12:17:49.272161 uuid=12217913_1.4.2.3.5 testdef=None
161 12:17:49.272357 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:17:49.272518 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 12:17:49.273549 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:17:49.274087 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 12:17:49.275392 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:17:49.275973 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 12:17:49.280721 runner path: /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/1/tests/1_bootrr test_uuid 12217913_1.4.2.3.5
170 12:17:49.281040 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:17:49.281558 Creating lava-test-runner.conf files
173 12:17:49.281709 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/0 for stage 0
174 12:17:49.281900 - 0_dmesg
175 12:17:49.282065 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217913/lava-overlay-fpgkzqlp/lava-12217913/1 for stage 1
176 12:17:49.282257 - 1_bootrr
177 12:17:49.282457 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:17:49.282648 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 12:17:49.293822 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:17:49.294057 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 12:17:49.294148 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:17:49.294238 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:17:49.294358 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 12:17:49.552034 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:17:49.552427 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 12:17:49.552555 extracting modules file /var/lib/lava/dispatcher/tmp/12217913/tftp-deploy-yljilj5t/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217913/extract-overlay-ramdisk-718mt8h1/ramdisk
187 12:17:49.575395 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:17:49.575563 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 12:17:49.575665 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12217913/compress-overlay-fmn9q4pk/overlay-1.4.2.4.tar.gz to ramdisk
190 12:17:49.575741 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12217913/compress-overlay-fmn9q4pk/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12217913/extract-overlay-ramdisk-718mt8h1/ramdisk
191 12:17:49.585193 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:17:49.585337 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 12:17:49.585436 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:17:49.585527 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 12:17:49.585610 Building ramdisk /var/lib/lava/dispatcher/tmp/12217913/extract-overlay-ramdisk-718mt8h1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12217913/extract-overlay-ramdisk-718mt8h1/ramdisk
196 12:17:49.833039 >> 53982 blocks
197 12:17:50.730960 rename /var/lib/lava/dispatcher/tmp/12217913/extract-overlay-ramdisk-718mt8h1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12217913/tftp-deploy-yljilj5t/ramdisk/ramdisk.cpio.gz
198 12:17:50.731414 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:17:50.731580 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 12:17:50.731677 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 12:17:50.731776 No mkimage arch provided, not using FIT.
202 12:17:50.731867 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:17:50.731957 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:17:50.732056 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 12:17:50.732149 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 12:17:50.732267 No LXC device requested
207 12:17:50.732349 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:17:50.732438 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 12:17:50.732518 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:17:50.732592 Checking files for TFTP limit of 4294967296 bytes.
211 12:17:50.733035 end: 1 tftp-deploy (duration 00:00:02) [common]
212 12:17:50.733145 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:17:50.733237 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:17:50.733356 substitutions:
215 12:17:50.733424 - {DTB}: None
216 12:17:50.733485 - {INITRD}: 12217913/tftp-deploy-yljilj5t/ramdisk/ramdisk.cpio.gz
217 12:17:50.733544 - {KERNEL}: 12217913/tftp-deploy-yljilj5t/kernel/bzImage
218 12:17:50.733601 - {LAVA_MAC}: None
219 12:17:50.733657 - {PRESEED_CONFIG}: None
220 12:17:50.733712 - {PRESEED_LOCAL}: None
221 12:17:50.733766 - {RAMDISK}: 12217913/tftp-deploy-yljilj5t/ramdisk/ramdisk.cpio.gz
222 12:17:50.733821 - {ROOT_PART}: None
223 12:17:50.733925 - {ROOT}: None
224 12:17:50.733982 - {SERVER_IP}: 192.168.201.1
225 12:17:50.734036 - {TEE}: None
226 12:17:50.734090 Parsed boot commands:
227 12:17:50.734144 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:17:50.734378 Parsed boot commands: tftpboot 192.168.201.1 12217913/tftp-deploy-yljilj5t/kernel/bzImage 12217913/tftp-deploy-yljilj5t/kernel/cmdline 12217913/tftp-deploy-yljilj5t/ramdisk/ramdisk.cpio.gz
229 12:17:50.734480 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:17:50.734565 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:17:50.734662 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:17:50.734748 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:17:50.734818 Not connected, no need to disconnect.
234 12:17:50.734928 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:17:50.735040 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:17:50.735106 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi4-puff-cbg-5'
237 12:17:50.738807 Setting prompt string to ['lava-test: # ']
238 12:17:50.739207 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:17:50.739322 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:17:50.739417 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:17:50.739511 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:17:50.739700 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-5' '--port=1' '--command=reboot'
243 12:17:57.335948 >> Command sent successfully.
244 12:17:57.339297 Returned 0 in 6 seconds
245 12:17:57.439700 end: 2.2.2.1 pdu-reboot (duration 00:00:07) [common]
247 12:17:57.440038 end: 2.2.2 reset-device (duration 00:00:07) [common]
248 12:17:57.440141 start: 2.2.3 depthcharge-start (timeout 00:04:53) [common]
249 12:17:57.440231 Setting prompt string to 'Starting depthcharge on Kaisa...'
250 12:17:57.440298 Changing prompt to 'Starting depthcharge on Kaisa...'
251 12:17:57.440364 depthcharge-start: Wait for prompt Starting depthcharge on Kaisa... (timeout 00:05:00)
252 12:17:57.440627 [Enter `^Ec?' for help]
253 12:17:57.789006 �
254 12:17:57.789156
255 12:17:57.799468 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 bootblock starting (log level: 8)...
256 12:17:57.804689 CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz
257 12:17:57.810131 CPU: ID a0660, Cometlake-U A0 (6+2), ucode: 000000c9
258 12:17:57.815195 CPU: AES supported, TXT NOT supported, VT supported
259 12:17:57.819928 MCH: device id 9b71 (rev 00) is CometLake-U (2+2)
260 12:17:57.824876 PCH: device id 0285 (rev 00) is Cometlake-U Base
261 12:17:57.830189 IGD: device id 9baa (rev 04) is CometLake ULT GT2
262 12:17:57.833380 VBOOT: Loading verstage.
263 12:17:57.838212 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 12:17:57.843443 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
265 12:17:57.848338 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 12:17:57.851923 CBFS: Locating 'fallback/verstage'
267 12:17:57.856095 CBFS: Found @ offset 10c240 size 1152c
268 12:17:57.857461
269 12:17:57.857546
270 12:17:57.868449 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 verstage starting (log level: 8)...
271 12:17:57.882712 Probing TPM: . done!
272 12:17:57.885332 TPM ready after 0 ms
273 12:17:57.890230 Connected to device vid:did:rid of 1ae0:0028:00
274 12:17:57.900446 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
275 12:17:57.904641 Initialized TPM device CR50 revision 0
276 12:17:57.978154 tlcl_send_startup: Startup return code is 0
277 12:17:57.979570 TPM: setup succeeded
278 12:17:57.992817 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 12:17:58.005661 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 12:17:58.013475 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 12:17:58.026896 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 12:17:58.030156 Chrome EC: UHEPI supported
283 12:17:58.031528 Phase 1
284 12:17:58.035595 FMAP: area GBB found @ c05000 (12288 bytes)
285 12:17:58.043052 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
286 12:17:58.049091 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
287 12:17:58.052400 Recovery requested (1009000e)
288 12:17:58.058165 TPM: Extending digest for VBOOT: boot mode into PCR 0
289 12:17:58.067920 tlcl_extend: response is 0
290 12:17:58.072618 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
291 12:17:58.082002 tlcl_extend: response is 0
292 12:17:58.087245 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
293 12:17:58.090601 CBFS: Locating 'fallback/romstage'
294 12:17:58.094704 CBFS: Found @ offset 80 size 1607c
295 12:17:58.100220 BS: verstage times (exec / console): total (unknown) / 119 ms
296 12:17:58.102010
297 12:17:58.102106
298 12:17:58.113057 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 romstage starting (log level: 8)...
299 12:17:58.118902 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
300 12:17:58.124542 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
301 12:17:58.128749 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
302 12:17:58.132830 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
303 12:17:58.137052 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
304 12:17:58.141453 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
305 12:17:58.143615 TCO_STS: 0000 0000
306 12:17:58.146716 GEN_PMCON: e0015038 00000200
307 12:17:58.150305 GBLRST_CAUSE: 00000000 00000000
308 12:17:58.151495 prev_sleep_state 5
309 12:17:58.155361 Boot Count incremented to 18294
310 12:17:58.160953 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
311 12:17:58.163586 CBFS: Locating 'fspm.bin'
312 12:17:58.167684 CBFS: Found @ offset 66fc0 size 71000
313 12:17:58.171361 Chrome EC: UHEPI supported
314 12:17:58.176991 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
315 12:17:58.181732 Probing TPM: done!
316 12:17:58.187144 Connected to device vid:did:rid of 1ae0:0028:00
317 12:17:58.197328 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
318 12:17:58.200843 Initialized TPM device CR50 revision 0
319 12:17:58.214450 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
320 12:17:58.221083 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
321 12:17:58.223846 MRC cache found, size 1948
322 12:17:58.226196 bootmode is set to: 2
323 12:17:58.228324 PRMRR disabled by config.
324 12:17:58.233738 FMAP: area RW_SPD_CACHE found @ aff000 (4096 bytes)
325 12:17:58.237896 SPD_CACHE: cache found, size 0x1000
326 12:17:58.240638 No memory dimm at address 50
327 12:17:58.244076 SPD_CACHE: DIMM0 is not present
328 12:17:58.249588 SPD_CACHE: DIMM1 is the same
329 12:17:58.250722 SPD @ 0x52
330 12:17:58.253694 SPD: module type is DDR4
331 12:17:58.258205 SPD: module part number is HMA851S6CJR6N-VK
332 12:17:58.264135 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
333 12:17:58.268871 SPD: device width 16 bits, bus width 64 bits
334 12:17:58.273168 SPD: module size is 4096 MB (per channel)
335 12:17:58.276482 memory slot: 2 configuration done.
336 12:17:58.324970 CBMEM:
337 12:17:58.328558 IMD: root @ 0x99fff000 254 entries.
338 12:17:58.331454 IMD: root @ 0x99ffec00 62 entries.
339 12:17:58.336779 FMAP: area RO_VPD found @ c00000 (16384 bytes)
340 12:17:58.341202 WARNING: RO_VPD is uninitialized or empty.
341 12:17:58.345219 FMAP: area RW_VPD found @ af8000 (8192 bytes)
342 12:17:58.348649 External stage cache:
343 12:17:58.353130 IMD: root @ 0x9abff000 254 entries.
344 12:17:58.355858 IMD: root @ 0x9abfec00 62 entries.
345 12:17:58.370534 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
346 12:17:58.380083 tlcl_write: response is 0
347 12:17:58.384447 MRC: TPM MRC hash updated successfully.
348 12:17:58.385365 1 DIMMs found
349 12:17:58.386776 SMM Memory Map
350 12:17:58.390806 SMRAM : 0x9a000000 0x1000000
351 12:17:58.394082 Subregion 0: 0x9a000000 0xa00000
352 12:17:58.397589 Subregion 1: 0x9aa00000 0x200000
353 12:17:58.401366 Subregion 2: 0x9ac00000 0x400000
354 12:17:58.403579 top_of_ram = 0x9a000000
355 12:17:58.408751 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
356 12:17:58.414291 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
357 12:17:58.418726 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 12:17:58.423974 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 12:17:58.427065 CBFS: Locating 'fallback/postcar'
360 12:17:58.430854 CBFS: Found @ offset 1076c0 size 4b28
361 12:17:58.437133 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
362 12:17:58.448367 Loading module at 0x99c0c000 with entry 0x99c0c000. filesize: 0x4818 memsize: 0x8af8
363 12:17:58.453029 Processing 173 relocs. Offset value of 0x97c0c000
364 12:17:58.461408 BS: romstage times (exec / console): total (unknown) / 267 ms
365 12:17:58.461712
366 12:17:58.461793
367 12:17:58.472271 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 postcar starting (log level: 8)...
368 12:17:58.477378 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
369 12:17:58.481005 CBFS: Locating 'fallback/ramstage'
370 12:17:58.485465 CBFS: Found @ offset 44e00 size 1e0ef
371 12:17:58.491606 Decompressing stage fallback/ramstage @ 0x99ba4fc0 (415200 bytes)
372 12:17:58.522308 Loading module at 0x99ba5000 with entry 0x99ba5000. filesize: 0x46598 memsize: 0x655a0
373 12:17:58.527792 Processing 4604 relocs. Offset value of 0x98da5000
374 12:17:58.533621 BS: postcar times (exec / console): total (unknown) / 43 ms
375 12:17:58.533725
376 12:17:58.534528
377 12:17:58.544749 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 ramstage starting (log level: 8)...
378 12:17:58.546220 Normal boot
379 12:17:58.551860 cse_lite: Skip switching to RW in the recovery path
380 12:17:58.557422 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 5 ms
381 12:17:58.562816 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
382 12:17:58.565928 CBFS: Locating 'cpu_microcode_blob.bin'
383 12:17:58.570485 CBFS: Found @ offset 16180 size 2ec00
384 12:17:58.574662 microcode: sig=0xa0660 pf=0x80 revision=0xc9
385 12:17:58.577020 Skip microcode update
386 12:17:58.581544 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
387 12:17:58.585114 CBFS: Locating 'fsps.bin'
388 12:17:58.588218 CBFS: Found @ offset d8fc0 size 2e69d
389 12:17:58.624055 Detected 2 core, 2 thread CPU.
390 12:17:58.626398 Setting up SMI for CPU
391 12:17:58.628789 IED base = 0x9ac00000
392 12:17:58.631156 IED size = 0x00400000
393 12:17:58.633653 Will perform SMM setup.
394 12:17:58.638056 CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz.
395 12:17:58.645929 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
396 12:17:58.650749 Processing 16 relocs. Offset value of 0x00030000
397 12:17:58.654022 Attempting to start 1 APs
398 12:17:58.657242 Waiting for 10ms after sending INIT.
399 12:17:58.671782 Waiting for 1st SIPI to complete...done.
400 12:17:58.673720 AP: slot 1 apic_id 2.
401 12:17:58.677878 Waiting for 2nd SIPI to complete...done.
402 12:17:58.686274 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
403 12:17:58.690714 Processing 13 relocs. Offset value of 0x00038000
404 12:17:58.698462 SMM Module: stub loaded at 0x00038000. Will call 0x99bc2760(0x00000000)
405 12:17:58.701836 Installing SMM handler to 0x9a000000
406 12:17:58.709956 Loading module at 0x9a010000 with entry 0x9a010a30. filesize: 0x7bc8 memsize: 0xcc90
407 12:17:58.714921 Processing 617 relocs. Offset value of 0x9a010000
408 12:17:58.723221 Loading module at 0x9a008000 with entry 0x9a008000. filesize: 0x1b8 memsize: 0x1b8
409 12:17:58.728004 Processing 13 relocs. Offset value of 0x9a008000
410 12:17:58.733994 SMM Module: placing jmp sequence at 0x9a007c00 rel16 0x03fd
411 12:17:58.741238 SMM Module: stub loaded at 0x9a008000. Will call 0x9a010a30(0x00000000)
412 12:17:58.744425 Clearing SMI status registers
413 12:17:58.746409 SMI_STS: PM1
414 12:17:58.747534 PM1_STS: PWRBTN
415 12:17:58.749764 New SMBASE 0x9a000000
416 12:17:58.752654 In relocation handler: CPU 0
417 12:17:58.757040 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
418 12:17:58.762254 Writing SMRR. base = 0x9a000006, mask=0xff000800
419 12:17:58.764645 Relocation complete.
420 12:17:58.766491 New SMBASE 0x99fffc00
421 12:17:58.769457 In relocation handler: CPU 1
422 12:17:58.773099 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
423 12:17:58.778406 Writing SMRR. base = 0x9a000006, mask=0xff000800
424 12:17:58.780250 Relocation complete.
425 12:17:58.782579 Initializing CPU #0
426 12:17:58.785912 CPU: vendor Intel device a0660
427 12:17:58.789720 CPU: family 06, model a6, stepping 00
428 12:17:58.792082 Clearing out pending MCEs
429 12:17:58.795006 Setting up local APIC...
430 12:17:58.796659 apic_id: 0x00 done.
431 12:17:58.800194 Turbo is available but hidden
432 12:17:58.801683 Turbo is unavailable
433 12:17:58.804183 VMX status: enabled
434 12:17:58.808271 IA32_FEATURE_CONTROL status: locked
435 12:17:58.810481 Skip microcode update
436 12:17:58.811648 CPU #0 initialized
437 12:17:58.813853 Initializing CPU #1
438 12:17:58.817197 CPU: vendor Intel device a0660
439 12:17:58.821378 CPU: family 06, model a6, stepping 00
440 12:17:58.824006 Clearing out pending MCEs
441 12:17:58.826403 Setting up local APIC...
442 12:17:58.828975 apic_id: 0x02 done.
443 12:17:58.830094 VMX status: enabled
444 12:17:58.834196 IA32_FEATURE_CONTROL status: locked
445 12:17:58.836428 Skip microcode update
446 12:17:58.838642 CPU #1 initialized
447 12:17:58.843143 bsp_do_flight_plan done after 160 msecs.
448 12:17:58.844633 Enabling SMIs.
449 12:17:58.845317 Locking SMM.
450 12:17:58.852338 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 89 / 199 ms
451 12:17:58.863156 Waiting for DisplayPort
452 12:18:01.881142 DisplayPort not ready after 3000ms. Abort.
453 12:18:01.886851 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 12:18:01.889376 CBFS: Locating 'vbt.bin'
455 12:18:01.893663 CBFS: Found @ offset 66a80 size 49e
456 12:18:01.898368 Found a VBT of 4608 bytes after decompression
457 12:18:01.899889 psys_pmax = 182W
458 12:18:01.948461 Display FSP Version Info HOB
459 12:18:01.952150 Reference Code - CPU = 9.0.1e.30
460 12:18:01.954243 uCode Version = 0.0.0.ca
461 12:18:01.958184 TXT ACM version = ff.ff.ff.ffff
462 12:18:01.961165 Reference Code - ME = 9.0.1e.30
463 12:18:01.963135 MEBx version = 0.0.0.0
464 12:18:01.966312 ME Firmware Version = Consumer SKU
465 12:18:01.970707 Reference Code - CML PCH = 9.0.1e.30
466 12:18:01.973296 PCH-CRID Status = Disabled
467 12:18:01.977668 PCH-CRID Original Value = ff.ff.ff.ffff
468 12:18:01.980751 PCH-CRID New Value = ff.ff.ff.ffff
469 12:18:01.984106 OPROM - RST - RAID = ff.ff.ff.ffff
470 12:18:01.988581 ChipsetInit Base Version = ff.ff.ff.ffff
471 12:18:01.991796 ChipsetInit Oem Version = ff.ff.ff.ffff
472 12:18:01.997241 Reference Code - SA - System Agent = 9.0.1e.30
473 12:18:02.000222 Reference Code - MRC = 0.0.0.2d
474 12:18:02.003195 SA - PCIe Version = 9.0.1e.30
475 12:18:02.005403 SA-CRID Status = Disabled
476 12:18:02.009141 SA-CRID Original Value = 0.0.0.0
477 12:18:02.011627 SA-CRID New Value = 0.0.0.0
478 12:18:02.014622 OPROM - VBIOS = ff.ff.ff.ffff
479 12:18:02.019227 Found PCIe Root Port #7 at PCI: 00:1c.0.
480 12:18:02.026225 Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.
481 12:18:02.037777 pcie_rp_update_dev: Couldn't find PCIe Root Port #9 (originally PCI: 00:1d.0) which was enabled in devicetree, removing.
482 12:18:02.050177 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
483 12:18:02.061892 pcie_rp_update_dev: Couldn't find PCIe Root Port #14 (originally PCI: 00:1d.5) which was enabled in devicetree, removing.
484 12:18:02.068772 BS: BS_DEV_INIT_CHIPS run times (exec / console): 3063 / 140 ms
485 12:18:02.069831 RTC Init
486 12:18:02.073588 Set power on after power failure.
487 12:18:02.075497 Disabling Deep S3
488 12:18:02.077585 Disabling Deep S3
489 12:18:02.079046 Disabling Deep S4
490 12:18:02.080735 Disabling Deep S4
491 12:18:02.083106 Disabling Deep S5
492 12:18:02.084897 Disabling Deep S5
493 12:18:02.090771 BS: BS_DEV_INIT_CHIPS exit times (exec / console): 1 / 15 ms
494 12:18:02.092722 Enumerating buses...
495 12:18:02.097492 Show all devs... Before device enumeration.
496 12:18:02.099771 Root Device: enabled 1
497 12:18:02.102507 CPU_CLUSTER: 0: enabled 1
498 12:18:02.105084 DOMAIN: 0000: enabled 1
499 12:18:02.107070 APIC: 00: enabled 1
500 12:18:02.109265 PCI: 00:00.0: enabled 1
501 12:18:02.111561 PCI: 00:02.0: enabled 1
502 12:18:02.113831 PCI: 00:04.0: enabled 1
503 12:18:02.116627 PCI: 00:05.0: enabled 0
504 12:18:02.119158 PCI: 00:12.0: enabled 1
505 12:18:02.121687 PCI: 00:12.5: enabled 0
506 12:18:02.124290 PCI: 00:12.6: enabled 0
507 12:18:02.125818 PCI: 00:14.0: enabled 1
508 12:18:02.129099 PCI: 00:14.1: enabled 0
509 12:18:02.131099 PCI: 00:14.3: enabled 1
510 12:18:02.133500 PCI: 00:14.5: enabled 1
511 12:18:02.135711 PCI: 00:15.0: enabled 0
512 12:18:02.138557 PCI: 00:15.1: enabled 0
513 12:18:02.141103 PCI: 00:15.2: enabled 1
514 12:18:02.143650 PCI: 00:15.3: enabled 1
515 12:18:02.146187 PCI: 00:16.0: enabled 1
516 12:18:02.148224 PCI: 00:16.1: enabled 0
517 12:18:02.150267 PCI: 00:16.2: enabled 0
518 12:18:02.152675 PCI: 00:16.3: enabled 0
519 12:18:02.155517 PCI: 00:16.4: enabled 0
520 12:18:02.157911 PCI: 00:16.5: enabled 0
521 12:18:02.160618 PCI: 00:17.0: enabled 1
522 12:18:02.163100 PCI: 00:19.0: enabled 1
523 12:18:02.165633 PCI: 00:19.1: enabled 0
524 12:18:02.168165 PCI: 00:19.2: enabled 0
525 12:18:02.170109 PCI: 00:1a.0: enabled 1
526 12:18:02.172575 PCI: 00:1c.0: enabled 0
527 12:18:02.174914 PCI: 00:1c.1: enabled 0
528 12:18:02.177001 PCI: 00:1c.2: enabled 0
529 12:18:02.180002 PCI: 00:1c.3: enabled 0
530 12:18:02.181997 PCI: 00:1c.4: enabled 0
531 12:18:02.184371 PCI: 00:1c.5: enabled 0
532 12:18:02.186680 PCI: 00:1c.0: enabled 1
533 12:18:02.189382 PCI: 00:1c.7: enabled 0
534 12:18:02.191778 PCI: 00:1d.0: enabled 1
535 12:18:02.194101 PCI: 00:1d.1: enabled 0
536 12:18:02.196849 PCI: 00:1d.2: enabled 1
537 12:18:02.198944 PCI: 00:1d.3: enabled 0
538 12:18:02.201597 PCI: 00:1d.4: enabled 0
539 12:18:02.204189 PCI: 00:1d.5: enabled 1
540 12:18:02.207006 PCI: 00:1e.0: enabled 1
541 12:18:02.209025 PCI: 00:1e.1: enabled 0
542 12:18:02.211653 PCI: 00:1e.2: enabled 1
543 12:18:02.214283 PCI: 00:1e.3: enabled 0
544 12:18:02.216523 PCI: 00:1f.0: enabled 1
545 12:18:02.218357 PCI: 00:1f.1: enabled 1
546 12:18:02.221321 PCI: 00:1f.2: enabled 1
547 12:18:02.223634 PCI: 00:1f.3: enabled 1
548 12:18:02.225730 PCI: 00:1f.4: enabled 1
549 12:18:02.228374 PCI: 00:1f.5: enabled 1
550 12:18:02.230883 PCI: 00:1f.6: enabled 0
551 12:18:02.232950 GENERIC: 0.0: enabled 1
552 12:18:02.235497 USB0 port 0: enabled 1
553 12:18:02.237981 I2C: 00:4a: enabled 1
554 12:18:02.240234 I2C: 00:4a: enabled 1
555 12:18:02.241953 I2C: 00:1a: enabled 1
556 12:18:02.244857 PCI: 00:00.0: enabled 1
557 12:18:02.247525 PCI: 00:00.0: enabled 1
558 12:18:02.249128 SPI: 00: enabled 1
559 12:18:02.251195 PNP: 0c09.0: enabled 1
560 12:18:02.253687 USB2 port 0: enabled 1
561 12:18:02.256410 USB2 port 1: enabled 1
562 12:18:02.258873 USB2 port 2: enabled 1
563 12:18:02.260819 USB2 port 3: enabled 1
564 12:18:02.262830 USB2 port 5: enabled 1
565 12:18:02.265813 USB2 port 6: enabled 0
566 12:18:02.267915 USB2 port 9: enabled 1
567 12:18:02.269859 USB3 port 0: enabled 1
568 12:18:02.273117 USB3 port 1: enabled 1
569 12:18:02.274809 USB3 port 2: enabled 1
570 12:18:02.277639 USB3 port 3: enabled 1
571 12:18:02.279339 USB3 port 4: enabled 1
572 12:18:02.281937 USB2 port 4: enabled 1
573 12:18:02.284366 USB3 port 5: enabled 1
574 12:18:02.286257 APIC: 02: enabled 1
575 12:18:02.288206 Compare with tree...
576 12:18:02.290828 Root Device: enabled 1
577 12:18:02.293494 CPU_CLUSTER: 0: enabled 1
578 12:18:02.296024 APIC: 00: enabled 1
579 12:18:02.298139 APIC: 02: enabled 1
580 12:18:02.300545 DOMAIN: 0000: enabled 1
581 12:18:02.303167 PCI: 00:00.0: enabled 1
582 12:18:02.305582 PCI: 00:02.0: enabled 1
583 12:18:02.308051 PCI: 00:04.0: enabled 1
584 12:18:02.311142 GENERIC: 0.0: enabled 1
585 12:18:02.313459 PCI: 00:05.0: enabled 0
586 12:18:02.315990 PCI: 00:12.0: enabled 1
587 12:18:02.318703 PCI: 00:12.5: enabled 0
588 12:18:02.322079 PCI: 00:12.6: enabled 0
589 12:18:02.324453 PCI: 00:14.0: enabled 1
590 12:18:02.326988 USB0 port 0: enabled 1
591 12:18:02.329276 USB2 port 0: enabled 1
592 12:18:02.332698 USB2 port 1: enabled 1
593 12:18:02.335227 USB2 port 2: enabled 1
594 12:18:02.337714 USB2 port 3: enabled 1
595 12:18:02.340704 USB2 port 5: enabled 1
596 12:18:02.343243 USB2 port 6: enabled 0
597 12:18:02.345820 USB2 port 9: enabled 1
598 12:18:02.348420 USB3 port 0: enabled 1
599 12:18:02.351814 USB3 port 1: enabled 1
600 12:18:02.354350 USB3 port 2: enabled 1
601 12:18:02.356537 USB3 port 3: enabled 1
602 12:18:02.359712 USB3 port 4: enabled 1
603 12:18:02.362326 USB2 port 4: enabled 1
604 12:18:02.365276 USB3 port 5: enabled 1
605 12:18:02.367301 PCI: 00:14.1: enabled 0
606 12:18:02.370495 PCI: 00:14.3: enabled 1
607 12:18:02.372701 PCI: 00:14.5: enabled 1
608 12:18:02.375196 PCI: 00:15.0: enabled 0
609 12:18:02.378198 PCI: 00:15.1: enabled 0
610 12:18:02.381256 PCI: 00:15.2: enabled 1
611 12:18:02.383074 I2C: 00:4a: enabled 1
612 12:18:02.385896 PCI: 00:15.3: enabled 1
613 12:18:02.388089 I2C: 00:4a: enabled 1
614 12:18:02.391387 PCI: 00:16.0: enabled 1
615 12:18:02.393865 PCI: 00:16.1: enabled 0
616 12:18:02.395934 PCI: 00:16.2: enabled 0
617 12:18:02.398875 PCI: 00:16.3: enabled 0
618 12:18:02.401204 PCI: 00:16.4: enabled 0
619 12:18:02.404044 PCI: 00:16.5: enabled 0
620 12:18:02.407035 PCI: 00:17.0: enabled 1
621 12:18:02.409665 PCI: 00:19.0: enabled 1
622 12:18:02.411677 I2C: 00:1a: enabled 1
623 12:18:02.414900 PCI: 00:19.1: enabled 0
624 12:18:02.417688 PCI: 00:19.2: enabled 0
625 12:18:02.419916 PCI: 00:1a.0: enabled 1
626 12:18:02.422184 PCI: 00:1c.0: enabled 1
627 12:18:02.425244 PCI: 00:00.0: enabled 1
628 12:18:02.427908 PCI: 00:1e.0: enabled 1
629 12:18:02.430513 PCI: 00:1e.1: enabled 0
630 12:18:02.433361 PCI: 00:1e.2: enabled 1
631 12:18:02.435422 SPI: 00: enabled 1
632 12:18:02.437851 PCI: 00:1e.3: enabled 0
633 12:18:02.440404 PCI: 00:1f.0: enabled 1
634 12:18:02.443424 PNP: 0c09.0: enabled 1
635 12:18:02.446131 PCI: 00:1f.1: enabled 1
636 12:18:02.448557 PCI: 00:1f.2: enabled 1
637 12:18:02.450742 PCI: 00:1f.3: enabled 1
638 12:18:02.454203 PCI: 00:1f.4: enabled 1
639 12:18:02.456758 PCI: 00:1f.5: enabled 1
640 12:18:02.459031 PCI: 00:1f.6: enabled 0
641 12:18:02.461520 Root Device scanning...
642 12:18:02.465012 scan_static_bus for Root Device
643 12:18:02.467222 CPU_CLUSTER: 0 enabled
644 12:18:02.469572 DOMAIN: 0000 enabled
645 12:18:02.471899 DOMAIN: 0000 scanning...
646 12:18:02.475414 PCI: pci_scan_bus for bus 00
647 12:18:02.477966 PCI: 00:00.0 [8086/0000] ops
648 12:18:02.481290 PCI: 00:00.0 [8086/9b71] enabled
649 12:18:02.484808 PCI: 00:02.0 [8086/0000] bus ops
650 12:18:02.488094 PCI: 00:02.0 [8086/9baa] enabled
651 12:18:02.491389 PCI: 00:04.0 [8086/0000] bus ops
652 12:18:02.494704 PCI: 00:04.0 [8086/1903] enabled
653 12:18:02.498337 PCI: 00:08.0 [8086/1911] enabled
654 12:18:02.501508 PCI: 00:12.0 [8086/02f9] enabled
655 12:18:02.504690 PCI: 00:14.0 [8086/0000] bus ops
656 12:18:02.507943 PCI: 00:14.0 [8086/02ed] enabled
657 12:18:02.511534 PCI: 00:14.2 [8086/02ef] enabled
658 12:18:02.514855 PCI: 00:14.3 [8086/02f0] enabled
659 12:18:02.517613 PCI: 00:14.5 [8086/0000] ops
660 12:18:02.521266 PCI: 00:14.5 [8086/02f5] enabled
661 12:18:02.524172 PCI: 00:15.0 [8086/0000] bus ops
662 12:18:02.528150 PCI: 00:15.0 [8086/02e8] disabled
663 12:18:02.531087 PCI: 00:15.2 [8086/0000] bus ops
664 12:18:02.534760 PCI: 00:15.2 [8086/02ea] enabled
665 12:18:02.537614 PCI: 00:15.3 [8086/0000] bus ops
666 12:18:02.540793 PCI: 00:15.3 [8086/02eb] enabled
667 12:18:02.543774 PCI: 00:16.0 [8086/0000] ops
668 12:18:02.547678 PCI: 00:16.0 [8086/02e0] enabled
669 12:18:02.552833 PCI: Static device PCI: 00:17.0 not found, disabling it.
670 12:18:02.556355 PCI: 00:19.0 [8086/0000] bus ops
671 12:18:02.559349 PCI: 00:19.0 [8086/02c5] enabled
672 12:18:02.562842 PCI: 00:1a.0 [8086/0000] ops
673 12:18:02.565997 PCI: 00:1a.0 [8086/02c4] enabled
674 12:18:02.568795 PCI: 00:1c.0 [8086/0000] bus ops
675 12:18:02.572267 PCI: 00:1c.0 [8086/02be] enabled
676 12:18:02.575679 PCI: 00:1e.0 [8086/0000] ops
677 12:18:02.579077 PCI: 00:1e.0 [8086/02a8] enabled
678 12:18:02.582114 PCI: 00:1e.2 [8086/0000] bus ops
679 12:18:02.585474 PCI: 00:1e.2 [8086/02aa] enabled
680 12:18:02.588467 PCI: 00:1f.0 [8086/0000] bus ops
681 12:18:02.592099 PCI: 00:1f.0 [8086/0285] enabled
682 12:18:02.597724 PCI: Static device PCI: 00:1f.1 not found, disabling it.
683 12:18:02.603252 PCI: Static device PCI: 00:1f.2 not found, disabling it.
684 12:18:02.606685 PCI: 00:1f.3 [8086/0000] bus ops
685 12:18:02.609644 PCI: 00:1f.3 [8086/02c8] enabled
686 12:18:02.613063 PCI: 00:1f.4 [8086/0000] bus ops
687 12:18:02.616548 PCI: 00:1f.4 [8086/02a3] enabled
688 12:18:02.620078 PCI: 00:1f.5 [8086/0000] bus ops
689 12:18:02.623328 PCI: 00:1f.5 [8086/02a4] enabled
690 12:18:02.626773 PCI: Leftover static devices:
691 12:18:02.628159 PCI: 00:05.0
692 12:18:02.629221 PCI: 00:12.5
693 12:18:02.630765 PCI: 00:12.6
694 12:18:02.631392 PCI: 00:14.1
695 12:18:02.633344 PCI: 00:15.1
696 12:18:02.634385 PCI: 00:16.1
697 12:18:02.635643 PCI: 00:16.2
698 12:18:02.637696 PCI: 00:16.3
699 12:18:02.638640 PCI: 00:16.4
700 12:18:02.640029 PCI: 00:16.5
701 12:18:02.641346 PCI: 00:17.0
702 12:18:02.642239 PCI: 00:19.1
703 12:18:02.643720 PCI: 00:19.2
704 12:18:02.645403 PCI: 00:1e.1
705 12:18:02.646881 PCI: 00:1e.3
706 12:18:02.648259 PCI: 00:1f.1
707 12:18:02.649526 PCI: 00:1f.2
708 12:18:02.650865 PCI: 00:1f.6
709 12:18:02.653917 PCI: Check your devicetree.cb.
710 12:18:02.656478 PCI: 00:02.0 scanning...
711 12:18:02.660378 scan_generic_bus for PCI: 00:02.0
712 12:18:02.664340 scan_generic_bus for PCI: 00:02.0 done
713 12:18:02.668774 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
714 12:18:02.671199 PCI: 00:04.0 scanning...
715 12:18:02.674710 scan_generic_bus for PCI: 00:04.0
716 12:18:02.679108 bus: PCI: 00:04.0[0]->GENERIC: 0.0 enabled
717 12:18:02.682900 scan_generic_bus for PCI: 00:04.0 done
718 12:18:02.688108 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
719 12:18:02.690635 PCI: 00:14.0 scanning...
720 12:18:02.694046 scan_static_bus for PCI: 00:14.0
721 12:18:02.696356 USB0 port 0 enabled
722 12:18:02.698757 USB0 port 0 scanning...
723 12:18:02.702121 scan_static_bus for USB0 port 0
724 12:18:02.704356 USB2 port 0 enabled
725 12:18:02.706456 USB2 port 1 enabled
726 12:18:02.708476 USB2 port 2 enabled
727 12:18:02.710525 USB2 port 3 enabled
728 12:18:02.712106 USB2 port 5 enabled
729 12:18:02.714513 USB2 port 6 disabled
730 12:18:02.716474 USB2 port 9 enabled
731 12:18:02.718852 USB3 port 0 enabled
732 12:18:02.720764 USB3 port 1 enabled
733 12:18:02.722609 USB3 port 2 enabled
734 12:18:02.724493 USB3 port 3 enabled
735 12:18:02.726286 USB3 port 4 enabled
736 12:18:02.728797 USB2 port 4 enabled
737 12:18:02.730688 USB3 port 5 enabled
738 12:18:02.732805 USB2 port 0 scanning...
739 12:18:02.737161 scan_static_bus for USB2 port 0
740 12:18:02.740341 scan_static_bus for USB2 port 0 done
741 12:18:02.745132 scan_bus: bus USB2 port 0 finished in 6 msecs
742 12:18:02.747162 USB2 port 1 scanning...
743 12:18:02.750898 scan_static_bus for USB2 port 1
744 12:18:02.754759 scan_static_bus for USB2 port 1 done
745 12:18:02.759570 scan_bus: bus USB2 port 1 finished in 6 msecs
746 12:18:02.761311 USB2 port 2 scanning...
747 12:18:02.765138 scan_static_bus for USB2 port 2
748 12:18:02.768847 scan_static_bus for USB2 port 2 done
749 12:18:02.773407 scan_bus: bus USB2 port 2 finished in 6 msecs
750 12:18:02.775745 USB2 port 3 scanning...
751 12:18:02.779274 scan_static_bus for USB2 port 3
752 12:18:02.782885 scan_static_bus for USB2 port 3 done
753 12:18:02.787871 scan_bus: bus USB2 port 3 finished in 6 msecs
754 12:18:02.789758 USB2 port 5 scanning...
755 12:18:02.793943 scan_static_bus for USB2 port 5
756 12:18:02.797212 scan_static_bus for USB2 port 5 done
757 12:18:02.801941 scan_bus: bus USB2 port 5 finished in 6 msecs
758 12:18:02.804163 USB2 port 9 scanning...
759 12:18:02.807630 scan_static_bus for USB2 port 9
760 12:18:02.811582 scan_static_bus for USB2 port 9 done
761 12:18:02.815901 scan_bus: bus USB2 port 9 finished in 6 msecs
762 12:18:02.818690 USB3 port 0 scanning...
763 12:18:02.822099 scan_static_bus for USB3 port 0
764 12:18:02.826199 scan_static_bus for USB3 port 0 done
765 12:18:02.830012 scan_bus: bus USB3 port 0 finished in 6 msecs
766 12:18:02.832557 USB3 port 1 scanning...
767 12:18:02.836005 scan_static_bus for USB3 port 1
768 12:18:02.840010 scan_static_bus for USB3 port 1 done
769 12:18:02.844443 scan_bus: bus USB3 port 1 finished in 6 msecs
770 12:18:02.847615 USB3 port 2 scanning...
771 12:18:02.850483 scan_static_bus for USB3 port 2
772 12:18:02.854656 scan_static_bus for USB3 port 2 done
773 12:18:02.859195 scan_bus: bus USB3 port 2 finished in 6 msecs
774 12:18:02.861187 USB3 port 3 scanning...
775 12:18:02.865147 scan_static_bus for USB3 port 3
776 12:18:02.868574 scan_static_bus for USB3 port 3 done
777 12:18:02.873111 scan_bus: bus USB3 port 3 finished in 6 msecs
778 12:18:02.875625 USB3 port 4 scanning...
779 12:18:02.879209 scan_static_bus for USB3 port 4
780 12:18:02.882304 scan_static_bus for USB3 port 4 done
781 12:18:02.887425 scan_bus: bus USB3 port 4 finished in 6 msecs
782 12:18:02.889414 USB2 port 4 scanning...
783 12:18:02.893488 scan_static_bus for USB2 port 4
784 12:18:02.897156 scan_static_bus for USB2 port 4 done
785 12:18:02.901619 scan_bus: bus USB2 port 4 finished in 6 msecs
786 12:18:02.903659 USB3 port 5 scanning...
787 12:18:02.907881 scan_static_bus for USB3 port 5
788 12:18:02.911097 scan_static_bus for USB3 port 5 done
789 12:18:02.915594 scan_bus: bus USB3 port 5 finished in 6 msecs
790 12:18:02.919095 scan_static_bus for USB0 port 0 done
791 12:18:02.924066 scan_bus: bus USB0 port 0 finished in 219 msecs
792 12:18:02.928494 scan_static_bus for PCI: 00:14.0 done
793 12:18:02.933016 scan_bus: bus PCI: 00:14.0 finished in 236 msecs
794 12:18:02.935243 PCI: 00:15.2 scanning...
795 12:18:02.938825 scan_generic_bus for PCI: 00:15.2
796 12:18:02.943295 bus: PCI: 00:15.2[0]->I2C: 02:4a enabled
797 12:18:02.946711 scan_generic_bus for PCI: 00:15.2 done
798 12:18:02.951663 scan_bus: bus PCI: 00:15.2 finished in 11 msecs
799 12:18:02.954246 PCI: 00:15.3 scanning...
800 12:18:02.958074 scan_generic_bus for PCI: 00:15.3
801 12:18:02.962201 bus: PCI: 00:15.3[0]->I2C: 03:4a enabled
802 12:18:02.966141 scan_generic_bus for PCI: 00:15.3 done
803 12:18:02.970739 scan_bus: bus PCI: 00:15.3 finished in 11 msecs
804 12:18:02.972930 PCI: 00:19.0 scanning...
805 12:18:02.977288 scan_generic_bus for PCI: 00:19.0
806 12:18:02.981259 bus: PCI: 00:19.0[0]->I2C: 04:1a enabled
807 12:18:02.985339 scan_generic_bus for PCI: 00:19.0 done
808 12:18:02.989602 scan_bus: bus PCI: 00:19.0 finished in 11 msecs
809 12:18:02.992159 PCI: 00:1c.0 scanning...
810 12:18:02.996009 do_pci_scan_bridge for PCI: 00:1c.0
811 12:18:02.999431 PCI: pci_scan_bus for bus 01
812 12:18:03.001962 PCI: 01:00.0 [10ec/8168] ops
813 12:18:03.005269 PCI: 01:00.0 [10ec/8168] enabled
814 12:18:03.009393 Enabling Common Clock Configuration
815 12:18:03.013676 L1 Sub-State supported from root port 28
816 12:18:03.016488 L1 Sub-State Support = 0xf
817 12:18:03.019357 CommonModeRestoreTime = 0x96
818 12:18:03.023446 Power On Value = 0xf, Power On Scale = 0x1
819 12:18:03.024963 ASPM: Enabled L1
820 12:18:03.028726 PCIe: Max_Payload_Size adjusted to 128
821 12:18:03.033927 scan_bus: bus PCI: 00:1c.0 finished in 36 msecs
822 12:18:03.036682 PCI: 00:1e.2 scanning...
823 12:18:03.040070 scan_generic_bus for PCI: 00:1e.2
824 12:18:03.043652 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
825 12:18:03.047694 scan_generic_bus for PCI: 00:1e.2 done
826 12:18:03.052653 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
827 12:18:03.055089 PCI: 00:1f.0 scanning...
828 12:18:03.058455 scan_static_bus for PCI: 00:1f.0
829 12:18:03.060658 PNP: 0c09.0 enabled
830 12:18:03.063217 PNP: 0c09.0 scanning...
831 12:18:03.067200 scan_static_bus for PNP: 0c09.0
832 12:18:03.070452 scan_static_bus for PNP: 0c09.0 done
833 12:18:03.074987 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
834 12:18:03.079077 scan_static_bus for PCI: 00:1f.0 done
835 12:18:03.083641 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
836 12:18:03.086036 PCI: 00:1f.3 scanning...
837 12:18:03.089355 scan_static_bus for PCI: 00:1f.3
838 12:18:03.093183 scan_static_bus for PCI: 00:1f.3 done
839 12:18:03.098095 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
840 12:18:03.101165 PCI: 00:1f.4 scanning...
841 12:18:03.104109 scan_generic_bus for PCI: 00:1f.4
842 12:18:03.108161 scan_generic_bus for PCI: 00:1f.4 done
843 12:18:03.112769 scan_bus: bus PCI: 00:1f.4 finished in 7 msecs
844 12:18:03.115767 PCI: 00:1f.5 scanning...
845 12:18:03.119366 scan_generic_bus for PCI: 00:1f.5
846 12:18:03.123068 scan_generic_bus for PCI: 00:1f.5 done
847 12:18:03.128061 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
848 12:18:03.132825 scan_bus: bus DOMAIN: 0000 finished in 653 msecs
849 12:18:03.136603 scan_static_bus for Root Device done
850 12:18:03.140799 scan_bus: bus Root Device finished in 672 msecs
851 12:18:03.141848 done
852 12:18:03.148300 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1038 ms
853 12:18:03.154184 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
854 12:18:03.159929 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
855 12:18:03.165813 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
856 12:18:03.171457 MRC: 'RECOVERY_MRC_CACHE' does not need update.
857 12:18:03.174544 Chrome EC: UHEPI supported
858 12:18:03.180562 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
859 12:18:03.184396 SPI flash protection: WPSW=0 SRP0=0
860 12:18:03.189100 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
861 12:18:03.195050 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 39 ms
862 12:18:03.197527 found VGA at PCI: 00:02.0
863 12:18:03.201112 Setting up VGA for PCI: 00:02.0
864 12:18:03.206031 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
865 12:18:03.211361 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
866 12:18:03.213120 Allocating resources...
867 12:18:03.215264 Reading resources...
868 12:18:03.219799 Root Device read_resources bus 0 link: 0
869 12:18:03.224238 CPU_CLUSTER: 0 read_resources bus 0 link: 0
870 12:18:03.229372 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
871 12:18:03.233857 DOMAIN: 0000 read_resources bus 0 link: 0
872 12:18:03.239136 PCI: 00:04.0 read_resources bus 1 link: 0
873 12:18:03.244395 PCI: 00:04.0 read_resources bus 1 link: 0 done
874 12:18:03.249534 PCI: 00:14.0 read_resources bus 0 link: 0
875 12:18:03.253776 USB0 port 0 read_resources bus 0 link: 0
876 12:18:03.262813 USB0 port 0 read_resources bus 0 link: 0 done
877 12:18:03.268032 PCI: 00:14.0 read_resources bus 0 link: 0 done
878 12:18:03.273436 PCI: 00:15.2 read_resources bus 2 link: 0
879 12:18:03.278835 PCI: 00:15.2 read_resources bus 2 link: 0 done
880 12:18:03.283219 PCI: 00:15.3 read_resources bus 3 link: 0
881 12:18:03.288822 PCI: 00:15.3 read_resources bus 3 link: 0 done
882 12:18:03.293756 PCI: 00:19.0 read_resources bus 4 link: 0
883 12:18:03.299118 PCI: 00:19.0 read_resources bus 4 link: 0 done
884 12:18:03.303646 PCI: 00:1c.0 read_resources bus 1 link: 0
885 12:18:03.309115 PCI: 00:1c.0 read_resources bus 1 link: 0 done
886 12:18:03.313790 PCI: 00:1e.2 read_resources bus 5 link: 0
887 12:18:03.319824 PCI: 00:1e.2 read_resources bus 5 link: 0 done
888 12:18:03.323901 PCI: 00:1f.0 read_resources bus 0 link: 0
889 12:18:03.328911 PCI: 00:1f.0 read_resources bus 0 link: 0 done
890 12:18:03.335053 DOMAIN: 0000 read_resources bus 0 link: 0 done
891 12:18:03.339738 Root Device read_resources bus 0 link: 0 done
892 12:18:03.342735 Done reading resources.
893 12:18:03.348328 Show resources in subtree (Root Device)...After reading.
894 12:18:03.352616 Root Device child on link 0 CPU_CLUSTER: 0
895 12:18:03.356327 CPU_CLUSTER: 0 child on link 0 APIC: 00
896 12:18:03.357875 APIC: 00
897 12:18:03.359491 APIC: 02
898 12:18:03.363589 DOMAIN: 0000 child on link 0 PCI: 00:00.0
899 12:18:03.373179 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
900 12:18:03.382483 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
901 12:18:03.384512 PCI: 00:00.0
902 12:18:03.393990 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
903 12:18:03.403201 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
904 12:18:03.412856 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
905 12:18:03.422291 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
906 12:18:03.431169 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
907 12:18:03.440795 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
908 12:18:03.450509 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
909 12:18:03.459606 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
910 12:18:03.469185 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
911 12:18:03.477653 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
912 12:18:03.487229 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
913 12:18:03.496796 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
914 12:18:03.506312 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
915 12:18:03.516179 PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d
916 12:18:03.525303 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
917 12:18:03.534510 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
918 12:18:03.535737 PCI: 00:02.0
919 12:18:03.546709 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
920 12:18:03.556776 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
921 12:18:03.564822 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
922 12:18:03.569676 PCI: 00:04.0 child on link 0 GENERIC: 0.0
923 12:18:03.579773 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
924 12:18:03.580882 GENERIC: 0.0
925 12:18:03.582733 PCI: 00:08.0
926 12:18:03.592656 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
927 12:18:03.594521 PCI: 00:12.0
928 12:18:03.604491 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
929 12:18:03.608439 PCI: 00:14.0 child on link 0 USB0 port 0
930 12:18:03.618966 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
931 12:18:03.623536 USB0 port 0 child on link 0 USB2 port 0
932 12:18:03.624835 USB2 port 0
933 12:18:03.626202 USB2 port 1
934 12:18:03.628977 USB2 port 2
935 12:18:03.629673 USB2 port 3
936 12:18:03.631558 USB2 port 5
937 12:18:03.633919 USB2 port 6
938 12:18:03.635324 USB2 port 9
939 12:18:03.636967 USB3 port 0
940 12:18:03.639059 USB3 port 1
941 12:18:03.640667 USB3 port 2
942 12:18:03.641979 USB3 port 3
943 12:18:03.644002 USB3 port 4
944 12:18:03.645722 USB2 port 4
945 12:18:03.647498 USB3 port 5
946 12:18:03.649304 PCI: 00:14.2
947 12:18:03.659047 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
948 12:18:03.669451 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
949 12:18:03.670684 PCI: 00:14.3
950 12:18:03.680885 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
951 12:18:03.682982 PCI: 00:14.5
952 12:18:03.692077 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
953 12:18:03.694249 PCI: 00:15.0
954 12:18:03.698070 PCI: 00:15.2 child on link 0 I2C: 02:4a
955 12:18:03.708587 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
956 12:18:03.709655 I2C: 02:4a
957 12:18:03.714170 PCI: 00:15.3 child on link 0 I2C: 03:4a
958 12:18:03.724577 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
959 12:18:03.725936 I2C: 03:4a
960 12:18:03.727497 PCI: 00:16.0
961 12:18:03.737040 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
962 12:18:03.741513 PCI: 00:19.0 child on link 0 I2C: 04:1a
963 12:18:03.751151 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
964 12:18:03.753166 I2C: 04:1a
965 12:18:03.754659 PCI: 00:1a.0
966 12:18:03.764267 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
967 12:18:03.769114 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
968 12:18:03.777650 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
969 12:18:03.787056 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
970 12:18:03.796574 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
971 12:18:03.798615 PCI: 01:00.0
972 12:18:03.806596 PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
973 12:18:03.817234 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
974 12:18:03.826831 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
975 12:18:03.828270 PCI: 00:1e.0
976 12:18:03.839526 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
977 12:18:03.849687 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
978 12:18:03.853560 PCI: 00:1e.2 child on link 0 SPI: 00
979 12:18:03.863419 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
980 12:18:03.864564 SPI: 00
981 12:18:03.868697 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
982 12:18:03.877686 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
983 12:18:03.886324 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
984 12:18:03.888134 PNP: 0c09.0
985 12:18:03.897054 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
986 12:18:03.898724 PCI: 00:1f.3
987 12:18:03.908561 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
988 12:18:03.918788 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
989 12:18:03.920371 PCI: 00:1f.4
990 12:18:03.929581 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
991 12:18:03.939195 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
992 12:18:03.941136 PCI: 00:1f.5
993 12:18:03.950087 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
994 12:18:03.958072 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
995 12:18:03.963354 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
996 12:18:03.967331 PCI: 01:00.0 10 * [0x0 - 0xff] io
997 12:18:03.973565 PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
998 12:18:03.979254 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
999 12:18:03.983804 PCI: 01:00.0 20 * [0x0 - 0x3fff] mem
1000 12:18:03.988283 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1001 12:18:03.994804 PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1002 12:18:04.002088 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1003 12:18:04.009765 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1004 12:18:04.017130 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1005 12:18:04.023321 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1006 12:18:04.030624 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1007 12:18:04.038531 update_constraints: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1008 12:18:04.046067 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1009 12:18:04.053813 update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1010 12:18:04.056893 DOMAIN: 0000: Resource ranges:
1011 12:18:04.060443 * Base: 1000, Size: 800, Tag: 100
1012 12:18:04.064123 * Base: 1900, Size: d6a0, Tag: 100
1013 12:18:04.067323 * Base: efc0, Size: 1040, Tag: 100
1014 12:18:04.073268 PCI: 00:1c.0 1c * [0x2000 - 0x2fff] limit: 2fff io
1015 12:18:04.077964 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1016 12:18:04.084816 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1017 12:18:04.091468 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1018 12:18:04.099278 update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1019 12:18:04.108917 update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)
1020 12:18:04.114179 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1021 12:18:04.122683 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1022 12:18:04.129867 update_constraints: PCI: 00:00.0 04 base fc000000 limit fc000fff mem (fixed)
1023 12:18:04.137563 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1024 12:18:04.145382 update_constraints: PCI: 00:00.0 06 base fe000000 limit fe00ffff mem (fixed)
1025 12:18:04.152762 update_constraints: PCI: 00:00.0 07 base fed90000 limit fed90fff mem (fixed)
1026 12:18:04.160997 update_constraints: PCI: 00:00.0 08 base fed91000 limit fed91fff mem (fixed)
1027 12:18:04.168321 update_constraints: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1028 12:18:04.175954 update_constraints: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1029 12:18:04.184020 update_constraints: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1030 12:18:04.191577 update_constraints: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1031 12:18:04.199327 update_constraints: PCI: 00:00.0 0d base 100000000 limit 15e7fffff mem (fixed)
1032 12:18:04.206988 update_constraints: PCI: 00:00.0 0e base 000a0000 limit 000bffff mem (fixed)
1033 12:18:04.214323 update_constraints: PCI: 00:00.0 0f base 000c0000 limit 000fffff mem (fixed)
1034 12:18:04.222082 update_constraints: PCI: 00:1e.0 10 base fe032000 limit fe032fff mem (fixed)
1035 12:18:04.225748 DOMAIN: 0000: Resource ranges:
1036 12:18:04.229860 * Base: 9f800000, Size: 40800000, Tag: 200
1037 12:18:04.234218 * Base: f0000000, Size: c000000, Tag: 200
1038 12:18:04.238324 * Base: fc001000, Size: 1fff000, Tag: 200
1039 12:18:04.242740 * Base: fe010000, Size: 22000, Tag: 200
1040 12:18:04.246822 * Base: fe033000, Size: cdd000, Tag: 200
1041 12:18:04.251088 * Base: fed18000, Size: 68000, Tag: 200
1042 12:18:04.254598 * Base: fed84000, Size: c000, Tag: 200
1043 12:18:04.258982 * Base: fed92000, Size: e000, Tag: 200
1044 12:18:04.262962 * Base: feda2000, Size: 125e000, Tag: 200
1045 12:18:04.267873 * Base: 15e800000, Size: 7ea1800000, Tag: 100200
1046 12:18:04.275230 PCI: 00:02.0 18 * [0xa0000000 - 0xafffffff] limit: afffffff prefmem
1047 12:18:04.281433 PCI: 00:02.0 10 * [0xb0000000 - 0xb0ffffff] limit: b0ffffff mem
1048 12:18:04.288119 PCI: 00:1c.0 20 * [0x9f800000 - 0x9f8fffff] limit: 9f8fffff mem
1049 12:18:04.295166 PCI: 00:1f.3 20 * [0x9f900000 - 0x9f9fffff] limit: 9f9fffff mem
1050 12:18:04.301613 PCI: 00:14.0 10 * [0x9fa00000 - 0x9fa0ffff] limit: 9fa0ffff mem
1051 12:18:04.308206 PCI: 00:04.0 10 * [0x9fa10000 - 0x9fa17fff] limit: 9fa17fff mem
1052 12:18:04.314651 PCI: 00:14.3 10 * [0x9fa18000 - 0x9fa1bfff] limit: 9fa1bfff mem
1053 12:18:04.321616 PCI: 00:1f.3 10 * [0x9fa1c000 - 0x9fa1ffff] limit: 9fa1ffff mem
1054 12:18:04.327912 PCI: 00:14.2 10 * [0x9fa20000 - 0x9fa21fff] limit: 9fa21fff mem
1055 12:18:04.334880 PCI: 00:08.0 10 * [0x9fa22000 - 0x9fa22fff] limit: 9fa22fff mem
1056 12:18:04.341062 PCI: 00:12.0 10 * [0x9fa23000 - 0x9fa23fff] limit: 9fa23fff mem
1057 12:18:04.347309 PCI: 00:14.2 18 * [0x9fa24000 - 0x9fa24fff] limit: 9fa24fff mem
1058 12:18:04.354085 PCI: 00:14.5 10 * [0x9fa25000 - 0x9fa25fff] limit: 9fa25fff mem
1059 12:18:04.360764 PCI: 00:15.2 10 * [0x9fa26000 - 0x9fa26fff] limit: 9fa26fff mem
1060 12:18:04.367318 PCI: 00:15.3 10 * [0x9fa27000 - 0x9fa27fff] limit: 9fa27fff mem
1061 12:18:04.374196 PCI: 00:16.0 10 * [0x9fa28000 - 0x9fa28fff] limit: 9fa28fff mem
1062 12:18:04.380645 PCI: 00:19.0 10 * [0x9fa29000 - 0x9fa29fff] limit: 9fa29fff mem
1063 12:18:04.387400 PCI: 00:1a.0 10 * [0x9fa2a000 - 0x9fa2afff] limit: 9fa2afff mem
1064 12:18:04.394068 PCI: 00:1e.0 18 * [0x9fa2b000 - 0x9fa2bfff] limit: 9fa2bfff mem
1065 12:18:04.400450 PCI: 00:1e.2 10 * [0x9fa2c000 - 0x9fa2cfff] limit: 9fa2cfff mem
1066 12:18:04.406988 PCI: 00:1f.5 10 * [0x9fa2d000 - 0x9fa2dfff] limit: 9fa2dfff mem
1067 12:18:04.413836 PCI: 00:1f.4 10 * [0x9fa2e000 - 0x9fa2e0ff] limit: 9fa2e0ff mem
1068 12:18:04.421399 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1069 12:18:04.427933 PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff
1070 12:18:04.431587 PCI: 00:1c.0: Resource ranges:
1071 12:18:04.434601 * Base: 2000, Size: 1000, Tag: 100
1072 12:18:04.440346 PCI: 01:00.0 10 * [0x2000 - 0x20ff] limit: 20ff io
1073 12:18:04.447242 PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done
1074 12:18:04.455533 PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff
1075 12:18:04.459132 PCI: 00:1c.0: Resource ranges:
1076 12:18:04.462880 * Base: 9f800000, Size: 100000, Tag: 200
1077 12:18:04.469636 PCI: 01:00.0 20 * [0x9f800000 - 0x9f803fff] limit: 9f803fff mem
1078 12:18:04.475951 PCI: 01:00.0 18 * [0x9f804000 - 0x9f804fff] limit: 9f804fff mem
1079 12:18:04.484871 PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff done
1080 12:18:04.491515 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1081 12:18:04.495671 Root Device assign_resources, bus 0 link: 0
1082 12:18:04.500398 DOMAIN: 0000 assign_resources, bus 0 link: 0
1083 12:18:04.509598 PCI: 00:02.0 10 <- [0x00b0000000 - 0x00b0ffffff] size 0x01000000 gran 0x18 mem64
1084 12:18:04.517748 PCI: 00:02.0 18 <- [0x00a0000000 - 0x00afffffff] size 0x10000000 gran 0x1c prefmem64
1085 12:18:04.525244 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1086 12:18:04.534030 PCI: 00:04.0 10 <- [0x009fa10000 - 0x009fa17fff] size 0x00008000 gran 0x0f mem64
1087 12:18:04.538622 PCI: 00:04.0 assign_resources, bus 1 link: 0
1088 12:18:04.542709 PCI: 00:04.0 assign_resources, bus 1 link: 0
1089 12:18:04.551489 PCI: 00:08.0 10 <- [0x009fa22000 - 0x009fa22fff] size 0x00001000 gran 0x0c mem64
1090 12:18:04.559474 PCI: 00:12.0 10 <- [0x009fa23000 - 0x009fa23fff] size 0x00001000 gran 0x0c mem64
1091 12:18:04.567457 PCI: 00:14.0 10 <- [0x009fa00000 - 0x009fa0ffff] size 0x00010000 gran 0x10 mem64
1092 12:18:04.572733 PCI: 00:14.0 assign_resources, bus 0 link: 0
1093 12:18:04.577046 PCI: 00:14.0 assign_resources, bus 0 link: 0
1094 12:18:04.585793 PCI: 00:14.2 10 <- [0x009fa20000 - 0x009fa21fff] size 0x00002000 gran 0x0d mem64
1095 12:18:04.593590 PCI: 00:14.2 18 <- [0x009fa24000 - 0x009fa24fff] size 0x00001000 gran 0x0c mem64
1096 12:18:04.601985 PCI: 00:14.3 10 <- [0x009fa18000 - 0x009fa1bfff] size 0x00004000 gran 0x0e mem64
1097 12:18:04.610153 PCI: 00:14.5 10 <- [0x009fa25000 - 0x009fa25fff] size 0x00001000 gran 0x0c mem64
1098 12:18:04.618152 PCI: 00:15.2 10 <- [0x009fa26000 - 0x009fa26fff] size 0x00001000 gran 0x0c mem64
1099 12:18:04.622691 PCI: 00:15.2 assign_resources, bus 2 link: 0
1100 12:18:04.627767 PCI: 00:15.2 assign_resources, bus 2 link: 0
1101 12:18:04.635335 PCI: 00:15.3 10 <- [0x009fa27000 - 0x009fa27fff] size 0x00001000 gran 0x0c mem64
1102 12:18:04.640212 PCI: 00:15.3 assign_resources, bus 3 link: 0
1103 12:18:04.644883 PCI: 00:15.3 assign_resources, bus 3 link: 0
1104 12:18:04.653339 PCI: 00:16.0 10 <- [0x009fa28000 - 0x009fa28fff] size 0x00001000 gran 0x0c mem64
1105 12:18:04.661342 PCI: 00:19.0 10 <- [0x009fa29000 - 0x009fa29fff] size 0x00001000 gran 0x0c mem64
1106 12:18:04.666151 PCI: 00:19.0 assign_resources, bus 4 link: 0
1107 12:18:04.670749 PCI: 00:19.0 assign_resources, bus 4 link: 0
1108 12:18:04.679433 PCI: 00:1a.0 10 <- [0x009fa2a000 - 0x009fa2afff] size 0x00001000 gran 0x0c mem64
1109 12:18:04.687730 PCI: 00:1c.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io
1110 12:18:04.698003 PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1111 12:18:04.706204 PCI: 00:1c.0 20 <- [0x009f800000 - 0x009f8fffff] size 0x00100000 gran 0x14 bus 01 mem
1112 12:18:04.711135 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1113 12:18:04.718930 PCI: 01:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
1114 12:18:04.726666 PCI: 01:00.0 18 <- [0x009f804000 - 0x009f804fff] size 0x00001000 gran 0x0c mem64
1115 12:18:04.735075 PCI: 01:00.0 20 <- [0x009f800000 - 0x009f803fff] size 0x00004000 gran 0x0e mem64
1116 12:18:04.739608 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1117 12:18:04.747525 PCI: 00:1e.0 18 <- [0x009fa2b000 - 0x009fa2bfff] size 0x00001000 gran 0x0c mem64
1118 12:18:04.756021 PCI: 00:1e.2 10 <- [0x009fa2c000 - 0x009fa2cfff] size 0x00001000 gran 0x0c mem64
1119 12:18:04.760290 PCI: 00:1e.2 assign_resources, bus 5 link: 0
1120 12:18:04.765357 PCI: 00:1e.2 assign_resources, bus 5 link: 0
1121 12:18:04.770376 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1122 12:18:04.775448 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1123 12:18:04.779641 LPC: Trying to open IO window from 800 size 1ff
1124 12:18:04.788249 PCI: 00:1f.3 10 <- [0x009fa1c000 - 0x009fa1ffff] size 0x00004000 gran 0x0e mem64
1125 12:18:04.796553 PCI: 00:1f.3 20 <- [0x009f900000 - 0x009f9fffff] size 0x00100000 gran 0x14 mem64
1126 12:18:04.804744 PCI: 00:1f.4 10 <- [0x009fa2e000 - 0x009fa2e0ff] size 0x00000100 gran 0x08 mem64
1127 12:18:04.812683 PCI: 00:1f.5 10 <- [0x009fa2d000 - 0x009fa2dfff] size 0x00001000 gran 0x0c mem
1128 12:18:04.817192 DOMAIN: 0000 assign_resources, bus 0 link: 0
1129 12:18:04.821695 Root Device assign_resources, bus 0 link: 0
1130 12:18:04.824970 Done setting resources.
1131 12:18:04.831374 Show resources in subtree (Root Device)...After assigning values.
1132 12:18:04.835914 Root Device child on link 0 CPU_CLUSTER: 0
1133 12:18:04.839963 CPU_CLUSTER: 0 child on link 0 APIC: 00
1134 12:18:04.840731 APIC: 00
1135 12:18:04.842572 APIC: 02
1136 12:18:04.846547 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1137 12:18:04.856137 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1138 12:18:04.865430 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1139 12:18:04.867671 PCI: 00:00.0
1140 12:18:04.876765 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1141 12:18:04.886290 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1142 12:18:04.895848 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1143 12:18:04.904777 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1144 12:18:04.914191 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1145 12:18:04.923667 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1146 12:18:04.933295 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1147 12:18:04.942463 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1148 12:18:04.952083 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1149 12:18:04.960571 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1150 12:18:04.970242 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1151 12:18:04.979487 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1152 12:18:04.988864 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1153 12:18:04.998868 PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d
1154 12:18:05.008311 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1155 12:18:05.016821 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1156 12:18:05.018941 PCI: 00:02.0
1157 12:18:05.029394 PCI: 00:02.0 resource base b0000000 size 1000000 align 24 gran 24 limit b0ffffff flags 60000201 index 10
1158 12:18:05.040578 PCI: 00:02.0 resource base a0000000 size 10000000 align 28 gran 28 limit afffffff flags 60001201 index 18
1159 12:18:05.049047 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1160 12:18:05.053779 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1161 12:18:05.064139 PCI: 00:04.0 resource base 9fa10000 size 8000 align 15 gran 15 limit 9fa17fff flags 60000201 index 10
1162 12:18:05.066025 GENERIC: 0.0
1163 12:18:05.067734 PCI: 00:08.0
1164 12:18:05.077795 PCI: 00:08.0 resource base 9fa22000 size 1000 align 12 gran 12 limit 9fa22fff flags 60000201 index 10
1165 12:18:05.080079 PCI: 00:12.0
1166 12:18:05.089958 PCI: 00:12.0 resource base 9fa23000 size 1000 align 12 gran 12 limit 9fa23fff flags 60000201 index 10
1167 12:18:05.093737 PCI: 00:14.0 child on link 0 USB0 port 0
1168 12:18:05.104881 PCI: 00:14.0 resource base 9fa00000 size 10000 align 16 gran 16 limit 9fa0ffff flags 60000201 index 10
1169 12:18:05.108965 USB0 port 0 child on link 0 USB2 port 0
1170 12:18:05.110444 USB2 port 0
1171 12:18:05.112295 USB2 port 1
1172 12:18:05.114321 USB2 port 2
1173 12:18:05.116262 USB2 port 3
1174 12:18:05.117731 USB2 port 5
1175 12:18:05.119533 USB2 port 6
1176 12:18:05.121173 USB2 port 9
1177 12:18:05.123283 USB3 port 0
1178 12:18:05.124809 USB3 port 1
1179 12:18:05.126396 USB3 port 2
1180 12:18:05.128047 USB3 port 3
1181 12:18:05.129635 USB3 port 4
1182 12:18:05.131984 USB2 port 4
1183 12:18:05.133675 USB3 port 5
1184 12:18:05.135366 PCI: 00:14.2
1185 12:18:05.145648 PCI: 00:14.2 resource base 9fa20000 size 2000 align 13 gran 13 limit 9fa21fff flags 60000201 index 10
1186 12:18:05.156138 PCI: 00:14.2 resource base 9fa24000 size 1000 align 12 gran 12 limit 9fa24fff flags 60000201 index 18
1187 12:18:05.157794 PCI: 00:14.3
1188 12:18:05.167790 PCI: 00:14.3 resource base 9fa18000 size 4000 align 14 gran 14 limit 9fa1bfff flags 60000201 index 10
1189 12:18:05.169846 PCI: 00:14.5
1190 12:18:05.179577 PCI: 00:14.5 resource base 9fa25000 size 1000 align 12 gran 12 limit 9fa25fff flags 60000201 index 10
1191 12:18:05.181575 PCI: 00:15.0
1192 12:18:05.185606 PCI: 00:15.2 child on link 0 I2C: 02:4a
1193 12:18:05.195974 PCI: 00:15.2 resource base 9fa26000 size 1000 align 12 gran 12 limit 9fa26fff flags 60000201 index 10
1194 12:18:05.197497 I2C: 02:4a
1195 12:18:05.201582 PCI: 00:15.3 child on link 0 I2C: 03:4a
1196 12:18:05.212249 PCI: 00:15.3 resource base 9fa27000 size 1000 align 12 gran 12 limit 9fa27fff flags 60000201 index 10
1197 12:18:05.213793 I2C: 03:4a
1198 12:18:05.215275 PCI: 00:16.0
1199 12:18:05.225654 PCI: 00:16.0 resource base 9fa28000 size 1000 align 12 gran 12 limit 9fa28fff flags 60000201 index 10
1200 12:18:05.230130 PCI: 00:19.0 child on link 0 I2C: 04:1a
1201 12:18:05.240515 PCI: 00:19.0 resource base 9fa29000 size 1000 align 12 gran 12 limit 9fa29fff flags 60000201 index 10
1202 12:18:05.241540 I2C: 04:1a
1203 12:18:05.243599 PCI: 00:1a.0
1204 12:18:05.253672 PCI: 00:1a.0 resource base 9fa2a000 size 1000 align 12 gran 12 limit 9fa2afff flags 60000201 index 10
1205 12:18:05.258627 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1206 12:18:05.268280 PCI: 00:1c.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
1207 12:18:05.279697 PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1208 12:18:05.289753 PCI: 00:1c.0 resource base 9f800000 size 100000 align 20 gran 20 limit 9f8fffff flags 60080202 index 20
1209 12:18:05.291965 PCI: 01:00.0
1210 12:18:05.300903 PCI: 01:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10
1211 12:18:05.311561 PCI: 01:00.0 resource base 9f804000 size 1000 align 12 gran 12 limit 9f804fff flags 60000201 index 18
1212 12:18:05.321327 PCI: 01:00.0 resource base 9f800000 size 4000 align 14 gran 14 limit 9f803fff flags 60000201 index 20
1213 12:18:05.323693 PCI: 00:1e.0
1214 12:18:05.334300 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1215 12:18:05.345023 PCI: 00:1e.0 resource base 9fa2b000 size 1000 align 12 gran 12 limit 9fa2bfff flags 60000201 index 18
1216 12:18:05.348533 PCI: 00:1e.2 child on link 0 SPI: 00
1217 12:18:05.358801 PCI: 00:1e.2 resource base 9fa2c000 size 1000 align 12 gran 12 limit 9fa2cfff flags 60000201 index 10
1218 12:18:05.359972 SPI: 00
1219 12:18:05.364512 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 12:18:05.373429 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 12:18:05.382367 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 12:18:05.384329 PNP: 0c09.0
1223 12:18:05.393047 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 12:18:05.394321 PCI: 00:1f.3
1225 12:18:05.404584 PCI: 00:1f.3 resource base 9fa1c000 size 4000 align 14 gran 14 limit 9fa1ffff flags 60000201 index 10
1226 12:18:05.414972 PCI: 00:1f.3 resource base 9f900000 size 100000 align 20 gran 20 limit 9f9fffff flags 60000201 index 20
1227 12:18:05.417060 PCI: 00:1f.4
1228 12:18:05.425751 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 12:18:05.436059 PCI: 00:1f.4 resource base 9fa2e000 size 100 align 12 gran 8 limit 9fa2e0ff flags 60000201 index 10
1230 12:18:05.437760 PCI: 00:1f.5
1231 12:18:05.448014 PCI: 00:1f.5 resource base 9fa2d000 size 1000 align 12 gran 12 limit 9fa2dfff flags 60000200 index 10
1232 12:18:05.450722 Done allocating resources.
1233 12:18:05.456877 BS: BS_DEV_RESOURCES run times (exec / console): 31 / 2220 ms
1234 12:18:05.459367 Enabling resources...
1235 12:18:05.464195 PCI: 00:00.0 subsystem <- 8086/9b71
1236 12:18:05.465938 PCI: 00:00.0 cmd <- 06
1237 12:18:05.469996 PCI: 00:02.0 subsystem <- 8086/9baa
1238 12:18:05.472182 PCI: 00:02.0 cmd <- 03
1239 12:18:05.476161 PCI: 00:04.0 subsystem <- 8086/1903
1240 12:18:05.478493 PCI: 00:04.0 cmd <- 02
1241 12:18:05.481449 PCI: 00:08.0 cmd <- 06
1242 12:18:05.485965 PCI: 00:12.0 subsystem <- 8086/02f9
1243 12:18:05.487640 PCI: 00:12.0 cmd <- 02
1244 12:18:05.491591 PCI: 00:14.0 subsystem <- 8086/02ed
1245 12:18:05.493657 PCI: 00:14.0 cmd <- 02
1246 12:18:05.496850 PCI: 00:14.2 cmd <- 02
1247 12:18:05.500574 PCI: 00:14.3 subsystem <- 8086/02f0
1248 12:18:05.503110 PCI: 00:14.3 cmd <- 02
1249 12:18:05.507052 PCI: 00:14.5 subsystem <- 8086/02f5
1250 12:18:05.509593 PCI: 00:14.5 cmd <- 06
1251 12:18:05.513146 PCI: 00:15.2 subsystem <- 8086/02ea
1252 12:18:05.515296 PCI: 00:15.2 cmd <- 02
1253 12:18:05.519129 PCI: 00:15.3 subsystem <- 8086/02eb
1254 12:18:05.521684 PCI: 00:15.3 cmd <- 02
1255 12:18:05.525888 PCI: 00:16.0 subsystem <- 8086/02e0
1256 12:18:05.527889 PCI: 00:16.0 cmd <- 02
1257 12:18:05.531794 PCI: 00:19.0 subsystem <- 8086/02c5
1258 12:18:05.533697 PCI: 00:19.0 cmd <- 02
1259 12:18:05.537738 PCI: 00:1a.0 subsystem <- 8086/02c4
1260 12:18:05.540564 PCI: 00:1a.0 cmd <- 06
1261 12:18:05.543785 PCI: 00:1c.0 bridge ctrl <- 0013
1262 12:18:05.547612 PCI: 00:1c.0 subsystem <- 8086/02be
1263 12:18:05.550106 PCI: 00:1c.0 cmd <- 07
1264 12:18:05.553958 PCI: 00:1e.0 subsystem <- 8086/02a8
1265 12:18:05.556439 PCI: 00:1e.0 cmd <- 06
1266 12:18:05.560135 PCI: 00:1e.2 subsystem <- 8086/02aa
1267 12:18:05.562383 PCI: 00:1e.2 cmd <- 06
1268 12:18:05.566516 PCI: 00:1f.0 subsystem <- 8086/0285
1269 12:18:05.568971 PCI: 00:1f.0 cmd <- 407
1270 12:18:05.572725 PCI: 00:1f.3 subsystem <- 8086/02c8
1271 12:18:05.575102 PCI: 00:1f.3 cmd <- 02
1272 12:18:05.578981 PCI: 00:1f.4 subsystem <- 8086/02a3
1273 12:18:05.581485 PCI: 00:1f.4 cmd <- 03
1274 12:18:05.584974 PCI: 00:1f.5 subsystem <- 8086/02a4
1275 12:18:05.587666 PCI: 00:1f.5 cmd <- 406
1276 12:18:05.591822 PCI: 01:00.0 cmd <- 03
1277 12:18:05.594618 done.
1278 12:18:05.600239 BS: BS_DEV_ENABLE run times (exec / console): 11 / 126 ms
1279 12:18:05.602787 Initializing devices...
1280 12:18:05.604600 Root Device init
1281 12:18:05.608994 Chrome EC: Set SMI mask to 0x0000000000000000
1282 12:18:05.614903 Chrome EC: clear events_b mask to 0x0000000000000000
1283 12:18:05.620570 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004
1284 12:18:05.626288 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004
1285 12:18:05.631773 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000000080004
1286 12:18:05.636965 Chrome EC: Set WAKE mask to 0x0000000000000000
1287 12:18:05.641139 Root Device init finished in 32 msecs
1288 12:18:05.645161 PCI: 00:00.0 init
1289 12:18:05.647762 CPU TDP = 15 Watts
1290 12:18:05.649903 CPU PL1 = 15 Watts
1291 12:18:05.652164 CPU PL2 = 35 Watts
1292 12:18:05.654565 CPU PsysPL2 = 65 Watts
1293 12:18:05.657904 PCI: 00:00.0 init finished in 9 msecs
1294 12:18:05.660207 PCI: 00:02.0 init
1295 12:18:05.662953 GMA: Found VBT in CBFS
1296 12:18:05.665467 GMA: Found valid VBT in CBFS
1297 12:18:05.669217 PCI: 00:02.0 init finished in 5 msecs
1298 12:18:05.672222 PCI: 00:08.0 init
1299 12:18:05.675949 PCI: 00:08.0 init finished in 0 msecs
1300 12:18:05.678150 PCI: 00:12.0 init
1301 12:18:05.681411 PCI: 00:12.0 init finished in 0 msecs
1302 12:18:05.683709 PCI: 00:14.0 init
1303 12:18:05.687894 PCI: 00:14.0 init finished in 0 msecs
1304 12:18:05.690240 PCI: 00:14.2 init
1305 12:18:05.693836 PCI: 00:14.2 init finished in 0 msecs
1306 12:18:05.696434 PCI: 00:14.3 init
1307 12:18:05.699857 PCI: 00:14.3 init finished in 0 msecs
1308 12:18:05.703524 PCI: 00:15.2 init
1309 12:18:05.706006 I2C bus 2 version 0x3132322a
1310 12:18:05.710116 DW I2C bus 2 at 0x9fa26000 (400 KHz)
1311 12:18:05.713534 PCI: 00:15.2 init finished in 6 msecs
1312 12:18:05.715923 PCI: 00:15.3 init
1313 12:18:05.718681 I2C bus 3 version 0x3132322a
1314 12:18:05.722343 DW I2C bus 3 at 0x9fa27000 (400 KHz)
1315 12:18:05.726435 PCI: 00:15.3 init finished in 6 msecs
1316 12:18:05.728165 PCI: 00:16.0 init
1317 12:18:05.732157 PCI: 00:16.0 init finished in 0 msecs
1318 12:18:05.735171 PCI: 00:19.0 init
1319 12:18:05.737103 I2C bus 4 version 0x3132322a
1320 12:18:05.741061 DW I2C bus 4 at 0x9fa29000 (400 KHz)
1321 12:18:05.745269 PCI: 00:19.0 init finished in 6 msecs
1322 12:18:05.747363 PCI: 00:1a.0 init
1323 12:18:05.750861 PCI: 00:1a.0 init finished in 0 msecs
1324 12:18:05.753496 PCI: 00:1c.0 init
1325 12:18:05.755861 Initializing PCH PCIe bridge.
1326 12:18:05.759794 PCI: 00:1c.0 init finished in 3 msecs
1327 12:18:05.762969 PCI: 00:1f.0 init
1328 12:18:05.767642 IOAPIC: Initializing IOAPIC at 0xfec00000
1329 12:18:05.771981 IOAPIC: Bootstrap Processor Local APIC = 0x00
1330 12:18:05.773685 IOAPIC: ID = 0x02
1331 12:18:05.776348 IOAPIC: Dumping registers
1332 12:18:05.779148 reg 0x0000: 0x02000000
1333 12:18:05.781651 reg 0x0001: 0x00770020
1334 12:18:05.784204 reg 0x0002: 0x00000000
1335 12:18:05.788613 PCI: 00:1f.0 init finished in 21 msecs
1336 12:18:05.791197 PCI: 00:1f.4 init
1337 12:18:05.794950 PCI: 00:1f.4 init finished in 0 msecs
1338 12:18:05.805426 PCI: 01:00.0 init
1339 12:18:05.809829 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1340 12:18:05.816623 Error: Could not locate 'ethernet_mac0' in VPD
1341 12:18:05.822770 r8168: mac address not found in VPD, using default 00:e0:4c:00:c0:b0
1342 12:18:05.827083 r8168: ignore invalid MAC address in cbfs
1343 12:18:05.830025 r8168: Resetting NIC...done
1344 12:18:05.833714 r8168: Programming MAC Address...done
1345 12:18:05.836476 r8168: Customized LED 0x5af
1346 12:18:05.841086 r8168: read back LED setting as 0x5af
1347 12:18:05.844497 PCI: 01:00.0 init finished in 35 msecs
1348 12:18:05.846974 PNP: 0c09.0 init
1349 12:18:05.852353 Google Chrome EC uptime: 1417321.767 seconds
1350 12:18:05.856068 Google Chrome AP resets since EC boot: 3491
1351 12:18:05.861008 Google Chrome most recent AP reset causes:
1352 12:18:05.865001 1415929.052: 32768 shutdown: power failure
1353 12:18:05.869630 1415929.055: 32768 shutdown: power failure
1354 12:18:05.873560 1415929.278: 32775 shutdown: entering G3
1355 12:18:05.878240 1417306.701: 32774 shutdown: by console command
1356 12:18:05.884358 Google Chrome EC reset flags at last EC boot: reset-pin
1357 12:18:05.888153 PNP: 0c09.0 init finished in 36 msecs
1358 12:18:05.889870 Devices initialized
1359 12:18:05.893629 Show all devs... After init.
1360 12:18:05.895202 Root Device: enabled 1
1361 12:18:05.897743 CPU_CLUSTER: 0: enabled 1
1362 12:18:05.900495 DOMAIN: 0000: enabled 1
1363 12:18:05.902217 APIC: 00: enabled 1
1364 12:18:05.904653 PCI: 00:00.0: enabled 1
1365 12:18:05.907104 PCI: 00:02.0: enabled 1
1366 12:18:05.909633 PCI: 00:04.0: enabled 1
1367 12:18:05.912005 PCI: 00:05.0: enabled 0
1368 12:18:05.914706 PCI: 00:12.0: enabled 1
1369 12:18:05.917457 PCI: 00:12.5: enabled 0
1370 12:18:05.919757 PCI: 00:12.6: enabled 0
1371 12:18:05.922162 PCI: 00:14.0: enabled 1
1372 12:18:05.924113 PCI: 00:14.1: enabled 0
1373 12:18:05.926727 PCI: 00:14.3: enabled 1
1374 12:18:05.929450 PCI: 00:14.5: enabled 1
1375 12:18:05.931392 PCI: 00:15.0: enabled 0
1376 12:18:05.934176 PCI: 00:15.1: enabled 0
1377 12:18:05.936366 PCI: 00:15.2: enabled 1
1378 12:18:05.939263 PCI: 00:15.3: enabled 1
1379 12:18:05.941480 PCI: 00:16.0: enabled 1
1380 12:18:05.943855 PCI: 00:16.1: enabled 0
1381 12:18:05.946312 PCI: 00:16.2: enabled 0
1382 12:18:05.948644 PCI: 00:16.3: enabled 0
1383 12:18:05.951693 PCI: 00:16.4: enabled 0
1384 12:18:05.953555 PCI: 00:16.5: enabled 0
1385 12:18:05.955830 PCI: 00:17.0: enabled 0
1386 12:18:05.958322 PCI: 00:19.0: enabled 1
1387 12:18:05.960867 PCI: 00:19.1: enabled 0
1388 12:18:05.963580 PCI: 00:19.2: enabled 0
1389 12:18:05.966147 PCI: 00:1a.0: enabled 1
1390 12:18:05.968622 PCI: 00:1c.0: enabled 0
1391 12:18:05.970619 PCI: 00:1c.1: enabled 0
1392 12:18:05.973137 PCI: 00:1c.2: enabled 0
1393 12:18:05.975646 PCI: 00:1c.3: enabled 0
1394 12:18:05.978124 PCI: 00:1c.4: enabled 0
1395 12:18:05.980208 PCI: 00:1c.5: enabled 0
1396 12:18:05.982511 PCI: 00:1c.0: enabled 1
1397 12:18:05.985699 PCI: 00:1c.7: enabled 0
1398 12:18:05.987514 PCI: 00:1d.0: enabled 1
1399 12:18:05.989943 PCI: 00:1d.1: enabled 0
1400 12:18:05.992415 PCI: 00:1d.2: enabled 1
1401 12:18:05.994915 PCI: 00:1d.3: enabled 0
1402 12:18:05.997507 PCI: 00:1d.4: enabled 0
1403 12:18:05.999657 PCI: 00:1d.5: enabled 1
1404 12:18:06.002132 PCI: 00:1e.0: enabled 1
1405 12:18:06.004791 PCI: 00:1e.1: enabled 0
1406 12:18:06.007338 PCI: 00:1e.2: enabled 1
1407 12:18:06.009273 PCI: 00:1e.3: enabled 0
1408 12:18:06.012474 PCI: 00:1f.0: enabled 1
1409 12:18:06.014393 PCI: 00:1f.1: enabled 0
1410 12:18:06.017188 PCI: 00:1f.2: enabled 0
1411 12:18:06.019150 PCI: 00:1f.3: enabled 1
1412 12:18:06.021706 PCI: 00:1f.4: enabled 1
1413 12:18:06.024088 PCI: 00:1f.5: enabled 1
1414 12:18:06.026935 PCI: 00:1f.6: enabled 0
1415 12:18:06.029393 GENERIC: 0.0: enabled 1
1416 12:18:06.031883 USB0 port 0: enabled 1
1417 12:18:06.033881 I2C: 02:4a: enabled 1
1418 12:18:06.035847 I2C: 03:4a: enabled 1
1419 12:18:06.038565 I2C: 04:1a: enabled 1
1420 12:18:06.040183 PCI: 01:00.0: enabled 1
1421 12:18:06.042744 PCI: 00:00.0: enabled 1
1422 12:18:06.045151 SPI: 00: enabled 1
1423 12:18:06.046860 PNP: 0c09.0: enabled 1
1424 12:18:06.050151 USB2 port 0: enabled 1
1425 12:18:06.051955 USB2 port 1: enabled 1
1426 12:18:06.054717 USB2 port 2: enabled 1
1427 12:18:06.056568 USB2 port 3: enabled 1
1428 12:18:06.058901 USB2 port 5: enabled 1
1429 12:18:06.061191 USB2 port 6: enabled 0
1430 12:18:06.063458 USB2 port 9: enabled 1
1431 12:18:06.065642 USB3 port 0: enabled 1
1432 12:18:06.068129 USB3 port 1: enabled 1
1433 12:18:06.070507 USB3 port 2: enabled 1
1434 12:18:06.072705 USB3 port 3: enabled 1
1435 12:18:06.075169 USB3 port 4: enabled 1
1436 12:18:06.077381 USB2 port 4: enabled 1
1437 12:18:06.080138 USB3 port 5: enabled 1
1438 12:18:06.082164 APIC: 02: enabled 1
1439 12:18:06.084688 PCI: 00:08.0: enabled 1
1440 12:18:06.086785 PCI: 00:14.2: enabled 1
1441 12:18:06.092487 BS: BS_DEV_INIT run times (exec / console): 26 / 460 ms
1442 12:18:06.094828 Disabling ACPI via APMC.
1443 12:18:06.098093 APMC done.
1444 12:18:06.102458 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1445 12:18:06.106064 ELOG: NV offset 0xaf0000 size 0x4000
1446 12:18:06.114892 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1447 12:18:06.121079 ELOG: Event(17) added with size 13 at 2023-12-08 12:18:06 UTC
1448 12:18:06.127169 ELOG: Event(92) added with size 9 at 2023-12-08 12:18:06 UTC
1449 12:18:06.133248 ELOG: Event(93) added with size 9 at 2023-12-08 12:18:06 UTC
1450 12:18:06.139526 ELOG: Event(9E) added with size 10 at 2023-12-08 12:18:06 UTC
1451 12:18:06.146060 ELOG: Event(9F) added with size 14 at 2023-12-08 12:18:06 UTC
1452 12:18:06.151614 BS: BS_DEV_INIT exit times (exec / console): 5 / 49 ms
1453 12:18:06.158271 ELOG: Event(A1) added with size 10 at 2023-12-08 12:18:06 UTC
1454 12:18:06.165810 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1455 12:18:06.172184 ELOG: Event(A0) added with size 9 at 2023-12-08 12:18:06 UTC
1456 12:18:06.176495 elog_add_boot_reason: Logged dev mode boot
1457 12:18:06.182280 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1458 12:18:06.184515 Finalize devices...
1459 12:18:06.186120 Devices finalized
1460 12:18:06.191820 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1461 12:18:06.197342 FMAP: area RW_NVRAM found @ afa000 (20480 bytes)
1462 12:18:06.202831 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1463 12:18:06.206919 ME: HFSTS1 : 0x80030045
1464 12:18:06.210512 ME: HFSTS2 : 0x30280136
1465 12:18:06.214917 ME: HFSTS3 : 0x00000050
1466 12:18:06.219036 ME: HFSTS4 : 0x00004800
1467 12:18:06.222989 ME: HFSTS5 : 0x00000000
1468 12:18:06.227179 ME: HFSTS6 : 0x40400006
1469 12:18:06.230339 ME: Manufacturing Mode : NO
1470 12:18:06.233935 ME: FW Partition Table : OK
1471 12:18:06.237130 ME: Bringup Loader Failure : NO
1472 12:18:06.240218 ME: Firmware Init Complete : NO
1473 12:18:06.243542 ME: Boot Options Present : NO
1474 12:18:06.247087 ME: Update In Progress : NO
1475 12:18:06.250650 ME: D0i3 Support : YES
1476 12:18:06.253720 ME: Low Power State Enabled : NO
1477 12:18:06.257135 ME: CPU Replaced : YES
1478 12:18:06.260386 ME: CPU Replacement Valid : YES
1479 12:18:06.263628 ME: Current Working State : 5
1480 12:18:06.266866 ME: Current Operation State : 1
1481 12:18:06.269950 ME: Current Operation Mode : 3
1482 12:18:06.273110 ME: Error Code : 0
1483 12:18:06.276683 ME: CPU Debug Disabled : YES
1484 12:18:06.280147 ME: TXT Support : NO
1485 12:18:06.286179 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1486 12:18:06.291301 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1487 12:18:06.294863 CBFS: Locating 'fallback/dsdt.aml'
1488 12:18:06.298778 CBFS: Found @ offset 636c0 size 32e0
1489 12:18:06.303907 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1490 12:18:06.306766 CBFS: Locating 'fallback/slic'
1491 12:18:06.312012 CBFS: 'fallback/slic' not found.
1492 12:18:06.315770 ACPI: Writing ACPI tables at 99b31000.
1493 12:18:06.317789 ACPI: * FACS
1494 12:18:06.319497 ACPI: * DSDT
1495 12:18:06.323028 Ramoops buffer: 0x100000@0x99a30000.
1496 12:18:06.327910 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1497 12:18:06.332154 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1498 12:18:06.335789 Google Chrome EC: version:
1499 12:18:06.338739 ro: puff_v2.0.4638-67e4d7990
1500 12:18:06.342291 rw: puff_v2.0.4638-67e4d7990
1501 12:18:06.343798 running image: 1
1502 12:18:06.349579 PCI space above 4GB MMIO is at 0x15e800000, len = 0x7ea1800000
1503 12:18:06.353441 ACPI: * FADT
1504 12:18:06.354514 SCI is IRQ9
1505 12:18:06.358463 ACPI: added table 1/32, length now 40
1506 12:18:06.359796 ACPI: * SSDT
1507 12:18:06.363601 Found 1 CPU(s) with 2 core(s) each.
1508 12:18:06.367822 \_SB.PCI0.WFA3.WFA3: Intel WiFi PCI: 00:14.3
1509 12:18:06.371376 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1510 12:18:06.376357 \_SB.PCI0.I2C2.PS17: Parade PS175 at I2C: 02:4a
1511 12:18:06.381574 \_SB.PCI0.I2C3.RTD2: Realtek RTD2142 at I2C: 03:4a
1512 12:18:06.386558 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 04:1a
1513 12:18:06.391408 \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 01:00.0
1514 12:18:06.395931 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1515 12:18:06.402523 EC returned error result code 3
1516 12:18:06.404979 EC returned error result code 1
1517 12:18:06.409285 PS2K: Bad resp from EC. Vivaldi disabled!
1518 12:18:06.416182 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-A Front Left at USB2 port 0
1519 12:18:06.421639 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-C Port Rear at USB2 port 1
1520 12:18:06.428474 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-A Front Right at USB2 port 2
1521 12:18:06.434783 \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Rear Right at USB2 port 3
1522 12:18:06.440737 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Rear Left at USB2 port 5
1523 12:18:06.445577 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1524 12:18:06.452688 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Front Left at USB3 port 0
1525 12:18:06.458391 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Front Right at USB3 port 1
1526 12:18:06.465391 \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Rear Right at USB3 port 2
1527 12:18:06.470683 \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-C Rear at USB3 port 3
1528 12:18:06.477161 \_SB.PCI0.XHCI.RHUB.SS05: USB3 Type-A Rear Left at USB3 port 4
1529 12:18:06.483182 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-A Rear Middle at USB2 port 4
1530 12:18:06.489901 \_SB.PCI0.XHCI.RHUB.SS06: USB3 Type-A Rear Middle at USB3 port 5
1531 12:18:06.493470 ACPI: added table 2/32, length now 44
1532 12:18:06.494920 ACPI: * MCFG
1533 12:18:06.499365 ACPI: added table 3/32, length now 48
1534 12:18:06.500861 ACPI: * TPM2
1535 12:18:06.503495 TPM2 log created at 0x99a20000
1536 12:18:06.507776 ACPI: added table 4/32, length now 52
1537 12:18:06.509221 ACPI: * MADT
1538 12:18:06.510648 SCI is IRQ9
1539 12:18:06.514274 ACPI: added table 5/32, length now 56
1540 12:18:06.516107 current = 99b36070
1541 12:18:06.517960 ACPI: * DMAR
1542 12:18:06.521468 ACPI: added table 6/32, length now 60
1543 12:18:06.525732 ACPI: added table 7/32, length now 64
1544 12:18:06.526961 ACPI: * HPET
1545 12:18:06.530963 ACPI: added table 8/32, length now 68
1546 12:18:06.532420 ACPI: done.
1547 12:18:06.535243 ACPI tables: 20912 bytes.
1548 12:18:06.537859 smbios_write_tables: 99a1f000
1549 12:18:06.541290 EC returned error result code 3
1550 12:18:06.544762 Couldn't obtain OEM name from CBI
1551 12:18:06.547599 Create SMBIOS type 17
1552 12:18:06.550533 PCI: 00:00.0 (Intel Cannonlake)
1553 12:18:06.553396 PCI: 00:14.3 (Intel WiFi)
1554 12:18:06.555882 SMBIOS tables: 841 bytes.
1555 12:18:06.559800 Writing table forward entry at 0x00000500
1556 12:18:06.566490 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1629
1557 12:18:06.569985 Writing coreboot table at 0x99b55000
1558 12:18:06.576109 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1559 12:18:06.580619 1. 0000000000001000-000000000009ffff: RAM
1560 12:18:06.584828 2. 00000000000a0000-00000000000fffff: RESERVED
1561 12:18:06.589204 3. 0000000000100000-0000000099a1efff: RAM
1562 12:18:06.594952 4. 0000000099a1f000-0000000099ba4fff: CONFIGURATION TABLES
1563 12:18:06.600032 5. 0000000099ba5000-0000000099c0afff: RAMSTAGE
1564 12:18:06.606094 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1565 12:18:06.610577 7. 000000009a000000-000000009f7fffff: RESERVED
1566 12:18:06.615310 8. 00000000e0000000-00000000efffffff: RESERVED
1567 12:18:06.619899 9. 00000000fc000000-00000000fc000fff: RESERVED
1568 12:18:06.625195 10. 00000000fe000000-00000000fe00ffff: RESERVED
1569 12:18:06.630039 11. 00000000fed10000-00000000fed17fff: RESERVED
1570 12:18:06.634378 12. 00000000fed80000-00000000fed83fff: RESERVED
1571 12:18:06.639396 13. 00000000fed90000-00000000fed91fff: RESERVED
1572 12:18:06.644364 14. 00000000feda0000-00000000feda1fff: RESERVED
1573 12:18:06.648244 15. 0000000100000000-000000015e7fffff: RAM
1574 12:18:06.651731 Graphics hand-off block not found
1575 12:18:06.655717 FSP did not return a valid framebuffer
1576 12:18:06.658478 Passing 4 GPIOs to payload:
1577 12:18:06.663631 NAME | PORT | POLARITY | VALUE
1578 12:18:06.668738 lid | undefined | high | high
1579 12:18:06.674464 power | undefined | high | low
1580 12:18:06.679192 oprom | undefined | high | low
1581 12:18:06.685163 EC in RW | 0x000000cb | high | low
1582 12:18:06.685798 Board ID: 4
1583 12:18:06.691186 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1584 12:18:06.697648 Wrote coreboot table at: 0x99b55000, 0x578 bytes, checksum 1a32
1585 12:18:06.699869 coreboot table: 1424 bytes.
1586 12:18:06.704731 IMD ROOT 0. 0x99fff000 0x00001000
1587 12:18:06.707514 IMD SMALL 1. 0x99ffe000 0x00001000
1588 12:18:06.711260 FSP MEMORY 2. 0x99c4e000 0x003b0000
1589 12:18:06.715023 CONSOLE 3. 0x99c2e000 0x00020000
1590 12:18:06.718819 FMAP 4. 0x99c2d000 0x00000578
1591 12:18:06.722694 TIME STAMP 5. 0x99c2c000 0x00000910
1592 12:18:06.726134 VBOOT WORK 6. 0x99c18000 0x00014000
1593 12:18:06.729690 MRC DATA 7. 0x99c16000 0x00001958
1594 12:18:06.733845 ROMSTG STCK 8. 0x99c15000 0x00001000
1595 12:18:06.737444 AFTER CAR 9. 0x99c0b000 0x0000a000
1596 12:18:06.741364 RAMSTAGE 10. 0x99ba4000 0x00067000
1597 12:18:06.744595 REFCODE 11. 0x99b6f000 0x00035000
1598 12:18:06.748533 SMM BACKUP 12. 0x99b5f000 0x00010000
1599 12:18:06.751810 4f444749 13. 0x99b5d000 0x00002000
1600 12:18:06.755736 COREBOOT 14. 0x99b55000 0x00008000
1601 12:18:06.759490 ACPI 15. 0x99b31000 0x00024000
1602 12:18:06.763478 ACPI GNVS 16. 0x99b30000 0x00001000
1603 12:18:06.767242 RAMOOPS 17. 0x99a30000 0x00100000
1604 12:18:06.771192 TPM2 TCGLOG18. 0x99a20000 0x00010000
1605 12:18:06.774116 SMBIOS 19. 0x99a1f000 0x00000800
1606 12:18:06.776302 IMD small region:
1607 12:18:06.780023 IMD ROOT 0. 0x99ffec00 0x00000400
1608 12:18:06.783971 FSP RUNTIME 1. 0x99ffebe0 0x00000004
1609 12:18:06.787962 VPD 2. 0x99ffeb80 0x00000058
1610 12:18:06.791768 POWER STATE 3. 0x99ffeb40 0x00000040
1611 12:18:06.796082 ROMSTAGE 4. 0x99ffeb20 0x00000004
1612 12:18:06.799521 MEM INFO 5. 0x99ffe960 0x000001b9
1613 12:18:06.805948 BS: BS_WRITE_TABLES run times (exec / console): 8 / 504 ms
1614 12:18:06.808497 MTRR: Physical address space:
1615 12:18:06.815089 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1616 12:18:06.821212 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1617 12:18:06.826938 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1618 12:18:06.833350 0x000000009b000000 - 0x00000000a0000000 size 0x05000000 type 0
1619 12:18:06.839844 0x00000000a0000000 - 0x00000000b0000000 size 0x10000000 type 1
1620 12:18:06.845708 0x00000000b0000000 - 0x0000000100000000 size 0x50000000 type 0
1621 12:18:06.852141 0x0000000100000000 - 0x000000015e800000 size 0x5e800000 type 6
1622 12:18:06.856546 MTRR: Fixed MSR 0x250 0x0606060606060606
1623 12:18:06.860398 MTRR: Fixed MSR 0x258 0x0606060606060606
1624 12:18:06.864351 MTRR: Fixed MSR 0x259 0x0000000000000000
1625 12:18:06.868654 MTRR: Fixed MSR 0x268 0x0606060606060606
1626 12:18:06.872233 MTRR: Fixed MSR 0x269 0x0606060606060606
1627 12:18:06.877096 MTRR: Fixed MSR 0x26a 0x0606060606060606
1628 12:18:06.880771 MTRR: Fixed MSR 0x26b 0x0606060606060606
1629 12:18:06.884696 MTRR: Fixed MSR 0x26c 0x0606060606060606
1630 12:18:06.889361 MTRR: Fixed MSR 0x26d 0x0606060606060606
1631 12:18:06.893076 MTRR: Fixed MSR 0x26e 0x0606060606060606
1632 12:18:06.896795 MTRR: Fixed MSR 0x26f 0x0606060606060606
1633 12:18:06.900032 call enable_fixed_mtrr()
1634 12:18:06.903651 CPU physical address size: 39 bits
1635 12:18:06.908184 MTRR: default type WB/UC MTRR counts: 5/6.
1636 12:18:06.911129 MTRR: WB selected as default type.
1637 12:18:06.917474 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1638 12:18:06.923713 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1639 12:18:06.929585 MTRR: 2 base 0x00000000a0000000 mask 0x0000007ff0000000 type 1
1640 12:18:06.936685 MTRR: 3 base 0x00000000b0000000 mask 0x0000007ff0000000 type 0
1641 12:18:06.942529 MTRR: 4 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1642 12:18:06.947127 MTRR: Fixed MSR 0x250 0x0606060606060606
1643 12:18:06.951416 MTRR: Fixed MSR 0x258 0x0606060606060606
1644 12:18:06.955167 MTRR: Fixed MSR 0x259 0x0000000000000000
1645 12:18:06.959680 MTRR: Fixed MSR 0x268 0x0606060606060606
1646 12:18:06.963745 MTRR: Fixed MSR 0x269 0x0606060606060606
1647 12:18:06.967454 MTRR: Fixed MSR 0x26a 0x0606060606060606
1648 12:18:06.971765 MTRR: Fixed MSR 0x26b 0x0606060606060606
1649 12:18:06.975467 MTRR: Fixed MSR 0x26c 0x0606060606060606
1650 12:18:06.979968 MTRR: Fixed MSR 0x26d 0x0606060606060606
1651 12:18:06.983803 MTRR: Fixed MSR 0x26e 0x0606060606060606
1652 12:18:06.988176 MTRR: Fixed MSR 0x26f 0x0606060606060606
1653 12:18:06.988272
1654 12:18:06.989546 MTRR check
1655 12:18:06.991519 Fixed MTRRs : Enabled
1656 12:18:06.993798 Variable MTRRs: Enabled
1657 12:18:06.994728
1658 12:18:06.996751 call enable_fixed_mtrr()
1659 12:18:07.002680 BS: BS_WRITE_TABLES exit times (exec / console): 46 / 142 ms
1660 12:18:07.006451 CPU physical address size: 39 bits
1661 12:18:07.008461 Probing TPM: done!
1662 12:18:07.013644 Connected to device vid:did:rid of 1ae0:0028:00
1663 12:18:07.024040 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
1664 12:18:07.027529 Initialized TPM device CR50 revision 0
1665 12:18:07.031844 Checking cr50 for pending updates
1666 12:18:07.036914 Reading cr50 TPM mode
1667 12:18:07.046429 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 25 ms
1668 12:18:07.051718 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1669 12:18:07.055608 CBFS: Locating 'fallback/payload'
1670 12:18:07.060298 CBFS: Found @ offset 3a0c00 size 48db0
1671 12:18:07.064145 Checking segment from ROM address 0xfffa8c38
1672 12:18:07.068960 Checking segment from ROM address 0xfffa8c54
1673 12:18:07.073470 Loading segment from ROM address 0xfffa8c38
1674 12:18:07.075710 code (compression=0)
1675 12:18:07.084730 New segment dstaddr 0x30000000 memsize 0x2660100 srcaddr 0xfffa8c70 filesize 0x48d78
1676 12:18:07.092666 Loading Segment: addr: 0x30000000 memsz: 0x0000000002660100 filesz: 0x0000000000048d78
1677 12:18:07.095131 it's not compressed!
1678 12:18:07.197665 [ 0x30000000, 30048d78, 0x32660100) <- fffa8c70
1679 12:18:07.204666 Clearing Segment: addr: 0x0000000030048d78 memsz: 0x0000000002617388
1680 12:18:07.212442 Loading segment from ROM address 0xfffa8c54
1681 12:18:07.214863 Entry Point 0x30000000
1682 12:18:07.216401 Loaded segments
1683 12:18:07.222332 BS: BS_PAYLOAD_LOAD run times (exec / console): 103 / 67 ms
1684 12:18:07.226228 Finalizing chipset.
1685 12:18:07.228255 Finalizing SMM.
1686 12:18:07.229369 APMC done.
1687 12:18:07.235309 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 5 ms
1688 12:18:07.238902 mp_park_aps done after 0 msecs.
1689 12:18:07.242569 Jumping to boot code at 0x30000000(0x99b55000)
1690 12:18:07.252600 CPU0: stack: 0x99bf8000 - 0x99bf9000, lowest used address 0x99bf8a88, stack used: 1400 bytes
1691 12:18:07.252686
1692 12:18:07.252752
1693 12:18:07.252813
1694 12:18:07.256057 Starting depthcharge on Kaisa...
1695 12:18:07.256141
1696 12:18:07.256928 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
1697 12:18:07.257051 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
1698 12:18:07.257171 Setting prompt string to ['puff:']
1699 12:18:07.257263 bootloader-commands: Wait for prompt ['puff:'] (timeout 00:04:43)
1700 12:18:07.263725 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1701 12:18:07.263826
1702 12:18:07.271274 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1703 12:18:07.271415
1704 12:18:07.273120 BIOS MMAP details:
1705 12:18:07.273202
1706 12:18:07.275491 IFD Base Offset : 0x300000
1707 12:18:07.275612
1708 12:18:07.278647 IFD End Offset : 0x1000000
1709 12:18:07.279190
1710 12:18:07.281588 MMAP Size : 0xd00000
1711 12:18:07.281696
1712 12:18:07.284654 MMAP Start : 0xff300000
1713 12:18:07.284941
1714 12:18:07.289457 Looking for NVMe Controller 0x3105c848 @ 00:1d:00
1715 12:18:07.289940
1716 12:18:07.291893 Wipe memory regions:
1717 12:18:07.291975
1718 12:18:07.295468 [0x00000000001000, 0x000000000a0000)
1719 12:18:07.295553
1720 12:18:07.299352 [0x00000000100000, 0x00000030000000)
1721 12:18:07.347535
1722 12:18:07.351183 [0x00000032660100, 0x00000099a1f000)
1723 12:18:07.454886
1724 12:18:07.458426 [0x00000100000000, 0x0000015e800000)
1725 12:18:07.859460
1726 12:18:07.861466 R8152: Initializing
1727 12:18:07.861556
1728 12:18:07.864270 Version 9 (ocp_data = 6010)
1729 12:18:07.864817
1730 12:18:07.867777 R8152: Done initializing
1731 12:18:07.867860
1732 12:18:07.869020 Adding net device
1733 12:18:08.169617
1734 12:18:08.175371 [firmware-puff-13324.B-collabora] Feb 14 2023 12:06:39
1735 12:18:08.175461
1736 12:18:08.175528
1737 12:18:08.175590
1738 12:18:08.176061 Setting prompt string to ['puff:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1740 12:18:08.276478 puff: tftpboot 192.168.201.1 12217913/tftp-deploy-yljilj5t/kernel/bzImage 12217913/tftp-deploy-yljilj5t/kernel/cmdline 12217913/tftp-deploy-yljilj5t/ramdisk/ramdisk.cpio.gz
1741 12:18:08.276645 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1742 12:18:08.276755 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
1743 12:18:08.326005 tftpboot 192.168.201.1 12217913/tftp-deploy-yljilj5t/kernel/bzImage 12217913/tftp-deploy-yljilj5t/kernel/cmdline 12217913/tftp-deploy-yljilj5t/ramdisk/ramdisk.cpio.gz
1744 12:18:08.326229
1745 12:18:08.326620 Waiting for link
1746 12:18:08.480207
1747 12:18:08.481411 done.
1748 12:18:08.481504
1749 12:18:08.483407 MAC: 00:e0:4c:68:02:15
1750 12:18:08.483823
1751 12:18:08.486445 Sending DHCP discover... done.
1752 12:18:08.486709
1753 12:18:08.489610 Waiting for reply... done.
1754 12:18:08.489719
1755 12:18:08.492389 Sending DHCP request... done.
1756 12:18:08.492502
1757 12:18:08.496362 Waiting for reply... done.
1758 12:18:08.496468
1759 12:18:08.499168 My ip is 192.168.201.14
1760 12:18:08.499435
1761 12:18:08.502534 The DHCP server ip is 192.168.201.1
1762 12:18:08.503152
1763 12:18:08.507748 TFTP server IP predefined by user: 192.168.201.1
1764 12:18:08.507851
1765 12:18:08.514863 Bootfile predefined by user: 12217913/tftp-deploy-yljilj5t/kernel/bzImage
1766 12:18:08.514968
1767 12:18:08.517976 Sending tftp read request... done.
1768 12:18:08.518524
1769 12:18:08.521593 Waiting for the transfer...
1770 12:18:08.522338
1771 12:18:08.768208 00000000 ################################################################
1772 12:18:08.768535
1773 12:18:09.010978 00080000 ################################################################
1774 12:18:09.011384
1775 12:18:09.252072 00100000 ################################################################
1776 12:18:09.252448
1777 12:18:09.494120 00180000 ################################################################
1778 12:18:09.494545
1779 12:18:09.740345 00200000 ################################################################
1780 12:18:09.741209
1781 12:18:09.996056 00280000 ################################################################
1782 12:18:09.996392
1783 12:18:10.256367 00300000 ################################################################
1784 12:18:10.256959
1785 12:18:10.515724 00380000 ################################################################
1786 12:18:10.515857
1787 12:18:10.783896 00400000 ################################################################
1788 12:18:10.784425
1789 12:18:11.029573 00480000 ################################################################
1790 12:18:11.029926
1791 12:18:11.276072 00500000 ################################################################
1792 12:18:11.276604
1793 12:18:11.521413 00580000 ################################################################
1794 12:18:11.521898
1795 12:18:11.772270 00600000 ################################################################
1796 12:18:11.772738
1797 12:18:12.014576 00680000 ################################################################
1798 12:18:12.015253
1799 12:18:12.264083 00700000 ################################################################
1800 12:18:12.265214
1801 12:18:12.512195 00780000 ################################################################
1802 12:18:12.512546
1803 12:18:12.761683 00800000 ################################################################
1804 12:18:12.762173
1805 12:18:13.004297 00880000 ################################################################
1806 12:18:13.004729
1807 12:18:13.246537 00900000 ################################################################
1808 12:18:13.247052
1809 12:18:13.493963 00980000 ################################################################
1810 12:18:13.494421
1811 12:18:13.738597 00a00000 ################################################################
1812 12:18:13.739079
1813 12:18:13.984610 00a80000 ################################################################
1814 12:18:13.985134
1815 12:18:14.002809 00b00000 ##### done.
1816 12:18:14.002937
1817 12:18:14.006433 The bootfile was 11571200 bytes long.
1818 12:18:14.007088
1819 12:18:14.009933 Sending tftp read request... done.
1820 12:18:14.010400
1821 12:18:14.012848 Waiting for the transfer...
1822 12:18:14.012929
1823 12:18:14.266728 00000000 ################################################################
1824 12:18:14.267316
1825 12:18:14.505416 00080000 ################################################################
1826 12:18:14.505869
1827 12:18:14.766885 00100000 ################################################################
1828 12:18:14.767365
1829 12:18:15.020508 00180000 ################################################################
1830 12:18:15.021007
1831 12:18:15.265880 00200000 ################################################################
1832 12:18:15.266266
1833 12:18:15.508322 00280000 ################################################################
1834 12:18:15.508820
1835 12:18:15.748100 00300000 ################################################################
1836 12:18:15.748642
1837 12:18:15.989833 00380000 ################################################################
1838 12:18:15.990487
1839 12:18:16.236821 00400000 ################################################################
1840 12:18:16.237282
1841 12:18:16.479282 00480000 ################################################################
1842 12:18:16.479782
1843 12:18:16.720714 00500000 ################################################################
1844 12:18:16.721272
1845 12:18:16.966599 00580000 ################################################################
1846 12:18:16.967058
1847 12:18:17.223995 00600000 ################################################################
1848 12:18:17.224382
1849 12:18:17.480028 00680000 ################################################################
1850 12:18:17.480515
1851 12:18:17.727939 00700000 ################################################################
1852 12:18:17.728532
1853 12:18:17.986602 00780000 ################################################################
1854 12:18:17.986992
1855 12:18:18.244045 00800000 ################################################################
1856 12:18:18.244602
1857 12:18:18.395860 00880000 ######################################## done.
1858 12:18:18.396029
1859 12:18:18.399391 Sending tftp read request... done.
1860 12:18:18.399741
1861 12:18:18.402180 Waiting for the transfer...
1862 12:18:18.402262
1863 12:18:18.404254 00000000 # done.
1864 12:18:18.404337
1865 12:18:18.413395 Command line loaded dynamically from TFTP file: 12217913/tftp-deploy-yljilj5t/kernel/cmdline
1866 12:18:18.413480
1867 12:18:18.428576 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1868 12:18:18.429083
1869 12:18:18.433491 ec_init: CrosEC protocol v3 supported (256, 256)
1870 12:18:18.437823
1871 12:18:18.441675 Shutting down all USB controllers.
1872 12:18:18.441757
1873 12:18:18.444156 Removing current net device
1874 12:18:18.444618
1875 12:18:18.446573 Finalizing coreboot
1876 12:18:18.446917
1877 12:18:18.452036 Exiting depthcharge with code 4 at timestamp: 20629523
1878 12:18:18.452182
1879 12:18:18.452276
1880 12:18:18.454068 Starting kernel ...
1881 12:18:18.454581 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
1882 12:18:18.454681 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
1883 12:18:18.454756 Setting prompt string to ['Linux version [0-9]']
1884 12:18:18.454823 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1885 12:18:18.454892 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1886 12:18:18.455066
1887 12:18:18.455135
1889 12:22:50.455629 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
1891 12:22:50.456605 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
1893 12:22:50.457457 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1896 12:22:50.458829 end: 2 depthcharge-action (duration 00:05:00) [common]
1898 12:22:50.459970 Cleaning after the job
1899 12:22:50.460414 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217913/tftp-deploy-yljilj5t/ramdisk
1900 12:22:50.466626 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217913/tftp-deploy-yljilj5t/kernel
1901 12:22:50.474768 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217913/tftp-deploy-yljilj5t/modules
1902 12:22:50.478141 start: 5.1 power-off (timeout 00:00:30) [common]
1903 12:22:50.478951 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-5' '--port=1' '--command=off'
1904 12:22:51.267609 >> Command sent successfully.
1905 12:22:51.278391 Returned 0 in 0 seconds
1906 12:22:51.379785 end: 5.1 power-off (duration 00:00:01) [common]
1908 12:22:51.381336 start: 5.2 read-feedback (timeout 00:09:59) [common]
1909 12:22:51.382667 Listened to connection for namespace 'common' for up to 1s
1911 12:22:52.383339 Finalising connection for namespace 'common'
1912 12:22:52.384041 Disconnecting from shell: Finalise
1913 12:22:52.384473