Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 12:20:06.602176 lava-dispatcher, installed at version: 2023.10
2 12:20:06.602485 start: 0 validate
3 12:20:06.602688 Start time: 2023-12-08 12:20:06.602678+00:00 (UTC)
4 12:20:06.602899 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:20:06.603101 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:20:06.884022 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:20:06.884272 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:20:14.387227 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:20:14.387442 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:20:14.697663 validate duration: 8.10
12 12:20:14.698154 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:20:14.698335 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:20:14.698510 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:20:14.698738 Not decompressing ramdisk as can be used compressed.
16 12:20:14.698895 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:20:14.699038 saving as /var/lib/lava/dispatcher/tmp/12217891/tftp-deploy-lfjktcyv/ramdisk/rootfs.cpio.gz
18 12:20:14.699148 total size: 8418130 (8 MB)
19 12:20:15.461922 progress 0 % (0 MB)
20 12:20:15.465844 progress 5 % (0 MB)
21 12:20:15.469663 progress 10 % (0 MB)
22 12:20:15.473476 progress 15 % (1 MB)
23 12:20:15.477315 progress 20 % (1 MB)
24 12:20:15.481142 progress 25 % (2 MB)
25 12:20:15.484982 progress 30 % (2 MB)
26 12:20:15.488514 progress 35 % (2 MB)
27 12:20:15.492351 progress 40 % (3 MB)
28 12:20:15.496204 progress 45 % (3 MB)
29 12:20:15.500013 progress 50 % (4 MB)
30 12:20:15.503805 progress 55 % (4 MB)
31 12:20:15.507661 progress 60 % (4 MB)
32 12:20:15.511161 progress 65 % (5 MB)
33 12:20:15.514943 progress 70 % (5 MB)
34 12:20:15.518720 progress 75 % (6 MB)
35 12:20:15.522387 progress 80 % (6 MB)
36 12:20:15.526165 progress 85 % (6 MB)
37 12:20:15.529932 progress 90 % (7 MB)
38 12:20:15.533696 progress 95 % (7 MB)
39 12:20:15.537212 progress 100 % (8 MB)
40 12:20:15.537631 8 MB downloaded in 0.84 s (9.57 MB/s)
41 12:20:15.537872 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:20:15.538285 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:20:15.538435 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:20:15.538573 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:20:15.538783 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:20:15.538904 saving as /var/lib/lava/dispatcher/tmp/12217891/tftp-deploy-lfjktcyv/kernel/bzImage
48 12:20:15.539015 total size: 11571200 (11 MB)
49 12:20:15.539124 No compression specified
50 12:20:15.540838 progress 0 % (0 MB)
51 12:20:15.545863 progress 5 % (0 MB)
52 12:20:15.551162 progress 10 % (1 MB)
53 12:20:15.556162 progress 15 % (1 MB)
54 12:20:15.561458 progress 20 % (2 MB)
55 12:20:15.566738 progress 25 % (2 MB)
56 12:20:15.571709 progress 30 % (3 MB)
57 12:20:15.576967 progress 35 % (3 MB)
58 12:20:15.582198 progress 40 % (4 MB)
59 12:20:15.587164 progress 45 % (4 MB)
60 12:20:15.592400 progress 50 % (5 MB)
61 12:20:15.597654 progress 55 % (6 MB)
62 12:20:15.602600 progress 60 % (6 MB)
63 12:20:15.607872 progress 65 % (7 MB)
64 12:20:15.613092 progress 70 % (7 MB)
65 12:20:15.618010 progress 75 % (8 MB)
66 12:20:15.623161 progress 80 % (8 MB)
67 12:20:15.628344 progress 85 % (9 MB)
68 12:20:15.633228 progress 90 % (9 MB)
69 12:20:15.638423 progress 95 % (10 MB)
70 12:20:15.643630 progress 100 % (11 MB)
71 12:20:15.643882 11 MB downloaded in 0.10 s (105.24 MB/s)
72 12:20:15.644117 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:20:15.644525 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:20:15.644673 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:20:15.644814 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:20:15.645021 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:20:15.645141 saving as /var/lib/lava/dispatcher/tmp/12217891/tftp-deploy-lfjktcyv/modules/modules.tar
79 12:20:15.645249 total size: 483904 (0 MB)
80 12:20:15.645357 Using unxz to decompress xz
81 12:20:15.651525 progress 6 % (0 MB)
82 12:20:15.652180 progress 13 % (0 MB)
83 12:20:15.652596 progress 20 % (0 MB)
84 12:20:15.654591 progress 27 % (0 MB)
85 12:20:15.657470 progress 33 % (0 MB)
86 12:20:15.660161 progress 40 % (0 MB)
87 12:20:15.662978 progress 47 % (0 MB)
88 12:20:15.665742 progress 54 % (0 MB)
89 12:20:15.668629 progress 60 % (0 MB)
90 12:20:15.671579 progress 67 % (0 MB)
91 12:20:15.674508 progress 74 % (0 MB)
92 12:20:15.677536 progress 81 % (0 MB)
93 12:20:15.680344 progress 88 % (0 MB)
94 12:20:15.683124 progress 94 % (0 MB)
95 12:20:15.686797 progress 100 % (0 MB)
96 12:20:15.696257 0 MB downloaded in 0.05 s (9.05 MB/s)
97 12:20:15.696709 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:20:15.697172 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:20:15.697327 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 12:20:15.697479 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 12:20:15.697618 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:20:15.697758 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 12:20:15.698096 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz
105 12:20:15.698308 makedir: /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin
106 12:20:15.698478 makedir: /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/tests
107 12:20:15.698642 makedir: /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/results
108 12:20:15.698834 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-add-keys
109 12:20:15.699070 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-add-sources
110 12:20:15.699279 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-background-process-start
111 12:20:15.699493 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-background-process-stop
112 12:20:15.699701 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-common-functions
113 12:20:15.699926 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-echo-ipv4
114 12:20:15.700130 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-install-packages
115 12:20:15.700337 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-installed-packages
116 12:20:15.700538 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-os-build
117 12:20:15.700735 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-probe-channel
118 12:20:15.700937 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-probe-ip
119 12:20:15.701143 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-target-ip
120 12:20:15.701344 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-target-mac
121 12:20:15.701539 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-target-storage
122 12:20:15.701744 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-test-case
123 12:20:15.701946 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-test-event
124 12:20:15.702149 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-test-feedback
125 12:20:15.702351 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-test-raise
126 12:20:15.702551 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-test-reference
127 12:20:15.702752 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-test-runner
128 12:20:15.702955 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-test-set
129 12:20:15.703155 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-test-shell
130 12:20:15.703364 Updating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-install-packages (oe)
131 12:20:15.982451 Updating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/bin/lava-installed-packages (oe)
132 12:20:15.982765 Creating /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/environment
133 12:20:15.982944 LAVA metadata
134 12:20:15.983076 - LAVA_JOB_ID=12217891
135 12:20:15.983200 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:20:15.983390 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 12:20:15.983505 skipped lava-vland-overlay
138 12:20:15.983638 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:20:15.983775 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 12:20:15.983915 skipped lava-multinode-overlay
141 12:20:15.984041 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:20:15.984181 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 12:20:15.984324 Loading test definitions
144 12:20:15.984486 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 12:20:15.984614 Using /lava-12217891 at stage 0
146 12:20:15.985449 uuid=12217891_1.4.2.3.1 testdef=None
147 12:20:15.985591 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:20:15.985737 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 12:20:15.986613 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:20:15.987058 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 12:20:15.988096 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:20:15.988501 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 12:20:16.393483 runner path: /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/0/tests/0_dmesg test_uuid 12217891_1.4.2.3.1
156 12:20:16.393808 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:20:16.394244 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:58) [common]
159 12:20:16.394374 Using /lava-12217891 at stage 1
160 12:20:16.394920 uuid=12217891_1.4.2.3.5 testdef=None
161 12:20:16.395070 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:20:16.395213 start: 1.4.2.3.6 test-overlay (timeout 00:09:58) [common]
163 12:20:16.396062 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:20:16.396472 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:58) [common]
166 12:20:16.397601 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:20:16.398014 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:58) [common]
169 12:20:16.857168 runner path: /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/1/tests/1_bootrr test_uuid 12217891_1.4.2.3.5
170 12:20:16.857488 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:20:16.857872 Creating lava-test-runner.conf files
173 12:20:16.858001 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/0 for stage 0
174 12:20:16.858151 - 0_dmesg
175 12:20:16.858283 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217891/lava-overlay-97tgj8wz/lava-12217891/1 for stage 1
176 12:20:16.858432 - 1_bootrr
177 12:20:16.858587 end: 1.4.2.3 test-definition (duration 00:00:01) [common]
178 12:20:16.858728 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
179 12:20:16.871717 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:20:16.871993 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
181 12:20:16.872144 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:20:16.872291 end: 1.4.2 lava-overlay (duration 00:00:01) [common]
183 12:20:16.872435 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
184 12:20:17.221875 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:20:17.225618 start: 1.4.4 extract-modules (timeout 00:09:57) [common]
186 12:20:17.225838 extracting modules file /var/lib/lava/dispatcher/tmp/12217891/tftp-deploy-lfjktcyv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217891/extract-overlay-ramdisk-75rbt9ay/ramdisk
187 12:20:17.261783 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:20:17.262029 start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
189 12:20:17.262181 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12217891/compress-overlay-v25zh0o8/overlay-1.4.2.4.tar.gz to ramdisk
190 12:20:17.262310 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12217891/compress-overlay-v25zh0o8/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12217891/extract-overlay-ramdisk-75rbt9ay/ramdisk
191 12:20:17.277172 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:20:17.277402 start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
193 12:20:17.277555 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:20:17.277700 start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
195 12:20:17.277831 Building ramdisk /var/lib/lava/dispatcher/tmp/12217891/extract-overlay-ramdisk-75rbt9ay/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12217891/extract-overlay-ramdisk-75rbt9ay/ramdisk
196 12:20:17.479465 >> 53982 blocks
197 12:20:18.501234 rename /var/lib/lava/dispatcher/tmp/12217891/extract-overlay-ramdisk-75rbt9ay/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12217891/tftp-deploy-lfjktcyv/ramdisk/ramdisk.cpio.gz
198 12:20:18.501875 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:20:18.502101 start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
200 12:20:18.502287 start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
201 12:20:18.502501 No mkimage arch provided, not using FIT.
202 12:20:18.502685 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:20:18.502859 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:20:18.503065 end: 1.4 prepare-tftp-overlay (duration 00:00:03) [common]
205 12:20:18.503224 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
206 12:20:18.503367 No LXC device requested
207 12:20:18.503518 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:20:18.503675 start: 1.6 deploy-device-env (timeout 00:09:56) [common]
209 12:20:18.503824 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:20:18.503954 Checking files for TFTP limit of 4294967296 bytes.
211 12:20:18.504608 end: 1 tftp-deploy (duration 00:00:04) [common]
212 12:20:18.504848 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:20:18.505037 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:20:18.505285 substitutions:
215 12:20:18.505419 - {DTB}: None
216 12:20:18.505561 - {INITRD}: 12217891/tftp-deploy-lfjktcyv/ramdisk/ramdisk.cpio.gz
217 12:20:18.505673 - {KERNEL}: 12217891/tftp-deploy-lfjktcyv/kernel/bzImage
218 12:20:18.505783 - {LAVA_MAC}: None
219 12:20:18.505892 - {PRESEED_CONFIG}: None
220 12:20:18.506001 - {PRESEED_LOCAL}: None
221 12:20:18.506110 - {RAMDISK}: 12217891/tftp-deploy-lfjktcyv/ramdisk/ramdisk.cpio.gz
222 12:20:18.506220 - {ROOT_PART}: None
223 12:20:18.506327 - {ROOT}: None
224 12:20:18.506435 - {SERVER_IP}: 192.168.201.1
225 12:20:18.506541 - {TEE}: None
226 12:20:18.506648 Parsed boot commands:
227 12:20:18.506754 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:20:18.507043 Parsed boot commands: tftpboot 192.168.201.1 12217891/tftp-deploy-lfjktcyv/kernel/bzImage 12217891/tftp-deploy-lfjktcyv/kernel/cmdline 12217891/tftp-deploy-lfjktcyv/ramdisk/ramdisk.cpio.gz
229 12:20:18.507192 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:20:18.507339 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:20:18.507505 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:20:18.507658 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:20:18.507785 Not connected, no need to disconnect.
234 12:20:18.507920 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:20:18.508065 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:20:18.508188 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
237 12:20:18.513241 Setting prompt string to ['lava-test: # ']
238 12:20:18.513792 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:20:18.513977 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:20:18.514146 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:20:18.514301 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:20:18.514645 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
243 12:20:23.655645 >> Command sent successfully.
244 12:20:23.658938 Returned 0 in 5 seconds
245 12:20:23.759408 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 12:20:23.759889 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 12:20:23.760043 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 12:20:23.760180 Setting prompt string to 'Starting depthcharge on Helios...'
250 12:20:23.760299 Changing prompt to 'Starting depthcharge on Helios...'
251 12:20:23.760418 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 12:20:23.760802 [Enter `^Ec?' for help]
253 12:20:24.378861
254 12:20:24.379109
255 12:20:24.389453 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 12:20:24.393047 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 12:20:24.399147 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 12:20:24.402956 CPU: AES supported, TXT NOT supported, VT supported
259 12:20:24.409357 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 12:20:24.412324 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 12:20:24.419324 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 12:20:24.422992 VBOOT: Loading verstage.
263 12:20:24.427207 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 12:20:24.433548 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 12:20:24.435722 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 12:20:24.439199 CBFS @ c08000 size 3f8000
267 12:20:24.446119 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 12:20:24.449225 CBFS: Locating 'fallback/verstage'
269 12:20:24.452433 CBFS: Found @ offset 10fb80 size 1072c
270 12:20:24.456105
271 12:20:24.456262
272 12:20:24.465956 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 12:20:24.479751 Probing TPM: . done!
274 12:20:24.483636 TPM ready after 0 ms
275 12:20:24.486629 Connected to device vid:did:rid of 1ae0:0028:00
276 12:20:24.496929 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
277 12:20:24.500257 Initialized TPM device CR50 revision 0
278 12:20:24.544627 tlcl_send_startup: Startup return code is 0
279 12:20:24.544851 TPM: setup succeeded
280 12:20:24.557516 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 12:20:24.561289 Chrome EC: UHEPI supported
282 12:20:24.564327 Phase 1
283 12:20:24.568198 FMAP: area GBB found @ c05000 (12288 bytes)
284 12:20:24.574466 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 12:20:24.578145 Phase 2
286 12:20:24.578320 Phase 3
287 12:20:24.581241 FMAP: area GBB found @ c05000 (12288 bytes)
288 12:20:24.587584 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 12:20:24.594513 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
290 12:20:24.597716 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
291 12:20:24.604584 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 12:20:24.620180 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
293 12:20:24.623341 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
294 12:20:24.630056 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 12:20:24.634445 Phase 4
296 12:20:24.637272 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
297 12:20:24.644255 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 12:20:24.823499 VB2:vb2_rsa_verify_digest() Digest check failed!
299 12:20:24.830000 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 12:20:24.830186 Saving nvdata
301 12:20:24.833695 Reboot requested (10020007)
302 12:20:24.836807 board_reset() called!
303 12:20:24.836933 full_reset() called!
304 12:20:29.345427
305 12:20:29.345585
306 12:20:29.355569 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 12:20:29.359146 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 12:20:29.365265 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 12:20:29.369173 CPU: AES supported, TXT NOT supported, VT supported
310 12:20:29.375392 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 12:20:29.378891 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 12:20:29.385671 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 12:20:29.388644 VBOOT: Loading verstage.
314 12:20:29.391855 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 12:20:29.399061 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 12:20:29.405690 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 12:20:29.406217 CBFS @ c08000 size 3f8000
318 12:20:29.412023 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 12:20:29.415891 CBFS: Locating 'fallback/verstage'
320 12:20:29.419291 CBFS: Found @ offset 10fb80 size 1072c
321 12:20:29.422753
322 12:20:29.423269
323 12:20:29.432171 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 12:20:29.446487 Probing TPM: . done!
325 12:20:29.450129 TPM ready after 0 ms
326 12:20:29.453625 Connected to device vid:did:rid of 1ae0:0028:00
327 12:20:29.463480 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
328 12:20:29.467090 Initialized TPM device CR50 revision 0
329 12:20:29.511489 tlcl_send_startup: Startup return code is 0
330 12:20:29.511659 TPM: setup succeeded
331 12:20:29.524234 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 12:20:29.527751 Chrome EC: UHEPI supported
333 12:20:29.531463 Phase 1
334 12:20:29.534925 FMAP: area GBB found @ c05000 (12288 bytes)
335 12:20:29.541528 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 12:20:29.547979 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 12:20:29.551408 Recovery requested (1009000e)
338 12:20:29.556764 Saving nvdata
339 12:20:29.563986 tlcl_extend: response is 0
340 12:20:29.571823 tlcl_extend: response is 0
341 12:20:29.579122 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 12:20:29.582266 CBFS @ c08000 size 3f8000
343 12:20:29.589346 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 12:20:29.592079 CBFS: Locating 'fallback/romstage'
345 12:20:29.595658 CBFS: Found @ offset 80 size 145fc
346 12:20:29.599225 Accumulated console time in verstage 98 ms
347 12:20:29.599399
348 12:20:29.599561
349 12:20:29.611715 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 12:20:29.618442 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 12:20:29.621956 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 12:20:29.625535 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 12:20:29.632719 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 12:20:29.636029 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 12:20:29.638639 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 12:20:29.642352 TCO_STS: 0000 0000
357 12:20:29.645529 GEN_PMCON: e0015238 00000200
358 12:20:29.648558 GBLRST_CAUSE: 00000000 00000000
359 12:20:29.648996 prev_sleep_state 5
360 12:20:29.651683 Boot Count incremented to 1695
361 12:20:29.658338 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 12:20:29.662304 CBFS @ c08000 size 3f8000
363 12:20:29.668683 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 12:20:29.669093 CBFS: Locating 'fspm.bin'
365 12:20:29.675155 CBFS: Found @ offset 5ffc0 size 71000
366 12:20:29.678281 Chrome EC: UHEPI supported
367 12:20:29.685207 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 12:20:29.688946 Probing TPM: done!
369 12:20:29.695319 Connected to device vid:did:rid of 1ae0:0028:00
370 12:20:29.705931 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
371 12:20:29.711276 Initialized TPM device CR50 revision 0
372 12:20:29.720167 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 12:20:29.727061 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 12:20:29.729764 MRC cache found, size 1948
375 12:20:29.733155 bootmode is set to: 2
376 12:20:29.736553 PRMRR disabled by config.
377 12:20:29.739746 SPD INDEX = 1
378 12:20:29.743368 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 12:20:29.747080 CBFS @ c08000 size 3f8000
380 12:20:29.753366 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 12:20:29.753802 CBFS: Locating 'spd.bin'
382 12:20:29.756131 CBFS: Found @ offset 5fb80 size 400
383 12:20:29.759511 SPD: module type is LPDDR3
384 12:20:29.763273 SPD: module part is
385 12:20:29.769286 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 12:20:29.772418 SPD: device width 4 bits, bus width 8 bits
387 12:20:29.776487 SPD: module size is 4096 MB (per channel)
388 12:20:29.779239 memory slot: 0 configuration done.
389 12:20:29.782310 memory slot: 2 configuration done.
390 12:20:29.834634 CBMEM:
391 12:20:29.837257 IMD: root @ 99fff000 254 entries.
392 12:20:29.840495 IMD: root @ 99ffec00 62 entries.
393 12:20:29.843992 External stage cache:
394 12:20:29.847547 IMD: root @ 9abff000 254 entries.
395 12:20:29.850754 IMD: root @ 9abfec00 62 entries.
396 12:20:29.854496 Chrome EC: clear events_b mask to 0x0000000020004000
397 12:20:29.874536 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 12:20:29.883256 tlcl_write: response is 0
399 12:20:29.892942 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 12:20:29.898683 MRC: TPM MRC hash updated successfully.
401 12:20:29.899115 2 DIMMs found
402 12:20:29.902073 SMM Memory Map
403 12:20:29.905255 SMRAM : 0x9a000000 0x1000000
404 12:20:29.908961 Subregion 0: 0x9a000000 0xa00000
405 12:20:29.912176 Subregion 1: 0x9aa00000 0x200000
406 12:20:29.915726 Subregion 2: 0x9ac00000 0x400000
407 12:20:29.918679 top_of_ram = 0x9a000000
408 12:20:29.922071 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 12:20:29.928568 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 12:20:29.932353 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 12:20:29.939000 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 12:20:29.942270 CBFS @ c08000 size 3f8000
413 12:20:29.945149 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 12:20:29.948463 CBFS: Locating 'fallback/postcar'
415 12:20:29.954998 CBFS: Found @ offset 107000 size 4b44
416 12:20:29.958656 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 12:20:29.970427 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 12:20:29.974173 Processing 180 relocs. Offset value of 0x97c0c000
419 12:20:29.982274 Accumulated console time in romstage 285 ms
420 12:20:29.982472
421 12:20:29.982629
422 12:20:29.992517 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 12:20:29.999416 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 12:20:30.002400 CBFS @ c08000 size 3f8000
425 12:20:30.005795 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 12:20:30.012610 CBFS: Locating 'fallback/ramstage'
427 12:20:30.016018 CBFS: Found @ offset 43380 size 1b9e8
428 12:20:30.022700 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 12:20:30.054841 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 12:20:30.057692 Processing 3976 relocs. Offset value of 0x98db0000
431 12:20:30.064232 Accumulated console time in postcar 52 ms
432 12:20:30.064665
433 12:20:30.064978
434 12:20:30.074426 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 12:20:30.081491 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 12:20:30.084528 WARNING: RO_VPD is uninitialized or empty.
437 12:20:30.087983 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 12:20:30.094515 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 12:20:30.095069 Normal boot.
440 12:20:30.100885 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 12:20:30.103989 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 12:20:30.107542 CBFS @ c08000 size 3f8000
443 12:20:30.114096 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 12:20:30.117675 CBFS: Locating 'cpu_microcode_blob.bin'
445 12:20:30.120764 CBFS: Found @ offset 14700 size 2ec00
446 12:20:30.123933 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 12:20:30.127381 Skip microcode update
448 12:20:30.133619 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 12:20:30.134092 CBFS @ c08000 size 3f8000
450 12:20:30.140423 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 12:20:30.143827 CBFS: Locating 'fsps.bin'
452 12:20:30.147137 CBFS: Found @ offset d1fc0 size 35000
453 12:20:30.172645 Detected 4 core, 8 thread CPU.
454 12:20:30.175860 Setting up SMI for CPU
455 12:20:30.179413 IED base = 0x9ac00000
456 12:20:30.179780 IED size = 0x00400000
457 12:20:30.182546 Will perform SMM setup.
458 12:20:30.189062 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 12:20:30.195924 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 12:20:30.199214 Processing 16 relocs. Offset value of 0x00030000
461 12:20:30.203069 Attempting to start 7 APs
462 12:20:30.206254 Waiting for 10ms after sending INIT.
463 12:20:30.222862 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
464 12:20:30.223408 done.
465 12:20:30.225729 AP: slot 7 apic_id 6.
466 12:20:30.228859 AP: slot 6 apic_id 7.
467 12:20:30.229334 AP: slot 1 apic_id 3.
468 12:20:30.233002 AP: slot 3 apic_id 2.
469 12:20:30.235807 Waiting for 2nd SIPI to complete...done.
470 12:20:30.239277 AP: slot 4 apic_id 4.
471 12:20:30.242535 AP: slot 5 apic_id 5.
472 12:20:30.248705 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 12:20:30.255494 Processing 13 relocs. Offset value of 0x00038000
474 12:20:30.258978 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 12:20:30.265208 Installing SMM handler to 0x9a000000
476 12:20:30.272346 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 12:20:30.279396 Processing 658 relocs. Offset value of 0x9a010000
478 12:20:30.285066 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 12:20:30.288755 Processing 13 relocs. Offset value of 0x9a008000
480 12:20:30.295047 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 12:20:30.302598 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 12:20:30.305256 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 12:20:30.312898 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 12:20:30.318945 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 12:20:30.325387 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 12:20:30.328364 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 12:20:30.335016 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 12:20:30.338431 Clearing SMI status registers
489 12:20:30.341617 SMI_STS: PM1
490 12:20:30.342103 PM1_STS: PWRBTN
491 12:20:30.345115 TCO_STS: SECOND_TO
492 12:20:30.348218 New SMBASE 0x9a000000
493 12:20:30.352080 In relocation handler: CPU 0
494 12:20:30.355079 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 12:20:30.358290 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 12:20:30.361577 Relocation complete.
497 12:20:30.365137 New SMBASE 0x99fff800
498 12:20:30.368156 In relocation handler: CPU 2
499 12:20:30.371471 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
500 12:20:30.374513 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 12:20:30.378050 Relocation complete.
502 12:20:30.381649 New SMBASE 0x99fffc00
503 12:20:30.382091 In relocation handler: CPU 1
504 12:20:30.387866 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
505 12:20:30.391157 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 12:20:30.394513 Relocation complete.
507 12:20:30.398061 New SMBASE 0x99fff400
508 12:20:30.398483 In relocation handler: CPU 3
509 12:20:30.404982 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
510 12:20:30.407951 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 12:20:30.411179 Relocation complete.
512 12:20:30.411616 New SMBASE 0x99ffec00
513 12:20:30.414301 In relocation handler: CPU 5
514 12:20:30.421444 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
515 12:20:30.424596 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 12:20:30.427623 Relocation complete.
517 12:20:30.428056 New SMBASE 0x99fff000
518 12:20:30.430811 In relocation handler: CPU 4
519 12:20:30.437984 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
520 12:20:30.441152 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 12:20:30.444602 Relocation complete.
522 12:20:30.445170 New SMBASE 0x99ffe400
523 12:20:30.448058 In relocation handler: CPU 7
524 12:20:30.450755 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
525 12:20:30.458093 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 12:20:30.461364 Relocation complete.
527 12:20:30.461841 New SMBASE 0x99ffe800
528 12:20:30.464459 In relocation handler: CPU 6
529 12:20:30.467929 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
530 12:20:30.474383 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 12:20:30.477856 Relocation complete.
532 12:20:30.478293 Initializing CPU #0
533 12:20:30.481142 CPU: vendor Intel device 806ec
534 12:20:30.484035 CPU: family 06, model 8e, stepping 0c
535 12:20:30.487842 Clearing out pending MCEs
536 12:20:30.490838 Setting up local APIC...
537 12:20:30.491305 apic_id: 0x00 done.
538 12:20:30.494269 Turbo is available but hidden
539 12:20:30.497376 Turbo is available and visible
540 12:20:30.500716 VMX status: enabled
541 12:20:30.504088 IA32_FEATURE_CONTROL status: locked
542 12:20:30.507208 Skip microcode update
543 12:20:30.507652 CPU #0 initialized
544 12:20:30.510907 Initializing CPU #2
545 12:20:30.514036 Initializing CPU #5
546 12:20:30.514473 Initializing CPU #4
547 12:20:30.517450 CPU: vendor Intel device 806ec
548 12:20:30.520688 CPU: family 06, model 8e, stepping 0c
549 12:20:30.524363 CPU: vendor Intel device 806ec
550 12:20:30.527419 CPU: family 06, model 8e, stepping 0c
551 12:20:30.530596 Clearing out pending MCEs
552 12:20:30.533769 Clearing out pending MCEs
553 12:20:30.537595 Setting up local APIC...
554 12:20:30.538036 Initializing CPU #3
555 12:20:30.540668 Initializing CPU #1
556 12:20:30.543751 CPU: vendor Intel device 806ec
557 12:20:30.547802 CPU: family 06, model 8e, stepping 0c
558 12:20:30.550849 Clearing out pending MCEs
559 12:20:30.554052 CPU: vendor Intel device 806ec
560 12:20:30.556960 CPU: family 06, model 8e, stepping 0c
561 12:20:30.560253 CPU: vendor Intel device 806ec
562 12:20:30.563817 CPU: family 06, model 8e, stepping 0c
563 12:20:30.567449 Clearing out pending MCEs
564 12:20:30.570339 Clearing out pending MCEs
565 12:20:30.570779 Setting up local APIC...
566 12:20:30.574190 Setting up local APIC...
567 12:20:30.577206 apic_id: 0x02 done.
568 12:20:30.580063 Setting up local APIC...
569 12:20:30.580587 Initializing CPU #7
570 12:20:30.583433 Initializing CPU #6
571 12:20:30.586901 CPU: vendor Intel device 806ec
572 12:20:30.590166 CPU: family 06, model 8e, stepping 0c
573 12:20:30.590609 VMX status: enabled
574 12:20:30.593372 apic_id: 0x03 done.
575 12:20:30.596937 IA32_FEATURE_CONTROL status: locked
576 12:20:30.600227 VMX status: enabled
577 12:20:30.603583 Skip microcode update
578 12:20:30.606903 IA32_FEATURE_CONTROL status: locked
579 12:20:30.607369 CPU #3 initialized
580 12:20:30.610494 Skip microcode update
581 12:20:30.613288 CPU: vendor Intel device 806ec
582 12:20:30.616830 CPU: family 06, model 8e, stepping 0c
583 12:20:30.620004 Clearing out pending MCEs
584 12:20:30.623560 Clearing out pending MCEs
585 12:20:30.623991 Setting up local APIC...
586 12:20:30.626478 CPU #1 initialized
587 12:20:30.629916 Setting up local APIC...
588 12:20:30.630375 apic_id: 0x05 done.
589 12:20:30.633284 Setting up local APIC...
590 12:20:30.636849 apic_id: 0x07 done.
591 12:20:30.637290 apic_id: 0x06 done.
592 12:20:30.640359 VMX status: enabled
593 12:20:30.643252 VMX status: enabled
594 12:20:30.646715 IA32_FEATURE_CONTROL status: locked
595 12:20:30.650237 IA32_FEATURE_CONTROL status: locked
596 12:20:30.650775 Skip microcode update
597 12:20:30.653699 Skip microcode update
598 12:20:30.656713 CPU #6 initialized
599 12:20:30.657146 CPU #7 initialized
600 12:20:30.659822 apic_id: 0x01 done.
601 12:20:30.663469 VMX status: enabled
602 12:20:30.663901 apic_id: 0x04 done.
603 12:20:30.666619 IA32_FEATURE_CONTROL status: locked
604 12:20:30.669965 VMX status: enabled
605 12:20:30.673276 Skip microcode update
606 12:20:30.676827 IA32_FEATURE_CONTROL status: locked
607 12:20:30.677444 CPU #5 initialized
608 12:20:30.679549 Skip microcode update
609 12:20:30.683176 VMX status: enabled
610 12:20:30.683614 CPU #4 initialized
611 12:20:30.686411 IA32_FEATURE_CONTROL status: locked
612 12:20:30.689613 Skip microcode update
613 12:20:30.692880 CPU #2 initialized
614 12:20:30.696737 bsp_do_flight_plan done after 457 msecs.
615 12:20:30.699961 CPU: frequency set to 4200 MHz
616 12:20:30.700451 Enabling SMIs.
617 12:20:30.702840 Locking SMM.
618 12:20:30.716681 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 12:20:30.719683 CBFS @ c08000 size 3f8000
620 12:20:30.726493 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 12:20:30.726936 CBFS: Locating 'vbt.bin'
622 12:20:30.729468 CBFS: Found @ offset 5f5c0 size 499
623 12:20:30.736781 Found a VBT of 4608 bytes after decompression
624 12:20:30.919122 Display FSP Version Info HOB
625 12:20:30.922653 Reference Code - CPU = 9.0.1e.30
626 12:20:30.925481 uCode Version = 0.0.0.ca
627 12:20:30.928938 TXT ACM version = ff.ff.ff.ffff
628 12:20:30.932988 Display FSP Version Info HOB
629 12:20:30.935633 Reference Code - ME = 9.0.1e.30
630 12:20:30.939236 MEBx version = 0.0.0.0
631 12:20:30.942185 ME Firmware Version = Consumer SKU
632 12:20:30.945279 Display FSP Version Info HOB
633 12:20:30.948999 Reference Code - CML PCH = 9.0.1e.30
634 12:20:30.952328 PCH-CRID Status = Disabled
635 12:20:30.955129 PCH-CRID Original Value = ff.ff.ff.ffff
636 12:20:30.958699 PCH-CRID New Value = ff.ff.ff.ffff
637 12:20:30.961844 OPROM - RST - RAID = ff.ff.ff.ffff
638 12:20:30.965675 ChipsetInit Base Version = ff.ff.ff.ffff
639 12:20:30.968775 ChipsetInit Oem Version = ff.ff.ff.ffff
640 12:20:30.972003 Display FSP Version Info HOB
641 12:20:30.978406 Reference Code - SA - System Agent = 9.0.1e.30
642 12:20:30.981820 Reference Code - MRC = 0.7.1.6c
643 12:20:30.985251 SA - PCIe Version = 9.0.1e.30
644 12:20:30.985691 SA-CRID Status = Disabled
645 12:20:30.989153 SA-CRID Original Value = 0.0.0.c
646 12:20:30.991641 SA-CRID New Value = 0.0.0.c
647 12:20:30.994658 OPROM - VBIOS = ff.ff.ff.ffff
648 12:20:30.998034 RTC Init
649 12:20:31.001793 Set power on after power failure.
650 12:20:31.002027 Disabling Deep S3
651 12:20:31.004410 Disabling Deep S3
652 12:20:31.004622 Disabling Deep S4
653 12:20:31.007765 Disabling Deep S4
654 12:20:31.011337 Disabling Deep S5
655 12:20:31.011496 Disabling Deep S5
656 12:20:31.017926 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
657 12:20:31.021480 Enumerating buses...
658 12:20:31.024925 Show all devs... Before device enumeration.
659 12:20:31.027723 Root Device: enabled 1
660 12:20:31.027844 CPU_CLUSTER: 0: enabled 1
661 12:20:31.031259 DOMAIN: 0000: enabled 1
662 12:20:31.034380 APIC: 00: enabled 1
663 12:20:31.034500 PCI: 00:00.0: enabled 1
664 12:20:31.038279 PCI: 00:02.0: enabled 1
665 12:20:31.041279 PCI: 00:04.0: enabled 0
666 12:20:31.044711 PCI: 00:05.0: enabled 0
667 12:20:31.044843 PCI: 00:12.0: enabled 1
668 12:20:31.047718 PCI: 00:12.5: enabled 0
669 12:20:31.051505 PCI: 00:12.6: enabled 0
670 12:20:31.054338 PCI: 00:14.0: enabled 1
671 12:20:31.054520 PCI: 00:14.1: enabled 0
672 12:20:31.057660 PCI: 00:14.3: enabled 1
673 12:20:31.061107 PCI: 00:14.5: enabled 0
674 12:20:31.064668 PCI: 00:15.0: enabled 1
675 12:20:31.065217 PCI: 00:15.1: enabled 1
676 12:20:31.067871 PCI: 00:15.2: enabled 0
677 12:20:31.070844 PCI: 00:15.3: enabled 0
678 12:20:31.074662 PCI: 00:16.0: enabled 1
679 12:20:31.075102 PCI: 00:16.1: enabled 0
680 12:20:31.077837 PCI: 00:16.2: enabled 0
681 12:20:31.080959 PCI: 00:16.3: enabled 0
682 12:20:31.081396 PCI: 00:16.4: enabled 0
683 12:20:31.084361 PCI: 00:16.5: enabled 0
684 12:20:31.087743 PCI: 00:17.0: enabled 1
685 12:20:31.090571 PCI: 00:19.0: enabled 1
686 12:20:31.091033 PCI: 00:19.1: enabled 0
687 12:20:31.093909 PCI: 00:19.2: enabled 0
688 12:20:31.097551 PCI: 00:1a.0: enabled 0
689 12:20:31.100872 PCI: 00:1c.0: enabled 0
690 12:20:31.101293 PCI: 00:1c.1: enabled 0
691 12:20:31.104201 PCI: 00:1c.2: enabled 0
692 12:20:31.107222 PCI: 00:1c.3: enabled 0
693 12:20:31.110933 PCI: 00:1c.4: enabled 0
694 12:20:31.111374 PCI: 00:1c.5: enabled 0
695 12:20:31.113881 PCI: 00:1c.6: enabled 0
696 12:20:31.117497 PCI: 00:1c.7: enabled 0
697 12:20:31.120538 PCI: 00:1d.0: enabled 1
698 12:20:31.120974 PCI: 00:1d.1: enabled 0
699 12:20:31.124084 PCI: 00:1d.2: enabled 0
700 12:20:31.127200 PCI: 00:1d.3: enabled 0
701 12:20:31.127637 PCI: 00:1d.4: enabled 0
702 12:20:31.130418 PCI: 00:1d.5: enabled 1
703 12:20:31.133566 PCI: 00:1e.0: enabled 1
704 12:20:31.136984 PCI: 00:1e.1: enabled 0
705 12:20:31.137424 PCI: 00:1e.2: enabled 1
706 12:20:31.140575 PCI: 00:1e.3: enabled 1
707 12:20:31.143753 PCI: 00:1f.0: enabled 1
708 12:20:31.147094 PCI: 00:1f.1: enabled 1
709 12:20:31.147534 PCI: 00:1f.2: enabled 1
710 12:20:31.150328 PCI: 00:1f.3: enabled 1
711 12:20:31.153354 PCI: 00:1f.4: enabled 1
712 12:20:31.156870 PCI: 00:1f.5: enabled 1
713 12:20:31.157309 PCI: 00:1f.6: enabled 0
714 12:20:31.160385 USB0 port 0: enabled 1
715 12:20:31.163598 I2C: 00:15: enabled 1
716 12:20:31.164119 I2C: 00:5d: enabled 1
717 12:20:31.166730 GENERIC: 0.0: enabled 1
718 12:20:31.169996 I2C: 00:1a: enabled 1
719 12:20:31.170434 I2C: 00:38: enabled 1
720 12:20:31.173830 I2C: 00:39: enabled 1
721 12:20:31.177146 I2C: 00:3a: enabled 1
722 12:20:31.177584 I2C: 00:3b: enabled 1
723 12:20:31.179838 PCI: 00:00.0: enabled 1
724 12:20:31.183531 SPI: 00: enabled 1
725 12:20:31.183977 SPI: 01: enabled 1
726 12:20:31.186391 PNP: 0c09.0: enabled 1
727 12:20:31.189669 USB2 port 0: enabled 1
728 12:20:31.193225 USB2 port 1: enabled 1
729 12:20:31.193686 USB2 port 2: enabled 0
730 12:20:31.196619 USB2 port 3: enabled 0
731 12:20:31.200072 USB2 port 5: enabled 0
732 12:20:31.200574 USB2 port 6: enabled 1
733 12:20:31.203284 USB2 port 9: enabled 1
734 12:20:31.206335 USB3 port 0: enabled 1
735 12:20:31.209579 USB3 port 1: enabled 1
736 12:20:31.209993 USB3 port 2: enabled 1
737 12:20:31.213412 USB3 port 3: enabled 1
738 12:20:31.216518 USB3 port 4: enabled 0
739 12:20:31.216958 APIC: 03: enabled 1
740 12:20:31.219518 APIC: 01: enabled 1
741 12:20:31.223283 APIC: 02: enabled 1
742 12:20:31.223828 APIC: 04: enabled 1
743 12:20:31.226810 APIC: 05: enabled 1
744 12:20:31.227354 APIC: 07: enabled 1
745 12:20:31.229600 APIC: 06: enabled 1
746 12:20:31.233276 Compare with tree...
747 12:20:31.233713 Root Device: enabled 1
748 12:20:31.236008 CPU_CLUSTER: 0: enabled 1
749 12:20:31.239257 APIC: 00: enabled 1
750 12:20:31.242558 APIC: 03: enabled 1
751 12:20:31.242998 APIC: 01: enabled 1
752 12:20:31.246220 APIC: 02: enabled 1
753 12:20:31.249626 APIC: 04: enabled 1
754 12:20:31.250174 APIC: 05: enabled 1
755 12:20:31.252731 APIC: 07: enabled 1
756 12:20:31.255619 APIC: 06: enabled 1
757 12:20:31.256069 DOMAIN: 0000: enabled 1
758 12:20:31.259177 PCI: 00:00.0: enabled 1
759 12:20:31.262898 PCI: 00:02.0: enabled 1
760 12:20:31.266073 PCI: 00:04.0: enabled 0
761 12:20:31.269978 PCI: 00:05.0: enabled 0
762 12:20:31.270527 PCI: 00:12.0: enabled 1
763 12:20:31.272765 PCI: 00:12.5: enabled 0
764 12:20:31.275673 PCI: 00:12.6: enabled 0
765 12:20:31.279442 PCI: 00:14.0: enabled 1
766 12:20:31.279894 USB0 port 0: enabled 1
767 12:20:31.282590 USB2 port 0: enabled 1
768 12:20:31.285703 USB2 port 1: enabled 1
769 12:20:31.288635 USB2 port 2: enabled 0
770 12:20:31.292143 USB2 port 3: enabled 0
771 12:20:31.295502 USB2 port 5: enabled 0
772 12:20:31.295951 USB2 port 6: enabled 1
773 12:20:31.298852 USB2 port 9: enabled 1
774 12:20:31.301855 USB3 port 0: enabled 1
775 12:20:31.305217 USB3 port 1: enabled 1
776 12:20:31.308912 USB3 port 2: enabled 1
777 12:20:31.311913 USB3 port 3: enabled 1
778 12:20:31.312391 USB3 port 4: enabled 0
779 12:20:31.315060 PCI: 00:14.1: enabled 0
780 12:20:31.319137 PCI: 00:14.3: enabled 1
781 12:20:31.321866 PCI: 00:14.5: enabled 0
782 12:20:31.325524 PCI: 00:15.0: enabled 1
783 12:20:31.325961 I2C: 00:15: enabled 1
784 12:20:31.328924 PCI: 00:15.1: enabled 1
785 12:20:31.332242 I2C: 00:5d: enabled 1
786 12:20:31.335566 GENERIC: 0.0: enabled 1
787 12:20:31.338313 PCI: 00:15.2: enabled 0
788 12:20:31.338755 PCI: 00:15.3: enabled 0
789 12:20:31.341690 PCI: 00:16.0: enabled 1
790 12:20:31.345432 PCI: 00:16.1: enabled 0
791 12:20:31.348447 PCI: 00:16.2: enabled 0
792 12:20:31.351855 PCI: 00:16.3: enabled 0
793 12:20:31.352333 PCI: 00:16.4: enabled 0
794 12:20:31.355057 PCI: 00:16.5: enabled 0
795 12:20:31.358268 PCI: 00:17.0: enabled 1
796 12:20:31.361646 PCI: 00:19.0: enabled 1
797 12:20:31.362190 I2C: 00:1a: enabled 1
798 12:20:31.365801 I2C: 00:38: enabled 1
799 12:20:31.368471 I2C: 00:39: enabled 1
800 12:20:31.371304 I2C: 00:3a: enabled 1
801 12:20:31.375167 I2C: 00:3b: enabled 1
802 12:20:31.375607 PCI: 00:19.1: enabled 0
803 12:20:31.377793 PCI: 00:19.2: enabled 0
804 12:20:31.381631 PCI: 00:1a.0: enabled 0
805 12:20:31.384705 PCI: 00:1c.0: enabled 0
806 12:20:31.388117 PCI: 00:1c.1: enabled 0
807 12:20:31.388609 PCI: 00:1c.2: enabled 0
808 12:20:31.391430 PCI: 00:1c.3: enabled 0
809 12:20:31.394602 PCI: 00:1c.4: enabled 0
810 12:20:31.397703 PCI: 00:1c.5: enabled 0
811 12:20:31.398150 PCI: 00:1c.6: enabled 0
812 12:20:31.401230 PCI: 00:1c.7: enabled 0
813 12:20:31.404512 PCI: 00:1d.0: enabled 1
814 12:20:31.407761 PCI: 00:1d.1: enabled 0
815 12:20:31.410827 PCI: 00:1d.2: enabled 0
816 12:20:31.411158 PCI: 00:1d.3: enabled 0
817 12:20:31.414241 PCI: 00:1d.4: enabled 0
818 12:20:31.417553 PCI: 00:1d.5: enabled 1
819 12:20:31.420541 PCI: 00:00.0: enabled 1
820 12:20:31.423744 PCI: 00:1e.0: enabled 1
821 12:20:31.423984 PCI: 00:1e.1: enabled 0
822 12:20:31.427290 PCI: 00:1e.2: enabled 1
823 12:20:31.430826 SPI: 00: enabled 1
824 12:20:31.434417 PCI: 00:1e.3: enabled 1
825 12:20:31.434659 SPI: 01: enabled 1
826 12:20:31.437518 PCI: 00:1f.0: enabled 1
827 12:20:31.441099 PNP: 0c09.0: enabled 1
828 12:20:31.444414 PCI: 00:1f.1: enabled 1
829 12:20:31.448096 PCI: 00:1f.2: enabled 1
830 12:20:31.448742 PCI: 00:1f.3: enabled 1
831 12:20:31.450448 PCI: 00:1f.4: enabled 1
832 12:20:31.454460 PCI: 00:1f.5: enabled 1
833 12:20:31.457747 PCI: 00:1f.6: enabled 0
834 12:20:31.460677 Root Device scanning...
835 12:20:31.463857 scan_static_bus for Root Device
836 12:20:31.464454 CPU_CLUSTER: 0 enabled
837 12:20:31.467493 DOMAIN: 0000 enabled
838 12:20:31.470429 DOMAIN: 0000 scanning...
839 12:20:31.474300 PCI: pci_scan_bus for bus 00
840 12:20:31.477182 PCI: 00:00.0 [8086/0000] ops
841 12:20:31.480748 PCI: 00:00.0 [8086/9b61] enabled
842 12:20:31.483665 PCI: 00:02.0 [8086/0000] bus ops
843 12:20:31.487213 PCI: 00:02.0 [8086/9b41] enabled
844 12:20:31.490674 PCI: 00:04.0 [8086/1903] disabled
845 12:20:31.493977 PCI: 00:08.0 [8086/1911] enabled
846 12:20:31.497343 PCI: 00:12.0 [8086/02f9] enabled
847 12:20:31.500701 PCI: 00:14.0 [8086/0000] bus ops
848 12:20:31.503587 PCI: 00:14.0 [8086/02ed] enabled
849 12:20:31.507391 PCI: 00:14.2 [8086/02ef] enabled
850 12:20:31.510254 PCI: 00:14.3 [8086/02f0] enabled
851 12:20:31.514253 PCI: 00:15.0 [8086/0000] bus ops
852 12:20:31.516945 PCI: 00:15.0 [8086/02e8] enabled
853 12:20:31.520242 PCI: 00:15.1 [8086/0000] bus ops
854 12:20:31.523635 PCI: 00:15.1 [8086/02e9] enabled
855 12:20:31.526632 PCI: 00:16.0 [8086/0000] ops
856 12:20:31.530482 PCI: 00:16.0 [8086/02e0] enabled
857 12:20:31.533738 PCI: 00:17.0 [8086/0000] ops
858 12:20:31.536624 PCI: 00:17.0 [8086/02d3] enabled
859 12:20:31.539904 PCI: 00:19.0 [8086/0000] bus ops
860 12:20:31.543491 PCI: 00:19.0 [8086/02c5] enabled
861 12:20:31.546616 PCI: 00:1d.0 [8086/0000] bus ops
862 12:20:31.550053 PCI: 00:1d.0 [8086/02b0] enabled
863 12:20:31.553608 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 12:20:31.556371 PCI: 00:1e.0 [8086/0000] ops
865 12:20:31.560110 PCI: 00:1e.0 [8086/02a8] enabled
866 12:20:31.563105 PCI: 00:1e.2 [8086/0000] bus ops
867 12:20:31.566309 PCI: 00:1e.2 [8086/02aa] enabled
868 12:20:31.569640 PCI: 00:1e.3 [8086/0000] bus ops
869 12:20:31.573392 PCI: 00:1e.3 [8086/02ab] enabled
870 12:20:31.576516 PCI: 00:1f.0 [8086/0000] bus ops
871 12:20:31.580060 PCI: 00:1f.0 [8086/0284] enabled
872 12:20:31.586657 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 12:20:31.592757 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 12:20:31.596875 PCI: 00:1f.3 [8086/0000] bus ops
875 12:20:31.599812 PCI: 00:1f.3 [8086/02c8] enabled
876 12:20:31.603018 PCI: 00:1f.4 [8086/0000] bus ops
877 12:20:31.606226 PCI: 00:1f.4 [8086/02a3] enabled
878 12:20:31.609643 PCI: 00:1f.5 [8086/0000] bus ops
879 12:20:31.612890 PCI: 00:1f.5 [8086/02a4] enabled
880 12:20:31.615989 PCI: Leftover static devices:
881 12:20:31.616420 PCI: 00:05.0
882 12:20:31.616764 PCI: 00:12.5
883 12:20:31.619575 PCI: 00:12.6
884 12:20:31.620187 PCI: 00:14.1
885 12:20:31.623076 PCI: 00:14.5
886 12:20:31.623510 PCI: 00:15.2
887 12:20:31.623854 PCI: 00:15.3
888 12:20:31.625743 PCI: 00:16.1
889 12:20:31.626176 PCI: 00:16.2
890 12:20:31.628924 PCI: 00:16.3
891 12:20:31.629358 PCI: 00:16.4
892 12:20:31.629703 PCI: 00:16.5
893 12:20:31.632394 PCI: 00:19.1
894 12:20:31.632825 PCI: 00:19.2
895 12:20:31.636129 PCI: 00:1a.0
896 12:20:31.636603 PCI: 00:1c.0
897 12:20:31.639128 PCI: 00:1c.1
898 12:20:31.639642 PCI: 00:1c.2
899 12:20:31.640116 PCI: 00:1c.3
900 12:20:31.642527 PCI: 00:1c.4
901 12:20:31.642951 PCI: 00:1c.5
902 12:20:31.645890 PCI: 00:1c.6
903 12:20:31.646325 PCI: 00:1c.7
904 12:20:31.646672 PCI: 00:1d.1
905 12:20:31.649021 PCI: 00:1d.2
906 12:20:31.649453 PCI: 00:1d.3
907 12:20:31.652765 PCI: 00:1d.4
908 12:20:31.653241 PCI: 00:1d.5
909 12:20:31.653595 PCI: 00:1e.1
910 12:20:31.655874 PCI: 00:1f.1
911 12:20:31.656341 PCI: 00:1f.2
912 12:20:31.658941 PCI: 00:1f.6
913 12:20:31.662468 PCI: Check your devicetree.cb.
914 12:20:31.662907 PCI: 00:02.0 scanning...
915 12:20:31.668967 scan_generic_bus for PCI: 00:02.0
916 12:20:31.672185 scan_generic_bus for PCI: 00:02.0 done
917 12:20:31.675623 scan_bus: scanning of bus PCI: 00:02.0 took 10187 usecs
918 12:20:31.678810 PCI: 00:14.0 scanning...
919 12:20:31.682138 scan_static_bus for PCI: 00:14.0
920 12:20:31.685783 USB0 port 0 enabled
921 12:20:31.689131 USB0 port 0 scanning...
922 12:20:31.692040 scan_static_bus for USB0 port 0
923 12:20:31.692528 USB2 port 0 enabled
924 12:20:31.695884 USB2 port 1 enabled
925 12:20:31.698791 USB2 port 2 disabled
926 12:20:31.699224 USB2 port 3 disabled
927 12:20:31.701863 USB2 port 5 disabled
928 12:20:31.702298 USB2 port 6 enabled
929 12:20:31.705715 USB2 port 9 enabled
930 12:20:31.709317 USB3 port 0 enabled
931 12:20:31.709752 USB3 port 1 enabled
932 12:20:31.711959 USB3 port 2 enabled
933 12:20:31.715088 USB3 port 3 enabled
934 12:20:31.715526 USB3 port 4 disabled
935 12:20:31.719147 USB2 port 0 scanning...
936 12:20:31.722006 scan_static_bus for USB2 port 0
937 12:20:31.725632 scan_static_bus for USB2 port 0 done
938 12:20:31.731957 scan_bus: scanning of bus USB2 port 0 took 9706 usecs
939 12:20:31.732517 USB2 port 1 scanning...
940 12:20:31.735563 scan_static_bus for USB2 port 1
941 12:20:31.741770 scan_static_bus for USB2 port 1 done
942 12:20:31.745266 scan_bus: scanning of bus USB2 port 1 took 9691 usecs
943 12:20:31.748520 USB2 port 6 scanning...
944 12:20:31.752118 scan_static_bus for USB2 port 6
945 12:20:31.755645 scan_static_bus for USB2 port 6 done
946 12:20:31.762078 scan_bus: scanning of bus USB2 port 6 took 9699 usecs
947 12:20:31.762517 USB2 port 9 scanning...
948 12:20:31.765583 scan_static_bus for USB2 port 9
949 12:20:31.772215 scan_static_bus for USB2 port 9 done
950 12:20:31.775450 scan_bus: scanning of bus USB2 port 9 took 9713 usecs
951 12:20:31.778795 USB3 port 0 scanning...
952 12:20:31.782128 scan_static_bus for USB3 port 0
953 12:20:31.785050 scan_static_bus for USB3 port 0 done
954 12:20:31.791646 scan_bus: scanning of bus USB3 port 0 took 9706 usecs
955 12:20:31.792160 USB3 port 1 scanning...
956 12:20:31.795387 scan_static_bus for USB3 port 1
957 12:20:31.801892 scan_static_bus for USB3 port 1 done
958 12:20:31.805084 scan_bus: scanning of bus USB3 port 1 took 9699 usecs
959 12:20:31.808519 USB3 port 2 scanning...
960 12:20:31.811582 scan_static_bus for USB3 port 2
961 12:20:31.815371 scan_static_bus for USB3 port 2 done
962 12:20:31.821891 scan_bus: scanning of bus USB3 port 2 took 9681 usecs
963 12:20:31.822047 USB3 port 3 scanning...
964 12:20:31.824767 scan_static_bus for USB3 port 3
965 12:20:31.832058 scan_static_bus for USB3 port 3 done
966 12:20:31.834779 scan_bus: scanning of bus USB3 port 3 took 9680 usecs
967 12:20:31.838547 scan_static_bus for USB0 port 0 done
968 12:20:31.845306 scan_bus: scanning of bus USB0 port 0 took 155320 usecs
969 12:20:31.848547 scan_static_bus for PCI: 00:14.0 done
970 12:20:31.855372 scan_bus: scanning of bus PCI: 00:14.0 took 172949 usecs
971 12:20:31.858604 PCI: 00:15.0 scanning...
972 12:20:31.862110 scan_generic_bus for PCI: 00:15.0
973 12:20:31.864921 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 12:20:31.868758 scan_generic_bus for PCI: 00:15.0 done
975 12:20:31.875825 scan_bus: scanning of bus PCI: 00:15.0 took 14298 usecs
976 12:20:31.878322 PCI: 00:15.1 scanning...
977 12:20:31.881624 scan_generic_bus for PCI: 00:15.1
978 12:20:31.885096 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 12:20:31.888266 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 12:20:31.891930 scan_generic_bus for PCI: 00:15.1 done
981 12:20:31.898810 scan_bus: scanning of bus PCI: 00:15.1 took 18663 usecs
982 12:20:31.901668 PCI: 00:19.0 scanning...
983 12:20:31.904606 scan_generic_bus for PCI: 00:19.0
984 12:20:31.907928 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 12:20:31.911530 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 12:20:31.918249 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 12:20:31.921789 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 12:20:31.924753 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 12:20:31.928644 scan_generic_bus for PCI: 00:19.0 done
990 12:20:31.934720 scan_bus: scanning of bus PCI: 00:19.0 took 30741 usecs
991 12:20:31.938283 PCI: 00:1d.0 scanning...
992 12:20:31.941325 do_pci_scan_bridge for PCI: 00:1d.0
993 12:20:31.944944 PCI: pci_scan_bus for bus 01
994 12:20:31.948396 PCI: 01:00.0 [1c5c/1327] enabled
995 12:20:31.951345 Enabling Common Clock Configuration
996 12:20:31.954529 L1 Sub-State supported from root port 29
997 12:20:31.959124 L1 Sub-State Support = 0xf
998 12:20:31.961068 CommonModeRestoreTime = 0x28
999 12:20:31.964594 Power On Value = 0x16, Power On Scale = 0x0
1000 12:20:31.967491 ASPM: Enabled L1
1001 12:20:31.971283 scan_bus: scanning of bus PCI: 00:1d.0 took 32776 usecs
1002 12:20:31.974277 PCI: 00:1e.2 scanning...
1003 12:20:31.977638 scan_generic_bus for PCI: 00:1e.2
1004 12:20:31.980640 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 12:20:31.987835 scan_generic_bus for PCI: 00:1e.2 done
1006 12:20:31.991143 scan_bus: scanning of bus PCI: 00:1e.2 took 14015 usecs
1007 12:20:31.994357 PCI: 00:1e.3 scanning...
1008 12:20:31.997538 scan_generic_bus for PCI: 00:1e.3
1009 12:20:32.000692 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 12:20:32.004375 scan_generic_bus for PCI: 00:1e.3 done
1011 12:20:32.011338 scan_bus: scanning of bus PCI: 00:1e.3 took 13993 usecs
1012 12:20:32.014731 PCI: 00:1f.0 scanning...
1013 12:20:32.017738 scan_static_bus for PCI: 00:1f.0
1014 12:20:32.021389 PNP: 0c09.0 enabled
1015 12:20:32.024441 scan_static_bus for PCI: 00:1f.0 done
1016 12:20:32.027504 scan_bus: scanning of bus PCI: 00:1f.0 took 12117 usecs
1017 12:20:32.031330 PCI: 00:1f.3 scanning...
1018 12:20:32.037867 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1019 12:20:32.040790 PCI: 00:1f.4 scanning...
1020 12:20:32.044616 scan_generic_bus for PCI: 00:1f.4
1021 12:20:32.048077 scan_generic_bus for PCI: 00:1f.4 done
1022 12:20:32.054407 scan_bus: scanning of bus PCI: 00:1f.4 took 10186 usecs
1023 12:20:32.054845 PCI: 00:1f.5 scanning...
1024 12:20:32.060932 scan_generic_bus for PCI: 00:1f.5
1025 12:20:32.064558 scan_generic_bus for PCI: 00:1f.5 done
1026 12:20:32.067795 scan_bus: scanning of bus PCI: 00:1f.5 took 10183 usecs
1027 12:20:32.074375 scan_bus: scanning of bus DOMAIN: 0000 took 605102 usecs
1028 12:20:32.078546 scan_static_bus for Root Device done
1029 12:20:32.084495 scan_bus: scanning of bus Root Device took 625008 usecs
1030 12:20:32.084924 done
1031 12:20:32.088398 Chrome EC: UHEPI supported
1032 12:20:32.094711 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 12:20:32.101264 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 12:20:32.104406 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 12:20:32.112133 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 12:20:32.115642 SPI flash protection: WPSW=0 SRP0=0
1037 12:20:32.122178 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 12:20:32.125812 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1039 12:20:32.128345 found VGA at PCI: 00:02.0
1040 12:20:32.132020 Setting up VGA for PCI: 00:02.0
1041 12:20:32.138901 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 12:20:32.141397 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 12:20:32.145110 Allocating resources...
1044 12:20:32.148731 Reading resources...
1045 12:20:32.151671 Root Device read_resources bus 0 link: 0
1046 12:20:32.154983 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 12:20:32.161337 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 12:20:32.165334 DOMAIN: 0000 read_resources bus 0 link: 0
1049 12:20:32.172132 PCI: 00:14.0 read_resources bus 0 link: 0
1050 12:20:32.175404 USB0 port 0 read_resources bus 0 link: 0
1051 12:20:32.184085 USB0 port 0 read_resources bus 0 link: 0 done
1052 12:20:32.186852 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 12:20:32.194621 PCI: 00:15.0 read_resources bus 1 link: 0
1054 12:20:32.197708 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 12:20:32.204381 PCI: 00:15.1 read_resources bus 2 link: 0
1056 12:20:32.207623 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 12:20:32.215000 PCI: 00:19.0 read_resources bus 3 link: 0
1058 12:20:32.221713 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 12:20:32.225300 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 12:20:32.231402 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 12:20:32.235095 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 12:20:32.241204 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 12:20:32.244656 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 12:20:32.251629 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 12:20:32.254517 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 12:20:32.261973 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 12:20:32.268174 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 12:20:32.271327 Root Device read_resources bus 0 link: 0 done
1069 12:20:32.274572 Done reading resources.
1070 12:20:32.278220 Show resources in subtree (Root Device)...After reading.
1071 12:20:32.285096 Root Device child on link 0 CPU_CLUSTER: 0
1072 12:20:32.288335 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 12:20:32.288908 APIC: 00
1074 12:20:32.291757 APIC: 03
1075 12:20:32.292173 APIC: 01
1076 12:20:32.294730 APIC: 02
1077 12:20:32.295151 APIC: 04
1078 12:20:32.295551 APIC: 05
1079 12:20:32.298515 APIC: 07
1080 12:20:32.298936 APIC: 06
1081 12:20:32.301293 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 12:20:32.311376 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 12:20:32.361681 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 12:20:32.362200 PCI: 00:00.0
1085 12:20:32.362621 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 12:20:32.363013 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 12:20:32.363732 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 12:20:32.364451 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 12:20:32.393825 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 12:20:32.394089 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 12:20:32.395062 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 12:20:32.398881 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 12:20:32.407715 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 12:20:32.414584 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 12:20:32.424420 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 12:20:32.434111 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 12:20:32.444205 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 12:20:32.455041 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 12:20:32.464545 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 12:20:32.474578 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 12:20:32.475017 PCI: 00:02.0
1102 12:20:32.484967 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 12:20:32.494712 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 12:20:32.504164 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 12:20:32.504669 PCI: 00:04.0
1106 12:20:32.507600 PCI: 00:08.0
1107 12:20:32.517361 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 12:20:32.517693 PCI: 00:12.0
1109 12:20:32.527694 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 12:20:32.533680 PCI: 00:14.0 child on link 0 USB0 port 0
1111 12:20:32.544012 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 12:20:32.546877 USB0 port 0 child on link 0 USB2 port 0
1113 12:20:32.550911 USB2 port 0
1114 12:20:32.551099 USB2 port 1
1115 12:20:32.553696 USB2 port 2
1116 12:20:32.553805 USB2 port 3
1117 12:20:32.557716 USB2 port 5
1118 12:20:32.557804 USB2 port 6
1119 12:20:32.560195 USB2 port 9
1120 12:20:32.560288 USB3 port 0
1121 12:20:32.563569 USB3 port 1
1122 12:20:32.563657 USB3 port 2
1123 12:20:32.567115 USB3 port 3
1124 12:20:32.567204 USB3 port 4
1125 12:20:32.570014 PCI: 00:14.2
1126 12:20:32.580518 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 12:20:32.590475 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 12:20:32.590622 PCI: 00:14.3
1129 12:20:32.600058 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 12:20:32.606500 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 12:20:32.616569 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 12:20:32.616781 I2C: 01:15
1133 12:20:32.620090 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 12:20:32.629809 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 12:20:32.633110 I2C: 02:5d
1136 12:20:32.633218 GENERIC: 0.0
1137 12:20:32.636840 PCI: 00:16.0
1138 12:20:32.646633 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 12:20:32.646753 PCI: 00:17.0
1140 12:20:32.656798 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 12:20:32.666528 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 12:20:32.673372 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 12:20:32.683052 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 12:20:32.689461 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 12:20:32.699661 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 12:20:32.703494 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 12:20:32.713354 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 12:20:32.716151 I2C: 03:1a
1149 12:20:32.716599 I2C: 03:38
1150 12:20:32.719706 I2C: 03:39
1151 12:20:32.720133 I2C: 03:3a
1152 12:20:32.722731 I2C: 03:3b
1153 12:20:32.726503 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 12:20:32.736200 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 12:20:32.746192 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 12:20:32.753069 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 12:20:32.756143 PCI: 01:00.0
1158 12:20:32.766222 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 12:20:32.766974 PCI: 00:1e.0
1160 12:20:32.778908 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 12:20:32.789782 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 12:20:32.792172 PCI: 00:1e.2 child on link 0 SPI: 00
1163 12:20:32.802322 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 12:20:32.802507 SPI: 00
1165 12:20:32.808776 PCI: 00:1e.3 child on link 0 SPI: 01
1166 12:20:32.819200 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 12:20:32.819365 SPI: 01
1168 12:20:32.821937 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 12:20:32.831868 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 12:20:32.841957 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 12:20:32.842153 PNP: 0c09.0
1172 12:20:32.851677 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 12:20:32.851825 PCI: 00:1f.3
1174 12:20:32.862094 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 12:20:32.871826 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 12:20:32.875311 PCI: 00:1f.4
1177 12:20:32.884609 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 12:20:32.891226 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 12:20:32.894797 PCI: 00:1f.5
1180 12:20:32.904654 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 12:20:32.911308 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 12:20:32.918032 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 12:20:32.924409 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 12:20:32.927933 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 12:20:32.931092 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 12:20:32.934278 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 12:20:32.937622 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 12:20:32.945566 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 12:20:32.951020 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 12:20:32.958212 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 12:20:32.967597 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 12:20:32.974521 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 12:20:32.977731 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 12:20:32.987439 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 12:20:32.990632 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 12:20:32.997238 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 12:20:33.000933 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 12:20:33.003863 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 12:20:33.010487 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 12:20:33.013615 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 12:20:33.020168 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 12:20:33.023696 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 12:20:33.030584 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 12:20:33.033146 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 12:20:33.040564 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 12:20:33.043452 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 12:20:33.049957 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 12:20:33.053416 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 12:20:33.060220 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 12:20:33.064021 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 12:20:33.070226 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 12:20:33.073729 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 12:20:33.076978 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 12:20:33.083208 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 12:20:33.086731 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 12:20:33.093128 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 12:20:33.096542 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 12:20:33.106860 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 12:20:33.109670 avoid_fixed_resources: DOMAIN: 0000
1220 12:20:33.115882 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 12:20:33.122599 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 12:20:33.129568 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 12:20:33.136070 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 12:20:33.146156 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 12:20:33.152261 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 12:20:33.158962 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 12:20:33.168898 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 12:20:33.175668 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 12:20:33.182043 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 12:20:33.188879 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 12:20:33.198986 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 12:20:33.199151 Setting resources...
1233 12:20:33.205676 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 12:20:33.208932 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 12:20:33.212086 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 12:20:33.218439 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 12:20:33.222053 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 12:20:33.228411 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 12:20:33.235498 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 12:20:33.241435 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 12:20:33.248584 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 12:20:33.254629 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 12:20:33.258579 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 12:20:33.261973 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 12:20:33.268180 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 12:20:33.271879 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 12:20:33.277784 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 12:20:33.281010 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 12:20:33.288232 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 12:20:33.291701 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 12:20:33.298033 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 12:20:33.301265 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 12:20:33.307777 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 12:20:33.310938 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 12:20:33.317446 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 12:20:33.321118 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 12:20:33.327374 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 12:20:33.331110 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 12:20:33.337330 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 12:20:33.340874 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 12:20:33.346911 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 12:20:33.350814 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 12:20:33.354087 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 12:20:33.360521 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 12:20:33.367502 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 12:20:33.373741 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 12:20:33.383663 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 12:20:33.390607 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 12:20:33.394275 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 12:20:33.403638 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 12:20:33.406965 Root Device assign_resources, bus 0 link: 0
1272 12:20:33.410239 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 12:20:33.420902 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 12:20:33.427288 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 12:20:33.436691 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 12:20:33.443582 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 12:20:33.453588 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 12:20:33.460137 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 12:20:33.466570 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 12:20:33.469644 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 12:20:33.480208 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 12:20:33.486263 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 12:20:33.496531 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 12:20:33.503203 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 12:20:33.506136 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 12:20:33.513195 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 12:20:33.519391 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 12:20:33.526738 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 12:20:33.529586 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 12:20:33.539528 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 12:20:33.545628 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 12:20:33.552847 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 12:20:33.562623 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 12:20:33.569810 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 12:20:33.575916 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 12:20:33.585685 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 12:20:33.592704 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 12:20:33.598916 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 12:20:33.602459 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 12:20:33.612184 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 12:20:33.618911 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 12:20:33.628878 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 12:20:33.632284 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 12:20:33.642529 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 12:20:33.645385 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 12:20:33.655778 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 12:20:33.662044 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 12:20:33.668610 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 12:20:33.671604 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 12:20:33.678757 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 12:20:33.685158 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 12:20:33.688301 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 12:20:33.694759 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 12:20:33.698343 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 12:20:33.704674 LPC: Trying to open IO window from 800 size 1ff
1316 12:20:33.711611 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 12:20:33.721051 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 12:20:33.728239 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 12:20:33.738263 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 12:20:33.741619 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 12:20:33.744400 Root Device assign_resources, bus 0 link: 0
1322 12:20:33.748057 Done setting resources.
1323 12:20:33.754507 Show resources in subtree (Root Device)...After assigning values.
1324 12:20:33.757651 Root Device child on link 0 CPU_CLUSTER: 0
1325 12:20:33.764408 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 12:20:33.764888 APIC: 00
1327 12:20:33.767884 APIC: 03
1328 12:20:33.768353 APIC: 01
1329 12:20:33.768708 APIC: 02
1330 12:20:33.771232 APIC: 04
1331 12:20:33.771656 APIC: 05
1332 12:20:33.771991 APIC: 07
1333 12:20:33.774452 APIC: 06
1334 12:20:33.777872 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 12:20:33.787452 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 12:20:33.797511 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 12:20:33.801190 PCI: 00:00.0
1338 12:20:33.810712 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 12:20:33.820537 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 12:20:33.827323 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 12:20:33.837351 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 12:20:33.846922 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 12:20:33.856678 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 12:20:33.866880 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 12:20:33.877518 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 12:20:33.883643 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 12:20:33.893747 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 12:20:33.903257 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 12:20:33.913747 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 12:20:33.923017 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 12:20:33.932816 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 12:20:33.942871 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 12:20:33.949496 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 12:20:33.952914 PCI: 00:02.0
1355 12:20:33.963299 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 12:20:33.972367 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 12:20:33.982406 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 12:20:33.985956 PCI: 00:04.0
1359 12:20:33.986140 PCI: 00:08.0
1360 12:20:33.996012 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 12:20:33.999273 PCI: 00:12.0
1362 12:20:34.009299 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 12:20:34.012241 PCI: 00:14.0 child on link 0 USB0 port 0
1364 12:20:34.022108 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 12:20:34.028953 USB0 port 0 child on link 0 USB2 port 0
1366 12:20:34.029393 USB2 port 0
1367 12:20:34.032650 USB2 port 1
1368 12:20:34.033116 USB2 port 2
1369 12:20:34.035376 USB2 port 3
1370 12:20:34.035921 USB2 port 5
1371 12:20:34.038933 USB2 port 6
1372 12:20:34.039451 USB2 port 9
1373 12:20:34.042292 USB3 port 0
1374 12:20:34.042945 USB3 port 1
1375 12:20:34.045339 USB3 port 2
1376 12:20:34.045860 USB3 port 3
1377 12:20:34.049172 USB3 port 4
1378 12:20:34.049710 PCI: 00:14.2
1379 12:20:34.061819 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 12:20:34.071545 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 12:20:34.072165 PCI: 00:14.3
1382 12:20:34.081615 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 12:20:34.088372 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 12:20:34.098368 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 12:20:34.098679 I2C: 01:15
1386 12:20:34.101609 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 12:20:34.115033 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 12:20:34.115471 I2C: 02:5d
1389 12:20:34.118225 GENERIC: 0.0
1390 12:20:34.118652 PCI: 00:16.0
1391 12:20:34.128077 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 12:20:34.131796 PCI: 00:17.0
1393 12:20:34.141531 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 12:20:34.151359 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 12:20:34.161165 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 12:20:34.167670 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 12:20:34.177861 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 12:20:34.187207 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 12:20:34.191291 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 12:20:34.203577 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 12:20:34.203925 I2C: 03:1a
1402 12:20:34.204199 I2C: 03:38
1403 12:20:34.207610 I2C: 03:39
1404 12:20:34.207874 I2C: 03:3a
1405 12:20:34.210628 I2C: 03:3b
1406 12:20:34.213616 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 12:20:34.223706 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 12:20:34.233525 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 12:20:34.243845 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 12:20:34.247077 PCI: 01:00.0
1411 12:20:34.257149 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 12:20:34.257394 PCI: 00:1e.0
1413 12:20:34.270273 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 12:20:34.280254 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 12:20:34.283532 PCI: 00:1e.2 child on link 0 SPI: 00
1416 12:20:34.293419 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 12:20:34.297353 SPI: 00
1418 12:20:34.299727 PCI: 00:1e.3 child on link 0 SPI: 01
1419 12:20:34.310191 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 12:20:34.310635 SPI: 01
1421 12:20:34.316759 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 12:20:34.323149 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 12:20:34.332738 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 12:20:34.332925 PNP: 0c09.0
1425 12:20:34.342737 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 12:20:34.345667 PCI: 00:1f.3
1427 12:20:34.355911 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 12:20:34.366202 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 12:20:34.366629 PCI: 00:1f.4
1430 12:20:34.375645 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 12:20:34.385842 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 12:20:34.389211 PCI: 00:1f.5
1433 12:20:34.399076 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 12:20:34.402280 Done allocating resources.
1435 12:20:34.405254 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 12:20:34.408478 Enabling resources...
1437 12:20:34.415497 PCI: 00:00.0 subsystem <- 8086/9b61
1438 12:20:34.415630 PCI: 00:00.0 cmd <- 06
1439 12:20:34.419086 PCI: 00:02.0 subsystem <- 8086/9b41
1440 12:20:34.421777 PCI: 00:02.0 cmd <- 03
1441 12:20:34.425458 PCI: 00:08.0 cmd <- 06
1442 12:20:34.428492 PCI: 00:12.0 subsystem <- 8086/02f9
1443 12:20:34.432556 PCI: 00:12.0 cmd <- 02
1444 12:20:34.435520 PCI: 00:14.0 subsystem <- 8086/02ed
1445 12:20:34.438932 PCI: 00:14.0 cmd <- 02
1446 12:20:34.439047 PCI: 00:14.2 cmd <- 02
1447 12:20:34.445184 PCI: 00:14.3 subsystem <- 8086/02f0
1448 12:20:34.445300 PCI: 00:14.3 cmd <- 02
1449 12:20:34.448760 PCI: 00:15.0 subsystem <- 8086/02e8
1450 12:20:34.451842 PCI: 00:15.0 cmd <- 02
1451 12:20:34.455391 PCI: 00:15.1 subsystem <- 8086/02e9
1452 12:20:34.459281 PCI: 00:15.1 cmd <- 02
1453 12:20:34.462656 PCI: 00:16.0 subsystem <- 8086/02e0
1454 12:20:34.465542 PCI: 00:16.0 cmd <- 02
1455 12:20:34.468519 PCI: 00:17.0 subsystem <- 8086/02d3
1456 12:20:34.472444 PCI: 00:17.0 cmd <- 03
1457 12:20:34.475412 PCI: 00:19.0 subsystem <- 8086/02c5
1458 12:20:34.479204 PCI: 00:19.0 cmd <- 02
1459 12:20:34.481875 PCI: 00:1d.0 bridge ctrl <- 0013
1460 12:20:34.485415 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 12:20:34.488782 PCI: 00:1d.0 cmd <- 06
1462 12:20:34.492107 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 12:20:34.494995 PCI: 00:1e.0 cmd <- 06
1464 12:20:34.498844 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 12:20:34.499004 PCI: 00:1e.2 cmd <- 06
1466 12:20:34.505349 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 12:20:34.505532 PCI: 00:1e.3 cmd <- 02
1468 12:20:34.508689 PCI: 00:1f.0 subsystem <- 8086/0284
1469 12:20:34.511960 PCI: 00:1f.0 cmd <- 407
1470 12:20:34.515388 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 12:20:34.518572 PCI: 00:1f.3 cmd <- 02
1472 12:20:34.521678 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 12:20:34.525130 PCI: 00:1f.4 cmd <- 03
1474 12:20:34.528423 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 12:20:34.531659 PCI: 00:1f.5 cmd <- 406
1476 12:20:34.540457 PCI: 01:00.0 cmd <- 02
1477 12:20:34.546164 done.
1478 12:20:34.557565 ME: Version: 14.0.39.1367
1479 12:20:34.564071 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1480 12:20:34.567404 Initializing devices...
1481 12:20:34.567536 Root Device init ...
1482 12:20:34.573916 Chrome EC: Set SMI mask to 0x0000000000000000
1483 12:20:34.577219 Chrome EC: clear events_b mask to 0x0000000000000000
1484 12:20:34.584034 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 12:20:34.590475 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 12:20:34.597150 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 12:20:34.601150 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 12:20:34.603566 Root Device init finished in 35173 usecs
1489 12:20:34.607445 CPU_CLUSTER: 0 init ...
1490 12:20:34.614127 CPU_CLUSTER: 0 init finished in 2446 usecs
1491 12:20:34.619013 PCI: 00:00.0 init ...
1492 12:20:34.621761 CPU TDP: 15 Watts
1493 12:20:34.624872 CPU PL2 = 64 Watts
1494 12:20:34.628547 PCI: 00:00.0 init finished in 7075 usecs
1495 12:20:34.631961 PCI: 00:02.0 init ...
1496 12:20:34.635243 PCI: 00:02.0 init finished in 2245 usecs
1497 12:20:34.638359 PCI: 00:08.0 init ...
1498 12:20:34.641981 PCI: 00:08.0 init finished in 2251 usecs
1499 12:20:34.644736 PCI: 00:12.0 init ...
1500 12:20:34.648592 PCI: 00:12.0 init finished in 2253 usecs
1501 12:20:34.651941 PCI: 00:14.0 init ...
1502 12:20:34.654610 PCI: 00:14.0 init finished in 2252 usecs
1503 12:20:34.658143 PCI: 00:14.2 init ...
1504 12:20:34.661770 PCI: 00:14.2 init finished in 2251 usecs
1505 12:20:34.665021 PCI: 00:14.3 init ...
1506 12:20:34.668141 PCI: 00:14.3 init finished in 2262 usecs
1507 12:20:34.671491 PCI: 00:15.0 init ...
1508 12:20:34.674719 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 12:20:34.678124 PCI: 00:15.0 init finished in 5977 usecs
1510 12:20:34.680882 PCI: 00:15.1 init ...
1511 12:20:34.684209 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 12:20:34.691122 PCI: 00:15.1 init finished in 5977 usecs
1513 12:20:34.691353 PCI: 00:16.0 init ...
1514 12:20:34.698074 PCI: 00:16.0 init finished in 2252 usecs
1515 12:20:34.700516 PCI: 00:19.0 init ...
1516 12:20:34.704167 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 12:20:34.707794 PCI: 00:19.0 init finished in 5977 usecs
1518 12:20:34.711504 PCI: 00:1d.0 init ...
1519 12:20:34.714206 Initializing PCH PCIe bridge.
1520 12:20:34.717022 PCI: 00:1d.0 init finished in 5287 usecs
1521 12:20:34.720396 PCI: 00:1f.0 init ...
1522 12:20:34.724801 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 12:20:34.730514 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 12:20:34.730934 IOAPIC: ID = 0x02
1525 12:20:34.734347 IOAPIC: Dumping registers
1526 12:20:34.737399 reg 0x0000: 0x02000000
1527 12:20:34.740422 reg 0x0001: 0x00770020
1528 12:20:34.740839 reg 0x0002: 0x00000000
1529 12:20:34.747523 PCI: 00:1f.0 init finished in 23541 usecs
1530 12:20:34.750844 PCI: 00:1f.4 init ...
1531 12:20:34.754366 PCI: 00:1f.4 init finished in 2262 usecs
1532 12:20:34.764468 PCI: 01:00.0 init ...
1533 12:20:34.768009 PCI: 01:00.0 init finished in 2242 usecs
1534 12:20:34.772030 PNP: 0c09.0 init ...
1535 12:20:34.775689 Google Chrome EC uptime: 11.093 seconds
1536 12:20:34.782216 Google Chrome AP resets since EC boot: 0
1537 12:20:34.785177 Google Chrome most recent AP reset causes:
1538 12:20:34.792030 Google Chrome EC reset flags at last EC boot: reset-pin
1539 12:20:34.795143 PNP: 0c09.0 init finished in 20574 usecs
1540 12:20:34.798390 Devices initialized
1541 12:20:34.798521 Show all devs... After init.
1542 12:20:34.802296 Root Device: enabled 1
1543 12:20:34.805225 CPU_CLUSTER: 0: enabled 1
1544 12:20:34.808919 DOMAIN: 0000: enabled 1
1545 12:20:34.809054 APIC: 00: enabled 1
1546 12:20:34.811420 PCI: 00:00.0: enabled 1
1547 12:20:34.814791 PCI: 00:02.0: enabled 1
1548 12:20:34.818559 PCI: 00:04.0: enabled 0
1549 12:20:34.818690 PCI: 00:05.0: enabled 0
1550 12:20:34.821521 PCI: 00:12.0: enabled 1
1551 12:20:34.824707 PCI: 00:12.5: enabled 0
1552 12:20:34.824938 PCI: 00:12.6: enabled 0
1553 12:20:34.827832 PCI: 00:14.0: enabled 1
1554 12:20:34.831700 PCI: 00:14.1: enabled 0
1555 12:20:34.834799 PCI: 00:14.3: enabled 1
1556 12:20:34.834996 PCI: 00:14.5: enabled 0
1557 12:20:34.837908 PCI: 00:15.0: enabled 1
1558 12:20:34.841430 PCI: 00:15.1: enabled 1
1559 12:20:34.844489 PCI: 00:15.2: enabled 0
1560 12:20:34.844654 PCI: 00:15.3: enabled 0
1561 12:20:34.847601 PCI: 00:16.0: enabled 1
1562 12:20:34.851666 PCI: 00:16.1: enabled 0
1563 12:20:34.854823 PCI: 00:16.2: enabled 0
1564 12:20:34.854989 PCI: 00:16.3: enabled 0
1565 12:20:34.857735 PCI: 00:16.4: enabled 0
1566 12:20:34.861420 PCI: 00:16.5: enabled 0
1567 12:20:34.864238 PCI: 00:17.0: enabled 1
1568 12:20:34.864370 PCI: 00:19.0: enabled 1
1569 12:20:34.868204 PCI: 00:19.1: enabled 0
1570 12:20:34.871475 PCI: 00:19.2: enabled 0
1571 12:20:34.871799 PCI: 00:1a.0: enabled 0
1572 12:20:34.874499 PCI: 00:1c.0: enabled 0
1573 12:20:34.877648 PCI: 00:1c.1: enabled 0
1574 12:20:34.881484 PCI: 00:1c.2: enabled 0
1575 12:20:34.881902 PCI: 00:1c.3: enabled 0
1576 12:20:34.884543 PCI: 00:1c.4: enabled 0
1577 12:20:34.887746 PCI: 00:1c.5: enabled 0
1578 12:20:34.891284 PCI: 00:1c.6: enabled 0
1579 12:20:34.891613 PCI: 00:1c.7: enabled 0
1580 12:20:34.894456 PCI: 00:1d.0: enabled 1
1581 12:20:34.897639 PCI: 00:1d.1: enabled 0
1582 12:20:34.901026 PCI: 00:1d.2: enabled 0
1583 12:20:34.901352 PCI: 00:1d.3: enabled 0
1584 12:20:34.904310 PCI: 00:1d.4: enabled 0
1585 12:20:34.907728 PCI: 00:1d.5: enabled 0
1586 12:20:34.908065 PCI: 00:1e.0: enabled 1
1587 12:20:34.911367 PCI: 00:1e.1: enabled 0
1588 12:20:34.914227 PCI: 00:1e.2: enabled 1
1589 12:20:34.917343 PCI: 00:1e.3: enabled 1
1590 12:20:34.917712 PCI: 00:1f.0: enabled 1
1591 12:20:34.921123 PCI: 00:1f.1: enabled 0
1592 12:20:34.924839 PCI: 00:1f.2: enabled 0
1593 12:20:34.927425 PCI: 00:1f.3: enabled 1
1594 12:20:34.927759 PCI: 00:1f.4: enabled 1
1595 12:20:34.931233 PCI: 00:1f.5: enabled 1
1596 12:20:34.934568 PCI: 00:1f.6: enabled 0
1597 12:20:34.937214 USB0 port 0: enabled 1
1598 12:20:34.937664 I2C: 01:15: enabled 1
1599 12:20:34.940726 I2C: 02:5d: enabled 1
1600 12:20:34.944196 GENERIC: 0.0: enabled 1
1601 12:20:34.944467 I2C: 03:1a: enabled 1
1602 12:20:34.947588 I2C: 03:38: enabled 1
1603 12:20:34.950711 I2C: 03:39: enabled 1
1604 12:20:34.950910 I2C: 03:3a: enabled 1
1605 12:20:34.953986 I2C: 03:3b: enabled 1
1606 12:20:34.957008 PCI: 00:00.0: enabled 1
1607 12:20:34.957147 SPI: 00: enabled 1
1608 12:20:34.960130 SPI: 01: enabled 1
1609 12:20:34.963721 PNP: 0c09.0: enabled 1
1610 12:20:34.963861 USB2 port 0: enabled 1
1611 12:20:34.967043 USB2 port 1: enabled 1
1612 12:20:34.970387 USB2 port 2: enabled 0
1613 12:20:34.970528 USB2 port 3: enabled 0
1614 12:20:34.973878 USB2 port 5: enabled 0
1615 12:20:34.977192 USB2 port 6: enabled 1
1616 12:20:34.980917 USB2 port 9: enabled 1
1617 12:20:34.981453 USB3 port 0: enabled 1
1618 12:20:34.984055 USB3 port 1: enabled 1
1619 12:20:34.987407 USB3 port 2: enabled 1
1620 12:20:34.987840 USB3 port 3: enabled 1
1621 12:20:34.990143 USB3 port 4: enabled 0
1622 12:20:34.993979 APIC: 03: enabled 1
1623 12:20:34.994415 APIC: 01: enabled 1
1624 12:20:34.996871 APIC: 02: enabled 1
1625 12:20:35.000362 APIC: 04: enabled 1
1626 12:20:35.000797 APIC: 05: enabled 1
1627 12:20:35.003801 APIC: 07: enabled 1
1628 12:20:35.004237 APIC: 06: enabled 1
1629 12:20:35.006770 PCI: 00:08.0: enabled 1
1630 12:20:35.010099 PCI: 00:14.2: enabled 1
1631 12:20:35.013631 PCI: 01:00.0: enabled 1
1632 12:20:35.016711 Disabling ACPI via APMC:
1633 12:20:35.017001 done.
1634 12:20:35.023500 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 12:20:35.026539 ELOG: NV offset 0xaf0000 size 0x4000
1636 12:20:35.033333 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 12:20:35.040268 ELOG: Event(17) added with size 13 at 2023-12-08 12:18:02 UTC
1638 12:20:35.046665 ELOG: Event(92) added with size 9 at 2023-12-08 12:18:02 UTC
1639 12:20:35.053195 ELOG: Event(93) added with size 9 at 2023-12-08 12:18:02 UTC
1640 12:20:35.059919 ELOG: Event(9A) added with size 9 at 2023-12-08 12:18:02 UTC
1641 12:20:35.066989 ELOG: Event(9E) added with size 10 at 2023-12-08 12:18:02 UTC
1642 12:20:35.073524 ELOG: Event(9F) added with size 14 at 2023-12-08 12:18:02 UTC
1643 12:20:35.076599 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1644 12:20:35.083531 ELOG: Event(A1) added with size 10 at 2023-12-08 12:18:02 UTC
1645 12:20:35.093744 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1646 12:20:35.100517 ELOG: Event(A0) added with size 9 at 2023-12-08 12:18:02 UTC
1647 12:20:35.103874 elog_add_boot_reason: Logged dev mode boot
1648 12:20:35.107539 Finalize devices...
1649 12:20:35.107738 PCI: 00:17.0 final
1650 12:20:35.110115 Devices finalized
1651 12:20:35.113538 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1652 12:20:35.119708 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1653 12:20:35.123527 ME: HFSTS1 : 0x90000245
1654 12:20:35.126878 ME: HFSTS2 : 0x3B850126
1655 12:20:35.133659 ME: HFSTS3 : 0x00000020
1656 12:20:35.136773 ME: HFSTS4 : 0x00004800
1657 12:20:35.140077 ME: HFSTS5 : 0x00000000
1658 12:20:35.143702 ME: HFSTS6 : 0x40400006
1659 12:20:35.146779 ME: Manufacturing Mode : NO
1660 12:20:35.150458 ME: FW Partition Table : OK
1661 12:20:35.153586 ME: Bringup Loader Failure : NO
1662 12:20:35.156494 ME: Firmware Init Complete : YES
1663 12:20:35.160565 ME: Boot Options Present : NO
1664 12:20:35.163005 ME: Update In Progress : NO
1665 12:20:35.166866 ME: D0i3 Support : YES
1666 12:20:35.169676 ME: Low Power State Enabled : NO
1667 12:20:35.173174 ME: CPU Replaced : NO
1668 12:20:35.176576 ME: CPU Replacement Valid : YES
1669 12:20:35.179961 ME: Current Working State : 5
1670 12:20:35.182671 ME: Current Operation State : 1
1671 12:20:35.186437 ME: Current Operation Mode : 0
1672 12:20:35.189745 ME: Error Code : 0
1673 12:20:35.192785 ME: CPU Debug Disabled : YES
1674 12:20:35.195869 ME: TXT Support : NO
1675 12:20:35.202716 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1676 12:20:35.208976 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1677 12:20:35.209129 CBFS @ c08000 size 3f8000
1678 12:20:35.215666 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1679 12:20:35.218725 CBFS: Locating 'fallback/dsdt.aml'
1680 12:20:35.222424 CBFS: Found @ offset 10bb80 size 3fa5
1681 12:20:35.229051 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1682 12:20:35.232618 CBFS @ c08000 size 3f8000
1683 12:20:35.238975 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1684 12:20:35.242398 CBFS: Locating 'fallback/slic'
1685 12:20:35.245342 CBFS: 'fallback/slic' not found.
1686 12:20:35.249338 ACPI: Writing ACPI tables at 99b3e000.
1687 12:20:35.252397 ACPI: * FACS
1688 12:20:35.252816 ACPI: * DSDT
1689 12:20:35.255375 Ramoops buffer: 0x100000@0x99a3d000.
1690 12:20:35.261990 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1691 12:20:35.265384 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1692 12:20:35.268496 Google Chrome EC: version:
1693 12:20:35.272258 ro: helios_v2.0.2659-56403530b
1694 12:20:35.275215 rw: helios_v2.0.2849-c41de27e7d
1695 12:20:35.278898 running image: 1
1696 12:20:35.281746 ACPI: * FADT
1697 12:20:35.281977 SCI is IRQ9
1698 12:20:35.285145 ACPI: added table 1/32, length now 40
1699 12:20:35.288799 ACPI: * SSDT
1700 12:20:35.291821 Found 1 CPU(s) with 8 core(s) each.
1701 12:20:35.295324 Error: Could not locate 'wifi_sar' in VPD.
1702 12:20:35.301845 Checking CBFS for default SAR values
1703 12:20:35.305040 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 12:20:35.308313 CBFS @ c08000 size 3f8000
1705 12:20:35.315071 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 12:20:35.318522 CBFS: Locating 'wifi_sar_defaults.hex'
1707 12:20:35.321877 CBFS: Found @ offset 5fac0 size 77
1708 12:20:35.324869 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1709 12:20:35.328467 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1710 12:20:35.334880 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1711 12:20:35.342082 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1712 12:20:35.345101 failed to find key in VPD: dsm_calib_r0_0
1713 12:20:35.354958 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1714 12:20:35.358030 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1715 12:20:35.361233 failed to find key in VPD: dsm_calib_r0_1
1716 12:20:35.371198 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1717 12:20:35.377467 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1718 12:20:35.380778 failed to find key in VPD: dsm_calib_r0_2
1719 12:20:35.391089 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1720 12:20:35.394747 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1721 12:20:35.401263 failed to find key in VPD: dsm_calib_r0_3
1722 12:20:35.407613 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1723 12:20:35.414407 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1724 12:20:35.417386 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1725 12:20:35.421015 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1726 12:20:35.424887 EC returned error result code 1
1727 12:20:35.428003 EC returned error result code 1
1728 12:20:35.432195 EC returned error result code 1
1729 12:20:35.438685 PS2K: Bad resp from EC. Vivaldi disabled!
1730 12:20:35.442092 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1731 12:20:35.448244 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1732 12:20:35.455608 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1733 12:20:35.458687 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1734 12:20:35.465180 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1735 12:20:35.472202 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1736 12:20:35.478413 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1737 12:20:35.481836 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1738 12:20:35.488500 ACPI: added table 2/32, length now 44
1739 12:20:35.488594 ACPI: * MCFG
1740 12:20:35.491495 ACPI: added table 3/32, length now 48
1741 12:20:35.495308 ACPI: * TPM2
1742 12:20:35.498404 TPM2 log created at 99a2d000
1743 12:20:35.502065 ACPI: added table 4/32, length now 52
1744 12:20:35.502252 ACPI: * MADT
1745 12:20:35.505224 SCI is IRQ9
1746 12:20:35.507893 ACPI: added table 5/32, length now 56
1747 12:20:35.508047 current = 99b43ac0
1748 12:20:35.511284 ACPI: * DMAR
1749 12:20:35.514658 ACPI: added table 6/32, length now 60
1750 12:20:35.517775 ACPI: * IGD OpRegion
1751 12:20:35.517927 GMA: Found VBT in CBFS
1752 12:20:35.521265 GMA: Found valid VBT in CBFS
1753 12:20:35.524705 ACPI: added table 7/32, length now 64
1754 12:20:35.527977 ACPI: * HPET
1755 12:20:35.531719 ACPI: added table 8/32, length now 68
1756 12:20:35.531819 ACPI: done.
1757 12:20:35.534475 ACPI tables: 31744 bytes.
1758 12:20:35.538300 smbios_write_tables: 99a2c000
1759 12:20:35.541204 EC returned error result code 3
1760 12:20:35.544642 Couldn't obtain OEM name from CBI
1761 12:20:35.548283 Create SMBIOS type 17
1762 12:20:35.551112 PCI: 00:00.0 (Intel Cannonlake)
1763 12:20:35.554916 PCI: 00:14.3 (Intel WiFi)
1764 12:20:35.558398 SMBIOS tables: 939 bytes.
1765 12:20:35.561754 Writing table forward entry at 0x00000500
1766 12:20:35.567954 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1767 12:20:35.571376 Writing coreboot table at 0x99b62000
1768 12:20:35.577891 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1769 12:20:35.581456 1. 0000000000001000-000000000009ffff: RAM
1770 12:20:35.584318 2. 00000000000a0000-00000000000fffff: RESERVED
1771 12:20:35.591654 3. 0000000000100000-0000000099a2bfff: RAM
1772 12:20:35.594607 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1773 12:20:35.601478 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1774 12:20:35.607695 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1775 12:20:35.611744 7. 000000009a000000-000000009f7fffff: RESERVED
1776 12:20:35.617958 8. 00000000e0000000-00000000efffffff: RESERVED
1777 12:20:35.621555 9. 00000000fc000000-00000000fc000fff: RESERVED
1778 12:20:35.624071 10. 00000000fe000000-00000000fe00ffff: RESERVED
1779 12:20:35.630908 11. 00000000fed10000-00000000fed17fff: RESERVED
1780 12:20:35.634341 12. 00000000fed80000-00000000fed83fff: RESERVED
1781 12:20:35.640670 13. 00000000fed90000-00000000fed91fff: RESERVED
1782 12:20:35.643918 14. 00000000feda0000-00000000feda1fff: RESERVED
1783 12:20:35.650527 15. 0000000100000000-000000045e7fffff: RAM
1784 12:20:35.654518 Graphics framebuffer located at 0xc0000000
1785 12:20:35.657151 Passing 5 GPIOs to payload:
1786 12:20:35.660583 NAME | PORT | POLARITY | VALUE
1787 12:20:35.668410 write protect | undefined | high | low
1788 12:20:35.671146 lid | undefined | high | high
1789 12:20:35.677420 power | undefined | high | low
1790 12:20:35.683622 oprom | undefined | high | low
1791 12:20:35.687305 EC in RW | 0x000000cb | high | low
1792 12:20:35.690962 Board ID: 4
1793 12:20:35.693843 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1794 12:20:35.697001 CBFS @ c08000 size 3f8000
1795 12:20:35.703460 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1796 12:20:35.710489 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1797 12:20:35.710641 coreboot table: 1492 bytes.
1798 12:20:35.713569 IMD ROOT 0. 99fff000 00001000
1799 12:20:35.717224 IMD SMALL 1. 99ffe000 00001000
1800 12:20:35.720643 FSP MEMORY 2. 99c4e000 003b0000
1801 12:20:35.724011 CONSOLE 3. 99c2e000 00020000
1802 12:20:35.726968 FMAP 4. 99c2d000 0000054e
1803 12:20:35.730434 TIME STAMP 5. 99c2c000 00000910
1804 12:20:35.733771 VBOOT WORK 6. 99c18000 00014000
1805 12:20:35.737255 MRC DATA 7. 99c16000 00001958
1806 12:20:35.740514 ROMSTG STCK 8. 99c15000 00001000
1807 12:20:35.743477 AFTER CAR 9. 99c0b000 0000a000
1808 12:20:35.746821 RAMSTAGE 10. 99baf000 0005c000
1809 12:20:35.750161 REFCODE 11. 99b7a000 00035000
1810 12:20:35.753718 SMM BACKUP 12. 99b6a000 00010000
1811 12:20:35.757205 COREBOOT 13. 99b62000 00008000
1812 12:20:35.760192 ACPI 14. 99b3e000 00024000
1813 12:20:35.764101 ACPI GNVS 15. 99b3d000 00001000
1814 12:20:35.767107 RAMOOPS 16. 99a3d000 00100000
1815 12:20:35.770662 TPM2 TCGLOG17. 99a2d000 00010000
1816 12:20:35.773731 SMBIOS 18. 99a2c000 00000800
1817 12:20:35.777502 IMD small region:
1818 12:20:35.780562 IMD ROOT 0. 99ffec00 00000400
1819 12:20:35.783774 FSP RUNTIME 1. 99ffebe0 00000004
1820 12:20:35.787108 EC HOSTEVENT 2. 99ffebc0 00000008
1821 12:20:35.790228 POWER STATE 3. 99ffeb80 00000040
1822 12:20:35.793624 ROMSTAGE 4. 99ffeb60 00000004
1823 12:20:35.797371 MEM INFO 5. 99ffe9a0 000001b9
1824 12:20:35.800204 VPD 6. 99ffe920 0000006c
1825 12:20:35.804047 MTRR: Physical address space:
1826 12:20:35.810558 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1827 12:20:35.817499 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1828 12:20:35.823555 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1829 12:20:35.830577 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1830 12:20:35.836963 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1831 12:20:35.843635 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1832 12:20:35.846675 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1833 12:20:35.853689 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 12:20:35.856663 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 12:20:35.860349 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 12:20:35.863068 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 12:20:35.870245 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 12:20:35.873280 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 12:20:35.877060 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 12:20:35.879934 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 12:20:35.886557 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 12:20:35.889683 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 12:20:35.892664 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 12:20:35.896163 call enable_fixed_mtrr()
1845 12:20:35.899418 CPU physical address size: 39 bits
1846 12:20:35.902759 MTRR: default type WB/UC MTRR counts: 6/8.
1847 12:20:35.909566 MTRR: WB selected as default type.
1848 12:20:35.912545 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1849 12:20:35.919337 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1850 12:20:35.926419 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1851 12:20:35.932221 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1852 12:20:35.939395 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1853 12:20:35.945926 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1854 12:20:35.949068 MTRR: Fixed MSR 0x250 0x0606060606060606
1855 12:20:35.956007 MTRR: Fixed MSR 0x258 0x0606060606060606
1856 12:20:35.959022 MTRR: Fixed MSR 0x259 0x0000000000000000
1857 12:20:35.962216 MTRR: Fixed MSR 0x268 0x0606060606060606
1858 12:20:35.965504 MTRR: Fixed MSR 0x269 0x0606060606060606
1859 12:20:35.972025 MTRR: Fixed MSR 0x26a 0x0606060606060606
1860 12:20:35.976074 MTRR: Fixed MSR 0x26b 0x0606060606060606
1861 12:20:35.979027 MTRR: Fixed MSR 0x26c 0x0606060606060606
1862 12:20:35.982193 MTRR: Fixed MSR 0x26d 0x0606060606060606
1863 12:20:35.988621 MTRR: Fixed MSR 0x26e 0x0606060606060606
1864 12:20:35.992042 MTRR: Fixed MSR 0x26f 0x0606060606060606
1865 12:20:35.992365
1866 12:20:35.992643 MTRR check
1867 12:20:35.995218 Fixed MTRRs : Enabled
1868 12:20:35.998480 Variable MTRRs: Enabled
1869 12:20:35.998723
1870 12:20:36.001801 call enable_fixed_mtrr()
1871 12:20:36.004945 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1872 12:20:36.008354 CPU physical address size: 39 bits
1873 12:20:36.014719 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1874 12:20:36.018334 CBFS @ c08000 size 3f8000
1875 12:20:36.021600 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1876 12:20:36.024979 CBFS: Locating 'fallback/payload'
1877 12:20:36.032166 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 12:20:36.034968 MTRR: Fixed MSR 0x250 0x0606060606060606
1879 12:20:36.038336 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 12:20:36.041471 MTRR: Fixed MSR 0x259 0x0000000000000000
1881 12:20:36.048250 MTRR: Fixed MSR 0x268 0x0606060606060606
1882 12:20:36.051839 MTRR: Fixed MSR 0x269 0x0606060606060606
1883 12:20:36.055009 MTRR: Fixed MSR 0x26a 0x0606060606060606
1884 12:20:36.058570 MTRR: Fixed MSR 0x26b 0x0606060606060606
1885 12:20:36.064995 MTRR: Fixed MSR 0x26c 0x0606060606060606
1886 12:20:36.067880 MTRR: Fixed MSR 0x26d 0x0606060606060606
1887 12:20:36.071647 MTRR: Fixed MSR 0x26e 0x0606060606060606
1888 12:20:36.074847 MTRR: Fixed MSR 0x26f 0x0606060606060606
1889 12:20:36.081314 MTRR: Fixed MSR 0x258 0x0606060606060606
1890 12:20:36.081427 call enable_fixed_mtrr()
1891 12:20:36.087822 CBFS: Found @ offset 1c96c0 size 3f798
1892 12:20:36.091365 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 12:20:36.094663 MTRR: Fixed MSR 0x250 0x0606060606060606
1894 12:20:36.097753 MTRR: Fixed MSR 0x258 0x0606060606060606
1895 12:20:36.101340 MTRR: Fixed MSR 0x259 0x0000000000000000
1896 12:20:36.107987 MTRR: Fixed MSR 0x268 0x0606060606060606
1897 12:20:36.111348 MTRR: Fixed MSR 0x269 0x0606060606060606
1898 12:20:36.114109 MTRR: Fixed MSR 0x26a 0x0606060606060606
1899 12:20:36.118426 MTRR: Fixed MSR 0x26b 0x0606060606060606
1900 12:20:36.124304 MTRR: Fixed MSR 0x26c 0x0606060606060606
1901 12:20:36.127942 MTRR: Fixed MSR 0x26d 0x0606060606060606
1902 12:20:36.130845 MTRR: Fixed MSR 0x26e 0x0606060606060606
1903 12:20:36.134135 MTRR: Fixed MSR 0x26f 0x0606060606060606
1904 12:20:36.140970 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 12:20:36.141153 call enable_fixed_mtrr()
1906 12:20:36.147787 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 12:20:36.151051 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 12:20:36.154593 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 12:20:36.157398 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 12:20:36.164097 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 12:20:36.167684 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 12:20:36.170945 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 12:20:36.174119 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 12:20:36.180740 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 12:20:36.184168 CPU physical address size: 39 bits
1916 12:20:36.187361 call enable_fixed_mtrr()
1917 12:20:36.191042 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 12:20:36.193973 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 12:20:36.197036 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 12:20:36.203646 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 12:20:36.206787 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 12:20:36.210088 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 12:20:36.213701 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 12:20:36.220236 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 12:20:36.223462 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 12:20:36.226416 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 12:20:36.230402 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 12:20:36.233128 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 12:20:36.240189 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 12:20:36.243424 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 12:20:36.247661 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 12:20:36.253190 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 12:20:36.256600 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 12:20:36.260110 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 12:20:36.263542 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 12:20:36.266535 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 12:20:36.273114 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 12:20:36.277214 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 12:20:36.280991 call enable_fixed_mtrr()
1940 12:20:36.282925 call enable_fixed_mtrr()
1941 12:20:36.286548 CPU physical address size: 39 bits
1942 12:20:36.289611 CPU physical address size: 39 bits
1943 12:20:36.293268 Checking segment from ROM address 0xffdd16f8
1944 12:20:36.296051 CPU physical address size: 39 bits
1945 12:20:36.303190 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 12:20:36.306317 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 12:20:36.309138 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 12:20:36.313019 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 12:20:36.319197 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 12:20:36.322703 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 12:20:36.326374 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 12:20:36.329232 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 12:20:36.332424 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 12:20:36.339031 CPU physical address size: 39 bits
1955 12:20:36.339187 call enable_fixed_mtrr()
1956 12:20:36.345874 Checking segment from ROM address 0xffdd1714
1957 12:20:36.349233 CPU physical address size: 39 bits
1958 12:20:36.352409 Loading segment from ROM address 0xffdd16f8
1959 12:20:36.355620 code (compression=0)
1960 12:20:36.362626 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1961 12:20:36.372863 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1962 12:20:36.375654 it's not compressed!
1963 12:20:36.466353 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1964 12:20:36.472829 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1965 12:20:36.476615 Loading segment from ROM address 0xffdd1714
1966 12:20:36.479510 Entry Point 0x30000000
1967 12:20:36.483055 Loaded segments
1968 12:20:36.488685 Finalizing chipset.
1969 12:20:36.491554 Finalizing SMM.
1970 12:20:36.495391 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1971 12:20:36.498438 mp_park_aps done after 0 msecs.
1972 12:20:36.505293 Jumping to boot code at 30000000(99b62000)
1973 12:20:36.512031 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1974 12:20:36.512500
1975 12:20:36.512835
1976 12:20:36.513146
1977 12:20:36.515036 Starting depthcharge on Helios...
1978 12:20:36.515485
1979 12:20:36.516682 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1980 12:20:36.517273 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1981 12:20:36.517860 Setting prompt string to ['hatch:']
1982 12:20:36.518267 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1983 12:20:36.524601 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1984 12:20:36.525027
1985 12:20:36.531688 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1986 12:20:36.531994
1987 12:20:36.538233 board_setup: Info: eMMC controller not present; skipping
1988 12:20:36.538500
1989 12:20:36.541221 New NVMe Controller 0x30053ac0 @ 00:1d:00
1990 12:20:36.541413
1991 12:20:36.547920 board_setup: Info: SDHCI controller not present; skipping
1992 12:20:36.548103
1993 12:20:36.554753 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1994 12:20:36.554943
1995 12:20:36.555089 Wipe memory regions:
1996 12:20:36.555225
1997 12:20:36.557722 [0x00000000001000, 0x000000000a0000)
1998 12:20:36.557905
1999 12:20:36.560938 [0x00000000100000, 0x00000030000000)
2000 12:20:36.627416
2001 12:20:36.630689 [0x00000030657430, 0x00000099a2c000)
2002 12:20:36.768255
2003 12:20:36.771773 [0x00000100000000, 0x0000045e800000)
2004 12:20:40.295096
2005 12:20:40.295837 R8152: Initializing
2006 12:20:40.296222
2007 12:20:40.296893 Version 9 (ocp_data = 6010)
2008 12:20:40.297246
2009 12:20:40.297551 R8152: Done initializing
2010 12:20:40.297846
2011 12:20:40.298133 Adding net device
2012 12:20:40.298418
2013 12:20:40.298695 R8152: Initializing
2014 12:20:40.298975
2015 12:20:40.299249 Version 6 (ocp_data = 5c30)
2016 12:20:40.299527
2017 12:20:40.299803 R8152: Done initializing
2018 12:20:40.300078
2019 12:20:40.300397 net_add_device: Attemp to include the same device
2020 12:20:40.300689
2021 12:20:40.300966 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2022 12:20:40.301244
2023 12:20:40.301513
2024 12:20:40.301785
2025 12:20:40.302562 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 12:20:40.403565 hatch: tftpboot 192.168.201.1 12217891/tftp-deploy-lfjktcyv/kernel/bzImage 12217891/tftp-deploy-lfjktcyv/kernel/cmdline 12217891/tftp-deploy-lfjktcyv/ramdisk/ramdisk.cpio.gz
2028 12:20:40.404194 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2029 12:20:40.404699 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2030 12:20:40.408892 tftpboot 192.168.201.1 12217891/tftp-deploy-lfjktcyv/kernel/bzIploy-lfjktcyv/kernel/cmdline 12217891/tftp-deploy-lfjktcyv/ramdisk/ramdisk.cpio.gz
2031 12:20:40.409319
2032 12:20:40.409648 Waiting for link
2033 12:20:40.610115
2034 12:20:40.610957 done.
2035 12:20:40.611688
2036 12:20:40.612405 MAC: 00:24:32:50:19:be
2037 12:20:40.613078
2038 12:20:40.614184 Sending DHCP discover... done.
2039 12:20:40.614841
2040 12:20:40.616379 Waiting for reply... done.
2041 12:20:40.616846
2042 12:20:40.619505 Sending DHCP request... done.
2043 12:20:40.619956
2044 12:20:40.923038 Waiting for reply... done.
2045 12:20:40.923189
2046 12:20:40.923260 My ip is 192.168.201.15
2047 12:20:40.923322
2048 12:20:40.926795 The DHCP server ip is 192.168.201.1
2049 12:20:40.930535
2050 12:20:40.934105 TFTP server IP predefined by user: 192.168.201.1
2051 12:20:40.934640
2052 12:20:40.940028 Bootfile predefined by user: 12217891/tftp-deploy-lfjktcyv/kernel/bzImage
2053 12:20:40.940516
2054 12:20:40.943456 Sending tftp read request... done.
2055 12:20:40.943938
2056 12:20:40.952357 Waiting for the transfer...
2057 12:20:40.952788
2058 12:20:41.506968 00000000 ################################################################
2059 12:20:41.507257
2060 12:20:42.071964 00080000 ################################################################
2061 12:20:42.072162
2062 12:20:42.648412 00100000 ################################################################
2063 12:20:42.648947
2064 12:20:43.213765 00180000 ################################################################
2065 12:20:43.213984
2066 12:20:43.754794 00200000 ################################################################
2067 12:20:43.754965
2068 12:20:44.310144 00280000 ################################################################
2069 12:20:44.310325
2070 12:20:44.860214 00300000 ################################################################
2071 12:20:44.860399
2072 12:20:45.418582 00380000 ################################################################
2073 12:20:45.418737
2074 12:20:45.998729 00400000 ################################################################
2075 12:20:45.998882
2076 12:20:46.555424 00480000 ################################################################
2077 12:20:46.555663
2078 12:20:47.115769 00500000 ################################################################
2079 12:20:47.115974
2080 12:20:47.668178 00580000 ################################################################
2081 12:20:47.668547
2082 12:20:48.226012 00600000 ################################################################
2083 12:20:48.226162
2084 12:20:48.781879 00680000 ################################################################
2085 12:20:48.782030
2086 12:20:49.349011 00700000 ################################################################
2087 12:20:49.349173
2088 12:20:49.923121 00780000 ################################################################
2089 12:20:49.923654
2090 12:20:50.470432 00800000 ################################################################
2091 12:20:50.470606
2092 12:20:51.032990 00880000 ################################################################
2093 12:20:51.033140
2094 12:20:51.586637 00900000 ################################################################
2095 12:20:51.586788
2096 12:20:52.127664 00980000 ################################################################
2097 12:20:52.127817
2098 12:20:52.676184 00a00000 ################################################################
2099 12:20:52.676467
2100 12:20:53.255294 00a80000 ################################################################
2101 12:20:53.255816
2102 12:20:53.301888 00b00000 ##### done.
2103 12:20:53.302399
2104 12:20:53.305310 The bootfile was 11571200 bytes long.
2105 12:20:53.305735
2106 12:20:53.309068 Sending tftp read request... done.
2107 12:20:53.309491
2108 12:20:53.312256 Waiting for the transfer...
2109 12:20:53.312722
2110 12:20:53.898937 00000000 ################################################################
2111 12:20:53.899439
2112 12:20:54.471939 00080000 ################################################################
2113 12:20:54.472129
2114 12:20:55.051029 00100000 ################################################################
2115 12:20:55.051375
2116 12:20:55.631043 00180000 ################################################################
2117 12:20:55.631242
2118 12:20:56.170564 00200000 ################################################################
2119 12:20:56.170713
2120 12:20:56.716654 00280000 ################################################################
2121 12:20:56.716819
2122 12:20:57.280065 00300000 ################################################################
2123 12:20:57.280215
2124 12:20:57.914673 00380000 ################################################################
2125 12:20:57.915272
2126 12:20:58.436899 00400000 ################################################################
2127 12:20:58.437085
2128 12:20:59.059553 00480000 ################################################################
2129 12:20:59.059750
2130 12:20:59.634856 00500000 ################################################################
2131 12:20:59.635507
2132 12:21:00.192875 00580000 ################################################################
2133 12:21:00.193027
2134 12:21:00.746411 00600000 ################################################################
2135 12:21:00.746577
2136 12:21:01.305676 00680000 ################################################################
2137 12:21:01.305827
2138 12:21:01.851164 00700000 ################################################################
2139 12:21:01.851434
2140 12:21:02.404655 00780000 ################################################################
2141 12:21:02.404840
2142 12:21:02.951520 00800000 ################################################################
2143 12:21:02.951678
2144 12:21:03.290005 00880000 ####################################### done.
2145 12:21:03.290207
2146 12:21:03.293685 Sending tftp read request... done.
2147 12:21:03.293801
2148 12:21:03.296183 Waiting for the transfer...
2149 12:21:03.296298
2150 12:21:03.296383 00000000 # done.
2151 12:21:03.296447
2152 12:21:03.306064 Command line loaded dynamically from TFTP file: 12217891/tftp-deploy-lfjktcyv/kernel/cmdline
2153 12:21:03.306187
2154 12:21:03.326418 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2155 12:21:03.326552
2156 12:21:03.329279 ec_init(0): CrosEC protocol v3 supported (256, 256)
2157 12:21:03.337054
2158 12:21:03.340005 Shutting down all USB controllers.
2159 12:21:03.340093
2160 12:21:03.340160 Removing current net device
2161 12:21:03.344077
2162 12:21:03.344175 Finalizing coreboot
2163 12:21:03.344244
2164 12:21:03.351111 Exiting depthcharge with code 4 at timestamp: 34212483
2165 12:21:03.351194
2166 12:21:03.351261
2167 12:21:03.351322 Starting kernel ...
2168 12:21:03.351381
2169 12:21:03.351441
2170 12:21:03.351822 end: 2.2.4 bootloader-commands (duration 00:00:27) [common]
2171 12:21:03.351921 start: 2.2.5 auto-login-action (timeout 00:04:15) [common]
2172 12:21:03.351997 Setting prompt string to ['Linux version [0-9]']
2173 12:21:03.352065 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2174 12:21:03.352140 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2176 12:25:18.352184 end: 2.2.5 auto-login-action (duration 00:04:15) [common]
2178 12:25:18.352449 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 255 seconds'
2180 12:25:18.352616 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2183 12:25:18.352872 end: 2 depthcharge-action (duration 00:05:00) [common]
2185 12:25:18.353088 Cleaning after the job
2186 12:25:18.353178 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217891/tftp-deploy-lfjktcyv/ramdisk
2187 12:25:18.353545 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217891/tftp-deploy-lfjktcyv/kernel
2188 12:25:18.353983 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217891/tftp-deploy-lfjktcyv/modules
2189 12:25:18.354343 start: 5.1 power-off (timeout 00:00:30) [common]
2190 12:25:18.354498 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2191 12:25:18.431131 >> Command sent successfully.
2192 12:25:18.433689 Returned 0 in 0 seconds
2193 12:25:18.534087 end: 5.1 power-off (duration 00:00:00) [common]
2195 12:25:18.534419 start: 5.2 read-feedback (timeout 00:10:00) [common]
2196 12:25:18.534736 Listened to connection for namespace 'common' for up to 1s
2198 12:25:18.535120 Listened to connection for namespace 'common' for up to 1s
2199 12:25:19.535830 Finalising connection for namespace 'common'
2200 12:25:19.536600 Disconnecting from shell: Finalise
2201 12:25:19.537037
2202 12:25:19.638054 end: 5.2 read-feedback (duration 00:00:01) [common]
2203 12:25:19.638613 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12217891
2204 12:25:19.687815 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12217891
2205 12:25:19.688056 JobError: Your job cannot terminate cleanly.