Boot log: asus-cx9400-volteer

    1 12:17:50.411225  lava-dispatcher, installed at version: 2023.10
    2 12:17:50.411385  start: 0 validate
    3 12:17:50.411495  Start time: 2023-12-08 12:17:50.411488+00:00 (UTC)
    4 12:17:50.411595  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:17:50.411703  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 12:17:50.413904  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:17:50.414054  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:17:50.414924  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:17:50.415033  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 12:17:50.416791  validate duration: 0.01
   12 12:17:50.417011  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 12:17:50.417103  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 12:17:50.417198  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 12:17:50.417301  Not decompressing ramdisk as can be used compressed.
   16 12:17:50.417376  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 12:17:50.417431  saving as /var/lib/lava/dispatcher/tmp/12217920/tftp-deploy-qzwyws67/ramdisk/rootfs.cpio.gz
   18 12:17:50.417483  total size: 8418130 (8 MB)
   19 12:17:50.418339  progress   0 % (0 MB)
   20 12:17:50.419999  progress   5 % (0 MB)
   21 12:17:50.421547  progress  10 % (0 MB)
   22 12:17:50.423154  progress  15 % (1 MB)
   23 12:17:50.424706  progress  20 % (1 MB)
   24 12:17:50.426294  progress  25 % (2 MB)
   25 12:17:50.427892  progress  30 % (2 MB)
   26 12:17:50.429362  progress  35 % (2 MB)
   27 12:17:50.430953  progress  40 % (3 MB)
   28 12:17:50.432539  progress  45 % (3 MB)
   29 12:17:50.434161  progress  50 % (4 MB)
   30 12:17:50.435683  progress  55 % (4 MB)
   31 12:17:50.437230  progress  60 % (4 MB)
   32 12:17:50.438672  progress  65 % (5 MB)
   33 12:17:50.440393  progress  70 % (5 MB)
   34 12:17:50.441893  progress  75 % (6 MB)
   35 12:17:50.443468  progress  80 % (6 MB)
   36 12:17:50.444990  progress  85 % (6 MB)
   37 12:17:50.446539  progress  90 % (7 MB)
   38 12:17:50.448037  progress  95 % (7 MB)
   39 12:17:50.449576  progress 100 % (8 MB)
   40 12:17:50.449765  8 MB downloaded in 0.03 s (248.70 MB/s)
   41 12:17:50.449898  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 12:17:50.450147  end: 1.1 download-retry (duration 00:00:00) [common]
   44 12:17:50.450219  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 12:17:50.450285  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 12:17:50.450402  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 12:17:50.450459  saving as /var/lib/lava/dispatcher/tmp/12217920/tftp-deploy-qzwyws67/kernel/bzImage
   48 12:17:50.450506  total size: 11571200 (11 MB)
   49 12:17:50.450554  No compression specified
   50 12:17:50.451513  progress   0 % (0 MB)
   51 12:17:50.453647  progress   5 % (0 MB)
   52 12:17:50.455827  progress  10 % (1 MB)
   53 12:17:50.457867  progress  15 % (1 MB)
   54 12:17:50.460049  progress  20 % (2 MB)
   55 12:17:50.462188  progress  25 % (2 MB)
   56 12:17:50.464191  progress  30 % (3 MB)
   57 12:17:50.466353  progress  35 % (3 MB)
   58 12:17:50.468449  progress  40 % (4 MB)
   59 12:17:50.470504  progress  45 % (4 MB)
   60 12:17:50.472638  progress  50 % (5 MB)
   61 12:17:50.474807  progress  55 % (6 MB)
   62 12:17:50.476889  progress  60 % (6 MB)
   63 12:17:50.479076  progress  65 % (7 MB)
   64 12:17:50.481238  progress  70 % (7 MB)
   65 12:17:50.483228  progress  75 % (8 MB)
   66 12:17:50.485273  progress  80 % (8 MB)
   67 12:17:50.487354  progress  85 % (9 MB)
   68 12:17:50.489293  progress  90 % (9 MB)
   69 12:17:50.491443  progress  95 % (10 MB)
   70 12:17:50.493575  progress 100 % (11 MB)
   71 12:17:50.493683  11 MB downloaded in 0.04 s (255.60 MB/s)
   72 12:17:50.493810  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 12:17:50.494020  end: 1.2 download-retry (duration 00:00:00) [common]
   75 12:17:50.494090  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 12:17:50.494155  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 12:17:50.494270  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 12:17:50.494327  saving as /var/lib/lava/dispatcher/tmp/12217920/tftp-deploy-qzwyws67/modules/modules.tar
   79 12:17:50.494376  total size: 483904 (0 MB)
   80 12:17:50.494425  Using unxz to decompress xz
   81 12:17:50.497508  progress   6 % (0 MB)
   82 12:17:50.497811  progress  13 % (0 MB)
   83 12:17:50.498009  progress  20 % (0 MB)
   84 12:17:50.499771  progress  27 % (0 MB)
   85 12:17:50.501532  progress  33 % (0 MB)
   86 12:17:50.503258  progress  40 % (0 MB)
   87 12:17:50.504910  progress  47 % (0 MB)
   88 12:17:50.506636  progress  54 % (0 MB)
   89 12:17:50.508318  progress  60 % (0 MB)
   90 12:17:50.510065  progress  67 % (0 MB)
   91 12:17:50.511795  progress  74 % (0 MB)
   92 12:17:50.513587  progress  81 % (0 MB)
   93 12:17:50.515237  progress  88 % (0 MB)
   94 12:17:50.517016  progress  94 % (0 MB)
   95 12:17:50.519106  progress 100 % (0 MB)
   96 12:17:50.524824  0 MB downloaded in 0.03 s (15.16 MB/s)
   97 12:17:50.525007  end: 1.3.1 http-download (duration 00:00:00) [common]
   99 12:17:50.525224  end: 1.3 download-retry (duration 00:00:00) [common]
  100 12:17:50.525296  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
  101 12:17:50.525370  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
  102 12:17:50.525434  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  103 12:17:50.525499  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
  104 12:17:50.525680  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km
  105 12:17:50.525793  makedir: /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin
  106 12:17:50.525905  makedir: /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/tests
  107 12:17:50.525999  makedir: /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/results
  108 12:17:50.526095  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-add-keys
  109 12:17:50.526211  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-add-sources
  110 12:17:50.526334  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-background-process-start
  111 12:17:50.526453  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-background-process-stop
  112 12:17:50.526564  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-common-functions
  113 12:17:50.526660  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-echo-ipv4
  114 12:17:50.526759  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-install-packages
  115 12:17:50.526854  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-installed-packages
  116 12:17:50.526951  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-os-build
  117 12:17:50.527056  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-probe-channel
  118 12:17:50.527150  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-probe-ip
  119 12:17:50.527244  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-target-ip
  120 12:17:50.527337  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-target-mac
  121 12:17:50.527431  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-target-storage
  122 12:17:50.527529  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-test-case
  123 12:17:50.527622  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-test-event
  124 12:17:50.527715  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-test-feedback
  125 12:17:50.527807  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-test-raise
  126 12:17:50.527901  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-test-reference
  127 12:17:50.527998  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-test-runner
  128 12:17:50.528091  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-test-set
  129 12:17:50.528186  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-test-shell
  130 12:17:50.528282  Updating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-install-packages (oe)
  131 12:17:50.528406  Updating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/bin/lava-installed-packages (oe)
  132 12:17:50.528509  Creating /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/environment
  133 12:17:50.528591  LAVA metadata
  134 12:17:50.528651  - LAVA_JOB_ID=12217920
  135 12:17:50.528703  - LAVA_DISPATCHER_IP=192.168.201.1
  136 12:17:50.528786  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  137 12:17:50.528843  skipped lava-vland-overlay
  138 12:17:50.528902  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  139 12:17:50.528964  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  140 12:17:50.529026  skipped lava-multinode-overlay
  141 12:17:50.529106  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  142 12:17:50.529190  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  143 12:17:50.529251  Loading test definitions
  144 12:17:50.529327  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  145 12:17:50.529386  Using /lava-12217920 at stage 0
  146 12:17:50.529637  uuid=12217920_1.4.2.3.1 testdef=None
  147 12:17:50.529717  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  148 12:17:50.529794  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  149 12:17:50.530232  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  151 12:17:50.530412  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  152 12:17:50.530910  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  154 12:17:50.531087  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  155 12:17:50.531564  runner path: /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/0/tests/0_dmesg test_uuid 12217920_1.4.2.3.1
  156 12:17:50.531690  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  158 12:17:50.531894  start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
  159 12:17:50.531951  Using /lava-12217920 at stage 1
  160 12:17:50.532183  uuid=12217920_1.4.2.3.5 testdef=None
  161 12:17:50.532252  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  162 12:17:50.532316  start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
  163 12:17:50.532734  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  165 12:17:50.532926  start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
  166 12:17:50.533459  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  168 12:17:50.533643  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
  169 12:17:50.534154  runner path: /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/1/tests/1_bootrr test_uuid 12217920_1.4.2.3.5
  170 12:17:50.534270  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  172 12:17:50.534433  Creating lava-test-runner.conf files
  173 12:17:50.534481  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/0 for stage 0
  174 12:17:50.534549  - 0_dmesg
  175 12:17:50.534614  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217920/lava-overlay-1n27f1km/lava-12217920/1 for stage 1
  176 12:17:50.534685  - 1_bootrr
  177 12:17:50.534760  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  178 12:17:50.534830  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  179 12:17:50.541741  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  180 12:17:50.541841  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  181 12:17:50.541913  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  182 12:17:50.542030  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  183 12:17:50.542096  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  184 12:17:50.710000  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  185 12:17:50.710251  start: 1.4.4 extract-modules (timeout 00:10:00) [common]
  186 12:17:50.710341  extracting modules file /var/lib/lava/dispatcher/tmp/12217920/tftp-deploy-qzwyws67/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217920/extract-overlay-ramdisk-7j7icpmn/ramdisk
  187 12:17:50.724001  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  188 12:17:50.724120  start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
  189 12:17:50.724200  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12217920/compress-overlay-fny5umcl/overlay-1.4.2.4.tar.gz to ramdisk
  190 12:17:50.724260  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12217920/compress-overlay-fny5umcl/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12217920/extract-overlay-ramdisk-7j7icpmn/ramdisk
  191 12:17:50.730335  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  192 12:17:50.730453  start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
  193 12:17:50.730563  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  194 12:17:50.730667  start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
  195 12:17:50.730742  Building ramdisk /var/lib/lava/dispatcher/tmp/12217920/extract-overlay-ramdisk-7j7icpmn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12217920/extract-overlay-ramdisk-7j7icpmn/ramdisk
  196 12:17:50.791109  >> 53982 blocks

  197 12:17:51.571330  rename /var/lib/lava/dispatcher/tmp/12217920/extract-overlay-ramdisk-7j7icpmn/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12217920/tftp-deploy-qzwyws67/ramdisk/ramdisk.cpio.gz
  198 12:17:51.571618  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  199 12:17:51.571715  start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
  200 12:17:51.571810  start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
  201 12:17:51.571891  No mkimage arch provided, not using FIT.
  202 12:17:51.571963  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  203 12:17:51.572031  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  204 12:17:51.572112  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  205 12:17:51.572184  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
  206 12:17:51.572248  No LXC device requested
  207 12:17:51.572314  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  208 12:17:51.572386  start: 1.6 deploy-device-env (timeout 00:09:59) [common]
  209 12:17:51.572454  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  210 12:17:51.572515  Checking files for TFTP limit of 4294967296 bytes.
  211 12:17:51.572833  end: 1 tftp-deploy (duration 00:00:01) [common]
  212 12:17:51.572926  start: 2 depthcharge-action (timeout 00:05:00) [common]
  213 12:17:51.573000  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  214 12:17:51.573091  substitutions:
  215 12:17:51.573142  - {DTB}: None
  216 12:17:51.573190  - {INITRD}: 12217920/tftp-deploy-qzwyws67/ramdisk/ramdisk.cpio.gz
  217 12:17:51.573236  - {KERNEL}: 12217920/tftp-deploy-qzwyws67/kernel/bzImage
  218 12:17:51.573281  - {LAVA_MAC}: None
  219 12:17:51.573326  - {PRESEED_CONFIG}: None
  220 12:17:51.573370  - {PRESEED_LOCAL}: None
  221 12:17:51.573414  - {RAMDISK}: 12217920/tftp-deploy-qzwyws67/ramdisk/ramdisk.cpio.gz
  222 12:17:51.573457  - {ROOT_PART}: None
  223 12:17:51.573501  - {ROOT}: None
  224 12:17:51.573545  - {SERVER_IP}: 192.168.201.1
  225 12:17:51.573589  - {TEE}: None
  226 12:17:51.573632  Parsed boot commands:
  227 12:17:51.573675  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  228 12:17:51.573824  Parsed boot commands: tftpboot 192.168.201.1 12217920/tftp-deploy-qzwyws67/kernel/bzImage 12217920/tftp-deploy-qzwyws67/kernel/cmdline 12217920/tftp-deploy-qzwyws67/ramdisk/ramdisk.cpio.gz
  229 12:17:51.573896  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  230 12:17:51.573982  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  231 12:17:51.574057  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  232 12:17:51.574125  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  233 12:17:51.574182  Not connected, no need to disconnect.
  234 12:17:51.574243  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  235 12:17:51.574306  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  236 12:17:51.574360  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-16'
  237 12:17:51.576794  Setting prompt string to ['lava-test: # ']
  238 12:17:51.577048  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  239 12:17:51.577136  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  240 12:17:51.577213  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  241 12:17:51.577285  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  242 12:17:51.577474  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-16' '--port=1' '--command=reboot'
  243 12:17:56.714435  >> Command sent successfully.

  244 12:17:56.720309  Returned 0 in 5 seconds
  245 12:17:56.821235  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  247 12:17:56.822378  end: 2.2.2 reset-device (duration 00:00:05) [common]
  248 12:17:56.822742  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  249 12:17:56.823045  Setting prompt string to 'Starting depthcharge on Voema...'
  250 12:17:56.823287  Changing prompt to 'Starting depthcharge on Voema...'
  251 12:17:56.823526  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  252 12:17:56.824313  [Enter `^Ec?' for help]

  253 12:17:58.381299  

  254 12:17:58.381871  

  255 12:17:58.391529  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  256 12:17:58.394413  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz

  257 12:17:58.401305  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  258 12:17:58.404762  CPU: AES supported, TXT NOT supported, VT supported

  259 12:17:58.411090  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  260 12:17:58.417709  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  261 12:17:58.420791  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  262 12:17:58.424526  VBOOT: Loading verstage.

  263 12:17:58.431266  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  264 12:17:58.434680  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  265 12:17:58.438060  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  266 12:17:58.448634  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  267 12:17:58.455082  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  268 12:17:58.455503  

  269 12:17:58.455934  

  270 12:17:58.468246  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  271 12:17:58.481996  Probing TPM: . done!

  272 12:17:58.484961  TPM ready after 0 ms

  273 12:17:58.488537  Connected to device vid:did:rid of 1ae0:0028:00

  274 12:17:58.499607  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e

  275 12:17:58.506253  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  276 12:17:58.509513  Initialized TPM device CR50 revision 0

  277 12:17:58.585768  tlcl_send_startup: Startup return code is 0

  278 12:17:58.586268  TPM: setup succeeded

  279 12:17:58.600797  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  280 12:17:58.614650  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  281 12:17:58.627359  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  282 12:17:58.637135  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  283 12:17:58.640674  Chrome EC: UHEPI supported

  284 12:17:58.644040  Phase 1

  285 12:17:58.647597  FMAP: area GBB found @ 1805000 (458752 bytes)

  286 12:17:58.657224  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  287 12:17:58.664304  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  288 12:17:58.670477  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  289 12:17:58.677268  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  290 12:17:58.680728  Recovery requested (1009000e)

  291 12:17:58.689511  TPM: Extending digest for VBOOT: boot mode into PCR 0

  292 12:17:58.696282  tlcl_extend: response is 0

  293 12:17:58.702108  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  294 12:17:58.711861  tlcl_extend: response is 0

  295 12:17:58.718534  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  296 12:17:58.725140  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  297 12:17:58.731773  BS: verstage times (exec / console): total (unknown) / 142 ms

  298 12:17:58.732197  

  299 12:17:58.732451  

  300 12:17:58.744903  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  301 12:17:58.751808  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  302 12:17:58.754907  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  303 12:17:58.758344  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  304 12:17:58.764734  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  305 12:17:58.768079  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  306 12:17:58.771415  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  307 12:17:58.774916  TCO_STS:   0000 0000

  308 12:17:58.778042  GEN_PMCON: d0015038 00002200

  309 12:17:58.781244  GBLRST_CAUSE: 00000000 00000000

  310 12:17:58.784501  HPR_CAUSE0: 00000000

  311 12:17:58.784862  prev_sleep_state 5

  312 12:17:58.787754  Boot Count incremented to 5072

  313 12:17:58.794644  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  314 12:17:58.801279  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  315 12:17:58.810959  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  316 12:17:58.817694  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  317 12:17:58.821114  Chrome EC: UHEPI supported

  318 12:17:58.827623  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  319 12:17:58.838826  Probing TPM:  done!

  320 12:17:58.845293  Connected to device vid:did:rid of 1ae0:0028:00

  321 12:17:58.855073  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e

  322 12:17:58.858544  Initialized TPM device CR50 revision 0

  323 12:17:58.873623  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  324 12:17:58.880129  MRC: Hash idx 0x100b comparison successful.

  325 12:17:58.883632  MRC cache found, size faa8

  326 12:17:58.883996  bootmode is set to: 2

  327 12:17:58.886602  SPD index = 2

  328 12:17:58.893447  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  329 12:17:58.896394  SPD: module type is LPDDR4X

  330 12:17:58.903951  SPD: module part number is MT53D1G64D4NW-046

  331 12:17:58.907514  SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb

  332 12:17:58.910998  SPD: device width 16 bits, bus width 16 bits

  333 12:17:58.917820  SPD: module size is 2048 MB (per channel)

  334 12:17:59.346823  CBMEM:

  335 12:17:59.350039  IMD: root @ 0x76fff000 254 entries.

  336 12:17:59.353233  IMD: root @ 0x76ffec00 62 entries.

  337 12:17:59.356244  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  338 12:17:59.362998  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  339 12:17:59.366466  External stage cache:

  340 12:17:59.369914  IMD: root @ 0x7b3ff000 254 entries.

  341 12:17:59.373276  IMD: root @ 0x7b3fec00 62 entries.

  342 12:17:59.387500  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  343 12:17:59.394726  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  344 12:17:59.400698  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  345 12:17:59.414755  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  346 12:17:59.421118  cse_lite: Skip switching to RW in the recovery path

  347 12:17:59.421487  8 DIMMs found

  348 12:17:59.421746  SMM Memory Map

  349 12:17:59.427787  SMRAM       : 0x7b000000 0x800000

  350 12:17:59.431186   Subregion 0: 0x7b000000 0x200000

  351 12:17:59.434368   Subregion 1: 0x7b200000 0x200000

  352 12:17:59.437745   Subregion 2: 0x7b400000 0x400000

  353 12:17:59.438140  top_of_ram = 0x77000000

  354 12:17:59.445022  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  355 12:17:59.451500  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  356 12:17:59.454174  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  357 12:17:59.460806  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  358 12:17:59.467721  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  359 12:17:59.473701  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  360 12:17:59.484639  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  361 12:17:59.487862  Processing 211 relocs. Offset value of 0x74c0b000

  362 12:17:59.496996  BS: romstage times (exec / console): total (unknown) / 276 ms

  363 12:17:59.503486  

  364 12:17:59.503925  

  365 12:17:59.512634  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  366 12:17:59.516041  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  367 12:17:59.525654  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  368 12:17:59.532452  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  369 12:17:59.539126  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  370 12:17:59.545496  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  371 12:17:59.589511  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  372 12:17:59.596362  Processing 5008 relocs. Offset value of 0x75d98000

  373 12:17:59.599647  BS: postcar times (exec / console): total (unknown) / 59 ms

  374 12:17:59.602736  

  375 12:17:59.602807  

  376 12:17:59.612520  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  377 12:17:59.612607  Normal boot

  378 12:17:59.615948  FW_CONFIG value is 0x804c02

  379 12:17:59.619064  PCI: 00:07.0 disabled by fw_config

  380 12:17:59.622612  PCI: 00:07.1 disabled by fw_config

  381 12:17:59.625792  PCI: 00:0d.2 disabled by fw_config

  382 12:17:59.632459  PCI: 00:1c.7 disabled by fw_config

  383 12:17:59.636094  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  384 12:17:59.642792  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  385 12:17:59.646161  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  386 12:17:59.652477  GENERIC: 0.0 disabled by fw_config

  387 12:17:59.655701  GENERIC: 1.0 disabled by fw_config

  388 12:17:59.659144  fw_config match found: DB_USB=USB3_ACTIVE

  389 12:17:59.662325  fw_config match found: DB_USB=USB3_ACTIVE

  390 12:17:59.665550  fw_config match found: DB_USB=USB3_ACTIVE

  391 12:17:59.672288  fw_config match found: DB_USB=USB3_ACTIVE

  392 12:17:59.675595  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  393 12:17:59.685604  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  394 12:17:59.691899  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  395 12:17:59.698955  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  396 12:17:59.702042  microcode: sig=0x806c1 pf=0x80 revision=0x86

  397 12:17:59.708555  microcode: Update skipped, already up-to-date

  398 12:17:59.715355  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  399 12:17:59.743065  Detected 4 core, 8 thread CPU.

  400 12:17:59.746510  Setting up SMI for CPU

  401 12:17:59.749499  IED base = 0x7b400000

  402 12:17:59.749579  IED size = 0x00400000

  403 12:17:59.752918  Will perform SMM setup.

  404 12:17:59.759532  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.

  405 12:17:59.766213  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  406 12:17:59.772860  Processing 16 relocs. Offset value of 0x00030000

  407 12:17:59.776405  Attempting to start 7 APs

  408 12:17:59.779390  Waiting for 10ms after sending INIT.

  409 12:17:59.795136  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  410 12:17:59.795216  done.

  411 12:17:59.798273  AP: slot 2 apic_id 3.

  412 12:17:59.801534  AP: slot 6 apic_id 2.

  413 12:17:59.804775  Waiting for 2nd SIPI to complete...done.

  414 12:17:59.808027  AP: slot 5 apic_id 6.

  415 12:17:59.808100  AP: slot 4 apic_id 7.

  416 12:17:59.811536  AP: slot 3 apic_id 4.

  417 12:17:59.814497  AP: slot 7 apic_id 5.

  418 12:17:59.821053  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  419 12:17:59.827650  Processing 13 relocs. Offset value of 0x00038000

  420 12:17:59.830894  Unable to locate Global NVS

  421 12:17:59.837702  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  422 12:17:59.841205  Installing permanent SMM handler to 0x7b000000

  423 12:17:59.851225  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  424 12:17:59.854196  Processing 794 relocs. Offset value of 0x7b010000

  425 12:17:59.864008  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  426 12:17:59.867501  Processing 13 relocs. Offset value of 0x7b008000

  427 12:17:59.873914  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  428 12:17:59.880722  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  429 12:17:59.887021  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  430 12:17:59.890683  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  431 12:17:59.897157  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  432 12:17:59.903622  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  433 12:17:59.910204  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  434 12:17:59.913764  Unable to locate Global NVS

  435 12:17:59.920076  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  436 12:17:59.923499  Clearing SMI status registers

  437 12:17:59.926777  SMI_STS: PM1 

  438 12:17:59.926855  PM1_STS: PWRBTN 

  439 12:17:59.933446  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  440 12:17:59.936585  In relocation handler: CPU 0

  441 12:17:59.943019  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  442 12:17:59.946258  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  443 12:17:59.949743  Relocation complete.

  444 12:17:59.956303  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  445 12:17:59.959611  In relocation handler: CPU 1

  446 12:17:59.963005  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  447 12:17:59.966247  Relocation complete.

  448 12:17:59.972722  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  449 12:17:59.976091  In relocation handler: CPU 7

  450 12:17:59.979232  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  451 12:17:59.982837  Relocation complete.

  452 12:17:59.989168  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  453 12:17:59.992433  In relocation handler: CPU 3

  454 12:17:59.996024  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  455 12:18:00.002413  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  456 12:18:00.002490  Relocation complete.

  457 12:18:00.009036  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  458 12:18:00.012502  In relocation handler: CPU 2

  459 12:18:00.019015  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  460 12:18:00.019096  Relocation complete.

  461 12:18:00.025570  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  462 12:18:00.029025  In relocation handler: CPU 6

  463 12:18:00.035497  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  464 12:18:00.038905  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  465 12:18:00.041856  Relocation complete.

  466 12:18:00.048551  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  467 12:18:00.051687  In relocation handler: CPU 4

  468 12:18:00.055333  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  469 12:18:00.058428  Relocation complete.

  470 12:18:00.065101  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  471 12:18:00.068304  In relocation handler: CPU 5

  472 12:18:00.071731  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  473 12:18:00.078060  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  474 12:18:00.078153  Relocation complete.

  475 12:18:00.081318  Initializing CPU #0

  476 12:18:00.084856  CPU: vendor Intel device 806c1

  477 12:18:00.088099  CPU: family 06, model 8c, stepping 01

  478 12:18:00.091299  Clearing out pending MCEs

  479 12:18:00.094423  Setting up local APIC...

  480 12:18:00.094500   apic_id: 0x00 done.

  481 12:18:00.097875  Turbo is available but hidden

  482 12:18:00.100961  Turbo is available and visible

  483 12:18:00.107585  microcode: Update skipped, already up-to-date

  484 12:18:00.107679  CPU #0 initialized

  485 12:18:00.110853  Initializing CPU #1

  486 12:18:00.110918  Initializing CPU #7

  487 12:18:00.114129  Initializing CPU #3

  488 12:18:00.117815  CPU: vendor Intel device 806c1

  489 12:18:00.120696  CPU: family 06, model 8c, stepping 01

  490 12:18:00.124326  CPU: vendor Intel device 806c1

  491 12:18:00.127345  CPU: family 06, model 8c, stepping 01

  492 12:18:00.130782  CPU: vendor Intel device 806c1

  493 12:18:00.133834  CPU: family 06, model 8c, stepping 01

  494 12:18:00.137305  Clearing out pending MCEs

  495 12:18:00.140554  Clearing out pending MCEs

  496 12:18:00.143824  Setting up local APIC...

  497 12:18:00.143897  Initializing CPU #2

  498 12:18:00.147753  Initializing CPU #6

  499 12:18:00.151061  CPU: vendor Intel device 806c1

  500 12:18:00.154413  CPU: family 06, model 8c, stepping 01

  501 12:18:00.157947   apic_id: 0x04 done.

  502 12:18:00.158013  Setting up local APIC...

  503 12:18:00.161355  Initializing CPU #4

  504 12:18:00.164328  Initializing CPU #5

  505 12:18:00.164387  CPU: vendor Intel device 806c1

  506 12:18:00.171498  CPU: family 06, model 8c, stepping 01

  507 12:18:00.174743  microcode: Update skipped, already up-to-date

  508 12:18:00.177692   apic_id: 0x05 done.

  509 12:18:00.177749  CPU #3 initialized

  510 12:18:00.184410  microcode: Update skipped, already up-to-date

  511 12:18:00.187656  CPU: vendor Intel device 806c1

  512 12:18:00.191190  CPU: family 06, model 8c, stepping 01

  513 12:18:00.194153  Clearing out pending MCEs

  514 12:18:00.194234  Clearing out pending MCEs

  515 12:18:00.197756  Setting up local APIC...

  516 12:18:00.201268  CPU #7 initialized

  517 12:18:00.201354   apic_id: 0x07 done.

  518 12:18:00.204210  Setting up local APIC...

  519 12:18:00.207417  CPU: vendor Intel device 806c1

  520 12:18:00.210960  CPU: family 06, model 8c, stepping 01

  521 12:18:00.214414  Clearing out pending MCEs

  522 12:18:00.217152  Clearing out pending MCEs

  523 12:18:00.220726  Setting up local APIC...

  524 12:18:00.223788  microcode: Update skipped, already up-to-date

  525 12:18:00.227103   apic_id: 0x06 done.

  526 12:18:00.227200  CPU #4 initialized

  527 12:18:00.233601  microcode: Update skipped, already up-to-date

  528 12:18:00.233681  Clearing out pending MCEs

  529 12:18:00.236884  Setting up local APIC...

  530 12:18:00.240413  Setting up local APIC...

  531 12:18:00.243668   apic_id: 0x02 done.

  532 12:18:00.243746   apic_id: 0x03 done.

  533 12:18:00.250359  microcode: Update skipped, already up-to-date

  534 12:18:00.253492  microcode: Update skipped, already up-to-date

  535 12:18:00.256689  CPU #6 initialized

  536 12:18:00.256769  CPU #2 initialized

  537 12:18:00.260036  CPU #5 initialized

  538 12:18:00.260116   apic_id: 0x01 done.

  539 12:18:00.266810  microcode: Update skipped, already up-to-date

  540 12:18:00.269998  CPU #1 initialized

  541 12:18:00.273417  bsp_do_flight_plan done after 463 msecs.

  542 12:18:00.276819  CPU: frequency set to 4400 MHz

  543 12:18:00.276899  Enabling SMIs.

  544 12:18:00.283045  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  545 12:18:00.299776  SATAXPCIE1 indicates PCIe NVMe is present

  546 12:18:00.303226  Probing TPM:  done!

  547 12:18:00.306610  Connected to device vid:did:rid of 1ae0:0028:00

  548 12:18:00.317095  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e

  549 12:18:00.320526  Initialized TPM device CR50 revision 0

  550 12:18:00.324059  Enabling S0i3.4

  551 12:18:00.330249  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  552 12:18:00.333408  Found a VBT of 8704 bytes after decompression

  553 12:18:00.340338  cse_lite: CSE RO boot. HybridStorageMode disabled

  554 12:18:00.346693  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  555 12:18:00.421204  FSPS returned 0

  556 12:18:00.424738  Executing Phase 1 of FspMultiPhaseSiInit

  557 12:18:00.434664  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  558 12:18:00.437906  port C0 DISC req: usage 1 usb3 1 usb2 5

  559 12:18:00.441070  Raw Buffer output 0 00000511

  560 12:18:00.444646  Raw Buffer output 1 00000000

  561 12:18:00.448590  pmc_send_ipc_cmd succeeded

  562 12:18:00.455036  port C1 DISC req: usage 1 usb3 2 usb2 3

  563 12:18:00.455117  Raw Buffer output 0 00000321

  564 12:18:00.458268  Raw Buffer output 1 00000000

  565 12:18:00.462909  pmc_send_ipc_cmd succeeded

  566 12:18:00.467672  Detected 4 core, 8 thread CPU.

  567 12:18:00.471060  Detected 4 core, 8 thread CPU.

  568 12:18:00.670936  Display FSP Version Info HOB

  569 12:18:00.674118  Reference Code - CPU = a.0.4c.31

  570 12:18:00.677313  uCode Version = 0.0.0.86

  571 12:18:00.680741  TXT ACM version = ff.ff.ff.ffff

  572 12:18:00.683973  Reference Code - ME = a.0.4c.31

  573 12:18:00.687156  MEBx version = 0.0.0.0

  574 12:18:00.690452  ME Firmware Version = Consumer SKU

  575 12:18:00.693792  Reference Code - PCH = a.0.4c.31

  576 12:18:00.697111  PCH-CRID Status = Disabled

  577 12:18:00.700556  PCH-CRID Original Value = ff.ff.ff.ffff

  578 12:18:00.703790  PCH-CRID New Value = ff.ff.ff.ffff

  579 12:18:00.706980  OPROM - RST - RAID = ff.ff.ff.ffff

  580 12:18:00.710414  PCH Hsio Version = 4.0.0.0

  581 12:18:00.713700  Reference Code - SA - System Agent = a.0.4c.31

  582 12:18:00.716770  Reference Code - MRC = 2.0.0.1

  583 12:18:00.720068  SA - PCIe Version = a.0.4c.31

  584 12:18:00.723936  SA-CRID Status = Disabled

  585 12:18:00.726934  SA-CRID Original Value = 0.0.0.1

  586 12:18:00.730312  SA-CRID New Value = 0.0.0.1

  587 12:18:00.734193  OPROM - VBIOS = ff.ff.ff.ffff

  588 12:18:00.737871  IO Manageability Engine FW Version = 11.1.4.0

  589 12:18:00.741421  PHY Build Version = 0.0.0.e0

  590 12:18:00.744861  Thunderbolt(TM) FW Version = 0.0.0.0

  591 12:18:00.751348  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  592 12:18:00.751428  ITSS IRQ Polarities Before:

  593 12:18:00.754728  IPC0: 0xffffffff

  594 12:18:00.758122  IPC1: 0xffffffff

  595 12:18:00.758201  IPC2: 0xffffffff

  596 12:18:00.761127  IPC3: 0xffffffff

  597 12:18:00.761204  ITSS IRQ Polarities After:

  598 12:18:00.764659  IPC0: 0xffffffff

  599 12:18:00.764737  IPC1: 0xffffffff

  600 12:18:00.767846  IPC2: 0xffffffff

  601 12:18:00.770980  IPC3: 0xffffffff

  602 12:18:00.774533  Found PCIe Root Port #9 at PCI: 00:1d.0.

  603 12:18:00.784352  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  604 12:18:00.797580  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  605 12:18:00.810920  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  606 12:18:00.817664  BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms

  607 12:18:00.817743  Enumerating buses...

  608 12:18:00.824218  Show all devs... Before device enumeration.

  609 12:18:00.824297  Root Device: enabled 1

  610 12:18:00.827839  DOMAIN: 0000: enabled 1

  611 12:18:00.830983  CPU_CLUSTER: 0: enabled 1

  612 12:18:00.834190  PCI: 00:00.0: enabled 1

  613 12:18:00.834269  PCI: 00:02.0: enabled 1

  614 12:18:00.837339  PCI: 00:04.0: enabled 1

  615 12:18:00.840675  PCI: 00:05.0: enabled 1

  616 12:18:00.840752  PCI: 00:06.0: enabled 0

  617 12:18:00.844113  PCI: 00:07.0: enabled 0

  618 12:18:00.847600  PCI: 00:07.1: enabled 0

  619 12:18:00.850953  PCI: 00:07.2: enabled 0

  620 12:18:00.851034  PCI: 00:07.3: enabled 0

  621 12:18:00.854100  PCI: 00:08.0: enabled 1

  622 12:18:00.857633  PCI: 00:09.0: enabled 0

  623 12:18:00.860924  PCI: 00:0a.0: enabled 0

  624 12:18:00.861010  PCI: 00:0d.0: enabled 1

  625 12:18:00.864553  PCI: 00:0d.1: enabled 0

  626 12:18:00.867337  PCI: 00:0d.2: enabled 0

  627 12:18:00.870740  PCI: 00:0d.3: enabled 0

  628 12:18:00.870818  PCI: 00:0e.0: enabled 0

  629 12:18:00.874396  PCI: 00:10.2: enabled 1

  630 12:18:00.877558  PCI: 00:10.6: enabled 0

  631 12:18:00.880717  PCI: 00:10.7: enabled 0

  632 12:18:00.880794  PCI: 00:12.0: enabled 0

  633 12:18:00.884284  PCI: 00:12.6: enabled 0

  634 12:18:00.887382  PCI: 00:13.0: enabled 0

  635 12:18:00.887461  PCI: 00:14.0: enabled 1

  636 12:18:00.890515  PCI: 00:14.1: enabled 0

  637 12:18:00.893976  PCI: 00:14.2: enabled 1

  638 12:18:00.897677  PCI: 00:14.3: enabled 1

  639 12:18:00.897754  PCI: 00:15.0: enabled 1

  640 12:18:00.900767  PCI: 00:15.1: enabled 1

  641 12:18:00.903939  PCI: 00:15.2: enabled 1

  642 12:18:00.907527  PCI: 00:15.3: enabled 1

  643 12:18:00.907605  PCI: 00:16.0: enabled 1

  644 12:18:00.910504  PCI: 00:16.1: enabled 0

  645 12:18:00.913812  PCI: 00:16.2: enabled 0

  646 12:18:00.917286  PCI: 00:16.3: enabled 0

  647 12:18:00.917364  PCI: 00:16.4: enabled 0

  648 12:18:00.920313  PCI: 00:16.5: enabled 0

  649 12:18:00.923979  PCI: 00:17.0: enabled 1

  650 12:18:00.927417  PCI: 00:19.0: enabled 0

  651 12:18:00.927497  PCI: 00:19.1: enabled 1

  652 12:18:00.930419  PCI: 00:19.2: enabled 0

  653 12:18:00.933747  PCI: 00:1c.0: enabled 1

  654 12:18:00.933825  PCI: 00:1c.1: enabled 0

  655 12:18:00.937014  PCI: 00:1c.2: enabled 0

  656 12:18:00.940370  PCI: 00:1c.3: enabled 0

  657 12:18:00.943395  PCI: 00:1c.4: enabled 0

  658 12:18:00.943472  PCI: 00:1c.5: enabled 0

  659 12:18:00.947267  PCI: 00:1c.6: enabled 1

  660 12:18:00.950168  PCI: 00:1c.7: enabled 0

  661 12:18:00.953705  PCI: 00:1d.0: enabled 1

  662 12:18:00.953782  PCI: 00:1d.1: enabled 0

  663 12:18:00.956984  PCI: 00:1d.2: enabled 1

  664 12:18:00.960322  PCI: 00:1d.3: enabled 0

  665 12:18:00.963595  PCI: 00:1e.0: enabled 1

  666 12:18:00.963673  PCI: 00:1e.1: enabled 0

  667 12:18:00.966876  PCI: 00:1e.2: enabled 1

  668 12:18:00.970271  PCI: 00:1e.3: enabled 1

  669 12:18:00.973540  PCI: 00:1f.0: enabled 1

  670 12:18:00.973618  PCI: 00:1f.1: enabled 0

  671 12:18:00.976762  PCI: 00:1f.2: enabled 1

  672 12:18:00.980090  PCI: 00:1f.3: enabled 1

  673 12:18:00.980167  PCI: 00:1f.4: enabled 0

  674 12:18:00.983517  PCI: 00:1f.5: enabled 1

  675 12:18:00.986910  PCI: 00:1f.6: enabled 0

  676 12:18:00.990033  PCI: 00:1f.7: enabled 0

  677 12:18:00.990101  APIC: 00: enabled 1

  678 12:18:00.993228  GENERIC: 0.0: enabled 1

  679 12:18:00.996590  GENERIC: 0.0: enabled 1

  680 12:18:00.999805  GENERIC: 1.0: enabled 1

  681 12:18:00.999882  GENERIC: 0.0: enabled 1

  682 12:18:01.003105  GENERIC: 1.0: enabled 1

  683 12:18:01.006559  USB0 port 0: enabled 1

  684 12:18:01.006622  GENERIC: 0.0: enabled 1

  685 12:18:01.009776  USB0 port 0: enabled 1

  686 12:18:01.013406  GENERIC: 0.0: enabled 1

  687 12:18:01.016503  I2C: 00:1a: enabled 1

  688 12:18:01.016562  I2C: 00:31: enabled 1

  689 12:18:01.020045  I2C: 00:32: enabled 1

  690 12:18:01.023049  I2C: 00:10: enabled 1

  691 12:18:01.023107  I2C: 00:15: enabled 1

  692 12:18:01.026368  GENERIC: 0.0: enabled 0

  693 12:18:01.029659  GENERIC: 1.0: enabled 0

  694 12:18:01.032988  GENERIC: 0.0: enabled 1

  695 12:18:01.033045  SPI: 00: enabled 1

  696 12:18:01.036335  SPI: 00: enabled 1

  697 12:18:01.036391  PNP: 0c09.0: enabled 1

  698 12:18:01.039703  GENERIC: 0.0: enabled 1

  699 12:18:01.042724  USB3 port 0: enabled 1

  700 12:18:01.046130  USB3 port 1: enabled 1

  701 12:18:01.046197  USB3 port 2: enabled 0

  702 12:18:01.049312  USB3 port 3: enabled 0

  703 12:18:01.052651  USB2 port 0: enabled 0

  704 12:18:01.052706  USB2 port 1: enabled 1

  705 12:18:01.056231  USB2 port 2: enabled 1

  706 12:18:01.059804  USB2 port 3: enabled 0

  707 12:18:01.062597  USB2 port 4: enabled 1

  708 12:18:01.062664  USB2 port 5: enabled 0

  709 12:18:01.066127  USB2 port 6: enabled 0

  710 12:18:01.069289  USB2 port 7: enabled 0

  711 12:18:01.069343  USB2 port 8: enabled 0

  712 12:18:01.073111  USB2 port 9: enabled 0

  713 12:18:01.075983  USB3 port 0: enabled 0

  714 12:18:01.076038  USB3 port 1: enabled 1

  715 12:18:01.079376  USB3 port 2: enabled 0

  716 12:18:01.082585  USB3 port 3: enabled 0

  717 12:18:01.085844  GENERIC: 0.0: enabled 1

  718 12:18:01.085901  GENERIC: 1.0: enabled 1

  719 12:18:01.089294  APIC: 01: enabled 1

  720 12:18:01.092509  APIC: 03: enabled 1

  721 12:18:01.092577  APIC: 04: enabled 1

  722 12:18:01.095918  APIC: 07: enabled 1

  723 12:18:01.095987  APIC: 06: enabled 1

  724 12:18:01.099487  APIC: 02: enabled 1

  725 12:18:01.102895  APIC: 05: enabled 1

  726 12:18:01.102955  Compare with tree...

  727 12:18:01.105897  Root Device: enabled 1

  728 12:18:01.109095   DOMAIN: 0000: enabled 1

  729 12:18:01.112524    PCI: 00:00.0: enabled 1

  730 12:18:01.112604    PCI: 00:02.0: enabled 1

  731 12:18:01.115774    PCI: 00:04.0: enabled 1

  732 12:18:01.119073     GENERIC: 0.0: enabled 1

  733 12:18:01.122350    PCI: 00:05.0: enabled 1

  734 12:18:01.125618    PCI: 00:06.0: enabled 0

  735 12:18:01.125675    PCI: 00:07.0: enabled 0

  736 12:18:01.129005     GENERIC: 0.0: enabled 1

  737 12:18:01.132475    PCI: 00:07.1: enabled 0

  738 12:18:01.135746     GENERIC: 1.0: enabled 1

  739 12:18:01.138952    PCI: 00:07.2: enabled 0

  740 12:18:01.139030     GENERIC: 0.0: enabled 1

  741 12:18:01.142605    PCI: 00:07.3: enabled 0

  742 12:18:01.145812     GENERIC: 1.0: enabled 1

  743 12:18:01.148773    PCI: 00:08.0: enabled 1

  744 12:18:01.152144    PCI: 00:09.0: enabled 0

  745 12:18:01.152221    PCI: 00:0a.0: enabled 0

  746 12:18:01.155759    PCI: 00:0d.0: enabled 1

  747 12:18:01.158701     USB0 port 0: enabled 1

  748 12:18:01.162079      USB3 port 0: enabled 1

  749 12:18:01.165437      USB3 port 1: enabled 1

  750 12:18:01.168946      USB3 port 2: enabled 0

  751 12:18:01.169023      USB3 port 3: enabled 0

  752 12:18:01.172119    PCI: 00:0d.1: enabled 0

  753 12:18:01.175342    PCI: 00:0d.2: enabled 0

  754 12:18:01.178773     GENERIC: 0.0: enabled 1

  755 12:18:01.181818    PCI: 00:0d.3: enabled 0

  756 12:18:01.181895    PCI: 00:0e.0: enabled 0

  757 12:18:01.185171    PCI: 00:10.2: enabled 1

  758 12:18:01.188536    PCI: 00:10.6: enabled 0

  759 12:18:01.191752    PCI: 00:10.7: enabled 0

  760 12:18:01.195545    PCI: 00:12.0: enabled 0

  761 12:18:01.195622    PCI: 00:12.6: enabled 0

  762 12:18:01.198410    PCI: 00:13.0: enabled 0

  763 12:18:01.201867    PCI: 00:14.0: enabled 1

  764 12:18:01.205327     USB0 port 0: enabled 1

  765 12:18:01.208509      USB2 port 0: enabled 0

  766 12:18:01.208586      USB2 port 1: enabled 1

  767 12:18:01.211555      USB2 port 2: enabled 1

  768 12:18:01.215171      USB2 port 3: enabled 0

  769 12:18:01.218411      USB2 port 4: enabled 1

  770 12:18:01.221580      USB2 port 5: enabled 0

  771 12:18:01.224853      USB2 port 6: enabled 0

  772 12:18:01.224930      USB2 port 7: enabled 0

  773 12:18:01.228447      USB2 port 8: enabled 0

  774 12:18:01.231793      USB2 port 9: enabled 0

  775 12:18:01.235048      USB3 port 0: enabled 0

  776 12:18:01.238365      USB3 port 1: enabled 1

  777 12:18:01.241363      USB3 port 2: enabled 0

  778 12:18:01.241440      USB3 port 3: enabled 0

  779 12:18:01.244685    PCI: 00:14.1: enabled 0

  780 12:18:01.248096    PCI: 00:14.2: enabled 1

  781 12:18:01.251662    PCI: 00:14.3: enabled 1

  782 12:18:01.254810     GENERIC: 0.0: enabled 1

  783 12:18:01.254887    PCI: 00:15.0: enabled 1

  784 12:18:01.258024     I2C: 00:1a: enabled 1

  785 12:18:01.261228     I2C: 00:31: enabled 1

  786 12:18:01.264811     I2C: 00:32: enabled 1

  787 12:18:01.264889    PCI: 00:15.1: enabled 1

  788 12:18:01.268121     I2C: 00:10: enabled 1

  789 12:18:01.271634    PCI: 00:15.2: enabled 1

  790 12:18:01.275054    PCI: 00:15.3: enabled 1

  791 12:18:01.277909    PCI: 00:16.0: enabled 1

  792 12:18:01.277992    PCI: 00:16.1: enabled 0

  793 12:18:01.281152    PCI: 00:16.2: enabled 0

  794 12:18:01.284926    PCI: 00:16.3: enabled 0

  795 12:18:01.287805    PCI: 00:16.4: enabled 0

  796 12:18:01.291231    PCI: 00:16.5: enabled 0

  797 12:18:01.291298    PCI: 00:17.0: enabled 1

  798 12:18:01.294324    PCI: 00:19.0: enabled 0

  799 12:18:01.297816    PCI: 00:19.1: enabled 1

  800 12:18:01.300947     I2C: 00:15: enabled 1

  801 12:18:01.304589    PCI: 00:19.2: enabled 0

  802 12:18:01.304642    PCI: 00:1d.0: enabled 1

  803 12:18:01.307723     GENERIC: 0.0: enabled 1

  804 12:18:01.310942    PCI: 00:1e.0: enabled 1

  805 12:18:01.314103    PCI: 00:1e.1: enabled 0

  806 12:18:01.317438    PCI: 00:1e.2: enabled 1

  807 12:18:01.317495     SPI: 00: enabled 1

  808 12:18:01.320952    PCI: 00:1e.3: enabled 1

  809 12:18:01.324181     SPI: 00: enabled 1

  810 12:18:01.327383    PCI: 00:1f.0: enabled 1

  811 12:18:01.327436     PNP: 0c09.0: enabled 1

  812 12:18:01.379078    PCI: 00:1f.1: enabled 0

  813 12:18:01.379153    PCI: 00:1f.2: enabled 1

  814 12:18:01.379383     GENERIC: 0.0: enabled 1

  815 12:18:01.379439      GENERIC: 0.0: enabled 1

  816 12:18:01.379487      GENERIC: 1.0: enabled 1

  817 12:18:01.379539    PCI: 00:1f.3: enabled 1

  818 12:18:01.379585    PCI: 00:1f.4: enabled 0

  819 12:18:01.379630    PCI: 00:1f.5: enabled 1

  820 12:18:01.379675    PCI: 00:1f.6: enabled 0

  821 12:18:01.379895    PCI: 00:1f.7: enabled 0

  822 12:18:01.379947   CPU_CLUSTER: 0: enabled 1

  823 12:18:01.380171    APIC: 00: enabled 1

  824 12:18:01.380226    APIC: 01: enabled 1

  825 12:18:01.380272    APIC: 03: enabled 1

  826 12:18:01.380491    APIC: 04: enabled 1

  827 12:18:01.380542    APIC: 07: enabled 1

  828 12:18:01.380587    APIC: 06: enabled 1

  829 12:18:01.380897    APIC: 02: enabled 1

  830 12:18:01.380952    APIC: 05: enabled 1

  831 12:18:01.380998  Root Device scanning...

  832 12:18:01.429212  scan_static_bus for Root Device

  833 12:18:01.429284  DOMAIN: 0000 enabled

  834 12:18:01.429588  CPU_CLUSTER: 0 enabled

  835 12:18:01.429645  DOMAIN: 0000 scanning...

  836 12:18:01.430008  PCI: pci_scan_bus for bus 00

  837 12:18:01.430070  PCI: 00:00.0 [8086/0000] ops

  838 12:18:01.430416  PCI: 00:00.0 [8086/9a12] enabled

  839 12:18:01.430474  PCI: 00:02.0 [8086/0000] bus ops

  840 12:18:01.430728  PCI: 00:02.0 [8086/9a40] enabled

  841 12:18:01.430780  PCI: 00:04.0 [8086/0000] bus ops

  842 12:18:01.431081  PCI: 00:04.0 [8086/9a03] enabled

  843 12:18:01.431135  PCI: 00:05.0 [8086/9a19] enabled

  844 12:18:01.431461  PCI: 00:07.0 [0000/0000] hidden

  845 12:18:01.431513  PCI: 00:08.0 [8086/9a11] enabled

  846 12:18:01.431731  PCI: 00:0a.0 [8086/9a0d] disabled

  847 12:18:01.431783  PCI: 00:0d.0 [8086/0000] bus ops

  848 12:18:01.457283  PCI: 00:0d.0 [8086/9a13] enabled

  849 12:18:01.457344  PCI: 00:14.0 [8086/0000] bus ops

  850 12:18:01.457571  PCI: 00:14.0 [8086/a0ed] enabled

  851 12:18:01.457627  PCI: 00:14.2 [8086/a0ef] enabled

  852 12:18:01.457674  PCI: 00:14.3 [8086/0000] bus ops

  853 12:18:01.457721  PCI: 00:14.3 [8086/a0f0] enabled

  854 12:18:01.457774  PCI: 00:15.0 [8086/0000] bus ops

  855 12:18:01.461179  PCI: 00:15.0 [8086/a0e8] enabled

  856 12:18:01.461235  PCI: 00:15.1 [8086/0000] bus ops

  857 12:18:01.464296  PCI: 00:15.1 [8086/a0e9] enabled

  858 12:18:01.467448  PCI: 00:15.2 [8086/0000] bus ops

  859 12:18:01.470808  PCI: 00:15.2 [8086/a0ea] enabled

  860 12:18:01.474134  PCI: 00:15.3 [8086/0000] bus ops

  861 12:18:01.477322  PCI: 00:15.3 [8086/a0eb] enabled

  862 12:18:01.480619  PCI: 00:16.0 [8086/0000] ops

  863 12:18:01.484065  PCI: 00:16.0 [8086/a0e0] enabled

  864 12:18:01.487275  PCI: Static device PCI: 00:17.0 not found, disabling it.

  865 12:18:01.490453  PCI: 00:19.0 [8086/0000] bus ops

  866 12:18:01.494001  PCI: 00:19.0 [8086/a0c5] disabled

  867 12:18:01.497434  PCI: 00:19.1 [8086/0000] bus ops

  868 12:18:01.501001  PCI: 00:19.1 [8086/a0c6] enabled

  869 12:18:01.504118  PCI: 00:1d.0 [8086/0000] bus ops

  870 12:18:01.507298  PCI: 00:1d.0 [8086/a0b0] enabled

  871 12:18:01.510709  PCI: 00:1e.0 [8086/0000] ops

  872 12:18:01.513618  PCI: 00:1e.0 [8086/a0a8] enabled

  873 12:18:01.517202  PCI: 00:1e.2 [8086/0000] bus ops

  874 12:18:01.520130  PCI: 00:1e.2 [8086/a0aa] enabled

  875 12:18:01.523652  PCI: 00:1e.3 [8086/0000] bus ops

  876 12:18:01.527129  PCI: 00:1e.3 [8086/a0ab] enabled

  877 12:18:01.530465  PCI: 00:1f.0 [8086/0000] bus ops

  878 12:18:01.533881  PCI: 00:1f.0 [8086/a087] enabled

  879 12:18:01.536713  RTC Init

  880 12:18:01.539910  Set power on after power failure.

  881 12:18:01.539990  Disabling Deep S3

  882 12:18:01.543374  Disabling Deep S3

  883 12:18:01.546666  Disabling Deep S4

  884 12:18:01.546744  Disabling Deep S4

  885 12:18:01.550010  Disabling Deep S5

  886 12:18:01.550087  Disabling Deep S5

  887 12:18:01.553294  PCI: 00:1f.2 [0000/0000] hidden

  888 12:18:01.556856  PCI: 00:1f.3 [8086/0000] bus ops

  889 12:18:01.559840  PCI: 00:1f.3 [8086/a0c8] enabled

  890 12:18:01.563078  PCI: 00:1f.5 [8086/0000] bus ops

  891 12:18:01.566494  PCI: 00:1f.5 [8086/a0a4] enabled

  892 12:18:01.569666  PCI: Leftover static devices:

  893 12:18:01.573133  PCI: 00:10.2

  894 12:18:01.573210  PCI: 00:10.6

  895 12:18:01.573265  PCI: 00:10.7

  896 12:18:01.576404  PCI: 00:06.0

  897 12:18:01.576490  PCI: 00:07.1

  898 12:18:01.579746  PCI: 00:07.2

  899 12:18:01.579823  PCI: 00:07.3

  900 12:18:01.579877  PCI: 00:09.0

  901 12:18:01.582956  PCI: 00:0d.1

  902 12:18:01.583034  PCI: 00:0d.2

  903 12:18:01.586404  PCI: 00:0d.3

  904 12:18:01.586491  PCI: 00:0e.0

  905 12:18:01.589598  PCI: 00:12.0

  906 12:18:01.589678  PCI: 00:12.6

  907 12:18:01.589732  PCI: 00:13.0

  908 12:18:01.592875  PCI: 00:14.1

  909 12:18:01.592956  PCI: 00:16.1

  910 12:18:01.596083  PCI: 00:16.2

  911 12:18:01.596159  PCI: 00:16.3

  912 12:18:01.596213  PCI: 00:16.4

  913 12:18:01.599579  PCI: 00:16.5

  914 12:18:01.599656  PCI: 00:17.0

  915 12:18:01.602775  PCI: 00:19.2

  916 12:18:01.602851  PCI: 00:1e.1

  917 12:18:01.606297  PCI: 00:1f.1

  918 12:18:01.606383  PCI: 00:1f.4

  919 12:18:01.606448  PCI: 00:1f.6

  920 12:18:01.609485  PCI: 00:1f.7

  921 12:18:01.612728  PCI: Check your devicetree.cb.

  922 12:18:01.612805  PCI: 00:02.0 scanning...

  923 12:18:01.619540  scan_generic_bus for PCI: 00:02.0

  924 12:18:01.622806  scan_generic_bus for PCI: 00:02.0 done

  925 12:18:01.626302  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  926 12:18:01.629378  PCI: 00:04.0 scanning...

  927 12:18:01.632979  scan_generic_bus for PCI: 00:04.0

  928 12:18:01.636340  GENERIC: 0.0 enabled

  929 12:18:01.639526  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  930 12:18:01.646267  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  931 12:18:01.649358  PCI: 00:0d.0 scanning...

  932 12:18:01.652869  scan_static_bus for PCI: 00:0d.0

  933 12:18:01.652945  USB0 port 0 enabled

  934 12:18:01.655952  USB0 port 0 scanning...

  935 12:18:01.659630  scan_static_bus for USB0 port 0

  936 12:18:01.662506  USB3 port 0 enabled

  937 12:18:01.662583  USB3 port 1 enabled

  938 12:18:01.666524  USB3 port 2 disabled

  939 12:18:01.669199  USB3 port 3 disabled

  940 12:18:01.669276  USB3 port 0 scanning...

  941 12:18:01.672591  scan_static_bus for USB3 port 0

  942 12:18:01.679033  scan_static_bus for USB3 port 0 done

  943 12:18:01.682438  scan_bus: bus USB3 port 0 finished in 6 msecs

  944 12:18:01.685742  USB3 port 1 scanning...

  945 12:18:01.689061  scan_static_bus for USB3 port 1

  946 12:18:01.692603  scan_static_bus for USB3 port 1 done

  947 12:18:01.695893  scan_bus: bus USB3 port 1 finished in 6 msecs

  948 12:18:01.698914  scan_static_bus for USB0 port 0 done

  949 12:18:01.705506  scan_bus: bus USB0 port 0 finished in 43 msecs

  950 12:18:01.708795  scan_static_bus for PCI: 00:0d.0 done

  951 12:18:01.712303  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  952 12:18:01.715359  PCI: 00:14.0 scanning...

  953 12:18:01.718557  scan_static_bus for PCI: 00:14.0

  954 12:18:01.721901  USB0 port 0 enabled

  955 12:18:01.725354  USB0 port 0 scanning...

  956 12:18:01.728720  scan_static_bus for USB0 port 0

  957 12:18:01.728803  USB2 port 0 disabled

  958 12:18:01.731862  USB2 port 1 enabled

  959 12:18:01.735642  USB2 port 2 enabled

  960 12:18:01.735719  USB2 port 3 disabled

  961 12:18:01.738763  USB2 port 4 enabled

  962 12:18:01.741645  USB2 port 5 disabled

  963 12:18:01.741721  USB2 port 6 disabled

  964 12:18:01.745600  USB2 port 7 disabled

  965 12:18:01.745676  USB2 port 8 disabled

  966 12:18:01.748594  USB2 port 9 disabled

  967 12:18:01.751669  USB3 port 0 disabled

  968 12:18:01.751746  USB3 port 1 enabled

  969 12:18:01.755064  USB3 port 2 disabled

  970 12:18:01.758443  USB3 port 3 disabled

  971 12:18:01.758519  USB2 port 1 scanning...

  972 12:18:01.761499  scan_static_bus for USB2 port 1

  973 12:18:01.768342  scan_static_bus for USB2 port 1 done

  974 12:18:01.771618  scan_bus: bus USB2 port 1 finished in 6 msecs

  975 12:18:01.774826  USB2 port 2 scanning...

  976 12:18:01.778105  scan_static_bus for USB2 port 2

  977 12:18:01.781270  scan_static_bus for USB2 port 2 done

  978 12:18:01.784697  scan_bus: bus USB2 port 2 finished in 6 msecs

  979 12:18:01.788200  USB2 port 4 scanning...

  980 12:18:01.791141  scan_static_bus for USB2 port 4

  981 12:18:01.794616  scan_static_bus for USB2 port 4 done

  982 12:18:01.801665  scan_bus: bus USB2 port 4 finished in 6 msecs

  983 12:18:01.801743  USB3 port 1 scanning...

  984 12:18:01.804510  scan_static_bus for USB3 port 1

  985 12:18:01.807939  scan_static_bus for USB3 port 1 done

  986 12:18:01.814717  scan_bus: bus USB3 port 1 finished in 6 msecs

  987 12:18:01.817855  scan_static_bus for USB0 port 0 done

  988 12:18:01.820950  scan_bus: bus USB0 port 0 finished in 93 msecs

  989 12:18:01.827565  scan_static_bus for PCI: 00:14.0 done

  990 12:18:01.831017  scan_bus: bus PCI: 00:14.0 finished in 109 msecs

  991 12:18:01.834354  PCI: 00:14.3 scanning...

  992 12:18:01.837853  scan_static_bus for PCI: 00:14.3

  993 12:18:01.841075  GENERIC: 0.0 enabled

  994 12:18:01.844148  scan_static_bus for PCI: 00:14.3 done

  995 12:18:01.847486  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  996 12:18:01.850746  PCI: 00:15.0 scanning...

  997 12:18:01.853981  scan_static_bus for PCI: 00:15.0

  998 12:18:01.857337  I2C: 00:1a enabled

  999 12:18:01.857404  I2C: 00:31 enabled

 1000 12:18:01.860727  I2C: 00:32 enabled

 1001 12:18:01.863998  scan_static_bus for PCI: 00:15.0 done

 1002 12:18:01.867438  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1003 12:18:01.870537  PCI: 00:15.1 scanning...

 1004 12:18:01.873873  scan_static_bus for PCI: 00:15.1

 1005 12:18:01.877348  I2C: 00:10 enabled

 1006 12:18:01.880510  scan_static_bus for PCI: 00:15.1 done

 1007 12:18:01.883851  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1008 12:18:01.887373  PCI: 00:15.2 scanning...

 1009 12:18:01.890758  scan_static_bus for PCI: 00:15.2

 1010 12:18:01.893865  scan_static_bus for PCI: 00:15.2 done

 1011 12:18:01.900399  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1012 12:18:01.900467  PCI: 00:15.3 scanning...

 1013 12:18:01.903921  scan_static_bus for PCI: 00:15.3

 1014 12:18:01.910780  scan_static_bus for PCI: 00:15.3 done

 1015 12:18:01.913892  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1016 12:18:01.917118  PCI: 00:19.1 scanning...

 1017 12:18:01.920335  scan_static_bus for PCI: 00:19.1

 1018 12:18:01.923581  I2C: 00:15 enabled

 1019 12:18:01.926991  scan_static_bus for PCI: 00:19.1 done

 1020 12:18:01.930217  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1021 12:18:01.933428  PCI: 00:1d.0 scanning...

 1022 12:18:01.937089  do_pci_scan_bridge for PCI: 00:1d.0

 1023 12:18:01.940152  PCI: pci_scan_bus for bus 01

 1024 12:18:01.943561  PCI: 01:00.0 [15b7/5009] enabled

 1025 12:18:01.946761  GENERIC: 0.0 enabled

 1026 12:18:01.949863  Enabling Common Clock Configuration

 1027 12:18:01.953495  L1 Sub-State supported from root port 29

 1028 12:18:01.956420  L1 Sub-State Support = 0x5

 1029 12:18:01.959732  CommonModeRestoreTime = 0x28

 1030 12:18:01.963234  Power On Value = 0x16, Power On Scale = 0x0

 1031 12:18:01.966430  ASPM: Enabled L1

 1032 12:18:01.969592  PCIe: Max_Payload_Size adjusted to 128

 1033 12:18:01.973106  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1034 12:18:01.976384  PCI: 00:1e.2 scanning...

 1035 12:18:01.979663  scan_generic_bus for PCI: 00:1e.2

 1036 12:18:01.983090  SPI: 00 enabled

 1037 12:18:01.986778  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1038 12:18:01.993289  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1039 12:18:01.996421  PCI: 00:1e.3 scanning...

 1040 12:18:01.999746  scan_generic_bus for PCI: 00:1e.3

 1041 12:18:01.999806  SPI: 00 enabled

 1042 12:18:02.006685  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1043 12:18:02.010062  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1044 12:18:02.013170  PCI: 00:1f.0 scanning...

 1045 12:18:02.016452  scan_static_bus for PCI: 00:1f.0

 1046 12:18:02.019708  PNP: 0c09.0 enabled

 1047 12:18:02.022977  PNP: 0c09.0 scanning...

 1048 12:18:02.026431  scan_static_bus for PNP: 0c09.0

 1049 12:18:02.029756  scan_static_bus for PNP: 0c09.0 done

 1050 12:18:02.032785  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1051 12:18:02.036364  scan_static_bus for PCI: 00:1f.0 done

 1052 12:18:02.043036  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1053 12:18:02.046200  PCI: 00:1f.2 scanning...

 1054 12:18:02.049504  scan_static_bus for PCI: 00:1f.2

 1055 12:18:02.049579  GENERIC: 0.0 enabled

 1056 12:18:02.052662  GENERIC: 0.0 scanning...

 1057 12:18:02.056137  scan_static_bus for GENERIC: 0.0

 1058 12:18:02.059575  GENERIC: 0.0 enabled

 1059 12:18:02.059652  GENERIC: 1.0 enabled

 1060 12:18:02.065986  scan_static_bus for GENERIC: 0.0 done

 1061 12:18:02.069375  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1062 12:18:02.072546  scan_static_bus for PCI: 00:1f.2 done

 1063 12:18:02.079068  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1064 12:18:02.079144  PCI: 00:1f.3 scanning...

 1065 12:18:02.082644  scan_static_bus for PCI: 00:1f.3

 1066 12:18:02.088971  scan_static_bus for PCI: 00:1f.3 done

 1067 12:18:02.092284  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1068 12:18:02.095590  PCI: 00:1f.5 scanning...

 1069 12:18:02.099204  scan_generic_bus for PCI: 00:1f.5

 1070 12:18:02.102094  scan_generic_bus for PCI: 00:1f.5 done

 1071 12:18:02.108976  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1072 12:18:02.112094  scan_bus: bus DOMAIN: 0000 finished in 716 msecs

 1073 12:18:02.115684  scan_static_bus for Root Device done

 1074 12:18:02.122284  scan_bus: bus Root Device finished in 735 msecs

 1075 12:18:02.122346  done

 1076 12:18:02.128581  BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms

 1077 12:18:02.132048  Chrome EC: UHEPI supported

 1078 12:18:02.138505  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1079 12:18:02.145199  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1080 12:18:02.148665  SPI flash protection: WPSW=0 SRP0=0

 1081 12:18:02.151863  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1082 12:18:02.158528  BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms

 1083 12:18:02.161546  found VGA at PCI: 00:02.0

 1084 12:18:02.165120  Setting up VGA for PCI: 00:02.0

 1085 12:18:02.168452  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1086 12:18:02.174871  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1087 12:18:02.178618  Allocating resources...

 1088 12:18:02.178685  Reading resources...

 1089 12:18:02.181550  Root Device read_resources bus 0 link: 0

 1090 12:18:02.188411  DOMAIN: 0000 read_resources bus 0 link: 0

 1091 12:18:02.191766  PCI: 00:04.0 read_resources bus 1 link: 0

 1092 12:18:02.197868  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1093 12:18:02.201779  PCI: 00:0d.0 read_resources bus 0 link: 0

 1094 12:18:02.207698  USB0 port 0 read_resources bus 0 link: 0

 1095 12:18:02.211097  USB0 port 0 read_resources bus 0 link: 0 done

 1096 12:18:02.217488  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1097 12:18:02.220993  PCI: 00:14.0 read_resources bus 0 link: 0

 1098 12:18:02.227514  USB0 port 0 read_resources bus 0 link: 0

 1099 12:18:02.230769  USB0 port 0 read_resources bus 0 link: 0 done

 1100 12:18:02.237374  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1101 12:18:02.240817  PCI: 00:14.3 read_resources bus 0 link: 0

 1102 12:18:02.247233  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1103 12:18:02.250706  PCI: 00:15.0 read_resources bus 0 link: 0

 1104 12:18:02.257139  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1105 12:18:02.260476  PCI: 00:15.1 read_resources bus 0 link: 0

 1106 12:18:02.267357  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1107 12:18:02.270365  PCI: 00:19.1 read_resources bus 0 link: 0

 1108 12:18:02.277101  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1109 12:18:02.280469  PCI: 00:1d.0 read_resources bus 1 link: 0

 1110 12:18:02.287219  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1111 12:18:02.290078  PCI: 00:1e.2 read_resources bus 2 link: 0

 1112 12:18:02.297375  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1113 12:18:02.300450  PCI: 00:1e.3 read_resources bus 3 link: 0

 1114 12:18:02.307143  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1115 12:18:02.310385  PCI: 00:1f.0 read_resources bus 0 link: 0

 1116 12:18:02.316998  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1117 12:18:02.320337  PCI: 00:1f.2 read_resources bus 0 link: 0

 1118 12:18:02.323638  GENERIC: 0.0 read_resources bus 0 link: 0

 1119 12:18:02.330642  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1120 12:18:02.334113  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1121 12:18:02.341255  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1122 12:18:02.344661  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1123 12:18:02.351207  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1124 12:18:02.354445  Root Device read_resources bus 0 link: 0 done

 1125 12:18:02.357436  Done reading resources.

 1126 12:18:02.364288  Show resources in subtree (Root Device)...After reading.

 1127 12:18:02.367614   Root Device child on link 0 DOMAIN: 0000

 1128 12:18:02.370915    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1129 12:18:02.381093    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1130 12:18:02.390541    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1131 12:18:02.394121     PCI: 00:00.0

 1132 12:18:02.403876     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1133 12:18:02.410575     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1134 12:18:02.420363     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1135 12:18:02.430428     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1136 12:18:02.440447     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1137 12:18:02.450209     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1138 12:18:02.460058     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1139 12:18:02.466689     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1140 12:18:02.476724     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1141 12:18:02.486539     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1142 12:18:02.496975     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1143 12:18:02.506615     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1144 12:18:02.516204     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1145 12:18:02.522800     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1146 12:18:02.533713     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1147 12:18:02.543267     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1148 12:18:02.553273     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1149 12:18:02.563171     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1150 12:18:02.572923     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1151 12:18:02.579525     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1152 12:18:02.583151     PCI: 00:02.0

 1153 12:18:02.592830     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1154 12:18:02.602682     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1155 12:18:02.612774     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1156 12:18:02.616053     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1157 12:18:02.625877     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1158 12:18:02.629232      GENERIC: 0.0

 1159 12:18:02.629313     PCI: 00:05.0

 1160 12:18:02.639107     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1161 12:18:02.645639     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1162 12:18:02.645714      GENERIC: 0.0

 1163 12:18:02.648831     PCI: 00:08.0

 1164 12:18:02.658844     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1165 12:18:02.658912     PCI: 00:0a.0

 1166 12:18:02.665417     PCI: 00:0d.0 child on link 0 USB0 port 0

 1167 12:18:02.675437     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1168 12:18:02.678594      USB0 port 0 child on link 0 USB3 port 0

 1169 12:18:02.682143       USB3 port 0

 1170 12:18:02.682215       USB3 port 1

 1171 12:18:02.685446       USB3 port 2

 1172 12:18:02.685503       USB3 port 3

 1173 12:18:02.688768     PCI: 00:14.0 child on link 0 USB0 port 0

 1174 12:18:02.698653     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1175 12:18:02.705111      USB0 port 0 child on link 0 USB2 port 0

 1176 12:18:02.705187       USB2 port 0

 1177 12:18:02.708546       USB2 port 1

 1178 12:18:02.708615       USB2 port 2

 1179 12:18:02.711807       USB2 port 3

 1180 12:18:02.711864       USB2 port 4

 1181 12:18:02.715265       USB2 port 5

 1182 12:18:02.718551       USB2 port 6

 1183 12:18:02.718611       USB2 port 7

 1184 12:18:02.721696       USB2 port 8

 1185 12:18:02.721758       USB2 port 9

 1186 12:18:02.725106       USB3 port 0

 1187 12:18:02.725163       USB3 port 1

 1188 12:18:02.728247       USB3 port 2

 1189 12:18:02.728305       USB3 port 3

 1190 12:18:02.731621     PCI: 00:14.2

 1191 12:18:02.741464     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1192 12:18:02.751484     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1193 12:18:02.754608     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1194 12:18:02.764637     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1195 12:18:02.768012      GENERIC: 0.0

 1196 12:18:02.771175     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1197 12:18:02.781003     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1198 12:18:02.781081      I2C: 00:1a

 1199 12:18:02.784499      I2C: 00:31

 1200 12:18:02.784605      I2C: 00:32

 1201 12:18:02.790974     PCI: 00:15.1 child on link 0 I2C: 00:10

 1202 12:18:02.801101     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1203 12:18:02.801180      I2C: 00:10

 1204 12:18:02.804535     PCI: 00:15.2

 1205 12:18:02.814337     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1206 12:18:02.814415     PCI: 00:15.3

 1207 12:18:02.824212     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1208 12:18:02.827289     PCI: 00:16.0

 1209 12:18:02.837195     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1210 12:18:02.837274     PCI: 00:19.0

 1211 12:18:02.843849     PCI: 00:19.1 child on link 0 I2C: 00:15

 1212 12:18:02.853696     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1213 12:18:02.853774      I2C: 00:15

 1214 12:18:02.857000     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1215 12:18:02.867412     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1216 12:18:02.876835     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1217 12:18:02.886869     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1218 12:18:02.886948      GENERIC: 0.0

 1219 12:18:02.890102      PCI: 01:00.0

 1220 12:18:02.900418      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1221 12:18:02.910284      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1222 12:18:02.910364     PCI: 00:1e.0

 1223 12:18:02.923526     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1224 12:18:02.926489     PCI: 00:1e.2 child on link 0 SPI: 00

 1225 12:18:02.936309     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1226 12:18:02.936388      SPI: 00

 1227 12:18:02.943049     PCI: 00:1e.3 child on link 0 SPI: 00

 1228 12:18:02.952938     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1229 12:18:02.953017      SPI: 00

 1230 12:18:02.956438     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1231 12:18:02.966546     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1232 12:18:02.966625      PNP: 0c09.0

 1233 12:18:02.976152      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1234 12:18:02.979276     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1235 12:18:02.989261     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1236 12:18:02.999431     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1237 12:18:03.003115      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1238 12:18:03.006140       GENERIC: 0.0

 1239 12:18:03.009331       GENERIC: 1.0

 1240 12:18:03.009409     PCI: 00:1f.3

 1241 12:18:03.019294     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1242 12:18:03.029021     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1243 12:18:03.032093     PCI: 00:1f.5

 1244 12:18:03.038718     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1245 12:18:03.045250    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1246 12:18:03.045329     APIC: 00

 1247 12:18:03.048799     APIC: 01

 1248 12:18:03.048876     APIC: 03

 1249 12:18:03.048930     APIC: 04

 1250 12:18:03.051803     APIC: 07

 1251 12:18:03.051880     APIC: 06

 1252 12:18:03.051933     APIC: 02

 1253 12:18:03.055361     APIC: 05

 1254 12:18:03.061678  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1255 12:18:03.068771   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1256 12:18:03.075012   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1257 12:18:03.081583   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1258 12:18:03.084941    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1259 12:18:03.088124    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1260 12:18:03.094907   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1261 12:18:03.104745   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1262 12:18:03.111697   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1263 12:18:03.118233  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1264 12:18:03.124837  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1265 12:18:03.131294   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1266 12:18:03.141410   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1267 12:18:03.147660   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1268 12:18:03.151302   DOMAIN: 0000: Resource ranges:

 1269 12:18:03.154515   * Base: 1000, Size: 800, Tag: 100

 1270 12:18:03.157752   * Base: 1900, Size: e700, Tag: 100

 1271 12:18:03.164139    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1272 12:18:03.171012  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1273 12:18:03.177421  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1274 12:18:03.184072   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1275 12:18:03.190562   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1276 12:18:03.200438   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1277 12:18:03.206992   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1278 12:18:03.213489   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1279 12:18:03.223712   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1280 12:18:03.230444   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1281 12:18:03.236930   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1282 12:18:03.247014   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1283 12:18:03.253150   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1284 12:18:03.260227   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1285 12:18:03.270236   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1286 12:18:03.276353   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1287 12:18:03.283016   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1288 12:18:03.293077   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1289 12:18:03.299756   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1290 12:18:03.306189   update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)

 1291 12:18:03.316146   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1292 12:18:03.322858   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1293 12:18:03.329519   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1294 12:18:03.339046   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1295 12:18:03.345659   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1296 12:18:03.349296   DOMAIN: 0000: Resource ranges:

 1297 12:18:03.352356   * Base: 7fc00000, Size: 40400000, Tag: 200

 1298 12:18:03.358946   * Base: d0000000, Size: 28000000, Tag: 200

 1299 12:18:03.362662   * Base: fa000000, Size: 1000000, Tag: 200

 1300 12:18:03.365915   * Base: fb001000, Size: 2fff000, Tag: 200

 1301 12:18:03.369088   * Base: fe010000, Size: 2e000, Tag: 200

 1302 12:18:03.375655   * Base: fe03f000, Size: d41000, Tag: 200

 1303 12:18:03.378989   * Base: fed88000, Size: 8000, Tag: 200

 1304 12:18:03.382363   * Base: fed93000, Size: d000, Tag: 200

 1305 12:18:03.385664   * Base: feda2000, Size: 1e000, Tag: 200

 1306 12:18:03.391957   * Base: fede0000, Size: 1220000, Tag: 200

 1307 12:18:03.395390   * Base: 480400000, Size: 7b7fc00000, Tag: 100200

 1308 12:18:03.402123    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1309 12:18:03.408507    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1310 12:18:03.415228    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1311 12:18:03.421680    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1312 12:18:03.428341    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1313 12:18:03.435370    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1314 12:18:03.441587    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1315 12:18:03.448177    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1316 12:18:03.455179    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1317 12:18:03.461452    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1318 12:18:03.468112    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1319 12:18:03.475139    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1320 12:18:03.481291    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1321 12:18:03.487952    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1322 12:18:03.494530    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1323 12:18:03.501254    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1324 12:18:03.507665    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1325 12:18:03.514448    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1326 12:18:03.520971    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1327 12:18:03.528090    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1328 12:18:03.534264    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1329 12:18:03.540925    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1330 12:18:03.550933  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1331 12:18:03.557433  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1332 12:18:03.560630   PCI: 00:1d.0: Resource ranges:

 1333 12:18:03.564079   * Base: 7fc00000, Size: 100000, Tag: 200

 1334 12:18:03.570806    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1335 12:18:03.577285    PCI: 01:00.0 20 *  [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem

 1336 12:18:03.587195  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1337 12:18:03.594019  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1338 12:18:03.597234  Root Device assign_resources, bus 0 link: 0

 1339 12:18:03.603650  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1340 12:18:03.610396  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1341 12:18:03.619925  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1342 12:18:03.626719  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1343 12:18:03.636525  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1344 12:18:03.639852  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1345 12:18:03.646825  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1346 12:18:03.653350  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1347 12:18:03.663050  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1348 12:18:03.669655  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1349 12:18:03.672798  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1350 12:18:03.679527  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1351 12:18:03.686074  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1352 12:18:03.692569  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1353 12:18:03.696121  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1354 12:18:03.705834  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1355 12:18:03.712598  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1356 12:18:03.722459  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1357 12:18:03.725714  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1358 12:18:03.729034  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1359 12:18:03.738827  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1360 12:18:03.742061  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1361 12:18:03.749182  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1362 12:18:03.755342  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1363 12:18:03.758639  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1364 12:18:03.765710  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1365 12:18:03.772084  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1366 12:18:03.781859  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1367 12:18:03.788486  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1368 12:18:03.798856  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1369 12:18:03.801469  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1370 12:18:03.808038  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1371 12:18:03.814703  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1372 12:18:03.824696  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1373 12:18:03.834494  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1374 12:18:03.837828  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1375 12:18:03.848137  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1376 12:18:03.854335  PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64

 1377 12:18:03.861024  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1378 12:18:03.868016  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1379 12:18:03.874207  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1380 12:18:03.877891  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1381 12:18:03.884066  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1382 12:18:03.890744  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1383 12:18:03.893822  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1384 12:18:03.900474  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1385 12:18:03.903998  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1386 12:18:03.910422  LPC: Trying to open IO window from 800 size 1ff

 1387 12:18:03.916859  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1388 12:18:03.926829  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1389 12:18:03.933578  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1390 12:18:03.940206  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1391 12:18:03.943757  Root Device assign_resources, bus 0 link: 0

 1392 12:18:03.946618  Done setting resources.

 1393 12:18:03.953209  Show resources in subtree (Root Device)...After assigning values.

 1394 12:18:03.956603   Root Device child on link 0 DOMAIN: 0000

 1395 12:18:03.959666    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1396 12:18:03.969694    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1397 12:18:03.979752    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1398 12:18:03.983147     PCI: 00:00.0

 1399 12:18:03.992790     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1400 12:18:03.999884     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1401 12:18:04.009488     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1402 12:18:04.019409     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1403 12:18:04.029113     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1404 12:18:04.039070     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1405 12:18:04.049282     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1406 12:18:04.055518     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1407 12:18:04.065299     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1408 12:18:04.075492     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1409 12:18:04.085344     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1410 12:18:04.095384     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1411 12:18:04.105179     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1412 12:18:04.111751     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1413 12:18:04.121643     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1414 12:18:04.131578     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1415 12:18:04.141754     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1416 12:18:04.151416     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1417 12:18:04.161371     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1418 12:18:04.171349     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1419 12:18:04.171429     PCI: 00:02.0

 1420 12:18:04.181169     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1421 12:18:04.194306     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1422 12:18:04.200902     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1423 12:18:04.207659     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1424 12:18:04.217735     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1425 12:18:04.217820      GENERIC: 0.0

 1426 12:18:04.221299     PCI: 00:05.0

 1427 12:18:04.230800     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1428 12:18:04.234226     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1429 12:18:04.237222      GENERIC: 0.0

 1430 12:18:04.240601     PCI: 00:08.0

 1431 12:18:04.250449     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1432 12:18:04.250530     PCI: 00:0a.0

 1433 12:18:04.253992     PCI: 00:0d.0 child on link 0 USB0 port 0

 1434 12:18:04.266949     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1435 12:18:04.270278      USB0 port 0 child on link 0 USB3 port 0

 1436 12:18:04.273524       USB3 port 0

 1437 12:18:04.273600       USB3 port 1

 1438 12:18:04.276819       USB3 port 2

 1439 12:18:04.276895       USB3 port 3

 1440 12:18:04.280071     PCI: 00:14.0 child on link 0 USB0 port 0

 1441 12:18:04.293399     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1442 12:18:04.296643      USB0 port 0 child on link 0 USB2 port 0

 1443 12:18:04.296719       USB2 port 0

 1444 12:18:04.300079       USB2 port 1

 1445 12:18:04.303613       USB2 port 2

 1446 12:18:04.303672       USB2 port 3

 1447 12:18:04.306541       USB2 port 4

 1448 12:18:04.306599       USB2 port 5

 1449 12:18:04.309837       USB2 port 6

 1450 12:18:04.309892       USB2 port 7

 1451 12:18:04.313087       USB2 port 8

 1452 12:18:04.313170       USB2 port 9

 1453 12:18:04.316423       USB3 port 0

 1454 12:18:04.316480       USB3 port 1

 1455 12:18:04.319663       USB3 port 2

 1456 12:18:04.319726       USB3 port 3

 1457 12:18:04.323064     PCI: 00:14.2

 1458 12:18:04.332964     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1459 12:18:04.342574     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1460 12:18:04.349682     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1461 12:18:04.359221     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1462 12:18:04.359298      GENERIC: 0.0

 1463 12:18:04.366123     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1464 12:18:04.375838     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1465 12:18:04.375916      I2C: 00:1a

 1466 12:18:04.379515      I2C: 00:31

 1467 12:18:04.379591      I2C: 00:32

 1468 12:18:04.382538     PCI: 00:15.1 child on link 0 I2C: 00:10

 1469 12:18:04.392369     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1470 12:18:04.395649      I2C: 00:10

 1471 12:18:04.395729     PCI: 00:15.2

 1472 12:18:04.409094     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1473 12:18:04.409170     PCI: 00:15.3

 1474 12:18:04.418787     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1475 12:18:04.422629     PCI: 00:16.0

 1476 12:18:04.431983     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1477 12:18:04.432062     PCI: 00:19.0

 1478 12:18:04.438624     PCI: 00:19.1 child on link 0 I2C: 00:15

 1479 12:18:04.448535     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1480 12:18:04.448614      I2C: 00:15

 1481 12:18:04.455189     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1482 12:18:04.461883     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1483 12:18:04.474956     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1484 12:18:04.485004     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1485 12:18:04.488290      GENERIC: 0.0

 1486 12:18:04.488362      PCI: 01:00.0

 1487 12:18:04.498016      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1488 12:18:04.507984      PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20

 1489 12:18:04.511282     PCI: 00:1e.0

 1490 12:18:04.521257     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1491 12:18:04.527974     PCI: 00:1e.2 child on link 0 SPI: 00

 1492 12:18:04.537877     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1493 12:18:04.537944      SPI: 00

 1494 12:18:04.541628     PCI: 00:1e.3 child on link 0 SPI: 00

 1495 12:18:04.551027     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1496 12:18:04.554548      SPI: 00

 1497 12:18:04.557838     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1498 12:18:04.567414     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1499 12:18:04.567492      PNP: 0c09.0

 1500 12:18:04.577495      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1501 12:18:04.580695     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1502 12:18:04.590546     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1503 12:18:04.600715     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1504 12:18:04.604085      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1505 12:18:04.607193       GENERIC: 0.0

 1506 12:18:04.607271       GENERIC: 1.0

 1507 12:18:04.610525     PCI: 00:1f.3

 1508 12:18:04.620319     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1509 12:18:04.630826     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1510 12:18:04.633459     PCI: 00:1f.5

 1511 12:18:04.643727     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1512 12:18:04.647063    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1513 12:18:04.647156     APIC: 00

 1514 12:18:04.650575     APIC: 01

 1515 12:18:04.650650     APIC: 03

 1516 12:18:04.653853     APIC: 04

 1517 12:18:04.653930     APIC: 07

 1518 12:18:04.654006     APIC: 06

 1519 12:18:04.656987     APIC: 02

 1520 12:18:04.657067     APIC: 05

 1521 12:18:04.660172  Done allocating resources.

 1522 12:18:04.666893  BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms

 1523 12:18:04.673395  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1524 12:18:04.676762  Configure GPIOs for I2S audio on UP4.

 1525 12:18:04.682992  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1526 12:18:04.686461  Enabling resources...

 1527 12:18:04.689600  PCI: 00:00.0 subsystem <- 8086/9a12

 1528 12:18:04.692862  PCI: 00:00.0 cmd <- 06

 1529 12:18:04.696566  PCI: 00:02.0 subsystem <- 8086/9a40

 1530 12:18:04.696653  PCI: 00:02.0 cmd <- 03

 1531 12:18:04.703131  PCI: 00:04.0 subsystem <- 8086/9a03

 1532 12:18:04.703211  PCI: 00:04.0 cmd <- 02

 1533 12:18:04.706566  PCI: 00:05.0 subsystem <- 8086/9a19

 1534 12:18:04.709562  PCI: 00:05.0 cmd <- 02

 1535 12:18:04.713249  PCI: 00:08.0 subsystem <- 8086/9a11

 1536 12:18:04.716507  PCI: 00:08.0 cmd <- 06

 1537 12:18:04.719876  PCI: 00:0d.0 subsystem <- 8086/9a13

 1538 12:18:04.722961  PCI: 00:0d.0 cmd <- 02

 1539 12:18:04.725906  PCI: 00:14.0 subsystem <- 8086/a0ed

 1540 12:18:04.729411  PCI: 00:14.0 cmd <- 02

 1541 12:18:04.732838  PCI: 00:14.2 subsystem <- 8086/a0ef

 1542 12:18:04.735922  PCI: 00:14.2 cmd <- 02

 1543 12:18:04.739256  PCI: 00:14.3 subsystem <- 8086/a0f0

 1544 12:18:04.742389  PCI: 00:14.3 cmd <- 02

 1545 12:18:04.745751  PCI: 00:15.0 subsystem <- 8086/a0e8

 1546 12:18:04.745829  PCI: 00:15.0 cmd <- 02

 1547 12:18:04.752605  PCI: 00:15.1 subsystem <- 8086/a0e9

 1548 12:18:04.752683  PCI: 00:15.1 cmd <- 02

 1549 12:18:04.756020  PCI: 00:15.2 subsystem <- 8086/a0ea

 1550 12:18:04.759025  PCI: 00:15.2 cmd <- 02

 1551 12:18:04.762625  PCI: 00:15.3 subsystem <- 8086/a0eb

 1552 12:18:04.765718  PCI: 00:15.3 cmd <- 02

 1553 12:18:04.769030  PCI: 00:16.0 subsystem <- 8086/a0e0

 1554 12:18:04.772457  PCI: 00:16.0 cmd <- 02

 1555 12:18:04.775553  PCI: 00:19.1 subsystem <- 8086/a0c6

 1556 12:18:04.779008  PCI: 00:19.1 cmd <- 02

 1557 12:18:04.782114  PCI: 00:1d.0 bridge ctrl <- 0013

 1558 12:18:04.785366  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1559 12:18:04.788753  PCI: 00:1d.0 cmd <- 06

 1560 12:18:04.791881  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1561 12:18:04.795432  PCI: 00:1e.0 cmd <- 06

 1562 12:18:04.798602  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1563 12:18:04.801981  PCI: 00:1e.2 cmd <- 06

 1564 12:18:04.805168  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1565 12:18:04.805225  PCI: 00:1e.3 cmd <- 02

 1566 12:18:04.811623  PCI: 00:1f.0 subsystem <- 8086/a087

 1567 12:18:04.811690  PCI: 00:1f.0 cmd <- 407

 1568 12:18:04.815120  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1569 12:18:04.818338  PCI: 00:1f.3 cmd <- 02

 1570 12:18:04.822225  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1571 12:18:04.824802  PCI: 00:1f.5 cmd <- 406

 1572 12:18:04.829371  PCI: 01:00.0 cmd <- 02

 1573 12:18:04.834286  done.

 1574 12:18:04.837061  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1575 12:18:04.840433  Initializing devices...

 1576 12:18:04.843842  Root Device init

 1577 12:18:04.847042  Chrome EC: Set SMI mask to 0x0000000000000000

 1578 12:18:04.853838  Chrome EC: clear events_b mask to 0x0000000000000000

 1579 12:18:04.860344  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1580 12:18:04.866864  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1581 12:18:04.873420  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1582 12:18:04.876911  Chrome EC: Set WAKE mask to 0x0000000000000000

 1583 12:18:04.884212  fw_config match found: DB_USB=USB3_ACTIVE

 1584 12:18:04.887695  Configure Right Type-C port orientation for retimer

 1585 12:18:04.890954  Root Device init finished in 45 msecs

 1586 12:18:04.895057  PCI: 00:00.0 init

 1587 12:18:04.898183  CPU TDP = 9 Watts

 1588 12:18:04.898240  CPU PL1 = 9 Watts

 1589 12:18:04.901749  CPU PL2 = 40 Watts

 1590 12:18:04.904907  CPU PL4 = 83 Watts

 1591 12:18:04.908391  PCI: 00:00.0 init finished in 8 msecs

 1592 12:18:04.911383  PCI: 00:02.0 init

 1593 12:18:04.911437  GMA: Found VBT in CBFS

 1594 12:18:04.914654  GMA: Found valid VBT in CBFS

 1595 12:18:04.921237  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1596 12:18:04.927891                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1597 12:18:04.931123  PCI: 00:02.0 init finished in 18 msecs

 1598 12:18:04.934892  PCI: 00:05.0 init

 1599 12:18:04.938313  PCI: 00:05.0 init finished in 0 msecs

 1600 12:18:04.941251  PCI: 00:08.0 init

 1601 12:18:04.944748  PCI: 00:08.0 init finished in 0 msecs

 1602 12:18:04.947728  PCI: 00:14.0 init

 1603 12:18:04.951186  PCI: 00:14.0 init finished in 0 msecs

 1604 12:18:04.954389  PCI: 00:14.2 init

 1605 12:18:04.957708  PCI: 00:14.2 init finished in 0 msecs

 1606 12:18:04.960946  PCI: 00:15.0 init

 1607 12:18:04.964301  I2C bus 0 version 0x3230302a

 1608 12:18:04.967814  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1609 12:18:04.971051  PCI: 00:15.0 init finished in 6 msecs

 1610 12:18:04.971121  PCI: 00:15.1 init

 1611 12:18:04.974247  I2C bus 1 version 0x3230302a

 1612 12:18:04.977594  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1613 12:18:04.984823  PCI: 00:15.1 init finished in 6 msecs

 1614 12:18:04.984879  PCI: 00:15.2 init

 1615 12:18:04.987378  I2C bus 2 version 0x3230302a

 1616 12:18:04.990864  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1617 12:18:04.994500  PCI: 00:15.2 init finished in 6 msecs

 1618 12:18:04.997660  PCI: 00:15.3 init

 1619 12:18:05.000799  I2C bus 3 version 0x3230302a

 1620 12:18:05.004102  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1621 12:18:05.007686  PCI: 00:15.3 init finished in 6 msecs

 1622 12:18:05.010801  PCI: 00:16.0 init

 1623 12:18:05.014152  PCI: 00:16.0 init finished in 0 msecs

 1624 12:18:05.017638  PCI: 00:19.1 init

 1625 12:18:05.020668  I2C bus 5 version 0x3230302a

 1626 12:18:05.024069  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1627 12:18:05.027431  PCI: 00:19.1 init finished in 6 msecs

 1628 12:18:05.030509  PCI: 00:1d.0 init

 1629 12:18:05.034009  Initializing PCH PCIe bridge.

 1630 12:18:05.037407  PCI: 00:1d.0 init finished in 3 msecs

 1631 12:18:05.040398  PCI: 00:1f.0 init

 1632 12:18:05.043907  IOAPIC: Initializing IOAPIC at 0xfec00000

 1633 12:18:05.047191  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1634 12:18:05.050473  IOAPIC: ID = 0x02

 1635 12:18:05.053554  IOAPIC: Dumping registers

 1636 12:18:05.053607    reg 0x0000: 0x02000000

 1637 12:18:05.056884    reg 0x0001: 0x00770020

 1638 12:18:05.060367    reg 0x0002: 0x00000000

 1639 12:18:05.063454  PCI: 00:1f.0 init finished in 21 msecs

 1640 12:18:05.067383  PCI: 00:1f.2 init

 1641 12:18:05.070148  Disabling ACPI via APMC.

 1642 12:18:05.070214  APMC done.

 1643 12:18:05.076610  PCI: 00:1f.2 init finished in 5 msecs

 1644 12:18:05.087476  PCI: 01:00.0 init

 1645 12:18:05.091036  PCI: 01:00.0 init finished in 0 msecs

 1646 12:18:05.094205  PNP: 0c09.0 init

 1647 12:18:05.097469  Google Chrome EC uptime: 8.262 seconds

 1648 12:18:05.103997  Google Chrome AP resets since EC boot: 1

 1649 12:18:05.107437  Google Chrome most recent AP reset causes:

 1650 12:18:05.110666  	0.452: 32775 shutdown: entering G3

 1651 12:18:05.117218  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1652 12:18:05.120371  PNP: 0c09.0 init finished in 22 msecs

 1653 12:18:05.125924  Devices initialized

 1654 12:18:05.129245  Show all devs... After init.

 1655 12:18:05.132707  Root Device: enabled 1

 1656 12:18:05.132765  DOMAIN: 0000: enabled 1

 1657 12:18:05.135914  CPU_CLUSTER: 0: enabled 1

 1658 12:18:05.139534  PCI: 00:00.0: enabled 1

 1659 12:18:05.142768  PCI: 00:02.0: enabled 1

 1660 12:18:05.142840  PCI: 00:04.0: enabled 1

 1661 12:18:05.145933  PCI: 00:05.0: enabled 1

 1662 12:18:05.149485  PCI: 00:06.0: enabled 0

 1663 12:18:05.152699  PCI: 00:07.0: enabled 0

 1664 12:18:05.152753  PCI: 00:07.1: enabled 0

 1665 12:18:05.156011  PCI: 00:07.2: enabled 0

 1666 12:18:05.159201  PCI: 00:07.3: enabled 0

 1667 12:18:05.162487  PCI: 00:08.0: enabled 1

 1668 12:18:05.162543  PCI: 00:09.0: enabled 0

 1669 12:18:05.166078  PCI: 00:0a.0: enabled 0

 1670 12:18:05.169151  PCI: 00:0d.0: enabled 1

 1671 12:18:05.172211  PCI: 00:0d.1: enabled 0

 1672 12:18:05.172265  PCI: 00:0d.2: enabled 0

 1673 12:18:05.175963  PCI: 00:0d.3: enabled 0

 1674 12:18:05.179168  PCI: 00:0e.0: enabled 0

 1675 12:18:05.182522  PCI: 00:10.2: enabled 1

 1676 12:18:05.182579  PCI: 00:10.6: enabled 0

 1677 12:18:05.185847  PCI: 00:10.7: enabled 0

 1678 12:18:05.189392  PCI: 00:12.0: enabled 0

 1679 12:18:05.189447  PCI: 00:12.6: enabled 0

 1680 12:18:05.192396  PCI: 00:13.0: enabled 0

 1681 12:18:05.195459  PCI: 00:14.0: enabled 1

 1682 12:18:05.198770  PCI: 00:14.1: enabled 0

 1683 12:18:05.198827  PCI: 00:14.2: enabled 1

 1684 12:18:05.201956  PCI: 00:14.3: enabled 1

 1685 12:18:05.205479  PCI: 00:15.0: enabled 1

 1686 12:18:05.208833  PCI: 00:15.1: enabled 1

 1687 12:18:05.208887  PCI: 00:15.2: enabled 1

 1688 12:18:05.212060  PCI: 00:15.3: enabled 1

 1689 12:18:05.215474  PCI: 00:16.0: enabled 1

 1690 12:18:05.218540  PCI: 00:16.1: enabled 0

 1691 12:18:05.218599  PCI: 00:16.2: enabled 0

 1692 12:18:05.221797  PCI: 00:16.3: enabled 0

 1693 12:18:05.225546  PCI: 00:16.4: enabled 0

 1694 12:18:05.228486  PCI: 00:16.5: enabled 0

 1695 12:18:05.228542  PCI: 00:17.0: enabled 0

 1696 12:18:05.231901  PCI: 00:19.0: enabled 0

 1697 12:18:05.235452  PCI: 00:19.1: enabled 1

 1698 12:18:05.235506  PCI: 00:19.2: enabled 0

 1699 12:18:05.238933  PCI: 00:1c.0: enabled 1

 1700 12:18:05.242003  PCI: 00:1c.1: enabled 0

 1701 12:18:05.245819  PCI: 00:1c.2: enabled 0

 1702 12:18:05.246168  PCI: 00:1c.3: enabled 0

 1703 12:18:05.248974  PCI: 00:1c.4: enabled 0

 1704 12:18:05.252492  PCI: 00:1c.5: enabled 0

 1705 12:18:05.255396  PCI: 00:1c.6: enabled 1

 1706 12:18:05.255489  PCI: 00:1c.7: enabled 0

 1707 12:18:05.258286  PCI: 00:1d.0: enabled 1

 1708 12:18:05.261885  PCI: 00:1d.1: enabled 0

 1709 12:18:05.265237  PCI: 00:1d.2: enabled 1

 1710 12:18:05.265493  PCI: 00:1d.3: enabled 0

 1711 12:18:05.268853  PCI: 00:1e.0: enabled 1

 1712 12:18:05.272132  PCI: 00:1e.1: enabled 0

 1713 12:18:05.275483  PCI: 00:1e.2: enabled 1

 1714 12:18:05.275834  PCI: 00:1e.3: enabled 1

 1715 12:18:05.278859  PCI: 00:1f.0: enabled 1

 1716 12:18:05.281748  PCI: 00:1f.1: enabled 0

 1717 12:18:05.282142  PCI: 00:1f.2: enabled 1

 1718 12:18:05.285492  PCI: 00:1f.3: enabled 1

 1719 12:18:05.288720  PCI: 00:1f.4: enabled 0

 1720 12:18:05.292051  PCI: 00:1f.5: enabled 1

 1721 12:18:05.292495  PCI: 00:1f.6: enabled 0

 1722 12:18:05.295271  PCI: 00:1f.7: enabled 0

 1723 12:18:05.298621  APIC: 00: enabled 1

 1724 12:18:05.301671  GENERIC: 0.0: enabled 1

 1725 12:18:05.302048  GENERIC: 0.0: enabled 1

 1726 12:18:05.305274  GENERIC: 1.0: enabled 1

 1727 12:18:05.308429  GENERIC: 0.0: enabled 1

 1728 12:18:05.308801  GENERIC: 1.0: enabled 1

 1729 12:18:05.311888  USB0 port 0: enabled 1

 1730 12:18:05.315051  GENERIC: 0.0: enabled 1

 1731 12:18:05.318435  USB0 port 0: enabled 1

 1732 12:18:05.318812  GENERIC: 0.0: enabled 1

 1733 12:18:05.321539  I2C: 00:1a: enabled 1

 1734 12:18:05.324907  I2C: 00:31: enabled 1

 1735 12:18:05.325343  I2C: 00:32: enabled 1

 1736 12:18:05.328382  I2C: 00:10: enabled 1

 1737 12:18:05.331738  I2C: 00:15: enabled 1

 1738 12:18:05.335178  GENERIC: 0.0: enabled 0

 1739 12:18:05.335548  GENERIC: 1.0: enabled 0

 1740 12:18:05.338343  GENERIC: 0.0: enabled 1

 1741 12:18:05.341531  SPI: 00: enabled 1

 1742 12:18:05.341850  SPI: 00: enabled 1

 1743 12:18:05.344956  PNP: 0c09.0: enabled 1

 1744 12:18:05.348291  GENERIC: 0.0: enabled 1

 1745 12:18:05.348746  USB3 port 0: enabled 1

 1746 12:18:05.351932  USB3 port 1: enabled 1

 1747 12:18:05.355036  USB3 port 2: enabled 0

 1748 12:18:05.355414  USB3 port 3: enabled 0

 1749 12:18:05.358161  USB2 port 0: enabled 0

 1750 12:18:05.361580  USB2 port 1: enabled 1

 1751 12:18:05.364839  USB2 port 2: enabled 1

 1752 12:18:05.365353  USB2 port 3: enabled 0

 1753 12:18:05.368282  USB2 port 4: enabled 1

 1754 12:18:05.371490  USB2 port 5: enabled 0

 1755 12:18:05.371867  USB2 port 6: enabled 0

 1756 12:18:05.374496  USB2 port 7: enabled 0

 1757 12:18:05.377830  USB2 port 8: enabled 0

 1758 12:18:05.381156  USB2 port 9: enabled 0

 1759 12:18:05.381601  USB3 port 0: enabled 0

 1760 12:18:05.384702  USB3 port 1: enabled 1

 1761 12:18:05.387980  USB3 port 2: enabled 0

 1762 12:18:05.388349  USB3 port 3: enabled 0

 1763 12:18:05.391417  GENERIC: 0.0: enabled 1

 1764 12:18:05.394482  GENERIC: 1.0: enabled 1

 1765 12:18:05.394870  APIC: 01: enabled 1

 1766 12:18:05.397758  APIC: 03: enabled 1

 1767 12:18:05.401344  APIC: 04: enabled 1

 1768 12:18:05.401805  APIC: 07: enabled 1

 1769 12:18:05.404466  APIC: 06: enabled 1

 1770 12:18:05.407874  APIC: 02: enabled 1

 1771 12:18:05.408331  APIC: 05: enabled 1

 1772 12:18:05.411199  PCI: 01:00.0: enabled 1

 1773 12:18:05.417558  BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms

 1774 12:18:05.420872  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1775 12:18:05.424517  ELOG: NV offset 0xf30000 size 0x1000

 1776 12:18:05.431631  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1777 12:18:05.438157  ELOG: Event(17) added with size 13 at 2023-12-08 12:18:04 UTC

 1778 12:18:05.445031  ELOG: Event(92) added with size 9 at 2023-12-08 12:18:04 UTC

 1779 12:18:05.451576  ELOG: Event(93) added with size 9 at 2023-12-08 12:18:04 UTC

 1780 12:18:05.458262  ELOG: Event(9E) added with size 10 at 2023-12-08 12:18:04 UTC

 1781 12:18:05.464848  ELOG: Event(9F) added with size 14 at 2023-12-08 12:18:04 UTC

 1782 12:18:05.471351  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1783 12:18:05.477824  ELOG: Event(A1) added with size 10 at 2023-12-08 12:18:04 UTC

 1784 12:18:05.481202  elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b

 1785 12:18:05.487443  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1786 12:18:05.490796  Finalize devices...

 1787 12:18:05.491149  Devices finalized

 1788 12:18:05.497102  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1789 12:18:05.504229  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1790 12:18:05.507473  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1791 12:18:05.514096  ME: HFSTS1                      : 0x80030055

 1792 12:18:05.517397  ME: HFSTS2                      : 0x30280116

 1793 12:18:05.523977  ME: HFSTS3                      : 0x00000050

 1794 12:18:05.527554  ME: HFSTS4                      : 0x00004000

 1795 12:18:05.530389  ME: HFSTS5                      : 0x00000000

 1796 12:18:05.537154  ME: HFSTS6                      : 0x40400006

 1797 12:18:05.540344  ME: Manufacturing Mode          : YES

 1798 12:18:05.543684  ME: SPI Protection Mode Enabled : NO

 1799 12:18:05.547377  ME: FW Partition Table          : OK

 1800 12:18:05.550595  ME: Bringup Loader Failure      : NO

 1801 12:18:05.553460  ME: Firmware Init Complete      : NO

 1802 12:18:05.557125  ME: Boot Options Present        : NO

 1803 12:18:05.563404  ME: Update In Progress          : NO

 1804 12:18:05.566915  ME: D0i3 Support                : YES

 1805 12:18:05.569929  ME: Low Power State Enabled     : NO

 1806 12:18:05.573509  ME: CPU Replaced                : YES

 1807 12:18:05.576819  ME: CPU Replacement Valid       : YES

 1808 12:18:05.580317  ME: Current Working State       : 5

 1809 12:18:05.583233  ME: Current Operation State     : 1

 1810 12:18:05.586590  ME: Current Operation Mode      : 3

 1811 12:18:05.590184  ME: Error Code                  : 0

 1812 12:18:05.596095  ME: Enhanced Debug Mode         : NO

 1813 12:18:05.600097  ME: CPU Debug Disabled          : YES

 1814 12:18:05.603141  ME: TXT Support                 : NO

 1815 12:18:05.609420  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1816 12:18:05.616172  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1817 12:18:05.619249  CBFS: 'fallback/slic' not found.

 1818 12:18:05.622729  ACPI: Writing ACPI tables at 76b01000.

 1819 12:18:05.625909  ACPI:    * FACS

 1820 12:18:05.626424  ACPI:    * DSDT

 1821 12:18:05.629734  Ramoops buffer: 0x100000@0x76a00000.

 1822 12:18:05.635900  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1823 12:18:05.639212  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1824 12:18:05.642735  Google Chrome EC: version:

 1825 12:18:05.646044  	ro: voema_v2.0.10114-a447f03e46

 1826 12:18:05.649142  	rw: voema_v2.0.10114-a447f03e46

 1827 12:18:05.652493    running image: 2

 1828 12:18:05.659172  PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000

 1829 12:18:05.662196  ACPI:    * FADT

 1830 12:18:05.662586  SCI is IRQ9

 1831 12:18:05.669011  ACPI: added table 1/32, length now 40

 1832 12:18:05.669454  ACPI:     * SSDT

 1833 12:18:05.672263  Found 1 CPU(s) with 8 core(s) each.

 1834 12:18:05.679013  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1835 12:18:05.682099  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1836 12:18:05.685633  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1837 12:18:05.691799  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1838 12:18:05.695428  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1839 12:18:05.701763  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1840 12:18:05.705215  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1841 12:18:05.711848  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1842 12:18:05.718830  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1843 12:18:05.721651  \_SB.PCI0.RP09: Added StorageD3Enable property

 1844 12:18:05.728410  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1845 12:18:05.731856  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1846 12:18:05.738618  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1847 12:18:05.741624  PS2K: Passing 80 keymaps to kernel

 1848 12:18:05.748402  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1849 12:18:05.755290  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1850 12:18:05.761448  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1851 12:18:05.768071  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1852 12:18:05.774667  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1853 12:18:05.781334  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1854 12:18:05.788165  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1855 12:18:05.794449  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1856 12:18:05.797685  ACPI: added table 2/32, length now 44

 1857 12:18:05.801049  ACPI:    * MCFG

 1858 12:18:05.804502  ACPI: added table 3/32, length now 48

 1859 12:18:05.804931  ACPI:    * TPM2

 1860 12:18:05.807814  TPM2 log created at 0x769f0000

 1861 12:18:05.811366  ACPI: added table 4/32, length now 52

 1862 12:18:05.814063  ACPI:    * MADT

 1863 12:18:05.814465  SCI is IRQ9

 1864 12:18:05.817683  ACPI: added table 5/32, length now 56

 1865 12:18:05.820575  current = 76b09850

 1866 12:18:05.824040  ACPI:    * DMAR

 1867 12:18:05.827521  ACPI: added table 6/32, length now 60

 1868 12:18:05.830880  ACPI: added table 7/32, length now 64

 1869 12:18:05.831251  ACPI:    * HPET

 1870 12:18:05.837768  ACPI: added table 8/32, length now 68

 1871 12:18:05.838253  ACPI: done.

 1872 12:18:05.841067  ACPI tables: 35216 bytes.

 1873 12:18:05.844201  smbios_write_tables: 769ef000

 1874 12:18:05.847800  EC returned error result code 3

 1875 12:18:05.850638  Couldn't obtain OEM name from CBI

 1876 12:18:05.853995  Create SMBIOS type 16

 1877 12:18:05.857258  Create SMBIOS type 17

 1878 12:18:05.857702  GENERIC: 0.0 (WIFI Device)

 1879 12:18:05.860278  SMBIOS tables: 1734 bytes.

 1880 12:18:05.866985  Writing table forward entry at 0x00000500

 1881 12:18:05.870548  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1882 12:18:05.877099  Writing coreboot table at 0x76b25000

 1883 12:18:05.879821   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1884 12:18:05.886766   1. 0000000000001000-000000000009ffff: RAM

 1885 12:18:05.889523   2. 00000000000a0000-00000000000fffff: RESERVED

 1886 12:18:05.893382   3. 0000000000100000-00000000769eefff: RAM

 1887 12:18:05.899686   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1888 12:18:05.906507   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1889 12:18:05.912944   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1890 12:18:05.916252   7. 0000000077000000-000000007fbfffff: RESERVED

 1891 12:18:05.919417   8. 00000000c0000000-00000000cfffffff: RESERVED

 1892 12:18:05.926182   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1893 12:18:05.929302  10. 00000000fb000000-00000000fb000fff: RESERVED

 1894 12:18:05.936449  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1895 12:18:05.940153  12. 00000000fed80000-00000000fed87fff: RESERVED

 1896 12:18:05.945757  13. 00000000fed90000-00000000fed92fff: RESERVED

 1897 12:18:05.949475  14. 00000000feda0000-00000000feda1fff: RESERVED

 1898 12:18:05.956145  15. 00000000fedc0000-00000000feddffff: RESERVED

 1899 12:18:05.959471  16. 0000000100000000-00000004803fffff: RAM

 1900 12:18:05.962580  Passing 4 GPIOs to payload:

 1901 12:18:05.966053              NAME |       PORT | POLARITY |     VALUE

 1902 12:18:05.972320               lid |  undefined |     high |      high

 1903 12:18:05.979146             power |  undefined |     high |       low

 1904 12:18:05.982300             oprom |  undefined |     high |       low

 1905 12:18:05.988802          EC in RW | 0x000000e5 |     high |      high

 1906 12:18:05.995379  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 1314

 1907 12:18:05.995835  coreboot table: 1576 bytes.

 1908 12:18:06.002222  IMD ROOT    0. 0x76fff000 0x00001000

 1909 12:18:06.005516  IMD SMALL   1. 0x76ffe000 0x00001000

 1910 12:18:06.008872  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1911 12:18:06.011890  VPD         3. 0x76c4d000 0x00000367

 1912 12:18:06.015942  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1913 12:18:06.018676  CONSOLE     5. 0x76c2c000 0x00020000

 1914 12:18:06.021821  FMAP        6. 0x76c2b000 0x00000578

 1915 12:18:06.028366  TIME STAMP  7. 0x76c2a000 0x00000910

 1916 12:18:06.031922  VBOOT WORK  8. 0x76c16000 0x00014000

 1917 12:18:06.035212  ROMSTG STCK 9. 0x76c15000 0x00001000

 1918 12:18:06.038551  AFTER CAR  10. 0x76c0a000 0x0000b000

 1919 12:18:06.041626  RAMSTAGE   11. 0x76b97000 0x00073000

 1920 12:18:06.045127  REFCODE    12. 0x76b42000 0x00055000

 1921 12:18:06.048307  SMM BACKUP 13. 0x76b32000 0x00010000

 1922 12:18:06.051727  4f444749   14. 0x76b30000 0x00002000

 1923 12:18:06.054869  EXT VBT15. 0x76b2d000 0x0000219f

 1924 12:18:06.061616  COREBOOT   16. 0x76b25000 0x00008000

 1925 12:18:06.064859  ACPI       17. 0x76b01000 0x00024000

 1926 12:18:06.067922  ACPI GNVS  18. 0x76b00000 0x00001000

 1927 12:18:06.071556  RAMOOPS    19. 0x76a00000 0x00100000

 1928 12:18:06.074785  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1929 12:18:06.078405  SMBIOS     21. 0x769ef000 0x00000800

 1930 12:18:06.081433  IMD small region:

 1931 12:18:06.084884    IMD ROOT    0. 0x76ffec00 0x00000400

 1932 12:18:06.087908    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1933 12:18:06.091364    POWER STATE 2. 0x76ffeb80 0x00000044

 1934 12:18:06.097457    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1935 12:18:06.101006    MEM INFO    4. 0x76ffe980 0x000001e0

 1936 12:18:06.107837  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms

 1937 12:18:06.108531  MTRR: Physical address space:

 1938 12:18:06.114078  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1939 12:18:06.120542  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1940 12:18:06.127238  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1941 12:18:06.133674  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1942 12:18:06.140929  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1943 12:18:06.147337  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1944 12:18:06.153686  0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6

 1945 12:18:06.157149  MTRR: Fixed MSR 0x250 0x0606060606060606

 1946 12:18:06.160622  MTRR: Fixed MSR 0x258 0x0606060606060606

 1947 12:18:06.163629  MTRR: Fixed MSR 0x259 0x0000000000000000

 1948 12:18:06.170013  MTRR: Fixed MSR 0x268 0x0606060606060606

 1949 12:18:06.173375  MTRR: Fixed MSR 0x269 0x0606060606060606

 1950 12:18:06.176976  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1951 12:18:06.180664  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1952 12:18:06.186808  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1953 12:18:06.190323  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1954 12:18:06.193729  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1955 12:18:06.196254  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1956 12:18:06.201833  call enable_fixed_mtrr()

 1957 12:18:06.205438  CPU physical address size: 39 bits

 1958 12:18:06.211729  MTRR: default type WB/UC MTRR counts: 6/7.

 1959 12:18:06.215308  MTRR: WB selected as default type.

 1960 12:18:06.221637  MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1961 12:18:06.225071  MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1962 12:18:06.231651  MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1963 12:18:06.238080  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0

 1964 12:18:06.245077  MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1965 12:18:06.251666  MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0

 1966 12:18:06.258804  MTRR: Fixed MSR 0x250 0x0606060606060606

 1967 12:18:06.261864  MTRR: Fixed MSR 0x258 0x0606060606060606

 1968 12:18:06.265119  MTRR: Fixed MSR 0x259 0x0000000000000000

 1969 12:18:06.268808  MTRR: Fixed MSR 0x268 0x0606060606060606

 1970 12:18:06.275047  MTRR: Fixed MSR 0x269 0x0606060606060606

 1971 12:18:06.278676  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1972 12:18:06.281727  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1973 12:18:06.284996  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1974 12:18:06.291968  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1975 12:18:06.294948  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1976 12:18:06.298283  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1977 12:18:06.298721  

 1978 12:18:06.302999  MTRR check

 1979 12:18:06.305730  call enable_fixed_mtrr()

 1980 12:18:06.309058  MTRR: Fixed MSR 0x250 0x0606060606060606

 1981 12:18:06.312308  MTRR: Fixed MSR 0x250 0x0606060606060606

 1982 12:18:06.315733  MTRR: Fixed MSR 0x258 0x0606060606060606

 1983 12:18:06.321854  MTRR: Fixed MSR 0x259 0x0000000000000000

 1984 12:18:06.325589  MTRR: Fixed MSR 0x268 0x0606060606060606

 1985 12:18:06.328767  MTRR: Fixed MSR 0x269 0x0606060606060606

 1986 12:18:06.331967  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1987 12:18:06.338820  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1988 12:18:06.342017  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1989 12:18:06.345316  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1990 12:18:06.348335  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1991 12:18:06.354988  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1992 12:18:06.358230  MTRR: Fixed MSR 0x258 0x0606060606060606

 1993 12:18:06.361829  call enable_fixed_mtrr()

 1994 12:18:06.364965  MTRR: Fixed MSR 0x259 0x0000000000000000

 1995 12:18:06.371556  MTRR: Fixed MSR 0x268 0x0606060606060606

 1996 12:18:06.374708  MTRR: Fixed MSR 0x269 0x0606060606060606

 1997 12:18:06.377860  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1998 12:18:06.381363  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1999 12:18:06.387802  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2000 12:18:06.391122  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2001 12:18:06.394416  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2002 12:18:06.397495  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2003 12:18:06.402691  CPU physical address size: 39 bits

 2004 12:18:06.409707  call enable_fixed_mtrr()

 2005 12:18:06.413173  MTRR: Fixed MSR 0x250 0x0606060606060606

 2006 12:18:06.416225  MTRR: Fixed MSR 0x250 0x0606060606060606

 2007 12:18:06.422317  MTRR: Fixed MSR 0x258 0x0606060606060606

 2008 12:18:06.425915  MTRR: Fixed MSR 0x259 0x0000000000000000

 2009 12:18:06.428932  MTRR: Fixed MSR 0x268 0x0606060606060606

 2010 12:18:06.432486  MTRR: Fixed MSR 0x269 0x0606060606060606

 2011 12:18:06.435656  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2012 12:18:06.442407  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2013 12:18:06.445452  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2014 12:18:06.449132  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2015 12:18:06.452300  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2016 12:18:06.459048  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2017 12:18:06.462235  MTRR: Fixed MSR 0x258 0x0606060606060606

 2018 12:18:06.465309  call enable_fixed_mtrr()

 2019 12:18:06.468960  MTRR: Fixed MSR 0x259 0x0000000000000000

 2020 12:18:06.475389  MTRR: Fixed MSR 0x268 0x0606060606060606

 2021 12:18:06.478922  MTRR: Fixed MSR 0x269 0x0606060606060606

 2022 12:18:06.481858  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2023 12:18:06.485787  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2024 12:18:06.492022  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2025 12:18:06.495238  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2026 12:18:06.498399  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2027 12:18:06.501566  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2028 12:18:06.509932  CPU physical address size: 39 bits

 2029 12:18:06.513527  call enable_fixed_mtrr()

 2030 12:18:06.516797  CPU physical address size: 39 bits

 2031 12:18:06.520046  Fixed MTRRs   : CPU physical address size: 39 bits

 2032 12:18:06.523247  Enabled

 2033 12:18:06.526559  CPU physical address size: 39 bits

 2034 12:18:06.533227  MTRR: Fixed MSR 0x250 0x0606060606060606

 2035 12:18:06.536726  MTRR: Fixed MSR 0x250 0x0606060606060606

 2036 12:18:06.539634  MTRR: Fixed MSR 0x258 0x0606060606060606

 2037 12:18:06.542771  MTRR: Fixed MSR 0x259 0x0000000000000000

 2038 12:18:06.549394  MTRR: Fixed MSR 0x268 0x0606060606060606

 2039 12:18:06.552511  MTRR: Fixed MSR 0x269 0x0606060606060606

 2040 12:18:06.556215  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2041 12:18:06.559697  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2042 12:18:06.566102  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2043 12:18:06.569382  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2044 12:18:06.572817  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2045 12:18:06.575912  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2046 12:18:06.584113  MTRR: Fixed MSR 0x258 0x0606060606060606

 2047 12:18:06.587735  MTRR: Fixed MSR 0x259 0x0000000000000000

 2048 12:18:06.590674  MTRR: Fixed MSR 0x268 0x0606060606060606

 2049 12:18:06.594385  MTRR: Fixed MSR 0x269 0x0606060606060606

 2050 12:18:06.600558  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2051 12:18:06.603710  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2052 12:18:06.607174  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2053 12:18:06.610236  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2054 12:18:06.617435  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2055 12:18:06.620108  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2056 12:18:06.623514  call enable_fixed_mtrr()

 2057 12:18:06.627211  call enable_fixed_mtrr()

 2058 12:18:06.633443  Variable MTRRs: CPU physical address size: 39 bits

 2059 12:18:06.637000  CPU physical address size: 39 bits

 2060 12:18:06.637424  Enabled

 2061 12:18:06.640066  

 2062 12:18:06.643326  BS: BS_WRITE_TABLES exit times (exec / console): 379 / 153 ms

 2063 12:18:06.646494  Checking cr50 for pending updates

 2064 12:18:06.655342  Reading cr50 TPM mode

 2065 12:18:06.665472  BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 6 ms

 2066 12:18:06.675004  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2067 12:18:06.678655  Checking segment from ROM address 0xffc02b38

 2068 12:18:06.681453  Checking segment from ROM address 0xffc02b54

 2069 12:18:06.688331  Loading segment from ROM address 0xffc02b38

 2070 12:18:06.688686    code (compression=0)

 2071 12:18:06.698040    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2072 12:18:06.708208  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2073 12:18:06.708593  it's not compressed!

 2074 12:18:06.852766  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2075 12:18:06.859839  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2076 12:18:06.866469  Loading segment from ROM address 0xffc02b54

 2077 12:18:06.869325    Entry Point 0x30000000

 2078 12:18:06.869677  Loaded segments

 2079 12:18:06.875915  BS: BS_PAYLOAD_LOAD run times (exec / console): 141 / 63 ms

 2080 12:18:06.921586  Finalizing chipset.

 2081 12:18:06.924818  Finalizing SMM.

 2082 12:18:06.925172  APMC done.

 2083 12:18:06.931675  BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms

 2084 12:18:06.935171  mp_park_aps done after 0 msecs.

 2085 12:18:06.937810  Jumping to boot code at 0x30000000(0x76b25000)

 2086 12:18:06.947705  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2087 12:18:06.948129  

 2088 12:18:06.948385  

 2089 12:18:06.951691  

 2090 12:18:06.952151  Starting depthcharge on Voema...

 2091 12:18:06.953075  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2092 12:18:06.953433  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2093 12:18:06.953731  Setting prompt string to ['volteer:']
 2094 12:18:06.954021  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2095 12:18:06.954539  

 2096 12:18:06.961190  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2097 12:18:06.961545  

 2098 12:18:06.967729  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2099 12:18:06.967806  

 2100 12:18:06.974666  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2101 12:18:06.975021  

 2102 12:18:06.977845  Failed to find eMMC card reader

 2103 12:18:06.978342  

 2104 12:18:06.981627  Wipe memory regions:

 2105 12:18:06.982172  

 2106 12:18:06.984573  	[0x00000000001000, 0x000000000a0000)

 2107 12:18:06.985088  

 2108 12:18:06.987434  	[0x00000000100000, 0x00000030000000)

 2109 12:18:07.023211  

 2110 12:18:07.026482  	[0x00000032662db0, 0x000000769ef000)

 2111 12:18:07.076590  

 2112 12:18:07.079837  	[0x00000100000000, 0x00000480400000)

 2113 12:18:07.726552  

 2114 12:18:07.729652  ec_init: CrosEC protocol v3 supported (256, 256)

 2115 12:18:08.161519  

 2116 12:18:08.162058  R8152: Initializing

 2117 12:18:08.162363  

 2118 12:18:08.164611  Version 9 (ocp_data = 6010)

 2119 12:18:08.164996  

 2120 12:18:08.167777  R8152: Done initializing

 2121 12:18:08.168163  

 2122 12:18:08.171065  Adding net device

 2123 12:18:08.472101  

 2124 12:18:08.475686  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2125 12:18:08.476161  

 2126 12:18:08.476442  

 2127 12:18:08.476682  

 2128 12:18:08.479156  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2130 12:18:08.580406  volteer: tftpboot 192.168.201.1 12217920/tftp-deploy-qzwyws67/kernel/bzImage 12217920/tftp-deploy-qzwyws67/kernel/cmdline 12217920/tftp-deploy-qzwyws67/ramdisk/ramdisk.cpio.gz

 2131 12:18:08.581051  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2132 12:18:08.581492  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2133 12:18:08.586543  tftpboot 192.168.201.1 12217920/tftp-deploy-qzwyws67/kernel/bzIploy-qzwyws67/kernel/cmdline 12217920/tftp-deploy-qzwyws67/ramdisk/ramdisk.cpio.gz

 2134 12:18:08.587091  

 2135 12:18:08.587400  Waiting for link

 2136 12:18:08.789148  

 2137 12:18:08.789633  done.

 2138 12:18:08.789916  

 2139 12:18:08.790186  MAC: 00:e0:4c:68:05:b8

 2140 12:18:08.790423  

 2141 12:18:08.792451  Sending DHCP discover... done.

 2142 12:18:08.792863  

 2143 12:18:08.795634  Waiting for reply... done.

 2144 12:18:08.796008  

 2145 12:18:08.799406  Sending DHCP request... done.

 2146 12:18:08.799776  

 2147 12:18:08.808324  Waiting for reply... done.

 2148 12:18:08.808789  

 2149 12:18:08.809082  My ip is 192.168.201.11

 2150 12:18:08.809305  

 2151 12:18:08.814916  The DHCP server ip is 192.168.201.1

 2152 12:18:08.815280  

 2153 12:18:08.818094  TFTP server IP predefined by user: 192.168.201.1

 2154 12:18:08.818454  

 2155 12:18:08.825160  Bootfile predefined by user: 12217920/tftp-deploy-qzwyws67/kernel/bzImage

 2156 12:18:08.825644  

 2157 12:18:08.827933  Sending tftp read request... done.

 2158 12:18:08.828292  

 2159 12:18:08.835625  Waiting for the transfer... 

 2160 12:18:08.836018  

 2161 12:18:09.058806  00000000 ################################################################

 2162 12:18:09.058934  

 2163 12:18:09.280348  00080000 ################################################################

 2164 12:18:09.280469  

 2165 12:18:09.501860  00100000 ################################################################

 2166 12:18:09.502000  

 2167 12:18:09.725028  00180000 ################################################################

 2168 12:18:09.725143  

 2169 12:18:09.947642  00200000 ################################################################

 2170 12:18:09.947774  

 2171 12:18:10.169341  00280000 ################################################################

 2172 12:18:10.169483  

 2173 12:18:10.390296  00300000 ################################################################

 2174 12:18:10.390422  

 2175 12:18:10.611983  00380000 ################################################################

 2176 12:18:10.612116  

 2177 12:18:10.833865  00400000 ################################################################

 2178 12:18:10.833986  

 2179 12:18:11.054979  00480000 ################################################################

 2180 12:18:11.055099  

 2181 12:18:11.276442  00500000 ################################################################

 2182 12:18:11.276580  

 2183 12:18:11.496872  00580000 ################################################################

 2184 12:18:11.496986  

 2185 12:18:11.716911  00600000 ################################################################

 2186 12:18:11.717028  

 2187 12:18:11.937406  00680000 ################################################################

 2188 12:18:11.937525  

 2189 12:18:12.158800  00700000 ################################################################

 2190 12:18:12.158928  

 2191 12:18:12.381024  00780000 ################################################################

 2192 12:18:12.381154  

 2193 12:18:12.603534  00800000 ################################################################

 2194 12:18:12.603691  

 2195 12:18:12.823257  00880000 ################################################################

 2196 12:18:12.823489  

 2197 12:18:13.042743  00900000 ################################################################

 2198 12:18:13.042887  

 2199 12:18:13.262361  00980000 ################################################################

 2200 12:18:13.262517  

 2201 12:18:13.478499  00a00000 ################################################################

 2202 12:18:13.478643  

 2203 12:18:13.694885  00a80000 ################################################################

 2204 12:18:13.695070  

 2205 12:18:13.709081  00b00000 ##### done.

 2206 12:18:13.709195  

 2207 12:18:13.712508  The bootfile was 11571200 bytes long.

 2208 12:18:13.712579  

 2209 12:18:13.715935  Sending tftp read request... done.

 2210 12:18:13.716008  

 2211 12:18:13.719101  Waiting for the transfer... 

 2212 12:18:13.719161  

 2213 12:18:13.938942  00000000 ################################################################

 2214 12:18:13.939091  

 2215 12:18:14.156419  00080000 ################################################################

 2216 12:18:14.156572  

 2217 12:18:14.373890  00100000 ################################################################

 2218 12:18:14.374048  

 2219 12:18:14.597422  00180000 ################################################################

 2220 12:18:14.597549  

 2221 12:18:14.818581  00200000 ################################################################

 2222 12:18:14.818695  

 2223 12:18:15.040576  00280000 ################################################################

 2224 12:18:15.040702  

 2225 12:18:15.272634  00300000 ################################################################

 2226 12:18:15.272767  

 2227 12:18:15.498660  00380000 ################################################################

 2228 12:18:15.498787  

 2229 12:18:15.735586  00400000 ################################################################

 2230 12:18:15.735716  

 2231 12:18:15.958103  00480000 ################################################################

 2232 12:18:15.958233  

 2233 12:18:16.179137  00500000 ################################################################

 2234 12:18:16.179265  

 2235 12:18:16.402217  00580000 ################################################################

 2236 12:18:16.402349  

 2237 12:18:16.634808  00600000 ################################################################

 2238 12:18:16.634951  

 2239 12:18:16.874736  00680000 ################################################################

 2240 12:18:16.874867  

 2241 12:18:17.117339  00700000 ################################################################

 2242 12:18:17.117473  

 2243 12:18:17.360724  00780000 ################################################################

 2244 12:18:17.360862  

 2245 12:18:17.598473  00800000 ################################################################

 2246 12:18:17.598611  

 2247 12:18:17.743357  00880000 ####################################### done.

 2248 12:18:17.743498  

 2249 12:18:17.746506  Sending tftp read request... done.

 2250 12:18:17.746588  

 2251 12:18:17.749953  Waiting for the transfer... 

 2252 12:18:17.750027  

 2253 12:18:17.752806  00000000 # done.

 2254 12:18:17.752869  

 2255 12:18:17.763060  Command line loaded dynamically from TFTP file: 12217920/tftp-deploy-qzwyws67/kernel/cmdline

 2256 12:18:17.763136  

 2257 12:18:17.775625  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2258 12:18:17.782218  

 2259 12:18:17.785224  Shutting down all USB controllers.

 2260 12:18:17.785284  

 2261 12:18:17.785332  Removing current net device

 2262 12:18:17.785383  

 2263 12:18:17.788557  Finalizing coreboot

 2264 12:18:17.788615  

 2265 12:18:17.795138  Exiting depthcharge with code 4 at timestamp: 19440958

 2266 12:18:17.795202  

 2267 12:18:17.795252  

 2268 12:18:17.795305  Starting kernel ...

 2269 12:18:17.795372  

 2270 12:18:17.795429  

 2271 12:18:17.795779  end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
 2272 12:18:17.795865  start: 2.2.5 auto-login-action (timeout 00:04:34) [common]
 2273 12:18:17.795931  Setting prompt string to ['Linux version [0-9]']
 2274 12:18:17.796002  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2275 12:18:17.796066  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2277 12:22:51.796111  end: 2.2.5 auto-login-action (duration 00:04:34) [common]
 2279 12:22:51.796399  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 274 seconds'
 2281 12:22:51.796630  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2284 12:22:51.797005  end: 2 depthcharge-action (duration 00:05:00) [common]
 2286 12:22:51.797302  Cleaning after the job
 2287 12:22:51.797382  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217920/tftp-deploy-qzwyws67/ramdisk
 2288 12:22:51.798324  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217920/tftp-deploy-qzwyws67/kernel
 2289 12:22:51.799354  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217920/tftp-deploy-qzwyws67/modules
 2290 12:22:51.799744  start: 5.1 power-off (timeout 00:00:30) [common]
 2291 12:22:51.799873  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-16' '--port=1' '--command=off'
 2292 12:22:51.871056  >> Command sent successfully.

 2293 12:22:51.873322  Returned 0 in 0 seconds
 2294 12:22:51.973686  end: 5.1 power-off (duration 00:00:00) [common]
 2296 12:22:51.974065  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2297 12:22:51.974292  Listened to connection for namespace 'common' for up to 1s
 2298 12:22:52.975400  Finalising connection for namespace 'common'
 2299 12:22:52.975932  Disconnecting from shell: Finalise
 2300 12:22:52.976286  

 2301 12:22:53.076883  end: 5.2 read-feedback (duration 00:00:01) [common]
 2302 12:22:53.077042  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12217920
 2303 12:22:53.087417  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12217920
 2304 12:22:53.087567  JobError: Your job cannot terminate cleanly.