Boot log: acer-cbv514-1h-34uz-brya
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 12:17:24.311584 lava-dispatcher, installed at version: 2023.10
2 12:17:24.311800 start: 0 validate
3 12:17:24.311935 Start time: 2023-12-08 12:17:24.311925+00:00 (UTC)
4 12:17:24.312058 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:17:24.312189 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 12:17:24.596308 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:17:24.597155 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:17:24.911565 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:17:24.912319 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:17:29.042766 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:17:29.042952 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:17:29.324976 validate duration: 5.01
14 12:17:29.325269 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:17:29.325372 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:17:29.325462 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:17:29.325588 Not decompressing ramdisk as can be used compressed.
18 12:17:29.325674 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 12:17:29.325739 saving as /var/lib/lava/dispatcher/tmp/12217868/tftp-deploy-g6n76l_6/ramdisk/initrd.cpio.gz
20 12:17:29.325807 total size: 5432690 (5 MB)
21 12:17:30.016814 progress 0 % (0 MB)
22 12:17:30.018512 progress 5 % (0 MB)
23 12:17:30.019962 progress 10 % (0 MB)
24 12:17:30.021437 progress 15 % (0 MB)
25 12:17:30.023033 progress 20 % (1 MB)
26 12:17:30.024483 progress 25 % (1 MB)
27 12:17:30.025916 progress 30 % (1 MB)
28 12:17:30.027484 progress 35 % (1 MB)
29 12:17:30.028900 progress 40 % (2 MB)
30 12:17:30.030307 progress 45 % (2 MB)
31 12:17:30.031712 progress 50 % (2 MB)
32 12:17:30.033274 progress 55 % (2 MB)
33 12:17:30.034688 progress 60 % (3 MB)
34 12:17:30.036083 progress 65 % (3 MB)
35 12:17:30.037696 progress 70 % (3 MB)
36 12:17:30.039093 progress 75 % (3 MB)
37 12:17:30.040498 progress 80 % (4 MB)
38 12:17:30.041954 progress 85 % (4 MB)
39 12:17:30.043529 progress 90 % (4 MB)
40 12:17:30.044943 progress 95 % (4 MB)
41 12:17:30.046401 progress 100 % (5 MB)
42 12:17:30.046617 5 MB downloaded in 0.72 s (7.19 MB/s)
43 12:17:30.046776 end: 1.1.1 http-download (duration 00:00:01) [common]
45 12:17:30.047028 end: 1.1 download-retry (duration 00:00:01) [common]
46 12:17:30.047118 start: 1.2 download-retry (timeout 00:09:59) [common]
47 12:17:30.047205 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 12:17:30.047344 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:17:30.047419 saving as /var/lib/lava/dispatcher/tmp/12217868/tftp-deploy-g6n76l_6/kernel/bzImage
50 12:17:30.047481 total size: 11571200 (11 MB)
51 12:17:30.047543 No compression specified
52 12:17:30.048642 progress 0 % (0 MB)
53 12:17:30.051680 progress 5 % (0 MB)
54 12:17:30.054880 progress 10 % (1 MB)
55 12:17:30.057867 progress 15 % (1 MB)
56 12:17:30.061080 progress 20 % (2 MB)
57 12:17:30.064169 progress 25 % (2 MB)
58 12:17:30.067163 progress 30 % (3 MB)
59 12:17:30.070404 progress 35 % (3 MB)
60 12:17:30.073799 progress 40 % (4 MB)
61 12:17:30.076793 progress 45 % (4 MB)
62 12:17:30.079936 progress 50 % (5 MB)
63 12:17:30.083088 progress 55 % (6 MB)
64 12:17:30.086074 progress 60 % (6 MB)
65 12:17:30.089266 progress 65 % (7 MB)
66 12:17:30.092311 progress 70 % (7 MB)
67 12:17:30.095233 progress 75 % (8 MB)
68 12:17:30.098433 progress 80 % (8 MB)
69 12:17:30.101470 progress 85 % (9 MB)
70 12:17:30.104345 progress 90 % (9 MB)
71 12:17:30.107428 progress 95 % (10 MB)
72 12:17:30.110569 progress 100 % (11 MB)
73 12:17:30.110689 11 MB downloaded in 0.06 s (174.59 MB/s)
74 12:17:30.110840 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:17:30.111080 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:17:30.111170 start: 1.3 download-retry (timeout 00:09:59) [common]
78 12:17:30.111260 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 12:17:30.111406 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 12:17:30.111476 saving as /var/lib/lava/dispatcher/tmp/12217868/tftp-deploy-g6n76l_6/nfsrootfs/full.rootfs.tar
81 12:17:30.111540 total size: 133380384 (127 MB)
82 12:17:30.111604 Using unxz to decompress xz
83 12:17:30.115500 progress 0 % (0 MB)
84 12:17:30.460155 progress 5 % (6 MB)
85 12:17:30.823127 progress 10 % (12 MB)
86 12:17:31.114527 progress 15 % (19 MB)
87 12:17:31.302718 progress 20 % (25 MB)
88 12:17:31.547225 progress 25 % (31 MB)
89 12:17:31.895755 progress 30 % (38 MB)
90 12:17:32.244698 progress 35 % (44 MB)
91 12:17:32.651539 progress 40 % (50 MB)
92 12:17:33.044740 progress 45 % (57 MB)
93 12:17:33.406902 progress 50 % (63 MB)
94 12:17:33.783213 progress 55 % (69 MB)
95 12:17:34.145773 progress 60 % (76 MB)
96 12:17:34.511833 progress 65 % (82 MB)
97 12:17:34.882091 progress 70 % (89 MB)
98 12:17:35.254096 progress 75 % (95 MB)
99 12:17:35.702006 progress 80 % (101 MB)
100 12:17:36.139303 progress 85 % (108 MB)
101 12:17:36.409686 progress 90 % (114 MB)
102 12:17:36.764876 progress 95 % (120 MB)
103 12:17:37.169054 progress 100 % (127 MB)
104 12:17:37.174643 127 MB downloaded in 7.06 s (18.01 MB/s)
105 12:17:37.174943 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:17:37.175226 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:17:37.175319 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:17:37.175409 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:17:37.175582 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:17:37.175681 saving as /var/lib/lava/dispatcher/tmp/12217868/tftp-deploy-g6n76l_6/modules/modules.tar
112 12:17:37.175747 total size: 483904 (0 MB)
113 12:17:37.175814 Using unxz to decompress xz
114 12:17:37.179726 progress 6 % (0 MB)
115 12:17:37.180168 progress 13 % (0 MB)
116 12:17:37.180471 progress 20 % (0 MB)
117 12:17:37.182134 progress 27 % (0 MB)
118 12:17:37.184424 progress 33 % (0 MB)
119 12:17:37.186470 progress 40 % (0 MB)
120 12:17:37.188399 progress 47 % (0 MB)
121 12:17:37.190371 progress 54 % (0 MB)
122 12:17:37.192313 progress 60 % (0 MB)
123 12:17:37.194380 progress 67 % (0 MB)
124 12:17:37.196401 progress 74 % (0 MB)
125 12:17:37.198500 progress 81 % (0 MB)
126 12:17:37.200395 progress 88 % (0 MB)
127 12:17:37.202411 progress 94 % (0 MB)
128 12:17:37.204807 progress 100 % (0 MB)
129 12:17:37.211326 0 MB downloaded in 0.04 s (12.97 MB/s)
130 12:17:37.211610 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:17:37.211906 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:17:37.212016 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 12:17:37.212135 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 12:17:39.532719 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12217868/extract-nfsrootfs-1sjityoo
136 12:17:39.532943 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 12:17:39.533150 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 12:17:39.533385 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn
139 12:17:39.533577 makedir: /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin
140 12:17:39.533729 makedir: /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/tests
141 12:17:39.533885 makedir: /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/results
142 12:17:39.534037 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-add-keys
143 12:17:39.534246 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-add-sources
144 12:17:39.534425 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-background-process-start
145 12:17:39.534563 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-background-process-stop
146 12:17:39.534694 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-common-functions
147 12:17:39.534854 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-echo-ipv4
148 12:17:39.534985 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-install-packages
149 12:17:39.535112 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-installed-packages
150 12:17:39.535238 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-os-build
151 12:17:39.535366 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-probe-channel
152 12:17:39.535501 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-probe-ip
153 12:17:39.535628 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-target-ip
154 12:17:39.535756 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-target-mac
155 12:17:39.535881 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-target-storage
156 12:17:39.536009 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-test-case
157 12:17:39.536140 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-test-event
158 12:17:39.536265 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-test-feedback
159 12:17:39.536391 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-test-raise
160 12:17:39.536518 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-test-reference
161 12:17:39.536645 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-test-runner
162 12:17:39.536773 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-test-set
163 12:17:39.536898 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-test-shell
164 12:17:39.537069 Updating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-install-packages (oe)
165 12:17:39.537225 Updating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/bin/lava-installed-packages (oe)
166 12:17:39.537358 Creating /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/environment
167 12:17:39.537460 LAVA metadata
168 12:17:39.537533 - LAVA_JOB_ID=12217868
169 12:17:39.537599 - LAVA_DISPATCHER_IP=192.168.201.1
170 12:17:39.537703 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 12:17:39.537771 skipped lava-vland-overlay
172 12:17:39.537847 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 12:17:39.537928 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 12:17:39.537991 skipped lava-multinode-overlay
175 12:17:39.538066 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 12:17:39.538146 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 12:17:39.538220 Loading test definitions
178 12:17:39.538313 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
179 12:17:39.538385 Using /lava-12217868 at stage 0
180 12:17:39.538703 uuid=12217868_1.5.2.3.1 testdef=None
181 12:17:39.538793 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 12:17:39.538879 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
183 12:17:39.539388 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 12:17:39.539615 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
186 12:17:39.540255 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 12:17:39.540484 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
189 12:17:39.541306 runner path: /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/0/tests/0_dmesg test_uuid 12217868_1.5.2.3.1
190 12:17:39.541464 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 12:17:39.541692 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
193 12:17:39.541764 Using /lava-12217868 at stage 1
194 12:17:39.542072 uuid=12217868_1.5.2.3.5 testdef=None
195 12:17:39.542162 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 12:17:39.542248 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
197 12:17:39.542722 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 12:17:39.542937 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
200 12:17:39.543605 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 12:17:39.543835 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
203 12:17:39.544462 runner path: /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/1/tests/1_bootrr test_uuid 12217868_1.5.2.3.5
204 12:17:39.544614 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 12:17:39.544820 Creating lava-test-runner.conf files
207 12:17:39.544883 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/0 for stage 0
208 12:17:39.544988 - 0_dmesg
209 12:17:39.545073 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217868/lava-overlay-uye6nxcn/lava-12217868/1 for stage 1
210 12:17:39.545171 - 1_bootrr
211 12:17:39.545273 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 12:17:39.545363 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
213 12:17:39.552594 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 12:17:39.552732 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
215 12:17:39.552851 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 12:17:39.552969 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 12:17:39.553086 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
218 12:17:39.686842 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 12:17:39.687231 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
220 12:17:39.687356 extracting modules file /var/lib/lava/dispatcher/tmp/12217868/tftp-deploy-g6n76l_6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217868/extract-nfsrootfs-1sjityoo
221 12:17:39.707938 extracting modules file /var/lib/lava/dispatcher/tmp/12217868/tftp-deploy-g6n76l_6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217868/extract-overlay-ramdisk-fo4zo5kr/ramdisk
222 12:17:39.728396 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 12:17:39.728544 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
224 12:17:39.728637 [common] Applying overlay to NFS
225 12:17:39.728710 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12217868/compress-overlay-mxvhgz3_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12217868/extract-nfsrootfs-1sjityoo
226 12:17:39.736781 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 12:17:39.736896 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
228 12:17:39.737010 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 12:17:39.737116 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
230 12:17:39.737196 Building ramdisk /var/lib/lava/dispatcher/tmp/12217868/extract-overlay-ramdisk-fo4zo5kr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12217868/extract-overlay-ramdisk-fo4zo5kr/ramdisk
231 12:17:39.834467 >> 30353 blocks
232 12:17:40.424779 rename /var/lib/lava/dispatcher/tmp/12217868/extract-overlay-ramdisk-fo4zo5kr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12217868/tftp-deploy-g6n76l_6/ramdisk/ramdisk.cpio.gz
233 12:17:40.425255 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 12:17:40.425387 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
235 12:17:40.425493 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
236 12:17:40.425591 No mkimage arch provided, not using FIT.
237 12:17:40.425682 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 12:17:40.425769 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 12:17:40.425875 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
240 12:17:40.425969 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
241 12:17:40.426048 No LXC device requested
242 12:17:40.426130 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 12:17:40.426221 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
244 12:17:40.426302 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 12:17:40.426380 Checking files for TFTP limit of 4294967296 bytes.
246 12:17:40.426787 end: 1 tftp-deploy (duration 00:00:11) [common]
247 12:17:40.426896 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 12:17:40.426990 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 12:17:40.427117 substitutions:
250 12:17:40.427189 - {DTB}: None
251 12:17:40.427255 - {INITRD}: 12217868/tftp-deploy-g6n76l_6/ramdisk/ramdisk.cpio.gz
252 12:17:40.427316 - {KERNEL}: 12217868/tftp-deploy-g6n76l_6/kernel/bzImage
253 12:17:40.427376 - {LAVA_MAC}: None
254 12:17:40.427435 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12217868/extract-nfsrootfs-1sjityoo
255 12:17:40.427494 - {NFS_SERVER_IP}: 192.168.201.1
256 12:17:40.427552 - {PRESEED_CONFIG}: None
257 12:17:40.427609 - {PRESEED_LOCAL}: None
258 12:17:40.427666 - {RAMDISK}: 12217868/tftp-deploy-g6n76l_6/ramdisk/ramdisk.cpio.gz
259 12:17:40.427723 - {ROOT_PART}: None
260 12:17:40.427779 - {ROOT}: None
261 12:17:40.427835 - {SERVER_IP}: 192.168.201.1
262 12:17:40.427890 - {TEE}: None
263 12:17:40.427946 Parsed boot commands:
264 12:17:40.428002 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 12:17:40.428218 Parsed boot commands: tftpboot 192.168.201.1 12217868/tftp-deploy-g6n76l_6/kernel/bzImage 12217868/tftp-deploy-g6n76l_6/kernel/cmdline 12217868/tftp-deploy-g6n76l_6/ramdisk/ramdisk.cpio.gz
266 12:17:40.428311 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 12:17:40.428397 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 12:17:40.428493 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 12:17:40.428582 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 12:17:40.428655 Not connected, no need to disconnect.
271 12:17:40.428732 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 12:17:40.428814 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 12:17:40.428883 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-10'
274 12:17:40.432441 Setting prompt string to ['lava-test: # ']
275 12:17:40.432796 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 12:17:40.432902 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 12:17:40.433038 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 12:17:40.433132 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 12:17:40.433548 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-10' '--port=1' '--command=reboot'
280 12:17:45.563824 >> Command sent successfully.
281 12:17:45.566540 Returned 0 in 5 seconds
282 12:17:45.666963 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 12:17:45.667311 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 12:17:45.667417 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 12:17:45.667509 Setting prompt string to 'Starting depthcharge on Volmar...'
287 12:17:45.667580 Changing prompt to 'Starting depthcharge on Volmar...'
288 12:17:45.667647 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
289 12:17:45.667911 [Enter `^Ec?' for help]
290 12:17:47.044948
291 12:17:47.045184
292 12:17:47.052420 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
293 12:17:47.055991 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
294 12:17:47.059759 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
295 12:17:47.067324 CPU: AES supported, TXT NOT supported, VT supported
296 12:17:47.074963 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
297 12:17:47.075050 Cache size = 10 MiB
298 12:17:47.082776 MCH: device id 4609 (rev 04) is Alderlake-P
299 12:17:47.086129 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
300 12:17:47.089817 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
301 12:17:47.094119 VBOOT: Loading verstage.
302 12:17:47.097498 FMAP: Found "FLASH" version 1.1 at 0x1804000.
303 12:17:47.101525 FMAP: base = 0x0 size = 0x2000000 #areas = 37
304 12:17:47.108400 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
305 12:17:47.115951 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
306 12:17:47.123709 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
307 12:17:47.123796
308 12:17:47.123864
309 12:17:47.131103 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
310 12:17:47.139833 Probing TPM I2C: I2C bus 1 version 0x3230302a
311 12:17:47.143397 DW I2C bus 1 at 0xfe022000 (400 KHz)
312 12:17:47.147088 I2C TX abort detected (00000001)
313 12:17:47.150356 cr50_i2c_read: Address write failed
314 12:17:47.161402 .done! DID_VID 0x00281ae0
315 12:17:47.165254 TPM ready after 0 ms
316 12:17:47.169178 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
317 12:17:47.179552 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
318 12:17:47.186564 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
319 12:17:47.270598 tlcl_send_startup: Startup return code is 0
320 12:17:47.270728 TPM: setup succeeded
321 12:17:47.289755 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
322 12:17:47.313047 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
323 12:17:47.316225 Chrome EC: UHEPI supported
324 12:17:47.319779 Reading cr50 boot mode
325 12:17:47.335247 Cr50 says boot_mode is VERIFIED_RW(0x00).
326 12:17:47.335337 Phase 1
327 12:17:47.341862 FMAP: area GBB found @ 1805000 (458752 bytes)
328 12:17:47.348683 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
329 12:17:47.355172 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
330 12:17:47.361900 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
331 12:17:47.361986 Phase 2
332 12:17:47.365761 Phase 3
333 12:17:47.369662 FMAP: area GBB found @ 1805000 (458752 bytes)
334 12:17:47.372853 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
335 12:17:47.380682 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
336 12:17:47.384116 VB2:vb2_verify_keyblock() Checking keyblock signature...
337 12:17:47.391212 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
338 12:17:47.398496 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
339 12:17:47.408538 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
340 12:17:47.420290 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
341 12:17:47.423878 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
342 12:17:47.430585 VB2:vb2_verify_fw_preamble() Verifying preamble.
343 12:17:47.437295 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
344 12:17:47.443570 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
345 12:17:47.450196 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
346 12:17:47.454528 Phase 4
347 12:17:47.457966 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
348 12:17:47.464502 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
349 12:17:47.676857 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
350 12:17:47.683491 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
351 12:17:47.686784 Saving vboot hash.
352 12:17:47.693499 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
353 12:17:47.709364 tlcl_extend: response is 0
354 12:17:47.716084 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
355 12:17:47.722694 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
356 12:17:47.738517 tlcl_extend: response is 0
357 12:17:47.745417 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
358 12:17:47.763735 tlcl_lock_nv_write: response is 0
359 12:17:47.781784 tlcl_lock_nv_write: response is 0
360 12:17:47.781872 Slot A is selected
361 12:17:47.787959 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
362 12:17:47.794765 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
363 12:17:47.801395 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
364 12:17:47.808128 BS: verstage times (exec / console): total (unknown) / 264 ms
365 12:17:47.808214
366 12:17:47.808281
367 12:17:47.814890 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
368 12:17:47.819644 Google Chrome EC: version:
369 12:17:47.822957 ro: volmar_v2.0.14126-e605144e9c
370 12:17:47.825997 rw: volmar_v0.0.55-22d1557
371 12:17:47.829448 running image: 2
372 12:17:47.832758 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
373 12:17:47.842809 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
374 12:17:47.849478 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
375 12:17:47.856358 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
376 12:17:47.866057 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
377 12:17:47.876382 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
378 12:17:47.879851 EC took 942us to calculate image hash
379 12:17:47.889723 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
380 12:17:47.892903 VB2:sync_ec() select_rw=RW(active)
381 12:17:47.904646 Waited 274us to clear limit power flag.
382 12:17:47.907793 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
383 12:17:47.910920 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
384 12:17:47.914374 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
385 12:17:47.921146 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
386 12:17:47.924547 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
387 12:17:47.927839 TCO_STS: 0000 0000
388 12:17:47.931110 GEN_PMCON: d0015038 00002200
389 12:17:47.934335 GBLRST_CAUSE: 00000000 00000000
390 12:17:47.934447 HPR_CAUSE0: 00000000
391 12:17:47.937987 prev_sleep_state 5
392 12:17:47.941025 Abort disabling TXT, as CPU is not TXT capable.
393 12:17:47.949142 cse_lite: Number of partitions = 3
394 12:17:47.952405 cse_lite: Current partition = RO
395 12:17:47.952544 cse_lite: Next partition = RO
396 12:17:47.955854 cse_lite: Flags = 0x7
397 12:17:47.962597 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
398 12:17:47.972866 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
399 12:17:47.975824 FMAP: area SI_ME found @ 1000 (5238784 bytes)
400 12:17:47.982877 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
401 12:17:47.989214 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
402 12:17:47.996011 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
403 12:17:47.999331 cse_lite: CSE CBFS RW version : 16.1.25.2049
404 12:17:48.005993 cse_lite: Set Boot Partition Info Command (RW)
405 12:17:48.009109 HECI: Global Reset(Type:1) Command
406 12:17:49.432851
407 12:17:49.433036
408 12:17:49.433119 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
409 12:17:49.439647 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
410 12:17:49.439756 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
411 12:17:49.449697 CPU: AES supported, TXT NOT supported, VT supported
412 12:17:49.450158 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
413 12:17:49.454504 Cache size = 10 MiB
414 12:17:49.454611 MCH: device id 4609 (rev 04) is Alderlake-P
415 12:17:49.493676 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
416 12:17:49.494067 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
417 12:17:49.494223 VBOOT: Loading verstage.
418 12:17:49.494324 FMAP: Found "FLASH" version 1.1 at 0x1804000.
419 12:17:49.494418 FMAP: base = 0x0 size = 0x2000000 #areas = 37
420 12:17:49.494533 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
421 12:17:49.494628 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
422 12:17:49.509324 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
423 12:17:49.509421
424 12:17:49.509490
425 12:17:49.509831 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
426 12:17:49.527154 Probing TPM I2C: I2C bus 1 version 0x3230302a
427 12:17:49.534492 DW I2C bus 1 at 0xfe022000 (400 KHz)
428 12:17:49.660435 Cr50 i2c TPM IRQ timeout!
429 12:17:49.673056 .done! DID_VID 0x00281ae0
430 12:17:49.676388 TPM ready after 0 ms
431 12:17:49.679532 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
432 12:17:49.693528 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
433 12:17:49.700175 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
434 12:17:49.746831 tlcl_send_startup: Startup return code is 0
435 12:17:49.746927 TPM: setup succeeded
436 12:17:49.766566 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
437 12:17:49.788625 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
438 12:17:49.792356 Chrome EC: UHEPI supported
439 12:17:49.795746 Reading cr50 boot mode
440 12:17:49.810574 Cr50 says boot_mode is VERIFIED_RW(0x00).
441 12:17:49.810660 Phase 1
442 12:17:49.817525 FMAP: area GBB found @ 1805000 (458752 bytes)
443 12:17:49.823815 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
444 12:17:49.830641 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
445 12:17:49.837463 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
446 12:17:49.837547 Phase 2
447 12:17:49.840849 Phase 3
448 12:17:49.844098 FMAP: area GBB found @ 1805000 (458752 bytes)
449 12:17:49.850781 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
450 12:17:49.854119 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
451 12:17:49.861006 VB2:vb2_verify_keyblock() Checking keyblock signature...
452 12:17:49.867599 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
453 12:17:49.874019 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
454 12:17:49.883993 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
455 12:17:49.895998 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
456 12:17:49.898894 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
457 12:17:49.905614 VB2:vb2_verify_fw_preamble() Verifying preamble.
458 12:17:49.912306 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
459 12:17:49.918897 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
460 12:17:49.925861 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
461 12:17:49.929562 Phase 4
462 12:17:49.933230 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
463 12:17:49.939894 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
464 12:17:50.151904 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
465 12:17:50.158607 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
466 12:17:50.162145 Saving vboot hash.
467 12:17:50.168094 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
468 12:17:50.184216 tlcl_extend: response is 0
469 12:17:50.191014 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
470 12:17:50.197369 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
471 12:17:50.212079 tlcl_extend: response is 0
472 12:17:50.218794 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
473 12:17:50.241562 tlcl_lock_nv_write: response is 0
474 12:17:50.258970 tlcl_lock_nv_write: response is 0
475 12:17:50.259056 Slot A is selected
476 12:17:50.265796 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
477 12:17:50.272869 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
478 12:17:50.279257 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
479 12:17:50.285881 BS: verstage times (exec / console): total (unknown) / 259 ms
480 12:17:50.286008
481 12:17:50.286098
482 12:17:50.292572 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
483 12:17:50.296846 Google Chrome EC: version:
484 12:17:50.299995 ro: volmar_v2.0.14126-e605144e9c
485 12:17:50.303552 rw: volmar_v0.0.55-22d1557
486 12:17:50.306993 running image: 2
487 12:17:50.309981 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
488 12:17:50.320005 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
489 12:17:50.326797 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
490 12:17:50.333631 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
491 12:17:50.343486 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
492 12:17:50.353400 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
493 12:17:50.357187 EC took 939us to calculate image hash
494 12:17:50.367114 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
495 12:17:50.370162 VB2:sync_ec() select_rw=RW(active)
496 12:17:50.381950 Waited 594us to clear limit power flag.
497 12:17:50.385631 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
498 12:17:50.388539 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
499 12:17:50.395297 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
500 12:17:50.398569 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
501 12:17:50.402025 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
502 12:17:50.404954 TCO_STS: 0000 0000
503 12:17:50.408564 GEN_PMCON: d1001038 00002200
504 12:17:50.411994 GBLRST_CAUSE: 00000040 00000000
505 12:17:50.412435 HPR_CAUSE0: 00000000
506 12:17:50.415313 prev_sleep_state 5
507 12:17:50.418746 Abort disabling TXT, as CPU is not TXT capable.
508 12:17:50.426451 cse_lite: Number of partitions = 3
509 12:17:50.429993 cse_lite: Current partition = RW
510 12:17:50.430423 cse_lite: Next partition = RW
511 12:17:50.433035 cse_lite: Flags = 0x7
512 12:17:50.439634 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
513 12:17:50.449802 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
514 12:17:50.453463 FMAP: area SI_ME found @ 1000 (5238784 bytes)
515 12:17:50.459890 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
516 12:17:50.466467 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
517 12:17:50.473494 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
518 12:17:50.476293 cse_lite: CSE CBFS RW version : 16.1.25.2049
519 12:17:50.479866 Boot Count incremented to 6017
520 12:17:50.486573 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
521 12:17:50.493389 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
522 12:17:50.506094 Probing TPM I2C: done! DID_VID 0x00281ae0
523 12:17:50.509039 Locality already claimed
524 12:17:50.512645 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
525 12:17:50.531962 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
526 12:17:50.538703 MRC: Hash idx 0x100d comparison successful.
527 12:17:50.542013 MRC cache found, size f6c8
528 12:17:50.542433 bootmode is set to: 2
529 12:17:50.545591 EC returned error result code 3
530 12:17:50.548921 FW_CONFIG value from CBI is 0x131
531 12:17:50.555717 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
532 12:17:50.559425 SPD index = 0
533 12:17:50.565789 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
534 12:17:50.566221 SPD: module type is LPDDR4X
535 12:17:50.572771 SPD: module part number is K4U6E3S4AB-MGCL
536 12:17:50.579485 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
537 12:17:50.582794 SPD: device width 16 bits, bus width 16 bits
538 12:17:50.585696 SPD: module size is 1024 MB (per channel)
539 12:17:50.654573 CBMEM:
540 12:17:50.657772 IMD: root @ 0x76fff000 254 entries.
541 12:17:50.660869 IMD: root @ 0x76ffec00 62 entries.
542 12:17:50.669029 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
543 12:17:50.672524 RO_VPD is uninitialized or empty.
544 12:17:50.675828 FMAP: area RW_VPD found @ f29000 (8192 bytes)
545 12:17:50.682462 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
546 12:17:50.685995 External stage cache:
547 12:17:50.689250 IMD: root @ 0x7bbff000 254 entries.
548 12:17:50.692583 IMD: root @ 0x7bbfec00 62 entries.
549 12:17:50.699397 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
550 12:17:50.705866 MRC: Checking cached data update for 'RW_MRC_CACHE'.
551 12:17:50.709122 MRC: 'RW_MRC_CACHE' does not need update.
552 12:17:50.709207 8 DIMMs found
553 12:17:50.712434 SMM Memory Map
554 12:17:50.716031 SMRAM : 0x7b800000 0x800000
555 12:17:50.718924 Subregion 0: 0x7b800000 0x200000
556 12:17:50.722577 Subregion 1: 0x7ba00000 0x200000
557 12:17:50.725854 Subregion 2: 0x7bc00000 0x400000
558 12:17:50.729019 top_of_ram = 0x77000000
559 12:17:50.732332 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
560 12:17:50.739056 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
561 12:17:50.745694 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
562 12:17:50.749022 MTRR Range: Start=ff000000 End=0 (Size 1000000)
563 12:17:50.749107 Normal boot
564 12:17:50.758956 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
565 12:17:50.766044 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
566 12:17:50.772178 Processing 237 relocs. Offset value of 0x74ab9000
567 12:17:50.780450 BS: romstage times (exec / console): total (unknown) / 377 ms
568 12:17:50.787725
569 12:17:50.787810
570 12:17:50.794494 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
571 12:17:50.794579 Normal boot
572 12:17:50.800890 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
573 12:17:50.808143 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
574 12:17:50.815464 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
575 12:17:50.821876 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
576 12:17:50.872576 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
577 12:17:50.878891 Processing 5931 relocs. Offset value of 0x72a2f000
578 12:17:50.882640 BS: postcar times (exec / console): total (unknown) / 51 ms
579 12:17:50.885729
580 12:17:50.885819
581 12:17:50.892475 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
582 12:17:50.895931 Reserving BERT start 76a1e000, size 10000
583 12:17:50.898926 Normal boot
584 12:17:50.902619 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
585 12:17:50.908945 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
586 12:17:50.918943 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
587 12:17:50.922440 FMAP: area RW_VPD found @ f29000 (8192 bytes)
588 12:17:50.925713 Google Chrome EC: version:
589 12:17:50.929155 ro: volmar_v2.0.14126-e605144e9c
590 12:17:50.932273 rw: volmar_v0.0.55-22d1557
591 12:17:50.932357 running image: 2
592 12:17:50.938876 ACPI _SWS is PM1 Index 8 GPE Index -1
593 12:17:50.942412 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
594 12:17:50.946243 EC returned error result code 3
595 12:17:50.949619 FW_CONFIG value from CBI is 0x131
596 12:17:50.956338 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
597 12:17:50.959561 PCI: 00:1c.2 disabled by fw_config
598 12:17:50.966454 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
599 12:17:50.969878 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
600 12:17:50.976265 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
601 12:17:50.979677 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
602 12:17:50.986317 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
603 12:17:50.992790 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
604 12:17:50.999666 microcode: sig=0x906a4 pf=0x80 revision=0x423
605 12:17:51.002994 microcode: Update skipped, already up-to-date
606 12:17:51.009660 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
607 12:17:51.041799 Detected 6 core, 8 thread CPU.
608 12:17:51.045360 Setting up SMI for CPU
609 12:17:51.048468 IED base = 0x7bc00000
610 12:17:51.048552 IED size = 0x00400000
611 12:17:51.051686 Will perform SMM setup.
612 12:17:51.055362 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
613 12:17:51.058578 LAPIC 0x0 in XAPIC mode.
614 12:17:51.068673 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
615 12:17:51.071964 Processing 18 relocs. Offset value of 0x00030000
616 12:17:51.076632 Attempting to start 7 APs
617 12:17:51.079882 Waiting for 10ms after sending INIT.
618 12:17:51.092979 Waiting for SIPI to complete...
619 12:17:51.096102 LAPIC 0x1 in XAPIC mode.
620 12:17:51.099231 LAPIC 0x1a in XAPIC mode.
621 12:17:51.102932 LAPIC 0x18 in XAPIC mode.
622 12:17:51.106314 LAPIC 0x1c in XAPIC mode.
623 12:17:51.109341 AP: slot 2 apic_id 18, MCU rev: 0x00000423
624 12:17:51.112824 LAPIC 0x9 in XAPIC mode.
625 12:17:51.116208 AP: slot 4 apic_id 1c, MCU rev: 0x00000423
626 12:17:51.116294 done.
627 12:17:51.119597 AP: slot 5 apic_id 1, MCU rev: 0x00000423
628 12:17:51.126236 AP: slot 3 apic_id 1a, MCU rev: 0x00000423
629 12:17:51.126320 LAPIC 0x8 in XAPIC mode.
630 12:17:51.129499 LAPIC 0x1e in XAPIC mode.
631 12:17:51.136250 AP: slot 7 apic_id 8, MCU rev: 0x00000423
632 12:17:51.139264 AP: slot 1 apic_id 1e, MCU rev: 0x00000423
633 12:17:51.142482 Waiting for SIPI to complete...
634 12:17:51.142567 done.
635 12:17:51.146158 AP: slot 6 apic_id 9, MCU rev: 0x00000423
636 12:17:51.149297 smm_setup_relocation_handler: enter
637 12:17:51.152593 smm_setup_relocation_handler: exit
638 12:17:51.162488 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
639 12:17:51.165889 Processing 11 relocs. Offset value of 0x00038000
640 12:17:51.172834 smm_module_setup_stub: stack_top = 0x7b804000
641 12:17:51.176210 smm_module_setup_stub: per cpu stack_size = 0x800
642 12:17:51.182446 smm_module_setup_stub: runtime.start32_offset = 0x4c
643 12:17:51.185824 smm_module_setup_stub: runtime.smm_size = 0x10000
644 12:17:51.192476 SMM Module: stub loaded at 38000. Will call 0x76a52094
645 12:17:51.195900 Installing permanent SMM handler to 0x7b800000
646 12:17:51.202493 smm_load_module: total_smm_space_needed e468, available -> 200000
647 12:17:51.212381 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
648 12:17:51.215941 Processing 255 relocs. Offset value of 0x7b9f6000
649 12:17:51.222255 smm_load_module: smram_start: 0x7b800000
650 12:17:51.226026 smm_load_module: smram_end: 7ba00000
651 12:17:51.229203 smm_load_module: handler start 0x7b9f6d5f
652 12:17:51.232634 smm_load_module: handler_size 98d0
653 12:17:51.235572 smm_load_module: fxsave_area 0x7b9ff000
654 12:17:51.238870 smm_load_module: fxsave_size 1000
655 12:17:51.242284 smm_load_module: CONFIG_MSEG_SIZE 0x0
656 12:17:51.249125 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
657 12:17:51.255779 smm_load_module: handler_mod_params.smbase = 0x7b800000
658 12:17:51.259180 smm_load_module: per_cpu_save_state_size = 0x400
659 12:17:51.262129 smm_load_module: num_cpus = 0x8
660 12:17:51.268927 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
661 12:17:51.272209 smm_load_module: total_save_state_size = 0x2000
662 12:17:51.275463 smm_load_module: cpu0 entry: 7b9e6000
663 12:17:51.282199 smm_create_map: cpus allowed in one segment 30
664 12:17:51.285446 smm_create_map: min # of segments needed 1
665 12:17:51.285530 CPU 0x0
666 12:17:51.289075 smbase 7b9e6000 entry 7b9ee000
667 12:17:51.295755 ss_start 7b9f5c00 code_end 7b9ee208
668 12:17:51.295841 CPU 0x1
669 12:17:51.298752 smbase 7b9e5c00 entry 7b9edc00
670 12:17:51.305462 ss_start 7b9f5800 code_end 7b9ede08
671 12:17:51.305547 CPU 0x2
672 12:17:51.308810 smbase 7b9e5800 entry 7b9ed800
673 12:17:51.312533 ss_start 7b9f5400 code_end 7b9eda08
674 12:17:51.315645 CPU 0x3
675 12:17:51.318967 smbase 7b9e5400 entry 7b9ed400
676 12:17:51.322461 ss_start 7b9f5000 code_end 7b9ed608
677 12:17:51.325446 CPU 0x4
678 12:17:51.328968 smbase 7b9e5000 entry 7b9ed000
679 12:17:51.332284 ss_start 7b9f4c00 code_end 7b9ed208
680 12:17:51.332368 CPU 0x5
681 12:17:51.335410 smbase 7b9e4c00 entry 7b9ecc00
682 12:17:51.342079 ss_start 7b9f4800 code_end 7b9ece08
683 12:17:51.342159 CPU 0x6
684 12:17:51.345586 smbase 7b9e4800 entry 7b9ec800
685 12:17:51.352097 ss_start 7b9f4400 code_end 7b9eca08
686 12:17:51.352203 CPU 0x7
687 12:17:51.355488 smbase 7b9e4400 entry 7b9ec400
688 12:17:51.358783 ss_start 7b9f4000 code_end 7b9ec608
689 12:17:51.368702 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
690 12:17:51.372113 Processing 11 relocs. Offset value of 0x7b9ee000
691 12:17:51.378683 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
692 12:17:51.385448 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
693 12:17:51.392381 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
694 12:17:51.398873 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
695 12:17:51.405147 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
696 12:17:51.408872 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
697 12:17:51.415449 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
698 12:17:51.422111 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
699 12:17:51.428662 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
700 12:17:51.435333 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
701 12:17:51.442236 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
702 12:17:51.448836 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
703 12:17:51.455092 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
704 12:17:51.458846 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
705 12:17:51.465419 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
706 12:17:51.472225 smm_module_setup_stub: stack_top = 0x7b804000
707 12:17:51.475686 smm_module_setup_stub: per cpu stack_size = 0x800
708 12:17:51.482267 smm_module_setup_stub: runtime.start32_offset = 0x4c
709 12:17:51.485258 smm_module_setup_stub: runtime.smm_size = 0x200000
710 12:17:51.492002 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
711 12:17:51.496439 Clearing SMI status registers
712 12:17:51.499989 SMI_STS: PM1
713 12:17:51.500070 PM1_STS: WAK PWRBTN
714 12:17:51.509761 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
715 12:17:51.513204 In relocation handler: CPU 0
716 12:17:51.516492 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
717 12:17:51.520152 Writing SMRR. base = 0x7b800006, mask=0xff800c00
718 12:17:51.523437 Relocation complete.
719 12:17:51.529706 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
720 12:17:51.533127 In relocation handler: CPU 5
721 12:17:51.536286 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
722 12:17:51.539695 Relocation complete.
723 12:17:51.546461 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
724 12:17:51.549675 In relocation handler: CPU 4
725 12:17:51.553236 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
726 12:17:51.560018 Writing SMRR. base = 0x7b800006, mask=0xff800c00
727 12:17:51.560099 Relocation complete.
728 12:17:51.566240 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
729 12:17:51.570100 In relocation handler: CPU 2
730 12:17:51.572928 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
731 12:17:51.579900 Writing SMRR. base = 0x7b800006, mask=0xff800c00
732 12:17:51.583276 Relocation complete.
733 12:17:51.589699 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
734 12:17:51.593350 In relocation handler: CPU 1
735 12:17:51.596567 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
736 12:17:51.599581 Writing SMRR. base = 0x7b800006, mask=0xff800c00
737 12:17:51.603462 Relocation complete.
738 12:17:51.609817 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
739 12:17:51.613141 In relocation handler: CPU 3
740 12:17:51.616686 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
741 12:17:51.623145 Writing SMRR. base = 0x7b800006, mask=0xff800c00
742 12:17:51.623253 Relocation complete.
743 12:17:51.629449 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
744 12:17:51.633171 In relocation handler: CPU 6
745 12:17:51.639521 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
746 12:17:51.639635 Relocation complete.
747 12:17:51.646245 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
748 12:17:51.649838 In relocation handler: CPU 7
749 12:17:51.656692 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
750 12:17:51.659605 Writing SMRR. base = 0x7b800006, mask=0xff800c00
751 12:17:51.662964 Relocation complete.
752 12:17:51.663069 Initializing CPU #0
753 12:17:51.666163 CPU: vendor Intel device 906a4
754 12:17:51.669543 CPU: family 06, model 9a, stepping 04
755 12:17:51.672879 Clearing out pending MCEs
756 12:17:51.676214 cpu: energy policy set to 7
757 12:17:51.679583 Turbo is available but hidden
758 12:17:51.683009 Turbo is available and visible
759 12:17:51.686466 microcode: Update skipped, already up-to-date
760 12:17:51.689480 CPU #0 initialized
761 12:17:51.689581 Initializing CPU #5
762 12:17:51.693012 Initializing CPU #1
763 12:17:51.696572 Initializing CPU #2
764 12:17:51.696673 Initializing CPU #4
765 12:17:51.699797 Initializing CPU #3
766 12:17:51.703090 CPU: vendor Intel device 906a4
767 12:17:51.706369 CPU: family 06, model 9a, stepping 04
768 12:17:51.709465 CPU: vendor Intel device 906a4
769 12:17:51.712854 CPU: family 06, model 9a, stepping 04
770 12:17:51.716257 CPU: vendor Intel device 906a4
771 12:17:51.719758 CPU: family 06, model 9a, stepping 04
772 12:17:51.723106 Clearing out pending MCEs
773 12:17:51.726279 CPU: vendor Intel device 906a4
774 12:17:51.729561 CPU: family 06, model 9a, stepping 04
775 12:17:51.732806 Clearing out pending MCEs
776 12:17:51.736142 Clearing out pending MCEs
777 12:17:51.736218 cpu: energy policy set to 7
778 12:17:51.739588 CPU: vendor Intel device 906a4
779 12:17:51.745990 CPU: family 06, model 9a, stepping 04
780 12:17:51.746096 Clearing out pending MCEs
781 12:17:51.749346 Initializing CPU #6
782 12:17:51.752721 microcode: Update skipped, already up-to-date
783 12:17:51.756254 CPU #1 initialized
784 12:17:51.759456 Clearing out pending MCEs
785 12:17:51.762719 CPU: vendor Intel device 906a4
786 12:17:51.765936 CPU: family 06, model 9a, stepping 04
787 12:17:51.769672 cpu: energy policy set to 7
788 12:17:51.772956 cpu: energy policy set to 7
789 12:17:51.773048 cpu: energy policy set to 7
790 12:17:51.779238 microcode: Update skipped, already up-to-date
791 12:17:51.779349 CPU #4 initialized
792 12:17:51.785977 microcode: Update skipped, already up-to-date
793 12:17:51.786082 CPU #3 initialized
794 12:17:51.792879 microcode: Update skipped, already up-to-date
795 12:17:51.792999 CPU #2 initialized
796 12:17:51.795810 Initializing CPU #7
797 12:17:51.799353 Clearing out pending MCEs
798 12:17:51.802488 cpu: energy policy set to 7
799 12:17:51.802592 cpu: energy policy set to 7
800 12:17:51.806149 CPU: vendor Intel device 906a4
801 12:17:51.809564 CPU: family 06, model 9a, stepping 04
802 12:17:51.815938 microcode: Update skipped, already up-to-date
803 12:17:51.816043 CPU #6 initialized
804 12:17:51.819312 Clearing out pending MCEs
805 12:17:51.826191 microcode: Update skipped, already up-to-date
806 12:17:51.826294 CPU #5 initialized
807 12:17:51.829596 cpu: energy policy set to 7
808 12:17:51.832851 microcode: Update skipped, already up-to-date
809 12:17:51.836029 CPU #7 initialized
810 12:17:51.839852 bsp_do_flight_plan done after 693 msecs.
811 12:17:51.843528 CPU: frequency set to 4400 MHz
812 12:17:51.846557 Enabling SMIs.
813 12:17:51.853202 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
814 12:17:51.867689 Probing TPM I2C: done! DID_VID 0x00281ae0
815 12:17:51.871230 Locality already claimed
816 12:17:51.874509 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
817 12:17:51.886130 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
818 12:17:51.889036 Enabling GPIO PM b/c CR50 has long IRQ pulse support
819 12:17:51.895502 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
820 12:17:51.902251 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
821 12:17:51.905635 Found a VBT of 9216 bytes after decompression
822 12:17:51.908726 PCI 1.0, PIN A, using IRQ #16
823 12:17:51.912331 PCI 2.0, PIN A, using IRQ #17
824 12:17:51.915707 PCI 4.0, PIN A, using IRQ #18
825 12:17:51.918938 PCI 5.0, PIN A, using IRQ #16
826 12:17:51.921976 PCI 6.0, PIN A, using IRQ #16
827 12:17:51.925444 PCI 6.2, PIN C, using IRQ #18
828 12:17:51.928878 PCI 7.0, PIN A, using IRQ #19
829 12:17:51.932150 PCI 7.1, PIN B, using IRQ #20
830 12:17:51.935362 PCI 7.2, PIN C, using IRQ #21
831 12:17:51.939290 PCI 7.3, PIN D, using IRQ #22
832 12:17:51.942559 PCI 8.0, PIN A, using IRQ #23
833 12:17:51.945298 PCI D.0, PIN A, using IRQ #17
834 12:17:51.948609 PCI D.1, PIN B, using IRQ #19
835 12:17:51.948693 PCI 10.0, PIN A, using IRQ #24
836 12:17:51.951850 PCI 10.1, PIN B, using IRQ #25
837 12:17:51.955173 PCI 10.6, PIN C, using IRQ #20
838 12:17:51.958611 PCI 10.7, PIN D, using IRQ #21
839 12:17:51.961753 PCI 11.0, PIN A, using IRQ #26
840 12:17:51.965150 PCI 11.1, PIN B, using IRQ #27
841 12:17:51.968463 PCI 11.2, PIN C, using IRQ #28
842 12:17:51.971817 PCI 11.3, PIN D, using IRQ #29
843 12:17:51.975155 PCI 12.0, PIN A, using IRQ #30
844 12:17:51.978611 PCI 12.6, PIN B, using IRQ #31
845 12:17:51.981877 PCI 12.7, PIN C, using IRQ #22
846 12:17:51.985277 PCI 13.0, PIN A, using IRQ #32
847 12:17:51.988655 PCI 13.1, PIN B, using IRQ #33
848 12:17:51.991491 PCI 13.2, PIN C, using IRQ #34
849 12:17:51.995343 PCI 13.3, PIN D, using IRQ #35
850 12:17:51.998547 PCI 14.0, PIN B, using IRQ #23
851 12:17:51.998631 PCI 14.1, PIN A, using IRQ #36
852 12:17:52.001542 PCI 14.3, PIN C, using IRQ #17
853 12:17:52.004830 PCI 15.0, PIN A, using IRQ #37
854 12:17:52.008465 PCI 15.1, PIN B, using IRQ #38
855 12:17:52.011825 PCI 15.2, PIN C, using IRQ #39
856 12:17:52.015412 PCI 15.3, PIN D, using IRQ #40
857 12:17:52.018349 PCI 16.0, PIN A, using IRQ #18
858 12:17:52.021815 PCI 16.1, PIN B, using IRQ #19
859 12:17:52.025068 PCI 16.2, PIN C, using IRQ #20
860 12:17:52.028440 PCI 16.3, PIN D, using IRQ #21
861 12:17:52.031706 PCI 16.4, PIN A, using IRQ #18
862 12:17:52.035161 PCI 16.5, PIN B, using IRQ #19
863 12:17:52.038403 PCI 17.0, PIN A, using IRQ #22
864 12:17:52.041729 PCI 19.0, PIN A, using IRQ #41
865 12:17:52.045048 PCI 19.1, PIN B, using IRQ #42
866 12:17:52.048294 PCI 19.2, PIN C, using IRQ #43
867 12:17:52.051682 PCI 1C.0, PIN A, using IRQ #16
868 12:17:52.051765 PCI 1C.1, PIN B, using IRQ #17
869 12:17:52.054668 PCI 1C.2, PIN C, using IRQ #18
870 12:17:52.057972 PCI 1C.3, PIN D, using IRQ #19
871 12:17:52.061313 PCI 1C.4, PIN A, using IRQ #16
872 12:17:52.064687 PCI 1C.5, PIN B, using IRQ #17
873 12:17:52.068258 PCI 1C.6, PIN C, using IRQ #18
874 12:17:52.071603 PCI 1C.7, PIN D, using IRQ #19
875 12:17:52.075062 PCI 1D.0, PIN A, using IRQ #16
876 12:17:52.078353 PCI 1D.1, PIN B, using IRQ #17
877 12:17:52.081545 PCI 1D.2, PIN C, using IRQ #18
878 12:17:52.084969 PCI 1D.3, PIN D, using IRQ #19
879 12:17:52.088135 PCI 1E.0, PIN A, using IRQ #23
880 12:17:52.091630 PCI 1E.1, PIN B, using IRQ #20
881 12:17:52.094803 PCI 1E.2, PIN C, using IRQ #44
882 12:17:52.097963 PCI 1E.3, PIN D, using IRQ #45
883 12:17:52.101373 PCI 1F.3, PIN B, using IRQ #22
884 12:17:52.101458 PCI 1F.4, PIN C, using IRQ #23
885 12:17:52.104955 PCI 1F.6, PIN D, using IRQ #20
886 12:17:52.108150 PCI 1F.7, PIN A, using IRQ #21
887 12:17:52.114622 IRQ: Using dynamically assigned PCI IO-APIC IRQs
888 12:17:52.121477 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
889 12:17:52.305446 FSPS returned 0
890 12:17:52.308671 Executing Phase 1 of FspMultiPhaseSiInit
891 12:17:52.318550 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
892 12:17:52.322097 port C0 DISC req: usage 1 usb3 1 usb2 1
893 12:17:52.325581 Raw Buffer output 0 00000111
894 12:17:52.328405 Raw Buffer output 1 00000000
895 12:17:52.332184 pmc_send_ipc_cmd succeeded
896 12:17:52.339002 port C1 DISC req: usage 1 usb3 3 usb2 3
897 12:17:52.339086 Raw Buffer output 0 00000331
898 12:17:52.342234 Raw Buffer output 1 00000000
899 12:17:52.345959 pmc_send_ipc_cmd succeeded
900 12:17:52.350069 Detected 6 core, 8 thread CPU.
901 12:17:52.353262 Detected 6 core, 8 thread CPU.
902 12:17:52.358977 Detected 6 core, 8 thread CPU.
903 12:17:52.362210 Detected 6 core, 8 thread CPU.
904 12:17:52.365591 Detected 6 core, 8 thread CPU.
905 12:17:52.368512 Detected 6 core, 8 thread CPU.
906 12:17:52.372188 Detected 6 core, 8 thread CPU.
907 12:17:52.375642 Detected 6 core, 8 thread CPU.
908 12:17:52.378863 Detected 6 core, 8 thread CPU.
909 12:17:52.382202 Detected 6 core, 8 thread CPU.
910 12:17:52.385433 Detected 6 core, 8 thread CPU.
911 12:17:52.388854 Detected 6 core, 8 thread CPU.
912 12:17:52.392209 Detected 6 core, 8 thread CPU.
913 12:17:52.395583 Detected 6 core, 8 thread CPU.
914 12:17:52.398965 Detected 6 core, 8 thread CPU.
915 12:17:52.402243 Detected 6 core, 8 thread CPU.
916 12:17:52.405690 Detected 6 core, 8 thread CPU.
917 12:17:52.408842 Detected 6 core, 8 thread CPU.
918 12:17:52.412085 Detected 6 core, 8 thread CPU.
919 12:17:52.415498 Detected 6 core, 8 thread CPU.
920 12:17:52.415581 Detected 6 core, 8 thread CPU.
921 12:17:52.419077 Detected 6 core, 8 thread CPU.
922 12:17:52.711785 Detected 6 core, 8 thread CPU.
923 12:17:52.715034 Detected 6 core, 8 thread CPU.
924 12:17:52.718449 Detected 6 core, 8 thread CPU.
925 12:17:52.722080 Detected 6 core, 8 thread CPU.
926 12:17:52.725461 Detected 6 core, 8 thread CPU.
927 12:17:52.728422 Detected 6 core, 8 thread CPU.
928 12:17:52.731892 Detected 6 core, 8 thread CPU.
929 12:17:52.735395 Detected 6 core, 8 thread CPU.
930 12:17:52.738921 Detected 6 core, 8 thread CPU.
931 12:17:52.742311 Detected 6 core, 8 thread CPU.
932 12:17:52.745542 Detected 6 core, 8 thread CPU.
933 12:17:52.748494 Detected 6 core, 8 thread CPU.
934 12:17:52.751892 Detected 6 core, 8 thread CPU.
935 12:17:52.755541 Detected 6 core, 8 thread CPU.
936 12:17:52.758700 Detected 6 core, 8 thread CPU.
937 12:17:52.761910 Detected 6 core, 8 thread CPU.
938 12:17:52.765216 Detected 6 core, 8 thread CPU.
939 12:17:52.768554 Detected 6 core, 8 thread CPU.
940 12:17:52.768637 Detected 6 core, 8 thread CPU.
941 12:17:52.772290 Detected 6 core, 8 thread CPU.
942 12:17:52.775427 Display FSP Version Info HOB
943 12:17:52.778858 Reference Code - CPU = c.0.65.70
944 12:17:52.782622 uCode Version = 0.0.4.23
945 12:17:52.785823 TXT ACM version = ff.ff.ff.ffff
946 12:17:52.788805 Reference Code - ME = c.0.65.70
947 12:17:52.792446 MEBx version = 0.0.0.0
948 12:17:52.795812 ME Firmware Version = Lite SKU
949 12:17:52.799263 Reference Code - PCH = c.0.65.70
950 12:17:52.802376 PCH-CRID Status = Disabled
951 12:17:52.805886 PCH-CRID Original Value = ff.ff.ff.ffff
952 12:17:52.809097 PCH-CRID New Value = ff.ff.ff.ffff
953 12:17:52.812438 OPROM - RST - RAID = ff.ff.ff.ffff
954 12:17:52.815913 PCH Hsio Version = 4.0.0.0
955 12:17:52.819309 Reference Code - SA - System Agent = c.0.65.70
956 12:17:52.822751 Reference Code - MRC = 0.0.3.80
957 12:17:52.826054 SA - PCIe Version = c.0.65.70
958 12:17:52.829308 SA-CRID Status = Disabled
959 12:17:52.832227 SA-CRID Original Value = 0.0.0.4
960 12:17:52.835529 SA-CRID New Value = 0.0.0.4
961 12:17:52.839406 OPROM - VBIOS = ff.ff.ff.ffff
962 12:17:52.842579 IO Manageability Engine FW Version = 24.0.4.0
963 12:17:52.846085 PHY Build Version = 0.0.0.2016
964 12:17:52.849709 Thunderbolt(TM) FW Version = 0.0.0.0
965 12:17:52.855968 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
966 12:17:52.862411 BS: BS_DEV_INIT_CHIPS run times (exec / console): 495 / 507 ms
967 12:17:52.862915 Enumerating buses...
968 12:17:52.869312 Show all devs... Before device enumeration.
969 12:17:52.869790 Root Device: enabled 1
970 12:17:52.872486 CPU_CLUSTER: 0: enabled 1
971 12:17:52.875942 DOMAIN: 0000: enabled 1
972 12:17:52.879356 GPIO: 0: enabled 1
973 12:17:52.879828 PCI: 00:00.0: enabled 1
974 12:17:52.882675 PCI: 00:01.0: enabled 0
975 12:17:52.885872 PCI: 00:01.1: enabled 0
976 12:17:52.889092 PCI: 00:02.0: enabled 1
977 12:17:52.889564 PCI: 00:04.0: enabled 1
978 12:17:52.892782 PCI: 00:05.0: enabled 0
979 12:17:52.896162 PCI: 00:06.0: enabled 1
980 12:17:52.896630 PCI: 00:06.2: enabled 0
981 12:17:52.899420 PCI: 00:07.0: enabled 0
982 12:17:52.902499 PCI: 00:07.1: enabled 0
983 12:17:52.905827 PCI: 00:07.2: enabled 0
984 12:17:52.906299 PCI: 00:07.3: enabled 0
985 12:17:52.909200 PCI: 00:08.0: enabled 0
986 12:17:52.912534 PCI: 00:09.0: enabled 0
987 12:17:52.915781 PCI: 00:0a.0: enabled 1
988 12:17:52.916261 PCI: 00:0d.0: enabled 1
989 12:17:52.919056 PCI: 00:0d.1: enabled 0
990 12:17:52.922300 PCI: 00:0d.2: enabled 0
991 12:17:52.925758 PCI: 00:0d.3: enabled 0
992 12:17:52.926184 PCI: 00:0e.0: enabled 0
993 12:17:52.929262 PCI: 00:10.0: enabled 0
994 12:17:52.932383 PCI: 00:10.1: enabled 0
995 12:17:52.932836 PCI: 00:10.6: enabled 0
996 12:17:52.935859 PCI: 00:10.7: enabled 0
997 12:17:52.939140 PCI: 00:12.0: enabled 0
998 12:17:52.942328 PCI: 00:12.6: enabled 0
999 12:17:52.942755 PCI: 00:12.7: enabled 0
1000 12:17:52.945517 PCI: 00:13.0: enabled 0
1001 12:17:52.949048 PCI: 00:14.0: enabled 1
1002 12:17:52.952226 PCI: 00:14.1: enabled 0
1003 12:17:52.952653 PCI: 00:14.2: enabled 1
1004 12:17:52.955531 PCI: 00:14.3: enabled 1
1005 12:17:52.958869 PCI: 00:15.0: enabled 1
1006 12:17:52.962243 PCI: 00:15.1: enabled 1
1007 12:17:52.962671 PCI: 00:15.2: enabled 0
1008 12:17:52.965207 PCI: 00:15.3: enabled 1
1009 12:17:52.968706 PCI: 00:16.0: enabled 1
1010 12:17:52.972040 PCI: 00:16.1: enabled 0
1011 12:17:52.972487 PCI: 00:16.2: enabled 0
1012 12:17:52.975342 PCI: 00:16.3: enabled 0
1013 12:17:52.978631 PCI: 00:16.4: enabled 0
1014 12:17:52.979068 PCI: 00:16.5: enabled 0
1015 12:17:52.982194 PCI: 00:17.0: enabled 1
1016 12:17:52.985450 PCI: 00:19.0: enabled 0
1017 12:17:52.988620 PCI: 00:19.1: enabled 1
1018 12:17:52.989076 PCI: 00:19.2: enabled 0
1019 12:17:52.992005 PCI: 00:1a.0: enabled 0
1020 12:17:52.995185 PCI: 00:1c.0: enabled 0
1021 12:17:52.999011 PCI: 00:1c.1: enabled 0
1022 12:17:52.999435 PCI: 00:1c.2: enabled 0
1023 12:17:53.001770 PCI: 00:1c.3: enabled 0
1024 12:17:53.005768 PCI: 00:1c.4: enabled 0
1025 12:17:53.008554 PCI: 00:1c.5: enabled 0
1026 12:17:53.008999 PCI: 00:1c.6: enabled 0
1027 12:17:53.011890 PCI: 00:1c.7: enabled 0
1028 12:17:53.015413 PCI: 00:1d.0: enabled 0
1029 12:17:53.015857 PCI: 00:1d.1: enabled 0
1030 12:17:53.018580 PCI: 00:1d.2: enabled 0
1031 12:17:53.021995 PCI: 00:1d.3: enabled 0
1032 12:17:53.025491 PCI: 00:1e.0: enabled 1
1033 12:17:53.025913 PCI: 00:1e.1: enabled 0
1034 12:17:53.028674 PCI: 00:1e.2: enabled 0
1035 12:17:53.032191 PCI: 00:1e.3: enabled 1
1036 12:17:53.035130 PCI: 00:1f.0: enabled 1
1037 12:17:53.035560 PCI: 00:1f.1: enabled 0
1038 12:17:53.038430 PCI: 00:1f.2: enabled 1
1039 12:17:53.041985 PCI: 00:1f.3: enabled 1
1040 12:17:53.045247 PCI: 00:1f.4: enabled 0
1041 12:17:53.045679 PCI: 00:1f.5: enabled 1
1042 12:17:53.048654 PCI: 00:1f.6: enabled 0
1043 12:17:53.052046 PCI: 00:1f.7: enabled 0
1044 12:17:53.055381 GENERIC: 0.0: enabled 1
1045 12:17:53.055808 GENERIC: 0.0: enabled 1
1046 12:17:53.058770 GENERIC: 1.0: enabled 1
1047 12:17:53.062013 GENERIC: 0.0: enabled 1
1048 12:17:53.062443 GENERIC: 1.0: enabled 1
1049 12:17:53.064538 USB0 port 0: enabled 1
1050 12:17:53.067823 USB0 port 0: enabled 1
1051 12:17:53.071301 GENERIC: 0.0: enabled 1
1052 12:17:53.071385 I2C: 00:1a: enabled 1
1053 12:17:53.074647 I2C: 00:31: enabled 1
1054 12:17:53.078076 I2C: 00:32: enabled 1
1055 12:17:53.078161 I2C: 00:50: enabled 1
1056 12:17:53.081374 I2C: 00:10: enabled 1
1057 12:17:53.084825 I2C: 00:15: enabled 1
1058 12:17:53.084939 I2C: 00:2c: enabled 1
1059 12:17:53.088075 GENERIC: 0.0: enabled 1
1060 12:17:53.091370 SPI: 00: enabled 1
1061 12:17:53.091452 PNP: 0c09.0: enabled 1
1062 12:17:53.094744 GENERIC: 0.0: enabled 1
1063 12:17:53.097918 USB3 port 0: enabled 1
1064 12:17:53.101191 USB3 port 1: enabled 0
1065 12:17:53.101273 USB3 port 2: enabled 1
1066 12:17:53.104640 USB3 port 3: enabled 0
1067 12:17:53.108094 USB2 port 0: enabled 1
1068 12:17:53.108176 USB2 port 1: enabled 0
1069 12:17:53.111398 USB2 port 2: enabled 1
1070 12:17:53.114722 USB2 port 3: enabled 0
1071 12:17:53.114804 USB2 port 4: enabled 0
1072 12:17:53.117929 USB2 port 5: enabled 1
1073 12:17:53.121641 USB2 port 6: enabled 0
1074 12:17:53.124877 USB2 port 7: enabled 0
1075 12:17:53.125010 USB2 port 8: enabled 1
1076 12:17:53.127844 USB2 port 9: enabled 1
1077 12:17:53.130816 USB3 port 0: enabled 1
1078 12:17:53.130901 USB3 port 1: enabled 0
1079 12:17:53.134230 USB3 port 2: enabled 0
1080 12:17:53.137570 USB3 port 3: enabled 0
1081 12:17:53.140910 GENERIC: 0.0: enabled 1
1082 12:17:53.141053 GENERIC: 1.0: enabled 1
1083 12:17:53.144247 APIC: 00: enabled 1
1084 12:17:53.147765 APIC: 1e: enabled 1
1085 12:17:53.147849 APIC: 18: enabled 1
1086 12:17:53.150918 APIC: 1a: enabled 1
1087 12:17:53.151002 APIC: 1c: enabled 1
1088 12:17:53.154406 APIC: 01: enabled 1
1089 12:17:53.157554 APIC: 09: enabled 1
1090 12:17:53.157638 APIC: 08: enabled 1
1091 12:17:53.160842 Compare with tree...
1092 12:17:53.164252 Root Device: enabled 1
1093 12:17:53.167603 CPU_CLUSTER: 0: enabled 1
1094 12:17:53.167687 APIC: 00: enabled 1
1095 12:17:53.170940 APIC: 1e: enabled 1
1096 12:17:53.173901 APIC: 18: enabled 1
1097 12:17:53.173985 APIC: 1a: enabled 1
1098 12:17:53.177183 APIC: 1c: enabled 1
1099 12:17:53.180559 APIC: 01: enabled 1
1100 12:17:53.180642 APIC: 09: enabled 1
1101 12:17:53.184043 APIC: 08: enabled 1
1102 12:17:53.187369 DOMAIN: 0000: enabled 1
1103 12:17:53.187453 GPIO: 0: enabled 1
1104 12:17:53.190586 PCI: 00:00.0: enabled 1
1105 12:17:53.194034 PCI: 00:01.0: enabled 0
1106 12:17:53.197304 PCI: 00:01.1: enabled 0
1107 12:17:53.200566 PCI: 00:02.0: enabled 1
1108 12:17:53.200650 PCI: 00:04.0: enabled 1
1109 12:17:53.203841 GENERIC: 0.0: enabled 1
1110 12:17:53.207275 PCI: 00:05.0: enabled 0
1111 12:17:53.210585 PCI: 00:06.0: enabled 1
1112 12:17:53.213830 PCI: 00:06.2: enabled 0
1113 12:17:53.213914 PCI: 00:08.0: enabled 0
1114 12:17:53.217213 PCI: 00:09.0: enabled 0
1115 12:17:53.220542 PCI: 00:0a.0: enabled 1
1116 12:17:53.223805 PCI: 00:0d.0: enabled 1
1117 12:17:53.227237 USB0 port 0: enabled 1
1118 12:17:53.227320 USB3 port 0: enabled 1
1119 12:17:53.230367 USB3 port 1: enabled 0
1120 12:17:53.233544 USB3 port 2: enabled 1
1121 12:17:53.236984 USB3 port 3: enabled 0
1122 12:17:53.240236 PCI: 00:0d.1: enabled 0
1123 12:17:53.240317 PCI: 00:0d.2: enabled 0
1124 12:17:53.243616 PCI: 00:0d.3: enabled 0
1125 12:17:53.247056 PCI: 00:0e.0: enabled 0
1126 12:17:53.250398 PCI: 00:10.0: enabled 0
1127 12:17:53.253827 PCI: 00:10.1: enabled 0
1128 12:17:53.253911 PCI: 00:10.6: enabled 0
1129 12:17:53.256904 PCI: 00:10.7: enabled 0
1130 12:17:53.259930 PCI: 00:12.0: enabled 0
1131 12:17:53.263712 PCI: 00:12.6: enabled 0
1132 12:17:53.266580 PCI: 00:12.7: enabled 0
1133 12:17:53.266664 PCI: 00:13.0: enabled 0
1134 12:17:53.269909 PCI: 00:14.0: enabled 1
1135 12:17:53.273272 USB0 port 0: enabled 1
1136 12:17:53.276771 USB2 port 0: enabled 1
1137 12:17:53.280283 USB2 port 1: enabled 0
1138 12:17:53.280367 USB2 port 2: enabled 1
1139 12:17:53.283630 USB2 port 3: enabled 0
1140 12:17:53.286990 USB2 port 4: enabled 0
1141 12:17:53.289975 USB2 port 5: enabled 1
1142 12:17:53.293231 USB2 port 6: enabled 0
1143 12:17:53.296754 USB2 port 7: enabled 0
1144 12:17:53.296837 USB2 port 8: enabled 1
1145 12:17:53.299791 USB2 port 9: enabled 1
1146 12:17:53.303096 USB3 port 0: enabled 1
1147 12:17:53.306427 USB3 port 1: enabled 0
1148 12:17:53.309754 USB3 port 2: enabled 0
1149 12:17:53.313328 USB3 port 3: enabled 0
1150 12:17:53.313413 PCI: 00:14.1: enabled 0
1151 12:17:53.316750 PCI: 00:14.2: enabled 1
1152 12:17:53.319873 PCI: 00:14.3: enabled 1
1153 12:17:53.323346 GENERIC: 0.0: enabled 1
1154 12:17:53.326487 PCI: 00:15.0: enabled 1
1155 12:17:53.326572 I2C: 00:1a: enabled 1
1156 12:17:53.329836 I2C: 00:31: enabled 1
1157 12:17:53.332910 I2C: 00:32: enabled 1
1158 12:17:53.336602 PCI: 00:15.1: enabled 1
1159 12:17:53.336684 I2C: 00:50: enabled 1
1160 12:17:53.339900 PCI: 00:15.2: enabled 0
1161 12:17:53.343351 PCI: 00:15.3: enabled 1
1162 12:17:53.346461 I2C: 00:10: enabled 1
1163 12:17:53.349928 PCI: 00:16.0: enabled 1
1164 12:17:53.350010 PCI: 00:16.1: enabled 0
1165 12:17:53.353072 PCI: 00:16.2: enabled 0
1166 12:17:53.356469 PCI: 00:16.3: enabled 0
1167 12:17:53.359734 PCI: 00:16.4: enabled 0
1168 12:17:53.362861 PCI: 00:16.5: enabled 0
1169 12:17:53.362944 PCI: 00:17.0: enabled 1
1170 12:17:53.366220 PCI: 00:19.0: enabled 0
1171 12:17:53.369468 PCI: 00:19.1: enabled 1
1172 12:17:53.373357 I2C: 00:15: enabled 1
1173 12:17:53.373439 I2C: 00:2c: enabled 1
1174 12:17:53.376199 PCI: 00:19.2: enabled 0
1175 12:17:53.379598 PCI: 00:1a.0: enabled 0
1176 12:17:53.382894 PCI: 00:1e.0: enabled 1
1177 12:17:53.386311 PCI: 00:1e.1: enabled 0
1178 12:17:53.386421 PCI: 00:1e.2: enabled 0
1179 12:17:53.389819 PCI: 00:1e.3: enabled 1
1180 12:17:53.393183 SPI: 00: enabled 1
1181 12:17:53.396028 PCI: 00:1f.0: enabled 1
1182 12:17:53.396112 PNP: 0c09.0: enabled 1
1183 12:17:53.399840 PCI: 00:1f.1: enabled 0
1184 12:17:53.403106 PCI: 00:1f.2: enabled 1
1185 12:17:53.406394 GENERIC: 0.0: enabled 1
1186 12:17:53.409683 GENERIC: 0.0: enabled 1
1187 12:17:53.413098 GENERIC: 1.0: enabled 1
1188 12:17:53.413184 PCI: 00:1f.3: enabled 1
1189 12:17:53.416408 PCI: 00:1f.4: enabled 0
1190 12:17:53.419781 PCI: 00:1f.5: enabled 1
1191 12:17:53.423054 PCI: 00:1f.6: enabled 0
1192 12:17:53.426391 PCI: 00:1f.7: enabled 0
1193 12:17:53.426475 Root Device scanning...
1194 12:17:53.429790 scan_static_bus for Root Device
1195 12:17:53.432756 CPU_CLUSTER: 0 enabled
1196 12:17:53.435972 DOMAIN: 0000 enabled
1197 12:17:53.436056 DOMAIN: 0000 scanning...
1198 12:17:53.439757 PCI: pci_scan_bus for bus 00
1199 12:17:53.443096 PCI: 00:00.0 [8086/0000] ops
1200 12:17:53.446136 PCI: 00:00.0 [8086/4609] enabled
1201 12:17:53.449511 PCI: 00:02.0 [8086/0000] bus ops
1202 12:17:53.452702 PCI: 00:02.0 [8086/46b3] enabled
1203 12:17:53.456325 PCI: 00:04.0 [8086/0000] bus ops
1204 12:17:53.459313 PCI: 00:04.0 [8086/461d] enabled
1205 12:17:53.462948 PCI: 00:06.0 [8086/0000] bus ops
1206 12:17:53.466304 PCI: 00:06.0 [8086/464d] enabled
1207 12:17:53.469529 PCI: 00:08.0 [8086/464f] disabled
1208 12:17:53.472904 PCI: 00:0a.0 [8086/467d] enabled
1209 12:17:53.476315 PCI: 00:0d.0 [8086/0000] bus ops
1210 12:17:53.479476 PCI: 00:0d.0 [8086/461e] enabled
1211 12:17:53.482994 PCI: 00:14.0 [8086/0000] bus ops
1212 12:17:53.485924 PCI: 00:14.0 [8086/51ed] enabled
1213 12:17:53.489303 PCI: 00:14.2 [8086/51ef] enabled
1214 12:17:53.492748 PCI: 00:14.3 [8086/0000] bus ops
1215 12:17:53.496166 PCI: 00:14.3 [8086/51f0] enabled
1216 12:17:53.499503 PCI: 00:15.0 [8086/0000] bus ops
1217 12:17:53.502777 PCI: 00:15.0 [8086/51e8] enabled
1218 12:17:53.506053 PCI: 00:15.1 [8086/0000] bus ops
1219 12:17:53.509610 PCI: 00:15.1 [8086/51e9] enabled
1220 12:17:53.513122 PCI: 00:15.2 [8086/0000] bus ops
1221 12:17:53.515987 PCI: 00:15.2 [8086/51ea] disabled
1222 12:17:53.519523 PCI: 00:15.3 [8086/0000] bus ops
1223 12:17:53.522732 PCI: 00:15.3 [8086/51eb] enabled
1224 12:17:53.526183 PCI: 00:16.0 [8086/0000] ops
1225 12:17:53.529469 PCI: 00:16.0 [8086/51e0] enabled
1226 12:17:53.535939 PCI: Static device PCI: 00:17.0 not found, disabling it.
1227 12:17:53.539535 PCI: 00:19.0 [8086/0000] bus ops
1228 12:17:53.542761 PCI: 00:19.0 [8086/51c5] disabled
1229 12:17:53.546115 PCI: 00:19.1 [8086/0000] bus ops
1230 12:17:53.549471 PCI: 00:19.1 [8086/51c6] enabled
1231 12:17:53.552696 PCI: 00:1e.0 [8086/0000] ops
1232 12:17:53.556486 PCI: 00:1e.0 [8086/51a8] enabled
1233 12:17:53.559529 PCI: 00:1e.3 [8086/0000] bus ops
1234 12:17:53.562855 PCI: 00:1e.3 [8086/51ab] enabled
1235 12:17:53.566258 PCI: 00:1f.0 [8086/0000] bus ops
1236 12:17:53.569442 PCI: 00:1f.0 [8086/5182] enabled
1237 12:17:53.572872 RTC Init
1238 12:17:53.576203 Set power on after power failure.
1239 12:17:53.576286 Disabling Deep S3
1240 12:17:53.579919 Disabling Deep S3
1241 12:17:53.582937 Disabling Deep S4
1242 12:17:53.583019 Disabling Deep S4
1243 12:17:53.585928 Disabling Deep S5
1244 12:17:53.586010 Disabling Deep S5
1245 12:17:53.589282 PCI: 00:1f.2 [0000/0000] hidden
1246 12:17:53.592696 PCI: 00:1f.3 [8086/0000] bus ops
1247 12:17:53.596065 PCI: 00:1f.3 [8086/51c8] enabled
1248 12:17:53.599396 PCI: 00:1f.5 [8086/0000] bus ops
1249 12:17:53.602792 PCI: 00:1f.5 [8086/51a4] enabled
1250 12:17:53.606231 GPIO: 0 enabled
1251 12:17:53.609468 PCI: Leftover static devices:
1252 12:17:53.609551 PCI: 00:01.0
1253 12:17:53.609616 PCI: 00:01.1
1254 12:17:53.612588 PCI: 00:05.0
1255 12:17:53.612671 PCI: 00:06.2
1256 12:17:53.616117 PCI: 00:09.0
1257 12:17:53.616199 PCI: 00:0d.1
1258 12:17:53.616263 PCI: 00:0d.2
1259 12:17:53.619447 PCI: 00:0d.3
1260 12:17:53.619530 PCI: 00:0e.0
1261 12:17:53.622855 PCI: 00:10.0
1262 12:17:53.622937 PCI: 00:10.1
1263 12:17:53.626045 PCI: 00:10.6
1264 12:17:53.626127 PCI: 00:10.7
1265 12:17:53.626192 PCI: 00:12.0
1266 12:17:53.629375 PCI: 00:12.6
1267 12:17:53.629456 PCI: 00:12.7
1268 12:17:53.632513 PCI: 00:13.0
1269 12:17:53.632595 PCI: 00:14.1
1270 12:17:53.632660 PCI: 00:16.1
1271 12:17:53.636027 PCI: 00:16.2
1272 12:17:53.636126 PCI: 00:16.3
1273 12:17:53.639500 PCI: 00:16.4
1274 12:17:53.639610 PCI: 00:16.5
1275 12:17:53.639703 PCI: 00:17.0
1276 12:17:53.642809 PCI: 00:19.2
1277 12:17:53.642892 PCI: 00:1a.0
1278 12:17:53.646236 PCI: 00:1e.1
1279 12:17:53.646319 PCI: 00:1e.2
1280 12:17:53.649496 PCI: 00:1f.1
1281 12:17:53.649579 PCI: 00:1f.4
1282 12:17:53.649644 PCI: 00:1f.6
1283 12:17:53.652682 PCI: 00:1f.7
1284 12:17:53.655891 PCI: Check your devicetree.cb.
1285 12:17:53.655974 PCI: 00:02.0 scanning...
1286 12:17:53.659264 scan_generic_bus for PCI: 00:02.0
1287 12:17:53.666044 scan_generic_bus for PCI: 00:02.0 done
1288 12:17:53.669190 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1289 12:17:53.672818 PCI: 00:04.0 scanning...
1290 12:17:53.675855 scan_generic_bus for PCI: 00:04.0
1291 12:17:53.675929 GENERIC: 0.0 enabled
1292 12:17:53.682476 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1293 12:17:53.689327 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1294 12:17:53.692545 PCI: 00:06.0 scanning...
1295 12:17:53.695853 do_pci_scan_bridge for PCI: 00:06.0
1296 12:17:53.695941 PCI: pci_scan_bus for bus 01
1297 12:17:53.699150 PCI: 01:00.0 [15b7/5009] enabled
1298 12:17:53.705824 Enabling Common Clock Configuration
1299 12:17:53.709189 L1 Sub-State supported from root port 6
1300 12:17:53.712668 L1 Sub-State Support = 0x5
1301 12:17:53.715731 CommonModeRestoreTime = 0x6e
1302 12:17:53.718991 Power On Value = 0x5, Power On Scale = 0x2
1303 12:17:53.719078 ASPM: Enabled L1
1304 12:17:53.722740 PCIe: Max_Payload_Size adjusted to 256
1305 12:17:53.726216 PCI: 01:00.0: Enabled LTR
1306 12:17:53.732739 PCI: 01:00.0: Programmed LTR max latencies
1307 12:17:53.735702 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1308 12:17:53.739522 PCI: 00:0d.0 scanning...
1309 12:17:53.742509 scan_static_bus for PCI: 00:0d.0
1310 12:17:53.742617 USB0 port 0 enabled
1311 12:17:53.746135 USB0 port 0 scanning...
1312 12:17:53.749328 scan_static_bus for USB0 port 0
1313 12:17:53.752782 USB3 port 0 enabled
1314 12:17:53.752856 USB3 port 1 disabled
1315 12:17:53.755648 USB3 port 2 enabled
1316 12:17:53.759016 USB3 port 3 disabled
1317 12:17:53.759086 USB3 port 0 scanning...
1318 12:17:53.762479 scan_static_bus for USB3 port 0
1319 12:17:53.765846 scan_static_bus for USB3 port 0 done
1320 12:17:53.772726 scan_bus: bus USB3 port 0 finished in 6 msecs
1321 12:17:53.775957 USB3 port 2 scanning...
1322 12:17:53.778873 scan_static_bus for USB3 port 2
1323 12:17:53.782246 scan_static_bus for USB3 port 2 done
1324 12:17:53.785806 scan_bus: bus USB3 port 2 finished in 6 msecs
1325 12:17:53.789520 scan_static_bus for USB0 port 0 done
1326 12:17:53.795575 scan_bus: bus USB0 port 0 finished in 43 msecs
1327 12:17:53.798760 scan_static_bus for PCI: 00:0d.0 done
1328 12:17:53.802369 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1329 12:17:53.805651 PCI: 00:14.0 scanning...
1330 12:17:53.808836 scan_static_bus for PCI: 00:14.0
1331 12:17:53.812099 USB0 port 0 enabled
1332 12:17:53.812221 USB0 port 0 scanning...
1333 12:17:53.815929 scan_static_bus for USB0 port 0
1334 12:17:53.819045 USB2 port 0 enabled
1335 12:17:53.822315 USB2 port 1 disabled
1336 12:17:53.822398 USB2 port 2 enabled
1337 12:17:53.825508 USB2 port 3 disabled
1338 12:17:53.825590 USB2 port 4 disabled
1339 12:17:53.828892 USB2 port 5 enabled
1340 12:17:53.832219 USB2 port 6 disabled
1341 12:17:53.832317 USB2 port 7 disabled
1342 12:17:53.835389 USB2 port 8 enabled
1343 12:17:53.838746 USB2 port 9 enabled
1344 12:17:53.838829 USB3 port 0 enabled
1345 12:17:53.842049 USB3 port 1 disabled
1346 12:17:53.842213 USB3 port 2 disabled
1347 12:17:53.845409 USB3 port 3 disabled
1348 12:17:53.848851 USB2 port 0 scanning...
1349 12:17:53.852189 scan_static_bus for USB2 port 0
1350 12:17:53.855349 scan_static_bus for USB2 port 0 done
1351 12:17:53.858899 scan_bus: bus USB2 port 0 finished in 6 msecs
1352 12:17:53.862257 USB2 port 2 scanning...
1353 12:17:53.865263 scan_static_bus for USB2 port 2
1354 12:17:53.868675 scan_static_bus for USB2 port 2 done
1355 12:17:53.875353 scan_bus: bus USB2 port 2 finished in 6 msecs
1356 12:17:53.875474 USB2 port 5 scanning...
1357 12:17:53.878742 scan_static_bus for USB2 port 5
1358 12:17:53.882111 scan_static_bus for USB2 port 5 done
1359 12:17:53.888494 scan_bus: bus USB2 port 5 finished in 6 msecs
1360 12:17:53.888573 USB2 port 8 scanning...
1361 12:17:53.891968 scan_static_bus for USB2 port 8
1362 12:17:53.898379 scan_static_bus for USB2 port 8 done
1363 12:17:53.901689 scan_bus: bus USB2 port 8 finished in 6 msecs
1364 12:17:53.905125 USB2 port 9 scanning...
1365 12:17:53.908448 scan_static_bus for USB2 port 9
1366 12:17:53.912135 scan_static_bus for USB2 port 9 done
1367 12:17:53.914980 scan_bus: bus USB2 port 9 finished in 6 msecs
1368 12:17:53.918705 USB3 port 0 scanning...
1369 12:17:53.921733 scan_static_bus for USB3 port 0
1370 12:17:53.925108 scan_static_bus for USB3 port 0 done
1371 12:17:53.928658 scan_bus: bus USB3 port 0 finished in 6 msecs
1372 12:17:53.931738 scan_static_bus for USB0 port 0 done
1373 12:17:53.938691 scan_bus: bus USB0 port 0 finished in 120 msecs
1374 12:17:53.941936 scan_static_bus for PCI: 00:14.0 done
1375 12:17:53.945252 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1376 12:17:53.948603 PCI: 00:14.3 scanning...
1377 12:17:53.952056 scan_static_bus for PCI: 00:14.3
1378 12:17:53.955505 GENERIC: 0.0 enabled
1379 12:17:53.958834 scan_static_bus for PCI: 00:14.3 done
1380 12:17:53.961927 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1381 12:17:53.965295 PCI: 00:15.0 scanning...
1382 12:17:53.968641 scan_static_bus for PCI: 00:15.0
1383 12:17:53.971971 I2C: 00:1a enabled
1384 12:17:53.972053 I2C: 00:31 enabled
1385 12:17:53.975399 I2C: 00:32 enabled
1386 12:17:53.978272 scan_static_bus for PCI: 00:15.0 done
1387 12:17:53.985131 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1388 12:17:53.985228 PCI: 00:15.1 scanning...
1389 12:17:53.988456 scan_static_bus for PCI: 00:15.1
1390 12:17:53.991865 I2C: 00:50 enabled
1391 12:17:53.995112 scan_static_bus for PCI: 00:15.1 done
1392 12:17:53.998412 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1393 12:17:54.001770 PCI: 00:15.3 scanning...
1394 12:17:54.005143 scan_static_bus for PCI: 00:15.3
1395 12:17:54.008434 I2C: 00:10 enabled
1396 12:17:54.011666 scan_static_bus for PCI: 00:15.3 done
1397 12:17:54.015063 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1398 12:17:54.018230 PCI: 00:19.1 scanning...
1399 12:17:54.021875 scan_static_bus for PCI: 00:19.1
1400 12:17:54.024881 I2C: 00:15 enabled
1401 12:17:54.024963 I2C: 00:2c enabled
1402 12:17:54.028145 scan_static_bus for PCI: 00:19.1 done
1403 12:17:54.035338 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1404 12:17:54.038260 PCI: 00:1e.3 scanning...
1405 12:17:54.041700 scan_generic_bus for PCI: 00:1e.3
1406 12:17:54.041783 SPI: 00 enabled
1407 12:17:54.048517 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1408 12:17:54.051831 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1409 12:17:54.055270 PCI: 00:1f.0 scanning...
1410 12:17:54.058654 scan_static_bus for PCI: 00:1f.0
1411 12:17:54.061935 PNP: 0c09.0 enabled
1412 12:17:54.062015 PNP: 0c09.0 scanning...
1413 12:17:54.065140 scan_static_bus for PNP: 0c09.0
1414 12:17:54.071627 scan_static_bus for PNP: 0c09.0 done
1415 12:17:54.075100 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1416 12:17:54.078690 scan_static_bus for PCI: 00:1f.0 done
1417 12:17:54.085104 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1418 12:17:54.085187 PCI: 00:1f.2 scanning...
1419 12:17:54.088643 scan_static_bus for PCI: 00:1f.2
1420 12:17:54.091507 GENERIC: 0.0 enabled
1421 12:17:54.094938 GENERIC: 0.0 scanning...
1422 12:17:54.098381 scan_static_bus for GENERIC: 0.0
1423 12:17:54.098558 GENERIC: 0.0 enabled
1424 12:17:54.101648 GENERIC: 1.0 enabled
1425 12:17:54.104880 scan_static_bus for GENERIC: 0.0 done
1426 12:17:54.111698 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1427 12:17:54.115040 scan_static_bus for PCI: 00:1f.2 done
1428 12:17:54.118353 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1429 12:17:54.121880 PCI: 00:1f.3 scanning...
1430 12:17:54.124952 scan_static_bus for PCI: 00:1f.3
1431 12:17:54.128165 scan_static_bus for PCI: 00:1f.3 done
1432 12:17:54.131612 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1433 12:17:54.134788 PCI: 00:1f.5 scanning...
1434 12:17:54.138237 scan_generic_bus for PCI: 00:1f.5
1435 12:17:54.141664 scan_generic_bus for PCI: 00:1f.5 done
1436 12:17:54.148171 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1437 12:17:54.151630 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1438 12:17:54.154802 scan_static_bus for Root Device done
1439 12:17:54.161759 scan_bus: bus Root Device finished in 729 msecs
1440 12:17:54.161843 done
1441 12:17:54.168039 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1442 12:17:54.175029 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1443 12:17:54.181374 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1444 12:17:54.184660 SPI flash protection: WPSW=1 SRP0=0
1445 12:17:54.188039 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1446 12:17:54.195014 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1447 12:17:54.198510 found VGA at PCI: 00:02.0
1448 12:17:54.201471 Setting up VGA for PCI: 00:02.0
1449 12:17:54.204795 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1450 12:17:54.211300 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1451 12:17:54.211384 Allocating resources...
1452 12:17:54.214714 Reading resources...
1453 12:17:54.218057 Root Device read_resources bus 0 link: 0
1454 12:17:54.224793 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1455 12:17:54.227788 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1456 12:17:54.231549 DOMAIN: 0000 read_resources bus 0 link: 0
1457 12:17:54.238148 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1458 12:17:54.244760 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1459 12:17:54.251115 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1460 12:17:54.257913 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1461 12:17:54.264383 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1462 12:17:54.271149 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1463 12:17:54.274605 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1464 12:17:54.281130 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1465 12:17:54.287659 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1466 12:17:54.294319 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1467 12:17:54.301088 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1468 12:17:54.307702 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1469 12:17:54.314340 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1470 12:17:54.321010 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1471 12:17:54.327745 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1472 12:17:54.334365 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1473 12:17:54.341180 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1474 12:17:54.347379 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1475 12:17:54.350817 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1476 12:17:54.357419 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1477 12:17:54.364238 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1478 12:17:54.367628 PCI: 00:04.0 read_resources bus 1 link: 0
1479 12:17:54.374204 PCI: 00:04.0 read_resources bus 1 link: 0 done
1480 12:17:54.377661 PCI: 00:06.0 read_resources bus 1 link: 0
1481 12:17:54.384276 PCI: 00:06.0 read_resources bus 1 link: 0 done
1482 12:17:54.387195 PCI: 00:0d.0 read_resources bus 0 link: 0
1483 12:17:54.390635 USB0 port 0 read_resources bus 0 link: 0
1484 12:17:54.394131 USB0 port 0 read_resources bus 0 link: 0 done
1485 12:17:54.400673 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1486 12:17:54.404100 PCI: 00:14.0 read_resources bus 0 link: 0
1487 12:17:54.407422 USB0 port 0 read_resources bus 0 link: 0
1488 12:17:54.413998 USB0 port 0 read_resources bus 0 link: 0 done
1489 12:17:54.417345 PCI: 00:14.0 read_resources bus 0 link: 0 done
1490 12:17:54.420780 PCI: 00:14.3 read_resources bus 0 link: 0
1491 12:17:54.427437 PCI: 00:14.3 read_resources bus 0 link: 0 done
1492 12:17:54.430788 PCI: 00:15.0 read_resources bus 0 link: 0
1493 12:17:54.437226 PCI: 00:15.0 read_resources bus 0 link: 0 done
1494 12:17:54.440631 PCI: 00:15.1 read_resources bus 0 link: 0
1495 12:17:54.443868 PCI: 00:15.1 read_resources bus 0 link: 0 done
1496 12:17:54.450540 PCI: 00:15.3 read_resources bus 0 link: 0
1497 12:17:54.453785 PCI: 00:15.3 read_resources bus 0 link: 0 done
1498 12:17:54.457128 PCI: 00:19.1 read_resources bus 0 link: 0
1499 12:17:54.463788 PCI: 00:19.1 read_resources bus 0 link: 0 done
1500 12:17:54.467252 PCI: 00:1e.3 read_resources bus 2 link: 0
1501 12:17:54.473660 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1502 12:17:54.477057 PCI: 00:1f.0 read_resources bus 0 link: 0
1503 12:17:54.480190 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1504 12:17:54.487157 PCI: 00:1f.2 read_resources bus 0 link: 0
1505 12:17:54.490445 GENERIC: 0.0 read_resources bus 0 link: 0
1506 12:17:54.493542 GENERIC: 0.0 read_resources bus 0 link: 0 done
1507 12:17:54.500191 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1508 12:17:54.503446 DOMAIN: 0000 read_resources bus 0 link: 0 done
1509 12:17:54.510348 Root Device read_resources bus 0 link: 0 done
1510 12:17:54.510432 Done reading resources.
1511 12:17:54.517133 Show resources in subtree (Root Device)...After reading.
1512 12:17:54.520186 Root Device child on link 0 CPU_CLUSTER: 0
1513 12:17:54.526799 CPU_CLUSTER: 0 child on link 0 APIC: 00
1514 12:17:54.526910 APIC: 00
1515 12:17:54.527003 APIC: 1e
1516 12:17:54.530147 APIC: 18
1517 12:17:54.530245 APIC: 1a
1518 12:17:54.530334 APIC: 1c
1519 12:17:54.533614 APIC: 01
1520 12:17:54.533698 APIC: 09
1521 12:17:54.536838 APIC: 08
1522 12:17:54.540239 DOMAIN: 0000 child on link 0 GPIO: 0
1523 12:17:54.550102 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1524 12:17:54.560221 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1525 12:17:54.560310 GPIO: 0
1526 12:17:54.560377 PCI: 00:00.0
1527 12:17:54.570224 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1528 12:17:54.580056 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1529 12:17:54.590138 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1530 12:17:54.599722 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1531 12:17:54.609991 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1532 12:17:54.616489 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1533 12:17:54.626701 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1534 12:17:54.636603 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1535 12:17:54.646708 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1536 12:17:54.656430 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1537 12:17:54.666451 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1538 12:17:54.673309 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1539 12:17:54.683013 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1540 12:17:54.693094 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1541 12:17:54.703248 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1542 12:17:54.713110 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1543 12:17:54.723339 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1544 12:17:54.732837 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1545 12:17:54.743031 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1546 12:17:54.749722 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1547 12:17:54.759388 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1548 12:17:54.769538 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1549 12:17:54.779661 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1550 12:17:54.789822 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1551 12:17:54.799343 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1552 12:17:54.809328 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1553 12:17:54.816395 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1554 12:17:54.826123 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1555 12:17:54.829502 PCI: 00:02.0
1556 12:17:54.839329 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1557 12:17:54.849318 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1558 12:17:54.859044 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1559 12:17:54.862576 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1560 12:17:54.872286 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1561 12:17:54.872373 GENERIC: 0.0
1562 12:17:54.879096 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1563 12:17:54.886050 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1564 12:17:54.896001 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1565 12:17:54.906124 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1566 12:17:54.909005 PCI: 01:00.0
1567 12:17:54.919510 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1568 12:17:54.929262 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1569 12:17:54.929347 PCI: 00:08.0
1570 12:17:54.932563 PCI: 00:0a.0
1571 12:17:54.942852 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1572 12:17:54.946044 PCI: 00:0d.0 child on link 0 USB0 port 0
1573 12:17:54.955466 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1574 12:17:54.958919 USB0 port 0 child on link 0 USB3 port 0
1575 12:17:54.962689 USB3 port 0
1576 12:17:54.962772 USB3 port 1
1577 12:17:54.965667 USB3 port 2
1578 12:17:54.965751 USB3 port 3
1579 12:17:54.972415 PCI: 00:14.0 child on link 0 USB0 port 0
1580 12:17:54.982366 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1581 12:17:54.985674 USB0 port 0 child on link 0 USB2 port 0
1582 12:17:54.989175 USB2 port 0
1583 12:17:54.989259 USB2 port 1
1584 12:17:54.992343 USB2 port 2
1585 12:17:54.992426 USB2 port 3
1586 12:17:54.995765 USB2 port 4
1587 12:17:54.995877 USB2 port 5
1588 12:17:54.998796 USB2 port 6
1589 12:17:54.998879 USB2 port 7
1590 12:17:55.002192 USB2 port 8
1591 12:17:55.002275 USB2 port 9
1592 12:17:55.005586 USB3 port 0
1593 12:17:55.005671 USB3 port 1
1594 12:17:55.008890 USB3 port 2
1595 12:17:55.012374 USB3 port 3
1596 12:17:55.012457 PCI: 00:14.2
1597 12:17:55.022252 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1598 12:17:55.032116 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1599 12:17:55.035456 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1600 12:17:55.045588 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1601 12:17:55.048930 GENERIC: 0.0
1602 12:17:55.052229 PCI: 00:15.0 child on link 0 I2C: 00:1a
1603 12:17:55.062286 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1604 12:17:55.065675 I2C: 00:1a
1605 12:17:55.065779 I2C: 00:31
1606 12:17:55.069041 I2C: 00:32
1607 12:17:55.072530 PCI: 00:15.1 child on link 0 I2C: 00:50
1608 12:17:55.082073 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1609 12:17:55.082161 I2C: 00:50
1610 12:17:55.085780 PCI: 00:15.2
1611 12:17:55.088656 PCI: 00:15.3 child on link 0 I2C: 00:10
1612 12:17:55.098713 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1613 12:17:55.102059 I2C: 00:10
1614 12:17:55.102173 PCI: 00:16.0
1615 12:17:55.112019 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1616 12:17:55.115695 PCI: 00:19.0
1617 12:17:55.118520 PCI: 00:19.1 child on link 0 I2C: 00:15
1618 12:17:55.128444 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1619 12:17:55.128536 I2C: 00:15
1620 12:17:55.131833 I2C: 00:2c
1621 12:17:55.131916 PCI: 00:1e.0
1622 12:17:55.145386 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1623 12:17:55.149006 PCI: 00:1e.3 child on link 0 SPI: 00
1624 12:17:55.158531 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1625 12:17:55.158619 SPI: 00
1626 12:17:55.165435 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1627 12:17:55.171941 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1628 12:17:55.175188 PNP: 0c09.0
1629 12:17:55.182134 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1630 12:17:55.188696 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1631 12:17:55.195079 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1632 12:17:55.205160 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1633 12:17:55.211820 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1634 12:17:55.211905 GENERIC: 0.0
1635 12:17:55.215221 GENERIC: 1.0
1636 12:17:55.215304 PCI: 00:1f.3
1637 12:17:55.224958 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1638 12:17:55.235039 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1639 12:17:55.238525 PCI: 00:1f.5
1640 12:17:55.248413 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1641 12:17:55.255306 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1642 12:17:55.258682 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1643 12:17:55.265442 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1644 12:17:55.272046 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1645 12:17:55.275248 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1646 12:17:55.281794 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1647 12:17:55.288540 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1648 12:17:55.294777 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1649 12:17:55.301592 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1650 12:17:55.311656 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1651 12:17:55.314958 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1652 12:17:55.324966 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1653 12:17:55.331456 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1654 12:17:55.338247 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1655 12:17:55.341341 DOMAIN: 0000: Resource ranges:
1656 12:17:55.344695 * Base: 1000, Size: 800, Tag: 100
1657 12:17:55.347724 * Base: 1900, Size: e700, Tag: 100
1658 12:17:55.354628 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1659 12:17:55.361293 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1660 12:17:55.368018 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1661 12:17:55.374779 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1662 12:17:55.384333 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1663 12:17:55.391400 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1664 12:17:55.397669 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1665 12:17:55.407765 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1666 12:17:55.414430 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1667 12:17:55.420865 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1668 12:17:55.431137 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1669 12:17:55.437756 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1670 12:17:55.443990 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1671 12:17:55.454192 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1672 12:17:55.460898 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1673 12:17:55.467335 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1674 12:17:55.477402 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1675 12:17:55.484015 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1676 12:17:55.490808 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1677 12:17:55.500953 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1678 12:17:55.507723 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1679 12:17:55.514093 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1680 12:17:55.520813 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1681 12:17:55.530628 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1682 12:17:55.537526 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1683 12:17:55.543963 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1684 12:17:55.553759 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1685 12:17:55.560588 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1686 12:17:55.567390 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1687 12:17:55.577497 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1688 12:17:55.583814 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1689 12:17:55.590819 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1690 12:17:55.600351 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1691 12:17:55.603753 DOMAIN: 0000: Resource ranges:
1692 12:17:55.607349 * Base: 80400000, Size: 3fc00000, Tag: 200
1693 12:17:55.610704 * Base: d0000000, Size: 28000000, Tag: 200
1694 12:17:55.617008 * Base: fa000000, Size: 1000000, Tag: 200
1695 12:17:55.620412 * Base: fb001000, Size: 17ff000, Tag: 200
1696 12:17:55.623414 * Base: fe800000, Size: 300000, Tag: 200
1697 12:17:55.630105 * Base: feb80000, Size: 80000, Tag: 200
1698 12:17:55.633790 * Base: fed00000, Size: 40000, Tag: 200
1699 12:17:55.636728 * Base: fed70000, Size: 10000, Tag: 200
1700 12:17:55.640030 * Base: fed88000, Size: 8000, Tag: 200
1701 12:17:55.643258 * Base: fed93000, Size: d000, Tag: 200
1702 12:17:55.650058 * Base: feda2000, Size: 1e000, Tag: 200
1703 12:17:55.653265 * Base: fede0000, Size: 1220000, Tag: 200
1704 12:17:55.656758 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1705 12:17:55.666548 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1706 12:17:55.673149 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1707 12:17:55.679809 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1708 12:17:55.686431 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1709 12:17:55.693388 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1710 12:17:55.699919 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1711 12:17:55.706391 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1712 12:17:55.712962 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1713 12:17:55.719789 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1714 12:17:55.726052 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1715 12:17:55.733083 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1716 12:17:55.739430 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1717 12:17:55.746161 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1718 12:17:55.752618 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1719 12:17:55.759179 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1720 12:17:55.765977 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1721 12:17:55.772742 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1722 12:17:55.779004 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1723 12:17:55.785656 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1724 12:17:55.792298 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1725 12:17:55.799148 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1726 12:17:55.802582 PCI: 00:06.0: Resource ranges:
1727 12:17:55.805902 * Base: 80400000, Size: 100000, Tag: 200
1728 12:17:55.812202 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1729 12:17:55.819023 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1730 12:17:55.829136 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1731 12:17:55.835452 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1732 12:17:55.842522 Root Device assign_resources, bus 0 link: 0
1733 12:17:55.845373 DOMAIN: 0000 assign_resources, bus 0 link: 0
1734 12:17:55.852057 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1735 12:17:55.861887 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1736 12:17:55.869378 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1737 12:17:55.878710 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1738 12:17:55.882215 PCI: 00:04.0 assign_resources, bus 1 link: 0
1739 12:17:55.885124 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1740 12:17:55.895303 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1741 12:17:55.905008 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1742 12:17:55.915053 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1743 12:17:55.918390 PCI: 00:06.0 assign_resources, bus 1 link: 0
1744 12:17:55.924816 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1745 12:17:55.934886 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1746 12:17:55.938184 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1747 12:17:55.947971 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1748 12:17:55.954752 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1749 12:17:55.957963 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1750 12:17:55.964733 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1751 12:17:55.971491 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1752 12:17:55.977785 PCI: 00:14.0 assign_resources, bus 0 link: 0
1753 12:17:55.981270 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1754 12:17:55.991135 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1755 12:17:55.997939 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1756 12:17:56.004498 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1757 12:17:56.010914 PCI: 00:14.3 assign_resources, bus 0 link: 0
1758 12:17:56.014503 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1759 12:17:56.024020 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1760 12:17:56.027494 PCI: 00:15.0 assign_resources, bus 0 link: 0
1761 12:17:56.034030 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1762 12:17:56.040784 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1763 12:17:56.044145 PCI: 00:15.1 assign_resources, bus 0 link: 0
1764 12:17:56.050887 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1765 12:17:56.057567 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1766 12:17:56.064000 PCI: 00:15.3 assign_resources, bus 0 link: 0
1767 12:17:56.067390 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1768 12:17:56.077267 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1769 12:17:56.084046 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1770 12:17:56.087356 PCI: 00:19.1 assign_resources, bus 0 link: 0
1771 12:17:56.093941 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1772 12:17:56.100257 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1773 12:17:56.107241 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1774 12:17:56.110176 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1775 12:17:56.113730 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1776 12:17:56.120550 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1777 12:17:56.123765 LPC: Trying to open IO window from 800 size 1ff
1778 12:17:56.133627 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1779 12:17:56.140249 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1780 12:17:56.150359 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1781 12:17:56.153724 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1782 12:17:56.160254 Root Device assign_resources, bus 0 link: 0 done
1783 12:17:56.160369 Done setting resources.
1784 12:17:56.167125 Show resources in subtree (Root Device)...After assigning values.
1785 12:17:56.173294 Root Device child on link 0 CPU_CLUSTER: 0
1786 12:17:56.176878 CPU_CLUSTER: 0 child on link 0 APIC: 00
1787 12:17:56.176961 APIC: 00
1788 12:17:56.180152 APIC: 1e
1789 12:17:56.180235 APIC: 18
1790 12:17:56.180300 APIC: 1a
1791 12:17:56.183396 APIC: 1c
1792 12:17:56.183538 APIC: 01
1793 12:17:56.183673 APIC: 09
1794 12:17:56.187099 APIC: 08
1795 12:17:56.189995 DOMAIN: 0000 child on link 0 GPIO: 0
1796 12:17:56.199936 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1797 12:17:56.210237 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1798 12:17:56.210325 GPIO: 0
1799 12:17:56.213361 PCI: 00:00.0
1800 12:17:56.223163 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1801 12:17:56.230057 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1802 12:17:56.239981 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1803 12:17:56.249809 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1804 12:17:56.259604 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1805 12:17:56.269828 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1806 12:17:56.279482 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1807 12:17:56.286403 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1808 12:17:56.296268 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1809 12:17:56.306395 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1810 12:17:56.316024 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1811 12:17:56.326153 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1812 12:17:56.336094 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1813 12:17:56.342634 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1814 12:17:56.352606 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1815 12:17:56.362375 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1816 12:17:56.372576 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1817 12:17:56.382774 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1818 12:17:56.392295 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1819 12:17:56.402220 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1820 12:17:56.412135 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1821 12:17:56.419113 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1822 12:17:56.428676 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1823 12:17:56.438789 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1824 12:17:56.448910 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1825 12:17:56.458669 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1826 12:17:56.468786 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1827 12:17:56.478485 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1828 12:17:56.478650 PCI: 00:02.0
1829 12:17:56.488328 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1830 12:17:56.501880 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1831 12:17:56.508295 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1832 12:17:56.515064 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1833 12:17:56.524947 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1834 12:17:56.525048 GENERIC: 0.0
1835 12:17:56.531779 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1836 12:17:56.541568 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1837 12:17:56.551481 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1838 12:17:56.561745 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1839 12:17:56.564802 PCI: 01:00.0
1840 12:17:56.574637 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1841 12:17:56.584814 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1842 12:17:56.588260 PCI: 00:08.0
1843 12:17:56.588373 PCI: 00:0a.0
1844 12:17:56.598058 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1845 12:17:56.604522 PCI: 00:0d.0 child on link 0 USB0 port 0
1846 12:17:56.614831 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1847 12:17:56.618250 USB0 port 0 child on link 0 USB3 port 0
1848 12:17:56.621454 USB3 port 0
1849 12:17:56.621537 USB3 port 1
1850 12:17:56.624687 USB3 port 2
1851 12:17:56.624772 USB3 port 3
1852 12:17:56.627916 PCI: 00:14.0 child on link 0 USB0 port 0
1853 12:17:56.641485 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1854 12:17:56.644436 USB0 port 0 child on link 0 USB2 port 0
1855 12:17:56.644520 USB2 port 0
1856 12:17:56.648106 USB2 port 1
1857 12:17:56.648189 USB2 port 2
1858 12:17:56.651050 USB2 port 3
1859 12:17:56.654415 USB2 port 4
1860 12:17:56.654501 USB2 port 5
1861 12:17:56.657706 USB2 port 6
1862 12:17:56.657792 USB2 port 7
1863 12:17:56.661079 USB2 port 8
1864 12:17:56.661165 USB2 port 9
1865 12:17:56.664474 USB3 port 0
1866 12:17:56.664559 USB3 port 1
1867 12:17:56.667824 USB3 port 2
1868 12:17:56.667909 USB3 port 3
1869 12:17:56.671066 PCI: 00:14.2
1870 12:17:56.680947 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1871 12:17:56.691205 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1872 12:17:56.694397 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1873 12:17:56.707560 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1874 12:17:56.707678 GENERIC: 0.0
1875 12:17:56.711022 PCI: 00:15.0 child on link 0 I2C: 00:1a
1876 12:17:56.720962 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1877 12:17:56.724166 I2C: 00:1a
1878 12:17:56.724272 I2C: 00:31
1879 12:17:56.727390 I2C: 00:32
1880 12:17:56.730688 PCI: 00:15.1 child on link 0 I2C: 00:50
1881 12:17:56.740721 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1882 12:17:56.744586 I2C: 00:50
1883 12:17:56.744697 PCI: 00:15.2
1884 12:17:56.750829 PCI: 00:15.3 child on link 0 I2C: 00:10
1885 12:17:56.761007 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1886 12:17:56.761144 I2C: 00:10
1887 12:17:56.764325 PCI: 00:16.0
1888 12:17:56.774258 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1889 12:17:56.774367 PCI: 00:19.0
1890 12:17:56.780632 PCI: 00:19.1 child on link 0 I2C: 00:15
1891 12:17:56.790788 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1892 12:17:56.790874 I2C: 00:15
1893 12:17:56.793884 I2C: 00:2c
1894 12:17:56.793967 PCI: 00:1e.0
1895 12:17:56.803680 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1896 12:17:56.810582 PCI: 00:1e.3 child on link 0 SPI: 00
1897 12:17:56.820467 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1898 12:17:56.820554 SPI: 00
1899 12:17:56.823841 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1900 12:17:56.833619 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1901 12:17:56.837143 PNP: 0c09.0
1902 12:17:56.843463 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1903 12:17:56.850248 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1904 12:17:56.857001 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1905 12:17:56.867153 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1906 12:17:56.873453 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1907 12:17:56.873537 GENERIC: 0.0
1908 12:17:56.876787 GENERIC: 1.0
1909 12:17:56.876902 PCI: 00:1f.3
1910 12:17:56.887102 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1911 12:17:56.900378 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1912 12:17:56.900464 PCI: 00:1f.5
1913 12:17:56.910327 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1914 12:17:56.913574 Done allocating resources.
1915 12:17:56.920310 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1916 12:17:56.923500 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1917 12:17:56.929803 Configure audio over I2S with MAX98373 NAU88L25B.
1918 12:17:56.934265 Enabling BT offload
1919 12:17:56.941731 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1920 12:17:56.944848 Enabling resources...
1921 12:17:56.948181 PCI: 00:00.0 subsystem <- 8086/4609
1922 12:17:56.951538 PCI: 00:00.0 cmd <- 06
1923 12:17:56.955032 PCI: 00:02.0 subsystem <- 8086/46b3
1924 12:17:56.958427 PCI: 00:02.0 cmd <- 03
1925 12:17:56.961482 PCI: 00:04.0 subsystem <- 8086/461d
1926 12:17:56.961564 PCI: 00:04.0 cmd <- 02
1927 12:17:56.964835 PCI: 00:06.0 bridge ctrl <- 0013
1928 12:17:56.968211 PCI: 00:06.0 subsystem <- 8086/464d
1929 12:17:56.971686 PCI: 00:06.0 cmd <- 106
1930 12:17:56.975037 PCI: 00:0a.0 subsystem <- 8086/467d
1931 12:17:56.978224 PCI: 00:0a.0 cmd <- 02
1932 12:17:56.981268 PCI: 00:0d.0 subsystem <- 8086/461e
1933 12:17:56.984429 PCI: 00:0d.0 cmd <- 02
1934 12:17:56.988263 PCI: 00:14.0 subsystem <- 8086/51ed
1935 12:17:56.991497 PCI: 00:14.0 cmd <- 02
1936 12:17:56.994814 PCI: 00:14.2 subsystem <- 8086/51ef
1937 12:17:56.994897 PCI: 00:14.2 cmd <- 02
1938 12:17:57.001523 PCI: 00:14.3 subsystem <- 8086/51f0
1939 12:17:57.001606 PCI: 00:14.3 cmd <- 02
1940 12:17:57.004343 PCI: 00:15.0 subsystem <- 8086/51e8
1941 12:17:57.007808 PCI: 00:15.0 cmd <- 02
1942 12:17:57.011237 PCI: 00:15.1 subsystem <- 8086/51e9
1943 12:17:57.014642 PCI: 00:15.1 cmd <- 06
1944 12:17:57.017979 PCI: 00:15.3 subsystem <- 8086/51eb
1945 12:17:57.021093 PCI: 00:15.3 cmd <- 02
1946 12:17:57.024582 PCI: 00:16.0 subsystem <- 8086/51e0
1947 12:17:57.024691 PCI: 00:16.0 cmd <- 02
1948 12:17:57.031134 PCI: 00:19.1 subsystem <- 8086/51c6
1949 12:17:57.031218 PCI: 00:19.1 cmd <- 02
1950 12:17:57.034399 PCI: 00:1e.0 subsystem <- 8086/51a8
1951 12:17:57.037562 PCI: 00:1e.0 cmd <- 06
1952 12:17:57.041157 PCI: 00:1e.3 subsystem <- 8086/51ab
1953 12:17:57.044564 PCI: 00:1e.3 cmd <- 02
1954 12:17:57.047450 PCI: 00:1f.0 subsystem <- 8086/5182
1955 12:17:57.050941 PCI: 00:1f.0 cmd <- 407
1956 12:17:57.054341 PCI: 00:1f.3 subsystem <- 8086/51c8
1957 12:17:57.054425 PCI: 00:1f.3 cmd <- 02
1958 12:17:57.060856 PCI: 00:1f.5 subsystem <- 8086/51a4
1959 12:17:57.060942 PCI: 00:1f.5 cmd <- 406
1960 12:17:57.064284 PCI: 01:00.0 cmd <- 02
1961 12:17:57.064366 done.
1962 12:17:57.070734 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1963 12:17:57.074100 ME: Version: Unavailable
1964 12:17:57.077441 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1965 12:17:57.080826 Initializing devices...
1966 12:17:57.084130 Root Device init
1967 12:17:57.084212 mainboard: EC init
1968 12:17:57.090861 Chrome EC: Set SMI mask to 0x0000000000000000
1969 12:17:57.094033 Chrome EC: UHEPI supported
1970 12:17:57.097589 Chrome EC: clear events_b mask to 0x0000000000000000
1971 12:17:57.104654 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1972 12:17:57.111034 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1973 12:17:57.117545 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1974 12:17:57.120769 Chrome EC: Set WAKE mask to 0x0000000000000000
1975 12:17:57.124230 Root Device init finished in 38 msecs
1976 12:17:57.127555 PCI: 00:00.0 init
1977 12:17:57.131027 CPU TDP = 15 Watts
1978 12:17:57.134285 CPU PL1 = 15 Watts
1979 12:17:57.134368 CPU PL2 = 55 Watts
1980 12:17:57.137660 CPU PL4 = 123 Watts
1981 12:17:57.141045 PCI: 00:00.0 init finished in 8 msecs
1982 12:17:57.141129 PCI: 00:02.0 init
1983 12:17:57.144624 GMA: Found VBT in CBFS
1984 12:17:57.147413 GMA: Found valid VBT in CBFS
1985 12:17:57.154285 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1986 12:17:57.160591 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1987 12:17:57.163924 PCI: 00:02.0 init finished in 18 msecs
1988 12:17:57.167374 PCI: 00:06.0 init
1989 12:17:57.170875 Initializing PCH PCIe bridge.
1990 12:17:57.174187 PCI: 00:06.0 init finished in 3 msecs
1991 12:17:57.174281 PCI: 00:0a.0 init
1992 12:17:57.180755 PCI: 00:0a.0 init finished in 0 msecs
1993 12:17:57.180841 PCI: 00:14.0 init
1994 12:17:57.184074 PCI: 00:14.0 init finished in 0 msecs
1995 12:17:57.187611 PCI: 00:14.2 init
1996 12:17:57.190914 PCI: 00:14.2 init finished in 0 msecs
1997 12:17:57.194310 PCI: 00:15.0 init
1998 12:17:57.194393 I2C bus 0 version 0x3230302a
1999 12:17:57.200860 DW I2C bus 0 at 0x80655000 (400 KHz)
2000 12:17:57.204197 PCI: 00:15.0 init finished in 6 msecs
2001 12:17:57.204281 PCI: 00:15.1 init
2002 12:17:57.207706 I2C bus 1 version 0x3230302a
2003 12:17:57.210519 DW I2C bus 1 at 0x80656000 (400 KHz)
2004 12:17:57.213991 PCI: 00:15.1 init finished in 6 msecs
2005 12:17:57.217275 PCI: 00:15.3 init
2006 12:17:57.220769 I2C bus 3 version 0x3230302a
2007 12:17:57.224005 DW I2C bus 3 at 0x80657000 (400 KHz)
2008 12:17:57.227429 PCI: 00:15.3 init finished in 6 msecs
2009 12:17:57.230887 PCI: 00:16.0 init
2010 12:17:57.234180 PCI: 00:16.0 init finished in 0 msecs
2011 12:17:57.234263 PCI: 00:19.1 init
2012 12:17:57.237526 I2C bus 5 version 0x3230302a
2013 12:17:57.240895 DW I2C bus 5 at 0x80659000 (400 KHz)
2014 12:17:57.244188 PCI: 00:19.1 init finished in 6 msecs
2015 12:17:57.247471 PCI: 00:1f.0 init
2016 12:17:57.250757 IOAPIC: Initializing IOAPIC at 0xfec00000
2017 12:17:57.253742 IOAPIC: ID = 0x02
2018 12:17:57.257380 IOAPIC: Dumping registers
2019 12:17:57.257463 reg 0x0000: 0x02000000
2020 12:17:57.260767 reg 0x0001: 0x00770020
2021 12:17:57.264142 reg 0x0002: 0x00000000
2022 12:17:57.267181 IOAPIC: 120 interrupts
2023 12:17:57.270653 IOAPIC: Clearing IOAPIC at 0xfec00000
2024 12:17:57.274015 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2025 12:17:57.280721 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2026 12:17:57.283881 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2027 12:17:57.290705 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2028 12:17:57.294035 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2029 12:17:57.300578 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2030 12:17:57.303972 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2031 12:17:57.307416 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2032 12:17:57.313683 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2033 12:17:57.317073 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2034 12:17:57.323716 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2035 12:17:57.327213 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2036 12:17:57.334013 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2037 12:17:57.336937 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2038 12:17:57.340313 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2039 12:17:57.346861 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2040 12:17:57.350417 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2041 12:17:57.357174 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2042 12:17:57.360634 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2043 12:17:57.366827 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2044 12:17:57.370319 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2045 12:17:57.377081 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2046 12:17:57.380548 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2047 12:17:57.383881 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2048 12:17:57.390313 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2049 12:17:57.393549 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2050 12:17:57.400447 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2051 12:17:57.403354 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2052 12:17:57.410126 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2053 12:17:57.413561 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2054 12:17:57.420311 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2055 12:17:57.423750 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2056 12:17:57.427073 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2057 12:17:57.433327 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2058 12:17:57.436683 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2059 12:17:57.443489 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2060 12:17:57.446968 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2061 12:17:57.453324 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2062 12:17:57.456910 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2063 12:17:57.463219 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2064 12:17:57.466747 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2065 12:17:57.470002 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2066 12:17:57.476771 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2067 12:17:57.479985 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2068 12:17:57.486587 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2069 12:17:57.489981 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2070 12:17:57.496870 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2071 12:17:57.500055 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2072 12:17:57.503498 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2073 12:17:57.509854 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2074 12:17:57.513496 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2075 12:17:57.519687 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2076 12:17:57.523182 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2077 12:17:57.529614 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2078 12:17:57.532932 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2079 12:17:57.539838 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2080 12:17:57.543224 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2081 12:17:57.546511 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2082 12:17:57.553268 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2083 12:17:57.556793 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2084 12:17:57.563102 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2085 12:17:57.566584 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2086 12:17:57.572910 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2087 12:17:57.576610 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2088 12:17:57.583204 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2089 12:17:57.586231 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2090 12:17:57.589834 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2091 12:17:57.596443 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2092 12:17:57.599770 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2093 12:17:57.606595 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2094 12:17:57.609382 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2095 12:17:57.616366 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2096 12:17:57.619743 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2097 12:17:57.626464 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2098 12:17:57.629571 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2099 12:17:57.632823 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2100 12:17:57.639462 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2101 12:17:57.642654 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2102 12:17:57.649427 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2103 12:17:57.652942 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2104 12:17:57.659337 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2105 12:17:57.662651 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2106 12:17:57.666285 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2107 12:17:57.672778 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2108 12:17:57.675975 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2109 12:17:57.682804 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2110 12:17:57.686073 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2111 12:17:57.692638 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2112 12:17:57.696182 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2113 12:17:57.702652 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2114 12:17:57.706226 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2115 12:17:57.709594 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2116 12:17:57.715816 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2117 12:17:57.719278 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2118 12:17:57.725754 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2119 12:17:57.728989 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2120 12:17:57.735961 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2121 12:17:57.739262 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2122 12:17:57.746101 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2123 12:17:57.749266 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2124 12:17:57.752680 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2125 12:17:57.759076 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2126 12:17:57.762356 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2127 12:17:57.769314 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2128 12:17:57.772795 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2129 12:17:57.779113 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2130 12:17:57.782391 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2131 12:17:57.789035 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2132 12:17:57.792221 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2133 12:17:57.795538 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2134 12:17:57.802395 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2135 12:17:57.805733 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2136 12:17:57.812466 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2137 12:17:57.815787 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2138 12:17:57.822599 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2139 12:17:57.825475 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2140 12:17:57.828914 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2141 12:17:57.835859 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2142 12:17:57.839194 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2143 12:17:57.845968 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2144 12:17:57.849004 IOAPIC: Bootstrap Processor Local APIC = 0x00
2145 12:17:57.855714 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2146 12:17:57.859264 PCI: 00:1f.0 init finished in 607 msecs
2147 12:17:57.859346 PCI: 00:1f.2 init
2148 12:17:57.862342 apm_control: Disabling ACPI.
2149 12:17:57.867600 APMC done.
2150 12:17:57.871075 PCI: 00:1f.2 init finished in 6 msecs
2151 12:17:57.874655 PCI: 00:1f.3 init
2152 12:17:57.878001 PCI: 00:1f.3 init finished in 0 msecs
2153 12:17:57.878083 PCI: 01:00.0 init
2154 12:17:57.880879 PCI: 01:00.0 init finished in 0 msecs
2155 12:17:57.884386 PNP: 0c09.0 init
2156 12:17:57.887938 Google Chrome EC uptime: 12.214 seconds
2157 12:17:57.894649 Google Chrome AP resets since EC boot: 1
2158 12:17:57.897516 Google Chrome most recent AP reset causes:
2159 12:17:57.900938 0.338: 32775 shutdown: entering G3
2160 12:17:57.907445 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2161 12:17:57.911177 PNP: 0c09.0 init finished in 23 msecs
2162 12:17:57.914217 GENERIC: 0.0 init
2163 12:17:57.917689 GENERIC: 0.0 init finished in 0 msecs
2164 12:17:57.917771 GENERIC: 1.0 init
2165 12:17:57.920987 GENERIC: 1.0 init finished in 0 msecs
2166 12:17:57.924463 Devices initialized
2167 12:17:57.928042 Show all devs... After init.
2168 12:17:57.931194 Root Device: enabled 1
2169 12:17:57.931276 CPU_CLUSTER: 0: enabled 1
2170 12:17:57.934491 DOMAIN: 0000: enabled 1
2171 12:17:57.937383 GPIO: 0: enabled 1
2172 12:17:57.940737 PCI: 00:00.0: enabled 1
2173 12:17:57.940844 PCI: 00:01.0: enabled 0
2174 12:17:57.944085 PCI: 00:01.1: enabled 0
2175 12:17:57.947499 PCI: 00:02.0: enabled 1
2176 12:17:57.947581 PCI: 00:04.0: enabled 1
2177 12:17:57.950996 PCI: 00:05.0: enabled 0
2178 12:17:57.954318 PCI: 00:06.0: enabled 1
2179 12:17:57.957469 PCI: 00:06.2: enabled 0
2180 12:17:57.957551 PCI: 00:07.0: enabled 0
2181 12:17:57.960696 PCI: 00:07.1: enabled 0
2182 12:17:57.964188 PCI: 00:07.2: enabled 0
2183 12:17:57.967646 PCI: 00:07.3: enabled 0
2184 12:17:57.967728 PCI: 00:08.0: enabled 0
2185 12:17:57.970787 PCI: 00:09.0: enabled 0
2186 12:17:57.974209 PCI: 00:0a.0: enabled 1
2187 12:17:57.977215 PCI: 00:0d.0: enabled 1
2188 12:17:57.977302 PCI: 00:0d.1: enabled 0
2189 12:17:57.980767 PCI: 00:0d.2: enabled 0
2190 12:17:57.983968 PCI: 00:0d.3: enabled 0
2191 12:17:57.984050 PCI: 00:0e.0: enabled 0
2192 12:17:57.987515 PCI: 00:10.0: enabled 0
2193 12:17:57.990981 PCI: 00:10.1: enabled 0
2194 12:17:57.994029 PCI: 00:10.6: enabled 0
2195 12:17:57.994136 PCI: 00:10.7: enabled 0
2196 12:17:57.997219 PCI: 00:12.0: enabled 0
2197 12:17:58.000688 PCI: 00:12.6: enabled 0
2198 12:17:58.003981 PCI: 00:12.7: enabled 0
2199 12:17:58.004063 PCI: 00:13.0: enabled 0
2200 12:17:58.007517 PCI: 00:14.0: enabled 1
2201 12:17:58.010759 PCI: 00:14.1: enabled 0
2202 12:17:58.013906 PCI: 00:14.2: enabled 1
2203 12:17:58.014004 PCI: 00:14.3: enabled 1
2204 12:17:58.017660 PCI: 00:15.0: enabled 1
2205 12:17:58.020568 PCI: 00:15.1: enabled 1
2206 12:17:58.024241 PCI: 00:15.2: enabled 0
2207 12:17:58.024322 PCI: 00:15.3: enabled 1
2208 12:17:58.027153 PCI: 00:16.0: enabled 1
2209 12:17:58.030498 PCI: 00:16.1: enabled 0
2210 12:17:58.030580 PCI: 00:16.2: enabled 0
2211 12:17:58.033903 PCI: 00:16.3: enabled 0
2212 12:17:58.037150 PCI: 00:16.4: enabled 0
2213 12:17:58.040392 PCI: 00:16.5: enabled 0
2214 12:17:58.040473 PCI: 00:17.0: enabled 0
2215 12:17:58.044324 PCI: 00:19.0: enabled 0
2216 12:17:58.047253 PCI: 00:19.1: enabled 1
2217 12:17:58.050500 PCI: 00:19.2: enabled 0
2218 12:17:58.050582 PCI: 00:1a.0: enabled 0
2219 12:17:58.054080 PCI: 00:1c.0: enabled 0
2220 12:17:58.057445 PCI: 00:1c.1: enabled 0
2221 12:17:58.060301 PCI: 00:1c.2: enabled 0
2222 12:17:58.060383 PCI: 00:1c.3: enabled 0
2223 12:17:58.064184 PCI: 00:1c.4: enabled 0
2224 12:17:58.067157 PCI: 00:1c.5: enabled 0
2225 12:17:58.067238 PCI: 00:1c.6: enabled 0
2226 12:17:58.070408 PCI: 00:1c.7: enabled 0
2227 12:17:58.073799 PCI: 00:1d.0: enabled 0
2228 12:17:58.077012 PCI: 00:1d.1: enabled 0
2229 12:17:58.077107 PCI: 00:1d.2: enabled 0
2230 12:17:58.080173 PCI: 00:1d.3: enabled 0
2231 12:17:58.083920 PCI: 00:1e.0: enabled 1
2232 12:17:58.087198 PCI: 00:1e.1: enabled 0
2233 12:17:58.087309 PCI: 00:1e.2: enabled 0
2234 12:17:58.090655 PCI: 00:1e.3: enabled 1
2235 12:17:58.093663 PCI: 00:1f.0: enabled 1
2236 12:17:58.097090 PCI: 00:1f.1: enabled 0
2237 12:17:58.097171 PCI: 00:1f.2: enabled 1
2238 12:17:58.100177 PCI: 00:1f.3: enabled 1
2239 12:17:58.103816 PCI: 00:1f.4: enabled 0
2240 12:17:58.107197 PCI: 00:1f.5: enabled 1
2241 12:17:58.107279 PCI: 00:1f.6: enabled 0
2242 12:17:58.110506 PCI: 00:1f.7: enabled 0
2243 12:17:58.113602 GENERIC: 0.0: enabled 1
2244 12:17:58.113717 GENERIC: 0.0: enabled 1
2245 12:17:58.117345 GENERIC: 1.0: enabled 1
2246 12:17:58.120299 GENERIC: 0.0: enabled 1
2247 12:17:58.123810 GENERIC: 1.0: enabled 1
2248 12:17:58.123926 USB0 port 0: enabled 1
2249 12:17:58.127192 USB0 port 0: enabled 1
2250 12:17:58.130646 GENERIC: 0.0: enabled 1
2251 12:17:58.130720 I2C: 00:1a: enabled 1
2252 12:17:58.133637 I2C: 00:31: enabled 1
2253 12:17:58.136882 I2C: 00:32: enabled 1
2254 12:17:58.140544 I2C: 00:50: enabled 1
2255 12:17:58.140615 I2C: 00:10: enabled 1
2256 12:17:58.143781 I2C: 00:15: enabled 1
2257 12:17:58.146992 I2C: 00:2c: enabled 1
2258 12:17:58.147080 GENERIC: 0.0: enabled 1
2259 12:17:58.150347 SPI: 00: enabled 1
2260 12:17:58.153713 PNP: 0c09.0: enabled 1
2261 12:17:58.153797 GENERIC: 0.0: enabled 1
2262 12:17:58.156689 USB3 port 0: enabled 1
2263 12:17:58.160031 USB3 port 1: enabled 0
2264 12:17:58.160115 USB3 port 2: enabled 1
2265 12:17:58.163340 USB3 port 3: enabled 0
2266 12:17:58.166582 USB2 port 0: enabled 1
2267 12:17:58.169938 USB2 port 1: enabled 0
2268 12:17:58.170021 USB2 port 2: enabled 1
2269 12:17:58.173372 USB2 port 3: enabled 0
2270 12:17:58.176822 USB2 port 4: enabled 0
2271 12:17:58.176951 USB2 port 5: enabled 1
2272 12:17:58.180174 USB2 port 6: enabled 0
2273 12:17:58.183408 USB2 port 7: enabled 0
2274 12:17:58.183491 USB2 port 8: enabled 1
2275 12:17:58.186818 USB2 port 9: enabled 1
2276 12:17:58.189977 USB3 port 0: enabled 1
2277 12:17:58.193338 USB3 port 1: enabled 0
2278 12:17:58.193421 USB3 port 2: enabled 0
2279 12:17:58.196773 USB3 port 3: enabled 0
2280 12:17:58.199878 GENERIC: 0.0: enabled 1
2281 12:17:58.199961 GENERIC: 1.0: enabled 1
2282 12:17:58.203548 APIC: 00: enabled 1
2283 12:17:58.206953 APIC: 1e: enabled 1
2284 12:17:58.207037 APIC: 18: enabled 1
2285 12:17:58.210284 APIC: 1a: enabled 1
2286 12:17:58.213627 APIC: 1c: enabled 1
2287 12:17:58.213711 APIC: 01: enabled 1
2288 12:17:58.216520 APIC: 09: enabled 1
2289 12:17:58.216605 APIC: 08: enabled 1
2290 12:17:58.219911 PCI: 01:00.0: enabled 1
2291 12:17:58.226949 BS: BS_DEV_INIT run times (exec / console): 8 / 1133 ms
2292 12:17:58.230222 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2293 12:17:58.232990 ELOG: NV offset 0xf20000 size 0x4000
2294 12:17:58.241413 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2295 12:17:58.248339 ELOG: Event(17) added with size 13 at 2023-12-08 12:17:58 UTC
2296 12:17:58.255258 ELOG: Event(9E) added with size 10 at 2023-12-08 12:17:58 UTC
2297 12:17:58.261545 ELOG: Event(9F) added with size 14 at 2023-12-08 12:17:58 UTC
2298 12:17:58.268280 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2299 12:17:58.275117 ELOG: Event(A0) added with size 9 at 2023-12-08 12:17:58 UTC
2300 12:17:58.278326 elog_add_boot_reason: Logged dev mode boot
2301 12:17:58.284702 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2302 12:17:58.288416 Finalize devices...
2303 12:17:58.288498 PCI: 00:16.0 final
2304 12:17:58.291515 PCI: 00:1f.2 final
2305 12:17:58.291635 GENERIC: 0.0 final
2306 12:17:58.298103 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2307 12:17:58.301337 GENERIC: 1.0 final
2308 12:17:58.308062 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2309 12:17:58.308178 Devices finalized
2310 12:17:58.314514 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2311 12:17:58.318091 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2312 12:17:58.324870 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2313 12:17:58.327732 ME: HFSTS1 : 0x90000245
2314 12:17:58.334386 ME: HFSTS2 : 0x82100116
2315 12:17:58.337891 ME: HFSTS3 : 0x00000050
2316 12:17:58.344729 ME: HFSTS4 : 0x00004000
2317 12:17:58.347986 ME: HFSTS5 : 0x00000000
2318 12:17:58.351118 ME: HFSTS6 : 0x40600006
2319 12:17:58.354535 ME: Manufacturing Mode : NO
2320 12:17:58.361423 ME: SPI Protection Mode Enabled : YES
2321 12:17:58.364796 ME: FPFs Committed : YES
2322 12:17:58.367746 ME: Manufacturing Vars Locked : YES
2323 12:17:58.371151 ME: FW Partition Table : OK
2324 12:17:58.374685 ME: Bringup Loader Failure : NO
2325 12:17:58.377592 ME: Firmware Init Complete : YES
2326 12:17:58.381264 ME: Boot Options Present : NO
2327 12:17:58.384514 ME: Update In Progress : NO
2328 12:17:58.391171 ME: D0i3 Support : YES
2329 12:17:58.394545 ME: Low Power State Enabled : NO
2330 12:17:58.397874 ME: CPU Replaced : YES
2331 12:17:58.400846 ME: CPU Replacement Valid : YES
2332 12:17:58.404556 ME: Current Working State : 5
2333 12:17:58.407768 ME: Current Operation State : 1
2334 12:17:58.410919 ME: Current Operation Mode : 0
2335 12:17:58.414260 ME: Error Code : 0
2336 12:17:58.417504 ME: Enhanced Debug Mode : NO
2337 12:17:58.424043 ME: CPU Debug Disabled : YES
2338 12:17:58.427309 ME: TXT Support : NO
2339 12:17:58.430758 ME: WP for RO is enabled : YES
2340 12:17:58.437419 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2341 12:17:58.444058 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2342 12:17:58.447509 Ramoops buffer: 0x100000@0x76899000.
2343 12:17:58.451064 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2344 12:17:58.460591 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2345 12:17:58.464025 CBFS: 'fallback/slic' not found.
2346 12:17:58.467404 ACPI: Writing ACPI tables at 7686d000.
2347 12:17:58.467511 ACPI: * FACS
2348 12:17:58.470736 ACPI: * DSDT
2349 12:17:58.477521 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2350 12:17:58.480542 ACPI: * FADT
2351 12:17:58.480659 SCI is IRQ9
2352 12:17:58.483732 ACPI: added table 1/32, length now 40
2353 12:17:58.487180 ACPI: * SSDT
2354 12:17:58.493859 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2355 12:17:58.497417 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2356 12:17:58.503934 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2357 12:17:58.507058 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2358 12:17:58.513852 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2359 12:17:58.517276 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2360 12:17:58.523772 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2361 12:17:58.530661 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2362 12:17:58.533851 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2363 12:17:58.540340 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2364 12:17:58.543992 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2365 12:17:58.550325 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2366 12:17:58.553503 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2367 12:17:58.557229 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2368 12:17:58.567201 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2369 12:17:58.570568 PS2K: Passing 80 keymaps to kernel
2370 12:17:58.576883 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2371 12:17:58.583566 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2372 12:17:58.590414 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2373 12:17:58.597300 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2374 12:17:58.603832 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2375 12:17:58.610049 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2376 12:17:58.613383 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2377 12:17:58.620447 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2378 12:17:58.626696 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2379 12:17:58.633526 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2380 12:17:58.636654 ACPI: added table 2/32, length now 44
2381 12:17:58.640236 ACPI: * MCFG
2382 12:17:58.643380 ACPI: added table 3/32, length now 48
2383 12:17:58.643462 ACPI: * TPM2
2384 12:17:58.646656 TPM2 log created at 0x7685d000
2385 12:17:58.653366 ACPI: added table 4/32, length now 52
2386 12:17:58.653448 ACPI: * LPIT
2387 12:17:58.656906 ACPI: added table 5/32, length now 56
2388 12:17:58.659884 ACPI: * MADT
2389 12:17:58.659971 SCI is IRQ9
2390 12:17:58.663314 ACPI: added table 6/32, length now 60
2391 12:17:58.666953 cmd_reg from pmc_make_ipc_cmd 1052838
2392 12:17:58.673390 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2393 12:17:58.680212 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2394 12:17:58.686930 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2395 12:17:58.689922 PMC CrashLog size in discovery mode: 0xC00
2396 12:17:58.693292 cpu crashlog bar addr: 0x80640000
2397 12:17:58.696628 cpu discovery table offset: 0x6030
2398 12:17:58.703301 cpu_crashlog_discovery_table buffer count: 0x3
2399 12:17:58.710021 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2400 12:17:58.716384 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2401 12:17:58.723369 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2402 12:17:58.726414 PMC crashLog size in discovery mode : 0xC00
2403 12:17:58.732933 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2404 12:17:58.739851 discover mode PMC crashlog size adjusted to: 0x200
2405 12:17:58.746554 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2406 12:17:58.749908 discover mode PMC crashlog size adjusted to: 0x0
2407 12:17:58.753231 m_cpu_crashLog_size : 0x3480 bytes
2408 12:17:58.756261 CPU crashLog present.
2409 12:17:58.759865 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2410 12:17:58.766638 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2411 12:17:58.769485 current = 76876550
2412 12:17:58.772802 ACPI: * DMAR
2413 12:17:58.776327 ACPI: added table 7/32, length now 64
2414 12:17:58.779851 ACPI: added table 8/32, length now 68
2415 12:17:58.779955 ACPI: * HPET
2416 12:17:58.786517 ACPI: added table 9/32, length now 72
2417 12:17:58.786626 ACPI: done.
2418 12:17:58.789878 ACPI tables: 38528 bytes.
2419 12:17:58.793176 smbios_write_tables: 76857000
2420 12:17:58.796650 EC returned error result code 3
2421 12:17:58.800066 Couldn't obtain OEM name from CBI
2422 12:17:58.803267 Create SMBIOS type 16
2423 12:17:58.803358 Create SMBIOS type 17
2424 12:17:58.806781 Create SMBIOS type 20
2425 12:17:58.810080 GENERIC: 0.0 (WIFI Device)
2426 12:17:58.813341 SMBIOS tables: 2156 bytes.
2427 12:17:58.816328 Writing table forward entry at 0x00000500
2428 12:17:58.822970 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2429 12:17:58.826495 Writing coreboot table at 0x76891000
2430 12:17:58.833226 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2431 12:17:58.836736 1. 0000000000001000-000000000009ffff: RAM
2432 12:17:58.843190 2. 00000000000a0000-00000000000fffff: RESERVED
2433 12:17:58.846393 3. 0000000000100000-0000000076856fff: RAM
2434 12:17:58.853198 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2435 12:17:58.856493 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2436 12:17:58.862748 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2437 12:17:58.866330 7. 0000000077000000-00000000803fffff: RESERVED
2438 12:17:58.872801 8. 00000000c0000000-00000000cfffffff: RESERVED
2439 12:17:58.876305 9. 00000000f8000000-00000000f9ffffff: RESERVED
2440 12:17:58.882762 10. 00000000fb000000-00000000fb000fff: RESERVED
2441 12:17:58.886015 11. 00000000fc800000-00000000fe7fffff: RESERVED
2442 12:17:58.892950 12. 00000000feb00000-00000000feb7ffff: RESERVED
2443 12:17:58.896272 13. 00000000fec00000-00000000fecfffff: RESERVED
2444 12:17:58.899594 14. 00000000fed40000-00000000fed6ffff: RESERVED
2445 12:17:58.906248 15. 00000000fed80000-00000000fed87fff: RESERVED
2446 12:17:58.909577 16. 00000000fed90000-00000000fed92fff: RESERVED
2447 12:17:58.916163 17. 00000000feda0000-00000000feda1fff: RESERVED
2448 12:17:58.919233 18. 00000000fedc0000-00000000feddffff: RESERVED
2449 12:17:58.922567 19. 0000000100000000-000000027fbfffff: RAM
2450 12:17:58.925895 Passing 4 GPIOs to payload:
2451 12:17:58.932605 NAME | PORT | POLARITY | VALUE
2452 12:17:58.939097 lid | undefined | high | high
2453 12:17:58.942447 power | undefined | high | low
2454 12:17:58.949400 oprom | undefined | high | low
2455 12:17:58.952461 EC in RW | 0x00000151 | high | high
2456 12:17:58.955731 Board ID: 3
2457 12:17:58.955837 FW config: 0x131
2458 12:17:58.962385 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 650
2459 12:17:58.965871 coreboot table: 1788 bytes.
2460 12:17:58.969064 IMD ROOT 0. 0x76fff000 0x00001000
2461 12:17:58.972699 IMD SMALL 1. 0x76ffe000 0x00001000
2462 12:17:58.975870 FSP MEMORY 2. 0x76afe000 0x00500000
2463 12:17:58.979336 CONSOLE 3. 0x76ade000 0x00020000
2464 12:17:58.985586 RW MCACHE 4. 0x76add000 0x0000043c
2465 12:17:58.989220 RO MCACHE 5. 0x76adc000 0x00000fd8
2466 12:17:58.992498 FMAP 6. 0x76adb000 0x0000064a
2467 12:17:58.995576 TIME STAMP 7. 0x76ada000 0x00000910
2468 12:17:58.998956 VBOOT WORK 8. 0x76ac6000 0x00014000
2469 12:17:59.002291 MEM INFO 9. 0x76ac5000 0x000003b8
2470 12:17:59.005709 ROMSTG STCK10. 0x76ac4000 0x00001000
2471 12:17:59.009072 AFTER CAR 11. 0x76ab8000 0x0000c000
2472 12:17:59.012586 RAMSTAGE 12. 0x76a2e000 0x0008a000
2473 12:17:59.019205 ACPI BERT 13. 0x76a1e000 0x00010000
2474 12:17:59.022596 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2475 12:17:59.025956 REFCODE 15. 0x769ae000 0x0006f000
2476 12:17:59.029245 SMM BACKUP 16. 0x7699e000 0x00010000
2477 12:17:59.032665 IGD OPREGION17. 0x76999000 0x00004203
2478 12:17:59.035673 RAMOOPS 18. 0x76899000 0x00100000
2479 12:17:59.039015 COREBOOT 19. 0x76891000 0x00008000
2480 12:17:59.042739 ACPI 20. 0x7686d000 0x00024000
2481 12:17:59.049496 TPM2 TCGLOG21. 0x7685d000 0x00010000
2482 12:17:59.052648 PMC CRASHLOG22. 0x7685c000 0x00000c00
2483 12:17:59.055882 CPU CRASHLOG23. 0x76858000 0x00003480
2484 12:17:59.059009 SMBIOS 24. 0x76857000 0x00001000
2485 12:17:59.062708 IMD small region:
2486 12:17:59.065928 IMD ROOT 0. 0x76ffec00 0x00000400
2487 12:17:59.069062 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2488 12:17:59.072340 VPD 2. 0x76ffeb60 0x0000006c
2489 12:17:59.075901 POWER STATE 3. 0x76ffeb00 0x00000044
2490 12:17:59.079280 ROMSTAGE 4. 0x76ffeae0 0x00000004
2491 12:17:59.085746 ACPI GNVS 5. 0x76ffea80 0x00000048
2492 12:17:59.089002 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2493 12:17:59.095818 BS: BS_WRITE_TABLES run times (exec / console): 8 / 628 ms
2494 12:17:59.095922 MTRR: Physical address space:
2495 12:17:59.102363 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2496 12:17:59.109301 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2497 12:17:59.115942 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2498 12:17:59.122328 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2499 12:17:59.128927 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2500 12:17:59.135514 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2501 12:17:59.142293 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2502 12:17:59.145636 MTRR: Fixed MSR 0x250 0x0606060606060606
2503 12:17:59.149087 MTRR: Fixed MSR 0x258 0x0606060606060606
2504 12:17:59.152030 MTRR: Fixed MSR 0x259 0x0000000000000000
2505 12:17:59.159154 MTRR: Fixed MSR 0x268 0x0606060606060606
2506 12:17:59.162203 MTRR: Fixed MSR 0x269 0x0606060606060606
2507 12:17:59.165409 MTRR: Fixed MSR 0x26a 0x0606060606060606
2508 12:17:59.168859 MTRR: Fixed MSR 0x26b 0x0606060606060606
2509 12:17:59.175713 MTRR: Fixed MSR 0x26c 0x0606060606060606
2510 12:17:59.179060 MTRR: Fixed MSR 0x26d 0x0606060606060606
2511 12:17:59.182284 MTRR: Fixed MSR 0x26e 0x0606060606060606
2512 12:17:59.185593 MTRR: Fixed MSR 0x26f 0x0606060606060606
2513 12:17:59.189668 call enable_fixed_mtrr()
2514 12:17:59.193228 CPU physical address size: 39 bits
2515 12:17:59.199687 MTRR: default type WB/UC MTRR counts: 6/6.
2516 12:17:59.202943 MTRR: UC selected as default type.
2517 12:17:59.209380 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2518 12:17:59.212738 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2519 12:17:59.219403 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2520 12:17:59.226243 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2521 12:17:59.232889 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2522 12:17:59.239276 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2523 12:17:59.246155 MTRR: Fixed MSR 0x250 0x0606060606060606
2524 12:17:59.249442 MTRR: Fixed MSR 0x258 0x0606060606060606
2525 12:17:59.252541 MTRR: Fixed MSR 0x259 0x0000000000000000
2526 12:17:59.255819 MTRR: Fixed MSR 0x268 0x0606060606060606
2527 12:17:59.262465 MTRR: Fixed MSR 0x269 0x0606060606060606
2528 12:17:59.266083 MTRR: Fixed MSR 0x26a 0x0606060606060606
2529 12:17:59.269154 MTRR: Fixed MSR 0x26b 0x0606060606060606
2530 12:17:59.272507 MTRR: Fixed MSR 0x26c 0x0606060606060606
2531 12:17:59.279234 MTRR: Fixed MSR 0x26d 0x0606060606060606
2532 12:17:59.282398 MTRR: Fixed MSR 0x26e 0x0606060606060606
2533 12:17:59.285601 MTRR: Fixed MSR 0x26f 0x0606060606060606
2534 12:17:59.289126 MTRR: Fixed MSR 0x250 0x0606060606060606
2535 12:17:59.292373 MTRR: Fixed MSR 0x250 0x0606060606060606
2536 12:17:59.299246 MTRR: Fixed MSR 0x250 0x0606060606060606
2537 12:17:59.299352 call enable_fixed_mtrr()
2538 12:17:59.305598 MTRR: Fixed MSR 0x258 0x0606060606060606
2539 12:17:59.309077 MTRR: Fixed MSR 0x259 0x0000000000000000
2540 12:17:59.312395 MTRR: Fixed MSR 0x268 0x0606060606060606
2541 12:17:59.315758 MTRR: Fixed MSR 0x269 0x0606060606060606
2542 12:17:59.322576 MTRR: Fixed MSR 0x26a 0x0606060606060606
2543 12:17:59.325912 MTRR: Fixed MSR 0x26b 0x0606060606060606
2544 12:17:59.328801 MTRR: Fixed MSR 0x26c 0x0606060606060606
2545 12:17:59.332142 MTRR: Fixed MSR 0x26d 0x0606060606060606
2546 12:17:59.338647 MTRR: Fixed MSR 0x26e 0x0606060606060606
2547 12:17:59.342253 MTRR: Fixed MSR 0x26f 0x0606060606060606
2548 12:17:59.345562 MTRR: Fixed MSR 0x258 0x0606060606060606
2549 12:17:59.348874 MTRR: Fixed MSR 0x258 0x0606060606060606
2550 12:17:59.355380 MTRR: Fixed MSR 0x250 0x0606060606060606
2551 12:17:59.358628 MTRR: Fixed MSR 0x250 0x0606060606060606
2552 12:17:59.362129 MTRR: Fixed MSR 0x250 0x0606060606060606
2553 12:17:59.365309 MTRR: Fixed MSR 0x258 0x0606060606060606
2554 12:17:59.368597 MTRR: Fixed MSR 0x259 0x0000000000000000
2555 12:17:59.375532 MTRR: Fixed MSR 0x268 0x0606060606060606
2556 12:17:59.378806 MTRR: Fixed MSR 0x269 0x0606060606060606
2557 12:17:59.382091 MTRR: Fixed MSR 0x258 0x0606060606060606
2558 12:17:59.385257 MTRR: Fixed MSR 0x259 0x0000000000000000
2559 12:17:59.391706 MTRR: Fixed MSR 0x268 0x0606060606060606
2560 12:17:59.395430 MTRR: Fixed MSR 0x269 0x0606060606060606
2561 12:17:59.398376 MTRR: Fixed MSR 0x258 0x0606060606060606
2562 12:17:59.401823 MTRR: Fixed MSR 0x259 0x0000000000000000
2563 12:17:59.408485 MTRR: Fixed MSR 0x268 0x0606060606060606
2564 12:17:59.411890 MTRR: Fixed MSR 0x269 0x0606060606060606
2565 12:17:59.415359 MTRR: Fixed MSR 0x26a 0x0606060606060606
2566 12:17:59.418302 MTRR: Fixed MSR 0x26b 0x0606060606060606
2567 12:17:59.425209 MTRR: Fixed MSR 0x26c 0x0606060606060606
2568 12:17:59.428667 MTRR: Fixed MSR 0x26d 0x0606060606060606
2569 12:17:59.431534 MTRR: Fixed MSR 0x26e 0x0606060606060606
2570 12:17:59.435149 MTRR: Fixed MSR 0x26f 0x0606060606060606
2571 12:17:59.438611 call enable_fixed_mtrr()
2572 12:17:59.441948 MTRR: Fixed MSR 0x259 0x0000000000000000
2573 12:17:59.445241 MTRR: Fixed MSR 0x26a 0x0606060606060606
2574 12:17:59.451472 CPU physical address size: 39 bits
2575 12:17:59.455079 MTRR: Fixed MSR 0x26b 0x0606060606060606
2576 12:17:59.458352 MTRR: Fixed MSR 0x26a 0x0606060606060606
2577 12:17:59.461589 MTRR: Fixed MSR 0x268 0x0606060606060606
2578 12:17:59.465125 MTRR: Fixed MSR 0x26c 0x0606060606060606
2579 12:17:59.471555 MTRR: Fixed MSR 0x26d 0x0606060606060606
2580 12:17:59.474780 MTRR: Fixed MSR 0x26e 0x0606060606060606
2581 12:17:59.478106 MTRR: Fixed MSR 0x26f 0x0606060606060606
2582 12:17:59.481468 call enable_fixed_mtrr()
2583 12:17:59.484624 CPU physical address size: 39 bits
2584 12:17:59.488097 MTRR: Fixed MSR 0x269 0x0606060606060606
2585 12:17:59.491678 CPU physical address size: 39 bits
2586 12:17:59.498282 MTRR: Fixed MSR 0x26a 0x0606060606060606
2587 12:17:59.501206 MTRR: Fixed MSR 0x26b 0x0606060606060606
2588 12:17:59.504547 call enable_fixed_mtrr()
2589 12:17:59.507885 MTRR: Fixed MSR 0x26b 0x0606060606060606
2590 12:17:59.511580 MTRR: Fixed MSR 0x26c 0x0606060606060606
2591 12:17:59.514664 MTRR: Fixed MSR 0x26d 0x0606060606060606
2592 12:17:59.518191 MTRR: Fixed MSR 0x26e 0x0606060606060606
2593 12:17:59.524467 MTRR: Fixed MSR 0x26f 0x0606060606060606
2594 12:17:59.528094 MTRR: Fixed MSR 0x259 0x0000000000000000
2595 12:17:59.531096 call enable_fixed_mtrr()
2596 12:17:59.534439 MTRR: Fixed MSR 0x26c 0x0606060606060606
2597 12:17:59.537822 CPU physical address size: 39 bits
2598 12:17:59.541294 CPU physical address size: 39 bits
2599 12:17:59.544578 MTRR: Fixed MSR 0x26d 0x0606060606060606
2600 12:17:59.551378 MTRR: Fixed MSR 0x268 0x0606060606060606
2601 12:17:59.554547 MTRR: Fixed MSR 0x26e 0x0606060606060606
2602 12:17:59.557997 MTRR: Fixed MSR 0x26f 0x0606060606060606
2603 12:17:59.561342 MTRR: Fixed MSR 0x269 0x0606060606060606
2604 12:17:59.564464 call enable_fixed_mtrr()
2605 12:17:59.567840 MTRR: Fixed MSR 0x26a 0x0606060606060606
2606 12:17:59.574311 MTRR: Fixed MSR 0x26b 0x0606060606060606
2607 12:17:59.578054 MTRR: Fixed MSR 0x26c 0x0606060606060606
2608 12:17:59.581030 MTRR: Fixed MSR 0x26d 0x0606060606060606
2609 12:17:59.584349 MTRR: Fixed MSR 0x26e 0x0606060606060606
2610 12:17:59.591419 MTRR: Fixed MSR 0x26f 0x0606060606060606
2611 12:17:59.594635 CPU physical address size: 39 bits
2612 12:17:59.594740 call enable_fixed_mtrr()
2613 12:17:59.597900 CPU physical address size: 39 bits
2614 12:17:59.602733
2615 12:17:59.602838 MTRR check
2616 12:17:59.606215 Fixed MTRRs : Enabled
2617 12:17:59.606299 Variable MTRRs: Enabled
2618 12:17:59.606392
2619 12:17:59.612812 BS: BS_WRITE_TABLES exit times (exec / console): 247 / 150 ms
2620 12:17:59.616120 Checking cr50 for pending updates
2621 12:17:59.628274 Reading cr50 TPM mode
2622 12:17:59.643755 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2623 12:17:59.653397 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2624 12:17:59.656809 Checking segment from ROM address 0xf96cbe6c
2625 12:17:59.660467 Checking segment from ROM address 0xf96cbe88
2626 12:17:59.666865 Loading segment from ROM address 0xf96cbe6c
2627 12:17:59.666972 code (compression=1)
2628 12:17:59.677017 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2629 12:17:59.683746 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2630 12:17:59.686996 using LZMA
2631 12:17:59.709505 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2632 12:17:59.716239 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2633 12:17:59.724490 Loading segment from ROM address 0xf96cbe88
2634 12:17:59.727982 Entry Point 0x30000000
2635 12:17:59.728061 Loaded segments
2636 12:17:59.734761 BS: BS_PAYLOAD_LOAD run times (exec / console): 22 / 62 ms
2637 12:17:59.741095 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2638 12:17:59.744698 Finalizing chipset.
2639 12:17:59.744803 apm_control: Finalizing SMM.
2640 12:17:59.748125 APMC done.
2641 12:17:59.751054 HECI: CSE device 16.1 is disabled
2642 12:17:59.754776 HECI: CSE device 16.2 is disabled
2643 12:17:59.757676 HECI: CSE device 16.3 is disabled
2644 12:17:59.761241 HECI: CSE device 16.4 is disabled
2645 12:17:59.764542 HECI: CSE device 16.5 is disabled
2646 12:17:59.767810 HECI: Sending End-of-Post
2647 12:17:59.775855 CSE: EOP requested action: continue boot
2648 12:17:59.779652 CSE EOP successful, continuing boot
2649 12:17:59.785680 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2650 12:17:59.789267 mp_park_aps done after 0 msecs.
2651 12:17:59.792634 Jumping to boot code at 0x30000000(0x76891000)
2652 12:17:59.802416 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2653 12:17:59.806557
2654 12:17:59.806630
2655 12:17:59.806694
2656 12:17:59.809914 Starting depthcharge on Volmar...
2657 12:17:59.809983
2658 12:17:59.810348 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2659 12:17:59.810448 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2660 12:17:59.810531 Setting prompt string to ['brya:']
2661 12:17:59.810614 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2662 12:17:59.816839 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2663 12:17:59.816951
2664 12:17:59.823484 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2665 12:17:59.823568
2666 12:17:59.829658 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2667 12:17:59.829735
2668 12:17:59.833465 configure_storage: Failed to remap 1C:2
2669 12:17:59.833537
2670 12:17:59.836319 Wipe memory regions:
2671 12:17:59.836398
2672 12:17:59.839835 [0x00000000001000, 0x000000000a0000)
2673 12:17:59.839951
2674 12:17:59.842962 [0x00000000100000, 0x00000030000000)
2675 12:17:59.953742
2676 12:17:59.956826 [0x00000032668e60, 0x00000076857000)
2677 12:18:00.112687
2678 12:18:00.115951 [0x00000100000000, 0x0000027fc00000)
2679 12:18:00.984472
2680 12:18:00.987768 ec_init: CrosEC protocol v3 supported (256, 256)
2681 12:18:01.595501
2682 12:18:01.595648 R8152: Initializing
2683 12:18:01.595727
2684 12:18:01.598468 Version 9 (ocp_data = 6010)
2685 12:18:01.598561
2686 12:18:01.601908 R8152: Done initializing
2687 12:18:01.601984
2688 12:18:01.605033 Adding net device
2689 12:18:01.906395
2690 12:18:01.909225 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2691 12:18:01.909316
2692 12:18:01.909382
2693 12:18:01.909443
2694 12:18:01.909734 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2696 12:18:02.010050 brya: tftpboot 192.168.201.1 12217868/tftp-deploy-g6n76l_6/kernel/bzImage 12217868/tftp-deploy-g6n76l_6/kernel/cmdline 12217868/tftp-deploy-g6n76l_6/ramdisk/ramdisk.cpio.gz
2697 12:18:02.010206 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2698 12:18:02.010326 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2699 12:18:02.014736 tftpboot 192.168.201.1 12217868/tftp-deploy-g6n76l_6/kernel/bzImploy-g6n76l_6/kernel/cmdline 12217868/tftp-deploy-g6n76l_6/ramdisk/ramdisk.cpio.gz
2700 12:18:02.014825
2701 12:18:02.014912 Waiting for link
2702 12:18:02.217283
2703 12:18:02.217421 done.
2704 12:18:02.217490
2705 12:18:02.217552 MAC: 00:e0:4c:68:05:c6
2706 12:18:02.217623
2707 12:18:02.220629 Sending DHCP discover... done.
2708 12:18:02.220753
2709 12:18:02.223689 Waiting for reply... done.
2710 12:18:02.223795
2711 12:18:02.227081 Sending DHCP request... done.
2712 12:18:02.227196
2713 12:18:02.230483 Waiting for reply... done.
2714 12:18:02.230592
2715 12:18:02.233860 My ip is 192.168.201.17
2716 12:18:02.233946
2717 12:18:02.237120 The DHCP server ip is 192.168.201.1
2718 12:18:02.237208
2719 12:18:02.240346 TFTP server IP predefined by user: 192.168.201.1
2720 12:18:02.240456
2721 12:18:02.247012 Bootfile predefined by user: 12217868/tftp-deploy-g6n76l_6/kernel/bzImage
2722 12:18:02.247093
2723 12:18:02.250240 Sending tftp read request... done.
2724 12:18:02.250316
2725 12:18:02.256953 Waiting for the transfer...
2726 12:18:02.257090
2727 12:18:02.535121 00000000 ################################################################
2728 12:18:02.535252
2729 12:18:02.793864 00080000 ################################################################
2730 12:18:02.793997
2731 12:18:03.052209 00100000 ################################################################
2732 12:18:03.052343
2733 12:18:03.311634 00180000 ################################################################
2734 12:18:03.311765
2735 12:18:03.564584 00200000 ################################################################
2736 12:18:03.564746
2737 12:18:03.818616 00280000 ################################################################
2738 12:18:03.818757
2739 12:18:04.070343 00300000 ################################################################
2740 12:18:04.070519
2741 12:18:04.323887 00380000 ################################################################
2742 12:18:04.324054
2743 12:18:04.576621 00400000 ################################################################
2744 12:18:04.576785
2745 12:18:04.828222 00480000 ################################################################
2746 12:18:04.828392
2747 12:18:05.081341 00500000 ################################################################
2748 12:18:05.081500
2749 12:18:05.335080 00580000 ################################################################
2750 12:18:05.335246
2751 12:18:05.592551 00600000 ################################################################
2752 12:18:05.592710
2753 12:18:05.859935 00680000 ################################################################
2754 12:18:05.860080
2755 12:18:06.116696 00700000 ################################################################
2756 12:18:06.116865
2757 12:18:06.378349 00780000 ################################################################
2758 12:18:06.378485
2759 12:18:06.642905 00800000 ################################################################
2760 12:18:06.643072
2761 12:18:06.922266 00880000 ################################################################
2762 12:18:06.922465
2763 12:18:07.190200 00900000 ################################################################
2764 12:18:07.190333
2765 12:18:07.449779 00980000 ################################################################
2766 12:18:07.449945
2767 12:18:07.706140 00a00000 ################################################################
2768 12:18:07.706298
2769 12:18:07.973507 00a80000 ################################################################
2770 12:18:07.973644
2771 12:18:07.991450 00b00000 ##### done.
2772 12:18:07.991568
2773 12:18:07.994817 The bootfile was 11571200 bytes long.
2774 12:18:07.998134
2775 12:18:08.001743 Sending tftp read request... done.
2776 12:18:08.001855
2777 12:18:08.001955 Waiting for the transfer...
2778 12:18:08.002055
2779 12:18:08.268864 00000000 ################################################################
2780 12:18:08.269042
2781 12:18:08.513901 00080000 ################################################################
2782 12:18:08.514033
2783 12:18:08.763841 00100000 ################################################################
2784 12:18:08.763972
2785 12:18:09.011604 00180000 ################################################################
2786 12:18:09.011769
2787 12:18:09.263502 00200000 ################################################################
2788 12:18:09.263657
2789 12:18:09.515322 00280000 ################################################################
2790 12:18:09.515511
2791 12:18:09.765757 00300000 ################################################################
2792 12:18:09.765928
2793 12:18:10.014114 00380000 ################################################################
2794 12:18:10.014247
2795 12:18:10.266073 00400000 ################################################################
2796 12:18:10.266206
2797 12:18:10.517195 00480000 ################################################################
2798 12:18:10.517353
2799 12:18:10.770651 00500000 ################################################################
2800 12:18:10.770851
2801 12:18:10.956756 00580000 ################################################ done.
2802 12:18:10.956915
2803 12:18:10.960413 Sending tftp read request... done.
2804 12:18:10.960498
2805 12:18:10.963328 Waiting for the transfer...
2806 12:18:10.963435
2807 12:18:10.966688 00000000 # done.
2808 12:18:10.966772
2809 12:18:10.973604 Command line loaded dynamically from TFTP file: 12217868/tftp-deploy-g6n76l_6/kernel/cmdline
2810 12:18:10.976954
2811 12:18:11.000184 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12217868/extract-nfsrootfs-1sjityoo,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2812 12:18:11.005382
2813 12:18:11.008529 Shutting down all USB controllers.
2814 12:18:11.008637
2815 12:18:11.008732 Removing current net device
2816 12:18:11.008821
2817 12:18:11.012004 Finalizing coreboot
2818 12:18:11.012087
2819 12:18:11.018781 Exiting depthcharge with code 4 at timestamp: 21608924
2820 12:18:11.018864
2821 12:18:11.018930
2822 12:18:11.018991 Starting kernel ...
2823 12:18:11.019049
2824 12:18:11.019106
2825 12:18:11.019474 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2826 12:18:11.019569 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2827 12:18:11.019645 Setting prompt string to ['Linux version [0-9]']
2828 12:18:11.019713 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2829 12:18:11.019780 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2831 12:22:40.020710 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2833 12:22:40.021917 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2835 12:22:40.022864 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2838 12:22:40.024580 end: 2 depthcharge-action (duration 00:05:00) [common]
2840 12:22:40.026057 Cleaning after the job
2841 12:22:40.026561 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217868/tftp-deploy-g6n76l_6/ramdisk
2842 12:22:40.031710 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217868/tftp-deploy-g6n76l_6/kernel
2843 12:22:40.040684 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217868/tftp-deploy-g6n76l_6/nfsrootfs
2844 12:22:40.135222 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217868/tftp-deploy-g6n76l_6/modules
2845 12:22:40.135914 start: 5.1 power-off (timeout 00:00:30) [common]
2846 12:22:40.136090 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-10' '--port=1' '--command=off'
2847 12:22:40.213014 >> Command sent successfully.
2848 12:22:40.218547 Returned 0 in 0 seconds
2849 12:22:40.319492 end: 5.1 power-off (duration 00:00:00) [common]
2851 12:22:40.321504 start: 5.2 read-feedback (timeout 00:10:00) [common]
2852 12:22:40.322832 Listened to connection for namespace 'common' for up to 1s
2854 12:22:40.324185 Listened to connection for namespace 'common' for up to 1s
2855 12:22:41.323614 Finalising connection for namespace 'common'
2856 12:22:41.324304 Disconnecting from shell: Finalise
2857 12:22:41.324716
2858 12:22:41.425868 end: 5.2 read-feedback (duration 00:00:01) [common]
2859 12:22:41.426505 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12217868
2860 12:22:41.768375 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12217868
2861 12:22:41.768604 JobError: Your job cannot terminate cleanly.