Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 12:17:25.250723 lava-dispatcher, installed at version: 2023.10
2 12:17:25.251018 start: 0 validate
3 12:17:25.251215 Start time: 2023-12-08 12:17:25.251202+00:00 (UTC)
4 12:17:25.251388 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:17:25.251600 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 12:17:25.532827 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:17:25.533069 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:17:25.813211 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:17:25.813481 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:17:32.595601 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:17:32.595930 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:17:32.908775 validate duration: 7.66
14 12:17:32.909369 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:17:32.909605 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:17:32.909819 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:17:32.910085 Not decompressing ramdisk as can be used compressed.
18 12:17:32.910286 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 12:17:32.910452 saving as /var/lib/lava/dispatcher/tmp/12217888/tftp-deploy-h5lj97t1/ramdisk/initrd.cpio.gz
20 12:17:32.910619 total size: 5432690 (5 MB)
21 12:17:34.648574 progress 0 % (0 MB)
22 12:17:34.651422 progress 5 % (0 MB)
23 12:17:34.654042 progress 10 % (0 MB)
24 12:17:34.656558 progress 15 % (0 MB)
25 12:17:34.721434 progress 20 % (1 MB)
26 12:17:34.724518 progress 25 % (1 MB)
27 12:17:34.727634 progress 30 % (1 MB)
28 12:17:34.730904 progress 35 % (1 MB)
29 12:17:34.733747 progress 40 % (2 MB)
30 12:17:34.736561 progress 45 % (2 MB)
31 12:17:34.739301 progress 50 % (2 MB)
32 12:17:34.742347 progress 55 % (2 MB)
33 12:17:34.745032 progress 60 % (3 MB)
34 12:17:34.747385 progress 65 % (3 MB)
35 12:17:34.750194 progress 70 % (3 MB)
36 12:17:34.752384 progress 75 % (3 MB)
37 12:17:34.754538 progress 80 % (4 MB)
38 12:17:34.756509 progress 85 % (4 MB)
39 12:17:34.758633 progress 90 % (4 MB)
40 12:17:34.760521 progress 95 % (4 MB)
41 12:17:34.762302 progress 100 % (5 MB)
42 12:17:34.762605 5 MB downloaded in 1.85 s (2.80 MB/s)
43 12:17:34.762845 end: 1.1.1 http-download (duration 00:00:02) [common]
45 12:17:34.763288 end: 1.1 download-retry (duration 00:00:02) [common]
46 12:17:34.763434 start: 1.2 download-retry (timeout 00:09:58) [common]
47 12:17:34.763579 start: 1.2.1 http-download (timeout 00:09:58) [common]
48 12:17:34.763777 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:17:34.763888 saving as /var/lib/lava/dispatcher/tmp/12217888/tftp-deploy-h5lj97t1/kernel/bzImage
50 12:17:34.764000 total size: 11571200 (11 MB)
51 12:17:34.764114 No compression specified
52 12:17:34.765974 progress 0 % (0 MB)
53 12:17:34.769552 progress 5 % (0 MB)
54 12:17:34.773025 progress 10 % (1 MB)
55 12:17:34.776544 progress 15 % (1 MB)
56 12:17:34.780199 progress 20 % (2 MB)
57 12:17:34.783703 progress 25 % (2 MB)
58 12:17:34.787039 progress 30 % (3 MB)
59 12:17:34.790549 progress 35 % (3 MB)
60 12:17:34.794058 progress 40 % (4 MB)
61 12:17:34.797447 progress 45 % (4 MB)
62 12:17:34.817333 progress 50 % (5 MB)
63 12:17:34.820889 progress 55 % (6 MB)
64 12:17:34.840991 progress 60 % (6 MB)
65 12:17:34.844686 progress 65 % (7 MB)
66 12:17:34.864687 progress 70 % (7 MB)
67 12:17:34.867825 progress 75 % (8 MB)
68 12:17:34.892529 progress 80 % (8 MB)
69 12:17:34.895970 progress 85 % (9 MB)
70 12:17:34.899210 progress 90 % (9 MB)
71 12:17:34.902613 progress 95 % (10 MB)
72 12:17:34.906032 progress 100 % (11 MB)
73 12:17:34.906188 11 MB downloaded in 0.14 s (77.61 MB/s)
74 12:17:34.906394 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:17:34.906774 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:17:34.906898 start: 1.3 download-retry (timeout 00:09:58) [common]
78 12:17:34.907026 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 12:17:34.907199 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 12:17:34.907300 saving as /var/lib/lava/dispatcher/tmp/12217888/tftp-deploy-h5lj97t1/nfsrootfs/full.rootfs.tar
81 12:17:34.907391 total size: 133380384 (127 MB)
82 12:17:34.907491 Using unxz to decompress xz
83 12:17:34.912057 progress 0 % (0 MB)
84 12:17:35.616099 progress 5 % (6 MB)
85 12:17:36.094424 progress 10 % (12 MB)
86 12:17:38.129629 progress 15 % (19 MB)
87 12:17:38.372857 progress 20 % (25 MB)
88 12:17:38.656595 progress 25 % (31 MB)
89 12:17:39.195039 progress 30 % (38 MB)
90 12:17:39.715591 progress 35 % (44 MB)
91 12:17:41.994978 progress 40 % (50 MB)
92 12:17:42.666841 progress 45 % (57 MB)
93 12:17:43.227845 progress 50 % (63 MB)
94 12:17:43.700415 progress 55 % (69 MB)
95 12:17:44.110343 progress 60 % (76 MB)
96 12:17:44.552403 progress 65 % (82 MB)
97 12:17:44.997357 progress 70 % (89 MB)
98 12:17:45.408533 progress 75 % (95 MB)
99 12:17:45.924512 progress 80 % (101 MB)
100 12:17:46.416893 progress 85 % (108 MB)
101 12:17:46.711925 progress 90 % (114 MB)
102 12:17:47.145653 progress 95 % (120 MB)
103 12:17:47.702503 progress 100 % (127 MB)
104 12:17:47.708023 127 MB downloaded in 12.80 s (9.94 MB/s)
105 12:17:47.708303 end: 1.3.1 http-download (duration 00:00:13) [common]
107 12:17:47.708582 end: 1.3 download-retry (duration 00:00:13) [common]
108 12:17:47.708675 start: 1.4 download-retry (timeout 00:09:45) [common]
109 12:17:47.708765 start: 1.4.1 http-download (timeout 00:09:45) [common]
110 12:17:47.708927 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:17:47.709005 saving as /var/lib/lava/dispatcher/tmp/12217888/tftp-deploy-h5lj97t1/modules/modules.tar
112 12:17:47.709069 total size: 483904 (0 MB)
113 12:17:47.709166 Using unxz to decompress xz
114 12:17:47.992186 progress 6 % (0 MB)
115 12:17:47.992660 progress 13 % (0 MB)
116 12:17:47.992912 progress 20 % (0 MB)
117 12:17:47.994545 progress 27 % (0 MB)
118 12:17:47.996600 progress 33 % (0 MB)
119 12:17:47.998526 progress 40 % (0 MB)
120 12:17:48.000493 progress 47 % (0 MB)
121 12:17:48.002467 progress 54 % (0 MB)
122 12:17:48.004718 progress 60 % (0 MB)
123 12:17:48.007703 progress 67 % (0 MB)
124 12:17:48.010599 progress 74 % (0 MB)
125 12:17:48.012750 progress 81 % (0 MB)
126 12:17:48.014685 progress 88 % (0 MB)
127 12:17:48.016764 progress 94 % (0 MB)
128 12:17:48.019227 progress 100 % (0 MB)
129 12:17:48.025748 0 MB downloaded in 0.32 s (1.46 MB/s)
130 12:17:48.026088 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:17:48.026522 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:17:48.026659 start: 1.5 prepare-tftp-overlay (timeout 00:09:45) [common]
134 12:17:48.026825 start: 1.5.1 extract-nfsrootfs (timeout 00:09:45) [common]
135 12:17:57.475811 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12217888/extract-nfsrootfs-s_7bhy4f
136 12:17:57.476041 end: 1.5.1 extract-nfsrootfs (duration 00:00:09) [common]
137 12:17:57.476216 start: 1.5.2 lava-overlay (timeout 00:09:35) [common]
138 12:17:57.476479 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl
139 12:17:57.476665 makedir: /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin
140 12:17:57.476828 makedir: /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/tests
141 12:17:57.476993 makedir: /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/results
142 12:17:57.477242 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-add-keys
143 12:17:57.477530 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-add-sources
144 12:17:57.477706 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-background-process-start
145 12:17:57.477889 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-background-process-stop
146 12:17:57.478082 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-common-functions
147 12:17:57.478272 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-echo-ipv4
148 12:17:57.478463 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-install-packages
149 12:17:57.478655 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-installed-packages
150 12:17:57.478843 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-os-build
151 12:17:57.479016 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-probe-channel
152 12:17:57.479178 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-probe-ip
153 12:17:57.479363 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-target-ip
154 12:17:57.479528 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-target-mac
155 12:17:57.479702 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-target-storage
156 12:17:57.479896 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-test-case
157 12:17:57.480083 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-test-event
158 12:17:57.480251 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-test-feedback
159 12:17:57.480384 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-test-raise
160 12:17:57.480515 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-test-reference
161 12:17:57.480674 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-test-runner
162 12:17:57.480804 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-test-set
163 12:17:57.480948 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-test-shell
164 12:17:57.481094 Updating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-install-packages (oe)
165 12:17:57.955115 Updating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/bin/lava-installed-packages (oe)
166 12:17:57.955382 Creating /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/environment
167 12:17:57.955518 LAVA metadata
168 12:17:57.955600 - LAVA_JOB_ID=12217888
169 12:17:57.955671 - LAVA_DISPATCHER_IP=192.168.201.1
170 12:17:57.955805 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:35) [common]
171 12:17:57.955907 skipped lava-vland-overlay
172 12:17:57.956020 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 12:17:57.956164 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:35) [common]
174 12:17:57.956299 skipped lava-multinode-overlay
175 12:17:57.956416 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 12:17:57.956498 start: 1.5.2.3 test-definition (timeout 00:09:35) [common]
177 12:17:57.956581 Loading test definitions
178 12:17:57.956678 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:35) [common]
179 12:17:57.956753 Using /lava-12217888 at stage 0
180 12:17:57.957086 uuid=12217888_1.5.2.3.1 testdef=None
181 12:17:57.957235 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 12:17:57.957322 start: 1.5.2.3.2 test-overlay (timeout 00:09:35) [common]
183 12:17:57.957895 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 12:17:57.958156 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:35) [common]
186 12:17:57.958826 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 12:17:57.959062 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:35) [common]
189 12:17:58.024278 runner path: /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/0/tests/0_dmesg test_uuid 12217888_1.5.2.3.1
190 12:17:58.024503 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 12:17:58.024788 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:35) [common]
193 12:17:58.024865 Using /lava-12217888 at stage 1
194 12:17:58.025243 uuid=12217888_1.5.2.3.5 testdef=None
195 12:17:58.025334 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 12:17:58.025452 start: 1.5.2.3.6 test-overlay (timeout 00:09:35) [common]
197 12:17:58.025985 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 12:17:58.026213 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:35) [common]
200 12:17:58.026860 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 12:17:58.027099 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:35) [common]
203 12:17:59.993561 runner path: /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/1/tests/1_bootrr test_uuid 12217888_1.5.2.3.5
204 12:17:59.993781 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:02) [common]
206 12:17:59.994006 Creating lava-test-runner.conf files
207 12:17:59.994072 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/0 for stage 0
208 12:17:59.994192 - 0_dmesg
209 12:17:59.994277 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217888/lava-overlay-u7lu0twl/lava-12217888/1 for stage 1
210 12:17:59.994373 - 1_bootrr
211 12:17:59.994474 end: 1.5.2.3 test-definition (duration 00:00:02) [common]
212 12:17:59.994563 start: 1.5.2.4 compress-overlay (timeout 00:09:33) [common]
213 12:18:00.002087 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 12:18:00.002211 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
215 12:18:00.002300 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 12:18:00.002390 end: 1.5.2 lava-overlay (duration 00:00:03) [common]
217 12:18:00.002478 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
218 12:18:00.207393 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 12:18:00.207787 start: 1.5.4 extract-modules (timeout 00:09:33) [common]
220 12:18:00.207908 extracting modules file /var/lib/lava/dispatcher/tmp/12217888/tftp-deploy-h5lj97t1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217888/extract-nfsrootfs-s_7bhy4f
221 12:18:00.232614 extracting modules file /var/lib/lava/dispatcher/tmp/12217888/tftp-deploy-h5lj97t1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217888/extract-overlay-ramdisk-hi_yh9nx/ramdisk
222 12:18:00.284947 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 12:18:00.285124 start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
224 12:18:00.285227 [common] Applying overlay to NFS
225 12:18:00.285302 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12217888/compress-overlay-girmqztj/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12217888/extract-nfsrootfs-s_7bhy4f
226 12:18:00.293767 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 12:18:00.293894 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
228 12:18:00.293990 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 12:18:00.294082 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
230 12:18:00.294164 Building ramdisk /var/lib/lava/dispatcher/tmp/12217888/extract-overlay-ramdisk-hi_yh9nx/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12217888/extract-overlay-ramdisk-hi_yh9nx/ramdisk
231 12:18:01.612539 >> 30353 blocks
232 12:18:02.212316 rename /var/lib/lava/dispatcher/tmp/12217888/extract-overlay-ramdisk-hi_yh9nx/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12217888/tftp-deploy-h5lj97t1/ramdisk/ramdisk.cpio.gz
233 12:18:02.212796 end: 1.5.7 compress-ramdisk (duration 00:00:02) [common]
234 12:18:02.212973 start: 1.5.8 prepare-kernel (timeout 00:09:31) [common]
235 12:18:02.213105 start: 1.5.8.1 prepare-fit (timeout 00:09:31) [common]
236 12:18:02.213220 No mkimage arch provided, not using FIT.
237 12:18:02.213331 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 12:18:02.213437 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 12:18:02.213599 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
240 12:18:02.213755 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:31) [common]
241 12:18:02.213871 No LXC device requested
242 12:18:02.214000 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 12:18:02.214137 start: 1.7 deploy-device-env (timeout 00:09:31) [common]
244 12:18:02.214265 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 12:18:02.214378 Checking files for TFTP limit of 4294967296 bytes.
246 12:18:02.214910 end: 1 tftp-deploy (duration 00:00:29) [common]
247 12:18:02.215052 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 12:18:02.215185 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 12:18:02.215363 substitutions:
250 12:18:02.215466 - {DTB}: None
251 12:18:02.215570 - {INITRD}: 12217888/tftp-deploy-h5lj97t1/ramdisk/ramdisk.cpio.gz
252 12:18:02.215671 - {KERNEL}: 12217888/tftp-deploy-h5lj97t1/kernel/bzImage
253 12:18:02.215772 - {LAVA_MAC}: None
254 12:18:02.215872 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12217888/extract-nfsrootfs-s_7bhy4f
255 12:18:02.215971 - {NFS_SERVER_IP}: 192.168.201.1
256 12:18:02.216092 - {PRESEED_CONFIG}: None
257 12:18:02.216206 - {PRESEED_LOCAL}: None
258 12:18:02.216304 - {RAMDISK}: 12217888/tftp-deploy-h5lj97t1/ramdisk/ramdisk.cpio.gz
259 12:18:02.216402 - {ROOT_PART}: None
260 12:18:02.216500 - {ROOT}: None
261 12:18:02.216596 - {SERVER_IP}: 192.168.201.1
262 12:18:02.216693 - {TEE}: None
263 12:18:02.216789 Parsed boot commands:
264 12:18:02.216883 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 12:18:02.217123 Parsed boot commands: tftpboot 192.168.201.1 12217888/tftp-deploy-h5lj97t1/kernel/bzImage 12217888/tftp-deploy-h5lj97t1/kernel/cmdline 12217888/tftp-deploy-h5lj97t1/ramdisk/ramdisk.cpio.gz
266 12:18:02.217254 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 12:18:02.217385 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 12:18:02.217523 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 12:18:02.217657 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 12:18:02.217770 Not connected, no need to disconnect.
271 12:18:02.217889 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 12:18:02.218016 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 12:18:02.218123 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
274 12:18:02.221934 Setting prompt string to ['lava-test: # ']
275 12:18:02.222349 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 12:18:02.222501 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 12:18:02.222621 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 12:18:02.222738 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 12:18:02.223395 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
280 12:18:07.615133 >> Command sent successfully.
281 12:18:07.617897 Returned 0 in 5 seconds
282 12:18:07.718293 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 12:18:07.718806 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 12:18:07.718939 start: 2.2.3 depthcharge-start (timeout 00:04:54) [common]
286 12:18:07.719062 Setting prompt string to 'Starting depthcharge on Helios...'
287 12:18:07.719164 Changing prompt to 'Starting depthcharge on Helios...'
288 12:18:07.719267 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 12:18:07.719659 [Enter `^Ec?' for help]
290 12:18:08.338332
291 12:18:08.338532
292 12:18:08.348468 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 12:18:08.351846 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 12:18:08.358564 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 12:18:08.362223 CPU: AES supported, TXT NOT supported, VT supported
296 12:18:08.368867 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 12:18:08.372179 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 12:18:08.379075 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 12:18:08.382006 VBOOT: Loading verstage.
300 12:18:08.385508 FMAP: Found "FLASH" version 1.1 at 0xc04000.
301 12:18:08.391978 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 12:18:08.395193 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 12:18:08.398352 CBFS @ c08000 size 3f8000
304 12:18:08.405399 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 12:18:08.408512 CBFS: Locating 'fallback/verstage'
306 12:18:08.411744 CBFS: Found @ offset 10fb80 size 1072c
307 12:18:08.414907
308 12:18:08.415029
309 12:18:08.425321 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 12:18:08.439454 Probing TPM: . done!
311 12:18:08.442982 TPM ready after 0 ms
312 12:18:08.446000 Connected to device vid:did:rid of 1ae0:0028:00
313 12:18:08.456137 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
314 12:18:08.459753 Initialized TPM device CR50 revision 0
315 12:18:08.506828 tlcl_send_startup: Startup return code is 0
316 12:18:08.507023 TPM: setup succeeded
317 12:18:08.519755 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 12:18:08.523078 Chrome EC: UHEPI supported
319 12:18:08.526698 Phase 1
320 12:18:08.529969 FMAP: area GBB found @ c05000 (12288 bytes)
321 12:18:08.536904 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 12:18:08.536998 Phase 2
323 12:18:08.539964 Phase 3
324 12:18:08.543171 FMAP: area GBB found @ c05000 (12288 bytes)
325 12:18:08.549827 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 12:18:08.556538 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
327 12:18:08.559929 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
328 12:18:08.566355 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 12:18:08.581901 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
330 12:18:08.585588 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
331 12:18:08.592610 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 12:18:08.596639 Phase 4
333 12:18:08.599498 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
334 12:18:08.606067 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 12:18:08.785650 VB2:vb2_rsa_verify_digest() Digest check failed!
336 12:18:08.792231 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
337 12:18:08.792374 Saving nvdata
338 12:18:08.795441 Reboot requested (10020007)
339 12:18:08.798863 board_reset() called!
340 12:18:08.798950 full_reset() called!
341 12:18:13.305733
342 12:18:13.305895
343 12:18:13.315262 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
344 12:18:13.318775 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
345 12:18:13.325590 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
346 12:18:13.329063 CPU: AES supported, TXT NOT supported, VT supported
347 12:18:13.335089 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
348 12:18:13.338897 PCH: device id 0284 (rev 00) is Cometlake-U Premium
349 12:18:13.345144 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
350 12:18:13.348421 VBOOT: Loading verstage.
351 12:18:13.351705 FMAP: Found "FLASH" version 1.1 at 0xc04000.
352 12:18:13.358825 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
353 12:18:13.364901 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
354 12:18:13.365029 CBFS @ c08000 size 3f8000
355 12:18:13.372131 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
356 12:18:13.374931 CBFS: Locating 'fallback/verstage'
357 12:18:13.378387 CBFS: Found @ offset 10fb80 size 1072c
358 12:18:13.382208
359 12:18:13.382300
360 12:18:13.392410 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
361 12:18:13.406849 Probing TPM: . done!
362 12:18:13.410330 TPM ready after 0 ms
363 12:18:13.413403 Connected to device vid:did:rid of 1ae0:0028:00
364 12:18:13.423694 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
365 12:18:13.426762 Initialized TPM device CR50 revision 0
366 12:18:13.474002 tlcl_send_startup: Startup return code is 0
367 12:18:13.474181 TPM: setup succeeded
368 12:18:13.486567 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
369 12:18:13.490876 Chrome EC: UHEPI supported
370 12:18:13.494141 Phase 1
371 12:18:13.496998 FMAP: area GBB found @ c05000 (12288 bytes)
372 12:18:13.503852 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
373 12:18:13.510510 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
374 12:18:13.513595 Recovery requested (1009000e)
375 12:18:13.519610 Saving nvdata
376 12:18:13.525985 tlcl_extend: response is 0
377 12:18:13.534912 tlcl_extend: response is 0
378 12:18:13.541648 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 12:18:13.544499 CBFS @ c08000 size 3f8000
380 12:18:13.551159 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 12:18:13.554825 CBFS: Locating 'fallback/romstage'
382 12:18:13.558249 CBFS: Found @ offset 80 size 145fc
383 12:18:13.561360 Accumulated console time in verstage 99 ms
384 12:18:13.561453
385 12:18:13.561522
386 12:18:13.574399 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
387 12:18:13.581270 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
388 12:18:13.584473 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
389 12:18:13.587885 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
390 12:18:13.594244 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
391 12:18:13.597740 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
392 12:18:13.600834 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
393 12:18:13.604638 TCO_STS: 0000 0000
394 12:18:13.607953 GEN_PMCON: e0015238 00000200
395 12:18:13.610690 GBLRST_CAUSE: 00000000 00000000
396 12:18:13.610776 prev_sleep_state 5
397 12:18:13.614318 Boot Count incremented to 74024
398 12:18:13.621497 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 12:18:13.624448 CBFS @ c08000 size 3f8000
400 12:18:13.631042 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 12:18:13.631157 CBFS: Locating 'fspm.bin'
402 12:18:13.637761 CBFS: Found @ offset 5ffc0 size 71000
403 12:18:13.640863 Chrome EC: UHEPI supported
404 12:18:13.647334 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
405 12:18:13.651282 Probing TPM: done!
406 12:18:13.657901 Connected to device vid:did:rid of 1ae0:0028:00
407 12:18:13.668233 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
408 12:18:13.674242 Initialized TPM device CR50 revision 0
409 12:18:13.682997 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
410 12:18:13.689497 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
411 12:18:13.692969 MRC cache found, size 1948
412 12:18:13.696085 bootmode is set to: 2
413 12:18:13.699270 PRMRR disabled by config.
414 12:18:13.699358 SPD INDEX = 1
415 12:18:13.706200 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
416 12:18:13.710002 CBFS @ c08000 size 3f8000
417 12:18:13.715917 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
418 12:18:13.716033 CBFS: Locating 'spd.bin'
419 12:18:13.719473 CBFS: Found @ offset 5fb80 size 400
420 12:18:13.722807 SPD: module type is LPDDR3
421 12:18:13.726027 SPD: module part is
422 12:18:13.732414 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
423 12:18:13.735896 SPD: device width 4 bits, bus width 8 bits
424 12:18:13.739045 SPD: module size is 4096 MB (per channel)
425 12:18:13.742399 memory slot: 0 configuration done.
426 12:18:13.745890 memory slot: 2 configuration done.
427 12:18:13.797714 CBMEM:
428 12:18:13.800846 IMD: root @ 99fff000 254 entries.
429 12:18:13.804313 IMD: root @ 99ffec00 62 entries.
430 12:18:13.807515 External stage cache:
431 12:18:13.811259 IMD: root @ 9abff000 254 entries.
432 12:18:13.814489 IMD: root @ 9abfec00 62 entries.
433 12:18:13.821269 Chrome EC: clear events_b mask to 0x0000000020004000
434 12:18:13.834103 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
435 12:18:13.847508 tlcl_write: response is 0
436 12:18:13.856364 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
437 12:18:13.862635 MRC: TPM MRC hash updated successfully.
438 12:18:13.862749 2 DIMMs found
439 12:18:13.865968 SMM Memory Map
440 12:18:13.869550 SMRAM : 0x9a000000 0x1000000
441 12:18:13.872587 Subregion 0: 0x9a000000 0xa00000
442 12:18:13.875917 Subregion 1: 0x9aa00000 0x200000
443 12:18:13.879119 Subregion 2: 0x9ac00000 0x400000
444 12:18:13.882767 top_of_ram = 0x9a000000
445 12:18:13.886698 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
446 12:18:13.892572 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
447 12:18:13.895750 MTRR Range: Start=ff000000 End=0 (Size 1000000)
448 12:18:13.902640 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 12:18:13.905947 CBFS @ c08000 size 3f8000
450 12:18:13.909343 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 12:18:13.912861 CBFS: Locating 'fallback/postcar'
452 12:18:13.919019 CBFS: Found @ offset 107000 size 4b44
453 12:18:13.922817 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
454 12:18:13.934737 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
455 12:18:13.938369 Processing 180 relocs. Offset value of 0x97c0c000
456 12:18:13.946979 Accumulated console time in romstage 286 ms
457 12:18:13.947066
458 12:18:13.947133
459 12:18:13.956931 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
460 12:18:13.963471 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
461 12:18:13.967035 CBFS @ c08000 size 3f8000
462 12:18:13.970104 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
463 12:18:13.976584 CBFS: Locating 'fallback/ramstage'
464 12:18:13.979799 CBFS: Found @ offset 43380 size 1b9e8
465 12:18:13.986465 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
466 12:18:14.018813 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
467 12:18:14.022208 Processing 3976 relocs. Offset value of 0x98db0000
468 12:18:14.029233 Accumulated console time in postcar 52 ms
469 12:18:14.029323
470 12:18:14.029392
471 12:18:14.038576 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
472 12:18:14.045494 FMAP: area RO_VPD found @ c00000 (16384 bytes)
473 12:18:14.048694 WARNING: RO_VPD is uninitialized or empty.
474 12:18:14.052794 FMAP: area RW_VPD found @ af8000 (8192 bytes)
475 12:18:14.059051 FMAP: area RW_VPD found @ af8000 (8192 bytes)
476 12:18:14.059138 Normal boot.
477 12:18:14.065561 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
478 12:18:14.068465 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 12:18:14.071841 CBFS @ c08000 size 3f8000
480 12:18:14.078948 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 12:18:14.081927 CBFS: Locating 'cpu_microcode_blob.bin'
482 12:18:14.085053 CBFS: Found @ offset 14700 size 2ec00
483 12:18:14.088590 microcode: sig=0x806ec pf=0x4 revision=0xc9
484 12:18:14.091935 Skip microcode update
485 12:18:14.094922 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 12:18:14.098254 CBFS @ c08000 size 3f8000
487 12:18:14.105478 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 12:18:14.108457 CBFS: Locating 'fsps.bin'
489 12:18:14.112034 CBFS: Found @ offset d1fc0 size 35000
490 12:18:14.137618 Detected 4 core, 8 thread CPU.
491 12:18:14.140358 Setting up SMI for CPU
492 12:18:14.143946 IED base = 0x9ac00000
493 12:18:14.144071 IED size = 0x00400000
494 12:18:14.146773 Will perform SMM setup.
495 12:18:14.153581 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
496 12:18:14.160326 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
497 12:18:14.166542 Processing 16 relocs. Offset value of 0x00030000
498 12:18:14.166655 Attempting to start 7 APs
499 12:18:14.173582 Waiting for 10ms after sending INIT.
500 12:18:14.186981 Waiting for 1st SIPI to complete...done.
501 12:18:14.187173 AP: slot 3 apic_id 1.
502 12:18:14.193718 Waiting for 2nd SIPI to complete...done.
503 12:18:14.193911 AP: slot 7 apic_id 5.
504 12:18:14.197281 AP: slot 6 apic_id 4.
505 12:18:14.200339 AP: slot 5 apic_id 6.
506 12:18:14.200522 AP: slot 2 apic_id 7.
507 12:18:14.203477 AP: slot 1 apic_id 2.
508 12:18:14.206577 AP: slot 4 apic_id 3.
509 12:18:14.213539 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
510 12:18:14.219897 Processing 13 relocs. Offset value of 0x00038000
511 12:18:14.226542 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
512 12:18:14.230191 Installing SMM handler to 0x9a000000
513 12:18:14.236905 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
514 12:18:14.243283 Processing 658 relocs. Offset value of 0x9a010000
515 12:18:14.250152 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
516 12:18:14.253258 Processing 13 relocs. Offset value of 0x9a008000
517 12:18:14.259741 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
518 12:18:14.266753 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
519 12:18:14.273212 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
520 12:18:14.276646 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
521 12:18:14.282979 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
522 12:18:14.289822 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
523 12:18:14.292952 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
524 12:18:14.299608 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
525 12:18:14.303007 Clearing SMI status registers
526 12:18:14.306537 SMI_STS: PM1
527 12:18:14.306624 PM1_STS: PWRBTN
528 12:18:14.310002 TCO_STS: SECOND_TO
529 12:18:14.314093 New SMBASE 0x9a000000
530 12:18:14.316422 In relocation handler: CPU 0
531 12:18:14.319793 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
532 12:18:14.322998 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 12:18:14.326461 Relocation complete.
534 12:18:14.329458 New SMBASE 0x99fff400
535 12:18:14.329605 In relocation handler: CPU 3
536 12:18:14.336335 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
537 12:18:14.339922 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 12:18:14.343043 Relocation complete.
539 12:18:14.346645 New SMBASE 0x99fffc00
540 12:18:14.346774 In relocation handler: CPU 1
541 12:18:14.353098 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
542 12:18:14.356343 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 12:18:14.359596 Relocation complete.
544 12:18:14.359702 New SMBASE 0x99fff000
545 12:18:14.363035 In relocation handler: CPU 4
546 12:18:14.369451 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
547 12:18:14.372719 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 12:18:14.376101 Relocation complete.
549 12:18:14.376285 New SMBASE 0x99ffec00
550 12:18:14.379673 In relocation handler: CPU 5
551 12:18:14.386486 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
552 12:18:14.389411 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 12:18:14.392731 Relocation complete.
554 12:18:14.392885 New SMBASE 0x99fff800
555 12:18:14.396247 In relocation handler: CPU 2
556 12:18:14.399632 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
557 12:18:14.406217 Writing SMRR. base = 0x9a000006, mask=0xff000800
558 12:18:14.409416 Relocation complete.
559 12:18:14.409582 New SMBASE 0x99ffe800
560 12:18:14.413305 In relocation handler: CPU 6
561 12:18:14.415921 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
562 12:18:14.422469 Writing SMRR. base = 0x9a000006, mask=0xff000800
563 12:18:14.422680 Relocation complete.
564 12:18:14.425936 New SMBASE 0x99ffe400
565 12:18:14.429504 In relocation handler: CPU 7
566 12:18:14.433390 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
567 12:18:14.439479 Writing SMRR. base = 0x9a000006, mask=0xff000800
568 12:18:14.439611 Relocation complete.
569 12:18:14.442610 Initializing CPU #0
570 12:18:14.445815 CPU: vendor Intel device 806ec
571 12:18:14.449191 CPU: family 06, model 8e, stepping 0c
572 12:18:14.453190 Clearing out pending MCEs
573 12:18:14.455870 Setting up local APIC...
574 12:18:14.455996 apic_id: 0x00 done.
575 12:18:14.459311 Turbo is available but hidden
576 12:18:14.462476 Turbo is available and visible
577 12:18:14.465881 VMX status: enabled
578 12:18:14.469554 IA32_FEATURE_CONTROL status: locked
579 12:18:14.472936 Skip microcode update
580 12:18:14.473063 CPU #0 initialized
581 12:18:14.476032 Initializing CPU #3
582 12:18:14.476205 Initializing CPU #4
583 12:18:14.479151 Initializing CPU #1
584 12:18:14.482377 CPU: vendor Intel device 806ec
585 12:18:14.485868 CPU: family 06, model 8e, stepping 0c
586 12:18:14.489449 CPU: vendor Intel device 806ec
587 12:18:14.492380 CPU: family 06, model 8e, stepping 0c
588 12:18:14.495529 Clearing out pending MCEs
589 12:18:14.499058 Clearing out pending MCEs
590 12:18:14.502308 Setting up local APIC...
591 12:18:14.505937 CPU: vendor Intel device 806ec
592 12:18:14.508922 CPU: family 06, model 8e, stepping 0c
593 12:18:14.512778 Clearing out pending MCEs
594 12:18:14.512908 apic_id: 0x03 done.
595 12:18:14.515677 Setting up local APIC...
596 12:18:14.518634 Setting up local APIC...
597 12:18:14.518761 VMX status: enabled
598 12:18:14.522612 apic_id: 0x02 done.
599 12:18:14.525639 IA32_FEATURE_CONTROL status: locked
600 12:18:14.529146 VMX status: enabled
601 12:18:14.529242 Skip microcode update
602 12:18:14.531986 IA32_FEATURE_CONTROL status: locked
603 12:18:14.535657 CPU #4 initialized
604 12:18:14.539061 Skip microcode update
605 12:18:14.539153 Initializing CPU #5
606 12:18:14.541988 Initializing CPU #2
607 12:18:14.545405 CPU: vendor Intel device 806ec
608 12:18:14.549039 CPU: family 06, model 8e, stepping 0c
609 12:18:14.552103 CPU #1 initialized
610 12:18:14.552223 Initializing CPU #6
611 12:18:14.555333 Initializing CPU #7
612 12:18:14.558759 CPU: vendor Intel device 806ec
613 12:18:14.562094 CPU: family 06, model 8e, stepping 0c
614 12:18:14.565156 CPU: vendor Intel device 806ec
615 12:18:14.568525 CPU: family 06, model 8e, stepping 0c
616 12:18:14.572473 Clearing out pending MCEs
617 12:18:14.575357 Clearing out pending MCEs
618 12:18:14.575476 Setting up local APIC...
619 12:18:14.578550 CPU: vendor Intel device 806ec
620 12:18:14.581974 CPU: family 06, model 8e, stepping 0c
621 12:18:14.585572 Clearing out pending MCEs
622 12:18:14.588648 Clearing out pending MCEs
623 12:18:14.591788 Setting up local APIC...
624 12:18:14.591889 apic_id: 0x04 done.
625 12:18:14.595269 Setting up local APIC...
626 12:18:14.598803 Setting up local APIC...
627 12:18:14.601794 VMX status: enabled
628 12:18:14.601940 apic_id: 0x05 done.
629 12:18:14.605476 IA32_FEATURE_CONTROL status: locked
630 12:18:14.608401 VMX status: enabled
631 12:18:14.611821 Skip microcode update
632 12:18:14.615053 IA32_FEATURE_CONTROL status: locked
633 12:18:14.615180 CPU #6 initialized
634 12:18:14.618374 Skip microcode update
635 12:18:14.621748 apic_id: 0x06 done.
636 12:18:14.621863 apic_id: 0x07 done.
637 12:18:14.625251 VMX status: enabled
638 12:18:14.625337 VMX status: enabled
639 12:18:14.631974 IA32_FEATURE_CONTROL status: locked
640 12:18:14.634889 IA32_FEATURE_CONTROL status: locked
641 12:18:14.635007 Skip microcode update
642 12:18:14.638530 Skip microcode update
643 12:18:14.641749 CPU #5 initialized
644 12:18:14.641835 CPU #2 initialized
645 12:18:14.645024 CPU #7 initialized
646 12:18:14.645109 apic_id: 0x01 done.
647 12:18:14.648330 VMX status: enabled
648 12:18:14.651719 IA32_FEATURE_CONTROL status: locked
649 12:18:14.655602 Skip microcode update
650 12:18:14.655687 CPU #3 initialized
651 12:18:14.661375 bsp_do_flight_plan done after 466 msecs.
652 12:18:14.665182 CPU: frequency set to 4200 MHz
653 12:18:14.665283 Enabling SMIs.
654 12:18:14.665356 Locking SMM.
655 12:18:14.681382 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
656 12:18:14.684528 CBFS @ c08000 size 3f8000
657 12:18:14.691055 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
658 12:18:14.691226 CBFS: Locating 'vbt.bin'
659 12:18:14.694613 CBFS: Found @ offset 5f5c0 size 499
660 12:18:14.701524 Found a VBT of 4608 bytes after decompression
661 12:18:14.885844 Display FSP Version Info HOB
662 12:18:14.888694 Reference Code - CPU = 9.0.1e.30
663 12:18:14.892162 uCode Version = 0.0.0.ca
664 12:18:14.895310 TXT ACM version = ff.ff.ff.ffff
665 12:18:14.898649 Display FSP Version Info HOB
666 12:18:14.902184 Reference Code - ME = 9.0.1e.30
667 12:18:14.905311 MEBx version = 0.0.0.0
668 12:18:14.908665 ME Firmware Version = Consumer SKU
669 12:18:14.912105 Display FSP Version Info HOB
670 12:18:14.915016 Reference Code - CML PCH = 9.0.1e.30
671 12:18:14.919235 PCH-CRID Status = Disabled
672 12:18:14.922110 PCH-CRID Original Value = ff.ff.ff.ffff
673 12:18:14.925254 PCH-CRID New Value = ff.ff.ff.ffff
674 12:18:14.928982 OPROM - RST - RAID = ff.ff.ff.ffff
675 12:18:14.931940 ChipsetInit Base Version = ff.ff.ff.ffff
676 12:18:14.935497 ChipsetInit Oem Version = ff.ff.ff.ffff
677 12:18:14.938854 Display FSP Version Info HOB
678 12:18:14.945251 Reference Code - SA - System Agent = 9.0.1e.30
679 12:18:14.948331 Reference Code - MRC = 0.7.1.6c
680 12:18:14.948504 SA - PCIe Version = 9.0.1e.30
681 12:18:14.951505 SA-CRID Status = Disabled
682 12:18:14.954765 SA-CRID Original Value = 0.0.0.c
683 12:18:14.958298 SA-CRID New Value = 0.0.0.c
684 12:18:14.962136 OPROM - VBIOS = ff.ff.ff.ffff
685 12:18:14.965287 RTC Init
686 12:18:14.968431 Set power on after power failure.
687 12:18:14.968520 Disabling Deep S3
688 12:18:14.971458 Disabling Deep S3
689 12:18:14.971551 Disabling Deep S4
690 12:18:14.974671 Disabling Deep S4
691 12:18:14.974762 Disabling Deep S5
692 12:18:14.978185 Disabling Deep S5
693 12:18:14.984851 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
694 12:18:14.984948 Enumerating buses...
695 12:18:14.991240 Show all devs... Before device enumeration.
696 12:18:14.991344 Root Device: enabled 1
697 12:18:14.995048 CPU_CLUSTER: 0: enabled 1
698 12:18:14.998200 DOMAIN: 0000: enabled 1
699 12:18:15.001600 APIC: 00: enabled 1
700 12:18:15.001691 PCI: 00:00.0: enabled 1
701 12:18:15.004837 PCI: 00:02.0: enabled 1
702 12:18:15.007911 PCI: 00:04.0: enabled 0
703 12:18:15.011654 PCI: 00:05.0: enabled 0
704 12:18:15.011802 PCI: 00:12.0: enabled 1
705 12:18:15.014706 PCI: 00:12.5: enabled 0
706 12:18:15.017791 PCI: 00:12.6: enabled 0
707 12:18:15.017908 PCI: 00:14.0: enabled 1
708 12:18:15.021177 PCI: 00:14.1: enabled 0
709 12:18:15.024632 PCI: 00:14.3: enabled 1
710 12:18:15.027886 PCI: 00:14.5: enabled 0
711 12:18:15.028085 PCI: 00:15.0: enabled 1
712 12:18:15.031079 PCI: 00:15.1: enabled 1
713 12:18:15.034274 PCI: 00:15.2: enabled 0
714 12:18:15.037806 PCI: 00:15.3: enabled 0
715 12:18:15.037952 PCI: 00:16.0: enabled 1
716 12:18:15.041028 PCI: 00:16.1: enabled 0
717 12:18:15.044487 PCI: 00:16.2: enabled 0
718 12:18:15.047709 PCI: 00:16.3: enabled 0
719 12:18:15.047892 PCI: 00:16.4: enabled 0
720 12:18:15.050846 PCI: 00:16.5: enabled 0
721 12:18:15.054305 PCI: 00:17.0: enabled 1
722 12:18:15.054447 PCI: 00:19.0: enabled 1
723 12:18:15.057595 PCI: 00:19.1: enabled 0
724 12:18:15.061031 PCI: 00:19.2: enabled 0
725 12:18:15.064561 PCI: 00:1a.0: enabled 0
726 12:18:15.064702 PCI: 00:1c.0: enabled 0
727 12:18:15.067652 PCI: 00:1c.1: enabled 0
728 12:18:15.070655 PCI: 00:1c.2: enabled 0
729 12:18:15.074005 PCI: 00:1c.3: enabled 0
730 12:18:15.074147 PCI: 00:1c.4: enabled 0
731 12:18:15.077809 PCI: 00:1c.5: enabled 0
732 12:18:15.080668 PCI: 00:1c.6: enabled 0
733 12:18:15.083915 PCI: 00:1c.7: enabled 0
734 12:18:15.084093 PCI: 00:1d.0: enabled 1
735 12:18:15.087587 PCI: 00:1d.1: enabled 0
736 12:18:15.091225 PCI: 00:1d.2: enabled 0
737 12:18:15.094087 PCI: 00:1d.3: enabled 0
738 12:18:15.094212 PCI: 00:1d.4: enabled 0
739 12:18:15.097469 PCI: 00:1d.5: enabled 1
740 12:18:15.100818 PCI: 00:1e.0: enabled 1
741 12:18:15.101036 PCI: 00:1e.1: enabled 0
742 12:18:15.103797 PCI: 00:1e.2: enabled 1
743 12:18:15.107578 PCI: 00:1e.3: enabled 1
744 12:18:15.110391 PCI: 00:1f.0: enabled 1
745 12:18:15.110575 PCI: 00:1f.1: enabled 1
746 12:18:15.114076 PCI: 00:1f.2: enabled 1
747 12:18:15.117670 PCI: 00:1f.3: enabled 1
748 12:18:15.120968 PCI: 00:1f.4: enabled 1
749 12:18:15.121091 PCI: 00:1f.5: enabled 1
750 12:18:15.123719 PCI: 00:1f.6: enabled 0
751 12:18:15.127369 USB0 port 0: enabled 1
752 12:18:15.127501 I2C: 00:15: enabled 1
753 12:18:15.130223 I2C: 00:5d: enabled 1
754 12:18:15.133564 GENERIC: 0.0: enabled 1
755 12:18:15.137220 I2C: 00:1a: enabled 1
756 12:18:15.137330 I2C: 00:38: enabled 1
757 12:18:15.140698 I2C: 00:39: enabled 1
758 12:18:15.143746 I2C: 00:3a: enabled 1
759 12:18:15.143875 I2C: 00:3b: enabled 1
760 12:18:15.146922 PCI: 00:00.0: enabled 1
761 12:18:15.150336 SPI: 00: enabled 1
762 12:18:15.150498 SPI: 01: enabled 1
763 12:18:15.154141 PNP: 0c09.0: enabled 1
764 12:18:15.157050 USB2 port 0: enabled 1
765 12:18:15.157180 USB2 port 1: enabled 1
766 12:18:15.160888 USB2 port 2: enabled 0
767 12:18:15.163331 USB2 port 3: enabled 0
768 12:18:15.163429 USB2 port 5: enabled 0
769 12:18:15.167077 USB2 port 6: enabled 1
770 12:18:15.170570 USB2 port 9: enabled 1
771 12:18:15.170688 USB3 port 0: enabled 1
772 12:18:15.173556 USB3 port 1: enabled 1
773 12:18:15.176758 USB3 port 2: enabled 1
774 12:18:15.180535 USB3 port 3: enabled 1
775 12:18:15.180637 USB3 port 4: enabled 0
776 12:18:15.183628 APIC: 02: enabled 1
777 12:18:15.183735 APIC: 07: enabled 1
778 12:18:15.186892 APIC: 01: enabled 1
779 12:18:15.190120 APIC: 03: enabled 1
780 12:18:15.190227 APIC: 06: enabled 1
781 12:18:15.193773 APIC: 04: enabled 1
782 12:18:15.196511 APIC: 05: enabled 1
783 12:18:15.196687 Compare with tree...
784 12:18:15.200229 Root Device: enabled 1
785 12:18:15.203352 CPU_CLUSTER: 0: enabled 1
786 12:18:15.203519 APIC: 00: enabled 1
787 12:18:15.207044 APIC: 02: enabled 1
788 12:18:15.210067 APIC: 07: enabled 1
789 12:18:15.210175 APIC: 01: enabled 1
790 12:18:15.213483 APIC: 03: enabled 1
791 12:18:15.216526 APIC: 06: enabled 1
792 12:18:15.216633 APIC: 04: enabled 1
793 12:18:15.220224 APIC: 05: enabled 1
794 12:18:15.223481 DOMAIN: 0000: enabled 1
795 12:18:15.226989 PCI: 00:00.0: enabled 1
796 12:18:15.227104 PCI: 00:02.0: enabled 1
797 12:18:15.230278 PCI: 00:04.0: enabled 0
798 12:18:15.233423 PCI: 00:05.0: enabled 0
799 12:18:15.236641 PCI: 00:12.0: enabled 1
800 12:18:15.239841 PCI: 00:12.5: enabled 0
801 12:18:15.239951 PCI: 00:12.6: enabled 0
802 12:18:15.243175 PCI: 00:14.0: enabled 1
803 12:18:15.247155 USB0 port 0: enabled 1
804 12:18:15.250172 USB2 port 0: enabled 1
805 12:18:15.253179 USB2 port 1: enabled 1
806 12:18:15.253303 USB2 port 2: enabled 0
807 12:18:15.256706 USB2 port 3: enabled 0
808 12:18:15.259915 USB2 port 5: enabled 0
809 12:18:15.263543 USB2 port 6: enabled 1
810 12:18:15.266748 USB2 port 9: enabled 1
811 12:18:15.270183 USB3 port 0: enabled 1
812 12:18:15.270324 USB3 port 1: enabled 1
813 12:18:15.273508 USB3 port 2: enabled 1
814 12:18:15.276703 USB3 port 3: enabled 1
815 12:18:15.280239 USB3 port 4: enabled 0
816 12:18:15.283389 PCI: 00:14.1: enabled 0
817 12:18:15.283501 PCI: 00:14.3: enabled 1
818 12:18:15.286791 PCI: 00:14.5: enabled 0
819 12:18:15.290011 PCI: 00:15.0: enabled 1
820 12:18:15.293456 I2C: 00:15: enabled 1
821 12:18:15.293545 PCI: 00:15.1: enabled 1
822 12:18:15.296554 I2C: 00:5d: enabled 1
823 12:18:15.300004 GENERIC: 0.0: enabled 1
824 12:18:15.303181 PCI: 00:15.2: enabled 0
825 12:18:15.306826 PCI: 00:15.3: enabled 0
826 12:18:15.306912 PCI: 00:16.0: enabled 1
827 12:18:15.309957 PCI: 00:16.1: enabled 0
828 12:18:15.313343 PCI: 00:16.2: enabled 0
829 12:18:15.316635 PCI: 00:16.3: enabled 0
830 12:18:15.320242 PCI: 00:16.4: enabled 0
831 12:18:15.320334 PCI: 00:16.5: enabled 0
832 12:18:15.323157 PCI: 00:17.0: enabled 1
833 12:18:15.326412 PCI: 00:19.0: enabled 1
834 12:18:15.329831 I2C: 00:1a: enabled 1
835 12:18:15.333116 I2C: 00:38: enabled 1
836 12:18:15.333203 I2C: 00:39: enabled 1
837 12:18:15.336576 I2C: 00:3a: enabled 1
838 12:18:15.339976 I2C: 00:3b: enabled 1
839 12:18:15.343441 PCI: 00:19.1: enabled 0
840 12:18:15.343531 PCI: 00:19.2: enabled 0
841 12:18:15.346543 PCI: 00:1a.0: enabled 0
842 12:18:15.349842 PCI: 00:1c.0: enabled 0
843 12:18:15.352878 PCI: 00:1c.1: enabled 0
844 12:18:15.356362 PCI: 00:1c.2: enabled 0
845 12:18:15.356449 PCI: 00:1c.3: enabled 0
846 12:18:15.359679 PCI: 00:1c.4: enabled 0
847 12:18:15.363685 PCI: 00:1c.5: enabled 0
848 12:18:15.366362 PCI: 00:1c.6: enabled 0
849 12:18:15.366462 PCI: 00:1c.7: enabled 0
850 12:18:15.369919 PCI: 00:1d.0: enabled 1
851 12:18:15.373179 PCI: 00:1d.1: enabled 0
852 12:18:15.376432 PCI: 00:1d.2: enabled 0
853 12:18:15.379632 PCI: 00:1d.3: enabled 0
854 12:18:15.379718 PCI: 00:1d.4: enabled 0
855 12:18:15.382753 PCI: 00:1d.5: enabled 1
856 12:18:15.386362 PCI: 00:00.0: enabled 1
857 12:18:15.390103 PCI: 00:1e.0: enabled 1
858 12:18:15.393451 PCI: 00:1e.1: enabled 0
859 12:18:15.393541 PCI: 00:1e.2: enabled 1
860 12:18:15.396194 SPI: 00: enabled 1
861 12:18:15.400010 PCI: 00:1e.3: enabled 1
862 12:18:15.402871 SPI: 01: enabled 1
863 12:18:15.402957 PCI: 00:1f.0: enabled 1
864 12:18:15.405853 PNP: 0c09.0: enabled 1
865 12:18:15.409486 PCI: 00:1f.1: enabled 1
866 12:18:15.412880 PCI: 00:1f.2: enabled 1
867 12:18:15.416243 PCI: 00:1f.3: enabled 1
868 12:18:15.416334 PCI: 00:1f.4: enabled 1
869 12:18:15.419362 PCI: 00:1f.5: enabled 1
870 12:18:15.422838 PCI: 00:1f.6: enabled 0
871 12:18:15.426199 Root Device scanning...
872 12:18:15.429249 scan_static_bus for Root Device
873 12:18:15.429335 CPU_CLUSTER: 0 enabled
874 12:18:15.432982 DOMAIN: 0000 enabled
875 12:18:15.435838 DOMAIN: 0000 scanning...
876 12:18:15.439452 PCI: pci_scan_bus for bus 00
877 12:18:15.442995 PCI: 00:00.0 [8086/0000] ops
878 12:18:15.445756 PCI: 00:00.0 [8086/9b61] enabled
879 12:18:15.449247 PCI: 00:02.0 [8086/0000] bus ops
880 12:18:15.453174 PCI: 00:02.0 [8086/9b41] enabled
881 12:18:15.455835 PCI: 00:04.0 [8086/1903] disabled
882 12:18:15.459377 PCI: 00:08.0 [8086/1911] enabled
883 12:18:15.462650 PCI: 00:12.0 [8086/02f9] enabled
884 12:18:15.466418 PCI: 00:14.0 [8086/0000] bus ops
885 12:18:15.469252 PCI: 00:14.0 [8086/02ed] enabled
886 12:18:15.472534 PCI: 00:14.2 [8086/02ef] enabled
887 12:18:15.476094 PCI: 00:14.3 [8086/02f0] enabled
888 12:18:15.479157 PCI: 00:15.0 [8086/0000] bus ops
889 12:18:15.482194 PCI: 00:15.0 [8086/02e8] enabled
890 12:18:15.486114 PCI: 00:15.1 [8086/0000] bus ops
891 12:18:15.489168 PCI: 00:15.1 [8086/02e9] enabled
892 12:18:15.492418 PCI: 00:16.0 [8086/0000] ops
893 12:18:15.495526 PCI: 00:16.0 [8086/02e0] enabled
894 12:18:15.499373 PCI: 00:17.0 [8086/0000] ops
895 12:18:15.502967 PCI: 00:17.0 [8086/02d3] enabled
896 12:18:15.505850 PCI: 00:19.0 [8086/0000] bus ops
897 12:18:15.508972 PCI: 00:19.0 [8086/02c5] enabled
898 12:18:15.512758 PCI: 00:1d.0 [8086/0000] bus ops
899 12:18:15.515395 PCI: 00:1d.0 [8086/02b0] enabled
900 12:18:15.518755 PCI: Static device PCI: 00:1d.5 not found, disabling it.
901 12:18:15.522289 PCI: 00:1e.0 [8086/0000] ops
902 12:18:15.525396 PCI: 00:1e.0 [8086/02a8] enabled
903 12:18:15.529056 PCI: 00:1e.2 [8086/0000] bus ops
904 12:18:15.532367 PCI: 00:1e.2 [8086/02aa] enabled
905 12:18:15.535589 PCI: 00:1e.3 [8086/0000] bus ops
906 12:18:15.538967 PCI: 00:1e.3 [8086/02ab] enabled
907 12:18:15.542108 PCI: 00:1f.0 [8086/0000] bus ops
908 12:18:15.545672 PCI: 00:1f.0 [8086/0284] enabled
909 12:18:15.552215 PCI: Static device PCI: 00:1f.1 not found, disabling it.
910 12:18:15.558662 PCI: Static device PCI: 00:1f.2 not found, disabling it.
911 12:18:15.562234 PCI: 00:1f.3 [8086/0000] bus ops
912 12:18:15.565258 PCI: 00:1f.3 [8086/02c8] enabled
913 12:18:15.568952 PCI: 00:1f.4 [8086/0000] bus ops
914 12:18:15.572229 PCI: 00:1f.4 [8086/02a3] enabled
915 12:18:15.575438 PCI: 00:1f.5 [8086/0000] bus ops
916 12:18:15.578678 PCI: 00:1f.5 [8086/02a4] enabled
917 12:18:15.578766 PCI: Leftover static devices:
918 12:18:15.582214 PCI: 00:05.0
919 12:18:15.582301 PCI: 00:12.5
920 12:18:15.585822 PCI: 00:12.6
921 12:18:15.585966 PCI: 00:14.1
922 12:18:15.588494 PCI: 00:14.5
923 12:18:15.588629 PCI: 00:15.2
924 12:18:15.588755 PCI: 00:15.3
925 12:18:15.591793 PCI: 00:16.1
926 12:18:15.591936 PCI: 00:16.2
927 12:18:15.595322 PCI: 00:16.3
928 12:18:15.595452 PCI: 00:16.4
929 12:18:15.595590 PCI: 00:16.5
930 12:18:15.598521 PCI: 00:19.1
931 12:18:15.598656 PCI: 00:19.2
932 12:18:15.602087 PCI: 00:1a.0
933 12:18:15.602221 PCI: 00:1c.0
934 12:18:15.602346 PCI: 00:1c.1
935 12:18:15.605463 PCI: 00:1c.2
936 12:18:15.605599 PCI: 00:1c.3
937 12:18:15.608310 PCI: 00:1c.4
938 12:18:15.608480 PCI: 00:1c.5
939 12:18:15.611837 PCI: 00:1c.6
940 12:18:15.611951 PCI: 00:1c.7
941 12:18:15.612047 PCI: 00:1d.1
942 12:18:15.615045 PCI: 00:1d.2
943 12:18:15.615139 PCI: 00:1d.3
944 12:18:15.618577 PCI: 00:1d.4
945 12:18:15.618666 PCI: 00:1d.5
946 12:18:15.618736 PCI: 00:1e.1
947 12:18:15.621850 PCI: 00:1f.1
948 12:18:15.621940 PCI: 00:1f.2
949 12:18:15.625451 PCI: 00:1f.6
950 12:18:15.628413 PCI: Check your devicetree.cb.
951 12:18:15.628502 PCI: 00:02.0 scanning...
952 12:18:15.631841 scan_generic_bus for PCI: 00:02.0
953 12:18:15.638348 scan_generic_bus for PCI: 00:02.0 done
954 12:18:15.641634 scan_bus: scanning of bus PCI: 00:02.0 took 10189 usecs
955 12:18:15.644792 PCI: 00:14.0 scanning...
956 12:18:15.648524 scan_static_bus for PCI: 00:14.0
957 12:18:15.651457 USB0 port 0 enabled
958 12:18:15.651541 USB0 port 0 scanning...
959 12:18:15.655340 scan_static_bus for USB0 port 0
960 12:18:15.658626 USB2 port 0 enabled
961 12:18:15.662039 USB2 port 1 enabled
962 12:18:15.662119 USB2 port 2 disabled
963 12:18:15.665194 USB2 port 3 disabled
964 12:18:15.668366 USB2 port 5 disabled
965 12:18:15.668484 USB2 port 6 enabled
966 12:18:15.671616 USB2 port 9 enabled
967 12:18:15.671718 USB3 port 0 enabled
968 12:18:15.675009 USB3 port 1 enabled
969 12:18:15.678601 USB3 port 2 enabled
970 12:18:15.678724 USB3 port 3 enabled
971 12:18:15.681929 USB3 port 4 disabled
972 12:18:15.684737 USB2 port 0 scanning...
973 12:18:15.688030 scan_static_bus for USB2 port 0
974 12:18:15.691264 scan_static_bus for USB2 port 0 done
975 12:18:15.698492 scan_bus: scanning of bus USB2 port 0 took 9696 usecs
976 12:18:15.698662 USB2 port 1 scanning...
977 12:18:15.701648 scan_static_bus for USB2 port 1
978 12:18:15.704708 scan_static_bus for USB2 port 1 done
979 12:18:15.711399 scan_bus: scanning of bus USB2 port 1 took 9693 usecs
980 12:18:15.714857 USB2 port 6 scanning...
981 12:18:15.717814 scan_static_bus for USB2 port 6
982 12:18:15.721354 scan_static_bus for USB2 port 6 done
983 12:18:15.728037 scan_bus: scanning of bus USB2 port 6 took 9702 usecs
984 12:18:15.728146 USB2 port 9 scanning...
985 12:18:15.731609 scan_static_bus for USB2 port 9
986 12:18:15.738265 scan_static_bus for USB2 port 9 done
987 12:18:15.741346 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
988 12:18:15.744803 USB3 port 0 scanning...
989 12:18:15.747970 scan_static_bus for USB3 port 0
990 12:18:15.751816 scan_static_bus for USB3 port 0 done
991 12:18:15.758039 scan_bus: scanning of bus USB3 port 0 took 9693 usecs
992 12:18:15.758263 USB3 port 1 scanning...
993 12:18:15.761125 scan_static_bus for USB3 port 1
994 12:18:15.767781 scan_static_bus for USB3 port 1 done
995 12:18:15.771385 scan_bus: scanning of bus USB3 port 1 took 9693 usecs
996 12:18:15.774930 USB3 port 2 scanning...
997 12:18:15.778003 scan_static_bus for USB3 port 2
998 12:18:15.781180 scan_static_bus for USB3 port 2 done
999 12:18:15.787832 scan_bus: scanning of bus USB3 port 2 took 9686 usecs
1000 12:18:15.787986 USB3 port 3 scanning...
1001 12:18:15.791192 scan_static_bus for USB3 port 3
1002 12:18:15.797880 scan_static_bus for USB3 port 3 done
1003 12:18:15.801015 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
1004 12:18:15.804530 scan_static_bus for USB0 port 0 done
1005 12:18:15.810794 scan_bus: scanning of bus USB0 port 0 took 155300 usecs
1006 12:18:15.814634 scan_static_bus for PCI: 00:14.0 done
1007 12:18:15.820852 scan_bus: scanning of bus PCI: 00:14.0 took 172921 usecs
1008 12:18:15.823999 PCI: 00:15.0 scanning...
1009 12:18:15.827442 scan_generic_bus for PCI: 00:15.0
1010 12:18:15.831219 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1011 12:18:15.834049 scan_generic_bus for PCI: 00:15.0 done
1012 12:18:15.840878 scan_bus: scanning of bus PCI: 00:15.0 took 14309 usecs
1013 12:18:15.844377 PCI: 00:15.1 scanning...
1014 12:18:15.847397 scan_generic_bus for PCI: 00:15.1
1015 12:18:15.850784 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1016 12:18:15.854127 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1017 12:18:15.857269 scan_generic_bus for PCI: 00:15.1 done
1018 12:18:15.864084 scan_bus: scanning of bus PCI: 00:15.1 took 18671 usecs
1019 12:18:15.867323 PCI: 00:19.0 scanning...
1020 12:18:15.870786 scan_generic_bus for PCI: 00:19.0
1021 12:18:15.874003 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1022 12:18:15.877463 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1023 12:18:15.883653 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1024 12:18:15.887049 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1025 12:18:15.890578 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1026 12:18:15.894363 scan_generic_bus for PCI: 00:19.0 done
1027 12:18:15.900416 scan_bus: scanning of bus PCI: 00:19.0 took 30714 usecs
1028 12:18:15.903534 PCI: 00:1d.0 scanning...
1029 12:18:15.907458 do_pci_scan_bridge for PCI: 00:1d.0
1030 12:18:15.910587 PCI: pci_scan_bus for bus 01
1031 12:18:15.913788 PCI: 01:00.0 [1c5c/1327] enabled
1032 12:18:15.916879 Enabling Common Clock Configuration
1033 12:18:15.920216 L1 Sub-State supported from root port 29
1034 12:18:15.923429 L1 Sub-State Support = 0xf
1035 12:18:15.927130 CommonModeRestoreTime = 0x28
1036 12:18:15.930146 Power On Value = 0x16, Power On Scale = 0x0
1037 12:18:15.933514 ASPM: Enabled L1
1038 12:18:15.937017 scan_bus: scanning of bus PCI: 00:1d.0 took 32782 usecs
1039 12:18:15.940297 PCI: 00:1e.2 scanning...
1040 12:18:15.943621 scan_generic_bus for PCI: 00:1e.2
1041 12:18:15.950284 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1042 12:18:15.953419 scan_generic_bus for PCI: 00:1e.2 done
1043 12:18:15.956850 scan_bus: scanning of bus PCI: 00:1e.2 took 14010 usecs
1044 12:18:15.960234 PCI: 00:1e.3 scanning...
1045 12:18:15.963609 scan_generic_bus for PCI: 00:1e.3
1046 12:18:15.967101 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1047 12:18:15.973094 scan_generic_bus for PCI: 00:1e.3 done
1048 12:18:15.976653 scan_bus: scanning of bus PCI: 00:1e.3 took 14010 usecs
1049 12:18:15.980251 PCI: 00:1f.0 scanning...
1050 12:18:15.983451 scan_static_bus for PCI: 00:1f.0
1051 12:18:15.986497 PNP: 0c09.0 enabled
1052 12:18:15.989780 scan_static_bus for PCI: 00:1f.0 done
1053 12:18:15.996782 scan_bus: scanning of bus PCI: 00:1f.0 took 12038 usecs
1054 12:18:15.996954 PCI: 00:1f.3 scanning...
1055 12:18:16.003356 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1056 12:18:16.006249 PCI: 00:1f.4 scanning...
1057 12:18:16.009800 scan_generic_bus for PCI: 00:1f.4
1058 12:18:16.013035 scan_generic_bus for PCI: 00:1f.4 done
1059 12:18:16.019721 scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs
1060 12:18:16.023067 PCI: 00:1f.5 scanning...
1061 12:18:16.026567 scan_generic_bus for PCI: 00:1f.5
1062 12:18:16.029698 scan_generic_bus for PCI: 00:1f.5 done
1063 12:18:16.036586 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1064 12:18:16.039433 scan_bus: scanning of bus DOMAIN: 0000 took 604879 usecs
1065 12:18:16.043099 scan_static_bus for Root Device done
1066 12:18:16.049592 scan_bus: scanning of bus Root Device took 624745 usecs
1067 12:18:16.049746 done
1068 12:18:16.052789 Chrome EC: UHEPI supported
1069 12:18:16.059192 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1070 12:18:16.065866 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1071 12:18:16.072551 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1072 12:18:16.079527 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1073 12:18:16.082853 SPI flash protection: WPSW=0 SRP0=0
1074 12:18:16.085694 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 12:18:16.092501 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1076 12:18:16.095865 found VGA at PCI: 00:02.0
1077 12:18:16.098960 Setting up VGA for PCI: 00:02.0
1078 12:18:16.102864 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 12:18:16.108897 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 12:18:16.112651 Allocating resources...
1081 12:18:16.112744 Reading resources...
1082 12:18:16.115367 Root Device read_resources bus 0 link: 0
1083 12:18:16.122605 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1084 12:18:16.126382 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1085 12:18:16.132396 DOMAIN: 0000 read_resources bus 0 link: 0
1086 12:18:16.135548 PCI: 00:14.0 read_resources bus 0 link: 0
1087 12:18:16.142653 USB0 port 0 read_resources bus 0 link: 0
1088 12:18:16.149589 USB0 port 0 read_resources bus 0 link: 0 done
1089 12:18:16.153458 PCI: 00:14.0 read_resources bus 0 link: 0 done
1090 12:18:16.160560 PCI: 00:15.0 read_resources bus 1 link: 0
1091 12:18:16.163550 PCI: 00:15.0 read_resources bus 1 link: 0 done
1092 12:18:16.170364 PCI: 00:15.1 read_resources bus 2 link: 0
1093 12:18:16.174265 PCI: 00:15.1 read_resources bus 2 link: 0 done
1094 12:18:16.180636 PCI: 00:19.0 read_resources bus 3 link: 0
1095 12:18:16.187514 PCI: 00:19.0 read_resources bus 3 link: 0 done
1096 12:18:16.190774 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 12:18:16.197321 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 12:18:16.200915 PCI: 00:1e.2 read_resources bus 4 link: 0
1099 12:18:16.207449 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1100 12:18:16.211232 PCI: 00:1e.3 read_resources bus 5 link: 0
1101 12:18:16.217303 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1102 12:18:16.220753 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 12:18:16.227280 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 12:18:16.233913 DOMAIN: 0000 read_resources bus 0 link: 0 done
1105 12:18:16.237462 Root Device read_resources bus 0 link: 0 done
1106 12:18:16.240746 Done reading resources.
1107 12:18:16.243829 Show resources in subtree (Root Device)...After reading.
1108 12:18:16.250914 Root Device child on link 0 CPU_CLUSTER: 0
1109 12:18:16.254158 CPU_CLUSTER: 0 child on link 0 APIC: 00
1110 12:18:16.254252 APIC: 00
1111 12:18:16.257574 APIC: 02
1112 12:18:16.257662 APIC: 07
1113 12:18:16.260555 APIC: 01
1114 12:18:16.260640 APIC: 03
1115 12:18:16.260749 APIC: 06
1116 12:18:16.263961 APIC: 04
1117 12:18:16.264063 APIC: 05
1118 12:18:16.267539 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1119 12:18:16.320967 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1120 12:18:16.321637 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1121 12:18:16.321791 PCI: 00:00.0
1122 12:18:16.322054 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1123 12:18:16.322127 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1124 12:18:16.322901 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1125 12:18:16.358406 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1126 12:18:16.358953 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1127 12:18:16.359421 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1128 12:18:16.359938 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1129 12:18:16.362972 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1130 12:18:16.373008 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1131 12:18:16.382834 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1132 12:18:16.393116 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1133 12:18:16.399889 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1134 12:18:16.409743 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1135 12:18:16.419616 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1136 12:18:16.429617 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1137 12:18:16.439517 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1138 12:18:16.439674 PCI: 00:02.0
1139 12:18:16.449435 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1140 12:18:16.462871 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1141 12:18:16.469679 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1142 12:18:16.473640 PCI: 00:04.0
1143 12:18:16.473834 PCI: 00:08.0
1144 12:18:16.482971 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1145 12:18:16.486059 PCI: 00:12.0
1146 12:18:16.495929 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 12:18:16.499305 PCI: 00:14.0 child on link 0 USB0 port 0
1148 12:18:16.509726 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1149 12:18:16.512417 USB0 port 0 child on link 0 USB2 port 0
1150 12:18:16.515823 USB2 port 0
1151 12:18:16.515939 USB2 port 1
1152 12:18:16.519008 USB2 port 2
1153 12:18:16.519134 USB2 port 3
1154 12:18:16.522587 USB2 port 5
1155 12:18:16.522815 USB2 port 6
1156 12:18:16.525426 USB2 port 9
1157 12:18:16.525580 USB3 port 0
1158 12:18:16.529023 USB3 port 1
1159 12:18:16.532509 USB3 port 2
1160 12:18:16.532622 USB3 port 3
1161 12:18:16.535558 USB3 port 4
1162 12:18:16.535701 PCI: 00:14.2
1163 12:18:16.545881 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1164 12:18:16.555729 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1165 12:18:16.558726 PCI: 00:14.3
1166 12:18:16.568834 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1167 12:18:16.572078 PCI: 00:15.0 child on link 0 I2C: 01:15
1168 12:18:16.581966 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 12:18:16.582111 I2C: 01:15
1170 12:18:16.589207 PCI: 00:15.1 child on link 0 I2C: 02:5d
1171 12:18:16.598797 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 12:18:16.598948 I2C: 02:5d
1173 12:18:16.601948 GENERIC: 0.0
1174 12:18:16.602053 PCI: 00:16.0
1175 12:18:16.612236 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 12:18:16.615299 PCI: 00:17.0
1177 12:18:16.621678 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1178 12:18:16.631357 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1179 12:18:16.641577 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1180 12:18:16.647931 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1181 12:18:16.658088 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1182 12:18:16.664647 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1183 12:18:16.671295 PCI: 00:19.0 child on link 0 I2C: 03:1a
1184 12:18:16.681413 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 12:18:16.681509 I2C: 03:1a
1186 12:18:16.684451 I2C: 03:38
1187 12:18:16.684536 I2C: 03:39
1188 12:18:16.684603 I2C: 03:3a
1189 12:18:16.688019 I2C: 03:3b
1190 12:18:16.691087 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1191 12:18:16.701159 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1192 12:18:16.710957 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1193 12:18:16.721165 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1194 12:18:16.721314 PCI: 01:00.0
1195 12:18:16.730783 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1196 12:18:16.734200 PCI: 00:1e.0
1197 12:18:16.744562 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1198 12:18:16.753991 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1199 12:18:16.757413 PCI: 00:1e.2 child on link 0 SPI: 00
1200 12:18:16.767706 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 12:18:16.770531 SPI: 00
1202 12:18:16.774197 PCI: 00:1e.3 child on link 0 SPI: 01
1203 12:18:16.783826 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 12:18:16.783982 SPI: 01
1205 12:18:16.787368 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1206 12:18:16.797179 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1207 12:18:16.807222 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1208 12:18:16.807369 PNP: 0c09.0
1209 12:18:16.817066 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1210 12:18:16.817204 PCI: 00:1f.3
1211 12:18:16.826845 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1212 12:18:16.840076 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1213 12:18:16.840305 PCI: 00:1f.4
1214 12:18:16.850077 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1215 12:18:16.859889 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1216 12:18:16.860016 PCI: 00:1f.5
1217 12:18:16.870251 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1218 12:18:16.876730 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1219 12:18:16.883010 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1220 12:18:16.890098 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1221 12:18:16.892945 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1222 12:18:16.896823 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1223 12:18:16.899784 PCI: 00:17.0 18 * [0x60 - 0x67] io
1224 12:18:16.903151 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1225 12:18:16.909714 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1226 12:18:16.916334 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1227 12:18:16.926552 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1228 12:18:16.932856 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1229 12:18:16.939097 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1230 12:18:16.943336 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 12:18:16.952575 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1232 12:18:16.956562 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1233 12:18:16.962552 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1234 12:18:16.965770 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1235 12:18:16.972284 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1236 12:18:16.976189 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1237 12:18:16.982309 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1238 12:18:16.986224 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1239 12:18:16.988987 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1240 12:18:16.995864 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1241 12:18:16.999197 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1242 12:18:17.005611 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1243 12:18:17.008718 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1244 12:18:17.015865 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1245 12:18:17.018915 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1246 12:18:17.025629 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1247 12:18:17.029308 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1248 12:18:17.035611 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1249 12:18:17.039270 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1250 12:18:17.045314 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1251 12:18:17.048450 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1252 12:18:17.055431 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1253 12:18:17.058484 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1254 12:18:17.061887 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1255 12:18:17.071744 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1256 12:18:17.075823 avoid_fixed_resources: DOMAIN: 0000
1257 12:18:17.081634 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1258 12:18:17.088681 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1259 12:18:17.095068 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1260 12:18:17.101680 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1261 12:18:17.111491 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1262 12:18:17.118360 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1263 12:18:17.124881 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1264 12:18:17.134852 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1265 12:18:17.141513 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1266 12:18:17.147675 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1267 12:18:17.154366 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1268 12:18:17.164890 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1269 12:18:17.165042 Setting resources...
1270 12:18:17.170940 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1271 12:18:17.174866 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1272 12:18:17.181120 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1273 12:18:17.184696 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1274 12:18:17.187900 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1275 12:18:17.194667 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1276 12:18:17.201210 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1277 12:18:17.207661 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1278 12:18:17.214253 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1279 12:18:17.221177 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1280 12:18:17.224357 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1281 12:18:17.230818 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1282 12:18:17.234085 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1283 12:18:17.237494 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1284 12:18:17.243905 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1285 12:18:17.247460 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1286 12:18:17.253997 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1287 12:18:17.257240 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1288 12:18:17.263828 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1289 12:18:17.267242 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1290 12:18:17.273869 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1291 12:18:17.277370 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1292 12:18:17.283701 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1293 12:18:17.287038 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1294 12:18:17.293813 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1295 12:18:17.296946 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1296 12:18:17.303433 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1297 12:18:17.306838 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1298 12:18:17.313663 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1299 12:18:17.316444 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1300 12:18:17.319838 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1301 12:18:17.326576 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1302 12:18:17.333458 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1303 12:18:17.339759 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1304 12:18:17.350231 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1305 12:18:17.356692 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1306 12:18:17.360430 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1307 12:18:17.370050 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1308 12:18:17.373376 Root Device assign_resources, bus 0 link: 0
1309 12:18:17.376823 DOMAIN: 0000 assign_resources, bus 0 link: 0
1310 12:18:17.386735 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1311 12:18:17.393173 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1312 12:18:17.403490 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1313 12:18:17.410025 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1314 12:18:17.419687 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1315 12:18:17.426651 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1316 12:18:17.433135 PCI: 00:14.0 assign_resources, bus 0 link: 0
1317 12:18:17.436330 PCI: 00:14.0 assign_resources, bus 0 link: 0
1318 12:18:17.446096 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1319 12:18:17.452878 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1320 12:18:17.459637 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1321 12:18:17.469466 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1322 12:18:17.473090 PCI: 00:15.0 assign_resources, bus 1 link: 0
1323 12:18:17.479646 PCI: 00:15.0 assign_resources, bus 1 link: 0
1324 12:18:17.486408 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1325 12:18:17.492929 PCI: 00:15.1 assign_resources, bus 2 link: 0
1326 12:18:17.496176 PCI: 00:15.1 assign_resources, bus 2 link: 0
1327 12:18:17.506267 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1328 12:18:17.512457 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1329 12:18:17.519104 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1330 12:18:17.528994 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1331 12:18:17.536263 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1332 12:18:17.542423 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1333 12:18:17.552024 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1334 12:18:17.558500 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1335 12:18:17.565071 PCI: 00:19.0 assign_resources, bus 3 link: 0
1336 12:18:17.568779 PCI: 00:19.0 assign_resources, bus 3 link: 0
1337 12:18:17.578550 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1338 12:18:17.585605 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1339 12:18:17.595201 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1340 12:18:17.598521 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1341 12:18:17.608590 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1342 12:18:17.611567 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1343 12:18:17.621407 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1344 12:18:17.628420 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1345 12:18:17.634597 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1346 12:18:17.637706 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1347 12:18:17.647691 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1348 12:18:17.650957 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1349 12:18:17.654354 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1350 12:18:17.660812 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1351 12:18:17.663799 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1352 12:18:17.670444 LPC: Trying to open IO window from 800 size 1ff
1353 12:18:17.677291 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1354 12:18:17.686768 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1355 12:18:17.693833 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1356 12:18:17.703400 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1357 12:18:17.706915 DOMAIN: 0000 assign_resources, bus 0 link: 0
1358 12:18:17.713901 Root Device assign_resources, bus 0 link: 0
1359 12:18:17.714354 Done setting resources.
1360 12:18:17.720170 Show resources in subtree (Root Device)...After assigning values.
1361 12:18:17.726929 Root Device child on link 0 CPU_CLUSTER: 0
1362 12:18:17.730423 CPU_CLUSTER: 0 child on link 0 APIC: 00
1363 12:18:17.730849 APIC: 00
1364 12:18:17.733881 APIC: 02
1365 12:18:17.734306 APIC: 07
1366 12:18:17.734647 APIC: 01
1367 12:18:17.737046 APIC: 03
1368 12:18:17.737468 APIC: 06
1369 12:18:17.740513 APIC: 04
1370 12:18:17.740993 APIC: 05
1371 12:18:17.743711 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1372 12:18:17.753851 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1373 12:18:17.766840 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1374 12:18:17.767286 PCI: 00:00.0
1375 12:18:17.776772 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1376 12:18:17.786857 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1377 12:18:17.797002 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1378 12:18:17.803119 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1379 12:18:17.812442 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1380 12:18:17.822496 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1381 12:18:17.832457 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1382 12:18:17.842409 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1383 12:18:17.852333 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1384 12:18:17.859014 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1385 12:18:17.868744 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1386 12:18:17.878967 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1387 12:18:17.889103 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1388 12:18:17.898738 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1389 12:18:17.908524 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1390 12:18:17.915061 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1391 12:18:17.919151 PCI: 00:02.0
1392 12:18:17.928460 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1393 12:18:17.938514 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1394 12:18:17.947981 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1395 12:18:17.951381 PCI: 00:04.0
1396 12:18:17.951464 PCI: 00:08.0
1397 12:18:17.961602 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1398 12:18:17.965165 PCI: 00:12.0
1399 12:18:17.974656 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1400 12:18:17.977894 PCI: 00:14.0 child on link 0 USB0 port 0
1401 12:18:17.987886 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1402 12:18:17.994336 USB0 port 0 child on link 0 USB2 port 0
1403 12:18:17.994444 USB2 port 0
1404 12:18:17.997902 USB2 port 1
1405 12:18:17.997986 USB2 port 2
1406 12:18:18.001380 USB2 port 3
1407 12:18:18.001463 USB2 port 5
1408 12:18:18.004874 USB2 port 6
1409 12:18:18.004957 USB2 port 9
1410 12:18:18.007712 USB3 port 0
1411 12:18:18.007797 USB3 port 1
1412 12:18:18.011162 USB3 port 2
1413 12:18:18.011273 USB3 port 3
1414 12:18:18.014464 USB3 port 4
1415 12:18:18.017461 PCI: 00:14.2
1416 12:18:18.027864 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1417 12:18:18.037537 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1418 12:18:18.037634 PCI: 00:14.3
1419 12:18:18.047648 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1420 12:18:18.054173 PCI: 00:15.0 child on link 0 I2C: 01:15
1421 12:18:18.063997 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1422 12:18:18.064109 I2C: 01:15
1423 12:18:18.070443 PCI: 00:15.1 child on link 0 I2C: 02:5d
1424 12:18:18.080746 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1425 12:18:18.080842 I2C: 02:5d
1426 12:18:18.083966 GENERIC: 0.0
1427 12:18:18.084050 PCI: 00:16.0
1428 12:18:18.093850 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1429 12:18:18.097203 PCI: 00:17.0
1430 12:18:18.106867 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1431 12:18:18.116642 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1432 12:18:18.126466 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1433 12:18:18.133269 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1434 12:18:18.143757 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1435 12:18:18.152905 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1436 12:18:18.159504 PCI: 00:19.0 child on link 0 I2C: 03:1a
1437 12:18:18.169843 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1438 12:18:18.169932 I2C: 03:1a
1439 12:18:18.172944 I2C: 03:38
1440 12:18:18.173027 I2C: 03:39
1441 12:18:18.176026 I2C: 03:3a
1442 12:18:18.176117 I2C: 03:3b
1443 12:18:18.179287 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1444 12:18:18.189346 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1445 12:18:18.199168 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1446 12:18:18.208974 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1447 12:18:18.212784 PCI: 01:00.0
1448 12:18:18.222254 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1449 12:18:18.225478 PCI: 00:1e.0
1450 12:18:18.235620 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1451 12:18:18.245585 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1452 12:18:18.248974 PCI: 00:1e.2 child on link 0 SPI: 00
1453 12:18:18.258665 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1454 12:18:18.261813 SPI: 00
1455 12:18:18.265430 PCI: 00:1e.3 child on link 0 SPI: 01
1456 12:18:18.275468 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1457 12:18:18.278376 SPI: 01
1458 12:18:18.281728 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1459 12:18:18.288701 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1460 12:18:18.298532 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1461 12:18:18.301803 PNP: 0c09.0
1462 12:18:18.308421 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1463 12:18:18.311814 PCI: 00:1f.3
1464 12:18:18.321610 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1465 12:18:18.331234 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1466 12:18:18.334741 PCI: 00:1f.4
1467 12:18:18.341293 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1468 12:18:18.351304 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1469 12:18:18.354868 PCI: 00:1f.5
1470 12:18:18.364532 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1471 12:18:18.367788 Done allocating resources.
1472 12:18:18.374579 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1473 12:18:18.374704 Enabling resources...
1474 12:18:18.381749 PCI: 00:00.0 subsystem <- 8086/9b61
1475 12:18:18.381846 PCI: 00:00.0 cmd <- 06
1476 12:18:18.388107 PCI: 00:02.0 subsystem <- 8086/9b41
1477 12:18:18.388206 PCI: 00:02.0 cmd <- 03
1478 12:18:18.391308 PCI: 00:08.0 cmd <- 06
1479 12:18:18.394637 PCI: 00:12.0 subsystem <- 8086/02f9
1480 12:18:18.398362 PCI: 00:12.0 cmd <- 02
1481 12:18:18.401629 PCI: 00:14.0 subsystem <- 8086/02ed
1482 12:18:18.404623 PCI: 00:14.0 cmd <- 02
1483 12:18:18.408099 PCI: 00:14.2 cmd <- 02
1484 12:18:18.411435 PCI: 00:14.3 subsystem <- 8086/02f0
1485 12:18:18.414430 PCI: 00:14.3 cmd <- 02
1486 12:18:18.418028 PCI: 00:15.0 subsystem <- 8086/02e8
1487 12:18:18.418122 PCI: 00:15.0 cmd <- 02
1488 12:18:18.424933 PCI: 00:15.1 subsystem <- 8086/02e9
1489 12:18:18.425041 PCI: 00:15.1 cmd <- 02
1490 12:18:18.428139 PCI: 00:16.0 subsystem <- 8086/02e0
1491 12:18:18.431097 PCI: 00:16.0 cmd <- 02
1492 12:18:18.434822 PCI: 00:17.0 subsystem <- 8086/02d3
1493 12:18:18.437947 PCI: 00:17.0 cmd <- 03
1494 12:18:18.441408 PCI: 00:19.0 subsystem <- 8086/02c5
1495 12:18:18.444308 PCI: 00:19.0 cmd <- 02
1496 12:18:18.447751 PCI: 00:1d.0 bridge ctrl <- 0013
1497 12:18:18.451002 PCI: 00:1d.0 subsystem <- 8086/02b0
1498 12:18:18.454156 PCI: 00:1d.0 cmd <- 06
1499 12:18:18.457822 PCI: 00:1e.0 subsystem <- 8086/02a8
1500 12:18:18.460718 PCI: 00:1e.0 cmd <- 06
1501 12:18:18.464187 PCI: 00:1e.2 subsystem <- 8086/02aa
1502 12:18:18.467742 PCI: 00:1e.2 cmd <- 06
1503 12:18:18.470999 PCI: 00:1e.3 subsystem <- 8086/02ab
1504 12:18:18.474062 PCI: 00:1e.3 cmd <- 02
1505 12:18:18.477411 PCI: 00:1f.0 subsystem <- 8086/0284
1506 12:18:18.477503 PCI: 00:1f.0 cmd <- 407
1507 12:18:18.484457 PCI: 00:1f.3 subsystem <- 8086/02c8
1508 12:18:18.484556 PCI: 00:1f.3 cmd <- 02
1509 12:18:18.487831 PCI: 00:1f.4 subsystem <- 8086/02a3
1510 12:18:18.490832 PCI: 00:1f.4 cmd <- 03
1511 12:18:18.494672 PCI: 00:1f.5 subsystem <- 8086/02a4
1512 12:18:18.497671 PCI: 00:1f.5 cmd <- 406
1513 12:18:18.506878 PCI: 01:00.0 cmd <- 02
1514 12:18:18.512093 done.
1515 12:18:18.524649 ME: Version: 14.0.39.1367
1516 12:18:18.531489 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1517 12:18:18.534680 Initializing devices...
1518 12:18:18.534764 Root Device init ...
1519 12:18:18.541296 Chrome EC: Set SMI mask to 0x0000000000000000
1520 12:18:18.544816 Chrome EC: clear events_b mask to 0x0000000000000000
1521 12:18:18.551502 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1522 12:18:18.557888 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1523 12:18:18.564802 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1524 12:18:18.567606 Chrome EC: Set WAKE mask to 0x0000000000000000
1525 12:18:18.571104 Root Device init finished in 35196 usecs
1526 12:18:18.574815 CPU_CLUSTER: 0 init ...
1527 12:18:18.581687 CPU_CLUSTER: 0 init finished in 2449 usecs
1528 12:18:18.585472 PCI: 00:00.0 init ...
1529 12:18:18.589302 CPU TDP: 15 Watts
1530 12:18:18.592039 CPU PL2 = 64 Watts
1531 12:18:18.595441 PCI: 00:00.0 init finished in 7082 usecs
1532 12:18:18.599061 PCI: 00:02.0 init ...
1533 12:18:18.601992 PCI: 00:02.0 init finished in 2253 usecs
1534 12:18:18.605176 PCI: 00:08.0 init ...
1535 12:18:18.608654 PCI: 00:08.0 init finished in 2253 usecs
1536 12:18:18.611950 PCI: 00:12.0 init ...
1537 12:18:18.615114 PCI: 00:12.0 init finished in 2253 usecs
1538 12:18:18.618438 PCI: 00:14.0 init ...
1539 12:18:18.621815 PCI: 00:14.0 init finished in 2255 usecs
1540 12:18:18.625736 PCI: 00:14.2 init ...
1541 12:18:18.628535 PCI: 00:14.2 init finished in 2252 usecs
1542 12:18:18.631967 PCI: 00:14.3 init ...
1543 12:18:18.635433 PCI: 00:14.3 init finished in 2261 usecs
1544 12:18:18.638792 PCI: 00:15.0 init ...
1545 12:18:18.641829 DW I2C bus 0 at 0xd121f000 (400 KHz)
1546 12:18:18.645238 PCI: 00:15.0 init finished in 5985 usecs
1547 12:18:18.648428 PCI: 00:15.1 init ...
1548 12:18:18.651973 DW I2C bus 1 at 0xd1220000 (400 KHz)
1549 12:18:18.658185 PCI: 00:15.1 init finished in 5974 usecs
1550 12:18:18.658286 PCI: 00:16.0 init ...
1551 12:18:18.665124 PCI: 00:16.0 init finished in 2254 usecs
1552 12:18:18.668315 PCI: 00:19.0 init ...
1553 12:18:18.671358 DW I2C bus 4 at 0xd1222000 (400 KHz)
1554 12:18:18.674741 PCI: 00:19.0 init finished in 5981 usecs
1555 12:18:18.678196 PCI: 00:1d.0 init ...
1556 12:18:18.681246 Initializing PCH PCIe bridge.
1557 12:18:18.684717 PCI: 00:1d.0 init finished in 5288 usecs
1558 12:18:18.687669 PCI: 00:1f.0 init ...
1559 12:18:18.691271 IOAPIC: Initializing IOAPIC at 0xfec00000
1560 12:18:18.698044 IOAPIC: Bootstrap Processor Local APIC = 0x00
1561 12:18:18.698137 IOAPIC: ID = 0x02
1562 12:18:18.701302 IOAPIC: Dumping registers
1563 12:18:18.704495 reg 0x0000: 0x02000000
1564 12:18:18.707869 reg 0x0001: 0x00770020
1565 12:18:18.707956 reg 0x0002: 0x00000000
1566 12:18:18.714498 PCI: 00:1f.0 init finished in 23563 usecs
1567 12:18:18.717475 PCI: 00:1f.4 init ...
1568 12:18:18.721054 PCI: 00:1f.4 init finished in 2263 usecs
1569 12:18:18.731859 PCI: 01:00.0 init ...
1570 12:18:18.735234 PCI: 01:00.0 init finished in 2246 usecs
1571 12:18:18.739342 PNP: 0c09.0 init ...
1572 12:18:18.742392 Google Chrome EC uptime: 11.088 seconds
1573 12:18:18.749597 Google Chrome AP resets since EC boot: 0
1574 12:18:18.752527 Google Chrome most recent AP reset causes:
1575 12:18:18.759217 Google Chrome EC reset flags at last EC boot: reset-pin
1576 12:18:18.762538 PNP: 0c09.0 init finished in 20613 usecs
1577 12:18:18.765770 Devices initialized
1578 12:18:18.769009 Show all devs... After init.
1579 12:18:18.769121 Root Device: enabled 1
1580 12:18:18.772675 CPU_CLUSTER: 0: enabled 1
1581 12:18:18.775479 DOMAIN: 0000: enabled 1
1582 12:18:18.775615 APIC: 00: enabled 1
1583 12:18:18.779109 PCI: 00:00.0: enabled 1
1584 12:18:18.782082 PCI: 00:02.0: enabled 1
1585 12:18:18.785473 PCI: 00:04.0: enabled 0
1586 12:18:18.785570 PCI: 00:05.0: enabled 0
1587 12:18:18.788834 PCI: 00:12.0: enabled 1
1588 12:18:18.792104 PCI: 00:12.5: enabled 0
1589 12:18:18.795837 PCI: 00:12.6: enabled 0
1590 12:18:18.796010 PCI: 00:14.0: enabled 1
1591 12:18:18.799006 PCI: 00:14.1: enabled 0
1592 12:18:18.802174 PCI: 00:14.3: enabled 1
1593 12:18:18.802408 PCI: 00:14.5: enabled 0
1594 12:18:18.805333 PCI: 00:15.0: enabled 1
1595 12:18:18.808717 PCI: 00:15.1: enabled 1
1596 12:18:18.812725 PCI: 00:15.2: enabled 0
1597 12:18:18.812843 PCI: 00:15.3: enabled 0
1598 12:18:18.815457 PCI: 00:16.0: enabled 1
1599 12:18:18.818655 PCI: 00:16.1: enabled 0
1600 12:18:18.821941 PCI: 00:16.2: enabled 0
1601 12:18:18.822107 PCI: 00:16.3: enabled 0
1602 12:18:18.825308 PCI: 00:16.4: enabled 0
1603 12:18:18.828892 PCI: 00:16.5: enabled 0
1604 12:18:18.831781 PCI: 00:17.0: enabled 1
1605 12:18:18.831932 PCI: 00:19.0: enabled 1
1606 12:18:18.835538 PCI: 00:19.1: enabled 0
1607 12:18:18.838839 PCI: 00:19.2: enabled 0
1608 12:18:18.838989 PCI: 00:1a.0: enabled 0
1609 12:18:18.841824 PCI: 00:1c.0: enabled 0
1610 12:18:18.845609 PCI: 00:1c.1: enabled 0
1611 12:18:18.848596 PCI: 00:1c.2: enabled 0
1612 12:18:18.848738 PCI: 00:1c.3: enabled 0
1613 12:18:18.851867 PCI: 00:1c.4: enabled 0
1614 12:18:18.854978 PCI: 00:1c.5: enabled 0
1615 12:18:18.858472 PCI: 00:1c.6: enabled 0
1616 12:18:18.858612 PCI: 00:1c.7: enabled 0
1617 12:18:18.861601 PCI: 00:1d.0: enabled 1
1618 12:18:18.864874 PCI: 00:1d.1: enabled 0
1619 12:18:18.868168 PCI: 00:1d.2: enabled 0
1620 12:18:18.868356 PCI: 00:1d.3: enabled 0
1621 12:18:18.871408 PCI: 00:1d.4: enabled 0
1622 12:18:18.875185 PCI: 00:1d.5: enabled 0
1623 12:18:18.878690 PCI: 00:1e.0: enabled 1
1624 12:18:18.878787 PCI: 00:1e.1: enabled 0
1625 12:18:18.881662 PCI: 00:1e.2: enabled 1
1626 12:18:18.885000 PCI: 00:1e.3: enabled 1
1627 12:18:18.885097 PCI: 00:1f.0: enabled 1
1628 12:18:18.888066 PCI: 00:1f.1: enabled 0
1629 12:18:18.891540 PCI: 00:1f.2: enabled 0
1630 12:18:18.894663 PCI: 00:1f.3: enabled 1
1631 12:18:18.894784 PCI: 00:1f.4: enabled 1
1632 12:18:18.898008 PCI: 00:1f.5: enabled 1
1633 12:18:18.901731 PCI: 00:1f.6: enabled 0
1634 12:18:18.905266 USB0 port 0: enabled 1
1635 12:18:18.905353 I2C: 01:15: enabled 1
1636 12:18:18.908097 I2C: 02:5d: enabled 1
1637 12:18:18.911193 GENERIC: 0.0: enabled 1
1638 12:18:18.911277 I2C: 03:1a: enabled 1
1639 12:18:18.914532 I2C: 03:38: enabled 1
1640 12:18:18.917809 I2C: 03:39: enabled 1
1641 12:18:18.917895 I2C: 03:3a: enabled 1
1642 12:18:18.921076 I2C: 03:3b: enabled 1
1643 12:18:18.924760 PCI: 00:00.0: enabled 1
1644 12:18:18.924852 SPI: 00: enabled 1
1645 12:18:18.927883 SPI: 01: enabled 1
1646 12:18:18.931304 PNP: 0c09.0: enabled 1
1647 12:18:18.931389 USB2 port 0: enabled 1
1648 12:18:18.934286 USB2 port 1: enabled 1
1649 12:18:18.937598 USB2 port 2: enabled 0
1650 12:18:18.941518 USB2 port 3: enabled 0
1651 12:18:18.941619 USB2 port 5: enabled 0
1652 12:18:18.944708 USB2 port 6: enabled 1
1653 12:18:18.947777 USB2 port 9: enabled 1
1654 12:18:18.947923 USB3 port 0: enabled 1
1655 12:18:18.951146 USB3 port 1: enabled 1
1656 12:18:18.954578 USB3 port 2: enabled 1
1657 12:18:18.954685 USB3 port 3: enabled 1
1658 12:18:18.957964 USB3 port 4: enabled 0
1659 12:18:18.961057 APIC: 02: enabled 1
1660 12:18:18.961166 APIC: 07: enabled 1
1661 12:18:18.964271 APIC: 01: enabled 1
1662 12:18:18.967542 APIC: 03: enabled 1
1663 12:18:18.967647 APIC: 06: enabled 1
1664 12:18:18.971210 APIC: 04: enabled 1
1665 12:18:18.974258 APIC: 05: enabled 1
1666 12:18:18.974361 PCI: 00:08.0: enabled 1
1667 12:18:18.977512 PCI: 00:14.2: enabled 1
1668 12:18:18.980988 PCI: 01:00.0: enabled 1
1669 12:18:18.984382 Disabling ACPI via APMC:
1670 12:18:18.987676 done.
1671 12:18:18.991157 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1672 12:18:18.994119 ELOG: NV offset 0xaf0000 size 0x4000
1673 12:18:19.001073 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1674 12:18:19.007686 ELOG: Event(17) added with size 13 at 2023-12-08 12:18:19 UTC
1675 12:18:19.014665 ELOG: Event(92) added with size 9 at 2023-12-08 12:18:19 UTC
1676 12:18:19.021232 ELOG: Event(93) added with size 9 at 2023-12-08 12:18:19 UTC
1677 12:18:19.027822 ELOG: Event(9A) added with size 9 at 2023-12-08 12:18:19 UTC
1678 12:18:19.034370 ELOG: Event(9E) added with size 10 at 2023-12-08 12:18:19 UTC
1679 12:18:19.040758 ELOG: Event(9F) added with size 14 at 2023-12-08 12:18:19 UTC
1680 12:18:19.044582 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1681 12:18:19.051367 ELOG: Event(A1) added with size 10 at 2023-12-08 12:18:19 UTC
1682 12:18:19.061704 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1683 12:18:19.067642 ELOG: Event(A0) added with size 9 at 2023-12-08 12:18:19 UTC
1684 12:18:19.070958 elog_add_boot_reason: Logged dev mode boot
1685 12:18:19.074582 Finalize devices...
1686 12:18:19.074689 PCI: 00:17.0 final
1687 12:18:19.078056 Devices finalized
1688 12:18:19.081017 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1689 12:18:19.087826 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1690 12:18:19.090721 ME: HFSTS1 : 0x90000245
1691 12:18:19.094134 ME: HFSTS2 : 0x3B850126
1692 12:18:19.100679 ME: HFSTS3 : 0x00000020
1693 12:18:19.104303 ME: HFSTS4 : 0x00004800
1694 12:18:19.107413 ME: HFSTS5 : 0x00000000
1695 12:18:19.111125 ME: HFSTS6 : 0x40400006
1696 12:18:19.114224 ME: Manufacturing Mode : NO
1697 12:18:19.117525 ME: FW Partition Table : OK
1698 12:18:19.120795 ME: Bringup Loader Failure : NO
1699 12:18:19.123952 ME: Firmware Init Complete : YES
1700 12:18:19.127421 ME: Boot Options Present : NO
1701 12:18:19.130346 ME: Update In Progress : NO
1702 12:18:19.134060 ME: D0i3 Support : YES
1703 12:18:19.137209 ME: Low Power State Enabled : NO
1704 12:18:19.140581 ME: CPU Replaced : NO
1705 12:18:19.143962 ME: CPU Replacement Valid : YES
1706 12:18:19.147124 ME: Current Working State : 5
1707 12:18:19.150267 ME: Current Operation State : 1
1708 12:18:19.153797 ME: Current Operation Mode : 0
1709 12:18:19.157376 ME: Error Code : 0
1710 12:18:19.160993 ME: CPU Debug Disabled : YES
1711 12:18:19.163742 ME: TXT Support : NO
1712 12:18:19.170354 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1713 12:18:19.176806 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1714 12:18:19.176922 CBFS @ c08000 size 3f8000
1715 12:18:19.183507 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1716 12:18:19.187095 CBFS: Locating 'fallback/dsdt.aml'
1717 12:18:19.190052 CBFS: Found @ offset 10bb80 size 3fa5
1718 12:18:19.196684 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1719 12:18:19.199990 CBFS @ c08000 size 3f8000
1720 12:18:19.206418 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1721 12:18:19.206505 CBFS: Locating 'fallback/slic'
1722 12:18:19.212015 CBFS: 'fallback/slic' not found.
1723 12:18:19.219162 ACPI: Writing ACPI tables at 99b3e000.
1724 12:18:19.219268 ACPI: * FACS
1725 12:18:19.221836 ACPI: * DSDT
1726 12:18:19.225493 Ramoops buffer: 0x100000@0x99a3d000.
1727 12:18:19.228389 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1728 12:18:19.235111 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1729 12:18:19.238407 Google Chrome EC: version:
1730 12:18:19.242007 ro: helios_v2.0.2659-56403530b
1731 12:18:19.244745 rw: helios_v2.0.2849-c41de27e7d
1732 12:18:19.244830 running image: 1
1733 12:18:19.249791 ACPI: * FADT
1734 12:18:19.249876 SCI is IRQ9
1735 12:18:19.255681 ACPI: added table 1/32, length now 40
1736 12:18:19.255798 ACPI: * SSDT
1737 12:18:19.259754 Found 1 CPU(s) with 8 core(s) each.
1738 12:18:19.262620 Error: Could not locate 'wifi_sar' in VPD.
1739 12:18:19.269154 Checking CBFS for default SAR values
1740 12:18:19.272315 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1741 12:18:19.275820 CBFS @ c08000 size 3f8000
1742 12:18:19.282433 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1743 12:18:19.285683 CBFS: Locating 'wifi_sar_defaults.hex'
1744 12:18:19.289130 CBFS: Found @ offset 5fac0 size 77
1745 12:18:19.292619 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1746 12:18:19.299183 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1747 12:18:19.302140 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1748 12:18:19.308981 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1749 12:18:19.312333 failed to find key in VPD: dsm_calib_r0_0
1750 12:18:19.322182 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1751 12:18:19.325436 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1752 12:18:19.328727 failed to find key in VPD: dsm_calib_r0_1
1753 12:18:19.338484 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1754 12:18:19.345389 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1755 12:18:19.348961 failed to find key in VPD: dsm_calib_r0_2
1756 12:18:19.358539 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1757 12:18:19.362195 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1758 12:18:19.369097 failed to find key in VPD: dsm_calib_r0_3
1759 12:18:19.375086 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1760 12:18:19.382234 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1761 12:18:19.385232 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1762 12:18:19.388609 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1763 12:18:19.392762 EC returned error result code 1
1764 12:18:19.395964 EC returned error result code 1
1765 12:18:19.399609 EC returned error result code 1
1766 12:18:19.406395 PS2K: Bad resp from EC. Vivaldi disabled!
1767 12:18:19.409797 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1768 12:18:19.416450 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1769 12:18:19.423012 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1770 12:18:19.426128 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1771 12:18:19.433537 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1772 12:18:19.439349 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1773 12:18:19.445683 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1774 12:18:19.449730 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1775 12:18:19.455810 ACPI: added table 2/32, length now 44
1776 12:18:19.455904 ACPI: * MCFG
1777 12:18:19.459126 ACPI: added table 3/32, length now 48
1778 12:18:19.462273 ACPI: * TPM2
1779 12:18:19.466295 TPM2 log created at 99a2d000
1780 12:18:19.469223 ACPI: added table 4/32, length now 52
1781 12:18:19.469307 ACPI: * MADT
1782 12:18:19.472618 SCI is IRQ9
1783 12:18:19.475899 ACPI: added table 5/32, length now 56
1784 12:18:19.475987 current = 99b43ac0
1785 12:18:19.479219 ACPI: * DMAR
1786 12:18:19.482738 ACPI: added table 6/32, length now 60
1787 12:18:19.486049 ACPI: * IGD OpRegion
1788 12:18:19.486134 GMA: Found VBT in CBFS
1789 12:18:19.488762 GMA: Found valid VBT in CBFS
1790 12:18:19.492398 ACPI: added table 7/32, length now 64
1791 12:18:19.496020 ACPI: * HPET
1792 12:18:19.499026 ACPI: added table 8/32, length now 68
1793 12:18:19.502129 ACPI: done.
1794 12:18:19.502214 ACPI tables: 31744 bytes.
1795 12:18:19.505555 smbios_write_tables: 99a2c000
1796 12:18:19.508491 EC returned error result code 3
1797 12:18:19.512654 Couldn't obtain OEM name from CBI
1798 12:18:19.515595 Create SMBIOS type 17
1799 12:18:19.519220 PCI: 00:00.0 (Intel Cannonlake)
1800 12:18:19.522608 PCI: 00:14.3 (Intel WiFi)
1801 12:18:19.525674 SMBIOS tables: 939 bytes.
1802 12:18:19.529035 Writing table forward entry at 0x00000500
1803 12:18:19.535578 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1804 12:18:19.538579 Writing coreboot table at 0x99b62000
1805 12:18:19.545613 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1806 12:18:19.548525 1. 0000000000001000-000000000009ffff: RAM
1807 12:18:19.552383 2. 00000000000a0000-00000000000fffff: RESERVED
1808 12:18:19.558522 3. 0000000000100000-0000000099a2bfff: RAM
1809 12:18:19.565239 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1810 12:18:19.568304 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1811 12:18:19.575619 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1812 12:18:19.578490 7. 000000009a000000-000000009f7fffff: RESERVED
1813 12:18:19.585127 8. 00000000e0000000-00000000efffffff: RESERVED
1814 12:18:19.588246 9. 00000000fc000000-00000000fc000fff: RESERVED
1815 12:18:19.595297 10. 00000000fe000000-00000000fe00ffff: RESERVED
1816 12:18:19.598102 11. 00000000fed10000-00000000fed17fff: RESERVED
1817 12:18:19.601992 12. 00000000fed80000-00000000fed83fff: RESERVED
1818 12:18:19.608332 13. 00000000fed90000-00000000fed91fff: RESERVED
1819 12:18:19.611407 14. 00000000feda0000-00000000feda1fff: RESERVED
1820 12:18:19.618435 15. 0000000100000000-000000045e7fffff: RAM
1821 12:18:19.621548 Graphics framebuffer located at 0xc0000000
1822 12:18:19.624841 Passing 5 GPIOs to payload:
1823 12:18:19.628207 NAME | PORT | POLARITY | VALUE
1824 12:18:19.634480 write protect | undefined | high | low
1825 12:18:19.641176 lid | undefined | high | high
1826 12:18:19.644441 power | undefined | high | low
1827 12:18:19.651711 oprom | undefined | high | low
1828 12:18:19.654417 EC in RW | 0x000000cb | high | low
1829 12:18:19.658034 Board ID: 4
1830 12:18:19.660989 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1831 12:18:19.664751 CBFS @ c08000 size 3f8000
1832 12:18:19.671286 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1833 12:18:19.677932 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1834 12:18:19.681076 coreboot table: 1492 bytes.
1835 12:18:19.684326 IMD ROOT 0. 99fff000 00001000
1836 12:18:19.687640 IMD SMALL 1. 99ffe000 00001000
1837 12:18:19.690575 FSP MEMORY 2. 99c4e000 003b0000
1838 12:18:19.694099 CONSOLE 3. 99c2e000 00020000
1839 12:18:19.697555 FMAP 4. 99c2d000 0000054e
1840 12:18:19.700714 TIME STAMP 5. 99c2c000 00000910
1841 12:18:19.703920 VBOOT WORK 6. 99c18000 00014000
1842 12:18:19.707081 MRC DATA 7. 99c16000 00001958
1843 12:18:19.710740 ROMSTG STCK 8. 99c15000 00001000
1844 12:18:19.714061 AFTER CAR 9. 99c0b000 0000a000
1845 12:18:19.717037 RAMSTAGE 10. 99baf000 0005c000
1846 12:18:19.720725 REFCODE 11. 99b7a000 00035000
1847 12:18:19.723983 SMM BACKUP 12. 99b6a000 00010000
1848 12:18:19.727269 COREBOOT 13. 99b62000 00008000
1849 12:18:19.730167 ACPI 14. 99b3e000 00024000
1850 12:18:19.733530 ACPI GNVS 15. 99b3d000 00001000
1851 12:18:19.737217 RAMOOPS 16. 99a3d000 00100000
1852 12:18:19.740782 TPM2 TCGLOG17. 99a2d000 00010000
1853 12:18:19.743544 SMBIOS 18. 99a2c000 00000800
1854 12:18:19.743632 IMD small region:
1855 12:18:19.746703 IMD ROOT 0. 99ffec00 00000400
1856 12:18:19.750625 FSP RUNTIME 1. 99ffebe0 00000004
1857 12:18:19.753515 EC HOSTEVENT 2. 99ffebc0 00000008
1858 12:18:19.759927 POWER STATE 3. 99ffeb80 00000040
1859 12:18:19.763238 ROMSTAGE 4. 99ffeb60 00000004
1860 12:18:19.766898 MEM INFO 5. 99ffe9a0 000001b9
1861 12:18:19.770264 VPD 6. 99ffe920 0000006c
1862 12:18:19.773367 MTRR: Physical address space:
1863 12:18:19.780377 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1864 12:18:19.783391 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1865 12:18:19.789777 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1866 12:18:19.796220 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1867 12:18:19.802911 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1868 12:18:19.809377 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1869 12:18:19.816422 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1870 12:18:19.819495 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 12:18:19.822595 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 12:18:19.829685 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 12:18:19.832909 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 12:18:19.836186 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 12:18:19.839387 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 12:18:19.846163 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 12:18:19.848919 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 12:18:19.852482 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 12:18:19.855880 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 12:18:19.862955 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 12:18:19.865940 call enable_fixed_mtrr()
1882 12:18:19.868851 CPU physical address size: 39 bits
1883 12:18:19.871992 MTRR: default type WB/UC MTRR counts: 6/8.
1884 12:18:19.875368 MTRR: WB selected as default type.
1885 12:18:19.882055 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1886 12:18:19.888789 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1887 12:18:19.895657 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1888 12:18:19.902024 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1889 12:18:19.905548 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1890 12:18:19.912037 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1891 12:18:19.918641 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 12:18:19.922239 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 12:18:19.925556 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 12:18:19.929115 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 12:18:19.935216 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 12:18:19.938531 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 12:18:19.942200 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 12:18:19.945442 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 12:18:19.951928 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 12:18:19.955431 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 12:18:19.958345 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 12:18:19.958460
1903 12:18:19.962315 MTRR check
1904 12:18:19.962430 call enable_fixed_mtrr()
1905 12:18:19.965471 Fixed MTRRs : Enabled
1906 12:18:19.968784 Variable MTRRs: Enabled
1907 12:18:19.968925
1908 12:18:19.972104 MTRR: Fixed MSR 0x250 0x0606060606060606
1909 12:18:19.975388 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 12:18:19.982172 MTRR: Fixed MSR 0x259 0x0000000000000000
1911 12:18:19.985295 MTRR: Fixed MSR 0x268 0x0606060606060606
1912 12:18:19.988847 MTRR: Fixed MSR 0x269 0x0606060606060606
1913 12:18:19.992075 MTRR: Fixed MSR 0x26a 0x0606060606060606
1914 12:18:19.998103 MTRR: Fixed MSR 0x26b 0x0606060606060606
1915 12:18:20.001287 MTRR: Fixed MSR 0x26c 0x0606060606060606
1916 12:18:20.004969 MTRR: Fixed MSR 0x26d 0x0606060606060606
1917 12:18:20.008468 MTRR: Fixed MSR 0x26e 0x0606060606060606
1918 12:18:20.011334 MTRR: Fixed MSR 0x26f 0x0606060606060606
1919 12:18:20.017927 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 12:18:20.021697 call enable_fixed_mtrr()
1921 12:18:20.025193 MTRR: Fixed MSR 0x258 0x0606060606060606
1922 12:18:20.028201 MTRR: Fixed MSR 0x259 0x0000000000000000
1923 12:18:20.031292 MTRR: Fixed MSR 0x268 0x0606060606060606
1924 12:18:20.037809 MTRR: Fixed MSR 0x269 0x0606060606060606
1925 12:18:20.041416 MTRR: Fixed MSR 0x26a 0x0606060606060606
1926 12:18:20.044877 MTRR: Fixed MSR 0x26b 0x0606060606060606
1927 12:18:20.047901 MTRR: Fixed MSR 0x26c 0x0606060606060606
1928 12:18:20.054565 MTRR: Fixed MSR 0x26d 0x0606060606060606
1929 12:18:20.057865 MTRR: Fixed MSR 0x26e 0x0606060606060606
1930 12:18:20.061312 MTRR: Fixed MSR 0x26f 0x0606060606060606
1931 12:18:20.064182 CPU physical address size: 39 bits
1932 12:18:20.067615 call enable_fixed_mtrr()
1933 12:18:20.071182 MTRR: Fixed MSR 0x250 0x0606060606060606
1934 12:18:20.077879 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 12:18:20.081008 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 12:18:20.084718 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 12:18:20.087637 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 12:18:20.090931 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 12:18:20.097195 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 12:18:20.100303 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 12:18:20.103907 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 12:18:20.106864 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 12:18:20.113586 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 12:18:20.116794 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 12:18:20.120325 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 12:18:20.126544 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 12:18:20.129904 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 12:18:20.133236 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 12:18:20.137064 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 12:18:20.139975 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 12:18:20.146358 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 12:18:20.149718 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 12:18:20.153023 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 12:18:20.156293 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 12:18:20.159634 call enable_fixed_mtrr()
1956 12:18:20.162956 call enable_fixed_mtrr()
1957 12:18:20.166520 CPU physical address size: 39 bits
1958 12:18:20.169694 CPU physical address size: 39 bits
1959 12:18:20.176236 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 12:18:20.179694 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 12:18:20.182765 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 12:18:20.185934 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 12:18:20.189664 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 12:18:20.195834 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 12:18:20.199076 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 12:18:20.202775 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 12:18:20.206057 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 12:18:20.212898 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 12:18:20.215836 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 12:18:20.218980 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 12:18:20.222241 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 12:18:20.225693 call enable_fixed_mtrr()
1973 12:18:20.229342 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 12:18:20.236076 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 12:18:20.239244 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 12:18:20.242342 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 12:18:20.245579 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 12:18:20.252321 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 12:18:20.255617 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 12:18:20.258609 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 12:18:20.262554 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 12:18:20.266585 CPU physical address size: 39 bits
1983 12:18:20.269451 call enable_fixed_mtrr()
1984 12:18:20.272331 CPU physical address size: 39 bits
1985 12:18:20.275807 CPU physical address size: 39 bits
1986 12:18:20.282229 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1987 12:18:20.285903 CPU physical address size: 39 bits
1988 12:18:20.291967 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1989 12:18:20.292063 CBFS @ c08000 size 3f8000
1990 12:18:20.298640 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1991 12:18:20.302343 CBFS: Locating 'fallback/payload'
1992 12:18:20.309052 CBFS: Found @ offset 1c96c0 size 3f798
1993 12:18:20.312561 Checking segment from ROM address 0xffdd16f8
1994 12:18:20.315846 Checking segment from ROM address 0xffdd1714
1995 12:18:20.322432 Loading segment from ROM address 0xffdd16f8
1996 12:18:20.322535 code (compression=0)
1997 12:18:20.331911 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1998 12:18:20.341681 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1999 12:18:20.341800 it's not compressed!
2000 12:18:20.434881 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2001 12:18:20.441740 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2002 12:18:20.445322 Loading segment from ROM address 0xffdd1714
2003 12:18:20.448147 Entry Point 0x30000000
2004 12:18:20.451501 Loaded segments
2005 12:18:20.457067 Finalizing chipset.
2006 12:18:20.460730 Finalizing SMM.
2007 12:18:20.464069 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2008 12:18:20.467259 mp_park_aps done after 0 msecs.
2009 12:18:20.473377 Jumping to boot code at 30000000(99b62000)
2010 12:18:20.480598 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2011 12:18:20.480697
2012 12:18:20.480787
2013 12:18:20.480888
2014 12:18:20.483833 Starting depthcharge on Helios...
2015 12:18:20.483949
2016 12:18:20.484330 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2017 12:18:20.484443 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2018 12:18:20.484539 Setting prompt string to ['hatch:']
2019 12:18:20.484640 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2020 12:18:20.493410 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2021 12:18:20.493501
2022 12:18:20.500404 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2023 12:18:20.500508
2024 12:18:20.506731 board_setup: Info: eMMC controller not present; skipping
2025 12:18:20.506819
2026 12:18:20.510340 New NVMe Controller 0x30053ac0 @ 00:1d:00
2027 12:18:20.510428
2028 12:18:20.516691 board_setup: Info: SDHCI controller not present; skipping
2029 12:18:20.516782
2030 12:18:20.523576 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2031 12:18:20.523673
2032 12:18:20.523763 Wipe memory regions:
2033 12:18:20.523848
2034 12:18:20.526762 [0x00000000001000, 0x000000000a0000)
2035 12:18:20.526850
2036 12:18:20.529973 [0x00000000100000, 0x00000030000000)
2037 12:18:20.596263
2038 12:18:20.599403 [0x00000030657430, 0x00000099a2c000)
2039 12:18:20.736360
2040 12:18:20.739461 [0x00000100000000, 0x0000045e800000)
2041 12:18:22.122325
2042 12:18:22.122480 R8152: Initializing
2043 12:18:22.122555
2044 12:18:22.125473 Version 9 (ocp_data = 6010)
2045 12:18:22.129888
2046 12:18:22.129972 R8152: Done initializing
2047 12:18:22.130039
2048 12:18:22.133188 Adding net device
2049 12:18:22.615838
2050 12:18:22.615999 R8152: Initializing
2051 12:18:22.616149
2052 12:18:22.618875 Version 6 (ocp_data = 5c30)
2053 12:18:22.618980
2054 12:18:22.622425 R8152: Done initializing
2055 12:18:22.622532
2056 12:18:22.625404 net_add_device: Attemp to include the same device
2057 12:18:22.629018
2058 12:18:22.636102 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2059 12:18:22.636231
2060 12:18:22.636301
2061 12:18:22.636364
2062 12:18:22.636637 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2064 12:18:22.737015 hatch: tftpboot 192.168.201.1 12217888/tftp-deploy-h5lj97t1/kernel/bzImage 12217888/tftp-deploy-h5lj97t1/kernel/cmdline 12217888/tftp-deploy-h5lj97t1/ramdisk/ramdisk.cpio.gz
2065 12:18:22.737202 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2066 12:18:22.737307 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2067 12:18:22.741579 tftpboot 192.168.201.1 12217888/tftp-deploy-h5lj97t1/kernel/bzImploy-h5lj97t1/kernel/cmdline 12217888/tftp-deploy-h5lj97t1/ramdisk/ramdisk.cpio.gz
2068 12:18:22.741671
2069 12:18:22.741774 Waiting for link
2070 12:18:22.942959
2071 12:18:22.943174 done.
2072 12:18:22.943350
2073 12:18:22.943501 MAC: 00:24:32:50:1a:5f
2074 12:18:22.943648
2075 12:18:22.946148 Sending DHCP discover... done.
2076 12:18:22.946305
2077 12:18:22.949153 Waiting for reply... done.
2078 12:18:22.949368
2079 12:18:22.952242 Sending DHCP request... done.
2080 12:18:22.952464
2081 12:18:23.539910 Waiting for reply... done.
2082 12:18:23.540142
2083 12:18:23.540246 My ip is 192.168.201.21
2084 12:18:23.540328
2085 12:18:23.543417 The DHCP server ip is 192.168.201.1
2086 12:18:23.546424
2087 12:18:23.550097 TFTP server IP predefined by user: 192.168.201.1
2088 12:18:23.550182
2089 12:18:23.556517 Bootfile predefined by user: 12217888/tftp-deploy-h5lj97t1/kernel/bzImage
2090 12:18:23.556601
2091 12:18:23.559642 Sending tftp read request... done.
2092 12:18:23.559725
2093 12:18:23.566297 Waiting for the transfer...
2094 12:18:23.566393
2095 12:18:24.154957 00000000 ################################################################
2096 12:18:24.155323
2097 12:18:24.701188 00080000 ################################################################
2098 12:18:24.701347
2099 12:18:25.212345 00100000 ################################################################
2100 12:18:25.212540
2101 12:18:25.734226 00180000 ################################################################
2102 12:18:25.734400
2103 12:18:26.253214 00200000 ################################################################
2104 12:18:26.253377
2105 12:18:26.772744 00280000 ################################################################
2106 12:18:26.772923
2107 12:18:27.287623 00300000 ################################################################
2108 12:18:27.287779
2109 12:18:27.818313 00380000 ################################################################
2110 12:18:27.818491
2111 12:18:28.362438 00400000 ################################################################
2112 12:18:28.362795
2113 12:18:28.949036 00480000 ################################################################
2114 12:18:28.949421
2115 12:18:29.535742 00500000 ################################################################
2116 12:18:29.536170
2117 12:18:30.101441 00580000 ################################################################
2118 12:18:30.102122
2119 12:18:30.687214 00600000 ################################################################
2120 12:18:30.687734
2121 12:18:31.232475 00680000 ################################################################
2122 12:18:31.232648
2123 12:18:31.794297 00700000 ################################################################
2124 12:18:31.794680
2125 12:18:32.417266 00780000 ################################################################
2126 12:18:32.417753
2127 12:18:32.999253 00800000 ################################################################
2128 12:18:32.999632
2129 12:18:34.850389 00880000 ################################################################
2130 12:18:34.850902
2131 12:18:34.851472 00900000 ################################################################
2132 12:18:34.852155
2133 12:18:34.852712 00980000 ################################################################
2134 12:18:34.853202
2135 12:18:35.307252 00a00000 ################################################################
2136 12:18:35.307748
2137 12:18:35.889334 00a80000 ################################################################
2138 12:18:35.890009
2139 12:18:35.932862 00b00000 ##### done.
2140 12:18:35.933450
2141 12:18:35.936154 The bootfile was 11571200 bytes long.
2142 12:18:35.936790
2143 12:18:35.939575 Sending tftp read request... done.
2144 12:18:35.940290
2145 12:18:35.942813 Waiting for the transfer...
2146 12:18:35.943480
2147 12:18:36.545404 00000000 ################################################################
2148 12:18:36.545853
2149 12:18:37.153552 00080000 ################################################################
2150 12:18:37.154293
2151 12:18:37.778987 00100000 ################################################################
2152 12:18:37.779557
2153 12:18:39.583776 00180000 ################################################################
2154 12:18:39.584042
2155 12:18:39.584208 00200000 ################################################################
2156 12:18:39.584343
2157 12:18:39.584449 00280000 ################################################################
2158 12:18:39.584562
2159 12:18:40.118499 00300000 ################################################################
2160 12:18:40.118651
2161 12:18:40.695699 00380000 ################################################################
2162 12:18:40.695852
2163 12:18:41.316506 00400000 ################################################################
2164 12:18:41.317397
2165 12:18:41.980274 00480000 ################################################################
2166 12:18:41.980865
2167 12:18:42.615787 00500000 ################################################################
2168 12:18:42.616627
2169 12:18:43.106967 00580000 ################################################ done.
2170 12:18:43.107497
2171 12:18:43.110686 Sending tftp read request... done.
2172 12:18:43.111306
2173 12:18:43.114071 Waiting for the transfer...
2174 12:18:43.114715
2175 12:18:43.115057 00000000 # done.
2176 12:18:43.115419
2177 12:18:43.122951 Command line loaded dynamically from TFTP file: 12217888/tftp-deploy-h5lj97t1/kernel/cmdline
2178 12:18:43.123440
2179 12:18:43.152857 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12217888/extract-nfsrootfs-s_7bhy4f,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2180 12:18:43.153357
2181 12:18:43.159983 ec_init(0): CrosEC protocol v3 supported (256, 256)
2182 12:18:43.163743
2183 12:18:43.166877 Shutting down all USB controllers.
2184 12:18:43.167709
2185 12:18:43.168372 Removing current net device
2186 12:18:43.170809
2187 12:18:43.171224 Finalizing coreboot
2188 12:18:43.171605
2189 12:18:43.177051 Exiting depthcharge with code 4 at timestamp: 30055070
2190 12:18:43.177946
2191 12:18:43.178737
2192 12:18:43.179544 Starting kernel ...
2193 12:18:43.180302
2194 12:18:43.180747
2195 12:18:43.182232 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2196 12:18:43.182775 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2197 12:18:43.183193 Setting prompt string to ['Linux version [0-9]']
2198 12:18:43.183471 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2199 12:18:43.183717 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2201 12:23:02.182984 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2203 12:23:02.183208 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2205 12:23:02.183375 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2208 12:23:02.183647 end: 2 depthcharge-action (duration 00:05:00) [common]
2210 12:23:02.183871 Cleaning after the job
2211 12:23:02.184001 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217888/tftp-deploy-h5lj97t1/ramdisk
2212 12:23:02.185034 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217888/tftp-deploy-h5lj97t1/kernel
2213 12:23:02.185425 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217888/tftp-deploy-h5lj97t1/nfsrootfs
2214 12:23:02.239407 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217888/tftp-deploy-h5lj97t1/modules
2215 12:23:02.240342 start: 5.1 power-off (timeout 00:00:30) [common]
2216 12:23:02.240527 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2217 12:23:02.439930 >> Command sent successfully.
2218 12:23:02.453801 Returned 0 in 0 seconds
2219 12:23:02.555030 end: 5.1 power-off (duration 00:00:00) [common]
2221 12:23:02.556500 start: 5.2 read-feedback (timeout 00:10:00) [common]
2222 12:23:02.557774 Listened to connection for namespace 'common' for up to 1s
2224 12:23:02.559040 Listened to connection for namespace 'common' for up to 1s
2225 12:23:03.558377 Finalising connection for namespace 'common'
2226 12:23:03.559001 Disconnecting from shell: Finalise
2227 12:23:03.559410
2228 12:23:03.660456 end: 5.2 read-feedback (duration 00:00:01) [common]
2229 12:23:03.661019 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12217888
2230 12:23:04.483176 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12217888
2231 12:23:04.483360 JobError: Your job cannot terminate cleanly.