Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 12:17:46.297598 lava-dispatcher, installed at version: 2023.10
2 12:17:46.298224 start: 0 validate
3 12:17:46.298483 Start time: 2023-12-08 12:17:46.298471+00:00 (UTC)
4 12:17:46.298733 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:17:46.299053 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 12:17:46.889103 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:17:46.889298 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:17:47.200539 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:17:47.200761 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:17:54.002374 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:17:54.002634 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:17:54.284306 validate duration: 7.99
14 12:17:54.284759 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:17:54.284929 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:17:54.285085 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:17:54.428921 Not decompressing ramdisk as can be used compressed.
18 12:17:54.429183 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 12:17:54.429322 saving as /var/lib/lava/dispatcher/tmp/12217932/tftp-deploy-uhhkrz90/ramdisk/initrd.cpio.gz
20 12:17:54.429449 total size: 5432690 (5 MB)
21 12:17:55.261438 progress 0 % (0 MB)
22 12:17:55.266957 progress 5 % (0 MB)
23 12:17:55.269913 progress 10 % (0 MB)
24 12:17:55.272559 progress 15 % (0 MB)
25 12:17:55.275551 progress 20 % (1 MB)
26 12:17:55.278217 progress 25 % (1 MB)
27 12:17:55.280877 progress 30 % (1 MB)
28 12:17:55.283839 progress 35 % (1 MB)
29 12:17:55.286530 progress 40 % (2 MB)
30 12:17:55.289190 progress 45 % (2 MB)
31 12:17:55.291843 progress 50 % (2 MB)
32 12:17:55.294795 progress 55 % (2 MB)
33 12:17:55.297466 progress 60 % (3 MB)
34 12:17:55.300173 progress 65 % (3 MB)
35 12:17:55.303120 progress 70 % (3 MB)
36 12:17:55.305785 progress 75 % (3 MB)
37 12:17:55.308450 progress 80 % (4 MB)
38 12:17:55.311132 progress 85 % (4 MB)
39 12:17:55.314106 progress 90 % (4 MB)
40 12:17:55.316757 progress 95 % (4 MB)
41 12:17:55.319474 progress 100 % (5 MB)
42 12:17:55.319868 5 MB downloaded in 0.89 s (5.82 MB/s)
43 12:17:55.320129 end: 1.1.1 http-download (duration 00:00:01) [common]
45 12:17:55.320605 end: 1.1 download-retry (duration 00:00:01) [common]
46 12:17:55.320773 start: 1.2 download-retry (timeout 00:09:59) [common]
47 12:17:55.320930 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 12:17:55.321139 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:17:55.321274 saving as /var/lib/lava/dispatcher/tmp/12217932/tftp-deploy-uhhkrz90/kernel/bzImage
50 12:17:55.321397 total size: 11571200 (11 MB)
51 12:17:55.321519 No compression specified
52 12:17:55.323395 progress 0 % (0 MB)
53 12:17:55.329069 progress 5 % (0 MB)
54 12:17:55.334897 progress 10 % (1 MB)
55 12:17:55.340381 progress 15 % (1 MB)
56 12:17:55.346176 progress 20 % (2 MB)
57 12:17:55.352155 progress 25 % (2 MB)
58 12:17:55.357676 progress 30 % (3 MB)
59 12:17:55.363477 progress 35 % (3 MB)
60 12:17:55.369305 progress 40 % (4 MB)
61 12:17:55.374792 progress 45 % (4 MB)
62 12:17:55.380635 progress 50 % (5 MB)
63 12:17:55.386462 progress 55 % (6 MB)
64 12:17:55.391929 progress 60 % (6 MB)
65 12:17:55.397272 progress 65 % (7 MB)
66 12:17:55.400657 progress 70 % (7 MB)
67 12:17:55.403874 progress 75 % (8 MB)
68 12:17:55.407255 progress 80 % (8 MB)
69 12:17:55.410732 progress 85 % (9 MB)
70 12:17:55.413939 progress 90 % (9 MB)
71 12:17:55.417339 progress 95 % (10 MB)
72 12:17:55.420860 progress 100 % (11 MB)
73 12:17:55.421028 11 MB downloaded in 0.10 s (110.76 MB/s)
74 12:17:55.421191 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:17:55.421470 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:17:55.421569 start: 1.3 download-retry (timeout 00:09:59) [common]
78 12:17:55.421669 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 12:17:55.421810 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 12:17:55.421886 saving as /var/lib/lava/dispatcher/tmp/12217932/tftp-deploy-uhhkrz90/nfsrootfs/full.rootfs.tar
81 12:17:55.421978 total size: 133380384 (127 MB)
82 12:17:55.422050 Using unxz to decompress xz
83 12:17:55.429403 progress 0 % (0 MB)
84 12:17:55.916478 progress 5 % (6 MB)
85 12:17:56.425406 progress 10 % (12 MB)
86 12:17:56.761017 progress 15 % (19 MB)
87 12:17:57.407087 progress 20 % (25 MB)
88 12:17:57.699396 progress 25 % (31 MB)
89 12:17:58.098382 progress 30 % (38 MB)
90 12:17:58.510302 progress 35 % (44 MB)
91 12:17:59.022200 progress 40 % (50 MB)
92 12:17:59.476635 progress 45 % (57 MB)
93 12:17:59.962786 progress 50 % (63 MB)
94 12:18:00.470187 progress 55 % (69 MB)
95 12:18:00.897197 progress 60 % (76 MB)
96 12:18:01.337613 progress 65 % (82 MB)
97 12:18:01.753847 progress 70 % (89 MB)
98 12:18:02.181383 progress 75 % (95 MB)
99 12:18:02.724599 progress 80 % (101 MB)
100 12:18:03.217634 progress 85 % (108 MB)
101 12:18:03.519829 progress 90 % (114 MB)
102 12:18:03.910249 progress 95 % (120 MB)
103 12:18:04.348223 progress 100 % (127 MB)
104 12:18:04.354172 127 MB downloaded in 8.93 s (14.24 MB/s)
105 12:18:04.354463 end: 1.3.1 http-download (duration 00:00:09) [common]
107 12:18:04.354763 end: 1.3 download-retry (duration 00:00:09) [common]
108 12:18:04.354864 start: 1.4 download-retry (timeout 00:09:50) [common]
109 12:18:04.354962 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 12:18:04.429909 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:18:04.430468 saving as /var/lib/lava/dispatcher/tmp/12217932/tftp-deploy-uhhkrz90/modules/modules.tar
112 12:18:04.430850 total size: 483904 (0 MB)
113 12:18:04.431172 Using unxz to decompress xz
114 12:18:04.446817 progress 6 % (0 MB)
115 12:18:04.448736 progress 13 % (0 MB)
116 12:18:04.449979 progress 20 % (0 MB)
117 12:18:04.457086 progress 27 % (0 MB)
118 12:18:04.464500 progress 33 % (0 MB)
119 12:18:04.469946 progress 40 % (0 MB)
120 12:18:04.474177 progress 47 % (0 MB)
121 12:18:04.477870 progress 54 % (0 MB)
122 12:18:04.482647 progress 60 % (0 MB)
123 12:18:04.485689 progress 67 % (0 MB)
124 12:18:04.488490 progress 74 % (0 MB)
125 12:18:04.491218 progress 81 % (0 MB)
126 12:18:04.493655 progress 88 % (0 MB)
127 12:18:04.495910 progress 94 % (0 MB)
128 12:18:04.498823 progress 100 % (0 MB)
129 12:18:04.506018 0 MB downloaded in 0.08 s (6.14 MB/s)
130 12:18:04.506292 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:18:04.506589 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:18:04.506695 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
134 12:18:04.506808 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
135 12:18:14.883656 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12217932/extract-nfsrootfs-b1dqnqay
136 12:18:14.883880 end: 1.5.1 extract-nfsrootfs (duration 00:00:10) [common]
137 12:18:14.884046 start: 1.5.2 lava-overlay (timeout 00:09:39) [common]
138 12:18:17.955662 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw
139 12:18:17.957101 makedir: /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin
140 12:18:17.958139 makedir: /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/tests
141 12:18:17.959132 makedir: /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/results
142 12:18:17.960005 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-add-keys
143 12:18:17.960368 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-add-sources
144 12:18:17.960628 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-background-process-start
145 12:18:17.960884 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-background-process-stop
146 12:18:17.961131 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-common-functions
147 12:18:17.961378 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-echo-ipv4
148 12:18:17.961624 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-install-packages
149 12:18:17.961872 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-installed-packages
150 12:18:17.962119 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-os-build
151 12:18:17.962380 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-probe-channel
152 12:18:17.962635 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-probe-ip
153 12:18:17.962878 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-target-ip
154 12:18:17.963132 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-target-mac
155 12:18:17.963382 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-target-storage
156 12:18:17.963625 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-test-case
157 12:18:17.963869 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-test-event
158 12:18:17.964111 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-test-feedback
159 12:18:17.964350 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-test-raise
160 12:18:17.964589 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-test-reference
161 12:18:17.964864 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-test-runner
162 12:18:17.965113 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-test-set
163 12:18:17.965348 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-test-shell
164 12:18:17.965589 Updating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-install-packages (oe)
165 12:18:17.968300 Updating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/bin/lava-installed-packages (oe)
166 12:18:17.971038 Creating /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/environment
167 12:18:17.971253 LAVA metadata
168 12:18:17.971401 - LAVA_JOB_ID=12217932
169 12:18:17.971552 - LAVA_DISPATCHER_IP=192.168.201.1
170 12:18:17.971776 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:36) [common]
171 12:18:17.971921 skipped lava-vland-overlay
172 12:18:17.972087 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 12:18:17.972258 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:36) [common]
174 12:18:17.972395 skipped lava-multinode-overlay
175 12:18:17.972555 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 12:18:17.972739 start: 1.5.2.3 test-definition (timeout 00:09:36) [common]
177 12:18:17.972900 Loading test definitions
178 12:18:17.973092 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:36) [common]
179 12:18:17.973243 Using /lava-12217932 at stage 0
180 12:18:17.973881 uuid=12217932_1.5.2.3.1 testdef=None
181 12:18:17.974056 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 12:18:17.974230 start: 1.5.2.3.2 test-overlay (timeout 00:09:36) [common]
183 12:18:17.975271 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 12:18:17.975754 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:36) [common]
186 12:18:17.986469 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 12:18:17.987071 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:36) [common]
189 12:18:17.994717 runner path: /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/0/tests/0_dmesg test_uuid 12217932_1.5.2.3.1
190 12:18:17.994918 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 12:18:17.995175 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:36) [common]
193 12:18:17.995256 Using /lava-12217932 at stage 1
194 12:18:17.995613 uuid=12217932_1.5.2.3.5 testdef=None
195 12:18:17.995712 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 12:18:17.995807 start: 1.5.2.3.6 test-overlay (timeout 00:09:36) [common]
197 12:18:17.996333 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 12:18:17.996582 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:36) [common]
200 12:18:18.006336 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 12:18:18.006612 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:36) [common]
203 12:18:18.016839 runner path: /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/1/tests/1_bootrr test_uuid 12217932_1.5.2.3.5
204 12:18:18.017158 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 12:18:18.017706 Creating lava-test-runner.conf files
207 12:18:18.017852 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/0 for stage 0
208 12:18:18.018016 - 0_dmesg
209 12:18:18.018173 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217932/lava-overlay-jj01pdvw/lava-12217932/1 for stage 1
210 12:18:18.018357 - 1_bootrr
211 12:18:18.018562 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 12:18:18.018748 start: 1.5.2.4 compress-overlay (timeout 00:09:36) [common]
213 12:18:18.027964 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 12:18:18.028113 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
215 12:18:18.028216 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 12:18:18.028315 end: 1.5.2 lava-overlay (duration 00:00:03) [common]
217 12:18:18.028412 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
218 12:18:18.234055 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 12:18:18.234473 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
220 12:18:18.234613 extracting modules file /var/lib/lava/dispatcher/tmp/12217932/tftp-deploy-uhhkrz90/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217932/extract-nfsrootfs-b1dqnqay
221 12:18:18.291703 extracting modules file /var/lib/lava/dispatcher/tmp/12217932/tftp-deploy-uhhkrz90/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217932/extract-overlay-ramdisk-4vxsgg70/ramdisk
222 12:18:18.320800 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 12:18:18.321028 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
224 12:18:18.321162 [common] Applying overlay to NFS
225 12:18:18.321245 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12217932/compress-overlay-nvgtdtvb/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12217932/extract-nfsrootfs-b1dqnqay
226 12:18:18.330236 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 12:18:18.330369 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
228 12:18:18.330471 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 12:18:18.330572 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
230 12:18:18.330665 Building ramdisk /var/lib/lava/dispatcher/tmp/12217932/extract-overlay-ramdisk-4vxsgg70/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12217932/extract-overlay-ramdisk-4vxsgg70/ramdisk
231 12:18:18.573700 >> 30353 blocks
232 12:18:19.240938 rename /var/lib/lava/dispatcher/tmp/12217932/extract-overlay-ramdisk-4vxsgg70/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12217932/tftp-deploy-uhhkrz90/ramdisk/ramdisk.cpio.gz
233 12:18:19.241472 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 12:18:19.241617 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
235 12:18:19.241736 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
236 12:18:19.241843 No mkimage arch provided, not using FIT.
237 12:18:19.241946 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 12:18:19.242040 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 12:18:19.242155 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
240 12:18:19.242255 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
241 12:18:19.242340 No LXC device requested
242 12:18:19.242431 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 12:18:19.242531 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
244 12:18:19.242618 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 12:18:19.242712 Checking files for TFTP limit of 4294967296 bytes.
246 12:18:19.243161 end: 1 tftp-deploy (duration 00:00:25) [common]
247 12:18:19.243283 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 12:18:19.243389 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 12:18:19.243529 substitutions:
250 12:18:19.243606 - {DTB}: None
251 12:18:19.243677 - {INITRD}: 12217932/tftp-deploy-uhhkrz90/ramdisk/ramdisk.cpio.gz
252 12:18:19.243746 - {KERNEL}: 12217932/tftp-deploy-uhhkrz90/kernel/bzImage
253 12:18:19.243811 - {LAVA_MAC}: None
254 12:18:19.243883 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12217932/extract-nfsrootfs-b1dqnqay
255 12:18:19.243949 - {NFS_SERVER_IP}: 192.168.201.1
256 12:18:19.244012 - {PRESEED_CONFIG}: None
257 12:18:19.244075 - {PRESEED_LOCAL}: None
258 12:18:19.244136 - {RAMDISK}: 12217932/tftp-deploy-uhhkrz90/ramdisk/ramdisk.cpio.gz
259 12:18:19.244198 - {ROOT_PART}: None
260 12:18:19.244259 - {ROOT}: None
261 12:18:19.244320 - {SERVER_IP}: 192.168.201.1
262 12:18:19.244380 - {TEE}: None
263 12:18:19.244442 Parsed boot commands:
264 12:18:19.244502 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 12:18:19.244788 Parsed boot commands: tftpboot 192.168.201.1 12217932/tftp-deploy-uhhkrz90/kernel/bzImage 12217932/tftp-deploy-uhhkrz90/kernel/cmdline 12217932/tftp-deploy-uhhkrz90/ramdisk/ramdisk.cpio.gz
266 12:18:19.244894 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 12:18:19.244993 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 12:18:19.245099 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 12:18:19.245197 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 12:18:19.245288 Not connected, no need to disconnect.
271 12:18:19.245404 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 12:18:19.245504 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 12:18:19.245580 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-4'
274 12:18:19.249815 Setting prompt string to ['lava-test: # ']
275 12:18:19.250256 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 12:18:19.250384 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 12:18:19.250496 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 12:18:19.250603 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 12:18:19.251081 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=reboot'
280 12:18:24.395787 >> Command sent successfully.
281 12:18:24.404634 Returned 0 in 5 seconds
282 12:18:24.505404 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 12:18:24.506262 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 12:18:24.506646 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 12:18:24.506922 Setting prompt string to 'Starting depthcharge on Voema...'
287 12:18:24.507183 Changing prompt to 'Starting depthcharge on Voema...'
288 12:18:24.507467 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
289 12:18:24.508340 [Enter `^Ec?' for help]
290 12:18:26.101874
291 12:18:26.102081
292 12:18:26.111446 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
293 12:18:26.114944 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
294 12:18:26.121494 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
295 12:18:26.125176 CPU: AES supported, TXT NOT supported, VT supported
296 12:18:26.131648 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
297 12:18:26.138205 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
298 12:18:26.141601 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
299 12:18:26.144992 VBOOT: Loading verstage.
300 12:18:26.148128 FMAP: Found "FLASH" version 1.1 at 0x1804000.
301 12:18:26.154726 FMAP: base = 0x0 size = 0x2000000 #areas = 32
302 12:18:26.157892 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 12:18:26.168824 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
304 12:18:26.175122 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
305 12:18:26.175341
306 12:18:26.175514
307 12:18:26.188289 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
308 12:18:26.202471 Probing TPM: . done!
309 12:18:26.205619 TPM ready after 0 ms
310 12:18:26.209328 Connected to device vid:did:rid of 1ae0:0028:00
311 12:18:26.220160 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
312 12:18:26.226597 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
313 12:18:26.230161 Initialized TPM device CR50 revision 0
314 12:18:26.281574 tlcl_send_startup: Startup return code is 0
315 12:18:26.281730 TPM: setup succeeded
316 12:18:26.297435 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
317 12:18:26.311697 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 12:18:26.324645 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
319 12:18:26.334234 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
320 12:18:26.338281 Chrome EC: UHEPI supported
321 12:18:26.341118 Phase 1
322 12:18:26.344757 FMAP: area GBB found @ 1805000 (458752 bytes)
323 12:18:26.354363 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
324 12:18:26.361021 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
325 12:18:26.367563 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
326 12:18:26.374530 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
327 12:18:26.377742 Recovery requested (1009000e)
328 12:18:26.381361 TPM: Extending digest for VBOOT: boot mode into PCR 0
329 12:18:26.393084 tlcl_extend: response is 0
330 12:18:26.399057 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
331 12:18:26.409568 tlcl_extend: response is 0
332 12:18:26.416180 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
333 12:18:26.422856 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
334 12:18:26.428913 BS: verstage times (exec / console): total (unknown) / 142 ms
335 12:18:26.429112
336 12:18:26.429270
337 12:18:26.442717 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
338 12:18:26.449031 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 12:18:26.452703 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 12:18:26.455746 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
341 12:18:26.462412 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
342 12:18:26.465762 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
343 12:18:26.468814 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
344 12:18:26.472247 TCO_STS: 0000 0000
345 12:18:26.476043 GEN_PMCON: d0015038 00002200
346 12:18:26.478895 GBLRST_CAUSE: 00000000 00000000
347 12:18:26.479153 HPR_CAUSE0: 00000000
348 12:18:26.482851 prev_sleep_state 5
349 12:18:26.486209 Boot Count incremented to 31142
350 12:18:26.492271 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 12:18:26.498611 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 12:18:26.505806 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 12:18:26.511895 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
354 12:18:26.516747 Chrome EC: UHEPI supported
355 12:18:26.523066 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
356 12:18:26.537184 Probing TPM: done!
357 12:18:26.542727 Connected to device vid:did:rid of 1ae0:0028:00
358 12:18:26.553968 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
359 12:18:26.560986 Initialized TPM device CR50 revision 0
360 12:18:26.571190 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
361 12:18:26.578283 MRC: Hash idx 0x100b comparison successful.
362 12:18:26.581243 MRC cache found, size faa8
363 12:18:26.581410 bootmode is set to: 2
364 12:18:26.584345 SPD index = 0
365 12:18:26.590993 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
366 12:18:26.594321 SPD: module type is LPDDR4X
367 12:18:26.597899 SPD: module part number is MT53E512M64D4NW-046
368 12:18:26.604355 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
369 12:18:26.607994 SPD: device width 16 bits, bus width 16 bits
370 12:18:26.614602 SPD: module size is 1024 MB (per channel)
371 12:18:27.046774 CBMEM:
372 12:18:27.049620 IMD: root @ 0x76fff000 254 entries.
373 12:18:27.052892 IMD: root @ 0x76ffec00 62 entries.
374 12:18:27.056294 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
375 12:18:27.063220 FMAP: area RW_VPD found @ f35000 (8192 bytes)
376 12:18:27.066670 External stage cache:
377 12:18:27.069563 IMD: root @ 0x7b3ff000 254 entries.
378 12:18:27.072988 IMD: root @ 0x7b3fec00 62 entries.
379 12:18:27.088095 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
380 12:18:27.094996 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
381 12:18:27.101467 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
382 12:18:27.115186 MRC: 'RECOVERY_MRC_CACHE' does not need update.
383 12:18:27.122303 cse_lite: Skip switching to RW in the recovery path
384 12:18:27.122788 8 DIMMs found
385 12:18:27.123211 SMM Memory Map
386 12:18:27.129155 SMRAM : 0x7b000000 0x800000
387 12:18:27.129530 Subregion 0: 0x7b000000 0x200000
388 12:18:27.133262 Subregion 1: 0x7b200000 0x200000
389 12:18:27.137216 Subregion 2: 0x7b400000 0x400000
390 12:18:27.140299 top_of_ram = 0x77000000
391 12:18:27.144183 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
392 12:18:27.150959 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
393 12:18:27.157183 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
394 12:18:27.160301 MTRR Range: Start=ff000000 End=0 (Size 1000000)
395 12:18:27.166926 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
396 12:18:27.173745 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
397 12:18:27.184909 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
398 12:18:27.191219 Processing 211 relocs. Offset value of 0x74c0b000
399 12:18:27.198282 BS: romstage times (exec / console): total (unknown) / 277 ms
400 12:18:27.203866
401 12:18:27.203976
402 12:18:27.214022 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
403 12:18:27.217677 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
404 12:18:27.227335 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
405 12:18:27.233937 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
406 12:18:27.240839 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
407 12:18:27.247424 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
408 12:18:27.294406 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
409 12:18:27.300706 Processing 5008 relocs. Offset value of 0x75d98000
410 12:18:27.304464 BS: postcar times (exec / console): total (unknown) / 59 ms
411 12:18:27.307340
412 12:18:27.307458
413 12:18:27.317291 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
414 12:18:27.317423 Normal boot
415 12:18:27.320822 FW_CONFIG value is 0x804c02
416 12:18:27.323889 PCI: 00:07.0 disabled by fw_config
417 12:18:27.327953 PCI: 00:07.1 disabled by fw_config
418 12:18:27.331220 PCI: 00:0d.2 disabled by fw_config
419 12:18:27.334728 PCI: 00:1c.7 disabled by fw_config
420 12:18:27.341249 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 12:18:27.347924 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 12:18:27.351413 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
423 12:18:27.354292 GENERIC: 0.0 disabled by fw_config
424 12:18:27.357886 GENERIC: 1.0 disabled by fw_config
425 12:18:27.364261 fw_config match found: DB_USB=USB3_ACTIVE
426 12:18:27.367690 fw_config match found: DB_USB=USB3_ACTIVE
427 12:18:27.370928 fw_config match found: DB_USB=USB3_ACTIVE
428 12:18:27.374522 fw_config match found: DB_USB=USB3_ACTIVE
429 12:18:27.380995 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
430 12:18:27.387734 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 12:18:27.394208 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 12:18:27.404460 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
433 12:18:27.407805 microcode: sig=0x806c1 pf=0x80 revision=0x86
434 12:18:27.414197 microcode: Update skipped, already up-to-date
435 12:18:27.421224 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
436 12:18:27.448243 Detected 4 core, 8 thread CPU.
437 12:18:27.451211 Setting up SMI for CPU
438 12:18:27.454930 IED base = 0x7b400000
439 12:18:27.455557 IED size = 0x00400000
440 12:18:27.458198 Will perform SMM setup.
441 12:18:27.464857 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
442 12:18:27.471440 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
443 12:18:27.478085 Processing 16 relocs. Offset value of 0x00030000
444 12:18:27.481801 Attempting to start 7 APs
445 12:18:27.484717 Waiting for 10ms after sending INIT.
446 12:18:27.500036 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
447 12:18:27.503420 AP: slot 3 apic_id 6.
448 12:18:27.506764 AP: slot 7 apic_id 7.
449 12:18:27.507309 done.
450 12:18:27.507837 AP: slot 2 apic_id 3.
451 12:18:27.510198 AP: slot 4 apic_id 5.
452 12:18:27.513240 AP: slot 5 apic_id 4.
453 12:18:27.513659 AP: slot 6 apic_id 2.
454 12:18:27.519900 Waiting for 2nd SIPI to complete...done.
455 12:18:27.526624 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
456 12:18:27.533327 Processing 13 relocs. Offset value of 0x00038000
457 12:18:27.533544 Unable to locate Global NVS
458 12:18:27.543046 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
459 12:18:27.546843 Installing permanent SMM handler to 0x7b000000
460 12:18:27.556634 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
461 12:18:27.559507 Processing 794 relocs. Offset value of 0x7b010000
462 12:18:27.569823 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
463 12:18:27.573335 Processing 13 relocs. Offset value of 0x7b008000
464 12:18:27.579567 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
465 12:18:27.586324 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
466 12:18:27.589833 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
467 12:18:27.596430 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
468 12:18:27.602805 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
469 12:18:27.609861 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
470 12:18:27.616098 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
471 12:18:27.616345 Unable to locate Global NVS
472 12:18:27.625817 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
473 12:18:27.629479 Clearing SMI status registers
474 12:18:27.629863 SMI_STS: PM1
475 12:18:27.632829 PM1_STS: PWRBTN
476 12:18:27.639128 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
477 12:18:27.642598 In relocation handler: CPU 0
478 12:18:27.646083 New SMBASE=0x7b000000 IEDBASE=0x7b400000
479 12:18:27.652544 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 12:18:27.652804 Relocation complete.
481 12:18:27.662514 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
482 12:18:27.662775 In relocation handler: CPU 1
483 12:18:27.669160 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
484 12:18:27.669406 Relocation complete.
485 12:18:27.678893 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
486 12:18:27.679120 In relocation handler: CPU 7
487 12:18:27.685348 New SMBASE=0x7affe400 IEDBASE=0x7b400000
488 12:18:27.685508 Relocation complete.
489 12:18:27.692436 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
490 12:18:27.695438 In relocation handler: CPU 3
491 12:18:27.702237 New SMBASE=0x7afff400 IEDBASE=0x7b400000
492 12:18:27.705779 Writing SMRR. base = 0x7b000006, mask=0xff800c00
493 12:18:27.708824 Relocation complete.
494 12:18:27.715664 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
495 12:18:27.718866 In relocation handler: CPU 5
496 12:18:27.722268 New SMBASE=0x7affec00 IEDBASE=0x7b400000
497 12:18:27.729012 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 12:18:27.729155 Relocation complete.
499 12:18:27.735503 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
500 12:18:27.739149 In relocation handler: CPU 6
501 12:18:27.742031 New SMBASE=0x7affe800 IEDBASE=0x7b400000
502 12:18:27.748682 Writing SMRR. base = 0x7b000006, mask=0xff800c00
503 12:18:27.752242 Relocation complete.
504 12:18:27.758988 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
505 12:18:27.761884 In relocation handler: CPU 2
506 12:18:27.765423 New SMBASE=0x7afff800 IEDBASE=0x7b400000
507 12:18:27.768751 Relocation complete.
508 12:18:27.775043 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
509 12:18:27.778513 In relocation handler: CPU 4
510 12:18:27.782032 New SMBASE=0x7afff000 IEDBASE=0x7b400000
511 12:18:27.785493 Relocation complete.
512 12:18:27.785666 Initializing CPU #0
513 12:18:27.788584 CPU: vendor Intel device 806c1
514 12:18:27.791660 CPU: family 06, model 8c, stepping 01
515 12:18:27.795270 Clearing out pending MCEs
516 12:18:27.799551 Setting up local APIC...
517 12:18:27.799782 apic_id: 0x00 done.
518 12:18:27.803141 Turbo is available but hidden
519 12:18:27.806710 Turbo is available and visible
520 12:18:27.810293 microcode: Update skipped, already up-to-date
521 12:18:27.813556 CPU #0 initialized
522 12:18:27.816598 Initializing CPU #1
523 12:18:27.817214 Initializing CPU #5
524 12:18:27.820238 Initializing CPU #4
525 12:18:27.823306 Initializing CPU #3
526 12:18:27.823732 Initializing CPU #7
527 12:18:27.826788 CPU: vendor Intel device 806c1
528 12:18:27.830349 CPU: family 06, model 8c, stepping 01
529 12:18:27.833790 CPU: vendor Intel device 806c1
530 12:18:27.836528 CPU: family 06, model 8c, stepping 01
531 12:18:27.840492 CPU: vendor Intel device 806c1
532 12:18:27.843143 CPU: family 06, model 8c, stepping 01
533 12:18:27.846774 Initializing CPU #2
534 12:18:27.850141 Initializing CPU #6
535 12:18:27.853662 CPU: vendor Intel device 806c1
536 12:18:27.856306 CPU: family 06, model 8c, stepping 01
537 12:18:27.859856 CPU: vendor Intel device 806c1
538 12:18:27.863304 CPU: family 06, model 8c, stepping 01
539 12:18:27.866349 Clearing out pending MCEs
540 12:18:27.866841 Clearing out pending MCEs
541 12:18:27.870025 Setting up local APIC...
542 12:18:27.872856 Clearing out pending MCEs
543 12:18:27.876350 Clearing out pending MCEs
544 12:18:27.879706 Setting up local APIC...
545 12:18:27.879979 Clearing out pending MCEs
546 12:18:27.882566 Setting up local APIC...
547 12:18:27.885957 CPU: vendor Intel device 806c1
548 12:18:27.889577 CPU: family 06, model 8c, stepping 01
549 12:18:27.892657 apic_id: 0x02 done.
550 12:18:27.892775 apic_id: 0x03 done.
551 12:18:27.899492 microcode: Update skipped, already up-to-date
552 12:18:27.902526 microcode: Update skipped, already up-to-date
553 12:18:27.906087 CPU #6 initialized
554 12:18:27.906252 CPU #2 initialized
555 12:18:27.909135 Clearing out pending MCEs
556 12:18:27.912559 CPU: vendor Intel device 806c1
557 12:18:27.916087 CPU: family 06, model 8c, stepping 01
558 12:18:27.919436 Setting up local APIC...
559 12:18:27.922985 Setting up local APIC...
560 12:18:27.923093 apic_id: 0x04 done.
561 12:18:27.925787 Clearing out pending MCEs
562 12:18:27.932779 microcode: Update skipped, already up-to-date
563 12:18:27.933226 Setting up local APIC...
564 12:18:27.936008 apic_id: 0x06 done.
565 12:18:27.939712 apic_id: 0x07 done.
566 12:18:27.942791 microcode: Update skipped, already up-to-date
567 12:18:27.946312 microcode: Update skipped, already up-to-date
568 12:18:27.949825 CPU #3 initialized
569 12:18:27.952711 CPU #7 initialized
570 12:18:27.953357 CPU #5 initialized
571 12:18:27.956165 apic_id: 0x05 done.
572 12:18:27.959371 Setting up local APIC...
573 12:18:27.962728 microcode: Update skipped, already up-to-date
574 12:18:27.966066 apic_id: 0x01 done.
575 12:18:27.966596 CPU #4 initialized
576 12:18:27.972537 microcode: Update skipped, already up-to-date
577 12:18:27.973274 CPU #1 initialized
578 12:18:27.979112 bsp_do_flight_plan done after 455 msecs.
579 12:18:27.982271 CPU: frequency set to 4000 MHz
580 12:18:27.982565 Enabling SMIs.
581 12:18:27.989286 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
582 12:18:28.004885 SATAXPCIE1 indicates PCIe NVMe is present
583 12:18:28.007891 Probing TPM: done!
584 12:18:28.011858 Connected to device vid:did:rid of 1ae0:0028:00
585 12:18:28.021932 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
586 12:18:28.025364 Initialized TPM device CR50 revision 0
587 12:18:28.028815 Enabling S0i3.4
588 12:18:28.035606 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
589 12:18:28.038531 Found a VBT of 8704 bytes after decompression
590 12:18:28.045345 cse_lite: CSE RO boot. HybridStorageMode disabled
591 12:18:28.052138 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
592 12:18:28.126846 FSPS returned 0
593 12:18:28.129983 Executing Phase 1 of FspMultiPhaseSiInit
594 12:18:28.140004 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
595 12:18:28.143224 port C0 DISC req: usage 1 usb3 1 usb2 5
596 12:18:28.148611 Raw Buffer output 0 00000511
597 12:18:28.149713 Raw Buffer output 1 00000000
598 12:18:28.153932 pmc_send_ipc_cmd succeeded
599 12:18:28.160589 port C1 DISC req: usage 1 usb3 2 usb2 3
600 12:18:28.160758 Raw Buffer output 0 00000321
601 12:18:28.163477 Raw Buffer output 1 00000000
602 12:18:28.167562 pmc_send_ipc_cmd succeeded
603 12:18:28.173277 Detected 4 core, 8 thread CPU.
604 12:18:28.176575 Detected 4 core, 8 thread CPU.
605 12:18:28.409983 Display FSP Version Info HOB
606 12:18:28.413852 Reference Code - CPU = a.0.4c.31
607 12:18:28.416930 uCode Version = 0.0.0.86
608 12:18:28.420355 TXT ACM version = ff.ff.ff.ffff
609 12:18:28.423308 Reference Code - ME = a.0.4c.31
610 12:18:28.426768 MEBx version = 0.0.0.0
611 12:18:28.430356 ME Firmware Version = Consumer SKU
612 12:18:28.433462 Reference Code - PCH = a.0.4c.31
613 12:18:28.437032 PCH-CRID Status = Disabled
614 12:18:28.439792 PCH-CRID Original Value = ff.ff.ff.ffff
615 12:18:28.443480 PCH-CRID New Value = ff.ff.ff.ffff
616 12:18:28.446834 OPROM - RST - RAID = ff.ff.ff.ffff
617 12:18:28.449724 PCH Hsio Version = 4.0.0.0
618 12:18:28.453259 Reference Code - SA - System Agent = a.0.4c.31
619 12:18:28.456739 Reference Code - MRC = 2.0.0.1
620 12:18:28.460222 SA - PCIe Version = a.0.4c.31
621 12:18:28.463423 SA-CRID Status = Disabled
622 12:18:28.466871 SA-CRID Original Value = 0.0.0.1
623 12:18:28.469687 SA-CRID New Value = 0.0.0.1
624 12:18:28.473585 OPROM - VBIOS = ff.ff.ff.ffff
625 12:18:28.477059 IO Manageability Engine FW Version = 11.1.4.0
626 12:18:28.480254 PHY Build Version = 0.0.0.e0
627 12:18:28.483960 Thunderbolt(TM) FW Version = 0.0.0.0
628 12:18:28.490621 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 12:18:28.493608 ITSS IRQ Polarities Before:
630 12:18:28.494054 IPC0: 0xffffffff
631 12:18:28.497498 IPC1: 0xffffffff
632 12:18:28.497936 IPC2: 0xffffffff
633 12:18:28.500055 IPC3: 0xffffffff
634 12:18:28.503491 ITSS IRQ Polarities After:
635 12:18:28.504226 IPC0: 0xffffffff
636 12:18:28.506978 IPC1: 0xffffffff
637 12:18:28.507708 IPC2: 0xffffffff
638 12:18:28.510385 IPC3: 0xffffffff
639 12:18:28.513358 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 12:18:28.527004 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 12:18:28.537036 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 12:18:28.550176 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 12:18:28.556757 BS: BS_DEV_INIT_CHIPS run times (exec / console): 324 / 236 ms
644 12:18:28.557216 Enumerating buses...
645 12:18:28.563381 Show all devs... Before device enumeration.
646 12:18:28.563636 Root Device: enabled 1
647 12:18:28.566875 DOMAIN: 0000: enabled 1
648 12:18:28.569948 CPU_CLUSTER: 0: enabled 1
649 12:18:28.573402 PCI: 00:00.0: enabled 1
650 12:18:28.573638 PCI: 00:02.0: enabled 1
651 12:18:28.576951 PCI: 00:04.0: enabled 1
652 12:18:28.580023 PCI: 00:05.0: enabled 1
653 12:18:28.583464 PCI: 00:06.0: enabled 0
654 12:18:28.583803 PCI: 00:07.0: enabled 0
655 12:18:28.586720 PCI: 00:07.1: enabled 0
656 12:18:28.590266 PCI: 00:07.2: enabled 0
657 12:18:28.593129 PCI: 00:07.3: enabled 0
658 12:18:28.593460 PCI: 00:08.0: enabled 1
659 12:18:28.596606 PCI: 00:09.0: enabled 0
660 12:18:28.600149 PCI: 00:0a.0: enabled 0
661 12:18:28.603471 PCI: 00:0d.0: enabled 1
662 12:18:28.603742 PCI: 00:0d.1: enabled 0
663 12:18:28.606659 PCI: 00:0d.2: enabled 0
664 12:18:28.610048 PCI: 00:0d.3: enabled 0
665 12:18:28.610289 PCI: 00:0e.0: enabled 0
666 12:18:28.613372 PCI: 00:10.2: enabled 1
667 12:18:28.616720 PCI: 00:10.6: enabled 0
668 12:18:28.619557 PCI: 00:10.7: enabled 0
669 12:18:28.619789 PCI: 00:12.0: enabled 0
670 12:18:28.622937 PCI: 00:12.6: enabled 0
671 12:18:28.626552 PCI: 00:13.0: enabled 0
672 12:18:28.629793 PCI: 00:14.0: enabled 1
673 12:18:28.630035 PCI: 00:14.1: enabled 0
674 12:18:28.632898 PCI: 00:14.2: enabled 1
675 12:18:28.636367 PCI: 00:14.3: enabled 1
676 12:18:28.639742 PCI: 00:15.0: enabled 1
677 12:18:28.640008 PCI: 00:15.1: enabled 1
678 12:18:28.643354 PCI: 00:15.2: enabled 1
679 12:18:28.646412 PCI: 00:15.3: enabled 1
680 12:18:28.646594 PCI: 00:16.0: enabled 1
681 12:18:28.649813 PCI: 00:16.1: enabled 0
682 12:18:28.652894 PCI: 00:16.2: enabled 0
683 12:18:28.656045 PCI: 00:16.3: enabled 0
684 12:18:28.656159 PCI: 00:16.4: enabled 0
685 12:18:28.659625 PCI: 00:16.5: enabled 0
686 12:18:28.663139 PCI: 00:17.0: enabled 1
687 12:18:28.666545 PCI: 00:19.0: enabled 0
688 12:18:28.666665 PCI: 00:19.1: enabled 1
689 12:18:28.669500 PCI: 00:19.2: enabled 0
690 12:18:28.673014 PCI: 00:1c.0: enabled 1
691 12:18:28.675975 PCI: 00:1c.1: enabled 0
692 12:18:28.676070 PCI: 00:1c.2: enabled 0
693 12:18:28.679606 PCI: 00:1c.3: enabled 0
694 12:18:28.682980 PCI: 00:1c.4: enabled 0
695 12:18:28.685923 PCI: 00:1c.5: enabled 0
696 12:18:28.686046 PCI: 00:1c.6: enabled 1
697 12:18:28.689552 PCI: 00:1c.7: enabled 0
698 12:18:28.692767 PCI: 00:1d.0: enabled 1
699 12:18:28.692863 PCI: 00:1d.1: enabled 0
700 12:18:28.696156 PCI: 00:1d.2: enabled 1
701 12:18:28.699283 PCI: 00:1d.3: enabled 0
702 12:18:28.702672 PCI: 00:1e.0: enabled 1
703 12:18:28.702785 PCI: 00:1e.1: enabled 0
704 12:18:28.706052 PCI: 00:1e.2: enabled 1
705 12:18:28.709651 PCI: 00:1e.3: enabled 1
706 12:18:28.712998 PCI: 00:1f.0: enabled 1
707 12:18:28.713132 PCI: 00:1f.1: enabled 0
708 12:18:28.715754 PCI: 00:1f.2: enabled 1
709 12:18:28.719145 PCI: 00:1f.3: enabled 1
710 12:18:28.722897 PCI: 00:1f.4: enabled 0
711 12:18:28.723127 PCI: 00:1f.5: enabled 1
712 12:18:28.725858 PCI: 00:1f.6: enabled 0
713 12:18:28.729259 PCI: 00:1f.7: enabled 0
714 12:18:28.729566 APIC: 00: enabled 1
715 12:18:28.732875 GENERIC: 0.0: enabled 1
716 12:18:28.736276 GENERIC: 0.0: enabled 1
717 12:18:28.739931 GENERIC: 1.0: enabled 1
718 12:18:28.740366 GENERIC: 0.0: enabled 1
719 12:18:28.742668 GENERIC: 1.0: enabled 1
720 12:18:28.745960 USB0 port 0: enabled 1
721 12:18:28.746256 GENERIC: 0.0: enabled 1
722 12:18:28.749599 USB0 port 0: enabled 1
723 12:18:28.753021 GENERIC: 0.0: enabled 1
724 12:18:28.755858 I2C: 00:1a: enabled 1
725 12:18:28.756141 I2C: 00:31: enabled 1
726 12:18:28.759580 I2C: 00:32: enabled 1
727 12:18:28.763161 I2C: 00:10: enabled 1
728 12:18:28.763427 I2C: 00:15: enabled 1
729 12:18:28.766260 GENERIC: 0.0: enabled 0
730 12:18:28.769281 GENERIC: 1.0: enabled 0
731 12:18:28.769559 GENERIC: 0.0: enabled 1
732 12:18:28.772577 SPI: 00: enabled 1
733 12:18:28.776156 SPI: 00: enabled 1
734 12:18:28.776449 PNP: 0c09.0: enabled 1
735 12:18:28.779374 GENERIC: 0.0: enabled 1
736 12:18:28.782795 USB3 port 0: enabled 1
737 12:18:28.785748 USB3 port 1: enabled 1
738 12:18:28.786033 USB3 port 2: enabled 0
739 12:18:28.789586 USB3 port 3: enabled 0
740 12:18:28.792461 USB2 port 0: enabled 0
741 12:18:28.792816 USB2 port 1: enabled 1
742 12:18:28.795978 USB2 port 2: enabled 1
743 12:18:28.799348 USB2 port 3: enabled 0
744 12:18:28.799621 USB2 port 4: enabled 1
745 12:18:28.802600 USB2 port 5: enabled 0
746 12:18:28.806175 USB2 port 6: enabled 0
747 12:18:28.809090 USB2 port 7: enabled 0
748 12:18:28.809365 USB2 port 8: enabled 0
749 12:18:28.812552 USB2 port 9: enabled 0
750 12:18:28.816075 USB3 port 0: enabled 0
751 12:18:28.816422 USB3 port 1: enabled 1
752 12:18:28.819434 USB3 port 2: enabled 0
753 12:18:28.822208 USB3 port 3: enabled 0
754 12:18:28.825674 GENERIC: 0.0: enabled 1
755 12:18:28.826116 GENERIC: 1.0: enabled 1
756 12:18:28.829272 APIC: 01: enabled 1
757 12:18:28.832610 APIC: 03: enabled 1
758 12:18:28.832918 APIC: 06: enabled 1
759 12:18:28.835847 APIC: 05: enabled 1
760 12:18:28.836132 APIC: 04: enabled 1
761 12:18:28.838821 APIC: 02: enabled 1
762 12:18:28.842455 APIC: 07: enabled 1
763 12:18:28.842829 Compare with tree...
764 12:18:28.845803 Root Device: enabled 1
765 12:18:28.849271 DOMAIN: 0000: enabled 1
766 12:18:28.852019 PCI: 00:00.0: enabled 1
767 12:18:28.852476 PCI: 00:02.0: enabled 1
768 12:18:28.855487 PCI: 00:04.0: enabled 1
769 12:18:28.858854 GENERIC: 0.0: enabled 1
770 12:18:28.862418 PCI: 00:05.0: enabled 1
771 12:18:28.865581 PCI: 00:06.0: enabled 0
772 12:18:28.865995 PCI: 00:07.0: enabled 0
773 12:18:28.869201 GENERIC: 0.0: enabled 1
774 12:18:28.872695 PCI: 00:07.1: enabled 0
775 12:18:28.875669 GENERIC: 1.0: enabled 1
776 12:18:28.879240 PCI: 00:07.2: enabled 0
777 12:18:28.879658 GENERIC: 0.0: enabled 1
778 12:18:28.882318 PCI: 00:07.3: enabled 0
779 12:18:28.885769 GENERIC: 1.0: enabled 1
780 12:18:28.888690 PCI: 00:08.0: enabled 1
781 12:18:28.892173 PCI: 00:09.0: enabled 0
782 12:18:28.892540 PCI: 00:0a.0: enabled 0
783 12:18:28.895299 PCI: 00:0d.0: enabled 1
784 12:18:28.898870 USB0 port 0: enabled 1
785 12:18:28.902505 USB3 port 0: enabled 1
786 12:18:28.905781 USB3 port 1: enabled 1
787 12:18:28.906163 USB3 port 2: enabled 0
788 12:18:28.908691 USB3 port 3: enabled 0
789 12:18:28.912416 PCI: 00:0d.1: enabled 0
790 12:18:28.915620 PCI: 00:0d.2: enabled 0
791 12:18:28.918940 GENERIC: 0.0: enabled 1
792 12:18:28.921911 PCI: 00:0d.3: enabled 0
793 12:18:28.922402 PCI: 00:0e.0: enabled 0
794 12:18:28.925450 PCI: 00:10.2: enabled 1
795 12:18:28.928663 PCI: 00:10.6: enabled 0
796 12:18:28.931882 PCI: 00:10.7: enabled 0
797 12:18:28.932230 PCI: 00:12.0: enabled 0
798 12:18:28.935413 PCI: 00:12.6: enabled 0
799 12:18:28.938831 PCI: 00:13.0: enabled 0
800 12:18:28.941823 PCI: 00:14.0: enabled 1
801 12:18:28.945297 USB0 port 0: enabled 1
802 12:18:28.945681 USB2 port 0: enabled 0
803 12:18:28.948757 USB2 port 1: enabled 1
804 12:18:28.952184 USB2 port 2: enabled 1
805 12:18:28.955234 USB2 port 3: enabled 0
806 12:18:28.958733 USB2 port 4: enabled 1
807 12:18:28.961842 USB2 port 5: enabled 0
808 12:18:28.962155 USB2 port 6: enabled 0
809 12:18:28.965246 USB2 port 7: enabled 0
810 12:18:28.968808 USB2 port 8: enabled 0
811 12:18:28.972249 USB2 port 9: enabled 0
812 12:18:28.975172 USB3 port 0: enabled 0
813 12:18:28.978486 USB3 port 1: enabled 1
814 12:18:28.978771 USB3 port 2: enabled 0
815 12:18:28.982209 USB3 port 3: enabled 0
816 12:18:28.985640 PCI: 00:14.1: enabled 0
817 12:18:28.988462 PCI: 00:14.2: enabled 1
818 12:18:28.991916 PCI: 00:14.3: enabled 1
819 12:18:28.992204 GENERIC: 0.0: enabled 1
820 12:18:28.995459 PCI: 00:15.0: enabled 1
821 12:18:28.998580 I2C: 00:1a: enabled 1
822 12:18:29.002142 I2C: 00:31: enabled 1
823 12:18:29.002429 I2C: 00:32: enabled 1
824 12:18:29.005429 PCI: 00:15.1: enabled 1
825 12:18:29.008645 I2C: 00:10: enabled 1
826 12:18:29.011940 PCI: 00:15.2: enabled 1
827 12:18:29.015458 PCI: 00:15.3: enabled 1
828 12:18:29.015789 PCI: 00:16.0: enabled 1
829 12:18:29.018788 PCI: 00:16.1: enabled 0
830 12:18:29.022031 PCI: 00:16.2: enabled 0
831 12:18:29.025265 PCI: 00:16.3: enabled 0
832 12:18:29.028847 PCI: 00:16.4: enabled 0
833 12:18:29.029446 PCI: 00:16.5: enabled 0
834 12:18:29.032152 PCI: 00:17.0: enabled 1
835 12:18:29.035357 PCI: 00:19.0: enabled 0
836 12:18:29.038524 PCI: 00:19.1: enabled 1
837 12:18:29.042001 I2C: 00:15: enabled 1
838 12:18:29.042283 PCI: 00:19.2: enabled 0
839 12:18:29.045532 PCI: 00:1d.0: enabled 1
840 12:18:29.048889 GENERIC: 0.0: enabled 1
841 12:18:29.052529 PCI: 00:1e.0: enabled 1
842 12:18:29.052918 PCI: 00:1e.1: enabled 0
843 12:18:29.102942 PCI: 00:1e.2: enabled 1
844 12:18:29.103701 SPI: 00: enabled 1
845 12:18:29.104171 PCI: 00:1e.3: enabled 1
846 12:18:29.104578 SPI: 00: enabled 1
847 12:18:29.105223 PCI: 00:1f.0: enabled 1
848 12:18:29.105645 PNP: 0c09.0: enabled 1
849 12:18:29.105966 PCI: 00:1f.1: enabled 0
850 12:18:29.106274 PCI: 00:1f.2: enabled 1
851 12:18:29.106572 GENERIC: 0.0: enabled 1
852 12:18:29.107337 GENERIC: 0.0: enabled 1
853 12:18:29.107715 GENERIC: 1.0: enabled 1
854 12:18:29.108072 PCI: 00:1f.3: enabled 1
855 12:18:29.108542 PCI: 00:1f.4: enabled 0
856 12:18:29.109004 PCI: 00:1f.5: enabled 1
857 12:18:29.109313 PCI: 00:1f.6: enabled 0
858 12:18:29.109607 PCI: 00:1f.7: enabled 0
859 12:18:29.109894 CPU_CLUSTER: 0: enabled 1
860 12:18:29.110266 APIC: 00: enabled 1
861 12:18:29.110569 APIC: 01: enabled 1
862 12:18:29.154425 APIC: 03: enabled 1
863 12:18:29.155177 APIC: 06: enabled 1
864 12:18:29.155671 APIC: 05: enabled 1
865 12:18:29.156540 APIC: 04: enabled 1
866 12:18:29.156969 APIC: 02: enabled 1
867 12:18:29.157560 APIC: 07: enabled 1
868 12:18:29.158126 Root Device scanning...
869 12:18:29.158520 scan_static_bus for Root Device
870 12:18:29.158938 DOMAIN: 0000 enabled
871 12:18:29.159458 CPU_CLUSTER: 0 enabled
872 12:18:29.159858 DOMAIN: 0000 scanning...
873 12:18:29.160170 PCI: pci_scan_bus for bus 00
874 12:18:29.160690 PCI: 00:00.0 [8086/0000] ops
875 12:18:29.161242 PCI: 00:00.0 [8086/9a12] enabled
876 12:18:29.161759 PCI: 00:02.0 [8086/0000] bus ops
877 12:18:29.162165 PCI: 00:02.0 [8086/9a40] enabled
878 12:18:29.162667 PCI: 00:04.0 [8086/0000] bus ops
879 12:18:29.163103 PCI: 00:04.0 [8086/9a03] enabled
880 12:18:29.173038 PCI: 00:05.0 [8086/9a19] enabled
881 12:18:29.173543 PCI: 00:07.0 [0000/0000] hidden
882 12:18:29.174353 PCI: 00:08.0 [8086/9a11] enabled
883 12:18:29.174737 PCI: 00:0a.0 [8086/9a0d] disabled
884 12:18:29.176569 PCI: 00:0d.0 [8086/0000] bus ops
885 12:18:29.177083 PCI: 00:0d.0 [8086/9a13] enabled
886 12:18:29.179590 PCI: 00:14.0 [8086/0000] bus ops
887 12:18:29.180039 PCI: 00:14.0 [8086/a0ed] enabled
888 12:18:29.182838 PCI: 00:14.2 [8086/a0ef] enabled
889 12:18:29.186038 PCI: 00:14.3 [8086/0000] bus ops
890 12:18:29.189264 PCI: 00:14.3 [8086/a0f0] enabled
891 12:18:29.192729 PCI: 00:15.0 [8086/0000] bus ops
892 12:18:29.196262 PCI: 00:15.0 [8086/a0e8] enabled
893 12:18:29.199691 PCI: 00:15.1 [8086/0000] bus ops
894 12:18:29.202730 PCI: 00:15.1 [8086/a0e9] enabled
895 12:18:29.206291 PCI: 00:15.2 [8086/0000] bus ops
896 12:18:29.210011 PCI: 00:15.2 [8086/a0ea] enabled
897 12:18:29.212744 PCI: 00:15.3 [8086/0000] bus ops
898 12:18:29.216240 PCI: 00:15.3 [8086/a0eb] enabled
899 12:18:29.219743 PCI: 00:16.0 [8086/0000] ops
900 12:18:29.222671 PCI: 00:16.0 [8086/a0e0] enabled
901 12:18:29.229466 PCI: Static device PCI: 00:17.0 not found, disabling it.
902 12:18:29.233017 PCI: 00:19.0 [8086/0000] bus ops
903 12:18:29.236036 PCI: 00:19.0 [8086/a0c5] disabled
904 12:18:29.239413 PCI: 00:19.1 [8086/0000] bus ops
905 12:18:29.242960 PCI: 00:19.1 [8086/a0c6] enabled
906 12:18:29.245911 PCI: 00:1d.0 [8086/0000] bus ops
907 12:18:29.249560 PCI: 00:1d.0 [8086/a0b0] enabled
908 12:18:29.253000 PCI: 00:1e.0 [8086/0000] ops
909 12:18:29.255783 PCI: 00:1e.0 [8086/a0a8] enabled
910 12:18:29.259465 PCI: 00:1e.2 [8086/0000] bus ops
911 12:18:29.262926 PCI: 00:1e.2 [8086/a0aa] enabled
912 12:18:29.265679 PCI: 00:1e.3 [8086/0000] bus ops
913 12:18:29.269470 PCI: 00:1e.3 [8086/a0ab] enabled
914 12:18:29.272977 PCI: 00:1f.0 [8086/0000] bus ops
915 12:18:29.276029 PCI: 00:1f.0 [8086/a087] enabled
916 12:18:29.276440 RTC Init
917 12:18:29.279351 Set power on after power failure.
918 12:18:29.282436 Disabling Deep S3
919 12:18:29.282841 Disabling Deep S3
920 12:18:29.286365 Disabling Deep S4
921 12:18:29.287095 Disabling Deep S4
922 12:18:29.289842 Disabling Deep S5
923 12:18:29.292954 Disabling Deep S5
924 12:18:29.295888 PCI: 00:1f.2 [0000/0000] hidden
925 12:18:29.299440 PCI: 00:1f.3 [8086/0000] bus ops
926 12:18:29.302367 PCI: 00:1f.3 [8086/a0c8] enabled
927 12:18:29.306002 PCI: 00:1f.5 [8086/0000] bus ops
928 12:18:29.309918 PCI: 00:1f.5 [8086/a0a4] enabled
929 12:18:29.310309 PCI: Leftover static devices:
930 12:18:29.312688 PCI: 00:10.2
931 12:18:29.313085 PCI: 00:10.6
932 12:18:29.316022 PCI: 00:10.7
933 12:18:29.316412 PCI: 00:06.0
934 12:18:29.319670 PCI: 00:07.1
935 12:18:29.320174 PCI: 00:07.2
936 12:18:29.320608 PCI: 00:07.3
937 12:18:29.322943 PCI: 00:09.0
938 12:18:29.323434 PCI: 00:0d.1
939 12:18:29.325709 PCI: 00:0d.2
940 12:18:29.326149 PCI: 00:0d.3
941 12:18:29.326463 PCI: 00:0e.0
942 12:18:29.329305 PCI: 00:12.0
943 12:18:29.329715 PCI: 00:12.6
944 12:18:29.332991 PCI: 00:13.0
945 12:18:29.333481 PCI: 00:14.1
946 12:18:29.333888 PCI: 00:16.1
947 12:18:29.335843 PCI: 00:16.2
948 12:18:29.336235 PCI: 00:16.3
949 12:18:29.339458 PCI: 00:16.4
950 12:18:29.339851 PCI: 00:16.5
951 12:18:29.342917 PCI: 00:17.0
952 12:18:29.343313 PCI: 00:19.2
953 12:18:29.343628 PCI: 00:1e.1
954 12:18:29.345912 PCI: 00:1f.1
955 12:18:29.346308 PCI: 00:1f.4
956 12:18:29.349367 PCI: 00:1f.6
957 12:18:29.349757 PCI: 00:1f.7
958 12:18:29.352687 PCI: Check your devicetree.cb.
959 12:18:29.355802 PCI: 00:02.0 scanning...
960 12:18:29.359286 scan_generic_bus for PCI: 00:02.0
961 12:18:29.362405 scan_generic_bus for PCI: 00:02.0 done
962 12:18:29.365929 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
963 12:18:29.368943 PCI: 00:04.0 scanning...
964 12:18:29.372433 scan_generic_bus for PCI: 00:04.0
965 12:18:29.375659 GENERIC: 0.0 enabled
966 12:18:29.382274 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
967 12:18:29.385674 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
968 12:18:29.389132 PCI: 00:0d.0 scanning...
969 12:18:29.392458 scan_static_bus for PCI: 00:0d.0
970 12:18:29.395508 USB0 port 0 enabled
971 12:18:29.395904 USB0 port 0 scanning...
972 12:18:29.399106 scan_static_bus for USB0 port 0
973 12:18:29.402623 USB3 port 0 enabled
974 12:18:29.406008 USB3 port 1 enabled
975 12:18:29.406406 USB3 port 2 disabled
976 12:18:29.408895 USB3 port 3 disabled
977 12:18:29.412270 USB3 port 0 scanning...
978 12:18:29.415799 scan_static_bus for USB3 port 0
979 12:18:29.418842 scan_static_bus for USB3 port 0 done
980 12:18:29.422280 scan_bus: bus USB3 port 0 finished in 6 msecs
981 12:18:29.425886 USB3 port 1 scanning...
982 12:18:29.428942 scan_static_bus for USB3 port 1
983 12:18:29.432393 scan_static_bus for USB3 port 1 done
984 12:18:29.435498 scan_bus: bus USB3 port 1 finished in 6 msecs
985 12:18:29.442653 scan_static_bus for USB0 port 0 done
986 12:18:29.445585 scan_bus: bus USB0 port 0 finished in 43 msecs
987 12:18:29.449046 scan_static_bus for PCI: 00:0d.0 done
988 12:18:29.455723 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
989 12:18:29.456277 PCI: 00:14.0 scanning...
990 12:18:29.458699 scan_static_bus for PCI: 00:14.0
991 12:18:29.461948 USB0 port 0 enabled
992 12:18:29.465436 USB0 port 0 scanning...
993 12:18:29.468754 scan_static_bus for USB0 port 0
994 12:18:29.469298 USB2 port 0 disabled
995 12:18:29.471837 USB2 port 1 enabled
996 12:18:29.475453 USB2 port 2 enabled
997 12:18:29.476023 USB2 port 3 disabled
998 12:18:29.478444 USB2 port 4 enabled
999 12:18:29.482050 USB2 port 5 disabled
1000 12:18:29.482601 USB2 port 6 disabled
1001 12:18:29.485584 USB2 port 7 disabled
1002 12:18:29.489063 USB2 port 8 disabled
1003 12:18:29.489620 USB2 port 9 disabled
1004 12:18:29.492001 USB3 port 0 disabled
1005 12:18:29.492654 USB3 port 1 enabled
1006 12:18:29.495595 USB3 port 2 disabled
1007 12:18:29.498750 USB3 port 3 disabled
1008 12:18:29.502421 USB2 port 1 scanning...
1009 12:18:29.505367 scan_static_bus for USB2 port 1
1010 12:18:29.508852 scan_static_bus for USB2 port 1 done
1011 12:18:29.511804 scan_bus: bus USB2 port 1 finished in 6 msecs
1012 12:18:29.515155 USB2 port 2 scanning...
1013 12:18:29.518844 scan_static_bus for USB2 port 2
1014 12:18:29.521736 scan_static_bus for USB2 port 2 done
1015 12:18:29.525105 scan_bus: bus USB2 port 2 finished in 6 msecs
1016 12:18:29.528785 USB2 port 4 scanning...
1017 12:18:29.532121 scan_static_bus for USB2 port 4
1018 12:18:29.535250 scan_static_bus for USB2 port 4 done
1019 12:18:29.542108 scan_bus: bus USB2 port 4 finished in 6 msecs
1020 12:18:29.542630 USB3 port 1 scanning...
1021 12:18:29.544941 scan_static_bus for USB3 port 1
1022 12:18:29.551769 scan_static_bus for USB3 port 1 done
1023 12:18:29.555116 scan_bus: bus USB3 port 1 finished in 6 msecs
1024 12:18:29.558790 scan_static_bus for USB0 port 0 done
1025 12:18:29.561792 scan_bus: bus USB0 port 0 finished in 93 msecs
1026 12:18:29.568135 scan_static_bus for PCI: 00:14.0 done
1027 12:18:29.571636 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1028 12:18:29.575264 PCI: 00:14.3 scanning...
1029 12:18:29.578495 scan_static_bus for PCI: 00:14.3
1030 12:18:29.581654 GENERIC: 0.0 enabled
1031 12:18:29.584761 scan_static_bus for PCI: 00:14.3 done
1032 12:18:29.588284 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1033 12:18:29.591507 PCI: 00:15.0 scanning...
1034 12:18:29.594866 scan_static_bus for PCI: 00:15.0
1035 12:18:29.598488 I2C: 00:1a enabled
1036 12:18:29.598882 I2C: 00:31 enabled
1037 12:18:29.601382 I2C: 00:32 enabled
1038 12:18:29.605066 scan_static_bus for PCI: 00:15.0 done
1039 12:18:29.608367 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1040 12:18:29.611708 PCI: 00:15.1 scanning...
1041 12:18:29.614919 scan_static_bus for PCI: 00:15.1
1042 12:18:29.618423 I2C: 00:10 enabled
1043 12:18:29.621403 scan_static_bus for PCI: 00:15.1 done
1044 12:18:29.624843 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1045 12:18:29.627969 PCI: 00:15.2 scanning...
1046 12:18:29.632300 scan_static_bus for PCI: 00:15.2
1047 12:18:29.635722 scan_static_bus for PCI: 00:15.2 done
1048 12:18:29.638845 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1049 12:18:29.642375 PCI: 00:15.3 scanning...
1050 12:18:29.645324 scan_static_bus for PCI: 00:15.3
1051 12:18:29.648962 scan_static_bus for PCI: 00:15.3 done
1052 12:18:29.655233 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1053 12:18:29.658693 PCI: 00:19.1 scanning...
1054 12:18:29.661833 scan_static_bus for PCI: 00:19.1
1055 12:18:29.662255 I2C: 00:15 enabled
1056 12:18:29.665444 scan_static_bus for PCI: 00:19.1 done
1057 12:18:29.671895 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1058 12:18:29.675347 PCI: 00:1d.0 scanning...
1059 12:18:29.678777 do_pci_scan_bridge for PCI: 00:1d.0
1060 12:18:29.682345 PCI: pci_scan_bus for bus 01
1061 12:18:29.684977 PCI: 01:00.0 [1c5c/174a] enabled
1062 12:18:29.685400 GENERIC: 0.0 enabled
1063 12:18:29.688491 Enabling Common Clock Configuration
1064 12:18:29.695454 L1 Sub-State supported from root port 29
1065 12:18:29.698671 L1 Sub-State Support = 0xf
1066 12:18:29.699109 CommonModeRestoreTime = 0x28
1067 12:18:29.705337 Power On Value = 0x16, Power On Scale = 0x0
1068 12:18:29.705799 ASPM: Enabled L1
1069 12:18:29.708927 PCIe: Max_Payload_Size adjusted to 128
1070 12:18:29.715406 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1071 12:18:29.718649 PCI: 00:1e.2 scanning...
1072 12:18:29.722056 scan_generic_bus for PCI: 00:1e.2
1073 12:18:29.722482 SPI: 00 enabled
1074 12:18:29.728500 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1075 12:18:29.735461 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1076 12:18:29.736044 PCI: 00:1e.3 scanning...
1077 12:18:29.738733 scan_generic_bus for PCI: 00:1e.3
1078 12:18:29.742015 SPI: 00 enabled
1079 12:18:29.748410 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1080 12:18:29.751671 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1081 12:18:29.755081 PCI: 00:1f.0 scanning...
1082 12:18:29.758658 scan_static_bus for PCI: 00:1f.0
1083 12:18:29.761610 PNP: 0c09.0 enabled
1084 12:18:29.762142 PNP: 0c09.0 scanning...
1085 12:18:29.764614 scan_static_bus for PNP: 0c09.0
1086 12:18:29.771857 scan_static_bus for PNP: 0c09.0 done
1087 12:18:29.774834 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1088 12:18:29.778381 scan_static_bus for PCI: 00:1f.0 done
1089 12:18:29.784977 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1090 12:18:29.785401 PCI: 00:1f.2 scanning...
1091 12:18:29.788178 scan_static_bus for PCI: 00:1f.2
1092 12:18:29.791497 GENERIC: 0.0 enabled
1093 12:18:29.794998 GENERIC: 0.0 scanning...
1094 12:18:29.797868 scan_static_bus for GENERIC: 0.0
1095 12:18:29.801430 GENERIC: 0.0 enabled
1096 12:18:29.801853 GENERIC: 1.0 enabled
1097 12:18:29.804901 scan_static_bus for GENERIC: 0.0 done
1098 12:18:29.811180 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1099 12:18:29.814675 scan_static_bus for PCI: 00:1f.2 done
1100 12:18:29.817969 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1101 12:18:29.821525 PCI: 00:1f.3 scanning...
1102 12:18:29.824505 scan_static_bus for PCI: 00:1f.3
1103 12:18:29.828132 scan_static_bus for PCI: 00:1f.3 done
1104 12:18:29.834449 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1105 12:18:29.837722 PCI: 00:1f.5 scanning...
1106 12:18:29.841243 scan_generic_bus for PCI: 00:1f.5
1107 12:18:29.844578 scan_generic_bus for PCI: 00:1f.5 done
1108 12:18:29.848024 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1109 12:18:29.854326 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1110 12:18:29.857946 scan_static_bus for Root Device done
1111 12:18:29.861011 scan_bus: bus Root Device finished in 737 msecs
1112 12:18:29.864003 done
1113 12:18:29.867469 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1114 12:18:29.871020 Chrome EC: UHEPI supported
1115 12:18:29.877777 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1116 12:18:29.884329 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1117 12:18:29.887339 SPI flash protection: WPSW=0 SRP0=0
1118 12:18:29.894190 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1119 12:18:29.897440 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1120 12:18:29.900846 found VGA at PCI: 00:02.0
1121 12:18:29.904282 Setting up VGA for PCI: 00:02.0
1122 12:18:29.911016 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1123 12:18:29.914513 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1124 12:18:29.917531 Allocating resources...
1125 12:18:29.920675 Reading resources...
1126 12:18:29.923973 Root Device read_resources bus 0 link: 0
1127 12:18:29.927348 DOMAIN: 0000 read_resources bus 0 link: 0
1128 12:18:29.934249 PCI: 00:04.0 read_resources bus 1 link: 0
1129 12:18:29.937189 PCI: 00:04.0 read_resources bus 1 link: 0 done
1130 12:18:29.943945 PCI: 00:0d.0 read_resources bus 0 link: 0
1131 12:18:29.946911 USB0 port 0 read_resources bus 0 link: 0
1132 12:18:29.953645 USB0 port 0 read_resources bus 0 link: 0 done
1133 12:18:29.957252 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1134 12:18:29.963525 PCI: 00:14.0 read_resources bus 0 link: 0
1135 12:18:29.967082 USB0 port 0 read_resources bus 0 link: 0
1136 12:18:29.973417 USB0 port 0 read_resources bus 0 link: 0 done
1137 12:18:29.976828 PCI: 00:14.0 read_resources bus 0 link: 0 done
1138 12:18:29.983336 PCI: 00:14.3 read_resources bus 0 link: 0
1139 12:18:29.986951 PCI: 00:14.3 read_resources bus 0 link: 0 done
1140 12:18:29.990003 PCI: 00:15.0 read_resources bus 0 link: 0
1141 12:18:29.997623 PCI: 00:15.0 read_resources bus 0 link: 0 done
1142 12:18:30.000950 PCI: 00:15.1 read_resources bus 0 link: 0
1143 12:18:30.007493 PCI: 00:15.1 read_resources bus 0 link: 0 done
1144 12:18:30.011035 PCI: 00:19.1 read_resources bus 0 link: 0
1145 12:18:30.018050 PCI: 00:19.1 read_resources bus 0 link: 0 done
1146 12:18:30.021101 PCI: 00:1d.0 read_resources bus 1 link: 0
1147 12:18:30.027775 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1148 12:18:30.031202 PCI: 00:1e.2 read_resources bus 2 link: 0
1149 12:18:30.037830 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1150 12:18:30.041355 PCI: 00:1e.3 read_resources bus 3 link: 0
1151 12:18:30.047941 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1152 12:18:30.051294 PCI: 00:1f.0 read_resources bus 0 link: 0
1153 12:18:30.057693 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1154 12:18:30.061245 PCI: 00:1f.2 read_resources bus 0 link: 0
1155 12:18:30.064603 GENERIC: 0.0 read_resources bus 0 link: 0
1156 12:18:30.071409 GENERIC: 0.0 read_resources bus 0 link: 0 done
1157 12:18:30.074893 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1158 12:18:30.081855 DOMAIN: 0000 read_resources bus 0 link: 0 done
1159 12:18:30.085511 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1160 12:18:30.092131 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1161 12:18:30.095101 Root Device read_resources bus 0 link: 0 done
1162 12:18:30.098869 Done reading resources.
1163 12:18:30.105184 Show resources in subtree (Root Device)...After reading.
1164 12:18:30.108488 Root Device child on link 0 DOMAIN: 0000
1165 12:18:30.112245 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 12:18:30.122276 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 12:18:30.131869 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 12:18:30.135542 PCI: 00:00.0
1169 12:18:30.145076 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 12:18:30.151683 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 12:18:30.161506 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 12:18:30.171579 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 12:18:30.181709 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 12:18:30.191705 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 12:18:30.198354 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 12:18:30.208116 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 12:18:30.218537 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 12:18:30.228109 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 12:18:30.237959 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 12:18:30.247991 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 12:18:30.254374 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 12:18:30.264248 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 12:18:30.274424 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 12:18:30.284465 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 12:18:30.294668 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 12:18:30.304676 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 12:18:30.311321 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 12:18:30.320944 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1189 12:18:30.324606 PCI: 00:02.0
1190 12:18:30.334110 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 12:18:30.344142 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1192 12:18:30.354207 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1193 12:18:30.357732 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 12:18:30.367739 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1195 12:18:30.370722 GENERIC: 0.0
1196 12:18:30.371190 PCI: 00:05.0
1197 12:18:30.380972 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 12:18:30.384291 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1199 12:18:30.387365 GENERIC: 0.0
1200 12:18:30.387770 PCI: 00:08.0
1201 12:18:30.400715 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 12:18:30.401207 PCI: 00:0a.0
1203 12:18:30.403826 PCI: 00:0d.0 child on link 0 USB0 port 0
1204 12:18:30.413737 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 12:18:30.420527 USB0 port 0 child on link 0 USB3 port 0
1206 12:18:30.421308 USB3 port 0
1207 12:18:30.423534 USB3 port 1
1208 12:18:30.424021 USB3 port 2
1209 12:18:30.426880 USB3 port 3
1210 12:18:30.430140 PCI: 00:14.0 child on link 0 USB0 port 0
1211 12:18:30.440436 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 12:18:30.446927 USB0 port 0 child on link 0 USB2 port 0
1213 12:18:30.447445 USB2 port 0
1214 12:18:30.450592 USB2 port 1
1215 12:18:30.451056 USB2 port 2
1216 12:18:30.453238 USB2 port 3
1217 12:18:30.453706 USB2 port 4
1218 12:18:30.456978 USB2 port 5
1219 12:18:30.457429 USB2 port 6
1220 12:18:30.459837 USB2 port 7
1221 12:18:30.460335 USB2 port 8
1222 12:18:30.463264 USB2 port 9
1223 12:18:30.463771 USB3 port 0
1224 12:18:30.467066 USB3 port 1
1225 12:18:30.467788 USB3 port 2
1226 12:18:30.470080 USB3 port 3
1227 12:18:30.473367 PCI: 00:14.2
1228 12:18:30.483412 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 12:18:30.493435 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1230 12:18:30.496316 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1231 12:18:30.506485 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1232 12:18:30.506884 GENERIC: 0.0
1233 12:18:30.513291 PCI: 00:15.0 child on link 0 I2C: 00:1a
1234 12:18:30.523465 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 12:18:30.523874 I2C: 00:1a
1236 12:18:30.526266 I2C: 00:31
1237 12:18:30.527007 I2C: 00:32
1238 12:18:30.529868 PCI: 00:15.1 child on link 0 I2C: 00:10
1239 12:18:30.539569 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 12:18:30.542814 I2C: 00:10
1241 12:18:30.543220 PCI: 00:15.2
1242 12:18:30.553106 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 12:18:30.556195 PCI: 00:15.3
1244 12:18:30.566117 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 12:18:30.566450 PCI: 00:16.0
1246 12:18:30.576137 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 12:18:30.579825 PCI: 00:19.0
1248 12:18:30.582786 PCI: 00:19.1 child on link 0 I2C: 00:15
1249 12:18:30.592788 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 12:18:30.595800 I2C: 00:15
1251 12:18:30.599638 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1252 12:18:30.609474 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1253 12:18:30.619322 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1254 12:18:30.625612 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1255 12:18:30.629310 GENERIC: 0.0
1256 12:18:30.629408 PCI: 01:00.0
1257 12:18:30.639127 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1258 12:18:30.649118 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1259 12:18:30.659189 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1260 12:18:30.659799 PCI: 00:1e.0
1261 12:18:30.672939 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1262 12:18:30.675882 PCI: 00:1e.2 child on link 0 SPI: 00
1263 12:18:30.685984 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 12:18:30.686753 SPI: 00
1265 12:18:30.692494 PCI: 00:1e.3 child on link 0 SPI: 00
1266 12:18:30.702335 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1267 12:18:30.702524 SPI: 00
1268 12:18:30.705833 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1269 12:18:30.715659 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1270 12:18:30.715787 PNP: 0c09.0
1271 12:18:30.725137 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1272 12:18:30.728793 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1273 12:18:30.739060 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1274 12:18:30.748781 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1275 12:18:30.752292 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1276 12:18:30.755151 GENERIC: 0.0
1277 12:18:30.758489 GENERIC: 1.0
1278 12:18:30.758741 PCI: 00:1f.3
1279 12:18:30.768819 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1280 12:18:30.778419 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1281 12:18:30.782275 PCI: 00:1f.5
1282 12:18:30.788222 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1283 12:18:30.795285 CPU_CLUSTER: 0 child on link 0 APIC: 00
1284 12:18:30.795396 APIC: 00
1285 12:18:30.795481 APIC: 01
1286 12:18:30.798257 APIC: 03
1287 12:18:30.798364 APIC: 06
1288 12:18:30.801907 APIC: 05
1289 12:18:30.802007 APIC: 04
1290 12:18:30.802083 APIC: 02
1291 12:18:30.804822 APIC: 07
1292 12:18:30.811740 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1293 12:18:30.818529 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1294 12:18:30.824910 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1295 12:18:30.828072 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1296 12:18:30.834936 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1297 12:18:30.838356 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1298 12:18:30.841989 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1299 12:18:30.848491 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1300 12:18:30.858393 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1301 12:18:30.864913 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1302 12:18:30.871571 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1303 12:18:30.878079 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1304 12:18:30.884933 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1305 12:18:30.894973 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1306 12:18:30.901683 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1307 12:18:30.904540 DOMAIN: 0000: Resource ranges:
1308 12:18:30.907969 * Base: 1000, Size: 800, Tag: 100
1309 12:18:30.911521 * Base: 1900, Size: e700, Tag: 100
1310 12:18:30.918237 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1311 12:18:30.924978 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1312 12:18:30.931290 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1313 12:18:30.937921 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1314 12:18:30.944375 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1315 12:18:30.954565 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1316 12:18:30.961032 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1317 12:18:30.967621 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1318 12:18:30.977633 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1319 12:18:30.984671 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1320 12:18:30.991109 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1321 12:18:31.000692 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1322 12:18:31.007478 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1323 12:18:31.014527 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1324 12:18:31.024192 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1325 12:18:31.030791 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1326 12:18:31.037651 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1327 12:18:31.047768 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1328 12:18:31.054407 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1329 12:18:31.060964 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1330 12:18:31.070544 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1331 12:18:31.076959 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1332 12:18:31.083975 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1333 12:18:31.093564 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1334 12:18:31.100990 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1335 12:18:31.103677 DOMAIN: 0000: Resource ranges:
1336 12:18:31.107098 * Base: 7fc00000, Size: 40400000, Tag: 200
1337 12:18:31.110420 * Base: d0000000, Size: 28000000, Tag: 200
1338 12:18:31.116984 * Base: fa000000, Size: 1000000, Tag: 200
1339 12:18:31.120303 * Base: fb001000, Size: 2fff000, Tag: 200
1340 12:18:31.124033 * Base: fe010000, Size: 2e000, Tag: 200
1341 12:18:31.130128 * Base: fe03f000, Size: d41000, Tag: 200
1342 12:18:31.133670 * Base: fed88000, Size: 8000, Tag: 200
1343 12:18:31.137251 * Base: fed93000, Size: d000, Tag: 200
1344 12:18:31.140216 * Base: feda2000, Size: 1e000, Tag: 200
1345 12:18:31.143353 * Base: fede0000, Size: 1220000, Tag: 200
1346 12:18:31.149903 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1347 12:18:31.157174 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1348 12:18:31.163564 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1349 12:18:31.170077 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1350 12:18:31.176470 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1351 12:18:31.183611 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1352 12:18:31.190136 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1353 12:18:31.196237 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1354 12:18:31.202848 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1355 12:18:31.209919 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1356 12:18:31.216335 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1357 12:18:31.223607 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1358 12:18:31.230289 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1359 12:18:31.236886 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1360 12:18:31.243057 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1361 12:18:31.249790 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1362 12:18:31.256548 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1363 12:18:31.263144 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1364 12:18:31.269764 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1365 12:18:31.276175 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1366 12:18:31.282668 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1367 12:18:31.289262 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1368 12:18:31.296225 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1369 12:18:31.302748 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1370 12:18:31.312563 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1371 12:18:31.315794 PCI: 00:1d.0: Resource ranges:
1372 12:18:31.319415 * Base: 7fc00000, Size: 100000, Tag: 200
1373 12:18:31.325939 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1374 12:18:31.332793 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1375 12:18:31.339346 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1376 12:18:31.349228 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1377 12:18:31.355745 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1378 12:18:31.358964 Root Device assign_resources, bus 0 link: 0
1379 12:18:31.362570 DOMAIN: 0000 assign_resources, bus 0 link: 0
1380 12:18:31.372670 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1381 12:18:31.379409 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1382 12:18:31.389122 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1383 12:18:31.395616 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1384 12:18:31.402080 PCI: 00:04.0 assign_resources, bus 1 link: 0
1385 12:18:31.405689 PCI: 00:04.0 assign_resources, bus 1 link: 0
1386 12:18:31.415286 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1387 12:18:31.422221 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1388 12:18:31.432403 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1389 12:18:31.435579 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1390 12:18:31.438714 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1391 12:18:31.448595 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1392 12:18:31.451770 PCI: 00:14.0 assign_resources, bus 0 link: 0
1393 12:18:31.458812 PCI: 00:14.0 assign_resources, bus 0 link: 0
1394 12:18:31.465101 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1395 12:18:31.471931 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1396 12:18:31.482129 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1397 12:18:31.485471 PCI: 00:14.3 assign_resources, bus 0 link: 0
1398 12:18:31.491901 PCI: 00:14.3 assign_resources, bus 0 link: 0
1399 12:18:31.498682 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1400 12:18:31.504843 PCI: 00:15.0 assign_resources, bus 0 link: 0
1401 12:18:31.508365 PCI: 00:15.0 assign_resources, bus 0 link: 0
1402 12:18:31.514958 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1403 12:18:31.522114 PCI: 00:15.1 assign_resources, bus 0 link: 0
1404 12:18:31.524919 PCI: 00:15.1 assign_resources, bus 0 link: 0
1405 12:18:31.534969 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1406 12:18:31.541324 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1407 12:18:31.551359 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1408 12:18:31.557962 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1409 12:18:31.564864 PCI: 00:19.1 assign_resources, bus 0 link: 0
1410 12:18:31.568306 PCI: 00:19.1 assign_resources, bus 0 link: 0
1411 12:18:31.578156 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1412 12:18:31.587781 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1413 12:18:31.594454 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1414 12:18:31.601056 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1415 12:18:31.607615 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1416 12:18:31.614223 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1417 12:18:31.624276 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1418 12:18:31.627367 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1419 12:18:31.637919 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1420 12:18:31.640818 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1421 12:18:31.647506 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1422 12:18:31.654025 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1423 12:18:31.657274 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1424 12:18:31.663709 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1425 12:18:31.667128 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1426 12:18:31.674012 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1427 12:18:31.677395 LPC: Trying to open IO window from 800 size 1ff
1428 12:18:31.687451 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1429 12:18:31.693875 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1430 12:18:31.704029 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1431 12:18:31.707071 DOMAIN: 0000 assign_resources, bus 0 link: 0
1432 12:18:31.710364 Root Device assign_resources, bus 0 link: 0
1433 12:18:31.713845 Done setting resources.
1434 12:18:31.720219 Show resources in subtree (Root Device)...After assigning values.
1435 12:18:31.723822 Root Device child on link 0 DOMAIN: 0000
1436 12:18:31.730302 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1437 12:18:31.740353 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1438 12:18:31.750279 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1439 12:18:31.750774 PCI: 00:00.0
1440 12:18:31.760471 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1441 12:18:31.770250 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1442 12:18:31.780447 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1443 12:18:31.786425 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1444 12:18:31.796506 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1445 12:18:31.806814 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1446 12:18:31.816360 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1447 12:18:31.826508 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1448 12:18:31.836059 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1449 12:18:31.843306 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1450 12:18:31.853365 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1451 12:18:31.862742 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1452 12:18:31.872786 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1453 12:18:31.879580 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1454 12:18:31.889141 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1455 12:18:31.899337 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1456 12:18:31.909684 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1457 12:18:31.919194 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1458 12:18:31.929364 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1459 12:18:31.939592 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1460 12:18:31.939721 PCI: 00:02.0
1461 12:18:31.949109 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1462 12:18:31.962491 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1463 12:18:31.968912 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1464 12:18:31.975923 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1465 12:18:31.985950 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1466 12:18:31.986118 GENERIC: 0.0
1467 12:18:31.989188 PCI: 00:05.0
1468 12:18:31.998925 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1469 12:18:32.005809 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1470 12:18:32.005920 GENERIC: 0.0
1471 12:18:32.008874 PCI: 00:08.0
1472 12:18:32.019119 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1473 12:18:32.019262 PCI: 00:0a.0
1474 12:18:32.025430 PCI: 00:0d.0 child on link 0 USB0 port 0
1475 12:18:32.035457 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1476 12:18:32.039155 USB0 port 0 child on link 0 USB3 port 0
1477 12:18:32.042129 USB3 port 0
1478 12:18:32.042223 USB3 port 1
1479 12:18:32.045678 USB3 port 2
1480 12:18:32.045787 USB3 port 3
1481 12:18:32.048882 PCI: 00:14.0 child on link 0 USB0 port 0
1482 12:18:32.062094 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1483 12:18:32.065569 USB0 port 0 child on link 0 USB2 port 0
1484 12:18:32.065714 USB2 port 0
1485 12:18:32.069176 USB2 port 1
1486 12:18:32.069348 USB2 port 2
1487 12:18:32.072047 USB2 port 3
1488 12:18:32.075401 USB2 port 4
1489 12:18:32.075669 USB2 port 5
1490 12:18:32.079350 USB2 port 6
1491 12:18:32.079595 USB2 port 7
1492 12:18:32.082034 USB2 port 8
1493 12:18:32.082222 USB2 port 9
1494 12:18:32.085441 USB3 port 0
1495 12:18:32.085653 USB3 port 1
1496 12:18:32.089283 USB3 port 2
1497 12:18:32.089466 USB3 port 3
1498 12:18:32.092124 PCI: 00:14.2
1499 12:18:32.102434 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1500 12:18:32.112002 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1501 12:18:32.115215 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1502 12:18:32.125530 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1503 12:18:32.128754 GENERIC: 0.0
1504 12:18:32.132045 PCI: 00:15.0 child on link 0 I2C: 00:1a
1505 12:18:32.142208 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1506 12:18:32.145821 I2C: 00:1a
1507 12:18:32.146050 I2C: 00:31
1508 12:18:32.148690 I2C: 00:32
1509 12:18:32.152267 PCI: 00:15.1 child on link 0 I2C: 00:10
1510 12:18:32.161899 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1511 12:18:32.165294 I2C: 00:10
1512 12:18:32.165609 PCI: 00:15.2
1513 12:18:32.175220 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1514 12:18:32.178955 PCI: 00:15.3
1515 12:18:32.189059 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1516 12:18:32.189742 PCI: 00:16.0
1517 12:18:32.202248 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1518 12:18:32.202655 PCI: 00:19.0
1519 12:18:32.205367 PCI: 00:19.1 child on link 0 I2C: 00:15
1520 12:18:32.215220 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1521 12:18:32.218585 I2C: 00:15
1522 12:18:32.222053 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1523 12:18:32.231851 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1524 12:18:32.245666 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1525 12:18:32.255183 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1526 12:18:32.255763 GENERIC: 0.0
1527 12:18:32.258848 PCI: 01:00.0
1528 12:18:32.268723 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1529 12:18:32.278305 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1530 12:18:32.288234 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1531 12:18:32.291415 PCI: 00:1e.0
1532 12:18:32.301508 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1533 12:18:32.304751 PCI: 00:1e.2 child on link 0 SPI: 00
1534 12:18:32.315371 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1535 12:18:32.318484 SPI: 00
1536 12:18:32.321792 PCI: 00:1e.3 child on link 0 SPI: 00
1537 12:18:32.331498 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1538 12:18:32.334903 SPI: 00
1539 12:18:32.338306 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1540 12:18:32.344843 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1541 12:18:32.347960 PNP: 0c09.0
1542 12:18:32.357947 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1543 12:18:32.361502 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1544 12:18:32.371506 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1545 12:18:32.381420 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1546 12:18:32.384487 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1547 12:18:32.387999 GENERIC: 0.0
1548 12:18:32.388422 GENERIC: 1.0
1549 12:18:32.391516 PCI: 00:1f.3
1550 12:18:32.401646 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1551 12:18:32.411207 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1552 12:18:32.411923 PCI: 00:1f.5
1553 12:18:32.421070 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1554 12:18:32.428048 CPU_CLUSTER: 0 child on link 0 APIC: 00
1555 12:18:32.428507 APIC: 00
1556 12:18:32.431328 APIC: 01
1557 12:18:32.431757 APIC: 03
1558 12:18:32.432096 APIC: 06
1559 12:18:32.434537 APIC: 05
1560 12:18:32.435255 APIC: 04
1561 12:18:32.435916 APIC: 02
1562 12:18:32.438067 APIC: 07
1563 12:18:32.441267 Done allocating resources.
1564 12:18:32.444437 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1565 12:18:32.451622 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1566 12:18:32.454967 Configure GPIOs for I2S audio on UP4.
1567 12:18:32.462491 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1568 12:18:32.465899 Enabling resources...
1569 12:18:32.468852 PCI: 00:00.0 subsystem <- 8086/9a12
1570 12:18:32.472316 PCI: 00:00.0 cmd <- 06
1571 12:18:32.476013 PCI: 00:02.0 subsystem <- 8086/9a40
1572 12:18:32.478752 PCI: 00:02.0 cmd <- 03
1573 12:18:32.482156 PCI: 00:04.0 subsystem <- 8086/9a03
1574 12:18:32.482584 PCI: 00:04.0 cmd <- 02
1575 12:18:32.489466 PCI: 00:05.0 subsystem <- 8086/9a19
1576 12:18:32.490220 PCI: 00:05.0 cmd <- 02
1577 12:18:32.492369 PCI: 00:08.0 subsystem <- 8086/9a11
1578 12:18:32.495902 PCI: 00:08.0 cmd <- 06
1579 12:18:32.499366 PCI: 00:0d.0 subsystem <- 8086/9a13
1580 12:18:32.502789 PCI: 00:0d.0 cmd <- 02
1581 12:18:32.505971 PCI: 00:14.0 subsystem <- 8086/a0ed
1582 12:18:32.509401 PCI: 00:14.0 cmd <- 02
1583 12:18:32.512854 PCI: 00:14.2 subsystem <- 8086/a0ef
1584 12:18:32.515606 PCI: 00:14.2 cmd <- 02
1585 12:18:32.518960 PCI: 00:14.3 subsystem <- 8086/a0f0
1586 12:18:32.522568 PCI: 00:14.3 cmd <- 02
1587 12:18:32.525866 PCI: 00:15.0 subsystem <- 8086/a0e8
1588 12:18:32.528890 PCI: 00:15.0 cmd <- 02
1589 12:18:32.531872 PCI: 00:15.1 subsystem <- 8086/a0e9
1590 12:18:32.532178 PCI: 00:15.1 cmd <- 02
1591 12:18:32.539007 PCI: 00:15.2 subsystem <- 8086/a0ea
1592 12:18:32.539311 PCI: 00:15.2 cmd <- 02
1593 12:18:32.542307 PCI: 00:15.3 subsystem <- 8086/a0eb
1594 12:18:32.545315 PCI: 00:15.3 cmd <- 02
1595 12:18:32.548933 PCI: 00:16.0 subsystem <- 8086/a0e0
1596 12:18:32.552145 PCI: 00:16.0 cmd <- 02
1597 12:18:32.555420 PCI: 00:19.1 subsystem <- 8086/a0c6
1598 12:18:32.558337 PCI: 00:19.1 cmd <- 02
1599 12:18:32.562280 PCI: 00:1d.0 bridge ctrl <- 0013
1600 12:18:32.565589 PCI: 00:1d.0 subsystem <- 8086/a0b0
1601 12:18:32.568479 PCI: 00:1d.0 cmd <- 06
1602 12:18:32.572043 PCI: 00:1e.0 subsystem <- 8086/a0a8
1603 12:18:32.575127 PCI: 00:1e.0 cmd <- 06
1604 12:18:32.578723 PCI: 00:1e.2 subsystem <- 8086/a0aa
1605 12:18:32.582087 PCI: 00:1e.2 cmd <- 06
1606 12:18:32.584905 PCI: 00:1e.3 subsystem <- 8086/a0ab
1607 12:18:32.585209 PCI: 00:1e.3 cmd <- 02
1608 12:18:32.592015 PCI: 00:1f.0 subsystem <- 8086/a087
1609 12:18:32.592321 PCI: 00:1f.0 cmd <- 407
1610 12:18:32.594909 PCI: 00:1f.3 subsystem <- 8086/a0c8
1611 12:18:32.598618 PCI: 00:1f.3 cmd <- 02
1612 12:18:32.601945 PCI: 00:1f.5 subsystem <- 8086/a0a4
1613 12:18:32.604843 PCI: 00:1f.5 cmd <- 406
1614 12:18:32.609313 PCI: 01:00.0 cmd <- 02
1615 12:18:32.614126 done.
1616 12:18:32.617190 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1617 12:18:32.620460 Initializing devices...
1618 12:18:32.623831 Root Device init
1619 12:18:32.627350 Chrome EC: Set SMI mask to 0x0000000000000000
1620 12:18:32.635063 Chrome EC: clear events_b mask to 0x0000000000000000
1621 12:18:32.641090 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1622 12:18:32.647842 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1623 12:18:32.654300 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1624 12:18:32.661118 Chrome EC: Set WAKE mask to 0x0000000000000000
1625 12:18:32.664347 fw_config match found: DB_USB=USB3_ACTIVE
1626 12:18:32.670761 Configure Right Type-C port orientation for retimer
1627 12:18:32.674447 Root Device init finished in 47 msecs
1628 12:18:32.677857 PCI: 00:00.0 init
1629 12:18:32.680733 CPU TDP = 9 Watts
1630 12:18:32.680892 CPU PL1 = 9 Watts
1631 12:18:32.684567 CPU PL2 = 40 Watts
1632 12:18:32.684740 CPU PL4 = 83 Watts
1633 12:18:32.690743 PCI: 00:00.0 init finished in 8 msecs
1634 12:18:32.690903 PCI: 00:02.0 init
1635 12:18:32.694359 GMA: Found VBT in CBFS
1636 12:18:32.697966 GMA: Found valid VBT in CBFS
1637 12:18:32.704459 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1638 12:18:32.711008 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1639 12:18:32.714332 PCI: 00:02.0 init finished in 18 msecs
1640 12:18:32.717768 PCI: 00:05.0 init
1641 12:18:32.721177 PCI: 00:05.0 init finished in 0 msecs
1642 12:18:32.724484 PCI: 00:08.0 init
1643 12:18:32.727280 PCI: 00:08.0 init finished in 0 msecs
1644 12:18:32.730648 PCI: 00:14.0 init
1645 12:18:32.734177 PCI: 00:14.0 init finished in 0 msecs
1646 12:18:32.734469 PCI: 00:14.2 init
1647 12:18:32.740528 PCI: 00:14.2 init finished in 0 msecs
1648 12:18:32.740803 PCI: 00:15.0 init
1649 12:18:32.743719 I2C bus 0 version 0x3230302a
1650 12:18:32.747233 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1651 12:18:32.750265 PCI: 00:15.0 init finished in 6 msecs
1652 12:18:32.754012 PCI: 00:15.1 init
1653 12:18:32.757762 I2C bus 1 version 0x3230302a
1654 12:18:32.760544 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1655 12:18:32.764019 PCI: 00:15.1 init finished in 6 msecs
1656 12:18:32.767413 PCI: 00:15.2 init
1657 12:18:32.770750 I2C bus 2 version 0x3230302a
1658 12:18:32.774102 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1659 12:18:32.777059 PCI: 00:15.2 init finished in 6 msecs
1660 12:18:32.780527 PCI: 00:15.3 init
1661 12:18:32.784092 I2C bus 3 version 0x3230302a
1662 12:18:32.787038 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1663 12:18:32.790427 PCI: 00:15.3 init finished in 6 msecs
1664 12:18:32.790516 PCI: 00:16.0 init
1665 12:18:32.797437 PCI: 00:16.0 init finished in 0 msecs
1666 12:18:32.797529 PCI: 00:19.1 init
1667 12:18:32.800358 I2C bus 5 version 0x3230302a
1668 12:18:32.803982 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1669 12:18:32.810449 PCI: 00:19.1 init finished in 6 msecs
1670 12:18:32.810566 PCI: 00:1d.0 init
1671 12:18:32.814011 Initializing PCH PCIe bridge.
1672 12:18:32.817359 PCI: 00:1d.0 init finished in 3 msecs
1673 12:18:32.821305 PCI: 00:1f.0 init
1674 12:18:32.824581 IOAPIC: Initializing IOAPIC at 0xfec00000
1675 12:18:32.831065 IOAPIC: Bootstrap Processor Local APIC = 0x00
1676 12:18:32.831647 IOAPIC: ID = 0x02
1677 12:18:32.834265 IOAPIC: Dumping registers
1678 12:18:32.838014 reg 0x0000: 0x02000000
1679 12:18:32.840856 reg 0x0001: 0x00770020
1680 12:18:32.841310 reg 0x0002: 0x00000000
1681 12:18:32.847796 PCI: 00:1f.0 init finished in 21 msecs
1682 12:18:32.848247 PCI: 00:1f.2 init
1683 12:18:32.851334 Disabling ACPI via APMC.
1684 12:18:32.854691 APMC done.
1685 12:18:32.858287 PCI: 00:1f.2 init finished in 5 msecs
1686 12:18:32.869682 PCI: 01:00.0 init
1687 12:18:32.873103 PCI: 01:00.0 init finished in 0 msecs
1688 12:18:32.876331 PNP: 0c09.0 init
1689 12:18:32.879584 Google Chrome EC uptime: 8.373 seconds
1690 12:18:32.886200 Google Chrome AP resets since EC boot: 1
1691 12:18:32.889565 Google Chrome most recent AP reset causes:
1692 12:18:32.892996 0.348: 32775 shutdown: entering G3
1693 12:18:32.899366 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1694 12:18:32.902566 PNP: 0c09.0 init finished in 22 msecs
1695 12:18:32.908471 Devices initialized
1696 12:18:32.911432 Show all devs... After init.
1697 12:18:32.915056 Root Device: enabled 1
1698 12:18:32.915501 DOMAIN: 0000: enabled 1
1699 12:18:32.918011 CPU_CLUSTER: 0: enabled 1
1700 12:18:32.921475 PCI: 00:00.0: enabled 1
1701 12:18:32.924862 PCI: 00:02.0: enabled 1
1702 12:18:32.925307 PCI: 00:04.0: enabled 1
1703 12:18:32.928237 PCI: 00:05.0: enabled 1
1704 12:18:32.931928 PCI: 00:06.0: enabled 0
1705 12:18:32.935269 PCI: 00:07.0: enabled 0
1706 12:18:32.935715 PCI: 00:07.1: enabled 0
1707 12:18:32.938533 PCI: 00:07.2: enabled 0
1708 12:18:32.941356 PCI: 00:07.3: enabled 0
1709 12:18:32.944931 PCI: 00:08.0: enabled 1
1710 12:18:32.945390 PCI: 00:09.0: enabled 0
1711 12:18:32.948369 PCI: 00:0a.0: enabled 0
1712 12:18:32.951462 PCI: 00:0d.0: enabled 1
1713 12:18:32.954994 PCI: 00:0d.1: enabled 0
1714 12:18:32.955463 PCI: 00:0d.2: enabled 0
1715 12:18:32.957914 PCI: 00:0d.3: enabled 0
1716 12:18:32.961145 PCI: 00:0e.0: enabled 0
1717 12:18:32.965011 PCI: 00:10.2: enabled 1
1718 12:18:32.965455 PCI: 00:10.6: enabled 0
1719 12:18:32.967670 PCI: 00:10.7: enabled 0
1720 12:18:32.970891 PCI: 00:12.0: enabled 0
1721 12:18:32.971281 PCI: 00:12.6: enabled 0
1722 12:18:32.974567 PCI: 00:13.0: enabled 0
1723 12:18:32.978051 PCI: 00:14.0: enabled 1
1724 12:18:32.981327 PCI: 00:14.1: enabled 0
1725 12:18:32.981639 PCI: 00:14.2: enabled 1
1726 12:18:32.984176 PCI: 00:14.3: enabled 1
1727 12:18:32.987698 PCI: 00:15.0: enabled 1
1728 12:18:32.991002 PCI: 00:15.1: enabled 1
1729 12:18:32.991312 PCI: 00:15.2: enabled 1
1730 12:18:32.994698 PCI: 00:15.3: enabled 1
1731 12:18:32.997440 PCI: 00:16.0: enabled 1
1732 12:18:33.001023 PCI: 00:16.1: enabled 0
1733 12:18:33.001447 PCI: 00:16.2: enabled 0
1734 12:18:33.004094 PCI: 00:16.3: enabled 0
1735 12:18:33.007538 PCI: 00:16.4: enabled 0
1736 12:18:33.008011 PCI: 00:16.5: enabled 0
1737 12:18:33.011172 PCI: 00:17.0: enabled 0
1738 12:18:33.014047 PCI: 00:19.0: enabled 0
1739 12:18:33.017666 PCI: 00:19.1: enabled 1
1740 12:18:33.018118 PCI: 00:19.2: enabled 0
1741 12:18:33.021423 PCI: 00:1c.0: enabled 1
1742 12:18:33.024335 PCI: 00:1c.1: enabled 0
1743 12:18:33.027745 PCI: 00:1c.2: enabled 0
1744 12:18:33.028055 PCI: 00:1c.3: enabled 0
1745 12:18:33.030617 PCI: 00:1c.4: enabled 0
1746 12:18:33.034472 PCI: 00:1c.5: enabled 0
1747 12:18:33.037189 PCI: 00:1c.6: enabled 1
1748 12:18:33.037752 PCI: 00:1c.7: enabled 0
1749 12:18:33.040952 PCI: 00:1d.0: enabled 1
1750 12:18:33.044179 PCI: 00:1d.1: enabled 0
1751 12:18:33.047795 PCI: 00:1d.2: enabled 1
1752 12:18:33.048106 PCI: 00:1d.3: enabled 0
1753 12:18:33.050596 PCI: 00:1e.0: enabled 1
1754 12:18:33.054193 PCI: 00:1e.1: enabled 0
1755 12:18:33.054495 PCI: 00:1e.2: enabled 1
1756 12:18:33.057282 PCI: 00:1e.3: enabled 1
1757 12:18:33.060791 PCI: 00:1f.0: enabled 1
1758 12:18:33.064286 PCI: 00:1f.1: enabled 0
1759 12:18:33.064593 PCI: 00:1f.2: enabled 1
1760 12:18:33.067587 PCI: 00:1f.3: enabled 1
1761 12:18:33.070890 PCI: 00:1f.4: enabled 0
1762 12:18:33.073712 PCI: 00:1f.5: enabled 1
1763 12:18:33.074240 PCI: 00:1f.6: enabled 0
1764 12:18:33.077250 PCI: 00:1f.7: enabled 0
1765 12:18:33.080402 APIC: 00: enabled 1
1766 12:18:33.080867 GENERIC: 0.0: enabled 1
1767 12:18:33.083769 GENERIC: 0.0: enabled 1
1768 12:18:33.087168 GENERIC: 1.0: enabled 1
1769 12:18:33.090332 GENERIC: 0.0: enabled 1
1770 12:18:33.090747 GENERIC: 1.0: enabled 1
1771 12:18:33.093910 USB0 port 0: enabled 1
1772 12:18:33.096972 GENERIC: 0.0: enabled 1
1773 12:18:33.100486 USB0 port 0: enabled 1
1774 12:18:33.100731 GENERIC: 0.0: enabled 1
1775 12:18:33.103561 I2C: 00:1a: enabled 1
1776 12:18:33.106912 I2C: 00:31: enabled 1
1777 12:18:33.107077 I2C: 00:32: enabled 1
1778 12:18:33.110364 I2C: 00:10: enabled 1
1779 12:18:33.113955 I2C: 00:15: enabled 1
1780 12:18:33.114089 GENERIC: 0.0: enabled 0
1781 12:18:33.116978 GENERIC: 1.0: enabled 0
1782 12:18:33.120279 GENERIC: 0.0: enabled 1
1783 12:18:33.120457 SPI: 00: enabled 1
1784 12:18:33.123358 SPI: 00: enabled 1
1785 12:18:33.126789 PNP: 0c09.0: enabled 1
1786 12:18:33.126923 GENERIC: 0.0: enabled 1
1787 12:18:33.130367 USB3 port 0: enabled 1
1788 12:18:33.133741 USB3 port 1: enabled 1
1789 12:18:33.137170 USB3 port 2: enabled 0
1790 12:18:33.137321 USB3 port 3: enabled 0
1791 12:18:33.140095 USB2 port 0: enabled 0
1792 12:18:33.143281 USB2 port 1: enabled 1
1793 12:18:33.143417 USB2 port 2: enabled 1
1794 12:18:33.146628 USB2 port 3: enabled 0
1795 12:18:33.150392 USB2 port 4: enabled 1
1796 12:18:33.153653 USB2 port 5: enabled 0
1797 12:18:33.153894 USB2 port 6: enabled 0
1798 12:18:33.157288 USB2 port 7: enabled 0
1799 12:18:33.160024 USB2 port 8: enabled 0
1800 12:18:33.160119 USB2 port 9: enabled 0
1801 12:18:33.163504 USB3 port 0: enabled 0
1802 12:18:33.166642 USB3 port 1: enabled 1
1803 12:18:33.166746 USB3 port 2: enabled 0
1804 12:18:33.170140 USB3 port 3: enabled 0
1805 12:18:33.173503 GENERIC: 0.0: enabled 1
1806 12:18:33.176963 GENERIC: 1.0: enabled 1
1807 12:18:33.177116 APIC: 01: enabled 1
1808 12:18:33.179913 APIC: 03: enabled 1
1809 12:18:33.179996 APIC: 06: enabled 1
1810 12:18:33.183424 APIC: 05: enabled 1
1811 12:18:33.186691 APIC: 04: enabled 1
1812 12:18:33.186805 APIC: 02: enabled 1
1813 12:18:33.189799 APIC: 07: enabled 1
1814 12:18:33.193718 PCI: 01:00.0: enabled 1
1815 12:18:33.196395 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1816 12:18:33.203279 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1817 12:18:33.206495 ELOG: NV offset 0xf30000 size 0x1000
1818 12:18:33.213173 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1819 12:18:33.219702 ELOG: Event(17) added with size 13 at 2023-12-08 12:18:33 UTC
1820 12:18:33.226851 ELOG: Event(92) added with size 9 at 2023-12-08 12:18:33 UTC
1821 12:18:33.233197 ELOG: Event(93) added with size 9 at 2023-12-08 12:18:33 UTC
1822 12:18:33.240228 ELOG: Event(9E) added with size 10 at 2023-12-08 12:18:33 UTC
1823 12:18:33.246541 ELOG: Event(9F) added with size 14 at 2023-12-08 12:18:33 UTC
1824 12:18:33.253203 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1825 12:18:33.259910 ELOG: Event(A1) added with size 10 at 2023-12-08 12:18:33 UTC
1826 12:18:33.262905 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1827 12:18:33.269677 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1828 12:18:33.272799 Finalize devices...
1829 12:18:33.272992 Devices finalized
1830 12:18:33.279948 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1831 12:18:33.286051 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1832 12:18:33.289682 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1833 12:18:33.296443 ME: HFSTS1 : 0x80030055
1834 12:18:33.299420 ME: HFSTS2 : 0x30280116
1835 12:18:33.302752 ME: HFSTS3 : 0x00000050
1836 12:18:33.309250 ME: HFSTS4 : 0x00004000
1837 12:18:33.312588 ME: HFSTS5 : 0x00000000
1838 12:18:33.315918 ME: HFSTS6 : 0x00400006
1839 12:18:33.322720 ME: Manufacturing Mode : YES
1840 12:18:33.326303 ME: SPI Protection Mode Enabled : NO
1841 12:18:33.329063 ME: FW Partition Table : OK
1842 12:18:33.332486 ME: Bringup Loader Failure : NO
1843 12:18:33.335588 ME: Firmware Init Complete : NO
1844 12:18:33.339088 ME: Boot Options Present : NO
1845 12:18:33.342646 ME: Update In Progress : NO
1846 12:18:33.345606 ME: D0i3 Support : YES
1847 12:18:33.352570 ME: Low Power State Enabled : NO
1848 12:18:33.355875 ME: CPU Replaced : YES
1849 12:18:33.359318 ME: CPU Replacement Valid : YES
1850 12:18:33.362159 ME: Current Working State : 5
1851 12:18:33.365514 ME: Current Operation State : 1
1852 12:18:33.368858 ME: Current Operation Mode : 3
1853 12:18:33.372371 ME: Error Code : 0
1854 12:18:33.375456 ME: Enhanced Debug Mode : NO
1855 12:18:33.379001 ME: CPU Debug Disabled : YES
1856 12:18:33.385304 ME: TXT Support : NO
1857 12:18:33.392211 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1858 12:18:33.398513 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1859 12:18:33.402097 CBFS: 'fallback/slic' not found.
1860 12:18:33.405582 ACPI: Writing ACPI tables at 76b01000.
1861 12:18:33.408440 ACPI: * FACS
1862 12:18:33.408730 ACPI: * DSDT
1863 12:18:33.411994 Ramoops buffer: 0x100000@0x76a00000.
1864 12:18:33.418434 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1865 12:18:33.422012 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1866 12:18:33.425442 Google Chrome EC: version:
1867 12:18:33.428580 ro: voema_v2.0.7540-147f8d37d1
1868 12:18:33.431782 rw: voema_v2.0.7540-147f8d37d1
1869 12:18:33.435012 running image: 2
1870 12:18:33.438870 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1871 12:18:33.444202 ACPI: * FADT
1872 12:18:33.444528 SCI is IRQ9
1873 12:18:33.451051 ACPI: added table 1/32, length now 40
1874 12:18:33.451510 ACPI: * SSDT
1875 12:18:33.454144 Found 1 CPU(s) with 8 core(s) each.
1876 12:18:33.460795 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1877 12:18:33.464304 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1878 12:18:33.467769 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1879 12:18:33.470703 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1880 12:18:33.477681 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1881 12:18:33.484180 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1882 12:18:33.487780 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1883 12:18:33.493833 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1884 12:18:33.500730 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1885 12:18:33.504137 \_SB.PCI0.RP09: Added StorageD3Enable property
1886 12:18:33.507390 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1887 12:18:33.513765 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1888 12:18:33.520598 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1889 12:18:33.523653 PS2K: Passing 80 keymaps to kernel
1890 12:18:33.530508 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1891 12:18:33.537320 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1892 12:18:33.543895 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1893 12:18:33.549976 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1894 12:18:33.556917 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1895 12:18:33.563510 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1896 12:18:33.570354 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1897 12:18:33.573667 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1898 12:18:33.580204 ACPI: added table 2/32, length now 44
1899 12:18:33.580712 ACPI: * MCFG
1900 12:18:33.583774 ACPI: added table 3/32, length now 48
1901 12:18:33.587168 ACPI: * TPM2
1902 12:18:33.589970 TPM2 log created at 0x769f0000
1903 12:18:33.593458 ACPI: added table 4/32, length now 52
1904 12:18:33.593686 ACPI: * MADT
1905 12:18:33.596318 SCI is IRQ9
1906 12:18:33.599958 ACPI: added table 5/32, length now 56
1907 12:18:33.600210 current = 76b09850
1908 12:18:33.603341 ACPI: * DMAR
1909 12:18:33.606427 ACPI: added table 6/32, length now 60
1910 12:18:33.609906 ACPI: added table 7/32, length now 64
1911 12:18:33.613274 ACPI: * HPET
1912 12:18:33.616476 ACPI: added table 8/32, length now 68
1913 12:18:33.616754 ACPI: done.
1914 12:18:33.619638 ACPI tables: 35216 bytes.
1915 12:18:33.623508 smbios_write_tables: 769ef000
1916 12:18:33.626632 EC returned error result code 3
1917 12:18:33.629562 Couldn't obtain OEM name from CBI
1918 12:18:33.633374 Create SMBIOS type 16
1919 12:18:33.636739 Create SMBIOS type 17
1920 12:18:33.640206 GENERIC: 0.0 (WIFI Device)
1921 12:18:33.640586 SMBIOS tables: 1750 bytes.
1922 12:18:33.647180 Writing table forward entry at 0x00000500
1923 12:18:33.653689 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1924 12:18:33.656577 Writing coreboot table at 0x76b25000
1925 12:18:33.663488 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1926 12:18:33.666917 1. 0000000000001000-000000000009ffff: RAM
1927 12:18:33.670406 2. 00000000000a0000-00000000000fffff: RESERVED
1928 12:18:33.676713 3. 0000000000100000-00000000769eefff: RAM
1929 12:18:33.680420 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1930 12:18:33.686710 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1931 12:18:33.693225 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1932 12:18:33.696668 7. 0000000077000000-000000007fbfffff: RESERVED
1933 12:18:33.700079 8. 00000000c0000000-00000000cfffffff: RESERVED
1934 12:18:33.706461 9. 00000000f8000000-00000000f9ffffff: RESERVED
1935 12:18:33.709753 10. 00000000fb000000-00000000fb000fff: RESERVED
1936 12:18:33.716550 11. 00000000fe000000-00000000fe00ffff: RESERVED
1937 12:18:33.719744 12. 00000000fed80000-00000000fed87fff: RESERVED
1938 12:18:33.726720 13. 00000000fed90000-00000000fed92fff: RESERVED
1939 12:18:33.730041 14. 00000000feda0000-00000000feda1fff: RESERVED
1940 12:18:33.736497 15. 00000000fedc0000-00000000feddffff: RESERVED
1941 12:18:33.740219 16. 0000000100000000-00000002803fffff: RAM
1942 12:18:33.743505 Passing 4 GPIOs to payload:
1943 12:18:33.746854 NAME | PORT | POLARITY | VALUE
1944 12:18:33.753246 lid | undefined | high | high
1945 12:18:33.756719 power | undefined | high | low
1946 12:18:33.763150 oprom | undefined | high | low
1947 12:18:33.769804 EC in RW | 0x000000e5 | high | high
1948 12:18:33.776130 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 52a0
1949 12:18:33.776673 coreboot table: 1576 bytes.
1950 12:18:33.783222 IMD ROOT 0. 0x76fff000 0x00001000
1951 12:18:33.786682 IMD SMALL 1. 0x76ffe000 0x00001000
1952 12:18:33.789525 FSP MEMORY 2. 0x76c4e000 0x003b0000
1953 12:18:33.793074 VPD 3. 0x76c4d000 0x00000367
1954 12:18:33.796425 RO MCACHE 4. 0x76c4c000 0x00000fdc
1955 12:18:33.799486 CONSOLE 5. 0x76c2c000 0x00020000
1956 12:18:33.802725 FMAP 6. 0x76c2b000 0x00000578
1957 12:18:33.806431 TIME STAMP 7. 0x76c2a000 0x00000910
1958 12:18:33.809424 VBOOT WORK 8. 0x76c16000 0x00014000
1959 12:18:33.816348 ROMSTG STCK 9. 0x76c15000 0x00001000
1960 12:18:33.819810 AFTER CAR 10. 0x76c0a000 0x0000b000
1961 12:18:33.823096 RAMSTAGE 11. 0x76b97000 0x00073000
1962 12:18:33.826241 REFCODE 12. 0x76b42000 0x00055000
1963 12:18:33.829730 SMM BACKUP 13. 0x76b32000 0x00010000
1964 12:18:33.833001 4f444749 14. 0x76b30000 0x00002000
1965 12:18:33.836375 EXT VBT15. 0x76b2d000 0x0000219f
1966 12:18:33.839396 COREBOOT 16. 0x76b25000 0x00008000
1967 12:18:33.842869 ACPI 17. 0x76b01000 0x00024000
1968 12:18:33.849206 ACPI GNVS 18. 0x76b00000 0x00001000
1969 12:18:33.852656 RAMOOPS 19. 0x76a00000 0x00100000
1970 12:18:33.856157 TPM2 TCGLOG20. 0x769f0000 0x00010000
1971 12:18:33.859626 SMBIOS 21. 0x769ef000 0x00000800
1972 12:18:33.859749 IMD small region:
1973 12:18:33.866446 IMD ROOT 0. 0x76ffec00 0x00000400
1974 12:18:33.869495 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1975 12:18:33.873015 POWER STATE 2. 0x76ffeb80 0x00000044
1976 12:18:33.876352 ROMSTAGE 3. 0x76ffeb60 0x00000004
1977 12:18:33.879263 MEM INFO 4. 0x76ffe980 0x000001e0
1978 12:18:33.886183 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1979 12:18:33.889368 MTRR: Physical address space:
1980 12:18:33.896263 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1981 12:18:33.902643 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1982 12:18:33.909260 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1983 12:18:33.916008 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1984 12:18:33.919374 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1985 12:18:33.925910 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1986 12:18:33.932484 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1987 12:18:33.935972 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 12:18:33.942630 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 12:18:33.946155 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 12:18:33.949522 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 12:18:33.952324 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 12:18:33.959394 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 12:18:33.962325 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 12:18:33.965784 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 12:18:33.969351 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 12:18:33.975766 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 12:18:33.979315 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 12:18:33.982038 call enable_fixed_mtrr()
1999 12:18:33.985425 CPU physical address size: 39 bits
2000 12:18:33.988986 MTRR: default type WB/UC MTRR counts: 6/6.
2001 12:18:33.992055 MTRR: UC selected as default type.
2002 12:18:33.999118 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2003 12:18:34.005466 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2004 12:18:34.012185 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2005 12:18:34.018514 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2006 12:18:34.025292 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2007 12:18:34.032105 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2008 12:18:34.032216
2009 12:18:34.035298 MTRR check
2010 12:18:34.035399 Fixed MTRRs : Enabled
2011 12:18:34.038677 Variable MTRRs: Enabled
2012 12:18:34.038780
2013 12:18:34.042137 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 12:18:34.048782 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 12:18:34.051713 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 12:18:34.055376 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 12:18:34.058774 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 12:18:34.062393 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 12:18:34.068650 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 12:18:34.072165 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 12:18:34.075879 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 12:18:34.078788 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 12:18:34.085322 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 12:18:34.092388 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2025 12:18:34.092841 call enable_fixed_mtrr()
2026 12:18:34.099317 Checking cr50 for pending updates
2027 12:18:34.099707 CPU physical address size: 39 bits
2028 12:18:34.106085 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 12:18:34.108905 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 12:18:34.112392 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 12:18:34.115466 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 12:18:34.122059 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 12:18:34.125488 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 12:18:34.128862 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 12:18:34.132122 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 12:18:34.138739 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 12:18:34.142327 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 12:18:34.145564 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 12:18:34.148923 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 12:18:34.156005 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 12:18:34.156518 call enable_fixed_mtrr()
2042 12:18:34.162539 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 12:18:34.166143 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 12:18:34.168981 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 12:18:34.172455 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 12:18:34.179374 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 12:18:34.182360 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 12:18:34.185728 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 12:18:34.189478 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 12:18:34.195255 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 12:18:34.198795 CPU physical address size: 39 bits
2052 12:18:34.202171 call enable_fixed_mtrr()
2053 12:18:34.205654 MTRR: Fixed MSR 0x250 0x0606060606060606
2054 12:18:34.208882 MTRR: Fixed MSR 0x250 0x0606060606060606
2055 12:18:34.215195 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 12:18:34.218830 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 12:18:34.221833 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 12:18:34.225421 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 12:18:34.232164 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 12:18:34.235538 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 12:18:34.238495 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 12:18:34.242017 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 12:18:34.248633 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 12:18:34.251804 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 12:18:34.255482 MTRR: Fixed MSR 0x258 0x0606060606060606
2066 12:18:34.261769 MTRR: Fixed MSR 0x259 0x0000000000000000
2067 12:18:34.265125 MTRR: Fixed MSR 0x268 0x0606060606060606
2068 12:18:34.268904 MTRR: Fixed MSR 0x269 0x0606060606060606
2069 12:18:34.271853 MTRR: Fixed MSR 0x26a 0x0606060606060606
2070 12:18:34.278870 MTRR: Fixed MSR 0x26b 0x0606060606060606
2071 12:18:34.282443 MTRR: Fixed MSR 0x26c 0x0606060606060606
2072 12:18:34.285237 MTRR: Fixed MSR 0x26d 0x0606060606060606
2073 12:18:34.288858 MTRR: Fixed MSR 0x26e 0x0606060606060606
2074 12:18:34.295358 MTRR: Fixed MSR 0x26f 0x0606060606060606
2075 12:18:34.298450 call enable_fixed_mtrr()
2076 12:18:34.298888 call enable_fixed_mtrr()
2077 12:18:34.302182 Reading cr50 TPM mode
2078 12:18:34.305723 MTRR: Fixed MSR 0x250 0x0606060606060606
2079 12:18:34.309296 MTRR: Fixed MSR 0x250 0x0606060606060606
2080 12:18:34.315669 MTRR: Fixed MSR 0x258 0x0606060606060606
2081 12:18:34.319136 MTRR: Fixed MSR 0x259 0x0000000000000000
2082 12:18:34.322686 MTRR: Fixed MSR 0x268 0x0606060606060606
2083 12:18:34.325618 MTRR: Fixed MSR 0x269 0x0606060606060606
2084 12:18:34.329264 MTRR: Fixed MSR 0x26a 0x0606060606060606
2085 12:18:34.335710 MTRR: Fixed MSR 0x26b 0x0606060606060606
2086 12:18:34.339158 MTRR: Fixed MSR 0x26c 0x0606060606060606
2087 12:18:34.342486 MTRR: Fixed MSR 0x26d 0x0606060606060606
2088 12:18:34.345948 MTRR: Fixed MSR 0x26e 0x0606060606060606
2089 12:18:34.352484 MTRR: Fixed MSR 0x26f 0x0606060606060606
2090 12:18:34.355793 MTRR: Fixed MSR 0x258 0x0606060606060606
2091 12:18:34.358859 MTRR: Fixed MSR 0x259 0x0000000000000000
2092 12:18:34.365530 MTRR: Fixed MSR 0x268 0x0606060606060606
2093 12:18:34.368727 MTRR: Fixed MSR 0x269 0x0606060606060606
2094 12:18:34.371838 MTRR: Fixed MSR 0x26a 0x0606060606060606
2095 12:18:34.375709 MTRR: Fixed MSR 0x26b 0x0606060606060606
2096 12:18:34.382286 MTRR: Fixed MSR 0x26c 0x0606060606060606
2097 12:18:34.385731 MTRR: Fixed MSR 0x26d 0x0606060606060606
2098 12:18:34.388548 MTRR: Fixed MSR 0x26e 0x0606060606060606
2099 12:18:34.392155 MTRR: Fixed MSR 0x26f 0x0606060606060606
2100 12:18:34.396397 call enable_fixed_mtrr()
2101 12:18:34.399356 call enable_fixed_mtrr()
2102 12:18:34.402842 CPU physical address size: 39 bits
2103 12:18:34.406136 CPU physical address size: 39 bits
2104 12:18:34.409703 CPU physical address size: 39 bits
2105 12:18:34.416210 CPU physical address size: 39 bits
2106 12:18:34.419440 CPU physical address size: 39 bits
2107 12:18:34.426227 BS: BS_PAYLOAD_LOAD entry times (exec / console): 210 / 6 ms
2108 12:18:34.432670 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2109 12:18:34.435695 Checking segment from ROM address 0xffc02b38
2110 12:18:34.442411 Checking segment from ROM address 0xffc02b54
2111 12:18:34.445765 Loading segment from ROM address 0xffc02b38
2112 12:18:34.449268 code (compression=0)
2113 12:18:34.455685 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2114 12:18:34.465596 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2115 12:18:34.468924 it's not compressed!
2116 12:18:34.606614 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2117 12:18:34.612966 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2118 12:18:34.619412 Loading segment from ROM address 0xffc02b54
2119 12:18:34.622949 Entry Point 0x30000000
2120 12:18:34.623212 Loaded segments
2121 12:18:34.629406 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2122 12:18:34.672735 Finalizing chipset.
2123 12:18:34.675839 Finalizing SMM.
2124 12:18:34.675985 APMC done.
2125 12:18:34.682868 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2126 12:18:34.686232 mp_park_aps done after 0 msecs.
2127 12:18:34.689294 Jumping to boot code at 0x30000000(0x76b25000)
2128 12:18:34.699186 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2129 12:18:34.699422
2130 12:18:34.699606
2131 12:18:34.699776
2132 12:18:34.702448 Starting depthcharge on Voema...
2133 12:18:34.702678
2134 12:18:34.703314 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2135 12:18:34.703584 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2136 12:18:34.703808 Setting prompt string to ['volteer:']
2137 12:18:34.704068 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2138 12:18:34.712310 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2139 12:18:34.712606
2140 12:18:34.719448 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2141 12:18:34.719869
2142 12:18:34.725769 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2143 12:18:34.726159
2144 12:18:34.728750 Failed to find eMMC card reader
2145 12:18:34.729117
2146 12:18:34.729466 Wipe memory regions:
2147 12:18:34.729805
2148 12:18:34.735786 [0x00000000001000, 0x000000000a0000)
2149 12:18:34.736083
2150 12:18:34.739091 [0x00000000100000, 0x00000030000000)
2151 12:18:34.764700
2152 12:18:34.767525 [0x00000032662db0, 0x000000769ef000)
2153 12:18:34.803280
2154 12:18:34.806478 [0x00000100000000, 0x00000280400000)
2155 12:18:35.006491
2156 12:18:35.009933 ec_init: CrosEC protocol v3 supported (256, 256)
2157 12:18:35.010059
2158 12:18:35.016385 update_port_state: port C0 state: usb enable 1 mux conn 0
2159 12:18:35.016521
2160 12:18:35.023442 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2161 12:18:35.026501
2162 12:18:35.029964 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2163 12:18:35.030091
2164 12:18:35.036140 send_conn_disc_msg: pmc_send_cmd succeeded
2165 12:18:35.466136
2166 12:18:35.466372 R8152: Initializing
2167 12:18:35.466513
2168 12:18:35.469806 Version 6 (ocp_data = 5c30)
2169 12:18:35.469975
2170 12:18:35.472656 R8152: Done initializing
2171 12:18:35.472893
2172 12:18:35.476044 Adding net device
2173 12:18:35.778140
2174 12:18:35.781552 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2175 12:18:35.781997
2176 12:18:35.782365
2177 12:18:35.782703
2178 12:18:35.785682 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2180 12:18:35.887005 volteer: tftpboot 192.168.201.1 12217932/tftp-deploy-uhhkrz90/kernel/bzImage 12217932/tftp-deploy-uhhkrz90/kernel/cmdline 12217932/tftp-deploy-uhhkrz90/ramdisk/ramdisk.cpio.gz
2181 12:18:35.887224 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2182 12:18:35.887353 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2183 12:18:35.891440 tftpboot 192.168.201.1 12217932/tftp-deploy-uhhkrz90/kernel/bzIploy-uhhkrz90/kernel/cmdline 12217932/tftp-deploy-uhhkrz90/ramdisk/ramdisk.cpio.gz
2184 12:18:35.891538
2185 12:18:35.891645 Waiting for link
2186 12:18:36.094627
2187 12:18:36.095457 done.
2188 12:18:36.096213
2189 12:18:36.096935 MAC: 00:24:32:30:7b:87
2190 12:18:36.097454
2191 12:18:36.098471 Sending DHCP discover... done.
2192 12:18:36.098860
2193 12:18:36.101141 Waiting for reply... done.
2194 12:18:36.101664
2195 12:18:36.104303 Sending DHCP request... done.
2196 12:18:36.104825
2197 12:18:36.386410 Waiting for reply... done.
2198 12:18:36.386858
2199 12:18:36.387190 My ip is 192.168.201.19
2200 12:18:36.387482
2201 12:18:36.389569 The DHCP server ip is 192.168.201.1
2202 12:18:36.393137
2203 12:18:36.396340 TFTP server IP predefined by user: 192.168.201.1
2204 12:18:36.396643
2205 12:18:36.403463 Bootfile predefined by user: 12217932/tftp-deploy-uhhkrz90/kernel/bzImage
2206 12:18:36.404194
2207 12:18:36.406645 Sending tftp read request... done.
2208 12:18:36.407148
2209 12:18:36.415530 Waiting for the transfer...
2210 12:18:36.416022
2211 12:18:36.995591 00000000 ################################################################
2212 12:18:36.996037
2213 12:18:37.558514 00080000 ################################################################
2214 12:18:37.558776
2215 12:18:38.102719 00100000 ################################################################
2216 12:18:38.102877
2217 12:18:38.638736 00180000 ################################################################
2218 12:18:38.638900
2219 12:18:39.150384 00200000 ################################################################
2220 12:18:39.150529
2221 12:18:39.666473 00280000 ################################################################
2222 12:18:39.666671
2223 12:18:40.185487 00300000 ################################################################
2224 12:18:40.185700
2225 12:18:40.703975 00380000 ################################################################
2226 12:18:40.704174
2227 12:18:41.227004 00400000 ################################################################
2228 12:18:41.227200
2229 12:18:41.749632 00480000 ################################################################
2230 12:18:41.749782
2231 12:18:42.284658 00500000 ################################################################
2232 12:18:42.284817
2233 12:18:42.812073 00580000 ################################################################
2234 12:18:42.812241
2235 12:18:43.336925 00600000 ################################################################
2236 12:18:43.337151
2237 12:18:43.858687 00680000 ################################################################
2238 12:18:43.858883
2239 12:18:44.376036 00700000 ################################################################
2240 12:18:44.376199
2241 12:18:44.895619 00780000 ################################################################
2242 12:18:44.895785
2243 12:18:45.425489 00800000 ################################################################
2244 12:18:45.425651
2245 12:18:45.955925 00880000 ################################################################
2246 12:18:45.956085
2247 12:18:46.757790 00900000 ################################################################
2248 12:18:46.758021
2249 12:18:47.088606 00980000 ################################################################
2250 12:18:47.088840
2251 12:18:47.614114 00a00000 ################################################################
2252 12:18:47.614287
2253 12:18:48.174638 00a80000 ################################################################
2254 12:18:48.174797
2255 12:18:48.211620 00b00000 ##### done.
2256 12:18:48.211775
2257 12:18:48.215377 The bootfile was 11571200 bytes long.
2258 12:18:48.215486
2259 12:18:48.218359 Sending tftp read request... done.
2260 12:18:48.218473
2261 12:18:48.221801 Waiting for the transfer...
2262 12:18:48.221916
2263 12:18:48.760153 00000000 ################################################################
2264 12:18:48.760311
2265 12:18:49.270633 00080000 ################################################################
2266 12:18:49.270831
2267 12:18:49.788811 00100000 ################################################################
2268 12:18:49.789004
2269 12:18:50.303675 00180000 ################################################################
2270 12:18:50.303840
2271 12:18:50.815360 00200000 ################################################################
2272 12:18:50.815560
2273 12:18:51.338293 00280000 ################################################################
2274 12:18:51.338493
2275 12:18:51.865275 00300000 ################################################################
2276 12:18:51.865435
2277 12:18:52.400256 00380000 ################################################################
2278 12:18:52.400406
2279 12:18:52.916460 00400000 ################################################################
2280 12:18:52.916604
2281 12:18:53.449605 00480000 ################################################################
2282 12:18:53.449763
2283 12:18:53.976647 00500000 ################################################################
2284 12:18:53.976837
2285 12:18:54.372454 00580000 ################################################ done.
2286 12:18:54.372705
2287 12:18:54.375740 Sending tftp read request... done.
2288 12:18:54.375915
2289 12:18:54.379461 Waiting for the transfer...
2290 12:18:54.379654
2291 12:18:54.379806 00000000 # done.
2292 12:18:54.379920
2293 12:18:54.388892 Command line loaded dynamically from TFTP file: 12217932/tftp-deploy-uhhkrz90/kernel/cmdline
2294 12:18:54.389042
2295 12:18:54.412287 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12217932/extract-nfsrootfs-b1dqnqay,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2296 12:18:54.418286
2297 12:18:54.422173 Shutting down all USB controllers.
2298 12:18:54.422410
2299 12:18:54.422609 Removing current net device
2300 12:18:54.422800
2301 12:18:54.425177 Finalizing coreboot
2302 12:18:54.425395
2303 12:18:54.431756 Exiting depthcharge with code 4 at timestamp: 28369092
2304 12:18:54.431970
2305 12:18:54.432172
2306 12:18:54.432363 Starting kernel ...
2307 12:18:54.432547
2308 12:18:54.432746
2309 12:18:54.433656 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2310 12:18:54.433923 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2311 12:18:54.434116 Setting prompt string to ['Linux version [0-9]']
2312 12:18:54.434292 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2313 12:18:54.434480 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2315 12:23:19.435011 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2317 12:23:19.436674 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2319 12:23:19.437808 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2322 12:23:19.439839 end: 2 depthcharge-action (duration 00:05:00) [common]
2324 12:23:19.441227 Cleaning after the job
2325 12:23:19.441663 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217932/tftp-deploy-uhhkrz90/ramdisk
2326 12:23:19.446647 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217932/tftp-deploy-uhhkrz90/kernel
2327 12:23:19.454358 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217932/tftp-deploy-uhhkrz90/nfsrootfs
2328 12:23:19.549949 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217932/tftp-deploy-uhhkrz90/modules
2329 12:23:19.550702 start: 5.1 power-off (timeout 00:00:30) [common]
2330 12:23:19.550892 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=off'
2331 12:23:19.630100 >> Command sent successfully.
2332 12:23:19.632788 Returned 0 in 0 seconds
2333 12:23:19.733221 end: 5.1 power-off (duration 00:00:00) [common]
2335 12:23:19.733746 start: 5.2 read-feedback (timeout 00:10:00) [common]
2336 12:23:19.734095 Listened to connection for namespace 'common' for up to 1s
2337 12:23:20.735002 Finalising connection for namespace 'common'
2338 12:23:20.735228 Disconnecting from shell: Finalise
2339 12:23:20.735360
2340 12:23:20.835749 end: 5.2 read-feedback (duration 00:00:01) [common]
2341 12:23:20.835953 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12217932
2342 12:23:21.207121 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12217932
2343 12:23:21.207334 JobError: Your job cannot terminate cleanly.