Boot log: asus-C436FA-Flip-hatch

    1 12:24:06.740417  lava-dispatcher, installed at version: 2023.10
    2 12:24:06.740665  start: 0 validate
    3 12:24:06.740813  Start time: 2023-12-08 12:24:06.740802+00:00 (UTC)
    4 12:24:06.740952  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:24:06.741088  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:24:07.026354  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:24:07.027043  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:24:07.287925  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:24:07.288805  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:24:07.542449  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:24:07.543150  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:24:07.811462  validate duration: 1.07
   14 12:24:07.812942  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:24:07.813443  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:24:07.813881  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:24:07.814466  Not decompressing ramdisk as can be used compressed.
   18 12:24:07.814894  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
   19 12:24:07.815245  saving as /var/lib/lava/dispatcher/tmp/12217955/tftp-deploy-ckoqv04n/ramdisk/initrd.cpio.gz
   20 12:24:07.815567  total size: 5432480 (5 MB)
   21 12:24:07.820430  progress   0 % (0 MB)
   22 12:24:07.828915  progress   5 % (0 MB)
   23 12:24:07.836361  progress  10 % (0 MB)
   24 12:24:07.842190  progress  15 % (0 MB)
   25 12:24:07.846902  progress  20 % (1 MB)
   26 12:24:07.850295  progress  25 % (1 MB)
   27 12:24:07.853273  progress  30 % (1 MB)
   28 12:24:07.856143  progress  35 % (1 MB)
   29 12:24:07.858557  progress  40 % (2 MB)
   30 12:24:07.860787  progress  45 % (2 MB)
   31 12:24:07.862950  progress  50 % (2 MB)
   32 12:24:07.865226  progress  55 % (2 MB)
   33 12:24:07.867192  progress  60 % (3 MB)
   34 12:24:07.868988  progress  65 % (3 MB)
   35 12:24:07.870984  progress  70 % (3 MB)
   36 12:24:07.872713  progress  75 % (3 MB)
   37 12:24:07.874272  progress  80 % (4 MB)
   38 12:24:07.875827  progress  85 % (4 MB)
   39 12:24:07.877570  progress  90 % (4 MB)
   40 12:24:07.879134  progress  95 % (4 MB)
   41 12:24:07.880720  progress 100 % (5 MB)
   42 12:24:07.880957  5 MB downloaded in 0.07 s (79.21 MB/s)
   43 12:24:07.881123  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 12:24:07.881391  end: 1.1 download-retry (duration 00:00:00) [common]
   46 12:24:07.881487  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 12:24:07.881579  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 12:24:07.881736  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   49 12:24:07.881814  saving as /var/lib/lava/dispatcher/tmp/12217955/tftp-deploy-ckoqv04n/kernel/bzImage
   50 12:24:07.881881  total size: 11571200 (11 MB)
   51 12:24:07.881949  No compression specified
   52 12:24:07.883150  progress   0 % (0 MB)
   53 12:24:07.886497  progress   5 % (0 MB)
   54 12:24:07.890002  progress  10 % (1 MB)
   55 12:24:07.893334  progress  15 % (1 MB)
   56 12:24:07.896835  progress  20 % (2 MB)
   57 12:24:07.900356  progress  25 % (2 MB)
   58 12:24:07.903648  progress  30 % (3 MB)
   59 12:24:07.907113  progress  35 % (3 MB)
   60 12:24:07.910588  progress  40 % (4 MB)
   61 12:24:07.913857  progress  45 % (4 MB)
   62 12:24:07.917370  progress  50 % (5 MB)
   63 12:24:07.920931  progress  55 % (6 MB)
   64 12:24:07.924269  progress  60 % (6 MB)
   65 12:24:07.927705  progress  65 % (7 MB)
   66 12:24:07.931105  progress  70 % (7 MB)
   67 12:24:07.934320  progress  75 % (8 MB)
   68 12:24:07.937719  progress  80 % (8 MB)
   69 12:24:07.941089  progress  85 % (9 MB)
   70 12:24:07.944325  progress  90 % (9 MB)
   71 12:24:07.947693  progress  95 % (10 MB)
   72 12:24:07.951088  progress 100 % (11 MB)
   73 12:24:07.951218  11 MB downloaded in 0.07 s (159.16 MB/s)
   74 12:24:07.951393  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:24:07.951647  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:24:07.951749  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 12:24:07.951844  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 12:24:07.951998  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
   80 12:24:07.952078  saving as /var/lib/lava/dispatcher/tmp/12217955/tftp-deploy-ckoqv04n/nfsrootfs/full.rootfs.tar
   81 12:24:07.952145  total size: 207157356 (197 MB)
   82 12:24:07.952214  Using unxz to decompress xz
   83 12:24:07.956833  progress   0 % (0 MB)
   84 12:24:08.569667  progress   5 % (9 MB)
   85 12:24:09.156103  progress  10 % (19 MB)
   86 12:24:09.830705  progress  15 % (29 MB)
   87 12:24:10.234402  progress  20 % (39 MB)
   88 12:24:10.650203  progress  25 % (49 MB)
   89 12:24:11.346122  progress  30 % (59 MB)
   90 12:24:11.973232  progress  35 % (69 MB)
   91 12:24:12.670595  progress  40 % (79 MB)
   92 12:24:13.298395  progress  45 % (88 MB)
   93 12:24:13.960404  progress  50 % (98 MB)
   94 12:24:14.677180  progress  55 % (108 MB)
   95 12:24:15.461183  progress  60 % (118 MB)
   96 12:24:15.615254  progress  65 % (128 MB)
   97 12:24:15.770603  progress  70 % (138 MB)
   98 12:24:15.875855  progress  75 % (148 MB)
   99 12:24:15.954245  progress  80 % (158 MB)
  100 12:24:16.032572  progress  85 % (167 MB)
  101 12:24:16.143355  progress  90 % (177 MB)
  102 12:24:16.447350  progress  95 % (187 MB)
  103 12:24:17.119920  progress 100 % (197 MB)
  104 12:24:17.126957  197 MB downloaded in 9.17 s (21.53 MB/s)
  105 12:24:17.127277  end: 1.3.1 http-download (duration 00:00:09) [common]
  107 12:24:17.127579  end: 1.3 download-retry (duration 00:00:09) [common]
  108 12:24:17.127680  start: 1.4 download-retry (timeout 00:09:51) [common]
  109 12:24:17.127799  start: 1.4.1 http-download (timeout 00:09:51) [common]
  110 12:24:17.128020  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
  111 12:24:17.128134  saving as /var/lib/lava/dispatcher/tmp/12217955/tftp-deploy-ckoqv04n/modules/modules.tar
  112 12:24:17.128236  total size: 483904 (0 MB)
  113 12:24:17.128325  Using unxz to decompress xz
  114 12:24:17.132794  progress   6 % (0 MB)
  115 12:24:17.133295  progress  13 % (0 MB)
  116 12:24:17.133564  progress  20 % (0 MB)
  117 12:24:17.135371  progress  27 % (0 MB)
  118 12:24:17.137628  progress  33 % (0 MB)
  119 12:24:17.139732  progress  40 % (0 MB)
  120 12:24:17.141903  progress  47 % (0 MB)
  121 12:24:17.144035  progress  54 % (0 MB)
  122 12:24:17.146249  progress  60 % (0 MB)
  123 12:24:17.148504  progress  67 % (0 MB)
  124 12:24:17.150735  progress  74 % (0 MB)
  125 12:24:17.153034  progress  81 % (0 MB)
  126 12:24:17.155150  progress  88 % (0 MB)
  127 12:24:17.157315  progress  94 % (0 MB)
  128 12:24:17.159993  progress 100 % (0 MB)
  129 12:24:17.167189  0 MB downloaded in 0.04 s (11.85 MB/s)
  130 12:24:17.167467  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 12:24:17.167762  end: 1.4 download-retry (duration 00:00:00) [common]
  133 12:24:17.167866  start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
  134 12:24:17.167977  start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
  135 12:24:21.320580  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12217955/extract-nfsrootfs-8g8ypp8e
  136 12:24:21.320799  end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
  137 12:24:21.320917  start: 1.5.2 lava-overlay (timeout 00:09:46) [common]
  138 12:24:21.321116  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235
  139 12:24:21.321287  makedir: /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin
  140 12:24:21.321411  makedir: /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/tests
  141 12:24:21.321528  makedir: /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/results
  142 12:24:21.321643  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-add-keys
  143 12:24:21.321810  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-add-sources
  144 12:24:21.321961  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-background-process-start
  145 12:24:21.322108  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-background-process-stop
  146 12:24:21.322255  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-common-functions
  147 12:24:21.322400  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-echo-ipv4
  148 12:24:21.322546  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-install-packages
  149 12:24:21.322689  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-installed-packages
  150 12:24:21.322832  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-os-build
  151 12:24:21.322979  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-probe-channel
  152 12:24:21.323123  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-probe-ip
  153 12:24:21.323290  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-target-ip
  154 12:24:21.323437  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-target-mac
  155 12:24:21.323580  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-target-storage
  156 12:24:21.323726  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-test-case
  157 12:24:21.323874  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-test-event
  158 12:24:21.324039  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-test-feedback
  159 12:24:21.324193  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-test-raise
  160 12:24:21.324349  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-test-reference
  161 12:24:21.324494  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-test-runner
  162 12:24:21.324639  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-test-set
  163 12:24:21.324786  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-test-shell
  164 12:24:21.324931  Updating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-add-keys (debian)
  165 12:24:21.325105  Updating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-add-sources (debian)
  166 12:24:21.325284  Updating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-install-packages (debian)
  167 12:24:21.325470  Updating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-installed-packages (debian)
  168 12:24:21.325638  Updating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/bin/lava-os-build (debian)
  169 12:24:21.325798  Creating /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/environment
  170 12:24:21.325914  LAVA metadata
  171 12:24:21.325996  - LAVA_JOB_ID=12217955
  172 12:24:21.326070  - LAVA_DISPATCHER_IP=192.168.201.1
  173 12:24:21.326187  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:46) [common]
  174 12:24:21.326263  skipped lava-vland-overlay
  175 12:24:21.326348  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  176 12:24:21.326439  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:46) [common]
  177 12:24:21.326508  skipped lava-multinode-overlay
  178 12:24:21.326591  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  179 12:24:21.326679  start: 1.5.2.3 test-definition (timeout 00:09:46) [common]
  180 12:24:21.326761  Loading test definitions
  181 12:24:21.326864  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:46) [common]
  182 12:24:21.326944  Using /lava-12217955 at stage 0
  183 12:24:21.327269  uuid=12217955_1.5.2.3.1 testdef=None
  184 12:24:21.327368  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  185 12:24:21.327464  start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
  186 12:24:21.327971  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  188 12:24:21.328450  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
  189 12:24:21.329111  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  191 12:24:21.329369  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
  192 12:24:21.329981  runner path: /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/0/tests/0_timesync-off test_uuid 12217955_1.5.2.3.1
  193 12:24:21.330156  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  195 12:24:21.330409  start: 1.5.2.3.5 git-repo-action (timeout 00:09:46) [common]
  196 12:24:21.330492  Using /lava-12217955 at stage 0
  197 12:24:21.330601  Fetching tests from https://github.com/kernelci/test-definitions.git
  198 12:24:21.330690  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/0/tests/1_kselftest-filesystems'
  199 12:24:25.224046  Running '/usr/bin/git checkout kernelci.org
  200 12:24:25.383039  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
  201 12:24:25.383871  uuid=12217955_1.5.2.3.5 testdef=None
  202 12:24:25.384057  end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
  204 12:24:25.384374  start: 1.5.2.3.6 test-overlay (timeout 00:09:42) [common]
  205 12:24:25.385312  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  207 12:24:25.385608  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:42) [common]
  208 12:24:25.387199  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  210 12:24:25.387561  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:42) [common]
  211 12:24:25.389170  runner path: /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/0/tests/1_kselftest-filesystems test_uuid 12217955_1.5.2.3.5
  212 12:24:25.389311  BOARD='asus-C436FA-Flip-hatch'
  213 12:24:25.389422  BRANCH='cip-gitlab'
  214 12:24:25.389528  SKIPFILE='/dev/null'
  215 12:24:25.389628  SKIP_INSTALL='True'
  216 12:24:25.389725  TESTPROG_URL='None'
  217 12:24:25.389826  TST_CASENAME=''
  218 12:24:25.389926  TST_CMDFILES='filesystems'
  219 12:24:25.390143  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  221 12:24:25.390553  Creating lava-test-runner.conf files
  222 12:24:25.390667  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217955/lava-overlay-izr2z235/lava-12217955/0 for stage 0
  223 12:24:25.390830  - 0_timesync-off
  224 12:24:25.390939  - 1_kselftest-filesystems
  225 12:24:25.391090  end: 1.5.2.3 test-definition (duration 00:00:04) [common]
  226 12:24:25.391234  start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
  227 12:24:33.761938  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  228 12:24:33.762116  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
  229 12:24:33.762224  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  230 12:24:33.762339  end: 1.5.2 lava-overlay (duration 00:00:12) [common]
  231 12:24:33.762441  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
  232 12:24:33.919870  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  233 12:24:33.920305  start: 1.5.4 extract-modules (timeout 00:09:34) [common]
  234 12:24:33.920440  extracting modules file /var/lib/lava/dispatcher/tmp/12217955/tftp-deploy-ckoqv04n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217955/extract-nfsrootfs-8g8ypp8e
  235 12:24:33.944548  extracting modules file /var/lib/lava/dispatcher/tmp/12217955/tftp-deploy-ckoqv04n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217955/extract-overlay-ramdisk-8o899bku/ramdisk
  236 12:24:33.971002  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  237 12:24:33.971179  start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
  238 12:24:33.971285  [common] Applying overlay to NFS
  239 12:24:33.971366  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12217955/compress-overlay-em6rdmel/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12217955/extract-nfsrootfs-8g8ypp8e
  240 12:24:35.019892  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  241 12:24:35.020084  start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
  242 12:24:35.020193  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  243 12:24:35.020302  start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
  244 12:24:35.020394  Building ramdisk /var/lib/lava/dispatcher/tmp/12217955/extract-overlay-ramdisk-8o899bku/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12217955/extract-overlay-ramdisk-8o899bku/ramdisk
  245 12:24:35.123780  >> 30353 blocks

  246 12:24:35.779776  rename /var/lib/lava/dispatcher/tmp/12217955/extract-overlay-ramdisk-8o899bku/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12217955/tftp-deploy-ckoqv04n/ramdisk/ramdisk.cpio.gz
  247 12:24:35.780301  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  248 12:24:35.780441  start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
  249 12:24:35.780562  start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
  250 12:24:35.780667  No mkimage arch provided, not using FIT.
  251 12:24:35.780764  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  252 12:24:35.780858  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  253 12:24:35.780979  end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
  254 12:24:35.781085  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
  255 12:24:35.781177  No LXC device requested
  256 12:24:35.781269  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  257 12:24:35.781366  start: 1.7 deploy-device-env (timeout 00:09:32) [common]
  258 12:24:35.781460  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  259 12:24:35.781542  Checking files for TFTP limit of 4294967296 bytes.
  260 12:24:35.781997  end: 1 tftp-deploy (duration 00:00:28) [common]
  261 12:24:35.782115  start: 2 depthcharge-action (timeout 00:05:00) [common]
  262 12:24:35.782211  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  263 12:24:35.782343  substitutions:
  264 12:24:35.782417  - {DTB}: None
  265 12:24:35.782486  - {INITRD}: 12217955/tftp-deploy-ckoqv04n/ramdisk/ramdisk.cpio.gz
  266 12:24:35.782551  - {KERNEL}: 12217955/tftp-deploy-ckoqv04n/kernel/bzImage
  267 12:24:35.782615  - {LAVA_MAC}: None
  268 12:24:35.782677  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12217955/extract-nfsrootfs-8g8ypp8e
  269 12:24:35.782740  - {NFS_SERVER_IP}: 192.168.201.1
  270 12:24:35.782801  - {PRESEED_CONFIG}: None
  271 12:24:35.782861  - {PRESEED_LOCAL}: None
  272 12:24:35.782921  - {RAMDISK}: 12217955/tftp-deploy-ckoqv04n/ramdisk/ramdisk.cpio.gz
  273 12:24:35.782982  - {ROOT_PART}: None
  274 12:24:35.783042  - {ROOT}: None
  275 12:24:35.783102  - {SERVER_IP}: 192.168.201.1
  276 12:24:35.783161  - {TEE}: None
  277 12:24:35.783221  Parsed boot commands:
  278 12:24:35.783279  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  279 12:24:35.783480  Parsed boot commands: tftpboot 192.168.201.1 12217955/tftp-deploy-ckoqv04n/kernel/bzImage 12217955/tftp-deploy-ckoqv04n/kernel/cmdline 12217955/tftp-deploy-ckoqv04n/ramdisk/ramdisk.cpio.gz
  280 12:24:35.783574  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  281 12:24:35.783667  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  282 12:24:35.783770  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  283 12:24:35.783868  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  284 12:24:35.783947  Not connected, no need to disconnect.
  285 12:24:35.784028  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  286 12:24:35.784122  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  287 12:24:35.784196  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
  288 12:24:35.788519  Setting prompt string to ['lava-test: # ']
  289 12:24:35.788919  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  290 12:24:35.789040  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  291 12:24:35.789154  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  292 12:24:35.789260  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  293 12:24:35.789469  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
  294 12:24:40.936675  >> Command sent successfully.

  295 12:24:40.939250  Returned 0 in 5 seconds
  296 12:24:41.039685  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  298 12:24:41.040058  end: 2.2.2 reset-device (duration 00:00:05) [common]
  299 12:24:41.040170  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  300 12:24:41.040284  Setting prompt string to 'Starting depthcharge on Helios...'
  301 12:24:41.040380  Changing prompt to 'Starting depthcharge on Helios...'
  302 12:24:41.040485  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  303 12:24:41.040805  [Enter `^Ec?' for help]

  304 12:24:41.692966  

  305 12:24:41.693146  

  306 12:24:41.702782  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  307 12:24:41.706035  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  308 12:24:41.712620  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  309 12:24:41.715716  CPU: AES supported, TXT NOT supported, VT supported

  310 12:24:41.722505  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  311 12:24:41.726136  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  312 12:24:41.733047  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  313 12:24:41.736317  VBOOT: Loading verstage.

  314 12:24:41.739648  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  315 12:24:41.746303  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  316 12:24:41.749545  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  317 12:24:41.752842  CBFS @ c08000 size 3f8000

  318 12:24:41.759447  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  319 12:24:41.762757  CBFS: Locating 'fallback/verstage'

  320 12:24:41.765975  CBFS: Found @ offset 10fb80 size 1072c

  321 12:24:41.766075  

  322 12:24:41.769133  

  323 12:24:41.779197  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  324 12:24:41.793442  Probing TPM: . done!

  325 12:24:41.796969  TPM ready after 0 ms

  326 12:24:41.800207  Connected to device vid:did:rid of 1ae0:0028:00

  327 12:24:41.810365  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  328 12:24:41.814405  Initialized TPM device CR50 revision 0

  329 12:24:41.859461  tlcl_send_startup: Startup return code is 0

  330 12:24:41.859588  TPM: setup succeeded

  331 12:24:41.872022  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  332 12:24:41.875996  Chrome EC: UHEPI supported

  333 12:24:41.879326  Phase 1

  334 12:24:41.882522  FMAP: area GBB found @ c05000 (12288 bytes)

  335 12:24:41.889201  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  336 12:24:41.889299  Phase 2

  337 12:24:41.892709  Phase 3

  338 12:24:41.895874  FMAP: area GBB found @ c05000 (12288 bytes)

  339 12:24:41.902920  VB2:vb2_report_dev_firmware() This is developer signed firmware

  340 12:24:41.909579  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  341 12:24:41.912511  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  342 12:24:41.919158  VB2:vb2_verify_keyblock() Checking keyblock signature...

  343 12:24:41.934804  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  344 12:24:41.938155  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  345 12:24:41.944772  VB2:vb2_verify_fw_preamble() Verifying preamble.

  346 12:24:41.949050  Phase 4

  347 12:24:41.952401  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  348 12:24:41.958883  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  349 12:24:42.138319  VB2:vb2_rsa_verify_digest() Digest check failed!

  350 12:24:42.145213  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  351 12:24:42.145322  Saving nvdata

  352 12:24:42.148337  Reboot requested (10020007)

  353 12:24:42.151923  board_reset() called!

  354 12:24:42.152020  full_reset() called!

  355 12:24:46.660077  

  356 12:24:46.660266  

  357 12:24:46.669953  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  358 12:24:46.673343  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  359 12:24:46.680159  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  360 12:24:46.683145  CPU: AES supported, TXT NOT supported, VT supported

  361 12:24:46.690124  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  362 12:24:46.693346  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  363 12:24:46.700309  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  364 12:24:46.703363  VBOOT: Loading verstage.

  365 12:24:46.706691  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  366 12:24:46.713251  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  367 12:24:46.716540  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  368 12:24:46.719857  CBFS @ c08000 size 3f8000

  369 12:24:46.726873  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  370 12:24:46.730160  CBFS: Locating 'fallback/verstage'

  371 12:24:46.733330  CBFS: Found @ offset 10fb80 size 1072c

  372 12:24:46.733422  

  373 12:24:46.736608  

  374 12:24:46.746773  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  375 12:24:46.760691  Probing TPM: . done!

  376 12:24:46.764239  TPM ready after 0 ms

  377 12:24:46.767274  Connected to device vid:did:rid of 1ae0:0028:00

  378 12:24:46.777759  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  379 12:24:46.817739  Initialized TPM device CR50 revision 0

  380 12:24:46.827075  tlcl_send_startup: Startup return code is 0

  381 12:24:46.827181  TPM: setup succeeded

  382 12:24:46.839243  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  383 12:24:46.843172  Chrome EC: UHEPI supported

  384 12:24:46.846453  Phase 1

  385 12:24:46.849754  FMAP: area GBB found @ c05000 (12288 bytes)

  386 12:24:46.856324  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  387 12:24:46.863678  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  388 12:24:46.866862  Recovery requested (1009000e)

  389 12:24:46.872149  Saving nvdata

  390 12:24:46.878774  tlcl_extend: response is 0

  391 12:24:46.887351  tlcl_extend: response is 0

  392 12:24:46.894405  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  393 12:24:46.897646  CBFS @ c08000 size 3f8000

  394 12:24:46.905003  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  395 12:24:46.908168  CBFS: Locating 'fallback/romstage'

  396 12:24:46.911234  CBFS: Found @ offset 80 size 145fc

  397 12:24:46.914298  Accumulated console time in verstage 98 ms

  398 12:24:46.914743  

  399 12:24:46.915085  

  400 12:24:46.928150  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  401 12:24:46.931112  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  402 12:24:46.938096  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  403 12:24:46.941875  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  404 12:24:46.945260  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  405 12:24:46.951747  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  406 12:24:46.955067  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  407 12:24:46.958506  TCO_STS:   0000 0000

  408 12:24:46.961701  GEN_PMCON: e0015238 00000200

  409 12:24:46.962133  GBLRST_CAUSE: 00000000 00000000

  410 12:24:46.964949  prev_sleep_state 5

  411 12:24:46.968283  Boot Count incremented to 66669

  412 12:24:46.975167  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  413 12:24:46.977831  CBFS @ c08000 size 3f8000

  414 12:24:46.981205  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  415 12:24:46.985198  CBFS: Locating 'fspm.bin'

  416 12:24:46.987707  CBFS: Found @ offset 5ffc0 size 71000

  417 12:24:46.991488  Chrome EC: UHEPI supported

  418 12:24:46.998847  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  419 12:24:47.003833  Probing TPM:  done!

  420 12:24:47.010874  Connected to device vid:did:rid of 1ae0:0028:00

  421 12:24:47.021054  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  422 12:24:47.026263  Initialized TPM device CR50 revision 0

  423 12:24:47.035191  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  424 12:24:47.042055  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  425 12:24:47.045597  MRC cache found, size 1948

  426 12:24:47.048924  bootmode is set to: 2

  427 12:24:47.051999  PRMRR disabled by config.

  428 12:24:47.052475  SPD INDEX = 1

  429 12:24:47.058781  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  430 12:24:47.061837  CBFS @ c08000 size 3f8000

  431 12:24:47.068584  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  432 12:24:47.069014  CBFS: Locating 'spd.bin'

  433 12:24:47.071661  CBFS: Found @ offset 5fb80 size 400

  434 12:24:47.074919  SPD: module type is LPDDR3

  435 12:24:47.078865  SPD: module part is 

  436 12:24:47.085231  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  437 12:24:47.088533  SPD: device width 4 bits, bus width 8 bits

  438 12:24:47.091767  SPD: module size is 4096 MB (per channel)

  439 12:24:47.095588  memory slot: 0 configuration done.

  440 12:24:47.098902  memory slot: 2 configuration done.

  441 12:24:47.149389  CBMEM:

  442 12:24:47.152671  IMD: root @ 99fff000 254 entries.

  443 12:24:47.155781  IMD: root @ 99ffec00 62 entries.

  444 12:24:47.159413  External stage cache:

  445 12:24:47.162253  IMD: root @ 9abff000 254 entries.

  446 12:24:47.165995  IMD: root @ 9abfec00 62 entries.

  447 12:24:47.172878  Chrome EC: clear events_b mask to 0x0000000020004000

  448 12:24:47.185395  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  449 12:24:47.198418  tlcl_write: response is 0

  450 12:24:47.207565  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  451 12:24:47.214250  MRC: TPM MRC hash updated successfully.

  452 12:24:47.214889  2 DIMMs found

  453 12:24:47.217589  SMM Memory Map

  454 12:24:47.220919  SMRAM       : 0x9a000000 0x1000000

  455 12:24:47.224051   Subregion 0: 0x9a000000 0xa00000

  456 12:24:47.227279   Subregion 1: 0x9aa00000 0x200000

  457 12:24:47.230522   Subregion 2: 0x9ac00000 0x400000

  458 12:24:47.234312  top_of_ram = 0x9a000000

  459 12:24:47.237130  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  460 12:24:47.244153  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  461 12:24:47.247242  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  462 12:24:47.254246  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  463 12:24:47.257468  CBFS @ c08000 size 3f8000

  464 12:24:47.260689  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  465 12:24:47.263950  CBFS: Locating 'fallback/postcar'

  466 12:24:47.267181  CBFS: Found @ offset 107000 size 4b44

  467 12:24:47.274236  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  468 12:24:47.286292  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  469 12:24:47.289369  Processing 180 relocs. Offset value of 0x97c0c000

  470 12:24:47.298020  Accumulated console time in romstage 286 ms

  471 12:24:47.298487  

  472 12:24:47.298828  

  473 12:24:47.307548  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  474 12:24:47.314682  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  475 12:24:47.318068  CBFS @ c08000 size 3f8000

  476 12:24:47.321492  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  477 12:24:47.328060  CBFS: Locating 'fallback/ramstage'

  478 12:24:47.331243  CBFS: Found @ offset 43380 size 1b9e8

  479 12:24:47.338015  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  480 12:24:47.369694  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  481 12:24:47.372921  Processing 3976 relocs. Offset value of 0x98db0000

  482 12:24:47.379848  Accumulated console time in postcar 52 ms

  483 12:24:47.380308  

  484 12:24:47.380655  

  485 12:24:47.389260  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  486 12:24:47.396390  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  487 12:24:47.399402  WARNING: RO_VPD is uninitialized or empty.

  488 12:24:47.402939  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  489 12:24:47.409772  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  490 12:24:47.410392  Normal boot.

  491 12:24:47.416417  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  492 12:24:47.419333  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  493 12:24:47.422643  CBFS @ c08000 size 3f8000

  494 12:24:47.429037  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  495 12:24:47.432831  CBFS: Locating 'cpu_microcode_blob.bin'

  496 12:24:47.436158  CBFS: Found @ offset 14700 size 2ec00

  497 12:24:47.439541  microcode: sig=0x806ec pf=0x4 revision=0xc9

  498 12:24:47.442809  Skip microcode update

  499 12:24:47.446216  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  500 12:24:47.449506  CBFS @ c08000 size 3f8000

  501 12:24:47.456073  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  502 12:24:47.459235  CBFS: Locating 'fsps.bin'

  503 12:24:47.462535  CBFS: Found @ offset d1fc0 size 35000

  504 12:24:47.487388  Detected 4 core, 8 thread CPU.

  505 12:24:47.490354  Setting up SMI for CPU

  506 12:24:47.494263  IED base = 0x9ac00000

  507 12:24:47.494383  IED size = 0x00400000

  508 12:24:47.497520  Will perform SMM setup.

  509 12:24:47.504059  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  510 12:24:47.510634  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  511 12:24:47.513786  Processing 16 relocs. Offset value of 0x00030000

  512 12:24:47.517663  Attempting to start 7 APs

  513 12:24:47.520749  Waiting for 10ms after sending INIT.

  514 12:24:47.537114  Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.

  515 12:24:47.537204  done.

  516 12:24:47.540579  AP: slot 6 apic_id 6.

  517 12:24:47.543779  AP: slot 7 apic_id 7.

  518 12:24:47.543894  AP: slot 1 apic_id 2.

  519 12:24:47.547007  AP: slot 3 apic_id 3.

  520 12:24:47.550352  AP: slot 5 apic_id 5.

  521 12:24:47.550468  AP: slot 4 apic_id 4.

  522 12:24:47.557101  Waiting for 2nd SIPI to complete...done.

  523 12:24:47.563456  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  524 12:24:47.566838  Processing 13 relocs. Offset value of 0x00038000

  525 12:24:47.574005  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  526 12:24:47.580600  Installing SMM handler to 0x9a000000

  527 12:24:47.587125  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  528 12:24:47.590116  Processing 658 relocs. Offset value of 0x9a010000

  529 12:24:47.600080  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  530 12:24:47.603215  Processing 13 relocs. Offset value of 0x9a008000

  531 12:24:47.610019  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  532 12:24:47.616673  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  533 12:24:47.619885  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  534 12:24:47.626426  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  535 12:24:47.632939  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  536 12:24:47.639553  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  537 12:24:47.643212  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  538 12:24:47.650061  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  539 12:24:47.653140  Clearing SMI status registers

  540 12:24:47.656323  SMI_STS: PM1 

  541 12:24:47.656412  PM1_STS: PWRBTN 

  542 12:24:47.659719  TCO_STS: SECOND_TO 

  543 12:24:47.663455  New SMBASE 0x9a000000

  544 12:24:47.666740  In relocation handler: CPU 0

  545 12:24:47.669964  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  546 12:24:47.673232  Writing SMRR. base = 0x9a000006, mask=0xff000800

  547 12:24:47.676585  Relocation complete.

  548 12:24:47.679675  New SMBASE 0x99fff800

  549 12:24:47.679850  In relocation handler: CPU 2

  550 12:24:47.686362  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  551 12:24:47.689743  Writing SMRR. base = 0x9a000006, mask=0xff000800

  552 12:24:47.693114  Relocation complete.

  553 12:24:47.693230  New SMBASE 0x99ffec00

  554 12:24:47.696270  In relocation handler: CPU 5

  555 12:24:47.703546  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  556 12:24:47.706880  Writing SMRR. base = 0x9a000006, mask=0xff000800

  557 12:24:47.710086  Relocation complete.

  558 12:24:47.710179  New SMBASE 0x99fff000

  559 12:24:47.713173  In relocation handler: CPU 4

  560 12:24:47.719929  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  561 12:24:47.723162  Writing SMRR. base = 0x9a000006, mask=0xff000800

  562 12:24:47.726265  Relocation complete.

  563 12:24:47.726390  New SMBASE 0x99fff400

  564 12:24:47.729777  In relocation handler: CPU 3

  565 12:24:47.733332  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  566 12:24:47.739757  Writing SMRR. base = 0x9a000006, mask=0xff000800

  567 12:24:47.743340  Relocation complete.

  568 12:24:47.743433  New SMBASE 0x99fffc00

  569 12:24:47.746383  In relocation handler: CPU 1

  570 12:24:47.749973  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  571 12:24:47.756277  Writing SMRR. base = 0x9a000006, mask=0xff000800

  572 12:24:47.756402  Relocation complete.

  573 12:24:47.759840  New SMBASE 0x99ffe400

  574 12:24:47.762828  In relocation handler: CPU 7

  575 12:24:47.766510  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  576 12:24:47.773167  Writing SMRR. base = 0x9a000006, mask=0xff000800

  577 12:24:47.773290  Relocation complete.

  578 12:24:47.776520  New SMBASE 0x99ffe800

  579 12:24:47.779837  In relocation handler: CPU 6

  580 12:24:47.783105  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  581 12:24:47.790190  Writing SMRR. base = 0x9a000006, mask=0xff000800

  582 12:24:47.790317  Relocation complete.

  583 12:24:47.793543  Initializing CPU #0

  584 12:24:47.796880  CPU: vendor Intel device 806ec

  585 12:24:47.800097  CPU: family 06, model 8e, stepping 0c

  586 12:24:47.803436  Clearing out pending MCEs

  587 12:24:47.806753  Setting up local APIC...

  588 12:24:47.806870   apic_id: 0x00 done.

  589 12:24:47.810051  Turbo is available but hidden

  590 12:24:47.812715  Turbo is available and visible

  591 12:24:47.816566  VMX status: enabled

  592 12:24:47.819756  IA32_FEATURE_CONTROL status: locked

  593 12:24:47.823056  Skip microcode update

  594 12:24:47.823173  CPU #0 initialized

  595 12:24:47.826423  Initializing CPU #4

  596 12:24:47.826536  Initializing CPU #2

  597 12:24:47.829917  Initializing CPU #5

  598 12:24:47.833034  CPU: vendor Intel device 806ec

  599 12:24:47.836348  CPU: family 06, model 8e, stepping 0c

  600 12:24:47.839553  Clearing out pending MCEs

  601 12:24:47.839669  Initializing CPU #3

  602 12:24:47.842589  Initializing CPU #1

  603 12:24:47.845955  CPU: vendor Intel device 806ec

  604 12:24:47.849312  CPU: family 06, model 8e, stepping 0c

  605 12:24:47.852466  CPU: vendor Intel device 806ec

  606 12:24:47.856198  CPU: family 06, model 8e, stepping 0c

  607 12:24:47.859634  Clearing out pending MCEs

  608 12:24:47.862559  Clearing out pending MCEs

  609 12:24:47.865604  Setting up local APIC...

  610 12:24:47.865723  Setting up local APIC...

  611 12:24:47.869141  CPU: vendor Intel device 806ec

  612 12:24:47.875823  CPU: family 06, model 8e, stepping 0c

  613 12:24:47.875952  CPU: vendor Intel device 806ec

  614 12:24:47.882259  CPU: family 06, model 8e, stepping 0c

  615 12:24:47.882380   apic_id: 0x03 done.

  616 12:24:47.885759  Setting up local APIC...

  617 12:24:47.889205   apic_id: 0x01 done.

  618 12:24:47.889300  Clearing out pending MCEs

  619 12:24:47.892116  Clearing out pending MCEs

  620 12:24:47.895730  Setting up local APIC...

  621 12:24:47.899070   apic_id: 0x02 done.

  622 12:24:47.899187  VMX status: enabled

  623 12:24:47.902385  VMX status: enabled

  624 12:24:47.905743  IA32_FEATURE_CONTROL status: locked

  625 12:24:47.909052  IA32_FEATURE_CONTROL status: locked

  626 12:24:47.912352  Skip microcode update

  627 12:24:47.912441  Skip microcode update

  628 12:24:47.915617  CPU #3 initialized

  629 12:24:47.918889  CPU #1 initialized

  630 12:24:47.919016  Setting up local APIC...

  631 12:24:47.922259  VMX status: enabled

  632 12:24:47.925447   apic_id: 0x04 done.

  633 12:24:47.925536   apic_id: 0x05 done.

  634 12:24:47.928733  VMX status: enabled

  635 12:24:47.932032  VMX status: enabled

  636 12:24:47.935270  IA32_FEATURE_CONTROL status: locked

  637 12:24:47.939083  IA32_FEATURE_CONTROL status: locked

  638 12:24:47.939207  Skip microcode update

  639 12:24:47.942314  Skip microcode update

  640 12:24:47.945531  CPU #4 initialized

  641 12:24:47.945670  Initializing CPU #7

  642 12:24:47.948807  Initializing CPU #6

  643 12:24:47.952163  CPU: vendor Intel device 806ec

  644 12:24:47.955435  CPU: family 06, model 8e, stepping 0c

  645 12:24:47.958732  CPU: vendor Intel device 806ec

  646 12:24:47.961900  CPU: family 06, model 8e, stepping 0c

  647 12:24:47.964940  Clearing out pending MCEs

  648 12:24:47.968596  Clearing out pending MCEs

  649 12:24:47.968690  Setting up local APIC...

  650 12:24:47.972260  CPU #5 initialized

  651 12:24:47.975302  Setting up local APIC...

  652 12:24:47.978316  IA32_FEATURE_CONTROL status: locked

  653 12:24:47.978410   apic_id: 0x06 done.

  654 12:24:47.981958   apic_id: 0x07 done.

  655 12:24:47.984879  VMX status: enabled

  656 12:24:47.984973  VMX status: enabled

  657 12:24:47.988459  IA32_FEATURE_CONTROL status: locked

  658 12:24:47.995136  IA32_FEATURE_CONTROL status: locked

  659 12:24:47.995232  Skip microcode update

  660 12:24:47.998473  Skip microcode update

  661 12:24:47.998567  CPU #6 initialized

  662 12:24:48.002109  CPU #7 initialized

  663 12:24:48.005388  Skip microcode update

  664 12:24:48.005504  CPU #2 initialized

  665 12:24:48.011713  bsp_do_flight_plan done after 452 msecs.

  666 12:24:48.014852  CPU: frequency set to 4200 MHz

  667 12:24:48.014976  Enabling SMIs.

  668 12:24:48.015082  Locking SMM.

  669 12:24:48.031217  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  670 12:24:48.034427  CBFS @ c08000 size 3f8000

  671 12:24:48.041429  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  672 12:24:48.041550  CBFS: Locating 'vbt.bin'

  673 12:24:48.044852  CBFS: Found @ offset 5f5c0 size 499

  674 12:24:48.051458  Found a VBT of 4608 bytes after decompression

  675 12:24:48.234234  Display FSP Version Info HOB

  676 12:24:48.237433  Reference Code - CPU = 9.0.1e.30

  677 12:24:48.241089  uCode Version = 0.0.0.ca

  678 12:24:48.244386  TXT ACM version = ff.ff.ff.ffff

  679 12:24:48.247419  Display FSP Version Info HOB

  680 12:24:48.250835  Reference Code - ME = 9.0.1e.30

  681 12:24:48.253797  MEBx version = 0.0.0.0

  682 12:24:48.257305  ME Firmware Version = Consumer SKU

  683 12:24:48.260704  Display FSP Version Info HOB

  684 12:24:48.264011  Reference Code - CML PCH = 9.0.1e.30

  685 12:24:48.267407  PCH-CRID Status = Disabled

  686 12:24:48.271077  PCH-CRID Original Value = ff.ff.ff.ffff

  687 12:24:48.274230  PCH-CRID New Value = ff.ff.ff.ffff

  688 12:24:48.277409  OPROM - RST - RAID = ff.ff.ff.ffff

  689 12:24:48.280767  ChipsetInit Base Version = ff.ff.ff.ffff

  690 12:24:48.284117  ChipsetInit Oem Version = ff.ff.ff.ffff

  691 12:24:48.287276  Display FSP Version Info HOB

  692 12:24:48.293981  Reference Code - SA - System Agent = 9.0.1e.30

  693 12:24:48.297020  Reference Code - MRC = 0.7.1.6c

  694 12:24:48.297129  SA - PCIe Version = 9.0.1e.30

  695 12:24:48.300644  SA-CRID Status = Disabled

  696 12:24:48.303814  SA-CRID Original Value = 0.0.0.c

  697 12:24:48.306885  SA-CRID New Value = 0.0.0.c

  698 12:24:48.310759  OPROM - VBIOS = ff.ff.ff.ffff

  699 12:24:48.310877  RTC Init

  700 12:24:48.317396  Set power on after power failure.

  701 12:24:48.317516  Disabling Deep S3

  702 12:24:48.320713  Disabling Deep S3

  703 12:24:48.320837  Disabling Deep S4

  704 12:24:48.324043  Disabling Deep S4

  705 12:24:48.324172  Disabling Deep S5

  706 12:24:48.327195  Disabling Deep S5

  707 12:24:48.333889  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1

  708 12:24:48.333983  Enumerating buses...

  709 12:24:48.340471  Show all devs... Before device enumeration.

  710 12:24:48.340565  Root Device: enabled 1

  711 12:24:48.344225  CPU_CLUSTER: 0: enabled 1

  712 12:24:48.347510  DOMAIN: 0000: enabled 1

  713 12:24:48.347637  APIC: 00: enabled 1

  714 12:24:48.350720  PCI: 00:00.0: enabled 1

  715 12:24:48.353907  PCI: 00:02.0: enabled 1

  716 12:24:48.357158  PCI: 00:04.0: enabled 0

  717 12:24:48.357276  PCI: 00:05.0: enabled 0

  718 12:24:48.360428  PCI: 00:12.0: enabled 1

  719 12:24:48.363737  PCI: 00:12.5: enabled 0

  720 12:24:48.367291  PCI: 00:12.6: enabled 0

  721 12:24:48.367434  PCI: 00:14.0: enabled 1

  722 12:24:48.370330  PCI: 00:14.1: enabled 0

  723 12:24:48.373640  PCI: 00:14.3: enabled 1

  724 12:24:48.377346  PCI: 00:14.5: enabled 0

  725 12:24:48.377439  PCI: 00:15.0: enabled 1

  726 12:24:48.380321  PCI: 00:15.1: enabled 1

  727 12:24:48.383728  PCI: 00:15.2: enabled 0

  728 12:24:48.383857  PCI: 00:15.3: enabled 0

  729 12:24:48.387227  PCI: 00:16.0: enabled 1

  730 12:24:48.390796  PCI: 00:16.1: enabled 0

  731 12:24:48.393477  PCI: 00:16.2: enabled 0

  732 12:24:48.393603  PCI: 00:16.3: enabled 0

  733 12:24:48.397399  PCI: 00:16.4: enabled 0

  734 12:24:48.400523  PCI: 00:16.5: enabled 0

  735 12:24:48.403702  PCI: 00:17.0: enabled 1

  736 12:24:48.403822  PCI: 00:19.0: enabled 1

  737 12:24:48.407208  PCI: 00:19.1: enabled 0

  738 12:24:48.410207  PCI: 00:19.2: enabled 0

  739 12:24:48.413706  PCI: 00:1a.0: enabled 0

  740 12:24:48.413829  PCI: 00:1c.0: enabled 0

  741 12:24:48.417257  PCI: 00:1c.1: enabled 0

  742 12:24:48.420336  PCI: 00:1c.2: enabled 0

  743 12:24:48.420457  PCI: 00:1c.3: enabled 0

  744 12:24:48.423564  PCI: 00:1c.4: enabled 0

  745 12:24:48.426880  PCI: 00:1c.5: enabled 0

  746 12:24:48.430127  PCI: 00:1c.6: enabled 0

  747 12:24:48.430250  PCI: 00:1c.7: enabled 0

  748 12:24:48.433422  PCI: 00:1d.0: enabled 1

  749 12:24:48.436739  PCI: 00:1d.1: enabled 0

  750 12:24:48.440038  PCI: 00:1d.2: enabled 0

  751 12:24:48.440155  PCI: 00:1d.3: enabled 0

  752 12:24:48.443288  PCI: 00:1d.4: enabled 0

  753 12:24:48.446611  PCI: 00:1d.5: enabled 1

  754 12:24:48.446731  PCI: 00:1e.0: enabled 1

  755 12:24:48.450471  PCI: 00:1e.1: enabled 0

  756 12:24:48.453897  PCI: 00:1e.2: enabled 1

  757 12:24:48.456860  PCI: 00:1e.3: enabled 1

  758 12:24:48.456973  PCI: 00:1f.0: enabled 1

  759 12:24:48.459891  PCI: 00:1f.1: enabled 1

  760 12:24:48.463349  PCI: 00:1f.2: enabled 1

  761 12:24:48.466622  PCI: 00:1f.3: enabled 1

  762 12:24:48.466745  PCI: 00:1f.4: enabled 1

  763 12:24:48.469870  PCI: 00:1f.5: enabled 1

  764 12:24:48.473086  PCI: 00:1f.6: enabled 0

  765 12:24:48.476934  USB0 port 0: enabled 1

  766 12:24:48.477028  I2C: 00:15: enabled 1

  767 12:24:48.479944  I2C: 00:5d: enabled 1

  768 12:24:48.483240  GENERIC: 0.0: enabled 1

  769 12:24:48.483364  I2C: 00:1a: enabled 1

  770 12:24:48.486360  I2C: 00:38: enabled 1

  771 12:24:48.489712  I2C: 00:39: enabled 1

  772 12:24:48.489835  I2C: 00:3a: enabled 1

  773 12:24:48.493486  I2C: 00:3b: enabled 1

  774 12:24:48.496621  PCI: 00:00.0: enabled 1

  775 12:24:48.496716  SPI: 00: enabled 1

  776 12:24:48.499869  SPI: 01: enabled 1

  777 12:24:48.503058  PNP: 0c09.0: enabled 1

  778 12:24:48.503152  USB2 port 0: enabled 1

  779 12:24:48.506781  USB2 port 1: enabled 1

  780 12:24:48.509988  USB2 port 2: enabled 0

  781 12:24:48.510113  USB2 port 3: enabled 0

  782 12:24:48.513302  USB2 port 5: enabled 0

  783 12:24:48.516621  USB2 port 6: enabled 1

  784 12:24:48.519620  USB2 port 9: enabled 1

  785 12:24:48.519714  USB3 port 0: enabled 1

  786 12:24:48.523277  USB3 port 1: enabled 1

  787 12:24:48.526302  USB3 port 2: enabled 1

  788 12:24:48.526396  USB3 port 3: enabled 1

  789 12:24:48.529715  USB3 port 4: enabled 0

  790 12:24:48.533197  APIC: 02: enabled 1

  791 12:24:48.533296  APIC: 01: enabled 1

  792 12:24:48.536195  APIC: 03: enabled 1

  793 12:24:48.539587  APIC: 04: enabled 1

  794 12:24:48.539681  APIC: 05: enabled 1

  795 12:24:48.542814  APIC: 06: enabled 1

  796 12:24:48.542942  APIC: 07: enabled 1

  797 12:24:48.546238  Compare with tree...

  798 12:24:48.549486  Root Device: enabled 1

  799 12:24:48.552853   CPU_CLUSTER: 0: enabled 1

  800 12:24:48.552952    APIC: 00: enabled 1

  801 12:24:48.556631    APIC: 02: enabled 1

  802 12:24:48.559339    APIC: 01: enabled 1

  803 12:24:48.559468    APIC: 03: enabled 1

  804 12:24:48.563092    APIC: 04: enabled 1

  805 12:24:48.566260    APIC: 05: enabled 1

  806 12:24:48.566383    APIC: 06: enabled 1

  807 12:24:48.569632    APIC: 07: enabled 1

  808 12:24:48.572900   DOMAIN: 0000: enabled 1

  809 12:24:48.572993    PCI: 00:00.0: enabled 1

  810 12:24:48.576074    PCI: 00:02.0: enabled 1

  811 12:24:48.579335    PCI: 00:04.0: enabled 0

  812 12:24:48.582645    PCI: 00:05.0: enabled 0

  813 12:24:48.586458    PCI: 00:12.0: enabled 1

  814 12:24:48.586572    PCI: 00:12.5: enabled 0

  815 12:24:48.589510    PCI: 00:12.6: enabled 0

  816 12:24:48.593275    PCI: 00:14.0: enabled 1

  817 12:24:48.596058     USB0 port 0: enabled 1

  818 12:24:48.599287      USB2 port 0: enabled 1

  819 12:24:48.599386      USB2 port 1: enabled 1

  820 12:24:48.603170      USB2 port 2: enabled 0

  821 12:24:48.606358      USB2 port 3: enabled 0

  822 12:24:48.609330      USB2 port 5: enabled 0

  823 12:24:48.612877      USB2 port 6: enabled 1

  824 12:24:48.612995      USB2 port 9: enabled 1

  825 12:24:48.616326      USB3 port 0: enabled 1

  826 12:24:48.619265      USB3 port 1: enabled 1

  827 12:24:48.622649      USB3 port 2: enabled 1

  828 12:24:48.626484      USB3 port 3: enabled 1

  829 12:24:48.629798      USB3 port 4: enabled 0

  830 12:24:48.629919    PCI: 00:14.1: enabled 0

  831 12:24:48.633133    PCI: 00:14.3: enabled 1

  832 12:24:48.636268    PCI: 00:14.5: enabled 0

  833 12:24:48.639829    PCI: 00:15.0: enabled 1

  834 12:24:48.639947     I2C: 00:15: enabled 1

  835 12:24:48.642896    PCI: 00:15.1: enabled 1

  836 12:24:48.646397     I2C: 00:5d: enabled 1

  837 12:24:48.649375     GENERIC: 0.0: enabled 1

  838 12:24:48.652592    PCI: 00:15.2: enabled 0

  839 12:24:48.652724    PCI: 00:15.3: enabled 0

  840 12:24:48.655817    PCI: 00:16.0: enabled 1

  841 12:24:48.659827    PCI: 00:16.1: enabled 0

  842 12:24:48.662764    PCI: 00:16.2: enabled 0

  843 12:24:48.666028    PCI: 00:16.3: enabled 0

  844 12:24:48.666145    PCI: 00:16.4: enabled 0

  845 12:24:48.669197    PCI: 00:16.5: enabled 0

  846 12:24:48.672496    PCI: 00:17.0: enabled 1

  847 12:24:48.675863    PCI: 00:19.0: enabled 1

  848 12:24:48.679253     I2C: 00:1a: enabled 1

  849 12:24:48.679377     I2C: 00:38: enabled 1

  850 12:24:48.682484     I2C: 00:39: enabled 1

  851 12:24:48.686404     I2C: 00:3a: enabled 1

  852 12:24:48.689736     I2C: 00:3b: enabled 1

  853 12:24:48.689857    PCI: 00:19.1: enabled 0

  854 12:24:48.692870    PCI: 00:19.2: enabled 0

  855 12:24:48.695915    PCI: 00:1a.0: enabled 0

  856 12:24:48.699660    PCI: 00:1c.0: enabled 0

  857 12:24:48.702795    PCI: 00:1c.1: enabled 0

  858 12:24:48.702919    PCI: 00:1c.2: enabled 0

  859 12:24:48.706184    PCI: 00:1c.3: enabled 0

  860 12:24:48.709472    PCI: 00:1c.4: enabled 0

  861 12:24:48.712802    PCI: 00:1c.5: enabled 0

  862 12:24:48.712941    PCI: 00:1c.6: enabled 0

  863 12:24:48.715994    PCI: 00:1c.7: enabled 0

  864 12:24:48.719083    PCI: 00:1d.0: enabled 1

  865 12:24:48.722371    PCI: 00:1d.1: enabled 0

  866 12:24:48.726052    PCI: 00:1d.2: enabled 0

  867 12:24:48.726170    PCI: 00:1d.3: enabled 0

  868 12:24:48.729043    PCI: 00:1d.4: enabled 0

  869 12:24:48.732650    PCI: 00:1d.5: enabled 1

  870 12:24:48.735951     PCI: 00:00.0: enabled 1

  871 12:24:48.739089    PCI: 00:1e.0: enabled 1

  872 12:24:48.739204    PCI: 00:1e.1: enabled 0

  873 12:24:48.742535    PCI: 00:1e.2: enabled 1

  874 12:24:48.745681     SPI: 00: enabled 1

  875 12:24:48.748961    PCI: 00:1e.3: enabled 1

  876 12:24:48.749082     SPI: 01: enabled 1

  877 12:24:48.752043    PCI: 00:1f.0: enabled 1

  878 12:24:48.755463     PNP: 0c09.0: enabled 1

  879 12:24:48.758941    PCI: 00:1f.1: enabled 1

  880 12:24:48.762066    PCI: 00:1f.2: enabled 1

  881 12:24:48.762185    PCI: 00:1f.3: enabled 1

  882 12:24:48.765851    PCI: 00:1f.4: enabled 1

  883 12:24:48.768924    PCI: 00:1f.5: enabled 1

  884 12:24:48.772185    PCI: 00:1f.6: enabled 0

  885 12:24:48.775392  Root Device scanning...

  886 12:24:48.778764  scan_static_bus for Root Device

  887 12:24:48.778905  CPU_CLUSTER: 0 enabled

  888 12:24:48.782094  DOMAIN: 0000 enabled

  889 12:24:48.785273  DOMAIN: 0000 scanning...

  890 12:24:48.788594  PCI: pci_scan_bus for bus 00

  891 12:24:48.791873  PCI: 00:00.0 [8086/0000] ops

  892 12:24:48.795173  PCI: 00:00.0 [8086/9b61] enabled

  893 12:24:48.798439  PCI: 00:02.0 [8086/0000] bus ops

  894 12:24:48.801736  PCI: 00:02.0 [8086/9b41] enabled

  895 12:24:48.805431  PCI: 00:04.0 [8086/1903] disabled

  896 12:24:48.808390  PCI: 00:08.0 [8086/1911] enabled

  897 12:24:48.811619  PCI: 00:12.0 [8086/02f9] enabled

  898 12:24:48.814898  PCI: 00:14.0 [8086/0000] bus ops

  899 12:24:48.818253  PCI: 00:14.0 [8086/02ed] enabled

  900 12:24:48.821590  PCI: 00:14.2 [8086/02ef] enabled

  901 12:24:48.825178  PCI: 00:14.3 [8086/02f0] enabled

  902 12:24:48.828452  PCI: 00:15.0 [8086/0000] bus ops

  903 12:24:48.831766  PCI: 00:15.0 [8086/02e8] enabled

  904 12:24:48.835103  PCI: 00:15.1 [8086/0000] bus ops

  905 12:24:48.838327  PCI: 00:15.1 [8086/02e9] enabled

  906 12:24:48.841467  PCI: 00:16.0 [8086/0000] ops

  907 12:24:48.845014  PCI: 00:16.0 [8086/02e0] enabled

  908 12:24:48.845112  PCI: 00:17.0 [8086/0000] ops

  909 12:24:48.848028  PCI: 00:17.0 [8086/02d3] enabled

  910 12:24:48.851596  PCI: 00:19.0 [8086/0000] bus ops

  911 12:24:48.855006  PCI: 00:19.0 [8086/02c5] enabled

  912 12:24:48.858220  PCI: 00:1d.0 [8086/0000] bus ops

  913 12:24:48.861614  PCI: 00:1d.0 [8086/02b0] enabled

  914 12:24:48.868227  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  915 12:24:48.871615  PCI: 00:1e.0 [8086/0000] ops

  916 12:24:48.874691  PCI: 00:1e.0 [8086/02a8] enabled

  917 12:24:48.878098  PCI: 00:1e.2 [8086/0000] bus ops

  918 12:24:48.881079  PCI: 00:1e.2 [8086/02aa] enabled

  919 12:24:48.884475  PCI: 00:1e.3 [8086/0000] bus ops

  920 12:24:48.887778  PCI: 00:1e.3 [8086/02ab] enabled

  921 12:24:48.891318  PCI: 00:1f.0 [8086/0000] bus ops

  922 12:24:48.894438  PCI: 00:1f.0 [8086/0284] enabled

  923 12:24:48.901008  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  924 12:24:48.904344  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  925 12:24:48.907669  PCI: 00:1f.3 [8086/0000] bus ops

  926 12:24:48.910888  PCI: 00:1f.3 [8086/02c8] enabled

  927 12:24:48.914618  PCI: 00:1f.4 [8086/0000] bus ops

  928 12:24:48.917589  PCI: 00:1f.4 [8086/02a3] enabled

  929 12:24:48.921226  PCI: 00:1f.5 [8086/0000] bus ops

  930 12:24:48.924347  PCI: 00:1f.5 [8086/02a4] enabled

  931 12:24:48.927526  PCI: Leftover static devices:

  932 12:24:48.931382  PCI: 00:05.0

  933 12:24:48.931512  PCI: 00:12.5

  934 12:24:48.934010  PCI: 00:12.6

  935 12:24:48.934122  PCI: 00:14.1

  936 12:24:48.934231  PCI: 00:14.5

  937 12:24:48.937942  PCI: 00:15.2

  938 12:24:48.938054  PCI: 00:15.3

  939 12:24:48.941205  PCI: 00:16.1

  940 12:24:48.941315  PCI: 00:16.2

  941 12:24:48.941419  PCI: 00:16.3

  942 12:24:48.944436  PCI: 00:16.4

  943 12:24:48.944523  PCI: 00:16.5

  944 12:24:48.947643  PCI: 00:19.1

  945 12:24:48.947741  PCI: 00:19.2

  946 12:24:48.950783  PCI: 00:1a.0

  947 12:24:48.950878  PCI: 00:1c.0

  948 12:24:48.950976  PCI: 00:1c.1

  949 12:24:48.953995  PCI: 00:1c.2

  950 12:24:48.954090  PCI: 00:1c.3

  951 12:24:48.957740  PCI: 00:1c.4

  952 12:24:48.957836  PCI: 00:1c.5

  953 12:24:48.957934  PCI: 00:1c.6

  954 12:24:48.961013  PCI: 00:1c.7

  955 12:24:48.961109  PCI: 00:1d.1

  956 12:24:48.964100  PCI: 00:1d.2

  957 12:24:48.964195  PCI: 00:1d.3

  958 12:24:48.964312  PCI: 00:1d.4

  959 12:24:48.967940  PCI: 00:1d.5

  960 12:24:48.968035  PCI: 00:1e.1

  961 12:24:48.970782  PCI: 00:1f.1

  962 12:24:48.970877  PCI: 00:1f.2

  963 12:24:48.973957  PCI: 00:1f.6

  964 12:24:48.974052  PCI: Check your devicetree.cb.

  965 12:24:48.977386  PCI: 00:02.0 scanning...

  966 12:24:48.980603  scan_generic_bus for PCI: 00:02.0

  967 12:24:48.984365  scan_generic_bus for PCI: 00:02.0 done

  968 12:24:48.991092  scan_bus: scanning of bus PCI: 00:02.0 took 10185 usecs

  969 12:24:48.993984  PCI: 00:14.0 scanning...

  970 12:24:48.997324  scan_static_bus for PCI: 00:14.0

  971 12:24:49.000571  USB0 port 0 enabled

  972 12:24:49.000667  USB0 port 0 scanning...

  973 12:24:49.004180  scan_static_bus for USB0 port 0

  974 12:24:49.007498  USB2 port 0 enabled

  975 12:24:49.010797  USB2 port 1 enabled

  976 12:24:49.010894  USB2 port 2 disabled

  977 12:24:49.014105  USB2 port 3 disabled

  978 12:24:49.017402  USB2 port 5 disabled

  979 12:24:49.017498  USB2 port 6 enabled

  980 12:24:49.020793  USB2 port 9 enabled

  981 12:24:49.020888  USB3 port 0 enabled

  982 12:24:49.024008  USB3 port 1 enabled

  983 12:24:49.027108  USB3 port 2 enabled

  984 12:24:49.027204  USB3 port 3 enabled

  985 12:24:49.030646  USB3 port 4 disabled

  986 12:24:49.034052  USB2 port 0 scanning...

  987 12:24:49.036856  scan_static_bus for USB2 port 0

  988 12:24:49.040682  scan_static_bus for USB2 port 0 done

  989 12:24:49.043976  scan_bus: scanning of bus USB2 port 0 took 9700 usecs

  990 12:24:49.047312  USB2 port 1 scanning...

  991 12:24:49.050820  scan_static_bus for USB2 port 1

  992 12:24:49.053823  scan_static_bus for USB2 port 1 done

  993 12:24:49.060497  scan_bus: scanning of bus USB2 port 1 took 9685 usecs

  994 12:24:49.063813  USB2 port 6 scanning...

  995 12:24:49.067093  scan_static_bus for USB2 port 6

  996 12:24:49.070389  scan_static_bus for USB2 port 6 done

  997 12:24:49.073654  scan_bus: scanning of bus USB2 port 6 took 9700 usecs

  998 12:24:49.076891  USB2 port 9 scanning...

  999 12:24:49.080752  scan_static_bus for USB2 port 9

 1000 12:24:49.083926  scan_static_bus for USB2 port 9 done

 1001 12:24:49.090248  scan_bus: scanning of bus USB2 port 9 took 9687 usecs

 1002 12:24:49.093982  USB3 port 0 scanning...

 1003 12:24:49.097096  scan_static_bus for USB3 port 0

 1004 12:24:49.100470  scan_static_bus for USB3 port 0 done

 1005 12:24:49.103550  scan_bus: scanning of bus USB3 port 0 took 9703 usecs

 1006 12:24:49.107233  USB3 port 1 scanning...

 1007 12:24:49.110248  scan_static_bus for USB3 port 1

 1008 12:24:49.113863  scan_static_bus for USB3 port 1 done

 1009 12:24:49.120318  scan_bus: scanning of bus USB3 port 1 took 9695 usecs

 1010 12:24:49.123553  USB3 port 2 scanning...

 1011 12:24:49.126790  scan_static_bus for USB3 port 2

 1012 12:24:49.130726  scan_static_bus for USB3 port 2 done

 1013 12:24:49.134095  scan_bus: scanning of bus USB3 port 2 took 9693 usecs

 1014 12:24:49.137393  USB3 port 3 scanning...

 1015 12:24:49.140512  scan_static_bus for USB3 port 3

 1016 12:24:49.143599  scan_static_bus for USB3 port 3 done

 1017 12:24:49.150435  scan_bus: scanning of bus USB3 port 3 took 9700 usecs

 1018 12:24:49.154037  scan_static_bus for USB0 port 0 done

 1019 12:24:49.160451  scan_bus: scanning of bus USB0 port 0 took 155266 usecs

 1020 12:24:49.163760  scan_static_bus for PCI: 00:14.0 done

 1021 12:24:49.170416  scan_bus: scanning of bus PCI: 00:14.0 took 172878 usecs

 1022 12:24:49.170514  PCI: 00:15.0 scanning...

 1023 12:24:49.173660  scan_generic_bus for PCI: 00:15.0

 1024 12:24:49.180229  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1025 12:24:49.183381  scan_generic_bus for PCI: 00:15.0 done

 1026 12:24:49.190570  scan_bus: scanning of bus PCI: 00:15.0 took 14299 usecs

 1027 12:24:49.190667  PCI: 00:15.1 scanning...

 1028 12:24:49.193770  scan_generic_bus for PCI: 00:15.1

 1029 12:24:49.200121  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1030 12:24:49.203200  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1031 12:24:49.206648  scan_generic_bus for PCI: 00:15.1 done

 1032 12:24:49.213669  scan_bus: scanning of bus PCI: 00:15.1 took 18597 usecs

 1033 12:24:49.216732  PCI: 00:19.0 scanning...

 1034 12:24:49.220049  scan_generic_bus for PCI: 00:19.0

 1035 12:24:49.223687  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1036 12:24:49.226629  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1037 12:24:49.230077  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1038 12:24:49.236422  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1039 12:24:49.240375  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1040 12:24:49.243636  scan_generic_bus for PCI: 00:19.0 done

 1041 12:24:49.250426  scan_bus: scanning of bus PCI: 00:19.0 took 30724 usecs

 1042 12:24:49.250546  PCI: 00:1d.0 scanning...

 1043 12:24:49.256648  do_pci_scan_bridge for PCI: 00:1d.0

 1044 12:24:49.256734  PCI: pci_scan_bus for bus 01

 1045 12:24:49.260161  PCI: 01:00.0 [1c5c/1327] enabled

 1046 12:24:49.266827  Enabling Common Clock Configuration

 1047 12:24:49.270444  L1 Sub-State supported from root port 29

 1048 12:24:49.273687  L1 Sub-State Support = 0xf

 1049 12:24:49.276940  CommonModeRestoreTime = 0x28

 1050 12:24:49.280235  Power On Value = 0x16, Power On Scale = 0x0

 1051 12:24:49.280333  ASPM: Enabled L1

 1052 12:24:49.287091  scan_bus: scanning of bus PCI: 00:1d.0 took 32781 usecs

 1053 12:24:49.290302  PCI: 00:1e.2 scanning...

 1054 12:24:49.293753  scan_generic_bus for PCI: 00:1e.2

 1055 12:24:49.296782  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1056 12:24:49.300717  scan_generic_bus for PCI: 00:1e.2 done

 1057 12:24:49.307221  scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs

 1058 12:24:49.310416  PCI: 00:1e.3 scanning...

 1059 12:24:49.313532  scan_generic_bus for PCI: 00:1e.3

 1060 12:24:49.316594  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1061 12:24:49.320071  scan_generic_bus for PCI: 00:1e.3 done

 1062 12:24:49.326932  scan_bus: scanning of bus PCI: 00:1e.3 took 14000 usecs

 1063 12:24:49.330134  PCI: 00:1f.0 scanning...

 1064 12:24:49.333289  scan_static_bus for PCI: 00:1f.0

 1065 12:24:49.333389  PNP: 0c09.0 enabled

 1066 12:24:49.337015  scan_static_bus for PCI: 00:1f.0 done

 1067 12:24:49.343263  scan_bus: scanning of bus PCI: 00:1f.0 took 12071 usecs

 1068 12:24:49.347006  PCI: 00:1f.3 scanning...

 1069 12:24:49.350288  scan_bus: scanning of bus PCI: 00:1f.3 took 2850 usecs

 1070 12:24:49.353443  PCI: 00:1f.4 scanning...

 1071 12:24:49.356846  scan_generic_bus for PCI: 00:1f.4

 1072 12:24:49.363368  scan_generic_bus for PCI: 00:1f.4 done

 1073 12:24:49.366655  scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs

 1074 12:24:49.369835  PCI: 00:1f.5 scanning...

 1075 12:24:49.373580  scan_generic_bus for PCI: 00:1f.5

 1076 12:24:49.376587  scan_generic_bus for PCI: 00:1f.5 done

 1077 12:24:49.383453  scan_bus: scanning of bus PCI: 00:1f.5 took 10182 usecs

 1078 12:24:49.390022  scan_bus: scanning of bus DOMAIN: 0000 took 604787 usecs

 1079 12:24:49.393484  scan_static_bus for Root Device done

 1080 12:24:49.396688  scan_bus: scanning of bus Root Device took 624643 usecs

 1081 12:24:49.399802  done

 1082 12:24:49.403075  Chrome EC: UHEPI supported

 1083 12:24:49.406459  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1084 12:24:49.413613  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1085 12:24:49.420156  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1086 12:24:49.426872  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1087 12:24:49.429920  SPI flash protection: WPSW=0 SRP0=0

 1088 12:24:49.436561  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1089 12:24:49.439826  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2

 1090 12:24:49.443525  found VGA at PCI: 00:02.0

 1091 12:24:49.447378  Setting up VGA for PCI: 00:02.0

 1092 12:24:49.453624  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1093 12:24:49.456673  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1094 12:24:49.460102  Allocating resources...

 1095 12:24:49.460224  Reading resources...

 1096 12:24:49.466773  Root Device read_resources bus 0 link: 0

 1097 12:24:49.470101  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1098 12:24:49.476803  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1099 12:24:49.480020  DOMAIN: 0000 read_resources bus 0 link: 0

 1100 12:24:49.486521  PCI: 00:14.0 read_resources bus 0 link: 0

 1101 12:24:49.489684  USB0 port 0 read_resources bus 0 link: 0

 1102 12:24:49.497932  USB0 port 0 read_resources bus 0 link: 0 done

 1103 12:24:49.501487  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1104 12:24:49.508729  PCI: 00:15.0 read_resources bus 1 link: 0

 1105 12:24:49.512234  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1106 12:24:49.518885  PCI: 00:15.1 read_resources bus 2 link: 0

 1107 12:24:49.522084  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1108 12:24:49.529339  PCI: 00:19.0 read_resources bus 3 link: 0

 1109 12:24:49.536143  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1110 12:24:49.539452  PCI: 00:1d.0 read_resources bus 1 link: 0

 1111 12:24:49.546085  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1112 12:24:49.549262  PCI: 00:1e.2 read_resources bus 4 link: 0

 1113 12:24:49.556037  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1114 12:24:49.559345  PCI: 00:1e.3 read_resources bus 5 link: 0

 1115 12:24:49.566343  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1116 12:24:49.569142  PCI: 00:1f.0 read_resources bus 0 link: 0

 1117 12:24:49.576036  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1118 12:24:49.579166  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1119 12:24:49.586241  Root Device read_resources bus 0 link: 0 done

 1120 12:24:49.589511  Done reading resources.

 1121 12:24:49.592780  Show resources in subtree (Root Device)...After reading.

 1122 12:24:49.599327   Root Device child on link 0 CPU_CLUSTER: 0

 1123 12:24:49.602649    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1124 12:24:49.602773     APIC: 00

 1125 12:24:49.605881     APIC: 02

 1126 12:24:49.605994     APIC: 01

 1127 12:24:49.606095     APIC: 03

 1128 12:24:49.609853     APIC: 04

 1129 12:24:49.609962     APIC: 05

 1130 12:24:49.612865     APIC: 06

 1131 12:24:49.612985     APIC: 07

 1132 12:24:49.616136    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1133 12:24:49.626273    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1134 12:24:49.679255    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1135 12:24:49.679648     PCI: 00:00.0

 1136 12:24:49.679766     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1137 12:24:49.679909     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1138 12:24:49.680475     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1139 12:24:49.680825     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1140 12:24:49.685999     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1141 12:24:49.692424     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1142 12:24:49.703044     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1143 12:24:49.712915     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1144 12:24:49.722691     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1145 12:24:49.729354     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1146 12:24:49.739576     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1147 12:24:49.749284     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1148 12:24:49.759102     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1149 12:24:49.769590     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1150 12:24:49.779178     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1151 12:24:49.785873     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1152 12:24:49.789054     PCI: 00:02.0

 1153 12:24:49.799351     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1154 12:24:49.809432     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1155 12:24:49.819040     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1156 12:24:49.819163     PCI: 00:04.0

 1157 12:24:49.822940     PCI: 00:08.0

 1158 12:24:49.832820     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1159 12:24:49.832921     PCI: 00:12.0

 1160 12:24:49.842809     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1161 12:24:49.846037     PCI: 00:14.0 child on link 0 USB0 port 0

 1162 12:24:49.855867     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1163 12:24:49.862360      USB0 port 0 child on link 0 USB2 port 0

 1164 12:24:49.862455       USB2 port 0

 1165 12:24:49.866169       USB2 port 1

 1166 12:24:49.866260       USB2 port 2

 1167 12:24:49.869415       USB2 port 3

 1168 12:24:49.869505       USB2 port 5

 1169 12:24:49.872681       USB2 port 6

 1170 12:24:49.872772       USB2 port 9

 1171 12:24:49.875923       USB3 port 0

 1172 12:24:49.879225       USB3 port 1

 1173 12:24:49.879341       USB3 port 2

 1174 12:24:49.882449       USB3 port 3

 1175 12:24:49.882537       USB3 port 4

 1176 12:24:49.886159     PCI: 00:14.2

 1177 12:24:49.896039     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1178 12:24:49.905686     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1179 12:24:49.905825     PCI: 00:14.3

 1180 12:24:49.915538     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1181 12:24:49.919180     PCI: 00:15.0 child on link 0 I2C: 01:15

 1182 12:24:49.929117     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1183 12:24:49.932223      I2C: 01:15

 1184 12:24:49.935539     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1185 12:24:49.945488     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1186 12:24:49.948868      I2C: 02:5d

 1187 12:24:49.948990      GENERIC: 0.0

 1188 12:24:49.952050     PCI: 00:16.0

 1189 12:24:49.962348     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 12:24:49.962507     PCI: 00:17.0

 1191 12:24:49.972498     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1192 12:24:49.978752     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1193 12:24:49.988557     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1194 12:24:49.995494     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1195 12:24:50.005332     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1196 12:24:50.015412     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1197 12:24:50.018528     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1198 12:24:50.028481     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1199 12:24:50.028634      I2C: 03:1a

 1200 12:24:50.031810      I2C: 03:38

 1201 12:24:50.031949      I2C: 03:39

 1202 12:24:50.035605      I2C: 03:3a

 1203 12:24:50.035733      I2C: 03:3b

 1204 12:24:50.042123     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1205 12:24:50.048580     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1206 12:24:50.058762     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1207 12:24:50.068969     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1208 12:24:50.069177      PCI: 01:00.0

 1209 12:24:50.078745      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1210 12:24:50.082105     PCI: 00:1e.0

 1211 12:24:50.092108     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1212 12:24:50.102056     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1213 12:24:50.104998     PCI: 00:1e.2 child on link 0 SPI: 00

 1214 12:24:50.115280     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1215 12:24:50.118662      SPI: 00

 1216 12:24:50.121723     PCI: 00:1e.3 child on link 0 SPI: 01

 1217 12:24:50.131863     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1218 12:24:50.132058      SPI: 01

 1219 12:24:50.138430     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1220 12:24:50.145114     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1221 12:24:50.154507     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1222 12:24:50.158071      PNP: 0c09.0

 1223 12:24:50.164996      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1224 12:24:50.168090     PCI: 00:1f.3

 1225 12:24:50.178308     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1226 12:24:50.188129     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1227 12:24:50.188224     PCI: 00:1f.4

 1228 12:24:50.197831     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1229 12:24:50.208045     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1230 12:24:50.208173     PCI: 00:1f.5

 1231 12:24:50.217627     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1232 12:24:50.224752  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1233 12:24:50.231044  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1234 12:24:50.237474  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1235 12:24:50.240785  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1236 12:24:50.244033  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1237 12:24:50.247315  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1238 12:24:50.250677  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1239 12:24:50.257287  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1240 12:24:50.264319  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1241 12:24:50.274267  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1242 12:24:50.280598  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1243 12:24:50.287037  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1244 12:24:50.294311  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1245 12:24:50.300755  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1246 12:24:50.304049  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1247 12:24:50.310615  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1248 12:24:50.313812  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1249 12:24:50.320575  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1250 12:24:50.323610  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1251 12:24:50.330548  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1252 12:24:50.334205  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1253 12:24:50.340571  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1254 12:24:50.343819  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1255 12:24:50.347079  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1256 12:24:50.353738  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1257 12:24:50.357013  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1258 12:24:50.363639  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1259 12:24:50.366872  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1260 12:24:50.373981  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1261 12:24:50.377312  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1262 12:24:50.383884  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1263 12:24:50.387103  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1264 12:24:50.393942  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1265 12:24:50.397240  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1266 12:24:50.403618  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1267 12:24:50.406810  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1268 12:24:50.413374  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1269 12:24:50.420496  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1270 12:24:50.423838  avoid_fixed_resources: DOMAIN: 0000

 1271 12:24:50.430148  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1272 12:24:50.437138  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1273 12:24:50.443254  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1274 12:24:50.450235  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1275 12:24:50.460013  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1276 12:24:50.466489  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1277 12:24:50.473648  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1278 12:24:50.483161  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1279 12:24:50.489801  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1280 12:24:50.496154  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1281 12:24:50.503420  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1282 12:24:50.513088  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1283 12:24:50.513181  Setting resources...

 1284 12:24:50.519412  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1285 12:24:50.522710  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1286 12:24:50.529483  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1287 12:24:50.533149  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1288 12:24:50.536108  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1289 12:24:50.542767  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1290 12:24:50.549362  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1291 12:24:50.556062  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1292 12:24:50.563074  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1293 12:24:50.569787  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1294 12:24:50.573110  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1295 12:24:50.575841  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1296 12:24:50.583067  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1297 12:24:50.586209  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1298 12:24:50.592696  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1299 12:24:50.595971  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1300 12:24:50.602658  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1301 12:24:50.606448  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1302 12:24:50.613079  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1303 12:24:50.616306  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1304 12:24:50.622625  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1305 12:24:50.625928  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1306 12:24:50.632950  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1307 12:24:50.635836  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1308 12:24:50.639392  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1309 12:24:50.646003  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1310 12:24:50.649412  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1311 12:24:50.655602  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1312 12:24:50.659081  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1313 12:24:50.665880  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1314 12:24:50.669351  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1315 12:24:50.675787  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1316 12:24:50.682209  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1317 12:24:50.688741  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1318 12:24:50.695772  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1319 12:24:50.705727  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1320 12:24:50.709041  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1321 12:24:50.715679  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1322 12:24:50.722106  Root Device assign_resources, bus 0 link: 0

 1323 12:24:50.725251  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1324 12:24:50.735506  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1325 12:24:50.742111  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1326 12:24:50.752352  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1327 12:24:50.758390  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1328 12:24:50.768841  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1329 12:24:50.774920  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1330 12:24:50.778617  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1331 12:24:50.785275  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1332 12:24:50.792229  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1333 12:24:50.801737  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1334 12:24:50.808429  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1335 12:24:50.818381  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1336 12:24:50.821587  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1337 12:24:50.824877  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1338 12:24:50.835153  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1339 12:24:50.838459  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1340 12:24:50.845037  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1341 12:24:50.852234  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1342 12:24:50.861864  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1343 12:24:50.868529  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1344 12:24:50.875150  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1345 12:24:50.885274  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1346 12:24:50.891808  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1347 12:24:50.898194  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1348 12:24:50.908377  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1349 12:24:50.911382  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1350 12:24:50.918456  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1351 12:24:50.924987  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1352 12:24:50.934768  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1353 12:24:50.941288  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1354 12:24:50.947912  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1355 12:24:50.954309  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1356 12:24:50.961052  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1357 12:24:50.968128  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1358 12:24:50.977985  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1359 12:24:50.980986  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1360 12:24:50.984612  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1361 12:24:50.994928  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1362 12:24:50.998231  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1363 12:24:51.004698  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1364 12:24:51.007947  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1365 12:24:51.014540  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1366 12:24:51.018142  LPC: Trying to open IO window from 800 size 1ff

 1367 12:24:51.028020  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1368 12:24:51.034455  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1369 12:24:51.044468  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1370 12:24:51.051151  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1371 12:24:51.054442  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1372 12:24:51.061015  Root Device assign_resources, bus 0 link: 0

 1373 12:24:51.064427  Done setting resources.

 1374 12:24:51.071172  Show resources in subtree (Root Device)...After assigning values.

 1375 12:24:51.074410   Root Device child on link 0 CPU_CLUSTER: 0

 1376 12:24:51.077623    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1377 12:24:51.077718     APIC: 00

 1378 12:24:51.081287     APIC: 02

 1379 12:24:51.081377     APIC: 01

 1380 12:24:51.084405     APIC: 03

 1381 12:24:51.084496     APIC: 04

 1382 12:24:51.084567     APIC: 05

 1383 12:24:51.087524     APIC: 06

 1384 12:24:51.087617     APIC: 07

 1385 12:24:51.091142    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1386 12:24:51.100738    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1387 12:24:51.114457    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1388 12:24:51.114553     PCI: 00:00.0

 1389 12:24:51.123813     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1390 12:24:51.134137     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1391 12:24:51.143928     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1392 12:24:51.153774     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1393 12:24:51.160413     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1394 12:24:51.170158     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1395 12:24:51.180011     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1396 12:24:51.190053     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1397 12:24:51.200121     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1398 12:24:51.206656     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1399 12:24:51.216430     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1400 12:24:51.226777     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1401 12:24:51.236206     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1402 12:24:51.246237     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1403 12:24:51.256390     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1404 12:24:51.265907     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1405 12:24:51.266016     PCI: 00:02.0

 1406 12:24:51.275818     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1407 12:24:51.289228     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1408 12:24:51.296158     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1409 12:24:51.299233     PCI: 00:04.0

 1410 12:24:51.299329     PCI: 00:08.0

 1411 12:24:51.309099     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1412 12:24:51.312266     PCI: 00:12.0

 1413 12:24:51.322036     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1414 12:24:51.325648     PCI: 00:14.0 child on link 0 USB0 port 0

 1415 12:24:51.338741     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1416 12:24:51.342486      USB0 port 0 child on link 0 USB2 port 0

 1417 12:24:51.342578       USB2 port 0

 1418 12:24:51.345570       USB2 port 1

 1419 12:24:51.345662       USB2 port 2

 1420 12:24:51.348730       USB2 port 3

 1421 12:24:51.351873       USB2 port 5

 1422 12:24:51.351964       USB2 port 6

 1423 12:24:51.355623       USB2 port 9

 1424 12:24:51.355714       USB3 port 0

 1425 12:24:51.358880       USB3 port 1

 1426 12:24:51.358971       USB3 port 2

 1427 12:24:51.362291       USB3 port 3

 1428 12:24:51.362381       USB3 port 4

 1429 12:24:51.365610     PCI: 00:14.2

 1430 12:24:51.375238     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1431 12:24:51.385062     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1432 12:24:51.385154     PCI: 00:14.3

 1433 12:24:51.398198     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1434 12:24:51.401932     PCI: 00:15.0 child on link 0 I2C: 01:15

 1435 12:24:51.411932     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1436 12:24:51.412026      I2C: 01:15

 1437 12:24:51.418519     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1438 12:24:51.428388     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1439 12:24:51.428482      I2C: 02:5d

 1440 12:24:51.431648      GENERIC: 0.0

 1441 12:24:51.431739     PCI: 00:16.0

 1442 12:24:51.444894     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1443 12:24:51.444987     PCI: 00:17.0

 1444 12:24:51.454817     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1445 12:24:51.464957     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1446 12:24:51.474365     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1447 12:24:51.484864     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1448 12:24:51.491148     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1449 12:24:51.501275     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1450 12:24:51.507878     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1451 12:24:51.517662     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1452 12:24:51.517755      I2C: 03:1a

 1453 12:24:51.520867      I2C: 03:38

 1454 12:24:51.520958      I2C: 03:39

 1455 12:24:51.523881      I2C: 03:3a

 1456 12:24:51.523971      I2C: 03:3b

 1457 12:24:51.530714     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1458 12:24:51.537473     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1459 12:24:51.547447     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1460 12:24:51.560733     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1461 12:24:51.560840      PCI: 01:00.0

 1462 12:24:51.570981      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1463 12:24:51.573867     PCI: 00:1e.0

 1464 12:24:51.583883     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1465 12:24:51.593631     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1466 12:24:51.597524     PCI: 00:1e.2 child on link 0 SPI: 00

 1467 12:24:51.606839     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1468 12:24:51.610766      SPI: 00

 1469 12:24:51.613968     PCI: 00:1e.3 child on link 0 SPI: 01

 1470 12:24:51.623790     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1471 12:24:51.627042      SPI: 01

 1472 12:24:51.630150     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1473 12:24:51.640174     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1474 12:24:51.646832     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1475 12:24:51.650104      PNP: 0c09.0

 1476 12:24:51.656913      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1477 12:24:51.659968     PCI: 00:1f.3

 1478 12:24:51.670299     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1479 12:24:51.679986     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1480 12:24:51.683601     PCI: 00:1f.4

 1481 12:24:51.689527     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1482 12:24:51.700030     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1483 12:24:51.703333     PCI: 00:1f.5

 1484 12:24:51.712821     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1485 12:24:51.716110  Done allocating resources.

 1486 12:24:51.722889  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1487 12:24:51.723008  Enabling resources...

 1488 12:24:51.730283  PCI: 00:00.0 subsystem <- 8086/9b61

 1489 12:24:51.730397  PCI: 00:00.0 cmd <- 06

 1490 12:24:51.733554  PCI: 00:02.0 subsystem <- 8086/9b41

 1491 12:24:51.736867  PCI: 00:02.0 cmd <- 03

 1492 12:24:51.739996  PCI: 00:08.0 cmd <- 06

 1493 12:24:51.743678  PCI: 00:12.0 subsystem <- 8086/02f9

 1494 12:24:51.746953  PCI: 00:12.0 cmd <- 02

 1495 12:24:51.750209  PCI: 00:14.0 subsystem <- 8086/02ed

 1496 12:24:51.753636  PCI: 00:14.0 cmd <- 02

 1497 12:24:51.756868  PCI: 00:14.2 cmd <- 02

 1498 12:24:51.760116  PCI: 00:14.3 subsystem <- 8086/02f0

 1499 12:24:51.760226  PCI: 00:14.3 cmd <- 02

 1500 12:24:51.766948  PCI: 00:15.0 subsystem <- 8086/02e8

 1501 12:24:51.767062  PCI: 00:15.0 cmd <- 02

 1502 12:24:51.770064  PCI: 00:15.1 subsystem <- 8086/02e9

 1503 12:24:51.773442  PCI: 00:15.1 cmd <- 02

 1504 12:24:51.776624  PCI: 00:16.0 subsystem <- 8086/02e0

 1505 12:24:51.780383  PCI: 00:16.0 cmd <- 02

 1506 12:24:51.783813  PCI: 00:17.0 subsystem <- 8086/02d3

 1507 12:24:51.787116  PCI: 00:17.0 cmd <- 03

 1508 12:24:51.790372  PCI: 00:19.0 subsystem <- 8086/02c5

 1509 12:24:51.793408  PCI: 00:19.0 cmd <- 02

 1510 12:24:51.797016  PCI: 00:1d.0 bridge ctrl <- 0013

 1511 12:24:51.799916  PCI: 00:1d.0 subsystem <- 8086/02b0

 1512 12:24:51.803131  PCI: 00:1d.0 cmd <- 06

 1513 12:24:51.806470  PCI: 00:1e.0 subsystem <- 8086/02a8

 1514 12:24:51.809765  PCI: 00:1e.0 cmd <- 06

 1515 12:24:51.813090  PCI: 00:1e.2 subsystem <- 8086/02aa

 1516 12:24:51.816334  PCI: 00:1e.2 cmd <- 06

 1517 12:24:51.819773  PCI: 00:1e.3 subsystem <- 8086/02ab

 1518 12:24:51.819861  PCI: 00:1e.3 cmd <- 02

 1519 12:24:51.826411  PCI: 00:1f.0 subsystem <- 8086/0284

 1520 12:24:51.826501  PCI: 00:1f.0 cmd <- 407

 1521 12:24:51.829649  PCI: 00:1f.3 subsystem <- 8086/02c8

 1522 12:24:51.833262  PCI: 00:1f.3 cmd <- 02

 1523 12:24:51.836143  PCI: 00:1f.4 subsystem <- 8086/02a3

 1524 12:24:51.839641  PCI: 00:1f.4 cmd <- 03

 1525 12:24:51.843117  PCI: 00:1f.5 subsystem <- 8086/02a4

 1526 12:24:51.846137  PCI: 00:1f.5 cmd <- 406

 1527 12:24:51.855576  PCI: 01:00.0 cmd <- 02

 1528 12:24:51.860791  done.

 1529 12:24:51.872535  ME: Version: 14.0.39.1367

 1530 12:24:51.878550  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11

 1531 12:24:51.882309  Initializing devices...

 1532 12:24:51.882395  Root Device init ...

 1533 12:24:51.888807  Chrome EC: Set SMI mask to 0x0000000000000000

 1534 12:24:51.892024  Chrome EC: clear events_b mask to 0x0000000000000000

 1535 12:24:51.898742  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1536 12:24:51.905233  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1537 12:24:51.911848  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1538 12:24:51.915395  Chrome EC: Set WAKE mask to 0x0000000000000000

 1539 12:24:51.918720  Root Device init finished in 35227 usecs

 1540 12:24:51.922029  CPU_CLUSTER: 0 init ...

 1541 12:24:51.928537  CPU_CLUSTER: 0 init finished in 2448 usecs

 1542 12:24:51.932944  PCI: 00:00.0 init ...

 1543 12:24:51.936287  CPU TDP: 15 Watts

 1544 12:24:51.939678  CPU PL2 = 64 Watts

 1545 12:24:51.942864  PCI: 00:00.0 init finished in 7081 usecs

 1546 12:24:51.945973  PCI: 00:02.0 init ...

 1547 12:24:51.949335  PCI: 00:02.0 init finished in 2253 usecs

 1548 12:24:51.952594  PCI: 00:08.0 init ...

 1549 12:24:51.955957  PCI: 00:08.0 init finished in 2252 usecs

 1550 12:24:51.959377  PCI: 00:12.0 init ...

 1551 12:24:51.963059  PCI: 00:12.0 init finished in 2252 usecs

 1552 12:24:51.966313  PCI: 00:14.0 init ...

 1553 12:24:51.969735  PCI: 00:14.0 init finished in 2243 usecs

 1554 12:24:51.972974  PCI: 00:14.2 init ...

 1555 12:24:51.976301  PCI: 00:14.2 init finished in 2251 usecs

 1556 12:24:51.979473  PCI: 00:14.3 init ...

 1557 12:24:51.982616  PCI: 00:14.3 init finished in 2273 usecs

 1558 12:24:51.986320  PCI: 00:15.0 init ...

 1559 12:24:51.989361  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1560 12:24:51.992387  PCI: 00:15.0 init finished in 5977 usecs

 1561 12:24:51.996050  PCI: 00:15.1 init ...

 1562 12:24:51.999445  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1563 12:24:52.002713  PCI: 00:15.1 init finished in 5976 usecs

 1564 12:24:52.005943  PCI: 00:16.0 init ...

 1565 12:24:52.009241  PCI: 00:16.0 init finished in 2251 usecs

 1566 12:24:52.013187  PCI: 00:19.0 init ...

 1567 12:24:52.016925  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1568 12:24:52.023049  PCI: 00:19.0 init finished in 5977 usecs

 1569 12:24:52.023143  PCI: 00:1d.0 init ...

 1570 12:24:52.026806  Initializing PCH PCIe bridge.

 1571 12:24:52.030022  PCI: 00:1d.0 init finished in 5287 usecs

 1572 12:24:52.035218  PCI: 00:1f.0 init ...

 1573 12:24:52.037991  IOAPIC: Initializing IOAPIC at 0xfec00000

 1574 12:24:52.044395  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1575 12:24:52.044486  IOAPIC: ID = 0x02

 1576 12:24:52.047753  IOAPIC: Dumping registers

 1577 12:24:52.051607    reg 0x0000: 0x02000000

 1578 12:24:52.054908    reg 0x0001: 0x00770020

 1579 12:24:52.054995    reg 0x0002: 0x00000000

 1580 12:24:52.061835  PCI: 00:1f.0 init finished in 23536 usecs

 1581 12:24:52.064928  PCI: 00:1f.4 init ...

 1582 12:24:52.067765  PCI: 00:1f.4 init finished in 2261 usecs

 1583 12:24:52.079010  PCI: 01:00.0 init ...

 1584 12:24:52.082377  PCI: 01:00.0 init finished in 2252 usecs

 1585 12:24:52.086345  PNP: 0c09.0 init ...

 1586 12:24:52.089581  Google Chrome EC uptime: 11.092 seconds

 1587 12:24:52.096307  Google Chrome AP resets since EC boot: 0

 1588 12:24:52.100107  Google Chrome most recent AP reset causes:

 1589 12:24:52.106438  Google Chrome EC reset flags at last EC boot: reset-pin

 1590 12:24:52.109765  PNP: 0c09.0 init finished in 20565 usecs

 1591 12:24:52.113029  Devices initialized

 1592 12:24:52.113131  Show all devs... After init.

 1593 12:24:52.116380  Root Device: enabled 1

 1594 12:24:52.119696  CPU_CLUSTER: 0: enabled 1

 1595 12:24:52.122744  DOMAIN: 0000: enabled 1

 1596 12:24:52.122834  APIC: 00: enabled 1

 1597 12:24:52.126452  PCI: 00:00.0: enabled 1

 1598 12:24:52.129551  PCI: 00:02.0: enabled 1

 1599 12:24:52.133250  PCI: 00:04.0: enabled 0

 1600 12:24:52.133344  PCI: 00:05.0: enabled 0

 1601 12:24:52.136563  PCI: 00:12.0: enabled 1

 1602 12:24:52.139700  PCI: 00:12.5: enabled 0

 1603 12:24:52.139794  PCI: 00:12.6: enabled 0

 1604 12:24:52.142847  PCI: 00:14.0: enabled 1

 1605 12:24:52.146110  PCI: 00:14.1: enabled 0

 1606 12:24:52.149182  PCI: 00:14.3: enabled 1

 1607 12:24:52.149267  PCI: 00:14.5: enabled 0

 1608 12:24:52.153093  PCI: 00:15.0: enabled 1

 1609 12:24:52.155763  PCI: 00:15.1: enabled 1

 1610 12:24:52.159521  PCI: 00:15.2: enabled 0

 1611 12:24:52.159606  PCI: 00:15.3: enabled 0

 1612 12:24:52.162809  PCI: 00:16.0: enabled 1

 1613 12:24:52.166059  PCI: 00:16.1: enabled 0

 1614 12:24:52.169400  PCI: 00:16.2: enabled 0

 1615 12:24:52.169491  PCI: 00:16.3: enabled 0

 1616 12:24:52.172656  PCI: 00:16.4: enabled 0

 1617 12:24:52.175840  PCI: 00:16.5: enabled 0

 1618 12:24:52.179338  PCI: 00:17.0: enabled 1

 1619 12:24:52.179423  PCI: 00:19.0: enabled 1

 1620 12:24:52.182257  PCI: 00:19.1: enabled 0

 1621 12:24:52.185821  PCI: 00:19.2: enabled 0

 1622 12:24:52.185907  PCI: 00:1a.0: enabled 0

 1623 12:24:52.189183  PCI: 00:1c.0: enabled 0

 1624 12:24:52.192459  PCI: 00:1c.1: enabled 0

 1625 12:24:52.195711  PCI: 00:1c.2: enabled 0

 1626 12:24:52.195804  PCI: 00:1c.3: enabled 0

 1627 12:24:52.198827  PCI: 00:1c.4: enabled 0

 1628 12:24:52.202598  PCI: 00:1c.5: enabled 0

 1629 12:24:52.205666  PCI: 00:1c.6: enabled 0

 1630 12:24:52.205750  PCI: 00:1c.7: enabled 0

 1631 12:24:52.208853  PCI: 00:1d.0: enabled 1

 1632 12:24:52.212092  PCI: 00:1d.1: enabled 0

 1633 12:24:52.215876  PCI: 00:1d.2: enabled 0

 1634 12:24:52.215969  PCI: 00:1d.3: enabled 0

 1635 12:24:52.219250  PCI: 00:1d.4: enabled 0

 1636 12:24:52.222481  PCI: 00:1d.5: enabled 0

 1637 12:24:52.222560  PCI: 00:1e.0: enabled 1

 1638 12:24:52.225805  PCI: 00:1e.1: enabled 0

 1639 12:24:52.229081  PCI: 00:1e.2: enabled 1

 1640 12:24:52.232167  PCI: 00:1e.3: enabled 1

 1641 12:24:52.232258  PCI: 00:1f.0: enabled 1

 1642 12:24:52.235300  PCI: 00:1f.1: enabled 0

 1643 12:24:52.238871  PCI: 00:1f.2: enabled 0

 1644 12:24:52.242018  PCI: 00:1f.3: enabled 1

 1645 12:24:52.242097  PCI: 00:1f.4: enabled 1

 1646 12:24:52.245288  PCI: 00:1f.5: enabled 1

 1647 12:24:52.248920  PCI: 00:1f.6: enabled 0

 1648 12:24:52.252139  USB0 port 0: enabled 1

 1649 12:24:52.252222  I2C: 01:15: enabled 1

 1650 12:24:52.255305  I2C: 02:5d: enabled 1

 1651 12:24:52.258580  GENERIC: 0.0: enabled 1

 1652 12:24:52.258659  I2C: 03:1a: enabled 1

 1653 12:24:52.261933  I2C: 03:38: enabled 1

 1654 12:24:52.265144  I2C: 03:39: enabled 1

 1655 12:24:52.265223  I2C: 03:3a: enabled 1

 1656 12:24:52.268477  I2C: 03:3b: enabled 1

 1657 12:24:52.271701  PCI: 00:00.0: enabled 1

 1658 12:24:52.271778  SPI: 00: enabled 1

 1659 12:24:52.275083  SPI: 01: enabled 1

 1660 12:24:52.278424  PNP: 0c09.0: enabled 1

 1661 12:24:52.278524  USB2 port 0: enabled 1

 1662 12:24:52.281707  USB2 port 1: enabled 1

 1663 12:24:52.285310  USB2 port 2: enabled 0

 1664 12:24:52.285443  USB2 port 3: enabled 0

 1665 12:24:52.288421  USB2 port 5: enabled 0

 1666 12:24:52.291974  USB2 port 6: enabled 1

 1667 12:24:52.295355  USB2 port 9: enabled 1

 1668 12:24:52.295467  USB3 port 0: enabled 1

 1669 12:24:52.298636  USB3 port 1: enabled 1

 1670 12:24:52.301820  USB3 port 2: enabled 1

 1671 12:24:52.301941  USB3 port 3: enabled 1

 1672 12:24:52.305008  USB3 port 4: enabled 0

 1673 12:24:52.308241  APIC: 02: enabled 1

 1674 12:24:52.308357  APIC: 01: enabled 1

 1675 12:24:52.311957  APIC: 03: enabled 1

 1676 12:24:52.314955  APIC: 04: enabled 1

 1677 12:24:52.315068  APIC: 05: enabled 1

 1678 12:24:52.318112  APIC: 06: enabled 1

 1679 12:24:52.318223  APIC: 07: enabled 1

 1680 12:24:52.321886  PCI: 00:08.0: enabled 1

 1681 12:24:52.325045  PCI: 00:14.2: enabled 1

 1682 12:24:52.328414  PCI: 01:00.0: enabled 1

 1683 12:24:52.331737  Disabling ACPI via APMC:

 1684 12:24:52.331856  done.

 1685 12:24:52.338806  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1686 12:24:52.341882  ELOG: NV offset 0xaf0000 size 0x4000

 1687 12:24:52.348098  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1688 12:24:52.355053  ELOG: Event(17) added with size 13 at 2023-12-08 12:24:23 UTC

 1689 12:24:52.361548  ELOG: Event(92) added with size 9 at 2023-12-08 12:24:23 UTC

 1690 12:24:52.367991  ELOG: Event(93) added with size 9 at 2023-12-08 12:24:23 UTC

 1691 12:24:52.375049  ELOG: Event(9A) added with size 9 at 2023-12-08 12:24:23 UTC

 1692 12:24:52.381747  ELOG: Event(9E) added with size 10 at 2023-12-08 12:24:23 UTC

 1693 12:24:52.388188  ELOG: Event(9F) added with size 14 at 2023-12-08 12:24:23 UTC

 1694 12:24:52.391524  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1695 12:24:52.398638  ELOG: Event(A1) added with size 10 at 2023-12-08 12:24:23 UTC

 1696 12:24:52.408267  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1697 12:24:52.414849  ELOG: Event(A0) added with size 9 at 2023-12-08 12:24:23 UTC

 1698 12:24:52.418052  elog_add_boot_reason: Logged dev mode boot

 1699 12:24:52.418166  Finalize devices...

 1700 12:24:52.421825  PCI: 00:17.0 final

 1701 12:24:52.424949  Devices finalized

 1702 12:24:52.427989  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1703 12:24:52.434755  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1704 12:24:52.438543  ME: HFSTS1                  : 0x90000245

 1705 12:24:52.441794  ME: HFSTS2                  : 0x3B850126

 1706 12:24:52.448257  ME: HFSTS3                  : 0x00000020

 1707 12:24:52.451220  ME: HFSTS4                  : 0x00004800

 1708 12:24:52.455150  ME: HFSTS5                  : 0x00000000

 1709 12:24:52.458052  ME: HFSTS6                  : 0x40400006

 1710 12:24:52.461661  ME: Manufacturing Mode      : NO

 1711 12:24:52.464916  ME: FW Partition Table      : OK

 1712 12:24:52.468218  ME: Bringup Loader Failure  : NO

 1713 12:24:52.471371  ME: Firmware Init Complete  : YES

 1714 12:24:52.474650  ME: Boot Options Present    : NO

 1715 12:24:52.478040  ME: Update In Progress      : NO

 1716 12:24:52.481322  ME: D0i3 Support            : YES

 1717 12:24:52.484731  ME: Low Power State Enabled : NO

 1718 12:24:52.487944  ME: CPU Replaced            : NO

 1719 12:24:52.491102  ME: CPU Replacement Valid   : YES

 1720 12:24:52.494451  ME: Current Working State   : 5

 1721 12:24:52.497919  ME: Current Operation State : 1

 1722 12:24:52.501081  ME: Current Operation Mode  : 0

 1723 12:24:52.504361  ME: Error Code              : 0

 1724 12:24:52.508166  ME: CPU Debug Disabled      : YES

 1725 12:24:52.511043  ME: TXT Support             : NO

 1726 12:24:52.517644  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1727 12:24:52.520918  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1728 12:24:52.524185  CBFS @ c08000 size 3f8000

 1729 12:24:52.530714  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1730 12:24:52.534397  CBFS: Locating 'fallback/dsdt.aml'

 1731 12:24:52.537343  CBFS: Found @ offset 10bb80 size 3fa5

 1732 12:24:52.544390  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1733 12:24:52.547488  CBFS @ c08000 size 3f8000

 1734 12:24:52.550490  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1735 12:24:52.553917  CBFS: Locating 'fallback/slic'

 1736 12:24:52.559009  CBFS: 'fallback/slic' not found.

 1737 12:24:52.565591  ACPI: Writing ACPI tables at 99b3e000.

 1738 12:24:52.565708  ACPI:    * FACS

 1739 12:24:52.568894  ACPI:    * DSDT

 1740 12:24:52.571956  Ramoops buffer: 0x100000@0x99a3d000.

 1741 12:24:52.575285  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1742 12:24:52.582498  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1743 12:24:52.585710  Google Chrome EC: version:

 1744 12:24:52.589008  	ro: helios_v2.0.2659-56403530b

 1745 12:24:52.591677  	rw: helios_v2.0.2849-c41de27e7d

 1746 12:24:52.591790    running image: 1

 1747 12:24:52.596125  ACPI:    * FADT

 1748 12:24:52.596231  SCI is IRQ9

 1749 12:24:52.602726  ACPI: added table 1/32, length now 40

 1750 12:24:52.602847  ACPI:     * SSDT

 1751 12:24:52.606024  Found 1 CPU(s) with 8 core(s) each.

 1752 12:24:52.609292  Error: Could not locate 'wifi_sar' in VPD.

 1753 12:24:52.616476  Checking CBFS for default SAR values

 1754 12:24:52.619527  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1755 12:24:52.622526  CBFS @ c08000 size 3f8000

 1756 12:24:52.629187  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1757 12:24:52.632404  CBFS: Locating 'wifi_sar_defaults.hex'

 1758 12:24:52.636610  CBFS: Found @ offset 5fac0 size 77

 1759 12:24:52.639122  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1760 12:24:52.645898  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1761 12:24:52.649024  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1762 12:24:52.656122  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1763 12:24:52.659276  failed to find key in VPD: dsm_calib_r0_0

 1764 12:24:52.668854  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1765 12:24:52.672638  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1766 12:24:52.675557  failed to find key in VPD: dsm_calib_r0_1

 1767 12:24:52.685732  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1768 12:24:52.692091  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1769 12:24:52.695370  failed to find key in VPD: dsm_calib_r0_2

 1770 12:24:52.705244  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1771 12:24:52.708571  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1772 12:24:52.715207  failed to find key in VPD: dsm_calib_r0_3

 1773 12:24:52.722439  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1774 12:24:52.728945  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1775 12:24:52.732026  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1776 12:24:52.735432  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1777 12:24:52.739476  EC returned error result code 1

 1778 12:24:52.742699  EC returned error result code 1

 1779 12:24:52.746609  EC returned error result code 1

 1780 12:24:52.753622  PS2K: Bad resp from EC. Vivaldi disabled!

 1781 12:24:52.756873  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1782 12:24:52.763319  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1783 12:24:52.770236  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1784 12:24:52.773131  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1785 12:24:52.780107  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1786 12:24:52.786630  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1787 12:24:52.793340  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1788 12:24:52.796588  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1789 12:24:52.799621  ACPI: added table 2/32, length now 44

 1790 12:24:52.803225  ACPI:    * MCFG

 1791 12:24:52.806412  ACPI: added table 3/32, length now 48

 1792 12:24:52.809811  ACPI:    * TPM2

 1793 12:24:52.813090  TPM2 log created at 99a2d000

 1794 12:24:52.816448  ACPI: added table 4/32, length now 52

 1795 12:24:52.816557  ACPI:    * MADT

 1796 12:24:52.819748  SCI is IRQ9

 1797 12:24:52.823028  ACPI: added table 5/32, length now 56

 1798 12:24:52.823139  current = 99b43ac0

 1799 12:24:52.826417  ACPI:    * DMAR

 1800 12:24:52.829694  ACPI: added table 6/32, length now 60

 1801 12:24:52.833036  ACPI:    * IGD OpRegion

 1802 12:24:52.833152  GMA: Found VBT in CBFS

 1803 12:24:52.836266  GMA: Found valid VBT in CBFS

 1804 12:24:52.839400  ACPI: added table 7/32, length now 64

 1805 12:24:52.843023  ACPI:    * HPET

 1806 12:24:52.846360  ACPI: added table 8/32, length now 68

 1807 12:24:52.846468  ACPI: done.

 1808 12:24:52.849882  ACPI tables: 31744 bytes.

 1809 12:24:52.853209  smbios_write_tables: 99a2c000

 1810 12:24:52.856527  EC returned error result code 3

 1811 12:24:52.859642  Couldn't obtain OEM name from CBI

 1812 12:24:52.862706  Create SMBIOS type 17

 1813 12:24:52.866518  PCI: 00:00.0 (Intel Cannonlake)

 1814 12:24:52.869741  PCI: 00:14.3 (Intel WiFi)

 1815 12:24:52.873012  SMBIOS tables: 939 bytes.

 1816 12:24:52.876060  Writing table forward entry at 0x00000500

 1817 12:24:52.883052  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1818 12:24:52.886218  Writing coreboot table at 0x99b62000

 1819 12:24:52.892723   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1820 12:24:52.896064   1. 0000000000001000-000000000009ffff: RAM

 1821 12:24:52.899121   2. 00000000000a0000-00000000000fffff: RESERVED

 1822 12:24:52.905787   3. 0000000000100000-0000000099a2bfff: RAM

 1823 12:24:52.908902   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1824 12:24:52.915746   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1825 12:24:52.922784   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1826 12:24:52.926081   7. 000000009a000000-000000009f7fffff: RESERVED

 1827 12:24:52.932081   8. 00000000e0000000-00000000efffffff: RESERVED

 1828 12:24:52.935450   9. 00000000fc000000-00000000fc000fff: RESERVED

 1829 12:24:52.938810  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1830 12:24:52.945361  11. 00000000fed10000-00000000fed17fff: RESERVED

 1831 12:24:52.948631  12. 00000000fed80000-00000000fed83fff: RESERVED

 1832 12:24:52.955669  13. 00000000fed90000-00000000fed91fff: RESERVED

 1833 12:24:52.958765  14. 00000000feda0000-00000000feda1fff: RESERVED

 1834 12:24:52.961918  15. 0000000100000000-000000045e7fffff: RAM

 1835 12:24:52.968571  Graphics framebuffer located at 0xc0000000

 1836 12:24:52.972008  Passing 5 GPIOs to payload:

 1837 12:24:52.975306              NAME |       PORT | POLARITY |     VALUE

 1838 12:24:52.982285     write protect |  undefined |     high |       low

 1839 12:24:52.985520               lid |  undefined |     high |      high

 1840 12:24:52.991917             power |  undefined |     high |       low

 1841 12:24:52.998516             oprom |  undefined |     high |       low

 1842 12:24:53.001820          EC in RW | 0x000000cb |     high |       low

 1843 12:24:53.005107  Board ID: 4

 1844 12:24:53.008312  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1845 12:24:53.011640  CBFS @ c08000 size 3f8000

 1846 12:24:53.018729  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1847 12:24:53.021847  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264

 1848 12:24:53.024980  coreboot table: 1492 bytes.

 1849 12:24:53.028121  IMD ROOT    0. 99fff000 00001000

 1850 12:24:53.031407  IMD SMALL   1. 99ffe000 00001000

 1851 12:24:53.035283  FSP MEMORY  2. 99c4e000 003b0000

 1852 12:24:53.038583  CONSOLE     3. 99c2e000 00020000

 1853 12:24:53.041930  FMAP        4. 99c2d000 0000054e

 1854 12:24:53.045303  TIME STAMP  5. 99c2c000 00000910

 1855 12:24:53.048573  VBOOT WORK  6. 99c18000 00014000

 1856 12:24:53.051860  MRC DATA    7. 99c16000 00001958

 1857 12:24:53.055228  ROMSTG STCK 8. 99c15000 00001000

 1858 12:24:53.058507  AFTER CAR   9. 99c0b000 0000a000

 1859 12:24:53.061568  RAMSTAGE   10. 99baf000 0005c000

 1860 12:24:53.065236  REFCODE    11. 99b7a000 00035000

 1861 12:24:53.068454  SMM BACKUP 12. 99b6a000 00010000

 1862 12:24:53.071763  COREBOOT   13. 99b62000 00008000

 1863 12:24:53.074945  ACPI       14. 99b3e000 00024000

 1864 12:24:53.078184  ACPI GNVS  15. 99b3d000 00001000

 1865 12:24:53.081354  RAMOOPS    16. 99a3d000 00100000

 1866 12:24:53.085156  TPM2 TCGLOG17. 99a2d000 00010000

 1867 12:24:53.088105  SMBIOS     18. 99a2c000 00000800

 1868 12:24:53.091577  IMD small region:

 1869 12:24:53.094937    IMD ROOT    0. 99ffec00 00000400

 1870 12:24:53.098229    FSP RUNTIME 1. 99ffebe0 00000004

 1871 12:24:53.101585    EC HOSTEVENT 2. 99ffebc0 00000008

 1872 12:24:53.105109    POWER STATE 3. 99ffeb80 00000040

 1873 12:24:53.108339    ROMSTAGE    4. 99ffeb60 00000004

 1874 12:24:53.112112    MEM INFO    5. 99ffe9a0 000001b9

 1875 12:24:53.114852    VPD         6. 99ffe920 0000006c

 1876 12:24:53.117991  MTRR: Physical address space:

 1877 12:24:53.124778  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1878 12:24:53.131610  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1879 12:24:53.137882  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1880 12:24:53.144354  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1881 12:24:53.150934  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1882 12:24:53.158062  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1883 12:24:53.161475  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1884 12:24:53.167953  MTRR: Fixed MSR 0x250 0x0606060606060606

 1885 12:24:53.171063  MTRR: Fixed MSR 0x258 0x0606060606060606

 1886 12:24:53.174144  MTRR: Fixed MSR 0x259 0x0000000000000000

 1887 12:24:53.177537  MTRR: Fixed MSR 0x268 0x0606060606060606

 1888 12:24:53.184081  MTRR: Fixed MSR 0x269 0x0606060606060606

 1889 12:24:53.187311  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1890 12:24:53.191312  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1891 12:24:53.193945  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1892 12:24:53.201069  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1893 12:24:53.204318  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1894 12:24:53.207329  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1895 12:24:53.210984  call enable_fixed_mtrr()

 1896 12:24:53.213839  CPU physical address size: 39 bits

 1897 12:24:53.217132  MTRR: default type WB/UC MTRR counts: 6/8.

 1898 12:24:53.220590  MTRR: WB selected as default type.

 1899 12:24:53.227628  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1900 12:24:53.234005  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1901 12:24:53.240955  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1902 12:24:53.247435  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1903 12:24:53.254039  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1904 12:24:53.260558  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1905 12:24:53.263823  MTRR: Fixed MSR 0x250 0x0606060606060606

 1906 12:24:53.267112  MTRR: Fixed MSR 0x258 0x0606060606060606

 1907 12:24:53.273560  MTRR: Fixed MSR 0x259 0x0000000000000000

 1908 12:24:53.277307  MTRR: Fixed MSR 0x268 0x0606060606060606

 1909 12:24:53.280494  MTRR: Fixed MSR 0x269 0x0606060606060606

 1910 12:24:53.283717  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1911 12:24:53.290403  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1912 12:24:53.293624  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1913 12:24:53.296778  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1914 12:24:53.300037  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1915 12:24:53.306526  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1916 12:24:53.306641  

 1917 12:24:53.306749  MTRR check

 1918 12:24:53.310507  call enable_fixed_mtrr()

 1919 12:24:53.313939  Fixed MTRRs   : Enabled

 1920 12:24:53.314039  Variable MTRRs: Enabled

 1921 12:24:53.314113  

 1922 12:24:53.317378  CPU physical address size: 39 bits

 1923 12:24:53.323351  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1924 12:24:53.326536  MTRR: Fixed MSR 0x250 0x0606060606060606

 1925 12:24:53.333197  MTRR: Fixed MSR 0x250 0x0606060606060606

 1926 12:24:53.336596  MTRR: Fixed MSR 0x258 0x0606060606060606

 1927 12:24:53.339915  MTRR: Fixed MSR 0x259 0x0000000000000000

 1928 12:24:53.343378  MTRR: Fixed MSR 0x268 0x0606060606060606

 1929 12:24:53.349795  MTRR: Fixed MSR 0x269 0x0606060606060606

 1930 12:24:53.353312  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1931 12:24:53.356382  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1932 12:24:53.360022  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1933 12:24:53.363118  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1934 12:24:53.369738  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1935 12:24:53.372993  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1936 12:24:53.376227  MTRR: Fixed MSR 0x258 0x0606060606060606

 1937 12:24:53.379546  call enable_fixed_mtrr()

 1938 12:24:53.386255  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1939 12:24:53.390054  CPU physical address size: 39 bits

 1940 12:24:53.392811  MTRR: Fixed MSR 0x259 0x0000000000000000

 1941 12:24:53.396031  MTRR: Fixed MSR 0x268 0x0606060606060606

 1942 12:24:53.399842  MTRR: Fixed MSR 0x269 0x0606060606060606

 1943 12:24:53.406256  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1944 12:24:53.409564  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1945 12:24:53.412887  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1946 12:24:53.416164  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1947 12:24:53.422704  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1948 12:24:53.425910  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1949 12:24:53.429356  MTRR: Fixed MSR 0x250 0x0606060606060606

 1950 12:24:53.432762  MTRR: Fixed MSR 0x250 0x0606060606060606

 1951 12:24:53.439306  MTRR: Fixed MSR 0x258 0x0606060606060606

 1952 12:24:53.442403  MTRR: Fixed MSR 0x259 0x0000000000000000

 1953 12:24:53.445976  MTRR: Fixed MSR 0x268 0x0606060606060606

 1954 12:24:53.449084  MTRR: Fixed MSR 0x269 0x0606060606060606

 1955 12:24:53.455576  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1956 12:24:53.458955  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1957 12:24:53.462379  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1958 12:24:53.465995  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1959 12:24:53.468892  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1960 12:24:53.475560  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1961 12:24:53.479016  MTRR: Fixed MSR 0x258 0x0606060606060606

 1962 12:24:53.482171  call enable_fixed_mtrr()

 1963 12:24:53.485435  MTRR: Fixed MSR 0x259 0x0000000000000000

 1964 12:24:53.488867  MTRR: Fixed MSR 0x268 0x0606060606060606

 1965 12:24:53.492121  MTRR: Fixed MSR 0x269 0x0606060606060606

 1966 12:24:53.498680  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1967 12:24:53.502012  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1968 12:24:53.505252  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1969 12:24:53.508496  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1970 12:24:53.514980  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1971 12:24:53.518307  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1972 12:24:53.521660  CPU physical address size: 39 bits

 1973 12:24:53.525591  call enable_fixed_mtrr()

 1974 12:24:53.528880  MTRR: Fixed MSR 0x250 0x0606060606060606

 1975 12:24:53.532141  MTRR: Fixed MSR 0x250 0x0606060606060606

 1976 12:24:53.538203  MTRR: Fixed MSR 0x258 0x0606060606060606

 1977 12:24:53.541493  MTRR: Fixed MSR 0x259 0x0000000000000000

 1978 12:24:53.545378  MTRR: Fixed MSR 0x268 0x0606060606060606

 1979 12:24:53.548708  MTRR: Fixed MSR 0x269 0x0606060606060606

 1980 12:24:53.555367  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1981 12:24:53.558067  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1982 12:24:53.561331  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1983 12:24:53.565304  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1984 12:24:53.568156  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1985 12:24:53.574841  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1986 12:24:53.578005  MTRR: Fixed MSR 0x258 0x0606060606060606

 1987 12:24:53.581584  call enable_fixed_mtrr()

 1988 12:24:53.584509  MTRR: Fixed MSR 0x259 0x0000000000000000

 1989 12:24:53.587974  MTRR: Fixed MSR 0x268 0x0606060606060606

 1990 12:24:53.594900  MTRR: Fixed MSR 0x269 0x0606060606060606

 1991 12:24:53.598180  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1992 12:24:53.601205  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1993 12:24:53.604902  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1994 12:24:53.608100  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1995 12:24:53.614568  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1996 12:24:53.617825  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1997 12:24:53.621066  CPU physical address size: 39 bits

 1998 12:24:53.624333  call enable_fixed_mtrr()

 1999 12:24:53.627658  CPU physical address size: 39 bits

 2000 12:24:53.631022  CPU physical address size: 39 bits

 2001 12:24:53.634381  call enable_fixed_mtrr()

 2002 12:24:53.637695  CBFS @ c08000 size 3f8000

 2003 12:24:53.641487  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 2004 12:24:53.644546  CBFS: Locating 'fallback/payload'

 2005 12:24:53.647591  CPU physical address size: 39 bits

 2006 12:24:53.654113  CBFS: Found @ offset 1c96c0 size 3f798

 2007 12:24:53.657807  Checking segment from ROM address 0xffdd16f8

 2008 12:24:53.660956  Checking segment from ROM address 0xffdd1714

 2009 12:24:53.667530  Loading segment from ROM address 0xffdd16f8

 2010 12:24:53.667643    code (compression=0)

 2011 12:24:53.677342    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 2012 12:24:53.684100  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 2013 12:24:53.687310  it's not compressed!

 2014 12:24:53.780319  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2015 12:24:53.786954  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2016 12:24:53.789989  Loading segment from ROM address 0xffdd1714

 2017 12:24:53.793138    Entry Point 0x30000000

 2018 12:24:53.796427  Loaded segments

 2019 12:24:53.802361  Finalizing chipset.

 2020 12:24:53.805527  Finalizing SMM.

 2021 12:24:53.808884  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2022 12:24:53.812051  mp_park_aps done after 0 msecs.

 2023 12:24:53.819156  Jumping to boot code at 30000000(99b62000)

 2024 12:24:53.825354  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2025 12:24:53.825471  

 2026 12:24:53.825574  

 2027 12:24:53.825672  

 2028 12:24:53.828982  Starting depthcharge on Helios...

 2029 12:24:53.829074  

 2030 12:24:53.829459  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2031 12:24:53.829583  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2032 12:24:53.829681  Setting prompt string to ['hatch:']
 2033 12:24:53.829772  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2034 12:24:53.838901  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2035 12:24:53.839030  

 2036 12:24:53.845170  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2037 12:24:53.845298  

 2038 12:24:53.851825  board_setup: Info: eMMC controller not present; skipping

 2039 12:24:53.852005  

 2040 12:24:53.855122  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2041 12:24:53.855332  

 2042 12:24:53.862040  board_setup: Info: SDHCI controller not present; skipping

 2043 12:24:53.862310  

 2044 12:24:53.865364  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2045 12:24:53.868610  

 2046 12:24:53.868884  Wipe memory regions:

 2047 12:24:53.869119  

 2048 12:24:53.872346  	[0x00000000001000, 0x000000000a0000)

 2049 12:24:53.872719  

 2050 12:24:53.875659  	[0x00000000100000, 0x00000030000000)

 2051 12:24:53.941685  

 2052 12:24:53.944713  	[0x00000030657430, 0x00000099a2c000)

 2053 12:24:54.090959  

 2054 12:24:54.094279  	[0x00000100000000, 0x0000045e800000)

 2055 12:24:55.550473  

 2056 12:24:55.550665  R8152: Initializing

 2057 12:24:55.550778  

 2058 12:24:55.554014  Version 9 (ocp_data = 6010)

 2059 12:24:55.558168  

 2060 12:24:55.558286  R8152: Done initializing

 2061 12:24:55.558391  

 2062 12:24:55.561395  Adding net device

 2063 12:24:56.044197  

 2064 12:24:56.044378  R8152: Initializing

 2065 12:24:56.044489  

 2066 12:24:56.047381  Version 6 (ocp_data = 5c30)

 2067 12:24:56.047484  

 2068 12:24:56.050694  R8152: Done initializing

 2069 12:24:56.050802  

 2070 12:24:56.053828  net_add_device: Attemp to include the same device

 2071 12:24:56.057804  

 2072 12:24:56.064376  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2073 12:24:56.064497  

 2074 12:24:56.064599  

 2075 12:24:56.064716  

 2076 12:24:56.065049  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2078 12:24:56.165440  hatch: tftpboot 192.168.201.1 12217955/tftp-deploy-ckoqv04n/kernel/bzImage 12217955/tftp-deploy-ckoqv04n/kernel/cmdline 12217955/tftp-deploy-ckoqv04n/ramdisk/ramdisk.cpio.gz

 2079 12:24:56.165652  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2080 12:24:56.165782  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2081 12:24:56.170273  tftpboot 192.168.201.1 12217955/tftp-deploy-ckoqv04n/kernel/bzIploy-ckoqv04n/kernel/cmdline 12217955/tftp-deploy-ckoqv04n/ramdisk/ramdisk.cpio.gz

 2082 12:24:56.170393  

 2083 12:24:56.170500  Waiting for link

 2084 12:24:56.370914  

 2085 12:24:56.371108  done.

 2086 12:24:56.371231  

 2087 12:24:56.371345  MAC: 00:24:32:50:1a:59

 2088 12:24:56.371451  

 2089 12:24:56.374026  Sending DHCP discover... done.

 2090 12:24:56.374144  

 2091 12:24:56.377880  Waiting for reply... done.

 2092 12:24:56.377998  

 2093 12:24:56.380846  Sending DHCP request... done.

 2094 12:24:56.380961  

 2095 12:24:56.384509  Waiting for reply... done.

 2096 12:24:56.384632  

 2097 12:24:56.387501  My ip is 192.168.201.14

 2098 12:24:56.387614  

 2099 12:24:56.390854  The DHCP server ip is 192.168.201.1

 2100 12:24:56.390967  

 2101 12:24:56.394019  TFTP server IP predefined by user: 192.168.201.1

 2102 12:24:56.394130  

 2103 12:24:56.400819  Bootfile predefined by user: 12217955/tftp-deploy-ckoqv04n/kernel/bzImage

 2104 12:24:56.400941  

 2105 12:24:56.404086  Sending tftp read request... done.

 2106 12:24:56.404203  

 2107 12:24:56.411346  Waiting for the transfer... 

 2108 12:24:56.411465  

 2109 12:24:56.965092  00000000 ################################################################

 2110 12:24:56.965344  

 2111 12:24:57.507000  00080000 ################################################################

 2112 12:24:57.507164  

 2113 12:24:58.048644  00100000 ################################################################

 2114 12:24:58.048800  

 2115 12:24:58.609651  00180000 ################################################################

 2116 12:24:58.609794  

 2117 12:24:59.159670  00200000 ################################################################

 2118 12:24:59.159838  

 2119 12:24:59.721246  00280000 ################################################################

 2120 12:24:59.721429  

 2121 12:25:00.304855  00300000 ################################################################

 2122 12:25:00.305013  

 2123 12:25:00.939751  00380000 ################################################################

 2124 12:25:00.939945  

 2125 12:25:01.509277  00400000 ################################################################

 2126 12:25:01.509439  

 2127 12:25:02.065805  00480000 ################################################################

 2128 12:25:02.065972  

 2129 12:25:02.621552  00500000 ################################################################

 2130 12:25:02.621715  

 2131 12:25:03.171845  00580000 ################################################################

 2132 12:25:03.171997  

 2133 12:25:03.725911  00600000 ################################################################

 2134 12:25:03.726068  

 2135 12:25:04.280045  00680000 ################################################################

 2136 12:25:04.280229  

 2137 12:25:04.836630  00700000 ################################################################

 2138 12:25:04.836791  

 2139 12:25:05.386117  00780000 ################################################################

 2140 12:25:05.386306  

 2141 12:25:05.998369  00800000 ################################################################

 2142 12:25:05.998534  

 2143 12:25:06.571852  00880000 ################################################################

 2144 12:25:06.572047  

 2145 12:25:07.114832  00900000 ################################################################

 2146 12:25:07.115022  

 2147 12:25:07.672856  00980000 ################################################################

 2148 12:25:07.673024  

 2149 12:25:08.219859  00a00000 ################################################################

 2150 12:25:08.220020  

 2151 12:25:08.771259  00a80000 ################################################################

 2152 12:25:08.771432  

 2153 12:25:08.811017  00b00000 ##### done.

 2154 12:25:08.811120  

 2155 12:25:08.814241  The bootfile was 11571200 bytes long.

 2156 12:25:08.814330  

 2157 12:25:08.817493  Sending tftp read request... done.

 2158 12:25:08.817578  

 2159 12:25:08.820433  Waiting for the transfer... 

 2160 12:25:08.820517  

 2161 12:25:09.376318  00000000 ################################################################

 2162 12:25:09.376470  

 2163 12:25:09.926762  00080000 ################################################################

 2164 12:25:09.926926  

 2165 12:25:10.465509  00100000 ################################################################

 2166 12:25:10.465684  

 2167 12:25:11.010145  00180000 ################################################################

 2168 12:25:11.010311  

 2169 12:25:11.554498  00200000 ################################################################

 2170 12:25:11.554661  

 2171 12:25:12.100072  00280000 ################################################################

 2172 12:25:12.100275  

 2173 12:25:12.645874  00300000 ################################################################

 2174 12:25:12.646031  

 2175 12:25:13.191650  00380000 ################################################################

 2176 12:25:13.191807  

 2177 12:25:13.740434  00400000 ################################################################

 2178 12:25:13.740598  

 2179 12:25:14.286155  00480000 ################################################################

 2180 12:25:14.286323  

 2181 12:25:14.831469  00500000 ################################################################

 2182 12:25:14.831635  

 2183 12:25:15.230937  00580000 ################################################ done.

 2184 12:25:15.231099  

 2185 12:25:15.234285  Sending tftp read request... done.

 2186 12:25:15.234374  

 2187 12:25:15.237469  Waiting for the transfer... 

 2188 12:25:15.237564  

 2189 12:25:15.240660  00000000 # done.

 2190 12:25:15.240757  

 2191 12:25:15.247302  Command line loaded dynamically from TFTP file: 12217955/tftp-deploy-ckoqv04n/kernel/cmdline

 2192 12:25:15.247396  

 2193 12:25:15.277283  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12217955/extract-nfsrootfs-8g8ypp8e,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2194 12:25:15.277384  

 2195 12:25:15.283985  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2196 12:25:15.288655  

 2197 12:25:15.291910  Shutting down all USB controllers.

 2198 12:25:15.292003  

 2199 12:25:15.292076  Removing current net device

 2200 12:25:15.295838  

 2201 12:25:15.295933  Finalizing coreboot

 2202 12:25:15.296048  

 2203 12:25:15.302207  Exiting depthcharge with code 4 at timestamp: 28819648

 2204 12:25:15.302303  

 2205 12:25:15.302399  

 2206 12:25:15.302490  Starting kernel ...

 2207 12:25:15.302578  

 2208 12:25:15.302686  

 2209 12:25:15.303353  end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
 2210 12:25:15.303504  start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
 2211 12:25:15.303626  Setting prompt string to ['Linux version [0-9]']
 2212 12:25:15.303720  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2213 12:25:15.303815  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2215 12:29:35.304755  end: 2.2.5 auto-login-action (duration 00:04:20) [common]
 2217 12:29:35.306286  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
 2219 12:29:35.307554  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2222 12:29:35.309739  end: 2 depthcharge-action (duration 00:05:00) [common]
 2224 12:29:35.310888  Cleaning after the job
 2225 12:29:35.311436  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217955/tftp-deploy-ckoqv04n/ramdisk
 2226 12:29:35.315884  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217955/tftp-deploy-ckoqv04n/kernel
 2227 12:29:35.324343  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217955/tftp-deploy-ckoqv04n/nfsrootfs
 2228 12:29:35.950970  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217955/tftp-deploy-ckoqv04n/modules
 2229 12:29:35.954106  start: 4.1 power-off (timeout 00:00:30) [common]
 2230 12:29:35.955047  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
 2231 12:29:36.070974  >> Command sent successfully.

 2232 12:29:36.082537  Returned 0 in 0 seconds
 2233 12:29:36.183739  end: 4.1 power-off (duration 00:00:00) [common]
 2235 12:29:36.185196  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2236 12:29:36.186374  Listened to connection for namespace 'common' for up to 1s
 2238 12:29:36.187613  Listened to connection for namespace 'common' for up to 1s
 2239 12:29:37.186934  Finalising connection for namespace 'common'
 2240 12:29:37.187255  Disconnecting from shell: Finalise
 2241 12:29:37.187434  
 2242 12:29:37.287932  end: 4.2 read-feedback (duration 00:00:01) [common]
 2243 12:29:37.288187  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12217955
 2244 12:29:37.928039  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12217955
 2245 12:29:37.928234  JobError: Your job cannot terminate cleanly.