Boot log: asus-C436FA-Flip-hatch

    1 12:17:46.632992  lava-dispatcher, installed at version: 2023.10
    2 12:17:46.633252  start: 0 validate
    3 12:17:46.633409  Start time: 2023-12-08 12:17:46.633401+00:00 (UTC)
    4 12:17:46.633561  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:17:46.633720  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:17:46.977913  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:17:46.978104  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:17:47.260763  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:17:47.260976  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:17:52.401789  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:17:52.401981  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:17:52.712084  validate duration: 6.08
   14 12:17:52.712587  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:17:52.712756  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:17:52.712938  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:17:52.713169  Not decompressing ramdisk as can be used compressed.
   18 12:17:52.713323  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
   19 12:17:52.713440  saving as /var/lib/lava/dispatcher/tmp/12217844/tftp-deploy-znwc3b_d/ramdisk/initrd.cpio.gz
   20 12:17:52.713591  total size: 5432480 (5 MB)
   21 12:17:53.859452  progress   0 % (0 MB)
   22 12:17:53.863656  progress   5 % (0 MB)
   23 12:17:53.870100  progress  10 % (0 MB)
   24 12:17:53.875371  progress  15 % (0 MB)
   25 12:17:53.882912  progress  20 % (1 MB)
   26 12:17:53.888006  progress  25 % (1 MB)
   27 12:17:53.893004  progress  30 % (1 MB)
   28 12:17:53.898179  progress  35 % (1 MB)
   29 12:17:53.902135  progress  40 % (2 MB)
   30 12:17:53.908162  progress  45 % (2 MB)
   31 12:17:53.913166  progress  50 % (2 MB)
   32 12:17:53.918915  progress  55 % (2 MB)
   33 12:17:53.923435  progress  60 % (3 MB)
   34 12:17:53.927434  progress  65 % (3 MB)
   35 12:17:53.933110  progress  70 % (3 MB)
   36 12:17:53.936592  progress  75 % (3 MB)
   37 12:17:53.942436  progress  80 % (4 MB)
   38 12:17:53.949083  progress  85 % (4 MB)
   39 12:17:53.955362  progress  90 % (4 MB)
   40 12:17:53.960111  progress  95 % (4 MB)
   41 12:17:53.965971  progress 100 % (5 MB)
   42 12:17:53.966387  5 MB downloaded in 1.25 s (4.14 MB/s)
   43 12:17:53.966656  end: 1.1.1 http-download (duration 00:00:01) [common]
   45 12:17:53.967080  end: 1.1 download-retry (duration 00:00:01) [common]
   46 12:17:53.967221  start: 1.2 download-retry (timeout 00:09:59) [common]
   47 12:17:53.967358  start: 1.2.1 http-download (timeout 00:09:59) [common]
   48 12:17:53.967581  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   49 12:17:53.967698  saving as /var/lib/lava/dispatcher/tmp/12217844/tftp-deploy-znwc3b_d/kernel/bzImage
   50 12:17:53.967797  total size: 11571200 (11 MB)
   51 12:17:53.967909  No compression specified
   52 12:17:53.969685  progress   0 % (0 MB)
   53 12:17:53.975025  progress   5 % (0 MB)
   54 12:17:53.980585  progress  10 % (1 MB)
   55 12:17:53.985806  progress  15 % (1 MB)
   56 12:17:53.990808  progress  20 % (2 MB)
   57 12:17:53.996340  progress  25 % (2 MB)
   58 12:17:54.001615  progress  30 % (3 MB)
   59 12:17:54.007190  progress  35 % (3 MB)
   60 12:17:54.012715  progress  40 % (4 MB)
   61 12:17:54.017963  progress  45 % (4 MB)
   62 12:17:54.023501  progress  50 % (5 MB)
   63 12:17:54.029079  progress  55 % (6 MB)
   64 12:17:54.034287  progress  60 % (6 MB)
   65 12:17:54.039732  progress  65 % (7 MB)
   66 12:17:54.045201  progress  70 % (7 MB)
   67 12:17:54.050406  progress  75 % (8 MB)
   68 12:17:54.056054  progress  80 % (8 MB)
   69 12:17:54.061198  progress  85 % (9 MB)
   70 12:17:54.064626  progress  90 % (9 MB)
   71 12:17:54.068331  progress  95 % (10 MB)
   72 12:17:54.072119  progress 100 % (11 MB)
   73 12:17:54.072321  11 MB downloaded in 0.10 s (105.58 MB/s)
   74 12:17:54.072500  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:17:54.072760  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:17:54.072864  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 12:17:54.072961  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 12:17:54.073118  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
   80 12:17:54.073197  saving as /var/lib/lava/dispatcher/tmp/12217844/tftp-deploy-znwc3b_d/nfsrootfs/full.rootfs.tar
   81 12:17:54.073267  total size: 207157356 (197 MB)
   82 12:17:54.073337  Using unxz to decompress xz
   83 12:17:54.084863  progress   0 % (0 MB)
   84 12:17:54.737797  progress   5 % (9 MB)
   85 12:17:55.351587  progress  10 % (19 MB)
   86 12:17:56.087105  progress  15 % (29 MB)
   87 12:17:56.511618  progress  20 % (39 MB)
   88 12:17:56.943462  progress  25 % (49 MB)
   89 12:17:57.674143  progress  30 % (59 MB)
   90 12:17:58.391818  progress  35 % (69 MB)
   91 12:17:59.143347  progress  40 % (79 MB)
   92 12:17:59.841170  progress  45 % (88 MB)
   93 12:18:00.533907  progress  50 % (98 MB)
   94 12:18:01.328766  progress  55 % (108 MB)
   95 12:18:02.154730  progress  60 % (118 MB)
   96 12:18:02.320271  progress  65 % (128 MB)
   97 12:18:02.494706  progress  70 % (138 MB)
   98 12:18:02.633851  progress  75 % (148 MB)
   99 12:18:02.745794  progress  80 % (158 MB)
  100 12:18:02.854755  progress  85 % (167 MB)
  101 12:18:02.985828  progress  90 % (177 MB)
  102 12:18:03.341826  progress  95 % (187 MB)
  103 12:18:04.033076  progress 100 % (197 MB)
  104 12:18:04.040241  197 MB downloaded in 9.97 s (19.82 MB/s)
  105 12:18:04.040574  end: 1.3.1 http-download (duration 00:00:10) [common]
  107 12:18:04.040896  end: 1.3 download-retry (duration 00:00:10) [common]
  108 12:18:04.041000  start: 1.4 download-retry (timeout 00:09:49) [common]
  109 12:18:04.041104  start: 1.4.1 http-download (timeout 00:09:49) [common]
  110 12:18:04.041286  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
  111 12:18:04.041395  saving as /var/lib/lava/dispatcher/tmp/12217844/tftp-deploy-znwc3b_d/modules/modules.tar
  112 12:18:04.041467  total size: 483904 (0 MB)
  113 12:18:04.041539  Using unxz to decompress xz
  114 12:18:04.046350  progress   6 % (0 MB)
  115 12:18:04.046821  progress  13 % (0 MB)
  116 12:18:04.047095  progress  20 % (0 MB)
  117 12:18:04.048966  progress  27 % (0 MB)
  118 12:18:04.051308  progress  33 % (0 MB)
  119 12:18:04.053473  progress  40 % (0 MB)
  120 12:18:04.055691  progress  47 % (0 MB)
  121 12:18:04.057943  progress  54 % (0 MB)
  122 12:18:04.060332  progress  60 % (0 MB)
  123 12:18:04.062702  progress  67 % (0 MB)
  124 12:18:04.065080  progress  74 % (0 MB)
  125 12:18:04.067569  progress  81 % (0 MB)
  126 12:18:04.069946  progress  88 % (0 MB)
  127 12:18:04.072297  progress  94 % (0 MB)
  128 12:18:04.075296  progress 100 % (0 MB)
  129 12:18:04.083437  0 MB downloaded in 0.04 s (11.00 MB/s)
  130 12:18:04.083878  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 12:18:04.084403  end: 1.4 download-retry (duration 00:00:00) [common]
  133 12:18:04.084584  start: 1.5 prepare-tftp-overlay (timeout 00:09:49) [common]
  134 12:18:04.084765  start: 1.5.1 extract-nfsrootfs (timeout 00:09:49) [common]
  135 12:18:13.980833  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12217844/extract-nfsrootfs-vjnxoln1
  136 12:18:13.981072  end: 1.5.1 extract-nfsrootfs (duration 00:00:10) [common]
  137 12:18:13.981194  start: 1.5.2 lava-overlay (timeout 00:09:39) [common]
  138 12:18:13.981387  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji
  139 12:18:13.981552  makedir: /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin
  140 12:18:13.981681  makedir: /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/tests
  141 12:18:13.981797  makedir: /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/results
  142 12:18:13.981927  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-add-keys
  143 12:18:13.982100  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-add-sources
  144 12:18:13.982262  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-background-process-start
  145 12:18:13.982415  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-background-process-stop
  146 12:18:13.982571  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-common-functions
  147 12:18:13.982725  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-echo-ipv4
  148 12:18:13.982879  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-install-packages
  149 12:18:13.983033  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-installed-packages
  150 12:18:13.983508  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-os-build
  151 12:18:13.983675  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-probe-channel
  152 12:18:13.983833  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-probe-ip
  153 12:18:13.987374  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-target-ip
  154 12:18:13.987552  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-target-mac
  155 12:18:13.987715  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-target-storage
  156 12:18:13.987877  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-test-case
  157 12:18:13.988035  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-test-event
  158 12:18:13.988191  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-test-feedback
  159 12:18:13.988360  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-test-raise
  160 12:18:13.988506  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-test-reference
  161 12:18:13.988651  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-test-runner
  162 12:18:13.988825  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-test-set
  163 12:18:13.988980  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-test-shell
  164 12:18:13.989131  Updating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-add-keys (debian)
  165 12:18:14.020351  Updating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-add-sources (debian)
  166 12:18:14.020710  Updating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-install-packages (debian)
  167 12:18:14.020980  Updating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-installed-packages (debian)
  168 12:18:14.021261  Updating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/bin/lava-os-build (debian)
  169 12:18:14.021496  Creating /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/environment
  170 12:18:14.021693  LAVA metadata
  171 12:18:14.021851  - LAVA_JOB_ID=12217844
  172 12:18:14.021989  - LAVA_DISPATCHER_IP=192.168.201.1
  173 12:18:14.022198  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:39) [common]
  174 12:18:14.022352  skipped lava-vland-overlay
  175 12:18:14.022541  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  176 12:18:14.022711  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:39) [common]
  177 12:18:14.022854  skipped lava-multinode-overlay
  178 12:18:14.023030  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  179 12:18:14.023200  start: 1.5.2.3 test-definition (timeout 00:09:39) [common]
  180 12:18:14.023378  Loading test definitions
  181 12:18:14.023572  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:39) [common]
  182 12:18:14.023738  Using /lava-12217844 at stage 0
  183 12:18:14.024363  uuid=12217844_1.5.2.3.1 testdef=None
  184 12:18:14.024546  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  185 12:18:14.024725  start: 1.5.2.3.2 test-overlay (timeout 00:09:39) [common]
  186 12:18:14.025677  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  188 12:18:14.026241  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:39) [common]
  189 12:18:14.027379  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  191 12:18:14.027936  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:39) [common]
  192 12:18:14.494270  runner path: /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/0/tests/0_timesync-off test_uuid 12217844_1.5.2.3.1
  193 12:18:14.494581  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  195 12:18:14.494913  start: 1.5.2.3.5 git-repo-action (timeout 00:09:38) [common]
  196 12:18:14.495018  Using /lava-12217844 at stage 0
  197 12:18:14.495160  Fetching tests from https://github.com/kernelci/test-definitions.git
  198 12:18:14.495271  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/0/tests/1_kselftest-futex'
  199 12:18:22.014790  Running '/usr/bin/git checkout kernelci.org
  200 12:18:22.174013  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
  201 12:18:22.178741  uuid=12217844_1.5.2.3.5 testdef=None
  202 12:18:22.179858  end: 1.5.2.3.5 git-repo-action (duration 00:00:08) [common]
  204 12:18:22.181909  start: 1.5.2.3.6 test-overlay (timeout 00:09:31) [common]
  205 12:18:22.186592  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  207 12:18:22.187650  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:31) [common]
  208 12:18:22.261818  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  210 12:18:22.263002  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:30) [common]
  211 12:18:23.369579  runner path: /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/0/tests/1_kselftest-futex test_uuid 12217844_1.5.2.3.5
  212 12:18:23.370051  BOARD='asus-C436FA-Flip-hatch'
  213 12:18:23.370484  BRANCH='cip-gitlab'
  214 12:18:23.370931  SKIPFILE='/dev/null'
  215 12:18:23.371311  SKIP_INSTALL='True'
  216 12:18:23.371608  TESTPROG_URL='None'
  217 12:18:23.371900  TST_CASENAME=''
  218 12:18:23.372223  TST_CMDFILES='futex'
  219 12:18:23.390714  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:01) [common]
  221 12:18:23.392301  Creating lava-test-runner.conf files
  222 12:18:23.392623  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217844/lava-overlay-w0g7x7ji/lava-12217844/0 for stage 0
  223 12:18:23.393088  - 0_timesync-off
  224 12:18:23.393406  - 1_kselftest-futex
  225 12:18:23.393867  end: 1.5.2.3 test-definition (duration 00:00:09) [common]
  226 12:18:23.394306  start: 1.5.2.4 compress-overlay (timeout 00:09:29) [common]
  227 12:18:35.859701  end: 1.5.2.4 compress-overlay (duration 00:00:12) [common]
  228 12:18:35.860042  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:17) [common]
  229 12:18:35.860379  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  230 12:18:35.860700  end: 1.5.2 lava-overlay (duration 00:00:22) [common]
  231 12:18:35.860951  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:17) [common]
  232 12:18:36.265392  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  233 12:18:36.265869  start: 1.5.4 extract-modules (timeout 00:09:16) [common]
  234 12:18:36.266033  extracting modules file /var/lib/lava/dispatcher/tmp/12217844/tftp-deploy-znwc3b_d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217844/extract-nfsrootfs-vjnxoln1
  235 12:18:36.316170  extracting modules file /var/lib/lava/dispatcher/tmp/12217844/tftp-deploy-znwc3b_d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217844/extract-overlay-ramdisk-w5mfxhsc/ramdisk
  236 12:18:36.364378  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  237 12:18:36.364554  start: 1.5.5 apply-overlay-tftp (timeout 00:09:16) [common]
  238 12:18:36.364673  [common] Applying overlay to NFS
  239 12:18:36.364758  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12217844/compress-overlay-fnan67ve/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12217844/extract-nfsrootfs-vjnxoln1
  240 12:18:37.694645  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  241 12:18:37.694875  start: 1.5.6 configure-preseed-file (timeout 00:09:15) [common]
  242 12:18:37.695022  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  243 12:18:37.695161  start: 1.5.7 compress-ramdisk (timeout 00:09:15) [common]
  244 12:18:37.695292  Building ramdisk /var/lib/lava/dispatcher/tmp/12217844/extract-overlay-ramdisk-w5mfxhsc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12217844/extract-overlay-ramdisk-w5mfxhsc/ramdisk
  245 12:18:38.137215  >> 30353 blocks

  246 12:18:38.862809  rename /var/lib/lava/dispatcher/tmp/12217844/extract-overlay-ramdisk-w5mfxhsc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12217844/tftp-deploy-znwc3b_d/ramdisk/ramdisk.cpio.gz
  247 12:18:38.863330  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  248 12:18:38.863467  start: 1.5.8 prepare-kernel (timeout 00:09:14) [common]
  249 12:18:38.863593  start: 1.5.8.1 prepare-fit (timeout 00:09:14) [common]
  250 12:18:38.863700  No mkimage arch provided, not using FIT.
  251 12:18:38.863836  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  252 12:18:38.863976  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  253 12:18:38.864138  end: 1.5 prepare-tftp-overlay (duration 00:00:35) [common]
  254 12:18:38.864285  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:14) [common]
  255 12:18:38.864377  No LXC device requested
  256 12:18:38.864479  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  257 12:18:38.864586  start: 1.7 deploy-device-env (timeout 00:09:14) [common]
  258 12:18:38.864685  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  259 12:18:38.864784  Checking files for TFTP limit of 4294967296 bytes.
  260 12:18:38.865261  end: 1 tftp-deploy (duration 00:00:46) [common]
  261 12:18:38.865409  start: 2 depthcharge-action (timeout 00:05:00) [common]
  262 12:18:38.865549  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  263 12:18:38.865742  substitutions:
  264 12:18:38.865852  - {DTB}: None
  265 12:18:38.865955  - {INITRD}: 12217844/tftp-deploy-znwc3b_d/ramdisk/ramdisk.cpio.gz
  266 12:18:38.866053  - {KERNEL}: 12217844/tftp-deploy-znwc3b_d/kernel/bzImage
  267 12:18:38.866157  - {LAVA_MAC}: None
  268 12:18:38.866255  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12217844/extract-nfsrootfs-vjnxoln1
  269 12:18:38.866356  - {NFS_SERVER_IP}: 192.168.201.1
  270 12:18:38.866453  - {PRESEED_CONFIG}: None
  271 12:18:38.866547  - {PRESEED_LOCAL}: None
  272 12:18:38.866646  - {RAMDISK}: 12217844/tftp-deploy-znwc3b_d/ramdisk/ramdisk.cpio.gz
  273 12:18:38.866750  - {ROOT_PART}: None
  274 12:18:38.866848  - {ROOT}: None
  275 12:18:38.866942  - {SERVER_IP}: 192.168.201.1
  276 12:18:38.867035  - {TEE}: None
  277 12:18:38.867128  Parsed boot commands:
  278 12:18:38.867225  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  279 12:18:38.867470  Parsed boot commands: tftpboot 192.168.201.1 12217844/tftp-deploy-znwc3b_d/kernel/bzImage 12217844/tftp-deploy-znwc3b_d/kernel/cmdline 12217844/tftp-deploy-znwc3b_d/ramdisk/ramdisk.cpio.gz
  280 12:18:38.867570  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  281 12:18:38.867729  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  282 12:18:38.867910  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  283 12:18:38.868071  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  284 12:18:38.868199  Not connected, no need to disconnect.
  285 12:18:38.868369  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  286 12:18:38.868538  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  287 12:18:38.868651  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
  288 12:18:38.873075  Setting prompt string to ['lava-test: # ']
  289 12:18:38.873566  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  290 12:18:38.873739  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  291 12:18:38.873885  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  292 12:18:38.874030  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  293 12:18:38.874503  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
  294 12:18:44.006614  >> Command sent successfully.

  295 12:18:44.009267  Returned 0 in 5 seconds
  296 12:18:44.109652  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  298 12:18:44.110139  end: 2.2.2 reset-device (duration 00:00:05) [common]
  299 12:18:44.110295  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  300 12:18:44.110433  Setting prompt string to 'Starting depthcharge on Helios...'
  301 12:18:44.110553  Changing prompt to 'Starting depthcharge on Helios...'
  302 12:18:44.110668  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  303 12:18:44.111089  [Enter `^Ec?' for help]

  304 12:18:44.731759  

  305 12:18:44.731914  

  306 12:18:44.741719  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  307 12:18:44.745604  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  308 12:18:44.752070  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  309 12:18:44.755115  CPU: AES supported, TXT NOT supported, VT supported

  310 12:18:44.762204  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  311 12:18:44.765404  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  312 12:18:44.772367  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  313 12:18:44.775619  VBOOT: Loading verstage.

  314 12:18:44.778816  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  315 12:18:44.785929  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  316 12:18:44.788992  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  317 12:18:44.792203  CBFS @ c08000 size 3f8000

  318 12:18:44.799142  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  319 12:18:44.802432  CBFS: Locating 'fallback/verstage'

  320 12:18:44.805736  CBFS: Found @ offset 10fb80 size 1072c

  321 12:18:44.805834  

  322 12:18:44.805908  

  323 12:18:44.818961  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  324 12:18:44.832959  Probing TPM: . done!

  325 12:18:44.836813  TPM ready after 0 ms

  326 12:18:44.839732  Connected to device vid:did:rid of 1ae0:0028:00

  327 12:18:44.850314  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  328 12:18:44.853403  Initialized TPM device CR50 revision 0

  329 12:18:44.898845  tlcl_send_startup: Startup return code is 0

  330 12:18:44.898996  TPM: setup succeeded

  331 12:18:44.911634  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  332 12:18:44.915566  Chrome EC: UHEPI supported

  333 12:18:44.918979  Phase 1

  334 12:18:44.922132  FMAP: area GBB found @ c05000 (12288 bytes)

  335 12:18:44.928498  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  336 12:18:44.928594  Phase 2

  337 12:18:44.932341  Phase 3

  338 12:18:44.935769  FMAP: area GBB found @ c05000 (12288 bytes)

  339 12:18:44.941963  VB2:vb2_report_dev_firmware() This is developer signed firmware

  340 12:18:44.949085  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  341 12:18:44.952164  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  342 12:18:44.958711  VB2:vb2_verify_keyblock() Checking keyblock signature...

  343 12:18:44.974064  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  344 12:18:44.977715  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  345 12:18:44.983842  VB2:vb2_verify_fw_preamble() Verifying preamble.

  346 12:18:44.988118  Phase 4

  347 12:18:44.991779  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  348 12:18:44.998205  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  349 12:18:45.178060  VB2:vb2_rsa_verify_digest() Digest check failed!

  350 12:18:45.184500  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  351 12:18:45.184614  Saving nvdata

  352 12:18:45.188082  Reboot requested (10020007)

  353 12:18:45.191083  board_reset() called!

  354 12:18:45.191199  full_reset() called!

  355 12:18:49.698947  

  356 12:18:49.699144  

  357 12:18:49.708900  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  358 12:18:49.712534  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  359 12:18:49.719019  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  360 12:18:49.722131  CPU: AES supported, TXT NOT supported, VT supported

  361 12:18:49.729196  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  362 12:18:49.732518  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  363 12:18:49.738903  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  364 12:18:49.742553  VBOOT: Loading verstage.

  365 12:18:49.746100  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  366 12:18:49.752515  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  367 12:18:49.755715  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  368 12:18:49.758856  CBFS @ c08000 size 3f8000

  369 12:18:49.765933  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  370 12:18:49.768592  CBFS: Locating 'fallback/verstage'

  371 12:18:49.772382  CBFS: Found @ offset 10fb80 size 1072c

  372 12:18:49.775509  

  373 12:18:49.775637  

  374 12:18:49.785940  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  375 12:18:49.799833  Probing TPM: . done!

  376 12:18:49.803502  TPM ready after 0 ms

  377 12:18:49.806606  Connected to device vid:did:rid of 1ae0:0028:00

  378 12:18:49.816623  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  379 12:18:49.820538  Initialized TPM device CR50 revision 0

  380 12:18:49.865965  tlcl_send_startup: Startup return code is 0

  381 12:18:49.866125  TPM: setup succeeded

  382 12:18:49.878797  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  383 12:18:49.882506  Chrome EC: UHEPI supported

  384 12:18:49.885774  Phase 1

  385 12:18:49.889658  FMAP: area GBB found @ c05000 (12288 bytes)

  386 12:18:49.895946  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  387 12:18:49.902878  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  388 12:18:49.906201  Recovery requested (1009000e)

  389 12:18:49.911219  Saving nvdata

  390 12:18:49.917703  tlcl_extend: response is 0

  391 12:18:49.926513  tlcl_extend: response is 0

  392 12:18:49.933879  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  393 12:18:49.936660  CBFS @ c08000 size 3f8000

  394 12:18:49.943590  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  395 12:18:49.946626  CBFS: Locating 'fallback/romstage'

  396 12:18:49.949758  CBFS: Found @ offset 80 size 145fc

  397 12:18:49.953451  Accumulated console time in verstage 98 ms

  398 12:18:49.953576  

  399 12:18:49.953662  

  400 12:18:49.966930  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  401 12:18:49.973501  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  402 12:18:49.976801  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  403 12:18:49.979857  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  404 12:18:49.986262  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  405 12:18:49.989926  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  406 12:18:49.993104  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  407 12:18:49.996846  TCO_STS:   0000 0000

  408 12:18:49.999961  GEN_PMCON: e0015238 00000200

  409 12:18:50.003172  GBLRST_CAUSE: 00000000 00000000

  410 12:18:50.003267  prev_sleep_state 5

  411 12:18:50.006335  Boot Count incremented to 66668

  412 12:18:50.013365  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  413 12:18:50.016965  CBFS @ c08000 size 3f8000

  414 12:18:50.023450  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  415 12:18:50.023566  CBFS: Locating 'fspm.bin'

  416 12:18:50.026702  CBFS: Found @ offset 5ffc0 size 71000

  417 12:18:50.030868  Chrome EC: UHEPI supported

  418 12:18:50.037766  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  419 12:18:50.043002  Probing TPM:  done!

  420 12:18:50.049652  Connected to device vid:did:rid of 1ae0:0028:00

  421 12:18:50.059868  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  422 12:18:50.065498  Initialized TPM device CR50 revision 0

  423 12:18:50.074644  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  424 12:18:50.081113  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  425 12:18:50.084901  MRC cache found, size 1948

  426 12:18:50.088016  bootmode is set to: 2

  427 12:18:50.091588  PRMRR disabled by config.

  428 12:18:50.091675  SPD INDEX = 1

  429 12:18:50.097852  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  430 12:18:50.101599  CBFS @ c08000 size 3f8000

  431 12:18:50.107874  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  432 12:18:50.107963  CBFS: Locating 'spd.bin'

  433 12:18:50.111107  CBFS: Found @ offset 5fb80 size 400

  434 12:18:50.114215  SPD: module type is LPDDR3

  435 12:18:50.117840  SPD: module part is 

  436 12:18:50.124155  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  437 12:18:50.128044  SPD: device width 4 bits, bus width 8 bits

  438 12:18:50.131240  SPD: module size is 4096 MB (per channel)

  439 12:18:50.134425  memory slot: 0 configuration done.

  440 12:18:50.137352  memory slot: 2 configuration done.

  441 12:18:50.189084  CBMEM:

  442 12:18:50.192352  IMD: root @ 99fff000 254 entries.

  443 12:18:50.196123  IMD: root @ 99ffec00 62 entries.

  444 12:18:50.199433  External stage cache:

  445 12:18:50.202755  IMD: root @ 9abff000 254 entries.

  446 12:18:50.205819  IMD: root @ 9abfec00 62 entries.

  447 12:18:50.208949  Chrome EC: clear events_b mask to 0x0000000020004000

  448 12:18:50.225450  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  449 12:18:50.238568  tlcl_write: response is 0

  450 12:18:50.247560  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  451 12:18:50.253947  MRC: TPM MRC hash updated successfully.

  452 12:18:50.254063  2 DIMMs found

  453 12:18:50.257881  SMM Memory Map

  454 12:18:50.261037  SMRAM       : 0x9a000000 0x1000000

  455 12:18:50.264214   Subregion 0: 0x9a000000 0xa00000

  456 12:18:50.267389   Subregion 1: 0x9aa00000 0x200000

  457 12:18:50.271476   Subregion 2: 0x9ac00000 0x400000

  458 12:18:50.274434  top_of_ram = 0x9a000000

  459 12:18:50.277480  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  460 12:18:50.284367  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  461 12:18:50.287790  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  462 12:18:50.294346  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  463 12:18:50.297570  CBFS @ c08000 size 3f8000

  464 12:18:50.300859  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  465 12:18:50.304035  CBFS: Locating 'fallback/postcar'

  466 12:18:50.307326  CBFS: Found @ offset 107000 size 4b44

  467 12:18:50.314140  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  468 12:18:50.326472  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  469 12:18:50.329485  Processing 180 relocs. Offset value of 0x97c0c000

  470 12:18:50.337904  Accumulated console time in romstage 286 ms

  471 12:18:50.338062  

  472 12:18:50.338149  

  473 12:18:50.347780  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  474 12:18:50.354390  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  475 12:18:50.357654  CBFS @ c08000 size 3f8000

  476 12:18:50.361357  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  477 12:18:50.367908  CBFS: Locating 'fallback/ramstage'

  478 12:18:50.371047  CBFS: Found @ offset 43380 size 1b9e8

  479 12:18:50.377418  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  480 12:18:50.409630  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  481 12:18:50.412906  Processing 3976 relocs. Offset value of 0x98db0000

  482 12:18:50.419679  Accumulated console time in postcar 52 ms

  483 12:18:50.419809  

  484 12:18:50.419914  

  485 12:18:50.429461  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  486 12:18:50.436381  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  487 12:18:50.439769  WARNING: RO_VPD is uninitialized or empty.

  488 12:18:50.442769  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  489 12:18:50.449708  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  490 12:18:50.449832  Normal boot.

  491 12:18:50.455913  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  492 12:18:50.459530  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  493 12:18:50.462447  CBFS @ c08000 size 3f8000

  494 12:18:50.469181  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  495 12:18:50.472989  CBFS: Locating 'cpu_microcode_blob.bin'

  496 12:18:50.476008  CBFS: Found @ offset 14700 size 2ec00

  497 12:18:50.479191  microcode: sig=0x806ec pf=0x4 revision=0xc9

  498 12:18:50.482537  Skip microcode update

  499 12:18:50.489012  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  500 12:18:50.489143  CBFS @ c08000 size 3f8000

  501 12:18:50.495449  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  502 12:18:50.499091  CBFS: Locating 'fsps.bin'

  503 12:18:50.502085  CBFS: Found @ offset d1fc0 size 35000

  504 12:18:50.527918  Detected 4 core, 8 thread CPU.

  505 12:18:50.531054  Setting up SMI for CPU

  506 12:18:50.534738  IED base = 0x9ac00000

  507 12:18:50.534872  IED size = 0x00400000

  508 12:18:50.537950  Will perform SMM setup.

  509 12:18:50.544363  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  510 12:18:50.551396  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  511 12:18:50.554688  Processing 16 relocs. Offset value of 0x00030000

  512 12:18:50.558245  Attempting to start 7 APs

  513 12:18:50.573139  Waiting for 10ms after sending INIT.

  514 12:18:50.577830  Waiting for 1st SIPI to complete...done.

  515 12:18:50.578068  AP: slot 3 apic_id 2.

  516 12:18:50.581111  AP: slot 1 apic_id 3.

  517 12:18:50.584186  AP: slot 5 apic_id 7.

  518 12:18:50.584345  AP: slot 7 apic_id 6.

  519 12:18:50.587931  AP: slot 2 apic_id 1.

  520 12:18:50.591155  Waiting for 2nd SIPI to complete...done.

  521 12:18:50.594420  AP: slot 6 apic_id 5.

  522 12:18:50.597681  AP: slot 4 apic_id 4.

  523 12:18:50.604566  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  524 12:18:50.607725  Processing 13 relocs. Offset value of 0x00038000

  525 12:18:50.614064  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  526 12:18:50.621109  Installing SMM handler to 0x9a000000

  527 12:18:50.627669  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  528 12:18:50.630551  Processing 658 relocs. Offset value of 0x9a010000

  529 12:18:50.640935  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  530 12:18:50.644117  Processing 13 relocs. Offset value of 0x9a008000

  531 12:18:50.650540  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  532 12:18:50.657797  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  533 12:18:50.660950  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  534 12:18:50.667333  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  535 12:18:50.673956  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  536 12:18:50.681174  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  537 12:18:50.684201  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  538 12:18:50.690564  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  539 12:18:50.694147  Clearing SMI status registers

  540 12:18:50.697894  SMI_STS: PM1 

  541 12:18:50.698031  PM1_STS: PWRBTN 

  542 12:18:50.701134  TCO_STS: SECOND_TO 

  543 12:18:50.704443  New SMBASE 0x9a000000

  544 12:18:50.704542  In relocation handler: CPU 0

  545 12:18:50.711089  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  546 12:18:50.714189  Writing SMRR. base = 0x9a000006, mask=0xff000800

  547 12:18:50.717362  Relocation complete.

  548 12:18:50.717502  New SMBASE 0x99fff800

  549 12:18:50.721182  In relocation handler: CPU 2

  550 12:18:50.727645  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  551 12:18:50.730892  Writing SMRR. base = 0x9a000006, mask=0xff000800

  552 12:18:50.733992  Relocation complete.

  553 12:18:50.734107  New SMBASE 0x99fffc00

  554 12:18:50.737810  In relocation handler: CPU 1

  555 12:18:50.740870  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  556 12:18:50.747546  Writing SMRR. base = 0x9a000006, mask=0xff000800

  557 12:18:50.750555  Relocation complete.

  558 12:18:50.750688  New SMBASE 0x99fff400

  559 12:18:50.754151  In relocation handler: CPU 3

  560 12:18:50.757717  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  561 12:18:50.764016  Writing SMRR. base = 0x9a000006, mask=0xff000800

  562 12:18:50.764125  Relocation complete.

  563 12:18:50.767180  New SMBASE 0x99ffe400

  564 12:18:50.771129  In relocation handler: CPU 7

  565 12:18:50.774387  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  566 12:18:50.781148  Writing SMRR. base = 0x9a000006, mask=0xff000800

  567 12:18:50.781270  Relocation complete.

  568 12:18:50.784177  New SMBASE 0x99ffe800

  569 12:18:50.787771  In relocation handler: CPU 6

  570 12:18:50.791073  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  571 12:18:50.797432  Writing SMRR. base = 0x9a000006, mask=0xff000800

  572 12:18:50.797588  Relocation complete.

  573 12:18:50.800681  New SMBASE 0x99fff000

  574 12:18:50.804273  In relocation handler: CPU 4

  575 12:18:50.807477  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  576 12:18:50.814348  Writing SMRR. base = 0x9a000006, mask=0xff000800

  577 12:18:50.814437  Relocation complete.

  578 12:18:50.817609  New SMBASE 0x99ffec00

  579 12:18:50.820859  In relocation handler: CPU 5

  580 12:18:50.824073  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  581 12:18:50.827172  Writing SMRR. base = 0x9a000006, mask=0xff000800

  582 12:18:50.831083  Relocation complete.

  583 12:18:50.834093  Initializing CPU #0

  584 12:18:50.837506  CPU: vendor Intel device 806ec

  585 12:18:50.840536  CPU: family 06, model 8e, stepping 0c

  586 12:18:50.844446  Clearing out pending MCEs

  587 12:18:50.844567  Setting up local APIC...

  588 12:18:50.847519   apic_id: 0x00 done.

  589 12:18:50.850626  Turbo is available but hidden

  590 12:18:50.854068  Turbo is available and visible

  591 12:18:50.857272  VMX status: enabled

  592 12:18:50.860552  IA32_FEATURE_CONTROL status: locked

  593 12:18:50.860653  Skip microcode update

  594 12:18:50.863997  CPU #0 initialized

  595 12:18:50.867512  Initializing CPU #2

  596 12:18:50.867633  Initializing CPU #7

  597 12:18:50.870519  Initializing CPU #5

  598 12:18:50.873663  CPU: vendor Intel device 806ec

  599 12:18:50.877642  CPU: family 06, model 8e, stepping 0c

  600 12:18:50.880818  CPU: vendor Intel device 806ec

  601 12:18:50.884219  CPU: family 06, model 8e, stepping 0c

  602 12:18:50.887437  Clearing out pending MCEs

  603 12:18:50.890753  Clearing out pending MCEs

  604 12:18:50.890883  Setting up local APIC...

  605 12:18:50.893942  Initializing CPU #3

  606 12:18:50.897409  Initializing CPU #1

  607 12:18:50.897520  CPU: vendor Intel device 806ec

  608 12:18:50.903896  CPU: family 06, model 8e, stepping 0c

  609 12:18:50.907359  CPU: vendor Intel device 806ec

  610 12:18:50.910871  CPU: family 06, model 8e, stepping 0c

  611 12:18:50.910983  Clearing out pending MCEs

  612 12:18:50.914381  Clearing out pending MCEs

  613 12:18:50.917125  Setting up local APIC...

  614 12:18:50.920488  Initializing CPU #6

  615 12:18:50.920585  Initializing CPU #4

  616 12:18:50.923659  CPU: vendor Intel device 806ec

  617 12:18:50.927473  CPU: family 06, model 8e, stepping 0c

  618 12:18:50.930633   apic_id: 0x03 done.

  619 12:18:50.933937  Setting up local APIC...

  620 12:18:50.937024  CPU: vendor Intel device 806ec

  621 12:18:50.940412  CPU: family 06, model 8e, stepping 0c

  622 12:18:50.944301  Clearing out pending MCEs

  623 12:18:50.944400  VMX status: enabled

  624 12:18:50.947580   apic_id: 0x02 done.

  625 12:18:50.950779  IA32_FEATURE_CONTROL status: locked

  626 12:18:50.953891  VMX status: enabled

  627 12:18:50.953993  Skip microcode update

  628 12:18:50.957197  IA32_FEATURE_CONTROL status: locked

  629 12:18:50.960382  CPU #1 initialized

  630 12:18:50.964056  Skip microcode update

  631 12:18:50.964203  Setting up local APIC...

  632 12:18:50.967025  CPU #3 initialized

  633 12:18:50.970512   apic_id: 0x07 done.

  634 12:18:50.970607  Setting up local APIC...

  635 12:18:50.973967  Clearing out pending MCEs

  636 12:18:50.977344  CPU: vendor Intel device 806ec

  637 12:18:50.980612  CPU: family 06, model 8e, stepping 0c

  638 12:18:50.983742  Setting up local APIC...

  639 12:18:50.987403   apic_id: 0x06 done.

  640 12:18:50.987533  VMX status: enabled

  641 12:18:50.990472  VMX status: enabled

  642 12:18:50.993936  IA32_FEATURE_CONTROL status: locked

  643 12:18:50.997052  IA32_FEATURE_CONTROL status: locked

  644 12:18:51.000237  Skip microcode update

  645 12:18:51.000407  Skip microcode update

  646 12:18:51.003831  CPU #5 initialized

  647 12:18:51.006955  CPU #7 initialized

  648 12:18:51.007180   apic_id: 0x01 done.

  649 12:18:51.010299   apic_id: 0x05 done.

  650 12:18:51.014083  Clearing out pending MCEs

  651 12:18:51.014259  VMX status: enabled

  652 12:18:51.016994  Setting up local APIC...

  653 12:18:51.020669  VMX status: enabled

  654 12:18:51.020841   apic_id: 0x04 done.

  655 12:18:51.023738  IA32_FEATURE_CONTROL status: locked

  656 12:18:51.027244  VMX status: enabled

  657 12:18:51.030628  Skip microcode update

  658 12:18:51.033676  IA32_FEATURE_CONTROL status: locked

  659 12:18:51.034032  CPU #6 initialized

  660 12:18:51.036960  Skip microcode update

  661 12:18:51.040760  IA32_FEATURE_CONTROL status: locked

  662 12:18:51.043604  CPU #4 initialized

  663 12:18:51.043904  Skip microcode update

  664 12:18:51.047423  CPU #2 initialized

  665 12:18:51.050442  bsp_do_flight_plan done after 457 msecs.

  666 12:18:51.053792  CPU: frequency set to 4200 MHz

  667 12:18:51.056910  Enabling SMIs.

  668 12:18:51.057253  Locking SMM.

  669 12:18:51.072043  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  670 12:18:51.075356  CBFS @ c08000 size 3f8000

  671 12:18:51.081929  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  672 12:18:51.082419  CBFS: Locating 'vbt.bin'

  673 12:18:51.085632  CBFS: Found @ offset 5f5c0 size 499

  674 12:18:51.092002  Found a VBT of 4608 bytes after decompression

  675 12:18:51.274348  Display FSP Version Info HOB

  676 12:18:51.278300  Reference Code - CPU = 9.0.1e.30

  677 12:18:51.281109  uCode Version = 0.0.0.ca

  678 12:18:51.284326  TXT ACM version = ff.ff.ff.ffff

  679 12:18:51.287646  Display FSP Version Info HOB

  680 12:18:51.290851  Reference Code - ME = 9.0.1e.30

  681 12:18:51.294132  MEBx version = 0.0.0.0

  682 12:18:51.298018  ME Firmware Version = Consumer SKU

  683 12:18:51.301060  Display FSP Version Info HOB

  684 12:18:51.304174  Reference Code - CML PCH = 9.0.1e.30

  685 12:18:51.304328  PCH-CRID Status = Disabled

  686 12:18:51.311278  PCH-CRID Original Value = ff.ff.ff.ffff

  687 12:18:51.314289  PCH-CRID New Value = ff.ff.ff.ffff

  688 12:18:51.317498  OPROM - RST - RAID = ff.ff.ff.ffff

  689 12:18:51.321261  ChipsetInit Base Version = ff.ff.ff.ffff

  690 12:18:51.324104  ChipsetInit Oem Version = ff.ff.ff.ffff

  691 12:18:51.327474  Display FSP Version Info HOB

  692 12:18:51.334435  Reference Code - SA - System Agent = 9.0.1e.30

  693 12:18:51.334565  Reference Code - MRC = 0.7.1.6c

  694 12:18:51.337875  SA - PCIe Version = 9.0.1e.30

  695 12:18:51.340668  SA-CRID Status = Disabled

  696 12:18:51.344362  SA-CRID Original Value = 0.0.0.c

  697 12:18:51.347349  SA-CRID New Value = 0.0.0.c

  698 12:18:51.350707  OPROM - VBIOS = ff.ff.ff.ffff

  699 12:18:51.350842  RTC Init

  700 12:18:51.357625  Set power on after power failure.

  701 12:18:51.357751  Disabling Deep S3

  702 12:18:51.360706  Disabling Deep S3

  703 12:18:51.360793  Disabling Deep S4

  704 12:18:51.364631  Disabling Deep S4

  705 12:18:51.364715  Disabling Deep S5

  706 12:18:51.367551  Disabling Deep S5

  707 12:18:51.374219  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1

  708 12:18:51.374357  Enumerating buses...

  709 12:18:51.381304  Show all devs... Before device enumeration.

  710 12:18:51.381412  Root Device: enabled 1

  711 12:18:51.384110  CPU_CLUSTER: 0: enabled 1

  712 12:18:51.387282  DOMAIN: 0000: enabled 1

  713 12:18:51.387396  APIC: 00: enabled 1

  714 12:18:51.391159  PCI: 00:00.0: enabled 1

  715 12:18:51.393934  PCI: 00:02.0: enabled 1

  716 12:18:51.397824  PCI: 00:04.0: enabled 0

  717 12:18:51.397921  PCI: 00:05.0: enabled 0

  718 12:18:51.400935  PCI: 00:12.0: enabled 1

  719 12:18:51.404045  PCI: 00:12.5: enabled 0

  720 12:18:51.407242  PCI: 00:12.6: enabled 0

  721 12:18:51.407352  PCI: 00:14.0: enabled 1

  722 12:18:51.411204  PCI: 00:14.1: enabled 0

  723 12:18:51.414434  PCI: 00:14.3: enabled 1

  724 12:18:51.414527  PCI: 00:14.5: enabled 0

  725 12:18:51.417443  PCI: 00:15.0: enabled 1

  726 12:18:51.420688  PCI: 00:15.1: enabled 1

  727 12:18:51.424361  PCI: 00:15.2: enabled 0

  728 12:18:51.424455  PCI: 00:15.3: enabled 0

  729 12:18:51.427621  PCI: 00:16.0: enabled 1

  730 12:18:51.430882  PCI: 00:16.1: enabled 0

  731 12:18:51.434671  PCI: 00:16.2: enabled 0

  732 12:18:51.434765  PCI: 00:16.3: enabled 0

  733 12:18:51.437510  PCI: 00:16.4: enabled 0

  734 12:18:51.441002  PCI: 00:16.5: enabled 0

  735 12:18:51.444037  PCI: 00:17.0: enabled 1

  736 12:18:51.444135  PCI: 00:19.0: enabled 1

  737 12:18:51.447253  PCI: 00:19.1: enabled 0

  738 12:18:51.451073  PCI: 00:19.2: enabled 0

  739 12:18:51.451166  PCI: 00:1a.0: enabled 0

  740 12:18:51.454034  PCI: 00:1c.0: enabled 0

  741 12:18:51.457667  PCI: 00:1c.1: enabled 0

  742 12:18:51.460898  PCI: 00:1c.2: enabled 0

  743 12:18:51.460991  PCI: 00:1c.3: enabled 0

  744 12:18:51.463870  PCI: 00:1c.4: enabled 0

  745 12:18:51.467788  PCI: 00:1c.5: enabled 0

  746 12:18:51.470838  PCI: 00:1c.6: enabled 0

  747 12:18:51.470934  PCI: 00:1c.7: enabled 0

  748 12:18:51.473989  PCI: 00:1d.0: enabled 1

  749 12:18:51.477342  PCI: 00:1d.1: enabled 0

  750 12:18:51.480591  PCI: 00:1d.2: enabled 0

  751 12:18:51.480702  PCI: 00:1d.3: enabled 0

  752 12:18:51.484061  PCI: 00:1d.4: enabled 0

  753 12:18:51.487034  PCI: 00:1d.5: enabled 1

  754 12:18:51.487157  PCI: 00:1e.0: enabled 1

  755 12:18:51.490459  PCI: 00:1e.1: enabled 0

  756 12:18:51.493809  PCI: 00:1e.2: enabled 1

  757 12:18:51.497074  PCI: 00:1e.3: enabled 1

  758 12:18:51.497169  PCI: 00:1f.0: enabled 1

  759 12:18:51.500242  PCI: 00:1f.1: enabled 1

  760 12:18:51.503716  PCI: 00:1f.2: enabled 1

  761 12:18:51.507548  PCI: 00:1f.3: enabled 1

  762 12:18:51.507642  PCI: 00:1f.4: enabled 1

  763 12:18:51.510467  PCI: 00:1f.5: enabled 1

  764 12:18:51.513706  PCI: 00:1f.6: enabled 0

  765 12:18:51.516961  USB0 port 0: enabled 1

  766 12:18:51.517055  I2C: 00:15: enabled 1

  767 12:18:51.520109  I2C: 00:5d: enabled 1

  768 12:18:51.523860  GENERIC: 0.0: enabled 1

  769 12:18:51.523954  I2C: 00:1a: enabled 1

  770 12:18:51.526957  I2C: 00:38: enabled 1

  771 12:18:51.530348  I2C: 00:39: enabled 1

  772 12:18:51.530443  I2C: 00:3a: enabled 1

  773 12:18:51.533712  I2C: 00:3b: enabled 1

  774 12:18:51.536817  PCI: 00:00.0: enabled 1

  775 12:18:51.536930  SPI: 00: enabled 1

  776 12:18:51.540734  SPI: 01: enabled 1

  777 12:18:51.543822  PNP: 0c09.0: enabled 1

  778 12:18:51.543967  USB2 port 0: enabled 1

  779 12:18:51.546801  USB2 port 1: enabled 1

  780 12:18:51.550483  USB2 port 2: enabled 0

  781 12:18:51.550633  USB2 port 3: enabled 0

  782 12:18:51.553628  USB2 port 5: enabled 0

  783 12:18:51.557043  USB2 port 6: enabled 1

  784 12:18:51.560049  USB2 port 9: enabled 1

  785 12:18:51.560177  USB3 port 0: enabled 1

  786 12:18:51.563298  USB3 port 1: enabled 1

  787 12:18:51.567124  USB3 port 2: enabled 1

  788 12:18:51.567227  USB3 port 3: enabled 1

  789 12:18:51.570205  USB3 port 4: enabled 0

  790 12:18:51.573268  APIC: 03: enabled 1

  791 12:18:51.573381  APIC: 01: enabled 1

  792 12:18:51.576837  APIC: 02: enabled 1

  793 12:18:51.579808  APIC: 04: enabled 1

  794 12:18:51.579916  APIC: 07: enabled 1

  795 12:18:51.583061  APIC: 05: enabled 1

  796 12:18:51.583169  APIC: 06: enabled 1

  797 12:18:51.586284  Compare with tree...

  798 12:18:51.590063  Root Device: enabled 1

  799 12:18:51.593525   CPU_CLUSTER: 0: enabled 1

  800 12:18:51.593675    APIC: 00: enabled 1

  801 12:18:51.596617    APIC: 03: enabled 1

  802 12:18:51.599566    APIC: 01: enabled 1

  803 12:18:51.599843    APIC: 02: enabled 1

  804 12:18:51.603233    APIC: 04: enabled 1

  805 12:18:51.606584    APIC: 07: enabled 1

  806 12:18:51.606777    APIC: 05: enabled 1

  807 12:18:51.609915    APIC: 06: enabled 1

  808 12:18:51.613171   DOMAIN: 0000: enabled 1

  809 12:18:51.616604    PCI: 00:00.0: enabled 1

  810 12:18:51.616856    PCI: 00:02.0: enabled 1

  811 12:18:51.619591    PCI: 00:04.0: enabled 0

  812 12:18:51.622882    PCI: 00:05.0: enabled 0

  813 12:18:51.626598    PCI: 00:12.0: enabled 1

  814 12:18:51.629497    PCI: 00:12.5: enabled 0

  815 12:18:51.629793    PCI: 00:12.6: enabled 0

  816 12:18:51.633425    PCI: 00:14.0: enabled 1

  817 12:18:51.636609     USB0 port 0: enabled 1

  818 12:18:51.639822      USB2 port 0: enabled 1

  819 12:18:51.643094      USB2 port 1: enabled 1

  820 12:18:51.643336      USB2 port 2: enabled 0

  821 12:18:51.646147      USB2 port 3: enabled 0

  822 12:18:51.649540      USB2 port 5: enabled 0

  823 12:18:51.653497      USB2 port 6: enabled 1

  824 12:18:51.656175      USB2 port 9: enabled 1

  825 12:18:51.656480      USB3 port 0: enabled 1

  826 12:18:51.660090      USB3 port 1: enabled 1

  827 12:18:51.662615      USB3 port 2: enabled 1

  828 12:18:51.666448      USB3 port 3: enabled 1

  829 12:18:51.669594      USB3 port 4: enabled 0

  830 12:18:51.673474    PCI: 00:14.1: enabled 0

  831 12:18:51.673734    PCI: 00:14.3: enabled 1

  832 12:18:51.675872    PCI: 00:14.5: enabled 0

  833 12:18:51.679772    PCI: 00:15.0: enabled 1

  834 12:18:51.682754     I2C: 00:15: enabled 1

  835 12:18:51.683138    PCI: 00:15.1: enabled 1

  836 12:18:51.685863     I2C: 00:5d: enabled 1

  837 12:18:51.689599     GENERIC: 0.0: enabled 1

  838 12:18:51.692495    PCI: 00:15.2: enabled 0

  839 12:18:51.695858    PCI: 00:15.3: enabled 0

  840 12:18:51.696087    PCI: 00:16.0: enabled 1

  841 12:18:51.699228    PCI: 00:16.1: enabled 0

  842 12:18:51.702427    PCI: 00:16.2: enabled 0

  843 12:18:51.706271    PCI: 00:16.3: enabled 0

  844 12:18:51.709448    PCI: 00:16.4: enabled 0

  845 12:18:51.709866    PCI: 00:16.5: enabled 0

  846 12:18:51.712750    PCI: 00:17.0: enabled 1

  847 12:18:51.715778    PCI: 00:19.0: enabled 1

  848 12:18:51.719329     I2C: 00:1a: enabled 1

  849 12:18:51.719646     I2C: 00:38: enabled 1

  850 12:18:51.722731     I2C: 00:39: enabled 1

  851 12:18:51.725830     I2C: 00:3a: enabled 1

  852 12:18:51.729361     I2C: 00:3b: enabled 1

  853 12:18:51.732558    PCI: 00:19.1: enabled 0

  854 12:18:51.732971    PCI: 00:19.2: enabled 0

  855 12:18:51.736328    PCI: 00:1a.0: enabled 0

  856 12:18:51.739270    PCI: 00:1c.0: enabled 0

  857 12:18:51.742258    PCI: 00:1c.1: enabled 0

  858 12:18:51.745661    PCI: 00:1c.2: enabled 0

  859 12:18:51.745908    PCI: 00:1c.3: enabled 0

  860 12:18:51.749449    PCI: 00:1c.4: enabled 0

  861 12:18:51.752320    PCI: 00:1c.5: enabled 0

  862 12:18:51.755657    PCI: 00:1c.6: enabled 0

  863 12:18:51.758858    PCI: 00:1c.7: enabled 0

  864 12:18:51.759086    PCI: 00:1d.0: enabled 1

  865 12:18:51.762485    PCI: 00:1d.1: enabled 0

  866 12:18:51.765622    PCI: 00:1d.2: enabled 0

  867 12:18:51.768830    PCI: 00:1d.3: enabled 0

  868 12:18:51.772094    PCI: 00:1d.4: enabled 0

  869 12:18:51.772429    PCI: 00:1d.5: enabled 1

  870 12:18:51.775283     PCI: 00:00.0: enabled 1

  871 12:18:51.779010    PCI: 00:1e.0: enabled 1

  872 12:18:51.782295    PCI: 00:1e.1: enabled 0

  873 12:18:51.782561    PCI: 00:1e.2: enabled 1

  874 12:18:51.785413     SPI: 00: enabled 1

  875 12:18:51.789090    PCI: 00:1e.3: enabled 1

  876 12:18:51.792508     SPI: 01: enabled 1

  877 12:18:51.792840    PCI: 00:1f.0: enabled 1

  878 12:18:51.795462     PNP: 0c09.0: enabled 1

  879 12:18:51.798680    PCI: 00:1f.1: enabled 1

  880 12:18:51.802572    PCI: 00:1f.2: enabled 1

  881 12:18:51.805499    PCI: 00:1f.3: enabled 1

  882 12:18:51.805752    PCI: 00:1f.4: enabled 1

  883 12:18:51.809033    PCI: 00:1f.5: enabled 1

  884 12:18:51.812303    PCI: 00:1f.6: enabled 0

  885 12:18:51.815445  Root Device scanning...

  886 12:18:51.818778  scan_static_bus for Root Device

  887 12:18:51.819149  CPU_CLUSTER: 0 enabled

  888 12:18:51.821984  DOMAIN: 0000 enabled

  889 12:18:51.825827  DOMAIN: 0000 scanning...

  890 12:18:51.828834  PCI: pci_scan_bus for bus 00

  891 12:18:51.831929  PCI: 00:00.0 [8086/0000] ops

  892 12:18:51.835226  PCI: 00:00.0 [8086/9b61] enabled

  893 12:18:51.838909  PCI: 00:02.0 [8086/0000] bus ops

  894 12:18:51.841956  PCI: 00:02.0 [8086/9b41] enabled

  895 12:18:51.845626  PCI: 00:04.0 [8086/1903] disabled

  896 12:18:51.848457  PCI: 00:08.0 [8086/1911] enabled

  897 12:18:51.852100  PCI: 00:12.0 [8086/02f9] enabled

  898 12:18:51.855771  PCI: 00:14.0 [8086/0000] bus ops

  899 12:18:51.859019  PCI: 00:14.0 [8086/02ed] enabled

  900 12:18:51.861889  PCI: 00:14.2 [8086/02ef] enabled

  901 12:18:51.865549  PCI: 00:14.3 [8086/02f0] enabled

  902 12:18:51.868640  PCI: 00:15.0 [8086/0000] bus ops

  903 12:18:51.872296  PCI: 00:15.0 [8086/02e8] enabled

  904 12:18:51.875602  PCI: 00:15.1 [8086/0000] bus ops

  905 12:18:51.878564  PCI: 00:15.1 [8086/02e9] enabled

  906 12:18:51.881694  PCI: 00:16.0 [8086/0000] ops

  907 12:18:51.885346  PCI: 00:16.0 [8086/02e0] enabled

  908 12:18:51.888645  PCI: 00:17.0 [8086/0000] ops

  909 12:18:51.891677  PCI: 00:17.0 [8086/02d3] enabled

  910 12:18:51.895564  PCI: 00:19.0 [8086/0000] bus ops

  911 12:18:51.898730  PCI: 00:19.0 [8086/02c5] enabled

  912 12:18:51.901979  PCI: 00:1d.0 [8086/0000] bus ops

  913 12:18:51.905393  PCI: 00:1d.0 [8086/02b0] enabled

  914 12:18:51.908562  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  915 12:18:51.912353  PCI: 00:1e.0 [8086/0000] ops

  916 12:18:51.915303  PCI: 00:1e.0 [8086/02a8] enabled

  917 12:18:51.918431  PCI: 00:1e.2 [8086/0000] bus ops

  918 12:18:51.922092  PCI: 00:1e.2 [8086/02aa] enabled

  919 12:18:51.924987  PCI: 00:1e.3 [8086/0000] bus ops

  920 12:18:51.928460  PCI: 00:1e.3 [8086/02ab] enabled

  921 12:18:51.932201  PCI: 00:1f.0 [8086/0000] bus ops

  922 12:18:51.935275  PCI: 00:1f.0 [8086/0284] enabled

  923 12:18:51.941800  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  924 12:18:51.948883  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  925 12:18:51.951931  PCI: 00:1f.3 [8086/0000] bus ops

  926 12:18:51.954936  PCI: 00:1f.3 [8086/02c8] enabled

  927 12:18:51.958667  PCI: 00:1f.4 [8086/0000] bus ops

  928 12:18:51.961461  PCI: 00:1f.4 [8086/02a3] enabled

  929 12:18:51.965452  PCI: 00:1f.5 [8086/0000] bus ops

  930 12:18:51.968187  PCI: 00:1f.5 [8086/02a4] enabled

  931 12:18:51.968523  PCI: Leftover static devices:

  932 12:18:51.971738  PCI: 00:05.0

  933 12:18:51.971971  PCI: 00:12.5

  934 12:18:51.974976  PCI: 00:12.6

  935 12:18:51.975236  PCI: 00:14.1

  936 12:18:51.975419  PCI: 00:14.5

  937 12:18:51.978206  PCI: 00:15.2

  938 12:18:51.978567  PCI: 00:15.3

  939 12:18:51.981630  PCI: 00:16.1

  940 12:18:51.981895  PCI: 00:16.2

  941 12:18:51.984832  PCI: 00:16.3

  942 12:18:51.985154  PCI: 00:16.4

  943 12:18:51.985449  PCI: 00:16.5

  944 12:18:51.988162  PCI: 00:19.1

  945 12:18:51.988485  PCI: 00:19.2

  946 12:18:51.991914  PCI: 00:1a.0

  947 12:18:51.992203  PCI: 00:1c.0

  948 12:18:51.992515  PCI: 00:1c.1

  949 12:18:51.994921  PCI: 00:1c.2

  950 12:18:51.995242  PCI: 00:1c.3

  951 12:18:51.998758  PCI: 00:1c.4

  952 12:18:51.999089  PCI: 00:1c.5

  953 12:18:51.999388  PCI: 00:1c.6

  954 12:18:52.002045  PCI: 00:1c.7

  955 12:18:52.002364  PCI: 00:1d.1

  956 12:18:52.005104  PCI: 00:1d.2

  957 12:18:52.005491  PCI: 00:1d.3

  958 12:18:52.005850  PCI: 00:1d.4

  959 12:18:52.008486  PCI: 00:1d.5

  960 12:18:52.008867  PCI: 00:1e.1

  961 12:18:52.011693  PCI: 00:1f.1

  962 12:18:52.011978  PCI: 00:1f.2

  963 12:18:52.014976  PCI: 00:1f.6

  964 12:18:52.015245  PCI: Check your devicetree.cb.

  965 12:18:52.018319  PCI: 00:02.0 scanning...

  966 12:18:52.022050  scan_generic_bus for PCI: 00:02.0

  967 12:18:52.025202  scan_generic_bus for PCI: 00:02.0 done

  968 12:18:52.032087  scan_bus: scanning of bus PCI: 00:02.0 took 10197 usecs

  969 12:18:52.034958  PCI: 00:14.0 scanning...

  970 12:18:52.038731  scan_static_bus for PCI: 00:14.0

  971 12:18:52.041850  USB0 port 0 enabled

  972 12:18:52.042165  USB0 port 0 scanning...

  973 12:18:52.044892  scan_static_bus for USB0 port 0

  974 12:18:52.048925  USB2 port 0 enabled

  975 12:18:52.052101  USB2 port 1 enabled

  976 12:18:52.052395  USB2 port 2 disabled

  977 12:18:52.055299  USB2 port 3 disabled

  978 12:18:52.058580  USB2 port 5 disabled

  979 12:18:52.058812  USB2 port 6 enabled

  980 12:18:52.061764  USB2 port 9 enabled

  981 12:18:52.062080  USB3 port 0 enabled

  982 12:18:52.064960  USB3 port 1 enabled

  983 12:18:52.068147  USB3 port 2 enabled

  984 12:18:52.068464  USB3 port 3 enabled

  985 12:18:52.071778  USB3 port 4 disabled

  986 12:18:52.075054  USB2 port 0 scanning...

  987 12:18:52.078316  scan_static_bus for USB2 port 0

  988 12:18:52.081344  scan_static_bus for USB2 port 0 done

  989 12:18:52.084852  scan_bus: scanning of bus USB2 port 0 took 9711 usecs

  990 12:18:52.088362  USB2 port 1 scanning...

  991 12:18:52.091489  scan_static_bus for USB2 port 1

  992 12:18:52.095114  scan_static_bus for USB2 port 1 done

  993 12:18:52.101579  scan_bus: scanning of bus USB2 port 1 took 9708 usecs

  994 12:18:52.104856  USB2 port 6 scanning...

  995 12:18:52.108575  scan_static_bus for USB2 port 6

  996 12:18:52.111552  scan_static_bus for USB2 port 6 done

  997 12:18:52.115193  scan_bus: scanning of bus USB2 port 6 took 9707 usecs

  998 12:18:52.118450  USB2 port 9 scanning...

  999 12:18:52.121750  scan_static_bus for USB2 port 9

 1000 12:18:52.125027  scan_static_bus for USB2 port 9 done

 1001 12:18:52.131520  scan_bus: scanning of bus USB2 port 9 took 9707 usecs

 1002 12:18:52.134715  USB3 port 0 scanning...

 1003 12:18:52.138644  scan_static_bus for USB3 port 0

 1004 12:18:52.141586  scan_static_bus for USB3 port 0 done

 1005 12:18:52.144577  scan_bus: scanning of bus USB3 port 0 took 9709 usecs

 1006 12:18:52.148058  USB3 port 1 scanning...

 1007 12:18:52.151215  scan_static_bus for USB3 port 1

 1008 12:18:52.154623  scan_static_bus for USB3 port 1 done

 1009 12:18:52.161928  scan_bus: scanning of bus USB3 port 1 took 9701 usecs

 1010 12:18:52.165005  USB3 port 2 scanning...

 1011 12:18:52.168315  scan_static_bus for USB3 port 2

 1012 12:18:52.171397  scan_static_bus for USB3 port 2 done

 1013 12:18:52.177967  scan_bus: scanning of bus USB3 port 2 took 9700 usecs

 1014 12:18:52.178282  USB3 port 3 scanning...

 1015 12:18:52.181364  scan_static_bus for USB3 port 3

 1016 12:18:52.184543  scan_static_bus for USB3 port 3 done

 1017 12:18:52.191224  scan_bus: scanning of bus USB3 port 3 took 9709 usecs

 1018 12:18:52.194854  scan_static_bus for USB0 port 0 done

 1019 12:18:52.201668  scan_bus: scanning of bus USB0 port 0 took 155436 usecs

 1020 12:18:52.205027  scan_static_bus for PCI: 00:14.0 done

 1021 12:18:52.211757  scan_bus: scanning of bus PCI: 00:14.0 took 173070 usecs

 1022 12:18:52.212079  PCI: 00:15.0 scanning...

 1023 12:18:52.214791  scan_generic_bus for PCI: 00:15.0

 1024 12:18:52.221610  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1025 12:18:52.224942  scan_generic_bus for PCI: 00:15.0 done

 1026 12:18:52.231536  scan_bus: scanning of bus PCI: 00:15.0 took 14285 usecs

 1027 12:18:52.231902  PCI: 00:15.1 scanning...

 1028 12:18:52.234791  scan_generic_bus for PCI: 00:15.1

 1029 12:18:52.241384  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1030 12:18:52.244521  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1031 12:18:52.247717  scan_generic_bus for PCI: 00:15.1 done

 1032 12:18:52.254872  scan_bus: scanning of bus PCI: 00:15.1 took 18598 usecs

 1033 12:18:52.257965  PCI: 00:19.0 scanning...

 1034 12:18:52.261605  scan_generic_bus for PCI: 00:19.0

 1035 12:18:52.264361  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1036 12:18:52.268112  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1037 12:18:52.271207  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1038 12:18:52.277999  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1039 12:18:52.281253  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1040 12:18:52.284822  scan_generic_bus for PCI: 00:19.0 done

 1041 12:18:52.291224  scan_bus: scanning of bus PCI: 00:19.0 took 30754 usecs

 1042 12:18:52.291509  PCI: 00:1d.0 scanning...

 1043 12:18:52.297539  do_pci_scan_bridge for PCI: 00:1d.0

 1044 12:18:52.297865  PCI: pci_scan_bus for bus 01

 1045 12:18:52.301098  PCI: 01:00.0 [1c5c/1327] enabled

 1046 12:18:52.307772  Enabling Common Clock Configuration

 1047 12:18:52.311485  L1 Sub-State supported from root port 29

 1048 12:18:52.314608  L1 Sub-State Support = 0xf

 1049 12:18:52.317781  CommonModeRestoreTime = 0x28

 1050 12:18:52.321575  Power On Value = 0x16, Power On Scale = 0x0

 1051 12:18:52.321805  ASPM: Enabled L1

 1052 12:18:52.327739  scan_bus: scanning of bus PCI: 00:1d.0 took 32799 usecs

 1053 12:18:52.331021  PCI: 00:1e.2 scanning...

 1054 12:18:52.334273  scan_generic_bus for PCI: 00:1e.2

 1055 12:18:52.337908  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1056 12:18:52.341075  scan_generic_bus for PCI: 00:1e.2 done

 1057 12:18:52.347890  scan_bus: scanning of bus PCI: 00:1e.2 took 14021 usecs

 1058 12:18:52.351144  PCI: 00:1e.3 scanning...

 1059 12:18:52.354412  scan_generic_bus for PCI: 00:1e.3

 1060 12:18:52.358285  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1061 12:18:52.361528  scan_generic_bus for PCI: 00:1e.3 done

 1062 12:18:52.367949  scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs

 1063 12:18:52.370756  PCI: 00:1f.0 scanning...

 1064 12:18:52.374534  scan_static_bus for PCI: 00:1f.0

 1065 12:18:52.374794  PNP: 0c09.0 enabled

 1066 12:18:52.377434  scan_static_bus for PCI: 00:1f.0 done

 1067 12:18:52.384073  scan_bus: scanning of bus PCI: 00:1f.0 took 12042 usecs

 1068 12:18:52.387942  PCI: 00:1f.3 scanning...

 1069 12:18:52.393940  scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs

 1070 12:18:52.394226  PCI: 00:1f.4 scanning...

 1071 12:18:52.401173  scan_generic_bus for PCI: 00:1f.4

 1072 12:18:52.404236  scan_generic_bus for PCI: 00:1f.4 done

 1073 12:18:52.407316  scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs

 1074 12:18:52.411066  PCI: 00:1f.5 scanning...

 1075 12:18:52.413855  scan_generic_bus for PCI: 00:1f.5

 1076 12:18:52.417349  scan_generic_bus for PCI: 00:1f.5 done

 1077 12:18:52.424364  scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs

 1078 12:18:52.430882  scan_bus: scanning of bus DOMAIN: 0000 took 605182 usecs

 1079 12:18:52.433955  scan_static_bus for Root Device done

 1080 12:18:52.440288  scan_bus: scanning of bus Root Device took 625069 usecs

 1081 12:18:52.440533  done

 1082 12:18:52.443637  Chrome EC: UHEPI supported

 1083 12:18:52.450778  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1084 12:18:52.453739  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1085 12:18:52.460607  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1086 12:18:52.467568  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1087 12:18:52.470918  SPI flash protection: WPSW=0 SRP0=0

 1088 12:18:52.477449  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1089 12:18:52.481107  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1090 12:18:52.484126  found VGA at PCI: 00:02.0

 1091 12:18:52.487439  Setting up VGA for PCI: 00:02.0

 1092 12:18:52.494009  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1093 12:18:52.497737  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1094 12:18:52.501007  Allocating resources...

 1095 12:18:52.504078  Reading resources...

 1096 12:18:52.507424  Root Device read_resources bus 0 link: 0

 1097 12:18:52.510919  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1098 12:18:52.517425  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1099 12:18:52.520861  DOMAIN: 0000 read_resources bus 0 link: 0

 1100 12:18:52.527805  PCI: 00:14.0 read_resources bus 0 link: 0

 1101 12:18:52.531552  USB0 port 0 read_resources bus 0 link: 0

 1102 12:18:52.539698  USB0 port 0 read_resources bus 0 link: 0 done

 1103 12:18:52.542751  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1104 12:18:52.549923  PCI: 00:15.0 read_resources bus 1 link: 0

 1105 12:18:52.553126  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1106 12:18:52.560190  PCI: 00:15.1 read_resources bus 2 link: 0

 1107 12:18:52.563304  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1108 12:18:52.570483  PCI: 00:19.0 read_resources bus 3 link: 0

 1109 12:18:52.577218  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1110 12:18:52.580406  PCI: 00:1d.0 read_resources bus 1 link: 0

 1111 12:18:52.587372  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1112 12:18:52.590458  PCI: 00:1e.2 read_resources bus 4 link: 0

 1113 12:18:52.597115  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1114 12:18:52.600962  PCI: 00:1e.3 read_resources bus 5 link: 0

 1115 12:18:52.607383  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1116 12:18:52.610793  PCI: 00:1f.0 read_resources bus 0 link: 0

 1117 12:18:52.617501  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1118 12:18:52.620502  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1119 12:18:52.627337  Root Device read_resources bus 0 link: 0 done

 1120 12:18:52.630615  Done reading resources.

 1121 12:18:52.634358  Show resources in subtree (Root Device)...After reading.

 1122 12:18:52.640564   Root Device child on link 0 CPU_CLUSTER: 0

 1123 12:18:52.644257    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1124 12:18:52.644354     APIC: 00

 1125 12:18:52.647508     APIC: 03

 1126 12:18:52.647603     APIC: 01

 1127 12:18:52.647699     APIC: 02

 1128 12:18:52.650743     APIC: 04

 1129 12:18:52.650855     APIC: 07

 1130 12:18:52.654113     APIC: 05

 1131 12:18:52.654209     APIC: 06

 1132 12:18:52.657344    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1133 12:18:52.667654    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1134 12:18:52.720174    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1135 12:18:52.720593     PCI: 00:00.0

 1136 12:18:52.720737     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1137 12:18:52.721534     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1138 12:18:52.721665     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1139 12:18:52.722560     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1140 12:18:52.725095     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1141 12:18:52.735399     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1142 12:18:52.745256     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1143 12:18:52.755207     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1144 12:18:52.762091     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1145 12:18:52.771602     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1146 12:18:52.782048     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1147 12:18:52.791575     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1148 12:18:52.801941     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1149 12:18:52.812206     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1150 12:18:52.818650     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1151 12:18:52.828404     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1152 12:18:52.832046     PCI: 00:02.0

 1153 12:18:52.841749     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1154 12:18:52.851980     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1155 12:18:52.858340     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1156 12:18:52.861681     PCI: 00:04.0

 1157 12:18:52.862022     PCI: 00:08.0

 1158 12:18:52.872035     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1159 12:18:52.875327     PCI: 00:12.0

 1160 12:18:52.885053     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1161 12:18:52.888370     PCI: 00:14.0 child on link 0 USB0 port 0

 1162 12:18:52.898590     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1163 12:18:52.901889      USB0 port 0 child on link 0 USB2 port 0

 1164 12:18:52.905052       USB2 port 0

 1165 12:18:52.908674       USB2 port 1

 1166 12:18:52.909034       USB2 port 2

 1167 12:18:52.911484       USB2 port 3

 1168 12:18:52.911874       USB2 port 5

 1169 12:18:52.914905       USB2 port 6

 1170 12:18:52.915393       USB2 port 9

 1171 12:18:52.918381       USB3 port 0

 1172 12:18:52.919030       USB3 port 1

 1173 12:18:52.921996       USB3 port 2

 1174 12:18:52.922610       USB3 port 3

 1175 12:18:52.925167       USB3 port 4

 1176 12:18:52.925783     PCI: 00:14.2

 1177 12:18:52.934865     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1178 12:18:52.944833     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1179 12:18:52.948152     PCI: 00:14.3

 1180 12:18:52.958303     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1181 12:18:52.961680     PCI: 00:15.0 child on link 0 I2C: 01:15

 1182 12:18:52.971160     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1183 12:18:52.975187      I2C: 01:15

 1184 12:18:52.978081     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1185 12:18:52.988022     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1186 12:18:52.988700      I2C: 02:5d

 1187 12:18:52.991637      GENERIC: 0.0

 1188 12:18:52.992005     PCI: 00:16.0

 1189 12:18:53.001498     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 12:18:53.004814     PCI: 00:17.0

 1191 12:18:53.014613     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1192 12:18:53.021379     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1193 12:18:53.030975     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1194 12:18:53.037455     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1195 12:18:53.047978     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1196 12:18:53.054700     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1197 12:18:53.060849     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1198 12:18:53.071090     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1199 12:18:53.071308      I2C: 03:1a

 1200 12:18:53.074112      I2C: 03:38

 1201 12:18:53.074313      I2C: 03:39

 1202 12:18:53.077730      I2C: 03:3a

 1203 12:18:53.077931      I2C: 03:3b

 1204 12:18:53.081448     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1205 12:18:53.091155     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1206 12:18:53.100901     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1207 12:18:53.111190     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1208 12:18:53.111414      PCI: 01:00.0

 1209 12:18:53.120928      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1210 12:18:53.124112     PCI: 00:1e.0

 1211 12:18:53.134321     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1212 12:18:53.143881     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1213 12:18:53.147235     PCI: 00:1e.2 child on link 0 SPI: 00

 1214 12:18:53.157835     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1215 12:18:53.160918      SPI: 00

 1216 12:18:53.164281     PCI: 00:1e.3 child on link 0 SPI: 01

 1217 12:18:53.174319     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1218 12:18:53.174834      SPI: 01

 1219 12:18:53.177365     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1220 12:18:53.187570     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1221 12:18:53.197517     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1222 12:18:53.197775      PNP: 0c09.0

 1223 12:18:53.207127      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1224 12:18:53.207345     PCI: 00:1f.3

 1225 12:18:53.217445     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1226 12:18:53.227062     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1227 12:18:53.230139     PCI: 00:1f.4

 1228 12:18:53.240514     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1229 12:18:53.250815     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1230 12:18:53.250922     PCI: 00:1f.5

 1231 12:18:53.260565     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1232 12:18:53.267111  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1233 12:18:53.274066  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1234 12:18:53.280788  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1235 12:18:53.283668  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1236 12:18:53.287201  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1237 12:18:53.291022  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1238 12:18:53.294017  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1239 12:18:53.300873  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1240 12:18:53.307182  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1241 12:18:53.314145  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1242 12:18:53.324128  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1243 12:18:53.330529  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1244 12:18:53.334471  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1245 12:18:53.343815  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1246 12:18:53.346978  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1247 12:18:53.350628  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1248 12:18:53.356839  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1249 12:18:53.360653  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1250 12:18:53.366934  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1251 12:18:53.370657  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1252 12:18:53.377024  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1253 12:18:53.380263  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1254 12:18:53.386859  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1255 12:18:53.389937  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1256 12:18:53.396956  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1257 12:18:53.399925  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1258 12:18:53.406583  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1259 12:18:53.410288  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1260 12:18:53.413596  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1261 12:18:53.420135  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1262 12:18:53.423228  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1263 12:18:53.429899  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1264 12:18:53.433627  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1265 12:18:53.439861  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1266 12:18:53.442969  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1267 12:18:53.449934  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1268 12:18:53.453199  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1269 12:18:53.463442  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1270 12:18:53.466647  avoid_fixed_resources: DOMAIN: 0000

 1271 12:18:53.473097  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1272 12:18:53.476482  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1273 12:18:53.486491  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1274 12:18:53.492829  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1275 12:18:53.499717  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1276 12:18:53.509388  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1277 12:18:53.516187  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1278 12:18:53.523174  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1279 12:18:53.529565  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1280 12:18:53.539509  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1281 12:18:53.546527  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1282 12:18:53.552806  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1283 12:18:53.556630  Setting resources...

 1284 12:18:53.562999  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1285 12:18:53.566103  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1286 12:18:53.569963  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1287 12:18:53.573248  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1288 12:18:53.576539  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1289 12:18:53.582972  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1290 12:18:53.589432  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1291 12:18:53.596523  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1292 12:18:53.602890  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1293 12:18:53.609811  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1294 12:18:53.613045  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1295 12:18:53.619802  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1296 12:18:53.622991  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1297 12:18:53.629442  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1298 12:18:53.632819  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1299 12:18:53.639559  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1300 12:18:53.642779  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1301 12:18:53.649761  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1302 12:18:53.652970  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1303 12:18:53.659532  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1304 12:18:53.662907  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1305 12:18:53.669663  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1306 12:18:53.672858  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1307 12:18:53.675873  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1308 12:18:53.682374  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1309 12:18:53.685742  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1310 12:18:53.692335  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1311 12:18:53.696100  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1312 12:18:53.702603  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1313 12:18:53.705680  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1314 12:18:53.712490  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1315 12:18:53.716108  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1316 12:18:53.722449  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1317 12:18:53.732630  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1318 12:18:53.739042  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1319 12:18:53.745835  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1320 12:18:53.749553  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1321 12:18:53.759531  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1322 12:18:53.762845  Root Device assign_resources, bus 0 link: 0

 1323 12:18:53.766065  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1324 12:18:53.776988  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1325 12:18:53.783148  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1326 12:18:53.792826  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1327 12:18:53.800007  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1328 12:18:53.809804  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1329 12:18:53.816640  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1330 12:18:53.823101  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1331 12:18:53.826306  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1332 12:18:53.833453  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1333 12:18:53.842986  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1334 12:18:53.849991  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1335 12:18:53.859491  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1336 12:18:53.863002  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1337 12:18:53.869847  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1338 12:18:53.876730  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1339 12:18:53.883078  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1340 12:18:53.886119  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1341 12:18:53.892976  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1342 12:18:53.903388  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1343 12:18:53.909817  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1344 12:18:53.919959  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1345 12:18:53.926229  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1346 12:18:53.933416  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1347 12:18:53.939824  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1348 12:18:53.949762  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1349 12:18:53.953284  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1350 12:18:53.959704  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1351 12:18:53.966368  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1352 12:18:53.976145  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1353 12:18:53.986368  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1354 12:18:53.989513  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1355 12:18:53.995992  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1356 12:18:54.003033  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1357 12:18:54.009299  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1358 12:18:54.019455  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1359 12:18:54.022475  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1360 12:18:54.029462  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1361 12:18:54.036475  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1362 12:18:54.039095  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1363 12:18:54.046155  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1364 12:18:54.049694  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1365 12:18:54.055845  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1366 12:18:54.059694  LPC: Trying to open IO window from 800 size 1ff

 1367 12:18:54.069651  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1368 12:18:54.075806  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1369 12:18:54.086406  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1370 12:18:54.092659  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1371 12:18:54.099018  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1372 12:18:54.102200  Root Device assign_resources, bus 0 link: 0

 1373 12:18:54.105463  Done setting resources.

 1374 12:18:54.112565  Show resources in subtree (Root Device)...After assigning values.

 1375 12:18:54.115641   Root Device child on link 0 CPU_CLUSTER: 0

 1376 12:18:54.118743    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1377 12:18:54.122007     APIC: 00

 1378 12:18:54.122101     APIC: 03

 1379 12:18:54.122171     APIC: 01

 1380 12:18:54.125503     APIC: 02

 1381 12:18:54.125594     APIC: 04

 1382 12:18:54.128586     APIC: 07

 1383 12:18:54.128703     APIC: 05

 1384 12:18:54.128805     APIC: 06

 1385 12:18:54.135397    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1386 12:18:54.145143    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1387 12:18:54.155426    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1388 12:18:54.155555     PCI: 00:00.0

 1389 12:18:54.164974     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1390 12:18:54.174979     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1391 12:18:54.185140     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1392 12:18:54.195253     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1393 12:18:54.205013     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1394 12:18:54.211475     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1395 12:18:54.221231     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1396 12:18:54.231731     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1397 12:18:54.241405     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1398 12:18:54.251450     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1399 12:18:54.258003     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1400 12:18:54.268177     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1401 12:18:54.277942     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1402 12:18:54.287481     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1403 12:18:54.297445     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1404 12:18:54.307858     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1405 12:18:54.308028     PCI: 00:02.0

 1406 12:18:54.317528     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1407 12:18:54.330989     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1408 12:18:54.337354     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1409 12:18:54.340470     PCI: 00:04.0

 1410 12:18:54.340628     PCI: 00:08.0

 1411 12:18:54.353929     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1412 12:18:54.354097     PCI: 00:12.0

 1413 12:18:54.363682     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1414 12:18:54.370666     PCI: 00:14.0 child on link 0 USB0 port 0

 1415 12:18:54.380269     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1416 12:18:54.384015      USB0 port 0 child on link 0 USB2 port 0

 1417 12:18:54.387021       USB2 port 0

 1418 12:18:54.387153       USB2 port 1

 1419 12:18:54.390144       USB2 port 2

 1420 12:18:54.390256       USB2 port 3

 1421 12:18:54.393485       USB2 port 5

 1422 12:18:54.393606       USB2 port 6

 1423 12:18:54.397356       USB2 port 9

 1424 12:18:54.397456       USB3 port 0

 1425 12:18:54.400390       USB3 port 1

 1426 12:18:54.400489       USB3 port 2

 1427 12:18:54.403664       USB3 port 3

 1428 12:18:54.403763       USB3 port 4

 1429 12:18:54.406671     PCI: 00:14.2

 1430 12:18:54.416992     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1431 12:18:54.426948     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1432 12:18:54.430065     PCI: 00:14.3

 1433 12:18:54.439941     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1434 12:18:54.443014     PCI: 00:15.0 child on link 0 I2C: 01:15

 1435 12:18:54.452999     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1436 12:18:54.456647      I2C: 01:15

 1437 12:18:54.459571     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1438 12:18:54.469643     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1439 12:18:54.469759      I2C: 02:5d

 1440 12:18:54.473215      GENERIC: 0.0

 1441 12:18:54.476221     PCI: 00:16.0

 1442 12:18:54.486487     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1443 12:18:54.486606     PCI: 00:17.0

 1444 12:18:54.496454     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1445 12:18:54.506121     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1446 12:18:54.516346     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1447 12:18:54.526228     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1448 12:18:54.536379     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1449 12:18:54.546167     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1450 12:18:54.549216     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1451 12:18:54.559019     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1452 12:18:54.562112      I2C: 03:1a

 1453 12:18:54.562361      I2C: 03:38

 1454 12:18:54.562516      I2C: 03:39

 1455 12:18:54.565446      I2C: 03:3a

 1456 12:18:54.565661      I2C: 03:3b

 1457 12:18:54.572365     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1458 12:18:54.582603     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1459 12:18:54.592472     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1460 12:18:54.602189     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1461 12:18:54.602453      PCI: 01:00.0

 1462 12:18:54.611979      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1463 12:18:54.615411     PCI: 00:1e.0

 1464 12:18:54.625613     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1465 12:18:54.635424     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1466 12:18:54.641958     PCI: 00:1e.2 child on link 0 SPI: 00

 1467 12:18:54.651667     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1468 12:18:54.651889      SPI: 00

 1469 12:18:54.654855     PCI: 00:1e.3 child on link 0 SPI: 01

 1470 12:18:54.665076     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1471 12:18:54.668379      SPI: 01

 1472 12:18:54.671445     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1473 12:18:54.681678     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1474 12:18:54.687889     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1475 12:18:54.691319      PNP: 0c09.0

 1476 12:18:54.701585      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1477 12:18:54.701846     PCI: 00:1f.3

 1478 12:18:54.711338     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1479 12:18:54.721403     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1480 12:18:54.724445     PCI: 00:1f.4

 1481 12:18:54.734387     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1482 12:18:54.744220     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1483 12:18:54.744482     PCI: 00:1f.5

 1484 12:18:54.754667     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1485 12:18:54.757918  Done allocating resources.

 1486 12:18:54.764441  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1487 12:18:54.767472  Enabling resources...

 1488 12:18:54.770654  PCI: 00:00.0 subsystem <- 8086/9b61

 1489 12:18:54.773991  PCI: 00:00.0 cmd <- 06

 1490 12:18:54.777710  PCI: 00:02.0 subsystem <- 8086/9b41

 1491 12:18:54.780943  PCI: 00:02.0 cmd <- 03

 1492 12:18:54.781039  PCI: 00:08.0 cmd <- 06

 1493 12:18:54.787296  PCI: 00:12.0 subsystem <- 8086/02f9

 1494 12:18:54.787419  PCI: 00:12.0 cmd <- 02

 1495 12:18:54.790605  PCI: 00:14.0 subsystem <- 8086/02ed

 1496 12:18:54.793724  PCI: 00:14.0 cmd <- 02

 1497 12:18:54.797393  PCI: 00:14.2 cmd <- 02

 1498 12:18:54.800318  PCI: 00:14.3 subsystem <- 8086/02f0

 1499 12:18:54.804066  PCI: 00:14.3 cmd <- 02

 1500 12:18:54.807314  PCI: 00:15.0 subsystem <- 8086/02e8

 1501 12:18:54.810523  PCI: 00:15.0 cmd <- 02

 1502 12:18:54.813691  PCI: 00:15.1 subsystem <- 8086/02e9

 1503 12:18:54.817519  PCI: 00:15.1 cmd <- 02

 1504 12:18:54.820674  PCI: 00:16.0 subsystem <- 8086/02e0

 1505 12:18:54.820770  PCI: 00:16.0 cmd <- 02

 1506 12:18:54.827622  PCI: 00:17.0 subsystem <- 8086/02d3

 1507 12:18:54.827751  PCI: 00:17.0 cmd <- 03

 1508 12:18:54.830622  PCI: 00:19.0 subsystem <- 8086/02c5

 1509 12:18:54.834167  PCI: 00:19.0 cmd <- 02

 1510 12:18:54.837443  PCI: 00:1d.0 bridge ctrl <- 0013

 1511 12:18:54.840722  PCI: 00:1d.0 subsystem <- 8086/02b0

 1512 12:18:54.843953  PCI: 00:1d.0 cmd <- 06

 1513 12:18:54.847028  PCI: 00:1e.0 subsystem <- 8086/02a8

 1514 12:18:54.850542  PCI: 00:1e.0 cmd <- 06

 1515 12:18:54.854149  PCI: 00:1e.2 subsystem <- 8086/02aa

 1516 12:18:54.857089  PCI: 00:1e.2 cmd <- 06

 1517 12:18:54.860475  PCI: 00:1e.3 subsystem <- 8086/02ab

 1518 12:18:54.864292  PCI: 00:1e.3 cmd <- 02

 1519 12:18:54.866928  PCI: 00:1f.0 subsystem <- 8086/0284

 1520 12:18:54.870676  PCI: 00:1f.0 cmd <- 407

 1521 12:18:54.873772  PCI: 00:1f.3 subsystem <- 8086/02c8

 1522 12:18:54.877528  PCI: 00:1f.3 cmd <- 02

 1523 12:18:54.880594  PCI: 00:1f.4 subsystem <- 8086/02a3

 1524 12:18:54.880795  PCI: 00:1f.4 cmd <- 03

 1525 12:18:54.887385  PCI: 00:1f.5 subsystem <- 8086/02a4

 1526 12:18:54.887571  PCI: 00:1f.5 cmd <- 406

 1527 12:18:54.897419  PCI: 01:00.0 cmd <- 02

 1528 12:18:54.902500  done.

 1529 12:18:54.913090  ME: Version: 14.0.39.1367

 1530 12:18:54.919828  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10

 1531 12:18:54.923030  Initializing devices...

 1532 12:18:54.923144  Root Device init ...

 1533 12:18:54.929600  Chrome EC: Set SMI mask to 0x0000000000000000

 1534 12:18:54.932835  Chrome EC: clear events_b mask to 0x0000000000000000

 1535 12:18:54.939448  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1536 12:18:54.946430  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1537 12:18:54.952886  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1538 12:18:54.956670  Chrome EC: Set WAKE mask to 0x0000000000000000

 1539 12:18:54.959892  Root Device init finished in 35202 usecs

 1540 12:18:54.962845  CPU_CLUSTER: 0 init ...

 1541 12:18:54.969639  CPU_CLUSTER: 0 init finished in 2439 usecs

 1542 12:18:54.974002  PCI: 00:00.0 init ...

 1543 12:18:54.977262  CPU TDP: 15 Watts

 1544 12:18:54.980384  CPU PL2 = 64 Watts

 1545 12:18:54.983562  PCI: 00:00.0 init finished in 7080 usecs

 1546 12:18:54.986693  PCI: 00:02.0 init ...

 1547 12:18:54.990532  PCI: 00:02.0 init finished in 2253 usecs

 1548 12:18:54.993539  PCI: 00:08.0 init ...

 1549 12:18:54.997178  PCI: 00:08.0 init finished in 2251 usecs

 1550 12:18:55.000423  PCI: 00:12.0 init ...

 1551 12:18:55.003640  PCI: 00:12.0 init finished in 2253 usecs

 1552 12:18:55.006768  PCI: 00:14.0 init ...

 1553 12:18:55.010013  PCI: 00:14.0 init finished in 2251 usecs

 1554 12:18:55.013719  PCI: 00:14.2 init ...

 1555 12:18:55.017124  PCI: 00:14.2 init finished in 2252 usecs

 1556 12:18:55.020056  PCI: 00:14.3 init ...

 1557 12:18:55.023223  PCI: 00:14.3 init finished in 2272 usecs

 1558 12:18:55.026956  PCI: 00:15.0 init ...

 1559 12:18:55.030235  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1560 12:18:55.033313  PCI: 00:15.0 init finished in 5975 usecs

 1561 12:18:55.036759  PCI: 00:15.1 init ...

 1562 12:18:55.039867  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1563 12:18:55.046547  PCI: 00:15.1 init finished in 5978 usecs

 1564 12:18:55.046644  PCI: 00:16.0 init ...

 1565 12:18:55.053373  PCI: 00:16.0 init finished in 2251 usecs

 1566 12:18:55.053498  PCI: 00:19.0 init ...

 1567 12:18:55.059922  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1568 12:18:55.062930  PCI: 00:19.0 init finished in 5976 usecs

 1569 12:18:55.066682  PCI: 00:1d.0 init ...

 1570 12:18:55.069828  Initializing PCH PCIe bridge.

 1571 12:18:55.073166  PCI: 00:1d.0 init finished in 5276 usecs

 1572 12:18:55.076195  PCI: 00:1f.0 init ...

 1573 12:18:55.079701  IOAPIC: Initializing IOAPIC at 0xfec00000

 1574 12:18:55.086090  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1575 12:18:55.086188  IOAPIC: ID = 0x02

 1576 12:18:55.089328  IOAPIC: Dumping registers

 1577 12:18:55.092728    reg 0x0000: 0x02000000

 1578 12:18:55.092816    reg 0x0001: 0x00770020

 1579 12:18:55.096421    reg 0x0002: 0x00000000

 1580 12:18:55.102900  PCI: 00:1f.0 init finished in 23521 usecs

 1581 12:18:55.105840  PCI: 00:1f.4 init ...

 1582 12:18:55.109440  PCI: 00:1f.4 init finished in 2263 usecs

 1583 12:18:55.119818  PCI: 01:00.0 init ...

 1584 12:18:55.122930  PCI: 01:00.0 init finished in 2252 usecs

 1585 12:18:55.127515  PNP: 0c09.0 init ...

 1586 12:18:55.130843  Google Chrome EC uptime: 11.054 seconds

 1587 12:18:55.137665  Google Chrome AP resets since EC boot: 0

 1588 12:18:55.140854  Google Chrome most recent AP reset causes:

 1589 12:18:55.147330  Google Chrome EC reset flags at last EC boot: reset-pin

 1590 12:18:55.150474  PNP: 0c09.0 init finished in 20572 usecs

 1591 12:18:55.153841  Devices initialized

 1592 12:18:55.153954  Show all devs... After init.

 1593 12:18:55.157044  Root Device: enabled 1

 1594 12:18:55.160628  CPU_CLUSTER: 0: enabled 1

 1595 12:18:55.163804  DOMAIN: 0000: enabled 1

 1596 12:18:55.163892  APIC: 00: enabled 1

 1597 12:18:55.166890  PCI: 00:00.0: enabled 1

 1598 12:18:55.170582  PCI: 00:02.0: enabled 1

 1599 12:18:55.173793  PCI: 00:04.0: enabled 0

 1600 12:18:55.173887  PCI: 00:05.0: enabled 0

 1601 12:18:55.176859  PCI: 00:12.0: enabled 1

 1602 12:18:55.180059  PCI: 00:12.5: enabled 0

 1603 12:18:55.180174  PCI: 00:12.6: enabled 0

 1604 12:18:55.183943  PCI: 00:14.0: enabled 1

 1605 12:18:55.187185  PCI: 00:14.1: enabled 0

 1606 12:18:55.190319  PCI: 00:14.3: enabled 1

 1607 12:18:55.190420  PCI: 00:14.5: enabled 0

 1608 12:18:55.193517  PCI: 00:15.0: enabled 1

 1609 12:18:55.196681  PCI: 00:15.1: enabled 1

 1610 12:18:55.199978  PCI: 00:15.2: enabled 0

 1611 12:18:55.200113  PCI: 00:15.3: enabled 0

 1612 12:18:55.203384  PCI: 00:16.0: enabled 1

 1613 12:18:55.206690  PCI: 00:16.1: enabled 0

 1614 12:18:55.209871  PCI: 00:16.2: enabled 0

 1615 12:18:55.209970  PCI: 00:16.3: enabled 0

 1616 12:18:55.213392  PCI: 00:16.4: enabled 0

 1617 12:18:55.216427  PCI: 00:16.5: enabled 0

 1618 12:18:55.220276  PCI: 00:17.0: enabled 1

 1619 12:18:55.220385  PCI: 00:19.0: enabled 1

 1620 12:18:55.223631  PCI: 00:19.1: enabled 0

 1621 12:18:55.226868  PCI: 00:19.2: enabled 0

 1622 12:18:55.226958  PCI: 00:1a.0: enabled 0

 1623 12:18:55.229898  PCI: 00:1c.0: enabled 0

 1624 12:18:55.233136  PCI: 00:1c.1: enabled 0

 1625 12:18:55.236788  PCI: 00:1c.2: enabled 0

 1626 12:18:55.236871  PCI: 00:1c.3: enabled 0

 1627 12:18:55.239793  PCI: 00:1c.4: enabled 0

 1628 12:18:55.243349  PCI: 00:1c.5: enabled 0

 1629 12:18:55.246422  PCI: 00:1c.6: enabled 0

 1630 12:18:55.246517  PCI: 00:1c.7: enabled 0

 1631 12:18:55.249869  PCI: 00:1d.0: enabled 1

 1632 12:18:55.252992  PCI: 00:1d.1: enabled 0

 1633 12:18:55.256174  PCI: 00:1d.2: enabled 0

 1634 12:18:55.256282  PCI: 00:1d.3: enabled 0

 1635 12:18:55.259556  PCI: 00:1d.4: enabled 0

 1636 12:18:55.263144  PCI: 00:1d.5: enabled 0

 1637 12:18:55.263230  PCI: 00:1e.0: enabled 1

 1638 12:18:55.266265  PCI: 00:1e.1: enabled 0

 1639 12:18:55.269675  PCI: 00:1e.2: enabled 1

 1640 12:18:55.273237  PCI: 00:1e.3: enabled 1

 1641 12:18:55.273325  PCI: 00:1f.0: enabled 1

 1642 12:18:55.276261  PCI: 00:1f.1: enabled 0

 1643 12:18:55.279466  PCI: 00:1f.2: enabled 0

 1644 12:18:55.282613  PCI: 00:1f.3: enabled 1

 1645 12:18:55.282696  PCI: 00:1f.4: enabled 1

 1646 12:18:55.286402  PCI: 00:1f.5: enabled 1

 1647 12:18:55.289627  PCI: 00:1f.6: enabled 0

 1648 12:18:55.292922  USB0 port 0: enabled 1

 1649 12:18:55.293044  I2C: 01:15: enabled 1

 1650 12:18:55.296083  I2C: 02:5d: enabled 1

 1651 12:18:55.299469  GENERIC: 0.0: enabled 1

 1652 12:18:55.299569  I2C: 03:1a: enabled 1

 1653 12:18:55.302686  I2C: 03:38: enabled 1

 1654 12:18:55.306419  I2C: 03:39: enabled 1

 1655 12:18:55.306516  I2C: 03:3a: enabled 1

 1656 12:18:55.309713  I2C: 03:3b: enabled 1

 1657 12:18:55.312850  PCI: 00:00.0: enabled 1

 1658 12:18:55.312948  SPI: 00: enabled 1

 1659 12:18:55.316399  SPI: 01: enabled 1

 1660 12:18:55.319211  PNP: 0c09.0: enabled 1

 1661 12:18:55.319317  USB2 port 0: enabled 1

 1662 12:18:55.322680  USB2 port 1: enabled 1

 1663 12:18:55.326222  USB2 port 2: enabled 0

 1664 12:18:55.326345  USB2 port 3: enabled 0

 1665 12:18:55.329371  USB2 port 5: enabled 0

 1666 12:18:55.332327  USB2 port 6: enabled 1

 1667 12:18:55.335801  USB2 port 9: enabled 1

 1668 12:18:55.335919  USB3 port 0: enabled 1

 1669 12:18:55.339328  USB3 port 1: enabled 1

 1670 12:18:55.342176  USB3 port 2: enabled 1

 1671 12:18:55.342299  USB3 port 3: enabled 1

 1672 12:18:55.345864  USB3 port 4: enabled 0

 1673 12:18:55.349087  APIC: 03: enabled 1

 1674 12:18:55.349203  APIC: 01: enabled 1

 1675 12:18:55.352393  APIC: 02: enabled 1

 1676 12:18:55.355673  APIC: 04: enabled 1

 1677 12:18:55.355799  APIC: 07: enabled 1

 1678 12:18:55.359317  APIC: 05: enabled 1

 1679 12:18:55.359433  APIC: 06: enabled 1

 1680 12:18:55.362303  PCI: 00:08.0: enabled 1

 1681 12:18:55.365618  PCI: 00:14.2: enabled 1

 1682 12:18:55.369443  PCI: 01:00.0: enabled 1

 1683 12:18:55.372556  Disabling ACPI via APMC:

 1684 12:18:55.372664  done.

 1685 12:18:55.379053  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1686 12:18:55.382559  ELOG: NV offset 0xaf0000 size 0x4000

 1687 12:18:55.389650  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1688 12:18:55.395726  ELOG: Event(17) added with size 13 at 2023-12-08 12:18:27 UTC

 1689 12:18:55.402608  ELOG: Event(92) added with size 9 at 2023-12-08 12:18:27 UTC

 1690 12:18:55.409107  ELOG: Event(93) added with size 9 at 2023-12-08 12:18:27 UTC

 1691 12:18:55.415961  ELOG: Event(9A) added with size 9 at 2023-12-08 12:18:27 UTC

 1692 12:18:55.422342  ELOG: Event(9E) added with size 10 at 2023-12-08 12:18:27 UTC

 1693 12:18:55.428821  ELOG: Event(9F) added with size 14 at 2023-12-08 12:18:27 UTC

 1694 12:18:55.432062  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1695 12:18:55.439313  ELOG: Event(A1) added with size 10 at 2023-12-08 12:18:27 UTC

 1696 12:18:55.449180  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1697 12:18:55.455878  ELOG: Event(A0) added with size 9 at 2023-12-08 12:18:27 UTC

 1698 12:18:55.459124  elog_add_boot_reason: Logged dev mode boot

 1699 12:18:55.459260  Finalize devices...

 1700 12:18:55.462542  PCI: 00:17.0 final

 1701 12:18:55.465804  Devices finalized

 1702 12:18:55.468939  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1703 12:18:55.475612  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1704 12:18:55.479035  ME: HFSTS1                  : 0x90000245

 1705 12:18:55.482332  ME: HFSTS2                  : 0x3B850126

 1706 12:18:55.488640  ME: HFSTS3                  : 0x00000020

 1707 12:18:55.492153  ME: HFSTS4                  : 0x00004800

 1708 12:18:55.495820  ME: HFSTS5                  : 0x00000000

 1709 12:18:55.499054  ME: HFSTS6                  : 0x40400006

 1710 12:18:55.502202  ME: Manufacturing Mode      : NO

 1711 12:18:55.505596  ME: FW Partition Table      : OK

 1712 12:18:55.508820  ME: Bringup Loader Failure  : NO

 1713 12:18:55.511996  ME: Firmware Init Complete  : YES

 1714 12:18:55.515657  ME: Boot Options Present    : NO

 1715 12:18:55.518802  ME: Update In Progress      : NO

 1716 12:18:55.522031  ME: D0i3 Support            : YES

 1717 12:18:55.525229  ME: Low Power State Enabled : NO

 1718 12:18:55.528475  ME: CPU Replaced            : NO

 1719 12:18:55.531808  ME: CPU Replacement Valid   : YES

 1720 12:18:55.535602  ME: Current Working State   : 5

 1721 12:18:55.538864  ME: Current Operation State : 1

 1722 12:18:55.542149  ME: Current Operation Mode  : 0

 1723 12:18:55.545207  ME: Error Code              : 0

 1724 12:18:55.548905  ME: CPU Debug Disabled      : YES

 1725 12:18:55.551868  ME: TXT Support             : NO

 1726 12:18:55.558398  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1727 12:18:55.561773  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1728 12:18:55.564755  CBFS @ c08000 size 3f8000

 1729 12:18:55.571751  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1730 12:18:55.574857  CBFS: Locating 'fallback/dsdt.aml'

 1731 12:18:55.578381  CBFS: Found @ offset 10bb80 size 3fa5

 1732 12:18:55.584739  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1733 12:18:55.588382  CBFS @ c08000 size 3f8000

 1734 12:18:55.591431  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1735 12:18:55.594766  CBFS: Locating 'fallback/slic'

 1736 12:18:55.599534  CBFS: 'fallback/slic' not found.

 1737 12:18:55.606115  ACPI: Writing ACPI tables at 99b3e000.

 1738 12:18:55.606235  ACPI:    * FACS

 1739 12:18:55.609535  ACPI:    * DSDT

 1740 12:18:55.636322  Ramoops buffer: 0x100000@0x99a3d000.

 1741 12:18:55.636452  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1742 12:18:55.636530  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1743 12:18:55.636610  Google Chrome EC: version:

 1744 12:18:55.636679  	ro: helios_v2.0.2659-56403530b

 1745 12:18:55.636743  	rw: helios_v2.0.2849-c41de27e7d

 1746 12:18:55.636805    running image: 1

 1747 12:18:55.637076  ACPI:    * FADT

 1748 12:18:55.637149  SCI is IRQ9

 1749 12:18:55.643990  ACPI: added table 1/32, length now 40

 1750 12:18:55.644089  ACPI:     * SSDT

 1751 12:18:55.647281  Found 1 CPU(s) with 8 core(s) each.

 1752 12:18:55.650737  Error: Could not locate 'wifi_sar' in VPD.

 1753 12:18:55.656607  Checking CBFS for default SAR values

 1754 12:18:55.659963  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1755 12:18:55.663460  CBFS @ c08000 size 3f8000

 1756 12:18:55.670049  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1757 12:18:55.673227  CBFS: Locating 'wifi_sar_defaults.hex'

 1758 12:18:55.676515  CBFS: Found @ offset 5fac0 size 77

 1759 12:18:55.680317  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1760 12:18:55.683489  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1761 12:18:55.689818  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1762 12:18:55.696725  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1763 12:18:55.700002  failed to find key in VPD: dsm_calib_r0_0

 1764 12:18:55.709905  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1765 12:18:55.713129  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1766 12:18:55.716928  failed to find key in VPD: dsm_calib_r0_1

 1767 12:18:55.726470  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1768 12:18:55.733028  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1769 12:18:55.736062  failed to find key in VPD: dsm_calib_r0_2

 1770 12:18:55.746424  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1771 12:18:55.749632  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1772 12:18:55.756155  failed to find key in VPD: dsm_calib_r0_3

 1773 12:18:55.762881  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1774 12:18:55.769298  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1775 12:18:55.772772  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1776 12:18:55.776304  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1777 12:18:55.779995  EC returned error result code 1

 1778 12:18:55.783981  EC returned error result code 1

 1779 12:18:55.787870  EC returned error result code 1

 1780 12:18:55.794114  PS2K: Bad resp from EC. Vivaldi disabled!

 1781 12:18:55.797496  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1782 12:18:55.804206  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1783 12:18:55.810949  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1784 12:18:55.814008  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1785 12:18:55.820304  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1786 12:18:55.826859  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1787 12:18:55.833725  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1788 12:18:55.837436  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1789 12:18:55.840113  ACPI: added table 2/32, length now 44

 1790 12:18:55.843802  ACPI:    * MCFG

 1791 12:18:55.846897  ACPI: added table 3/32, length now 48

 1792 12:18:55.850074  ACPI:    * TPM2

 1793 12:18:55.853340  TPM2 log created at 99a2d000

 1794 12:18:55.857104  ACPI: added table 4/32, length now 52

 1795 12:18:55.857212  ACPI:    * MADT

 1796 12:18:55.860349  SCI is IRQ9

 1797 12:18:55.863550  ACPI: added table 5/32, length now 56

 1798 12:18:55.863677  current = 99b43ac0

 1799 12:18:55.866622  ACPI:    * DMAR

 1800 12:18:55.870422  ACPI: added table 6/32, length now 60

 1801 12:18:55.873753  ACPI:    * IGD OpRegion

 1802 12:18:55.873852  GMA: Found VBT in CBFS

 1803 12:18:55.876825  GMA: Found valid VBT in CBFS

 1804 12:18:55.880452  ACPI: added table 7/32, length now 64

 1805 12:18:55.883386  ACPI:    * HPET

 1806 12:18:55.887013  ACPI: added table 8/32, length now 68

 1807 12:18:55.887106  ACPI: done.

 1808 12:18:55.890017  ACPI tables: 31744 bytes.

 1809 12:18:55.893725  smbios_write_tables: 99a2c000

 1810 12:18:55.897038  EC returned error result code 3

 1811 12:18:55.900045  Couldn't obtain OEM name from CBI

 1812 12:18:55.903882  Create SMBIOS type 17

 1813 12:18:55.906995  PCI: 00:00.0 (Intel Cannonlake)

 1814 12:18:55.910202  PCI: 00:14.3 (Intel WiFi)

 1815 12:18:55.913683  SMBIOS tables: 939 bytes.

 1816 12:18:55.916903  Writing table forward entry at 0x00000500

 1817 12:18:55.924059  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1818 12:18:55.927055  Writing coreboot table at 0x99b62000

 1819 12:18:55.933532   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1820 12:18:55.936930   1. 0000000000001000-000000000009ffff: RAM

 1821 12:18:55.940115   2. 00000000000a0000-00000000000fffff: RESERVED

 1822 12:18:55.946530   3. 0000000000100000-0000000099a2bfff: RAM

 1823 12:18:55.950273   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1824 12:18:55.956960   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1825 12:18:55.963110   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1826 12:18:55.966369   7. 000000009a000000-000000009f7fffff: RESERVED

 1827 12:18:55.973485   8. 00000000e0000000-00000000efffffff: RESERVED

 1828 12:18:55.976763   9. 00000000fc000000-00000000fc000fff: RESERVED

 1829 12:18:55.979882  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1830 12:18:55.986686  11. 00000000fed10000-00000000fed17fff: RESERVED

 1831 12:18:55.989602  12. 00000000fed80000-00000000fed83fff: RESERVED

 1832 12:18:55.996429  13. 00000000fed90000-00000000fed91fff: RESERVED

 1833 12:18:55.999394  14. 00000000feda0000-00000000feda1fff: RESERVED

 1834 12:18:56.003250  15. 0000000100000000-000000045e7fffff: RAM

 1835 12:18:56.009520  Graphics framebuffer located at 0xc0000000

 1836 12:18:56.012812  Passing 5 GPIOs to payload:

 1837 12:18:56.016145              NAME |       PORT | POLARITY |     VALUE

 1838 12:18:56.022942     write protect |  undefined |     high |       low

 1839 12:18:56.026613               lid |  undefined |     high |      high

 1840 12:18:56.033009             power |  undefined |     high |       low

 1841 12:18:56.039390             oprom |  undefined |     high |       low

 1842 12:18:56.042798          EC in RW | 0x000000cb |     high |       low

 1843 12:18:56.043087  Board ID: 4

 1844 12:18:56.049133  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1845 12:18:56.053098  CBFS @ c08000 size 3f8000

 1846 12:18:56.059172  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1847 12:18:56.063098  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264

 1848 12:18:56.066244  coreboot table: 1492 bytes.

 1849 12:18:56.069284  IMD ROOT    0. 99fff000 00001000

 1850 12:18:56.072571  IMD SMALL   1. 99ffe000 00001000

 1851 12:18:56.075833  FSP MEMORY  2. 99c4e000 003b0000

 1852 12:18:56.079447  CONSOLE     3. 99c2e000 00020000

 1853 12:18:56.082576  FMAP        4. 99c2d000 0000054e

 1854 12:18:56.086087  TIME STAMP  5. 99c2c000 00000910

 1855 12:18:56.089093  VBOOT WORK  6. 99c18000 00014000

 1856 12:18:56.092442  MRC DATA    7. 99c16000 00001958

 1857 12:18:56.095669  ROMSTG STCK 8. 99c15000 00001000

 1858 12:18:56.099583  AFTER CAR   9. 99c0b000 0000a000

 1859 12:18:56.102416  RAMSTAGE   10. 99baf000 0005c000

 1860 12:18:56.106016  REFCODE    11. 99b7a000 00035000

 1861 12:18:56.109005  SMM BACKUP 12. 99b6a000 00010000

 1862 12:18:56.112518  COREBOOT   13. 99b62000 00008000

 1863 12:18:56.115552  ACPI       14. 99b3e000 00024000

 1864 12:18:56.119309  ACPI GNVS  15. 99b3d000 00001000

 1865 12:18:56.122480  RAMOOPS    16. 99a3d000 00100000

 1866 12:18:56.125616  TPM2 TCGLOG17. 99a2d000 00010000

 1867 12:18:56.129256  SMBIOS     18. 99a2c000 00000800

 1868 12:18:56.132394  IMD small region:

 1869 12:18:56.135607    IMD ROOT    0. 99ffec00 00000400

 1870 12:18:56.138849    FSP RUNTIME 1. 99ffebe0 00000004

 1871 12:18:56.142536    EC HOSTEVENT 2. 99ffebc0 00000008

 1872 12:18:56.145868    POWER STATE 3. 99ffeb80 00000040

 1873 12:18:56.149066    ROMSTAGE    4. 99ffeb60 00000004

 1874 12:18:56.152160    MEM INFO    5. 99ffe9a0 000001b9

 1875 12:18:56.155630    VPD         6. 99ffe920 0000006c

 1876 12:18:56.158916  MTRR: Physical address space:

 1877 12:18:56.165726  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1878 12:18:56.172290  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1879 12:18:56.179187  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1880 12:18:56.185208  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1881 12:18:56.192408  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1882 12:18:56.195679  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1883 12:18:56.201717  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1884 12:18:56.209024  MTRR: Fixed MSR 0x250 0x0606060606060606

 1885 12:18:56.211966  MTRR: Fixed MSR 0x258 0x0606060606060606

 1886 12:18:56.215173  MTRR: Fixed MSR 0x259 0x0000000000000000

 1887 12:18:56.218480  MTRR: Fixed MSR 0x268 0x0606060606060606

 1888 12:18:56.224882  MTRR: Fixed MSR 0x269 0x0606060606060606

 1889 12:18:56.228154  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1890 12:18:56.231870  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1891 12:18:56.235441  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1892 12:18:56.238782  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1893 12:18:56.245126  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1894 12:18:56.248121  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1895 12:18:56.251532  call enable_fixed_mtrr()

 1896 12:18:56.254763  CPU physical address size: 39 bits

 1897 12:18:56.258549  MTRR: default type WB/UC MTRR counts: 6/8.

 1898 12:18:56.261765  MTRR: WB selected as default type.

 1899 12:18:56.268182  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1900 12:18:56.275252  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1901 12:18:56.281775  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1902 12:18:56.288425  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1903 12:18:56.294629  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1904 12:18:56.301740  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1905 12:18:56.304421  MTRR: Fixed MSR 0x250 0x0606060606060606

 1906 12:18:56.308180  MTRR: Fixed MSR 0x258 0x0606060606060606

 1907 12:18:56.315034  MTRR: Fixed MSR 0x259 0x0000000000000000

 1908 12:18:56.317757  MTRR: Fixed MSR 0x268 0x0606060606060606

 1909 12:18:56.321471  MTRR: Fixed MSR 0x269 0x0606060606060606

 1910 12:18:56.324558  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1911 12:18:56.331399  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1912 12:18:56.334477  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1913 12:18:56.337929  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1914 12:18:56.340977  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1915 12:18:56.344470  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1916 12:18:56.348011  

 1917 12:18:56.348138  MTRR check

 1918 12:18:56.350971  call enable_fixed_mtrr()

 1919 12:18:56.354395  Fixed MTRRs   : Enabled

 1920 12:18:56.354487  Variable MTRRs: Enabled

 1921 12:18:56.354558  

 1922 12:18:56.357525  CPU physical address size: 39 bits

 1923 12:18:56.364257  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1924 12:18:56.367389  MTRR: Fixed MSR 0x250 0x0606060606060606

 1925 12:18:56.374385  MTRR: Fixed MSR 0x250 0x0606060606060606

 1926 12:18:56.377530  MTRR: Fixed MSR 0x250 0x0606060606060606

 1927 12:18:56.380900  MTRR: Fixed MSR 0x258 0x0606060606060606

 1928 12:18:56.384081  MTRR: Fixed MSR 0x259 0x0000000000000000

 1929 12:18:56.387361  MTRR: Fixed MSR 0x268 0x0606060606060606

 1930 12:18:56.394032  MTRR: Fixed MSR 0x269 0x0606060606060606

 1931 12:18:56.397779  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1932 12:18:56.400963  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1933 12:18:56.404176  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1934 12:18:56.410486  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1935 12:18:56.414351  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1936 12:18:56.417464  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1937 12:18:56.420690  MTRR: Fixed MSR 0x258 0x0606060606060606

 1938 12:18:56.423824  call enable_fixed_mtrr()

 1939 12:18:56.427025  MTRR: Fixed MSR 0x259 0x0000000000000000

 1940 12:18:56.434035  MTRR: Fixed MSR 0x268 0x0606060606060606

 1941 12:18:56.437231  MTRR: Fixed MSR 0x269 0x0606060606060606

 1942 12:18:56.440956  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1943 12:18:56.443984  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1944 12:18:56.450270  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1945 12:18:56.453515  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1946 12:18:56.456889  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1947 12:18:56.460164  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1948 12:18:56.463767  CPU physical address size: 39 bits

 1949 12:18:56.467125  call enable_fixed_mtrr()

 1950 12:18:56.473754  MTRR: Fixed MSR 0x250 0x0606060606060606

 1951 12:18:56.476844  MTRR: Fixed MSR 0x258 0x0606060606060606

 1952 12:18:56.480310  MTRR: Fixed MSR 0x259 0x0000000000000000

 1953 12:18:56.483385  MTRR: Fixed MSR 0x268 0x0606060606060606

 1954 12:18:56.489996  MTRR: Fixed MSR 0x269 0x0606060606060606

 1955 12:18:56.493220  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1956 12:18:56.496722  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1957 12:18:56.500340  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1958 12:18:56.503272  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1959 12:18:56.509837  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1960 12:18:56.513230  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1961 12:18:56.516353  CPU physical address size: 39 bits

 1962 12:18:56.520139  call enable_fixed_mtrr()

 1963 12:18:56.523214  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1964 12:18:56.526471  CPU physical address size: 39 bits

 1965 12:18:56.533644  MTRR: Fixed MSR 0x258 0x0606060606060606

 1966 12:18:56.536820  MTRR: Fixed MSR 0x259 0x0000000000000000

 1967 12:18:56.540031  MTRR: Fixed MSR 0x268 0x0606060606060606

 1968 12:18:56.543314  MTRR: Fixed MSR 0x269 0x0606060606060606

 1969 12:18:56.549916  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1970 12:18:56.553752  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1971 12:18:56.556805  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1972 12:18:56.560090  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1973 12:18:56.563569  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1974 12:18:56.569988  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1975 12:18:56.570100  CBFS @ c08000 size 3f8000

 1976 12:18:56.576490  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1977 12:18:56.579951  MTRR: Fixed MSR 0x250 0x0606060606060606

 1978 12:18:56.586609  MTRR: Fixed MSR 0x250 0x0606060606060606

 1979 12:18:56.589924  MTRR: Fixed MSR 0x258 0x0606060606060606

 1980 12:18:56.593111  MTRR: Fixed MSR 0x259 0x0000000000000000

 1981 12:18:56.596186  MTRR: Fixed MSR 0x268 0x0606060606060606

 1982 12:18:56.603233  MTRR: Fixed MSR 0x269 0x0606060606060606

 1983 12:18:56.606026  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1984 12:18:56.609534  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1985 12:18:56.613107  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1986 12:18:56.619554  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1987 12:18:56.622667  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1988 12:18:56.625882  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1989 12:18:56.629902  MTRR: Fixed MSR 0x258 0x0606060606060606

 1990 12:18:56.636366  MTRR: Fixed MSR 0x259 0x0000000000000000

 1991 12:18:56.639506  MTRR: Fixed MSR 0x268 0x0606060606060606

 1992 12:18:56.642742  MTRR: Fixed MSR 0x269 0x0606060606060606

 1993 12:18:56.645999  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1994 12:18:56.652293  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1995 12:18:56.655648  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1996 12:18:56.659403  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1997 12:18:56.662650  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1998 12:18:56.668940  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1999 12:18:56.669109  call enable_fixed_mtrr()

 2000 12:18:56.672165  call enable_fixed_mtrr()

 2001 12:18:56.675433  CBFS: Locating 'fallback/payload'

 2002 12:18:56.679144  call enable_fixed_mtrr()

 2003 12:18:56.682199  CPU physical address size: 39 bits

 2004 12:18:56.685704  CPU physical address size: 39 bits

 2005 12:18:56.689058  CPU physical address size: 39 bits

 2006 12:18:56.692343  CBFS: Found @ offset 1c96c0 size 3f798

 2007 12:18:56.698726  Checking segment from ROM address 0xffdd16f8

 2008 12:18:56.702472  Checking segment from ROM address 0xffdd1714

 2009 12:18:56.705261  Loading segment from ROM address 0xffdd16f8

 2010 12:18:56.708657    code (compression=0)

 2011 12:18:56.718597    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 2012 12:18:56.725134  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 2013 12:18:56.729031  it's not compressed!

 2014 12:18:56.820488  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2015 12:18:56.827581  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2016 12:18:56.830733  Loading segment from ROM address 0xffdd1714

 2017 12:18:56.834075    Entry Point 0x30000000

 2018 12:18:56.837212  Loaded segments

 2019 12:18:56.843078  Finalizing chipset.

 2020 12:18:56.846396  Finalizing SMM.

 2021 12:18:56.849279  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2022 12:18:56.852754  mp_park_aps done after 0 msecs.

 2023 12:18:56.859690  Jumping to boot code at 30000000(99b62000)

 2024 12:18:56.866170  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2025 12:18:56.866361  

 2026 12:18:56.866515  

 2027 12:18:56.866657  

 2028 12:18:56.869506  Starting depthcharge on Helios...

 2029 12:18:56.869599  

 2030 12:18:56.869982  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2031 12:18:56.870095  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2032 12:18:56.870187  Setting prompt string to ['hatch:']
 2033 12:18:56.870274  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2034 12:18:56.879621  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2035 12:18:56.879717  

 2036 12:18:56.886155  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2037 12:18:56.886249  

 2038 12:18:56.892277  board_setup: Info: eMMC controller not present; skipping

 2039 12:18:56.892374  

 2040 12:18:56.896058  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2041 12:18:56.896151  

 2042 12:18:56.902735  board_setup: Info: SDHCI controller not present; skipping

 2043 12:18:56.902841  

 2044 12:18:56.905836  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2045 12:18:56.908796  

 2046 12:18:56.908917  Wipe memory regions:

 2047 12:18:56.909031  

 2048 12:18:56.912493  	[0x00000000001000, 0x000000000a0000)

 2049 12:18:56.912605  

 2050 12:18:56.915445  	[0x00000000100000, 0x00000030000000)

 2051 12:18:56.981820  

 2052 12:18:56.985158  	[0x00000030657430, 0x00000099a2c000)

 2053 12:18:57.132112  

 2054 12:18:57.135203  	[0x00000100000000, 0x0000045e800000)

 2055 12:18:58.591706  

 2056 12:18:58.591895  R8152: Initializing

 2057 12:18:58.592009  

 2058 12:18:58.594594  Version 9 (ocp_data = 6010)

 2059 12:18:58.598814  

 2060 12:18:58.598909  R8152: Done initializing

 2061 12:18:58.599022  

 2062 12:18:58.602677  Adding net device

 2063 12:18:59.084758  

 2064 12:18:59.084920  R8152: Initializing

 2065 12:18:59.085000  

 2066 12:18:59.087778  Version 6 (ocp_data = 5c30)

 2067 12:18:59.087864  

 2068 12:18:59.091822  R8152: Done initializing

 2069 12:18:59.091921  

 2070 12:18:59.094989  net_add_device: Attemp to include the same device

 2071 12:18:59.098167  

 2072 12:18:59.105076  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2073 12:18:59.105172  

 2074 12:18:59.105243  

 2075 12:18:59.105339  

 2076 12:18:59.105683  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2078 12:18:59.206089  hatch: tftpboot 192.168.201.1 12217844/tftp-deploy-znwc3b_d/kernel/bzImage 12217844/tftp-deploy-znwc3b_d/kernel/cmdline 12217844/tftp-deploy-znwc3b_d/ramdisk/ramdisk.cpio.gz

 2079 12:18:59.206286  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2080 12:18:59.206393  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2081 12:18:59.210618  tftpboot 192.168.201.1 12217844/tftp-deploy-znwc3b_d/kernel/bzIploy-znwc3b_d/kernel/cmdline 12217844/tftp-deploy-znwc3b_d/ramdisk/ramdisk.cpio.gz

 2082 12:18:59.210725  

 2083 12:18:59.210799  Waiting for link

 2084 12:18:59.720421  

 2085 12:18:59.720571  done.

 2086 12:18:59.720655  

 2087 12:18:59.720724  MAC: 00:24:32:50:1a:59

 2088 12:18:59.720790  

 2089 12:18:59.720854  Sending DHCP discover... done.

 2090 12:18:59.720918  

 2091 12:18:59.829884  Waiting for reply... done.

 2092 12:18:59.830149  

 2093 12:18:59.833131  Sending DHCP request... done.

 2094 12:18:59.833312  

 2095 12:19:01.278253  Waiting for reply... done.

 2096 12:19:01.278417  

 2097 12:19:01.278500  My ip is 192.168.201.14

 2098 12:19:01.278569  

 2099 12:19:01.281262  The DHCP server ip is 192.168.201.1

 2100 12:19:01.284820  

 2101 12:19:01.287883  TFTP server IP predefined by user: 192.168.201.1

 2102 12:19:01.287994  

 2103 12:19:01.294850  Bootfile predefined by user: 12217844/tftp-deploy-znwc3b_d/kernel/bzImage

 2104 12:19:01.294962  

 2105 12:19:01.297981  Sending tftp read request... done.

 2106 12:19:01.298101  

 2107 12:19:01.301079  Waiting for the transfer... 

 2108 12:19:01.304329  

 2109 12:19:01.836320  00000000 ################################################################

 2110 12:19:01.836496  

 2111 12:19:02.376665  00080000 ################################################################

 2112 12:19:02.376892  

 2113 12:19:02.909338  00100000 ################################################################

 2114 12:19:02.909555  

 2115 12:19:03.437337  00180000 ################################################################

 2116 12:19:03.437592  

 2117 12:19:03.967380  00200000 ################################################################

 2118 12:19:03.967562  

 2119 12:19:04.492632  00280000 ################################################################

 2120 12:19:04.492822  

 2121 12:19:05.014941  00300000 ################################################################

 2122 12:19:05.015121  

 2123 12:19:05.548826  00380000 ################################################################

 2124 12:19:05.549002  

 2125 12:19:06.076264  00400000 ################################################################

 2126 12:19:06.076411  

 2127 12:19:06.607483  00480000 ################################################################

 2128 12:19:06.607657  

 2129 12:19:07.520495  00500000 ################################################################

 2130 12:19:07.520755  

 2131 12:19:07.675019  00580000 ################################################################

 2132 12:19:07.675220  

 2133 12:19:08.199666  00600000 ################################################################

 2134 12:19:08.199854  

 2135 12:19:08.733119  00680000 ################################################################

 2136 12:19:08.733273  

 2137 12:19:09.255487  00700000 ################################################################

 2138 12:19:09.255643  

 2139 12:19:09.783342  00780000 ################################################################

 2140 12:19:09.783537  

 2141 12:19:10.324847  00800000 ################################################################

 2142 12:19:10.325002  

 2143 12:19:10.860299  00880000 ################################################################

 2144 12:19:10.860494  

 2145 12:19:11.420692  00900000 ################################################################

 2146 12:19:11.420999  

 2147 12:19:11.969144  00980000 ################################################################

 2148 12:19:11.969321  

 2149 12:19:12.495365  00a00000 ################################################################

 2150 12:19:12.495508  

 2151 12:19:13.019410  00a80000 ################################################################

 2152 12:19:13.019555  

 2153 12:19:13.058764  00b00000 ##### done.

 2154 12:19:13.058887  

 2155 12:19:13.062074  The bootfile was 11571200 bytes long.

 2156 12:19:13.062162  

 2157 12:19:13.065398  Sending tftp read request... done.

 2158 12:19:13.065492  

 2159 12:19:13.068782  Waiting for the transfer... 

 2160 12:19:13.068875  

 2161 12:19:13.589479  00000000 ################################################################

 2162 12:19:13.589620  

 2163 12:19:14.110308  00080000 ################################################################

 2164 12:19:14.110456  

 2165 12:19:14.638379  00100000 ################################################################

 2166 12:19:14.638527  

 2167 12:19:15.179588  00180000 ################################################################

 2168 12:19:15.179735  

 2169 12:19:15.714346  00200000 ################################################################

 2170 12:19:15.714488  

 2171 12:19:16.245314  00280000 ################################################################

 2172 12:19:16.245488  

 2173 12:19:16.779869  00300000 ################################################################

 2174 12:19:16.780047  

 2175 12:19:17.314846  00380000 ################################################################

 2176 12:19:17.314992  

 2177 12:19:17.870031  00400000 ################################################################

 2178 12:19:17.870172  

 2179 12:19:18.439243  00480000 ################################################################

 2180 12:19:18.439415  

 2181 12:19:19.018964  00500000 ################################################################

 2182 12:19:19.019105  

 2183 12:19:21.634917  00580000 ################################################ done.

 2184 12:19:21.636333  

 2185 12:19:21.637076  Sending tftp read request... done.

 2186 12:19:21.637723  

 2187 12:19:21.638173  Waiting for the transfer... 

 2188 12:19:21.638301  

 2189 12:19:21.638428  00000000 # done.

 2190 12:19:21.638559  

 2191 12:19:21.638686  Command line loaded dynamically from TFTP file: 12217844/tftp-deploy-znwc3b_d/kernel/cmdline

 2192 12:19:21.638811  

 2193 12:19:21.638943  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12217844/extract-nfsrootfs-vjnxoln1,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2194 12:19:21.639074  

 2195 12:19:21.639198  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2196 12:19:21.639322  

 2197 12:19:21.639447  Shutting down all USB controllers.

 2198 12:19:21.639570  

 2199 12:19:21.639691  Removing current net device

 2200 12:19:21.639814  

 2201 12:19:21.639935  Finalizing coreboot

 2202 12:19:21.640060  

 2203 12:19:21.640183  Exiting depthcharge with code 4 at timestamp: 30517543

 2204 12:19:21.640315  

 2205 12:19:21.640436  

 2206 12:19:21.640558  Starting kernel ...

 2207 12:19:21.640679  

 2208 12:19:21.640799  

 2209 12:19:21.641608  end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
 2210 12:19:21.641792  start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
 2211 12:19:21.641936  Setting prompt string to ['Linux version [0-9]']
 2212 12:19:21.642073  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2213 12:19:21.642212  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2215 12:23:38.642032  end: 2.2.5 auto-login-action (duration 00:04:17) [common]
 2217 12:23:38.642268  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
 2219 12:23:38.642445  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2222 12:23:38.642728  end: 2 depthcharge-action (duration 00:05:00) [common]
 2224 12:23:38.642971  Cleaning after the job
 2225 12:23:38.643072  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217844/tftp-deploy-znwc3b_d/ramdisk
 2226 12:23:38.644144  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217844/tftp-deploy-znwc3b_d/kernel
 2227 12:23:38.645978  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217844/tftp-deploy-znwc3b_d/nfsrootfs
 2228 12:23:38.737527  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217844/tftp-deploy-znwc3b_d/modules
 2229 12:23:38.738281  start: 4.1 power-off (timeout 00:00:30) [common]
 2230 12:23:38.738475  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
 2231 12:23:38.822366  >> Command sent successfully.

 2232 12:23:38.825598  Returned 0 in 0 seconds
 2233 12:23:38.926039  end: 4.1 power-off (duration 00:00:00) [common]
 2235 12:23:38.926415  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2236 12:23:38.926702  Listened to connection for namespace 'common' for up to 1s
 2238 12:23:38.927106  Listened to connection for namespace 'common' for up to 1s
 2239 12:23:39.927761  Finalising connection for namespace 'common'
 2240 12:23:39.928427  Disconnecting from shell: Finalise
 2241 12:23:39.928822  
 2242 12:23:40.029752  end: 4.2 read-feedback (duration 00:00:01) [common]
 2243 12:23:40.030469  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12217844
 2244 12:23:40.697648  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12217844
 2245 12:23:40.697857  JobError: Your job cannot terminate cleanly.