Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 12:25:45.387550 lava-dispatcher, installed at version: 2023.10
2 12:25:45.387752 start: 0 validate
3 12:25:45.387885 Start time: 2023-12-08 12:25:45.387873+00:00 (UTC)
4 12:25:45.388010 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:25:45.388133 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 12:25:45.662797 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:25:45.663492 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:25:45.915886 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:25:45.916620 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:25:46.185892 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:25:46.186623 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:25:46.456014 validate duration: 1.07
14 12:25:46.456346 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:25:46.456447 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:25:46.456537 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:25:46.456738 Not decompressing ramdisk as can be used compressed.
18 12:25:46.456826 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 12:25:46.456900 saving as /var/lib/lava/dispatcher/tmp/12217947/tftp-deploy-1sub8z5v/ramdisk/initrd.cpio.gz
20 12:25:46.456968 total size: 5671549 (5 MB)
21 12:25:46.458078 progress 0 % (0 MB)
22 12:25:46.459852 progress 5 % (0 MB)
23 12:25:46.461563 progress 10 % (0 MB)
24 12:25:46.462992 progress 15 % (0 MB)
25 12:25:46.464641 progress 20 % (1 MB)
26 12:25:46.466283 progress 25 % (1 MB)
27 12:25:46.467794 progress 30 % (1 MB)
28 12:25:46.469480 progress 35 % (1 MB)
29 12:25:46.471047 progress 40 % (2 MB)
30 12:25:46.472527 progress 45 % (2 MB)
31 12:25:46.474167 progress 50 % (2 MB)
32 12:25:46.475798 progress 55 % (3 MB)
33 12:25:46.477338 progress 60 % (3 MB)
34 12:25:46.478939 progress 65 % (3 MB)
35 12:25:46.480667 progress 70 % (3 MB)
36 12:25:46.482130 progress 75 % (4 MB)
37 12:25:46.483747 progress 80 % (4 MB)
38 12:25:46.485442 progress 85 % (4 MB)
39 12:25:46.486876 progress 90 % (4 MB)
40 12:25:46.488506 progress 95 % (5 MB)
41 12:25:46.490180 progress 100 % (5 MB)
42 12:25:46.490292 5 MB downloaded in 0.03 s (162.32 MB/s)
43 12:25:46.490485 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:25:46.490785 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:25:46.490911 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:25:46.491024 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:25:46.491193 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:25:46.491265 saving as /var/lib/lava/dispatcher/tmp/12217947/tftp-deploy-1sub8z5v/kernel/bzImage
50 12:25:46.491331 total size: 11571200 (11 MB)
51 12:25:46.491395 No compression specified
52 12:25:46.492613 progress 0 % (0 MB)
53 12:25:46.495854 progress 5 % (0 MB)
54 12:25:46.499122 progress 10 % (1 MB)
55 12:25:46.502163 progress 15 % (1 MB)
56 12:25:46.505457 progress 20 % (2 MB)
57 12:25:46.508695 progress 25 % (2 MB)
58 12:25:46.511637 progress 30 % (3 MB)
59 12:25:46.514836 progress 35 % (3 MB)
60 12:25:46.518056 progress 40 % (4 MB)
61 12:25:46.521287 progress 45 % (4 MB)
62 12:25:46.524447 progress 50 % (5 MB)
63 12:25:46.527604 progress 55 % (6 MB)
64 12:25:46.530639 progress 60 % (6 MB)
65 12:25:46.533867 progress 65 % (7 MB)
66 12:25:46.536966 progress 70 % (7 MB)
67 12:25:46.539832 progress 75 % (8 MB)
68 12:25:46.542914 progress 80 % (8 MB)
69 12:25:46.545977 progress 85 % (9 MB)
70 12:25:46.548917 progress 90 % (9 MB)
71 12:25:46.551937 progress 95 % (10 MB)
72 12:25:46.555071 progress 100 % (11 MB)
73 12:25:46.555191 11 MB downloaded in 0.06 s (172.81 MB/s)
74 12:25:46.555339 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:25:46.555577 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:25:46.555665 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:25:46.555754 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:25:46.555890 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 12:25:46.555960 saving as /var/lib/lava/dispatcher/tmp/12217947/tftp-deploy-1sub8z5v/nfsrootfs/full.rootfs.tar
81 12:25:46.556021 total size: 126031368 (120 MB)
82 12:25:46.556083 Using unxz to decompress xz
83 12:25:46.560457 progress 0 % (0 MB)
84 12:25:47.057127 progress 5 % (6 MB)
85 12:25:47.547278 progress 10 % (12 MB)
86 12:25:48.050234 progress 15 % (18 MB)
87 12:25:48.572402 progress 20 % (24 MB)
88 12:25:48.917362 progress 25 % (30 MB)
89 12:25:49.264341 progress 30 % (36 MB)
90 12:25:49.535490 progress 35 % (42 MB)
91 12:25:49.719642 progress 40 % (48 MB)
92 12:25:50.089167 progress 45 % (54 MB)
93 12:25:50.463963 progress 50 % (60 MB)
94 12:25:50.804578 progress 55 % (66 MB)
95 12:25:51.163517 progress 60 % (72 MB)
96 12:25:51.504492 progress 65 % (78 MB)
97 12:25:51.891503 progress 70 % (84 MB)
98 12:25:52.310980 progress 75 % (90 MB)
99 12:25:52.726497 progress 80 % (96 MB)
100 12:25:52.824886 progress 85 % (102 MB)
101 12:25:52.980863 progress 90 % (108 MB)
102 12:25:53.318496 progress 95 % (114 MB)
103 12:25:53.694257 progress 100 % (120 MB)
104 12:25:53.699713 120 MB downloaded in 7.14 s (16.83 MB/s)
105 12:25:53.699964 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:25:53.700232 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:25:53.700333 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:25:53.700425 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:25:53.700589 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:25:53.700667 saving as /var/lib/lava/dispatcher/tmp/12217947/tftp-deploy-1sub8z5v/modules/modules.tar
112 12:25:53.700732 total size: 483904 (0 MB)
113 12:25:53.700800 Using unxz to decompress xz
114 12:25:53.705231 progress 6 % (0 MB)
115 12:25:53.705649 progress 13 % (0 MB)
116 12:25:53.705891 progress 20 % (0 MB)
117 12:25:53.707327 progress 27 % (0 MB)
118 12:25:53.709474 progress 33 % (0 MB)
119 12:25:53.711469 progress 40 % (0 MB)
120 12:25:53.713538 progress 47 % (0 MB)
121 12:25:53.715550 progress 54 % (0 MB)
122 12:25:53.717642 progress 60 % (0 MB)
123 12:25:53.719798 progress 67 % (0 MB)
124 12:25:53.721954 progress 74 % (0 MB)
125 12:25:53.724137 progress 81 % (0 MB)
126 12:25:53.726169 progress 88 % (0 MB)
127 12:25:53.728086 progress 94 % (0 MB)
128 12:25:53.730706 progress 100 % (0 MB)
129 12:25:53.737727 0 MB downloaded in 0.04 s (12.48 MB/s)
130 12:25:53.737977 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:25:53.738246 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:25:53.738342 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 12:25:53.738441 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 12:25:57.183120 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12217947/extract-nfsrootfs-8d9tbcco
136 12:25:57.183328 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 12:25:57.183430 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
138 12:25:57.183604 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt
139 12:25:57.183738 makedir: /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin
140 12:25:57.183842 makedir: /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/tests
141 12:25:57.183979 makedir: /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/results
142 12:25:57.184084 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-add-keys
143 12:25:57.184233 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-add-sources
144 12:25:57.184404 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-background-process-start
145 12:25:57.184537 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-background-process-stop
146 12:25:57.184666 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-common-functions
147 12:25:57.184794 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-echo-ipv4
148 12:25:57.184921 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-install-packages
149 12:25:57.185048 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-installed-packages
150 12:25:57.185174 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-os-build
151 12:25:57.185301 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-probe-channel
152 12:25:57.185427 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-probe-ip
153 12:25:57.185554 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-target-ip
154 12:25:57.185680 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-target-mac
155 12:25:57.185808 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-target-storage
156 12:25:57.185938 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-test-case
157 12:25:57.186067 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-test-event
158 12:25:57.186192 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-test-feedback
159 12:25:57.186318 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-test-raise
160 12:25:57.186444 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-test-reference
161 12:25:57.186571 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-test-runner
162 12:25:57.186697 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-test-set
163 12:25:57.186823 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-test-shell
164 12:25:57.186992 Updating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-install-packages (oe)
165 12:25:57.187147 Updating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/bin/lava-installed-packages (oe)
166 12:25:57.187274 Creating /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/environment
167 12:25:57.187375 LAVA metadata
168 12:25:57.187446 - LAVA_JOB_ID=12217947
169 12:25:57.187511 - LAVA_DISPATCHER_IP=192.168.201.1
170 12:25:57.187613 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
171 12:25:57.187681 skipped lava-vland-overlay
172 12:25:57.187756 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 12:25:57.187835 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
174 12:25:57.187896 skipped lava-multinode-overlay
175 12:25:57.187969 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 12:25:57.188046 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
177 12:25:57.188120 Loading test definitions
178 12:25:57.188209 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
179 12:25:57.188282 Using /lava-12217947 at stage 0
180 12:25:57.188419 Fetching tests from https://github.com/kernelci/test-definitions
181 12:25:57.188498 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/0/tests/0_ltp-ipc'
182 12:26:00.765841 Running '/usr/bin/git checkout kernelci.org
183 12:26:00.919017 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 12:26:00.919875 uuid=12217947_1.5.2.3.1 testdef=None
185 12:26:00.920040 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
187 12:26:00.920314 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
188 12:26:00.921165 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 12:26:00.921420 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
191 12:26:00.922522 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 12:26:00.922770 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
194 12:26:00.923839 runner path: /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/0/tests/0_ltp-ipc test_uuid 12217947_1.5.2.3.1
195 12:26:00.923929 SKIPFILE='skipfile-lkft.yaml'
196 12:26:00.924000 SKIP_INSTALL='true'
197 12:26:00.924060 TST_CMDFILES='ipc'
198 12:26:00.924211 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 12:26:00.924435 Creating lava-test-runner.conf files
201 12:26:00.924501 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217947/lava-overlay-ub0r1klt/lava-12217947/0 for stage 0
202 12:26:00.924597 - 0_ltp-ipc
203 12:26:00.924710 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
204 12:26:00.924800 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
205 12:26:09.092714 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 12:26:09.092873 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
207 12:26:09.092969 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 12:26:09.093068 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
209 12:26:09.093160 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
210 12:26:09.242496 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 12:26:09.242921 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
212 12:26:09.243046 extracting modules file /var/lib/lava/dispatcher/tmp/12217947/tftp-deploy-1sub8z5v/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217947/extract-nfsrootfs-8d9tbcco
213 12:26:09.264303 extracting modules file /var/lib/lava/dispatcher/tmp/12217947/tftp-deploy-1sub8z5v/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217947/extract-overlay-ramdisk-lkcxn2yi/ramdisk
214 12:26:09.285896 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 12:26:09.286095 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
216 12:26:09.286192 [common] Applying overlay to NFS
217 12:26:09.286329 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12217947/compress-overlay-y7m4gjf4/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12217947/extract-nfsrootfs-8d9tbcco
218 12:26:10.268235 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 12:26:10.268420 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
220 12:26:10.268521 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 12:26:10.268615 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
222 12:26:10.268698 Building ramdisk /var/lib/lava/dispatcher/tmp/12217947/extract-overlay-ramdisk-lkcxn2yi/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12217947/extract-overlay-ramdisk-lkcxn2yi/ramdisk
223 12:26:10.355344 >> 31372 blocks
224 12:26:11.002732 rename /var/lib/lava/dispatcher/tmp/12217947/extract-overlay-ramdisk-lkcxn2yi/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12217947/tftp-deploy-1sub8z5v/ramdisk/ramdisk.cpio.gz
225 12:26:11.003250 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 12:26:11.003425 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
227 12:26:11.003585 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
228 12:26:11.003722 No mkimage arch provided, not using FIT.
229 12:26:11.003863 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 12:26:11.003998 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 12:26:11.004166 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
232 12:26:11.004389 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
233 12:26:11.004518 No LXC device requested
234 12:26:11.004610 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 12:26:11.004704 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
236 12:26:11.004797 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 12:26:11.004877 Checking files for TFTP limit of 4294967296 bytes.
238 12:26:11.005307 end: 1 tftp-deploy (duration 00:00:25) [common]
239 12:26:11.005416 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 12:26:11.005506 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 12:26:11.005633 substitutions:
242 12:26:11.005701 - {DTB}: None
243 12:26:11.005767 - {INITRD}: 12217947/tftp-deploy-1sub8z5v/ramdisk/ramdisk.cpio.gz
244 12:26:11.005827 - {KERNEL}: 12217947/tftp-deploy-1sub8z5v/kernel/bzImage
245 12:26:11.005885 - {LAVA_MAC}: None
246 12:26:11.005942 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12217947/extract-nfsrootfs-8d9tbcco
247 12:26:11.006000 - {NFS_SERVER_IP}: 192.168.201.1
248 12:26:11.006056 - {PRESEED_CONFIG}: None
249 12:26:11.006112 - {PRESEED_LOCAL}: None
250 12:26:11.006167 - {RAMDISK}: 12217947/tftp-deploy-1sub8z5v/ramdisk/ramdisk.cpio.gz
251 12:26:11.006222 - {ROOT_PART}: None
252 12:26:11.006277 - {ROOT}: None
253 12:26:11.006332 - {SERVER_IP}: 192.168.201.1
254 12:26:11.006386 - {TEE}: None
255 12:26:11.006443 Parsed boot commands:
256 12:26:11.006499 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 12:26:11.006682 Parsed boot commands: tftpboot 192.168.201.1 12217947/tftp-deploy-1sub8z5v/kernel/bzImage 12217947/tftp-deploy-1sub8z5v/kernel/cmdline 12217947/tftp-deploy-1sub8z5v/ramdisk/ramdisk.cpio.gz
258 12:26:11.006775 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 12:26:11.006868 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 12:26:11.006975 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 12:26:11.007092 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 12:26:11.007201 Not connected, no need to disconnect.
263 12:26:11.007319 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 12:26:11.007442 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 12:26:11.007540 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
266 12:26:11.011977 Setting prompt string to ['lava-test: # ']
267 12:26:11.012467 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 12:26:11.012609 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 12:26:11.012728 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 12:26:11.012827 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 12:26:11.013036 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
272 12:26:16.142404 >> Command sent successfully.
273 12:26:16.145219 Returned 0 in 5 seconds
274 12:26:16.245620 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 12:26:16.246129 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 12:26:16.246309 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 12:26:16.246472 Setting prompt string to 'Starting depthcharge on Helios...'
279 12:26:16.246571 Changing prompt to 'Starting depthcharge on Helios...'
280 12:26:16.246698 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
281 12:26:16.247109 [Enter `^Ec?' for help]
282 12:26:16.875461
283 12:26:16.875693
284 12:26:16.886528 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
285 12:26:16.889959 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
286 12:26:16.893438 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
287 12:26:16.900498 CPU: AES supported, TXT NOT supported, VT supported
288 12:26:16.903298 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
289 12:26:16.910113 PCH: device id 0284 (rev 00) is Cometlake-U Premium
290 12:26:16.913426 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
291 12:26:16.918474 VBOOT: Loading verstage.
292 12:26:16.924878 FMAP: Found "FLASH" version 1.1 at 0xc04000.
293 12:26:16.927827 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
294 12:26:16.934994 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
295 12:26:16.935106 CBFS @ c08000 size 3f8000
296 12:26:16.941176 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
297 12:26:16.944554 CBFS: Locating 'fallback/verstage'
298 12:26:16.948008 CBFS: Found @ offset 10fb80 size 1072c
299 12:26:16.952443
300 12:26:16.952520
301 12:26:16.962154 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
302 12:26:16.976588 Probing TPM: . done!
303 12:26:16.979913 TPM ready after 0 ms
304 12:26:16.983226 Connected to device vid:did:rid of 1ae0:0028:00
305 12:26:16.993831 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
306 12:26:16.997206 Initialized TPM device CR50 revision 0
307 12:26:17.041306 tlcl_send_startup: Startup return code is 0
308 12:26:17.041426 TPM: setup succeeded
309 12:26:17.054110 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
310 12:26:17.057924 Chrome EC: UHEPI supported
311 12:26:17.061164 Phase 1
312 12:26:17.064418 FMAP: area GBB found @ c05000 (12288 bytes)
313 12:26:17.071276 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
314 12:26:17.074414 Phase 2
315 12:26:17.074504 Phase 3
316 12:26:17.077661 FMAP: area GBB found @ c05000 (12288 bytes)
317 12:26:17.084690 VB2:vb2_report_dev_firmware() This is developer signed firmware
318 12:26:17.090738 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
319 12:26:17.094344 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
320 12:26:17.100772 VB2:vb2_verify_keyblock() Checking keyblock signature...
321 12:26:17.116408 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
322 12:26:17.119828 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
323 12:26:17.126704 VB2:vb2_verify_fw_preamble() Verifying preamble.
324 12:26:17.130443 Phase 4
325 12:26:17.134256 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
326 12:26:17.140549 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
327 12:26:17.319945 VB2:vb2_rsa_verify_digest() Digest check failed!
328 12:26:17.326615 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
329 12:26:17.326744 Saving nvdata
330 12:26:17.330331 Reboot requested (10020007)
331 12:26:17.333410 board_reset() called!
332 12:26:17.333509 full_reset() called!
333 12:26:21.842117
334 12:26:21.842285
335 12:26:21.852494 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
336 12:26:21.856037 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
337 12:26:21.862392 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
338 12:26:21.865708 CPU: AES supported, TXT NOT supported, VT supported
339 12:26:21.871938 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
340 12:26:21.875422 PCH: device id 0284 (rev 00) is Cometlake-U Premium
341 12:26:21.882391 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
342 12:26:21.885129 VBOOT: Loading verstage.
343 12:26:21.888518 FMAP: Found "FLASH" version 1.1 at 0xc04000.
344 12:26:21.895512 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
345 12:26:21.898744 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
346 12:26:21.901771 CBFS @ c08000 size 3f8000
347 12:26:21.908401 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
348 12:26:21.911851 CBFS: Locating 'fallback/verstage'
349 12:26:21.915258 CBFS: Found @ offset 10fb80 size 1072c
350 12:26:21.919025
351 12:26:21.919105
352 12:26:21.928913 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
353 12:26:21.943078 Probing TPM: . done!
354 12:26:21.946925 TPM ready after 0 ms
355 12:26:21.950100 Connected to device vid:did:rid of 1ae0:0028:00
356 12:26:21.960396 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
357 12:26:21.963626 Initialized TPM device CR50 revision 0
358 12:26:22.008393 tlcl_send_startup: Startup return code is 0
359 12:26:22.008555 TPM: setup succeeded
360 12:26:22.020559 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
361 12:26:22.024396 Chrome EC: UHEPI supported
362 12:26:22.028197 Phase 1
363 12:26:22.031120 FMAP: area GBB found @ c05000 (12288 bytes)
364 12:26:22.038051 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
365 12:26:22.044942 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
366 12:26:22.048149 Recovery requested (1009000e)
367 12:26:22.053626 Saving nvdata
368 12:26:22.059594 tlcl_extend: response is 0
369 12:26:22.068677 tlcl_extend: response is 0
370 12:26:22.075411 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
371 12:26:22.078836 CBFS @ c08000 size 3f8000
372 12:26:22.085280 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
373 12:26:22.088814 CBFS: Locating 'fallback/romstage'
374 12:26:22.092245 CBFS: Found @ offset 80 size 145fc
375 12:26:22.095256 Accumulated console time in verstage 98 ms
376 12:26:22.095408
377 12:26:22.095508
378 12:26:22.108225 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
379 12:26:22.115168 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
380 12:26:22.118744 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
381 12:26:22.122329 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
382 12:26:22.128741 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
383 12:26:22.131894 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
384 12:26:22.134808 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
385 12:26:22.138175 TCO_STS: 0000 0000
386 12:26:22.141824 GEN_PMCON: e0015238 00000200
387 12:26:22.145170 GBLRST_CAUSE: 00000000 00000000
388 12:26:22.145280 prev_sleep_state 5
389 12:26:22.148037 Boot Count incremented to 1696
390 12:26:22.155161 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 12:26:22.158367 CBFS @ c08000 size 3f8000
392 12:26:22.164816 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
393 12:26:22.164904 CBFS: Locating 'fspm.bin'
394 12:26:22.168395 CBFS: Found @ offset 5ffc0 size 71000
395 12:26:22.172487 Chrome EC: UHEPI supported
396 12:26:22.180060 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
397 12:26:22.184762 Probing TPM: done!
398 12:26:22.191688 Connected to device vid:did:rid of 1ae0:0028:00
399 12:26:22.201664 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
400 12:26:22.207643 Initialized TPM device CR50 revision 0
401 12:26:22.216492 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
402 12:26:22.223012 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
403 12:26:22.226363 MRC cache found, size 1948
404 12:26:22.229992 bootmode is set to: 2
405 12:26:22.233422 PRMRR disabled by config.
406 12:26:22.233510 SPD INDEX = 1
407 12:26:22.239809 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
408 12:26:22.243191 CBFS @ c08000 size 3f8000
409 12:26:22.249553 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
410 12:26:22.249699 CBFS: Locating 'spd.bin'
411 12:26:22.253359 CBFS: Found @ offset 5fb80 size 400
412 12:26:22.256163 SPD: module type is LPDDR3
413 12:26:22.259470 SPD: module part is
414 12:26:22.266214 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
415 12:26:22.269684 SPD: device width 4 bits, bus width 8 bits
416 12:26:22.272826 SPD: module size is 4096 MB (per channel)
417 12:26:22.276262 memory slot: 0 configuration done.
418 12:26:22.279784 memory slot: 2 configuration done.
419 12:26:22.330614 CBMEM:
420 12:26:22.334205 IMD: root @ 99fff000 254 entries.
421 12:26:22.336963 IMD: root @ 99ffec00 62 entries.
422 12:26:22.340498 External stage cache:
423 12:26:22.344052 IMD: root @ 9abff000 254 entries.
424 12:26:22.346929 IMD: root @ 9abfec00 62 entries.
425 12:26:22.350460 Chrome EC: clear events_b mask to 0x0000000020004000
426 12:26:22.366658 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
427 12:26:22.379587 tlcl_write: response is 0
428 12:26:22.388687 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
429 12:26:22.395635 MRC: TPM MRC hash updated successfully.
430 12:26:22.395764 2 DIMMs found
431 12:26:22.399126 SMM Memory Map
432 12:26:22.402433 SMRAM : 0x9a000000 0x1000000
433 12:26:22.405135 Subregion 0: 0x9a000000 0xa00000
434 12:26:22.408709 Subregion 1: 0x9aa00000 0x200000
435 12:26:22.412008 Subregion 2: 0x9ac00000 0x400000
436 12:26:22.415564 top_of_ram = 0x9a000000
437 12:26:22.418758 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
438 12:26:22.425307 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
439 12:26:22.428478 MTRR Range: Start=ff000000 End=0 (Size 1000000)
440 12:26:22.435452 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 12:26:22.438562 CBFS @ c08000 size 3f8000
442 12:26:22.441730 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 12:26:22.445095 CBFS: Locating 'fallback/postcar'
444 12:26:22.452078 CBFS: Found @ offset 107000 size 4b44
445 12:26:22.454894 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
446 12:26:22.467032 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
447 12:26:22.470348 Processing 180 relocs. Offset value of 0x97c0c000
448 12:26:22.479207 Accumulated console time in romstage 285 ms
449 12:26:22.479326
450 12:26:22.479413
451 12:26:22.488800 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
452 12:26:22.495771 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
453 12:26:22.499034 CBFS @ c08000 size 3f8000
454 12:26:22.502121 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
455 12:26:22.508865 CBFS: Locating 'fallback/ramstage'
456 12:26:22.512091 CBFS: Found @ offset 43380 size 1b9e8
457 12:26:22.518802 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
458 12:26:22.550960 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
459 12:26:22.554327 Processing 3976 relocs. Offset value of 0x98db0000
460 12:26:22.560821 Accumulated console time in postcar 52 ms
461 12:26:22.560907
462 12:26:22.560974
463 12:26:22.570989 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
464 12:26:22.577412 FMAP: area RO_VPD found @ c00000 (16384 bytes)
465 12:26:22.580907 WARNING: RO_VPD is uninitialized or empty.
466 12:26:22.584162 FMAP: area RW_VPD found @ af8000 (8192 bytes)
467 12:26:22.590472 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 12:26:22.590562 Normal boot.
469 12:26:22.597355 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
470 12:26:22.600204 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 12:26:22.603561 CBFS @ c08000 size 3f8000
472 12:26:22.610834 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 12:26:22.613641 CBFS: Locating 'cpu_microcode_blob.bin'
474 12:26:22.616879 CBFS: Found @ offset 14700 size 2ec00
475 12:26:22.620154 microcode: sig=0x806ec pf=0x4 revision=0xc9
476 12:26:22.623899 Skip microcode update
477 12:26:22.630268 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
478 12:26:22.630386 CBFS @ c08000 size 3f8000
479 12:26:22.637059 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
480 12:26:22.639963 CBFS: Locating 'fsps.bin'
481 12:26:22.643399 CBFS: Found @ offset d1fc0 size 35000
482 12:26:22.668846 Detected 4 core, 8 thread CPU.
483 12:26:22.672529 Setting up SMI for CPU
484 12:26:22.675268 IED base = 0x9ac00000
485 12:26:22.675378 IED size = 0x00400000
486 12:26:22.678621 Will perform SMM setup.
487 12:26:22.685828 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
488 12:26:22.692558 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
489 12:26:22.695860 Processing 16 relocs. Offset value of 0x00030000
490 12:26:22.699139 Attempting to start 7 APs
491 12:26:22.702513 Waiting for 10ms after sending INIT.
492 12:26:22.718719 Waiting for 1st SIPI to complete...done.
493 12:26:22.718836 AP: slot 3 apic_id 2.
494 12:26:22.722140 AP: slot 1 apic_id 3.
495 12:26:22.725464 AP: slot 4 apic_id 4.
496 12:26:22.725567 AP: slot 2 apic_id 5.
497 12:26:22.731942 Waiting for 2nd SIPI to complete...done.
498 12:26:22.732048 AP: slot 5 apic_id 1.
499 12:26:22.735332 AP: slot 6 apic_id 6.
500 12:26:22.738669 AP: slot 7 apic_id 7.
501 12:26:22.745145 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
502 12:26:22.748278 Processing 13 relocs. Offset value of 0x00038000
503 12:26:22.755505 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
504 12:26:22.761771 Installing SMM handler to 0x9a000000
505 12:26:22.768755 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
506 12:26:22.771867 Processing 658 relocs. Offset value of 0x9a010000
507 12:26:22.781743 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
508 12:26:22.784877 Processing 13 relocs. Offset value of 0x9a008000
509 12:26:22.791768 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
510 12:26:22.798614 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
511 12:26:22.801562 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
512 12:26:22.808205 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
513 12:26:22.814948 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
514 12:26:22.821454 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
515 12:26:22.824756 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
516 12:26:22.831916 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
517 12:26:22.834478 Clearing SMI status registers
518 12:26:22.838234 SMI_STS: PM1
519 12:26:22.838340 PM1_STS: PWRBTN
520 12:26:22.841640 TCO_STS: SECOND_TO
521 12:26:22.845180 New SMBASE 0x9a000000
522 12:26:22.848409 In relocation handler: CPU 0
523 12:26:22.851657 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
524 12:26:22.854539 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 12:26:22.857915 Relocation complete.
526 12:26:22.861246 New SMBASE 0x99ffec00
527 12:26:22.861334 In relocation handler: CPU 5
528 12:26:22.868008 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
529 12:26:22.871272 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 12:26:22.875001 Relocation complete.
531 12:26:22.875088 New SMBASE 0x99fff000
532 12:26:22.878058 In relocation handler: CPU 4
533 12:26:22.884630 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
534 12:26:22.887960 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 12:26:22.891009 Relocation complete.
536 12:26:22.891090 New SMBASE 0x99fff800
537 12:26:22.895029 In relocation handler: CPU 2
538 12:26:22.901225 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
539 12:26:22.904993 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 12:26:22.907792 Relocation complete.
541 12:26:22.907879 New SMBASE 0x99fff400
542 12:26:22.911761 In relocation handler: CPU 3
543 12:26:22.914470 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
544 12:26:22.921103 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 12:26:22.925003 Relocation complete.
546 12:26:22.925114 New SMBASE 0x99ffe800
547 12:26:22.927696 In relocation handler: CPU 6
548 12:26:22.931466 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
549 12:26:22.937623 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 12:26:22.941209 Relocation complete.
551 12:26:22.941297 New SMBASE 0x99ffe400
552 12:26:22.944470 In relocation handler: CPU 7
553 12:26:22.948150 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
554 12:26:22.954288 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 12:26:22.954376 Relocation complete.
556 12:26:22.957811 New SMBASE 0x99fffc00
557 12:26:22.961220 In relocation handler: CPU 1
558 12:26:22.964215 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
559 12:26:22.970923 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 12:26:22.971007 Relocation complete.
561 12:26:22.974380 Initializing CPU #0
562 12:26:22.977959 CPU: vendor Intel device 806ec
563 12:26:22.981443 CPU: family 06, model 8e, stepping 0c
564 12:26:22.984125 Clearing out pending MCEs
565 12:26:22.987415 Setting up local APIC...
566 12:26:22.987494 apic_id: 0x00 done.
567 12:26:22.991146 Turbo is available but hidden
568 12:26:22.994452 Turbo is available and visible
569 12:26:22.997586 VMX status: enabled
570 12:26:23.001150 IA32_FEATURE_CONTROL status: locked
571 12:26:23.004021 Skip microcode update
572 12:26:23.004122 CPU #0 initialized
573 12:26:23.007472 Initializing CPU #5
574 12:26:23.007556 Initializing CPU #7
575 12:26:23.010798 Initializing CPU #6
576 12:26:23.014190 CPU: vendor Intel device 806ec
577 12:26:23.017689 CPU: family 06, model 8e, stepping 0c
578 12:26:23.021115 CPU: vendor Intel device 806ec
579 12:26:23.023777 CPU: family 06, model 8e, stepping 0c
580 12:26:23.027232 Clearing out pending MCEs
581 12:26:23.030474 Clearing out pending MCEs
582 12:26:23.034058 Setting up local APIC...
583 12:26:23.034131 Initializing CPU #3
584 12:26:23.037173 Initializing CPU #1
585 12:26:23.040459 CPU: vendor Intel device 806ec
586 12:26:23.043794 CPU: family 06, model 8e, stepping 0c
587 12:26:23.047300 CPU: vendor Intel device 806ec
588 12:26:23.050743 CPU: family 06, model 8e, stepping 0c
589 12:26:23.054091 Clearing out pending MCEs
590 12:26:23.056866 Clearing out pending MCEs
591 12:26:23.056937 Setting up local APIC...
592 12:26:23.060217 Initializing CPU #4
593 12:26:23.063613 Initializing CPU #2
594 12:26:23.067100 CPU: vendor Intel device 806ec
595 12:26:23.070640 CPU: family 06, model 8e, stepping 0c
596 12:26:23.073894 CPU: vendor Intel device 806ec
597 12:26:23.076920 CPU: family 06, model 8e, stepping 0c
598 12:26:23.080200 Clearing out pending MCEs
599 12:26:23.080347 Clearing out pending MCEs
600 12:26:23.083843 Setting up local APIC...
601 12:26:23.087381 CPU: vendor Intel device 806ec
602 12:26:23.090188 CPU: family 06, model 8e, stepping 0c
603 12:26:23.093381 Clearing out pending MCEs
604 12:26:23.096735 apic_id: 0x05 done.
605 12:26:23.096811 Setting up local APIC...
606 12:26:23.100319 apic_id: 0x07 done.
607 12:26:23.103224 Setting up local APIC...
608 12:26:23.106486 Setting up local APIC...
609 12:26:23.106568 apic_id: 0x04 done.
610 12:26:23.110337 VMX status: enabled
611 12:26:23.110418 VMX status: enabled
612 12:26:23.116465 IA32_FEATURE_CONTROL status: locked
613 12:26:23.119976 IA32_FEATURE_CONTROL status: locked
614 12:26:23.120057 Skip microcode update
615 12:26:23.123064 Skip microcode update
616 12:26:23.126516 CPU #2 initialized
617 12:26:23.126632 CPU #4 initialized
618 12:26:23.130093 apic_id: 0x01 done.
619 12:26:23.130175 apic_id: 0x06 done.
620 12:26:23.133256 VMX status: enabled
621 12:26:23.136150 VMX status: enabled
622 12:26:23.136281 VMX status: enabled
623 12:26:23.139953 apic_id: 0x02 done.
624 12:26:23.143499 Setting up local APIC...
625 12:26:23.146849 IA32_FEATURE_CONTROL status: locked
626 12:26:23.149876 IA32_FEATURE_CONTROL status: locked
627 12:26:23.152873 IA32_FEATURE_CONTROL status: locked
628 12:26:23.156007 Skip microcode update
629 12:26:23.156111 Skip microcode update
630 12:26:23.159385 CPU #7 initialized
631 12:26:23.162805 CPU #6 initialized
632 12:26:23.162911 apic_id: 0x03 done.
633 12:26:23.166271 VMX status: enabled
634 12:26:23.166346 VMX status: enabled
635 12:26:23.173138 IA32_FEATURE_CONTROL status: locked
636 12:26:23.176587 IA32_FEATURE_CONTROL status: locked
637 12:26:23.176665 Skip microcode update
638 12:26:23.179950 Skip microcode update
639 12:26:23.182754 CPU #3 initialized
640 12:26:23.182832 CPU #1 initialized
641 12:26:23.186086 Skip microcode update
642 12:26:23.186161 CPU #5 initialized
643 12:26:23.192889 bsp_do_flight_plan done after 459 msecs.
644 12:26:23.196616 CPU: frequency set to 4200 MHz
645 12:26:23.196693 Enabling SMIs.
646 12:26:23.199228 Locking SMM.
647 12:26:23.212267 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
648 12:26:23.215857 CBFS @ c08000 size 3f8000
649 12:26:23.222648 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
650 12:26:23.222764 CBFS: Locating 'vbt.bin'
651 12:26:23.225743 CBFS: Found @ offset 5f5c0 size 499
652 12:26:23.232440 Found a VBT of 4608 bytes after decompression
653 12:26:23.414473 Display FSP Version Info HOB
654 12:26:23.417958 Reference Code - CPU = 9.0.1e.30
655 12:26:23.421265 uCode Version = 0.0.0.ca
656 12:26:23.424715 TXT ACM version = ff.ff.ff.ffff
657 12:26:23.427610 Display FSP Version Info HOB
658 12:26:23.431040 Reference Code - ME = 9.0.1e.30
659 12:26:23.434429 MEBx version = 0.0.0.0
660 12:26:23.437706 ME Firmware Version = Consumer SKU
661 12:26:23.441076 Display FSP Version Info HOB
662 12:26:23.444787 Reference Code - CML PCH = 9.0.1e.30
663 12:26:23.444872 PCH-CRID Status = Disabled
664 12:26:23.450870 PCH-CRID Original Value = ff.ff.ff.ffff
665 12:26:23.454438 PCH-CRID New Value = ff.ff.ff.ffff
666 12:26:23.457674 OPROM - RST - RAID = ff.ff.ff.ffff
667 12:26:23.460873 ChipsetInit Base Version = ff.ff.ff.ffff
668 12:26:23.464272 ChipsetInit Oem Version = ff.ff.ff.ffff
669 12:26:23.467930 Display FSP Version Info HOB
670 12:26:23.474509 Reference Code - SA - System Agent = 9.0.1e.30
671 12:26:23.477610 Reference Code - MRC = 0.7.1.6c
672 12:26:23.477745 SA - PCIe Version = 9.0.1e.30
673 12:26:23.480580 SA-CRID Status = Disabled
674 12:26:23.484085 SA-CRID Original Value = 0.0.0.c
675 12:26:23.487781 SA-CRID New Value = 0.0.0.c
676 12:26:23.490674 OPROM - VBIOS = ff.ff.ff.ffff
677 12:26:23.494095 RTC Init
678 12:26:23.497096 Set power on after power failure.
679 12:26:23.497213 Disabling Deep S3
680 12:26:23.500727 Disabling Deep S3
681 12:26:23.500838 Disabling Deep S4
682 12:26:23.504353 Disabling Deep S4
683 12:26:23.504463 Disabling Deep S5
684 12:26:23.507262 Disabling Deep S5
685 12:26:23.513898 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
686 12:26:23.514015 Enumerating buses...
687 12:26:23.520457 Show all devs... Before device enumeration.
688 12:26:23.520568 Root Device: enabled 1
689 12:26:23.523741 CPU_CLUSTER: 0: enabled 1
690 12:26:23.527291 DOMAIN: 0000: enabled 1
691 12:26:23.530585 APIC: 00: enabled 1
692 12:26:23.530677 PCI: 00:00.0: enabled 1
693 12:26:23.534064 PCI: 00:02.0: enabled 1
694 12:26:23.536963 PCI: 00:04.0: enabled 0
695 12:26:23.540441 PCI: 00:05.0: enabled 0
696 12:26:23.540525 PCI: 00:12.0: enabled 1
697 12:26:23.543829 PCI: 00:12.5: enabled 0
698 12:26:23.547090 PCI: 00:12.6: enabled 0
699 12:26:23.547174 PCI: 00:14.0: enabled 1
700 12:26:23.550300 PCI: 00:14.1: enabled 0
701 12:26:23.553920 PCI: 00:14.3: enabled 1
702 12:26:23.557537 PCI: 00:14.5: enabled 0
703 12:26:23.557637 PCI: 00:15.0: enabled 1
704 12:26:23.560195 PCI: 00:15.1: enabled 1
705 12:26:23.563677 PCI: 00:15.2: enabled 0
706 12:26:23.566877 PCI: 00:15.3: enabled 0
707 12:26:23.566961 PCI: 00:16.0: enabled 1
708 12:26:23.570150 PCI: 00:16.1: enabled 0
709 12:26:23.573653 PCI: 00:16.2: enabled 0
710 12:26:23.577182 PCI: 00:16.3: enabled 0
711 12:26:23.577266 PCI: 00:16.4: enabled 0
712 12:26:23.580537 PCI: 00:16.5: enabled 0
713 12:26:23.583321 PCI: 00:17.0: enabled 1
714 12:26:23.583405 PCI: 00:19.0: enabled 1
715 12:26:23.586718 PCI: 00:19.1: enabled 0
716 12:26:23.589978 PCI: 00:19.2: enabled 0
717 12:26:23.593428 PCI: 00:1a.0: enabled 0
718 12:26:23.593512 PCI: 00:1c.0: enabled 0
719 12:26:23.596566 PCI: 00:1c.1: enabled 0
720 12:26:23.600175 PCI: 00:1c.2: enabled 0
721 12:26:23.603301 PCI: 00:1c.3: enabled 0
722 12:26:23.603418 PCI: 00:1c.4: enabled 0
723 12:26:23.607008 PCI: 00:1c.5: enabled 0
724 12:26:23.610158 PCI: 00:1c.6: enabled 0
725 12:26:23.613170 PCI: 00:1c.7: enabled 0
726 12:26:23.613254 PCI: 00:1d.0: enabled 1
727 12:26:23.616534 PCI: 00:1d.1: enabled 0
728 12:26:23.620148 PCI: 00:1d.2: enabled 0
729 12:26:23.623258 PCI: 00:1d.3: enabled 0
730 12:26:23.623369 PCI: 00:1d.4: enabled 0
731 12:26:23.626539 PCI: 00:1d.5: enabled 1
732 12:26:23.630104 PCI: 00:1e.0: enabled 1
733 12:26:23.630189 PCI: 00:1e.1: enabled 0
734 12:26:23.633256 PCI: 00:1e.2: enabled 1
735 12:26:23.636766 PCI: 00:1e.3: enabled 1
736 12:26:23.639808 PCI: 00:1f.0: enabled 1
737 12:26:23.639885 PCI: 00:1f.1: enabled 1
738 12:26:23.643299 PCI: 00:1f.2: enabled 1
739 12:26:23.646369 PCI: 00:1f.3: enabled 1
740 12:26:23.650027 PCI: 00:1f.4: enabled 1
741 12:26:23.650204 PCI: 00:1f.5: enabled 1
742 12:26:23.653301 PCI: 00:1f.6: enabled 0
743 12:26:23.656567 USB0 port 0: enabled 1
744 12:26:23.656648 I2C: 00:15: enabled 1
745 12:26:23.660111 I2C: 00:5d: enabled 1
746 12:26:23.662817 GENERIC: 0.0: enabled 1
747 12:26:23.666210 I2C: 00:1a: enabled 1
748 12:26:23.666324 I2C: 00:38: enabled 1
749 12:26:23.669705 I2C: 00:39: enabled 1
750 12:26:23.672960 I2C: 00:3a: enabled 1
751 12:26:23.673039 I2C: 00:3b: enabled 1
752 12:26:23.676520 PCI: 00:00.0: enabled 1
753 12:26:23.679991 SPI: 00: enabled 1
754 12:26:23.680071 SPI: 01: enabled 1
755 12:26:23.682587 PNP: 0c09.0: enabled 1
756 12:26:23.686306 USB2 port 0: enabled 1
757 12:26:23.686425 USB2 port 1: enabled 1
758 12:26:23.689475 USB2 port 2: enabled 0
759 12:26:23.692786 USB2 port 3: enabled 0
760 12:26:23.692867 USB2 port 5: enabled 0
761 12:26:23.696193 USB2 port 6: enabled 1
762 12:26:23.699694 USB2 port 9: enabled 1
763 12:26:23.699773 USB3 port 0: enabled 1
764 12:26:23.702970 USB3 port 1: enabled 1
765 12:26:23.706166 USB3 port 2: enabled 1
766 12:26:23.709787 USB3 port 3: enabled 1
767 12:26:23.709872 USB3 port 4: enabled 0
768 12:26:23.713256 APIC: 03: enabled 1
769 12:26:23.716397 APIC: 05: enabled 1
770 12:26:23.716478 APIC: 02: enabled 1
771 12:26:23.719472 APIC: 04: enabled 1
772 12:26:23.719553 APIC: 01: enabled 1
773 12:26:23.722622 APIC: 06: enabled 1
774 12:26:23.725836 APIC: 07: enabled 1
775 12:26:23.725917 Compare with tree...
776 12:26:23.729585 Root Device: enabled 1
777 12:26:23.732619 CPU_CLUSTER: 0: enabled 1
778 12:26:23.732718 APIC: 00: enabled 1
779 12:26:23.735916 APIC: 03: enabled 1
780 12:26:23.739467 APIC: 05: enabled 1
781 12:26:23.742486 APIC: 02: enabled 1
782 12:26:23.742572 APIC: 04: enabled 1
783 12:26:23.745831 APIC: 01: enabled 1
784 12:26:23.749126 APIC: 06: enabled 1
785 12:26:23.749208 APIC: 07: enabled 1
786 12:26:23.752479 DOMAIN: 0000: enabled 1
787 12:26:23.755591 PCI: 00:00.0: enabled 1
788 12:26:23.759374 PCI: 00:02.0: enabled 1
789 12:26:23.759458 PCI: 00:04.0: enabled 0
790 12:26:23.762333 PCI: 00:05.0: enabled 0
791 12:26:23.766031 PCI: 00:12.0: enabled 1
792 12:26:23.769145 PCI: 00:12.5: enabled 0
793 12:26:23.772552 PCI: 00:12.6: enabled 0
794 12:26:23.772630 PCI: 00:14.0: enabled 1
795 12:26:23.775947 USB0 port 0: enabled 1
796 12:26:23.778548 USB2 port 0: enabled 1
797 12:26:23.781954 USB2 port 1: enabled 1
798 12:26:23.785461 USB2 port 2: enabled 0
799 12:26:23.785539 USB2 port 3: enabled 0
800 12:26:23.788879 USB2 port 5: enabled 0
801 12:26:23.792248 USB2 port 6: enabled 1
802 12:26:23.795247 USB2 port 9: enabled 1
803 12:26:23.798522 USB3 port 0: enabled 1
804 12:26:23.801962 USB3 port 1: enabled 1
805 12:26:23.802051 USB3 port 2: enabled 1
806 12:26:23.805475 USB3 port 3: enabled 1
807 12:26:23.808824 USB3 port 4: enabled 0
808 12:26:23.812077 PCI: 00:14.1: enabled 0
809 12:26:23.815714 PCI: 00:14.3: enabled 1
810 12:26:23.815794 PCI: 00:14.5: enabled 0
811 12:26:23.818315 PCI: 00:15.0: enabled 1
812 12:26:23.822014 I2C: 00:15: enabled 1
813 12:26:23.825198 PCI: 00:15.1: enabled 1
814 12:26:23.828555 I2C: 00:5d: enabled 1
815 12:26:23.828642 GENERIC: 0.0: enabled 1
816 12:26:23.832058 PCI: 00:15.2: enabled 0
817 12:26:23.835270 PCI: 00:15.3: enabled 0
818 12:26:23.838461 PCI: 00:16.0: enabled 1
819 12:26:23.842104 PCI: 00:16.1: enabled 0
820 12:26:23.842207 PCI: 00:16.2: enabled 0
821 12:26:23.845262 PCI: 00:16.3: enabled 0
822 12:26:23.848177 PCI: 00:16.4: enabled 0
823 12:26:23.851491 PCI: 00:16.5: enabled 0
824 12:26:23.851597 PCI: 00:17.0: enabled 1
825 12:26:23.855113 PCI: 00:19.0: enabled 1
826 12:26:23.858498 I2C: 00:1a: enabled 1
827 12:26:23.861927 I2C: 00:38: enabled 1
828 12:26:23.865211 I2C: 00:39: enabled 1
829 12:26:23.865293 I2C: 00:3a: enabled 1
830 12:26:23.868099 I2C: 00:3b: enabled 1
831 12:26:23.871329 PCI: 00:19.1: enabled 0
832 12:26:23.874903 PCI: 00:19.2: enabled 0
833 12:26:23.874988 PCI: 00:1a.0: enabled 0
834 12:26:23.878247 PCI: 00:1c.0: enabled 0
835 12:26:23.881327 PCI: 00:1c.1: enabled 0
836 12:26:23.884784 PCI: 00:1c.2: enabled 0
837 12:26:23.888378 PCI: 00:1c.3: enabled 0
838 12:26:23.888463 PCI: 00:1c.4: enabled 0
839 12:26:23.891482 PCI: 00:1c.5: enabled 0
840 12:26:23.895174 PCI: 00:1c.6: enabled 0
841 12:26:23.897817 PCI: 00:1c.7: enabled 0
842 12:26:23.901313 PCI: 00:1d.0: enabled 1
843 12:26:23.901430 PCI: 00:1d.1: enabled 0
844 12:26:23.905151 PCI: 00:1d.2: enabled 0
845 12:26:23.907759 PCI: 00:1d.3: enabled 0
846 12:26:23.911324 PCI: 00:1d.4: enabled 0
847 12:26:23.914565 PCI: 00:1d.5: enabled 1
848 12:26:23.914649 PCI: 00:00.0: enabled 1
849 12:26:23.917966 PCI: 00:1e.0: enabled 1
850 12:26:23.921542 PCI: 00:1e.1: enabled 0
851 12:26:23.924209 PCI: 00:1e.2: enabled 1
852 12:26:23.924333 SPI: 00: enabled 1
853 12:26:23.927954 PCI: 00:1e.3: enabled 1
854 12:26:23.931149 SPI: 01: enabled 1
855 12:26:23.934784 PCI: 00:1f.0: enabled 1
856 12:26:23.937457 PNP: 0c09.0: enabled 1
857 12:26:23.937533 PCI: 00:1f.1: enabled 1
858 12:26:23.940995 PCI: 00:1f.2: enabled 1
859 12:26:23.944480 PCI: 00:1f.3: enabled 1
860 12:26:23.947622 PCI: 00:1f.4: enabled 1
861 12:26:23.950776 PCI: 00:1f.5: enabled 1
862 12:26:23.950875 PCI: 00:1f.6: enabled 0
863 12:26:23.954627 Root Device scanning...
864 12:26:23.957653 scan_static_bus for Root Device
865 12:26:23.960834 CPU_CLUSTER: 0 enabled
866 12:26:23.960940 DOMAIN: 0000 enabled
867 12:26:23.964379 DOMAIN: 0000 scanning...
868 12:26:23.967825 PCI: pci_scan_bus for bus 00
869 12:26:23.970776 PCI: 00:00.0 [8086/0000] ops
870 12:26:23.974409 PCI: 00:00.0 [8086/9b61] enabled
871 12:26:23.977907 PCI: 00:02.0 [8086/0000] bus ops
872 12:26:23.980727 PCI: 00:02.0 [8086/9b41] enabled
873 12:26:23.984057 PCI: 00:04.0 [8086/1903] disabled
874 12:26:23.987410 PCI: 00:08.0 [8086/1911] enabled
875 12:26:23.990633 PCI: 00:12.0 [8086/02f9] enabled
876 12:26:23.994474 PCI: 00:14.0 [8086/0000] bus ops
877 12:26:23.997507 PCI: 00:14.0 [8086/02ed] enabled
878 12:26:24.000569 PCI: 00:14.2 [8086/02ef] enabled
879 12:26:24.004193 PCI: 00:14.3 [8086/02f0] enabled
880 12:26:24.008050 PCI: 00:15.0 [8086/0000] bus ops
881 12:26:24.010918 PCI: 00:15.0 [8086/02e8] enabled
882 12:26:24.014292 PCI: 00:15.1 [8086/0000] bus ops
883 12:26:24.017312 PCI: 00:15.1 [8086/02e9] enabled
884 12:26:24.020974 PCI: 00:16.0 [8086/0000] ops
885 12:26:24.024205 PCI: 00:16.0 [8086/02e0] enabled
886 12:26:24.027642 PCI: 00:17.0 [8086/0000] ops
887 12:26:24.031100 PCI: 00:17.0 [8086/02d3] enabled
888 12:26:24.034210 PCI: 00:19.0 [8086/0000] bus ops
889 12:26:24.037637 PCI: 00:19.0 [8086/02c5] enabled
890 12:26:24.040682 PCI: 00:1d.0 [8086/0000] bus ops
891 12:26:24.044143 PCI: 00:1d.0 [8086/02b0] enabled
892 12:26:24.050313 PCI: Static device PCI: 00:1d.5 not found, disabling it.
893 12:26:24.053894 PCI: 00:1e.0 [8086/0000] ops
894 12:26:24.057494 PCI: 00:1e.0 [8086/02a8] enabled
895 12:26:24.060717 PCI: 00:1e.2 [8086/0000] bus ops
896 12:26:24.063803 PCI: 00:1e.2 [8086/02aa] enabled
897 12:26:24.067196 PCI: 00:1e.3 [8086/0000] bus ops
898 12:26:24.070269 PCI: 00:1e.3 [8086/02ab] enabled
899 12:26:24.073883 PCI: 00:1f.0 [8086/0000] bus ops
900 12:26:24.077032 PCI: 00:1f.0 [8086/0284] enabled
901 12:26:24.080409 PCI: Static device PCI: 00:1f.1 not found, disabling it.
902 12:26:24.087181 PCI: Static device PCI: 00:1f.2 not found, disabling it.
903 12:26:24.090862 PCI: 00:1f.3 [8086/0000] bus ops
904 12:26:24.093678 PCI: 00:1f.3 [8086/02c8] enabled
905 12:26:24.097178 PCI: 00:1f.4 [8086/0000] bus ops
906 12:26:24.100518 PCI: 00:1f.4 [8086/02a3] enabled
907 12:26:24.103820 PCI: 00:1f.5 [8086/0000] bus ops
908 12:26:24.107023 PCI: 00:1f.5 [8086/02a4] enabled
909 12:26:24.110444 PCI: Leftover static devices:
910 12:26:24.110528 PCI: 00:05.0
911 12:26:24.113761 PCI: 00:12.5
912 12:26:24.113863 PCI: 00:12.6
913 12:26:24.117140 PCI: 00:14.1
914 12:26:24.117224 PCI: 00:14.5
915 12:26:24.117291 PCI: 00:15.2
916 12:26:24.120344 PCI: 00:15.3
917 12:26:24.120428 PCI: 00:16.1
918 12:26:24.123227 PCI: 00:16.2
919 12:26:24.123311 PCI: 00:16.3
920 12:26:24.123377 PCI: 00:16.4
921 12:26:24.127027 PCI: 00:16.5
922 12:26:24.127111 PCI: 00:19.1
923 12:26:24.129970 PCI: 00:19.2
924 12:26:24.130054 PCI: 00:1a.0
925 12:26:24.130120 PCI: 00:1c.0
926 12:26:24.133298 PCI: 00:1c.1
927 12:26:24.133381 PCI: 00:1c.2
928 12:26:24.136833 PCI: 00:1c.3
929 12:26:24.136917 PCI: 00:1c.4
930 12:26:24.140488 PCI: 00:1c.5
931 12:26:24.140572 PCI: 00:1c.6
932 12:26:24.140638 PCI: 00:1c.7
933 12:26:24.143441 PCI: 00:1d.1
934 12:26:24.143525 PCI: 00:1d.2
935 12:26:24.146958 PCI: 00:1d.3
936 12:26:24.147041 PCI: 00:1d.4
937 12:26:24.147107 PCI: 00:1d.5
938 12:26:24.150312 PCI: 00:1e.1
939 12:26:24.150396 PCI: 00:1f.1
940 12:26:24.153328 PCI: 00:1f.2
941 12:26:24.153415 PCI: 00:1f.6
942 12:26:24.156835 PCI: Check your devicetree.cb.
943 12:26:24.160251 PCI: 00:02.0 scanning...
944 12:26:24.163053 scan_generic_bus for PCI: 00:02.0
945 12:26:24.166726 scan_generic_bus for PCI: 00:02.0 done
946 12:26:24.173449 scan_bus: scanning of bus PCI: 00:02.0 took 10188 usecs
947 12:26:24.173549 PCI: 00:14.0 scanning...
948 12:26:24.176873 scan_static_bus for PCI: 00:14.0
949 12:26:24.179970 USB0 port 0 enabled
950 12:26:24.183324 USB0 port 0 scanning...
951 12:26:24.187103 scan_static_bus for USB0 port 0
952 12:26:24.190477 USB2 port 0 enabled
953 12:26:24.190563 USB2 port 1 enabled
954 12:26:24.193222 USB2 port 2 disabled
955 12:26:24.193365 USB2 port 3 disabled
956 12:26:24.196910 USB2 port 5 disabled
957 12:26:24.200088 USB2 port 6 enabled
958 12:26:24.200198 USB2 port 9 enabled
959 12:26:24.203479 USB3 port 0 enabled
960 12:26:24.206405 USB3 port 1 enabled
961 12:26:24.206508 USB3 port 2 enabled
962 12:26:24.209782 USB3 port 3 enabled
963 12:26:24.209872 USB3 port 4 disabled
964 12:26:24.213130 USB2 port 0 scanning...
965 12:26:24.216952 scan_static_bus for USB2 port 0
966 12:26:24.220112 scan_static_bus for USB2 port 0 done
967 12:26:24.226254 scan_bus: scanning of bus USB2 port 0 took 9702 usecs
968 12:26:24.229810 USB2 port 1 scanning...
969 12:26:24.233112 scan_static_bus for USB2 port 1
970 12:26:24.236520 scan_static_bus for USB2 port 1 done
971 12:26:24.239838 scan_bus: scanning of bus USB2 port 1 took 9708 usecs
972 12:26:24.243084 USB2 port 6 scanning...
973 12:26:24.246416 scan_static_bus for USB2 port 6
974 12:26:24.249635 scan_static_bus for USB2 port 6 done
975 12:26:24.256239 scan_bus: scanning of bus USB2 port 6 took 9702 usecs
976 12:26:24.259373 USB2 port 9 scanning...
977 12:26:24.263309 scan_static_bus for USB2 port 9
978 12:26:24.265898 scan_static_bus for USB2 port 9 done
979 12:26:24.272945 scan_bus: scanning of bus USB2 port 9 took 9708 usecs
980 12:26:24.273024 USB3 port 0 scanning...
981 12:26:24.276225 scan_static_bus for USB3 port 0
982 12:26:24.279635 scan_static_bus for USB3 port 0 done
983 12:26:24.286476 scan_bus: scanning of bus USB3 port 0 took 9701 usecs
984 12:26:24.289722 USB3 port 1 scanning...
985 12:26:24.293165 scan_static_bus for USB3 port 1
986 12:26:24.296003 scan_static_bus for USB3 port 1 done
987 12:26:24.303322 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
988 12:26:24.303429 USB3 port 2 scanning...
989 12:26:24.306440 scan_static_bus for USB3 port 2
990 12:26:24.309760 scan_static_bus for USB3 port 2 done
991 12:26:24.316338 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
992 12:26:24.319645 USB3 port 3 scanning...
993 12:26:24.323017 scan_static_bus for USB3 port 3
994 12:26:24.326522 scan_static_bus for USB3 port 3 done
995 12:26:24.332755 scan_bus: scanning of bus USB3 port 3 took 9709 usecs
996 12:26:24.336216 scan_static_bus for USB0 port 0 done
997 12:26:24.339519 scan_bus: scanning of bus USB0 port 0 took 155395 usecs
998 12:26:24.342965 scan_static_bus for PCI: 00:14.0 done
999 12:26:24.349601 scan_bus: scanning of bus PCI: 00:14.0 took 173011 usecs
1000 12:26:24.352838 PCI: 00:15.0 scanning...
1001 12:26:24.356390 scan_generic_bus for PCI: 00:15.0
1002 12:26:24.359056 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1003 12:26:24.362900 scan_generic_bus for PCI: 00:15.0 done
1004 12:26:24.369266 scan_bus: scanning of bus PCI: 00:15.0 took 14295 usecs
1005 12:26:24.372211 PCI: 00:15.1 scanning...
1006 12:26:24.375539 scan_generic_bus for PCI: 00:15.1
1007 12:26:24.379047 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1008 12:26:24.385997 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1009 12:26:24.388811 scan_generic_bus for PCI: 00:15.1 done
1010 12:26:24.392131 scan_bus: scanning of bus PCI: 00:15.1 took 18660 usecs
1011 12:26:24.395530 PCI: 00:19.0 scanning...
1012 12:26:24.399012 scan_generic_bus for PCI: 00:19.0
1013 12:26:24.405856 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1014 12:26:24.408600 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1015 12:26:24.412467 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1016 12:26:24.415678 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1017 12:26:24.422293 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1018 12:26:24.425927 scan_generic_bus for PCI: 00:19.0 done
1019 12:26:24.428717 scan_bus: scanning of bus PCI: 00:19.0 took 30727 usecs
1020 12:26:24.431937 PCI: 00:1d.0 scanning...
1021 12:26:24.435327 do_pci_scan_bridge for PCI: 00:1d.0
1022 12:26:24.438816 PCI: pci_scan_bus for bus 01
1023 12:26:24.441922 PCI: 01:00.0 [1c5c/1327] enabled
1024 12:26:24.445199 Enabling Common Clock Configuration
1025 12:26:24.451855 L1 Sub-State supported from root port 29
1026 12:26:24.452002 L1 Sub-State Support = 0xf
1027 12:26:24.455118 CommonModeRestoreTime = 0x28
1028 12:26:24.462079 Power On Value = 0x16, Power On Scale = 0x0
1029 12:26:24.462158 ASPM: Enabled L1
1030 12:26:24.469131 scan_bus: scanning of bus PCI: 00:1d.0 took 32802 usecs
1031 12:26:24.471618 PCI: 00:1e.2 scanning...
1032 12:26:24.475512 scan_generic_bus for PCI: 00:1e.2
1033 12:26:24.478733 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1034 12:26:24.481760 scan_generic_bus for PCI: 00:1e.2 done
1035 12:26:24.488382 scan_bus: scanning of bus PCI: 00:1e.2 took 14005 usecs
1036 12:26:24.492183 PCI: 00:1e.3 scanning...
1037 12:26:24.495044 scan_generic_bus for PCI: 00:1e.3
1038 12:26:24.498328 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1039 12:26:24.501571 scan_generic_bus for PCI: 00:1e.3 done
1040 12:26:24.508471 scan_bus: scanning of bus PCI: 00:1e.3 took 14003 usecs
1041 12:26:24.508552 PCI: 00:1f.0 scanning...
1042 12:26:24.511964 scan_static_bus for PCI: 00:1f.0
1043 12:26:24.515476 PNP: 0c09.0 enabled
1044 12:26:24.518339 scan_static_bus for PCI: 00:1f.0 done
1045 12:26:24.525135 scan_bus: scanning of bus PCI: 00:1f.0 took 12058 usecs
1046 12:26:24.528025 PCI: 00:1f.3 scanning...
1047 12:26:24.531311 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1048 12:26:24.534734 PCI: 00:1f.4 scanning...
1049 12:26:24.538231 scan_generic_bus for PCI: 00:1f.4
1050 12:26:24.541905 scan_generic_bus for PCI: 00:1f.4 done
1051 12:26:24.548022 scan_bus: scanning of bus PCI: 00:1f.4 took 10204 usecs
1052 12:26:24.551762 PCI: 00:1f.5 scanning...
1053 12:26:24.554452 scan_generic_bus for PCI: 00:1f.5
1054 12:26:24.558428 scan_generic_bus for PCI: 00:1f.5 done
1055 12:26:24.564497 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1056 12:26:24.571472 scan_bus: scanning of bus DOMAIN: 0000 took 605140 usecs
1057 12:26:24.574389 scan_static_bus for Root Device done
1058 12:26:24.577715 scan_bus: scanning of bus Root Device took 625016 usecs
1059 12:26:24.581259 done
1060 12:26:24.584546 Chrome EC: UHEPI supported
1061 12:26:24.587614 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1062 12:26:24.594175 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1063 12:26:24.601295 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1064 12:26:24.607898 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1065 12:26:24.611438 SPI flash protection: WPSW=0 SRP0=0
1066 12:26:24.617807 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1067 12:26:24.621199 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1068 12:26:24.624662 found VGA at PCI: 00:02.0
1069 12:26:24.627413 Setting up VGA for PCI: 00:02.0
1070 12:26:24.634251 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1071 12:26:24.637600 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1072 12:26:24.640642 Allocating resources...
1073 12:26:24.644242 Reading resources...
1074 12:26:24.647856 Root Device read_resources bus 0 link: 0
1075 12:26:24.651107 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1076 12:26:24.657212 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1077 12:26:24.660648 DOMAIN: 0000 read_resources bus 0 link: 0
1078 12:26:24.667923 PCI: 00:14.0 read_resources bus 0 link: 0
1079 12:26:24.670983 USB0 port 0 read_resources bus 0 link: 0
1080 12:26:24.679467 USB0 port 0 read_resources bus 0 link: 0 done
1081 12:26:24.682601 PCI: 00:14.0 read_resources bus 0 link: 0 done
1082 12:26:24.690398 PCI: 00:15.0 read_resources bus 1 link: 0
1083 12:26:24.693184 PCI: 00:15.0 read_resources bus 1 link: 0 done
1084 12:26:24.700121 PCI: 00:15.1 read_resources bus 2 link: 0
1085 12:26:24.702909 PCI: 00:15.1 read_resources bus 2 link: 0 done
1086 12:26:24.710959 PCI: 00:19.0 read_resources bus 3 link: 0
1087 12:26:24.717053 PCI: 00:19.0 read_resources bus 3 link: 0 done
1088 12:26:24.720437 PCI: 00:1d.0 read_resources bus 1 link: 0
1089 12:26:24.727642 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1090 12:26:24.730312 PCI: 00:1e.2 read_resources bus 4 link: 0
1091 12:26:24.737164 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1092 12:26:24.740780 PCI: 00:1e.3 read_resources bus 5 link: 0
1093 12:26:24.746919 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1094 12:26:24.750434 PCI: 00:1f.0 read_resources bus 0 link: 0
1095 12:26:24.757244 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1096 12:26:24.763792 DOMAIN: 0000 read_resources bus 0 link: 0 done
1097 12:26:24.767424 Root Device read_resources bus 0 link: 0 done
1098 12:26:24.770127 Done reading resources.
1099 12:26:24.773538 Show resources in subtree (Root Device)...After reading.
1100 12:26:24.780129 Root Device child on link 0 CPU_CLUSTER: 0
1101 12:26:24.783333 CPU_CLUSTER: 0 child on link 0 APIC: 00
1102 12:26:24.783436 APIC: 00
1103 12:26:24.787165 APIC: 03
1104 12:26:24.787274 APIC: 05
1105 12:26:24.790262 APIC: 02
1106 12:26:24.790365 APIC: 04
1107 12:26:24.790465 APIC: 01
1108 12:26:24.793517 APIC: 06
1109 12:26:24.793636 APIC: 07
1110 12:26:24.797174 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1111 12:26:24.806504 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1112 12:26:24.857136 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1113 12:26:24.857240 PCI: 00:00.0
1114 12:26:24.857516 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1115 12:26:24.857616 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1116 12:26:24.857717 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1117 12:26:24.857810 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1118 12:26:24.888216 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1119 12:26:24.888397 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1120 12:26:24.888531 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1121 12:26:24.894972 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1122 12:26:24.901603 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1123 12:26:24.911609 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1124 12:26:24.921626 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1125 12:26:24.931539 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1126 12:26:24.941267 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1127 12:26:24.951459 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1128 12:26:24.958575 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1129 12:26:24.968138 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1130 12:26:24.971763 PCI: 00:02.0
1131 12:26:24.981219 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 12:26:24.990928 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1133 12:26:25.001171 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1134 12:26:25.001269 PCI: 00:04.0
1135 12:26:25.004261 PCI: 00:08.0
1136 12:26:25.014517 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1137 12:26:25.014633 PCI: 00:12.0
1138 12:26:25.024259 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 12:26:25.027561 PCI: 00:14.0 child on link 0 USB0 port 0
1140 12:26:25.037410 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1141 12:26:25.043902 USB0 port 0 child on link 0 USB2 port 0
1142 12:26:25.043985 USB2 port 0
1143 12:26:25.047195 USB2 port 1
1144 12:26:25.047304 USB2 port 2
1145 12:26:25.050731 USB2 port 3
1146 12:26:25.050813 USB2 port 5
1147 12:26:25.054457 USB2 port 6
1148 12:26:25.054540 USB2 port 9
1149 12:26:25.057072 USB3 port 0
1150 12:26:25.057154 USB3 port 1
1151 12:26:25.060481 USB3 port 2
1152 12:26:25.064124 USB3 port 3
1153 12:26:25.064235 USB3 port 4
1154 12:26:25.067428 PCI: 00:14.2
1155 12:26:25.077397 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1156 12:26:25.086870 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1157 12:26:25.086981 PCI: 00:14.3
1158 12:26:25.097160 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 12:26:25.100476 PCI: 00:15.0 child on link 0 I2C: 01:15
1160 12:26:25.110150 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 12:26:25.113729 I2C: 01:15
1162 12:26:25.116698 PCI: 00:15.1 child on link 0 I2C: 02:5d
1163 12:26:25.126987 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 12:26:25.130282 I2C: 02:5d
1165 12:26:25.130390 GENERIC: 0.0
1166 12:26:25.133836 PCI: 00:16.0
1167 12:26:25.143292 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 12:26:25.143404 PCI: 00:17.0
1169 12:26:25.153546 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1170 12:26:25.163105 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1171 12:26:25.169646 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1172 12:26:25.179824 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1173 12:26:25.186827 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1174 12:26:25.196370 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1175 12:26:25.199776 PCI: 00:19.0 child on link 0 I2C: 03:1a
1176 12:26:25.209991 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 12:26:25.212885 I2C: 03:1a
1178 12:26:25.212968 I2C: 03:38
1179 12:26:25.213032 I2C: 03:39
1180 12:26:25.216204 I2C: 03:3a
1181 12:26:25.216352 I2C: 03:3b
1182 12:26:25.223111 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1183 12:26:25.229919 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1184 12:26:25.239408 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1185 12:26:25.249554 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1186 12:26:25.252640 PCI: 01:00.0
1187 12:26:25.263106 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 12:26:25.263217 PCI: 00:1e.0
1189 12:26:25.272671 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1190 12:26:25.282447 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1191 12:26:25.289460 PCI: 00:1e.2 child on link 0 SPI: 00
1192 12:26:25.299544 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 12:26:25.299628 SPI: 00
1194 12:26:25.302122 PCI: 00:1e.3 child on link 0 SPI: 01
1195 12:26:25.312520 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 12:26:25.315961 SPI: 01
1197 12:26:25.318720 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1198 12:26:25.329011 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1199 12:26:25.335797 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1200 12:26:25.339073 PNP: 0c09.0
1201 12:26:25.345843 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1202 12:26:25.348591 PCI: 00:1f.3
1203 12:26:25.358833 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 12:26:25.368894 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1205 12:26:25.369003 PCI: 00:1f.4
1206 12:26:25.378459 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1207 12:26:25.388917 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1208 12:26:25.392062 PCI: 00:1f.5
1209 12:26:25.398435 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1210 12:26:25.405296 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1211 12:26:25.411588 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1212 12:26:25.418424 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1213 12:26:25.421761 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1214 12:26:25.424726 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1215 12:26:25.431445 PCI: 00:17.0 18 * [0x60 - 0x67] io
1216 12:26:25.434604 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1217 12:26:25.441435 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1218 12:26:25.448072 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1219 12:26:25.454785 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1220 12:26:25.464702 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1221 12:26:25.471538 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1222 12:26:25.474963 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1223 12:26:25.481083 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1224 12:26:25.487971 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1225 12:26:25.491109 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1226 12:26:25.497491 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1227 12:26:25.500723 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1228 12:26:25.507809 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1229 12:26:25.511273 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1230 12:26:25.514782 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1231 12:26:25.520782 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1232 12:26:25.524281 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1233 12:26:25.530435 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1234 12:26:25.533790 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1235 12:26:25.540761 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1236 12:26:25.544066 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1237 12:26:25.550748 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1238 12:26:25.553839 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1239 12:26:25.560521 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1240 12:26:25.564054 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1241 12:26:25.570049 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1242 12:26:25.573377 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1243 12:26:25.580650 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1244 12:26:25.583395 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1245 12:26:25.590296 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1246 12:26:25.593670 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1247 12:26:25.603229 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1248 12:26:25.606409 avoid_fixed_resources: DOMAIN: 0000
1249 12:26:25.609738 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1250 12:26:25.616417 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1251 12:26:25.626697 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1252 12:26:25.633604 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1253 12:26:25.639773 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1254 12:26:25.650139 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1255 12:26:25.656436 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1256 12:26:25.663058 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1257 12:26:25.669930 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1258 12:26:25.679685 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1259 12:26:25.686413 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1260 12:26:25.693049 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1261 12:26:25.696504 Setting resources...
1262 12:26:25.702783 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1263 12:26:25.705991 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1264 12:26:25.709046 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1265 12:26:25.712733 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1266 12:26:25.719342 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1267 12:26:25.722773 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1268 12:26:25.729094 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1269 12:26:25.735903 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1270 12:26:25.745813 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1271 12:26:25.749471 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1272 12:26:25.755313 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1273 12:26:25.759063 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1274 12:26:25.765881 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1275 12:26:25.769403 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1276 12:26:25.771987 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1277 12:26:25.778861 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1278 12:26:25.781852 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1279 12:26:25.788783 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1280 12:26:25.792072 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1281 12:26:25.798971 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1282 12:26:25.801855 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1283 12:26:25.808683 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1284 12:26:25.811540 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1285 12:26:25.818809 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1286 12:26:25.821981 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1287 12:26:25.828407 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1288 12:26:25.831866 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1289 12:26:25.838159 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1290 12:26:25.841611 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1291 12:26:25.848083 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1292 12:26:25.851452 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1293 12:26:25.857991 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1294 12:26:25.864416 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1295 12:26:25.871054 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1296 12:26:25.877991 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1297 12:26:25.887585 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1298 12:26:25.891000 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1299 12:26:25.897489 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1300 12:26:25.903948 Root Device assign_resources, bus 0 link: 0
1301 12:26:25.907061 DOMAIN: 0000 assign_resources, bus 0 link: 0
1302 12:26:25.917435 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1303 12:26:25.923868 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1304 12:26:25.930299 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1305 12:26:25.940436 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1306 12:26:25.947513 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1307 12:26:25.957377 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1308 12:26:25.960478 PCI: 00:14.0 assign_resources, bus 0 link: 0
1309 12:26:25.967062 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 12:26:25.973715 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1311 12:26:25.983956 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1312 12:26:25.990108 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1313 12:26:26.000332 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1314 12:26:26.003721 PCI: 00:15.0 assign_resources, bus 1 link: 0
1315 12:26:26.007225 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 12:26:26.016593 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1317 12:26:26.020304 PCI: 00:15.1 assign_resources, bus 2 link: 0
1318 12:26:26.026600 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 12:26:26.033678 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1320 12:26:26.043497 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1321 12:26:26.050250 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1322 12:26:26.057029 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1323 12:26:26.066806 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1324 12:26:26.073001 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1325 12:26:26.080077 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1326 12:26:26.089666 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1327 12:26:26.093304 PCI: 00:19.0 assign_resources, bus 3 link: 0
1328 12:26:26.099776 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 12:26:26.106537 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1330 12:26:26.116017 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1331 12:26:26.122849 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1332 12:26:26.129537 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1333 12:26:26.136054 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1334 12:26:26.143052 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1335 12:26:26.149575 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1336 12:26:26.159198 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1337 12:26:26.162531 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1338 12:26:26.169136 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 12:26:26.175551 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1340 12:26:26.179074 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1341 12:26:26.186094 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 12:26:26.188926 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1343 12:26:26.195653 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 12:26:26.198758 LPC: Trying to open IO window from 800 size 1ff
1345 12:26:26.209053 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1346 12:26:26.215275 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1347 12:26:26.225271 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1348 12:26:26.231736 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1349 12:26:26.238575 DOMAIN: 0000 assign_resources, bus 0 link: 0
1350 12:26:26.241604 Root Device assign_resources, bus 0 link: 0
1351 12:26:26.244873 Done setting resources.
1352 12:26:26.251811 Show resources in subtree (Root Device)...After assigning values.
1353 12:26:26.255117 Root Device child on link 0 CPU_CLUSTER: 0
1354 12:26:26.258413 CPU_CLUSTER: 0 child on link 0 APIC: 00
1355 12:26:26.261732 APIC: 00
1356 12:26:26.261802 APIC: 03
1357 12:26:26.261874 APIC: 05
1358 12:26:26.264708 APIC: 02
1359 12:26:26.264782 APIC: 04
1360 12:26:26.268144 APIC: 01
1361 12:26:26.268238 APIC: 06
1362 12:26:26.268364 APIC: 07
1363 12:26:26.274714 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1364 12:26:26.284785 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1365 12:26:26.294749 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1366 12:26:26.294836 PCI: 00:00.0
1367 12:26:26.305069 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1368 12:26:26.314448 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1369 12:26:26.324216 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1370 12:26:26.334334 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1371 12:26:26.344182 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1372 12:26:26.354156 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1373 12:26:26.361066 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1374 12:26:26.370362 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1375 12:26:26.380264 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1376 12:26:26.390624 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1377 12:26:26.400401 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1378 12:26:26.407219 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1379 12:26:26.417136 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1380 12:26:26.426605 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1381 12:26:26.436760 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1382 12:26:26.446412 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1383 12:26:26.446500 PCI: 00:02.0
1384 12:26:26.459787 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1385 12:26:26.469898 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1386 12:26:26.479528 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1387 12:26:26.479613 PCI: 00:04.0
1388 12:26:26.483017 PCI: 00:08.0
1389 12:26:26.492824 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1390 12:26:26.492984 PCI: 00:12.0
1391 12:26:26.502797 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1392 12:26:26.509293 PCI: 00:14.0 child on link 0 USB0 port 0
1393 12:26:26.519334 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1394 12:26:26.522724 USB0 port 0 child on link 0 USB2 port 0
1395 12:26:26.525906 USB2 port 0
1396 12:26:26.526037 USB2 port 1
1397 12:26:26.529012 USB2 port 2
1398 12:26:26.529112 USB2 port 3
1399 12:26:26.532573 USB2 port 5
1400 12:26:26.532673 USB2 port 6
1401 12:26:26.536135 USB2 port 9
1402 12:26:26.536234 USB3 port 0
1403 12:26:26.539460 USB3 port 1
1404 12:26:26.539559 USB3 port 2
1405 12:26:26.542711 USB3 port 3
1406 12:26:26.542793 USB3 port 4
1407 12:26:26.545978 PCI: 00:14.2
1408 12:26:26.555897 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1409 12:26:26.565718 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1410 12:26:26.568889 PCI: 00:14.3
1411 12:26:26.578642 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1412 12:26:26.582407 PCI: 00:15.0 child on link 0 I2C: 01:15
1413 12:26:26.592242 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1414 12:26:26.595564 I2C: 01:15
1415 12:26:26.598779 PCI: 00:15.1 child on link 0 I2C: 02:5d
1416 12:26:26.609145 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1417 12:26:26.611750 I2C: 02:5d
1418 12:26:26.611834 GENERIC: 0.0
1419 12:26:26.615278 PCI: 00:16.0
1420 12:26:26.625071 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1421 12:26:26.625173 PCI: 00:17.0
1422 12:26:26.635078 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1423 12:26:26.644992 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1424 12:26:26.654870 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1425 12:26:26.664649 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1426 12:26:26.674962 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1427 12:26:26.685058 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1428 12:26:26.687971 PCI: 00:19.0 child on link 0 I2C: 03:1a
1429 12:26:26.697693 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1430 12:26:26.701783 I2C: 03:1a
1431 12:26:26.701890 I2C: 03:38
1432 12:26:26.704922 I2C: 03:39
1433 12:26:26.705012 I2C: 03:3a
1434 12:26:26.707819 I2C: 03:3b
1435 12:26:26.710976 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1436 12:26:26.720929 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1437 12:26:26.731427 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1438 12:26:26.740831 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1439 12:26:26.740959 PCI: 01:00.0
1440 12:26:26.754132 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1441 12:26:26.754262 PCI: 00:1e.0
1442 12:26:26.764206 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1443 12:26:26.777616 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1444 12:26:26.781057 PCI: 00:1e.2 child on link 0 SPI: 00
1445 12:26:26.790624 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1446 12:26:26.790714 SPI: 00
1447 12:26:26.794186 PCI: 00:1e.3 child on link 0 SPI: 01
1448 12:26:26.806979 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1449 12:26:26.807070 SPI: 01
1450 12:26:26.810434 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1451 12:26:26.820273 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1452 12:26:26.830281 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1453 12:26:26.830370 PNP: 0c09.0
1454 12:26:26.839842 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1455 12:26:26.839929 PCI: 00:1f.3
1456 12:26:26.850047 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1457 12:26:26.862896 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1458 12:26:26.862990 PCI: 00:1f.4
1459 12:26:26.873234 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1460 12:26:26.883151 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1461 12:26:26.883255 PCI: 00:1f.5
1462 12:26:26.892778 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1463 12:26:26.896245 Done allocating resources.
1464 12:26:26.903060 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1465 12:26:26.906302 Enabling resources...
1466 12:26:26.909063 PCI: 00:00.0 subsystem <- 8086/9b61
1467 12:26:26.912729 PCI: 00:00.0 cmd <- 06
1468 12:26:26.916056 PCI: 00:02.0 subsystem <- 8086/9b41
1469 12:26:26.919388 PCI: 00:02.0 cmd <- 03
1470 12:26:26.922861 PCI: 00:08.0 cmd <- 06
1471 12:26:26.925622 PCI: 00:12.0 subsystem <- 8086/02f9
1472 12:26:26.925705 PCI: 00:12.0 cmd <- 02
1473 12:26:26.933051 PCI: 00:14.0 subsystem <- 8086/02ed
1474 12:26:26.933150 PCI: 00:14.0 cmd <- 02
1475 12:26:26.936336 PCI: 00:14.2 cmd <- 02
1476 12:26:26.939469 PCI: 00:14.3 subsystem <- 8086/02f0
1477 12:26:26.942765 PCI: 00:14.3 cmd <- 02
1478 12:26:26.946188 PCI: 00:15.0 subsystem <- 8086/02e8
1479 12:26:26.949434 PCI: 00:15.0 cmd <- 02
1480 12:26:26.952580 PCI: 00:15.1 subsystem <- 8086/02e9
1481 12:26:26.956103 PCI: 00:15.1 cmd <- 02
1482 12:26:26.959240 PCI: 00:16.0 subsystem <- 8086/02e0
1483 12:26:26.962778 PCI: 00:16.0 cmd <- 02
1484 12:26:26.965669 PCI: 00:17.0 subsystem <- 8086/02d3
1485 12:26:26.969320 PCI: 00:17.0 cmd <- 03
1486 12:26:26.972204 PCI: 00:19.0 subsystem <- 8086/02c5
1487 12:26:26.972348 PCI: 00:19.0 cmd <- 02
1488 12:26:26.976132 PCI: 00:1d.0 bridge ctrl <- 0013
1489 12:26:26.982245 PCI: 00:1d.0 subsystem <- 8086/02b0
1490 12:26:26.982328 PCI: 00:1d.0 cmd <- 06
1491 12:26:26.985887 PCI: 00:1e.0 subsystem <- 8086/02a8
1492 12:26:26.989163 PCI: 00:1e.0 cmd <- 06
1493 12:26:26.992906 PCI: 00:1e.2 subsystem <- 8086/02aa
1494 12:26:26.995471 PCI: 00:1e.2 cmd <- 06
1495 12:26:26.998884 PCI: 00:1e.3 subsystem <- 8086/02ab
1496 12:26:27.002336 PCI: 00:1e.3 cmd <- 02
1497 12:26:27.005662 PCI: 00:1f.0 subsystem <- 8086/0284
1498 12:26:27.008928 PCI: 00:1f.0 cmd <- 407
1499 12:26:27.012119 PCI: 00:1f.3 subsystem <- 8086/02c8
1500 12:26:27.015539 PCI: 00:1f.3 cmd <- 02
1501 12:26:27.018988 PCI: 00:1f.4 subsystem <- 8086/02a3
1502 12:26:27.022250 PCI: 00:1f.4 cmd <- 03
1503 12:26:27.025426 PCI: 00:1f.5 subsystem <- 8086/02a4
1504 12:26:27.028911 PCI: 00:1f.5 cmd <- 406
1505 12:26:27.036500 PCI: 01:00.0 cmd <- 02
1506 12:26:27.041675 done.
1507 12:26:27.054306 ME: Version: 14.0.39.1367
1508 12:26:27.061047 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1509 12:26:27.064208 Initializing devices...
1510 12:26:27.064314 Root Device init ...
1511 12:26:27.070748 Chrome EC: Set SMI mask to 0x0000000000000000
1512 12:26:27.074262 Chrome EC: clear events_b mask to 0x0000000000000000
1513 12:26:27.080898 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1514 12:26:27.087583 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1515 12:26:27.094113 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1516 12:26:27.097190 Chrome EC: Set WAKE mask to 0x0000000000000000
1517 12:26:27.100457 Root Device init finished in 35179 usecs
1518 12:26:27.104226 CPU_CLUSTER: 0 init ...
1519 12:26:27.110380 CPU_CLUSTER: 0 init finished in 2445 usecs
1520 12:26:27.114679 PCI: 00:00.0 init ...
1521 12:26:27.118017 CPU TDP: 15 Watts
1522 12:26:27.121516 CPU PL2 = 64 Watts
1523 12:26:27.124477 PCI: 00:00.0 init finished in 7078 usecs
1524 12:26:27.128044 PCI: 00:02.0 init ...
1525 12:26:27.131365 PCI: 00:02.0 init finished in 2244 usecs
1526 12:26:27.134754 PCI: 00:08.0 init ...
1527 12:26:27.138297 PCI: 00:08.0 init finished in 2251 usecs
1528 12:26:27.141714 PCI: 00:12.0 init ...
1529 12:26:27.144520 PCI: 00:12.0 init finished in 2250 usecs
1530 12:26:27.147976 PCI: 00:14.0 init ...
1531 12:26:27.151339 PCI: 00:14.0 init finished in 2251 usecs
1532 12:26:27.154875 PCI: 00:14.2 init ...
1533 12:26:27.158297 PCI: 00:14.2 init finished in 2252 usecs
1534 12:26:27.161257 PCI: 00:14.3 init ...
1535 12:26:27.164614 PCI: 00:14.3 init finished in 2269 usecs
1536 12:26:27.168087 PCI: 00:15.0 init ...
1537 12:26:27.171542 DW I2C bus 0 at 0xd121f000 (400 KHz)
1538 12:26:27.174436 PCI: 00:15.0 init finished in 5965 usecs
1539 12:26:27.177584 PCI: 00:15.1 init ...
1540 12:26:27.181170 DW I2C bus 1 at 0xd1220000 (400 KHz)
1541 12:26:27.187672 PCI: 00:15.1 init finished in 5975 usecs
1542 12:26:27.187757 PCI: 00:16.0 init ...
1543 12:26:27.194297 PCI: 00:16.0 init finished in 2243 usecs
1544 12:26:27.197148 PCI: 00:19.0 init ...
1545 12:26:27.200784 DW I2C bus 4 at 0xd1222000 (400 KHz)
1546 12:26:27.204102 PCI: 00:19.0 init finished in 5975 usecs
1547 12:26:27.207571 PCI: 00:1d.0 init ...
1548 12:26:27.210721 Initializing PCH PCIe bridge.
1549 12:26:27.213816 PCI: 00:1d.0 init finished in 5283 usecs
1550 12:26:27.216971 PCI: 00:1f.0 init ...
1551 12:26:27.220710 IOAPIC: Initializing IOAPIC at 0xfec00000
1552 12:26:27.227282 IOAPIC: Bootstrap Processor Local APIC = 0x00
1553 12:26:27.227364 IOAPIC: ID = 0x02
1554 12:26:27.230440 IOAPIC: Dumping registers
1555 12:26:27.233741 reg 0x0000: 0x02000000
1556 12:26:27.237322 reg 0x0001: 0x00770020
1557 12:26:27.237405 reg 0x0002: 0x00000000
1558 12:26:27.243626 PCI: 00:1f.0 init finished in 23528 usecs
1559 12:26:27.247306 PCI: 00:1f.4 init ...
1560 12:26:27.250188 PCI: 00:1f.4 init finished in 2261 usecs
1561 12:26:27.261017 PCI: 01:00.0 init ...
1562 12:26:27.264410 PCI: 01:00.0 init finished in 2243 usecs
1563 12:26:27.268532 PNP: 0c09.0 init ...
1564 12:26:27.271927 Google Chrome EC uptime: 11.090 seconds
1565 12:26:27.278399 Google Chrome AP resets since EC boot: 0
1566 12:26:27.281628 Google Chrome most recent AP reset causes:
1567 12:26:27.288184 Google Chrome EC reset flags at last EC boot: reset-pin
1568 12:26:27.291397 PNP: 0c09.0 init finished in 20548 usecs
1569 12:26:27.294739 Devices initialized
1570 12:26:27.294820 Show all devs... After init.
1571 12:26:27.297994 Root Device: enabled 1
1572 12:26:27.301606 CPU_CLUSTER: 0: enabled 1
1573 12:26:27.305073 DOMAIN: 0000: enabled 1
1574 12:26:27.305155 APIC: 00: enabled 1
1575 12:26:27.308024 PCI: 00:00.0: enabled 1
1576 12:26:27.311389 PCI: 00:02.0: enabled 1
1577 12:26:27.314804 PCI: 00:04.0: enabled 0
1578 12:26:27.314887 PCI: 00:05.0: enabled 0
1579 12:26:27.318396 PCI: 00:12.0: enabled 1
1580 12:26:27.321823 PCI: 00:12.5: enabled 0
1581 12:26:27.321904 PCI: 00:12.6: enabled 0
1582 12:26:27.324824 PCI: 00:14.0: enabled 1
1583 12:26:27.328335 PCI: 00:14.1: enabled 0
1584 12:26:27.331501 PCI: 00:14.3: enabled 1
1585 12:26:27.331635 PCI: 00:14.5: enabled 0
1586 12:26:27.334743 PCI: 00:15.0: enabled 1
1587 12:26:27.338011 PCI: 00:15.1: enabled 1
1588 12:26:27.341500 PCI: 00:15.2: enabled 0
1589 12:26:27.341581 PCI: 00:15.3: enabled 0
1590 12:26:27.344449 PCI: 00:16.0: enabled 1
1591 12:26:27.348235 PCI: 00:16.1: enabled 0
1592 12:26:27.351210 PCI: 00:16.2: enabled 0
1593 12:26:27.351292 PCI: 00:16.3: enabled 0
1594 12:26:27.354682 PCI: 00:16.4: enabled 0
1595 12:26:27.357852 PCI: 00:16.5: enabled 0
1596 12:26:27.361006 PCI: 00:17.0: enabled 1
1597 12:26:27.361088 PCI: 00:19.0: enabled 1
1598 12:26:27.364542 PCI: 00:19.1: enabled 0
1599 12:26:27.367420 PCI: 00:19.2: enabled 0
1600 12:26:27.367502 PCI: 00:1a.0: enabled 0
1601 12:26:27.370922 PCI: 00:1c.0: enabled 0
1602 12:26:27.374143 PCI: 00:1c.1: enabled 0
1603 12:26:27.377463 PCI: 00:1c.2: enabled 0
1604 12:26:27.377578 PCI: 00:1c.3: enabled 0
1605 12:26:27.380636 PCI: 00:1c.4: enabled 0
1606 12:26:27.384020 PCI: 00:1c.5: enabled 0
1607 12:26:27.387602 PCI: 00:1c.6: enabled 0
1608 12:26:27.387715 PCI: 00:1c.7: enabled 0
1609 12:26:27.390755 PCI: 00:1d.0: enabled 1
1610 12:26:27.394450 PCI: 00:1d.1: enabled 0
1611 12:26:27.397792 PCI: 00:1d.2: enabled 0
1612 12:26:27.397875 PCI: 00:1d.3: enabled 0
1613 12:26:27.400874 PCI: 00:1d.4: enabled 0
1614 12:26:27.403976 PCI: 00:1d.5: enabled 0
1615 12:26:27.404058 PCI: 00:1e.0: enabled 1
1616 12:26:27.407415 PCI: 00:1e.1: enabled 0
1617 12:26:27.411114 PCI: 00:1e.2: enabled 1
1618 12:26:27.413971 PCI: 00:1e.3: enabled 1
1619 12:26:27.414053 PCI: 00:1f.0: enabled 1
1620 12:26:27.417215 PCI: 00:1f.1: enabled 0
1621 12:26:27.420733 PCI: 00:1f.2: enabled 0
1622 12:26:27.424137 PCI: 00:1f.3: enabled 1
1623 12:26:27.424253 PCI: 00:1f.4: enabled 1
1624 12:26:27.427035 PCI: 00:1f.5: enabled 1
1625 12:26:27.430456 PCI: 00:1f.6: enabled 0
1626 12:26:27.433954 USB0 port 0: enabled 1
1627 12:26:27.434036 I2C: 01:15: enabled 1
1628 12:26:27.437463 I2C: 02:5d: enabled 1
1629 12:26:27.440757 GENERIC: 0.0: enabled 1
1630 12:26:27.440839 I2C: 03:1a: enabled 1
1631 12:26:27.443525 I2C: 03:38: enabled 1
1632 12:26:27.446866 I2C: 03:39: enabled 1
1633 12:26:27.446948 I2C: 03:3a: enabled 1
1634 12:26:27.450231 I2C: 03:3b: enabled 1
1635 12:26:27.453743 PCI: 00:00.0: enabled 1
1636 12:26:27.453832 SPI: 00: enabled 1
1637 12:26:27.456921 SPI: 01: enabled 1
1638 12:26:27.460272 PNP: 0c09.0: enabled 1
1639 12:26:27.460390 USB2 port 0: enabled 1
1640 12:26:27.463526 USB2 port 1: enabled 1
1641 12:26:27.467009 USB2 port 2: enabled 0
1642 12:26:27.467092 USB2 port 3: enabled 0
1643 12:26:27.470509 USB2 port 5: enabled 0
1644 12:26:27.473797 USB2 port 6: enabled 1
1645 12:26:27.476510 USB2 port 9: enabled 1
1646 12:26:27.476592 USB3 port 0: enabled 1
1647 12:26:27.479924 USB3 port 1: enabled 1
1648 12:26:27.483180 USB3 port 2: enabled 1
1649 12:26:27.483262 USB3 port 3: enabled 1
1650 12:26:27.486510 USB3 port 4: enabled 0
1651 12:26:27.490015 APIC: 03: enabled 1
1652 12:26:27.490103 APIC: 05: enabled 1
1653 12:26:27.493135 APIC: 02: enabled 1
1654 12:26:27.496769 APIC: 04: enabled 1
1655 12:26:27.496904 APIC: 01: enabled 1
1656 12:26:27.499689 APIC: 06: enabled 1
1657 12:26:27.499771 APIC: 07: enabled 1
1658 12:26:27.502988 PCI: 00:08.0: enabled 1
1659 12:26:27.506810 PCI: 00:14.2: enabled 1
1660 12:26:27.510050 PCI: 01:00.0: enabled 1
1661 12:26:27.513743 Disabling ACPI via APMC:
1662 12:26:27.513825 done.
1663 12:26:27.520480 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1664 12:26:27.523680 ELOG: NV offset 0xaf0000 size 0x4000
1665 12:26:27.530218 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1666 12:26:27.536441 ELOG: Event(17) added with size 13 at 2023-12-08 12:23:55 UTC
1667 12:26:27.543348 ELOG: Event(92) added with size 9 at 2023-12-08 12:23:55 UTC
1668 12:26:27.549944 ELOG: Event(93) added with size 9 at 2023-12-08 12:23:55 UTC
1669 12:26:27.556717 ELOG: Event(9A) added with size 9 at 2023-12-08 12:23:55 UTC
1670 12:26:27.562919 ELOG: Event(9E) added with size 10 at 2023-12-08 12:23:55 UTC
1671 12:26:27.569615 ELOG: Event(9F) added with size 14 at 2023-12-08 12:23:55 UTC
1672 12:26:27.572997 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1673 12:26:27.580469 ELOG: Event(A1) added with size 10 at 2023-12-08 12:23:55 UTC
1674 12:26:27.590263 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1675 12:26:27.596777 ELOG: Event(A0) added with size 9 at 2023-12-08 12:23:55 UTC
1676 12:26:27.599985 elog_add_boot_reason: Logged dev mode boot
1677 12:26:27.600070 Finalize devices...
1678 12:26:27.603303 PCI: 00:17.0 final
1679 12:26:27.606700 Devices finalized
1680 12:26:27.609798 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1681 12:26:27.616588 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1682 12:26:27.619811 ME: HFSTS1 : 0x90000245
1683 12:26:27.623302 ME: HFSTS2 : 0x3B850126
1684 12:26:27.629824 ME: HFSTS3 : 0x00000020
1685 12:26:27.632965 ME: HFSTS4 : 0x00004800
1686 12:26:27.636952 ME: HFSTS5 : 0x00000000
1687 12:26:27.639454 ME: HFSTS6 : 0x40400006
1688 12:26:27.642842 ME: Manufacturing Mode : NO
1689 12:26:27.646070 ME: FW Partition Table : OK
1690 12:26:27.649389 ME: Bringup Loader Failure : NO
1691 12:26:27.652906 ME: Firmware Init Complete : YES
1692 12:26:27.656322 ME: Boot Options Present : NO
1693 12:26:27.659614 ME: Update In Progress : NO
1694 12:26:27.662574 ME: D0i3 Support : YES
1695 12:26:27.665767 ME: Low Power State Enabled : NO
1696 12:26:27.669223 ME: CPU Replaced : NO
1697 12:26:27.672636 ME: CPU Replacement Valid : YES
1698 12:26:27.675912 ME: Current Working State : 5
1699 12:26:27.679651 ME: Current Operation State : 1
1700 12:26:27.682303 ME: Current Operation Mode : 0
1701 12:26:27.686078 ME: Error Code : 0
1702 12:26:27.689485 ME: CPU Debug Disabled : YES
1703 12:26:27.692437 ME: TXT Support : NO
1704 12:26:27.699244 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1705 12:26:27.705426 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1706 12:26:27.705510 CBFS @ c08000 size 3f8000
1707 12:26:27.712331 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1708 12:26:27.715584 CBFS: Locating 'fallback/dsdt.aml'
1709 12:26:27.718875 CBFS: Found @ offset 10bb80 size 3fa5
1710 12:26:27.725779 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1711 12:26:27.728600 CBFS @ c08000 size 3f8000
1712 12:26:27.735319 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1713 12:26:27.735402 CBFS: Locating 'fallback/slic'
1714 12:26:27.740900 CBFS: 'fallback/slic' not found.
1715 12:26:27.747039 ACPI: Writing ACPI tables at 99b3e000.
1716 12:26:27.747124 ACPI: * FACS
1717 12:26:27.750351 ACPI: * DSDT
1718 12:26:27.754188 Ramoops buffer: 0x100000@0x99a3d000.
1719 12:26:27.757211 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1720 12:26:27.763595 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1721 12:26:27.767067 Google Chrome EC: version:
1722 12:26:27.770383 ro: helios_v2.0.2659-56403530b
1723 12:26:27.773784 rw: helios_v2.0.2849-c41de27e7d
1724 12:26:27.773910 running image: 1
1725 12:26:27.777947 ACPI: * FADT
1726 12:26:27.778031 SCI is IRQ9
1727 12:26:27.784449 ACPI: added table 1/32, length now 40
1728 12:26:27.784532 ACPI: * SSDT
1729 12:26:27.787754 Found 1 CPU(s) with 8 core(s) each.
1730 12:26:27.791454 Error: Could not locate 'wifi_sar' in VPD.
1731 12:26:27.797729 Checking CBFS for default SAR values
1732 12:26:27.801232 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 12:26:27.804911 CBFS @ c08000 size 3f8000
1734 12:26:27.811026 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 12:26:27.814748 CBFS: Locating 'wifi_sar_defaults.hex'
1736 12:26:27.818016 CBFS: Found @ offset 5fac0 size 77
1737 12:26:27.821266 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1738 12:26:27.824314 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1739 12:26:27.831067 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1740 12:26:27.837941 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1741 12:26:27.841172 failed to find key in VPD: dsm_calib_r0_0
1742 12:26:27.850673 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1743 12:26:27.854092 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1744 12:26:27.857562 failed to find key in VPD: dsm_calib_r0_1
1745 12:26:27.867214 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1746 12:26:27.874239 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1747 12:26:27.877074 failed to find key in VPD: dsm_calib_r0_2
1748 12:26:27.887398 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1749 12:26:27.890738 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1750 12:26:27.897325 failed to find key in VPD: dsm_calib_r0_3
1751 12:26:27.903767 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1752 12:26:27.910671 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1753 12:26:27.913636 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1754 12:26:27.916605 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1755 12:26:27.920930 EC returned error result code 1
1756 12:26:27.924413 EC returned error result code 1
1757 12:26:27.928422 EC returned error result code 1
1758 12:26:27.934943 PS2K: Bad resp from EC. Vivaldi disabled!
1759 12:26:27.938239 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1760 12:26:27.945169 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1761 12:26:27.951110 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1762 12:26:27.954543 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1763 12:26:27.961347 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1764 12:26:27.968294 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1765 12:26:27.974438 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1766 12:26:27.978079 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1767 12:26:27.984726 ACPI: added table 2/32, length now 44
1768 12:26:27.984813 ACPI: * MCFG
1769 12:26:27.987538 ACPI: added table 3/32, length now 48
1770 12:26:27.990857 ACPI: * TPM2
1771 12:26:27.994435 TPM2 log created at 99a2d000
1772 12:26:27.997860 ACPI: added table 4/32, length now 52
1773 12:26:27.997945 ACPI: * MADT
1774 12:26:28.001438 SCI is IRQ9
1775 12:26:28.004167 ACPI: added table 5/32, length now 56
1776 12:26:28.004253 current = 99b43ac0
1777 12:26:28.007634 ACPI: * DMAR
1778 12:26:28.011277 ACPI: added table 6/32, length now 60
1779 12:26:28.014303 ACPI: * IGD OpRegion
1780 12:26:28.014388 GMA: Found VBT in CBFS
1781 12:26:28.017271 GMA: Found valid VBT in CBFS
1782 12:26:28.021153 ACPI: added table 7/32, length now 64
1783 12:26:28.024277 ACPI: * HPET
1784 12:26:28.027373 ACPI: added table 8/32, length now 68
1785 12:26:28.027458 ACPI: done.
1786 12:26:28.030599 ACPI tables: 31744 bytes.
1787 12:26:28.034126 smbios_write_tables: 99a2c000
1788 12:26:28.037888 EC returned error result code 3
1789 12:26:28.041069 Couldn't obtain OEM name from CBI
1790 12:26:28.044178 Create SMBIOS type 17
1791 12:26:28.047416 PCI: 00:00.0 (Intel Cannonlake)
1792 12:26:28.051110 PCI: 00:14.3 (Intel WiFi)
1793 12:26:28.054218 SMBIOS tables: 939 bytes.
1794 12:26:28.057227 Writing table forward entry at 0x00000500
1795 12:26:28.063775 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1796 12:26:28.067175 Writing coreboot table at 0x99b62000
1797 12:26:28.073793 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1798 12:26:28.077636 1. 0000000000001000-000000000009ffff: RAM
1799 12:26:28.080441 2. 00000000000a0000-00000000000fffff: RESERVED
1800 12:26:28.087364 3. 0000000000100000-0000000099a2bfff: RAM
1801 12:26:28.093503 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1802 12:26:28.097101 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1803 12:26:28.104000 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1804 12:26:28.106946 7. 000000009a000000-000000009f7fffff: RESERVED
1805 12:26:28.113694 8. 00000000e0000000-00000000efffffff: RESERVED
1806 12:26:28.117162 9. 00000000fc000000-00000000fc000fff: RESERVED
1807 12:26:28.123466 10. 00000000fe000000-00000000fe00ffff: RESERVED
1808 12:26:28.127097 11. 00000000fed10000-00000000fed17fff: RESERVED
1809 12:26:28.130386 12. 00000000fed80000-00000000fed83fff: RESERVED
1810 12:26:28.136983 13. 00000000fed90000-00000000fed91fff: RESERVED
1811 12:26:28.140509 14. 00000000feda0000-00000000feda1fff: RESERVED
1812 12:26:28.146991 15. 0000000100000000-000000045e7fffff: RAM
1813 12:26:28.149981 Graphics framebuffer located at 0xc0000000
1814 12:26:28.153480 Passing 5 GPIOs to payload:
1815 12:26:28.156879 NAME | PORT | POLARITY | VALUE
1816 12:26:28.163073 write protect | undefined | high | low
1817 12:26:28.169925 lid | undefined | high | high
1818 12:26:28.173520 power | undefined | high | low
1819 12:26:28.180039 oprom | undefined | high | low
1820 12:26:28.183350 EC in RW | 0x000000cb | high | low
1821 12:26:28.186276 Board ID: 4
1822 12:26:28.190064 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1823 12:26:28.193038 CBFS @ c08000 size 3f8000
1824 12:26:28.199677 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1825 12:26:28.206161 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1826 12:26:28.206272 coreboot table: 1492 bytes.
1827 12:26:28.209741 IMD ROOT 0. 99fff000 00001000
1828 12:26:28.213278 IMD SMALL 1. 99ffe000 00001000
1829 12:26:28.216674 FSP MEMORY 2. 99c4e000 003b0000
1830 12:26:28.219437 CONSOLE 3. 99c2e000 00020000
1831 12:26:28.223047 FMAP 4. 99c2d000 0000054e
1832 12:26:28.226502 TIME STAMP 5. 99c2c000 00000910
1833 12:26:28.229527 VBOOT WORK 6. 99c18000 00014000
1834 12:26:28.232961 MRC DATA 7. 99c16000 00001958
1835 12:26:28.236536 ROMSTG STCK 8. 99c15000 00001000
1836 12:26:28.239716 AFTER CAR 9. 99c0b000 0000a000
1837 12:26:28.242947 RAMSTAGE 10. 99baf000 0005c000
1838 12:26:28.246549 REFCODE 11. 99b7a000 00035000
1839 12:26:28.249836 SMM BACKUP 12. 99b6a000 00010000
1840 12:26:28.253383 COREBOOT 13. 99b62000 00008000
1841 12:26:28.256807 ACPI 14. 99b3e000 00024000
1842 12:26:28.259447 ACPI GNVS 15. 99b3d000 00001000
1843 12:26:28.262882 RAMOOPS 16. 99a3d000 00100000
1844 12:26:28.266509 TPM2 TCGLOG17. 99a2d000 00010000
1845 12:26:28.269910 SMBIOS 18. 99a2c000 00000800
1846 12:26:28.272670 IMD small region:
1847 12:26:28.275930 IMD ROOT 0. 99ffec00 00000400
1848 12:26:28.279423 FSP RUNTIME 1. 99ffebe0 00000004
1849 12:26:28.282767 EC HOSTEVENT 2. 99ffebc0 00000008
1850 12:26:28.286613 POWER STATE 3. 99ffeb80 00000040
1851 12:26:28.290037 ROMSTAGE 4. 99ffeb60 00000004
1852 12:26:28.292905 MEM INFO 5. 99ffe9a0 000001b9
1853 12:26:28.296553 VPD 6. 99ffe920 0000006c
1854 12:26:28.299626 MTRR: Physical address space:
1855 12:26:28.306432 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1856 12:26:28.312810 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1857 12:26:28.319471 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1858 12:26:28.325879 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1859 12:26:28.332765 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1860 12:26:28.339126 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1861 12:26:28.345915 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1862 12:26:28.348844 MTRR: Fixed MSR 0x250 0x0606060606060606
1863 12:26:28.352466 MTRR: Fixed MSR 0x258 0x0606060606060606
1864 12:26:28.355801 MTRR: Fixed MSR 0x259 0x0000000000000000
1865 12:26:28.359444 MTRR: Fixed MSR 0x268 0x0606060606060606
1866 12:26:28.365513 MTRR: Fixed MSR 0x269 0x0606060606060606
1867 12:26:28.369402 MTRR: Fixed MSR 0x26a 0x0606060606060606
1868 12:26:28.372380 MTRR: Fixed MSR 0x26b 0x0606060606060606
1869 12:26:28.375910 MTRR: Fixed MSR 0x26c 0x0606060606060606
1870 12:26:28.382498 MTRR: Fixed MSR 0x26d 0x0606060606060606
1871 12:26:28.385148 MTRR: Fixed MSR 0x26e 0x0606060606060606
1872 12:26:28.388538 MTRR: Fixed MSR 0x26f 0x0606060606060606
1873 12:26:28.391792 call enable_fixed_mtrr()
1874 12:26:28.395055 CPU physical address size: 39 bits
1875 12:26:28.401931 MTRR: default type WB/UC MTRR counts: 6/8.
1876 12:26:28.405371 MTRR: WB selected as default type.
1877 12:26:28.411626 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1878 12:26:28.414959 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1879 12:26:28.421881 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1880 12:26:28.428220 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1881 12:26:28.434595 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1882 12:26:28.441443 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1883 12:26:28.444809 MTRR: Fixed MSR 0x250 0x0606060606060606
1884 12:26:28.451297 MTRR: Fixed MSR 0x258 0x0606060606060606
1885 12:26:28.454925 MTRR: Fixed MSR 0x259 0x0000000000000000
1886 12:26:28.457921 MTRR: Fixed MSR 0x268 0x0606060606060606
1887 12:26:28.461395 MTRR: Fixed MSR 0x269 0x0606060606060606
1888 12:26:28.468039 MTRR: Fixed MSR 0x26a 0x0606060606060606
1889 12:26:28.471460 MTRR: Fixed MSR 0x26b 0x0606060606060606
1890 12:26:28.474301 MTRR: Fixed MSR 0x26c 0x0606060606060606
1891 12:26:28.477738 MTRR: Fixed MSR 0x26d 0x0606060606060606
1892 12:26:28.484826 MTRR: Fixed MSR 0x26e 0x0606060606060606
1893 12:26:28.488257 MTRR: Fixed MSR 0x26f 0x0606060606060606
1894 12:26:28.488365
1895 12:26:28.488431 MTRR check
1896 12:26:28.491239 Fixed MTRRs : Enabled
1897 12:26:28.494087 Variable MTRRs: Enabled
1898 12:26:28.494170
1899 12:26:28.497903 call enable_fixed_mtrr()
1900 12:26:28.500887 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1901 12:26:28.504473 CPU physical address size: 39 bits
1902 12:26:28.511490 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1903 12:26:28.514984 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 12:26:28.517650 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 12:26:28.524890 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 12:26:28.527430 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 12:26:28.530843 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 12:26:28.534134 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 12:26:28.541348 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 12:26:28.544541 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 12:26:28.547895 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 12:26:28.551207 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 12:26:28.554314 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 12:26:28.561126 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 12:26:28.563974 call enable_fixed_mtrr()
1916 12:26:28.567511 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 12:26:28.570821 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 12:26:28.574331 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 12:26:28.581185 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 12:26:28.584020 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 12:26:28.587312 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 12:26:28.590995 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 12:26:28.593886 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 12:26:28.600506 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 12:26:28.603577 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 12:26:28.607448 CPU physical address size: 39 bits
1927 12:26:28.610698 call enable_fixed_mtrr()
1928 12:26:28.613597 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 12:26:28.617167 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 12:26:28.623885 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 12:26:28.627249 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 12:26:28.630608 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 12:26:28.633828 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 12:26:28.640072 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 12:26:28.643493 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 12:26:28.647135 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 12:26:28.650308 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 12:26:28.656629 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 12:26:28.660075 MTRR: Fixed MSR 0x250 0x0606060606060606
1940 12:26:28.663501 call enable_fixed_mtrr()
1941 12:26:28.666985 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 12:26:28.670226 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 12:26:28.673397 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 12:26:28.680323 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 12:26:28.683225 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 12:26:28.686332 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 12:26:28.689862 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 12:26:28.696481 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 12:26:28.700146 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 12:26:28.703186 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 12:26:28.706007 CPU physical address size: 39 bits
1952 12:26:28.709484 call enable_fixed_mtrr()
1953 12:26:28.713354 CBFS @ c08000 size 3f8000
1954 12:26:28.716005 CPU physical address size: 39 bits
1955 12:26:28.719784 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 12:26:28.723370 MTRR: Fixed MSR 0x250 0x0606060606060606
1957 12:26:28.729813 MTRR: Fixed MSR 0x258 0x0606060606060606
1958 12:26:28.732987 MTRR: Fixed MSR 0x259 0x0000000000000000
1959 12:26:28.736503 MTRR: Fixed MSR 0x268 0x0606060606060606
1960 12:26:28.739641 MTRR: Fixed MSR 0x269 0x0606060606060606
1961 12:26:28.746240 MTRR: Fixed MSR 0x26a 0x0606060606060606
1962 12:26:28.749124 MTRR: Fixed MSR 0x26b 0x0606060606060606
1963 12:26:28.752633 MTRR: Fixed MSR 0x26c 0x0606060606060606
1964 12:26:28.756021 MTRR: Fixed MSR 0x26d 0x0606060606060606
1965 12:26:28.759401 MTRR: Fixed MSR 0x26e 0x0606060606060606
1966 12:26:28.765984 MTRR: Fixed MSR 0x26f 0x0606060606060606
1967 12:26:28.769032 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 12:26:28.772312 call enable_fixed_mtrr()
1969 12:26:28.775822 MTRR: Fixed MSR 0x259 0x0000000000000000
1970 12:26:28.779517 MTRR: Fixed MSR 0x268 0x0606060606060606
1971 12:26:28.782267 MTRR: Fixed MSR 0x269 0x0606060606060606
1972 12:26:28.788998 MTRR: Fixed MSR 0x26a 0x0606060606060606
1973 12:26:28.792611 MTRR: Fixed MSR 0x26b 0x0606060606060606
1974 12:26:28.795869 MTRR: Fixed MSR 0x26c 0x0606060606060606
1975 12:26:28.799154 MTRR: Fixed MSR 0x26d 0x0606060606060606
1976 12:26:28.805206 MTRR: Fixed MSR 0x26e 0x0606060606060606
1977 12:26:28.809029 MTRR: Fixed MSR 0x26f 0x0606060606060606
1978 12:26:28.812015 CPU physical address size: 39 bits
1979 12:26:28.815611 call enable_fixed_mtrr()
1980 12:26:28.821986 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1981 12:26:28.825213 CPU physical address size: 39 bits
1982 12:26:28.828524 CPU physical address size: 39 bits
1983 12:26:28.832132 CBFS: Locating 'fallback/payload'
1984 12:26:28.835530 CBFS: Found @ offset 1c96c0 size 3f798
1985 12:26:28.842411 Checking segment from ROM address 0xffdd16f8
1986 12:26:28.845203 Checking segment from ROM address 0xffdd1714
1987 12:26:28.848946 Loading segment from ROM address 0xffdd16f8
1988 12:26:28.852006 code (compression=0)
1989 12:26:28.861695 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1990 12:26:28.868525 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1991 12:26:28.871724 it's not compressed!
1992 12:26:28.963233 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1993 12:26:28.969722 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1994 12:26:28.973277 Loading segment from ROM address 0xffdd1714
1995 12:26:28.976452 Entry Point 0x30000000
1996 12:26:28.979777 Loaded segments
1997 12:26:28.985464 Finalizing chipset.
1998 12:26:28.988831 Finalizing SMM.
1999 12:26:28.992400 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2000 12:26:28.995706 mp_park_aps done after 0 msecs.
2001 12:26:29.001845 Jumping to boot code at 30000000(99b62000)
2002 12:26:29.008666 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2003 12:26:29.008756
2004 12:26:29.008844
2005 12:26:29.008926
2006 12:26:29.011956 Starting depthcharge on Helios...
2007 12:26:29.012041
2008 12:26:29.012400 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2009 12:26:29.012506 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2010 12:26:29.012592 Setting prompt string to ['hatch:']
2011 12:26:29.012679 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2012 12:26:29.021733 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2013 12:26:29.021848
2014 12:26:29.028370 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2015 12:26:29.028460
2016 12:26:29.035257 board_setup: Info: eMMC controller not present; skipping
2017 12:26:29.035346
2018 12:26:29.038455 New NVMe Controller 0x30053ac0 @ 00:1d:00
2019 12:26:29.038565
2020 12:26:29.044966 board_setup: Info: SDHCI controller not present; skipping
2021 12:26:29.045054
2022 12:26:29.051547 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2023 12:26:29.051639
2024 12:26:29.051728 Wipe memory regions:
2025 12:26:29.051830
2026 12:26:29.055079 [0x00000000001000, 0x000000000a0000)
2027 12:26:29.055166
2028 12:26:29.058373 [0x00000000100000, 0x00000030000000)
2029 12:26:29.124575
2030 12:26:29.127928 [0x00000030657430, 0x00000099a2c000)
2031 12:26:29.265162
2032 12:26:29.268536 [0x00000100000000, 0x0000045e800000)
2033 12:26:30.651557
2034 12:26:30.651728 R8152: Initializing
2035 12:26:30.651833
2036 12:26:30.654682 Version 9 (ocp_data = 6010)
2037 12:26:30.658604
2038 12:26:30.658714 R8152: Done initializing
2039 12:26:30.658820
2040 12:26:30.661961 Adding net device
2041 12:26:31.144744
2042 12:26:31.144923 R8152: Initializing
2043 12:26:31.145019
2044 12:26:31.147779 Version 6 (ocp_data = 5c30)
2045 12:26:31.147896
2046 12:26:31.151313 R8152: Done initializing
2047 12:26:31.151424
2048 12:26:31.158077 net_add_device: Attemp to include the same device
2049 12:26:31.158189
2050 12:26:31.165002 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2051 12:26:31.165092
2052 12:26:31.165156
2053 12:26:31.165216
2054 12:26:31.165492 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2056 12:26:31.265816 hatch: tftpboot 192.168.201.1 12217947/tftp-deploy-1sub8z5v/kernel/bzImage 12217947/tftp-deploy-1sub8z5v/kernel/cmdline 12217947/tftp-deploy-1sub8z5v/ramdisk/ramdisk.cpio.gz
2057 12:26:31.266019 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2058 12:26:31.266168 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2059 12:26:31.271022 tftpboot 192.168.201.1 12217947/tftp-deploy-1sub8z5v/kernel/bzIploy-1sub8z5v/kernel/cmdline 12217947/tftp-deploy-1sub8z5v/ramdisk/ramdisk.cpio.gz
2060 12:26:31.271151
2061 12:26:31.271244 Waiting for link
2062 12:26:31.471561
2063 12:26:31.471738 done.
2064 12:26:31.471834
2065 12:26:31.471935 MAC: 00:24:32:50:19:be
2066 12:26:31.472025
2067 12:26:31.474526 Sending DHCP discover... done.
2068 12:26:31.474634
2069 12:26:31.478295 Waiting for reply... done.
2070 12:26:31.478402
2071 12:26:31.481159 Sending DHCP request... done.
2072 12:26:31.481268
2073 12:26:31.488508 Waiting for reply... done.
2074 12:26:31.488604
2075 12:26:31.488675 My ip is 192.168.201.15
2076 12:26:31.488739
2077 12:26:31.492129 The DHCP server ip is 192.168.201.1
2078 12:26:31.495203
2079 12:26:31.498597 TFTP server IP predefined by user: 192.168.201.1
2080 12:26:31.498705
2081 12:26:31.505175 Bootfile predefined by user: 12217947/tftp-deploy-1sub8z5v/kernel/bzImage
2082 12:26:31.505281
2083 12:26:31.508746 Sending tftp read request... done.
2084 12:26:31.508847
2085 12:26:31.511702 Waiting for the transfer...
2086 12:26:31.515121
2087 12:26:32.052163 00000000 ################################################################
2088 12:26:32.052373
2089 12:26:32.586620 00080000 ################################################################
2090 12:26:32.586772
2091 12:26:33.136459 00100000 ################################################################
2092 12:26:33.136610
2093 12:26:33.686347 00180000 ################################################################
2094 12:26:33.686530
2095 12:26:34.235440 00200000 ################################################################
2096 12:26:34.235592
2097 12:26:34.777563 00280000 ################################################################
2098 12:26:34.777748
2099 12:26:35.322459 00300000 ################################################################
2100 12:26:35.322650
2101 12:26:35.876158 00380000 ################################################################
2102 12:26:35.876346
2103 12:26:36.434746 00400000 ################################################################
2104 12:26:36.434926
2105 12:26:36.970690 00480000 ################################################################
2106 12:26:36.970846
2107 12:26:37.520751 00500000 ################################################################
2108 12:26:37.520909
2109 12:26:38.055132 00580000 ################################################################
2110 12:26:38.055271
2111 12:26:38.590760 00600000 ################################################################
2112 12:26:38.590913
2113 12:26:39.129624 00680000 ################################################################
2114 12:26:39.129778
2115 12:26:39.674292 00700000 ################################################################
2116 12:26:39.674429
2117 12:26:40.222210 00780000 ################################################################
2118 12:26:40.222352
2119 12:26:40.755139 00800000 ################################################################
2120 12:26:40.755279
2121 12:26:41.304559 00880000 ################################################################
2122 12:26:41.304687
2123 12:26:41.843487 00900000 ################################################################
2124 12:26:41.843620
2125 12:26:42.379745 00980000 ################################################################
2126 12:26:42.379886
2127 12:26:42.917721 00a00000 ################################################################
2128 12:26:42.917855
2129 12:26:43.447064 00a80000 ################################################################
2130 12:26:43.447203
2131 12:26:43.484432 00b00000 ##### done.
2132 12:26:43.484533
2133 12:26:43.488169 The bootfile was 11571200 bytes long.
2134 12:26:43.488308
2135 12:26:43.491015 Sending tftp read request... done.
2136 12:26:43.491123
2137 12:26:43.494479 Waiting for the transfer...
2138 12:26:43.494561
2139 12:26:44.041591 00000000 ################################################################
2140 12:26:44.041759
2141 12:26:44.594926 00080000 ################################################################
2142 12:26:44.595115
2143 12:26:45.143591 00100000 ################################################################
2144 12:26:45.143733
2145 12:26:45.690898 00180000 ################################################################
2146 12:26:45.691059
2147 12:26:46.235946 00200000 ################################################################
2148 12:26:46.236123
2149 12:26:46.766112 00280000 ################################################################
2150 12:26:46.766402
2151 12:26:47.291199 00300000 ################################################################
2152 12:26:47.291347
2153 12:26:47.829663 00380000 ################################################################
2154 12:26:47.829831
2155 12:26:48.349686 00400000 ################################################################
2156 12:26:48.349860
2157 12:26:48.880062 00480000 ################################################################
2158 12:26:48.880206
2159 12:26:49.415516 00500000 ################################################################
2160 12:26:49.415664
2161 12:26:49.964456 00580000 ################################################################
2162 12:26:49.964610
2163 12:26:50.072540 00600000 ############# done.
2164 12:26:50.072737
2165 12:26:50.075879 Sending tftp read request... done.
2166 12:26:50.075994
2167 12:26:50.079221 Waiting for the transfer...
2168 12:26:50.079308
2169 12:26:50.079395 00000000 # done.
2170 12:26:50.079478
2171 12:26:50.089680 Command line loaded dynamically from TFTP file: 12217947/tftp-deploy-1sub8z5v/kernel/cmdline
2172 12:26:50.089769
2173 12:26:50.119335 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12217947/extract-nfsrootfs-8d9tbcco,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2174 12:26:50.119437
2175 12:26:50.122687 ec_init(0): CrosEC protocol v3 supported (256, 256)
2176 12:26:50.129400
2177 12:26:50.132091 Shutting down all USB controllers.
2178 12:26:50.132201
2179 12:26:50.132328 Removing current net device
2180 12:26:50.136427
2181 12:26:50.136513 Finalizing coreboot
2182 12:26:50.136600
2183 12:26:50.143435 Exiting depthcharge with code 4 at timestamp: 28475410
2184 12:26:50.143521
2185 12:26:50.143607
2186 12:26:50.143689 Starting kernel ...
2187 12:26:50.143787
2188 12:26:50.143884
2189 12:26:50.144554 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2190 12:26:50.144690 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2191 12:26:50.144800 Setting prompt string to ['Linux version [0-9]']
2192 12:26:50.144883 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2193 12:26:50.144967 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2195 12:31:11.144934 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2197 12:31:11.145146 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2199 12:31:11.145320 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2202 12:31:11.145698 end: 2 depthcharge-action (duration 00:05:00) [common]
2204 12:31:11.145934 Cleaning after the job
2205 12:31:11.146029 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217947/tftp-deploy-1sub8z5v/ramdisk
2206 12:31:11.147059 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217947/tftp-deploy-1sub8z5v/kernel
2207 12:31:11.148838 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217947/tftp-deploy-1sub8z5v/nfsrootfs
2208 12:31:11.266934 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217947/tftp-deploy-1sub8z5v/modules
2209 12:31:11.267750 start: 4.1 power-off (timeout 00:00:30) [common]
2210 12:31:11.267922 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2211 12:31:11.349487 >> Command sent successfully.
2212 12:31:11.351955 Returned 0 in 0 seconds
2213 12:31:11.452378 end: 4.1 power-off (duration 00:00:00) [common]
2215 12:31:11.452841 start: 4.2 read-feedback (timeout 00:10:00) [common]
2216 12:31:11.453170 Listened to connection for namespace 'common' for up to 1s
2218 12:31:11.453590 Listened to connection for namespace 'common' for up to 1s
2219 12:31:12.454061 Finalising connection for namespace 'common'
2220 12:31:12.454246 Disconnecting from shell: Finalise
2221 12:31:12.454328
2222 12:31:12.554645 end: 4.2 read-feedback (duration 00:00:01) [common]
2223 12:31:12.554820 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12217947
2224 12:31:13.102250 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12217947
2225 12:31:13.102461 JobError: Your job cannot terminate cleanly.