Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
1 12:24:05.390624 lava-dispatcher, installed at version: 2023.10
2 12:24:05.390874 start: 0 validate
3 12:24:05.391024 Start time: 2023-12-08 12:24:05.391016+00:00 (UTC)
4 12:24:05.391154 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:24:05.391292 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 12:24:05.653920 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:24:05.654715 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:24:05.924025 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:24:05.924215 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:24:06.191729 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:24:06.192460 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-158-g856c181dce342%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:24:06.463039 validate duration: 1.07
14 12:24:06.464381 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:24:06.464973 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:24:06.465639 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:24:06.466457 Not decompressing ramdisk as can be used compressed.
18 12:24:06.466982 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 12:24:06.467365 saving as /var/lib/lava/dispatcher/tmp/12217892/tftp-deploy-7tg1dx_2/ramdisk/initrd.cpio.gz
20 12:24:06.467753 total size: 5671549 (5 MB)
21 12:24:06.474504 progress 0 % (0 MB)
22 12:24:06.482590 progress 5 % (0 MB)
23 12:24:06.488537 progress 10 % (0 MB)
24 12:24:06.492511 progress 15 % (0 MB)
25 12:24:06.496214 progress 20 % (1 MB)
26 12:24:06.499492 progress 25 % (1 MB)
27 12:24:06.502066 progress 30 % (1 MB)
28 12:24:06.504745 progress 35 % (1 MB)
29 12:24:06.507213 progress 40 % (2 MB)
30 12:24:06.509420 progress 45 % (2 MB)
31 12:24:06.511592 progress 50 % (2 MB)
32 12:24:06.513769 progress 55 % (3 MB)
33 12:24:06.515492 progress 60 % (3 MB)
34 12:24:06.517442 progress 65 % (3 MB)
35 12:24:06.519306 progress 70 % (3 MB)
36 12:24:06.520870 progress 75 % (4 MB)
37 12:24:06.522634 progress 80 % (4 MB)
38 12:24:06.524325 progress 85 % (4 MB)
39 12:24:06.525742 progress 90 % (4 MB)
40 12:24:06.527326 progress 95 % (5 MB)
41 12:24:06.528944 progress 100 % (5 MB)
42 12:24:06.529054 5 MB downloaded in 0.06 s (88.20 MB/s)
43 12:24:06.529203 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:24:06.529434 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:24:06.529517 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:24:06.529598 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:24:06.529735 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:24:06.529802 saving as /var/lib/lava/dispatcher/tmp/12217892/tftp-deploy-7tg1dx_2/kernel/bzImage
50 12:24:06.529864 total size: 11571200 (11 MB)
51 12:24:06.529924 No compression specified
52 12:24:06.530964 progress 0 % (0 MB)
53 12:24:06.534015 progress 5 % (0 MB)
54 12:24:06.537178 progress 10 % (1 MB)
55 12:24:06.540234 progress 15 % (1 MB)
56 12:24:06.543311 progress 20 % (2 MB)
57 12:24:06.546644 progress 25 % (2 MB)
58 12:24:06.549639 progress 30 % (3 MB)
59 12:24:06.552777 progress 35 % (3 MB)
60 12:24:06.555943 progress 40 % (4 MB)
61 12:24:06.558912 progress 45 % (4 MB)
62 12:24:06.562085 progress 50 % (5 MB)
63 12:24:06.565271 progress 55 % (6 MB)
64 12:24:06.568254 progress 60 % (6 MB)
65 12:24:06.571319 progress 65 % (7 MB)
66 12:24:06.574386 progress 70 % (7 MB)
67 12:24:06.577277 progress 75 % (8 MB)
68 12:24:06.580367 progress 80 % (8 MB)
69 12:24:06.583408 progress 85 % (9 MB)
70 12:24:06.586377 progress 90 % (9 MB)
71 12:24:06.589450 progress 95 % (10 MB)
72 12:24:06.592585 progress 100 % (11 MB)
73 12:24:06.592705 11 MB downloaded in 0.06 s (175.61 MB/s)
74 12:24:06.592851 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:24:06.593082 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:24:06.593165 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:24:06.593249 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:24:06.593386 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 12:24:06.593452 saving as /var/lib/lava/dispatcher/tmp/12217892/tftp-deploy-7tg1dx_2/nfsrootfs/full.rootfs.tar
81 12:24:06.593512 total size: 126031368 (120 MB)
82 12:24:06.593572 Using unxz to decompress xz
83 12:24:06.599515 progress 0 % (0 MB)
84 12:24:07.097220 progress 5 % (6 MB)
85 12:24:07.600753 progress 10 % (12 MB)
86 12:24:08.118504 progress 15 % (18 MB)
87 12:24:08.644086 progress 20 % (24 MB)
88 12:24:09.007487 progress 25 % (30 MB)
89 12:24:09.365034 progress 30 % (36 MB)
90 12:24:09.652260 progress 35 % (42 MB)
91 12:24:09.840203 progress 40 % (48 MB)
92 12:24:10.210534 progress 45 % (54 MB)
93 12:24:10.596236 progress 50 % (60 MB)
94 12:24:10.943078 progress 55 % (66 MB)
95 12:24:11.303155 progress 60 % (72 MB)
96 12:24:11.648749 progress 65 % (78 MB)
97 12:24:12.037297 progress 70 % (84 MB)
98 12:24:12.454745 progress 75 % (90 MB)
99 12:24:12.869871 progress 80 % (96 MB)
100 12:24:12.968481 progress 85 % (102 MB)
101 12:24:13.126390 progress 90 % (108 MB)
102 12:24:13.462816 progress 95 % (114 MB)
103 12:24:13.835138 progress 100 % (120 MB)
104 12:24:13.840034 120 MB downloaded in 7.25 s (16.59 MB/s)
105 12:24:13.840321 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:24:13.840574 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:24:13.840661 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:24:13.840746 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:24:13.840906 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-158-g856c181dce342/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:24:13.841004 saving as /var/lib/lava/dispatcher/tmp/12217892/tftp-deploy-7tg1dx_2/modules/modules.tar
112 12:24:13.841105 total size: 483904 (0 MB)
113 12:24:13.841199 Using unxz to decompress xz
114 12:24:13.845639 progress 6 % (0 MB)
115 12:24:13.846099 progress 13 % (0 MB)
116 12:24:13.846377 progress 20 % (0 MB)
117 12:24:13.847926 progress 27 % (0 MB)
118 12:24:13.850015 progress 33 % (0 MB)
119 12:24:13.851900 progress 40 % (0 MB)
120 12:24:13.853865 progress 47 % (0 MB)
121 12:24:13.855783 progress 54 % (0 MB)
122 12:24:13.857762 progress 60 % (0 MB)
123 12:24:13.859791 progress 67 % (0 MB)
124 12:24:13.861766 progress 74 % (0 MB)
125 12:24:13.863830 progress 81 % (0 MB)
126 12:24:13.865714 progress 88 % (0 MB)
127 12:24:13.867647 progress 94 % (0 MB)
128 12:24:13.870212 progress 100 % (0 MB)
129 12:24:13.876664 0 MB downloaded in 0.04 s (12.98 MB/s)
130 12:24:13.876910 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:24:13.877164 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:24:13.877256 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 12:24:13.877352 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 12:24:16.994302 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12217892/extract-nfsrootfs-sp22lct4
136 12:24:16.994500 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 12:24:16.994599 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
138 12:24:16.994775 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0
139 12:24:16.994914 makedir: /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin
140 12:24:16.995021 makedir: /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/tests
141 12:24:16.995154 makedir: /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/results
142 12:24:16.995258 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-add-keys
143 12:24:16.995405 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-add-sources
144 12:24:16.995540 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-background-process-start
145 12:24:16.995672 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-background-process-stop
146 12:24:16.995803 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-common-functions
147 12:24:16.995932 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-echo-ipv4
148 12:24:16.996174 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-install-packages
149 12:24:16.996308 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-installed-packages
150 12:24:16.996439 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-os-build
151 12:24:16.996568 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-probe-channel
152 12:24:16.996699 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-probe-ip
153 12:24:16.996833 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-target-ip
154 12:24:16.996967 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-target-mac
155 12:24:16.997096 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-target-storage
156 12:24:16.997225 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-test-case
157 12:24:16.997354 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-test-event
158 12:24:16.997480 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-test-feedback
159 12:24:16.997611 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-test-raise
160 12:24:16.997740 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-test-reference
161 12:24:16.997870 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-test-runner
162 12:24:16.997996 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-test-set
163 12:24:16.998122 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-test-shell
164 12:24:16.998275 Updating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-install-packages (oe)
165 12:24:16.998445 Updating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/bin/lava-installed-packages (oe)
166 12:24:16.998587 Creating /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/environment
167 12:24:16.998698 LAVA metadata
168 12:24:16.998769 - LAVA_JOB_ID=12217892
169 12:24:16.998831 - LAVA_DISPATCHER_IP=192.168.201.1
170 12:24:16.998934 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
171 12:24:16.999000 skipped lava-vland-overlay
172 12:24:16.999073 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 12:24:16.999151 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
174 12:24:16.999211 skipped lava-multinode-overlay
175 12:24:16.999282 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 12:24:16.999361 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
177 12:24:16.999432 Loading test definitions
178 12:24:16.999522 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
179 12:24:16.999594 Using /lava-12217892 at stage 0
180 12:24:16.999694 Fetching tests from https://github.com/kernelci/test-definitions
181 12:24:16.999772 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/0/tests/0_ltp-timers'
182 12:24:25.459718 Running '/usr/bin/git checkout kernelci.org
183 12:24:25.629534 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
184 12:24:25.630530 uuid=12217892_1.5.2.3.1 testdef=None
185 12:24:25.630755 end: 1.5.2.3.1 git-repo-action (duration 00:00:09) [common]
187 12:24:25.631153 start: 1.5.2.3.2 test-overlay (timeout 00:09:41) [common]
188 12:24:25.632298 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 12:24:25.632688 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:41) [common]
191 12:24:25.641477 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 12:24:25.641747 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:41) [common]
194 12:24:25.647231 runner path: /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/0/tests/0_ltp-timers test_uuid 12217892_1.5.2.3.1
195 12:24:25.647355 GRP_TEST='TMR'
196 12:24:25.647457 SKIPFILE='skipfile-lkft.yaml'
197 12:24:25.647551 SKIP_INSTALL='true'
198 12:24:25.647639 TST_CMDFILES=''
199 12:24:25.647839 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
201 12:24:25.648153 Creating lava-test-runner.conf files
202 12:24:25.648226 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12217892/lava-overlay-2kqfrgd0/lava-12217892/0 for stage 0
203 12:24:25.648333 - 0_ltp-timers
204 12:24:25.648474 end: 1.5.2.3 test-definition (duration 00:00:09) [common]
205 12:24:25.648601 start: 1.5.2.4 compress-overlay (timeout 00:09:41) [common]
206 12:24:33.479318 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
207 12:24:33.479477 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:33) [common]
208 12:24:33.479571 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 12:24:33.479672 end: 1.5.2 lava-overlay (duration 00:00:16) [common]
210 12:24:33.479765 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
211 12:24:33.638771 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 12:24:33.639177 start: 1.5.4 extract-modules (timeout 00:09:33) [common]
213 12:24:33.639338 extracting modules file /var/lib/lava/dispatcher/tmp/12217892/tftp-deploy-7tg1dx_2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217892/extract-nfsrootfs-sp22lct4
214 12:24:33.663546 extracting modules file /var/lib/lava/dispatcher/tmp/12217892/tftp-deploy-7tg1dx_2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12217892/extract-overlay-ramdisk-gcivurgm/ramdisk
215 12:24:33.686348 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 12:24:33.686510 start: 1.5.5 apply-overlay-tftp (timeout 00:09:33) [common]
217 12:24:33.686608 [common] Applying overlay to NFS
218 12:24:33.686677 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12217892/compress-overlay-1viguxc5/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12217892/extract-nfsrootfs-sp22lct4
219 12:24:34.643390 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
220 12:24:34.643560 start: 1.5.6 configure-preseed-file (timeout 00:09:32) [common]
221 12:24:34.643660 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 12:24:34.643746 start: 1.5.7 compress-ramdisk (timeout 00:09:32) [common]
223 12:24:34.643831 Building ramdisk /var/lib/lava/dispatcher/tmp/12217892/extract-overlay-ramdisk-gcivurgm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12217892/extract-overlay-ramdisk-gcivurgm/ramdisk
224 12:24:34.727391 >> 31372 blocks
225 12:24:35.352413 rename /var/lib/lava/dispatcher/tmp/12217892/extract-overlay-ramdisk-gcivurgm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12217892/tftp-deploy-7tg1dx_2/ramdisk/ramdisk.cpio.gz
226 12:24:35.352891 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 12:24:35.353050 start: 1.5.8 prepare-kernel (timeout 00:09:31) [common]
228 12:24:35.353160 start: 1.5.8.1 prepare-fit (timeout 00:09:31) [common]
229 12:24:35.353253 No mkimage arch provided, not using FIT.
230 12:24:35.353343 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 12:24:35.353497 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 12:24:35.353599 end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
233 12:24:35.353684 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:31) [common]
234 12:24:35.353765 No LXC device requested
235 12:24:35.353844 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 12:24:35.353931 start: 1.7 deploy-device-env (timeout 00:09:31) [common]
237 12:24:35.354014 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 12:24:35.354089 Checking files for TFTP limit of 4294967296 bytes.
239 12:24:35.354490 end: 1 tftp-deploy (duration 00:00:29) [common]
240 12:24:35.354596 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 12:24:35.354680 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 12:24:35.354802 substitutions:
243 12:24:35.354868 - {DTB}: None
244 12:24:35.354927 - {INITRD}: 12217892/tftp-deploy-7tg1dx_2/ramdisk/ramdisk.cpio.gz
245 12:24:35.354984 - {KERNEL}: 12217892/tftp-deploy-7tg1dx_2/kernel/bzImage
246 12:24:35.355039 - {LAVA_MAC}: None
247 12:24:35.355093 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12217892/extract-nfsrootfs-sp22lct4
248 12:24:35.355149 - {NFS_SERVER_IP}: 192.168.201.1
249 12:24:35.355202 - {PRESEED_CONFIG}: None
250 12:24:35.355254 - {PRESEED_LOCAL}: None
251 12:24:35.355307 - {RAMDISK}: 12217892/tftp-deploy-7tg1dx_2/ramdisk/ramdisk.cpio.gz
252 12:24:35.355360 - {ROOT_PART}: None
253 12:24:35.355428 - {ROOT}: None
254 12:24:35.355493 - {SERVER_IP}: 192.168.201.1
255 12:24:35.355546 - {TEE}: None
256 12:24:35.355598 Parsed boot commands:
257 12:24:35.355650 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 12:24:35.355824 Parsed boot commands: tftpboot 192.168.201.1 12217892/tftp-deploy-7tg1dx_2/kernel/bzImage 12217892/tftp-deploy-7tg1dx_2/kernel/cmdline 12217892/tftp-deploy-7tg1dx_2/ramdisk/ramdisk.cpio.gz
259 12:24:35.355909 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 12:24:35.355988 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 12:24:35.356124 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 12:24:35.356215 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 12:24:35.356289 Not connected, no need to disconnect.
264 12:24:35.356362 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 12:24:35.356441 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 12:24:35.356506 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
267 12:24:35.360814 Setting prompt string to ['lava-test: # ']
268 12:24:35.361321 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 12:24:35.361551 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 12:24:35.361698 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 12:24:35.361809 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 12:24:35.362048 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
273 12:24:40.499343 >> Command sent successfully.
274 12:24:40.502278 Returned 0 in 5 seconds
275 12:24:40.602678 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 12:24:40.603037 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 12:24:40.603163 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 12:24:40.603302 Setting prompt string to 'Starting depthcharge on Helios...'
280 12:24:40.603371 Changing prompt to 'Starting depthcharge on Helios...'
281 12:24:40.603442 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 12:24:40.603709 [Enter `^Ec?' for help]
283 12:24:41.228828
284 12:24:41.229055
285 12:24:41.239262 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 12:24:41.242351 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 12:24:41.249290 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 12:24:41.252356 CPU: AES supported, TXT NOT supported, VT supported
289 12:24:41.258913 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 12:24:41.262627 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 12:24:41.269318 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 12:24:41.272467 VBOOT: Loading verstage.
293 12:24:41.275548 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 12:24:41.282531 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 12:24:41.285568 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 12:24:41.288944 CBFS @ c08000 size 3f8000
297 12:24:41.295597 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 12:24:41.298983 CBFS: Locating 'fallback/verstage'
299 12:24:41.302366 CBFS: Found @ offset 10fb80 size 1072c
300 12:24:41.302448
301 12:24:41.305681
302 12:24:41.315519 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 12:24:41.329862 Probing TPM: . done!
304 12:24:41.333206 TPM ready after 0 ms
305 12:24:41.336625 Connected to device vid:did:rid of 1ae0:0028:00
306 12:24:41.346435 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
307 12:24:41.350219 Initialized TPM device CR50 revision 0
308 12:24:41.397061 tlcl_send_startup: Startup return code is 0
309 12:24:41.397170 TPM: setup succeeded
310 12:24:41.409986 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 12:24:41.413878 Chrome EC: UHEPI supported
312 12:24:41.417154 Phase 1
313 12:24:41.420240 FMAP: area GBB found @ c05000 (12288 bytes)
314 12:24:41.426980 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 12:24:41.427060 Phase 2
316 12:24:41.430054 Phase 3
317 12:24:41.433552 FMAP: area GBB found @ c05000 (12288 bytes)
318 12:24:41.440142 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 12:24:41.446909 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 12:24:41.450167 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
321 12:24:41.456851 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 12:24:41.472400 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 12:24:41.475566 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
324 12:24:41.482397 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 12:24:41.486724 Phase 4
326 12:24:41.489816 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
327 12:24:41.496564 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 12:24:41.675903 VB2:vb2_rsa_verify_digest() Digest check failed!
329 12:24:41.682738 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 12:24:41.682836 Saving nvdata
331 12:24:41.685741 Reboot requested (10020007)
332 12:24:41.689428 board_reset() called!
333 12:24:41.689511 full_reset() called!
334 12:24:46.195695
335 12:24:46.195848
336 12:24:46.205850 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 12:24:46.209490 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 12:24:46.216040 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 12:24:46.219117 CPU: AES supported, TXT NOT supported, VT supported
340 12:24:46.225756 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 12:24:46.228849 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 12:24:46.235670 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 12:24:46.239306 VBOOT: Loading verstage.
344 12:24:46.242472 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 12:24:46.249134 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 12:24:46.252225 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 12:24:46.255325 CBFS @ c08000 size 3f8000
348 12:24:46.262164 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 12:24:46.265247 CBFS: Locating 'fallback/verstage'
350 12:24:46.268940 CBFS: Found @ offset 10fb80 size 1072c
351 12:24:46.272633
352 12:24:46.272741
353 12:24:46.282367 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 12:24:46.296715 Probing TPM: . done!
355 12:24:46.300254 TPM ready after 0 ms
356 12:24:46.303782 Connected to device vid:did:rid of 1ae0:0028:00
357 12:24:46.313824 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
358 12:24:46.317091 Initialized TPM device CR50 revision 0
359 12:24:46.364219 tlcl_send_startup: Startup return code is 0
360 12:24:46.364361 TPM: setup succeeded
361 12:24:46.377044 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 12:24:46.380797 Chrome EC: UHEPI supported
363 12:24:46.383853 Phase 1
364 12:24:46.387442 FMAP: area GBB found @ c05000 (12288 bytes)
365 12:24:46.393970 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 12:24:46.400695 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 12:24:46.403987 Recovery requested (1009000e)
368 12:24:46.409667 Saving nvdata
369 12:24:46.415816 tlcl_extend: response is 0
370 12:24:46.424873 tlcl_extend: response is 0
371 12:24:46.431656 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 12:24:46.435286 CBFS @ c08000 size 3f8000
373 12:24:46.441486 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 12:24:46.445068 CBFS: Locating 'fallback/romstage'
375 12:24:46.448036 CBFS: Found @ offset 80 size 145fc
376 12:24:46.451674 Accumulated console time in verstage 98 ms
377 12:24:46.451791
378 12:24:46.451857
379 12:24:46.464909 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 12:24:46.471697 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 12:24:46.474731 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 12:24:46.477812 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 12:24:46.484633 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 12:24:46.487730 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 12:24:46.491421 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 12:24:46.494588 TCO_STS: 0000 0000
387 12:24:46.497649 GEN_PMCON: e0015238 00000200
388 12:24:46.501227 GBLRST_CAUSE: 00000000 00000000
389 12:24:46.501331 prev_sleep_state 5
390 12:24:46.504624 Boot Count incremented to 74025
391 12:24:46.511540 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 12:24:46.514823 CBFS @ c08000 size 3f8000
393 12:24:46.521146 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 12:24:46.521231 CBFS: Locating 'fspm.bin'
395 12:24:46.527687 CBFS: Found @ offset 5ffc0 size 71000
396 12:24:46.531143 Chrome EC: UHEPI supported
397 12:24:46.537942 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 12:24:46.541470 Probing TPM: done!
399 12:24:46.548096 Connected to device vid:did:rid of 1ae0:0028:00
400 12:24:46.557790 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
401 12:24:46.564164 Initialized TPM device CR50 revision 0
402 12:24:46.573153 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 12:24:46.579784 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 12:24:46.582947 MRC cache found, size 1948
405 12:24:46.586071 bootmode is set to: 2
406 12:24:46.589751 PRMRR disabled by config.
407 12:24:46.589835 SPD INDEX = 1
408 12:24:46.596518 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 12:24:46.599567 CBFS @ c08000 size 3f8000
410 12:24:46.606477 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 12:24:46.606561 CBFS: Locating 'spd.bin'
412 12:24:46.609536 CBFS: Found @ offset 5fb80 size 400
413 12:24:46.613072 SPD: module type is LPDDR3
414 12:24:46.616281 SPD: module part is
415 12:24:46.622545 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 12:24:46.626376 SPD: device width 4 bits, bus width 8 bits
417 12:24:46.629731 SPD: module size is 4096 MB (per channel)
418 12:24:46.632655 memory slot: 0 configuration done.
419 12:24:46.636228 memory slot: 2 configuration done.
420 12:24:46.687865 CBMEM:
421 12:24:46.690998 IMD: root @ 99fff000 254 entries.
422 12:24:46.694679 IMD: root @ 99ffec00 62 entries.
423 12:24:46.697949 External stage cache:
424 12:24:46.701128 IMD: root @ 9abff000 254 entries.
425 12:24:46.704205 IMD: root @ 9abfec00 62 entries.
426 12:24:46.707768 Chrome EC: clear events_b mask to 0x0000000020004000
427 12:24:46.724101 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 12:24:46.737069 tlcl_write: response is 0
429 12:24:46.746197 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 12:24:46.752493 MRC: TPM MRC hash updated successfully.
431 12:24:46.752589 2 DIMMs found
432 12:24:46.755938 SMM Memory Map
433 12:24:46.759321 SMRAM : 0x9a000000 0x1000000
434 12:24:46.762819 Subregion 0: 0x9a000000 0xa00000
435 12:24:46.765747 Subregion 1: 0x9aa00000 0x200000
436 12:24:46.769444 Subregion 2: 0x9ac00000 0x400000
437 12:24:46.772596 top_of_ram = 0x9a000000
438 12:24:46.776080 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 12:24:46.782265 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 12:24:46.785898 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 12:24:46.792222 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 12:24:46.795857 CBFS @ c08000 size 3f8000
443 12:24:46.798954 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 12:24:46.802696 CBFS: Locating 'fallback/postcar'
445 12:24:46.808913 CBFS: Found @ offset 107000 size 4b44
446 12:24:46.815665 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 12:24:46.825413 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 12:24:46.828395 Processing 180 relocs. Offset value of 0x97c0c000
449 12:24:46.836800 Accumulated console time in romstage 286 ms
450 12:24:46.836884
451 12:24:46.836949
452 12:24:46.847193 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 12:24:46.853514 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 12:24:46.857175 CBFS @ c08000 size 3f8000
455 12:24:46.860000 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 12:24:46.866965 CBFS: Locating 'fallback/ramstage'
457 12:24:46.869885 CBFS: Found @ offset 43380 size 1b9e8
458 12:24:46.876696 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 12:24:46.908692 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 12:24:46.911745 Processing 3976 relocs. Offset value of 0x98db0000
461 12:24:46.918500 Accumulated console time in postcar 52 ms
462 12:24:46.918584
463 12:24:46.918649
464 12:24:46.928549 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 12:24:46.935636 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 12:24:46.938804 WARNING: RO_VPD is uninitialized or empty.
467 12:24:46.941907 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 12:24:46.948339 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 12:24:46.948426 Normal boot.
470 12:24:46.955279 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 12:24:46.958658 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 12:24:46.961635 CBFS @ c08000 size 3f8000
473 12:24:46.968586 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 12:24:46.972125 CBFS: Locating 'cpu_microcode_blob.bin'
475 12:24:46.975115 CBFS: Found @ offset 14700 size 2ec00
476 12:24:46.978596 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 12:24:46.982070 Skip microcode update
478 12:24:46.985422 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 12:24:46.988635 CBFS @ c08000 size 3f8000
480 12:24:46.995198 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 12:24:46.998393 CBFS: Locating 'fsps.bin'
482 12:24:47.001526 CBFS: Found @ offset d1fc0 size 35000
483 12:24:47.026844 Detected 4 core, 8 thread CPU.
484 12:24:47.030566 Setting up SMI for CPU
485 12:24:47.033661 IED base = 0x9ac00000
486 12:24:47.033745 IED size = 0x00400000
487 12:24:47.036747 Will perform SMM setup.
488 12:24:47.043696 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 12:24:47.049818 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 12:24:47.056543 Processing 16 relocs. Offset value of 0x00030000
491 12:24:47.056627 Attempting to start 7 APs
492 12:24:47.063003 Waiting for 10ms after sending INIT.
493 12:24:47.076791 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
494 12:24:47.076876 done.
495 12:24:47.080278 AP: slot 4 apic_id 2.
496 12:24:47.083300 AP: slot 1 apic_id 3.
497 12:24:47.083383 AP: slot 7 apic_id 7.
498 12:24:47.086752 AP: slot 2 apic_id 6.
499 12:24:47.089855 Waiting for 2nd SIPI to complete...done.
500 12:24:47.093493 AP: slot 5 apic_id 4.
501 12:24:47.096969 AP: slot 6 apic_id 5.
502 12:24:47.103540 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 12:24:47.109717 Processing 13 relocs. Offset value of 0x00038000
504 12:24:47.113574 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 12:24:47.119738 Installing SMM handler to 0x9a000000
506 12:24:47.126702 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 12:24:47.129793 Processing 658 relocs. Offset value of 0x9a010000
508 12:24:47.139780 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 12:24:47.143492 Processing 13 relocs. Offset value of 0x9a008000
510 12:24:47.149819 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 12:24:47.156483 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 12:24:47.162804 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 12:24:47.166390 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 12:24:47.172764 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 12:24:47.179910 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 12:24:47.182868 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 12:24:47.189280 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 12:24:47.192889 Clearing SMI status registers
519 12:24:47.196382 SMI_STS: PM1
520 12:24:47.196467 PM1_STS: PWRBTN
521 12:24:47.199941 TCO_STS: SECOND_TO
522 12:24:47.203023 New SMBASE 0x9a000000
523 12:24:47.206289 In relocation handler: CPU 0
524 12:24:47.209758 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 12:24:47.212819 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 12:24:47.216463 Relocation complete.
527 12:24:47.219633 New SMBASE 0x99fff400
528 12:24:47.222679 In relocation handler: CPU 3
529 12:24:47.226387 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
530 12:24:47.229495 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 12:24:47.232647 Relocation complete.
532 12:24:47.236437 New SMBASE 0x99fffc00
533 12:24:47.236522 In relocation handler: CPU 1
534 12:24:47.242625 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
535 12:24:47.246388 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 12:24:47.249521 Relocation complete.
537 12:24:47.252571 New SMBASE 0x99fff000
538 12:24:47.252654 In relocation handler: CPU 4
539 12:24:47.259511 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
540 12:24:47.262554 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 12:24:47.266018 Relocation complete.
542 12:24:47.266108 New SMBASE 0x99ffe400
543 12:24:47.269320 In relocation handler: CPU 7
544 12:24:47.276008 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
545 12:24:47.279108 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 12:24:47.282535 Relocation complete.
547 12:24:47.282621 New SMBASE 0x99ffec00
548 12:24:47.286133 In relocation handler: CPU 5
549 12:24:47.292477 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
550 12:24:47.295668 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 12:24:47.299144 Relocation complete.
552 12:24:47.299228 New SMBASE 0x99ffe800
553 12:24:47.302693 In relocation handler: CPU 6
554 12:24:47.305613 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
555 12:24:47.312246 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 12:24:47.315708 Relocation complete.
557 12:24:47.315808 New SMBASE 0x99fff800
558 12:24:47.319394 In relocation handler: CPU 2
559 12:24:47.322427 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
560 12:24:47.329271 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 12:24:47.329356 Relocation complete.
562 12:24:47.332415 Initializing CPU #0
563 12:24:47.335470 CPU: vendor Intel device 806ec
564 12:24:47.339214 CPU: family 06, model 8e, stepping 0c
565 12:24:47.342247 Clearing out pending MCEs
566 12:24:47.345903 Setting up local APIC...
567 12:24:47.345985 apic_id: 0x00 done.
568 12:24:47.349076 Turbo is available but hidden
569 12:24:47.352223 Turbo is available and visible
570 12:24:47.355349 VMX status: enabled
571 12:24:47.358901 IA32_FEATURE_CONTROL status: locked
572 12:24:47.362502 Skip microcode update
573 12:24:47.362584 CPU #0 initialized
574 12:24:47.365331 Initializing CPU #3
575 12:24:47.368918 Initializing CPU #4
576 12:24:47.369001 Initializing CPU #1
577 12:24:47.372362 CPU: vendor Intel device 806ec
578 12:24:47.375293 CPU: family 06, model 8e, stepping 0c
579 12:24:47.378783 CPU: vendor Intel device 806ec
580 12:24:47.381897 CPU: family 06, model 8e, stepping 0c
581 12:24:47.385500 Clearing out pending MCEs
582 12:24:47.389165 Clearing out pending MCEs
583 12:24:47.391914 Setting up local APIC...
584 12:24:47.395205 CPU: vendor Intel device 806ec
585 12:24:47.398583 CPU: family 06, model 8e, stepping 0c
586 12:24:47.402214 Clearing out pending MCEs
587 12:24:47.402296 Initializing CPU #5
588 12:24:47.405342 Initializing CPU #6
589 12:24:47.408955 CPU: vendor Intel device 806ec
590 12:24:47.411913 CPU: family 06, model 8e, stepping 0c
591 12:24:47.415466 CPU: vendor Intel device 806ec
592 12:24:47.418772 CPU: family 06, model 8e, stepping 0c
593 12:24:47.421847 Clearing out pending MCEs
594 12:24:47.425489 Clearing out pending MCEs
595 12:24:47.425571 Setting up local APIC...
596 12:24:47.428508 Initializing CPU #7
597 12:24:47.432071 Initializing CPU #2
598 12:24:47.435400 CPU: vendor Intel device 806ec
599 12:24:47.438348 CPU: family 06, model 8e, stepping 0c
600 12:24:47.438432 apic_id: 0x02 done.
601 12:24:47.442104 Setting up local APIC...
602 12:24:47.445215 Clearing out pending MCEs
603 12:24:47.448301 CPU: vendor Intel device 806ec
604 12:24:47.451976 CPU: family 06, model 8e, stepping 0c
605 12:24:47.455087 Setting up local APIC...
606 12:24:47.455170 VMX status: enabled
607 12:24:47.458173 apic_id: 0x03 done.
608 12:24:47.461948 IA32_FEATURE_CONTROL status: locked
609 12:24:47.465180 VMX status: enabled
610 12:24:47.465327 Skip microcode update
611 12:24:47.468095 IA32_FEATURE_CONTROL status: locked
612 12:24:47.471627 CPU #4 initialized
613 12:24:47.475034 Skip microcode update
614 12:24:47.475116 Setting up local APIC...
615 12:24:47.478194 Setting up local APIC...
616 12:24:47.481744 CPU #1 initialized
617 12:24:47.481827 apic_id: 0x07 done.
618 12:24:47.485125 Clearing out pending MCEs
619 12:24:47.488423 apic_id: 0x04 done.
620 12:24:47.491477 apic_id: 0x05 done.
621 12:24:47.491589 VMX status: enabled
622 12:24:47.494905 VMX status: enabled
623 12:24:47.498123 IA32_FEATURE_CONTROL status: locked
624 12:24:47.501581 IA32_FEATURE_CONTROL status: locked
625 12:24:47.505029 Skip microcode update
626 12:24:47.505125 Skip microcode update
627 12:24:47.508404 CPU #5 initialized
628 12:24:47.508536 CPU #6 initialized
629 12:24:47.511401 apic_id: 0x01 done.
630 12:24:47.514986 Setting up local APIC...
631 12:24:47.517956 VMX status: enabled
632 12:24:47.518063 apic_id: 0x06 done.
633 12:24:47.521383 VMX status: enabled
634 12:24:47.521517 VMX status: enabled
635 12:24:47.524916 IA32_FEATURE_CONTROL status: locked
636 12:24:47.531351 IA32_FEATURE_CONTROL status: locked
637 12:24:47.531469 Skip microcode update
638 12:24:47.534441 IA32_FEATURE_CONTROL status: locked
639 12:24:47.538079 CPU #7 initialized
640 12:24:47.541080 Skip microcode update
641 12:24:47.541165 Skip microcode update
642 12:24:47.544847 CPU #2 initialized
643 12:24:47.544931 CPU #3 initialized
644 12:24:47.551133 bsp_do_flight_plan done after 457 msecs.
645 12:24:47.554821 CPU: frequency set to 4200 MHz
646 12:24:47.554905 Enabling SMIs.
647 12:24:47.557976 Locking SMM.
648 12:24:47.570991 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 12:24:47.574639 CBFS @ c08000 size 3f8000
650 12:24:47.581167 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 12:24:47.581252 CBFS: Locating 'vbt.bin'
652 12:24:47.584019 CBFS: Found @ offset 5f5c0 size 499
653 12:24:47.591342 Found a VBT of 4608 bytes after decompression
654 12:24:47.775425 Display FSP Version Info HOB
655 12:24:47.779007 Reference Code - CPU = 9.0.1e.30
656 12:24:47.782136 uCode Version = 0.0.0.ca
657 12:24:47.785126 TXT ACM version = ff.ff.ff.ffff
658 12:24:47.788878 Display FSP Version Info HOB
659 12:24:47.792012 Reference Code - ME = 9.0.1e.30
660 12:24:47.795565 MEBx version = 0.0.0.0
661 12:24:47.798415 ME Firmware Version = Consumer SKU
662 12:24:47.801917 Display FSP Version Info HOB
663 12:24:47.805525 Reference Code - CML PCH = 9.0.1e.30
664 12:24:47.808477 PCH-CRID Status = Disabled
665 12:24:47.811788 PCH-CRID Original Value = ff.ff.ff.ffff
666 12:24:47.815152 PCH-CRID New Value = ff.ff.ff.ffff
667 12:24:47.818559 OPROM - RST - RAID = ff.ff.ff.ffff
668 12:24:47.821694 ChipsetInit Base Version = ff.ff.ff.ffff
669 12:24:47.825359 ChipsetInit Oem Version = ff.ff.ff.ffff
670 12:24:47.828417 Display FSP Version Info HOB
671 12:24:47.835470 Reference Code - SA - System Agent = 9.0.1e.30
672 12:24:47.838591 Reference Code - MRC = 0.7.1.6c
673 12:24:47.838674 SA - PCIe Version = 9.0.1e.30
674 12:24:47.842080 SA-CRID Status = Disabled
675 12:24:47.844930 SA-CRID Original Value = 0.0.0.c
676 12:24:47.848355 SA-CRID New Value = 0.0.0.c
677 12:24:47.851927 OPROM - VBIOS = ff.ff.ff.ffff
678 12:24:47.854982 RTC Init
679 12:24:47.858430 Set power on after power failure.
680 12:24:47.858512 Disabling Deep S3
681 12:24:47.861708 Disabling Deep S3
682 12:24:47.861791 Disabling Deep S4
683 12:24:47.865114 Disabling Deep S4
684 12:24:47.865196 Disabling Deep S5
685 12:24:47.868303 Disabling Deep S5
686 12:24:47.875103 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
687 12:24:47.875179 Enumerating buses...
688 12:24:47.881372 Show all devs... Before device enumeration.
689 12:24:47.881455 Root Device: enabled 1
690 12:24:47.885089 CPU_CLUSTER: 0: enabled 1
691 12:24:47.888208 DOMAIN: 0000: enabled 1
692 12:24:47.891306 APIC: 00: enabled 1
693 12:24:47.891388 PCI: 00:00.0: enabled 1
694 12:24:47.895022 PCI: 00:02.0: enabled 1
695 12:24:47.898158 PCI: 00:04.0: enabled 0
696 12:24:47.901164 PCI: 00:05.0: enabled 0
697 12:24:47.901246 PCI: 00:12.0: enabled 1
698 12:24:47.904688 PCI: 00:12.5: enabled 0
699 12:24:47.907998 PCI: 00:12.6: enabled 0
700 12:24:47.908105 PCI: 00:14.0: enabled 1
701 12:24:47.911119 PCI: 00:14.1: enabled 0
702 12:24:47.914880 PCI: 00:14.3: enabled 1
703 12:24:47.917767 PCI: 00:14.5: enabled 0
704 12:24:47.917856 PCI: 00:15.0: enabled 1
705 12:24:47.921274 PCI: 00:15.1: enabled 1
706 12:24:47.924598 PCI: 00:15.2: enabled 0
707 12:24:47.927704 PCI: 00:15.3: enabled 0
708 12:24:47.927789 PCI: 00:16.0: enabled 1
709 12:24:47.931262 PCI: 00:16.1: enabled 0
710 12:24:47.934388 PCI: 00:16.2: enabled 0
711 12:24:47.937893 PCI: 00:16.3: enabled 0
712 12:24:47.937985 PCI: 00:16.4: enabled 0
713 12:24:47.941257 PCI: 00:16.5: enabled 0
714 12:24:47.944507 PCI: 00:17.0: enabled 1
715 12:24:47.944582 PCI: 00:19.0: enabled 1
716 12:24:47.947604 PCI: 00:19.1: enabled 0
717 12:24:47.951190 PCI: 00:19.2: enabled 0
718 12:24:47.954596 PCI: 00:1a.0: enabled 0
719 12:24:47.954672 PCI: 00:1c.0: enabled 0
720 12:24:47.957508 PCI: 00:1c.1: enabled 0
721 12:24:47.961119 PCI: 00:1c.2: enabled 0
722 12:24:47.964213 PCI: 00:1c.3: enabled 0
723 12:24:47.964369 PCI: 00:1c.4: enabled 0
724 12:24:47.967579 PCI: 00:1c.5: enabled 0
725 12:24:47.971149 PCI: 00:1c.6: enabled 0
726 12:24:47.974155 PCI: 00:1c.7: enabled 0
727 12:24:47.974230 PCI: 00:1d.0: enabled 1
728 12:24:47.977838 PCI: 00:1d.1: enabled 0
729 12:24:47.980863 PCI: 00:1d.2: enabled 0
730 12:24:47.980939 PCI: 00:1d.3: enabled 0
731 12:24:47.984507 PCI: 00:1d.4: enabled 0
732 12:24:47.987529 PCI: 00:1d.5: enabled 1
733 12:24:47.990646 PCI: 00:1e.0: enabled 1
734 12:24:47.990732 PCI: 00:1e.1: enabled 0
735 12:24:47.994471 PCI: 00:1e.2: enabled 1
736 12:24:47.997552 PCI: 00:1e.3: enabled 1
737 12:24:48.000734 PCI: 00:1f.0: enabled 1
738 12:24:48.000819 PCI: 00:1f.1: enabled 1
739 12:24:48.004384 PCI: 00:1f.2: enabled 1
740 12:24:48.007454 PCI: 00:1f.3: enabled 1
741 12:24:48.011066 PCI: 00:1f.4: enabled 1
742 12:24:48.011149 PCI: 00:1f.5: enabled 1
743 12:24:48.013853 PCI: 00:1f.6: enabled 0
744 12:24:48.017339 USB0 port 0: enabled 1
745 12:24:48.017440 I2C: 00:15: enabled 1
746 12:24:48.020455 I2C: 00:5d: enabled 1
747 12:24:48.024101 GENERIC: 0.0: enabled 1
748 12:24:48.024261 I2C: 00:1a: enabled 1
749 12:24:48.027117 I2C: 00:38: enabled 1
750 12:24:48.030532 I2C: 00:39: enabled 1
751 12:24:48.030616 I2C: 00:3a: enabled 1
752 12:24:48.033900 I2C: 00:3b: enabled 1
753 12:24:48.037085 PCI: 00:00.0: enabled 1
754 12:24:48.037168 SPI: 00: enabled 1
755 12:24:48.040506 SPI: 01: enabled 1
756 12:24:48.044023 PNP: 0c09.0: enabled 1
757 12:24:48.044154 USB2 port 0: enabled 1
758 12:24:48.047629 USB2 port 1: enabled 1
759 12:24:48.050845 USB2 port 2: enabled 0
760 12:24:48.053825 USB2 port 3: enabled 0
761 12:24:48.053906 USB2 port 5: enabled 0
762 12:24:48.057337 USB2 port 6: enabled 1
763 12:24:48.060425 USB2 port 9: enabled 1
764 12:24:48.060583 USB3 port 0: enabled 1
765 12:24:48.063886 USB3 port 1: enabled 1
766 12:24:48.066911 USB3 port 2: enabled 1
767 12:24:48.066997 USB3 port 3: enabled 1
768 12:24:48.070659 USB3 port 4: enabled 0
769 12:24:48.073746 APIC: 03: enabled 1
770 12:24:48.073836 APIC: 06: enabled 1
771 12:24:48.077148 APIC: 01: enabled 1
772 12:24:48.080606 APIC: 02: enabled 1
773 12:24:48.080683 APIC: 04: enabled 1
774 12:24:48.084044 APIC: 05: enabled 1
775 12:24:48.084173 APIC: 07: enabled 1
776 12:24:48.087080 Compare with tree...
777 12:24:48.090229 Root Device: enabled 1
778 12:24:48.093881 CPU_CLUSTER: 0: enabled 1
779 12:24:48.093953 APIC: 00: enabled 1
780 12:24:48.097048 APIC: 03: enabled 1
781 12:24:48.100269 APIC: 06: enabled 1
782 12:24:48.100389 APIC: 01: enabled 1
783 12:24:48.103828 APIC: 02: enabled 1
784 12:24:48.106965 APIC: 04: enabled 1
785 12:24:48.107061 APIC: 05: enabled 1
786 12:24:48.110034 APIC: 07: enabled 1
787 12:24:48.113707 DOMAIN: 0000: enabled 1
788 12:24:48.116712 PCI: 00:00.0: enabled 1
789 12:24:48.116804 PCI: 00:02.0: enabled 1
790 12:24:48.120307 PCI: 00:04.0: enabled 0
791 12:24:48.123685 PCI: 00:05.0: enabled 0
792 12:24:48.126774 PCI: 00:12.0: enabled 1
793 12:24:48.129977 PCI: 00:12.5: enabled 0
794 12:24:48.130051 PCI: 00:12.6: enabled 0
795 12:24:48.133613 PCI: 00:14.0: enabled 1
796 12:24:48.136778 USB0 port 0: enabled 1
797 12:24:48.140337 USB2 port 0: enabled 1
798 12:24:48.143280 USB2 port 1: enabled 1
799 12:24:48.143352 USB2 port 2: enabled 0
800 12:24:48.146665 USB2 port 3: enabled 0
801 12:24:48.149923 USB2 port 5: enabled 0
802 12:24:48.153039 USB2 port 6: enabled 1
803 12:24:48.156424 USB2 port 9: enabled 1
804 12:24:48.159787 USB3 port 0: enabled 1
805 12:24:48.159897 USB3 port 1: enabled 1
806 12:24:48.163154 USB3 port 2: enabled 1
807 12:24:48.166697 USB3 port 3: enabled 1
808 12:24:48.170207 USB3 port 4: enabled 0
809 12:24:48.173271 PCI: 00:14.1: enabled 0
810 12:24:48.173351 PCI: 00:14.3: enabled 1
811 12:24:48.176307 PCI: 00:14.5: enabled 0
812 12:24:48.179971 PCI: 00:15.0: enabled 1
813 12:24:48.183019 I2C: 00:15: enabled 1
814 12:24:48.186359 PCI: 00:15.1: enabled 1
815 12:24:48.186434 I2C: 00:5d: enabled 1
816 12:24:48.189729 GENERIC: 0.0: enabled 1
817 12:24:48.193184 PCI: 00:15.2: enabled 0
818 12:24:48.196256 PCI: 00:15.3: enabled 0
819 12:24:48.199844 PCI: 00:16.0: enabled 1
820 12:24:48.199991 PCI: 00:16.1: enabled 0
821 12:24:48.202870 PCI: 00:16.2: enabled 0
822 12:24:48.206514 PCI: 00:16.3: enabled 0
823 12:24:48.209558 PCI: 00:16.4: enabled 0
824 12:24:48.212616 PCI: 00:16.5: enabled 0
825 12:24:48.212706 PCI: 00:17.0: enabled 1
826 12:24:48.216297 PCI: 00:19.0: enabled 1
827 12:24:48.219455 I2C: 00:1a: enabled 1
828 12:24:48.222549 I2C: 00:38: enabled 1
829 12:24:48.222630 I2C: 00:39: enabled 1
830 12:24:48.226120 I2C: 00:3a: enabled 1
831 12:24:48.229380 I2C: 00:3b: enabled 1
832 12:24:48.232863 PCI: 00:19.1: enabled 0
833 12:24:48.236211 PCI: 00:19.2: enabled 0
834 12:24:48.236294 PCI: 00:1a.0: enabled 0
835 12:24:48.239236 PCI: 00:1c.0: enabled 0
836 12:24:48.242812 PCI: 00:1c.1: enabled 0
837 12:24:48.246046 PCI: 00:1c.2: enabled 0
838 12:24:48.246129 PCI: 00:1c.3: enabled 0
839 12:24:48.249671 PCI: 00:1c.4: enabled 0
840 12:24:48.252800 PCI: 00:1c.5: enabled 0
841 12:24:48.256251 PCI: 00:1c.6: enabled 0
842 12:24:48.259185 PCI: 00:1c.7: enabled 0
843 12:24:48.259268 PCI: 00:1d.0: enabled 1
844 12:24:48.262535 PCI: 00:1d.1: enabled 0
845 12:24:48.266205 PCI: 00:1d.2: enabled 0
846 12:24:48.269308 PCI: 00:1d.3: enabled 0
847 12:24:48.272672 PCI: 00:1d.4: enabled 0
848 12:24:48.272755 PCI: 00:1d.5: enabled 1
849 12:24:48.275590 PCI: 00:00.0: enabled 1
850 12:24:48.278949 PCI: 00:1e.0: enabled 1
851 12:24:48.282476 PCI: 00:1e.1: enabled 0
852 12:24:48.285556 PCI: 00:1e.2: enabled 1
853 12:24:48.285640 SPI: 00: enabled 1
854 12:24:48.289285 PCI: 00:1e.3: enabled 1
855 12:24:48.292290 SPI: 01: enabled 1
856 12:24:48.295336 PCI: 00:1f.0: enabled 1
857 12:24:48.295445 PNP: 0c09.0: enabled 1
858 12:24:48.298732 PCI: 00:1f.1: enabled 1
859 12:24:48.302014 PCI: 00:1f.2: enabled 1
860 12:24:48.305700 PCI: 00:1f.3: enabled 1
861 12:24:48.308786 PCI: 00:1f.4: enabled 1
862 12:24:48.308869 PCI: 00:1f.5: enabled 1
863 12:24:48.312361 PCI: 00:1f.6: enabled 0
864 12:24:48.315471 Root Device scanning...
865 12:24:48.318557 scan_static_bus for Root Device
866 12:24:48.322222 CPU_CLUSTER: 0 enabled
867 12:24:48.322303 DOMAIN: 0000 enabled
868 12:24:48.325300 DOMAIN: 0000 scanning...
869 12:24:48.329027 PCI: pci_scan_bus for bus 00
870 12:24:48.332172 PCI: 00:00.0 [8086/0000] ops
871 12:24:48.335163 PCI: 00:00.0 [8086/9b61] enabled
872 12:24:48.338537 PCI: 00:02.0 [8086/0000] bus ops
873 12:24:48.342227 PCI: 00:02.0 [8086/9b41] enabled
874 12:24:48.345209 PCI: 00:04.0 [8086/1903] disabled
875 12:24:48.348932 PCI: 00:08.0 [8086/1911] enabled
876 12:24:48.351986 PCI: 00:12.0 [8086/02f9] enabled
877 12:24:48.355162 PCI: 00:14.0 [8086/0000] bus ops
878 12:24:48.358787 PCI: 00:14.0 [8086/02ed] enabled
879 12:24:48.361766 PCI: 00:14.2 [8086/02ef] enabled
880 12:24:48.365001 PCI: 00:14.3 [8086/02f0] enabled
881 12:24:48.368547 PCI: 00:15.0 [8086/0000] bus ops
882 12:24:48.372098 PCI: 00:15.0 [8086/02e8] enabled
883 12:24:48.374982 PCI: 00:15.1 [8086/0000] bus ops
884 12:24:48.378481 PCI: 00:15.1 [8086/02e9] enabled
885 12:24:48.382019 PCI: 00:16.0 [8086/0000] ops
886 12:24:48.385474 PCI: 00:16.0 [8086/02e0] enabled
887 12:24:48.388346 PCI: 00:17.0 [8086/0000] ops
888 12:24:48.391765 PCI: 00:17.0 [8086/02d3] enabled
889 12:24:48.395069 PCI: 00:19.0 [8086/0000] bus ops
890 12:24:48.398560 PCI: 00:19.0 [8086/02c5] enabled
891 12:24:48.401715 PCI: 00:1d.0 [8086/0000] bus ops
892 12:24:48.405212 PCI: 00:1d.0 [8086/02b0] enabled
893 12:24:48.411551 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 12:24:48.411635 PCI: 00:1e.0 [8086/0000] ops
895 12:24:48.415069 PCI: 00:1e.0 [8086/02a8] enabled
896 12:24:48.418181 PCI: 00:1e.2 [8086/0000] bus ops
897 12:24:48.421735 PCI: 00:1e.2 [8086/02aa] enabled
898 12:24:48.424831 PCI: 00:1e.3 [8086/0000] bus ops
899 12:24:48.428482 PCI: 00:1e.3 [8086/02ab] enabled
900 12:24:48.431585 PCI: 00:1f.0 [8086/0000] bus ops
901 12:24:48.434592 PCI: 00:1f.0 [8086/0284] enabled
902 12:24:48.441511 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 12:24:48.448422 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 12:24:48.451469 PCI: 00:1f.3 [8086/0000] bus ops
905 12:24:48.454623 PCI: 00:1f.3 [8086/02c8] enabled
906 12:24:48.458205 PCI: 00:1f.4 [8086/0000] bus ops
907 12:24:48.461221 PCI: 00:1f.4 [8086/02a3] enabled
908 12:24:48.464899 PCI: 00:1f.5 [8086/0000] bus ops
909 12:24:48.468029 PCI: 00:1f.5 [8086/02a4] enabled
910 12:24:48.471658 PCI: Leftover static devices:
911 12:24:48.471742 PCI: 00:05.0
912 12:24:48.474613 PCI: 00:12.5
913 12:24:48.474696 PCI: 00:12.6
914 12:24:48.474761 PCI: 00:14.1
915 12:24:48.478312 PCI: 00:14.5
916 12:24:48.478395 PCI: 00:15.2
917 12:24:48.481327 PCI: 00:15.3
918 12:24:48.481410 PCI: 00:16.1
919 12:24:48.481476 PCI: 00:16.2
920 12:24:48.484833 PCI: 00:16.3
921 12:24:48.484959 PCI: 00:16.4
922 12:24:48.488386 PCI: 00:16.5
923 12:24:48.488489 PCI: 00:19.1
924 12:24:48.488613 PCI: 00:19.2
925 12:24:48.491139 PCI: 00:1a.0
926 12:24:48.491240 PCI: 00:1c.0
927 12:24:48.494846 PCI: 00:1c.1
928 12:24:48.494958 PCI: 00:1c.2
929 12:24:48.497650 PCI: 00:1c.3
930 12:24:48.497764 PCI: 00:1c.4
931 12:24:48.497863 PCI: 00:1c.5
932 12:24:48.501037 PCI: 00:1c.6
933 12:24:48.501149 PCI: 00:1c.7
934 12:24:48.504375 PCI: 00:1d.1
935 12:24:48.504485 PCI: 00:1d.2
936 12:24:48.504585 PCI: 00:1d.3
937 12:24:48.507865 PCI: 00:1d.4
938 12:24:48.507978 PCI: 00:1d.5
939 12:24:48.510865 PCI: 00:1e.1
940 12:24:48.510968 PCI: 00:1f.1
941 12:24:48.511062 PCI: 00:1f.2
942 12:24:48.514286 PCI: 00:1f.6
943 12:24:48.517780 PCI: Check your devicetree.cb.
944 12:24:48.521318 PCI: 00:02.0 scanning...
945 12:24:48.524257 scan_generic_bus for PCI: 00:02.0
946 12:24:48.527434 scan_generic_bus for PCI: 00:02.0 done
947 12:24:48.534279 scan_bus: scanning of bus PCI: 00:02.0 took 10192 usecs
948 12:24:48.534390 PCI: 00:14.0 scanning...
949 12:24:48.537356 scan_static_bus for PCI: 00:14.0
950 12:24:48.540926 USB0 port 0 enabled
951 12:24:48.544213 USB0 port 0 scanning...
952 12:24:48.547816 scan_static_bus for USB0 port 0
953 12:24:48.547921 USB2 port 0 enabled
954 12:24:48.550762 USB2 port 1 enabled
955 12:24:48.554268 USB2 port 2 disabled
956 12:24:48.554374 USB2 port 3 disabled
957 12:24:48.557144 USB2 port 5 disabled
958 12:24:48.560715 USB2 port 6 enabled
959 12:24:48.560821 USB2 port 9 enabled
960 12:24:48.564323 USB3 port 0 enabled
961 12:24:48.564426 USB3 port 1 enabled
962 12:24:48.567480 USB3 port 2 enabled
963 12:24:48.570824 USB3 port 3 enabled
964 12:24:48.570931 USB3 port 4 disabled
965 12:24:48.573917 USB2 port 0 scanning...
966 12:24:48.577486 scan_static_bus for USB2 port 0
967 12:24:48.580578 scan_static_bus for USB2 port 0 done
968 12:24:48.587432 scan_bus: scanning of bus USB2 port 0 took 9692 usecs
969 12:24:48.590464 USB2 port 1 scanning...
970 12:24:48.593917 scan_static_bus for USB2 port 1
971 12:24:48.597216 scan_static_bus for USB2 port 1 done
972 12:24:48.600739 scan_bus: scanning of bus USB2 port 1 took 9691 usecs
973 12:24:48.603721 USB2 port 6 scanning...
974 12:24:48.607326 scan_static_bus for USB2 port 6
975 12:24:48.610800 scan_static_bus for USB2 port 6 done
976 12:24:48.617329 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
977 12:24:48.620564 USB2 port 9 scanning...
978 12:24:48.624202 scan_static_bus for USB2 port 9
979 12:24:48.627127 scan_static_bus for USB2 port 9 done
980 12:24:48.630586 scan_bus: scanning of bus USB2 port 9 took 9704 usecs
981 12:24:48.633749 USB3 port 0 scanning...
982 12:24:48.636687 scan_static_bus for USB3 port 0
983 12:24:48.640495 scan_static_bus for USB3 port 0 done
984 12:24:48.646701 scan_bus: scanning of bus USB3 port 0 took 9703 usecs
985 12:24:48.650383 USB3 port 1 scanning...
986 12:24:48.653497 scan_static_bus for USB3 port 1
987 12:24:48.656577 scan_static_bus for USB3 port 1 done
988 12:24:48.660262 scan_bus: scanning of bus USB3 port 1 took 9704 usecs
989 12:24:48.663736 USB3 port 2 scanning...
990 12:24:48.666598 scan_static_bus for USB3 port 2
991 12:24:48.670122 scan_static_bus for USB3 port 2 done
992 12:24:48.676986 scan_bus: scanning of bus USB3 port 2 took 9696 usecs
993 12:24:48.680002 USB3 port 3 scanning...
994 12:24:48.683495 scan_static_bus for USB3 port 3
995 12:24:48.686547 scan_static_bus for USB3 port 3 done
996 12:24:48.693283 scan_bus: scanning of bus USB3 port 3 took 9696 usecs
997 12:24:48.697023 scan_static_bus for USB0 port 0 done
998 12:24:48.700192 scan_bus: scanning of bus USB0 port 0 took 155363 usecs
999 12:24:48.703245 scan_static_bus for PCI: 00:14.0 done
1000 12:24:48.710227 scan_bus: scanning of bus PCI: 00:14.0 took 172963 usecs
1001 12:24:48.713131 PCI: 00:15.0 scanning...
1002 12:24:48.716760 scan_generic_bus for PCI: 00:15.0
1003 12:24:48.719691 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 12:24:48.723227 scan_generic_bus for PCI: 00:15.0 done
1005 12:24:48.729687 scan_bus: scanning of bus PCI: 00:15.0 took 14300 usecs
1006 12:24:48.732883 PCI: 00:15.1 scanning...
1007 12:24:48.736212 scan_generic_bus for PCI: 00:15.1
1008 12:24:48.739802 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 12:24:48.746248 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 12:24:48.749436 scan_generic_bus for PCI: 00:15.1 done
1011 12:24:48.753135 scan_bus: scanning of bus PCI: 00:15.1 took 18611 usecs
1012 12:24:48.756336 PCI: 00:19.0 scanning...
1013 12:24:48.759389 scan_generic_bus for PCI: 00:19.0
1014 12:24:48.766263 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 12:24:48.769320 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 12:24:48.772816 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 12:24:48.776344 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 12:24:48.779384 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 12:24:48.786059 scan_generic_bus for PCI: 00:19.0 done
1020 12:24:48.789547 scan_bus: scanning of bus PCI: 00:19.0 took 30736 usecs
1021 12:24:48.792549 PCI: 00:1d.0 scanning...
1022 12:24:48.796122 do_pci_scan_bridge for PCI: 00:1d.0
1023 12:24:48.799321 PCI: pci_scan_bus for bus 01
1024 12:24:48.802404 PCI: 01:00.0 [1c5c/1327] enabled
1025 12:24:48.806277 Enabling Common Clock Configuration
1026 12:24:48.812297 L1 Sub-State supported from root port 29
1027 12:24:48.812406 L1 Sub-State Support = 0xf
1028 12:24:48.815764 CommonModeRestoreTime = 0x28
1029 12:24:48.822324 Power On Value = 0x16, Power On Scale = 0x0
1030 12:24:48.822406 ASPM: Enabled L1
1031 12:24:48.828949 scan_bus: scanning of bus PCI: 00:1d.0 took 32776 usecs
1032 12:24:48.832496 PCI: 00:1e.2 scanning...
1033 12:24:48.835487 scan_generic_bus for PCI: 00:1e.2
1034 12:24:48.838934 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 12:24:48.842191 scan_generic_bus for PCI: 00:1e.2 done
1036 12:24:48.848866 scan_bus: scanning of bus PCI: 00:1e.2 took 13992 usecs
1037 12:24:48.848977 PCI: 00:1e.3 scanning...
1038 12:24:48.855716 scan_generic_bus for PCI: 00:1e.3
1039 12:24:48.859224 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 12:24:48.862402 scan_generic_bus for PCI: 00:1e.3 done
1041 12:24:48.869196 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
1042 12:24:48.869282 PCI: 00:1f.0 scanning...
1043 12:24:48.872213 scan_static_bus for PCI: 00:1f.0
1044 12:24:48.875352 PNP: 0c09.0 enabled
1045 12:24:48.879101 scan_static_bus for PCI: 00:1f.0 done
1046 12:24:48.885352 scan_bus: scanning of bus PCI: 00:1f.0 took 12044 usecs
1047 12:24:48.888495 PCI: 00:1f.3 scanning...
1048 12:24:48.891910 scan_bus: scanning of bus PCI: 00:1f.3 took 2858 usecs
1049 12:24:48.895412 PCI: 00:1f.4 scanning...
1050 12:24:48.898480 scan_generic_bus for PCI: 00:1f.4
1051 12:24:48.902192 scan_generic_bus for PCI: 00:1f.4 done
1052 12:24:48.908404 scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs
1053 12:24:48.912184 PCI: 00:1f.5 scanning...
1054 12:24:48.915169 scan_generic_bus for PCI: 00:1f.5
1055 12:24:48.918760 scan_generic_bus for PCI: 00:1f.5 done
1056 12:24:48.925309 scan_bus: scanning of bus PCI: 00:1f.5 took 10183 usecs
1057 12:24:48.931797 scan_bus: scanning of bus DOMAIN: 0000 took 604909 usecs
1058 12:24:48.935420 scan_static_bus for Root Device done
1059 12:24:48.938466 scan_bus: scanning of bus Root Device took 624776 usecs
1060 12:24:48.941518 done
1061 12:24:48.945245 Chrome EC: UHEPI supported
1062 12:24:48.948231 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 12:24:48.954964 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 12:24:48.961330 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 12:24:48.967898 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 12:24:48.971319 SPI flash protection: WPSW=0 SRP0=0
1067 12:24:48.978131 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 12:24:48.981264 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1069 12:24:48.984922 found VGA at PCI: 00:02.0
1070 12:24:48.987942 Setting up VGA for PCI: 00:02.0
1071 12:24:48.994318 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 12:24:48.997932 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 12:24:49.001525 Allocating resources...
1074 12:24:49.004608 Reading resources...
1075 12:24:49.007687 Root Device read_resources bus 0 link: 0
1076 12:24:49.011421 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 12:24:49.017690 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 12:24:49.021343 DOMAIN: 0000 read_resources bus 0 link: 0
1079 12:24:49.027915 PCI: 00:14.0 read_resources bus 0 link: 0
1080 12:24:49.031584 USB0 port 0 read_resources bus 0 link: 0
1081 12:24:49.039927 USB0 port 0 read_resources bus 0 link: 0 done
1082 12:24:49.043086 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 12:24:49.050455 PCI: 00:15.0 read_resources bus 1 link: 0
1084 12:24:49.053254 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 12:24:49.060028 PCI: 00:15.1 read_resources bus 2 link: 0
1086 12:24:49.063703 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 12:24:49.070859 PCI: 00:19.0 read_resources bus 3 link: 0
1088 12:24:49.077381 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 12:24:49.080780 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 12:24:49.087763 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 12:24:49.090805 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 12:24:49.097380 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 12:24:49.100729 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 12:24:49.107577 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 12:24:49.110608 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 12:24:49.117390 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 12:24:49.123555 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 12:24:49.127135 Root Device read_resources bus 0 link: 0 done
1099 12:24:49.130799 Done reading resources.
1100 12:24:49.136807 Show resources in subtree (Root Device)...After reading.
1101 12:24:49.140398 Root Device child on link 0 CPU_CLUSTER: 0
1102 12:24:49.143836 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 12:24:49.143913 APIC: 00
1104 12:24:49.146836 APIC: 03
1105 12:24:49.146922 APIC: 06
1106 12:24:49.150623 APIC: 01
1107 12:24:49.150698 APIC: 02
1108 12:24:49.150770 APIC: 04
1109 12:24:49.153763 APIC: 05
1110 12:24:49.153835 APIC: 07
1111 12:24:49.156897 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 12:24:49.209831 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 12:24:49.210163 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 12:24:49.210265 PCI: 00:00.0
1115 12:24:49.210383 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 12:24:49.210955 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 12:24:49.211247 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 12:24:49.248612 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 12:24:49.248940 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 12:24:49.249663 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 12:24:49.249930 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 12:24:49.253077 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 12:24:49.263417 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 12:24:49.273121 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 12:24:49.283007 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 12:24:49.293056 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 12:24:49.299612 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 12:24:49.309405 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 12:24:49.319470 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 12:24:49.329680 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 12:24:49.329766 PCI: 00:02.0
1132 12:24:49.342554 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 12:24:49.352838 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 12:24:49.359472 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 12:24:49.362313 PCI: 00:04.0
1136 12:24:49.362391 PCI: 00:08.0
1137 12:24:49.372573 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 12:24:49.376031 PCI: 00:12.0
1139 12:24:49.385950 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 12:24:49.389051 PCI: 00:14.0 child on link 0 USB0 port 0
1141 12:24:49.399150 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 12:24:49.402076 USB0 port 0 child on link 0 USB2 port 0
1143 12:24:49.405848 USB2 port 0
1144 12:24:49.405933 USB2 port 1
1145 12:24:49.408811 USB2 port 2
1146 12:24:49.408917 USB2 port 3
1147 12:24:49.412248 USB2 port 5
1148 12:24:49.412328 USB2 port 6
1149 12:24:49.415637 USB2 port 9
1150 12:24:49.418912 USB3 port 0
1151 12:24:49.418988 USB3 port 1
1152 12:24:49.422490 USB3 port 2
1153 12:24:49.422595 USB3 port 3
1154 12:24:49.425623 USB3 port 4
1155 12:24:49.425703 PCI: 00:14.2
1156 12:24:49.435422 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 12:24:49.445634 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 12:24:49.448718 PCI: 00:14.3
1159 12:24:49.458718 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 12:24:49.461780 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 12:24:49.472316 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 12:24:49.472402 I2C: 01:15
1163 12:24:49.478770 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 12:24:49.488404 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 12:24:49.488535 I2C: 02:5d
1166 12:24:49.492034 GENERIC: 0.0
1167 12:24:49.492156 PCI: 00:16.0
1168 12:24:49.502153 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 12:24:49.505204 PCI: 00:17.0
1170 12:24:49.511923 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 12:24:49.521781 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 12:24:49.531483 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 12:24:49.538602 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 12:24:49.548293 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 12:24:49.554957 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 12:24:49.561135 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 12:24:49.571580 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 12:24:49.571665 I2C: 03:1a
1179 12:24:49.574542 I2C: 03:38
1180 12:24:49.574640 I2C: 03:39
1181 12:24:49.577930 I2C: 03:3a
1182 12:24:49.578008 I2C: 03:3b
1183 12:24:49.581635 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 12:24:49.591108 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 12:24:49.600785 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 12:24:49.610742 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 12:24:49.610889 PCI: 01:00.0
1188 12:24:49.620697 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 12:24:49.624269 PCI: 00:1e.0
1190 12:24:49.634310 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 12:24:49.643907 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 12:24:49.647619 PCI: 00:1e.2 child on link 0 SPI: 00
1193 12:24:49.657226 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:24:49.660885 SPI: 00
1195 12:24:49.663991 PCI: 00:1e.3 child on link 0 SPI: 01
1196 12:24:49.673911 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 12:24:49.674018 SPI: 01
1198 12:24:49.680492 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 12:24:49.687603 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 12:24:49.697123 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 12:24:49.697241 PNP: 0c09.0
1202 12:24:49.707110 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 12:24:49.710284 PCI: 00:1f.3
1204 12:24:49.720267 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 12:24:49.730203 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 12:24:49.730303 PCI: 00:1f.4
1207 12:24:49.739870 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 12:24:49.750222 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 12:24:49.750310 PCI: 00:1f.5
1210 12:24:49.759909 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 12:24:49.766482 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 12:24:49.773187 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 12:24:49.779685 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 12:24:49.783428 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 12:24:49.786416 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 12:24:49.789928 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 12:24:49.792868 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 12:24:49.799908 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 12:24:49.806107 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 12:24:49.816535 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 12:24:49.822662 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 12:24:49.829506 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 12:24:49.833125 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 12:24:49.843062 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 12:24:49.846294 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 12:24:49.852910 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 12:24:49.856046 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 12:24:49.862598 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 12:24:49.865999 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 12:24:49.872393 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 12:24:49.875905 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 12:24:49.882587 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 12:24:49.886017 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 12:24:49.892605 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 12:24:49.895705 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 12:24:49.899198 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 12:24:49.905700 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 12:24:49.909143 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 12:24:49.915723 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 12:24:49.919174 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 12:24:49.925366 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 12:24:49.928533 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 12:24:49.935338 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 12:24:49.938317 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 12:24:49.945198 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 12:24:49.948330 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 12:24:49.955195 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 12:24:49.962056 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 12:24:49.965190 avoid_fixed_resources: DOMAIN: 0000
1250 12:24:49.971928 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 12:24:49.978188 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 12:24:49.985113 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 12:24:49.995057 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 12:24:50.001626 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 12:24:50.008441 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 12:24:50.014786 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 12:24:50.024715 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 12:24:50.031330 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 12:24:50.038115 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 12:24:50.048069 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 12:24:50.054240 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 12:24:50.054325 Setting resources...
1263 12:24:50.060900 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 12:24:50.067699 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 12:24:50.070805 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 12:24:50.074585 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 12:24:50.077736 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 12:24:50.084506 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 12:24:50.090963 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 12:24:50.097537 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 12:24:50.104345 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 12:24:50.110758 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 12:24:50.114004 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 12:24:50.120615 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 12:24:50.124047 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 12:24:50.130751 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 12:24:50.134131 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 12:24:50.140901 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 12:24:50.143957 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 12:24:50.147655 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 12:24:50.153616 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 12:24:50.157419 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 12:24:50.164100 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 12:24:50.167255 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 12:24:50.174010 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 12:24:50.177076 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 12:24:50.183759 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 12:24:50.186817 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 12:24:50.193533 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 12:24:50.196711 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 12:24:50.203830 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 12:24:50.206606 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 12:24:50.213733 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 12:24:50.216912 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 12:24:50.223251 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 12:24:50.229918 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 12:24:50.239828 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 12:24:50.246354 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 12:24:50.250086 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 12:24:50.259842 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 12:24:50.263560 Root Device assign_resources, bus 0 link: 0
1302 12:24:50.266592 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 12:24:50.276602 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 12:24:50.283513 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 12:24:50.293350 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 12:24:50.300082 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 12:24:50.309948 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 12:24:50.316714 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 12:24:50.323089 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 12:24:50.326398 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 12:24:50.336642 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 12:24:50.342824 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 12:24:50.349789 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 12:24:50.359946 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 12:24:50.363342 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 12:24:50.369601 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 12:24:50.376354 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 12:24:50.383124 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 12:24:50.386225 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 12:24:50.393421 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 12:24:50.403328 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 12:24:50.409626 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 12:24:50.419764 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 12:24:50.426024 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 12:24:50.432764 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 12:24:50.442598 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 12:24:50.449332 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 12:24:50.452823 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 12:24:50.459438 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 12:24:50.465878 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 12:24:50.475730 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 12:24:50.486010 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 12:24:50.489102 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 12:24:50.499008 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 12:24:50.502101 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 12:24:50.511860 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 12:24:50.518479 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 12:24:50.522152 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 12:24:50.528937 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 12:24:50.535190 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 12:24:50.542072 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 12:24:50.545117 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 12:24:50.551768 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 12:24:50.554794 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 12:24:50.561478 LPC: Trying to open IO window from 800 size 1ff
1346 12:24:50.568426 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 12:24:50.578041 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 12:24:50.584556 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 12:24:50.594418 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 12:24:50.597918 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 12:24:50.601073 Root Device assign_resources, bus 0 link: 0
1352 12:24:50.604219 Done setting resources.
1353 12:24:50.610990 Show resources in subtree (Root Device)...After assigning values.
1354 12:24:50.614659 Root Device child on link 0 CPU_CLUSTER: 0
1355 12:24:50.620940 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 12:24:50.621095 APIC: 00
1357 12:24:50.624437 APIC: 03
1358 12:24:50.624513 APIC: 06
1359 12:24:50.624575 APIC: 01
1360 12:24:50.627596 APIC: 02
1361 12:24:50.627678 APIC: 04
1362 12:24:50.627742 APIC: 05
1363 12:24:50.630716 APIC: 07
1364 12:24:50.634484 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 12:24:50.644469 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 12:24:50.654243 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 12:24:50.657326 PCI: 00:00.0
1368 12:24:50.667337 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 12:24:50.677226 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 12:24:50.687266 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 12:24:50.693567 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 12:24:50.703201 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 12:24:50.713114 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 12:24:50.723603 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 12:24:50.733330 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 12:24:50.743050 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 12:24:50.749843 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 12:24:50.759544 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 12:24:50.769541 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 12:24:50.779471 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 12:24:50.789375 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 12:24:50.799177 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 12:24:50.805787 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 12:24:50.809142 PCI: 00:02.0
1385 12:24:50.819138 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 12:24:50.829053 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 12:24:50.839127 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 12:24:50.842459 PCI: 00:04.0
1389 12:24:50.842590 PCI: 00:08.0
1390 12:24:50.852222 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 12:24:50.855269 PCI: 00:12.0
1392 12:24:50.865578 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 12:24:50.868691 PCI: 00:14.0 child on link 0 USB0 port 0
1394 12:24:50.878527 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 12:24:50.885404 USB0 port 0 child on link 0 USB2 port 0
1396 12:24:50.885486 USB2 port 0
1397 12:24:50.888540 USB2 port 1
1398 12:24:50.888637 USB2 port 2
1399 12:24:50.892170 USB2 port 3
1400 12:24:50.892258 USB2 port 5
1401 12:24:50.895247 USB2 port 6
1402 12:24:50.895321 USB2 port 9
1403 12:24:50.898274 USB3 port 0
1404 12:24:50.898356 USB3 port 1
1405 12:24:50.901790 USB3 port 2
1406 12:24:50.904994 USB3 port 3
1407 12:24:50.905113 USB3 port 4
1408 12:24:50.908002 PCI: 00:14.2
1409 12:24:50.918473 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 12:24:50.928078 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 12:24:50.928161 PCI: 00:14.3
1412 12:24:50.938143 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 12:24:50.945095 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 12:24:50.954588 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 12:24:50.954716 I2C: 01:15
1416 12:24:50.961175 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 12:24:50.971338 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 12:24:50.971456 I2C: 02:5d
1419 12:24:50.974327 GENERIC: 0.0
1420 12:24:50.974430 PCI: 00:16.0
1421 12:24:50.984158 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 12:24:50.987920 PCI: 00:17.0
1423 12:24:50.997935 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 12:24:51.007493 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 12:24:51.017331 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 12:24:51.024152 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 12:24:51.034265 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 12:24:51.043790 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 12:24:51.050805 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 12:24:51.060693 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 12:24:51.060779 I2C: 03:1a
1432 12:24:51.063856 I2C: 03:38
1433 12:24:51.063958 I2C: 03:39
1434 12:24:51.067336 I2C: 03:3a
1435 12:24:51.067437 I2C: 03:3b
1436 12:24:51.070620 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 12:24:51.080592 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 12:24:51.090330 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 12:24:51.100034 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 12:24:51.103274 PCI: 01:00.0
1441 12:24:51.113575 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 12:24:51.116721 PCI: 00:1e.0
1443 12:24:51.126584 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 12:24:51.136762 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 12:24:51.139732 PCI: 00:1e.2 child on link 0 SPI: 00
1446 12:24:51.149860 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 12:24:51.153220 SPI: 00
1448 12:24:51.156619 PCI: 00:1e.3 child on link 0 SPI: 01
1449 12:24:51.166488 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 12:24:51.169845 SPI: 01
1451 12:24:51.172649 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 12:24:51.179513 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 12:24:51.189326 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 12:24:51.192951 PNP: 0c09.0
1455 12:24:51.199120 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 12:24:51.202789 PCI: 00:1f.3
1457 12:24:51.212485 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 12:24:51.222388 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 12:24:51.225622 PCI: 00:1f.4
1460 12:24:51.232359 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 12:24:51.242527 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 12:24:51.245637 PCI: 00:1f.5
1463 12:24:51.255250 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 12:24:51.258762 Done allocating resources.
1465 12:24:51.265256 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 12:24:51.265366 Enabling resources...
1467 12:24:51.272557 PCI: 00:00.0 subsystem <- 8086/9b61
1468 12:24:51.272640 PCI: 00:00.0 cmd <- 06
1469 12:24:51.276230 PCI: 00:02.0 subsystem <- 8086/9b41
1470 12:24:51.279341 PCI: 00:02.0 cmd <- 03
1471 12:24:51.282922 PCI: 00:08.0 cmd <- 06
1472 12:24:51.285901 PCI: 00:12.0 subsystem <- 8086/02f9
1473 12:24:51.289266 PCI: 00:12.0 cmd <- 02
1474 12:24:51.292622 PCI: 00:14.0 subsystem <- 8086/02ed
1475 12:24:51.295836 PCI: 00:14.0 cmd <- 02
1476 12:24:51.299088 PCI: 00:14.2 cmd <- 02
1477 12:24:51.302484 PCI: 00:14.3 subsystem <- 8086/02f0
1478 12:24:51.305373 PCI: 00:14.3 cmd <- 02
1479 12:24:51.309029 PCI: 00:15.0 subsystem <- 8086/02e8
1480 12:24:51.309110 PCI: 00:15.0 cmd <- 02
1481 12:24:51.315672 PCI: 00:15.1 subsystem <- 8086/02e9
1482 12:24:51.315795 PCI: 00:15.1 cmd <- 02
1483 12:24:51.318587 PCI: 00:16.0 subsystem <- 8086/02e0
1484 12:24:51.322291 PCI: 00:16.0 cmd <- 02
1485 12:24:51.325422 PCI: 00:17.0 subsystem <- 8086/02d3
1486 12:24:51.328511 PCI: 00:17.0 cmd <- 03
1487 12:24:51.331710 PCI: 00:19.0 subsystem <- 8086/02c5
1488 12:24:51.335435 PCI: 00:19.0 cmd <- 02
1489 12:24:51.338457 PCI: 00:1d.0 bridge ctrl <- 0013
1490 12:24:51.341573 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 12:24:51.345142 PCI: 00:1d.0 cmd <- 06
1492 12:24:51.348703 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 12:24:51.351743 PCI: 00:1e.0 cmd <- 06
1494 12:24:51.355412 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 12:24:51.358489 PCI: 00:1e.2 cmd <- 06
1496 12:24:51.361608 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 12:24:51.365132 PCI: 00:1e.3 cmd <- 02
1498 12:24:51.368202 PCI: 00:1f.0 subsystem <- 8086/0284
1499 12:24:51.371745 PCI: 00:1f.0 cmd <- 407
1500 12:24:51.374707 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 12:24:51.374834 PCI: 00:1f.3 cmd <- 02
1502 12:24:51.381624 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 12:24:51.381727 PCI: 00:1f.4 cmd <- 03
1504 12:24:51.384671 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 12:24:51.388272 PCI: 00:1f.5 cmd <- 406
1506 12:24:51.397525 PCI: 01:00.0 cmd <- 02
1507 12:24:51.402708 done.
1508 12:24:51.414874 ME: Version: 14.0.39.1367
1509 12:24:51.421537 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1510 12:24:51.424580 Initializing devices...
1511 12:24:51.424689 Root Device init ...
1512 12:24:51.431423 Chrome EC: Set SMI mask to 0x0000000000000000
1513 12:24:51.434516 Chrome EC: clear events_b mask to 0x0000000000000000
1514 12:24:51.441401 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 12:24:51.448167 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 12:24:51.454630 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 12:24:51.457646 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 12:24:51.461453 Root Device init finished in 35188 usecs
1519 12:24:51.465055 CPU_CLUSTER: 0 init ...
1520 12:24:51.471644 CPU_CLUSTER: 0 init finished in 2450 usecs
1521 12:24:51.475802 PCI: 00:00.0 init ...
1522 12:24:51.478784 CPU TDP: 15 Watts
1523 12:24:51.482288 CPU PL2 = 64 Watts
1524 12:24:51.485388 PCI: 00:00.0 init finished in 7082 usecs
1525 12:24:51.489023 PCI: 00:02.0 init ...
1526 12:24:51.491981 PCI: 00:02.0 init finished in 2254 usecs
1527 12:24:51.495739 PCI: 00:08.0 init ...
1528 12:24:51.498668 PCI: 00:08.0 init finished in 2253 usecs
1529 12:24:51.502373 PCI: 00:12.0 init ...
1530 12:24:51.505405 PCI: 00:12.0 init finished in 2253 usecs
1531 12:24:51.508474 PCI: 00:14.0 init ...
1532 12:24:51.512048 PCI: 00:14.0 init finished in 2254 usecs
1533 12:24:51.515506 PCI: 00:14.2 init ...
1534 12:24:51.518440 PCI: 00:14.2 init finished in 2244 usecs
1535 12:24:51.521754 PCI: 00:14.3 init ...
1536 12:24:51.524965 PCI: 00:14.3 init finished in 2272 usecs
1537 12:24:51.528698 PCI: 00:15.0 init ...
1538 12:24:51.531903 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 12:24:51.535013 PCI: 00:15.0 init finished in 5980 usecs
1540 12:24:51.538793 PCI: 00:15.1 init ...
1541 12:24:51.541868 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 12:24:51.548644 PCI: 00:15.1 init finished in 5981 usecs
1543 12:24:51.548750 PCI: 00:16.0 init ...
1544 12:24:51.554844 PCI: 00:16.0 init finished in 2253 usecs
1545 12:24:51.558298 PCI: 00:19.0 init ...
1546 12:24:51.561608 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 12:24:51.564769 PCI: 00:19.0 init finished in 5978 usecs
1548 12:24:51.568378 PCI: 00:1d.0 init ...
1549 12:24:51.571451 Initializing PCH PCIe bridge.
1550 12:24:51.575036 PCI: 00:1d.0 init finished in 5287 usecs
1551 12:24:51.578260 PCI: 00:1f.0 init ...
1552 12:24:51.581374 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 12:24:51.587864 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 12:24:51.587973 IOAPIC: ID = 0x02
1555 12:24:51.591736 IOAPIC: Dumping registers
1556 12:24:51.594659 reg 0x0000: 0x02000000
1557 12:24:51.597777 reg 0x0001: 0x00770020
1558 12:24:51.597857 reg 0x0002: 0x00000000
1559 12:24:51.604424 PCI: 00:1f.0 init finished in 23550 usecs
1560 12:24:51.608185 PCI: 00:1f.4 init ...
1561 12:24:51.611105 PCI: 00:1f.4 init finished in 2263 usecs
1562 12:24:51.621907 PCI: 01:00.0 init ...
1563 12:24:51.624970 PCI: 01:00.0 init finished in 2254 usecs
1564 12:24:51.629072 PNP: 0c09.0 init ...
1565 12:24:51.636123 Google Chrome EC uptime: 11.101 seconds
1566 12:24:51.639331 Google Chrome AP resets since EC boot: 0
1567 12:24:51.642286 Google Chrome most recent AP reset causes:
1568 12:24:51.648965 Google Chrome EC reset flags at last EC boot: reset-pin
1569 12:24:51.652686 PNP: 0c09.0 init finished in 20614 usecs
1570 12:24:51.655763 Devices initialized
1571 12:24:51.658749 Show all devs... After init.
1572 12:24:51.658854 Root Device: enabled 1
1573 12:24:51.662441 CPU_CLUSTER: 0: enabled 1
1574 12:24:51.665486 DOMAIN: 0000: enabled 1
1575 12:24:51.665561 APIC: 00: enabled 1
1576 12:24:51.668817 PCI: 00:00.0: enabled 1
1577 12:24:51.671945 PCI: 00:02.0: enabled 1
1578 12:24:51.675552 PCI: 00:04.0: enabled 0
1579 12:24:51.675652 PCI: 00:05.0: enabled 0
1580 12:24:51.678552 PCI: 00:12.0: enabled 1
1581 12:24:51.682210 PCI: 00:12.5: enabled 0
1582 12:24:51.685349 PCI: 00:12.6: enabled 0
1583 12:24:51.685421 PCI: 00:14.0: enabled 1
1584 12:24:51.689017 PCI: 00:14.1: enabled 0
1585 12:24:51.691862 PCI: 00:14.3: enabled 1
1586 12:24:51.695572 PCI: 00:14.5: enabled 0
1587 12:24:51.695748 PCI: 00:15.0: enabled 1
1588 12:24:51.698725 PCI: 00:15.1: enabled 1
1589 12:24:51.702081 PCI: 00:15.2: enabled 0
1590 12:24:51.702187 PCI: 00:15.3: enabled 0
1591 12:24:51.705179 PCI: 00:16.0: enabled 1
1592 12:24:51.708835 PCI: 00:16.1: enabled 0
1593 12:24:51.711788 PCI: 00:16.2: enabled 0
1594 12:24:51.711888 PCI: 00:16.3: enabled 0
1595 12:24:51.715556 PCI: 00:16.4: enabled 0
1596 12:24:51.718602 PCI: 00:16.5: enabled 0
1597 12:24:51.721672 PCI: 00:17.0: enabled 1
1598 12:24:51.721750 PCI: 00:19.0: enabled 1
1599 12:24:51.725388 PCI: 00:19.1: enabled 0
1600 12:24:51.728451 PCI: 00:19.2: enabled 0
1601 12:24:51.731438 PCI: 00:1a.0: enabled 0
1602 12:24:51.731543 PCI: 00:1c.0: enabled 0
1603 12:24:51.735150 PCI: 00:1c.1: enabled 0
1604 12:24:51.738211 PCI: 00:1c.2: enabled 0
1605 12:24:51.741674 PCI: 00:1c.3: enabled 0
1606 12:24:51.741755 PCI: 00:1c.4: enabled 0
1607 12:24:51.745079 PCI: 00:1c.5: enabled 0
1608 12:24:51.748259 PCI: 00:1c.6: enabled 0
1609 12:24:51.748339 PCI: 00:1c.7: enabled 0
1610 12:24:51.751803 PCI: 00:1d.0: enabled 1
1611 12:24:51.754772 PCI: 00:1d.1: enabled 0
1612 12:24:51.758496 PCI: 00:1d.2: enabled 0
1613 12:24:51.758577 PCI: 00:1d.3: enabled 0
1614 12:24:51.761675 PCI: 00:1d.4: enabled 0
1615 12:24:51.764731 PCI: 00:1d.5: enabled 0
1616 12:24:51.768401 PCI: 00:1e.0: enabled 1
1617 12:24:51.768481 PCI: 00:1e.1: enabled 0
1618 12:24:51.771454 PCI: 00:1e.2: enabled 1
1619 12:24:51.774958 PCI: 00:1e.3: enabled 1
1620 12:24:51.777930 PCI: 00:1f.0: enabled 1
1621 12:24:51.778036 PCI: 00:1f.1: enabled 0
1622 12:24:51.781465 PCI: 00:1f.2: enabled 0
1623 12:24:51.784745 PCI: 00:1f.3: enabled 1
1624 12:24:51.784826 PCI: 00:1f.4: enabled 1
1625 12:24:51.788084 PCI: 00:1f.5: enabled 1
1626 12:24:51.791504 PCI: 00:1f.6: enabled 0
1627 12:24:51.794446 USB0 port 0: enabled 1
1628 12:24:51.794530 I2C: 01:15: enabled 1
1629 12:24:51.797952 I2C: 02:5d: enabled 1
1630 12:24:51.801031 GENERIC: 0.0: enabled 1
1631 12:24:51.801111 I2C: 03:1a: enabled 1
1632 12:24:51.804778 I2C: 03:38: enabled 1
1633 12:24:51.807747 I2C: 03:39: enabled 1
1634 12:24:51.807859 I2C: 03:3a: enabled 1
1635 12:24:51.811333 I2C: 03:3b: enabled 1
1636 12:24:51.814576 PCI: 00:00.0: enabled 1
1637 12:24:51.814657 SPI: 00: enabled 1
1638 12:24:51.817617 SPI: 01: enabled 1
1639 12:24:51.820820 PNP: 0c09.0: enabled 1
1640 12:24:51.820913 USB2 port 0: enabled 1
1641 12:24:51.824622 USB2 port 1: enabled 1
1642 12:24:51.827612 USB2 port 2: enabled 0
1643 12:24:51.831284 USB2 port 3: enabled 0
1644 12:24:51.831364 USB2 port 5: enabled 0
1645 12:24:51.834128 USB2 port 6: enabled 1
1646 12:24:51.837676 USB2 port 9: enabled 1
1647 12:24:51.837756 USB3 port 0: enabled 1
1648 12:24:51.840767 USB3 port 1: enabled 1
1649 12:24:51.844446 USB3 port 2: enabled 1
1650 12:24:51.847301 USB3 port 3: enabled 1
1651 12:24:51.847381 USB3 port 4: enabled 0
1652 12:24:51.850995 APIC: 03: enabled 1
1653 12:24:51.851076 APIC: 06: enabled 1
1654 12:24:51.854350 APIC: 01: enabled 1
1655 12:24:51.857637 APIC: 02: enabled 1
1656 12:24:51.857717 APIC: 04: enabled 1
1657 12:24:51.860687 APIC: 05: enabled 1
1658 12:24:51.863826 APIC: 07: enabled 1
1659 12:24:51.863906 PCI: 00:08.0: enabled 1
1660 12:24:51.866861 PCI: 00:14.2: enabled 1
1661 12:24:51.870522 PCI: 01:00.0: enabled 1
1662 12:24:51.873667 Disabling ACPI via APMC:
1663 12:24:51.877389 done.
1664 12:24:51.880378 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 12:24:51.883444 ELOG: NV offset 0xaf0000 size 0x4000
1666 12:24:51.891119 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 12:24:51.897566 ELOG: Event(17) added with size 13 at 2023-12-08 12:24:51 UTC
1668 12:24:51.904588 ELOG: Event(92) added with size 9 at 2023-12-08 12:24:51 UTC
1669 12:24:51.910821 ELOG: Event(93) added with size 9 at 2023-12-08 12:24:51 UTC
1670 12:24:51.917507 ELOG: Event(9A) added with size 9 at 2023-12-08 12:24:51 UTC
1671 12:24:51.924235 ELOG: Event(9E) added with size 10 at 2023-12-08 12:24:51 UTC
1672 12:24:51.930868 ELOG: Event(9F) added with size 14 at 2023-12-08 12:24:51 UTC
1673 12:24:51.934382 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1674 12:24:51.941506 ELOG: Event(A1) added with size 10 at 2023-12-08 12:24:51 UTC
1675 12:24:51.951807 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 12:24:51.957765 ELOG: Event(A0) added with size 9 at 2023-12-08 12:24:51 UTC
1677 12:24:51.961421 elog_add_boot_reason: Logged dev mode boot
1678 12:24:51.964617 Finalize devices...
1679 12:24:51.964692 PCI: 00:17.0 final
1680 12:24:51.968208 Devices finalized
1681 12:24:51.971363 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 12:24:51.978157 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 12:24:51.981153 ME: HFSTS1 : 0x90000245
1684 12:24:51.984704 ME: HFSTS2 : 0x3B850126
1685 12:24:51.990867 ME: HFSTS3 : 0x00000020
1686 12:24:51.994477 ME: HFSTS4 : 0x00004800
1687 12:24:51.997980 ME: HFSTS5 : 0x00000000
1688 12:24:52.001173 ME: HFSTS6 : 0x40400006
1689 12:24:52.004601 ME: Manufacturing Mode : NO
1690 12:24:52.007528 ME: FW Partition Table : OK
1691 12:24:52.010825 ME: Bringup Loader Failure : NO
1692 12:24:52.014562 ME: Firmware Init Complete : YES
1693 12:24:52.017447 ME: Boot Options Present : NO
1694 12:24:52.020701 ME: Update In Progress : NO
1695 12:24:52.024411 ME: D0i3 Support : YES
1696 12:24:52.027579 ME: Low Power State Enabled : NO
1697 12:24:52.030451 ME: CPU Replaced : NO
1698 12:24:52.034242 ME: CPU Replacement Valid : YES
1699 12:24:52.037273 ME: Current Working State : 5
1700 12:24:52.040954 ME: Current Operation State : 1
1701 12:24:52.043832 ME: Current Operation Mode : 0
1702 12:24:52.046947 ME: Error Code : 0
1703 12:24:52.050573 ME: CPU Debug Disabled : YES
1704 12:24:52.054145 ME: TXT Support : NO
1705 12:24:52.060844 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 12:24:52.067489 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 12:24:52.067597 CBFS @ c08000 size 3f8000
1708 12:24:52.073739 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 12:24:52.076728 CBFS: Locating 'fallback/dsdt.aml'
1710 12:24:52.080254 CBFS: Found @ offset 10bb80 size 3fa5
1711 12:24:52.087104 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 12:24:52.090154 CBFS @ c08000 size 3f8000
1713 12:24:52.096897 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 12:24:52.096971 CBFS: Locating 'fallback/slic'
1715 12:24:52.102232 CBFS: 'fallback/slic' not found.
1716 12:24:52.108931 ACPI: Writing ACPI tables at 99b3e000.
1717 12:24:52.109007 ACPI: * FACS
1718 12:24:52.112019 ACPI: * DSDT
1719 12:24:52.115759 Ramoops buffer: 0x100000@0x99a3d000.
1720 12:24:52.118653 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 12:24:52.125242 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 12:24:52.128739 Google Chrome EC: version:
1723 12:24:52.131673 ro: helios_v2.0.2659-56403530b
1724 12:24:52.135332 rw: helios_v2.0.2849-c41de27e7d
1725 12:24:52.135402 running image: 1
1726 12:24:52.139579 ACPI: * FADT
1727 12:24:52.139647 SCI is IRQ9
1728 12:24:52.146091 ACPI: added table 1/32, length now 40
1729 12:24:52.146165 ACPI: * SSDT
1730 12:24:52.149688 Found 1 CPU(s) with 8 core(s) each.
1731 12:24:52.152751 Error: Could not locate 'wifi_sar' in VPD.
1732 12:24:52.159280 Checking CBFS for default SAR values
1733 12:24:52.163043 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 12:24:52.166085 CBFS @ c08000 size 3f8000
1735 12:24:52.172320 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 12:24:52.175779 CBFS: Locating 'wifi_sar_defaults.hex'
1737 12:24:52.179199 CBFS: Found @ offset 5fac0 size 77
1738 12:24:52.182714 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 12:24:52.189477 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 12:24:52.192480 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 12:24:52.199316 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 12:24:52.202411 failed to find key in VPD: dsm_calib_r0_0
1743 12:24:52.212673 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 12:24:52.215764 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 12:24:52.218720 failed to find key in VPD: dsm_calib_r0_1
1746 12:24:52.228877 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 12:24:52.235310 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 12:24:52.238735 failed to find key in VPD: dsm_calib_r0_2
1749 12:24:52.248435 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 12:24:52.251762 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 12:24:52.258651 failed to find key in VPD: dsm_calib_r0_3
1752 12:24:52.265265 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 12:24:52.272136 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 12:24:52.275191 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 12:24:52.278292 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 12:24:52.282465 EC returned error result code 1
1757 12:24:52.285942 EC returned error result code 1
1758 12:24:52.290336 EC returned error result code 1
1759 12:24:52.296537 PS2K: Bad resp from EC. Vivaldi disabled!
1760 12:24:52.300190 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 12:24:52.306750 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 12:24:52.312823 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 12:24:52.316436 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 12:24:52.323341 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 12:24:52.329373 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 12:24:52.335990 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 12:24:52.339619 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 12:24:52.346063 ACPI: added table 2/32, length now 44
1769 12:24:52.346143 ACPI: * MCFG
1770 12:24:52.349744 ACPI: added table 3/32, length now 48
1771 12:24:52.352721 ACPI: * TPM2
1772 12:24:52.356282 TPM2 log created at 99a2d000
1773 12:24:52.359396 ACPI: added table 4/32, length now 52
1774 12:24:52.359494 ACPI: * MADT
1775 12:24:52.362505 SCI is IRQ9
1776 12:24:52.366108 ACPI: added table 5/32, length now 56
1777 12:24:52.366188 current = 99b43ac0
1778 12:24:52.369063 ACPI: * DMAR
1779 12:24:52.372739 ACPI: added table 6/32, length now 60
1780 12:24:52.375821 ACPI: * IGD OpRegion
1781 12:24:52.375893 GMA: Found VBT in CBFS
1782 12:24:52.378940 GMA: Found valid VBT in CBFS
1783 12:24:52.382618 ACPI: added table 7/32, length now 64
1784 12:24:52.385678 ACPI: * HPET
1785 12:24:52.389379 ACPI: added table 8/32, length now 68
1786 12:24:52.392359 ACPI: done.
1787 12:24:52.392442 ACPI tables: 31744 bytes.
1788 12:24:52.396180 smbios_write_tables: 99a2c000
1789 12:24:52.399535 EC returned error result code 3
1790 12:24:52.402784 Couldn't obtain OEM name from CBI
1791 12:24:52.406387 Create SMBIOS type 17
1792 12:24:52.409560 PCI: 00:00.0 (Intel Cannonlake)
1793 12:24:52.413182 PCI: 00:14.3 (Intel WiFi)
1794 12:24:52.416382 SMBIOS tables: 939 bytes.
1795 12:24:52.419846 Writing table forward entry at 0x00000500
1796 12:24:52.426587 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 12:24:52.429664 Writing coreboot table at 0x99b62000
1798 12:24:52.436349 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 12:24:52.439379 1. 0000000000001000-000000000009ffff: RAM
1800 12:24:52.443038 2. 00000000000a0000-00000000000fffff: RESERVED
1801 12:24:52.449490 3. 0000000000100000-0000000099a2bfff: RAM
1802 12:24:52.452817 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 12:24:52.459356 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 12:24:52.466104 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 12:24:52.469684 7. 000000009a000000-000000009f7fffff: RESERVED
1806 12:24:52.472789 8. 00000000e0000000-00000000efffffff: RESERVED
1807 12:24:52.479677 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 12:24:52.482714 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 12:24:52.489502 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 12:24:52.492595 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 12:24:52.499195 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 12:24:52.502194 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 12:24:52.505695 15. 0000000100000000-000000045e7fffff: RAM
1814 12:24:52.512554 Graphics framebuffer located at 0xc0000000
1815 12:24:52.515456 Passing 5 GPIOs to payload:
1816 12:24:52.519038 NAME | PORT | POLARITY | VALUE
1817 12:24:52.525664 write protect | undefined | high | low
1818 12:24:52.528695 lid | undefined | high | high
1819 12:24:52.535287 power | undefined | high | low
1820 12:24:52.541969 oprom | undefined | high | low
1821 12:24:52.545581 EC in RW | 0x000000cb | high | low
1822 12:24:52.548742 Board ID: 4
1823 12:24:52.552213 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 12:24:52.555274 CBFS @ c08000 size 3f8000
1825 12:24:52.561541 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 12:24:52.564836 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1827 12:24:52.568368 coreboot table: 1492 bytes.
1828 12:24:52.571462 IMD ROOT 0. 99fff000 00001000
1829 12:24:52.574944 IMD SMALL 1. 99ffe000 00001000
1830 12:24:52.578600 FSP MEMORY 2. 99c4e000 003b0000
1831 12:24:52.581700 CONSOLE 3. 99c2e000 00020000
1832 12:24:52.584707 FMAP 4. 99c2d000 0000054e
1833 12:24:52.587758 TIME STAMP 5. 99c2c000 00000910
1834 12:24:52.591533 VBOOT WORK 6. 99c18000 00014000
1835 12:24:52.594592 MRC DATA 7. 99c16000 00001958
1836 12:24:52.597628 ROMSTG STCK 8. 99c15000 00001000
1837 12:24:52.601376 AFTER CAR 9. 99c0b000 0000a000
1838 12:24:52.604206 RAMSTAGE 10. 99baf000 0005c000
1839 12:24:52.607887 REFCODE 11. 99b7a000 00035000
1840 12:24:52.611100 SMM BACKUP 12. 99b6a000 00010000
1841 12:24:52.614720 COREBOOT 13. 99b62000 00008000
1842 12:24:52.617657 ACPI 14. 99b3e000 00024000
1843 12:24:52.624418 ACPI GNVS 15. 99b3d000 00001000
1844 12:24:52.627660 RAMOOPS 16. 99a3d000 00100000
1845 12:24:52.630633 TPM2 TCGLOG17. 99a2d000 00010000
1846 12:24:52.634323 SMBIOS 18. 99a2c000 00000800
1847 12:24:52.634446 IMD small region:
1848 12:24:52.637486 IMD ROOT 0. 99ffec00 00000400
1849 12:24:52.640604 FSP RUNTIME 1. 99ffebe0 00000004
1850 12:24:52.644124 EC HOSTEVENT 2. 99ffebc0 00000008
1851 12:24:52.647096 POWER STATE 3. 99ffeb80 00000040
1852 12:24:52.650679 ROMSTAGE 4. 99ffeb60 00000004
1853 12:24:52.657317 MEM INFO 5. 99ffe9a0 000001b9
1854 12:24:52.660510 VPD 6. 99ffe920 0000006c
1855 12:24:52.663611 MTRR: Physical address space:
1856 12:24:52.667121 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 12:24:52.673340 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 12:24:52.680192 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 12:24:52.686780 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 12:24:52.693483 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 12:24:52.700130 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 12:24:52.706883 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 12:24:52.709823 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 12:24:52.713598 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 12:24:52.719752 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 12:24:52.722906 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 12:24:52.726382 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 12:24:52.729891 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 12:24:52.733378 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 12:24:52.739428 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 12:24:52.742884 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 12:24:52.746612 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 12:24:52.749600 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 12:24:52.753841 call enable_fixed_mtrr()
1875 12:24:52.756685 CPU physical address size: 39 bits
1876 12:24:52.763308 MTRR: default type WB/UC MTRR counts: 6/8.
1877 12:24:52.767073 MTRR: WB selected as default type.
1878 12:24:52.773672 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 12:24:52.776533 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 12:24:52.783125 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 12:24:52.789803 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 12:24:52.796571 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 12:24:52.803320 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 12:24:52.803430
1885 12:24:52.806422 MTRR check
1886 12:24:52.806529 Fixed MTRRs : Enabled
1887 12:24:52.810009 Variable MTRRs: Enabled
1888 12:24:52.810115
1889 12:24:52.813023 MTRR: Fixed MSR 0x250 0x0606060606060606
1890 12:24:52.819754 MTRR: Fixed MSR 0x258 0x0606060606060606
1891 12:24:52.822911 MTRR: Fixed MSR 0x259 0x0000000000000000
1892 12:24:52.826011 MTRR: Fixed MSR 0x268 0x0606060606060606
1893 12:24:52.829668 MTRR: Fixed MSR 0x269 0x0606060606060606
1894 12:24:52.836224 MTRR: Fixed MSR 0x26a 0x0606060606060606
1895 12:24:52.839237 MTRR: Fixed MSR 0x26b 0x0606060606060606
1896 12:24:52.842877 MTRR: Fixed MSR 0x26c 0x0606060606060606
1897 12:24:52.845992 MTRR: Fixed MSR 0x26d 0x0606060606060606
1898 12:24:52.852953 MTRR: Fixed MSR 0x26e 0x0606060606060606
1899 12:24:52.856118 MTRR: Fixed MSR 0x26f 0x0606060606060606
1900 12:24:52.862726 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1901 12:24:52.862836 call enable_fixed_mtrr()
1902 12:24:52.868885 MTRR: Fixed MSR 0x250 0x0606060606060606
1903 12:24:52.872623 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 12:24:52.875677 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 12:24:52.878798 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 12:24:52.882349 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 12:24:52.888822 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 12:24:52.891842 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 12:24:52.895331 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 12:24:52.898681 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 12:24:52.905243 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 12:24:52.909010 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 12:24:52.912127 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 12:24:52.918673 MTRR: Fixed MSR 0x258 0x0606060606060606
1915 12:24:52.918774 call enable_fixed_mtrr()
1916 12:24:52.925440 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 12:24:52.928569 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 12:24:52.931642 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 12:24:52.935201 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 12:24:52.938155 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 12:24:52.944854 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 12:24:52.948509 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 12:24:52.951557 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 12:24:52.955041 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 12:24:52.961371 CPU physical address size: 39 bits
1926 12:24:52.961477 call enable_fixed_mtrr()
1927 12:24:52.968220 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 12:24:52.971269 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 12:24:52.974847 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 12:24:52.977595 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 12:24:52.984246 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 12:24:52.987708 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 12:24:52.990926 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 12:24:52.994058 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 12:24:53.000801 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 12:24:53.004436 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 12:24:53.007302 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 12:24:53.010752 MTRR: Fixed MSR 0x250 0x0606060606060606
1939 12:24:53.014361 call enable_fixed_mtrr()
1940 12:24:53.017428 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 12:24:53.023927 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 12:24:53.027112 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 12:24:53.030787 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 12:24:53.033822 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 12:24:53.040524 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 12:24:53.043609 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 12:24:53.047266 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 12:24:53.050831 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 12:24:53.056906 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 12:24:53.060475 CPU physical address size: 39 bits
1951 12:24:53.063950 call enable_fixed_mtrr()
1952 12:24:53.066748 CPU physical address size: 39 bits
1953 12:24:53.070486 CPU physical address size: 39 bits
1954 12:24:53.073544 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1955 12:24:53.076708 CPU physical address size: 39 bits
1956 12:24:53.080812 CBFS @ c08000 size 3f8000
1957 12:24:53.087292 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1958 12:24:53.090356 CBFS: Locating 'fallback/payload'
1959 12:24:53.093760 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 12:24:53.097145 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 12:24:53.103718 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 12:24:53.106770 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 12:24:53.110432 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 12:24:53.113520 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 12:24:53.120656 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 12:24:53.123581 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 12:24:53.127151 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 12:24:53.130063 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 12:24:53.133723 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 12:24:53.139956 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 12:24:53.143531 call enable_fixed_mtrr()
1972 12:24:53.147134 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 12:24:53.150139 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 12:24:53.153113 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 12:24:53.160142 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 12:24:53.163186 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 12:24:53.166824 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 12:24:53.169861 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 12:24:53.173203 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 12:24:53.180076 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 12:24:53.183086 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 12:24:53.186172 CPU physical address size: 39 bits
1983 12:24:53.189693 call enable_fixed_mtrr()
1984 12:24:53.193206 CBFS: Found @ offset 1c96c0 size 3f798
1985 12:24:53.196398 CPU physical address size: 39 bits
1986 12:24:53.203082 Checking segment from ROM address 0xffdd16f8
1987 12:24:53.206372 Checking segment from ROM address 0xffdd1714
1988 12:24:53.209399 Loading segment from ROM address 0xffdd16f8
1989 12:24:53.213077 code (compression=0)
1990 12:24:53.222735 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 12:24:53.229242 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 12:24:53.232231 it's not compressed!
1993 12:24:53.324267 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 12:24:53.330777 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 12:24:53.333887 Loading segment from ROM address 0xffdd1714
1996 12:24:53.337438 Entry Point 0x30000000
1997 12:24:53.340481 Loaded segments
1998 12:24:53.345978 Finalizing chipset.
1999 12:24:53.349726 Finalizing SMM.
2000 12:24:53.352725 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 12:24:53.356309 mp_park_aps done after 0 msecs.
2002 12:24:53.362935 Jumping to boot code at 30000000(99b62000)
2003 12:24:53.369173 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 12:24:53.369258
2005 12:24:53.369391
2006 12:24:53.369481
2007 12:24:53.372745 Starting depthcharge on Helios...
2008 12:24:53.372843
2009 12:24:53.373249 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 12:24:53.373350 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 12:24:53.373434 Setting prompt string to ['hatch:']
2012 12:24:53.373512 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 12:24:53.382516 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 12:24:53.382623
2015 12:24:53.389459 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 12:24:53.389557
2017 12:24:53.396097 board_setup: Info: eMMC controller not present; skipping
2018 12:24:53.396180
2019 12:24:53.399297 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 12:24:53.399395
2021 12:24:53.405792 board_setup: Info: SDHCI controller not present; skipping
2022 12:24:53.405894
2023 12:24:53.412031 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 12:24:53.412129
2025 12:24:53.412190 Wipe memory regions:
2026 12:24:53.412253
2027 12:24:53.415760 [0x00000000001000, 0x000000000a0000)
2028 12:24:53.415885
2029 12:24:53.418757 [0x00000000100000, 0x00000030000000)
2030 12:24:53.485262
2031 12:24:53.488216 [0x00000030657430, 0x00000099a2c000)
2032 12:24:53.627202
2033 12:24:53.630858 [0x00000100000000, 0x0000045e800000)
2034 12:24:55.013274
2035 12:24:55.013444 R8152: Initializing
2036 12:24:55.013545
2037 12:24:55.016849 Version 9 (ocp_data = 6010)
2038 12:24:55.021168
2039 12:24:55.021270 R8152: Done initializing
2040 12:24:55.021362
2041 12:24:55.024277 Adding net device
2042 12:24:55.506794
2043 12:24:55.506964 R8152: Initializing
2044 12:24:55.507066
2045 12:24:55.509764 Version 6 (ocp_data = 5c30)
2046 12:24:55.509862
2047 12:24:55.513547 R8152: Done initializing
2048 12:24:55.513624
2049 12:24:55.516520 net_add_device: Attemp to include the same device
2050 12:24:55.520003
2051 12:24:55.526722 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 12:24:55.526833
2053 12:24:55.526930
2054 12:24:55.527019
2055 12:24:55.527335 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 12:24:55.627704 hatch: tftpboot 192.168.201.1 12217892/tftp-deploy-7tg1dx_2/kernel/bzImage 12217892/tftp-deploy-7tg1dx_2/kernel/cmdline 12217892/tftp-deploy-7tg1dx_2/ramdisk/ramdisk.cpio.gz
2058 12:24:55.627881 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 12:24:55.627998 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 12:24:55.632353 tftpboot 192.168.201.1 12217892/tftp-deploy-7tg1dx_2/kernel/bzIploy-7tg1dx_2/kernel/cmdline 12217892/tftp-deploy-7tg1dx_2/ramdisk/ramdisk.cpio.gz
2061 12:24:55.632465
2062 12:24:55.632562 Waiting for link
2063 12:24:55.833262
2064 12:24:55.833415 done.
2065 12:24:55.833550
2066 12:24:55.833639 MAC: 00:24:32:50:1a:5f
2067 12:24:55.833725
2068 12:24:55.836246 Sending DHCP discover... done.
2069 12:24:55.836321
2070 12:24:55.839816 Waiting for reply... done.
2071 12:24:55.839910
2072 12:24:55.842927 Sending DHCP request... done.
2073 12:24:55.843005
2074 12:24:55.846057 Waiting for reply... done.
2075 12:24:55.846161
2076 12:24:55.849777 My ip is 192.168.201.21
2077 12:24:55.849874
2078 12:24:55.852820 The DHCP server ip is 192.168.201.1
2079 12:24:55.852893
2080 12:24:55.859155 TFTP server IP predefined by user: 192.168.201.1
2081 12:24:55.859257
2082 12:24:55.866040 Bootfile predefined by user: 12217892/tftp-deploy-7tg1dx_2/kernel/bzImage
2083 12:24:55.866145
2084 12:24:55.869490 Sending tftp read request... done.
2085 12:24:55.869622
2086 12:24:55.872445 Waiting for the transfer...
2087 12:24:55.872546
2088 12:24:56.426868 00000000 ################################################################
2089 12:24:56.427044
2090 12:24:56.968560 00080000 ################################################################
2091 12:24:56.968803
2092 12:24:57.522828 00100000 ################################################################
2093 12:24:57.523004
2094 12:24:58.110930 00180000 ################################################################
2095 12:24:58.111131
2096 12:24:58.722782 00200000 ################################################################
2097 12:24:58.722991
2098 12:24:59.346386 00280000 ################################################################
2099 12:24:59.346546
2100 12:24:59.953460 00300000 ################################################################
2101 12:24:59.953638
2102 12:25:00.578280 00380000 ################################################################
2103 12:25:00.578456
2104 12:25:01.189276 00400000 ################################################################
2105 12:25:01.189445
2106 12:25:01.823929 00480000 ################################################################
2107 12:25:01.824136
2108 12:25:02.433409 00500000 ################################################################
2109 12:25:02.433565
2110 12:25:03.058663 00580000 ################################################################
2111 12:25:03.058821
2112 12:25:03.643351 00600000 ################################################################
2113 12:25:03.643511
2114 12:25:04.206538 00680000 ################################################################
2115 12:25:04.206715
2116 12:25:04.844971 00700000 ################################################################
2117 12:25:04.845156
2118 12:25:05.489209 00780000 ################################################################
2119 12:25:05.489390
2120 12:25:06.126360 00800000 ################################################################
2121 12:25:06.126547
2122 12:25:06.772264 00880000 ################################################################
2123 12:25:06.772447
2124 12:25:07.411994 00900000 ################################################################
2125 12:25:07.412171
2126 12:25:08.049044 00980000 ################################################################
2127 12:25:08.049194
2128 12:25:08.690187 00a00000 ################################################################
2129 12:25:08.690343
2130 12:25:09.326347 00a80000 ################################################################
2131 12:25:09.326506
2132 12:25:09.369794 00b00000 ##### done.
2133 12:25:09.369917
2134 12:25:09.372682 The bootfile was 11571200 bytes long.
2135 12:25:09.372771
2136 12:25:09.376249 Sending tftp read request... done.
2137 12:25:09.376339
2138 12:25:09.379199 Waiting for the transfer...
2139 12:25:09.379287
2140 12:25:09.992528 00000000 ################################################################
2141 12:25:09.992679
2142 12:25:10.568546 00080000 ################################################################
2143 12:25:10.568705
2144 12:25:11.158804 00100000 ################################################################
2145 12:25:11.158962
2146 12:25:11.783986 00180000 ################################################################
2147 12:25:11.784153
2148 12:25:12.398105 00200000 ################################################################
2149 12:25:12.398296
2150 12:25:13.016613 00280000 ################################################################
2151 12:25:13.016769
2152 12:25:13.600292 00300000 ################################################################
2153 12:25:13.600452
2154 12:25:14.142597 00380000 ################################################################
2155 12:25:14.142746
2156 12:25:14.682516 00400000 ################################################################
2157 12:25:14.682697
2158 12:25:15.214375 00480000 ################################################################
2159 12:25:15.214538
2160 12:25:15.778006 00500000 ################################################################
2161 12:25:15.778214
2162 12:25:16.344292 00580000 ################################################################
2163 12:25:16.344438
2164 12:25:16.462966 00600000 ############## done.
2165 12:25:16.463116
2166 12:25:16.466328 Sending tftp read request... done.
2167 12:25:16.466409
2168 12:25:16.469557 Waiting for the transfer...
2169 12:25:16.469636
2170 12:25:16.472690 00000000 # done.
2171 12:25:16.472776
2172 12:25:16.479193 Command line loaded dynamically from TFTP file: 12217892/tftp-deploy-7tg1dx_2/kernel/cmdline
2173 12:25:16.479276
2174 12:25:16.509045 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12217892/extract-nfsrootfs-sp22lct4,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2175 12:25:16.509143
2176 12:25:16.515761 ec_init(0): CrosEC protocol v3 supported (256, 256)
2177 12:25:16.520129
2178 12:25:16.523789 Shutting down all USB controllers.
2179 12:25:16.523898
2180 12:25:16.523993 Removing current net device
2181 12:25:16.527397
2182 12:25:16.527520 Finalizing coreboot
2183 12:25:16.527624
2184 12:25:16.534098 Exiting depthcharge with code 4 at timestamp: 30524836
2185 12:25:16.534219
2186 12:25:16.534332
2187 12:25:16.534428 Starting kernel ...
2188 12:25:16.534534
2189 12:25:16.534638
2190 12:25:16.535287 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2191 12:25:16.535423 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2192 12:25:16.535535 Setting prompt string to ['Linux version [0-9]']
2193 12:25:16.535638 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2194 12:25:16.535748 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2196 12:29:35.535700 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2198 12:29:35.536015 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2200 12:29:35.536281 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2203 12:29:35.536679 end: 2 depthcharge-action (duration 00:05:00) [common]
2205 12:29:35.537018 Cleaning after the job
2206 12:29:35.537138 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217892/tftp-deploy-7tg1dx_2/ramdisk
2207 12:29:35.538153 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217892/tftp-deploy-7tg1dx_2/kernel
2208 12:29:35.540030 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217892/tftp-deploy-7tg1dx_2/nfsrootfs
2209 12:29:35.662056 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12217892/tftp-deploy-7tg1dx_2/modules
2210 12:29:35.662801 start: 4.1 power-off (timeout 00:00:30) [common]
2211 12:29:35.663094 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2212 12:29:35.744993 >> Command sent successfully.
2213 12:29:35.755659 Returned 0 in 0 seconds
2214 12:29:35.857145 end: 4.1 power-off (duration 00:00:00) [common]
2216 12:29:35.859381 start: 4.2 read-feedback (timeout 00:10:00) [common]
2217 12:29:35.860913 Listened to connection for namespace 'common' for up to 1s
2219 12:29:35.862672 Listened to connection for namespace 'common' for up to 1s
2220 12:29:36.861248 Finalising connection for namespace 'common'
2221 12:29:36.861432 Disconnecting from shell: Finalise
2222 12:29:36.861535
2223 12:29:36.961890 end: 4.2 read-feedback (duration 00:00:01) [common]
2224 12:29:36.962060 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12217892
2225 12:29:37.502011 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12217892
2226 12:29:37.502212 JobError: Your job cannot terminate cleanly.