Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 13:12:30.763945 lava-dispatcher, installed at version: 2023.10
2 13:12:30.764167 start: 0 validate
3 13:12:30.764339 Start time: 2024-01-08 13:12:30.764332+00:00 (UTC)
4 13:12:30.764469 Using caching service: 'http://localhost/cache/?uri=%s'
5 13:12:30.764609 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 13:12:31.022598 Using caching service: 'http://localhost/cache/?uri=%s'
7 13:12:31.022824 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-289-gad0914f265af%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 13:12:31.024460 Using caching service: 'http://localhost/cache/?uri=%s'
9 13:12:31.024573 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 13:12:31.290164 Using caching service: 'http://localhost/cache/?uri=%s'
11 13:12:31.290334 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.299-cip105-289-gad0914f265af%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 13:12:31.292755 validate duration: 0.53
14 13:12:31.293058 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 13:12:31.293158 start: 1.1 download-retry (timeout 00:10:00) [common]
16 13:12:31.293246 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 13:12:31.293377 Not decompressing ramdisk as can be used compressed.
18 13:12:31.293491 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 13:12:31.293582 saving as /var/lib/lava/dispatcher/tmp/12482791/tftp-deploy-yzs36x_9/ramdisk/initrd.cpio.gz
20 13:12:31.293646 total size: 5432690 (5 MB)
21 13:12:31.295273 progress 0 % (0 MB)
22 13:12:31.297119 progress 5 % (0 MB)
23 13:12:31.298654 progress 10 % (0 MB)
24 13:12:31.300374 progress 15 % (0 MB)
25 13:12:31.302024 progress 20 % (1 MB)
26 13:12:31.303538 progress 25 % (1 MB)
27 13:12:31.305089 progress 30 % (1 MB)
28 13:12:31.306720 progress 35 % (1 MB)
29 13:12:31.308291 progress 40 % (2 MB)
30 13:12:31.309874 progress 45 % (2 MB)
31 13:12:31.311417 progress 50 % (2 MB)
32 13:12:31.313221 progress 55 % (2 MB)
33 13:12:31.314872 progress 60 % (3 MB)
34 13:12:31.316556 progress 65 % (3 MB)
35 13:12:31.318170 progress 70 % (3 MB)
36 13:12:31.319708 progress 75 % (3 MB)
37 13:12:31.321188 progress 80 % (4 MB)
38 13:12:31.322610 progress 85 % (4 MB)
39 13:12:31.324158 progress 90 % (4 MB)
40 13:12:31.325606 progress 95 % (4 MB)
41 13:12:31.327015 progress 100 % (5 MB)
42 13:12:31.327261 5 MB downloaded in 0.03 s (154.12 MB/s)
43 13:12:31.327446 end: 1.1.1 http-download (duration 00:00:00) [common]
45 13:12:31.327737 end: 1.1 download-retry (duration 00:00:00) [common]
46 13:12:31.327859 start: 1.2 download-retry (timeout 00:10:00) [common]
47 13:12:31.327957 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 13:12:31.328079 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-289-gad0914f265af/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 13:12:31.328154 saving as /var/lib/lava/dispatcher/tmp/12482791/tftp-deploy-yzs36x_9/kernel/bzImage
50 13:12:31.328213 total size: 11575296 (11 MB)
51 13:12:31.328273 No compression specified
52 13:12:31.329467 progress 0 % (0 MB)
53 13:12:31.332681 progress 5 % (0 MB)
54 13:12:31.335932 progress 10 % (1 MB)
55 13:12:31.339158 progress 15 % (1 MB)
56 13:12:31.342728 progress 20 % (2 MB)
57 13:12:31.346128 progress 25 % (2 MB)
58 13:12:31.349456 progress 30 % (3 MB)
59 13:12:31.352970 progress 35 % (3 MB)
60 13:12:31.356474 progress 40 % (4 MB)
61 13:12:31.359657 progress 45 % (4 MB)
62 13:12:31.362967 progress 50 % (5 MB)
63 13:12:31.366284 progress 55 % (6 MB)
64 13:12:31.369420 progress 60 % (6 MB)
65 13:12:31.372770 progress 65 % (7 MB)
66 13:12:31.376081 progress 70 % (7 MB)
67 13:12:31.379214 progress 75 % (8 MB)
68 13:12:31.382506 progress 80 % (8 MB)
69 13:12:31.385815 progress 85 % (9 MB)
70 13:12:31.388890 progress 90 % (9 MB)
71 13:12:31.392091 progress 95 % (10 MB)
72 13:12:31.395530 progress 100 % (11 MB)
73 13:12:31.395737 11 MB downloaded in 0.07 s (163.50 MB/s)
74 13:12:31.395923 end: 1.2.1 http-download (duration 00:00:00) [common]
76 13:12:31.396226 end: 1.2 download-retry (duration 00:00:00) [common]
77 13:12:31.396356 start: 1.3 download-retry (timeout 00:10:00) [common]
78 13:12:31.396447 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 13:12:31.396587 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 13:12:31.396656 saving as /var/lib/lava/dispatcher/tmp/12482791/tftp-deploy-yzs36x_9/nfsrootfs/full.rootfs.tar
81 13:12:31.396717 total size: 133380384 (127 MB)
82 13:12:31.396780 Using unxz to decompress xz
83 13:12:31.401193 progress 0 % (0 MB)
84 13:12:31.801246 progress 5 % (6 MB)
85 13:12:32.168771 progress 10 % (12 MB)
86 13:12:32.464228 progress 15 % (19 MB)
87 13:12:32.657411 progress 20 % (25 MB)
88 13:12:32.913901 progress 25 % (31 MB)
89 13:12:33.268276 progress 30 % (38 MB)
90 13:12:33.618676 progress 35 % (44 MB)
91 13:12:34.025620 progress 40 % (50 MB)
92 13:12:34.417231 progress 45 % (57 MB)
93 13:12:34.782438 progress 50 % (63 MB)
94 13:12:35.163429 progress 55 % (69 MB)
95 13:12:35.531585 progress 60 % (76 MB)
96 13:12:35.902338 progress 65 % (82 MB)
97 13:12:36.279890 progress 70 % (89 MB)
98 13:12:36.652624 progress 75 % (95 MB)
99 13:12:37.098075 progress 80 % (101 MB)
100 13:12:37.537953 progress 85 % (108 MB)
101 13:12:37.816104 progress 90 % (114 MB)
102 13:12:38.178560 progress 95 % (120 MB)
103 13:12:38.579377 progress 100 % (127 MB)
104 13:12:38.584822 127 MB downloaded in 7.19 s (17.70 MB/s)
105 13:12:38.585103 end: 1.3.1 http-download (duration 00:00:07) [common]
107 13:12:38.585408 end: 1.3 download-retry (duration 00:00:07) [common]
108 13:12:38.585513 start: 1.4 download-retry (timeout 00:09:53) [common]
109 13:12:38.585618 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 13:12:38.585790 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.299-cip105-289-gad0914f265af/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 13:12:38.585895 saving as /var/lib/lava/dispatcher/tmp/12482791/tftp-deploy-yzs36x_9/modules/modules.tar
112 13:12:38.585995 total size: 484468 (0 MB)
113 13:12:38.586101 Using unxz to decompress xz
114 13:12:38.590470 progress 6 % (0 MB)
115 13:12:38.590900 progress 13 % (0 MB)
116 13:12:38.591149 progress 20 % (0 MB)
117 13:12:38.592820 progress 27 % (0 MB)
118 13:12:38.594818 progress 33 % (0 MB)
119 13:12:38.596740 progress 40 % (0 MB)
120 13:12:38.598669 progress 47 % (0 MB)
121 13:12:38.600598 progress 54 % (0 MB)
122 13:12:38.602566 progress 60 % (0 MB)
123 13:12:38.604612 progress 67 % (0 MB)
124 13:12:38.606679 progress 74 % (0 MB)
125 13:12:38.608756 progress 81 % (0 MB)
126 13:12:38.610679 progress 87 % (0 MB)
127 13:12:38.612659 progress 94 % (0 MB)
128 13:12:38.615084 progress 100 % (0 MB)
129 13:12:38.621644 0 MB downloaded in 0.04 s (12.96 MB/s)
130 13:12:38.621916 end: 1.4.1 http-download (duration 00:00:00) [common]
132 13:12:38.622184 end: 1.4 download-retry (duration 00:00:00) [common]
133 13:12:38.622276 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 13:12:38.622373 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 13:12:40.862617 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12482791/extract-nfsrootfs-jlk4vll6
136 13:12:40.862805 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 13:12:40.862909 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 13:12:40.863071 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn
139 13:12:40.863207 makedir: /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin
140 13:12:40.863312 makedir: /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/tests
141 13:12:40.863414 makedir: /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/results
142 13:12:40.863517 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-add-keys
143 13:12:40.863667 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-add-sources
144 13:12:40.863807 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-background-process-start
145 13:12:40.863943 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-background-process-stop
146 13:12:40.864076 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-common-functions
147 13:12:40.864207 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-echo-ipv4
148 13:12:40.864343 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-install-packages
149 13:12:40.864478 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-installed-packages
150 13:12:40.864607 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-os-build
151 13:12:40.864738 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-probe-channel
152 13:12:40.864869 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-probe-ip
153 13:12:40.864998 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-target-ip
154 13:12:40.865127 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-target-mac
155 13:12:40.865256 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-target-storage
156 13:12:40.865387 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-test-case
157 13:12:40.865519 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-test-event
158 13:12:40.865649 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-test-feedback
159 13:12:40.865780 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-test-raise
160 13:12:40.865911 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-test-reference
161 13:12:40.866041 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-test-runner
162 13:12:40.866171 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-test-set
163 13:12:40.866300 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-test-shell
164 13:12:40.866432 Updating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-install-packages (oe)
165 13:12:40.866591 Updating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/bin/lava-installed-packages (oe)
166 13:12:40.866725 Creating /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/environment
167 13:12:40.866825 LAVA metadata
168 13:12:40.866900 - LAVA_JOB_ID=12482791
169 13:12:40.866965 - LAVA_DISPATCHER_IP=192.168.201.1
170 13:12:40.867069 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 13:12:40.867142 skipped lava-vland-overlay
172 13:12:40.867219 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 13:12:40.867300 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 13:12:40.867363 skipped lava-multinode-overlay
175 13:12:40.867437 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 13:12:40.867518 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 13:12:40.867592 Loading test definitions
178 13:12:40.867684 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
179 13:12:40.867757 Using /lava-12482791 at stage 0
180 13:12:40.868071 uuid=12482791_1.5.2.3.1 testdef=None
181 13:12:40.868160 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 13:12:40.868247 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
183 13:12:40.868829 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 13:12:40.869050 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
186 13:12:40.869703 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 13:12:40.869936 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
189 13:12:40.870567 runner path: /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/0/tests/0_dmesg test_uuid 12482791_1.5.2.3.1
190 13:12:40.870727 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 13:12:40.870955 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
193 13:12:40.871028 Using /lava-12482791 at stage 1
194 13:12:40.871340 uuid=12482791_1.5.2.3.5 testdef=None
195 13:12:40.871430 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 13:12:40.871515 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
197 13:12:40.871990 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 13:12:40.872205 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
200 13:12:40.872868 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 13:12:40.873098 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
203 13:12:40.873739 runner path: /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/1/tests/1_bootrr test_uuid 12482791_1.5.2.3.5
204 13:12:40.873894 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 13:12:40.874102 Creating lava-test-runner.conf files
207 13:12:40.874166 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/0 for stage 0
208 13:12:40.874257 - 0_dmesg
209 13:12:40.874338 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12482791/lava-overlay-t4kmvtrn/lava-12482791/1 for stage 1
210 13:12:40.874432 - 1_bootrr
211 13:12:40.874530 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 13:12:40.874616 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
213 13:12:40.882366 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 13:12:40.882492 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
215 13:12:40.882579 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 13:12:40.882666 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 13:12:40.882750 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
218 13:12:41.028600 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 13:12:41.028982 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
220 13:12:41.029098 extracting modules file /var/lib/lava/dispatcher/tmp/12482791/tftp-deploy-yzs36x_9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12482791/extract-nfsrootfs-jlk4vll6
221 13:12:41.049881 extracting modules file /var/lib/lava/dispatcher/tmp/12482791/tftp-deploy-yzs36x_9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12482791/extract-overlay-ramdisk-3eqj73cc/ramdisk
222 13:12:41.070747 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 13:12:41.070901 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
224 13:12:41.070990 [common] Applying overlay to NFS
225 13:12:41.071059 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12482791/compress-overlay-3r6cfnk1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12482791/extract-nfsrootfs-jlk4vll6
226 13:12:41.079151 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 13:12:41.079272 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
228 13:12:41.079365 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 13:12:41.079458 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
230 13:12:41.079538 Building ramdisk /var/lib/lava/dispatcher/tmp/12482791/extract-overlay-ramdisk-3eqj73cc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12482791/extract-overlay-ramdisk-3eqj73cc/ramdisk
231 13:12:41.161484 >> 30353 blocks
232 13:12:41.777712 rename /var/lib/lava/dispatcher/tmp/12482791/extract-overlay-ramdisk-3eqj73cc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12482791/tftp-deploy-yzs36x_9/ramdisk/ramdisk.cpio.gz
233 13:12:41.778157 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 13:12:41.778315 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
235 13:12:41.778443 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
236 13:12:41.778550 No mkimage arch provided, not using FIT.
237 13:12:41.778639 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 13:12:41.778723 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 13:12:41.778830 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
240 13:12:41.778917 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
241 13:12:41.778995 No LXC device requested
242 13:12:41.779081 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 13:12:41.779176 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
244 13:12:41.779263 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 13:12:41.779339 Checking files for TFTP limit of 4294967296 bytes.
246 13:12:41.779752 end: 1 tftp-deploy (duration 00:00:10) [common]
247 13:12:41.779854 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 13:12:41.779945 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 13:12:41.780066 substitutions:
250 13:12:41.780132 - {DTB}: None
251 13:12:41.780193 - {INITRD}: 12482791/tftp-deploy-yzs36x_9/ramdisk/ramdisk.cpio.gz
252 13:12:41.780253 - {KERNEL}: 12482791/tftp-deploy-yzs36x_9/kernel/bzImage
253 13:12:41.780356 - {LAVA_MAC}: None
254 13:12:41.780415 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12482791/extract-nfsrootfs-jlk4vll6
255 13:12:41.780472 - {NFS_SERVER_IP}: 192.168.201.1
256 13:12:41.780528 - {PRESEED_CONFIG}: None
257 13:12:41.780584 - {PRESEED_LOCAL}: None
258 13:12:41.780638 - {RAMDISK}: 12482791/tftp-deploy-yzs36x_9/ramdisk/ramdisk.cpio.gz
259 13:12:41.780693 - {ROOT_PART}: None
260 13:12:41.780749 - {ROOT}: None
261 13:12:41.780810 - {SERVER_IP}: 192.168.201.1
262 13:12:41.780894 - {TEE}: None
263 13:12:41.781034 Parsed boot commands:
264 13:12:41.781092 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 13:12:41.781315 Parsed boot commands: tftpboot 192.168.201.1 12482791/tftp-deploy-yzs36x_9/kernel/bzImage 12482791/tftp-deploy-yzs36x_9/kernel/cmdline 12482791/tftp-deploy-yzs36x_9/ramdisk/ramdisk.cpio.gz
266 13:12:41.781407 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 13:12:41.781525 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 13:12:41.781636 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 13:12:41.781759 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 13:12:41.781864 Not connected, no need to disconnect.
271 13:12:41.781938 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 13:12:41.782022 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 13:12:41.782105 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
274 13:12:41.786356 Setting prompt string to ['lava-test: # ']
275 13:12:41.786783 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 13:12:41.786905 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 13:12:41.787003 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 13:12:41.787123 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 13:12:41.787690 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
280 13:12:46.922546 >> Command sent successfully.
281 13:12:46.925505 Returned 0 in 5 seconds
282 13:12:47.025910 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 13:12:47.026405 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 13:12:47.026541 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 13:12:47.026662 Setting prompt string to 'Starting depthcharge on Helios...'
287 13:12:47.026760 Changing prompt to 'Starting depthcharge on Helios...'
288 13:12:47.026861 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 13:12:47.027231 [Enter `^Ec?' for help]
290 13:12:47.646669
291 13:12:47.646826
292 13:12:47.657414 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 13:12:47.661083 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 13:12:47.664867 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 13:12:47.671444 CPU: AES supported, TXT NOT supported, VT supported
296 13:12:47.674538 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 13:12:47.681433 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 13:12:47.688231 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 13:12:47.691416 VBOOT: Loading verstage.
300 13:12:47.695293 FMAP: Found "FLASH" version 1.1 at 0xc04000.
301 13:12:47.701834 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 13:12:47.704946 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 13:12:47.708018 CBFS @ c08000 size 3f8000
304 13:12:47.714785 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 13:12:47.717771 CBFS: Locating 'fallback/verstage'
306 13:12:47.721521 CBFS: Found @ offset 10fb80 size 1072c
307 13:12:47.721636
308 13:12:47.721707
309 13:12:47.734846 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 13:12:47.747815 Probing TPM: . done!
311 13:12:47.751755 TPM ready after 0 ms
312 13:12:47.754890 Connected to device vid:did:rid of 1ae0:0028:00
313 13:12:47.764891 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
314 13:12:47.768225 Initialized TPM device CR50 revision 0
315 13:12:47.812844 tlcl_send_startup: Startup return code is 0
316 13:12:47.812978 TPM: setup succeeded
317 13:12:47.825809 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 13:12:47.829544 Chrome EC: UHEPI supported
319 13:12:47.832681 Phase 1
320 13:12:47.835680 FMAP: area GBB found @ c05000 (12288 bytes)
321 13:12:47.842419 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 13:12:47.842540 Phase 2
323 13:12:47.846014 Phase 3
324 13:12:47.849419 FMAP: area GBB found @ c05000 (12288 bytes)
325 13:12:47.856239 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 13:12:47.862562 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
327 13:12:47.865764 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
328 13:12:47.872428 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 13:12:47.887883 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
330 13:12:47.891298 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
331 13:12:47.897859 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 13:12:47.902250 Phase 4
333 13:12:47.905671 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
334 13:12:47.911950 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 13:12:48.091870 VB2:vb2_rsa_verify_digest() Digest check failed!
336 13:12:48.098198 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
337 13:12:48.098330 Saving nvdata
338 13:12:48.101650 Reboot requested (10020007)
339 13:12:48.104990 board_reset() called!
340 13:12:48.105102 full_reset() called!
341 13:12:52.613803
342 13:12:52.613945
343 13:12:52.623947 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
344 13:12:52.627100 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
345 13:12:52.633696 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
346 13:12:52.636760 CPU: AES supported, TXT NOT supported, VT supported
347 13:12:52.643493 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
348 13:12:52.646886 PCH: device id 0284 (rev 00) is Cometlake-U Premium
349 13:12:52.653586 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
350 13:12:52.657148 VBOOT: Loading verstage.
351 13:12:52.660497 FMAP: Found "FLASH" version 1.1 at 0xc04000.
352 13:12:52.666937 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
353 13:12:52.670068 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
354 13:12:52.673559 CBFS @ c08000 size 3f8000
355 13:12:52.680618 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
356 13:12:52.683616 CBFS: Locating 'fallback/verstage'
357 13:12:52.686912 CBFS: Found @ offset 10fb80 size 1072c
358 13:12:52.690228
359 13:12:52.690313
360 13:12:52.699939 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
361 13:12:52.714754 Probing TPM: . done!
362 13:12:52.718009 TPM ready after 0 ms
363 13:12:52.721133 Connected to device vid:did:rid of 1ae0:0028:00
364 13:12:52.731540 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
365 13:12:52.734967 Initialized TPM device CR50 revision 0
366 13:12:52.779271 tlcl_send_startup: Startup return code is 0
367 13:12:52.779398 TPM: setup succeeded
368 13:12:52.792570 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
369 13:12:52.795742 Chrome EC: UHEPI supported
370 13:12:52.799037 Phase 1
371 13:12:52.802311 FMAP: area GBB found @ c05000 (12288 bytes)
372 13:12:52.809048 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
373 13:12:52.816160 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
374 13:12:52.819337 Recovery requested (1009000e)
375 13:12:52.824565 Saving nvdata
376 13:12:52.830865 tlcl_extend: response is 0
377 13:12:52.839773 tlcl_extend: response is 0
378 13:12:52.847021 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 13:12:52.850126 CBFS @ c08000 size 3f8000
380 13:12:52.856569 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 13:12:52.859857 CBFS: Locating 'fallback/romstage'
382 13:12:52.862978 CBFS: Found @ offset 80 size 145fc
383 13:12:52.866231 Accumulated console time in verstage 98 ms
384 13:12:52.866317
385 13:12:52.866383
386 13:12:52.879679 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
387 13:12:52.886255 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
388 13:12:52.889698 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
389 13:12:52.893094 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
390 13:12:52.899760 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
391 13:12:52.903285 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
392 13:12:52.906749 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
393 13:12:52.909901 TCO_STS: 0000 0000
394 13:12:52.913191 GEN_PMCON: e0015238 00000200
395 13:12:52.916205 GBLRST_CAUSE: 00000000 00000000
396 13:12:52.916360 prev_sleep_state 5
397 13:12:52.919334 Boot Count incremented to 3443
398 13:12:52.926526 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 13:12:52.929648 CBFS @ c08000 size 3f8000
400 13:12:52.936246 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 13:12:52.936400 CBFS: Locating 'fspm.bin'
402 13:12:52.942578 CBFS: Found @ offset 5ffc0 size 71000
403 13:12:52.946134 Chrome EC: UHEPI supported
404 13:12:52.952881 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
405 13:12:52.956027 Probing TPM: done!
406 13:12:52.962811 Connected to device vid:did:rid of 1ae0:0028:00
407 13:12:52.972850 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
408 13:12:52.978668 Initialized TPM device CR50 revision 0
409 13:12:52.987617 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
410 13:12:52.994130 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
411 13:12:52.997491 MRC cache found, size 1948
412 13:12:53.000948 bootmode is set to: 2
413 13:12:53.003953 PRMRR disabled by config.
414 13:12:53.004039 SPD INDEX = 1
415 13:12:53.011005 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
416 13:12:53.013685 CBFS @ c08000 size 3f8000
417 13:12:53.020970 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
418 13:12:53.021072 CBFS: Locating 'spd.bin'
419 13:12:53.024048 CBFS: Found @ offset 5fb80 size 400
420 13:12:53.027230 SPD: module type is LPDDR3
421 13:12:53.030895 SPD: module part is
422 13:12:53.037474 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
423 13:12:53.040491 SPD: device width 4 bits, bus width 8 bits
424 13:12:53.043733 SPD: module size is 4096 MB (per channel)
425 13:12:53.046978 memory slot: 0 configuration done.
426 13:12:53.050189 memory slot: 2 configuration done.
427 13:12:53.101798 CBMEM:
428 13:12:53.104966 IMD: root @ 99fff000 254 entries.
429 13:12:53.108260 IMD: root @ 99ffec00 62 entries.
430 13:12:53.111963 External stage cache:
431 13:12:53.115026 IMD: root @ 9abff000 254 entries.
432 13:12:53.118630 IMD: root @ 9abfec00 62 entries.
433 13:12:53.121659 Chrome EC: clear events_b mask to 0x0000000020004000
434 13:12:53.137742 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
435 13:12:53.151230 tlcl_write: response is 0
436 13:12:53.160233 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
437 13:12:53.167036 MRC: TPM MRC hash updated successfully.
438 13:12:53.167460 2 DIMMs found
439 13:12:53.170068 SMM Memory Map
440 13:12:53.173257 SMRAM : 0x9a000000 0x1000000
441 13:12:53.177190 Subregion 0: 0x9a000000 0xa00000
442 13:12:53.180381 Subregion 1: 0x9aa00000 0x200000
443 13:12:53.183754 Subregion 2: 0x9ac00000 0x400000
444 13:12:53.186800 top_of_ram = 0x9a000000
445 13:12:53.189954 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
446 13:12:53.196476 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
447 13:12:53.200359 MTRR Range: Start=ff000000 End=0 (Size 1000000)
448 13:12:53.206938 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 13:12:53.210231 CBFS @ c08000 size 3f8000
450 13:12:53.213645 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 13:12:53.216613 CBFS: Locating 'fallback/postcar'
452 13:12:53.219919 CBFS: Found @ offset 107000 size 4b44
453 13:12:53.226419 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
454 13:12:53.238946 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
455 13:12:53.241938 Processing 180 relocs. Offset value of 0x97c0c000
456 13:12:53.250643 Accumulated console time in romstage 285 ms
457 13:12:53.251187
458 13:12:53.251504
459 13:12:53.260257 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
460 13:12:53.266906 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
461 13:12:53.269821 CBFS @ c08000 size 3f8000
462 13:12:53.273434 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
463 13:12:53.280250 CBFS: Locating 'fallback/ramstage'
464 13:12:53.283168 CBFS: Found @ offset 43380 size 1b9e8
465 13:12:53.289722 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
466 13:12:53.321414 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
467 13:12:53.325403 Processing 3976 relocs. Offset value of 0x98db0000
468 13:12:53.331881 Accumulated console time in postcar 52 ms
469 13:12:53.331972
470 13:12:53.332039
471 13:12:53.342041 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
472 13:12:53.348213 FMAP: area RO_VPD found @ c00000 (16384 bytes)
473 13:12:53.352042 WARNING: RO_VPD is uninitialized or empty.
474 13:12:53.355109 FMAP: area RW_VPD found @ af8000 (8192 bytes)
475 13:12:53.361874 FMAP: area RW_VPD found @ af8000 (8192 bytes)
476 13:12:53.361966 Normal boot.
477 13:12:53.368052 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
478 13:12:53.371686 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 13:12:53.375107 CBFS @ c08000 size 3f8000
480 13:12:53.381223 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 13:12:53.384540 CBFS: Locating 'cpu_microcode_blob.bin'
482 13:12:53.388129 CBFS: Found @ offset 14700 size 2ec00
483 13:12:53.391540 microcode: sig=0x806ec pf=0x4 revision=0xc9
484 13:12:53.394426 Skip microcode update
485 13:12:53.401609 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 13:12:53.401702 CBFS @ c08000 size 3f8000
487 13:12:53.407925 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 13:12:53.411222 CBFS: Locating 'fsps.bin'
489 13:12:53.414555 CBFS: Found @ offset d1fc0 size 35000
490 13:12:53.439553 Detected 4 core, 8 thread CPU.
491 13:12:53.443610 Setting up SMI for CPU
492 13:12:53.446864 IED base = 0x9ac00000
493 13:12:53.446949 IED size = 0x00400000
494 13:12:53.450001 Will perform SMM setup.
495 13:12:53.456526 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
496 13:12:53.463106 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
497 13:12:53.466266 Processing 16 relocs. Offset value of 0x00030000
498 13:12:53.469961 Attempting to start 7 APs
499 13:12:53.473722 Waiting for 10ms after sending INIT.
500 13:12:53.489460 Waiting for 1st SIPI to complete...AP: slot 4 apic_id 1.
501 13:12:53.489623 done.
502 13:12:53.493145 AP: slot 6 apic_id 3.
503 13:12:53.496023 AP: slot 1 apic_id 2.
504 13:12:53.499323 Waiting for 2nd SIPI to complete...done.
505 13:12:53.503237 AP: slot 7 apic_id 6.
506 13:12:53.503385 AP: slot 3 apic_id 7.
507 13:12:53.506233 AP: slot 2 apic_id 4.
508 13:12:53.509231 AP: slot 5 apic_id 5.
509 13:12:53.516003 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
510 13:12:53.522462 Processing 13 relocs. Offset value of 0x00038000
511 13:12:53.526049 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
512 13:12:53.532922 Installing SMM handler to 0x9a000000
513 13:12:53.539390 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
514 13:12:53.542735 Processing 658 relocs. Offset value of 0x9a010000
515 13:12:53.552970 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
516 13:12:53.556197 Processing 13 relocs. Offset value of 0x9a008000
517 13:12:53.562704 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
518 13:12:53.569240 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
519 13:12:53.572530 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
520 13:12:53.579176 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
521 13:12:53.586065 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
522 13:12:53.592712 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
523 13:12:53.595723 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
524 13:12:53.602245 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
525 13:12:53.606210 Clearing SMI status registers
526 13:12:53.609359 SMI_STS: PM1
527 13:12:53.609872 PM1_STS: PWRBTN
528 13:12:53.612500 TCO_STS: SECOND_TO
529 13:12:53.615908 New SMBASE 0x9a000000
530 13:12:53.619117 In relocation handler: CPU 0
531 13:12:53.622124 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
532 13:12:53.625870 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 13:12:53.628904 Relocation complete.
534 13:12:53.631953 New SMBASE 0x99fff000
535 13:12:53.635537 In relocation handler: CPU 4
536 13:12:53.638585 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
537 13:12:53.641922 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 13:12:53.645516 Relocation complete.
539 13:12:53.648886 New SMBASE 0x99ffe400
540 13:12:53.648972 In relocation handler: CPU 7
541 13:12:53.655547 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
542 13:12:53.659041 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 13:12:53.662526 Relocation complete.
544 13:12:53.662636 New SMBASE 0x99fff400
545 13:12:53.665514 In relocation handler: CPU 3
546 13:12:53.672240 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
547 13:12:53.674946 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 13:12:53.678414 Relocation complete.
549 13:12:53.678500 New SMBASE 0x99fff800
550 13:12:53.682294 In relocation handler: CPU 2
551 13:12:53.688550 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
552 13:12:53.691907 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 13:12:53.695252 Relocation complete.
554 13:12:53.695396 New SMBASE 0x99ffec00
555 13:12:53.698440 In relocation handler: CPU 5
556 13:12:53.701615 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
557 13:12:53.708198 Writing SMRR. base = 0x9a000006, mask=0xff000800
558 13:12:53.711628 Relocation complete.
559 13:12:53.711711 New SMBASE 0x99ffe800
560 13:12:53.715205 In relocation handler: CPU 6
561 13:12:53.718317 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
562 13:12:53.724695 Writing SMRR. base = 0x9a000006, mask=0xff000800
563 13:12:53.728497 Relocation complete.
564 13:12:53.728584 New SMBASE 0x99fffc00
565 13:12:53.731425 In relocation handler: CPU 1
566 13:12:53.734797 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
567 13:12:53.741568 Writing SMRR. base = 0x9a000006, mask=0xff000800
568 13:12:53.741654 Relocation complete.
569 13:12:53.744619 Initializing CPU #0
570 13:12:53.747961 CPU: vendor Intel device 806ec
571 13:12:53.751609 CPU: family 06, model 8e, stepping 0c
572 13:12:53.754558 Clearing out pending MCEs
573 13:12:53.758081 Setting up local APIC...
574 13:12:53.758188 apic_id: 0x00 done.
575 13:12:53.761586 Turbo is available but hidden
576 13:12:53.764484 Turbo is available and visible
577 13:12:53.768076 VMX status: enabled
578 13:12:53.771418 IA32_FEATURE_CONTROL status: locked
579 13:12:53.774761 Skip microcode update
580 13:12:53.774846 CPU #0 initialized
581 13:12:53.778103 Initializing CPU #4
582 13:12:53.781554 Initializing CPU #1
583 13:12:53.781639 Initializing CPU #6
584 13:12:53.784809 CPU: vendor Intel device 806ec
585 13:12:53.788126 CPU: family 06, model 8e, stepping 0c
586 13:12:53.791101 CPU: vendor Intel device 806ec
587 13:12:53.794193 CPU: family 06, model 8e, stepping 0c
588 13:12:53.797657 Clearing out pending MCEs
589 13:12:53.800868 Clearing out pending MCEs
590 13:12:53.804261 Setting up local APIC...
591 13:12:53.804389 Initializing CPU #3
592 13:12:53.807920 Initializing CPU #7
593 13:12:53.811437 CPU: vendor Intel device 806ec
594 13:12:53.814083 CPU: family 06, model 8e, stepping 0c
595 13:12:53.817289 CPU: vendor Intel device 806ec
596 13:12:53.821203 CPU: family 06, model 8e, stepping 0c
597 13:12:53.824585 Clearing out pending MCEs
598 13:12:53.827775 Clearing out pending MCEs
599 13:12:53.827860 Setting up local APIC...
600 13:12:53.830851 Setting up local APIC...
601 13:12:53.834468 CPU: vendor Intel device 806ec
602 13:12:53.837676 CPU: family 06, model 8e, stepping 0c
603 13:12:53.841153 Clearing out pending MCEs
604 13:12:53.844239 Setting up local APIC...
605 13:12:53.844360 Initializing CPU #5
606 13:12:53.847229 Initializing CPU #2
607 13:12:53.850641 CPU: vendor Intel device 806ec
608 13:12:53.854014 CPU: family 06, model 8e, stepping 0c
609 13:12:53.857690 CPU: vendor Intel device 806ec
610 13:12:53.861080 CPU: family 06, model 8e, stepping 0c
611 13:12:53.864449 Clearing out pending MCEs
612 13:12:53.867538 Clearing out pending MCEs
613 13:12:53.870823 Setting up local APIC...
614 13:12:53.870910 apic_id: 0x06 done.
615 13:12:53.873876 apic_id: 0x07 done.
616 13:12:53.877025 VMX status: enabled
617 13:12:53.877109 VMX status: enabled
618 13:12:53.880621 IA32_FEATURE_CONTROL status: locked
619 13:12:53.884050 IA32_FEATURE_CONTROL status: locked
620 13:12:53.886899 Skip microcode update
621 13:12:53.890779 Skip microcode update
622 13:12:53.890863 CPU #7 initialized
623 13:12:53.893997 CPU #3 initialized
624 13:12:53.897060 apic_id: 0x03 done.
625 13:12:53.897146 apic_id: 0x02 done.
626 13:12:53.900249 VMX status: enabled
627 13:12:53.900382 VMX status: enabled
628 13:12:53.903582 IA32_FEATURE_CONTROL status: locked
629 13:12:53.910931 IA32_FEATURE_CONTROL status: locked
630 13:12:53.911015 Skip microcode update
631 13:12:53.913433 Skip microcode update
632 13:12:53.916871 CPU #6 initialized
633 13:12:53.916981 CPU #1 initialized
634 13:12:53.920159 Setting up local APIC...
635 13:12:53.923523 apic_id: 0x04 done.
636 13:12:53.923607 Setting up local APIC...
637 13:12:53.926863 apic_id: 0x01 done.
638 13:12:53.929990 VMX status: enabled
639 13:12:53.930074 apic_id: 0x05 done.
640 13:12:53.934027 IA32_FEATURE_CONTROL status: locked
641 13:12:53.937157 VMX status: enabled
642 13:12:53.940219 Skip microcode update
643 13:12:53.943413 IA32_FEATURE_CONTROL status: locked
644 13:12:53.943537 CPU #2 initialized
645 13:12:53.947431 Skip microcode update
646 13:12:53.947516 VMX status: enabled
647 13:12:53.949995 CPU #5 initialized
648 13:12:53.953818 IA32_FEATURE_CONTROL status: locked
649 13:12:53.956822 Skip microcode update
650 13:12:53.956906 CPU #4 initialized
651 13:12:53.963579 bsp_do_flight_plan done after 461 msecs.
652 13:12:53.967137 CPU: frequency set to 4200 MHz
653 13:12:53.967221 Enabling SMIs.
654 13:12:53.969924 Locking SMM.
655 13:12:53.983670 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
656 13:12:53.986914 CBFS @ c08000 size 3f8000
657 13:12:53.993499 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
658 13:12:53.993582 CBFS: Locating 'vbt.bin'
659 13:12:53.996432 CBFS: Found @ offset 5f5c0 size 499
660 13:12:54.003705 Found a VBT of 4608 bytes after decompression
661 13:12:54.184563 Display FSP Version Info HOB
662 13:12:54.187707 Reference Code - CPU = 9.0.1e.30
663 13:12:54.191079 uCode Version = 0.0.0.ca
664 13:12:54.194594 TXT ACM version = ff.ff.ff.ffff
665 13:12:54.198035 Display FSP Version Info HOB
666 13:12:54.200632 Reference Code - ME = 9.0.1e.30
667 13:12:54.204040 MEBx version = 0.0.0.0
668 13:12:54.207559 ME Firmware Version = Consumer SKU
669 13:12:54.210646 Display FSP Version Info HOB
670 13:12:54.214150 Reference Code - CML PCH = 9.0.1e.30
671 13:12:54.217380 PCH-CRID Status = Disabled
672 13:12:54.220818 PCH-CRID Original Value = ff.ff.ff.ffff
673 13:12:54.224218 PCH-CRID New Value = ff.ff.ff.ffff
674 13:12:54.227792 OPROM - RST - RAID = ff.ff.ff.ffff
675 13:12:54.230542 ChipsetInit Base Version = ff.ff.ff.ffff
676 13:12:54.233736 ChipsetInit Oem Version = ff.ff.ff.ffff
677 13:12:54.237574 Display FSP Version Info HOB
678 13:12:54.243780 Reference Code - SA - System Agent = 9.0.1e.30
679 13:12:54.247410 Reference Code - MRC = 0.7.1.6c
680 13:12:54.247498 SA - PCIe Version = 9.0.1e.30
681 13:12:54.250649 SA-CRID Status = Disabled
682 13:12:54.253900 SA-CRID Original Value = 0.0.0.c
683 13:12:54.257555 SA-CRID New Value = 0.0.0.c
684 13:12:54.260589 OPROM - VBIOS = ff.ff.ff.ffff
685 13:12:54.263840 RTC Init
686 13:12:54.267404 Set power on after power failure.
687 13:12:54.267490 Disabling Deep S3
688 13:12:54.270734 Disabling Deep S3
689 13:12:54.270835 Disabling Deep S4
690 13:12:54.273998 Disabling Deep S4
691 13:12:54.274084 Disabling Deep S5
692 13:12:54.277491 Disabling Deep S5
693 13:12:54.283574 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
694 13:12:54.283665 Enumerating buses...
695 13:12:54.290963 Show all devs... Before device enumeration.
696 13:12:54.291051 Root Device: enabled 1
697 13:12:54.293506 CPU_CLUSTER: 0: enabled 1
698 13:12:54.297055 DOMAIN: 0000: enabled 1
699 13:12:54.300217 APIC: 00: enabled 1
700 13:12:54.300339 PCI: 00:00.0: enabled 1
701 13:12:54.303565 PCI: 00:02.0: enabled 1
702 13:12:54.306990 PCI: 00:04.0: enabled 0
703 13:12:54.310259 PCI: 00:05.0: enabled 0
704 13:12:54.310345 PCI: 00:12.0: enabled 1
705 13:12:54.313575 PCI: 00:12.5: enabled 0
706 13:12:54.317030 PCI: 00:12.6: enabled 0
707 13:12:54.317135 PCI: 00:14.0: enabled 1
708 13:12:54.320099 PCI: 00:14.1: enabled 0
709 13:12:54.323666 PCI: 00:14.3: enabled 1
710 13:12:54.326654 PCI: 00:14.5: enabled 0
711 13:12:54.326735 PCI: 00:15.0: enabled 1
712 13:12:54.330021 PCI: 00:15.1: enabled 1
713 13:12:54.333281 PCI: 00:15.2: enabled 0
714 13:12:54.336653 PCI: 00:15.3: enabled 0
715 13:12:54.336729 PCI: 00:16.0: enabled 1
716 13:12:54.339986 PCI: 00:16.1: enabled 0
717 13:12:54.343215 PCI: 00:16.2: enabled 0
718 13:12:54.346417 PCI: 00:16.3: enabled 0
719 13:12:54.346502 PCI: 00:16.4: enabled 0
720 13:12:54.350199 PCI: 00:16.5: enabled 0
721 13:12:54.353343 PCI: 00:17.0: enabled 1
722 13:12:54.356658 PCI: 00:19.0: enabled 1
723 13:12:54.356744 PCI: 00:19.1: enabled 0
724 13:12:54.359943 PCI: 00:19.2: enabled 0
725 13:12:54.363424 PCI: 00:1a.0: enabled 0
726 13:12:54.363512 PCI: 00:1c.0: enabled 0
727 13:12:54.366483 PCI: 00:1c.1: enabled 0
728 13:12:54.369501 PCI: 00:1c.2: enabled 0
729 13:12:54.373404 PCI: 00:1c.3: enabled 0
730 13:12:54.373517 PCI: 00:1c.4: enabled 0
731 13:12:54.376571 PCI: 00:1c.5: enabled 0
732 13:12:54.379852 PCI: 00:1c.6: enabled 0
733 13:12:54.383022 PCI: 00:1c.7: enabled 0
734 13:12:54.383099 PCI: 00:1d.0: enabled 1
735 13:12:54.386346 PCI: 00:1d.1: enabled 0
736 13:12:54.389818 PCI: 00:1d.2: enabled 0
737 13:12:54.392788 PCI: 00:1d.3: enabled 0
738 13:12:54.392930 PCI: 00:1d.4: enabled 0
739 13:12:54.396226 PCI: 00:1d.5: enabled 1
740 13:12:54.399334 PCI: 00:1e.0: enabled 1
741 13:12:54.399411 PCI: 00:1e.1: enabled 0
742 13:12:54.402730 PCI: 00:1e.2: enabled 1
743 13:12:54.406129 PCI: 00:1e.3: enabled 1
744 13:12:54.409563 PCI: 00:1f.0: enabled 1
745 13:12:54.409685 PCI: 00:1f.1: enabled 1
746 13:12:54.413141 PCI: 00:1f.2: enabled 1
747 13:12:54.416356 PCI: 00:1f.3: enabled 1
748 13:12:54.419326 PCI: 00:1f.4: enabled 1
749 13:12:54.419434 PCI: 00:1f.5: enabled 1
750 13:12:54.422557 PCI: 00:1f.6: enabled 0
751 13:12:54.426122 USB0 port 0: enabled 1
752 13:12:54.426207 I2C: 00:15: enabled 1
753 13:12:54.429452 I2C: 00:5d: enabled 1
754 13:12:54.432730 GENERIC: 0.0: enabled 1
755 13:12:54.436188 I2C: 00:1a: enabled 1
756 13:12:54.436331 I2C: 00:38: enabled 1
757 13:12:54.439104 I2C: 00:39: enabled 1
758 13:12:54.442398 I2C: 00:3a: enabled 1
759 13:12:54.442483 I2C: 00:3b: enabled 1
760 13:12:54.445689 PCI: 00:00.0: enabled 1
761 13:12:54.448986 SPI: 00: enabled 1
762 13:12:54.449072 SPI: 01: enabled 1
763 13:12:54.452299 PNP: 0c09.0: enabled 1
764 13:12:54.456226 USB2 port 0: enabled 1
765 13:12:54.456353 USB2 port 1: enabled 1
766 13:12:54.459467 USB2 port 2: enabled 0
767 13:12:54.462757 USB2 port 3: enabled 0
768 13:12:54.462841 USB2 port 5: enabled 0
769 13:12:54.466001 USB2 port 6: enabled 1
770 13:12:54.469408 USB2 port 9: enabled 1
771 13:12:54.472418 USB3 port 0: enabled 1
772 13:12:54.472597 USB3 port 1: enabled 1
773 13:12:54.475516 USB3 port 2: enabled 1
774 13:12:54.479008 USB3 port 3: enabled 1
775 13:12:54.479094 USB3 port 4: enabled 0
776 13:12:54.482388 APIC: 02: enabled 1
777 13:12:54.485558 APIC: 04: enabled 1
778 13:12:54.485644 APIC: 07: enabled 1
779 13:12:54.488839 APIC: 01: enabled 1
780 13:12:54.488925 APIC: 05: enabled 1
781 13:12:54.492475 APIC: 03: enabled 1
782 13:12:54.495730 APIC: 06: enabled 1
783 13:12:54.495817 Compare with tree...
784 13:12:54.498830 Root Device: enabled 1
785 13:12:54.502400 CPU_CLUSTER: 0: enabled 1
786 13:12:54.505641 APIC: 00: enabled 1
787 13:12:54.505738 APIC: 02: enabled 1
788 13:12:54.508981 APIC: 04: enabled 1
789 13:12:54.512140 APIC: 07: enabled 1
790 13:12:54.512253 APIC: 01: enabled 1
791 13:12:54.515619 APIC: 05: enabled 1
792 13:12:54.518651 APIC: 03: enabled 1
793 13:12:54.518738 APIC: 06: enabled 1
794 13:12:54.521852 DOMAIN: 0000: enabled 1
795 13:12:54.525275 PCI: 00:00.0: enabled 1
796 13:12:54.528644 PCI: 00:02.0: enabled 1
797 13:12:54.528725 PCI: 00:04.0: enabled 0
798 13:12:54.532111 PCI: 00:05.0: enabled 0
799 13:12:54.534987 PCI: 00:12.0: enabled 1
800 13:12:54.538512 PCI: 00:12.5: enabled 0
801 13:12:54.541844 PCI: 00:12.6: enabled 0
802 13:12:54.541932 PCI: 00:14.0: enabled 1
803 13:12:54.545224 USB0 port 0: enabled 1
804 13:12:54.548990 USB2 port 0: enabled 1
805 13:12:54.551718 USB2 port 1: enabled 1
806 13:12:54.555330 USB2 port 2: enabled 0
807 13:12:54.555437 USB2 port 3: enabled 0
808 13:12:54.558630 USB2 port 5: enabled 0
809 13:12:54.562003 USB2 port 6: enabled 1
810 13:12:54.565209 USB2 port 9: enabled 1
811 13:12:54.568822 USB3 port 0: enabled 1
812 13:12:54.572196 USB3 port 1: enabled 1
813 13:12:54.572311 USB3 port 2: enabled 1
814 13:12:54.575596 USB3 port 3: enabled 1
815 13:12:54.578196 USB3 port 4: enabled 0
816 13:12:54.581661 PCI: 00:14.1: enabled 0
817 13:12:54.584877 PCI: 00:14.3: enabled 1
818 13:12:54.584963 PCI: 00:14.5: enabled 0
819 13:12:54.588271 PCI: 00:15.0: enabled 1
820 13:12:54.591535 I2C: 00:15: enabled 1
821 13:12:54.595142 PCI: 00:15.1: enabled 1
822 13:12:54.598074 I2C: 00:5d: enabled 1
823 13:12:54.598163 GENERIC: 0.0: enabled 1
824 13:12:54.601668 PCI: 00:15.2: enabled 0
825 13:12:54.604674 PCI: 00:15.3: enabled 0
826 13:12:54.607969 PCI: 00:16.0: enabled 1
827 13:12:54.611626 PCI: 00:16.1: enabled 0
828 13:12:54.611712 PCI: 00:16.2: enabled 0
829 13:12:54.614597 PCI: 00:16.3: enabled 0
830 13:12:54.618130 PCI: 00:16.4: enabled 0
831 13:12:54.621576 PCI: 00:16.5: enabled 0
832 13:12:54.624638 PCI: 00:17.0: enabled 1
833 13:12:54.624726 PCI: 00:19.0: enabled 1
834 13:12:54.627921 I2C: 00:1a: enabled 1
835 13:12:54.631234 I2C: 00:38: enabled 1
836 13:12:54.634510 I2C: 00:39: enabled 1
837 13:12:54.634624 I2C: 00:3a: enabled 1
838 13:12:54.637818 I2C: 00:3b: enabled 1
839 13:12:54.641154 PCI: 00:19.1: enabled 0
840 13:12:54.644483 PCI: 00:19.2: enabled 0
841 13:12:54.647657 PCI: 00:1a.0: enabled 0
842 13:12:54.647743 PCI: 00:1c.0: enabled 0
843 13:12:54.651063 PCI: 00:1c.1: enabled 0
844 13:12:54.654292 PCI: 00:1c.2: enabled 0
845 13:12:54.657592 PCI: 00:1c.3: enabled 0
846 13:12:54.660900 PCI: 00:1c.4: enabled 0
847 13:12:54.660987 PCI: 00:1c.5: enabled 0
848 13:12:54.664839 PCI: 00:1c.6: enabled 0
849 13:12:54.667666 PCI: 00:1c.7: enabled 0
850 13:12:54.671426 PCI: 00:1d.0: enabled 1
851 13:12:54.671539 PCI: 00:1d.1: enabled 0
852 13:12:54.674191 PCI: 00:1d.2: enabled 0
853 13:12:54.677762 PCI: 00:1d.3: enabled 0
854 13:12:54.680669 PCI: 00:1d.4: enabled 0
855 13:12:54.684379 PCI: 00:1d.5: enabled 1
856 13:12:54.684464 PCI: 00:00.0: enabled 1
857 13:12:54.687516 PCI: 00:1e.0: enabled 1
858 13:12:54.691004 PCI: 00:1e.1: enabled 0
859 13:12:54.694368 PCI: 00:1e.2: enabled 1
860 13:12:54.697261 SPI: 00: enabled 1
861 13:12:54.697345 PCI: 00:1e.3: enabled 1
862 13:12:54.700859 SPI: 01: enabled 1
863 13:12:54.704403 PCI: 00:1f.0: enabled 1
864 13:12:54.707005 PNP: 0c09.0: enabled 1
865 13:12:54.707091 PCI: 00:1f.1: enabled 1
866 13:12:54.710531 PCI: 00:1f.2: enabled 1
867 13:12:54.713924 PCI: 00:1f.3: enabled 1
868 13:12:54.717290 PCI: 00:1f.4: enabled 1
869 13:12:54.720458 PCI: 00:1f.5: enabled 1
870 13:12:54.720566 PCI: 00:1f.6: enabled 0
871 13:12:54.723482 Root Device scanning...
872 13:12:54.726943 scan_static_bus for Root Device
873 13:12:54.730466 CPU_CLUSTER: 0 enabled
874 13:12:54.733927 DOMAIN: 0000 enabled
875 13:12:54.734032 DOMAIN: 0000 scanning...
876 13:12:54.737264 PCI: pci_scan_bus for bus 00
877 13:12:54.740567 PCI: 00:00.0 [8086/0000] ops
878 13:12:54.743689 PCI: 00:00.0 [8086/9b61] enabled
879 13:12:54.746658 PCI: 00:02.0 [8086/0000] bus ops
880 13:12:54.749917 PCI: 00:02.0 [8086/9b41] enabled
881 13:12:54.753521 PCI: 00:04.0 [8086/1903] disabled
882 13:12:54.756893 PCI: 00:08.0 [8086/1911] enabled
883 13:12:54.760005 PCI: 00:12.0 [8086/02f9] enabled
884 13:12:54.763360 PCI: 00:14.0 [8086/0000] bus ops
885 13:12:54.766751 PCI: 00:14.0 [8086/02ed] enabled
886 13:12:54.770018 PCI: 00:14.2 [8086/02ef] enabled
887 13:12:54.773609 PCI: 00:14.3 [8086/02f0] enabled
888 13:12:54.776550 PCI: 00:15.0 [8086/0000] bus ops
889 13:12:54.779858 PCI: 00:15.0 [8086/02e8] enabled
890 13:12:54.783156 PCI: 00:15.1 [8086/0000] bus ops
891 13:12:54.786522 PCI: 00:15.1 [8086/02e9] enabled
892 13:12:54.789734 PCI: 00:16.0 [8086/0000] ops
893 13:12:54.792980 PCI: 00:16.0 [8086/02e0] enabled
894 13:12:54.796740 PCI: 00:17.0 [8086/0000] ops
895 13:12:54.799832 PCI: 00:17.0 [8086/02d3] enabled
896 13:12:54.802912 PCI: 00:19.0 [8086/0000] bus ops
897 13:12:54.806419 PCI: 00:19.0 [8086/02c5] enabled
898 13:12:54.809779 PCI: 00:1d.0 [8086/0000] bus ops
899 13:12:54.812900 PCI: 00:1d.0 [8086/02b0] enabled
900 13:12:54.819576 PCI: Static device PCI: 00:1d.5 not found, disabling it.
901 13:12:54.823031 PCI: 00:1e.0 [8086/0000] ops
902 13:12:54.826285 PCI: 00:1e.0 [8086/02a8] enabled
903 13:12:54.829790 PCI: 00:1e.2 [8086/0000] bus ops
904 13:12:54.833188 PCI: 00:1e.2 [8086/02aa] enabled
905 13:12:54.836501 PCI: 00:1e.3 [8086/0000] bus ops
906 13:12:54.839560 PCI: 00:1e.3 [8086/02ab] enabled
907 13:12:54.843368 PCI: 00:1f.0 [8086/0000] bus ops
908 13:12:54.846462 PCI: 00:1f.0 [8086/0284] enabled
909 13:12:54.849603 PCI: Static device PCI: 00:1f.1 not found, disabling it.
910 13:12:54.856272 PCI: Static device PCI: 00:1f.2 not found, disabling it.
911 13:12:54.859805 PCI: 00:1f.3 [8086/0000] bus ops
912 13:12:54.862811 PCI: 00:1f.3 [8086/02c8] enabled
913 13:12:54.866378 PCI: 00:1f.4 [8086/0000] bus ops
914 13:12:54.869660 PCI: 00:1f.4 [8086/02a3] enabled
915 13:12:54.872882 PCI: 00:1f.5 [8086/0000] bus ops
916 13:12:54.876214 PCI: 00:1f.5 [8086/02a4] enabled
917 13:12:54.879357 PCI: Leftover static devices:
918 13:12:54.879442 PCI: 00:05.0
919 13:12:54.882625 PCI: 00:12.5
920 13:12:54.882708 PCI: 00:12.6
921 13:12:54.885876 PCI: 00:14.1
922 13:12:54.885984 PCI: 00:14.5
923 13:12:54.889324 PCI: 00:15.2
924 13:12:54.889429 PCI: 00:15.3
925 13:12:54.889525 PCI: 00:16.1
926 13:12:54.892854 PCI: 00:16.2
927 13:12:54.892935 PCI: 00:16.3
928 13:12:54.895512 PCI: 00:16.4
929 13:12:54.895617 PCI: 00:16.5
930 13:12:54.895712 PCI: 00:19.1
931 13:12:54.898900 PCI: 00:19.2
932 13:12:54.898980 PCI: 00:1a.0
933 13:12:54.902945 PCI: 00:1c.0
934 13:12:54.903056 PCI: 00:1c.1
935 13:12:54.905475 PCI: 00:1c.2
936 13:12:54.905582 PCI: 00:1c.3
937 13:12:54.905676 PCI: 00:1c.4
938 13:12:54.908893 PCI: 00:1c.5
939 13:12:54.909003 PCI: 00:1c.6
940 13:12:54.912815 PCI: 00:1c.7
941 13:12:54.912896 PCI: 00:1d.1
942 13:12:54.912970 PCI: 00:1d.2
943 13:12:54.915367 PCI: 00:1d.3
944 13:12:54.915475 PCI: 00:1d.4
945 13:12:54.919298 PCI: 00:1d.5
946 13:12:54.919385 PCI: 00:1e.1
947 13:12:54.919451 PCI: 00:1f.1
948 13:12:54.922260 PCI: 00:1f.2
949 13:12:54.922364 PCI: 00:1f.6
950 13:12:54.925821 PCI: Check your devicetree.cb.
951 13:12:54.928888 PCI: 00:02.0 scanning...
952 13:12:54.932125 scan_generic_bus for PCI: 00:02.0
953 13:12:54.935361 scan_generic_bus for PCI: 00:02.0 done
954 13:12:54.941935 scan_bus: scanning of bus PCI: 00:02.0 took 10189 usecs
955 13:12:54.945291 PCI: 00:14.0 scanning...
956 13:12:54.948666 scan_static_bus for PCI: 00:14.0
957 13:12:54.948748 USB0 port 0 enabled
958 13:12:54.951766 USB0 port 0 scanning...
959 13:12:54.955179 scan_static_bus for USB0 port 0
960 13:12:54.958557 USB2 port 0 enabled
961 13:12:54.962005 USB2 port 1 enabled
962 13:12:54.962112 USB2 port 2 disabled
963 13:12:54.965098 USB2 port 3 disabled
964 13:12:54.965204 USB2 port 5 disabled
965 13:12:54.968804 USB2 port 6 enabled
966 13:12:54.971780 USB2 port 9 enabled
967 13:12:54.971897 USB3 port 0 enabled
968 13:12:54.975400 USB3 port 1 enabled
969 13:12:54.978451 USB3 port 2 enabled
970 13:12:54.978538 USB3 port 3 enabled
971 13:12:54.981898 USB3 port 4 disabled
972 13:12:54.984779 USB2 port 0 scanning...
973 13:12:54.988319 scan_static_bus for USB2 port 0
974 13:12:54.991720 scan_static_bus for USB2 port 0 done
975 13:12:54.994860 scan_bus: scanning of bus USB2 port 0 took 9693 usecs
976 13:12:54.998250 USB2 port 1 scanning...
977 13:12:55.001817 scan_static_bus for USB2 port 1
978 13:12:55.004886 scan_static_bus for USB2 port 1 done
979 13:12:55.011576 scan_bus: scanning of bus USB2 port 1 took 9712 usecs
980 13:12:55.015291 USB2 port 6 scanning...
981 13:12:55.018670 scan_static_bus for USB2 port 6
982 13:12:55.021399 scan_static_bus for USB2 port 6 done
983 13:12:55.025052 scan_bus: scanning of bus USB2 port 6 took 9711 usecs
984 13:12:55.028361 USB2 port 9 scanning...
985 13:12:55.031799 scan_static_bus for USB2 port 9
986 13:12:55.034724 scan_static_bus for USB2 port 9 done
987 13:12:55.041356 scan_bus: scanning of bus USB2 port 9 took 9712 usecs
988 13:12:55.045059 USB3 port 0 scanning...
989 13:12:55.047897 scan_static_bus for USB3 port 0
990 13:12:55.051496 scan_static_bus for USB3 port 0 done
991 13:12:55.054849 scan_bus: scanning of bus USB3 port 0 took 9711 usecs
992 13:12:55.058139 USB3 port 1 scanning...
993 13:12:55.061331 scan_static_bus for USB3 port 1
994 13:12:55.064678 scan_static_bus for USB3 port 1 done
995 13:12:55.071409 scan_bus: scanning of bus USB3 port 1 took 9698 usecs
996 13:12:55.074699 USB3 port 2 scanning...
997 13:12:55.077844 scan_static_bus for USB3 port 2
998 13:12:55.081132 scan_static_bus for USB3 port 2 done
999 13:12:55.088236 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
1000 13:12:55.088372 USB3 port 3 scanning...
1001 13:12:55.090963 scan_static_bus for USB3 port 3
1002 13:12:55.094472 scan_static_bus for USB3 port 3 done
1003 13:12:55.101411 scan_bus: scanning of bus USB3 port 3 took 9710 usecs
1004 13:12:55.104954 scan_static_bus for USB0 port 0 done
1005 13:12:55.111190 scan_bus: scanning of bus USB0 port 0 took 155460 usecs
1006 13:12:55.114606 scan_static_bus for PCI: 00:14.0 done
1007 13:12:55.121275 scan_bus: scanning of bus PCI: 00:14.0 took 173072 usecs
1008 13:12:55.121381 PCI: 00:15.0 scanning...
1009 13:12:55.127397 scan_generic_bus for PCI: 00:15.0
1010 13:12:55.131025 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1011 13:12:55.134279 scan_generic_bus for PCI: 00:15.0 done
1012 13:12:55.141109 scan_bus: scanning of bus PCI: 00:15.0 took 14305 usecs
1013 13:12:55.141213 PCI: 00:15.1 scanning...
1014 13:12:55.144686 scan_generic_bus for PCI: 00:15.1
1015 13:12:55.150884 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1016 13:12:55.154783 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1017 13:12:55.157539 scan_generic_bus for PCI: 00:15.1 done
1018 13:12:55.164211 scan_bus: scanning of bus PCI: 00:15.1 took 18613 usecs
1019 13:12:55.167517 PCI: 00:19.0 scanning...
1020 13:12:55.170644 scan_generic_bus for PCI: 00:19.0
1021 13:12:55.174444 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1022 13:12:55.177494 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1023 13:12:55.180558 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1024 13:12:55.187542 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1025 13:12:55.190922 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1026 13:12:55.194111 scan_generic_bus for PCI: 00:19.0 done
1027 13:12:55.200675 scan_bus: scanning of bus PCI: 00:19.0 took 30749 usecs
1028 13:12:55.203892 PCI: 00:1d.0 scanning...
1029 13:12:55.207104 do_pci_scan_bridge for PCI: 00:1d.0
1030 13:12:55.210885 PCI: pci_scan_bus for bus 01
1031 13:12:55.213988 PCI: 01:00.0 [1c5c/1327] enabled
1032 13:12:55.217497 Enabling Common Clock Configuration
1033 13:12:55.220539 L1 Sub-State supported from root port 29
1034 13:12:55.223832 L1 Sub-State Support = 0xf
1035 13:12:55.227366 CommonModeRestoreTime = 0x28
1036 13:12:55.230859 Power On Value = 0x16, Power On Scale = 0x0
1037 13:12:55.234213 ASPM: Enabled L1
1038 13:12:55.237594 scan_bus: scanning of bus PCI: 00:1d.0 took 32803 usecs
1039 13:12:55.240386 PCI: 00:1e.2 scanning...
1040 13:12:55.243741 scan_generic_bus for PCI: 00:1e.2
1041 13:12:55.247042 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1042 13:12:55.250441 scan_generic_bus for PCI: 00:1e.2 done
1043 13:12:55.257200 scan_bus: scanning of bus PCI: 00:1e.2 took 14020 usecs
1044 13:12:55.260585 PCI: 00:1e.3 scanning...
1045 13:12:55.263951 scan_generic_bus for PCI: 00:1e.3
1046 13:12:55.267261 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1047 13:12:55.270811 scan_generic_bus for PCI: 00:1e.3 done
1048 13:12:55.277067 scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs
1049 13:12:55.280434 PCI: 00:1f.0 scanning...
1050 13:12:55.283694 scan_static_bus for PCI: 00:1f.0
1051 13:12:55.283778 PNP: 0c09.0 enabled
1052 13:12:55.290260 scan_static_bus for PCI: 00:1f.0 done
1053 13:12:55.293787 scan_bus: scanning of bus PCI: 00:1f.0 took 12062 usecs
1054 13:12:55.296983 PCI: 00:1f.3 scanning...
1055 13:12:55.303741 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1056 13:12:55.307039 PCI: 00:1f.4 scanning...
1057 13:12:55.310166 scan_generic_bus for PCI: 00:1f.4
1058 13:12:55.313838 scan_generic_bus for PCI: 00:1f.4 done
1059 13:12:55.320056 scan_bus: scanning of bus PCI: 00:1f.4 took 10189 usecs
1060 13:12:55.320148 PCI: 00:1f.5 scanning...
1061 13:12:55.323636 scan_generic_bus for PCI: 00:1f.5
1062 13:12:55.330107 scan_generic_bus for PCI: 00:1f.5 done
1063 13:12:55.333409 scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs
1064 13:12:55.340405 scan_bus: scanning of bus DOMAIN: 0000 took 605274 usecs
1065 13:12:55.342984 scan_static_bus for Root Device done
1066 13:12:55.349896 scan_bus: scanning of bus Root Device took 625156 usecs
1067 13:12:55.350004 done
1068 13:12:55.353142 Chrome EC: UHEPI supported
1069 13:12:55.360026 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1070 13:12:55.366607 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1071 13:12:55.369903 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1072 13:12:55.377099 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1073 13:12:55.380402 SPI flash protection: WPSW=0 SRP0=0
1074 13:12:55.386912 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 13:12:55.390265 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1076 13:12:55.393664 found VGA at PCI: 00:02.0
1077 13:12:55.397300 Setting up VGA for PCI: 00:02.0
1078 13:12:55.403701 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 13:12:55.407108 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 13:12:55.410239 Allocating resources...
1081 13:12:55.413456 Reading resources...
1082 13:12:55.416809 Root Device read_resources bus 0 link: 0
1083 13:12:55.419937 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1084 13:12:55.426791 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1085 13:12:55.430074 DOMAIN: 0000 read_resources bus 0 link: 0
1086 13:12:55.437691 PCI: 00:14.0 read_resources bus 0 link: 0
1087 13:12:55.440864 USB0 port 0 read_resources bus 0 link: 0
1088 13:12:55.449482 USB0 port 0 read_resources bus 0 link: 0 done
1089 13:12:55.452138 PCI: 00:14.0 read_resources bus 0 link: 0 done
1090 13:12:55.459643 PCI: 00:15.0 read_resources bus 1 link: 0
1091 13:12:55.462696 PCI: 00:15.0 read_resources bus 1 link: 0 done
1092 13:12:55.469415 PCI: 00:15.1 read_resources bus 2 link: 0
1093 13:12:55.472709 PCI: 00:15.1 read_resources bus 2 link: 0 done
1094 13:12:55.480424 PCI: 00:19.0 read_resources bus 3 link: 0
1095 13:12:55.486787 PCI: 00:19.0 read_resources bus 3 link: 0 done
1096 13:12:55.490696 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 13:12:55.496869 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 13:12:55.500425 PCI: 00:1e.2 read_resources bus 4 link: 0
1099 13:12:55.506909 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1100 13:12:55.510105 PCI: 00:1e.3 read_resources bus 5 link: 0
1101 13:12:55.516954 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1102 13:12:55.520219 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 13:12:55.526550 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 13:12:55.533623 DOMAIN: 0000 read_resources bus 0 link: 0 done
1105 13:12:55.536945 Root Device read_resources bus 0 link: 0 done
1106 13:12:55.540193 Done reading resources.
1107 13:12:55.543542 Show resources in subtree (Root Device)...After reading.
1108 13:12:55.550227 Root Device child on link 0 CPU_CLUSTER: 0
1109 13:12:55.558807 CPU_CLUSTER: 0 child on link 0 APIC: 00
1110 13:12:55.558929 APIC: 00
1111 13:12:55.559000 APIC: 02
1112 13:12:55.559061 APIC: 04
1113 13:12:55.560293 APIC: 07
1114 13:12:55.560371 APIC: 01
1115 13:12:55.560435 APIC: 05
1116 13:12:55.563313 APIC: 03
1117 13:12:55.563412 APIC: 06
1118 13:12:55.566772 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1119 13:12:55.576656 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1120 13:12:55.629720 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1121 13:12:55.630062 PCI: 00:00.0
1122 13:12:55.630193 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1123 13:12:55.630524 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1124 13:12:55.630660 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1125 13:12:55.630926 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1126 13:12:55.661277 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1127 13:12:55.662162 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1128 13:12:55.662278 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1129 13:12:55.665536 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1130 13:12:55.672281 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1131 13:12:55.681912 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1132 13:12:55.691905 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1133 13:12:55.701895 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1134 13:12:55.711890 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1135 13:12:55.721800 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1136 13:12:55.728602 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1137 13:12:55.738169 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1138 13:12:55.741768 PCI: 00:02.0
1139 13:12:55.751759 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1140 13:12:55.761435 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1141 13:12:55.768030 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1142 13:12:55.771280 PCI: 00:04.0
1143 13:12:55.771366 PCI: 00:08.0
1144 13:12:55.781302 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1145 13:12:55.784803 PCI: 00:12.0
1146 13:12:55.795169 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 13:12:55.797970 PCI: 00:14.0 child on link 0 USB0 port 0
1148 13:12:55.807836 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1149 13:12:55.811086 USB0 port 0 child on link 0 USB2 port 0
1150 13:12:55.814500 USB2 port 0
1151 13:12:55.817845 USB2 port 1
1152 13:12:55.817933 USB2 port 2
1153 13:12:55.821345 USB2 port 3
1154 13:12:55.821466 USB2 port 5
1155 13:12:55.824266 USB2 port 6
1156 13:12:55.824377 USB2 port 9
1157 13:12:55.827559 USB3 port 0
1158 13:12:55.827670 USB3 port 1
1159 13:12:55.830935 USB3 port 2
1160 13:12:55.831019 USB3 port 3
1161 13:12:55.834653 USB3 port 4
1162 13:12:55.834737 PCI: 00:14.2
1163 13:12:55.844318 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1164 13:12:55.854314 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1165 13:12:55.857806 PCI: 00:14.3
1166 13:12:55.867678 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1167 13:12:55.870909 PCI: 00:15.0 child on link 0 I2C: 01:15
1168 13:12:55.881140 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 13:12:55.884225 I2C: 01:15
1170 13:12:55.887933 PCI: 00:15.1 child on link 0 I2C: 02:5d
1171 13:12:55.897545 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 13:12:55.897650 I2C: 02:5d
1173 13:12:55.900953 GENERIC: 0.0
1174 13:12:55.901064 PCI: 00:16.0
1175 13:12:55.910764 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 13:12:55.914030 PCI: 00:17.0
1177 13:12:55.924186 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1178 13:12:55.930911 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1179 13:12:55.940716 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1180 13:12:55.947063 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1181 13:12:55.957381 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1182 13:12:55.966906 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1183 13:12:55.970420 PCI: 00:19.0 child on link 0 I2C: 03:1a
1184 13:12:55.980478 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 13:12:55.980565 I2C: 03:1a
1186 13:12:55.983383 I2C: 03:38
1187 13:12:55.983462 I2C: 03:39
1188 13:12:55.987335 I2C: 03:3a
1189 13:12:55.987412 I2C: 03:3b
1190 13:12:55.990551 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1191 13:12:56.000271 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1192 13:12:56.010241 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1193 13:12:56.019939 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1194 13:12:56.020069 PCI: 01:00.0
1195 13:12:56.030237 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1196 13:12:56.033621 PCI: 00:1e.0
1197 13:12:56.043577 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1198 13:12:56.053152 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1199 13:12:56.056257 PCI: 00:1e.2 child on link 0 SPI: 00
1200 13:12:56.066727 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 13:12:56.069411 SPI: 00
1202 13:12:56.072901 PCI: 00:1e.3 child on link 0 SPI: 01
1203 13:12:56.083499 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 13:12:56.083588 SPI: 01
1205 13:12:56.089386 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1206 13:12:56.095903 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1207 13:12:56.106041 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1208 13:12:56.109397 PNP: 0c09.0
1209 13:12:56.116163 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1210 13:12:56.119036 PCI: 00:1f.3
1211 13:12:56.129159 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1212 13:12:56.139376 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1213 13:12:56.139490 PCI: 00:1f.4
1214 13:12:56.149190 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1215 13:12:56.158855 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1216 13:12:56.162445 PCI: 00:1f.5
1217 13:12:56.168914 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1218 13:12:56.175369 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1219 13:12:56.181874 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1220 13:12:56.188648 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1221 13:12:56.192008 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1222 13:12:56.195267 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1223 13:12:56.198795 PCI: 00:17.0 18 * [0x60 - 0x67] io
1224 13:12:56.201915 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1225 13:12:56.211772 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1226 13:12:56.218737 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1227 13:12:56.224767 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1228 13:12:56.234966 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1229 13:12:56.241492 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1230 13:12:56.244707 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 13:12:56.251308 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1232 13:12:56.257817 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1233 13:12:56.261318 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1234 13:12:56.264478 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1235 13:12:56.271158 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1236 13:12:56.274677 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1237 13:12:56.281337 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1238 13:12:56.284442 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1239 13:12:56.290991 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1240 13:12:56.294042 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1241 13:12:56.300966 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1242 13:12:56.304429 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1243 13:12:56.310957 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1244 13:12:56.314154 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1245 13:12:56.320802 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1246 13:12:56.324114 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1247 13:12:56.330469 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1248 13:12:56.333773 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1249 13:12:56.340781 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1250 13:12:56.344045 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1251 13:12:56.350675 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1252 13:12:56.353842 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1253 13:12:56.357138 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1254 13:12:56.363957 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1255 13:12:56.373929 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1256 13:12:56.376596 avoid_fixed_resources: DOMAIN: 0000
1257 13:12:56.379990 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1258 13:12:56.386636 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1259 13:12:56.396984 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1260 13:12:56.403800 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1261 13:12:56.409788 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1262 13:12:56.419902 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1263 13:12:56.426256 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1264 13:12:56.433190 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1265 13:12:56.439590 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1266 13:12:56.449265 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1267 13:12:56.456120 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1268 13:12:56.462599 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1269 13:12:56.466283 Setting resources...
1270 13:12:56.472839 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1271 13:12:56.475642 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1272 13:12:56.479206 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1273 13:12:56.482540 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1274 13:12:56.489338 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1275 13:12:56.492606 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1276 13:12:56.499525 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1277 13:12:56.505529 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1278 13:12:56.512453 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1279 13:12:56.518475 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1280 13:12:56.525079 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1281 13:12:56.528494 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1282 13:12:56.535570 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1283 13:12:56.538712 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1284 13:12:56.542026 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1285 13:12:56.548471 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1286 13:12:56.551826 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1287 13:12:56.558471 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1288 13:12:56.562009 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1289 13:12:56.568383 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1290 13:12:56.571486 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1291 13:12:56.578607 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1292 13:12:56.582171 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1293 13:12:56.588409 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1294 13:12:56.591857 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1295 13:12:56.597966 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1296 13:12:56.601196 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1297 13:12:56.608439 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1298 13:12:56.611766 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1299 13:12:56.618060 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1300 13:12:56.621519 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1301 13:12:56.627855 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1302 13:12:56.634728 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1303 13:12:56.641162 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1304 13:12:56.647511 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1305 13:12:56.657245 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1306 13:12:56.660427 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1307 13:12:56.667183 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1308 13:12:56.674060 Root Device assign_resources, bus 0 link: 0
1309 13:12:56.677135 DOMAIN: 0000 assign_resources, bus 0 link: 0
1310 13:12:56.687565 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1311 13:12:56.694132 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1312 13:12:56.700250 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1313 13:12:56.710782 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1314 13:12:56.716962 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1315 13:12:56.727284 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1316 13:12:56.730743 PCI: 00:14.0 assign_resources, bus 0 link: 0
1317 13:12:56.737254 PCI: 00:14.0 assign_resources, bus 0 link: 0
1318 13:12:56.743429 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1319 13:12:56.753638 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1320 13:12:56.760345 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1321 13:12:56.770511 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1322 13:12:56.773243 PCI: 00:15.0 assign_resources, bus 1 link: 0
1323 13:12:56.776605 PCI: 00:15.0 assign_resources, bus 1 link: 0
1324 13:12:56.786790 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1325 13:12:56.790063 PCI: 00:15.1 assign_resources, bus 2 link: 0
1326 13:12:56.796865 PCI: 00:15.1 assign_resources, bus 2 link: 0
1327 13:12:56.803326 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1328 13:12:56.812943 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1329 13:12:56.819834 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1330 13:12:56.826421 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1331 13:12:56.836429 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1332 13:12:56.842542 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1333 13:12:56.849168 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1334 13:12:56.859576 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1335 13:12:56.862878 PCI: 00:19.0 assign_resources, bus 3 link: 0
1336 13:12:56.869550 PCI: 00:19.0 assign_resources, bus 3 link: 0
1337 13:12:56.875982 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1338 13:12:56.886000 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1339 13:12:56.895774 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1340 13:12:56.899102 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1341 13:12:56.905543 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1342 13:12:56.911994 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1343 13:12:56.919056 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1344 13:12:56.928467 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1345 13:12:56.932038 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1346 13:12:56.938481 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1347 13:12:56.945314 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1348 13:12:56.948907 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1349 13:12:56.955351 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1350 13:12:56.958963 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1351 13:12:56.965512 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1352 13:12:56.968530 LPC: Trying to open IO window from 800 size 1ff
1353 13:12:56.979018 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1354 13:12:56.985237 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1355 13:12:56.995345 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1356 13:12:57.001559 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1357 13:12:57.008167 DOMAIN: 0000 assign_resources, bus 0 link: 0
1358 13:12:57.011763 Root Device assign_resources, bus 0 link: 0
1359 13:12:57.014957 Done setting resources.
1360 13:12:57.021538 Show resources in subtree (Root Device)...After assigning values.
1361 13:12:57.024740 Root Device child on link 0 CPU_CLUSTER: 0
1362 13:12:57.028010 CPU_CLUSTER: 0 child on link 0 APIC: 00
1363 13:12:57.031327 APIC: 00
1364 13:12:57.031429 APIC: 02
1365 13:12:57.031549 APIC: 04
1366 13:12:57.034908 APIC: 07
1367 13:12:57.035039 APIC: 01
1368 13:12:57.038400 APIC: 05
1369 13:12:57.038477 APIC: 03
1370 13:12:57.038555 APIC: 06
1371 13:12:57.045388 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1372 13:12:57.054508 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1373 13:12:57.064543 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1374 13:12:57.064624 PCI: 00:00.0
1375 13:12:57.074507 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1376 13:12:57.084249 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1377 13:12:57.094482 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1378 13:12:57.104585 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1379 13:12:57.114503 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1380 13:12:57.124005 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1381 13:12:57.130722 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1382 13:12:57.140922 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1383 13:12:57.150330 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1384 13:12:57.160741 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1385 13:12:57.170432 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1386 13:12:57.177406 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1387 13:12:57.186836 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1388 13:12:57.196752 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1389 13:12:57.206829 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1390 13:12:57.216867 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1391 13:12:57.216954 PCI: 00:02.0
1392 13:12:57.229712 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1393 13:12:57.239554 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1394 13:12:57.249848 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1395 13:12:57.249968 PCI: 00:04.0
1396 13:12:57.252989 PCI: 00:08.0
1397 13:12:57.263006 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1398 13:12:57.263121 PCI: 00:12.0
1399 13:12:57.272763 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1400 13:12:57.279713 PCI: 00:14.0 child on link 0 USB0 port 0
1401 13:12:57.289653 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1402 13:12:57.292982 USB0 port 0 child on link 0 USB2 port 0
1403 13:12:57.296489 USB2 port 0
1404 13:12:57.296602 USB2 port 1
1405 13:12:57.299246 USB2 port 2
1406 13:12:57.299329 USB2 port 3
1407 13:12:57.302577 USB2 port 5
1408 13:12:57.302665 USB2 port 6
1409 13:12:57.305965 USB2 port 9
1410 13:12:57.306049 USB3 port 0
1411 13:12:57.309309 USB3 port 1
1412 13:12:57.309409 USB3 port 2
1413 13:12:57.312675 USB3 port 3
1414 13:12:57.312759 USB3 port 4
1415 13:12:57.316014 PCI: 00:14.2
1416 13:12:57.325940 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1417 13:12:57.336083 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1418 13:12:57.339332 PCI: 00:14.3
1419 13:12:57.348988 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1420 13:12:57.352226 PCI: 00:15.0 child on link 0 I2C: 01:15
1421 13:12:57.361909 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1422 13:12:57.365590 I2C: 01:15
1423 13:12:57.369036 PCI: 00:15.1 child on link 0 I2C: 02:5d
1424 13:12:57.379034 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1425 13:12:57.382505 I2C: 02:5d
1426 13:12:57.382610 GENERIC: 0.0
1427 13:12:57.385343 PCI: 00:16.0
1428 13:12:57.395515 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1429 13:12:57.395621 PCI: 00:17.0
1430 13:12:57.405008 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1431 13:12:57.415629 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1432 13:12:57.424983 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1433 13:12:57.435293 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1434 13:12:57.444908 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1435 13:12:57.455040 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1436 13:12:57.458205 PCI: 00:19.0 child on link 0 I2C: 03:1a
1437 13:12:57.468078 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1438 13:12:57.471496 I2C: 03:1a
1439 13:12:57.471583 I2C: 03:38
1440 13:12:57.474693 I2C: 03:39
1441 13:12:57.474795 I2C: 03:3a
1442 13:12:57.474889 I2C: 03:3b
1443 13:12:57.481512 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1444 13:12:57.491303 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1445 13:12:57.501816 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1446 13:12:57.511015 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1447 13:12:57.511135 PCI: 01:00.0
1448 13:12:57.523950 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1449 13:12:57.524067 PCI: 00:1e.0
1450 13:12:57.534556 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1451 13:12:57.544296 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1452 13:12:57.550801 PCI: 00:1e.2 child on link 0 SPI: 00
1453 13:12:57.560498 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1454 13:12:57.560591 SPI: 00
1455 13:12:57.563874 PCI: 00:1e.3 child on link 0 SPI: 01
1456 13:12:57.577275 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1457 13:12:57.577367 SPI: 01
1458 13:12:57.580775 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1459 13:12:57.590470 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1460 13:12:57.600507 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1461 13:12:57.600599 PNP: 0c09.0
1462 13:12:57.610477 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1463 13:12:57.610567 PCI: 00:1f.3
1464 13:12:57.620055 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1465 13:12:57.630278 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1466 13:12:57.633567 PCI: 00:1f.4
1467 13:12:57.642930 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1468 13:12:57.653386 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1469 13:12:57.653474 PCI: 00:1f.5
1470 13:12:57.663391 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1471 13:12:57.666781 Done allocating resources.
1472 13:12:57.673196 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1473 13:12:57.676375 Enabling resources...
1474 13:12:57.679807 PCI: 00:00.0 subsystem <- 8086/9b61
1475 13:12:57.683022 PCI: 00:00.0 cmd <- 06
1476 13:12:57.686435 PCI: 00:02.0 subsystem <- 8086/9b41
1477 13:12:57.689826 PCI: 00:02.0 cmd <- 03
1478 13:12:57.689944 PCI: 00:08.0 cmd <- 06
1479 13:12:57.696529 PCI: 00:12.0 subsystem <- 8086/02f9
1480 13:12:57.696610 PCI: 00:12.0 cmd <- 02
1481 13:12:57.700029 PCI: 00:14.0 subsystem <- 8086/02ed
1482 13:12:57.703112 PCI: 00:14.0 cmd <- 02
1483 13:12:57.706573 PCI: 00:14.2 cmd <- 02
1484 13:12:57.709992 PCI: 00:14.3 subsystem <- 8086/02f0
1485 13:12:57.713270 PCI: 00:14.3 cmd <- 02
1486 13:12:57.716471 PCI: 00:15.0 subsystem <- 8086/02e8
1487 13:12:57.719970 PCI: 00:15.0 cmd <- 02
1488 13:12:57.723187 PCI: 00:15.1 subsystem <- 8086/02e9
1489 13:12:57.726454 PCI: 00:15.1 cmd <- 02
1490 13:12:57.729652 PCI: 00:16.0 subsystem <- 8086/02e0
1491 13:12:57.729756 PCI: 00:16.0 cmd <- 02
1492 13:12:57.736765 PCI: 00:17.0 subsystem <- 8086/02d3
1493 13:12:57.736874 PCI: 00:17.0 cmd <- 03
1494 13:12:57.740297 PCI: 00:19.0 subsystem <- 8086/02c5
1495 13:12:57.743154 PCI: 00:19.0 cmd <- 02
1496 13:12:57.746229 PCI: 00:1d.0 bridge ctrl <- 0013
1497 13:12:57.749535 PCI: 00:1d.0 subsystem <- 8086/02b0
1498 13:12:57.752903 PCI: 00:1d.0 cmd <- 06
1499 13:12:57.756844 PCI: 00:1e.0 subsystem <- 8086/02a8
1500 13:12:57.760147 PCI: 00:1e.0 cmd <- 06
1501 13:12:57.762877 PCI: 00:1e.2 subsystem <- 8086/02aa
1502 13:12:57.766433 PCI: 00:1e.2 cmd <- 06
1503 13:12:57.769815 PCI: 00:1e.3 subsystem <- 8086/02ab
1504 13:12:57.772975 PCI: 00:1e.3 cmd <- 02
1505 13:12:57.776450 PCI: 00:1f.0 subsystem <- 8086/0284
1506 13:12:57.780028 PCI: 00:1f.0 cmd <- 407
1507 13:12:57.783122 PCI: 00:1f.3 subsystem <- 8086/02c8
1508 13:12:57.786380 PCI: 00:1f.3 cmd <- 02
1509 13:12:57.789996 PCI: 00:1f.4 subsystem <- 8086/02a3
1510 13:12:57.790105 PCI: 00:1f.4 cmd <- 03
1511 13:12:57.796571 PCI: 00:1f.5 subsystem <- 8086/02a4
1512 13:12:57.796654 PCI: 00:1f.5 cmd <- 406
1513 13:12:57.806576 PCI: 01:00.0 cmd <- 02
1514 13:12:57.811534 done.
1515 13:12:57.825256 ME: Version: 14.0.39.1367
1516 13:12:57.832034 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1517 13:12:57.835432 Initializing devices...
1518 13:12:57.835533 Root Device init ...
1519 13:12:57.842257 Chrome EC: Set SMI mask to 0x0000000000000000
1520 13:12:57.845036 Chrome EC: clear events_b mask to 0x0000000000000000
1521 13:12:57.851719 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1522 13:12:57.858837 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1523 13:12:57.865224 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1524 13:12:57.868122 Chrome EC: Set WAKE mask to 0x0000000000000000
1525 13:12:57.871823 Root Device init finished in 35168 usecs
1526 13:12:57.875536 CPU_CLUSTER: 0 init ...
1527 13:12:57.881719 CPU_CLUSTER: 0 init finished in 2448 usecs
1528 13:12:57.886056 PCI: 00:00.0 init ...
1529 13:12:57.889361 CPU TDP: 15 Watts
1530 13:12:57.892693 CPU PL2 = 64 Watts
1531 13:12:57.896020 PCI: 00:00.0 init finished in 7082 usecs
1532 13:12:57.899383 PCI: 00:02.0 init ...
1533 13:12:57.902561 PCI: 00:02.0 init finished in 2253 usecs
1534 13:12:57.906062 PCI: 00:08.0 init ...
1535 13:12:57.909334 PCI: 00:08.0 init finished in 2252 usecs
1536 13:12:57.912592 PCI: 00:12.0 init ...
1537 13:12:57.916105 PCI: 00:12.0 init finished in 2252 usecs
1538 13:12:57.918862 PCI: 00:14.0 init ...
1539 13:12:57.922514 PCI: 00:14.0 init finished in 2251 usecs
1540 13:12:57.925633 PCI: 00:14.2 init ...
1541 13:12:57.929206 PCI: 00:14.2 init finished in 2253 usecs
1542 13:12:57.932486 PCI: 00:14.3 init ...
1543 13:12:57.936053 PCI: 00:14.3 init finished in 2271 usecs
1544 13:12:57.939423 PCI: 00:15.0 init ...
1545 13:12:57.942890 DW I2C bus 0 at 0xd121f000 (400 KHz)
1546 13:12:57.945676 PCI: 00:15.0 init finished in 5975 usecs
1547 13:12:57.949147 PCI: 00:15.1 init ...
1548 13:12:57.952411 DW I2C bus 1 at 0xd1220000 (400 KHz)
1549 13:12:57.958982 PCI: 00:15.1 init finished in 5974 usecs
1550 13:12:57.959091 PCI: 00:16.0 init ...
1551 13:12:57.965091 PCI: 00:16.0 init finished in 2251 usecs
1552 13:12:57.968458 PCI: 00:19.0 init ...
1553 13:12:57.971877 DW I2C bus 4 at 0xd1222000 (400 KHz)
1554 13:12:57.975259 PCI: 00:19.0 init finished in 5973 usecs
1555 13:12:57.978395 PCI: 00:1d.0 init ...
1556 13:12:57.981760 Initializing PCH PCIe bridge.
1557 13:12:57.984980 PCI: 00:1d.0 init finished in 5274 usecs
1558 13:12:57.988865 PCI: 00:1f.0 init ...
1559 13:12:57.991806 IOAPIC: Initializing IOAPIC at 0xfec00000
1560 13:12:57.998764 IOAPIC: Bootstrap Processor Local APIC = 0x00
1561 13:12:57.998872 IOAPIC: ID = 0x02
1562 13:12:58.001761 IOAPIC: Dumping registers
1563 13:12:58.004969 reg 0x0000: 0x02000000
1564 13:12:58.009028 reg 0x0001: 0x00770020
1565 13:12:58.009141 reg 0x0002: 0x00000000
1566 13:12:58.015090 PCI: 00:1f.0 init finished in 23528 usecs
1567 13:12:58.018243 PCI: 00:1f.4 init ...
1568 13:12:58.022099 PCI: 00:1f.4 init finished in 2262 usecs
1569 13:12:58.031933 PCI: 01:00.0 init ...
1570 13:12:58.035343 PCI: 01:00.0 init finished in 2250 usecs
1571 13:12:58.039624 PNP: 0c09.0 init ...
1572 13:12:58.042964 Google Chrome EC uptime: 11.097 seconds
1573 13:12:58.049695 Google Chrome AP resets since EC boot: 0
1574 13:12:58.053097 Google Chrome most recent AP reset causes:
1575 13:12:58.059826 Google Chrome EC reset flags at last EC boot: reset-pin
1576 13:12:58.063217 PNP: 0c09.0 init finished in 20567 usecs
1577 13:12:58.065912 Devices initialized
1578 13:12:58.065990 Show all devs... After init.
1579 13:12:58.069229 Root Device: enabled 1
1580 13:12:58.072740 CPU_CLUSTER: 0: enabled 1
1581 13:12:58.075996 DOMAIN: 0000: enabled 1
1582 13:12:58.076075 APIC: 00: enabled 1
1583 13:12:58.079220 PCI: 00:00.0: enabled 1
1584 13:12:58.082342 PCI: 00:02.0: enabled 1
1585 13:12:58.085816 PCI: 00:04.0: enabled 0
1586 13:12:58.085902 PCI: 00:05.0: enabled 0
1587 13:12:58.089360 PCI: 00:12.0: enabled 1
1588 13:12:58.092552 PCI: 00:12.5: enabled 0
1589 13:12:58.095922 PCI: 00:12.6: enabled 0
1590 13:12:58.096000 PCI: 00:14.0: enabled 1
1591 13:12:58.099466 PCI: 00:14.1: enabled 0
1592 13:12:58.102806 PCI: 00:14.3: enabled 1
1593 13:12:58.102911 PCI: 00:14.5: enabled 0
1594 13:12:58.106016 PCI: 00:15.0: enabled 1
1595 13:12:58.109265 PCI: 00:15.1: enabled 1
1596 13:12:58.112496 PCI: 00:15.2: enabled 0
1597 13:12:58.112579 PCI: 00:15.3: enabled 0
1598 13:12:58.115978 PCI: 00:16.0: enabled 1
1599 13:12:58.119239 PCI: 00:16.1: enabled 0
1600 13:12:58.122557 PCI: 00:16.2: enabled 0
1601 13:12:58.122641 PCI: 00:16.3: enabled 0
1602 13:12:58.125776 PCI: 00:16.4: enabled 0
1603 13:12:58.129280 PCI: 00:16.5: enabled 0
1604 13:12:58.132229 PCI: 00:17.0: enabled 1
1605 13:12:58.132343 PCI: 00:19.0: enabled 1
1606 13:12:58.135668 PCI: 00:19.1: enabled 0
1607 13:12:58.139141 PCI: 00:19.2: enabled 0
1608 13:12:58.139233 PCI: 00:1a.0: enabled 0
1609 13:12:58.142463 PCI: 00:1c.0: enabled 0
1610 13:12:58.145763 PCI: 00:1c.1: enabled 0
1611 13:12:58.148690 PCI: 00:1c.2: enabled 0
1612 13:12:58.148770 PCI: 00:1c.3: enabled 0
1613 13:12:58.151842 PCI: 00:1c.4: enabled 0
1614 13:12:58.155478 PCI: 00:1c.5: enabled 0
1615 13:12:58.158744 PCI: 00:1c.6: enabled 0
1616 13:12:58.158835 PCI: 00:1c.7: enabled 0
1617 13:12:58.161952 PCI: 00:1d.0: enabled 1
1618 13:12:58.165407 PCI: 00:1d.1: enabled 0
1619 13:12:58.168714 PCI: 00:1d.2: enabled 0
1620 13:12:58.168823 PCI: 00:1d.3: enabled 0
1621 13:12:58.171925 PCI: 00:1d.4: enabled 0
1622 13:12:58.174870 PCI: 00:1d.5: enabled 0
1623 13:12:58.178124 PCI: 00:1e.0: enabled 1
1624 13:12:58.178237 PCI: 00:1e.1: enabled 0
1625 13:12:58.181683 PCI: 00:1e.2: enabled 1
1626 13:12:58.184709 PCI: 00:1e.3: enabled 1
1627 13:12:58.184799 PCI: 00:1f.0: enabled 1
1628 13:12:58.188206 PCI: 00:1f.1: enabled 0
1629 13:12:58.191527 PCI: 00:1f.2: enabled 0
1630 13:12:58.194958 PCI: 00:1f.3: enabled 1
1631 13:12:58.195067 PCI: 00:1f.4: enabled 1
1632 13:12:58.198427 PCI: 00:1f.5: enabled 1
1633 13:12:58.201634 PCI: 00:1f.6: enabled 0
1634 13:12:58.204501 USB0 port 0: enabled 1
1635 13:12:58.204609 I2C: 01:15: enabled 1
1636 13:12:58.208420 I2C: 02:5d: enabled 1
1637 13:12:58.211434 GENERIC: 0.0: enabled 1
1638 13:12:58.211540 I2C: 03:1a: enabled 1
1639 13:12:58.214747 I2C: 03:38: enabled 1
1640 13:12:58.218061 I2C: 03:39: enabled 1
1641 13:12:58.218142 I2C: 03:3a: enabled 1
1642 13:12:58.221443 I2C: 03:3b: enabled 1
1643 13:12:58.224748 PCI: 00:00.0: enabled 1
1644 13:12:58.224834 SPI: 00: enabled 1
1645 13:12:58.228065 SPI: 01: enabled 1
1646 13:12:58.231613 PNP: 0c09.0: enabled 1
1647 13:12:58.231725 USB2 port 0: enabled 1
1648 13:12:58.234315 USB2 port 1: enabled 1
1649 13:12:58.237594 USB2 port 2: enabled 0
1650 13:12:58.240895 USB2 port 3: enabled 0
1651 13:12:58.240978 USB2 port 5: enabled 0
1652 13:12:58.244201 USB2 port 6: enabled 1
1653 13:12:58.247575 USB2 port 9: enabled 1
1654 13:12:58.247657 USB3 port 0: enabled 1
1655 13:12:58.251106 USB3 port 1: enabled 1
1656 13:12:58.254620 USB3 port 2: enabled 1
1657 13:12:58.257855 USB3 port 3: enabled 1
1658 13:12:58.257938 USB3 port 4: enabled 0
1659 13:12:58.260496 APIC: 02: enabled 1
1660 13:12:58.260595 APIC: 04: enabled 1
1661 13:12:58.263976 APIC: 07: enabled 1
1662 13:12:58.267256 APIC: 01: enabled 1
1663 13:12:58.267343 APIC: 05: enabled 1
1664 13:12:58.270932 APIC: 03: enabled 1
1665 13:12:58.274071 APIC: 06: enabled 1
1666 13:12:58.274155 PCI: 00:08.0: enabled 1
1667 13:12:58.277472 PCI: 00:14.2: enabled 1
1668 13:12:58.280852 PCI: 01:00.0: enabled 1
1669 13:12:58.284034 Disabling ACPI via APMC:
1670 13:12:58.287360 done.
1671 13:12:58.290866 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1672 13:12:58.293992 ELOG: NV offset 0xaf0000 size 0x4000
1673 13:12:58.301476 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1674 13:12:58.307886 ELOG: Event(17) added with size 13 at 2024-01-08 13:10:19 UTC
1675 13:12:58.314237 ELOG: Event(92) added with size 9 at 2024-01-08 13:10:19 UTC
1676 13:12:58.321115 ELOG: Event(93) added with size 9 at 2024-01-08 13:10:19 UTC
1677 13:12:58.327872 ELOG: Event(9A) added with size 9 at 2024-01-08 13:10:19 UTC
1678 13:12:58.334733 ELOG: Event(9E) added with size 10 at 2024-01-08 13:10:19 UTC
1679 13:12:58.340908 ELOG: Event(9F) added with size 14 at 2024-01-08 13:10:19 UTC
1680 13:12:58.344185 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1681 13:12:58.351671 ELOG: Event(A1) added with size 10 at 2024-01-08 13:10:19 UTC
1682 13:12:58.361962 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1683 13:12:58.368054 ELOG: Event(A0) added with size 9 at 2024-01-08 13:10:19 UTC
1684 13:12:58.371623 elog_add_boot_reason: Logged dev mode boot
1685 13:12:58.371702 Finalize devices...
1686 13:12:58.374819 PCI: 00:17.0 final
1687 13:12:58.378104 Devices finalized
1688 13:12:58.381553 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1689 13:12:58.388277 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1690 13:12:58.391592 ME: HFSTS1 : 0x90000245
1691 13:12:58.395109 ME: HFSTS2 : 0x3B850126
1692 13:12:58.401094 ME: HFSTS3 : 0x00000020
1693 13:12:58.404545 ME: HFSTS4 : 0x00004800
1694 13:12:58.408183 ME: HFSTS5 : 0x00000000
1695 13:12:58.411323 ME: HFSTS6 : 0x40400006
1696 13:12:58.414508 ME: Manufacturing Mode : NO
1697 13:12:58.417627 ME: FW Partition Table : OK
1698 13:12:58.420921 ME: Bringup Loader Failure : NO
1699 13:12:58.424272 ME: Firmware Init Complete : YES
1700 13:12:58.427933 ME: Boot Options Present : NO
1701 13:12:58.431369 ME: Update In Progress : NO
1702 13:12:58.434159 ME: D0i3 Support : YES
1703 13:12:58.437858 ME: Low Power State Enabled : NO
1704 13:12:58.440738 ME: CPU Replaced : NO
1705 13:12:58.444088 ME: CPU Replacement Valid : YES
1706 13:12:58.447741 ME: Current Working State : 5
1707 13:12:58.450927 ME: Current Operation State : 1
1708 13:12:58.454291 ME: Current Operation Mode : 0
1709 13:12:58.457448 ME: Error Code : 0
1710 13:12:58.460595 ME: CPU Debug Disabled : YES
1711 13:12:58.463925 ME: TXT Support : NO
1712 13:12:58.470726 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1713 13:12:58.477426 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1714 13:12:58.477517 CBFS @ c08000 size 3f8000
1715 13:12:58.484192 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1716 13:12:58.487478 CBFS: Locating 'fallback/dsdt.aml'
1717 13:12:58.490678 CBFS: Found @ offset 10bb80 size 3fa5
1718 13:12:58.497531 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1719 13:12:58.500796 CBFS @ c08000 size 3f8000
1720 13:12:58.504118 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1721 13:12:58.506961 CBFS: Locating 'fallback/slic'
1722 13:12:58.512156 CBFS: 'fallback/slic' not found.
1723 13:12:58.519063 ACPI: Writing ACPI tables at 99b3e000.
1724 13:12:58.519149 ACPI: * FACS
1725 13:12:58.521991 ACPI: * DSDT
1726 13:12:58.525259 Ramoops buffer: 0x100000@0x99a3d000.
1727 13:12:58.528688 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1728 13:12:58.535147 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1729 13:12:58.538635 Google Chrome EC: version:
1730 13:12:58.541813 ro: helios_v2.0.2659-56403530b
1731 13:12:58.545426 rw: helios_v2.0.2849-c41de27e7d
1732 13:12:58.545531 running image: 1
1733 13:12:58.549413 ACPI: * FADT
1734 13:12:58.549490 SCI is IRQ9
1735 13:12:58.555903 ACPI: added table 1/32, length now 40
1736 13:12:58.556009 ACPI: * SSDT
1737 13:12:58.559398 Found 1 CPU(s) with 8 core(s) each.
1738 13:12:58.562355 Error: Could not locate 'wifi_sar' in VPD.
1739 13:12:58.569077 Checking CBFS for default SAR values
1740 13:12:58.572489 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1741 13:12:58.576133 CBFS @ c08000 size 3f8000
1742 13:12:58.582461 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1743 13:12:58.585595 CBFS: Locating 'wifi_sar_defaults.hex'
1744 13:12:58.589260 CBFS: Found @ offset 5fac0 size 77
1745 13:12:58.592646 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1746 13:12:58.598852 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1747 13:12:58.602538 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1748 13:12:58.609191 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1749 13:12:58.612651 failed to find key in VPD: dsm_calib_r0_0
1750 13:12:58.621974 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1751 13:12:58.625460 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1752 13:12:58.629008 failed to find key in VPD: dsm_calib_r0_1
1753 13:12:58.638462 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1754 13:12:58.645477 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1755 13:12:58.648881 failed to find key in VPD: dsm_calib_r0_2
1756 13:12:58.658417 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1757 13:12:58.661842 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1758 13:12:58.668177 failed to find key in VPD: dsm_calib_r0_3
1759 13:12:58.674995 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1760 13:12:58.681396 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1761 13:12:58.684832 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1762 13:12:58.688195 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1763 13:12:58.692016 EC returned error result code 1
1764 13:12:58.695801 EC returned error result code 1
1765 13:12:58.699663 EC returned error result code 1
1766 13:12:58.706453 PS2K: Bad resp from EC. Vivaldi disabled!
1767 13:12:58.709738 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1768 13:12:58.716309 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1769 13:12:58.722870 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1770 13:12:58.726294 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1771 13:12:58.732711 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1772 13:12:58.739407 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1773 13:12:58.745938 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1774 13:12:58.749287 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1775 13:12:58.755944 ACPI: added table 2/32, length now 44
1776 13:12:58.756062 ACPI: * MCFG
1777 13:12:58.759166 ACPI: added table 3/32, length now 48
1778 13:12:58.762394 ACPI: * TPM2
1779 13:12:58.765864 TPM2 log created at 99a2d000
1780 13:12:58.769243 ACPI: added table 4/32, length now 52
1781 13:12:58.769357 ACPI: * MADT
1782 13:12:58.772736 SCI is IRQ9
1783 13:12:58.775528 ACPI: added table 5/32, length now 56
1784 13:12:58.775611 current = 99b43ac0
1785 13:12:58.778903 ACPI: * DMAR
1786 13:12:58.782559 ACPI: added table 6/32, length now 60
1787 13:12:58.786042 ACPI: * IGD OpRegion
1788 13:12:58.786177 GMA: Found VBT in CBFS
1789 13:12:58.789546 GMA: Found valid VBT in CBFS
1790 13:12:58.792073 ACPI: added table 7/32, length now 64
1791 13:12:58.795563 ACPI: * HPET
1792 13:12:58.798607 ACPI: added table 8/32, length now 68
1793 13:12:58.802009 ACPI: done.
1794 13:12:58.802106 ACPI tables: 31744 bytes.
1795 13:12:58.805727 smbios_write_tables: 99a2c000
1796 13:12:58.809280 EC returned error result code 3
1797 13:12:58.812719 Couldn't obtain OEM name from CBI
1798 13:12:58.815842 Create SMBIOS type 17
1799 13:12:58.819194 PCI: 00:00.0 (Intel Cannonlake)
1800 13:12:58.822510 PCI: 00:14.3 (Intel WiFi)
1801 13:12:58.825865 SMBIOS tables: 939 bytes.
1802 13:12:58.829114 Writing table forward entry at 0x00000500
1803 13:12:58.835331 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1804 13:12:58.838929 Writing coreboot table at 0x99b62000
1805 13:12:58.845746 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1806 13:12:58.848597 1. 0000000000001000-000000000009ffff: RAM
1807 13:12:58.851881 2. 00000000000a0000-00000000000fffff: RESERVED
1808 13:12:58.859012 3. 0000000000100000-0000000099a2bfff: RAM
1809 13:12:58.862244 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1810 13:12:58.869100 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1811 13:12:58.875300 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1812 13:12:58.879254 7. 000000009a000000-000000009f7fffff: RESERVED
1813 13:12:58.885324 8. 00000000e0000000-00000000efffffff: RESERVED
1814 13:12:58.888419 9. 00000000fc000000-00000000fc000fff: RESERVED
1815 13:12:58.891781 10. 00000000fe000000-00000000fe00ffff: RESERVED
1816 13:12:58.898416 11. 00000000fed10000-00000000fed17fff: RESERVED
1817 13:12:58.901915 12. 00000000fed80000-00000000fed83fff: RESERVED
1818 13:12:58.908516 13. 00000000fed90000-00000000fed91fff: RESERVED
1819 13:12:58.911783 14. 00000000feda0000-00000000feda1fff: RESERVED
1820 13:12:58.918552 15. 0000000100000000-000000045e7fffff: RAM
1821 13:12:58.921785 Graphics framebuffer located at 0xc0000000
1822 13:12:58.925533 Passing 5 GPIOs to payload:
1823 13:12:58.928026 NAME | PORT | POLARITY | VALUE
1824 13:12:58.934696 write protect | undefined | high | low
1825 13:12:58.938044 lid | undefined | high | high
1826 13:12:58.944650 power | undefined | high | low
1827 13:12:58.951151 oprom | undefined | high | low
1828 13:12:58.955061 EC in RW | 0x000000cb | high | low
1829 13:12:58.958153 Board ID: 4
1830 13:12:58.961565 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1831 13:12:58.964927 CBFS @ c08000 size 3f8000
1832 13:12:58.971380 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1833 13:12:58.974571 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1834 13:12:58.977729 coreboot table: 1492 bytes.
1835 13:12:58.981300 IMD ROOT 0. 99fff000 00001000
1836 13:12:58.984783 IMD SMALL 1. 99ffe000 00001000
1837 13:12:58.987642 FSP MEMORY 2. 99c4e000 003b0000
1838 13:12:58.991489 CONSOLE 3. 99c2e000 00020000
1839 13:12:58.994499 FMAP 4. 99c2d000 0000054e
1840 13:12:58.997910 TIME STAMP 5. 99c2c000 00000910
1841 13:12:59.001193 VBOOT WORK 6. 99c18000 00014000
1842 13:12:59.004684 MRC DATA 7. 99c16000 00001958
1843 13:12:59.007591 ROMSTG STCK 8. 99c15000 00001000
1844 13:12:59.011164 AFTER CAR 9. 99c0b000 0000a000
1845 13:12:59.014594 RAMSTAGE 10. 99baf000 0005c000
1846 13:12:59.018052 REFCODE 11. 99b7a000 00035000
1847 13:12:59.021261 SMM BACKUP 12. 99b6a000 00010000
1848 13:12:59.024366 COREBOOT 13. 99b62000 00008000
1849 13:12:59.027983 ACPI 14. 99b3e000 00024000
1850 13:12:59.030959 ACPI GNVS 15. 99b3d000 00001000
1851 13:12:59.034220 RAMOOPS 16. 99a3d000 00100000
1852 13:12:59.037543 TPM2 TCGLOG17. 99a2d000 00010000
1853 13:12:59.040941 SMBIOS 18. 99a2c000 00000800
1854 13:12:59.044223 IMD small region:
1855 13:12:59.047591 IMD ROOT 0. 99ffec00 00000400
1856 13:12:59.051464 FSP RUNTIME 1. 99ffebe0 00000004
1857 13:12:59.054974 EC HOSTEVENT 2. 99ffebc0 00000008
1858 13:12:59.057509 POWER STATE 3. 99ffeb80 00000040
1859 13:12:59.060748 ROMSTAGE 4. 99ffeb60 00000004
1860 13:12:59.064392 MEM INFO 5. 99ffe9a0 000001b9
1861 13:12:59.067741 VPD 6. 99ffe920 0000006c
1862 13:12:59.071092 MTRR: Physical address space:
1863 13:12:59.077406 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1864 13:12:59.084275 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1865 13:12:59.090757 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1866 13:12:59.097419 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1867 13:12:59.104401 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1868 13:12:59.110869 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1869 13:12:59.114230 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1870 13:12:59.120691 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 13:12:59.123781 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 13:12:59.127214 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 13:12:59.130604 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 13:12:59.137043 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 13:12:59.140413 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 13:12:59.143668 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 13:12:59.146998 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 13:12:59.153674 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 13:12:59.156875 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 13:12:59.160185 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 13:12:59.163565 call enable_fixed_mtrr()
1882 13:12:59.166694 CPU physical address size: 39 bits
1883 13:12:59.170452 MTRR: default type WB/UC MTRR counts: 6/8.
1884 13:12:59.173944 MTRR: WB selected as default type.
1885 13:12:59.179810 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1886 13:12:59.186661 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1887 13:12:59.193346 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1888 13:12:59.199884 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1889 13:12:59.206504 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1890 13:12:59.213192 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1891 13:12:59.216424 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 13:12:59.223307 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 13:12:59.226494 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 13:12:59.229912 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 13:12:59.232923 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 13:12:59.236273 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 13:12:59.243200 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 13:12:59.246409 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 13:12:59.249320 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 13:12:59.252898 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 13:12:59.259514 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 13:12:59.259647
1903 13:12:59.259752 MTRR check
1904 13:12:59.262712 Fixed MTRRs : Enabled
1905 13:12:59.266270 Variable MTRRs: Enabled
1906 13:12:59.266374
1907 13:12:59.269273 call enable_fixed_mtrr()
1908 13:12:59.272798 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1909 13:12:59.275973 CPU physical address size: 39 bits
1910 13:12:59.282523 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1911 13:12:59.285763 MTRR: Fixed MSR 0x250 0x0606060606060606
1912 13:12:59.288980 MTRR: Fixed MSR 0x250 0x0606060606060606
1913 13:12:59.295539 MTRR: Fixed MSR 0x258 0x0606060606060606
1914 13:12:59.298761 MTRR: Fixed MSR 0x259 0x0000000000000000
1915 13:12:59.302255 MTRR: Fixed MSR 0x268 0x0606060606060606
1916 13:12:59.306016 MTRR: Fixed MSR 0x269 0x0606060606060606
1917 13:12:59.309359 MTRR: Fixed MSR 0x26a 0x0606060606060606
1918 13:12:59.315397 MTRR: Fixed MSR 0x26b 0x0606060606060606
1919 13:12:59.318613 MTRR: Fixed MSR 0x26c 0x0606060606060606
1920 13:12:59.321987 MTRR: Fixed MSR 0x26d 0x0606060606060606
1921 13:12:59.325717 MTRR: Fixed MSR 0x26e 0x0606060606060606
1922 13:12:59.331722 MTRR: Fixed MSR 0x26f 0x0606060606060606
1923 13:12:59.335354 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 13:12:59.338649 call enable_fixed_mtrr()
1925 13:12:59.341931 MTRR: Fixed MSR 0x259 0x0000000000000000
1926 13:12:59.345146 MTRR: Fixed MSR 0x268 0x0606060606060606
1927 13:12:59.348819 MTRR: Fixed MSR 0x269 0x0606060606060606
1928 13:12:59.355102 MTRR: Fixed MSR 0x26a 0x0606060606060606
1929 13:12:59.358301 MTRR: Fixed MSR 0x26b 0x0606060606060606
1930 13:12:59.361636 MTRR: Fixed MSR 0x26c 0x0606060606060606
1931 13:12:59.365097 MTRR: Fixed MSR 0x26d 0x0606060606060606
1932 13:12:59.371668 MTRR: Fixed MSR 0x26e 0x0606060606060606
1933 13:12:59.375258 MTRR: Fixed MSR 0x26f 0x0606060606060606
1934 13:12:59.378578 CPU physical address size: 39 bits
1935 13:12:59.381677 call enable_fixed_mtrr()
1936 13:12:59.385176 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 13:12:59.388365 MTRR: Fixed MSR 0x250 0x0606060606060606
1938 13:12:59.395184 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 13:12:59.398721 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 13:12:59.401840 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 13:12:59.405317 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 13:12:59.411769 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 13:12:59.414897 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 13:12:59.418251 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 13:12:59.421686 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 13:12:59.424963 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 13:12:59.431777 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 13:12:59.435179 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 13:12:59.438298 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 13:12:59.444216 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 13:12:59.447615 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 13:12:59.451067 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 13:12:59.454490 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 13:12:59.457897 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 13:12:59.464528 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 13:12:59.467585 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 13:12:59.470765 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 13:12:59.474298 call enable_fixed_mtrr()
1959 13:12:59.477597 call enable_fixed_mtrr()
1960 13:12:59.480826 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 13:12:59.484274 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 13:12:59.490503 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 13:12:59.494029 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 13:12:59.497484 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 13:12:59.500834 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 13:12:59.504260 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 13:12:59.510545 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 13:12:59.514157 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 13:12:59.517203 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 13:12:59.520578 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 13:12:59.527591 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 13:12:59.530874 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 13:12:59.533630 call enable_fixed_mtrr()
1974 13:12:59.536924 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 13:12:59.540227 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 13:12:59.543465 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 13:12:59.550289 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 13:12:59.553740 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 13:12:59.556908 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 13:12:59.560398 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 13:12:59.566897 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 13:12:59.570260 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 13:12:59.573691 CPU physical address size: 39 bits
1984 13:12:59.576608 call enable_fixed_mtrr()
1985 13:12:59.580080 CPU physical address size: 39 bits
1986 13:12:59.583201 CPU physical address size: 39 bits
1987 13:12:59.586712 CPU physical address size: 39 bits
1988 13:12:59.589960 CBFS @ c08000 size 3f8000
1989 13:12:59.596906 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1990 13:12:59.600104 CBFS: Locating 'fallback/payload'
1991 13:12:59.603387 CPU physical address size: 39 bits
1992 13:12:59.606743 CBFS: Found @ offset 1c96c0 size 3f798
1993 13:12:59.610174 Checking segment from ROM address 0xffdd16f8
1994 13:12:59.616335 Checking segment from ROM address 0xffdd1714
1995 13:12:59.619981 Loading segment from ROM address 0xffdd16f8
1996 13:12:59.623202 code (compression=0)
1997 13:12:59.629592 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1998 13:12:59.639719 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1999 13:12:59.639830 it's not compressed!
2000 13:12:59.733508 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2001 13:12:59.739973 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2002 13:12:59.742994 Loading segment from ROM address 0xffdd1714
2003 13:12:59.746629 Entry Point 0x30000000
2004 13:12:59.749608 Loaded segments
2005 13:12:59.755528 Finalizing chipset.
2006 13:12:59.790489 Finalizing SMM.
2007 13:12:59.790626 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2008 13:12:59.790705 mp_park_aps done after 0 msecs.
2009 13:12:59.790769 Jumping to boot code at 30000000(99b62000)
2010 13:12:59.790829 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2011 13:12:59.790889
2012 13:12:59.790946
2013 13:12:59.791002
2014 13:12:59.791058 Starting depthcharge on Helios...
2015 13:12:59.791113
2016 13:12:59.791455 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2017 13:12:59.791554 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2018 13:12:59.791639 Setting prompt string to ['hatch:']
2019 13:12:59.791723 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2020 13:12:59.791872 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2021 13:12:59.791942
2022 13:12:59.798142 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2023 13:12:59.798274
2024 13:12:59.804828 board_setup: Info: eMMC controller not present; skipping
2025 13:12:59.804955
2026 13:12:59.808154 New NVMe Controller 0x30053ac0 @ 00:1d:00
2027 13:12:59.808282
2028 13:12:59.814748 board_setup: Info: SDHCI controller not present; skipping
2029 13:12:59.814891
2030 13:12:59.821272 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2031 13:12:59.821402
2032 13:12:59.821475 Wipe memory regions:
2033 13:12:59.821565
2034 13:12:59.825080 [0x00000000001000, 0x000000000a0000)
2035 13:12:59.825167
2036 13:12:59.828385 [0x00000000100000, 0x00000030000000)
2037 13:12:59.894099
2038 13:12:59.897892 [0x00000030657430, 0x00000099a2c000)
2039 13:13:00.035181
2040 13:13:00.038553 [0x00000100000000, 0x0000045e800000)
2041 13:13:01.420801
2042 13:13:01.420975 R8152: Initializing
2043 13:13:01.421051
2044 13:13:01.423801 Version 9 (ocp_data = 6010)
2045 13:13:01.428557
2046 13:13:01.428662 R8152: Done initializing
2047 13:13:01.428754
2048 13:13:01.431551 Adding net device
2049 13:13:01.914190
2050 13:13:01.914331 R8152: Initializing
2051 13:13:01.914401
2052 13:13:01.917433 Version 6 (ocp_data = 5c30)
2053 13:13:01.917520
2054 13:13:01.921244 R8152: Done initializing
2055 13:13:01.921326
2056 13:13:01.924464 net_add_device: Attemp to include the same device
2057 13:13:01.927660
2058 13:13:01.934773 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2059 13:13:01.934892
2060 13:13:01.935020
2061 13:13:01.935122
2062 13:13:01.935429 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2064 13:13:02.035741 hatch: tftpboot 192.168.201.1 12482791/tftp-deploy-yzs36x_9/kernel/bzImage 12482791/tftp-deploy-yzs36x_9/kernel/cmdline 12482791/tftp-deploy-yzs36x_9/ramdisk/ramdisk.cpio.gz
2065 13:13:02.035918 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2066 13:13:02.036013 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2067 13:13:02.040081 tftpboot 192.168.201.1 12482791/tftp-deploy-yzs36x_9/kernel/bzImaploy-yzs36x_9/kernel/cmdline 12482791/tftp-deploy-yzs36x_9/ramdisk/ramdisk.cpio.gz
2068 13:13:02.040166
2069 13:13:02.040231 Waiting for link
2070 13:13:02.241142
2071 13:13:02.241342 done.
2072 13:13:02.241416
2073 13:13:02.241487 MAC: 00:24:32:50:19:be
2074 13:13:02.241548
2075 13:13:02.244694 Sending DHCP discover... done.
2076 13:13:02.244779
2077 13:13:02.247642 Waiting for reply... done.
2078 13:13:02.247718
2079 13:13:02.251297 Sending DHCP request... done.
2080 13:13:02.251432
2081 13:13:02.254536 Waiting for reply... done.
2082 13:13:02.254617
2083 13:13:02.257513 My ip is 192.168.201.15
2084 13:13:02.257590
2085 13:13:02.260847 The DHCP server ip is 192.168.201.1
2086 13:13:02.260963
2087 13:13:02.264250 TFTP server IP predefined by user: 192.168.201.1
2088 13:13:02.264437
2089 13:13:02.271246 Bootfile predefined by user: 12482791/tftp-deploy-yzs36x_9/kernel/bzImage
2090 13:13:02.271359
2091 13:13:02.274439 Sending tftp read request... done.
2092 13:13:02.274547
2093 13:13:02.281441 Waiting for the transfer...
2094 13:13:02.281541
2095 13:13:02.825845 00000000 ################################################################
2096 13:13:02.826034
2097 13:13:03.339134 00080000 ################################################################
2098 13:13:03.339301
2099 13:13:03.906195 00100000 ################################################################
2100 13:13:03.906374
2101 13:13:04.495006 00180000 ################################################################
2102 13:13:04.495178
2103 13:13:05.030543 00200000 ################################################################
2104 13:13:05.030679
2105 13:13:05.565807 00280000 ################################################################
2106 13:13:05.565966
2107 13:13:06.107479 00300000 ################################################################
2108 13:13:06.107652
2109 13:13:06.638803 00380000 ################################################################
2110 13:13:06.638969
2111 13:13:07.163460 00400000 ################################################################
2112 13:13:07.163596
2113 13:13:07.687407 00480000 ################################################################
2114 13:13:07.687667
2115 13:13:08.206274 00500000 ################################################################
2116 13:13:08.206407
2117 13:13:08.730753 00580000 ################################################################
2118 13:13:08.730888
2119 13:13:09.266783 00600000 ################################################################
2120 13:13:09.266928
2121 13:13:09.823799 00680000 ################################################################
2122 13:13:09.823934
2123 13:13:10.380391 00700000 ################################################################
2124 13:13:10.380528
2125 13:13:10.929867 00780000 ################################################################
2126 13:13:10.929998
2127 13:13:11.480183 00800000 ################################################################
2128 13:13:11.480377
2129 13:13:11.990552 00880000 ################################################################
2130 13:13:11.990719
2131 13:13:12.522120 00900000 ################################################################
2132 13:13:12.522256
2133 13:13:13.052466 00980000 ################################################################
2134 13:13:13.052599
2135 13:13:13.598242 00a00000 ################################################################
2136 13:13:13.598435
2137 13:13:14.143853 00a80000 ################################################################
2138 13:13:14.143987
2139 13:13:14.186010 00b00000 ###### done.
2140 13:13:14.186122
2141 13:13:14.189040 The bootfile was 11575296 bytes long.
2142 13:13:14.189134
2143 13:13:14.192385 Sending tftp read request... done.
2144 13:13:14.192496
2145 13:13:14.195751 Waiting for the transfer...
2146 13:13:14.195861
2147 13:13:14.730933 00000000 ################################################################
2148 13:13:14.731070
2149 13:13:15.274174 00080000 ################################################################
2150 13:13:15.274315
2151 13:13:15.814992 00100000 ################################################################
2152 13:13:15.815151
2153 13:13:16.358992 00180000 ################################################################
2154 13:13:16.359157
2155 13:13:16.896693 00200000 ################################################################
2156 13:13:16.896848
2157 13:13:17.427307 00280000 ################################################################
2158 13:13:17.427442
2159 13:13:17.982903 00300000 ################################################################
2160 13:13:17.983077
2161 13:13:18.516989 00380000 ################################################################
2162 13:13:18.517130
2163 13:13:19.071122 00400000 ################################################################
2164 13:13:19.071261
2165 13:13:19.627542 00480000 ################################################################
2166 13:13:19.627674
2167 13:13:20.277563 00500000 ################################################################
2168 13:13:20.277711
2169 13:13:20.776093 00580000 ################################################ done.
2170 13:13:20.776265
2171 13:13:20.779399 Sending tftp read request... done.
2172 13:13:20.779478
2173 13:13:20.782357 Waiting for the transfer...
2174 13:13:20.782463
2175 13:13:20.785576 00000000 # done.
2176 13:13:20.785677
2177 13:13:20.795704 Command line loaded dynamically from TFTP file: 12482791/tftp-deploy-yzs36x_9/kernel/cmdline
2178 13:13:20.795782
2179 13:13:20.822032 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12482791/extract-nfsrootfs-jlk4vll6,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2180 13:13:20.822124
2181 13:13:20.828717 ec_init(0): CrosEC protocol v3 supported (256, 256)
2182 13:13:20.834007
2183 13:13:20.837337 Shutting down all USB controllers.
2184 13:13:20.837420
2185 13:13:20.837485 Removing current net device
2186 13:13:20.841049
2187 13:13:20.841132 Finalizing coreboot
2188 13:13:20.841202
2189 13:13:20.847837 Exiting depthcharge with code 4 at timestamp: 28408735
2190 13:13:20.847943
2191 13:13:20.848040
2192 13:13:20.848128 Starting kernel ...
2193 13:13:20.848224
2194 13:13:20.848334
2195 13:13:20.848736 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2196 13:13:20.848837 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2197 13:13:20.848915 Setting prompt string to ['Linux version [0-9]']
2198 13:13:20.849008 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2199 13:13:20.849105 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2201 13:17:41.849048 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2203 13:17:41.849286 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2205 13:17:41.849453 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2208 13:17:41.849722 end: 2 depthcharge-action (duration 00:05:00) [common]
2210 13:17:41.849952 Cleaning after the job
2211 13:17:41.850048 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12482791/tftp-deploy-yzs36x_9/ramdisk
2212 13:17:41.851080 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12482791/tftp-deploy-yzs36x_9/kernel
2213 13:17:41.852917 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12482791/tftp-deploy-yzs36x_9/nfsrootfs
2214 13:17:41.931940 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12482791/tftp-deploy-yzs36x_9/modules
2215 13:17:41.932972 start: 5.1 power-off (timeout 00:00:30) [common]
2216 13:17:41.933154 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2217 13:17:42.011087 >> Command sent successfully.
2218 13:17:42.014021 Returned 0 in 0 seconds
2219 13:17:42.114403 end: 5.1 power-off (duration 00:00:00) [common]
2221 13:17:42.114751 start: 5.2 read-feedback (timeout 00:10:00) [common]
2222 13:17:42.115040 Listened to connection for namespace 'common' for up to 1s
2224 13:17:42.115423 Listened to connection for namespace 'common' for up to 1s
2225 13:17:43.116136 Finalising connection for namespace 'common'
2226 13:17:43.116947 Disconnecting from shell: Finalise
2227 13:17:43.117405