Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 03:42:27.599291 lava-dispatcher, installed at version: 2023.10
2 03:42:27.599517 start: 0 validate
3 03:42:27.599657 Start time: 2024-01-16 03:42:27.599649+00:00 (UTC)
4 03:42:27.599791 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:42:27.599928 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 03:42:27.602721 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:42:27.602848 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.304-cip106-27-gf3e967c370d44%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:42:32.104759 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:42:32.105498 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 03:42:32.374410 Using caching service: 'http://localhost/cache/?uri=%s'
11 03:42:32.375204 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.304-cip106-27-gf3e967c370d44%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 03:42:33.378558 validate duration: 5.78
14 03:42:33.378848 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 03:42:33.378951 start: 1.1 download-retry (timeout 00:10:00) [common]
16 03:42:33.379043 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 03:42:33.379166 Not decompressing ramdisk as can be used compressed.
18 03:42:33.379251 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 03:42:33.379315 saving as /var/lib/lava/dispatcher/tmp/12543681/tftp-deploy-_i2u8bok/ramdisk/initrd.cpio.gz
20 03:42:33.379379 total size: 5432690 (5 MB)
21 03:42:33.380509 progress 0 % (0 MB)
22 03:42:33.382210 progress 5 % (0 MB)
23 03:42:33.383708 progress 10 % (0 MB)
24 03:42:33.385256 progress 15 % (0 MB)
25 03:42:33.386949 progress 20 % (1 MB)
26 03:42:33.388531 progress 25 % (1 MB)
27 03:42:33.390022 progress 30 % (1 MB)
28 03:42:33.391665 progress 35 % (1 MB)
29 03:42:33.393166 progress 40 % (2 MB)
30 03:42:33.394797 progress 45 % (2 MB)
31 03:42:33.396342 progress 50 % (2 MB)
32 03:42:33.398030 progress 55 % (2 MB)
33 03:42:33.399542 progress 60 % (3 MB)
34 03:42:33.401107 progress 65 % (3 MB)
35 03:42:33.402777 progress 70 % (3 MB)
36 03:42:33.404224 progress 75 % (3 MB)
37 03:42:33.405678 progress 80 % (4 MB)
38 03:42:33.407115 progress 85 % (4 MB)
39 03:42:33.408740 progress 90 % (4 MB)
40 03:42:33.410254 progress 95 % (4 MB)
41 03:42:33.411706 progress 100 % (5 MB)
42 03:42:33.411928 5 MB downloaded in 0.03 s (159.18 MB/s)
43 03:42:33.412083 end: 1.1.1 http-download (duration 00:00:00) [common]
45 03:42:33.412344 end: 1.1 download-retry (duration 00:00:00) [common]
46 03:42:33.412436 start: 1.2 download-retry (timeout 00:10:00) [common]
47 03:42:33.412522 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 03:42:33.412654 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.304-cip106-27-gf3e967c370d44/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 03:42:33.412725 saving as /var/lib/lava/dispatcher/tmp/12543681/tftp-deploy-_i2u8bok/kernel/bzImage
50 03:42:33.412785 total size: 11575296 (11 MB)
51 03:42:33.412846 No compression specified
52 03:42:33.414055 progress 0 % (0 MB)
53 03:42:33.417129 progress 5 % (0 MB)
54 03:42:33.420359 progress 10 % (1 MB)
55 03:42:33.423474 progress 15 % (1 MB)
56 03:42:33.426736 progress 20 % (2 MB)
57 03:42:33.429969 progress 25 % (2 MB)
58 03:42:33.433148 progress 30 % (3 MB)
59 03:42:33.436428 progress 35 % (3 MB)
60 03:42:33.439640 progress 40 % (4 MB)
61 03:42:33.442938 progress 45 % (4 MB)
62 03:42:33.446653 progress 50 % (5 MB)
63 03:42:33.450132 progress 55 % (6 MB)
64 03:42:33.453500 progress 60 % (6 MB)
65 03:42:33.457022 progress 65 % (7 MB)
66 03:42:33.460408 progress 70 % (7 MB)
67 03:42:33.463391 progress 75 % (8 MB)
68 03:42:33.466663 progress 80 % (8 MB)
69 03:42:33.469979 progress 85 % (9 MB)
70 03:42:33.473043 progress 90 % (9 MB)
71 03:42:33.476170 progress 95 % (10 MB)
72 03:42:33.479344 progress 100 % (11 MB)
73 03:42:33.479490 11 MB downloaded in 0.07 s (165.50 MB/s)
74 03:42:33.479642 end: 1.2.1 http-download (duration 00:00:00) [common]
76 03:42:33.479877 end: 1.2 download-retry (duration 00:00:00) [common]
77 03:42:33.479970 start: 1.3 download-retry (timeout 00:10:00) [common]
78 03:42:33.480059 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 03:42:33.480204 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 03:42:33.480274 saving as /var/lib/lava/dispatcher/tmp/12543681/tftp-deploy-_i2u8bok/nfsrootfs/full.rootfs.tar
81 03:42:33.480352 total size: 133380384 (127 MB)
82 03:42:33.480417 Using unxz to decompress xz
83 03:42:33.484869 progress 0 % (0 MB)
84 03:42:33.847514 progress 5 % (6 MB)
85 03:42:34.219121 progress 10 % (12 MB)
86 03:42:34.529859 progress 15 % (19 MB)
87 03:42:34.729032 progress 20 % (25 MB)
88 03:42:35.003523 progress 25 % (31 MB)
89 03:42:35.363700 progress 30 % (38 MB)
90 03:42:35.730960 progress 35 % (44 MB)
91 03:42:36.153453 progress 40 % (50 MB)
92 03:42:36.561062 progress 45 % (57 MB)
93 03:42:36.934625 progress 50 % (63 MB)
94 03:42:37.316199 progress 55 % (69 MB)
95 03:42:37.690867 progress 60 % (76 MB)
96 03:42:38.075495 progress 65 % (82 MB)
97 03:42:38.468450 progress 70 % (89 MB)
98 03:42:38.855587 progress 75 % (95 MB)
99 03:42:39.307498 progress 80 % (101 MB)
100 03:42:39.758829 progress 85 % (108 MB)
101 03:42:40.035924 progress 90 % (114 MB)
102 03:42:40.405225 progress 95 % (120 MB)
103 03:42:40.818338 progress 100 % (127 MB)
104 03:42:40.824220 127 MB downloaded in 7.34 s (17.32 MB/s)
105 03:42:40.824635 end: 1.3.1 http-download (duration 00:00:07) [common]
107 03:42:40.825154 end: 1.3 download-retry (duration 00:00:07) [common]
108 03:42:40.825295 start: 1.4 download-retry (timeout 00:09:53) [common]
109 03:42:40.825440 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 03:42:40.825662 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.304-cip106-27-gf3e967c370d44/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 03:42:40.825784 saving as /var/lib/lava/dispatcher/tmp/12543681/tftp-deploy-_i2u8bok/modules/modules.tar
112 03:42:40.825893 total size: 484060 (0 MB)
113 03:42:40.826003 Using unxz to decompress xz
114 03:42:40.831608 progress 6 % (0 MB)
115 03:42:40.832220 progress 13 % (0 MB)
116 03:42:40.832665 progress 20 % (0 MB)
117 03:42:40.834121 progress 27 % (0 MB)
118 03:42:40.836118 progress 33 % (0 MB)
119 03:42:40.838061 progress 40 % (0 MB)
120 03:42:40.840038 progress 47 % (0 MB)
121 03:42:40.842129 progress 54 % (0 MB)
122 03:42:40.844128 progress 60 % (0 MB)
123 03:42:40.846185 progress 67 % (0 MB)
124 03:42:40.848226 progress 74 % (0 MB)
125 03:42:40.850307 progress 81 % (0 MB)
126 03:42:40.852215 progress 88 % (0 MB)
127 03:42:40.854209 progress 94 % (0 MB)
128 03:42:40.856657 progress 100 % (0 MB)
129 03:42:40.863073 0 MB downloaded in 0.04 s (12.42 MB/s)
130 03:42:40.863407 end: 1.4.1 http-download (duration 00:00:00) [common]
132 03:42:40.863853 end: 1.4 download-retry (duration 00:00:00) [common]
133 03:42:40.863999 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 03:42:40.864154 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 03:42:43.093090 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12543681/extract-nfsrootfs-w9org9h_
136 03:42:43.093296 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 03:42:43.093400 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 03:42:43.093612 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr
139 03:42:43.093771 makedir: /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin
140 03:42:43.093893 makedir: /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/tests
141 03:42:43.093996 makedir: /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/results
142 03:42:43.094099 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-add-keys
143 03:42:43.094250 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-add-sources
144 03:42:43.094383 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-background-process-start
145 03:42:43.094516 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-background-process-stop
146 03:42:43.094645 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-common-functions
147 03:42:43.094772 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-echo-ipv4
148 03:42:43.094902 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-install-packages
149 03:42:43.095030 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-installed-packages
150 03:42:43.095164 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-os-build
151 03:42:43.095294 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-probe-channel
152 03:42:43.095422 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-probe-ip
153 03:42:43.095550 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-target-ip
154 03:42:43.095677 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-target-mac
155 03:42:43.095804 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-target-storage
156 03:42:43.095933 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-test-case
157 03:42:43.096060 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-test-event
158 03:42:43.096187 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-test-feedback
159 03:42:43.096361 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-test-raise
160 03:42:43.096492 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-test-reference
161 03:42:43.096621 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-test-runner
162 03:42:43.096749 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-test-set
163 03:42:43.096876 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-test-shell
164 03:42:43.097037 Updating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-install-packages (oe)
165 03:42:43.097191 Updating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/bin/lava-installed-packages (oe)
166 03:42:43.097323 Creating /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/environment
167 03:42:43.097424 LAVA metadata
168 03:42:43.097494 - LAVA_JOB_ID=12543681
169 03:42:43.097559 - LAVA_DISPATCHER_IP=192.168.201.1
170 03:42:43.097661 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 03:42:43.097728 skipped lava-vland-overlay
172 03:42:43.097802 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 03:42:43.097883 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 03:42:43.097945 skipped lava-multinode-overlay
175 03:42:43.098018 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 03:42:43.098099 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 03:42:43.098172 Loading test definitions
178 03:42:43.098263 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
179 03:42:43.098334 Using /lava-12543681 at stage 0
180 03:42:43.098656 uuid=12543681_1.5.2.3.1 testdef=None
181 03:42:43.098747 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 03:42:43.098833 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
183 03:42:43.099336 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 03:42:43.099557 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
186 03:42:43.100246 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 03:42:43.100562 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
189 03:42:43.101186 runner path: /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/0/tests/0_dmesg test_uuid 12543681_1.5.2.3.1
190 03:42:43.101345 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 03:42:43.101613 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
193 03:42:43.101686 Using /lava-12543681 at stage 1
194 03:42:43.101998 uuid=12543681_1.5.2.3.5 testdef=None
195 03:42:43.102087 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 03:42:43.102173 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
197 03:42:43.102646 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 03:42:43.102861 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
200 03:42:43.103508 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 03:42:43.103768 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
203 03:42:43.104433 runner path: /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/1/tests/1_bootrr test_uuid 12543681_1.5.2.3.5
204 03:42:43.104588 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 03:42:43.104794 Creating lava-test-runner.conf files
207 03:42:43.104857 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/0 for stage 0
208 03:42:43.104948 - 0_dmesg
209 03:42:43.105027 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12543681/lava-overlay-c6zdblfr/lava-12543681/1 for stage 1
210 03:42:43.105119 - 1_bootrr
211 03:42:43.105214 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 03:42:43.105299 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
213 03:42:43.112752 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 03:42:43.112859 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
215 03:42:43.112944 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 03:42:43.113030 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 03:42:43.113116 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
218 03:42:43.252562 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 03:42:43.252949 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
220 03:42:43.253065 extracting modules file /var/lib/lava/dispatcher/tmp/12543681/tftp-deploy-_i2u8bok/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12543681/extract-nfsrootfs-w9org9h_
221 03:42:43.276151 extracting modules file /var/lib/lava/dispatcher/tmp/12543681/tftp-deploy-_i2u8bok/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12543681/extract-overlay-ramdisk-w77moj94/ramdisk
222 03:42:43.298407 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 03:42:43.298589 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
224 03:42:43.298711 [common] Applying overlay to NFS
225 03:42:43.298813 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12543681/compress-overlay-4s34jsck/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12543681/extract-nfsrootfs-w9org9h_
226 03:42:43.307640 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 03:42:43.307755 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
228 03:42:43.307847 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 03:42:43.307938 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
230 03:42:43.308017 Building ramdisk /var/lib/lava/dispatcher/tmp/12543681/extract-overlay-ramdisk-w77moj94/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12543681/extract-overlay-ramdisk-w77moj94/ramdisk
231 03:42:43.390877 >> 30353 blocks
232 03:42:43.991691 rename /var/lib/lava/dispatcher/tmp/12543681/extract-overlay-ramdisk-w77moj94/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12543681/tftp-deploy-_i2u8bok/ramdisk/ramdisk.cpio.gz
233 03:42:43.992162 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 03:42:43.992327 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
235 03:42:43.992432 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
236 03:42:43.992528 No mkimage arch provided, not using FIT.
237 03:42:43.992618 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 03:42:43.992700 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 03:42:43.992807 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
240 03:42:43.992898 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
241 03:42:43.992976 No LXC device requested
242 03:42:43.993058 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 03:42:43.993149 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
244 03:42:43.993230 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 03:42:43.993305 Checking files for TFTP limit of 4294967296 bytes.
246 03:42:43.993709 end: 1 tftp-deploy (duration 00:00:11) [common]
247 03:42:43.993812 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 03:42:43.993906 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 03:42:43.994033 substitutions:
250 03:42:43.994101 - {DTB}: None
251 03:42:43.994165 - {INITRD}: 12543681/tftp-deploy-_i2u8bok/ramdisk/ramdisk.cpio.gz
252 03:42:43.994226 - {KERNEL}: 12543681/tftp-deploy-_i2u8bok/kernel/bzImage
253 03:42:43.994311 - {LAVA_MAC}: None
254 03:42:43.994409 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12543681/extract-nfsrootfs-w9org9h_
255 03:42:43.994473 - {NFS_SERVER_IP}: 192.168.201.1
256 03:42:43.994531 - {PRESEED_CONFIG}: None
257 03:42:43.994587 - {PRESEED_LOCAL}: None
258 03:42:43.994643 - {RAMDISK}: 12543681/tftp-deploy-_i2u8bok/ramdisk/ramdisk.cpio.gz
259 03:42:43.994698 - {ROOT_PART}: None
260 03:42:43.994752 - {ROOT}: None
261 03:42:43.994807 - {SERVER_IP}: 192.168.201.1
262 03:42:43.994861 - {TEE}: None
263 03:42:43.994915 Parsed boot commands:
264 03:42:43.994968 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 03:42:43.995154 Parsed boot commands: tftpboot 192.168.201.1 12543681/tftp-deploy-_i2u8bok/kernel/bzImage 12543681/tftp-deploy-_i2u8bok/kernel/cmdline 12543681/tftp-deploy-_i2u8bok/ramdisk/ramdisk.cpio.gz
266 03:42:43.995244 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 03:42:43.995327 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 03:42:43.995421 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 03:42:43.995508 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 03:42:43.995578 Not connected, no need to disconnect.
271 03:42:43.995652 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 03:42:43.995734 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 03:42:43.995803 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
274 03:42:43.999837 Setting prompt string to ['lava-test: # ']
275 03:42:44.000205 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 03:42:44.000378 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 03:42:44.000490 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 03:42:44.000579 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 03:42:44.000984 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
280 03:42:49.128691 >> Command sent successfully.
281 03:42:49.131184 Returned 0 in 5 seconds
282 03:42:49.231593 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 03:42:49.231922 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 03:42:49.232100 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 03:42:49.232194 Setting prompt string to 'Starting depthcharge on Helios...'
287 03:42:49.232263 Changing prompt to 'Starting depthcharge on Helios...'
288 03:42:49.232373 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 03:42:49.232633 [Enter `^Ec?' for help]
290 03:42:49.853868
291 03:42:49.854062
292 03:42:49.863667 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 03:42:49.866839 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 03:42:49.873488 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 03:42:49.877033 CPU: AES supported, TXT NOT supported, VT supported
296 03:42:49.884320 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 03:42:49.887614 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 03:42:49.894060 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 03:42:49.897234 VBOOT: Loading verstage.
300 03:42:49.901031 FMAP: Found "FLASH" version 1.1 at 0xc04000.
301 03:42:49.907262 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 03:42:49.911058 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 03:42:49.913917 CBFS @ c08000 size 3f8000
304 03:42:49.920523 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 03:42:49.924173 CBFS: Locating 'fallback/verstage'
306 03:42:49.927337 CBFS: Found @ offset 10fb80 size 1072c
307 03:42:49.930713
308 03:42:49.930797
309 03:42:49.940528 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 03:42:49.955211 Probing TPM: . done!
311 03:42:49.958194 TPM ready after 0 ms
312 03:42:49.961795 Connected to device vid:did:rid of 1ae0:0028:00
313 03:42:49.972085 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
314 03:42:49.975016 Initialized TPM device CR50 revision 0
315 03:42:50.019937 tlcl_send_startup: Startup return code is 0
316 03:42:50.020076 TPM: setup succeeded
317 03:42:50.032330 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 03:42:50.036194 Chrome EC: UHEPI supported
319 03:42:50.040122 Phase 1
320 03:42:50.043111 FMAP: area GBB found @ c05000 (12288 bytes)
321 03:42:50.049405 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 03:42:50.049495 Phase 2
323 03:42:50.053014 Phase 3
324 03:42:50.056234 FMAP: area GBB found @ c05000 (12288 bytes)
325 03:42:50.063090 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 03:42:50.069501 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
327 03:42:50.073391 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
328 03:42:50.079525 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 03:42:50.094795 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
330 03:42:50.098531 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
331 03:42:50.105146 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 03:42:50.109281 Phase 4
333 03:42:50.112649 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
334 03:42:50.119341 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 03:42:50.298725 VB2:vb2_rsa_verify_digest() Digest check failed!
336 03:42:50.305162 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
337 03:42:50.305263 Saving nvdata
338 03:42:50.308299 Reboot requested (10020007)
339 03:42:50.311611 board_reset() called!
340 03:42:50.311696 full_reset() called!
341 03:42:54.820269
342 03:42:54.820451
343 03:42:54.830922 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
344 03:42:54.833775 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
345 03:42:54.840213 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
346 03:42:54.843444 CPU: AES supported, TXT NOT supported, VT supported
347 03:42:54.850597 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
348 03:42:54.853571 PCH: device id 0284 (rev 00) is Cometlake-U Premium
349 03:42:54.860468 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
350 03:42:54.863706 VBOOT: Loading verstage.
351 03:42:54.867088 FMAP: Found "FLASH" version 1.1 at 0xc04000.
352 03:42:54.873511 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
353 03:42:54.876809 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
354 03:42:54.879960 CBFS @ c08000 size 3f8000
355 03:42:54.886485 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
356 03:42:54.889787 CBFS: Locating 'fallback/verstage'
357 03:42:54.893134 CBFS: Found @ offset 10fb80 size 1072c
358 03:42:54.896993
359 03:42:54.897079
360 03:42:54.907085 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
361 03:42:54.921411 Probing TPM: . done!
362 03:42:54.924378 TPM ready after 0 ms
363 03:42:54.927774 Connected to device vid:did:rid of 1ae0:0028:00
364 03:42:54.937897 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
365 03:42:54.941770 Initialized TPM device CR50 revision 0
366 03:42:54.986157 tlcl_send_startup: Startup return code is 0
367 03:42:54.986295 TPM: setup succeeded
368 03:42:54.999132 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
369 03:42:55.002981 Chrome EC: UHEPI supported
370 03:42:55.006161 Phase 1
371 03:42:55.009326 FMAP: area GBB found @ c05000 (12288 bytes)
372 03:42:55.015796 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
373 03:42:55.022281 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
374 03:42:55.025384 Recovery requested (1009000e)
375 03:42:55.031400 Saving nvdata
376 03:42:55.037864 tlcl_extend: response is 0
377 03:42:55.046149 tlcl_extend: response is 0
378 03:42:55.053317 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 03:42:55.056969 CBFS @ c08000 size 3f8000
380 03:42:55.063509 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 03:42:55.066656 CBFS: Locating 'fallback/romstage'
382 03:42:55.069934 CBFS: Found @ offset 80 size 145fc
383 03:42:55.073685 Accumulated console time in verstage 98 ms
384 03:42:55.073776
385 03:42:55.073843
386 03:42:55.086621 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
387 03:42:55.093589 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
388 03:42:55.096377 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
389 03:42:55.100130 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
390 03:42:55.106886 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
391 03:42:55.109916 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
392 03:42:55.112924 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
393 03:42:55.116091 TCO_STS: 0000 0000
394 03:42:55.119553 GEN_PMCON: e0015238 00000200
395 03:42:55.122772 GBLRST_CAUSE: 00000000 00000000
396 03:42:55.122859 prev_sleep_state 5
397 03:42:55.126110 Boot Count incremented to 3896
398 03:42:55.133277 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 03:42:55.136460 CBFS @ c08000 size 3f8000
400 03:42:55.143040 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 03:42:55.143129 CBFS: Locating 'fspm.bin'
402 03:42:55.149827 CBFS: Found @ offset 5ffc0 size 71000
403 03:42:55.153004 Chrome EC: UHEPI supported
404 03:42:55.159282 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
405 03:42:55.163185 Probing TPM: done!
406 03:42:55.169632 Connected to device vid:did:rid of 1ae0:0028:00
407 03:42:55.179612 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
408 03:42:55.185356 Initialized TPM device CR50 revision 0
409 03:42:55.194087 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
410 03:42:55.201255 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
411 03:42:55.204185 MRC cache found, size 1948
412 03:42:55.208095 bootmode is set to: 2
413 03:42:55.211084 PRMRR disabled by config.
414 03:42:55.211165 SPD INDEX = 1
415 03:42:55.217848 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
416 03:42:55.220944 CBFS @ c08000 size 3f8000
417 03:42:55.227381 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
418 03:42:55.227475 CBFS: Locating 'spd.bin'
419 03:42:55.230914 CBFS: Found @ offset 5fb80 size 400
420 03:42:55.234288 SPD: module type is LPDDR3
421 03:42:55.237496 SPD: module part is
422 03:42:55.244187 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
423 03:42:55.247293 SPD: device width 4 bits, bus width 8 bits
424 03:42:55.250852 SPD: module size is 4096 MB (per channel)
425 03:42:55.253907 memory slot: 0 configuration done.
426 03:42:55.257289 memory slot: 2 configuration done.
427 03:42:55.308158 CBMEM:
428 03:42:55.311396 IMD: root @ 99fff000 254 entries.
429 03:42:55.314840 IMD: root @ 99ffec00 62 entries.
430 03:42:55.318118 External stage cache:
431 03:42:55.321490 IMD: root @ 9abff000 254 entries.
432 03:42:55.325215 IMD: root @ 9abfec00 62 entries.
433 03:42:55.328641 Chrome EC: clear events_b mask to 0x0000000020004000
434 03:42:55.344170 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
435 03:42:55.357562 tlcl_write: response is 0
436 03:42:55.366440 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
437 03:42:55.373313 MRC: TPM MRC hash updated successfully.
438 03:42:55.373418 2 DIMMs found
439 03:42:55.376423 SMM Memory Map
440 03:42:55.379603 SMRAM : 0x9a000000 0x1000000
441 03:42:55.383137 Subregion 0: 0x9a000000 0xa00000
442 03:42:55.386343 Subregion 1: 0x9aa00000 0x200000
443 03:42:55.389460 Subregion 2: 0x9ac00000 0x400000
444 03:42:55.392937 top_of_ram = 0x9a000000
445 03:42:55.396753 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
446 03:42:55.402920 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
447 03:42:55.406284 MTRR Range: Start=ff000000 End=0 (Size 1000000)
448 03:42:55.412609 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 03:42:55.415846 CBFS @ c08000 size 3f8000
450 03:42:55.419253 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 03:42:55.422478 CBFS: Locating 'fallback/postcar'
452 03:42:55.429349 CBFS: Found @ offset 107000 size 4b44
453 03:42:55.432492 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
454 03:42:55.445004 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
455 03:42:55.448079 Processing 180 relocs. Offset value of 0x97c0c000
456 03:42:55.456577 Accumulated console time in romstage 285 ms
457 03:42:55.456693
458 03:42:55.456803
459 03:42:55.466870 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
460 03:42:55.473780 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
461 03:42:55.476336 CBFS @ c08000 size 3f8000
462 03:42:55.479928 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
463 03:42:55.486770 CBFS: Locating 'fallback/ramstage'
464 03:42:55.489736 CBFS: Found @ offset 43380 size 1b9e8
465 03:42:55.496338 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
466 03:42:55.528622 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
467 03:42:55.532067 Processing 3976 relocs. Offset value of 0x98db0000
468 03:42:55.538661 Accumulated console time in postcar 52 ms
469 03:42:55.538804
470 03:42:55.538911
471 03:42:55.548218 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
472 03:42:55.554920 FMAP: area RO_VPD found @ c00000 (16384 bytes)
473 03:42:55.558072 WARNING: RO_VPD is uninitialized or empty.
474 03:42:55.561535 FMAP: area RW_VPD found @ af8000 (8192 bytes)
475 03:42:55.568455 FMAP: area RW_VPD found @ af8000 (8192 bytes)
476 03:42:55.568559 Normal boot.
477 03:42:55.575007 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
478 03:42:55.578314 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 03:42:55.581511 CBFS @ c08000 size 3f8000
480 03:42:55.588323 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 03:42:55.591494 CBFS: Locating 'cpu_microcode_blob.bin'
482 03:42:55.594755 CBFS: Found @ offset 14700 size 2ec00
483 03:42:55.597829 microcode: sig=0x806ec pf=0x4 revision=0xc9
484 03:42:55.601054 Skip microcode update
485 03:42:55.607755 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 03:42:55.607879 CBFS @ c08000 size 3f8000
487 03:42:55.614464 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 03:42:55.617712 CBFS: Locating 'fsps.bin'
489 03:42:55.621235 CBFS: Found @ offset d1fc0 size 35000
490 03:42:55.646684 Detected 4 core, 8 thread CPU.
491 03:42:55.650049 Setting up SMI for CPU
492 03:42:55.652986 IED base = 0x9ac00000
493 03:42:55.653100 IED size = 0x00400000
494 03:42:55.656896 Will perform SMM setup.
495 03:42:55.662791 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
496 03:42:55.669666 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
497 03:42:55.673012 Processing 16 relocs. Offset value of 0x00030000
498 03:42:55.676671 Attempting to start 7 APs
499 03:42:55.680207 Waiting for 10ms after sending INIT.
500 03:42:55.696265 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
501 03:42:55.696389 done.
502 03:42:55.699535 AP: slot 6 apic_id 4.
503 03:42:55.702674 AP: slot 5 apic_id 5.
504 03:42:55.702797 AP: slot 7 apic_id 7.
505 03:42:55.706514 AP: slot 2 apic_id 6.
506 03:42:55.709710 AP: slot 1 apic_id 2.
507 03:42:55.709832 AP: slot 4 apic_id 3.
508 03:42:55.716130 Waiting for 2nd SIPI to complete...done.
509 03:42:55.722653 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
510 03:42:55.729460 Processing 13 relocs. Offset value of 0x00038000
511 03:42:55.732625 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
512 03:42:55.739554 Installing SMM handler to 0x9a000000
513 03:42:55.746049 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
514 03:42:55.752484 Processing 658 relocs. Offset value of 0x9a010000
515 03:42:55.759118 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
516 03:42:55.762328 Processing 13 relocs. Offset value of 0x9a008000
517 03:42:55.769022 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
518 03:42:55.775878 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
519 03:42:55.782383 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
520 03:42:55.785555 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
521 03:42:55.792062 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
522 03:42:55.798667 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
523 03:42:55.802488 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
524 03:42:55.808551 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
525 03:42:55.812536 Clearing SMI status registers
526 03:42:55.815884 SMI_STS: PM1
527 03:42:55.815967 PM1_STS: PWRBTN
528 03:42:55.818983 TCO_STS: SECOND_TO
529 03:42:55.822289 New SMBASE 0x9a000000
530 03:42:55.825641 In relocation handler: CPU 0
531 03:42:55.828671 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
532 03:42:55.831935 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 03:42:55.835993 Relocation complete.
534 03:42:55.838953 New SMBASE 0x99fff400
535 03:42:55.839045 In relocation handler: CPU 3
536 03:42:55.845941 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
537 03:42:55.849349 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 03:42:55.852687 Relocation complete.
539 03:42:55.852798 New SMBASE 0x99fff000
540 03:42:55.855518 In relocation handler: CPU 4
541 03:42:55.862038 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
542 03:42:55.865636 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 03:42:55.868985 Relocation complete.
544 03:42:55.869097 New SMBASE 0x99fffc00
545 03:42:55.872150 In relocation handler: CPU 1
546 03:42:55.879180 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
547 03:42:55.882083 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 03:42:55.885557 Relocation complete.
549 03:42:55.885648 New SMBASE 0x99fff800
550 03:42:55.888894 In relocation handler: CPU 2
551 03:42:55.892324 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
552 03:42:55.898703 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 03:42:55.902720 Relocation complete.
554 03:42:55.902845 New SMBASE 0x99ffe400
555 03:42:55.905574 In relocation handler: CPU 7
556 03:42:55.908854 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
557 03:42:55.915724 Writing SMRR. base = 0x9a000006, mask=0xff000800
558 03:42:55.915836 Relocation complete.
559 03:42:55.918948 New SMBASE 0x99ffe800
560 03:42:55.922212 In relocation handler: CPU 6
561 03:42:55.925602 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
562 03:42:55.932189 Writing SMRR. base = 0x9a000006, mask=0xff000800
563 03:42:55.932279 Relocation complete.
564 03:42:55.935420 New SMBASE 0x99ffec00
565 03:42:55.938517 In relocation handler: CPU 5
566 03:42:55.941858 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
567 03:42:55.948481 Writing SMRR. base = 0x9a000006, mask=0xff000800
568 03:42:55.948595 Relocation complete.
569 03:42:55.951758 Initializing CPU #0
570 03:42:55.955091 CPU: vendor Intel device 806ec
571 03:42:55.958800 CPU: family 06, model 8e, stepping 0c
572 03:42:55.962067 Clearing out pending MCEs
573 03:42:55.965325 Setting up local APIC...
574 03:42:55.965441 apic_id: 0x00 done.
575 03:42:55.968645 Turbo is available but hidden
576 03:42:55.971692 Turbo is available and visible
577 03:42:55.974980 VMX status: enabled
578 03:42:55.978379 IA32_FEATURE_CONTROL status: locked
579 03:42:55.982022 Skip microcode update
580 03:42:55.982109 CPU #0 initialized
581 03:42:55.985068 Initializing CPU #3
582 03:42:55.985153 Initializing CPU #2
583 03:42:55.988688 Initializing CPU #7
584 03:42:55.991661 CPU: vendor Intel device 806ec
585 03:42:55.995263 CPU: family 06, model 8e, stepping 0c
586 03:42:55.998571 CPU: vendor Intel device 806ec
587 03:42:56.001675 CPU: family 06, model 8e, stepping 0c
588 03:42:56.005143 Clearing out pending MCEs
589 03:42:56.008230 Clearing out pending MCEs
590 03:42:56.011866 Setting up local APIC...
591 03:42:56.011947 Initializing CPU #4
592 03:42:56.015305 Initializing CPU #1
593 03:42:56.018426 CPU: vendor Intel device 806ec
594 03:42:56.021666 CPU: family 06, model 8e, stepping 0c
595 03:42:56.024945 CPU: vendor Intel device 806ec
596 03:42:56.028119 CPU: family 06, model 8e, stepping 0c
597 03:42:56.031992 Clearing out pending MCEs
598 03:42:56.035187 Clearing out pending MCEs
599 03:42:56.035275 Setting up local APIC...
600 03:42:56.038410 apic_id: 0x06 done.
601 03:42:56.041869 Setting up local APIC...
602 03:42:56.045082 CPU: vendor Intel device 806ec
603 03:42:56.048146 CPU: family 06, model 8e, stepping 0c
604 03:42:56.051927 Clearing out pending MCEs
605 03:42:56.052041 VMX status: enabled
606 03:42:56.055040 apic_id: 0x07 done.
607 03:42:56.058168 IA32_FEATURE_CONTROL status: locked
608 03:42:56.061667 VMX status: enabled
609 03:42:56.061754 Skip microcode update
610 03:42:56.064748 IA32_FEATURE_CONTROL status: locked
611 03:42:56.068477 CPU #2 initialized
612 03:42:56.071665 Skip microcode update
613 03:42:56.071753 Setting up local APIC...
614 03:42:56.074794 apic_id: 0x02 done.
615 03:42:56.077949 Setting up local APIC...
616 03:42:56.078035 CPU #7 initialized
617 03:42:56.081184 Initializing CPU #5
618 03:42:56.084943 Initializing CPU #6
619 03:42:56.085029 CPU: vendor Intel device 806ec
620 03:42:56.091866 CPU: family 06, model 8e, stepping 0c
621 03:42:56.091991 apic_id: 0x01 done.
622 03:42:56.095083 VMX status: enabled
623 03:42:56.098412 apic_id: 0x03 done.
624 03:42:56.101444 IA32_FEATURE_CONTROL status: locked
625 03:42:56.101531 VMX status: enabled
626 03:42:56.104409 Skip microcode update
627 03:42:56.107681 IA32_FEATURE_CONTROL status: locked
628 03:42:56.111312 CPU #1 initialized
629 03:42:56.111410 Skip microcode update
630 03:42:56.114892 Clearing out pending MCEs
631 03:42:56.118000 CPU: vendor Intel device 806ec
632 03:42:56.121238 CPU: family 06, model 8e, stepping 0c
633 03:42:56.124270 Setting up local APIC...
634 03:42:56.124367 CPU #4 initialized
635 03:42:56.127974 apic_id: 0x05 done.
636 03:42:56.131270 Clearing out pending MCEs
637 03:42:56.134701 VMX status: enabled
638 03:42:56.134787 Setting up local APIC...
639 03:42:56.137719 VMX status: enabled
640 03:42:56.141077 IA32_FEATURE_CONTROL status: locked
641 03:42:56.144276 apic_id: 0x04 done.
642 03:42:56.144373 Skip microcode update
643 03:42:56.148167 VMX status: enabled
644 03:42:56.151384 CPU #5 initialized
645 03:42:56.154749 IA32_FEATURE_CONTROL status: locked
646 03:42:56.157823 IA32_FEATURE_CONTROL status: locked
647 03:42:56.157909 Skip microcode update
648 03:42:56.160897 Skip microcode update
649 03:42:56.164264 CPU #6 initialized
650 03:42:56.164365 CPU #3 initialized
651 03:42:56.167925 bsp_do_flight_plan done after 452 msecs.
652 03:42:56.171141 CPU: frequency set to 4200 MHz
653 03:42:56.174367 Enabling SMIs.
654 03:42:56.174454 Locking SMM.
655 03:42:56.190319 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
656 03:42:56.193812 CBFS @ c08000 size 3f8000
657 03:42:56.199787 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
658 03:42:56.199921 CBFS: Locating 'vbt.bin'
659 03:42:56.203416 CBFS: Found @ offset 5f5c0 size 499
660 03:42:56.209998 Found a VBT of 4608 bytes after decompression
661 03:42:56.392227 Display FSP Version Info HOB
662 03:42:56.396167 Reference Code - CPU = 9.0.1e.30
663 03:42:56.399133 uCode Version = 0.0.0.ca
664 03:42:56.402425 TXT ACM version = ff.ff.ff.ffff
665 03:42:56.405706 Display FSP Version Info HOB
666 03:42:56.409105 Reference Code - ME = 9.0.1e.30
667 03:42:56.412225 MEBx version = 0.0.0.0
668 03:42:56.415532 ME Firmware Version = Consumer SKU
669 03:42:56.418861 Display FSP Version Info HOB
670 03:42:56.422125 Reference Code - CML PCH = 9.0.1e.30
671 03:42:56.425481 PCH-CRID Status = Disabled
672 03:42:56.428751 PCH-CRID Original Value = ff.ff.ff.ffff
673 03:42:56.432147 PCH-CRID New Value = ff.ff.ff.ffff
674 03:42:56.435450 OPROM - RST - RAID = ff.ff.ff.ffff
675 03:42:56.438830 ChipsetInit Base Version = ff.ff.ff.ffff
676 03:42:56.442448 ChipsetInit Oem Version = ff.ff.ff.ffff
677 03:42:56.445796 Display FSP Version Info HOB
678 03:42:56.451873 Reference Code - SA - System Agent = 9.0.1e.30
679 03:42:56.455762 Reference Code - MRC = 0.7.1.6c
680 03:42:56.455842 SA - PCIe Version = 9.0.1e.30
681 03:42:56.459019 SA-CRID Status = Disabled
682 03:42:56.462374 SA-CRID Original Value = 0.0.0.c
683 03:42:56.465453 SA-CRID New Value = 0.0.0.c
684 03:42:56.468541 OPROM - VBIOS = ff.ff.ff.ffff
685 03:42:56.472472 RTC Init
686 03:42:56.475180 Set power on after power failure.
687 03:42:56.475270 Disabling Deep S3
688 03:42:56.478514 Disabling Deep S3
689 03:42:56.478628 Disabling Deep S4
690 03:42:56.482155 Disabling Deep S4
691 03:42:56.482234 Disabling Deep S5
692 03:42:56.485221 Disabling Deep S5
693 03:42:56.491812 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
694 03:42:56.491928 Enumerating buses...
695 03:42:56.498604 Show all devs... Before device enumeration.
696 03:42:56.498748 Root Device: enabled 1
697 03:42:56.501430 CPU_CLUSTER: 0: enabled 1
698 03:42:56.505077 DOMAIN: 0000: enabled 1
699 03:42:56.508414 APIC: 00: enabled 1
700 03:42:56.508500 PCI: 00:00.0: enabled 1
701 03:42:56.511639 PCI: 00:02.0: enabled 1
702 03:42:56.514743 PCI: 00:04.0: enabled 0
703 03:42:56.518436 PCI: 00:05.0: enabled 0
704 03:42:56.518521 PCI: 00:12.0: enabled 1
705 03:42:56.521730 PCI: 00:12.5: enabled 0
706 03:42:56.525025 PCI: 00:12.6: enabled 0
707 03:42:56.528129 PCI: 00:14.0: enabled 1
708 03:42:56.528213 PCI: 00:14.1: enabled 0
709 03:42:56.531417 PCI: 00:14.3: enabled 1
710 03:42:56.534443 PCI: 00:14.5: enabled 0
711 03:42:56.534529 PCI: 00:15.0: enabled 1
712 03:42:56.538309 PCI: 00:15.1: enabled 1
713 03:42:56.541551 PCI: 00:15.2: enabled 0
714 03:42:56.544792 PCI: 00:15.3: enabled 0
715 03:42:56.544876 PCI: 00:16.0: enabled 1
716 03:42:56.547790 PCI: 00:16.1: enabled 0
717 03:42:56.551490 PCI: 00:16.2: enabled 0
718 03:42:56.554420 PCI: 00:16.3: enabled 0
719 03:42:56.554506 PCI: 00:16.4: enabled 0
720 03:42:56.557758 PCI: 00:16.5: enabled 0
721 03:42:56.561005 PCI: 00:17.0: enabled 1
722 03:42:56.564822 PCI: 00:19.0: enabled 1
723 03:42:56.564938 PCI: 00:19.1: enabled 0
724 03:42:56.568167 PCI: 00:19.2: enabled 0
725 03:42:56.571504 PCI: 00:1a.0: enabled 0
726 03:42:56.571589 PCI: 00:1c.0: enabled 0
727 03:42:56.574753 PCI: 00:1c.1: enabled 0
728 03:42:56.577927 PCI: 00:1c.2: enabled 0
729 03:42:56.581350 PCI: 00:1c.3: enabled 0
730 03:42:56.581435 PCI: 00:1c.4: enabled 0
731 03:42:56.584187 PCI: 00:1c.5: enabled 0
732 03:42:56.587882 PCI: 00:1c.6: enabled 0
733 03:42:56.591078 PCI: 00:1c.7: enabled 0
734 03:42:56.591190 PCI: 00:1d.0: enabled 1
735 03:42:56.593927 PCI: 00:1d.1: enabled 0
736 03:42:56.597689 PCI: 00:1d.2: enabled 0
737 03:42:56.600750 PCI: 00:1d.3: enabled 0
738 03:42:56.600835 PCI: 00:1d.4: enabled 0
739 03:42:56.604126 PCI: 00:1d.5: enabled 1
740 03:42:56.607845 PCI: 00:1e.0: enabled 1
741 03:42:56.610759 PCI: 00:1e.1: enabled 0
742 03:42:56.610845 PCI: 00:1e.2: enabled 1
743 03:42:56.614335 PCI: 00:1e.3: enabled 1
744 03:42:56.617365 PCI: 00:1f.0: enabled 1
745 03:42:56.617464 PCI: 00:1f.1: enabled 1
746 03:42:56.620919 PCI: 00:1f.2: enabled 1
747 03:42:56.623907 PCI: 00:1f.3: enabled 1
748 03:42:56.627319 PCI: 00:1f.4: enabled 1
749 03:42:56.627404 PCI: 00:1f.5: enabled 1
750 03:42:56.630640 PCI: 00:1f.6: enabled 0
751 03:42:56.634173 USB0 port 0: enabled 1
752 03:42:56.637529 I2C: 00:15: enabled 1
753 03:42:56.637642 I2C: 00:5d: enabled 1
754 03:42:56.640593 GENERIC: 0.0: enabled 1
755 03:42:56.644053 I2C: 00:1a: enabled 1
756 03:42:56.644159 I2C: 00:38: enabled 1
757 03:42:56.647382 I2C: 00:39: enabled 1
758 03:42:56.650587 I2C: 00:3a: enabled 1
759 03:42:56.650671 I2C: 00:3b: enabled 1
760 03:42:56.653728 PCI: 00:00.0: enabled 1
761 03:42:56.657395 SPI: 00: enabled 1
762 03:42:56.657478 SPI: 01: enabled 1
763 03:42:56.660508 PNP: 0c09.0: enabled 1
764 03:42:56.663681 USB2 port 0: enabled 1
765 03:42:56.663788 USB2 port 1: enabled 1
766 03:42:56.667288 USB2 port 2: enabled 0
767 03:42:56.670717 USB2 port 3: enabled 0
768 03:42:56.673758 USB2 port 5: enabled 0
769 03:42:56.673842 USB2 port 6: enabled 1
770 03:42:56.677059 USB2 port 9: enabled 1
771 03:42:56.680432 USB3 port 0: enabled 1
772 03:42:56.680614 USB3 port 1: enabled 1
773 03:42:56.683751 USB3 port 2: enabled 1
774 03:42:56.686712 USB3 port 3: enabled 1
775 03:42:56.686796 USB3 port 4: enabled 0
776 03:42:56.690357 APIC: 02: enabled 1
777 03:42:56.693667 APIC: 06: enabled 1
778 03:42:56.693751 APIC: 01: enabled 1
779 03:42:56.696764 APIC: 03: enabled 1
780 03:42:56.700083 APIC: 05: enabled 1
781 03:42:56.700166 APIC: 04: enabled 1
782 03:42:56.703415 APIC: 07: enabled 1
783 03:42:56.703489 Compare with tree...
784 03:42:56.707359 Root Device: enabled 1
785 03:42:56.709872 CPU_CLUSTER: 0: enabled 1
786 03:42:56.713319 APIC: 00: enabled 1
787 03:42:56.713484 APIC: 02: enabled 1
788 03:42:56.716713 APIC: 06: enabled 1
789 03:42:56.720278 APIC: 01: enabled 1
790 03:42:56.720431 APIC: 03: enabled 1
791 03:42:56.723491 APIC: 05: enabled 1
792 03:42:56.726606 APIC: 04: enabled 1
793 03:42:56.726689 APIC: 07: enabled 1
794 03:42:56.729914 DOMAIN: 0000: enabled 1
795 03:42:56.733524 PCI: 00:00.0: enabled 1
796 03:42:56.736513 PCI: 00:02.0: enabled 1
797 03:42:56.736597 PCI: 00:04.0: enabled 0
798 03:42:56.740029 PCI: 00:05.0: enabled 0
799 03:42:56.743450 PCI: 00:12.0: enabled 1
800 03:42:56.746524 PCI: 00:12.5: enabled 0
801 03:42:56.749930 PCI: 00:12.6: enabled 0
802 03:42:56.750016 PCI: 00:14.0: enabled 1
803 03:42:56.753228 USB0 port 0: enabled 1
804 03:42:56.756371 USB2 port 0: enabled 1
805 03:42:56.759696 USB2 port 1: enabled 1
806 03:42:56.763094 USB2 port 2: enabled 0
807 03:42:56.766373 USB2 port 3: enabled 0
808 03:42:56.766487 USB2 port 5: enabled 0
809 03:42:56.769376 USB2 port 6: enabled 1
810 03:42:56.773253 USB2 port 9: enabled 1
811 03:42:56.776780 USB3 port 0: enabled 1
812 03:42:56.779802 USB3 port 1: enabled 1
813 03:42:56.779910 USB3 port 2: enabled 1
814 03:42:56.783107 USB3 port 3: enabled 1
815 03:42:56.786386 USB3 port 4: enabled 0
816 03:42:56.789680 PCI: 00:14.1: enabled 0
817 03:42:56.792875 PCI: 00:14.3: enabled 1
818 03:42:56.796503 PCI: 00:14.5: enabled 0
819 03:42:56.796612 PCI: 00:15.0: enabled 1
820 03:42:56.799723 I2C: 00:15: enabled 1
821 03:42:56.803011 PCI: 00:15.1: enabled 1
822 03:42:56.805990 I2C: 00:5d: enabled 1
823 03:42:56.806105 GENERIC: 0.0: enabled 1
824 03:42:56.809406 PCI: 00:15.2: enabled 0
825 03:42:56.812466 PCI: 00:15.3: enabled 0
826 03:42:56.816366 PCI: 00:16.0: enabled 1
827 03:42:56.819410 PCI: 00:16.1: enabled 0
828 03:42:56.819490 PCI: 00:16.2: enabled 0
829 03:42:56.822647 PCI: 00:16.3: enabled 0
830 03:42:56.826121 PCI: 00:16.4: enabled 0
831 03:42:56.829006 PCI: 00:16.5: enabled 0
832 03:42:56.832831 PCI: 00:17.0: enabled 1
833 03:42:56.832909 PCI: 00:19.0: enabled 1
834 03:42:56.835948 I2C: 00:1a: enabled 1
835 03:42:56.839293 I2C: 00:38: enabled 1
836 03:42:56.842402 I2C: 00:39: enabled 1
837 03:42:56.842506 I2C: 00:3a: enabled 1
838 03:42:56.845970 I2C: 00:3b: enabled 1
839 03:42:56.848759 PCI: 00:19.1: enabled 0
840 03:42:56.852307 PCI: 00:19.2: enabled 0
841 03:42:56.855341 PCI: 00:1a.0: enabled 0
842 03:42:56.855449 PCI: 00:1c.0: enabled 0
843 03:42:56.859185 PCI: 00:1c.1: enabled 0
844 03:42:56.862695 PCI: 00:1c.2: enabled 0
845 03:42:56.865927 PCI: 00:1c.3: enabled 0
846 03:42:56.868804 PCI: 00:1c.4: enabled 0
847 03:42:56.868887 PCI: 00:1c.5: enabled 0
848 03:42:56.872644 PCI: 00:1c.6: enabled 0
849 03:42:56.875799 PCI: 00:1c.7: enabled 0
850 03:42:56.878992 PCI: 00:1d.0: enabled 1
851 03:42:56.882053 PCI: 00:1d.1: enabled 0
852 03:42:56.882154 PCI: 00:1d.2: enabled 0
853 03:42:56.885460 PCI: 00:1d.3: enabled 0
854 03:42:56.888747 PCI: 00:1d.4: enabled 0
855 03:42:56.892090 PCI: 00:1d.5: enabled 1
856 03:42:56.895317 PCI: 00:00.0: enabled 1
857 03:42:56.895424 PCI: 00:1e.0: enabled 1
858 03:42:56.898551 PCI: 00:1e.1: enabled 0
859 03:42:56.902261 PCI: 00:1e.2: enabled 1
860 03:42:56.905485 SPI: 00: enabled 1
861 03:42:56.905569 PCI: 00:1e.3: enabled 1
862 03:42:56.908576 SPI: 01: enabled 1
863 03:42:56.911782 PCI: 00:1f.0: enabled 1
864 03:42:56.915290 PNP: 0c09.0: enabled 1
865 03:42:56.915397 PCI: 00:1f.1: enabled 1
866 03:42:56.918244 PCI: 00:1f.2: enabled 1
867 03:42:56.922441 PCI: 00:1f.3: enabled 1
868 03:42:56.925452 PCI: 00:1f.4: enabled 1
869 03:42:56.928363 PCI: 00:1f.5: enabled 1
870 03:42:56.928445 PCI: 00:1f.6: enabled 0
871 03:42:56.931679 Root Device scanning...
872 03:42:56.935298 scan_static_bus for Root Device
873 03:42:56.938342 CPU_CLUSTER: 0 enabled
874 03:42:56.941523 DOMAIN: 0000 enabled
875 03:42:56.941631 DOMAIN: 0000 scanning...
876 03:42:56.944749 PCI: pci_scan_bus for bus 00
877 03:42:56.948015 PCI: 00:00.0 [8086/0000] ops
878 03:42:56.951529 PCI: 00:00.0 [8086/9b61] enabled
879 03:42:56.955019 PCI: 00:02.0 [8086/0000] bus ops
880 03:42:56.958112 PCI: 00:02.0 [8086/9b41] enabled
881 03:42:56.961655 PCI: 00:04.0 [8086/1903] disabled
882 03:42:56.964752 PCI: 00:08.0 [8086/1911] enabled
883 03:42:56.968304 PCI: 00:12.0 [8086/02f9] enabled
884 03:42:56.971306 PCI: 00:14.0 [8086/0000] bus ops
885 03:42:56.974946 PCI: 00:14.0 [8086/02ed] enabled
886 03:42:56.978078 PCI: 00:14.2 [8086/02ef] enabled
887 03:42:56.981773 PCI: 00:14.3 [8086/02f0] enabled
888 03:42:56.985042 PCI: 00:15.0 [8086/0000] bus ops
889 03:42:56.988148 PCI: 00:15.0 [8086/02e8] enabled
890 03:42:56.991285 PCI: 00:15.1 [8086/0000] bus ops
891 03:42:56.994674 PCI: 00:15.1 [8086/02e9] enabled
892 03:42:56.998166 PCI: 00:16.0 [8086/0000] ops
893 03:42:57.001791 PCI: 00:16.0 [8086/02e0] enabled
894 03:42:57.005094 PCI: 00:17.0 [8086/0000] ops
895 03:42:57.008531 PCI: 00:17.0 [8086/02d3] enabled
896 03:42:57.011476 PCI: 00:19.0 [8086/0000] bus ops
897 03:42:57.014696 PCI: 00:19.0 [8086/02c5] enabled
898 03:42:57.018302 PCI: 00:1d.0 [8086/0000] bus ops
899 03:42:57.021515 PCI: 00:1d.0 [8086/02b0] enabled
900 03:42:57.028038 PCI: Static device PCI: 00:1d.5 not found, disabling it.
901 03:42:57.031207 PCI: 00:1e.0 [8086/0000] ops
902 03:42:57.034997 PCI: 00:1e.0 [8086/02a8] enabled
903 03:42:57.038227 PCI: 00:1e.2 [8086/0000] bus ops
904 03:42:57.041072 PCI: 00:1e.2 [8086/02aa] enabled
905 03:42:57.044677 PCI: 00:1e.3 [8086/0000] bus ops
906 03:42:57.048202 PCI: 00:1e.3 [8086/02ab] enabled
907 03:42:57.051322 PCI: 00:1f.0 [8086/0000] bus ops
908 03:42:57.054490 PCI: 00:1f.0 [8086/0284] enabled
909 03:42:57.057838 PCI: Static device PCI: 00:1f.1 not found, disabling it.
910 03:42:57.064607 PCI: Static device PCI: 00:1f.2 not found, disabling it.
911 03:42:57.067725 PCI: 00:1f.3 [8086/0000] bus ops
912 03:42:57.071329 PCI: 00:1f.3 [8086/02c8] enabled
913 03:42:57.074361 PCI: 00:1f.4 [8086/0000] bus ops
914 03:42:57.078088 PCI: 00:1f.4 [8086/02a3] enabled
915 03:42:57.081124 PCI: 00:1f.5 [8086/0000] bus ops
916 03:42:57.084720 PCI: 00:1f.5 [8086/02a4] enabled
917 03:42:57.087880 PCI: Leftover static devices:
918 03:42:57.088002 PCI: 00:05.0
919 03:42:57.091427 PCI: 00:12.5
920 03:42:57.091512 PCI: 00:12.6
921 03:42:57.094742 PCI: 00:14.1
922 03:42:57.094827 PCI: 00:14.5
923 03:42:57.094924 PCI: 00:15.2
924 03:42:57.097877 PCI: 00:15.3
925 03:42:57.097962 PCI: 00:16.1
926 03:42:57.101087 PCI: 00:16.2
927 03:42:57.101171 PCI: 00:16.3
928 03:42:57.101244 PCI: 00:16.4
929 03:42:57.104107 PCI: 00:16.5
930 03:42:57.104191 PCI: 00:19.1
931 03:42:57.107451 PCI: 00:19.2
932 03:42:57.107535 PCI: 00:1a.0
933 03:42:57.111054 PCI: 00:1c.0
934 03:42:57.111138 PCI: 00:1c.1
935 03:42:57.111205 PCI: 00:1c.2
936 03:42:57.114424 PCI: 00:1c.3
937 03:42:57.114508 PCI: 00:1c.4
938 03:42:57.117592 PCI: 00:1c.5
939 03:42:57.117676 PCI: 00:1c.6
940 03:42:57.117742 PCI: 00:1c.7
941 03:42:57.120944 PCI: 00:1d.1
942 03:42:57.121029 PCI: 00:1d.2
943 03:42:57.124549 PCI: 00:1d.3
944 03:42:57.124634 PCI: 00:1d.4
945 03:42:57.124701 PCI: 00:1d.5
946 03:42:57.127775 PCI: 00:1e.1
947 03:42:57.127859 PCI: 00:1f.1
948 03:42:57.131207 PCI: 00:1f.2
949 03:42:57.131292 PCI: 00:1f.6
950 03:42:57.134172 PCI: Check your devicetree.cb.
951 03:42:57.137303 PCI: 00:02.0 scanning...
952 03:42:57.141074 scan_generic_bus for PCI: 00:02.0
953 03:42:57.144251 scan_generic_bus for PCI: 00:02.0 done
954 03:42:57.150763 scan_bus: scanning of bus PCI: 00:02.0 took 10189 usecs
955 03:42:57.153926 PCI: 00:14.0 scanning...
956 03:42:57.157445 scan_static_bus for PCI: 00:14.0
957 03:42:57.157528 USB0 port 0 enabled
958 03:42:57.160771 USB0 port 0 scanning...
959 03:42:57.163865 scan_static_bus for USB0 port 0
960 03:42:57.167690 USB2 port 0 enabled
961 03:42:57.167801 USB2 port 1 enabled
962 03:42:57.171234 USB2 port 2 disabled
963 03:42:57.174388 USB2 port 3 disabled
964 03:42:57.174495 USB2 port 5 disabled
965 03:42:57.177550 USB2 port 6 enabled
966 03:42:57.177634 USB2 port 9 enabled
967 03:42:57.180539 USB3 port 0 enabled
968 03:42:57.183755 USB3 port 1 enabled
969 03:42:57.183838 USB3 port 2 enabled
970 03:42:57.187677 USB3 port 3 enabled
971 03:42:57.190902 USB3 port 4 disabled
972 03:42:57.190985 USB2 port 0 scanning...
973 03:42:57.194029 scan_static_bus for USB2 port 0
974 03:42:57.197087 scan_static_bus for USB2 port 0 done
975 03:42:57.203796 scan_bus: scanning of bus USB2 port 0 took 9709 usecs
976 03:42:57.207110 USB2 port 1 scanning...
977 03:42:57.210574 scan_static_bus for USB2 port 1
978 03:42:57.214347 scan_static_bus for USB2 port 1 done
979 03:42:57.220313 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
980 03:42:57.220413 USB2 port 6 scanning...
981 03:42:57.223550 scan_static_bus for USB2 port 6
982 03:42:57.230734 scan_static_bus for USB2 port 6 done
983 03:42:57.234075 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
984 03:42:57.236900 USB2 port 9 scanning...
985 03:42:57.240485 scan_static_bus for USB2 port 9
986 03:42:57.243621 scan_static_bus for USB2 port 9 done
987 03:42:57.250513 scan_bus: scanning of bus USB2 port 9 took 9691 usecs
988 03:42:57.250601 USB3 port 0 scanning...
989 03:42:57.253699 scan_static_bus for USB3 port 0
990 03:42:57.260080 scan_static_bus for USB3 port 0 done
991 03:42:57.263567 scan_bus: scanning of bus USB3 port 0 took 9707 usecs
992 03:42:57.267296 USB3 port 1 scanning...
993 03:42:57.270406 scan_static_bus for USB3 port 1
994 03:42:57.273360 scan_static_bus for USB3 port 1 done
995 03:42:57.279985 scan_bus: scanning of bus USB3 port 1 took 9710 usecs
996 03:42:57.280099 USB3 port 2 scanning...
997 03:42:57.283742 scan_static_bus for USB3 port 2
998 03:42:57.290569 scan_static_bus for USB3 port 2 done
999 03:42:57.293857 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
1000 03:42:57.297075 USB3 port 3 scanning...
1001 03:42:57.300418 scan_static_bus for USB3 port 3
1002 03:42:57.303736 scan_static_bus for USB3 port 3 done
1003 03:42:57.310059 scan_bus: scanning of bus USB3 port 3 took 9699 usecs
1004 03:42:57.313381 scan_static_bus for USB0 port 0 done
1005 03:42:57.319873 scan_bus: scanning of bus USB0 port 0 took 155402 usecs
1006 03:42:57.323312 scan_static_bus for PCI: 00:14.0 done
1007 03:42:57.326473 scan_bus: scanning of bus PCI: 00:14.0 took 173029 usecs
1008 03:42:57.330127 PCI: 00:15.0 scanning...
1009 03:42:57.333521 scan_generic_bus for PCI: 00:15.0
1010 03:42:57.336591 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1011 03:42:57.343609 scan_generic_bus for PCI: 00:15.0 done
1012 03:42:57.346787 scan_bus: scanning of bus PCI: 00:15.0 took 14310 usecs
1013 03:42:57.350087 PCI: 00:15.1 scanning...
1014 03:42:57.353249 scan_generic_bus for PCI: 00:15.1
1015 03:42:57.356788 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1016 03:42:57.362895 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1017 03:42:57.366445 scan_generic_bus for PCI: 00:15.1 done
1018 03:42:57.372967 scan_bus: scanning of bus PCI: 00:15.1 took 18610 usecs
1019 03:42:57.373084 PCI: 00:19.0 scanning...
1020 03:42:57.376571 scan_generic_bus for PCI: 00:19.0
1021 03:42:57.383184 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1022 03:42:57.386425 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1023 03:42:57.389683 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1024 03:42:57.393380 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1025 03:42:57.399843 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1026 03:42:57.403014 scan_generic_bus for PCI: 00:19.0 done
1027 03:42:57.406251 scan_bus: scanning of bus PCI: 00:19.0 took 30740 usecs
1028 03:42:57.409352 PCI: 00:1d.0 scanning...
1029 03:42:57.413079 do_pci_scan_bridge for PCI: 00:1d.0
1030 03:42:57.416239 PCI: pci_scan_bus for bus 01
1031 03:42:57.419561 PCI: 01:00.0 [1c5c/1327] enabled
1032 03:42:57.422874 Enabling Common Clock Configuration
1033 03:42:57.429334 L1 Sub-State supported from root port 29
1034 03:42:57.433152 L1 Sub-State Support = 0xf
1035 03:42:57.433236 CommonModeRestoreTime = 0x28
1036 03:42:57.439693 Power On Value = 0x16, Power On Scale = 0x0
1037 03:42:57.439776 ASPM: Enabled L1
1038 03:42:57.446111 scan_bus: scanning of bus PCI: 00:1d.0 took 32791 usecs
1039 03:42:57.449219 PCI: 00:1e.2 scanning...
1040 03:42:57.452743 scan_generic_bus for PCI: 00:1e.2
1041 03:42:57.456085 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1042 03:42:57.459059 scan_generic_bus for PCI: 00:1e.2 done
1043 03:42:57.466117 scan_bus: scanning of bus PCI: 00:1e.2 took 13992 usecs
1044 03:42:57.469298 PCI: 00:1e.3 scanning...
1045 03:42:57.472621 scan_generic_bus for PCI: 00:1e.3
1046 03:42:57.475672 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1047 03:42:57.479081 scan_generic_bus for PCI: 00:1e.3 done
1048 03:42:57.485426 scan_bus: scanning of bus PCI: 00:1e.3 took 14000 usecs
1049 03:42:57.488997 PCI: 00:1f.0 scanning...
1050 03:42:57.492261 scan_static_bus for PCI: 00:1f.0
1051 03:42:57.492383 PNP: 0c09.0 enabled
1052 03:42:57.495909 scan_static_bus for PCI: 00:1f.0 done
1053 03:42:57.501998 scan_bus: scanning of bus PCI: 00:1f.0 took 12043 usecs
1054 03:42:57.505246 PCI: 00:1f.3 scanning...
1055 03:42:57.512484 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1056 03:42:57.512583 PCI: 00:1f.4 scanning...
1057 03:42:57.515546 scan_generic_bus for PCI: 00:1f.4
1058 03:42:57.521988 scan_generic_bus for PCI: 00:1f.4 done
1059 03:42:57.525103 scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
1060 03:42:57.528493 PCI: 00:1f.5 scanning...
1061 03:42:57.531685 scan_generic_bus for PCI: 00:1f.5
1062 03:42:57.535728 scan_generic_bus for PCI: 00:1f.5 done
1063 03:42:57.541998 scan_bus: scanning of bus PCI: 00:1f.5 took 10189 usecs
1064 03:42:57.548397 scan_bus: scanning of bus DOMAIN: 0000 took 605075 usecs
1065 03:42:57.551640 scan_static_bus for Root Device done
1066 03:42:57.558395 scan_bus: scanning of bus Root Device took 624920 usecs
1067 03:42:57.558481 done
1068 03:42:57.561781 Chrome EC: UHEPI supported
1069 03:42:57.568504 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1070 03:42:57.571918 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1071 03:42:57.578073 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1072 03:42:57.585372 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1073 03:42:57.588992 SPI flash protection: WPSW=0 SRP0=0
1074 03:42:57.595203 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 03:42:57.598395 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1076 03:42:57.601861 found VGA at PCI: 00:02.0
1077 03:42:57.605118 Setting up VGA for PCI: 00:02.0
1078 03:42:57.611573 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 03:42:57.615616 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 03:42:57.618681 Allocating resources...
1081 03:42:57.621754 Reading resources...
1082 03:42:57.624981 Root Device read_resources bus 0 link: 0
1083 03:42:57.628434 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1084 03:42:57.635050 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1085 03:42:57.638079 DOMAIN: 0000 read_resources bus 0 link: 0
1086 03:42:57.645837 PCI: 00:14.0 read_resources bus 0 link: 0
1087 03:42:57.649016 USB0 port 0 read_resources bus 0 link: 0
1088 03:42:57.656883 USB0 port 0 read_resources bus 0 link: 0 done
1089 03:42:57.660291 PCI: 00:14.0 read_resources bus 0 link: 0 done
1090 03:42:57.667715 PCI: 00:15.0 read_resources bus 1 link: 0
1091 03:42:57.670709 PCI: 00:15.0 read_resources bus 1 link: 0 done
1092 03:42:57.677538 PCI: 00:15.1 read_resources bus 2 link: 0
1093 03:42:57.680804 PCI: 00:15.1 read_resources bus 2 link: 0 done
1094 03:42:57.688159 PCI: 00:19.0 read_resources bus 3 link: 0
1095 03:42:57.695172 PCI: 00:19.0 read_resources bus 3 link: 0 done
1096 03:42:57.698770 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 03:42:57.704886 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 03:42:57.708386 PCI: 00:1e.2 read_resources bus 4 link: 0
1099 03:42:57.714836 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1100 03:42:57.718431 PCI: 00:1e.3 read_resources bus 5 link: 0
1101 03:42:57.724693 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1102 03:42:57.728328 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 03:42:57.734801 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 03:42:57.738089 DOMAIN: 0000 read_resources bus 0 link: 0 done
1105 03:42:57.745317 Root Device read_resources bus 0 link: 0 done
1106 03:42:57.748508 Done reading resources.
1107 03:42:57.752268 Show resources in subtree (Root Device)...After reading.
1108 03:42:57.758700 Root Device child on link 0 CPU_CLUSTER: 0
1109 03:42:57.761999 CPU_CLUSTER: 0 child on link 0 APIC: 00
1110 03:42:57.762119 APIC: 00
1111 03:42:57.765413 APIC: 02
1112 03:42:57.765520 APIC: 06
1113 03:42:57.765616 APIC: 01
1114 03:42:57.768658 APIC: 03
1115 03:42:57.768770 APIC: 05
1116 03:42:57.771851 APIC: 04
1117 03:42:57.771961 APIC: 07
1118 03:42:57.775373 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1119 03:42:57.785348 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1120 03:42:57.835021 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1121 03:42:57.835179 PCI: 00:00.0
1122 03:42:57.835294 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1123 03:42:57.836043 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1124 03:42:57.836529 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1125 03:42:57.836652 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1126 03:42:57.879112 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1127 03:42:57.879299 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1128 03:42:57.879414 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1129 03:42:57.879524 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1130 03:42:57.882725 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1131 03:42:57.889478 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1132 03:42:57.899324 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1133 03:42:57.909496 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1134 03:42:57.919438 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1135 03:42:57.929303 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1136 03:42:57.939380 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1137 03:42:57.945957 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1138 03:42:57.948785 PCI: 00:02.0
1139 03:42:57.958924 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1140 03:42:57.968943 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1141 03:42:57.979113 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1142 03:42:57.979237 PCI: 00:04.0
1143 03:42:57.982339 PCI: 00:08.0
1144 03:42:57.991955 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1145 03:42:57.992066 PCI: 00:12.0
1146 03:42:58.001974 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 03:42:58.005252 PCI: 00:14.0 child on link 0 USB0 port 0
1148 03:42:58.015046 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1149 03:42:58.022128 USB0 port 0 child on link 0 USB2 port 0
1150 03:42:58.022251 USB2 port 0
1151 03:42:58.025282 USB2 port 1
1152 03:42:58.025397 USB2 port 2
1153 03:42:58.028647 USB2 port 3
1154 03:42:58.028728 USB2 port 5
1155 03:42:58.031809 USB2 port 6
1156 03:42:58.031901 USB2 port 9
1157 03:42:58.035175 USB3 port 0
1158 03:42:58.035252 USB3 port 1
1159 03:42:58.038223 USB3 port 2
1160 03:42:58.041894 USB3 port 3
1161 03:42:58.042007 USB3 port 4
1162 03:42:58.045243 PCI: 00:14.2
1163 03:42:58.055340 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1164 03:42:58.064745 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1165 03:42:58.064871 PCI: 00:14.3
1166 03:42:58.075051 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1167 03:42:58.078052 PCI: 00:15.0 child on link 0 I2C: 01:15
1168 03:42:58.088030 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 03:42:58.091355 I2C: 01:15
1170 03:42:58.094525 PCI: 00:15.1 child on link 0 I2C: 02:5d
1171 03:42:58.104765 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 03:42:58.107880 I2C: 02:5d
1173 03:42:58.107992 GENERIC: 0.0
1174 03:42:58.111693 PCI: 00:16.0
1175 03:42:58.121172 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 03:42:58.121291 PCI: 00:17.0
1177 03:42:58.131256 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1178 03:42:58.141294 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1179 03:42:58.148218 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1180 03:42:58.154390 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1181 03:42:58.164646 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1182 03:42:58.174606 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1183 03:42:58.177394 PCI: 00:19.0 child on link 0 I2C: 03:1a
1184 03:42:58.187350 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 03:42:58.190907 I2C: 03:1a
1186 03:42:58.191044 I2C: 03:38
1187 03:42:58.191141 I2C: 03:39
1188 03:42:58.194145 I2C: 03:3a
1189 03:42:58.194254 I2C: 03:3b
1190 03:42:58.200712 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1191 03:42:58.207581 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1192 03:42:58.217864 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1193 03:42:58.227484 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1194 03:42:58.230909 PCI: 01:00.0
1195 03:42:58.240326 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1196 03:42:58.240479 PCI: 00:1e.0
1197 03:42:58.250684 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1198 03:42:58.260681 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1199 03:42:58.266784 PCI: 00:1e.2 child on link 0 SPI: 00
1200 03:42:58.277233 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 03:42:58.277350 SPI: 00
1202 03:42:58.280163 PCI: 00:1e.3 child on link 0 SPI: 01
1203 03:42:58.289945 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 03:42:58.293560 SPI: 01
1205 03:42:58.296864 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1206 03:42:58.307013 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1207 03:42:58.313354 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1208 03:42:58.316505 PNP: 0c09.0
1209 03:42:58.323712 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1210 03:42:58.327067 PCI: 00:1f.3
1211 03:42:58.337115 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1212 03:42:58.346388 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1213 03:42:58.346526 PCI: 00:1f.4
1214 03:42:58.356797 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1215 03:42:58.366400 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1216 03:42:58.369607 PCI: 00:1f.5
1217 03:42:58.376501 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1218 03:42:58.383243 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1219 03:42:58.389401 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1220 03:42:58.396058 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1221 03:42:58.399440 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1222 03:42:58.403162 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1223 03:42:58.409109 PCI: 00:17.0 18 * [0x60 - 0x67] io
1224 03:42:58.412590 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1225 03:42:58.419428 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1226 03:42:58.426221 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1227 03:42:58.432551 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1228 03:42:58.442428 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1229 03:42:58.448969 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1230 03:42:58.452237 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 03:42:58.458583 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1232 03:42:58.465209 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1233 03:42:58.469066 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1234 03:42:58.475723 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1235 03:42:58.478823 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1236 03:42:58.485821 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1237 03:42:58.488525 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1238 03:42:58.491757 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1239 03:42:58.498748 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1240 03:42:58.501872 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1241 03:42:58.508689 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1242 03:42:58.511604 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1243 03:42:58.518564 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1244 03:42:58.521543 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1245 03:42:58.528434 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1246 03:42:58.531925 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1247 03:42:58.537967 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1248 03:42:58.541540 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1249 03:42:58.548474 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1250 03:42:58.551711 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1251 03:42:58.557864 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1252 03:42:58.561645 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1253 03:42:58.564886 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1254 03:42:58.571435 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1255 03:42:58.581083 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1256 03:42:58.584993 avoid_fixed_resources: DOMAIN: 0000
1257 03:42:58.587753 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1258 03:42:58.594252 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1259 03:42:58.604629 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1260 03:42:58.610744 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1261 03:42:58.617721 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1262 03:42:58.627684 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1263 03:42:58.634115 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1264 03:42:58.641014 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1265 03:42:58.647365 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1266 03:42:58.657540 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1267 03:42:58.663825 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1268 03:42:58.670437 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1269 03:42:58.673822 Setting resources...
1270 03:42:58.680144 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1271 03:42:58.683444 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1272 03:42:58.687286 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1273 03:42:58.690376 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1274 03:42:58.696725 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1275 03:42:58.699893 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1276 03:42:58.706459 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1277 03:42:58.713539 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1278 03:42:58.723283 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1279 03:42:58.726482 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1280 03:42:58.733592 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1281 03:42:58.736362 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1282 03:42:58.742787 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1283 03:42:58.746361 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1284 03:42:58.753005 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1285 03:42:58.756193 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1286 03:42:58.759546 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1287 03:42:58.766131 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1288 03:42:58.769489 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1289 03:42:58.776306 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1290 03:42:58.779357 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1291 03:42:58.786341 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1292 03:42:58.789607 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1293 03:42:58.796152 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1294 03:42:58.799209 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1295 03:42:58.805797 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1296 03:42:58.809276 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1297 03:42:58.815788 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1298 03:42:58.819145 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1299 03:42:58.825405 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1300 03:42:58.829274 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1301 03:42:58.835631 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1302 03:42:58.841904 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1303 03:42:58.848524 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1304 03:42:58.855223 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1305 03:42:58.865111 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1306 03:42:58.868260 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1307 03:42:58.874717 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1308 03:42:58.881747 Root Device assign_resources, bus 0 link: 0
1309 03:42:58.884922 DOMAIN: 0000 assign_resources, bus 0 link: 0
1310 03:42:58.894642 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1311 03:42:58.901642 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1312 03:42:58.908025 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1313 03:42:58.918288 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1314 03:42:58.924708 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1315 03:42:58.935059 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1316 03:42:58.938217 PCI: 00:14.0 assign_resources, bus 0 link: 0
1317 03:42:58.944915 PCI: 00:14.0 assign_resources, bus 0 link: 0
1318 03:42:58.951272 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1319 03:42:58.961644 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1320 03:42:58.968133 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1321 03:42:58.977919 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1322 03:42:58.981035 PCI: 00:15.0 assign_resources, bus 1 link: 0
1323 03:42:58.984585 PCI: 00:15.0 assign_resources, bus 1 link: 0
1324 03:42:58.994480 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1325 03:42:58.997970 PCI: 00:15.1 assign_resources, bus 2 link: 0
1326 03:42:59.004339 PCI: 00:15.1 assign_resources, bus 2 link: 0
1327 03:42:59.011629 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1328 03:42:59.021352 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1329 03:42:59.027874 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1330 03:42:59.034178 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1331 03:42:59.044557 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1332 03:42:59.051319 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1333 03:42:59.057719 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1334 03:42:59.067278 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1335 03:42:59.070949 PCI: 00:19.0 assign_resources, bus 3 link: 0
1336 03:42:59.077614 PCI: 00:19.0 assign_resources, bus 3 link: 0
1337 03:42:59.084239 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1338 03:42:59.094052 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1339 03:42:59.100538 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1340 03:42:59.107105 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1341 03:42:59.114017 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1342 03:42:59.120067 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1343 03:42:59.127269 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1344 03:42:59.136718 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1345 03:42:59.140028 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1346 03:42:59.147047 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1347 03:42:59.153653 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1348 03:42:59.156947 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1349 03:42:59.163612 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1350 03:42:59.166659 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1351 03:42:59.173014 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1352 03:42:59.176705 LPC: Trying to open IO window from 800 size 1ff
1353 03:42:59.186583 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1354 03:42:59.193383 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1355 03:42:59.203051 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1356 03:42:59.209551 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1357 03:42:59.216361 DOMAIN: 0000 assign_resources, bus 0 link: 0
1358 03:42:59.219868 Root Device assign_resources, bus 0 link: 0
1359 03:42:59.222765 Done setting resources.
1360 03:42:59.229765 Show resources in subtree (Root Device)...After assigning values.
1361 03:42:59.232635 Root Device child on link 0 CPU_CLUSTER: 0
1362 03:42:59.236282 CPU_CLUSTER: 0 child on link 0 APIC: 00
1363 03:42:59.239352 APIC: 00
1364 03:42:59.239439 APIC: 02
1365 03:42:59.239507 APIC: 06
1366 03:42:59.242837 APIC: 01
1367 03:42:59.242915 APIC: 03
1368 03:42:59.246016 APIC: 05
1369 03:42:59.246091 APIC: 04
1370 03:42:59.246154 APIC: 07
1371 03:42:59.253002 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1372 03:42:59.262480 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1373 03:42:59.272181 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1374 03:42:59.272303 PCI: 00:00.0
1375 03:42:59.282526 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1376 03:42:59.292238 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1377 03:42:59.302628 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1378 03:42:59.311995 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1379 03:42:59.322016 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1380 03:42:59.331981 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1381 03:42:59.338715 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1382 03:42:59.348999 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1383 03:42:59.358637 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1384 03:42:59.368258 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1385 03:42:59.377968 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1386 03:42:59.385031 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1387 03:42:59.394892 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1388 03:42:59.404849 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1389 03:42:59.414479 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1390 03:42:59.424233 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1391 03:42:59.424340 PCI: 00:02.0
1392 03:42:59.437633 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1393 03:42:59.447543 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1394 03:42:59.457596 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1395 03:42:59.457686 PCI: 00:04.0
1396 03:42:59.460979 PCI: 00:08.0
1397 03:42:59.470603 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1398 03:42:59.470724 PCI: 00:12.0
1399 03:42:59.480703 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1400 03:42:59.487248 PCI: 00:14.0 child on link 0 USB0 port 0
1401 03:42:59.497616 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1402 03:42:59.500279 USB0 port 0 child on link 0 USB2 port 0
1403 03:42:59.503916 USB2 port 0
1404 03:42:59.504025 USB2 port 1
1405 03:42:59.507126 USB2 port 2
1406 03:42:59.507210 USB2 port 3
1407 03:42:59.510728 USB2 port 5
1408 03:42:59.510815 USB2 port 6
1409 03:42:59.513903 USB2 port 9
1410 03:42:59.513987 USB3 port 0
1411 03:42:59.517177 USB3 port 1
1412 03:42:59.517261 USB3 port 2
1413 03:42:59.520461 USB3 port 3
1414 03:42:59.520571 USB3 port 4
1415 03:42:59.523659 PCI: 00:14.2
1416 03:42:59.533963 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1417 03:42:59.543836 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1418 03:42:59.546925 PCI: 00:14.3
1419 03:42:59.556673 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1420 03:42:59.560115 PCI: 00:15.0 child on link 0 I2C: 01:15
1421 03:42:59.570299 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1422 03:42:59.573353 I2C: 01:15
1423 03:42:59.576635 PCI: 00:15.1 child on link 0 I2C: 02:5d
1424 03:42:59.586641 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1425 03:42:59.589883 I2C: 02:5d
1426 03:42:59.589998 GENERIC: 0.0
1427 03:42:59.592982 PCI: 00:16.0
1428 03:42:59.603184 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1429 03:42:59.603295 PCI: 00:17.0
1430 03:42:59.613368 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1431 03:42:59.623068 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1432 03:42:59.632978 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1433 03:42:59.642767 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1434 03:42:59.652794 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1435 03:42:59.662675 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1436 03:42:59.665855 PCI: 00:19.0 child on link 0 I2C: 03:1a
1437 03:42:59.676001 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1438 03:42:59.679228 I2C: 03:1a
1439 03:42:59.679320 I2C: 03:38
1440 03:42:59.682315 I2C: 03:39
1441 03:42:59.682424 I2C: 03:3a
1442 03:42:59.682528 I2C: 03:3b
1443 03:42:59.689434 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1444 03:42:59.699040 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1445 03:42:59.708915 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1446 03:42:59.719266 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1447 03:42:59.719375 PCI: 01:00.0
1448 03:42:59.732516 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1449 03:42:59.732629 PCI: 00:1e.0
1450 03:42:59.742065 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1451 03:42:59.751926 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1452 03:42:59.758442 PCI: 00:1e.2 child on link 0 SPI: 00
1453 03:42:59.768431 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1454 03:42:59.768551 SPI: 00
1455 03:42:59.772213 PCI: 00:1e.3 child on link 0 SPI: 01
1456 03:42:59.785034 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1457 03:42:59.785167 SPI: 01
1458 03:42:59.788069 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1459 03:42:59.797971 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1460 03:42:59.807863 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1461 03:42:59.807985 PNP: 0c09.0
1462 03:42:59.817879 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1463 03:42:59.817995 PCI: 00:1f.3
1464 03:42:59.828274 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1465 03:42:59.837895 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1466 03:42:59.841201 PCI: 00:1f.4
1467 03:42:59.850909 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1468 03:42:59.860831 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1469 03:42:59.860922 PCI: 00:1f.5
1470 03:42:59.871048 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1471 03:42:59.874266 Done allocating resources.
1472 03:42:59.880613 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1473 03:42:59.884102 Enabling resources...
1474 03:42:59.887339 PCI: 00:00.0 subsystem <- 8086/9b61
1475 03:42:59.890987 PCI: 00:00.0 cmd <- 06
1476 03:42:59.894349 PCI: 00:02.0 subsystem <- 8086/9b41
1477 03:42:59.897094 PCI: 00:02.0 cmd <- 03
1478 03:42:59.897170 PCI: 00:08.0 cmd <- 06
1479 03:42:59.904305 PCI: 00:12.0 subsystem <- 8086/02f9
1480 03:42:59.904391 PCI: 00:12.0 cmd <- 02
1481 03:42:59.907637 PCI: 00:14.0 subsystem <- 8086/02ed
1482 03:42:59.911072 PCI: 00:14.0 cmd <- 02
1483 03:42:59.914487 PCI: 00:14.2 cmd <- 02
1484 03:42:59.917914 PCI: 00:14.3 subsystem <- 8086/02f0
1485 03:42:59.921084 PCI: 00:14.3 cmd <- 02
1486 03:42:59.924277 PCI: 00:15.0 subsystem <- 8086/02e8
1487 03:42:59.927837 PCI: 00:15.0 cmd <- 02
1488 03:42:59.930891 PCI: 00:15.1 subsystem <- 8086/02e9
1489 03:42:59.934210 PCI: 00:15.1 cmd <- 02
1490 03:42:59.937825 PCI: 00:16.0 subsystem <- 8086/02e0
1491 03:42:59.941131 PCI: 00:16.0 cmd <- 02
1492 03:42:59.944109 PCI: 00:17.0 subsystem <- 8086/02d3
1493 03:42:59.944222 PCI: 00:17.0 cmd <- 03
1494 03:42:59.950604 PCI: 00:19.0 subsystem <- 8086/02c5
1495 03:42:59.950697 PCI: 00:19.0 cmd <- 02
1496 03:42:59.954452 PCI: 00:1d.0 bridge ctrl <- 0013
1497 03:42:59.957281 PCI: 00:1d.0 subsystem <- 8086/02b0
1498 03:42:59.961111 PCI: 00:1d.0 cmd <- 06
1499 03:42:59.963987 PCI: 00:1e.0 subsystem <- 8086/02a8
1500 03:42:59.967505 PCI: 00:1e.0 cmd <- 06
1501 03:42:59.970803 PCI: 00:1e.2 subsystem <- 8086/02aa
1502 03:42:59.974319 PCI: 00:1e.2 cmd <- 06
1503 03:42:59.977549 PCI: 00:1e.3 subsystem <- 8086/02ab
1504 03:42:59.980612 PCI: 00:1e.3 cmd <- 02
1505 03:42:59.984104 PCI: 00:1f.0 subsystem <- 8086/0284
1506 03:42:59.987320 PCI: 00:1f.0 cmd <- 407
1507 03:42:59.990619 PCI: 00:1f.3 subsystem <- 8086/02c8
1508 03:42:59.994172 PCI: 00:1f.3 cmd <- 02
1509 03:42:59.997317 PCI: 00:1f.4 subsystem <- 8086/02a3
1510 03:43:00.001049 PCI: 00:1f.4 cmd <- 03
1511 03:43:00.003939 PCI: 00:1f.5 subsystem <- 8086/02a4
1512 03:43:00.004037 PCI: 00:1f.5 cmd <- 406
1513 03:43:00.014248 PCI: 01:00.0 cmd <- 02
1514 03:43:00.019257 done.
1515 03:43:00.031696 ME: Version: 14.0.39.1367
1516 03:43:00.038962 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1517 03:43:00.041984 Initializing devices...
1518 03:43:00.042093 Root Device init ...
1519 03:43:00.048464 Chrome EC: Set SMI mask to 0x0000000000000000
1520 03:43:00.051870 Chrome EC: clear events_b mask to 0x0000000000000000
1521 03:43:00.058486 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1522 03:43:00.064866 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1523 03:43:00.071555 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1524 03:43:00.074864 Chrome EC: Set WAKE mask to 0x0000000000000000
1525 03:43:00.078329 Root Device init finished in 35161 usecs
1526 03:43:00.082240 CPU_CLUSTER: 0 init ...
1527 03:43:00.088547 CPU_CLUSTER: 0 init finished in 2446 usecs
1528 03:43:00.093007 PCI: 00:00.0 init ...
1529 03:43:00.095824 CPU TDP: 15 Watts
1530 03:43:00.098993 CPU PL2 = 64 Watts
1531 03:43:00.102956 PCI: 00:00.0 init finished in 7069 usecs
1532 03:43:00.106216 PCI: 00:02.0 init ...
1533 03:43:00.109340 PCI: 00:02.0 init finished in 2250 usecs
1534 03:43:00.112613 PCI: 00:08.0 init ...
1535 03:43:00.115834 PCI: 00:08.0 init finished in 2250 usecs
1536 03:43:00.118931 PCI: 00:12.0 init ...
1537 03:43:00.122134 PCI: 00:12.0 init finished in 2252 usecs
1538 03:43:00.125548 PCI: 00:14.0 init ...
1539 03:43:00.128872 PCI: 00:14.0 init finished in 2250 usecs
1540 03:43:00.132192 PCI: 00:14.2 init ...
1541 03:43:00.135791 PCI: 00:14.2 init finished in 2250 usecs
1542 03:43:00.138778 PCI: 00:14.3 init ...
1543 03:43:00.142454 PCI: 00:14.3 init finished in 2268 usecs
1544 03:43:00.145330 PCI: 00:15.0 init ...
1545 03:43:00.148820 DW I2C bus 0 at 0xd121f000 (400 KHz)
1546 03:43:00.152033 PCI: 00:15.0 init finished in 5973 usecs
1547 03:43:00.155732 PCI: 00:15.1 init ...
1548 03:43:00.158881 DW I2C bus 1 at 0xd1220000 (400 KHz)
1549 03:43:00.165653 PCI: 00:15.1 init finished in 5972 usecs
1550 03:43:00.165736 PCI: 00:16.0 init ...
1551 03:43:00.172094 PCI: 00:16.0 init finished in 2250 usecs
1552 03:43:00.172214 PCI: 00:19.0 init ...
1553 03:43:00.178798 DW I2C bus 4 at 0xd1222000 (400 KHz)
1554 03:43:00.181792 PCI: 00:19.0 init finished in 5974 usecs
1555 03:43:00.184903 PCI: 00:1d.0 init ...
1556 03:43:00.188493 Initializing PCH PCIe bridge.
1557 03:43:00.191596 PCI: 00:1d.0 init finished in 5283 usecs
1558 03:43:00.194897 PCI: 00:1f.0 init ...
1559 03:43:00.198135 IOAPIC: Initializing IOAPIC at 0xfec00000
1560 03:43:00.204987 IOAPIC: Bootstrap Processor Local APIC = 0x00
1561 03:43:00.205100 IOAPIC: ID = 0x02
1562 03:43:00.208588 IOAPIC: Dumping registers
1563 03:43:00.211506 reg 0x0000: 0x02000000
1564 03:43:00.215200 reg 0x0001: 0x00770020
1565 03:43:00.215283 reg 0x0002: 0x00000000
1566 03:43:00.221472 PCI: 00:1f.0 init finished in 23531 usecs
1567 03:43:00.224780 PCI: 00:1f.4 init ...
1568 03:43:00.228051 PCI: 00:1f.4 init finished in 2259 usecs
1569 03:43:00.239020 PCI: 01:00.0 init ...
1570 03:43:00.242211 PCI: 01:00.0 init finished in 2252 usecs
1571 03:43:00.246123 PNP: 0c09.0 init ...
1572 03:43:00.249308 Google Chrome EC uptime: 11.097 seconds
1573 03:43:00.255892 Google Chrome AP resets since EC boot: 0
1574 03:43:00.259673 Google Chrome most recent AP reset causes:
1575 03:43:00.266164 Google Chrome EC reset flags at last EC boot: reset-pin
1576 03:43:00.269615 PNP: 0c09.0 init finished in 20589 usecs
1577 03:43:00.273025 Devices initialized
1578 03:43:00.275692 Show all devs... After init.
1579 03:43:00.275774 Root Device: enabled 1
1580 03:43:00.278986 CPU_CLUSTER: 0: enabled 1
1581 03:43:00.282873 DOMAIN: 0000: enabled 1
1582 03:43:00.282956 APIC: 00: enabled 1
1583 03:43:00.285926 PCI: 00:00.0: enabled 1
1584 03:43:00.289083 PCI: 00:02.0: enabled 1
1585 03:43:00.292721 PCI: 00:04.0: enabled 0
1586 03:43:00.292804 PCI: 00:05.0: enabled 0
1587 03:43:00.295911 PCI: 00:12.0: enabled 1
1588 03:43:00.299075 PCI: 00:12.5: enabled 0
1589 03:43:00.302369 PCI: 00:12.6: enabled 0
1590 03:43:00.302452 PCI: 00:14.0: enabled 1
1591 03:43:00.305600 PCI: 00:14.1: enabled 0
1592 03:43:00.308860 PCI: 00:14.3: enabled 1
1593 03:43:00.308942 PCI: 00:14.5: enabled 0
1594 03:43:00.312003 PCI: 00:15.0: enabled 1
1595 03:43:00.315808 PCI: 00:15.1: enabled 1
1596 03:43:00.318950 PCI: 00:15.2: enabled 0
1597 03:43:00.319033 PCI: 00:15.3: enabled 0
1598 03:43:00.322380 PCI: 00:16.0: enabled 1
1599 03:43:00.325884 PCI: 00:16.1: enabled 0
1600 03:43:00.328751 PCI: 00:16.2: enabled 0
1601 03:43:00.328829 PCI: 00:16.3: enabled 0
1602 03:43:00.331927 PCI: 00:16.4: enabled 0
1603 03:43:00.335212 PCI: 00:16.5: enabled 0
1604 03:43:00.339232 PCI: 00:17.0: enabled 1
1605 03:43:00.339305 PCI: 00:19.0: enabled 1
1606 03:43:00.342309 PCI: 00:19.1: enabled 0
1607 03:43:00.345373 PCI: 00:19.2: enabled 0
1608 03:43:00.345465 PCI: 00:1a.0: enabled 0
1609 03:43:00.348551 PCI: 00:1c.0: enabled 0
1610 03:43:00.351945 PCI: 00:1c.1: enabled 0
1611 03:43:00.355042 PCI: 00:1c.2: enabled 0
1612 03:43:00.355154 PCI: 00:1c.3: enabled 0
1613 03:43:00.358933 PCI: 00:1c.4: enabled 0
1614 03:43:00.362230 PCI: 00:1c.5: enabled 0
1615 03:43:00.365404 PCI: 00:1c.6: enabled 0
1616 03:43:00.365513 PCI: 00:1c.7: enabled 0
1617 03:43:00.368518 PCI: 00:1d.0: enabled 1
1618 03:43:00.371596 PCI: 00:1d.1: enabled 0
1619 03:43:00.375188 PCI: 00:1d.2: enabled 0
1620 03:43:00.375280 PCI: 00:1d.3: enabled 0
1621 03:43:00.378756 PCI: 00:1d.4: enabled 0
1622 03:43:00.381815 PCI: 00:1d.5: enabled 0
1623 03:43:00.385192 PCI: 00:1e.0: enabled 1
1624 03:43:00.385370 PCI: 00:1e.1: enabled 0
1625 03:43:00.388257 PCI: 00:1e.2: enabled 1
1626 03:43:00.391466 PCI: 00:1e.3: enabled 1
1627 03:43:00.391568 PCI: 00:1f.0: enabled 1
1628 03:43:00.394689 PCI: 00:1f.1: enabled 0
1629 03:43:00.398373 PCI: 00:1f.2: enabled 0
1630 03:43:00.401425 PCI: 00:1f.3: enabled 1
1631 03:43:00.401508 PCI: 00:1f.4: enabled 1
1632 03:43:00.404647 PCI: 00:1f.5: enabled 1
1633 03:43:00.408054 PCI: 00:1f.6: enabled 0
1634 03:43:00.411192 USB0 port 0: enabled 1
1635 03:43:00.411281 I2C: 01:15: enabled 1
1636 03:43:00.415008 I2C: 02:5d: enabled 1
1637 03:43:00.418403 GENERIC: 0.0: enabled 1
1638 03:43:00.418511 I2C: 03:1a: enabled 1
1639 03:43:00.421654 I2C: 03:38: enabled 1
1640 03:43:00.424917 I2C: 03:39: enabled 1
1641 03:43:00.425000 I2C: 03:3a: enabled 1
1642 03:43:00.428193 I2C: 03:3b: enabled 1
1643 03:43:00.431236 PCI: 00:00.0: enabled 1
1644 03:43:00.431319 SPI: 00: enabled 1
1645 03:43:00.434875 SPI: 01: enabled 1
1646 03:43:00.437855 PNP: 0c09.0: enabled 1
1647 03:43:00.437938 USB2 port 0: enabled 1
1648 03:43:00.441171 USB2 port 1: enabled 1
1649 03:43:00.444431 USB2 port 2: enabled 0
1650 03:43:00.444539 USB2 port 3: enabled 0
1651 03:43:00.447882 USB2 port 5: enabled 0
1652 03:43:00.451012 USB2 port 6: enabled 1
1653 03:43:00.454380 USB2 port 9: enabled 1
1654 03:43:00.454462 USB3 port 0: enabled 1
1655 03:43:00.458129 USB3 port 1: enabled 1
1656 03:43:00.461283 USB3 port 2: enabled 1
1657 03:43:00.461365 USB3 port 3: enabled 1
1658 03:43:00.464598 USB3 port 4: enabled 0
1659 03:43:00.467862 APIC: 02: enabled 1
1660 03:43:00.467944 APIC: 06: enabled 1
1661 03:43:00.471072 APIC: 01: enabled 1
1662 03:43:00.474380 APIC: 03: enabled 1
1663 03:43:00.474462 APIC: 05: enabled 1
1664 03:43:00.477588 APIC: 04: enabled 1
1665 03:43:00.477670 APIC: 07: enabled 1
1666 03:43:00.480872 PCI: 00:08.0: enabled 1
1667 03:43:00.484134 PCI: 00:14.2: enabled 1
1668 03:43:00.487306 PCI: 01:00.0: enabled 1
1669 03:43:00.491061 Disabling ACPI via APMC:
1670 03:43:00.491144 done.
1671 03:43:00.497995 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1672 03:43:00.500902 ELOG: NV offset 0xaf0000 size 0x4000
1673 03:43:00.507591 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1674 03:43:00.514179 ELOG: Event(17) added with size 13 at 2024-01-16 03:40:21 UTC
1675 03:43:00.521060 ELOG: Event(92) added with size 9 at 2024-01-16 03:40:21 UTC
1676 03:43:00.527357 ELOG: Event(93) added with size 9 at 2024-01-16 03:40:21 UTC
1677 03:43:00.534565 ELOG: Event(9A) added with size 9 at 2024-01-16 03:40:21 UTC
1678 03:43:00.540613 ELOG: Event(9E) added with size 10 at 2024-01-16 03:40:21 UTC
1679 03:43:00.547728 ELOG: Event(9F) added with size 14 at 2024-01-16 03:40:21 UTC
1680 03:43:00.550834 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1681 03:43:00.558162 ELOG: Event(A1) added with size 10 at 2024-01-16 03:40:21 UTC
1682 03:43:00.568212 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1683 03:43:00.574553 ELOG: Event(A0) added with size 9 at 2024-01-16 03:40:21 UTC
1684 03:43:00.577829 elog_add_boot_reason: Logged dev mode boot
1685 03:43:00.577902 Finalize devices...
1686 03:43:00.581087 PCI: 00:17.0 final
1687 03:43:00.584530 Devices finalized
1688 03:43:00.587669 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1689 03:43:00.594214 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1690 03:43:00.597982 ME: HFSTS1 : 0x90000245
1691 03:43:00.601033 ME: HFSTS2 : 0x3B850126
1692 03:43:00.607497 ME: HFSTS3 : 0x00000020
1693 03:43:00.611250 ME: HFSTS4 : 0x00004800
1694 03:43:00.614509 ME: HFSTS5 : 0x00000000
1695 03:43:00.617691 ME: HFSTS6 : 0x40400006
1696 03:43:00.620921 ME: Manufacturing Mode : NO
1697 03:43:00.624347 ME: FW Partition Table : OK
1698 03:43:00.627232 ME: Bringup Loader Failure : NO
1699 03:43:00.630568 ME: Firmware Init Complete : YES
1700 03:43:00.633988 ME: Boot Options Present : NO
1701 03:43:00.637717 ME: Update In Progress : NO
1702 03:43:00.640648 ME: D0i3 Support : YES
1703 03:43:00.643946 ME: Low Power State Enabled : NO
1704 03:43:00.648083 ME: CPU Replaced : NO
1705 03:43:00.650513 ME: CPU Replacement Valid : YES
1706 03:43:00.654159 ME: Current Working State : 5
1707 03:43:00.657391 ME: Current Operation State : 1
1708 03:43:00.660607 ME: Current Operation Mode : 0
1709 03:43:00.663878 ME: Error Code : 0
1710 03:43:00.667070 ME: CPU Debug Disabled : YES
1711 03:43:00.670116 ME: TXT Support : NO
1712 03:43:00.676762 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1713 03:43:00.683621 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1714 03:43:00.683728 CBFS @ c08000 size 3f8000
1715 03:43:00.690384 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1716 03:43:00.693472 CBFS: Locating 'fallback/dsdt.aml'
1717 03:43:00.696675 CBFS: Found @ offset 10bb80 size 3fa5
1718 03:43:00.703705 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1719 03:43:00.707101 CBFS @ c08000 size 3f8000
1720 03:43:00.710131 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1721 03:43:00.713374 CBFS: Locating 'fallback/slic'
1722 03:43:00.718449 CBFS: 'fallback/slic' not found.
1723 03:43:00.725038 ACPI: Writing ACPI tables at 99b3e000.
1724 03:43:00.725122 ACPI: * FACS
1725 03:43:00.728156 ACPI: * DSDT
1726 03:43:00.731956 Ramoops buffer: 0x100000@0x99a3d000.
1727 03:43:00.735214 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1728 03:43:00.741339 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1729 03:43:00.744936 Google Chrome EC: version:
1730 03:43:00.748449 ro: helios_v2.0.2659-56403530b
1731 03:43:00.751428 rw: helios_v2.0.2849-c41de27e7d
1732 03:43:00.751511 running image: 1
1733 03:43:00.755673 ACPI: * FADT
1734 03:43:00.755806 SCI is IRQ9
1735 03:43:00.762209 ACPI: added table 1/32, length now 40
1736 03:43:00.762293 ACPI: * SSDT
1737 03:43:00.765914 Found 1 CPU(s) with 8 core(s) each.
1738 03:43:00.769125 Error: Could not locate 'wifi_sar' in VPD.
1739 03:43:00.775435 Checking CBFS for default SAR values
1740 03:43:00.778790 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1741 03:43:00.782042 CBFS @ c08000 size 3f8000
1742 03:43:00.788539 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1743 03:43:00.791984 CBFS: Locating 'wifi_sar_defaults.hex'
1744 03:43:00.795420 CBFS: Found @ offset 5fac0 size 77
1745 03:43:00.798663 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1746 03:43:00.805593 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1747 03:43:00.808554 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1748 03:43:00.815443 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1749 03:43:00.818540 failed to find key in VPD: dsm_calib_r0_0
1750 03:43:00.828221 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1751 03:43:00.832127 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1752 03:43:00.834976 failed to find key in VPD: dsm_calib_r0_1
1753 03:43:00.845273 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1754 03:43:00.851317 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1755 03:43:00.854749 failed to find key in VPD: dsm_calib_r0_2
1756 03:43:00.864623 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1757 03:43:00.868432 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1758 03:43:00.874445 failed to find key in VPD: dsm_calib_r0_3
1759 03:43:00.881180 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1760 03:43:00.887810 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1761 03:43:00.890990 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1762 03:43:00.894800 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1763 03:43:00.898721 EC returned error result code 1
1764 03:43:00.901934 EC returned error result code 1
1765 03:43:00.906228 EC returned error result code 1
1766 03:43:00.913005 PS2K: Bad resp from EC. Vivaldi disabled!
1767 03:43:00.916144 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1768 03:43:00.922919 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1769 03:43:00.929457 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1770 03:43:00.932740 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1771 03:43:00.939187 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1772 03:43:00.945856 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1773 03:43:00.948972 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1774 03:43:00.955827 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1775 03:43:00.959147 ACPI: added table 2/32, length now 44
1776 03:43:00.962362 ACPI: * MCFG
1777 03:43:00.965443 ACPI: added table 3/32, length now 48
1778 03:43:00.969321 ACPI: * TPM2
1779 03:43:00.969406 TPM2 log created at 99a2d000
1780 03:43:00.975602 ACPI: added table 4/32, length now 52
1781 03:43:00.975684 ACPI: * MADT
1782 03:43:00.978767 SCI is IRQ9
1783 03:43:00.982504 ACPI: added table 5/32, length now 56
1784 03:43:00.982588 current = 99b43ac0
1785 03:43:00.985329 ACPI: * DMAR
1786 03:43:00.988856 ACPI: added table 6/32, length now 60
1787 03:43:00.992052 ACPI: * IGD OpRegion
1788 03:43:00.992161 GMA: Found VBT in CBFS
1789 03:43:00.995336 GMA: Found valid VBT in CBFS
1790 03:43:00.999112 ACPI: added table 7/32, length now 64
1791 03:43:01.002364 ACPI: * HPET
1792 03:43:01.005569 ACPI: added table 8/32, length now 68
1793 03:43:01.005650 ACPI: done.
1794 03:43:01.008811 ACPI tables: 31744 bytes.
1795 03:43:01.012057 smbios_write_tables: 99a2c000
1796 03:43:01.015814 EC returned error result code 3
1797 03:43:01.018893 Couldn't obtain OEM name from CBI
1798 03:43:01.022566 Create SMBIOS type 17
1799 03:43:01.025602 PCI: 00:00.0 (Intel Cannonlake)
1800 03:43:01.029004 PCI: 00:14.3 (Intel WiFi)
1801 03:43:01.032434 SMBIOS tables: 939 bytes.
1802 03:43:01.035466 Writing table forward entry at 0x00000500
1803 03:43:01.042008 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1804 03:43:01.045514 Writing coreboot table at 0x99b62000
1805 03:43:01.051935 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1806 03:43:01.055186 1. 0000000000001000-000000000009ffff: RAM
1807 03:43:01.058931 2. 00000000000a0000-00000000000fffff: RESERVED
1808 03:43:01.065346 3. 0000000000100000-0000000099a2bfff: RAM
1809 03:43:01.068377 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1810 03:43:01.075439 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1811 03:43:01.081840 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1812 03:43:01.084963 7. 000000009a000000-000000009f7fffff: RESERVED
1813 03:43:01.088197 8. 00000000e0000000-00000000efffffff: RESERVED
1814 03:43:01.095338 9. 00000000fc000000-00000000fc000fff: RESERVED
1815 03:43:01.098427 10. 00000000fe000000-00000000fe00ffff: RESERVED
1816 03:43:01.104953 11. 00000000fed10000-00000000fed17fff: RESERVED
1817 03:43:01.108372 12. 00000000fed80000-00000000fed83fff: RESERVED
1818 03:43:01.114924 13. 00000000fed90000-00000000fed91fff: RESERVED
1819 03:43:01.118266 14. 00000000feda0000-00000000feda1fff: RESERVED
1820 03:43:01.121740 15. 0000000100000000-000000045e7fffff: RAM
1821 03:43:01.127861 Graphics framebuffer located at 0xc0000000
1822 03:43:01.131248 Passing 5 GPIOs to payload:
1823 03:43:01.135036 NAME | PORT | POLARITY | VALUE
1824 03:43:01.141654 write protect | undefined | high | low
1825 03:43:01.144633 lid | undefined | high | high
1826 03:43:01.151441 power | undefined | high | low
1827 03:43:01.158065 oprom | undefined | high | low
1828 03:43:01.160990 EC in RW | 0x000000cb | high | low
1829 03:43:01.161115 Board ID: 4
1830 03:43:01.167909 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1831 03:43:01.171330 CBFS @ c08000 size 3f8000
1832 03:43:01.177752 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1833 03:43:01.180918 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1834 03:43:01.184074 coreboot table: 1492 bytes.
1835 03:43:01.187519 IMD ROOT 0. 99fff000 00001000
1836 03:43:01.190853 IMD SMALL 1. 99ffe000 00001000
1837 03:43:01.194008 FSP MEMORY 2. 99c4e000 003b0000
1838 03:43:01.197448 CONSOLE 3. 99c2e000 00020000
1839 03:43:01.201199 FMAP 4. 99c2d000 0000054e
1840 03:43:01.204268 TIME STAMP 5. 99c2c000 00000910
1841 03:43:01.207717 VBOOT WORK 6. 99c18000 00014000
1842 03:43:01.210874 MRC DATA 7. 99c16000 00001958
1843 03:43:01.214014 ROMSTG STCK 8. 99c15000 00001000
1844 03:43:01.217211 AFTER CAR 9. 99c0b000 0000a000
1845 03:43:01.220892 RAMSTAGE 10. 99baf000 0005c000
1846 03:43:01.224220 REFCODE 11. 99b7a000 00035000
1847 03:43:01.227113 SMM BACKUP 12. 99b6a000 00010000
1848 03:43:01.230555 COREBOOT 13. 99b62000 00008000
1849 03:43:01.233967 ACPI 14. 99b3e000 00024000
1850 03:43:01.237386 ACPI GNVS 15. 99b3d000 00001000
1851 03:43:01.240475 RAMOOPS 16. 99a3d000 00100000
1852 03:43:01.244158 TPM2 TCGLOG17. 99a2d000 00010000
1853 03:43:01.247539 SMBIOS 18. 99a2c000 00000800
1854 03:43:01.250912 IMD small region:
1855 03:43:01.253969 IMD ROOT 0. 99ffec00 00000400
1856 03:43:01.257759 FSP RUNTIME 1. 99ffebe0 00000004
1857 03:43:01.260487 EC HOSTEVENT 2. 99ffebc0 00000008
1858 03:43:01.263987 POWER STATE 3. 99ffeb80 00000040
1859 03:43:01.267683 ROMSTAGE 4. 99ffeb60 00000004
1860 03:43:01.270556 MEM INFO 5. 99ffe9a0 000001b9
1861 03:43:01.273915 VPD 6. 99ffe920 0000006c
1862 03:43:01.277477 MTRR: Physical address space:
1863 03:43:01.284191 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1864 03:43:01.290750 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1865 03:43:01.297068 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1866 03:43:01.303590 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1867 03:43:01.310158 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1868 03:43:01.313372 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1869 03:43:01.319981 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1870 03:43:01.326981 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 03:43:01.330364 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 03:43:01.333639 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 03:43:01.336773 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 03:43:01.343602 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 03:43:01.346556 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 03:43:01.350181 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 03:43:01.353654 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 03:43:01.356258 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 03:43:01.363406 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 03:43:01.366490 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 03:43:01.369597 call enable_fixed_mtrr()
1882 03:43:01.373100 CPU physical address size: 39 bits
1883 03:43:01.376767 MTRR: default type WB/UC MTRR counts: 6/8.
1884 03:43:01.379816 MTRR: WB selected as default type.
1885 03:43:01.386616 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1886 03:43:01.392931 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1887 03:43:01.399259 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1888 03:43:01.405941 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1889 03:43:01.412689 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1890 03:43:01.419648 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1891 03:43:01.422881 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 03:43:01.426190 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 03:43:01.432615 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 03:43:01.435816 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 03:43:01.439052 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 03:43:01.442474 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 03:43:01.448875 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 03:43:01.452425 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 03:43:01.455726 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 03:43:01.459134 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 03:43:01.465603 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 03:43:01.465686
1903 03:43:01.465751 MTRR check
1904 03:43:01.468830 Fixed MTRRs : Enabled
1905 03:43:01.472122 Variable MTRRs: Enabled
1906 03:43:01.472205
1907 03:43:01.472270 call enable_fixed_mtrr()
1908 03:43:01.479164 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1909 03:43:01.482020 CPU physical address size: 39 bits
1910 03:43:01.488955 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1911 03:43:01.492055 MTRR: Fixed MSR 0x250 0x0606060606060606
1912 03:43:01.495184 MTRR: Fixed MSR 0x258 0x0606060606060606
1913 03:43:01.498835 MTRR: Fixed MSR 0x259 0x0000000000000000
1914 03:43:01.505498 MTRR: Fixed MSR 0x268 0x0606060606060606
1915 03:43:01.508347 MTRR: Fixed MSR 0x269 0x0606060606060606
1916 03:43:01.512276 MTRR: Fixed MSR 0x26a 0x0606060606060606
1917 03:43:01.515464 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 03:43:01.522015 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 03:43:01.525322 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 03:43:01.528772 MTRR: Fixed MSR 0x26e 0x0606060606060606
1921 03:43:01.531919 MTRR: Fixed MSR 0x26f 0x0606060606060606
1922 03:43:01.538380 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 03:43:01.541681 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 03:43:01.544798 MTRR: Fixed MSR 0x258 0x0606060606060606
1925 03:43:01.548105 MTRR: Fixed MSR 0x259 0x0000000000000000
1926 03:43:01.551308 MTRR: Fixed MSR 0x268 0x0606060606060606
1927 03:43:01.558361 MTRR: Fixed MSR 0x269 0x0606060606060606
1928 03:43:01.561657 MTRR: Fixed MSR 0x26a 0x0606060606060606
1929 03:43:01.564836 MTRR: Fixed MSR 0x26b 0x0606060606060606
1930 03:43:01.568230 MTRR: Fixed MSR 0x26c 0x0606060606060606
1931 03:43:01.574734 MTRR: Fixed MSR 0x26d 0x0606060606060606
1932 03:43:01.578156 MTRR: Fixed MSR 0x26e 0x0606060606060606
1933 03:43:01.581339 MTRR: Fixed MSR 0x26f 0x0606060606060606
1934 03:43:01.584511 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 03:43:01.591406 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 03:43:01.594487 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 03:43:01.598072 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 03:43:01.600874 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 03:43:01.607820 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 03:43:01.611040 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 03:43:01.614648 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 03:43:01.617745 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 03:43:01.624645 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 03:43:01.624726 call enable_fixed_mtrr()
1945 03:43:01.627423 call enable_fixed_mtrr()
1946 03:43:01.631100 CPU physical address size: 39 bits
1947 03:43:01.634362 CPU physical address size: 39 bits
1948 03:43:01.640802 MTRR: Fixed MSR 0x250 0x0606060606060606
1949 03:43:01.640888 call enable_fixed_mtrr()
1950 03:43:01.647900 MTRR: Fixed MSR 0x258 0x0606060606060606
1951 03:43:01.651258 MTRR: Fixed MSR 0x259 0x0000000000000000
1952 03:43:01.654304 MTRR: Fixed MSR 0x268 0x0606060606060606
1953 03:43:01.657555 MTRR: Fixed MSR 0x269 0x0606060606060606
1954 03:43:01.664125 MTRR: Fixed MSR 0x26a 0x0606060606060606
1955 03:43:01.667182 MTRR: Fixed MSR 0x26b 0x0606060606060606
1956 03:43:01.670386 MTRR: Fixed MSR 0x26c 0x0606060606060606
1957 03:43:01.673798 MTRR: Fixed MSR 0x26d 0x0606060606060606
1958 03:43:01.677278 MTRR: Fixed MSR 0x26e 0x0606060606060606
1959 03:43:01.683940 MTRR: Fixed MSR 0x26f 0x0606060606060606
1960 03:43:01.687509 CPU physical address size: 39 bits
1961 03:43:01.690535 call enable_fixed_mtrr()
1962 03:43:01.694081 CBFS @ c08000 size 3f8000
1963 03:43:01.697254 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1964 03:43:01.700282 MTRR: Fixed MSR 0x250 0x0606060606060606
1965 03:43:01.707143 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 03:43:01.710141 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 03:43:01.713804 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 03:43:01.716807 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 03:43:01.723697 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 03:43:01.726823 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 03:43:01.730126 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 03:43:01.733345 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 03:43:01.739999 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 03:43:01.743434 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 03:43:01.746762 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 03:43:01.749976 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 03:43:01.753447 call enable_fixed_mtrr()
1978 03:43:01.756446 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 03:43:01.762943 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 03:43:01.766233 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 03:43:01.769524 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 03:43:01.773247 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 03:43:01.779846 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 03:43:01.783082 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 03:43:01.786282 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 03:43:01.789670 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 03:43:01.796311 CPU physical address size: 39 bits
1988 03:43:01.796408 call enable_fixed_mtrr()
1989 03:43:01.799865 CBFS: Locating 'fallback/payload'
1990 03:43:01.802934 CPU physical address size: 39 bits
1991 03:43:01.809655 CPU physical address size: 39 bits
1992 03:43:01.812723 CBFS: Found @ offset 1c96c0 size 3f798
1993 03:43:01.816163 Checking segment from ROM address 0xffdd16f8
1994 03:43:01.819228 Checking segment from ROM address 0xffdd1714
1995 03:43:01.825936 Loading segment from ROM address 0xffdd16f8
1996 03:43:01.826017 code (compression=0)
1997 03:43:01.835647 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1998 03:43:01.845235 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1999 03:43:01.845320 it's not compressed!
2000 03:43:01.938687 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2001 03:43:01.945071 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2002 03:43:01.948204 Loading segment from ROM address 0xffdd1714
2003 03:43:01.952129 Entry Point 0x30000000
2004 03:43:01.954748 Loaded segments
2005 03:43:01.960554 Finalizing chipset.
2006 03:43:01.963760 Finalizing SMM.
2007 03:43:01.967349 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2008 03:43:01.970428 mp_park_aps done after 0 msecs.
2009 03:43:01.977124 Jumping to boot code at 30000000(99b62000)
2010 03:43:01.984118 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2011 03:43:01.984226
2012 03:43:01.984368
2013 03:43:01.984450
2014 03:43:01.987366 Starting depthcharge on Helios...
2015 03:43:01.987464
2016 03:43:01.987823 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2017 03:43:01.987931 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2018 03:43:01.988029 Setting prompt string to ['hatch:']
2019 03:43:01.988128 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2020 03:43:01.997261 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2021 03:43:01.997344
2022 03:43:02.003816 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2023 03:43:02.003922
2024 03:43:02.010180 board_setup: Info: eMMC controller not present; skipping
2025 03:43:02.010264
2026 03:43:02.013544 New NVMe Controller 0x30053ac0 @ 00:1d:00
2027 03:43:02.013623
2028 03:43:02.020235 board_setup: Info: SDHCI controller not present; skipping
2029 03:43:02.020374
2030 03:43:02.026844 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2031 03:43:02.026929
2032 03:43:02.026994 Wipe memory regions:
2033 03:43:02.027054
2034 03:43:02.030174 [0x00000000001000, 0x000000000a0000)
2035 03:43:02.030256
2036 03:43:02.036467 [0x00000000100000, 0x00000030000000)
2037 03:43:02.099890
2038 03:43:02.103017 [0x00000030657430, 0x00000099a2c000)
2039 03:43:02.241249
2040 03:43:02.243909 [0x00000100000000, 0x0000045e800000)
2041 03:43:03.626441
2042 03:43:03.626609 R8152: Initializing
2043 03:43:03.626725
2044 03:43:03.629580 Version 9 (ocp_data = 6010)
2045 03:43:03.633758
2046 03:43:03.633846 R8152: Done initializing
2047 03:43:03.633913
2048 03:43:03.636927 Adding net device
2049 03:43:04.120961
2050 03:43:04.121100 R8152: Initializing
2051 03:43:04.121177
2052 03:43:04.124035 Version 6 (ocp_data = 5c30)
2053 03:43:04.124109
2054 03:43:04.127409 R8152: Done initializing
2055 03:43:04.127499
2056 03:43:04.130633 net_add_device: Attemp to include the same device
2057 03:43:04.133756
2058 03:43:04.140928 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2059 03:43:04.141017
2060 03:43:04.141082
2061 03:43:04.141141
2062 03:43:04.141413 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2064 03:43:04.241737 hatch: tftpboot 192.168.201.1 12543681/tftp-deploy-_i2u8bok/kernel/bzImage 12543681/tftp-deploy-_i2u8bok/kernel/cmdline 12543681/tftp-deploy-_i2u8bok/ramdisk/ramdisk.cpio.gz
2065 03:43:04.241941 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2066 03:43:04.242044 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2067 03:43:04.246008 tftpboot 192.168.201.1 12543681/tftp-deploy-_i2u8bok/kernel/bzIploy-_i2u8bok/kernel/cmdline 12543681/tftp-deploy-_i2u8bok/ramdisk/ramdisk.cpio.gz
2068 03:43:04.246118
2069 03:43:04.246213 Waiting for link
2070 03:43:04.447044
2071 03:43:04.447219 done.
2072 03:43:04.447319
2073 03:43:04.447391 MAC: 00:24:32:50:19:be
2074 03:43:04.447455
2075 03:43:04.449985 Sending DHCP discover... done.
2076 03:43:04.450072
2077 03:43:04.453343 Waiting for reply... done.
2078 03:43:04.453425
2079 03:43:04.456590 Sending DHCP request... done.
2080 03:43:04.456682
2081 03:43:04.497169 Waiting for reply... done.
2082 03:43:04.497322
2083 03:43:04.497398 My ip is 192.168.201.15
2084 03:43:04.497465
2085 03:43:04.500171 The DHCP server ip is 192.168.201.1
2086 03:43:04.503323
2087 03:43:04.506743 TFTP server IP predefined by user: 192.168.201.1
2088 03:43:04.506861
2089 03:43:04.513471 Bootfile predefined by user: 12543681/tftp-deploy-_i2u8bok/kernel/bzImage
2090 03:43:04.513593
2091 03:43:04.516598 Sending tftp read request... done.
2092 03:43:04.516683
2093 03:43:04.519919 Waiting for the transfer...
2094 03:43:04.523210
2095 03:43:05.049185 00000000 ################################################################
2096 03:43:05.049342
2097 03:43:05.576757 00080000 ################################################################
2098 03:43:05.576901
2099 03:43:06.093375 00100000 ################################################################
2100 03:43:06.093519
2101 03:43:06.629110 00180000 ################################################################
2102 03:43:06.629250
2103 03:43:07.161937 00200000 ################################################################
2104 03:43:07.162075
2105 03:43:07.698497 00280000 ################################################################
2106 03:43:07.698662
2107 03:43:08.234361 00300000 ################################################################
2108 03:43:08.234502
2109 03:43:08.767554 00380000 ################################################################
2110 03:43:08.767720
2111 03:43:09.296272 00400000 ################################################################
2112 03:43:09.296426
2113 03:43:09.844804 00480000 ################################################################
2114 03:43:09.844938
2115 03:43:10.389550 00500000 ################################################################
2116 03:43:10.389847
2117 03:43:10.990490 00580000 ################################################################
2118 03:43:10.990648
2119 03:43:11.551910 00600000 ################################################################
2120 03:43:11.552071
2121 03:43:12.240142 00680000 ################################################################
2122 03:43:12.240703
2123 03:43:12.953211 00700000 ################################################################
2124 03:43:12.953723
2125 03:43:13.523188 00780000 ################################################################
2126 03:43:13.523325
2127 03:43:14.047724 00800000 ################################################################
2128 03:43:14.047854
2129 03:43:14.562143 00880000 ################################################################
2130 03:43:14.562285
2131 03:43:15.078238 00900000 ################################################################
2132 03:43:15.078375
2133 03:43:15.594617 00980000 ################################################################
2134 03:43:15.594758
2135 03:43:16.117857 00a00000 ################################################################
2136 03:43:16.118033
2137 03:43:16.645063 00a80000 ################################################################
2138 03:43:16.645198
2139 03:43:16.686059 00b00000 ###### done.
2140 03:43:16.686150
2141 03:43:16.689770 The bootfile was 11575296 bytes long.
2142 03:43:16.689858
2143 03:43:16.692520 Sending tftp read request... done.
2144 03:43:16.692606
2145 03:43:16.695734 Waiting for the transfer...
2146 03:43:16.695823
2147 03:43:17.235719 00000000 ################################################################
2148 03:43:17.235884
2149 03:43:17.783283 00080000 ################################################################
2150 03:43:17.783427
2151 03:43:18.333791 00100000 ################################################################
2152 03:43:18.333940
2153 03:43:18.901095 00180000 ################################################################
2154 03:43:18.901227
2155 03:43:19.450062 00200000 ################################################################
2156 03:43:19.450200
2157 03:43:19.989186 00280000 ################################################################
2158 03:43:19.989329
2159 03:43:20.533227 00300000 ################################################################
2160 03:43:20.533385
2161 03:43:21.072420 00380000 ################################################################
2162 03:43:21.072569
2163 03:43:21.603746 00400000 ################################################################
2164 03:43:21.603897
2165 03:43:22.136685 00480000 ################################################################
2166 03:43:22.136849
2167 03:43:22.693315 00500000 ################################################################
2168 03:43:22.693449
2169 03:43:23.101938 00580000 ################################################ done.
2170 03:43:23.102088
2171 03:43:23.104675 Sending tftp read request... done.
2172 03:43:23.104760
2173 03:43:23.108439 Waiting for the transfer...
2174 03:43:23.108524
2175 03:43:23.108590 00000000 # done.
2176 03:43:23.111300
2177 03:43:23.117823 Command line loaded dynamically from TFTP file: 12543681/tftp-deploy-_i2u8bok/kernel/cmdline
2178 03:43:23.117908
2179 03:43:23.147541 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12543681/extract-nfsrootfs-w9org9h_,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2180 03:43:23.147633
2181 03:43:23.154302 ec_init(0): CrosEC protocol v3 supported (256, 256)
2182 03:43:23.158683
2183 03:43:23.161883 Shutting down all USB controllers.
2184 03:43:23.161966
2185 03:43:23.162032 Removing current net device
2186 03:43:23.166393
2187 03:43:23.166475 Finalizing coreboot
2188 03:43:23.166542
2189 03:43:23.172455 Exiting depthcharge with code 4 at timestamp: 28527217
2190 03:43:23.172538
2191 03:43:23.172604
2192 03:43:23.172665 Starting kernel ...
2193 03:43:23.172725
2194 03:43:23.172782
2195 03:43:23.173153 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2196 03:43:23.173248 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2197 03:43:23.173323 Setting prompt string to ['Linux version [0-9]']
2198 03:43:23.173392 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2199 03:43:23.173461 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2201 03:47:44.173510 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2203 03:47:44.173713 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2205 03:47:44.173869 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2208 03:47:44.174115 end: 2 depthcharge-action (duration 00:05:00) [common]
2210 03:47:44.174325 Cleaning after the job
2211 03:47:44.174413 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543681/tftp-deploy-_i2u8bok/ramdisk
2212 03:47:44.175359 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543681/tftp-deploy-_i2u8bok/kernel
2213 03:47:44.177086 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543681/tftp-deploy-_i2u8bok/nfsrootfs
2214 03:47:44.255298 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543681/tftp-deploy-_i2u8bok/modules
2215 03:47:44.256025 start: 5.1 power-off (timeout 00:00:30) [common]
2216 03:47:44.256188 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2217 03:47:44.332422 >> Command sent successfully.
2218 03:47:44.334913 Returned 0 in 0 seconds
2219 03:47:44.435340 end: 5.1 power-off (duration 00:00:00) [common]
2221 03:47:44.435738 start: 5.2 read-feedback (timeout 00:10:00) [common]
2222 03:47:44.436105 Listened to connection for namespace 'common' for up to 1s
2224 03:47:44.436650 Listened to connection for namespace 'common' for up to 1s
2225 03:47:45.436991 Finalising connection for namespace 'common'
2226 03:47:45.437167 Disconnecting from shell: Finalise
2227 03:47:45.437247
2228 03:47:45.537581 end: 5.2 read-feedback (duration 00:00:01) [common]
2229 03:47:45.537729 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12543681
2230 03:47:45.865127 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12543681
2231 03:47:45.865380 JobError: Your job cannot terminate cleanly.