Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 03:39:49.553070 lava-dispatcher, installed at version: 2023.10
2 03:39:49.553282 start: 0 validate
3 03:39:49.553411 Start time: 2024-01-16 03:39:49.553402+00:00 (UTC)
4 03:39:49.553528 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:39:49.553662 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 03:39:49.816759 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:39:49.817522 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.304-cip106-27-gf3e967c370d44%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:39:56.330039 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:39:56.330778 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.304-cip106-27-gf3e967c370d44%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 03:39:57.336812 validate duration: 7.78
12 03:39:57.337192 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 03:39:57.337410 start: 1.1 download-retry (timeout 00:10:00) [common]
14 03:39:57.337541 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 03:39:57.337722 Not decompressing ramdisk as can be used compressed.
16 03:39:57.337850 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 03:39:57.337950 saving as /var/lib/lava/dispatcher/tmp/12543679/tftp-deploy-1lzd5fuw/ramdisk/rootfs.cpio.gz
18 03:39:57.338051 total size: 8418130 (8 MB)
19 03:39:57.339530 progress 0 % (0 MB)
20 03:39:57.343155 progress 5 % (0 MB)
21 03:39:57.346952 progress 10 % (0 MB)
22 03:39:57.350626 progress 15 % (1 MB)
23 03:39:57.354300 progress 20 % (1 MB)
24 03:39:57.357949 progress 25 % (2 MB)
25 03:39:57.361725 progress 30 % (2 MB)
26 03:39:57.365087 progress 35 % (2 MB)
27 03:39:57.368732 progress 40 % (3 MB)
28 03:39:57.372382 progress 45 % (3 MB)
29 03:39:57.375905 progress 50 % (4 MB)
30 03:39:57.379498 progress 55 % (4 MB)
31 03:39:57.381991 progress 60 % (4 MB)
32 03:39:57.384006 progress 65 % (5 MB)
33 03:39:57.386282 progress 70 % (5 MB)
34 03:39:57.388523 progress 75 % (6 MB)
35 03:39:57.390721 progress 80 % (6 MB)
36 03:39:57.392966 progress 85 % (6 MB)
37 03:39:57.395233 progress 90 % (7 MB)
38 03:39:57.397506 progress 95 % (7 MB)
39 03:39:57.399557 progress 100 % (8 MB)
40 03:39:57.399782 8 MB downloaded in 0.06 s (130.05 MB/s)
41 03:39:57.399930 end: 1.1.1 http-download (duration 00:00:00) [common]
43 03:39:57.400237 end: 1.1 download-retry (duration 00:00:00) [common]
44 03:39:57.400327 start: 1.2 download-retry (timeout 00:10:00) [common]
45 03:39:57.400411 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 03:39:57.400607 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.304-cip106-27-gf3e967c370d44/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 03:39:57.400694 saving as /var/lib/lava/dispatcher/tmp/12543679/tftp-deploy-1lzd5fuw/kernel/bzImage
48 03:39:57.400771 total size: 11575296 (11 MB)
49 03:39:57.400832 No compression specified
50 03:39:57.402007 progress 0 % (0 MB)
51 03:39:57.405083 progress 5 % (0 MB)
52 03:39:57.408199 progress 10 % (1 MB)
53 03:39:57.411101 progress 15 % (1 MB)
54 03:39:57.414210 progress 20 % (2 MB)
55 03:39:57.417355 progress 25 % (2 MB)
56 03:39:57.420301 progress 30 % (3 MB)
57 03:39:57.423426 progress 35 % (3 MB)
58 03:39:57.426592 progress 40 % (4 MB)
59 03:39:57.429599 progress 45 % (4 MB)
60 03:39:57.432812 progress 50 % (5 MB)
61 03:39:57.435931 progress 55 % (6 MB)
62 03:39:57.438892 progress 60 % (6 MB)
63 03:39:57.441921 progress 65 % (7 MB)
64 03:39:57.444918 progress 70 % (7 MB)
65 03:39:57.447806 progress 75 % (8 MB)
66 03:39:57.450857 progress 80 % (8 MB)
67 03:39:57.453966 progress 85 % (9 MB)
68 03:39:57.456814 progress 90 % (9 MB)
69 03:39:57.460048 progress 95 % (10 MB)
70 03:39:57.463206 progress 100 % (11 MB)
71 03:39:57.463344 11 MB downloaded in 0.06 s (176.43 MB/s)
72 03:39:57.463489 end: 1.2.1 http-download (duration 00:00:00) [common]
74 03:39:57.463720 end: 1.2 download-retry (duration 00:00:00) [common]
75 03:39:57.463809 start: 1.3 download-retry (timeout 00:10:00) [common]
76 03:39:57.463894 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 03:39:57.464036 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.304-cip106-27-gf3e967c370d44/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 03:39:57.464114 saving as /var/lib/lava/dispatcher/tmp/12543679/tftp-deploy-1lzd5fuw/modules/modules.tar
79 03:39:57.464177 total size: 484060 (0 MB)
80 03:39:57.464239 Using unxz to decompress xz
81 03:39:57.468674 progress 6 % (0 MB)
82 03:39:57.469080 progress 13 % (0 MB)
83 03:39:57.469316 progress 20 % (0 MB)
84 03:39:57.470932 progress 27 % (0 MB)
85 03:39:57.472971 progress 33 % (0 MB)
86 03:39:57.474850 progress 40 % (0 MB)
87 03:39:57.476812 progress 47 % (0 MB)
88 03:39:57.478720 progress 54 % (0 MB)
89 03:39:57.480688 progress 60 % (0 MB)
90 03:39:57.482679 progress 67 % (0 MB)
91 03:39:57.484707 progress 74 % (0 MB)
92 03:39:57.486748 progress 81 % (0 MB)
93 03:39:57.488681 progress 88 % (0 MB)
94 03:39:57.490608 progress 94 % (0 MB)
95 03:39:57.493024 progress 100 % (0 MB)
96 03:39:57.499516 0 MB downloaded in 0.04 s (13.07 MB/s)
97 03:39:57.499767 end: 1.3.1 http-download (duration 00:00:00) [common]
99 03:39:57.500038 end: 1.3 download-retry (duration 00:00:00) [common]
100 03:39:57.500174 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 03:39:57.500271 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 03:39:57.500352 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 03:39:57.500438 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 03:39:57.500669 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab
105 03:39:57.500805 makedir: /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin
106 03:39:57.500911 makedir: /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/tests
107 03:39:57.501013 makedir: /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/results
108 03:39:57.501132 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-add-keys
109 03:39:57.501283 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-add-sources
110 03:39:57.501418 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-background-process-start
111 03:39:57.501550 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-background-process-stop
112 03:39:57.501680 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-common-functions
113 03:39:57.501808 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-echo-ipv4
114 03:39:57.501935 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-install-packages
115 03:39:57.502062 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-installed-packages
116 03:39:57.502191 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-os-build
117 03:39:57.502318 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-probe-channel
118 03:39:57.502446 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-probe-ip
119 03:39:57.502611 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-target-ip
120 03:39:57.502740 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-target-mac
121 03:39:57.502867 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-target-storage
122 03:39:57.503002 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-test-case
123 03:39:57.503129 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-test-event
124 03:39:57.503258 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-test-feedback
125 03:39:57.503386 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-test-raise
126 03:39:57.503515 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-test-reference
127 03:39:57.503647 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-test-runner
128 03:39:57.503778 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-test-set
129 03:39:57.503909 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-test-shell
130 03:39:57.504041 Updating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-install-packages (oe)
131 03:39:57.504239 Updating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/bin/lava-installed-packages (oe)
132 03:39:57.504365 Creating /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/environment
133 03:39:57.504466 LAVA metadata
134 03:39:57.504541 - LAVA_JOB_ID=12543679
135 03:39:57.504609 - LAVA_DISPATCHER_IP=192.168.201.1
136 03:39:57.504710 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 03:39:57.504777 skipped lava-vland-overlay
138 03:39:57.504854 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 03:39:57.504936 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 03:39:57.504999 skipped lava-multinode-overlay
141 03:39:57.505072 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 03:39:57.505154 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 03:39:57.505232 Loading test definitions
144 03:39:57.505325 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 03:39:57.505404 Using /lava-12543679 at stage 0
146 03:39:57.505727 uuid=12543679_1.4.2.3.1 testdef=None
147 03:39:57.505815 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 03:39:57.505909 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 03:39:57.506442 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 03:39:57.506709 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 03:39:57.507363 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 03:39:57.507597 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 03:39:57.508267 runner path: /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/0/tests/0_dmesg test_uuid 12543679_1.4.2.3.1
156 03:39:57.508425 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 03:39:57.508657 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 03:39:57.508729 Using /lava-12543679 at stage 1
160 03:39:57.509032 uuid=12543679_1.4.2.3.5 testdef=None
161 03:39:57.509119 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 03:39:57.509202 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 03:39:57.509680 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 03:39:57.509899 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 03:39:57.510552 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 03:39:57.510779 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 03:39:57.511411 runner path: /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/1/tests/1_bootrr test_uuid 12543679_1.4.2.3.5
170 03:39:57.511566 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 03:39:57.511777 Creating lava-test-runner.conf files
173 03:39:57.511840 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/0 for stage 0
174 03:39:57.511930 - 0_dmesg
175 03:39:57.512013 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12543679/lava-overlay-hlgkr5ab/lava-12543679/1 for stage 1
176 03:39:57.512143 - 1_bootrr
177 03:39:57.512240 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 03:39:57.512327 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 03:39:57.520797 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 03:39:57.520903 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 03:39:57.520988 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 03:39:57.521071 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 03:39:57.521157 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 03:39:57.774524 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 03:39:57.774970 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 03:39:57.775121 extracting modules file /var/lib/lava/dispatcher/tmp/12543679/tftp-deploy-1lzd5fuw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12543679/extract-overlay-ramdisk-3zakzqfr/ramdisk
187 03:39:57.798252 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 03:39:57.798420 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 03:39:57.798519 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12543679/compress-overlay-bj0u950y/overlay-1.4.2.4.tar.gz to ramdisk
190 03:39:57.798591 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12543679/compress-overlay-bj0u950y/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12543679/extract-overlay-ramdisk-3zakzqfr/ramdisk
191 03:39:57.807360 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 03:39:57.807494 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 03:39:57.807590 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 03:39:57.807679 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 03:39:57.807757 Building ramdisk /var/lib/lava/dispatcher/tmp/12543679/extract-overlay-ramdisk-3zakzqfr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12543679/extract-overlay-ramdisk-3zakzqfr/ramdisk
196 03:39:57.963951 >> 53982 blocks
197 03:39:58.851796 rename /var/lib/lava/dispatcher/tmp/12543679/extract-overlay-ramdisk-3zakzqfr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12543679/tftp-deploy-1lzd5fuw/ramdisk/ramdisk.cpio.gz
198 03:39:58.852328 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 03:39:58.852473 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 03:39:58.852602 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 03:39:58.852730 No mkimage arch provided, not using FIT.
202 03:39:58.852850 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 03:39:58.852968 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 03:39:58.853075 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 03:39:58.853168 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 03:39:58.853247 No LXC device requested
207 03:39:58.853332 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 03:39:58.853420 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 03:39:58.853500 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 03:39:58.853572 Checking files for TFTP limit of 4294967296 bytes.
211 03:39:58.853983 end: 1 tftp-deploy (duration 00:00:02) [common]
212 03:39:58.854089 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 03:39:58.854180 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 03:39:58.854308 substitutions:
215 03:39:58.854374 - {DTB}: None
216 03:39:58.854436 - {INITRD}: 12543679/tftp-deploy-1lzd5fuw/ramdisk/ramdisk.cpio.gz
217 03:39:58.854496 - {KERNEL}: 12543679/tftp-deploy-1lzd5fuw/kernel/bzImage
218 03:39:58.854554 - {LAVA_MAC}: None
219 03:39:58.854610 - {PRESEED_CONFIG}: None
220 03:39:58.854665 - {PRESEED_LOCAL}: None
221 03:39:58.854720 - {RAMDISK}: 12543679/tftp-deploy-1lzd5fuw/ramdisk/ramdisk.cpio.gz
222 03:39:58.854775 - {ROOT_PART}: None
223 03:39:58.854830 - {ROOT}: None
224 03:39:58.854884 - {SERVER_IP}: 192.168.201.1
225 03:39:58.854938 - {TEE}: None
226 03:39:58.854991 Parsed boot commands:
227 03:39:58.855046 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 03:39:58.855221 Parsed boot commands: tftpboot 192.168.201.1 12543679/tftp-deploy-1lzd5fuw/kernel/bzImage 12543679/tftp-deploy-1lzd5fuw/kernel/cmdline 12543679/tftp-deploy-1lzd5fuw/ramdisk/ramdisk.cpio.gz
229 03:39:58.855309 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 03:39:58.855393 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 03:39:58.855489 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 03:39:58.855573 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 03:39:58.855641 Not connected, no need to disconnect.
234 03:39:58.855716 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 03:39:58.855797 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 03:39:58.855865 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
237 03:39:58.860248 Setting prompt string to ['lava-test: # ']
238 03:39:58.860711 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 03:39:58.860827 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 03:39:58.860926 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 03:39:58.861068 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 03:39:58.861311 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
243 03:40:03.990709 >> Command sent successfully.
244 03:40:03.993193 Returned 0 in 5 seconds
245 03:40:04.093564 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 03:40:04.093878 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 03:40:04.093981 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 03:40:04.094074 Setting prompt string to 'Starting depthcharge on Helios...'
250 03:40:04.094147 Changing prompt to 'Starting depthcharge on Helios...'
251 03:40:04.094216 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 03:40:04.094566 [Enter `^Ec?' for help]
253 03:40:04.714554
254 03:40:04.714717
255 03:40:04.724307 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 03:40:04.727810 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 03:40:04.734052 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 03:40:04.737667 CPU: AES supported, TXT NOT supported, VT supported
259 03:40:04.744019 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 03:40:04.747465 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 03:40:04.754150 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 03:40:04.757826 VBOOT: Loading verstage.
263 03:40:04.760577 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 03:40:04.767840 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 03:40:04.770685 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 03:40:04.774355 CBFS @ c08000 size 3f8000
267 03:40:04.780693 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 03:40:04.784397 CBFS: Locating 'fallback/verstage'
269 03:40:04.787224 CBFS: Found @ offset 10fb80 size 1072c
270 03:40:04.791094
271 03:40:04.791175
272 03:40:04.800833 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 03:40:04.815037 Probing TPM: . done!
274 03:40:04.818935 TPM ready after 0 ms
275 03:40:04.821595 Connected to device vid:did:rid of 1ae0:0028:00
276 03:40:04.832548 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
277 03:40:04.835532 Initialized TPM device CR50 revision 0
278 03:40:04.882190 tlcl_send_startup: Startup return code is 0
279 03:40:04.882276 TPM: setup succeeded
280 03:40:04.895170 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 03:40:04.898840 Chrome EC: UHEPI supported
282 03:40:04.902695 Phase 1
283 03:40:04.905862 FMAP: area GBB found @ c05000 (12288 bytes)
284 03:40:04.912366 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 03:40:04.912449 Phase 2
286 03:40:04.915900 Phase 3
287 03:40:04.918943 FMAP: area GBB found @ c05000 (12288 bytes)
288 03:40:04.925503 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 03:40:04.932507 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
290 03:40:04.935624 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
291 03:40:04.941930 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 03:40:04.957663 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
293 03:40:04.960964 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
294 03:40:04.967401 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 03:40:04.971764 Phase 4
296 03:40:04.974947 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
297 03:40:04.981749 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 03:40:05.161443 VB2:vb2_rsa_verify_digest() Digest check failed!
299 03:40:05.167883 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 03:40:05.167998 Saving nvdata
301 03:40:05.171630 Reboot requested (10020007)
302 03:40:05.174782 board_reset() called!
303 03:40:05.174866 full_reset() called!
304 03:40:09.681675
305 03:40:09.682259
306 03:40:09.692161 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 03:40:09.694678 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 03:40:09.701231 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 03:40:09.705010 CPU: AES supported, TXT NOT supported, VT supported
310 03:40:09.711916 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 03:40:09.715218 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 03:40:09.721734 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 03:40:09.725181 VBOOT: Loading verstage.
314 03:40:09.727942 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 03:40:09.734879 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 03:40:09.739014 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 03:40:09.741242 CBFS @ c08000 size 3f8000
318 03:40:09.747752 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 03:40:09.751792 CBFS: Locating 'fallback/verstage'
320 03:40:09.754329 CBFS: Found @ offset 10fb80 size 1072c
321 03:40:09.758221
322 03:40:09.758693
323 03:40:09.768158 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 03:40:09.782197 Probing TPM: . done!
325 03:40:09.786002 TPM ready after 0 ms
326 03:40:09.788996 Connected to device vid:did:rid of 1ae0:0028:00
327 03:40:09.798895 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 03:40:09.802267 Initialized TPM device CR50 revision 0
329 03:40:09.850583 tlcl_send_startup: Startup return code is 0
330 03:40:09.850732 TPM: setup succeeded
331 03:40:09.863429 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 03:40:09.866890 Chrome EC: UHEPI supported
333 03:40:09.870227 Phase 1
334 03:40:09.873519 FMAP: area GBB found @ c05000 (12288 bytes)
335 03:40:09.880243 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 03:40:09.887177 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 03:40:09.890358 Recovery requested (1009000e)
338 03:40:09.895976 Saving nvdata
339 03:40:09.902297 tlcl_extend: response is 0
340 03:40:09.912244 tlcl_extend: response is 0
341 03:40:09.917775 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 03:40:09.921630 CBFS @ c08000 size 3f8000
343 03:40:09.927673 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 03:40:09.931225 CBFS: Locating 'fallback/romstage'
345 03:40:09.934357 CBFS: Found @ offset 80 size 145fc
346 03:40:09.937923 Accumulated console time in verstage 98 ms
347 03:40:09.938026
348 03:40:09.938094
349 03:40:09.950924 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 03:40:09.957687 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 03:40:09.960816 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 03:40:09.964318 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 03:40:09.971283 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 03:40:09.974236 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 03:40:09.977512 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 03:40:09.980565 TCO_STS: 0000 0000
357 03:40:09.984236 GEN_PMCON: e0015238 00000200
358 03:40:09.987400 GBLRST_CAUSE: 00000000 00000000
359 03:40:09.987483 prev_sleep_state 5
360 03:40:09.990469 Boot Count incremented to 76217
361 03:40:09.997466 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 03:40:10.000750 CBFS @ c08000 size 3f8000
363 03:40:10.007809 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 03:40:10.008015 CBFS: Locating 'fspm.bin'
365 03:40:10.014434 CBFS: Found @ offset 5ffc0 size 71000
366 03:40:10.017689 Chrome EC: UHEPI supported
367 03:40:10.023984 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 03:40:10.027653 Probing TPM: done!
369 03:40:10.034185 Connected to device vid:did:rid of 1ae0:0028:00
370 03:40:10.044083 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
371 03:40:10.050410 Initialized TPM device CR50 revision 0
372 03:40:10.059260 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 03:40:10.066331 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 03:40:10.069012 MRC cache found, size 1948
375 03:40:10.072539 bootmode is set to: 2
376 03:40:10.076487 PRMRR disabled by config.
377 03:40:10.077153 SPD INDEX = 1
378 03:40:10.082517 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 03:40:10.086056 CBFS @ c08000 size 3f8000
380 03:40:10.092570 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 03:40:10.092662 CBFS: Locating 'spd.bin'
382 03:40:10.095939 CBFS: Found @ offset 5fb80 size 400
383 03:40:10.099272 SPD: module type is LPDDR3
384 03:40:10.103059 SPD: module part is
385 03:40:10.109331 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 03:40:10.112424 SPD: device width 4 bits, bus width 8 bits
387 03:40:10.115465 SPD: module size is 4096 MB (per channel)
388 03:40:10.118722 memory slot: 0 configuration done.
389 03:40:10.122089 memory slot: 2 configuration done.
390 03:40:10.173465 CBMEM:
391 03:40:10.176633 IMD: root @ 99fff000 254 entries.
392 03:40:10.180205 IMD: root @ 99ffec00 62 entries.
393 03:40:10.183311 External stage cache:
394 03:40:10.186343 IMD: root @ 9abff000 254 entries.
395 03:40:10.189722 IMD: root @ 9abfec00 62 entries.
396 03:40:10.196277 Chrome EC: clear events_b mask to 0x0000000020004000
397 03:40:10.209327 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 03:40:10.222837 tlcl_write: response is 0
399 03:40:10.231962 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 03:40:10.238311 MRC: TPM MRC hash updated successfully.
401 03:40:10.238450 2 DIMMs found
402 03:40:10.241565 SMM Memory Map
403 03:40:10.244991 SMRAM : 0x9a000000 0x1000000
404 03:40:10.248470 Subregion 0: 0x9a000000 0xa00000
405 03:40:10.251646 Subregion 1: 0x9aa00000 0x200000
406 03:40:10.255483 Subregion 2: 0x9ac00000 0x400000
407 03:40:10.258438 top_of_ram = 0x9a000000
408 03:40:10.261445 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 03:40:10.268290 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 03:40:10.271468 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 03:40:10.278235 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 03:40:10.282691 CBFS @ c08000 size 3f8000
413 03:40:10.284795 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 03:40:10.288410 CBFS: Locating 'fallback/postcar'
415 03:40:10.295152 CBFS: Found @ offset 107000 size 4b44
416 03:40:10.297968 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 03:40:10.310709 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 03:40:10.313968 Processing 180 relocs. Offset value of 0x97c0c000
419 03:40:10.322437 Accumulated console time in romstage 286 ms
420 03:40:10.322538
421 03:40:10.322610
422 03:40:10.332476 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 03:40:10.339164 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 03:40:10.342696 CBFS @ c08000 size 3f8000
425 03:40:10.346090 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 03:40:10.352674 CBFS: Locating 'fallback/ramstage'
427 03:40:10.355753 CBFS: Found @ offset 43380 size 1b9e8
428 03:40:10.362465 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 03:40:10.395034 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 03:40:10.398205 Processing 3976 relocs. Offset value of 0x98db0000
431 03:40:10.404554 Accumulated console time in postcar 52 ms
432 03:40:10.404682
433 03:40:10.404753
434 03:40:10.414202 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 03:40:10.420983 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 03:40:10.424015 WARNING: RO_VPD is uninitialized or empty.
437 03:40:10.427622 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 03:40:10.434224 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 03:40:10.434341 Normal boot.
440 03:40:10.441146 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 03:40:10.443886 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 03:40:10.447306 CBFS @ c08000 size 3f8000
443 03:40:10.454133 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 03:40:10.457054 CBFS: Locating 'cpu_microcode_blob.bin'
445 03:40:10.461045 CBFS: Found @ offset 14700 size 2ec00
446 03:40:10.463779 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 03:40:10.467343 Skip microcode update
448 03:40:10.473739 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 03:40:10.473880 CBFS @ c08000 size 3f8000
450 03:40:10.480897 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 03:40:10.483884 CBFS: Locating 'fsps.bin'
452 03:40:10.487479 CBFS: Found @ offset d1fc0 size 35000
453 03:40:10.512707 Detected 4 core, 8 thread CPU.
454 03:40:10.515803 Setting up SMI for CPU
455 03:40:10.519402 IED base = 0x9ac00000
456 03:40:10.519628 IED size = 0x00400000
457 03:40:10.522836 Will perform SMM setup.
458 03:40:10.529297 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 03:40:10.536092 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 03:40:10.539193 Processing 16 relocs. Offset value of 0x00030000
461 03:40:10.543286 Attempting to start 7 APs
462 03:40:10.546841 Waiting for 10ms after sending INIT.
463 03:40:10.562872 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
464 03:40:10.563450 done.
465 03:40:10.565970 AP: slot 6 apic_id 4.
466 03:40:10.570186 AP: slot 5 apic_id 5.
467 03:40:10.573208 Waiting for 2nd SIPI to complete...done.
468 03:40:10.576171 AP: slot 1 apic_id 2.
469 03:40:10.576641 AP: slot 3 apic_id 3.
470 03:40:10.579244 AP: slot 4 apic_id 6.
471 03:40:10.582516 AP: slot 7 apic_id 7.
472 03:40:10.589274 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 03:40:10.592454 Processing 13 relocs. Offset value of 0x00038000
474 03:40:10.599195 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 03:40:10.606379 Installing SMM handler to 0x9a000000
476 03:40:10.612397 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 03:40:10.616085 Processing 658 relocs. Offset value of 0x9a010000
478 03:40:10.626477 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 03:40:10.629385 Processing 13 relocs. Offset value of 0x9a008000
480 03:40:10.635578 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 03:40:10.642622 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 03:40:10.646065 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 03:40:10.652155 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 03:40:10.659108 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 03:40:10.665868 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 03:40:10.669527 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 03:40:10.675473 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 03:40:10.678808 Clearing SMI status registers
489 03:40:10.682630 SMI_STS: PM1
490 03:40:10.683152 PM1_STS: PWRBTN
491 03:40:10.685694 TCO_STS: SECOND_TO
492 03:40:10.689517 New SMBASE 0x9a000000
493 03:40:10.690108 In relocation handler: CPU 0
494 03:40:10.695596 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 03:40:10.699241 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 03:40:10.702651 Relocation complete.
497 03:40:10.703173 New SMBASE 0x99fff800
498 03:40:10.705877 In relocation handler: CPU 2
499 03:40:10.712278 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
500 03:40:10.715646 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 03:40:10.718883 Relocation complete.
502 03:40:10.719406 New SMBASE 0x99ffe400
503 03:40:10.722492 In relocation handler: CPU 7
504 03:40:10.729094 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
505 03:40:10.732479 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 03:40:10.735868 Relocation complete.
507 03:40:10.736506 New SMBASE 0x99fff000
508 03:40:10.739726 In relocation handler: CPU 4
509 03:40:10.742883 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
510 03:40:10.749702 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 03:40:10.752259 Relocation complete.
512 03:40:10.752688 New SMBASE 0x99fff400
513 03:40:10.755727 In relocation handler: CPU 3
514 03:40:10.758840 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
515 03:40:10.765668 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 03:40:10.766300 Relocation complete.
517 03:40:10.769451 New SMBASE 0x99fffc00
518 03:40:10.772437 In relocation handler: CPU 1
519 03:40:10.776097 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
520 03:40:10.782098 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 03:40:10.782581 Relocation complete.
522 03:40:10.785349 New SMBASE 0x99ffec00
523 03:40:10.788793 In relocation handler: CPU 5
524 03:40:10.791895 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
525 03:40:10.798999 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 03:40:10.799249 Relocation complete.
527 03:40:10.802225 New SMBASE 0x99ffe800
528 03:40:10.805175 In relocation handler: CPU 6
529 03:40:10.808719 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
530 03:40:10.815126 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 03:40:10.815268 Relocation complete.
532 03:40:10.818899 Initializing CPU #0
533 03:40:10.822055 CPU: vendor Intel device 806ec
534 03:40:10.824562 CPU: family 06, model 8e, stepping 0c
535 03:40:10.827983 Clearing out pending MCEs
536 03:40:10.831787 Setting up local APIC...
537 03:40:10.831880 apic_id: 0x00 done.
538 03:40:10.834650 Turbo is available but hidden
539 03:40:10.838385 Turbo is available and visible
540 03:40:10.841344 VMX status: enabled
541 03:40:10.844710 IA32_FEATURE_CONTROL status: locked
542 03:40:10.844795 Skip microcode update
543 03:40:10.848311 CPU #0 initialized
544 03:40:10.851336 Initializing CPU #2
545 03:40:10.851420 Initializing CPU #5
546 03:40:10.855004 Initializing CPU #6
547 03:40:10.859043 CPU: vendor Intel device 806ec
548 03:40:10.861709 CPU: family 06, model 8e, stepping 0c
549 03:40:10.865104 CPU: vendor Intel device 806ec
550 03:40:10.868141 CPU: family 06, model 8e, stepping 0c
551 03:40:10.871749 Clearing out pending MCEs
552 03:40:10.874562 Clearing out pending MCEs
553 03:40:10.874648 Setting up local APIC...
554 03:40:10.878837 CPU: vendor Intel device 806ec
555 03:40:10.884669 CPU: family 06, model 8e, stepping 0c
556 03:40:10.884763 Clearing out pending MCEs
557 03:40:10.887919 apic_id: 0x05 done.
558 03:40:10.891515 Setting up local APIC...
559 03:40:10.891601 Initializing CPU #1
560 03:40:10.894675 Initializing CPU #3
561 03:40:10.898521 CPU: vendor Intel device 806ec
562 03:40:10.901316 CPU: family 06, model 8e, stepping 0c
563 03:40:10.904470 CPU: vendor Intel device 806ec
564 03:40:10.907656 CPU: family 06, model 8e, stepping 0c
565 03:40:10.911100 Clearing out pending MCEs
566 03:40:10.914733 Clearing out pending MCEs
567 03:40:10.914822 Setting up local APIC...
568 03:40:10.917981 Initializing CPU #7
569 03:40:10.921193 Initializing CPU #4
570 03:40:10.924975 CPU: vendor Intel device 806ec
571 03:40:10.927776 CPU: family 06, model 8e, stepping 0c
572 03:40:10.931126 CPU: vendor Intel device 806ec
573 03:40:10.934152 CPU: family 06, model 8e, stepping 0c
574 03:40:10.937900 Clearing out pending MCEs
575 03:40:10.938039 Clearing out pending MCEs
576 03:40:10.940861 Setting up local APIC...
577 03:40:10.944324 Setting up local APIC...
578 03:40:10.947682 apic_id: 0x07 done.
579 03:40:10.947783 Setting up local APIC...
580 03:40:10.950795 apic_id: 0x01 done.
581 03:40:10.954415 VMX status: enabled
582 03:40:10.954503 apic_id: 0x06 done.
583 03:40:10.957507 IA32_FEATURE_CONTROL status: locked
584 03:40:10.960818 VMX status: enabled
585 03:40:10.964637 Skip microcode update
586 03:40:10.968249 IA32_FEATURE_CONTROL status: locked
587 03:40:10.968344 CPU #7 initialized
588 03:40:10.970626 Skip microcode update
589 03:40:10.974284 Setting up local APIC...
590 03:40:10.974386 apic_id: 0x04 done.
591 03:40:10.977459 VMX status: enabled
592 03:40:10.980824 VMX status: enabled
593 03:40:10.984163 IA32_FEATURE_CONTROL status: locked
594 03:40:10.987173 IA32_FEATURE_CONTROL status: locked
595 03:40:10.990977 Skip microcode update
596 03:40:10.991071 Skip microcode update
597 03:40:10.994039 CPU #5 initialized
598 03:40:10.994124 CPU #6 initialized
599 03:40:10.997842 CPU #4 initialized
600 03:40:11.001079 apic_id: 0x02 done.
601 03:40:11.001177 apic_id: 0x03 done.
602 03:40:11.004329 VMX status: enabled
603 03:40:11.004417 VMX status: enabled
604 03:40:11.010461 IA32_FEATURE_CONTROL status: locked
605 03:40:11.013696 IA32_FEATURE_CONTROL status: locked
606 03:40:11.013808 Skip microcode update
607 03:40:11.017027 Skip microcode update
608 03:40:11.020515 CPU #1 initialized
609 03:40:11.020623 CPU #3 initialized
610 03:40:11.023906 VMX status: enabled
611 03:40:11.027010 IA32_FEATURE_CONTROL status: locked
612 03:40:11.030730 Skip microcode update
613 03:40:11.030848 CPU #2 initialized
614 03:40:11.033799 bsp_do_flight_plan done after 461 msecs.
615 03:40:11.037179 CPU: frequency set to 4200 MHz
616 03:40:11.040722 Enabling SMIs.
617 03:40:11.040838 Locking SMM.
618 03:40:11.056386 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 03:40:11.059961 CBFS @ c08000 size 3f8000
620 03:40:11.066086 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 03:40:11.066197 CBFS: Locating 'vbt.bin'
622 03:40:11.069399 CBFS: Found @ offset 5f5c0 size 499
623 03:40:11.076148 Found a VBT of 4608 bytes after decompression
624 03:40:11.260617 Display FSP Version Info HOB
625 03:40:11.263833 Reference Code - CPU = 9.0.1e.30
626 03:40:11.267287 uCode Version = 0.0.0.ca
627 03:40:11.270810 TXT ACM version = ff.ff.ff.ffff
628 03:40:11.274073 Display FSP Version Info HOB
629 03:40:11.277480 Reference Code - ME = 9.0.1e.30
630 03:40:11.280775 MEBx version = 0.0.0.0
631 03:40:11.284419 ME Firmware Version = Consumer SKU
632 03:40:11.287631 Display FSP Version Info HOB
633 03:40:11.291365 Reference Code - CML PCH = 9.0.1e.30
634 03:40:11.291505 PCH-CRID Status = Disabled
635 03:40:11.297408 PCH-CRID Original Value = ff.ff.ff.ffff
636 03:40:11.300586 PCH-CRID New Value = ff.ff.ff.ffff
637 03:40:11.303990 OPROM - RST - RAID = ff.ff.ff.ffff
638 03:40:11.307279 ChipsetInit Base Version = ff.ff.ff.ffff
639 03:40:11.310805 ChipsetInit Oem Version = ff.ff.ff.ffff
640 03:40:11.314309 Display FSP Version Info HOB
641 03:40:11.320702 Reference Code - SA - System Agent = 9.0.1e.30
642 03:40:11.320833 Reference Code - MRC = 0.7.1.6c
643 03:40:11.324388 SA - PCIe Version = 9.0.1e.30
644 03:40:11.326982 SA-CRID Status = Disabled
645 03:40:11.330680 SA-CRID Original Value = 0.0.0.c
646 03:40:11.333944 SA-CRID New Value = 0.0.0.c
647 03:40:11.337037 OPROM - VBIOS = ff.ff.ff.ffff
648 03:40:11.337153 RTC Init
649 03:40:11.343857 Set power on after power failure.
650 03:40:11.343989 Disabling Deep S3
651 03:40:11.347360 Disabling Deep S3
652 03:40:11.347482 Disabling Deep S4
653 03:40:11.351256 Disabling Deep S4
654 03:40:11.351384 Disabling Deep S5
655 03:40:11.353759 Disabling Deep S5
656 03:40:11.360512 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
657 03:40:11.360628 Enumerating buses...
658 03:40:11.367088 Show all devs... Before device enumeration.
659 03:40:11.367203 Root Device: enabled 1
660 03:40:11.370613 CPU_CLUSTER: 0: enabled 1
661 03:40:11.374288 DOMAIN: 0000: enabled 1
662 03:40:11.374378 APIC: 00: enabled 1
663 03:40:11.377237 PCI: 00:00.0: enabled 1
664 03:40:11.381227 PCI: 00:02.0: enabled 1
665 03:40:11.383969 PCI: 00:04.0: enabled 0
666 03:40:11.384101 PCI: 00:05.0: enabled 0
667 03:40:11.387566 PCI: 00:12.0: enabled 1
668 03:40:11.390417 PCI: 00:12.5: enabled 0
669 03:40:11.393607 PCI: 00:12.6: enabled 0
670 03:40:11.393692 PCI: 00:14.0: enabled 1
671 03:40:11.397079 PCI: 00:14.1: enabled 0
672 03:40:11.400402 PCI: 00:14.3: enabled 1
673 03:40:11.403572 PCI: 00:14.5: enabled 0
674 03:40:11.403656 PCI: 00:15.0: enabled 1
675 03:40:11.406856 PCI: 00:15.1: enabled 1
676 03:40:11.410220 PCI: 00:15.2: enabled 0
677 03:40:11.413557 PCI: 00:15.3: enabled 0
678 03:40:11.413642 PCI: 00:16.0: enabled 1
679 03:40:11.417175 PCI: 00:16.1: enabled 0
680 03:40:11.420154 PCI: 00:16.2: enabled 0
681 03:40:11.420241 PCI: 00:16.3: enabled 0
682 03:40:11.423330 PCI: 00:16.4: enabled 0
683 03:40:11.426653 PCI: 00:16.5: enabled 0
684 03:40:11.429916 PCI: 00:17.0: enabled 1
685 03:40:11.430000 PCI: 00:19.0: enabled 1
686 03:40:11.433759 PCI: 00:19.1: enabled 0
687 03:40:11.436985 PCI: 00:19.2: enabled 0
688 03:40:11.440260 PCI: 00:1a.0: enabled 0
689 03:40:11.440366 PCI: 00:1c.0: enabled 0
690 03:40:11.443646 PCI: 00:1c.1: enabled 0
691 03:40:11.446864 PCI: 00:1c.2: enabled 0
692 03:40:11.450005 PCI: 00:1c.3: enabled 0
693 03:40:11.450088 PCI: 00:1c.4: enabled 0
694 03:40:11.453258 PCI: 00:1c.5: enabled 0
695 03:40:11.456951 PCI: 00:1c.6: enabled 0
696 03:40:11.457034 PCI: 00:1c.7: enabled 0
697 03:40:11.460214 PCI: 00:1d.0: enabled 1
698 03:40:11.463403 PCI: 00:1d.1: enabled 0
699 03:40:11.466541 PCI: 00:1d.2: enabled 0
700 03:40:11.466624 PCI: 00:1d.3: enabled 0
701 03:40:11.470120 PCI: 00:1d.4: enabled 0
702 03:40:11.473156 PCI: 00:1d.5: enabled 1
703 03:40:11.477195 PCI: 00:1e.0: enabled 1
704 03:40:11.477277 PCI: 00:1e.1: enabled 0
705 03:40:11.480592 PCI: 00:1e.2: enabled 1
706 03:40:11.483280 PCI: 00:1e.3: enabled 1
707 03:40:11.486647 PCI: 00:1f.0: enabled 1
708 03:40:11.486729 PCI: 00:1f.1: enabled 1
709 03:40:11.490011 PCI: 00:1f.2: enabled 1
710 03:40:11.493175 PCI: 00:1f.3: enabled 1
711 03:40:11.493258 PCI: 00:1f.4: enabled 1
712 03:40:11.496581 PCI: 00:1f.5: enabled 1
713 03:40:11.499626 PCI: 00:1f.6: enabled 0
714 03:40:11.502904 USB0 port 0: enabled 1
715 03:40:11.503012 I2C: 00:15: enabled 1
716 03:40:11.506588 I2C: 00:5d: enabled 1
717 03:40:11.510067 GENERIC: 0.0: enabled 1
718 03:40:11.510175 I2C: 00:1a: enabled 1
719 03:40:11.512916 I2C: 00:38: enabled 1
720 03:40:11.516235 I2C: 00:39: enabled 1
721 03:40:11.516341 I2C: 00:3a: enabled 1
722 03:40:11.519669 I2C: 00:3b: enabled 1
723 03:40:11.522815 PCI: 00:00.0: enabled 1
724 03:40:11.522921 SPI: 00: enabled 1
725 03:40:11.526322 SPI: 01: enabled 1
726 03:40:11.529392 PNP: 0c09.0: enabled 1
727 03:40:11.529499 USB2 port 0: enabled 1
728 03:40:11.533229 USB2 port 1: enabled 1
729 03:40:11.536257 USB2 port 2: enabled 0
730 03:40:11.539414 USB2 port 3: enabled 0
731 03:40:11.539523 USB2 port 5: enabled 0
732 03:40:11.542613 USB2 port 6: enabled 1
733 03:40:11.546655 USB2 port 9: enabled 1
734 03:40:11.546760 USB3 port 0: enabled 1
735 03:40:11.549566 USB3 port 1: enabled 1
736 03:40:11.552948 USB3 port 2: enabled 1
737 03:40:11.553055 USB3 port 3: enabled 1
738 03:40:11.555958 USB3 port 4: enabled 0
739 03:40:11.559889 APIC: 02: enabled 1
740 03:40:11.559995 APIC: 01: enabled 1
741 03:40:11.562829 APIC: 03: enabled 1
742 03:40:11.566050 APIC: 06: enabled 1
743 03:40:11.566160 APIC: 05: enabled 1
744 03:40:11.569353 APIC: 04: enabled 1
745 03:40:11.569464 APIC: 07: enabled 1
746 03:40:11.572826 Compare with tree...
747 03:40:11.575847 Root Device: enabled 1
748 03:40:11.579394 CPU_CLUSTER: 0: enabled 1
749 03:40:11.579502 APIC: 00: enabled 1
750 03:40:11.582646 APIC: 02: enabled 1
751 03:40:11.585957 APIC: 01: enabled 1
752 03:40:11.586063 APIC: 03: enabled 1
753 03:40:11.589712 APIC: 06: enabled 1
754 03:40:11.592462 APIC: 05: enabled 1
755 03:40:11.592570 APIC: 04: enabled 1
756 03:40:11.596425 APIC: 07: enabled 1
757 03:40:11.600016 DOMAIN: 0000: enabled 1
758 03:40:11.602980 PCI: 00:00.0: enabled 1
759 03:40:11.603086 PCI: 00:02.0: enabled 1
760 03:40:11.605706 PCI: 00:04.0: enabled 0
761 03:40:11.609047 PCI: 00:05.0: enabled 0
762 03:40:11.612594 PCI: 00:12.0: enabled 1
763 03:40:11.615650 PCI: 00:12.5: enabled 0
764 03:40:11.615755 PCI: 00:12.6: enabled 0
765 03:40:11.619023 PCI: 00:14.0: enabled 1
766 03:40:11.622286 USB0 port 0: enabled 1
767 03:40:11.625612 USB2 port 0: enabled 1
768 03:40:11.628934 USB2 port 1: enabled 1
769 03:40:11.629019 USB2 port 2: enabled 0
770 03:40:11.632258 USB2 port 3: enabled 0
771 03:40:11.635393 USB2 port 5: enabled 0
772 03:40:11.639276 USB2 port 6: enabled 1
773 03:40:11.642901 USB2 port 9: enabled 1
774 03:40:11.645763 USB3 port 0: enabled 1
775 03:40:11.645878 USB3 port 1: enabled 1
776 03:40:11.648818 USB3 port 2: enabled 1
777 03:40:11.652411 USB3 port 3: enabled 1
778 03:40:11.655769 USB3 port 4: enabled 0
779 03:40:11.658901 PCI: 00:14.1: enabled 0
780 03:40:11.658985 PCI: 00:14.3: enabled 1
781 03:40:11.662909 PCI: 00:14.5: enabled 0
782 03:40:11.665714 PCI: 00:15.0: enabled 1
783 03:40:11.669144 I2C: 00:15: enabled 1
784 03:40:11.672462 PCI: 00:15.1: enabled 1
785 03:40:11.672546 I2C: 00:5d: enabled 1
786 03:40:11.675462 GENERIC: 0.0: enabled 1
787 03:40:11.679562 PCI: 00:15.2: enabled 0
788 03:40:11.682290 PCI: 00:15.3: enabled 0
789 03:40:11.682377 PCI: 00:16.0: enabled 1
790 03:40:11.685506 PCI: 00:16.1: enabled 0
791 03:40:11.689157 PCI: 00:16.2: enabled 0
792 03:40:11.692004 PCI: 00:16.3: enabled 0
793 03:40:11.695662 PCI: 00:16.4: enabled 0
794 03:40:11.695747 PCI: 00:16.5: enabled 0
795 03:40:11.699454 PCI: 00:17.0: enabled 1
796 03:40:11.702508 PCI: 00:19.0: enabled 1
797 03:40:11.705306 I2C: 00:1a: enabled 1
798 03:40:11.708609 I2C: 00:38: enabled 1
799 03:40:11.708694 I2C: 00:39: enabled 1
800 03:40:11.712272 I2C: 00:3a: enabled 1
801 03:40:11.715375 I2C: 00:3b: enabled 1
802 03:40:11.718555 PCI: 00:19.1: enabled 0
803 03:40:11.718640 PCI: 00:19.2: enabled 0
804 03:40:11.721947 PCI: 00:1a.0: enabled 0
805 03:40:11.725457 PCI: 00:1c.0: enabled 0
806 03:40:11.728784 PCI: 00:1c.1: enabled 0
807 03:40:11.731779 PCI: 00:1c.2: enabled 0
808 03:40:11.731891 PCI: 00:1c.3: enabled 0
809 03:40:11.735173 PCI: 00:1c.4: enabled 0
810 03:40:11.738705 PCI: 00:1c.5: enabled 0
811 03:40:11.741853 PCI: 00:1c.6: enabled 0
812 03:40:11.745250 PCI: 00:1c.7: enabled 0
813 03:40:11.745368 PCI: 00:1d.0: enabled 1
814 03:40:11.748513 PCI: 00:1d.1: enabled 0
815 03:40:11.752039 PCI: 00:1d.2: enabled 0
816 03:40:11.755573 PCI: 00:1d.3: enabled 0
817 03:40:11.758672 PCI: 00:1d.4: enabled 0
818 03:40:11.758790 PCI: 00:1d.5: enabled 1
819 03:40:11.761862 PCI: 00:00.0: enabled 1
820 03:40:11.765394 PCI: 00:1e.0: enabled 1
821 03:40:11.768824 PCI: 00:1e.1: enabled 0
822 03:40:11.771922 PCI: 00:1e.2: enabled 1
823 03:40:11.772033 SPI: 00: enabled 1
824 03:40:11.775042 PCI: 00:1e.3: enabled 1
825 03:40:11.778419 SPI: 01: enabled 1
826 03:40:11.778530 PCI: 00:1f.0: enabled 1
827 03:40:11.781520 PNP: 0c09.0: enabled 1
828 03:40:11.785026 PCI: 00:1f.1: enabled 1
829 03:40:11.788474 PCI: 00:1f.2: enabled 1
830 03:40:11.791704 PCI: 00:1f.3: enabled 1
831 03:40:11.791788 PCI: 00:1f.4: enabled 1
832 03:40:11.795023 PCI: 00:1f.5: enabled 1
833 03:40:11.799087 PCI: 00:1f.6: enabled 0
834 03:40:11.801695 Root Device scanning...
835 03:40:11.804968 scan_static_bus for Root Device
836 03:40:11.805053 CPU_CLUSTER: 0 enabled
837 03:40:11.808435 DOMAIN: 0000 enabled
838 03:40:11.811682 DOMAIN: 0000 scanning...
839 03:40:11.815243 PCI: pci_scan_bus for bus 00
840 03:40:11.818363 PCI: 00:00.0 [8086/0000] ops
841 03:40:11.821697 PCI: 00:00.0 [8086/9b61] enabled
842 03:40:11.825012 PCI: 00:02.0 [8086/0000] bus ops
843 03:40:11.828037 PCI: 00:02.0 [8086/9b41] enabled
844 03:40:11.832096 PCI: 00:04.0 [8086/1903] disabled
845 03:40:11.834697 PCI: 00:08.0 [8086/1911] enabled
846 03:40:11.838115 PCI: 00:12.0 [8086/02f9] enabled
847 03:40:11.841407 PCI: 00:14.0 [8086/0000] bus ops
848 03:40:11.844814 PCI: 00:14.0 [8086/02ed] enabled
849 03:40:11.847790 PCI: 00:14.2 [8086/02ef] enabled
850 03:40:11.851184 PCI: 00:14.3 [8086/02f0] enabled
851 03:40:11.854610 PCI: 00:15.0 [8086/0000] bus ops
852 03:40:11.858131 PCI: 00:15.0 [8086/02e8] enabled
853 03:40:11.861277 PCI: 00:15.1 [8086/0000] bus ops
854 03:40:11.864738 PCI: 00:15.1 [8086/02e9] enabled
855 03:40:11.868286 PCI: 00:16.0 [8086/0000] ops
856 03:40:11.871605 PCI: 00:16.0 [8086/02e0] enabled
857 03:40:11.874564 PCI: 00:17.0 [8086/0000] ops
858 03:40:11.878323 PCI: 00:17.0 [8086/02d3] enabled
859 03:40:11.881538 PCI: 00:19.0 [8086/0000] bus ops
860 03:40:11.884585 PCI: 00:19.0 [8086/02c5] enabled
861 03:40:11.888009 PCI: 00:1d.0 [8086/0000] bus ops
862 03:40:11.891247 PCI: 00:1d.0 [8086/02b0] enabled
863 03:40:11.894550 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 03:40:11.897808 PCI: 00:1e.0 [8086/0000] ops
865 03:40:11.901455 PCI: 00:1e.0 [8086/02a8] enabled
866 03:40:11.905032 PCI: 00:1e.2 [8086/0000] bus ops
867 03:40:11.908521 PCI: 00:1e.2 [8086/02aa] enabled
868 03:40:11.910976 PCI: 00:1e.3 [8086/0000] bus ops
869 03:40:11.914495 PCI: 00:1e.3 [8086/02ab] enabled
870 03:40:11.918011 PCI: 00:1f.0 [8086/0000] bus ops
871 03:40:11.921585 PCI: 00:1f.0 [8086/0284] enabled
872 03:40:11.927684 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 03:40:11.934341 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 03:40:11.937870 PCI: 00:1f.3 [8086/0000] bus ops
875 03:40:11.941626 PCI: 00:1f.3 [8086/02c8] enabled
876 03:40:11.944428 PCI: 00:1f.4 [8086/0000] bus ops
877 03:40:11.947736 PCI: 00:1f.4 [8086/02a3] enabled
878 03:40:11.951096 PCI: 00:1f.5 [8086/0000] bus ops
879 03:40:11.954461 PCI: 00:1f.5 [8086/02a4] enabled
880 03:40:11.957827 PCI: Leftover static devices:
881 03:40:11.957912 PCI: 00:05.0
882 03:40:11.957980 PCI: 00:12.5
883 03:40:11.961206 PCI: 00:12.6
884 03:40:11.961290 PCI: 00:14.1
885 03:40:11.964091 PCI: 00:14.5
886 03:40:11.964175 PCI: 00:15.2
887 03:40:11.964242 PCI: 00:15.3
888 03:40:11.967493 PCI: 00:16.1
889 03:40:11.967577 PCI: 00:16.2
890 03:40:11.970908 PCI: 00:16.3
891 03:40:11.970992 PCI: 00:16.4
892 03:40:11.971060 PCI: 00:16.5
893 03:40:11.974451 PCI: 00:19.1
894 03:40:11.974540 PCI: 00:19.2
895 03:40:11.977429 PCI: 00:1a.0
896 03:40:11.977543 PCI: 00:1c.0
897 03:40:11.981063 PCI: 00:1c.1
898 03:40:11.981148 PCI: 00:1c.2
899 03:40:11.981214 PCI: 00:1c.3
900 03:40:11.984047 PCI: 00:1c.4
901 03:40:11.984167 PCI: 00:1c.5
902 03:40:11.987666 PCI: 00:1c.6
903 03:40:11.987751 PCI: 00:1c.7
904 03:40:11.987817 PCI: 00:1d.1
905 03:40:11.991366 PCI: 00:1d.2
906 03:40:11.991454 PCI: 00:1d.3
907 03:40:11.994262 PCI: 00:1d.4
908 03:40:11.994346 PCI: 00:1d.5
909 03:40:11.994413 PCI: 00:1e.1
910 03:40:11.997613 PCI: 00:1f.1
911 03:40:11.997697 PCI: 00:1f.2
912 03:40:12.000940 PCI: 00:1f.6
913 03:40:12.003909 PCI: Check your devicetree.cb.
914 03:40:12.004025 PCI: 00:02.0 scanning...
915 03:40:12.010571 scan_generic_bus for PCI: 00:02.0
916 03:40:12.014466 scan_generic_bus for PCI: 00:02.0 done
917 03:40:12.017529 scan_bus: scanning of bus PCI: 00:02.0 took 10199 usecs
918 03:40:12.020705 PCI: 00:14.0 scanning...
919 03:40:12.024301 scan_static_bus for PCI: 00:14.0
920 03:40:12.027571 USB0 port 0 enabled
921 03:40:12.030877 USB0 port 0 scanning...
922 03:40:12.034010 scan_static_bus for USB0 port 0
923 03:40:12.034159 USB2 port 0 enabled
924 03:40:12.037260 USB2 port 1 enabled
925 03:40:12.040838 USB2 port 2 disabled
926 03:40:12.040923 USB2 port 3 disabled
927 03:40:12.043651 USB2 port 5 disabled
928 03:40:12.043766 USB2 port 6 enabled
929 03:40:12.047312 USB2 port 9 enabled
930 03:40:12.050643 USB3 port 0 enabled
931 03:40:12.050726 USB3 port 1 enabled
932 03:40:12.053824 USB3 port 2 enabled
933 03:40:12.056781 USB3 port 3 enabled
934 03:40:12.056865 USB3 port 4 disabled
935 03:40:12.060339 USB2 port 0 scanning...
936 03:40:12.063715 scan_static_bus for USB2 port 0
937 03:40:12.067194 scan_static_bus for USB2 port 0 done
938 03:40:12.073623 scan_bus: scanning of bus USB2 port 0 took 9707 usecs
939 03:40:12.073713 USB2 port 1 scanning...
940 03:40:12.076827 scan_static_bus for USB2 port 1
941 03:40:12.083485 scan_static_bus for USB2 port 1 done
942 03:40:12.087231 scan_bus: scanning of bus USB2 port 1 took 9710 usecs
943 03:40:12.090353 USB2 port 6 scanning...
944 03:40:12.093730 scan_static_bus for USB2 port 6
945 03:40:12.096951 scan_static_bus for USB2 port 6 done
946 03:40:12.103424 scan_bus: scanning of bus USB2 port 6 took 9702 usecs
947 03:40:12.103511 USB2 port 9 scanning...
948 03:40:12.107032 scan_static_bus for USB2 port 9
949 03:40:12.113679 scan_static_bus for USB2 port 9 done
950 03:40:12.117301 scan_bus: scanning of bus USB2 port 9 took 9699 usecs
951 03:40:12.120221 USB3 port 0 scanning...
952 03:40:12.124103 scan_static_bus for USB3 port 0
953 03:40:12.127251 scan_static_bus for USB3 port 0 done
954 03:40:12.133604 scan_bus: scanning of bus USB3 port 0 took 9702 usecs
955 03:40:12.133739 USB3 port 1 scanning...
956 03:40:12.137550 scan_static_bus for USB3 port 1
957 03:40:12.143967 scan_static_bus for USB3 port 1 done
958 03:40:12.146997 scan_bus: scanning of bus USB3 port 1 took 9709 usecs
959 03:40:12.150448 USB3 port 2 scanning...
960 03:40:12.154031 scan_static_bus for USB3 port 2
961 03:40:12.156797 scan_static_bus for USB3 port 2 done
962 03:40:12.163502 scan_bus: scanning of bus USB3 port 2 took 9710 usecs
963 03:40:12.163586 USB3 port 3 scanning...
964 03:40:12.167228 scan_static_bus for USB3 port 3
965 03:40:12.173645 scan_static_bus for USB3 port 3 done
966 03:40:12.176813 scan_bus: scanning of bus USB3 port 3 took 9710 usecs
967 03:40:12.180326 scan_static_bus for USB0 port 0 done
968 03:40:12.187393 scan_bus: scanning of bus USB0 port 0 took 155414 usecs
969 03:40:12.191170 scan_static_bus for PCI: 00:14.0 done
970 03:40:12.196950 scan_bus: scanning of bus PCI: 00:14.0 took 173037 usecs
971 03:40:12.200322 PCI: 00:15.0 scanning...
972 03:40:12.203881 scan_generic_bus for PCI: 00:15.0
973 03:40:12.207075 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 03:40:12.210266 scan_generic_bus for PCI: 00:15.0 done
975 03:40:12.217158 scan_bus: scanning of bus PCI: 00:15.0 took 14309 usecs
976 03:40:12.220084 PCI: 00:15.1 scanning...
977 03:40:12.223711 scan_generic_bus for PCI: 00:15.1
978 03:40:12.226716 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 03:40:12.230059 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 03:40:12.233022 scan_generic_bus for PCI: 00:15.1 done
981 03:40:12.240175 scan_bus: scanning of bus PCI: 00:15.1 took 18615 usecs
982 03:40:12.243218 PCI: 00:19.0 scanning...
983 03:40:12.246593 scan_generic_bus for PCI: 00:19.0
984 03:40:12.250215 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 03:40:12.253287 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 03:40:12.259697 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 03:40:12.263297 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 03:40:12.266985 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 03:40:12.269706 scan_generic_bus for PCI: 00:19.0 done
990 03:40:12.276379 scan_bus: scanning of bus PCI: 00:19.0 took 30743 usecs
991 03:40:12.279745 PCI: 00:1d.0 scanning...
992 03:40:12.283321 do_pci_scan_bridge for PCI: 00:1d.0
993 03:40:12.286782 PCI: pci_scan_bus for bus 01
994 03:40:12.289466 PCI: 01:00.0 [1c5c/1327] enabled
995 03:40:12.293271 Enabling Common Clock Configuration
996 03:40:12.296106 L1 Sub-State supported from root port 29
997 03:40:12.299447 L1 Sub-State Support = 0xf
998 03:40:12.302584 CommonModeRestoreTime = 0x28
999 03:40:12.306079 Power On Value = 0x16, Power On Scale = 0x0
1000 03:40:12.309282 ASPM: Enabled L1
1001 03:40:12.312734 scan_bus: scanning of bus PCI: 00:1d.0 took 32788 usecs
1002 03:40:12.316369 PCI: 00:1e.2 scanning...
1003 03:40:12.319358 scan_generic_bus for PCI: 00:1e.2
1004 03:40:12.326238 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 03:40:12.329722 scan_generic_bus for PCI: 00:1e.2 done
1006 03:40:12.332629 scan_bus: scanning of bus PCI: 00:1e.2 took 14003 usecs
1007 03:40:12.335938 PCI: 00:1e.3 scanning...
1008 03:40:12.339866 scan_generic_bus for PCI: 00:1e.3
1009 03:40:12.342954 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 03:40:12.349409 scan_generic_bus for PCI: 00:1e.3 done
1011 03:40:12.352615 scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs
1012 03:40:12.356081 PCI: 00:1f.0 scanning...
1013 03:40:12.359253 scan_static_bus for PCI: 00:1f.0
1014 03:40:12.362747 PNP: 0c09.0 enabled
1015 03:40:12.366384 scan_static_bus for PCI: 00:1f.0 done
1016 03:40:12.369347 scan_bus: scanning of bus PCI: 00:1f.0 took 12050 usecs
1017 03:40:12.372807 PCI: 00:1f.3 scanning...
1018 03:40:12.379202 scan_bus: scanning of bus PCI: 00:1f.3 took 2852 usecs
1019 03:40:12.382251 PCI: 00:1f.4 scanning...
1020 03:40:12.386029 scan_generic_bus for PCI: 00:1f.4
1021 03:40:12.389074 scan_generic_bus for PCI: 00:1f.4 done
1022 03:40:12.395827 scan_bus: scanning of bus PCI: 00:1f.4 took 10190 usecs
1023 03:40:12.398955 PCI: 00:1f.5 scanning...
1024 03:40:12.402144 scan_generic_bus for PCI: 00:1f.5
1025 03:40:12.405306 scan_generic_bus for PCI: 00:1f.5 done
1026 03:40:12.412178 scan_bus: scanning of bus PCI: 00:1f.5 took 10189 usecs
1027 03:40:12.415630 scan_bus: scanning of bus DOMAIN: 0000 took 605164 usecs
1028 03:40:12.418632 scan_static_bus for Root Device done
1029 03:40:12.425287 scan_bus: scanning of bus Root Device took 625039 usecs
1030 03:40:12.425378 done
1031 03:40:12.428825 Chrome EC: UHEPI supported
1032 03:40:12.435130 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 03:40:12.441628 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 03:40:12.448558 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 03:40:12.455724 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 03:40:12.458551 SPI flash protection: WPSW=0 SRP0=0
1037 03:40:12.461819 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 03:40:12.468350 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1039 03:40:12.471657 found VGA at PCI: 00:02.0
1040 03:40:12.475221 Setting up VGA for PCI: 00:02.0
1041 03:40:12.478438 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 03:40:12.485080 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 03:40:12.488074 Allocating resources...
1044 03:40:12.488176 Reading resources...
1045 03:40:12.494743 Root Device read_resources bus 0 link: 0
1046 03:40:12.498537 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 03:40:12.501269 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 03:40:12.508651 DOMAIN: 0000 read_resources bus 0 link: 0
1049 03:40:12.514826 PCI: 00:14.0 read_resources bus 0 link: 0
1050 03:40:12.518025 USB0 port 0 read_resources bus 0 link: 0
1051 03:40:12.525981 USB0 port 0 read_resources bus 0 link: 0 done
1052 03:40:12.528768 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 03:40:12.536281 PCI: 00:15.0 read_resources bus 1 link: 0
1054 03:40:12.539693 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 03:40:12.546541 PCI: 00:15.1 read_resources bus 2 link: 0
1056 03:40:12.549912 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 03:40:12.557295 PCI: 00:19.0 read_resources bus 3 link: 0
1058 03:40:12.563701 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 03:40:12.567088 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 03:40:12.573462 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 03:40:12.577159 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 03:40:12.583422 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 03:40:12.586779 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 03:40:12.593994 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 03:40:12.596823 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 03:40:12.603533 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 03:40:12.610019 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 03:40:12.613287 Root Device read_resources bus 0 link: 0 done
1069 03:40:12.616880 Done reading resources.
1070 03:40:12.619964 Show resources in subtree (Root Device)...After reading.
1071 03:40:12.626505 Root Device child on link 0 CPU_CLUSTER: 0
1072 03:40:12.630197 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 03:40:12.630283 APIC: 00
1074 03:40:12.633554 APIC: 02
1075 03:40:12.633637 APIC: 01
1076 03:40:12.637400 APIC: 03
1077 03:40:12.637482 APIC: 06
1078 03:40:12.637547 APIC: 05
1079 03:40:12.640346 APIC: 04
1080 03:40:12.640464 APIC: 07
1081 03:40:12.643404 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 03:40:12.653211 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 03:40:12.703159 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 03:40:12.703295 PCI: 00:00.0
1085 03:40:12.703378 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 03:40:12.703643 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 03:40:12.704189 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 03:40:12.704527 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 03:40:12.727297 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 03:40:12.727598 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 03:40:12.733764 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 03:40:12.740533 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 03:40:12.750011 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 03:40:12.760295 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 03:40:12.766805 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 03:40:12.776500 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 03:40:12.786587 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 03:40:12.796262 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 03:40:12.806433 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 03:40:12.816466 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 03:40:12.816554 PCI: 00:02.0
1102 03:40:12.826278 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 03:40:12.836350 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 03:40:12.846383 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 03:40:12.846476 PCI: 00:04.0
1106 03:40:12.849306 PCI: 00:08.0
1107 03:40:12.859557 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 03:40:12.859643 PCI: 00:12.0
1109 03:40:12.869274 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 03:40:12.876240 PCI: 00:14.0 child on link 0 USB0 port 0
1111 03:40:12.885877 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 03:40:12.889586 USB0 port 0 child on link 0 USB2 port 0
1113 03:40:12.892797 USB2 port 0
1114 03:40:12.892878 USB2 port 1
1115 03:40:12.896230 USB2 port 2
1116 03:40:12.896311 USB2 port 3
1117 03:40:12.899301 USB2 port 5
1118 03:40:12.899381 USB2 port 6
1119 03:40:12.902502 USB2 port 9
1120 03:40:12.902583 USB3 port 0
1121 03:40:12.905866 USB3 port 1
1122 03:40:12.905946 USB3 port 2
1123 03:40:12.909515 USB3 port 3
1124 03:40:12.909596 USB3 port 4
1125 03:40:12.912499 PCI: 00:14.2
1126 03:40:12.922563 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 03:40:12.932297 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 03:40:12.932385 PCI: 00:14.3
1129 03:40:12.942672 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 03:40:12.949091 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 03:40:12.958994 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 03:40:12.959079 I2C: 01:15
1133 03:40:12.962118 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 03:40:12.972008 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 03:40:12.975385 I2C: 02:5d
1136 03:40:12.975467 GENERIC: 0.0
1137 03:40:12.979218 PCI: 00:16.0
1138 03:40:12.988798 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 03:40:12.988882 PCI: 00:17.0
1140 03:40:12.998523 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 03:40:13.008692 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 03:40:13.015616 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 03:40:13.025104 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 03:40:13.031989 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 03:40:13.041788 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 03:40:13.045174 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 03:40:13.055302 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 03:40:13.058505 I2C: 03:1a
1149 03:40:13.058587 I2C: 03:38
1150 03:40:13.062018 I2C: 03:39
1151 03:40:13.062099 I2C: 03:3a
1152 03:40:13.065044 I2C: 03:3b
1153 03:40:13.068248 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 03:40:13.078364 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 03:40:13.088191 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 03:40:13.095140 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 03:40:13.098138 PCI: 01:00.0
1158 03:40:13.107935 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 03:40:13.108047 PCI: 00:1e.0
1160 03:40:13.121512 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 03:40:13.131426 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 03:40:13.134861 PCI: 00:1e.2 child on link 0 SPI: 00
1163 03:40:13.144369 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 03:40:13.144456 SPI: 00
1165 03:40:13.151260 PCI: 00:1e.3 child on link 0 SPI: 01
1166 03:40:13.160946 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 03:40:13.161033 SPI: 01
1168 03:40:13.164094 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 03:40:13.174035 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 03:40:13.184064 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 03:40:13.184152 PNP: 0c09.0
1172 03:40:13.193975 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 03:40:13.194058 PCI: 00:1f.3
1174 03:40:13.203907 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 03:40:13.213912 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 03:40:13.217100 PCI: 00:1f.4
1177 03:40:13.227537 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 03:40:13.236845 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 03:40:13.236939 PCI: 00:1f.5
1180 03:40:13.246958 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 03:40:13.253863 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 03:40:13.259956 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 03:40:13.266869 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 03:40:13.270577 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 03:40:13.273977 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 03:40:13.276640 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 03:40:13.280385 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 03:40:13.286707 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 03:40:13.293584 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 03:40:13.299801 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 03:40:13.309845 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 03:40:13.316393 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 03:40:13.319681 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 03:40:13.330005 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 03:40:13.332958 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 03:40:13.336290 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 03:40:13.343344 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 03:40:13.346257 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 03:40:13.353090 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 03:40:13.356370 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 03:40:13.362864 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 03:40:13.366306 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 03:40:13.372752 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 03:40:13.376341 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 03:40:13.382682 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 03:40:13.385986 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 03:40:13.393077 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 03:40:13.395904 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 03:40:13.402724 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 03:40:13.405976 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 03:40:13.409209 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 03:40:13.415963 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 03:40:13.419262 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 03:40:13.426043 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 03:40:13.429429 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 03:40:13.435849 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 03:40:13.439353 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 03:40:13.448860 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 03:40:13.452399 avoid_fixed_resources: DOMAIN: 0000
1220 03:40:13.459190 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 03:40:13.465568 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 03:40:13.472248 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 03:40:13.478922 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 03:40:13.488687 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 03:40:13.495705 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 03:40:13.501937 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 03:40:13.508865 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 03:40:13.518750 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 03:40:13.524863 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 03:40:13.531985 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 03:40:13.538466 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 03:40:13.541577 Setting resources...
1233 03:40:13.548414 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 03:40:13.551648 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 03:40:13.554757 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 03:40:13.561827 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 03:40:13.564984 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 03:40:13.571457 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 03:40:13.578434 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 03:40:13.584756 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 03:40:13.591040 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 03:40:13.594887 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 03:40:13.601448 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 03:40:13.604629 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 03:40:13.611347 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 03:40:13.614607 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 03:40:13.621446 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 03:40:13.624550 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 03:40:13.631345 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 03:40:13.634326 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 03:40:13.641173 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 03:40:13.644513 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 03:40:13.647928 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 03:40:13.654457 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 03:40:13.657628 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 03:40:13.664534 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 03:40:13.667741 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 03:40:13.674126 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 03:40:13.677577 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 03:40:13.684067 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 03:40:13.687453 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 03:40:13.694049 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 03:40:13.697809 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 03:40:13.704682 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 03:40:13.711034 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 03:40:13.717756 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 03:40:13.723976 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 03:40:13.734079 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 03:40:13.737368 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 03:40:13.743750 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 03:40:13.750593 Root Device assign_resources, bus 0 link: 0
1272 03:40:13.753679 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 03:40:13.763950 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 03:40:13.770278 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 03:40:13.776791 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 03:40:13.787111 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 03:40:13.793686 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 03:40:13.803718 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 03:40:13.806980 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 03:40:13.813416 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 03:40:13.820357 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 03:40:13.830443 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 03:40:13.836915 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 03:40:13.847054 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 03:40:13.850654 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 03:40:13.853344 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 03:40:13.863882 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 03:40:13.867231 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 03:40:13.873756 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 03:40:13.880535 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 03:40:13.890530 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 03:40:13.896674 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 03:40:13.902979 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 03:40:13.913130 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 03:40:13.919962 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 03:40:13.926552 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 03:40:13.936376 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 03:40:13.939392 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 03:40:13.946054 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 03:40:13.952674 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 03:40:13.962736 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 03:40:13.969612 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 03:40:13.975861 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 03:40:13.982524 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 03:40:13.989215 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 03:40:13.995661 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 03:40:14.005551 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 03:40:14.009002 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 03:40:14.015349 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 03:40:14.022365 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 03:40:14.025112 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 03:40:14.031975 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 03:40:14.035676 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 03:40:14.042302 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 03:40:14.045292 LPC: Trying to open IO window from 800 size 1ff
1316 03:40:14.055688 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 03:40:14.062001 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 03:40:14.071849 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 03:40:14.078449 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 03:40:14.085290 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 03:40:14.088732 Root Device assign_resources, bus 0 link: 0
1322 03:40:14.091596 Done setting resources.
1323 03:40:14.098149 Show resources in subtree (Root Device)...After assigning values.
1324 03:40:14.101529 Root Device child on link 0 CPU_CLUSTER: 0
1325 03:40:14.104772 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 03:40:14.108169 APIC: 00
1327 03:40:14.108250 APIC: 02
1328 03:40:14.108314 APIC: 01
1329 03:40:14.111284 APIC: 03
1330 03:40:14.111364 APIC: 06
1331 03:40:14.114754 APIC: 05
1332 03:40:14.114835 APIC: 04
1333 03:40:14.114898 APIC: 07
1334 03:40:14.121297 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 03:40:14.131350 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 03:40:14.141509 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 03:40:14.141608 PCI: 00:00.0
1338 03:40:14.151254 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 03:40:14.160840 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 03:40:14.171089 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 03:40:14.180648 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 03:40:14.191035 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 03:40:14.201054 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 03:40:14.207310 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 03:40:14.217205 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 03:40:14.227200 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 03:40:14.237055 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 03:40:14.247034 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 03:40:14.253391 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 03:40:14.263673 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 03:40:14.273248 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 03:40:14.283293 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 03:40:14.293049 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 03:40:14.293137 PCI: 00:02.0
1355 03:40:14.306009 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 03:40:14.316637 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 03:40:14.326335 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 03:40:14.326424 PCI: 00:04.0
1359 03:40:14.329486 PCI: 00:08.0
1360 03:40:14.339212 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 03:40:14.339302 PCI: 00:12.0
1362 03:40:14.349034 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 03:40:14.356246 PCI: 00:14.0 child on link 0 USB0 port 0
1364 03:40:14.366004 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 03:40:14.369258 USB0 port 0 child on link 0 USB2 port 0
1366 03:40:14.372404 USB2 port 0
1367 03:40:14.372488 USB2 port 1
1368 03:40:14.376008 USB2 port 2
1369 03:40:14.376143 USB2 port 3
1370 03:40:14.379192 USB2 port 5
1371 03:40:14.379274 USB2 port 6
1372 03:40:14.382081 USB2 port 9
1373 03:40:14.382164 USB3 port 0
1374 03:40:14.385502 USB3 port 1
1375 03:40:14.385585 USB3 port 2
1376 03:40:14.388804 USB3 port 3
1377 03:40:14.392590 USB3 port 4
1378 03:40:14.392673 PCI: 00:14.2
1379 03:40:14.402050 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 03:40:14.412171 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 03:40:14.415315 PCI: 00:14.3
1382 03:40:14.425525 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 03:40:14.428381 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 03:40:14.438493 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 03:40:14.441798 I2C: 01:15
1386 03:40:14.445203 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 03:40:14.455076 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 03:40:14.458253 I2C: 02:5d
1389 03:40:14.458336 GENERIC: 0.0
1390 03:40:14.461704 PCI: 00:16.0
1391 03:40:14.471637 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 03:40:14.471725 PCI: 00:17.0
1393 03:40:14.481405 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 03:40:14.494803 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 03:40:14.500908 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 03:40:14.511086 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 03:40:14.521069 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 03:40:14.531009 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 03:40:14.534166 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 03:40:14.544088 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 03:40:14.547281 I2C: 03:1a
1402 03:40:14.547371 I2C: 03:38
1403 03:40:14.550614 I2C: 03:39
1404 03:40:14.550694 I2C: 03:3a
1405 03:40:14.553912 I2C: 03:3b
1406 03:40:14.557610 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 03:40:14.567359 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 03:40:14.576870 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 03:40:14.587360 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 03:40:14.590680 PCI: 01:00.0
1411 03:40:14.600037 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 03:40:14.600146 PCI: 00:1e.0
1413 03:40:14.614111 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 03:40:14.623222 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 03:40:14.627162 PCI: 00:1e.2 child on link 0 SPI: 00
1416 03:40:14.636569 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 03:40:14.636654 SPI: 00
1418 03:40:14.643441 PCI: 00:1e.3 child on link 0 SPI: 01
1419 03:40:14.653056 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 03:40:14.653141 SPI: 01
1421 03:40:14.656460 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 03:40:14.666367 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 03:40:14.676176 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 03:40:14.676260 PNP: 0c09.0
1425 03:40:14.685985 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 03:40:14.686069 PCI: 00:1f.3
1427 03:40:14.696642 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 03:40:14.709112 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 03:40:14.709196 PCI: 00:1f.4
1430 03:40:14.719226 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 03:40:14.729452 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 03:40:14.729536 PCI: 00:1f.5
1433 03:40:14.742478 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 03:40:14.742566 Done allocating resources.
1435 03:40:14.748878 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 03:40:14.752739 Enabling resources...
1437 03:40:14.756004 PCI: 00:00.0 subsystem <- 8086/9b61
1438 03:40:14.758721 PCI: 00:00.0 cmd <- 06
1439 03:40:14.761986 PCI: 00:02.0 subsystem <- 8086/9b41
1440 03:40:14.765546 PCI: 00:02.0 cmd <- 03
1441 03:40:14.769019 PCI: 00:08.0 cmd <- 06
1442 03:40:14.772170 PCI: 00:12.0 subsystem <- 8086/02f9
1443 03:40:14.775665 PCI: 00:12.0 cmd <- 02
1444 03:40:14.778731 PCI: 00:14.0 subsystem <- 8086/02ed
1445 03:40:14.778817 PCI: 00:14.0 cmd <- 02
1446 03:40:14.782381 PCI: 00:14.2 cmd <- 02
1447 03:40:14.785331 PCI: 00:14.3 subsystem <- 8086/02f0
1448 03:40:14.788729 PCI: 00:14.3 cmd <- 02
1449 03:40:14.792116 PCI: 00:15.0 subsystem <- 8086/02e8
1450 03:40:14.795677 PCI: 00:15.0 cmd <- 02
1451 03:40:14.798697 PCI: 00:15.1 subsystem <- 8086/02e9
1452 03:40:14.802281 PCI: 00:15.1 cmd <- 02
1453 03:40:14.805268 PCI: 00:16.0 subsystem <- 8086/02e0
1454 03:40:14.808596 PCI: 00:16.0 cmd <- 02
1455 03:40:14.811758 PCI: 00:17.0 subsystem <- 8086/02d3
1456 03:40:14.815262 PCI: 00:17.0 cmd <- 03
1457 03:40:14.818544 PCI: 00:19.0 subsystem <- 8086/02c5
1458 03:40:14.822082 PCI: 00:19.0 cmd <- 02
1459 03:40:14.825338 PCI: 00:1d.0 bridge ctrl <- 0013
1460 03:40:14.828250 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 03:40:14.828331 PCI: 00:1d.0 cmd <- 06
1462 03:40:14.835365 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 03:40:14.835447 PCI: 00:1e.0 cmd <- 06
1464 03:40:14.838453 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 03:40:14.841836 PCI: 00:1e.2 cmd <- 06
1466 03:40:14.845010 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 03:40:14.848204 PCI: 00:1e.3 cmd <- 02
1468 03:40:14.851921 PCI: 00:1f.0 subsystem <- 8086/0284
1469 03:40:14.855174 PCI: 00:1f.0 cmd <- 407
1470 03:40:14.858246 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 03:40:14.861728 PCI: 00:1f.3 cmd <- 02
1472 03:40:14.864905 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 03:40:14.868256 PCI: 00:1f.4 cmd <- 03
1474 03:40:14.871425 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 03:40:14.874548 PCI: 00:1f.5 cmd <- 406
1476 03:40:14.883054 PCI: 01:00.0 cmd <- 02
1477 03:40:14.888103 done.
1478 03:40:14.900599 ME: Version: 14.0.39.1367
1479 03:40:14.907007 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1480 03:40:14.910550 Initializing devices...
1481 03:40:14.910631 Root Device init ...
1482 03:40:14.917107 Chrome EC: Set SMI mask to 0x0000000000000000
1483 03:40:14.920229 Chrome EC: clear events_b mask to 0x0000000000000000
1484 03:40:14.927196 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 03:40:14.933751 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 03:40:14.940181 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 03:40:14.943534 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 03:40:14.946985 Root Device init finished in 35157 usecs
1489 03:40:14.950791 CPU_CLUSTER: 0 init ...
1490 03:40:14.957354 CPU_CLUSTER: 0 init finished in 2447 usecs
1491 03:40:14.961095 PCI: 00:00.0 init ...
1492 03:40:14.964313 CPU TDP: 15 Watts
1493 03:40:14.967840 CPU PL2 = 64 Watts
1494 03:40:14.971432 PCI: 00:00.0 init finished in 7076 usecs
1495 03:40:14.974501 PCI: 00:02.0 init ...
1496 03:40:14.977792 PCI: 00:02.0 init finished in 2253 usecs
1497 03:40:14.981277 PCI: 00:08.0 init ...
1498 03:40:14.984697 PCI: 00:08.0 init finished in 2252 usecs
1499 03:40:14.987611 PCI: 00:12.0 init ...
1500 03:40:14.991370 PCI: 00:12.0 init finished in 2252 usecs
1501 03:40:14.994488 PCI: 00:14.0 init ...
1502 03:40:14.997590 PCI: 00:14.0 init finished in 2252 usecs
1503 03:40:15.000833 PCI: 00:14.2 init ...
1504 03:40:15.004383 PCI: 00:14.2 init finished in 2251 usecs
1505 03:40:15.007446 PCI: 00:14.3 init ...
1506 03:40:15.011101 PCI: 00:14.3 init finished in 2269 usecs
1507 03:40:15.014247 PCI: 00:15.0 init ...
1508 03:40:15.017725 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 03:40:15.020897 PCI: 00:15.0 init finished in 5974 usecs
1510 03:40:15.023992 PCI: 00:15.1 init ...
1511 03:40:15.027576 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 03:40:15.034134 PCI: 00:15.1 init finished in 5974 usecs
1513 03:40:15.034220 PCI: 00:16.0 init ...
1514 03:40:15.040750 PCI: 00:16.0 init finished in 2252 usecs
1515 03:40:15.043683 PCI: 00:19.0 init ...
1516 03:40:15.047345 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 03:40:15.050529 PCI: 00:19.0 init finished in 5974 usecs
1518 03:40:15.053659 PCI: 00:1d.0 init ...
1519 03:40:15.056983 Initializing PCH PCIe bridge.
1520 03:40:15.060748 PCI: 00:1d.0 init finished in 5283 usecs
1521 03:40:15.063753 PCI: 00:1f.0 init ...
1522 03:40:15.066952 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 03:40:15.073483 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 03:40:15.073568 IOAPIC: ID = 0x02
1525 03:40:15.076827 IOAPIC: Dumping registers
1526 03:40:15.080085 reg 0x0000: 0x02000000
1527 03:40:15.083413 reg 0x0001: 0x00770020
1528 03:40:15.083507 reg 0x0002: 0x00000000
1529 03:40:15.090273 PCI: 00:1f.0 init finished in 23531 usecs
1530 03:40:15.093485 PCI: 00:1f.4 init ...
1531 03:40:15.096852 PCI: 00:1f.4 init finished in 2261 usecs
1532 03:40:15.107817 PCI: 01:00.0 init ...
1533 03:40:15.110554 PCI: 01:00.0 init finished in 2251 usecs
1534 03:40:15.114718 PNP: 0c09.0 init ...
1535 03:40:15.118312 Google Chrome EC uptime: 11.108 seconds
1536 03:40:15.124488 Google Chrome AP resets since EC boot: 0
1537 03:40:15.128017 Google Chrome most recent AP reset causes:
1538 03:40:15.134938 Google Chrome EC reset flags at last EC boot: reset-pin
1539 03:40:15.137816 PNP: 0c09.0 init finished in 20623 usecs
1540 03:40:15.141137 Devices initialized
1541 03:40:15.144908 Show all devs... After init.
1542 03:40:15.144994 Root Device: enabled 1
1543 03:40:15.148118 CPU_CLUSTER: 0: enabled 1
1544 03:40:15.151215 DOMAIN: 0000: enabled 1
1545 03:40:15.151301 APIC: 00: enabled 1
1546 03:40:15.154626 PCI: 00:00.0: enabled 1
1547 03:40:15.158289 PCI: 00:02.0: enabled 1
1548 03:40:15.161287 PCI: 00:04.0: enabled 0
1549 03:40:15.161372 PCI: 00:05.0: enabled 0
1550 03:40:15.164844 PCI: 00:12.0: enabled 1
1551 03:40:15.168184 PCI: 00:12.5: enabled 0
1552 03:40:15.168268 PCI: 00:12.6: enabled 0
1553 03:40:15.171300 PCI: 00:14.0: enabled 1
1554 03:40:15.174545 PCI: 00:14.1: enabled 0
1555 03:40:15.177740 PCI: 00:14.3: enabled 1
1556 03:40:15.177823 PCI: 00:14.5: enabled 0
1557 03:40:15.180881 PCI: 00:15.0: enabled 1
1558 03:40:15.184669 PCI: 00:15.1: enabled 1
1559 03:40:15.187816 PCI: 00:15.2: enabled 0
1560 03:40:15.187900 PCI: 00:15.3: enabled 0
1561 03:40:15.191200 PCI: 00:16.0: enabled 1
1562 03:40:15.194581 PCI: 00:16.1: enabled 0
1563 03:40:15.197629 PCI: 00:16.2: enabled 0
1564 03:40:15.197713 PCI: 00:16.3: enabled 0
1565 03:40:15.200848 PCI: 00:16.4: enabled 0
1566 03:40:15.203919 PCI: 00:16.5: enabled 0
1567 03:40:15.207249 PCI: 00:17.0: enabled 1
1568 03:40:15.207332 PCI: 00:19.0: enabled 1
1569 03:40:15.210768 PCI: 00:19.1: enabled 0
1570 03:40:15.213677 PCI: 00:19.2: enabled 0
1571 03:40:15.217117 PCI: 00:1a.0: enabled 0
1572 03:40:15.217202 PCI: 00:1c.0: enabled 0
1573 03:40:15.220289 PCI: 00:1c.1: enabled 0
1574 03:40:15.223964 PCI: 00:1c.2: enabled 0
1575 03:40:15.224047 PCI: 00:1c.3: enabled 0
1576 03:40:15.227081 PCI: 00:1c.4: enabled 0
1577 03:40:15.230642 PCI: 00:1c.5: enabled 0
1578 03:40:15.233908 PCI: 00:1c.6: enabled 0
1579 03:40:15.233993 PCI: 00:1c.7: enabled 0
1580 03:40:15.236942 PCI: 00:1d.0: enabled 1
1581 03:40:15.240558 PCI: 00:1d.1: enabled 0
1582 03:40:15.243771 PCI: 00:1d.2: enabled 0
1583 03:40:15.243856 PCI: 00:1d.3: enabled 0
1584 03:40:15.246975 PCI: 00:1d.4: enabled 0
1585 03:40:15.250331 PCI: 00:1d.5: enabled 0
1586 03:40:15.253691 PCI: 00:1e.0: enabled 1
1587 03:40:15.253775 PCI: 00:1e.1: enabled 0
1588 03:40:15.257109 PCI: 00:1e.2: enabled 1
1589 03:40:15.260121 PCI: 00:1e.3: enabled 1
1590 03:40:15.260204 PCI: 00:1f.0: enabled 1
1591 03:40:15.264213 PCI: 00:1f.1: enabled 0
1592 03:40:15.266566 PCI: 00:1f.2: enabled 0
1593 03:40:15.270123 PCI: 00:1f.3: enabled 1
1594 03:40:15.270218 PCI: 00:1f.4: enabled 1
1595 03:40:15.273535 PCI: 00:1f.5: enabled 1
1596 03:40:15.277032 PCI: 00:1f.6: enabled 0
1597 03:40:15.280076 USB0 port 0: enabled 1
1598 03:40:15.280174 I2C: 01:15: enabled 1
1599 03:40:15.283099 I2C: 02:5d: enabled 1
1600 03:40:15.286893 GENERIC: 0.0: enabled 1
1601 03:40:15.286977 I2C: 03:1a: enabled 1
1602 03:40:15.290162 I2C: 03:38: enabled 1
1603 03:40:15.293537 I2C: 03:39: enabled 1
1604 03:40:15.293621 I2C: 03:3a: enabled 1
1605 03:40:15.296895 I2C: 03:3b: enabled 1
1606 03:40:15.299933 PCI: 00:00.0: enabled 1
1607 03:40:15.300017 SPI: 00: enabled 1
1608 03:40:15.303178 SPI: 01: enabled 1
1609 03:40:15.306426 PNP: 0c09.0: enabled 1
1610 03:40:15.306510 USB2 port 0: enabled 1
1611 03:40:15.309594 USB2 port 1: enabled 1
1612 03:40:15.313376 USB2 port 2: enabled 0
1613 03:40:15.316612 USB2 port 3: enabled 0
1614 03:40:15.316695 USB2 port 5: enabled 0
1615 03:40:15.319710 USB2 port 6: enabled 1
1616 03:40:15.322924 USB2 port 9: enabled 1
1617 03:40:15.323008 USB3 port 0: enabled 1
1618 03:40:15.326113 USB3 port 1: enabled 1
1619 03:40:15.329826 USB3 port 2: enabled 1
1620 03:40:15.329909 USB3 port 3: enabled 1
1621 03:40:15.332799 USB3 port 4: enabled 0
1622 03:40:15.336258 APIC: 02: enabled 1
1623 03:40:15.336342 APIC: 01: enabled 1
1624 03:40:15.339336 APIC: 03: enabled 1
1625 03:40:15.342968 APIC: 06: enabled 1
1626 03:40:15.343052 APIC: 05: enabled 1
1627 03:40:15.346227 APIC: 04: enabled 1
1628 03:40:15.346311 APIC: 07: enabled 1
1629 03:40:15.349589 PCI: 00:08.0: enabled 1
1630 03:40:15.352824 PCI: 00:14.2: enabled 1
1631 03:40:15.356266 PCI: 01:00.0: enabled 1
1632 03:40:15.359803 Disabling ACPI via APMC:
1633 03:40:15.359887 done.
1634 03:40:15.366797 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 03:40:15.369764 ELOG: NV offset 0xaf0000 size 0x4000
1636 03:40:15.376017 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 03:40:15.383058 ELOG: Event(17) added with size 13 at 2024-01-16 03:40:15 UTC
1638 03:40:15.389688 ELOG: Event(92) added with size 9 at 2024-01-16 03:40:15 UTC
1639 03:40:15.396304 ELOG: Event(93) added with size 9 at 2024-01-16 03:40:15 UTC
1640 03:40:15.402910 ELOG: Event(9A) added with size 9 at 2024-01-16 03:40:15 UTC
1641 03:40:15.409242 ELOG: Event(9E) added with size 10 at 2024-01-16 03:40:15 UTC
1642 03:40:15.416239 ELOG: Event(9F) added with size 14 at 2024-01-16 03:40:15 UTC
1643 03:40:15.419503 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1644 03:40:15.426916 ELOG: Event(A1) added with size 10 at 2024-01-16 03:40:15 UTC
1645 03:40:15.436705 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1646 03:40:15.443678 ELOG: Event(A0) added with size 9 at 2024-01-16 03:40:15 UTC
1647 03:40:15.446067 elog_add_boot_reason: Logged dev mode boot
1648 03:40:15.449550 Finalize devices...
1649 03:40:15.449635 PCI: 00:17.0 final
1650 03:40:15.453181 Devices finalized
1651 03:40:15.455973 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1652 03:40:15.463020 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1653 03:40:15.466291 ME: HFSTS1 : 0x90000245
1654 03:40:15.469366 ME: HFSTS2 : 0x3B850126
1655 03:40:15.475845 ME: HFSTS3 : 0x00000020
1656 03:40:15.479045 ME: HFSTS4 : 0x00004800
1657 03:40:15.482806 ME: HFSTS5 : 0x00000000
1658 03:40:15.485693 ME: HFSTS6 : 0x40400006
1659 03:40:15.488888 ME: Manufacturing Mode : NO
1660 03:40:15.492588 ME: FW Partition Table : OK
1661 03:40:15.496014 ME: Bringup Loader Failure : NO
1662 03:40:15.499011 ME: Firmware Init Complete : YES
1663 03:40:15.502193 ME: Boot Options Present : NO
1664 03:40:15.505625 ME: Update In Progress : NO
1665 03:40:15.508849 ME: D0i3 Support : YES
1666 03:40:15.512037 ME: Low Power State Enabled : NO
1667 03:40:15.515294 ME: CPU Replaced : NO
1668 03:40:15.518571 ME: CPU Replacement Valid : YES
1669 03:40:15.521837 ME: Current Working State : 5
1670 03:40:15.525275 ME: Current Operation State : 1
1671 03:40:15.528862 ME: Current Operation Mode : 0
1672 03:40:15.532037 ME: Error Code : 0
1673 03:40:15.535347 ME: CPU Debug Disabled : YES
1674 03:40:15.538881 ME: TXT Support : NO
1675 03:40:15.545159 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1676 03:40:15.551764 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1677 03:40:15.551853 CBFS @ c08000 size 3f8000
1678 03:40:15.558655 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1679 03:40:15.561836 CBFS: Locating 'fallback/dsdt.aml'
1680 03:40:15.568873 CBFS: Found @ offset 10bb80 size 3fa5
1681 03:40:15.571947 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1682 03:40:15.575113 CBFS @ c08000 size 3f8000
1683 03:40:15.581609 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1684 03:40:15.585203 CBFS: Locating 'fallback/slic'
1685 03:40:15.588515 CBFS: 'fallback/slic' not found.
1686 03:40:15.591942 ACPI: Writing ACPI tables at 99b3e000.
1687 03:40:15.594844 ACPI: * FACS
1688 03:40:15.594925 ACPI: * DSDT
1689 03:40:15.598129 Ramoops buffer: 0x100000@0x99a3d000.
1690 03:40:15.604671 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1691 03:40:15.607953 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1692 03:40:15.611687 Google Chrome EC: version:
1693 03:40:15.614759 ro: helios_v2.0.2659-56403530b
1694 03:40:15.618396 rw: helios_v2.0.2849-c41de27e7d
1695 03:40:15.621594 running image: 1
1696 03:40:15.624697 ACPI: * FADT
1697 03:40:15.624778 SCI is IRQ9
1698 03:40:15.627829 ACPI: added table 1/32, length now 40
1699 03:40:15.631690 ACPI: * SSDT
1700 03:40:15.635006 Found 1 CPU(s) with 8 core(s) each.
1701 03:40:15.637892 Error: Could not locate 'wifi_sar' in VPD.
1702 03:40:15.644776 Checking CBFS for default SAR values
1703 03:40:15.647559 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 03:40:15.651928 CBFS @ c08000 size 3f8000
1705 03:40:15.657581 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 03:40:15.660878 CBFS: Locating 'wifi_sar_defaults.hex'
1707 03:40:15.664191 CBFS: Found @ offset 5fac0 size 77
1708 03:40:15.667687 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1709 03:40:15.671148 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1710 03:40:15.677991 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1711 03:40:15.684013 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1712 03:40:15.687601 failed to find key in VPD: dsm_calib_r0_0
1713 03:40:15.697600 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1714 03:40:15.701104 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1715 03:40:15.704161 failed to find key in VPD: dsm_calib_r0_1
1716 03:40:15.713824 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1717 03:40:15.720347 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1718 03:40:15.723896 failed to find key in VPD: dsm_calib_r0_2
1719 03:40:15.733770 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1720 03:40:15.736978 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1721 03:40:15.743770 failed to find key in VPD: dsm_calib_r0_3
1722 03:40:15.750294 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1723 03:40:15.756733 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1724 03:40:15.760326 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1725 03:40:15.763351 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1726 03:40:15.767227 EC returned error result code 1
1727 03:40:15.771054 EC returned error result code 1
1728 03:40:15.774534 EC returned error result code 1
1729 03:40:15.781253 PS2K: Bad resp from EC. Vivaldi disabled!
1730 03:40:15.784579 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1731 03:40:15.791510 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1732 03:40:15.798145 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1733 03:40:15.801209 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1734 03:40:15.807703 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1735 03:40:15.814500 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1736 03:40:15.820894 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1737 03:40:15.824438 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1738 03:40:15.830854 ACPI: added table 2/32, length now 44
1739 03:40:15.830938 ACPI: * MCFG
1740 03:40:15.834078 ACPI: added table 3/32, length now 48
1741 03:40:15.837853 ACPI: * TPM2
1742 03:40:15.841008 TPM2 log created at 99a2d000
1743 03:40:15.844096 ACPI: added table 4/32, length now 52
1744 03:40:15.844192 ACPI: * MADT
1745 03:40:15.847326 SCI is IRQ9
1746 03:40:15.851011 ACPI: added table 5/32, length now 56
1747 03:40:15.851093 current = 99b43ac0
1748 03:40:15.853996 ACPI: * DMAR
1749 03:40:15.857311 ACPI: added table 6/32, length now 60
1750 03:40:15.861450 ACPI: * IGD OpRegion
1751 03:40:15.861533 GMA: Found VBT in CBFS
1752 03:40:15.863995 GMA: Found valid VBT in CBFS
1753 03:40:15.867117 ACPI: added table 7/32, length now 64
1754 03:40:15.871127 ACPI: * HPET
1755 03:40:15.874199 ACPI: added table 8/32, length now 68
1756 03:40:15.877496 ACPI: done.
1757 03:40:15.877578 ACPI tables: 31744 bytes.
1758 03:40:15.880951 smbios_write_tables: 99a2c000
1759 03:40:15.884112 EC returned error result code 3
1760 03:40:15.887618 Couldn't obtain OEM name from CBI
1761 03:40:15.891127 Create SMBIOS type 17
1762 03:40:15.894339 PCI: 00:00.0 (Intel Cannonlake)
1763 03:40:15.897280 PCI: 00:14.3 (Intel WiFi)
1764 03:40:15.900733 SMBIOS tables: 939 bytes.
1765 03:40:15.903992 Writing table forward entry at 0x00000500
1766 03:40:15.911033 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1767 03:40:15.914281 Writing coreboot table at 0x99b62000
1768 03:40:15.920909 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1769 03:40:15.923767 1. 0000000000001000-000000000009ffff: RAM
1770 03:40:15.927351 2. 00000000000a0000-00000000000fffff: RESERVED
1771 03:40:15.933717 3. 0000000000100000-0000000099a2bfff: RAM
1772 03:40:15.937080 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1773 03:40:15.943707 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1774 03:40:15.950182 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1775 03:40:15.953528 7. 000000009a000000-000000009f7fffff: RESERVED
1776 03:40:15.960554 8. 00000000e0000000-00000000efffffff: RESERVED
1777 03:40:15.963683 9. 00000000fc000000-00000000fc000fff: RESERVED
1778 03:40:15.966987 10. 00000000fe000000-00000000fe00ffff: RESERVED
1779 03:40:15.973883 11. 00000000fed10000-00000000fed17fff: RESERVED
1780 03:40:15.976911 12. 00000000fed80000-00000000fed83fff: RESERVED
1781 03:40:15.983306 13. 00000000fed90000-00000000fed91fff: RESERVED
1782 03:40:15.986973 14. 00000000feda0000-00000000feda1fff: RESERVED
1783 03:40:15.993401 15. 0000000100000000-000000045e7fffff: RAM
1784 03:40:15.996761 Graphics framebuffer located at 0xc0000000
1785 03:40:15.999971 Passing 5 GPIOs to payload:
1786 03:40:16.002980 NAME | PORT | POLARITY | VALUE
1787 03:40:16.010146 write protect | undefined | high | low
1788 03:40:16.013397 lid | undefined | high | high
1789 03:40:16.019766 power | undefined | high | low
1790 03:40:16.026538 oprom | undefined | high | low
1791 03:40:16.029781 EC in RW | 0x000000cb | high | low
1792 03:40:16.032884 Board ID: 4
1793 03:40:16.036278 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1794 03:40:16.039514 CBFS @ c08000 size 3f8000
1795 03:40:16.046528 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1796 03:40:16.052555 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1797 03:40:16.052641 coreboot table: 1492 bytes.
1798 03:40:16.056009 IMD ROOT 0. 99fff000 00001000
1799 03:40:16.059409 IMD SMALL 1. 99ffe000 00001000
1800 03:40:16.062640 FSP MEMORY 2. 99c4e000 003b0000
1801 03:40:16.066095 CONSOLE 3. 99c2e000 00020000
1802 03:40:16.069368 FMAP 4. 99c2d000 0000054e
1803 03:40:16.072901 TIME STAMP 5. 99c2c000 00000910
1804 03:40:16.076229 VBOOT WORK 6. 99c18000 00014000
1805 03:40:16.079393 MRC DATA 7. 99c16000 00001958
1806 03:40:16.082810 ROMSTG STCK 8. 99c15000 00001000
1807 03:40:16.086145 AFTER CAR 9. 99c0b000 0000a000
1808 03:40:16.089356 RAMSTAGE 10. 99baf000 0005c000
1809 03:40:16.093046 REFCODE 11. 99b7a000 00035000
1810 03:40:16.096094 SMM BACKUP 12. 99b6a000 00010000
1811 03:40:16.099311 COREBOOT 13. 99b62000 00008000
1812 03:40:16.102598 ACPI 14. 99b3e000 00024000
1813 03:40:16.106178 ACPI GNVS 15. 99b3d000 00001000
1814 03:40:16.109316 RAMOOPS 16. 99a3d000 00100000
1815 03:40:16.112839 TPM2 TCGLOG17. 99a2d000 00010000
1816 03:40:16.116229 SMBIOS 18. 99a2c000 00000800
1817 03:40:16.119615 IMD small region:
1818 03:40:16.122567 IMD ROOT 0. 99ffec00 00000400
1819 03:40:16.125769 FSP RUNTIME 1. 99ffebe0 00000004
1820 03:40:16.129403 EC HOSTEVENT 2. 99ffebc0 00000008
1821 03:40:16.132605 POWER STATE 3. 99ffeb80 00000040
1822 03:40:16.135913 ROMSTAGE 4. 99ffeb60 00000004
1823 03:40:16.139755 MEM INFO 5. 99ffe9a0 000001b9
1824 03:40:16.142703 VPD 6. 99ffe920 0000006c
1825 03:40:16.145707 MTRR: Physical address space:
1826 03:40:16.152366 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1827 03:40:16.159284 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1828 03:40:16.165594 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1829 03:40:16.172590 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1830 03:40:16.178731 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1831 03:40:16.185622 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1832 03:40:16.192612 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1833 03:40:16.195669 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 03:40:16.198756 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 03:40:16.201889 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 03:40:16.208638 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 03:40:16.211811 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 03:40:16.215418 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 03:40:16.218662 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 03:40:16.221949 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 03:40:16.228463 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 03:40:16.231537 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 03:40:16.234720 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 03:40:16.238027 call enable_fixed_mtrr()
1845 03:40:16.241271 CPU physical address size: 39 bits
1846 03:40:16.248064 MTRR: default type WB/UC MTRR counts: 6/8.
1847 03:40:16.251217 MTRR: WB selected as default type.
1848 03:40:16.257974 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1849 03:40:16.261172 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1850 03:40:16.268202 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1851 03:40:16.274380 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1852 03:40:16.281109 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1853 03:40:16.287935 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1854 03:40:16.288021
1855 03:40:16.291058 MTRR check
1856 03:40:16.291142 Fixed MTRRs : Enabled
1857 03:40:16.294617 Variable MTRRs: Enabled
1858 03:40:16.294701
1859 03:40:16.297848 MTRR: Fixed MSR 0x250 0x0606060606060606
1860 03:40:16.304667 MTRR: Fixed MSR 0x258 0x0606060606060606
1861 03:40:16.307225 MTRR: Fixed MSR 0x259 0x0000000000000000
1862 03:40:16.310883 MTRR: Fixed MSR 0x268 0x0606060606060606
1863 03:40:16.314019 MTRR: Fixed MSR 0x269 0x0606060606060606
1864 03:40:16.320502 MTRR: Fixed MSR 0x26a 0x0606060606060606
1865 03:40:16.324004 MTRR: Fixed MSR 0x26b 0x0606060606060606
1866 03:40:16.327576 MTRR: Fixed MSR 0x26c 0x0606060606060606
1867 03:40:16.330299 MTRR: Fixed MSR 0x26d 0x0606060606060606
1868 03:40:16.337225 MTRR: Fixed MSR 0x26e 0x0606060606060606
1869 03:40:16.340300 MTRR: Fixed MSR 0x26f 0x0606060606060606
1870 03:40:16.346815 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1871 03:40:16.346901 call enable_fixed_mtrr()
1872 03:40:16.353899 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1873 03:40:16.356931 CPU physical address size: 39 bits
1874 03:40:16.360570 CBFS @ c08000 size 3f8000
1875 03:40:16.367052 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1876 03:40:16.370186 CBFS: Locating 'fallback/payload'
1877 03:40:16.373274 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 03:40:16.376816 MTRR: Fixed MSR 0x250 0x0606060606060606
1879 03:40:16.380233 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 03:40:16.386846 MTRR: Fixed MSR 0x259 0x0000000000000000
1881 03:40:16.389933 MTRR: Fixed MSR 0x268 0x0606060606060606
1882 03:40:16.393285 MTRR: Fixed MSR 0x269 0x0606060606060606
1883 03:40:16.396641 MTRR: Fixed MSR 0x26a 0x0606060606060606
1884 03:40:16.403024 MTRR: Fixed MSR 0x26b 0x0606060606060606
1885 03:40:16.406960 MTRR: Fixed MSR 0x26c 0x0606060606060606
1886 03:40:16.409855 MTRR: Fixed MSR 0x26d 0x0606060606060606
1887 03:40:16.412837 MTRR: Fixed MSR 0x26e 0x0606060606060606
1888 03:40:16.416164 MTRR: Fixed MSR 0x26f 0x0606060606060606
1889 03:40:16.423069 MTRR: Fixed MSR 0x258 0x0606060606060606
1890 03:40:16.426110 call enable_fixed_mtrr()
1891 03:40:16.429958 MTRR: Fixed MSR 0x259 0x0000000000000000
1892 03:40:16.432773 MTRR: Fixed MSR 0x268 0x0606060606060606
1893 03:40:16.436071 MTRR: Fixed MSR 0x269 0x0606060606060606
1894 03:40:16.443382 MTRR: Fixed MSR 0x26a 0x0606060606060606
1895 03:40:16.445972 MTRR: Fixed MSR 0x26b 0x0606060606060606
1896 03:40:16.449524 MTRR: Fixed MSR 0x26c 0x0606060606060606
1897 03:40:16.452905 MTRR: Fixed MSR 0x26d 0x0606060606060606
1898 03:40:16.455969 MTRR: Fixed MSR 0x26e 0x0606060606060606
1899 03:40:16.462728 MTRR: Fixed MSR 0x26f 0x0606060606060606
1900 03:40:16.466371 CPU physical address size: 39 bits
1901 03:40:16.469097 call enable_fixed_mtrr()
1902 03:40:16.472842 CBFS: Found @ offset 1c96c0 size 3f798
1903 03:40:16.475873 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 03:40:16.479086 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 03:40:16.486038 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 03:40:16.488998 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 03:40:16.492207 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 03:40:16.496037 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 03:40:16.502520 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 03:40:16.505688 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 03:40:16.508935 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 03:40:16.512006 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 03:40:16.518640 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 03:40:16.521952 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 03:40:16.525295 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 03:40:16.528621 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 03:40:16.535213 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 03:40:16.538832 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 03:40:16.542124 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 03:40:16.544985 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 03:40:16.551778 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 03:40:16.555191 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 03:40:16.558813 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 03:40:16.561905 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 03:40:16.565290 call enable_fixed_mtrr()
1926 03:40:16.568655 CPU physical address size: 39 bits
1927 03:40:16.571843 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 03:40:16.578629 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 03:40:16.582392 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 03:40:16.584941 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 03:40:16.588183 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 03:40:16.595096 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 03:40:16.598430 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 03:40:16.602042 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 03:40:16.605195 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 03:40:16.608365 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 03:40:16.614605 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 03:40:16.618228 MTRR: Fixed MSR 0x250 0x0606060606060606
1939 03:40:16.621601 call enable_fixed_mtrr()
1940 03:40:16.624708 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 03:40:16.628207 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 03:40:16.634775 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 03:40:16.637980 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 03:40:16.641267 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 03:40:16.644587 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 03:40:16.648034 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 03:40:16.654888 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 03:40:16.658228 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 03:40:16.660887 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 03:40:16.664462 CPU physical address size: 39 bits
1951 03:40:16.667782 call enable_fixed_mtrr()
1952 03:40:16.671101 CPU physical address size: 39 bits
1953 03:40:16.674448 call enable_fixed_mtrr()
1954 03:40:16.678220 CPU physical address size: 39 bits
1955 03:40:16.681562 CPU physical address size: 39 bits
1956 03:40:16.687639 Checking segment from ROM address 0xffdd16f8
1957 03:40:16.691124 Checking segment from ROM address 0xffdd1714
1958 03:40:16.694281 Loading segment from ROM address 0xffdd16f8
1959 03:40:16.697898 code (compression=0)
1960 03:40:16.707669 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1961 03:40:16.714358 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1962 03:40:16.717536 it's not compressed!
1963 03:40:16.808756 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1964 03:40:16.815414 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1965 03:40:16.819119 Loading segment from ROM address 0xffdd1714
1966 03:40:16.822338 Entry Point 0x30000000
1967 03:40:16.825297 Loaded segments
1968 03:40:16.831594 Finalizing chipset.
1969 03:40:16.834384 Finalizing SMM.
1970 03:40:16.837623 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1971 03:40:16.841006 mp_park_aps done after 0 msecs.
1972 03:40:16.847720 Jumping to boot code at 30000000(99b62000)
1973 03:40:16.854173 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1974 03:40:16.854257
1975 03:40:16.854320
1976 03:40:16.854380
1977 03:40:16.857504 Starting depthcharge on Helios...
1978 03:40:16.857584
1979 03:40:16.857941 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1980 03:40:16.858041 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1981 03:40:16.858122 Setting prompt string to ['hatch:']
1982 03:40:16.858198 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1983 03:40:16.867566 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1984 03:40:16.867651
1985 03:40:16.873867 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1986 03:40:16.873948
1987 03:40:16.880739 board_setup: Info: eMMC controller not present; skipping
1988 03:40:16.880824
1989 03:40:16.883774 New NVMe Controller 0x30053ac0 @ 00:1d:00
1990 03:40:16.883857
1991 03:40:16.890702 board_setup: Info: SDHCI controller not present; skipping
1992 03:40:16.890784
1993 03:40:16.897590 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1994 03:40:16.897674
1995 03:40:16.897739 Wipe memory regions:
1996 03:40:16.897798
1997 03:40:16.900368 [0x00000000001000, 0x000000000a0000)
1998 03:40:16.900449
1999 03:40:16.903851 [0x00000000100000, 0x00000030000000)
2000 03:40:16.969823
2001 03:40:16.973352 [0x00000030657430, 0x00000099a2c000)
2002 03:40:17.110901
2003 03:40:17.113550 [0x00000100000000, 0x0000045e800000)
2004 03:40:18.495953
2005 03:40:18.496142 R8152: Initializing
2006 03:40:18.496254
2007 03:40:18.499215 Version 9 (ocp_data = 6010)
2008 03:40:18.503617
2009 03:40:18.503737 R8152: Done initializing
2010 03:40:18.503845
2011 03:40:18.506771 Adding net device
2012 03:40:18.989759
2013 03:40:18.989945 R8152: Initializing
2014 03:40:18.990058
2015 03:40:18.992853 Version 6 (ocp_data = 5c30)
2016 03:40:18.992970
2017 03:40:18.996185 R8152: Done initializing
2018 03:40:18.996303
2019 03:40:18.999762 net_add_device: Attemp to include the same device
2020 03:40:19.003643
2021 03:40:19.010362 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2022 03:40:19.010482
2023 03:40:19.010588
2024 03:40:19.010692
2025 03:40:19.011033 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 03:40:19.111459 hatch: tftpboot 192.168.201.1 12543679/tftp-deploy-1lzd5fuw/kernel/bzImage 12543679/tftp-deploy-1lzd5fuw/kernel/cmdline 12543679/tftp-deploy-1lzd5fuw/ramdisk/ramdisk.cpio.gz
2028 03:40:19.111692 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2029 03:40:19.111842 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2030 03:40:19.115856 tftpboot 192.168.201.1 12543679/tftp-deploy-1lzd5fuw/kernel/bzImploy-1lzd5fuw/kernel/cmdline 12543679/tftp-deploy-1lzd5fuw/ramdisk/ramdisk.cpio.gz
2031 03:40:19.115989
2032 03:40:19.116164 Waiting for link
2033 03:40:19.316941
2034 03:40:19.317081 done.
2035 03:40:19.317149
2036 03:40:19.317209 MAC: 00:24:32:50:1a:5f
2037 03:40:19.317267
2038 03:40:19.319973 Sending DHCP discover... done.
2039 03:40:19.320062
2040 03:40:19.323230 Waiting for reply... done.
2041 03:40:19.323312
2042 03:40:19.327854 Sending DHCP request... done.
2043 03:40:19.327937
2044 03:40:19.334712 Waiting for reply... done.
2045 03:40:19.334801
2046 03:40:19.334869 My ip is 192.168.201.21
2047 03:40:19.334931
2048 03:40:19.337907 The DHCP server ip is 192.168.201.1
2049 03:40:19.341030
2050 03:40:19.344768 TFTP server IP predefined by user: 192.168.201.1
2051 03:40:19.344853
2052 03:40:19.351273 Bootfile predefined by user: 12543679/tftp-deploy-1lzd5fuw/kernel/bzImage
2053 03:40:19.351361
2054 03:40:19.354471 Sending tftp read request... done.
2055 03:40:19.354553
2056 03:40:19.357808 Waiting for the transfer...
2057 03:40:19.361042
2058 03:40:19.912465 00000000 ################################################################
2059 03:40:19.912627
2060 03:40:20.463326 00080000 ################################################################
2061 03:40:20.463455
2062 03:40:21.027542 00100000 ################################################################
2063 03:40:21.027673
2064 03:40:21.648989 00180000 ################################################################
2065 03:40:21.649463
2066 03:40:22.321665 00200000 ################################################################
2067 03:40:22.321803
2068 03:40:22.984923 00280000 ################################################################
2069 03:40:22.985420
2070 03:40:23.679407 00300000 ################################################################
2071 03:40:23.679953
2072 03:40:24.372350 00380000 ################################################################
2073 03:40:24.372853
2074 03:40:25.009870 00400000 ################################################################
2075 03:40:25.010033
2076 03:40:25.603517 00480000 ################################################################
2077 03:40:25.603652
2078 03:40:26.205653 00500000 ################################################################
2079 03:40:26.205803
2080 03:40:26.794663 00580000 ################################################################
2081 03:40:26.794798
2082 03:40:27.381465 00600000 ################################################################
2083 03:40:27.381602
2084 03:40:27.963644 00680000 ################################################################
2085 03:40:27.963778
2086 03:40:28.557176 00700000 ################################################################
2087 03:40:28.557307
2088 03:40:29.145849 00780000 ################################################################
2089 03:40:29.145985
2090 03:40:29.716547 00800000 ################################################################
2091 03:40:29.716682
2092 03:40:30.261957 00880000 ################################################################
2093 03:40:30.262092
2094 03:40:30.815569 00900000 ################################################################
2095 03:40:30.815703
2096 03:40:31.375250 00980000 ################################################################
2097 03:40:31.375385
2098 03:40:31.922961 00a00000 ################################################################
2099 03:40:31.923100
2100 03:40:32.482479 00a80000 ################################################################
2101 03:40:32.482613
2102 03:40:32.526012 00b00000 ###### done.
2103 03:40:32.526117
2104 03:40:32.529291 The bootfile was 11575296 bytes long.
2105 03:40:32.529375
2106 03:40:32.532460 Sending tftp read request... done.
2107 03:40:32.532575
2108 03:40:32.535795 Waiting for the transfer...
2109 03:40:32.535905
2110 03:40:33.074652 00000000 ################################################################
2111 03:40:33.074788
2112 03:40:33.614496 00080000 ################################################################
2113 03:40:33.614635
2114 03:40:34.149313 00100000 ################################################################
2115 03:40:34.149464
2116 03:40:34.690729 00180000 ################################################################
2117 03:40:34.690876
2118 03:40:35.246523 00200000 ################################################################
2119 03:40:35.246658
2120 03:40:35.810526 00280000 ################################################################
2121 03:40:35.810662
2122 03:40:36.366559 00300000 ################################################################
2123 03:40:36.366699
2124 03:40:36.903936 00380000 ################################################################
2125 03:40:36.904137
2126 03:40:37.456678 00400000 ################################################################
2127 03:40:37.456816
2128 03:40:37.978128 00480000 ################################################################
2129 03:40:37.978291
2130 03:40:38.512956 00500000 ################################################################
2131 03:40:38.513093
2132 03:40:39.050482 00580000 ################################################################
2133 03:40:39.050619
2134 03:40:39.601409 00600000 ################################################################
2135 03:40:39.601540
2136 03:40:40.153760 00680000 ################################################################
2137 03:40:40.153901
2138 03:40:40.703968 00700000 ################################################################
2139 03:40:40.704160
2140 03:40:41.229616 00780000 ################################################################
2141 03:40:41.229752
2142 03:40:41.756347 00800000 ################################################################
2143 03:40:41.756477
2144 03:40:42.056973 00880000 ##################################### done.
2145 03:40:42.057116
2146 03:40:42.060356 Sending tftp read request... done.
2147 03:40:42.060461
2148 03:40:42.063349 Waiting for the transfer...
2149 03:40:42.063435
2150 03:40:42.063499 00000000 # done.
2151 03:40:42.063561
2152 03:40:42.073806 Command line loaded dynamically from TFTP file: 12543679/tftp-deploy-1lzd5fuw/kernel/cmdline
2153 03:40:42.073911
2154 03:40:42.092928 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2155 03:40:42.093020
2156 03:40:42.100173 ec_init(0): CrosEC protocol v3 supported (256, 256)
2157 03:40:42.104381
2158 03:40:42.107785 Shutting down all USB controllers.
2159 03:40:42.107886
2160 03:40:42.107976 Removing current net device
2161 03:40:42.110887
2162 03:40:42.110986 Finalizing coreboot
2163 03:40:42.111085
2164 03:40:42.117674 Exiting depthcharge with code 4 at timestamp: 32635733
2165 03:40:42.117757
2166 03:40:42.117820
2167 03:40:42.117880 Starting kernel ...
2168 03:40:42.117938
2169 03:40:42.118312 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2170 03:40:42.118409 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2171 03:40:42.118485 Setting prompt string to ['Linux version [0-9]']
2172 03:40:42.118556 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 03:40:42.118655 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2174 03:40:42.121070
2176 03:44:59.119385 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2178 03:44:59.120558 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2180 03:44:59.121417 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2183 03:44:59.122833 end: 2 depthcharge-action (duration 00:05:00) [common]
2185 03:44:59.124134 Cleaning after the job
2186 03:44:59.124617 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543679/tftp-deploy-1lzd5fuw/ramdisk
2187 03:44:59.130812 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543679/tftp-deploy-1lzd5fuw/kernel
2188 03:44:59.138756 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543679/tftp-deploy-1lzd5fuw/modules
2189 03:44:59.141648 start: 5.1 power-off (timeout 00:00:30) [common]
2190 03:44:59.142434 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2191 03:44:59.229694 >> Command sent successfully.
2192 03:44:59.235182 Returned 0 in 0 seconds
2193 03:44:59.336332 end: 5.1 power-off (duration 00:00:00) [common]
2195 03:44:59.337868 start: 5.2 read-feedback (timeout 00:10:00) [common]
2196 03:44:59.339203 Listened to connection for namespace 'common' for up to 1s
2198 03:44:59.340526 Listened to connection for namespace 'common' for up to 1s
2199 03:45:00.339934 Finalising connection for namespace 'common'
2200 03:45:00.340656 Disconnecting from shell: Finalise
2201 03:45:00.341079
2202 03:45:00.442312 end: 5.2 read-feedback (duration 00:00:01) [common]
2203 03:45:00.442940 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12543679
2204 03:45:00.499986 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12543679
2205 03:45:00.500211 JobError: Your job cannot terminate cleanly.