Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 03:45:29.720529 lava-dispatcher, installed at version: 2023.10
2 03:45:29.720738 start: 0 validate
3 03:45:29.720873 Start time: 2024-01-16 03:45:29.720865+00:00 (UTC)
4 03:45:29.720986 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:45:29.721118 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 03:45:29.992336 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:45:29.993109 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.304-cip106-27-gf3e967c370d44%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:45:30.264969 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:45:30.265752 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 03:45:30.537284 Using caching service: 'http://localhost/cache/?uri=%s'
11 03:45:30.538060 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.304-cip106-27-gf3e967c370d44%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 03:45:30.815467 validate duration: 1.09
14 03:45:30.817202 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 03:45:30.817755 start: 1.1 download-retry (timeout 00:10:00) [common]
16 03:45:30.818226 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 03:45:30.818843 Not decompressing ramdisk as can be used compressed.
18 03:45:30.819309 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
19 03:45:30.819664 saving as /var/lib/lava/dispatcher/tmp/12543666/tftp-deploy-sxz1247e/ramdisk/initrd.cpio.gz
20 03:45:30.820015 total size: 5432480 (5 MB)
21 03:45:30.825208 progress 0 % (0 MB)
22 03:45:30.834613 progress 5 % (0 MB)
23 03:45:30.841045 progress 10 % (0 MB)
24 03:45:30.845556 progress 15 % (0 MB)
25 03:45:30.849584 progress 20 % (1 MB)
26 03:45:30.852837 progress 25 % (1 MB)
27 03:45:30.855540 progress 30 % (1 MB)
28 03:45:30.858376 progress 35 % (1 MB)
29 03:45:30.860657 progress 40 % (2 MB)
30 03:45:30.862876 progress 45 % (2 MB)
31 03:45:30.864871 progress 50 % (2 MB)
32 03:45:30.867083 progress 55 % (2 MB)
33 03:45:30.868913 progress 60 % (3 MB)
34 03:45:30.870685 progress 65 % (3 MB)
35 03:45:30.872653 progress 70 % (3 MB)
36 03:45:30.874239 progress 75 % (3 MB)
37 03:45:30.875843 progress 80 % (4 MB)
38 03:45:30.877463 progress 85 % (4 MB)
39 03:45:30.879095 progress 90 % (4 MB)
40 03:45:30.880568 progress 95 % (4 MB)
41 03:45:30.882051 progress 100 % (5 MB)
42 03:45:30.882271 5 MB downloaded in 0.06 s (83.18 MB/s)
43 03:45:30.882429 end: 1.1.1 http-download (duration 00:00:00) [common]
45 03:45:30.882663 end: 1.1 download-retry (duration 00:00:00) [common]
46 03:45:30.882747 start: 1.2 download-retry (timeout 00:10:00) [common]
47 03:45:30.882828 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 03:45:30.882960 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.304-cip106-27-gf3e967c370d44/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 03:45:30.883029 saving as /var/lib/lava/dispatcher/tmp/12543666/tftp-deploy-sxz1247e/kernel/bzImage
50 03:45:30.883089 total size: 11575296 (11 MB)
51 03:45:30.883149 No compression specified
52 03:45:30.884264 progress 0 % (0 MB)
53 03:45:30.887236 progress 5 % (0 MB)
54 03:45:30.890517 progress 10 % (1 MB)
55 03:45:30.893519 progress 15 % (1 MB)
56 03:45:30.896751 progress 20 % (2 MB)
57 03:45:30.899869 progress 25 % (2 MB)
58 03:45:30.902818 progress 30 % (3 MB)
59 03:45:30.906010 progress 35 % (3 MB)
60 03:45:30.909180 progress 40 % (4 MB)
61 03:45:30.912135 progress 45 % (4 MB)
62 03:45:30.915232 progress 50 % (5 MB)
63 03:45:30.918318 progress 55 % (6 MB)
64 03:45:30.921283 progress 60 % (6 MB)
65 03:45:30.924476 progress 65 % (7 MB)
66 03:45:30.927516 progress 70 % (7 MB)
67 03:45:30.930424 progress 75 % (8 MB)
68 03:45:30.933574 progress 80 % (8 MB)
69 03:45:30.936629 progress 85 % (9 MB)
70 03:45:30.939475 progress 90 % (9 MB)
71 03:45:30.942493 progress 95 % (10 MB)
72 03:45:30.945604 progress 100 % (11 MB)
73 03:45:30.945740 11 MB downloaded in 0.06 s (176.21 MB/s)
74 03:45:30.945884 end: 1.2.1 http-download (duration 00:00:00) [common]
76 03:45:30.946107 end: 1.2 download-retry (duration 00:00:00) [common]
77 03:45:30.946197 start: 1.3 download-retry (timeout 00:10:00) [common]
78 03:45:30.946280 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 03:45:30.946419 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 03:45:30.946488 saving as /var/lib/lava/dispatcher/tmp/12543666/tftp-deploy-sxz1247e/nfsrootfs/full.rootfs.tar
81 03:45:30.946548 total size: 207157356 (197 MB)
82 03:45:30.946610 Using unxz to decompress xz
83 03:45:30.950805 progress 0 % (0 MB)
84 03:45:31.495171 progress 5 % (9 MB)
85 03:45:32.019925 progress 10 % (19 MB)
86 03:45:32.621857 progress 15 % (29 MB)
87 03:45:32.984205 progress 20 % (39 MB)
88 03:45:33.342996 progress 25 % (49 MB)
89 03:45:33.945619 progress 30 % (59 MB)
90 03:45:34.485967 progress 35 % (69 MB)
91 03:45:35.110951 progress 40 % (79 MB)
92 03:45:35.674687 progress 45 % (88 MB)
93 03:45:36.258022 progress 50 % (98 MB)
94 03:45:36.902016 progress 55 % (108 MB)
95 03:45:37.589635 progress 60 % (118 MB)
96 03:45:37.725986 progress 65 % (128 MB)
97 03:45:37.862865 progress 70 % (138 MB)
98 03:45:37.960222 progress 75 % (148 MB)
99 03:45:38.037257 progress 80 % (158 MB)
100 03:45:38.114362 progress 85 % (167 MB)
101 03:45:38.222270 progress 90 % (177 MB)
102 03:45:38.490734 progress 95 % (187 MB)
103 03:45:39.070497 progress 100 % (197 MB)
104 03:45:39.076728 197 MB downloaded in 8.13 s (24.30 MB/s)
105 03:45:39.076973 end: 1.3.1 http-download (duration 00:00:08) [common]
107 03:45:39.077232 end: 1.3 download-retry (duration 00:00:08) [common]
108 03:45:39.077318 start: 1.4 download-retry (timeout 00:09:52) [common]
109 03:45:39.077403 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 03:45:39.077559 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.304-cip106-27-gf3e967c370d44/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 03:45:39.077631 saving as /var/lib/lava/dispatcher/tmp/12543666/tftp-deploy-sxz1247e/modules/modules.tar
112 03:45:39.077690 total size: 484060 (0 MB)
113 03:45:39.077752 Using unxz to decompress xz
114 03:45:39.081935 progress 6 % (0 MB)
115 03:45:39.082322 progress 13 % (0 MB)
116 03:45:39.082551 progress 20 % (0 MB)
117 03:45:39.084159 progress 27 % (0 MB)
118 03:45:39.086139 progress 33 % (0 MB)
119 03:45:39.087982 progress 40 % (0 MB)
120 03:45:39.089936 progress 47 % (0 MB)
121 03:45:39.091806 progress 54 % (0 MB)
122 03:45:39.093772 progress 60 % (0 MB)
123 03:45:39.095729 progress 67 % (0 MB)
124 03:45:39.097808 progress 74 % (0 MB)
125 03:45:39.099799 progress 81 % (0 MB)
126 03:45:39.101703 progress 88 % (0 MB)
127 03:45:39.103590 progress 94 % (0 MB)
128 03:45:39.106036 progress 100 % (0 MB)
129 03:45:39.112647 0 MB downloaded in 0.03 s (13.21 MB/s)
130 03:45:39.112884 end: 1.4.1 http-download (duration 00:00:00) [common]
132 03:45:39.113187 end: 1.4 download-retry (duration 00:00:00) [common]
133 03:45:39.113306 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 03:45:39.113397 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 03:45:42.627197 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12543666/extract-nfsrootfs-xrxr4e0d
136 03:45:42.627398 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
137 03:45:42.627497 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 03:45:42.627662 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy
139 03:45:42.627792 makedir: /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin
140 03:45:42.627895 makedir: /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/tests
141 03:45:42.627993 makedir: /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/results
142 03:45:42.628138 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-add-keys
143 03:45:42.628285 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-add-sources
144 03:45:42.628418 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-background-process-start
145 03:45:42.628548 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-background-process-stop
146 03:45:42.628679 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-common-functions
147 03:45:42.628808 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-echo-ipv4
148 03:45:42.628935 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-install-packages
149 03:45:42.629061 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-installed-packages
150 03:45:42.629186 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-os-build
151 03:45:42.629312 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-probe-channel
152 03:45:42.629438 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-probe-ip
153 03:45:42.629565 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-target-ip
154 03:45:42.629691 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-target-mac
155 03:45:42.629817 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-target-storage
156 03:45:42.629945 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-test-case
157 03:45:42.630073 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-test-event
158 03:45:42.630199 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-test-feedback
159 03:45:42.630326 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-test-raise
160 03:45:42.630452 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-test-reference
161 03:45:42.630580 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-test-runner
162 03:45:42.630708 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-test-set
163 03:45:42.630838 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-test-shell
164 03:45:42.630965 Updating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-add-keys (debian)
165 03:45:42.631119 Updating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-add-sources (debian)
166 03:45:42.631261 Updating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-install-packages (debian)
167 03:45:42.631401 Updating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-installed-packages (debian)
168 03:45:42.631540 Updating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/bin/lava-os-build (debian)
169 03:45:42.631663 Creating /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/environment
170 03:45:42.631758 LAVA metadata
171 03:45:42.631827 - LAVA_JOB_ID=12543666
172 03:45:42.631890 - LAVA_DISPATCHER_IP=192.168.201.1
173 03:45:42.631989 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
174 03:45:42.632224 skipped lava-vland-overlay
175 03:45:42.632345 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 03:45:42.632440 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
177 03:45:42.632501 skipped lava-multinode-overlay
178 03:45:42.632574 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 03:45:42.632654 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
180 03:45:42.632725 Loading test definitions
181 03:45:42.632813 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
182 03:45:42.632885 Using /lava-12543666 at stage 0
183 03:45:42.633163 uuid=12543666_1.5.2.3.1 testdef=None
184 03:45:42.633249 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 03:45:42.633332 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
186 03:45:42.633781 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 03:45:42.633994 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
189 03:45:42.634547 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 03:45:42.634775 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
192 03:45:42.635315 runner path: /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/0/tests/0_timesync-off test_uuid 12543666_1.5.2.3.1
193 03:45:42.635469 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 03:45:42.635689 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
196 03:45:42.635760 Using /lava-12543666 at stage 0
197 03:45:42.635857 Fetching tests from https://github.com/kernelci/test-definitions.git
198 03:45:42.635934 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/0/tests/1_kselftest-rtc'
199 03:45:48.816129 Running '/usr/bin/git checkout kernelci.org
200 03:45:48.963893 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
201 03:45:48.964683 uuid=12543666_1.5.2.3.5 testdef=None
202 03:45:48.964841 end: 1.5.2.3.5 git-repo-action (duration 00:00:06) [common]
204 03:45:48.965093 start: 1.5.2.3.6 test-overlay (timeout 00:09:42) [common]
205 03:45:48.965857 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 03:45:48.966092 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:42) [common]
208 03:45:48.967083 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 03:45:48.967322 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:42) [common]
211 03:45:48.968307 runner path: /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/0/tests/1_kselftest-rtc test_uuid 12543666_1.5.2.3.5
212 03:45:48.968399 BOARD='asus-C436FA-Flip-hatch'
213 03:45:48.968464 BRANCH='cip-gitlab'
214 03:45:48.968524 SKIPFILE='/dev/null'
215 03:45:48.968583 SKIP_INSTALL='True'
216 03:45:48.968638 TESTPROG_URL='None'
217 03:45:48.968694 TST_CASENAME=''
218 03:45:48.968748 TST_CMDFILES='rtc'
219 03:45:48.968891 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 03:45:48.969097 Creating lava-test-runner.conf files
222 03:45:48.969161 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12543666/lava-overlay-zr78j8gy/lava-12543666/0 for stage 0
223 03:45:48.969255 - 0_timesync-off
224 03:45:48.969386 - 1_kselftest-rtc
225 03:45:48.969507 end: 1.5.2.3 test-definition (duration 00:00:06) [common]
226 03:45:48.969599 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
227 03:45:56.352214 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
228 03:45:56.352415 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
229 03:45:56.352509 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 03:45:56.352612 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
231 03:45:56.352703 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
232 03:45:56.491636 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 03:45:56.492043 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
234 03:45:56.492217 extracting modules file /var/lib/lava/dispatcher/tmp/12543666/tftp-deploy-sxz1247e/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12543666/extract-nfsrootfs-xrxr4e0d
235 03:45:56.513295 extracting modules file /var/lib/lava/dispatcher/tmp/12543666/tftp-deploy-sxz1247e/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12543666/extract-overlay-ramdisk-_20n1hxi/ramdisk
236 03:45:56.534189 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 03:45:56.534334 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
238 03:45:56.534432 [common] Applying overlay to NFS
239 03:45:56.534501 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12543666/compress-overlay-y1xekhbp/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12543666/extract-nfsrootfs-xrxr4e0d
240 03:45:57.449782 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 03:45:57.449952 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
242 03:45:57.450040 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 03:45:57.450128 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
244 03:45:57.450209 Building ramdisk /var/lib/lava/dispatcher/tmp/12543666/extract-overlay-ramdisk-_20n1hxi/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12543666/extract-overlay-ramdisk-_20n1hxi/ramdisk
245 03:45:57.543159 >> 30353 blocks
246 03:45:58.154842 rename /var/lib/lava/dispatcher/tmp/12543666/extract-overlay-ramdisk-_20n1hxi/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12543666/tftp-deploy-sxz1247e/ramdisk/ramdisk.cpio.gz
247 03:45:58.155328 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 03:45:58.155458 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
249 03:45:58.155560 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
250 03:45:58.155658 No mkimage arch provided, not using FIT.
251 03:45:58.155748 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 03:45:58.155834 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 03:45:58.155942 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
254 03:45:58.156032 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
255 03:45:58.156173 No LXC device requested
256 03:45:58.156256 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 03:45:58.156343 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
258 03:45:58.156421 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 03:45:58.156496 Checking files for TFTP limit of 4294967296 bytes.
260 03:45:58.156929 end: 1 tftp-deploy (duration 00:00:27) [common]
261 03:45:58.157033 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 03:45:58.157120 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 03:45:58.157245 substitutions:
264 03:45:58.157311 - {DTB}: None
265 03:45:58.157373 - {INITRD}: 12543666/tftp-deploy-sxz1247e/ramdisk/ramdisk.cpio.gz
266 03:45:58.157431 - {KERNEL}: 12543666/tftp-deploy-sxz1247e/kernel/bzImage
267 03:45:58.157488 - {LAVA_MAC}: None
268 03:45:58.157544 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12543666/extract-nfsrootfs-xrxr4e0d
269 03:45:58.157601 - {NFS_SERVER_IP}: 192.168.201.1
270 03:45:58.157655 - {PRESEED_CONFIG}: None
271 03:45:58.157708 - {PRESEED_LOCAL}: None
272 03:45:58.157762 - {RAMDISK}: 12543666/tftp-deploy-sxz1247e/ramdisk/ramdisk.cpio.gz
273 03:45:58.157815 - {ROOT_PART}: None
274 03:45:58.157869 - {ROOT}: None
275 03:45:58.157921 - {SERVER_IP}: 192.168.201.1
276 03:45:58.157974 - {TEE}: None
277 03:45:58.158027 Parsed boot commands:
278 03:45:58.158080 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 03:45:58.158254 Parsed boot commands: tftpboot 192.168.201.1 12543666/tftp-deploy-sxz1247e/kernel/bzImage 12543666/tftp-deploy-sxz1247e/kernel/cmdline 12543666/tftp-deploy-sxz1247e/ramdisk/ramdisk.cpio.gz
280 03:45:58.158340 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 03:45:58.158419 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 03:45:58.158510 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 03:45:58.158595 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 03:45:58.158665 Not connected, no need to disconnect.
285 03:45:58.158738 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 03:45:58.158818 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 03:45:58.158885 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
288 03:45:58.163136 Setting prompt string to ['lava-test: # ']
289 03:45:58.163480 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 03:45:58.163583 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 03:45:58.163676 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 03:45:58.163780 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 03:45:58.163975 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
294 03:46:03.315750 >> Command sent successfully.
295 03:46:03.327064 Returned 0 in 5 seconds
296 03:46:03.428409 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 03:46:03.430042 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 03:46:03.430616 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 03:46:03.431112 Setting prompt string to 'Starting depthcharge on Helios...'
301 03:46:03.431496 Changing prompt to 'Starting depthcharge on Helios...'
302 03:46:03.431870 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
303 03:46:03.433245 [Enter `^Ec?' for help]
304 03:46:04.039783
305 03:46:04.040381
306 03:46:04.049901 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 03:46:04.052938 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 03:46:04.059920 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 03:46:04.063275 CPU: AES supported, TXT NOT supported, VT supported
310 03:46:04.069710 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 03:46:04.072862 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 03:46:04.079658 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 03:46:04.082968 VBOOT: Loading verstage.
314 03:46:04.086617 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 03:46:04.092993 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 03:46:04.096350 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 03:46:04.099992 CBFS @ c08000 size 3f8000
318 03:46:04.106138 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 03:46:04.109491 CBFS: Locating 'fallback/verstage'
320 03:46:04.113214 CBFS: Found @ offset 10fb80 size 1072c
321 03:46:04.116165
322 03:46:04.116595
323 03:46:04.126423 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 03:46:04.140913 Probing TPM: . done!
325 03:46:04.144171 TPM ready after 0 ms
326 03:46:04.147576 Connected to device vid:did:rid of 1ae0:0028:00
327 03:46:04.157522 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 03:46:04.160887 Initialized TPM device CR50 revision 0
329 03:46:04.208135 tlcl_send_startup: Startup return code is 0
330 03:46:04.208733 TPM: setup succeeded
331 03:46:04.221166 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 03:46:04.224597 Chrome EC: UHEPI supported
333 03:46:04.228271 Phase 1
334 03:46:04.231291 FMAP: area GBB found @ c05000 (12288 bytes)
335 03:46:04.237774 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
336 03:46:04.241390 Phase 2
337 03:46:04.241967 Phase 3
338 03:46:04.244746 FMAP: area GBB found @ c05000 (12288 bytes)
339 03:46:04.251207 VB2:vb2_report_dev_firmware() This is developer signed firmware
340 03:46:04.257771 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
341 03:46:04.261612 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
342 03:46:04.267626 VB2:vb2_verify_keyblock() Checking keyblock signature...
343 03:46:04.283719 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
344 03:46:04.286858 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
345 03:46:04.293287 VB2:vb2_verify_fw_preamble() Verifying preamble.
346 03:46:04.297652 Phase 4
347 03:46:04.300961 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
348 03:46:04.307812 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
349 03:46:04.487083 VB2:vb2_rsa_verify_digest() Digest check failed!
350 03:46:04.493565 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
351 03:46:04.494134 Saving nvdata
352 03:46:04.497790 Reboot requested (10020007)
353 03:46:04.500437 board_reset() called!
354 03:46:04.500904 full_reset() called!
355 03:46:09.006792
356 03:46:09.007349
357 03:46:09.016510 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
358 03:46:09.019781 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
359 03:46:09.026798 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
360 03:46:09.030430 CPU: AES supported, TXT NOT supported, VT supported
361 03:46:09.036233 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
362 03:46:09.040243 PCH: device id 0284 (rev 00) is Cometlake-U Premium
363 03:46:09.046700 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
364 03:46:09.049793 VBOOT: Loading verstage.
365 03:46:09.053602 FMAP: Found "FLASH" version 1.1 at 0xc04000.
366 03:46:09.060220 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
367 03:46:09.063267 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 03:46:09.066565 CBFS @ c08000 size 3f8000
369 03:46:09.072962 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 03:46:09.076851 CBFS: Locating 'fallback/verstage'
371 03:46:09.079659 CBFS: Found @ offset 10fb80 size 1072c
372 03:46:09.084018
373 03:46:09.084621
374 03:46:09.093537 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
375 03:46:09.108204 Probing TPM: . done!
376 03:46:09.111546 TPM ready after 0 ms
377 03:46:09.114440 Connected to device vid:did:rid of 1ae0:0028:00
378 03:46:09.125065 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
379 03:46:09.128127 Initialized TPM device CR50 revision 0
380 03:46:09.175395 tlcl_send_startup: Startup return code is 0
381 03:46:09.175967 TPM: setup succeeded
382 03:46:09.188993 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
383 03:46:09.192222 Chrome EC: UHEPI supported
384 03:46:09.195995 Phase 1
385 03:46:09.198737 FMAP: area GBB found @ c05000 (12288 bytes)
386 03:46:09.204894 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
387 03:46:09.211729 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
388 03:46:09.214943 Recovery requested (1009000e)
389 03:46:09.221417 Saving nvdata
390 03:46:09.227515 tlcl_extend: response is 0
391 03:46:09.236029 tlcl_extend: response is 0
392 03:46:09.242642 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
393 03:46:09.245949 CBFS @ c08000 size 3f8000
394 03:46:09.253161 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
395 03:46:09.256246 CBFS: Locating 'fallback/romstage'
396 03:46:09.259262 CBFS: Found @ offset 80 size 145fc
397 03:46:09.262811 Accumulated console time in verstage 98 ms
398 03:46:09.263393
399 03:46:09.263764
400 03:46:09.276010 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
401 03:46:09.282625 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
402 03:46:09.285816 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
403 03:46:09.288985 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
404 03:46:09.295751 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
405 03:46:09.299332 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
406 03:46:09.302409 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
407 03:46:09.305583 TCO_STS: 0000 0000
408 03:46:09.308627 GEN_PMCON: e0015238 00000200
409 03:46:09.312446 GBLRST_CAUSE: 00000000 00000000
410 03:46:09.313012 prev_sleep_state 5
411 03:46:09.315954 Boot Count incremented to 76218
412 03:46:09.322342 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
413 03:46:09.325803 CBFS @ c08000 size 3f8000
414 03:46:09.332772 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
415 03:46:09.333251 CBFS: Locating 'fspm.bin'
416 03:46:09.338834 CBFS: Found @ offset 5ffc0 size 71000
417 03:46:09.342283 Chrome EC: UHEPI supported
418 03:46:09.348702 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
419 03:46:09.352283 Probing TPM: done!
420 03:46:09.359034 Connected to device vid:did:rid of 1ae0:0028:00
421 03:46:09.368887 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
422 03:46:09.374742 Initialized TPM device CR50 revision 0
423 03:46:09.384339 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 03:46:09.390262 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
425 03:46:09.394049 MRC cache found, size 1948
426 03:46:09.397603 bootmode is set to: 2
427 03:46:09.400364 PRMRR disabled by config.
428 03:46:09.400925 SPD INDEX = 1
429 03:46:09.407183 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
430 03:46:09.410785 CBFS @ c08000 size 3f8000
431 03:46:09.416891 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
432 03:46:09.417503 CBFS: Locating 'spd.bin'
433 03:46:09.420883 CBFS: Found @ offset 5fb80 size 400
434 03:46:09.423622 SPD: module type is LPDDR3
435 03:46:09.426996 SPD: module part is
436 03:46:09.433532 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
437 03:46:09.437104 SPD: device width 4 bits, bus width 8 bits
438 03:46:09.440509 SPD: module size is 4096 MB (per channel)
439 03:46:09.443448 memory slot: 0 configuration done.
440 03:46:09.446657 memory slot: 2 configuration done.
441 03:46:09.498437 CBMEM:
442 03:46:09.502503 IMD: root @ 99fff000 254 entries.
443 03:46:09.504670 IMD: root @ 99ffec00 62 entries.
444 03:46:09.508273 External stage cache:
445 03:46:09.511274 IMD: root @ 9abff000 254 entries.
446 03:46:09.514913 IMD: root @ 9abfec00 62 entries.
447 03:46:09.521055 Chrome EC: clear events_b mask to 0x0000000020004000
448 03:46:09.533884 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
449 03:46:09.547690 tlcl_write: response is 0
450 03:46:09.556516 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
451 03:46:09.562838 MRC: TPM MRC hash updated successfully.
452 03:46:09.563536 2 DIMMs found
453 03:46:09.566542 SMM Memory Map
454 03:46:09.569628 SMRAM : 0x9a000000 0x1000000
455 03:46:09.572715 Subregion 0: 0x9a000000 0xa00000
456 03:46:09.576442 Subregion 1: 0x9aa00000 0x200000
457 03:46:09.579969 Subregion 2: 0x9ac00000 0x400000
458 03:46:09.582716 top_of_ram = 0x9a000000
459 03:46:09.586560 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
460 03:46:09.592789 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
461 03:46:09.596403 MTRR Range: Start=ff000000 End=0 (Size 1000000)
462 03:46:09.602801 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 03:46:09.606550 CBFS @ c08000 size 3f8000
464 03:46:09.609565 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 03:46:09.612959 CBFS: Locating 'fallback/postcar'
466 03:46:09.619676 CBFS: Found @ offset 107000 size 4b44
467 03:46:09.622889 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
468 03:46:09.635563 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
469 03:46:09.639417 Processing 180 relocs. Offset value of 0x97c0c000
470 03:46:09.647318 Accumulated console time in romstage 286 ms
471 03:46:09.647890
472 03:46:09.648396
473 03:46:09.657396 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
474 03:46:09.663777 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
475 03:46:09.667575 CBFS @ c08000 size 3f8000
476 03:46:09.670831 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
477 03:46:09.676825 CBFS: Locating 'fallback/ramstage'
478 03:46:09.680889 CBFS: Found @ offset 43380 size 1b9e8
479 03:46:09.687063 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
480 03:46:09.718649 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
481 03:46:09.722747 Processing 3976 relocs. Offset value of 0x98db0000
482 03:46:09.728854 Accumulated console time in postcar 52 ms
483 03:46:09.729336
484 03:46:09.729707
485 03:46:09.738909 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
486 03:46:09.745590 FMAP: area RO_VPD found @ c00000 (16384 bytes)
487 03:46:09.748522 WARNING: RO_VPD is uninitialized or empty.
488 03:46:09.752218 FMAP: area RW_VPD found @ af8000 (8192 bytes)
489 03:46:09.759030 FMAP: area RW_VPD found @ af8000 (8192 bytes)
490 03:46:09.759596 Normal boot.
491 03:46:09.765537 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
492 03:46:09.769193 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 03:46:09.772468 CBFS @ c08000 size 3f8000
494 03:46:09.778916 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 03:46:09.782234 CBFS: Locating 'cpu_microcode_blob.bin'
496 03:46:09.785803 CBFS: Found @ offset 14700 size 2ec00
497 03:46:09.789236 microcode: sig=0x806ec pf=0x4 revision=0xc9
498 03:46:09.792297 Skip microcode update
499 03:46:09.795718 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
500 03:46:09.799012 CBFS @ c08000 size 3f8000
501 03:46:09.805593 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
502 03:46:09.808611 CBFS: Locating 'fsps.bin'
503 03:46:09.812663 CBFS: Found @ offset d1fc0 size 35000
504 03:46:09.837111 Detected 4 core, 8 thread CPU.
505 03:46:09.840667 Setting up SMI for CPU
506 03:46:09.843822 IED base = 0x9ac00000
507 03:46:09.844433 IED size = 0x00400000
508 03:46:09.847048 Will perform SMM setup.
509 03:46:09.854073 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
510 03:46:09.860610 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
511 03:46:09.863998 Processing 16 relocs. Offset value of 0x00030000
512 03:46:09.867756 Attempting to start 7 APs
513 03:46:09.870563 Waiting for 10ms after sending INIT.
514 03:46:09.886770 Waiting for 1st SIPI to complete...done.
515 03:46:09.887335 AP: slot 3 apic_id 1.
516 03:46:09.893542 Waiting for 2nd SIPI to complete...done.
517 03:46:09.894118 AP: slot 6 apic_id 7.
518 03:46:09.896658 AP: slot 7 apic_id 6.
519 03:46:09.900276 AP: slot 1 apic_id 3.
520 03:46:09.900842 AP: slot 4 apic_id 2.
521 03:46:09.903310 AP: slot 2 apic_id 5.
522 03:46:09.907244 AP: slot 5 apic_id 4.
523 03:46:09.913814 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
524 03:46:09.920264 Processing 13 relocs. Offset value of 0x00038000
525 03:46:09.923333 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
526 03:46:09.929902 Installing SMM handler to 0x9a000000
527 03:46:09.936505 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
528 03:46:09.943517 Processing 658 relocs. Offset value of 0x9a010000
529 03:46:09.949625 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
530 03:46:09.952820 Processing 13 relocs. Offset value of 0x9a008000
531 03:46:09.959636 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
532 03:46:09.966436 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
533 03:46:09.973047 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
534 03:46:09.976196 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
535 03:46:09.982589 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
536 03:46:09.989377 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
537 03:46:09.992554 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
538 03:46:09.999344 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
539 03:46:10.002743 Clearing SMI status registers
540 03:46:10.006414 SMI_STS: PM1
541 03:46:10.006983 PM1_STS: PWRBTN
542 03:46:10.009771 TCO_STS: SECOND_TO
543 03:46:10.012996 New SMBASE 0x9a000000
544 03:46:10.016188 In relocation handler: CPU 0
545 03:46:10.020024 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
546 03:46:10.023368 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 03:46:10.026305 Relocation complete.
548 03:46:10.030001 New SMBASE 0x99fff400
549 03:46:10.030471 In relocation handler: CPU 3
550 03:46:10.036023 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
551 03:46:10.039618 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 03:46:10.042976 Relocation complete.
553 03:46:10.043546 New SMBASE 0x99ffe400
554 03:46:10.046397 In relocation handler: CPU 7
555 03:46:10.053348 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
556 03:46:10.056207 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 03:46:10.059412 Relocation complete.
558 03:46:10.059994 New SMBASE 0x99ffe800
559 03:46:10.062717 In relocation handler: CPU 6
560 03:46:10.072427 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
561 03:46:10.073374 Writing SMRR. base = 0x9a000006, mask=0xff000800
562 03:46:10.076616 Relocation complete.
563 03:46:10.077179 New SMBASE 0x99fff000
564 03:46:10.079599 In relocation handler: CPU 4
565 03:46:10.082692 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
566 03:46:10.090178 Writing SMRR. base = 0x9a000006, mask=0xff000800
567 03:46:10.092689 Relocation complete.
568 03:46:10.093256 New SMBASE 0x99fffc00
569 03:46:10.096211 In relocation handler: CPU 1
570 03:46:10.099828 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
571 03:46:10.106067 Writing SMRR. base = 0x9a000006, mask=0xff000800
572 03:46:10.109432 Relocation complete.
573 03:46:10.109904 New SMBASE 0x99ffec00
574 03:46:10.112532 In relocation handler: CPU 5
575 03:46:10.116112 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
576 03:46:10.122424 Writing SMRR. base = 0x9a000006, mask=0xff000800
577 03:46:10.122991 Relocation complete.
578 03:46:10.125769 New SMBASE 0x99fff800
579 03:46:10.129515 In relocation handler: CPU 2
580 03:46:10.132872 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
581 03:46:10.139402 Writing SMRR. base = 0x9a000006, mask=0xff000800
582 03:46:10.139971 Relocation complete.
583 03:46:10.142725 Initializing CPU #0
584 03:46:10.145912 CPU: vendor Intel device 806ec
585 03:46:10.149159 CPU: family 06, model 8e, stepping 0c
586 03:46:10.152833 Clearing out pending MCEs
587 03:46:10.156202 Setting up local APIC...
588 03:46:10.156766 apic_id: 0x00 done.
589 03:46:10.159098 Turbo is available but hidden
590 03:46:10.162892 Turbo is available and visible
591 03:46:10.165531 VMX status: enabled
592 03:46:10.169266 IA32_FEATURE_CONTROL status: locked
593 03:46:10.172437 Skip microcode update
594 03:46:10.172902 CPU #0 initialized
595 03:46:10.175684 Initializing CPU #3
596 03:46:10.176180 Initializing CPU #2
597 03:46:10.178969 Initializing CPU #5
598 03:46:10.182439 CPU: vendor Intel device 806ec
599 03:46:10.185534 CPU: family 06, model 8e, stepping 0c
600 03:46:10.189620 Initializing CPU #7
601 03:46:10.190199 Initializing CPU #6
602 03:46:10.192491 Clearing out pending MCEs
603 03:46:10.196142 CPU: vendor Intel device 806ec
604 03:46:10.199216 CPU: family 06, model 8e, stepping 0c
605 03:46:10.202360 Setting up local APIC...
606 03:46:10.206144 CPU: vendor Intel device 806ec
607 03:46:10.208772 CPU: family 06, model 8e, stepping 0c
608 03:46:10.212319 CPU: vendor Intel device 806ec
609 03:46:10.216121 CPU: family 06, model 8e, stepping 0c
610 03:46:10.218673 Clearing out pending MCEs
611 03:46:10.221854 Clearing out pending MCEs
612 03:46:10.225205 Setting up local APIC...
613 03:46:10.225673 Initializing CPU #1
614 03:46:10.228444 Initializing CPU #4
615 03:46:10.232203 CPU: vendor Intel device 806ec
616 03:46:10.236280 CPU: family 06, model 8e, stepping 0c
617 03:46:10.238854 CPU: vendor Intel device 806ec
618 03:46:10.242010 CPU: family 06, model 8e, stepping 0c
619 03:46:10.245433 Clearing out pending MCEs
620 03:46:10.248709 Clearing out pending MCEs
621 03:46:10.249283 Setting up local APIC...
622 03:46:10.251820 CPU: vendor Intel device 806ec
623 03:46:10.254994 CPU: family 06, model 8e, stepping 0c
624 03:46:10.258736 Clearing out pending MCEs
625 03:46:10.262367 Setting up local APIC...
626 03:46:10.265265 apic_id: 0x06 done.
627 03:46:10.265850 Setting up local APIC...
628 03:46:10.268738 Setting up local APIC...
629 03:46:10.272787 apic_id: 0x03 done.
630 03:46:10.273359 apic_id: 0x02 done.
631 03:46:10.274868 VMX status: enabled
632 03:46:10.278578 VMX status: enabled
633 03:46:10.282170 IA32_FEATURE_CONTROL status: locked
634 03:46:10.285059 IA32_FEATURE_CONTROL status: locked
635 03:46:10.288227 Skip microcode update
636 03:46:10.288796 Skip microcode update
637 03:46:10.291617 CPU #1 initialized
638 03:46:10.292286 CPU #4 initialized
639 03:46:10.295109 apic_id: 0x07 done.
640 03:46:10.298378 VMX status: enabled
641 03:46:10.298975 VMX status: enabled
642 03:46:10.301340 IA32_FEATURE_CONTROL status: locked
643 03:46:10.304817 IA32_FEATURE_CONTROL status: locked
644 03:46:10.308169 Skip microcode update
645 03:46:10.312015 Skip microcode update
646 03:46:10.312641 CPU #7 initialized
647 03:46:10.314795 CPU #6 initialized
648 03:46:10.318346 Clearing out pending MCEs
649 03:46:10.318916 apic_id: 0x05 done.
650 03:46:10.321315 Setting up local APIC...
651 03:46:10.324693 apic_id: 0x01 done.
652 03:46:10.325163 apic_id: 0x04 done.
653 03:46:10.327969 VMX status: enabled
654 03:46:10.331414 VMX status: enabled
655 03:46:10.334779 IA32_FEATURE_CONTROL status: locked
656 03:46:10.338129 IA32_FEATURE_CONTROL status: locked
657 03:46:10.341528 Skip microcode update
658 03:46:10.342097 Skip microcode update
659 03:46:10.345045 CPU #2 initialized
660 03:46:10.345513 CPU #5 initialized
661 03:46:10.348428 VMX status: enabled
662 03:46:10.351389 IA32_FEATURE_CONTROL status: locked
663 03:46:10.354455 Skip microcode update
664 03:46:10.354986 CPU #3 initialized
665 03:46:10.361310 bsp_do_flight_plan done after 466 msecs.
666 03:46:10.365427 CPU: frequency set to 4200 MHz
667 03:46:10.366008 Enabling SMIs.
668 03:46:10.366386 Locking SMM.
669 03:46:10.381096 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
670 03:46:10.384590 CBFS @ c08000 size 3f8000
671 03:46:10.390655 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
672 03:46:10.391216 CBFS: Locating 'vbt.bin'
673 03:46:10.394351 CBFS: Found @ offset 5f5c0 size 499
674 03:46:10.400890 Found a VBT of 4608 bytes after decompression
675 03:46:10.586174 Display FSP Version Info HOB
676 03:46:10.590204 Reference Code - CPU = 9.0.1e.30
677 03:46:10.592843 uCode Version = 0.0.0.ca
678 03:46:10.596244 TXT ACM version = ff.ff.ff.ffff
679 03:46:10.599816 Display FSP Version Info HOB
680 03:46:10.603090 Reference Code - ME = 9.0.1e.30
681 03:46:10.606321 MEBx version = 0.0.0.0
682 03:46:10.609346 ME Firmware Version = Consumer SKU
683 03:46:10.612704 Display FSP Version Info HOB
684 03:46:10.616014 Reference Code - CML PCH = 9.0.1e.30
685 03:46:10.619657 PCH-CRID Status = Disabled
686 03:46:10.622936 PCH-CRID Original Value = ff.ff.ff.ffff
687 03:46:10.626265 PCH-CRID New Value = ff.ff.ff.ffff
688 03:46:10.629823 OPROM - RST - RAID = ff.ff.ff.ffff
689 03:46:10.632548 ChipsetInit Base Version = ff.ff.ff.ffff
690 03:46:10.635984 ChipsetInit Oem Version = ff.ff.ff.ffff
691 03:46:10.639867 Display FSP Version Info HOB
692 03:46:10.646008 Reference Code - SA - System Agent = 9.0.1e.30
693 03:46:10.649269 Reference Code - MRC = 0.7.1.6c
694 03:46:10.649741 SA - PCIe Version = 9.0.1e.30
695 03:46:10.652844 SA-CRID Status = Disabled
696 03:46:10.656337 SA-CRID Original Value = 0.0.0.c
697 03:46:10.659483 SA-CRID New Value = 0.0.0.c
698 03:46:10.662960 OPROM - VBIOS = ff.ff.ff.ffff
699 03:46:10.663764 RTC Init
700 03:46:10.669997 Set power on after power failure.
701 03:46:10.670571 Disabling Deep S3
702 03:46:10.672895 Disabling Deep S3
703 03:46:10.673366 Disabling Deep S4
704 03:46:10.676177 Disabling Deep S4
705 03:46:10.676648 Disabling Deep S5
706 03:46:10.679226 Disabling Deep S5
707 03:46:10.685928 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
708 03:46:10.686494 Enumerating buses...
709 03:46:10.692661 Show all devs... Before device enumeration.
710 03:46:10.693134 Root Device: enabled 1
711 03:46:10.695994 CPU_CLUSTER: 0: enabled 1
712 03:46:10.698979 DOMAIN: 0000: enabled 1
713 03:46:10.699447 APIC: 00: enabled 1
714 03:46:10.702399 PCI: 00:00.0: enabled 1
715 03:46:10.705984 PCI: 00:02.0: enabled 1
716 03:46:10.709453 PCI: 00:04.0: enabled 0
717 03:46:10.710068 PCI: 00:05.0: enabled 0
718 03:46:10.712683 PCI: 00:12.0: enabled 1
719 03:46:10.716130 PCI: 00:12.5: enabled 0
720 03:46:10.719395 PCI: 00:12.6: enabled 0
721 03:46:10.719961 PCI: 00:14.0: enabled 1
722 03:46:10.722569 PCI: 00:14.1: enabled 0
723 03:46:10.725779 PCI: 00:14.3: enabled 1
724 03:46:10.729677 PCI: 00:14.5: enabled 0
725 03:46:10.730266 PCI: 00:15.0: enabled 1
726 03:46:10.732513 PCI: 00:15.1: enabled 1
727 03:46:10.736319 PCI: 00:15.2: enabled 0
728 03:46:10.736785 PCI: 00:15.3: enabled 0
729 03:46:10.739368 PCI: 00:16.0: enabled 1
730 03:46:10.742934 PCI: 00:16.1: enabled 0
731 03:46:10.745863 PCI: 00:16.2: enabled 0
732 03:46:10.746334 PCI: 00:16.3: enabled 0
733 03:46:10.748961 PCI: 00:16.4: enabled 0
734 03:46:10.752608 PCI: 00:16.5: enabled 0
735 03:46:10.755652 PCI: 00:17.0: enabled 1
736 03:46:10.756255 PCI: 00:19.0: enabled 1
737 03:46:10.759559 PCI: 00:19.1: enabled 0
738 03:46:10.762505 PCI: 00:19.2: enabled 0
739 03:46:10.765787 PCI: 00:1a.0: enabled 0
740 03:46:10.766357 PCI: 00:1c.0: enabled 0
741 03:46:10.769479 PCI: 00:1c.1: enabled 0
742 03:46:10.772742 PCI: 00:1c.2: enabled 0
743 03:46:10.773313 PCI: 00:1c.3: enabled 0
744 03:46:10.775594 PCI: 00:1c.4: enabled 0
745 03:46:10.779273 PCI: 00:1c.5: enabled 0
746 03:46:10.782053 PCI: 00:1c.6: enabled 0
747 03:46:10.782712 PCI: 00:1c.7: enabled 0
748 03:46:10.785517 PCI: 00:1d.0: enabled 1
749 03:46:10.788692 PCI: 00:1d.1: enabled 0
750 03:46:10.792330 PCI: 00:1d.2: enabled 0
751 03:46:10.792897 PCI: 00:1d.3: enabled 0
752 03:46:10.795504 PCI: 00:1d.4: enabled 0
753 03:46:10.798705 PCI: 00:1d.5: enabled 1
754 03:46:10.802027 PCI: 00:1e.0: enabled 1
755 03:46:10.802501 PCI: 00:1e.1: enabled 0
756 03:46:10.805424 PCI: 00:1e.2: enabled 1
757 03:46:10.808886 PCI: 00:1e.3: enabled 1
758 03:46:10.812165 PCI: 00:1f.0: enabled 1
759 03:46:10.812639 PCI: 00:1f.1: enabled 1
760 03:46:10.815456 PCI: 00:1f.2: enabled 1
761 03:46:10.819072 PCI: 00:1f.3: enabled 1
762 03:46:10.819644 PCI: 00:1f.4: enabled 1
763 03:46:10.822373 PCI: 00:1f.5: enabled 1
764 03:46:10.825542 PCI: 00:1f.6: enabled 0
765 03:46:10.828245 USB0 port 0: enabled 1
766 03:46:10.828712 I2C: 00:15: enabled 1
767 03:46:10.831636 I2C: 00:5d: enabled 1
768 03:46:10.836100 GENERIC: 0.0: enabled 1
769 03:46:10.836679 I2C: 00:1a: enabled 1
770 03:46:10.838428 I2C: 00:38: enabled 1
771 03:46:10.841974 I2C: 00:39: enabled 1
772 03:46:10.842550 I2C: 00:3a: enabled 1
773 03:46:10.845655 I2C: 00:3b: enabled 1
774 03:46:10.848476 PCI: 00:00.0: enabled 1
775 03:46:10.848949 SPI: 00: enabled 1
776 03:46:10.851941 SPI: 01: enabled 1
777 03:46:10.855197 PNP: 0c09.0: enabled 1
778 03:46:10.855803 USB2 port 0: enabled 1
779 03:46:10.858757 USB2 port 1: enabled 1
780 03:46:10.862181 USB2 port 2: enabled 0
781 03:46:10.864756 USB2 port 3: enabled 0
782 03:46:10.865225 USB2 port 5: enabled 0
783 03:46:10.868640 USB2 port 6: enabled 1
784 03:46:10.871893 USB2 port 9: enabled 1
785 03:46:10.872505 USB3 port 0: enabled 1
786 03:46:10.875014 USB3 port 1: enabled 1
787 03:46:10.878619 USB3 port 2: enabled 1
788 03:46:10.879190 USB3 port 3: enabled 1
789 03:46:10.881660 USB3 port 4: enabled 0
790 03:46:10.884891 APIC: 03: enabled 1
791 03:46:10.885467 APIC: 05: enabled 1
792 03:46:10.888672 APIC: 01: enabled 1
793 03:46:10.891902 APIC: 02: enabled 1
794 03:46:10.892506 APIC: 04: enabled 1
795 03:46:10.894803 APIC: 07: enabled 1
796 03:46:10.895379 APIC: 06: enabled 1
797 03:46:10.898185 Compare with tree...
798 03:46:10.901214 Root Device: enabled 1
799 03:46:10.905643 CPU_CLUSTER: 0: enabled 1
800 03:46:10.906117 APIC: 00: enabled 1
801 03:46:10.907792 APIC: 03: enabled 1
802 03:46:10.911378 APIC: 05: enabled 1
803 03:46:10.911848 APIC: 01: enabled 1
804 03:46:10.914632 APIC: 02: enabled 1
805 03:46:10.918168 APIC: 04: enabled 1
806 03:46:10.918740 APIC: 07: enabled 1
807 03:46:10.921135 APIC: 06: enabled 1
808 03:46:10.924652 DOMAIN: 0000: enabled 1
809 03:46:10.928195 PCI: 00:00.0: enabled 1
810 03:46:10.928671 PCI: 00:02.0: enabled 1
811 03:46:10.931153 PCI: 00:04.0: enabled 0
812 03:46:10.934769 PCI: 00:05.0: enabled 0
813 03:46:10.937998 PCI: 00:12.0: enabled 1
814 03:46:10.940845 PCI: 00:12.5: enabled 0
815 03:46:10.941315 PCI: 00:12.6: enabled 0
816 03:46:10.944771 PCI: 00:14.0: enabled 1
817 03:46:10.948189 USB0 port 0: enabled 1
818 03:46:10.951386 USB2 port 0: enabled 1
819 03:46:10.954570 USB2 port 1: enabled 1
820 03:46:10.955140 USB2 port 2: enabled 0
821 03:46:10.957962 USB2 port 3: enabled 0
822 03:46:10.961802 USB2 port 5: enabled 0
823 03:46:10.964226 USB2 port 6: enabled 1
824 03:46:10.967867 USB2 port 9: enabled 1
825 03:46:10.971463 USB3 port 0: enabled 1
826 03:46:10.972131 USB3 port 1: enabled 1
827 03:46:10.974599 USB3 port 2: enabled 1
828 03:46:10.978243 USB3 port 3: enabled 1
829 03:46:10.980819 USB3 port 4: enabled 0
830 03:46:10.984585 PCI: 00:14.1: enabled 0
831 03:46:10.985158 PCI: 00:14.3: enabled 1
832 03:46:10.987571 PCI: 00:14.5: enabled 0
833 03:46:10.991331 PCI: 00:15.0: enabled 1
834 03:46:10.994949 I2C: 00:15: enabled 1
835 03:46:10.997447 PCI: 00:15.1: enabled 1
836 03:46:10.998018 I2C: 00:5d: enabled 1
837 03:46:11.000892 GENERIC: 0.0: enabled 1
838 03:46:11.004241 PCI: 00:15.2: enabled 0
839 03:46:11.007822 PCI: 00:15.3: enabled 0
840 03:46:11.010635 PCI: 00:16.0: enabled 1
841 03:46:11.011112 PCI: 00:16.1: enabled 0
842 03:46:11.013887 PCI: 00:16.2: enabled 0
843 03:46:11.017223 PCI: 00:16.3: enabled 0
844 03:46:11.020772 PCI: 00:16.4: enabled 0
845 03:46:11.021245 PCI: 00:16.5: enabled 0
846 03:46:11.023879 PCI: 00:17.0: enabled 1
847 03:46:11.027391 PCI: 00:19.0: enabled 1
848 03:46:11.030607 I2C: 00:1a: enabled 1
849 03:46:11.033782 I2C: 00:38: enabled 1
850 03:46:11.034423 I2C: 00:39: enabled 1
851 03:46:11.037138 I2C: 00:3a: enabled 1
852 03:46:11.040446 I2C: 00:3b: enabled 1
853 03:46:11.043675 PCI: 00:19.1: enabled 0
854 03:46:11.044186 PCI: 00:19.2: enabled 0
855 03:46:11.047044 PCI: 00:1a.0: enabled 0
856 03:46:11.050520 PCI: 00:1c.0: enabled 0
857 03:46:11.053612 PCI: 00:1c.1: enabled 0
858 03:46:11.057768 PCI: 00:1c.2: enabled 0
859 03:46:11.058334 PCI: 00:1c.3: enabled 0
860 03:46:11.060503 PCI: 00:1c.4: enabled 0
861 03:46:11.063712 PCI: 00:1c.5: enabled 0
862 03:46:11.067596 PCI: 00:1c.6: enabled 0
863 03:46:11.070756 PCI: 00:1c.7: enabled 0
864 03:46:11.071321 PCI: 00:1d.0: enabled 1
865 03:46:11.074444 PCI: 00:1d.1: enabled 0
866 03:46:11.076682 PCI: 00:1d.2: enabled 0
867 03:46:11.080478 PCI: 00:1d.3: enabled 0
868 03:46:11.083819 PCI: 00:1d.4: enabled 0
869 03:46:11.084433 PCI: 00:1d.5: enabled 1
870 03:46:11.086847 PCI: 00:00.0: enabled 1
871 03:46:11.090737 PCI: 00:1e.0: enabled 1
872 03:46:11.093883 PCI: 00:1e.1: enabled 0
873 03:46:11.097482 PCI: 00:1e.2: enabled 1
874 03:46:11.098053 SPI: 00: enabled 1
875 03:46:11.100381 PCI: 00:1e.3: enabled 1
876 03:46:11.103843 SPI: 01: enabled 1
877 03:46:11.107390 PCI: 00:1f.0: enabled 1
878 03:46:11.107958 PNP: 0c09.0: enabled 1
879 03:46:11.110031 PCI: 00:1f.1: enabled 1
880 03:46:11.113147 PCI: 00:1f.2: enabled 1
881 03:46:11.116694 PCI: 00:1f.3: enabled 1
882 03:46:11.117162 PCI: 00:1f.4: enabled 1
883 03:46:11.120114 PCI: 00:1f.5: enabled 1
884 03:46:11.123579 PCI: 00:1f.6: enabled 0
885 03:46:11.126690 Root Device scanning...
886 03:46:11.129762 scan_static_bus for Root Device
887 03:46:11.133345 CPU_CLUSTER: 0 enabled
888 03:46:11.133812 DOMAIN: 0000 enabled
889 03:46:11.136588 DOMAIN: 0000 scanning...
890 03:46:11.139841 PCI: pci_scan_bus for bus 00
891 03:46:11.143105 PCI: 00:00.0 [8086/0000] ops
892 03:46:11.146977 PCI: 00:00.0 [8086/9b61] enabled
893 03:46:11.150347 PCI: 00:02.0 [8086/0000] bus ops
894 03:46:11.154287 PCI: 00:02.0 [8086/9b41] enabled
895 03:46:11.156672 PCI: 00:04.0 [8086/1903] disabled
896 03:46:11.160326 PCI: 00:08.0 [8086/1911] enabled
897 03:46:11.163458 PCI: 00:12.0 [8086/02f9] enabled
898 03:46:11.166873 PCI: 00:14.0 [8086/0000] bus ops
899 03:46:11.170133 PCI: 00:14.0 [8086/02ed] enabled
900 03:46:11.173137 PCI: 00:14.2 [8086/02ef] enabled
901 03:46:11.176715 PCI: 00:14.3 [8086/02f0] enabled
902 03:46:11.180009 PCI: 00:15.0 [8086/0000] bus ops
903 03:46:11.183613 PCI: 00:15.0 [8086/02e8] enabled
904 03:46:11.186503 PCI: 00:15.1 [8086/0000] bus ops
905 03:46:11.190162 PCI: 00:15.1 [8086/02e9] enabled
906 03:46:11.192982 PCI: 00:16.0 [8086/0000] ops
907 03:46:11.196581 PCI: 00:16.0 [8086/02e0] enabled
908 03:46:11.199794 PCI: 00:17.0 [8086/0000] ops
909 03:46:11.203111 PCI: 00:17.0 [8086/02d3] enabled
910 03:46:11.207251 PCI: 00:19.0 [8086/0000] bus ops
911 03:46:11.209849 PCI: 00:19.0 [8086/02c5] enabled
912 03:46:11.212756 PCI: 00:1d.0 [8086/0000] bus ops
913 03:46:11.216940 PCI: 00:1d.0 [8086/02b0] enabled
914 03:46:11.220678 PCI: Static device PCI: 00:1d.5 not found, disabling it.
915 03:46:11.223206 PCI: 00:1e.0 [8086/0000] ops
916 03:46:11.226627 PCI: 00:1e.0 [8086/02a8] enabled
917 03:46:11.229651 PCI: 00:1e.2 [8086/0000] bus ops
918 03:46:11.232937 PCI: 00:1e.2 [8086/02aa] enabled
919 03:46:11.236454 PCI: 00:1e.3 [8086/0000] bus ops
920 03:46:11.239718 PCI: 00:1e.3 [8086/02ab] enabled
921 03:46:11.243301 PCI: 00:1f.0 [8086/0000] bus ops
922 03:46:11.246067 PCI: 00:1f.0 [8086/0284] enabled
923 03:46:11.253511 PCI: Static device PCI: 00:1f.1 not found, disabling it.
924 03:46:11.259716 PCI: Static device PCI: 00:1f.2 not found, disabling it.
925 03:46:11.262954 PCI: 00:1f.3 [8086/0000] bus ops
926 03:46:11.265991 PCI: 00:1f.3 [8086/02c8] enabled
927 03:46:11.269311 PCI: 00:1f.4 [8086/0000] bus ops
928 03:46:11.272922 PCI: 00:1f.4 [8086/02a3] enabled
929 03:46:11.276701 PCI: 00:1f.5 [8086/0000] bus ops
930 03:46:11.280092 PCI: 00:1f.5 [8086/02a4] enabled
931 03:46:11.282930 PCI: Leftover static devices:
932 03:46:11.283497 PCI: 00:05.0
933 03:46:11.283866 PCI: 00:12.5
934 03:46:11.286603 PCI: 00:12.6
935 03:46:11.287180 PCI: 00:14.1
936 03:46:11.289475 PCI: 00:14.5
937 03:46:11.290044 PCI: 00:15.2
938 03:46:11.292997 PCI: 00:15.3
939 03:46:11.293566 PCI: 00:16.1
940 03:46:11.293938 PCI: 00:16.2
941 03:46:11.296361 PCI: 00:16.3
942 03:46:11.296929 PCI: 00:16.4
943 03:46:11.299736 PCI: 00:16.5
944 03:46:11.300347 PCI: 00:19.1
945 03:46:11.300721 PCI: 00:19.2
946 03:46:11.303218 PCI: 00:1a.0
947 03:46:11.303786 PCI: 00:1c.0
948 03:46:11.306224 PCI: 00:1c.1
949 03:46:11.306794 PCI: 00:1c.2
950 03:46:11.307166 PCI: 00:1c.3
951 03:46:11.309541 PCI: 00:1c.4
952 03:46:11.310008 PCI: 00:1c.5
953 03:46:11.312609 PCI: 00:1c.6
954 03:46:11.313074 PCI: 00:1c.7
955 03:46:11.316163 PCI: 00:1d.1
956 03:46:11.316737 PCI: 00:1d.2
957 03:46:11.317167 PCI: 00:1d.3
958 03:46:11.319383 PCI: 00:1d.4
959 03:46:11.319845 PCI: 00:1d.5
960 03:46:11.322522 PCI: 00:1e.1
961 03:46:11.322986 PCI: 00:1f.1
962 03:46:11.323421 PCI: 00:1f.2
963 03:46:11.326024 PCI: 00:1f.6
964 03:46:11.328844 PCI: Check your devicetree.cb.
965 03:46:11.332645 PCI: 00:02.0 scanning...
966 03:46:11.335891 scan_generic_bus for PCI: 00:02.0
967 03:46:11.339095 scan_generic_bus for PCI: 00:02.0 done
968 03:46:11.342781 scan_bus: scanning of bus PCI: 00:02.0 took 10183 usecs
969 03:46:11.345964 PCI: 00:14.0 scanning...
970 03:46:11.348990 scan_static_bus for PCI: 00:14.0
971 03:46:11.352288 USB0 port 0 enabled
972 03:46:11.355730 USB0 port 0 scanning...
973 03:46:11.358842 scan_static_bus for USB0 port 0
974 03:46:11.359421 USB2 port 0 enabled
975 03:46:11.362574 USB2 port 1 enabled
976 03:46:11.365967 USB2 port 2 disabled
977 03:46:11.366436 USB2 port 3 disabled
978 03:46:11.368643 USB2 port 5 disabled
979 03:46:11.372243 USB2 port 6 enabled
980 03:46:11.372809 USB2 port 9 enabled
981 03:46:11.375201 USB3 port 0 enabled
982 03:46:11.375670 USB3 port 1 enabled
983 03:46:11.379864 USB3 port 2 enabled
984 03:46:11.382704 USB3 port 3 enabled
985 03:46:11.383276 USB3 port 4 disabled
986 03:46:11.385633 USB2 port 0 scanning...
987 03:46:11.388840 scan_static_bus for USB2 port 0
988 03:46:11.392398 scan_static_bus for USB2 port 0 done
989 03:46:11.398918 scan_bus: scanning of bus USB2 port 0 took 9712 usecs
990 03:46:11.402644 USB2 port 1 scanning...
991 03:46:11.405819 scan_static_bus for USB2 port 1
992 03:46:11.408573 scan_static_bus for USB2 port 1 done
993 03:46:11.411805 scan_bus: scanning of bus USB2 port 1 took 9694 usecs
994 03:46:11.415473 USB2 port 6 scanning...
995 03:46:11.419199 scan_static_bus for USB2 port 6
996 03:46:11.421909 scan_static_bus for USB2 port 6 done
997 03:46:11.428570 scan_bus: scanning of bus USB2 port 6 took 9712 usecs
998 03:46:11.431847 USB2 port 9 scanning...
999 03:46:11.435056 scan_static_bus for USB2 port 9
1000 03:46:11.438437 scan_static_bus for USB2 port 9 done
1001 03:46:11.442189 scan_bus: scanning of bus USB2 port 9 took 9700 usecs
1002 03:46:11.444782 USB3 port 0 scanning...
1003 03:46:11.448313 scan_static_bus for USB3 port 0
1004 03:46:11.451863 scan_static_bus for USB3 port 0 done
1005 03:46:11.458076 scan_bus: scanning of bus USB3 port 0 took 9709 usecs
1006 03:46:11.461609 USB3 port 1 scanning...
1007 03:46:11.465055 scan_static_bus for USB3 port 1
1008 03:46:11.468454 scan_static_bus for USB3 port 1 done
1009 03:46:11.471335 scan_bus: scanning of bus USB3 port 1 took 9709 usecs
1010 03:46:11.475283 USB3 port 2 scanning...
1011 03:46:11.478666 scan_static_bus for USB3 port 2
1012 03:46:11.481446 scan_static_bus for USB3 port 2 done
1013 03:46:11.488304 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
1014 03:46:11.491419 USB3 port 3 scanning...
1015 03:46:11.494842 scan_static_bus for USB3 port 3
1016 03:46:11.497716 scan_static_bus for USB3 port 3 done
1017 03:46:11.504807 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
1018 03:46:11.508029 scan_static_bus for USB0 port 0 done
1019 03:46:11.511384 scan_bus: scanning of bus USB0 port 0 took 155419 usecs
1020 03:46:11.515300 scan_static_bus for PCI: 00:14.0 done
1021 03:46:11.521584 scan_bus: scanning of bus PCI: 00:14.0 took 173054 usecs
1022 03:46:11.524596 PCI: 00:15.0 scanning...
1023 03:46:11.528092 scan_generic_bus for PCI: 00:15.0
1024 03:46:11.531744 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1025 03:46:11.534934 scan_generic_bus for PCI: 00:15.0 done
1026 03:46:11.542114 scan_bus: scanning of bus PCI: 00:15.0 took 14325 usecs
1027 03:46:11.544630 PCI: 00:15.1 scanning...
1028 03:46:11.548487 scan_generic_bus for PCI: 00:15.1
1029 03:46:11.551542 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1030 03:46:11.557889 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1031 03:46:11.561319 scan_generic_bus for PCI: 00:15.1 done
1032 03:46:11.565282 scan_bus: scanning of bus PCI: 00:15.1 took 18613 usecs
1033 03:46:11.568287 PCI: 00:19.0 scanning...
1034 03:46:11.570895 scan_generic_bus for PCI: 00:19.0
1035 03:46:11.574569 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1036 03:46:11.580980 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1037 03:46:11.584038 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1038 03:46:11.587648 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1039 03:46:11.591046 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1040 03:46:11.597491 scan_generic_bus for PCI: 00:19.0 done
1041 03:46:11.601375 scan_bus: scanning of bus PCI: 00:19.0 took 30750 usecs
1042 03:46:11.604110 PCI: 00:1d.0 scanning...
1043 03:46:11.607549 do_pci_scan_bridge for PCI: 00:1d.0
1044 03:46:11.610806 PCI: pci_scan_bus for bus 01
1045 03:46:11.614017 PCI: 01:00.0 [1c5c/1327] enabled
1046 03:46:11.617887 Enabling Common Clock Configuration
1047 03:46:11.624321 L1 Sub-State supported from root port 29
1048 03:46:11.624863 L1 Sub-State Support = 0xf
1049 03:46:11.627707 CommonModeRestoreTime = 0x28
1050 03:46:11.633959 Power On Value = 0x16, Power On Scale = 0x0
1051 03:46:11.634420 ASPM: Enabled L1
1052 03:46:11.640689 scan_bus: scanning of bus PCI: 00:1d.0 took 32800 usecs
1053 03:46:11.644782 PCI: 00:1e.2 scanning...
1054 03:46:11.647228 scan_generic_bus for PCI: 00:1e.2
1055 03:46:11.650848 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1056 03:46:11.654075 scan_generic_bus for PCI: 00:1e.2 done
1057 03:46:11.660669 scan_bus: scanning of bus PCI: 00:1e.2 took 14020 usecs
1058 03:46:11.661226 PCI: 00:1e.3 scanning...
1059 03:46:11.668169 scan_generic_bus for PCI: 00:1e.3
1060 03:46:11.670974 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1061 03:46:11.673768 scan_generic_bus for PCI: 00:1e.3 done
1062 03:46:11.680427 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
1063 03:46:11.680885 PCI: 00:1f.0 scanning...
1064 03:46:11.683489 scan_static_bus for PCI: 00:1f.0
1065 03:46:11.687084 PNP: 0c09.0 enabled
1066 03:46:11.690063 scan_static_bus for PCI: 00:1f.0 done
1067 03:46:11.696770 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1068 03:46:11.700453 PCI: 00:1f.3 scanning...
1069 03:46:11.704141 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1070 03:46:11.706857 PCI: 00:1f.4 scanning...
1071 03:46:11.709975 scan_generic_bus for PCI: 00:1f.4
1072 03:46:11.713543 scan_generic_bus for PCI: 00:1f.4 done
1073 03:46:11.720104 scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs
1074 03:46:11.723579 PCI: 00:1f.5 scanning...
1075 03:46:11.726580 scan_generic_bus for PCI: 00:1f.5
1076 03:46:11.730157 scan_generic_bus for PCI: 00:1f.5 done
1077 03:46:11.736956 scan_bus: scanning of bus PCI: 00:1f.5 took 10207 usecs
1078 03:46:11.743624 scan_bus: scanning of bus DOMAIN: 0000 took 605350 usecs
1079 03:46:11.746720 scan_static_bus for Root Device done
1080 03:46:11.749716 scan_bus: scanning of bus Root Device took 625231 usecs
1081 03:46:11.753493 done
1082 03:46:11.756025 Chrome EC: UHEPI supported
1083 03:46:11.760425 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1084 03:46:11.766579 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1085 03:46:11.773104 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1086 03:46:11.779811 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1087 03:46:11.783222 SPI flash protection: WPSW=0 SRP0=0
1088 03:46:11.789474 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1089 03:46:11.793150 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1090 03:46:11.796359 found VGA at PCI: 00:02.0
1091 03:46:11.799694 Setting up VGA for PCI: 00:02.0
1092 03:46:11.806724 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1093 03:46:11.809509 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1094 03:46:11.812511 Allocating resources...
1095 03:46:11.815990 Reading resources...
1096 03:46:11.819362 Root Device read_resources bus 0 link: 0
1097 03:46:11.822944 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1098 03:46:11.828953 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1099 03:46:11.832385 DOMAIN: 0000 read_resources bus 0 link: 0
1100 03:46:11.839859 PCI: 00:14.0 read_resources bus 0 link: 0
1101 03:46:11.842970 USB0 port 0 read_resources bus 0 link: 0
1102 03:46:11.851101 USB0 port 0 read_resources bus 0 link: 0 done
1103 03:46:11.854370 PCI: 00:14.0 read_resources bus 0 link: 0 done
1104 03:46:11.862158 PCI: 00:15.0 read_resources bus 1 link: 0
1105 03:46:11.865597 PCI: 00:15.0 read_resources bus 1 link: 0 done
1106 03:46:11.871877 PCI: 00:15.1 read_resources bus 2 link: 0
1107 03:46:11.875081 PCI: 00:15.1 read_resources bus 2 link: 0 done
1108 03:46:11.882666 PCI: 00:19.0 read_resources bus 3 link: 0
1109 03:46:11.889224 PCI: 00:19.0 read_resources bus 3 link: 0 done
1110 03:46:11.892494 PCI: 00:1d.0 read_resources bus 1 link: 0
1111 03:46:11.899700 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1112 03:46:11.902425 PCI: 00:1e.2 read_resources bus 4 link: 0
1113 03:46:11.908970 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1114 03:46:11.912286 PCI: 00:1e.3 read_resources bus 5 link: 0
1115 03:46:11.919228 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1116 03:46:11.922469 PCI: 00:1f.0 read_resources bus 0 link: 0
1117 03:46:11.928820 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1118 03:46:11.935498 DOMAIN: 0000 read_resources bus 0 link: 0 done
1119 03:46:11.939054 Root Device read_resources bus 0 link: 0 done
1120 03:46:11.941975 Done reading resources.
1121 03:46:11.948567 Show resources in subtree (Root Device)...After reading.
1122 03:46:11.951997 Root Device child on link 0 CPU_CLUSTER: 0
1123 03:46:11.955396 CPU_CLUSTER: 0 child on link 0 APIC: 00
1124 03:46:11.958340 APIC: 00
1125 03:46:11.958797 APIC: 03
1126 03:46:11.959208 APIC: 05
1127 03:46:11.962150 APIC: 01
1128 03:46:11.962708 APIC: 02
1129 03:46:11.963163 APIC: 04
1130 03:46:11.965281 APIC: 07
1131 03:46:11.965837 APIC: 06
1132 03:46:11.972204 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1133 03:46:12.025628 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1134 03:46:12.026201 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1135 03:46:12.026939 PCI: 00:00.0
1136 03:46:12.027309 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1137 03:46:12.027711 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1138 03:46:12.028087 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1139 03:46:12.051039 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1140 03:46:12.052034 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1141 03:46:12.052489 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1142 03:46:12.058256 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1143 03:46:12.064840 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1144 03:46:12.075352 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1145 03:46:12.084546 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1146 03:46:12.095232 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1147 03:46:12.104898 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1148 03:46:12.111640 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1149 03:46:12.121457 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1150 03:46:12.131369 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1151 03:46:12.141599 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1152 03:46:12.142154 PCI: 00:02.0
1153 03:46:12.154276 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 03:46:12.164216 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 03:46:12.170714 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 03:46:12.174309 PCI: 00:04.0
1157 03:46:12.174856 PCI: 00:08.0
1158 03:46:12.184178 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 03:46:12.187831 PCI: 00:12.0
1160 03:46:12.197430 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 03:46:12.200722 PCI: 00:14.0 child on link 0 USB0 port 0
1162 03:46:12.210840 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 03:46:12.213731 USB0 port 0 child on link 0 USB2 port 0
1164 03:46:12.217373 USB2 port 0
1165 03:46:12.217920 USB2 port 1
1166 03:46:12.220983 USB2 port 2
1167 03:46:12.221533 USB2 port 3
1168 03:46:12.224124 USB2 port 5
1169 03:46:12.227413 USB2 port 6
1170 03:46:12.227962 USB2 port 9
1171 03:46:12.230558 USB3 port 0
1172 03:46:12.231107 USB3 port 1
1173 03:46:12.233892 USB3 port 2
1174 03:46:12.234351 USB3 port 3
1175 03:46:12.236956 USB3 port 4
1176 03:46:12.237412 PCI: 00:14.2
1177 03:46:12.247087 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1178 03:46:12.257225 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 03:46:12.260698 PCI: 00:14.3
1180 03:46:12.270244 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 03:46:12.273680 PCI: 00:15.0 child on link 0 I2C: 01:15
1182 03:46:12.283204 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 03:46:12.283669 I2C: 01:15
1184 03:46:12.290231 PCI: 00:15.1 child on link 0 I2C: 02:5d
1185 03:46:12.300279 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 03:46:12.300843 I2C: 02:5d
1187 03:46:12.303191 GENERIC: 0.0
1188 03:46:12.303647 PCI: 00:16.0
1189 03:46:12.313923 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 03:46:12.316785 PCI: 00:17.0
1191 03:46:12.326561 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1192 03:46:12.333144 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1193 03:46:12.343543 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1194 03:46:12.350107 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1195 03:46:12.359619 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1196 03:46:12.366407 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1197 03:46:12.373983 PCI: 00:19.0 child on link 0 I2C: 03:1a
1198 03:46:12.382994 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 03:46:12.383468 I2C: 03:1a
1200 03:46:12.386369 I2C: 03:38
1201 03:46:12.386927 I2C: 03:39
1202 03:46:12.389762 I2C: 03:3a
1203 03:46:12.390321 I2C: 03:3b
1204 03:46:12.393090 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1205 03:46:12.403192 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1206 03:46:12.413241 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1207 03:46:12.422766 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1208 03:46:12.423327 PCI: 01:00.0
1209 03:46:12.433715 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 03:46:12.436037 PCI: 00:1e.0
1211 03:46:12.446420 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 03:46:12.455961 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1213 03:46:12.459389 PCI: 00:1e.2 child on link 0 SPI: 00
1214 03:46:12.469356 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 03:46:12.472517 SPI: 00
1216 03:46:12.475962 PCI: 00:1e.3 child on link 0 SPI: 01
1217 03:46:12.486143 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 03:46:12.486691 SPI: 01
1219 03:46:12.492465 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 03:46:12.499137 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 03:46:12.508921 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1222 03:46:12.509554 PNP: 0c09.0
1223 03:46:12.519678 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1224 03:46:12.522572 PCI: 00:1f.3
1225 03:46:12.532351 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 03:46:12.542015 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 03:46:12.542572 PCI: 00:1f.4
1228 03:46:12.552590 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1229 03:46:12.562040 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1230 03:46:12.562608 PCI: 00:1f.5
1231 03:46:12.572088 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 03:46:12.578599 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1233 03:46:12.584925 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1234 03:46:12.592349 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1235 03:46:12.595476 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1236 03:46:12.598513 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1237 03:46:12.601902 PCI: 00:17.0 18 * [0x60 - 0x67] io
1238 03:46:12.605384 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1239 03:46:12.611630 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1240 03:46:12.618648 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1241 03:46:12.628551 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1242 03:46:12.634955 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1243 03:46:12.641332 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1244 03:46:12.644682 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1245 03:46:12.654427 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 03:46:12.657797 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1247 03:46:12.664608 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1248 03:46:12.668004 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1249 03:46:12.674743 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1250 03:46:12.678171 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1251 03:46:12.684810 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1252 03:46:12.687884 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1253 03:46:12.694789 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1254 03:46:12.697683 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1255 03:46:12.701055 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1256 03:46:12.707672 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1257 03:46:12.711130 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1258 03:46:12.717664 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1259 03:46:12.721350 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1260 03:46:12.727520 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1261 03:46:12.731045 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1262 03:46:12.737670 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1263 03:46:12.740851 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1264 03:46:12.747077 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1265 03:46:12.750675 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1266 03:46:12.757046 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1267 03:46:12.760635 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1268 03:46:12.768106 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1269 03:46:12.774465 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1270 03:46:12.777419 avoid_fixed_resources: DOMAIN: 0000
1271 03:46:12.784046 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1272 03:46:12.790849 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1273 03:46:12.796955 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1274 03:46:12.803556 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1275 03:46:12.813616 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1276 03:46:12.820880 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1277 03:46:12.826925 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1278 03:46:12.837426 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 03:46:12.844502 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1280 03:46:12.850583 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1281 03:46:12.859941 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1282 03:46:12.866803 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1283 03:46:12.867354 Setting resources...
1284 03:46:12.873253 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1285 03:46:12.877059 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1286 03:46:12.883675 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1287 03:46:12.886831 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1288 03:46:12.889825 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1289 03:46:12.896602 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1290 03:46:12.903034 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1291 03:46:12.910295 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1292 03:46:12.916191 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1293 03:46:12.923099 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1294 03:46:12.926429 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1295 03:46:12.932702 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1296 03:46:12.936694 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1297 03:46:12.942650 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1298 03:46:12.946555 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1299 03:46:12.950040 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1300 03:46:12.956264 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1301 03:46:12.960031 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1302 03:46:12.966304 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1303 03:46:12.969510 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1304 03:46:12.976774 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1305 03:46:12.979404 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1306 03:46:12.985988 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1307 03:46:12.989818 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1308 03:46:12.996649 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1309 03:46:12.998939 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1310 03:46:13.006469 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1311 03:46:13.009242 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1312 03:46:13.015957 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1313 03:46:13.019458 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1314 03:46:13.023439 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1315 03:46:13.029143 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1316 03:46:13.035960 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1317 03:46:13.042463 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1318 03:46:13.052737 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1319 03:46:13.059184 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1320 03:46:13.062661 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1321 03:46:13.072417 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1322 03:46:13.075456 Root Device assign_resources, bus 0 link: 0
1323 03:46:13.078719 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 03:46:13.088683 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1325 03:46:13.095695 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1326 03:46:13.105659 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1327 03:46:13.112243 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1328 03:46:13.121984 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1329 03:46:13.128295 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1330 03:46:13.135289 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 03:46:13.138042 PCI: 00:14.0 assign_resources, bus 0 link: 0
1332 03:46:13.148215 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1333 03:46:13.155265 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1334 03:46:13.161945 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1335 03:46:13.171676 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1336 03:46:13.174872 PCI: 00:15.0 assign_resources, bus 1 link: 0
1337 03:46:13.181390 PCI: 00:15.0 assign_resources, bus 1 link: 0
1338 03:46:13.188220 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1339 03:46:13.194849 PCI: 00:15.1 assign_resources, bus 2 link: 0
1340 03:46:13.198301 PCI: 00:15.1 assign_resources, bus 2 link: 0
1341 03:46:13.208174 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1342 03:46:13.214943 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1343 03:46:13.221136 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1344 03:46:13.231293 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1345 03:46:13.237740 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1346 03:46:13.244681 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1347 03:46:13.254545 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1348 03:46:13.261333 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1349 03:46:13.267374 PCI: 00:19.0 assign_resources, bus 3 link: 0
1350 03:46:13.271163 PCI: 00:19.0 assign_resources, bus 3 link: 0
1351 03:46:13.280634 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1352 03:46:13.287557 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 03:46:13.297685 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1354 03:46:13.300653 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 03:46:13.310606 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1356 03:46:13.313637 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1357 03:46:13.323412 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1358 03:46:13.330036 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1359 03:46:13.336939 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1360 03:46:13.339843 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1361 03:46:13.347616 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1362 03:46:13.353167 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1363 03:46:13.357520 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1364 03:46:13.362982 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1365 03:46:13.366377 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 03:46:13.373149 LPC: Trying to open IO window from 800 size 1ff
1367 03:46:13.379829 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1368 03:46:13.389894 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1369 03:46:13.396515 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1370 03:46:13.406381 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1371 03:46:13.410038 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 03:46:13.415799 Root Device assign_resources, bus 0 link: 0
1373 03:46:13.416309 Done setting resources.
1374 03:46:13.422880 Show resources in subtree (Root Device)...After assigning values.
1375 03:46:13.429260 Root Device child on link 0 CPU_CLUSTER: 0
1376 03:46:13.432782 CPU_CLUSTER: 0 child on link 0 APIC: 00
1377 03:46:13.433338 APIC: 00
1378 03:46:13.436043 APIC: 03
1379 03:46:13.436641 APIC: 05
1380 03:46:13.437003 APIC: 01
1381 03:46:13.439561 APIC: 02
1382 03:46:13.440014 APIC: 04
1383 03:46:13.442301 APIC: 07
1384 03:46:13.442752 APIC: 06
1385 03:46:13.445473 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1386 03:46:13.456026 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1387 03:46:13.465583 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1388 03:46:13.469168 PCI: 00:00.0
1389 03:46:13.479051 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1390 03:46:13.488662 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1391 03:46:13.498813 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1392 03:46:13.505267 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1393 03:46:13.514925 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1394 03:46:13.524982 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1395 03:46:13.534971 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1396 03:46:13.544858 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1397 03:46:13.554788 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1398 03:46:13.561408 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1399 03:46:13.571396 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1400 03:46:13.581352 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1401 03:46:13.591124 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1402 03:46:13.601003 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1403 03:46:13.611036 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1404 03:46:13.617422 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1405 03:46:13.620663 PCI: 00:02.0
1406 03:46:13.630903 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 03:46:13.640813 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 03:46:13.650813 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 03:46:13.653482 PCI: 00:04.0
1410 03:46:13.653950 PCI: 00:08.0
1411 03:46:13.664213 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1412 03:46:13.667452 PCI: 00:12.0
1413 03:46:13.676850 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1414 03:46:13.680524 PCI: 00:14.0 child on link 0 USB0 port 0
1415 03:46:13.690432 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1416 03:46:13.696872 USB0 port 0 child on link 0 USB2 port 0
1417 03:46:13.697439 USB2 port 0
1418 03:46:13.700686 USB2 port 1
1419 03:46:13.701272 USB2 port 2
1420 03:46:13.703633 USB2 port 3
1421 03:46:13.704237 USB2 port 5
1422 03:46:13.706529 USB2 port 6
1423 03:46:13.706991 USB2 port 9
1424 03:46:13.710130 USB3 port 0
1425 03:46:13.710693 USB3 port 1
1426 03:46:13.713860 USB3 port 2
1427 03:46:13.714421 USB3 port 3
1428 03:46:13.716597 USB3 port 4
1429 03:46:13.720173 PCI: 00:14.2
1430 03:46:13.729951 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1431 03:46:13.739726 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1432 03:46:13.740333 PCI: 00:14.3
1433 03:46:13.749706 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1434 03:46:13.756766 PCI: 00:15.0 child on link 0 I2C: 01:15
1435 03:46:13.766370 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1436 03:46:13.766942 I2C: 01:15
1437 03:46:13.772849 PCI: 00:15.1 child on link 0 I2C: 02:5d
1438 03:46:13.783884 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1439 03:46:13.784513 I2C: 02:5d
1440 03:46:13.785776 GENERIC: 0.0
1441 03:46:13.786238 PCI: 00:16.0
1442 03:46:13.796682 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1443 03:46:13.800234 PCI: 00:17.0
1444 03:46:13.809324 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1445 03:46:13.819172 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1446 03:46:13.828959 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1447 03:46:13.836170 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1448 03:46:13.845635 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1449 03:46:13.855740 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1450 03:46:13.861939 PCI: 00:19.0 child on link 0 I2C: 03:1a
1451 03:46:13.871759 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1452 03:46:13.872249 I2C: 03:1a
1453 03:46:13.875641 I2C: 03:38
1454 03:46:13.876133 I2C: 03:39
1455 03:46:13.878675 I2C: 03:3a
1456 03:46:13.879234 I2C: 03:3b
1457 03:46:13.882091 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1458 03:46:13.892006 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1459 03:46:13.902421 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1460 03:46:13.911825 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1461 03:46:13.915215 PCI: 01:00.0
1462 03:46:13.925414 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1463 03:46:13.928316 PCI: 00:1e.0
1464 03:46:13.938373 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1465 03:46:13.948036 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1466 03:46:13.951997 PCI: 00:1e.2 child on link 0 SPI: 00
1467 03:46:13.961118 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1468 03:46:13.964922 SPI: 00
1469 03:46:13.967823 PCI: 00:1e.3 child on link 0 SPI: 01
1470 03:46:13.977729 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1471 03:46:13.978272 SPI: 01
1472 03:46:13.984875 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1473 03:46:13.991809 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1474 03:46:14.001039 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1475 03:46:14.004521 PNP: 0c09.0
1476 03:46:14.011310 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 03:46:14.014311 PCI: 00:1f.3
1478 03:46:14.024519 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1479 03:46:14.034597 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1480 03:46:14.037587 PCI: 00:1f.4
1481 03:46:14.043701 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1482 03:46:14.054226 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1483 03:46:14.057000 PCI: 00:1f.5
1484 03:46:14.067052 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1485 03:46:14.070310 Done allocating resources.
1486 03:46:14.074175 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1487 03:46:14.077518 Enabling resources...
1488 03:46:14.085234 PCI: 00:00.0 subsystem <- 8086/9b61
1489 03:46:14.085792 PCI: 00:00.0 cmd <- 06
1490 03:46:14.087120 PCI: 00:02.0 subsystem <- 8086/9b41
1491 03:46:14.090809 PCI: 00:02.0 cmd <- 03
1492 03:46:14.094098 PCI: 00:08.0 cmd <- 06
1493 03:46:14.097533 PCI: 00:12.0 subsystem <- 8086/02f9
1494 03:46:14.101018 PCI: 00:12.0 cmd <- 02
1495 03:46:14.103927 PCI: 00:14.0 subsystem <- 8086/02ed
1496 03:46:14.107622 PCI: 00:14.0 cmd <- 02
1497 03:46:14.110696 PCI: 00:14.2 cmd <- 02
1498 03:46:14.113796 PCI: 00:14.3 subsystem <- 8086/02f0
1499 03:46:14.114364 PCI: 00:14.3 cmd <- 02
1500 03:46:14.120645 PCI: 00:15.0 subsystem <- 8086/02e8
1501 03:46:14.121106 PCI: 00:15.0 cmd <- 02
1502 03:46:14.124020 PCI: 00:15.1 subsystem <- 8086/02e9
1503 03:46:14.127463 PCI: 00:15.1 cmd <- 02
1504 03:46:14.130585 PCI: 00:16.0 subsystem <- 8086/02e0
1505 03:46:14.134243 PCI: 00:16.0 cmd <- 02
1506 03:46:14.137017 PCI: 00:17.0 subsystem <- 8086/02d3
1507 03:46:14.140276 PCI: 00:17.0 cmd <- 03
1508 03:46:14.143765 PCI: 00:19.0 subsystem <- 8086/02c5
1509 03:46:14.146966 PCI: 00:19.0 cmd <- 02
1510 03:46:14.150415 PCI: 00:1d.0 bridge ctrl <- 0013
1511 03:46:14.153327 PCI: 00:1d.0 subsystem <- 8086/02b0
1512 03:46:14.156866 PCI: 00:1d.0 cmd <- 06
1513 03:46:14.159875 PCI: 00:1e.0 subsystem <- 8086/02a8
1514 03:46:14.163752 PCI: 00:1e.0 cmd <- 06
1515 03:46:14.166695 PCI: 00:1e.2 subsystem <- 8086/02aa
1516 03:46:14.170527 PCI: 00:1e.2 cmd <- 06
1517 03:46:14.173432 PCI: 00:1e.3 subsystem <- 8086/02ab
1518 03:46:14.173993 PCI: 00:1e.3 cmd <- 02
1519 03:46:14.180231 PCI: 00:1f.0 subsystem <- 8086/0284
1520 03:46:14.180923 PCI: 00:1f.0 cmd <- 407
1521 03:46:14.187098 PCI: 00:1f.3 subsystem <- 8086/02c8
1522 03:46:14.187659 PCI: 00:1f.3 cmd <- 02
1523 03:46:14.190295 PCI: 00:1f.4 subsystem <- 8086/02a3
1524 03:46:14.193688 PCI: 00:1f.4 cmd <- 03
1525 03:46:14.197008 PCI: 00:1f.5 subsystem <- 8086/02a4
1526 03:46:14.199830 PCI: 00:1f.5 cmd <- 406
1527 03:46:14.209405 PCI: 01:00.0 cmd <- 02
1528 03:46:14.214390 done.
1529 03:46:14.226341 ME: Version: 14.0.39.1367
1530 03:46:14.233004 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1531 03:46:14.235918 Initializing devices...
1532 03:46:14.236588 Root Device init ...
1533 03:46:14.242821 Chrome EC: Set SMI mask to 0x0000000000000000
1534 03:46:14.245883 Chrome EC: clear events_b mask to 0x0000000000000000
1535 03:46:14.252626 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1536 03:46:14.259424 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1537 03:46:14.265875 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1538 03:46:14.268984 Chrome EC: Set WAKE mask to 0x0000000000000000
1539 03:46:14.272522 Root Device init finished in 35150 usecs
1540 03:46:14.275999 CPU_CLUSTER: 0 init ...
1541 03:46:14.283307 CPU_CLUSTER: 0 init finished in 2446 usecs
1542 03:46:14.286837 PCI: 00:00.0 init ...
1543 03:46:14.289725 CPU TDP: 15 Watts
1544 03:46:14.293560 CPU PL2 = 64 Watts
1545 03:46:14.296996 PCI: 00:00.0 init finished in 7080 usecs
1546 03:46:14.300519 PCI: 00:02.0 init ...
1547 03:46:14.304541 PCI: 00:02.0 init finished in 2253 usecs
1548 03:46:14.307436 PCI: 00:08.0 init ...
1549 03:46:14.310462 PCI: 00:08.0 init finished in 2252 usecs
1550 03:46:14.313516 PCI: 00:12.0 init ...
1551 03:46:14.316613 PCI: 00:12.0 init finished in 2251 usecs
1552 03:46:14.319916 PCI: 00:14.0 init ...
1553 03:46:14.323257 PCI: 00:14.0 init finished in 2251 usecs
1554 03:46:14.326619 PCI: 00:14.2 init ...
1555 03:46:14.329986 PCI: 00:14.2 init finished in 2251 usecs
1556 03:46:14.333662 PCI: 00:14.3 init ...
1557 03:46:14.336544 PCI: 00:14.3 init finished in 2269 usecs
1558 03:46:14.339901 PCI: 00:15.0 init ...
1559 03:46:14.343094 DW I2C bus 0 at 0xd121f000 (400 KHz)
1560 03:46:14.346107 PCI: 00:15.0 init finished in 5973 usecs
1561 03:46:14.349622 PCI: 00:15.1 init ...
1562 03:46:14.352760 DW I2C bus 1 at 0xd1220000 (400 KHz)
1563 03:46:14.359904 PCI: 00:15.1 init finished in 5973 usecs
1564 03:46:14.360408 PCI: 00:16.0 init ...
1565 03:46:14.366133 PCI: 00:16.0 init finished in 2251 usecs
1566 03:46:14.369561 PCI: 00:19.0 init ...
1567 03:46:14.372706 DW I2C bus 4 at 0xd1222000 (400 KHz)
1568 03:46:14.376369 PCI: 00:19.0 init finished in 5973 usecs
1569 03:46:14.379261 PCI: 00:1d.0 init ...
1570 03:46:14.383329 Initializing PCH PCIe bridge.
1571 03:46:14.385338 PCI: 00:1d.0 init finished in 5283 usecs
1572 03:46:14.389383 PCI: 00:1f.0 init ...
1573 03:46:14.392244 IOAPIC: Initializing IOAPIC at 0xfec00000
1574 03:46:14.399217 IOAPIC: Bootstrap Processor Local APIC = 0x00
1575 03:46:14.399783 IOAPIC: ID = 0x02
1576 03:46:14.401822 IOAPIC: Dumping registers
1577 03:46:14.405154 reg 0x0000: 0x02000000
1578 03:46:14.408564 reg 0x0001: 0x00770020
1579 03:46:14.409021 reg 0x0002: 0x00000000
1580 03:46:14.416193 PCI: 00:1f.0 init finished in 23540 usecs
1581 03:46:14.418466 PCI: 00:1f.4 init ...
1582 03:46:14.422218 PCI: 00:1f.4 init finished in 2261 usecs
1583 03:46:14.433042 PCI: 01:00.0 init ...
1584 03:46:14.436959 PCI: 01:00.0 init finished in 2253 usecs
1585 03:46:14.440397 PNP: 0c09.0 init ...
1586 03:46:14.444220 Google Chrome EC uptime: 11.103 seconds
1587 03:46:14.450460 Google Chrome AP resets since EC boot: 0
1588 03:46:14.453881 Google Chrome most recent AP reset causes:
1589 03:46:14.460314 Google Chrome EC reset flags at last EC boot: reset-pin
1590 03:46:14.463125 PNP: 0c09.0 init finished in 20565 usecs
1591 03:46:14.467355 Devices initialized
1592 03:46:14.470620 Show all devs... After init.
1593 03:46:14.471180 Root Device: enabled 1
1594 03:46:14.473692 CPU_CLUSTER: 0: enabled 1
1595 03:46:14.477030 DOMAIN: 0000: enabled 1
1596 03:46:14.477590 APIC: 00: enabled 1
1597 03:46:14.480542 PCI: 00:00.0: enabled 1
1598 03:46:14.483375 PCI: 00:02.0: enabled 1
1599 03:46:14.486798 PCI: 00:04.0: enabled 0
1600 03:46:14.487365 PCI: 00:05.0: enabled 0
1601 03:46:14.489916 PCI: 00:12.0: enabled 1
1602 03:46:14.493505 PCI: 00:12.5: enabled 0
1603 03:46:14.496915 PCI: 00:12.6: enabled 0
1604 03:46:14.497473 PCI: 00:14.0: enabled 1
1605 03:46:14.500083 PCI: 00:14.1: enabled 0
1606 03:46:14.503155 PCI: 00:14.3: enabled 1
1607 03:46:14.503713 PCI: 00:14.5: enabled 0
1608 03:46:14.506360 PCI: 00:15.0: enabled 1
1609 03:46:14.509767 PCI: 00:15.1: enabled 1
1610 03:46:14.513308 PCI: 00:15.2: enabled 0
1611 03:46:14.513865 PCI: 00:15.3: enabled 0
1612 03:46:14.516476 PCI: 00:16.0: enabled 1
1613 03:46:14.519380 PCI: 00:16.1: enabled 0
1614 03:46:14.523645 PCI: 00:16.2: enabled 0
1615 03:46:14.524246 PCI: 00:16.3: enabled 0
1616 03:46:14.526229 PCI: 00:16.4: enabled 0
1617 03:46:14.529425 PCI: 00:16.5: enabled 0
1618 03:46:14.533231 PCI: 00:17.0: enabled 1
1619 03:46:14.533790 PCI: 00:19.0: enabled 1
1620 03:46:14.536211 PCI: 00:19.1: enabled 0
1621 03:46:14.539322 PCI: 00:19.2: enabled 0
1622 03:46:14.542658 PCI: 00:1a.0: enabled 0
1623 03:46:14.543118 PCI: 00:1c.0: enabled 0
1624 03:46:14.546131 PCI: 00:1c.1: enabled 0
1625 03:46:14.549445 PCI: 00:1c.2: enabled 0
1626 03:46:14.550007 PCI: 00:1c.3: enabled 0
1627 03:46:14.552771 PCI: 00:1c.4: enabled 0
1628 03:46:14.556176 PCI: 00:1c.5: enabled 0
1629 03:46:14.559278 PCI: 00:1c.6: enabled 0
1630 03:46:14.559743 PCI: 00:1c.7: enabled 0
1631 03:46:14.562506 PCI: 00:1d.0: enabled 1
1632 03:46:14.566505 PCI: 00:1d.1: enabled 0
1633 03:46:14.569094 PCI: 00:1d.2: enabled 0
1634 03:46:14.569652 PCI: 00:1d.3: enabled 0
1635 03:46:14.572673 PCI: 00:1d.4: enabled 0
1636 03:46:14.575641 PCI: 00:1d.5: enabled 0
1637 03:46:14.579334 PCI: 00:1e.0: enabled 1
1638 03:46:14.579896 PCI: 00:1e.1: enabled 0
1639 03:46:14.582417 PCI: 00:1e.2: enabled 1
1640 03:46:14.586098 PCI: 00:1e.3: enabled 1
1641 03:46:14.586659 PCI: 00:1f.0: enabled 1
1642 03:46:14.589537 PCI: 00:1f.1: enabled 0
1643 03:46:14.592289 PCI: 00:1f.2: enabled 0
1644 03:46:14.595758 PCI: 00:1f.3: enabled 1
1645 03:46:14.596366 PCI: 00:1f.4: enabled 1
1646 03:46:14.599164 PCI: 00:1f.5: enabled 1
1647 03:46:14.602521 PCI: 00:1f.6: enabled 0
1648 03:46:14.605238 USB0 port 0: enabled 1
1649 03:46:14.605696 I2C: 01:15: enabled 1
1650 03:46:14.609221 I2C: 02:5d: enabled 1
1651 03:46:14.612127 GENERIC: 0.0: enabled 1
1652 03:46:14.612693 I2C: 03:1a: enabled 1
1653 03:46:14.615355 I2C: 03:38: enabled 1
1654 03:46:14.618974 I2C: 03:39: enabled 1
1655 03:46:14.619485 I2C: 03:3a: enabled 1
1656 03:46:14.622124 I2C: 03:3b: enabled 1
1657 03:46:14.625629 PCI: 00:00.0: enabled 1
1658 03:46:14.626189 SPI: 00: enabled 1
1659 03:46:14.628603 SPI: 01: enabled 1
1660 03:46:14.632149 PNP: 0c09.0: enabled 1
1661 03:46:14.632723 USB2 port 0: enabled 1
1662 03:46:14.635242 USB2 port 1: enabled 1
1663 03:46:14.638804 USB2 port 2: enabled 0
1664 03:46:14.641930 USB2 port 3: enabled 0
1665 03:46:14.642488 USB2 port 5: enabled 0
1666 03:46:14.645074 USB2 port 6: enabled 1
1667 03:46:14.648521 USB2 port 9: enabled 1
1668 03:46:14.648979 USB3 port 0: enabled 1
1669 03:46:14.651640 USB3 port 1: enabled 1
1670 03:46:14.655057 USB3 port 2: enabled 1
1671 03:46:14.655516 USB3 port 3: enabled 1
1672 03:46:14.658302 USB3 port 4: enabled 0
1673 03:46:14.662084 APIC: 03: enabled 1
1674 03:46:14.662539 APIC: 05: enabled 1
1675 03:46:14.665156 APIC: 01: enabled 1
1676 03:46:14.668515 APIC: 02: enabled 1
1677 03:46:14.668976 APIC: 04: enabled 1
1678 03:46:14.671750 APIC: 07: enabled 1
1679 03:46:14.672249 APIC: 06: enabled 1
1680 03:46:14.674920 PCI: 00:08.0: enabled 1
1681 03:46:14.678269 PCI: 00:14.2: enabled 1
1682 03:46:14.681515 PCI: 01:00.0: enabled 1
1683 03:46:14.685526 Disabling ACPI via APMC:
1684 03:46:14.686048 done.
1685 03:46:14.692125 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1686 03:46:14.695208 ELOG: NV offset 0xaf0000 size 0x4000
1687 03:46:14.702570 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1688 03:46:14.708594 ELOG: Event(17) added with size 13 at 2024-01-16 03:46:13 UTC
1689 03:46:14.715159 ELOG: Event(92) added with size 9 at 2024-01-16 03:46:13 UTC
1690 03:46:14.721581 ELOG: Event(93) added with size 9 at 2024-01-16 03:46:13 UTC
1691 03:46:14.728140 ELOG: Event(9A) added with size 9 at 2024-01-16 03:46:13 UTC
1692 03:46:14.735234 ELOG: Event(9E) added with size 10 at 2024-01-16 03:46:13 UTC
1693 03:46:14.741600 ELOG: Event(9F) added with size 14 at 2024-01-16 03:46:13 UTC
1694 03:46:14.744953 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1695 03:46:14.752366 ELOG: Event(A1) added with size 10 at 2024-01-16 03:46:13 UTC
1696 03:46:14.762071 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1697 03:46:14.768682 ELOG: Event(A0) added with size 9 at 2024-01-16 03:46:13 UTC
1698 03:46:14.771859 ELOG: Event(16) added with size 11 at 2024-01-16 03:46:13 UTC
1699 03:46:14.778935 Erasing flash addr af0000 + 4 KiB
1700 03:46:14.852545 elog_add_boot_reason: Logged dev mode boot
1701 03:46:14.853234 Finalize devices...
1702 03:46:14.855942 PCI: 00:17.0 final
1703 03:46:14.859860 Devices finalized
1704 03:46:14.862681 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1705 03:46:14.869132 BS: BS_POST_DEVICE times (ms): entry 62 run 0 exit 0
1706 03:46:14.872480 ME: HFSTS1 : 0x90000245
1707 03:46:14.875476 ME: HFSTS2 : 0x3B850126
1708 03:46:14.881960 ME: HFSTS3 : 0x00000020
1709 03:46:14.885307 ME: HFSTS4 : 0x00004800
1710 03:46:14.888562 ME: HFSTS5 : 0x00000000
1711 03:46:14.891785 ME: HFSTS6 : 0x40400006
1712 03:46:14.895508 ME: Manufacturing Mode : NO
1713 03:46:14.898488 ME: FW Partition Table : OK
1714 03:46:14.902088 ME: Bringup Loader Failure : NO
1715 03:46:14.905306 ME: Firmware Init Complete : YES
1716 03:46:14.908480 ME: Boot Options Present : NO
1717 03:46:14.911463 ME: Update In Progress : NO
1718 03:46:14.914848 ME: D0i3 Support : YES
1719 03:46:14.918582 ME: Low Power State Enabled : NO
1720 03:46:14.921678 ME: CPU Replaced : NO
1721 03:46:14.924615 ME: CPU Replacement Valid : YES
1722 03:46:14.928088 ME: Current Working State : 5
1723 03:46:14.931856 ME: Current Operation State : 1
1724 03:46:14.934818 ME: Current Operation Mode : 0
1725 03:46:14.938064 ME: Error Code : 0
1726 03:46:14.941637 ME: CPU Debug Disabled : YES
1727 03:46:14.944431 ME: TXT Support : NO
1728 03:46:14.951289 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1729 03:46:14.957684 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1730 03:46:14.958106 CBFS @ c08000 size 3f8000
1731 03:46:14.964252 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1732 03:46:14.968519 CBFS: Locating 'fallback/dsdt.aml'
1733 03:46:14.971033 CBFS: Found @ offset 10bb80 size 3fa5
1734 03:46:14.977951 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1735 03:46:14.981922 CBFS @ c08000 size 3f8000
1736 03:46:14.987648 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1737 03:46:14.988252 CBFS: Locating 'fallback/slic'
1738 03:46:14.992783 CBFS: 'fallback/slic' not found.
1739 03:46:14.999672 ACPI: Writing ACPI tables at 99b3e000.
1740 03:46:15.000272 ACPI: * FACS
1741 03:46:15.002983 ACPI: * DSDT
1742 03:46:15.006481 Ramoops buffer: 0x100000@0x99a3d000.
1743 03:46:15.009953 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1744 03:46:15.016431 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1745 03:46:15.019632 Google Chrome EC: version:
1746 03:46:15.022651 ro: helios_v2.0.2659-56403530b
1747 03:46:15.026228 rw: helios_v2.0.2849-c41de27e7d
1748 03:46:15.026784 running image: 1
1749 03:46:15.030386 ACPI: * FADT
1750 03:46:15.030936 SCI is IRQ9
1751 03:46:15.036957 ACPI: added table 1/32, length now 40
1752 03:46:15.037507 ACPI: * SSDT
1753 03:46:15.040452 Found 1 CPU(s) with 8 core(s) each.
1754 03:46:15.043356 Error: Could not locate 'wifi_sar' in VPD.
1755 03:46:15.049976 Checking CBFS for default SAR values
1756 03:46:15.053206 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1757 03:46:15.056737 CBFS @ c08000 size 3f8000
1758 03:46:15.063468 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1759 03:46:15.066170 CBFS: Locating 'wifi_sar_defaults.hex'
1760 03:46:15.069820 CBFS: Found @ offset 5fac0 size 77
1761 03:46:15.073857 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1762 03:46:15.080189 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1763 03:46:15.083514 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1764 03:46:15.089672 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1765 03:46:15.093519 failed to find key in VPD: dsm_calib_r0_0
1766 03:46:15.103137 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1767 03:46:15.106333 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1768 03:46:15.112947 failed to find key in VPD: dsm_calib_r0_1
1769 03:46:15.119196 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1770 03:46:15.126135 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1771 03:46:15.129414 failed to find key in VPD: dsm_calib_r0_2
1772 03:46:15.139503 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1773 03:46:15.143118 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1774 03:46:15.149149 failed to find key in VPD: dsm_calib_r0_3
1775 03:46:15.155546 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1776 03:46:15.162652 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1777 03:46:15.165547 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1778 03:46:15.172376 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1779 03:46:15.175975 EC returned error result code 1
1780 03:46:15.179512 EC returned error result code 1
1781 03:46:15.182228 EC returned error result code 1
1782 03:46:15.186157 PS2K: Bad resp from EC. Vivaldi disabled!
1783 03:46:15.192551 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1784 03:46:15.199949 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1785 03:46:15.203034 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1786 03:46:15.209805 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1787 03:46:15.212675 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1788 03:46:15.219100 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1789 03:46:15.226122 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1790 03:46:15.232711 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1791 03:46:15.235468 ACPI: added table 2/32, length now 44
1792 03:46:15.236047 ACPI: * MCFG
1793 03:46:15.242495 ACPI: added table 3/32, length now 48
1794 03:46:15.243087 ACPI: * TPM2
1795 03:46:15.246033 TPM2 log created at 99a2d000
1796 03:46:15.248642 ACPI: added table 4/32, length now 52
1797 03:46:15.252126 ACPI: * MADT
1798 03:46:15.252607 SCI is IRQ9
1799 03:46:15.255444 ACPI: added table 5/32, length now 56
1800 03:46:15.258581 current = 99b43ac0
1801 03:46:15.259165 ACPI: * DMAR
1802 03:46:15.262431 ACPI: added table 6/32, length now 60
1803 03:46:15.265428 ACPI: * IGD OpRegion
1804 03:46:15.268727 GMA: Found VBT in CBFS
1805 03:46:15.271920 GMA: Found valid VBT in CBFS
1806 03:46:15.275655 ACPI: added table 7/32, length now 64
1807 03:46:15.276273 ACPI: * HPET
1808 03:46:15.278620 ACPI: added table 8/32, length now 68
1809 03:46:15.281904 ACPI: done.
1810 03:46:15.285405 ACPI tables: 31744 bytes.
1811 03:46:15.288644 smbios_write_tables: 99a2c000
1812 03:46:15.291835 EC returned error result code 3
1813 03:46:15.295178 Couldn't obtain OEM name from CBI
1814 03:46:15.298953 Create SMBIOS type 17
1815 03:46:15.302062 PCI: 00:00.0 (Intel Cannonlake)
1816 03:46:15.302651 PCI: 00:14.3 (Intel WiFi)
1817 03:46:15.305356 SMBIOS tables: 939 bytes.
1818 03:46:15.308525 Writing table forward entry at 0x00000500
1819 03:46:15.315247 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1820 03:46:15.318335 Writing coreboot table at 0x99b62000
1821 03:46:15.325000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1822 03:46:15.328412 1. 0000000000001000-000000000009ffff: RAM
1823 03:46:15.334845 2. 00000000000a0000-00000000000fffff: RESERVED
1824 03:46:15.338349 3. 0000000000100000-0000000099a2bfff: RAM
1825 03:46:15.344973 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1826 03:46:15.348274 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1827 03:46:15.354857 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1828 03:46:15.361816 7. 000000009a000000-000000009f7fffff: RESERVED
1829 03:46:15.364425 8. 00000000e0000000-00000000efffffff: RESERVED
1830 03:46:15.367890 9. 00000000fc000000-00000000fc000fff: RESERVED
1831 03:46:15.374658 10. 00000000fe000000-00000000fe00ffff: RESERVED
1832 03:46:15.377823 11. 00000000fed10000-00000000fed17fff: RESERVED
1833 03:46:15.384044 12. 00000000fed80000-00000000fed83fff: RESERVED
1834 03:46:15.387570 13. 00000000fed90000-00000000fed91fff: RESERVED
1835 03:46:15.394420 14. 00000000feda0000-00000000feda1fff: RESERVED
1836 03:46:15.397384 15. 0000000100000000-000000045e7fffff: RAM
1837 03:46:15.401149 Graphics framebuffer located at 0xc0000000
1838 03:46:15.404473 Passing 5 GPIOs to payload:
1839 03:46:15.410932 NAME | PORT | POLARITY | VALUE
1840 03:46:15.414125 write protect | undefined | high | low
1841 03:46:15.420622 lid | undefined | high | high
1842 03:46:15.427638 power | undefined | high | low
1843 03:46:15.430707 oprom | undefined | high | low
1844 03:46:15.437595 EC in RW | 0x000000cb | high | low
1845 03:46:15.438152 Board ID: 4
1846 03:46:15.444640 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1847 03:46:15.445280 CBFS @ c08000 size 3f8000
1848 03:46:15.450362 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1849 03:46:15.457081 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1850 03:46:15.460694 coreboot table: 1492 bytes.
1851 03:46:15.463540 IMD ROOT 0. 99fff000 00001000
1852 03:46:15.467167 IMD SMALL 1. 99ffe000 00001000
1853 03:46:15.471027 FSP MEMORY 2. 99c4e000 003b0000
1854 03:46:15.473854 CONSOLE 3. 99c2e000 00020000
1855 03:46:15.477142 FMAP 4. 99c2d000 0000054e
1856 03:46:15.480400 TIME STAMP 5. 99c2c000 00000910
1857 03:46:15.483682 VBOOT WORK 6. 99c18000 00014000
1858 03:46:15.487172 MRC DATA 7. 99c16000 00001958
1859 03:46:15.490433 ROMSTG STCK 8. 99c15000 00001000
1860 03:46:15.493437 AFTER CAR 9. 99c0b000 0000a000
1861 03:46:15.497053 RAMSTAGE 10. 99baf000 0005c000
1862 03:46:15.499999 REFCODE 11. 99b7a000 00035000
1863 03:46:15.503239 SMM BACKUP 12. 99b6a000 00010000
1864 03:46:15.506864 COREBOOT 13. 99b62000 00008000
1865 03:46:15.510241 ACPI 14. 99b3e000 00024000
1866 03:46:15.513564 ACPI GNVS 15. 99b3d000 00001000
1867 03:46:15.516723 RAMOOPS 16. 99a3d000 00100000
1868 03:46:15.520531 TPM2 TCGLOG17. 99a2d000 00010000
1869 03:46:15.523595 SMBIOS 18. 99a2c000 00000800
1870 03:46:15.524088 IMD small region:
1871 03:46:15.530395 IMD ROOT 0. 99ffec00 00000400
1872 03:46:15.533645 FSP RUNTIME 1. 99ffebe0 00000004
1873 03:46:15.537409 EC HOSTEVENT 2. 99ffebc0 00000008
1874 03:46:15.540656 POWER STATE 3. 99ffeb80 00000040
1875 03:46:15.544093 ROMSTAGE 4. 99ffeb60 00000004
1876 03:46:15.546934 MEM INFO 5. 99ffe9a0 000001b9
1877 03:46:15.550101 VPD 6. 99ffe920 0000006c
1878 03:46:15.553003 MTRR: Physical address space:
1879 03:46:15.560225 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1880 03:46:15.566718 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1881 03:46:15.569669 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1882 03:46:15.577017 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1883 03:46:15.583238 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1884 03:46:15.589840 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1885 03:46:15.596392 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1886 03:46:15.599880 MTRR: Fixed MSR 0x250 0x0606060606060606
1887 03:46:15.602692 MTRR: Fixed MSR 0x258 0x0606060606060606
1888 03:46:15.609722 MTRR: Fixed MSR 0x259 0x0000000000000000
1889 03:46:15.612571 MTRR: Fixed MSR 0x268 0x0606060606060606
1890 03:46:15.616328 MTRR: Fixed MSR 0x269 0x0606060606060606
1891 03:46:15.619368 MTRR: Fixed MSR 0x26a 0x0606060606060606
1892 03:46:15.626010 MTRR: Fixed MSR 0x26b 0x0606060606060606
1893 03:46:15.629601 MTRR: Fixed MSR 0x26c 0x0606060606060606
1894 03:46:15.632581 MTRR: Fixed MSR 0x26d 0x0606060606060606
1895 03:46:15.636199 MTRR: Fixed MSR 0x26e 0x0606060606060606
1896 03:46:15.642540 MTRR: Fixed MSR 0x26f 0x0606060606060606
1897 03:46:15.645928 call enable_fixed_mtrr()
1898 03:46:15.648997 CPU physical address size: 39 bits
1899 03:46:15.652511 MTRR: default type WB/UC MTRR counts: 6/8.
1900 03:46:15.655748 MTRR: WB selected as default type.
1901 03:46:15.662543 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1902 03:46:15.669197 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1903 03:46:15.675273 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1904 03:46:15.682209 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1905 03:46:15.685387 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1906 03:46:15.692125 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1907 03:46:15.699330 MTRR: Fixed MSR 0x250 0x0606060606060606
1908 03:46:15.702397 MTRR: Fixed MSR 0x258 0x0606060606060606
1909 03:46:15.705977 MTRR: Fixed MSR 0x259 0x0000000000000000
1910 03:46:15.709362 MTRR: Fixed MSR 0x268 0x0606060606060606
1911 03:46:15.716530 MTRR: Fixed MSR 0x269 0x0606060606060606
1912 03:46:15.719704 MTRR: Fixed MSR 0x26a 0x0606060606060606
1913 03:46:15.722425 MTRR: Fixed MSR 0x26b 0x0606060606060606
1914 03:46:15.726003 MTRR: Fixed MSR 0x26c 0x0606060606060606
1915 03:46:15.732274 MTRR: Fixed MSR 0x26d 0x0606060606060606
1916 03:46:15.736319 MTRR: Fixed MSR 0x26e 0x0606060606060606
1917 03:46:15.739206 MTRR: Fixed MSR 0x26f 0x0606060606060606
1918 03:46:15.739763
1919 03:46:15.742196 MTRR check
1920 03:46:15.742749 Fixed MTRRs : Enabled
1921 03:46:15.745552 Variable MTRRs: Enabled
1922 03:46:15.746168
1923 03:46:15.748788 call enable_fixed_mtrr()
1924 03:46:15.752089 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1925 03:46:15.758591 CPU physical address size: 39 bits
1926 03:46:15.762506 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1927 03:46:15.765438 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 03:46:15.771924 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 03:46:15.775188 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 03:46:15.778336 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 03:46:15.781982 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 03:46:15.788606 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 03:46:15.791468 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 03:46:15.794928 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 03:46:15.798239 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 03:46:15.805093 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 03:46:15.808180 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 03:46:15.811363 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 03:46:15.814633 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 03:46:15.821365 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 03:46:15.824699 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 03:46:15.827938 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 03:46:15.831273 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 03:46:15.838013 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 03:46:15.841056 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 03:46:15.844031 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 03:46:15.847436 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 03:46:15.854060 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 03:46:15.854177 call enable_fixed_mtrr()
1950 03:46:15.857307 call enable_fixed_mtrr()
1951 03:46:15.860285 CPU physical address size: 39 bits
1952 03:46:15.863562 CPU physical address size: 39 bits
1953 03:46:15.870229 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 03:46:15.873571 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 03:46:15.877005 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 03:46:15.880464 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 03:46:15.887313 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 03:46:15.890840 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 03:46:15.893620 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 03:46:15.896999 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 03:46:15.899946 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 03:46:15.906641 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 03:46:15.910418 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 03:46:15.913090 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 03:46:15.920137 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 03:46:15.924075 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 03:46:15.926248 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 03:46:15.929915 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 03:46:15.933133 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 03:46:15.940246 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 03:46:15.943174 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 03:46:15.946313 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 03:46:15.949639 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 03:46:15.956152 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 03:46:15.959570 call enable_fixed_mtrr()
1976 03:46:15.959686 call enable_fixed_mtrr()
1977 03:46:15.962839 CPU physical address size: 39 bits
1978 03:46:15.969116 CPU physical address size: 39 bits
1979 03:46:15.972970 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 03:46:15.977236 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 03:46:15.979708 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 03:46:15.982478 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 03:46:15.989542 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 03:46:15.993199 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 03:46:15.995856 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 03:46:15.999138 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 03:46:16.005842 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 03:46:16.009211 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 03:46:16.012422 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 03:46:16.016009 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 03:46:16.022272 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 03:46:16.025605 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 03:46:16.029216 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 03:46:16.032410 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 03:46:16.039046 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 03:46:16.041995 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 03:46:16.045843 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 03:46:16.049096 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 03:46:16.055623 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 03:46:16.058861 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 03:46:16.062027 call enable_fixed_mtrr()
2002 03:46:16.062143 call enable_fixed_mtrr()
2003 03:46:16.068727 CPU physical address size: 39 bits
2004 03:46:16.072136 CPU physical address size: 39 bits
2005 03:46:16.072257 CBFS @ c08000 size 3f8000
2006 03:46:16.078795 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2007 03:46:16.081850 CBFS: Locating 'fallback/payload'
2008 03:46:16.088737 CBFS: Found @ offset 1c96c0 size 3f798
2009 03:46:16.092838 Checking segment from ROM address 0xffdd16f8
2010 03:46:16.095332 Checking segment from ROM address 0xffdd1714
2011 03:46:16.102392 Loading segment from ROM address 0xffdd16f8
2012 03:46:16.102539 code (compression=0)
2013 03:46:16.111780 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2014 03:46:16.121678 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2015 03:46:16.121858 it's not compressed!
2016 03:46:16.214655 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2017 03:46:16.220921 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2018 03:46:16.224214 Loading segment from ROM address 0xffdd1714
2019 03:46:16.228353 Entry Point 0x30000000
2020 03:46:16.230850 Loaded segments
2021 03:46:16.236602 Finalizing chipset.
2022 03:46:16.239794 Finalizing SMM.
2023 03:46:16.243432 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2024 03:46:16.246622 mp_park_aps done after 0 msecs.
2025 03:46:16.253306 Jumping to boot code at 30000000(99b62000)
2026 03:46:16.259802 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2027 03:46:16.259979
2028 03:46:16.260136
2029 03:46:16.260260
2030 03:46:16.262920 Starting depthcharge on Helios...
2031 03:46:16.263035
2032 03:46:16.263518 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2033 03:46:16.263670 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2034 03:46:16.263800 Setting prompt string to ['hatch:']
2035 03:46:16.263924 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2036 03:46:16.272850 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2037 03:46:16.272952
2038 03:46:16.279606 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2039 03:46:16.279699
2040 03:46:16.286055 board_setup: Info: eMMC controller not present; skipping
2041 03:46:16.286149
2042 03:46:16.289160 New NVMe Controller 0x30053ac0 @ 00:1d:00
2043 03:46:16.289255
2044 03:46:16.295992 board_setup: Info: SDHCI controller not present; skipping
2045 03:46:16.296123
2046 03:46:16.302860 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2047 03:46:16.303527
2048 03:46:16.304155 Wipe memory regions:
2049 03:46:16.304734
2050 03:46:16.306303 [0x00000000001000, 0x000000000a0000)
2051 03:46:16.306922
2052 03:46:16.309566 [0x00000000100000, 0x00000030000000)
2053 03:46:16.376255
2054 03:46:16.378787 [0x00000030657430, 0x00000099a2c000)
2055 03:46:16.516851
2056 03:46:16.519957 [0x00000100000000, 0x0000045e800000)
2057 03:46:17.902157
2058 03:46:17.902716 R8152: Initializing
2059 03:46:17.903088
2060 03:46:17.905728 Version 9 (ocp_data = 6010)
2061 03:46:17.909463
2062 03:46:17.910033 R8152: Done initializing
2063 03:46:17.910408
2064 03:46:17.912944 Adding net device
2065 03:46:18.395731
2066 03:46:18.396337 R8152: Initializing
2067 03:46:18.396715
2068 03:46:18.398794 Version 6 (ocp_data = 5c30)
2069 03:46:18.399245
2070 03:46:18.401674 R8152: Done initializing
2071 03:46:18.401752
2072 03:46:18.408974 net_add_device: Attemp to include the same device
2073 03:46:18.409139
2074 03:46:18.416185 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2075 03:46:18.416354
2076 03:46:18.416440
2077 03:46:18.416512
2078 03:46:18.416817 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2080 03:46:18.517604 hatch: tftpboot 192.168.201.1 12543666/tftp-deploy-sxz1247e/kernel/bzImage 12543666/tftp-deploy-sxz1247e/kernel/cmdline 12543666/tftp-deploy-sxz1247e/ramdisk/ramdisk.cpio.gz
2081 03:46:18.518254 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2082 03:46:18.518829 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2083 03:46:18.523638 tftpboot 192.168.201.1 12543666/tftp-deploy-sxz1247e/kernel/bzIploy-sxz1247e/kernel/cmdline 12543666/tftp-deploy-sxz1247e/ramdisk/ramdisk.cpio.gz
2084 03:46:18.524272
2085 03:46:18.524639 Waiting for link
2086 03:46:18.724390
2087 03:46:18.724950 done.
2088 03:46:18.725353
2089 03:46:18.725701 MAC: 00:24:32:50:1a:5f
2090 03:46:18.726029
2091 03:46:18.727694 Sending DHCP discover... done.
2092 03:46:18.728191
2093 03:46:18.730631 Waiting for reply... done.
2094 03:46:18.731094
2095 03:46:18.735739 Sending DHCP request... done.
2096 03:46:18.736353
2097 03:46:18.754078 Waiting for reply... done.
2098 03:46:18.754649
2099 03:46:18.755019 My ip is 192.168.201.21
2100 03:46:18.755358
2101 03:46:18.760257 The DHCP server ip is 192.168.201.1
2102 03:46:18.760822
2103 03:46:18.763354 TFTP server IP predefined by user: 192.168.201.1
2104 03:46:18.763920
2105 03:46:18.769832 Bootfile predefined by user: 12543666/tftp-deploy-sxz1247e/kernel/bzImage
2106 03:46:18.770383
2107 03:46:18.773333 Sending tftp read request... done.
2108 03:46:18.773799
2109 03:46:18.782804 Waiting for the transfer...
2110 03:46:18.783376
2111 03:46:19.495088 00000000 ################################################################
2112 03:46:19.495798
2113 03:46:20.219513 00080000 ################################################################
2114 03:46:20.220105
2115 03:46:20.944226 00100000 ################################################################
2116 03:46:20.944817
2117 03:46:21.632189 00180000 ################################################################
2118 03:46:21.632700
2119 03:46:22.343664 00200000 ################################################################
2120 03:46:22.344250
2121 03:46:23.058656 00280000 ################################################################
2122 03:46:23.059220
2123 03:46:23.763618 00300000 ################################################################
2124 03:46:23.764288
2125 03:46:24.479124 00380000 ################################################################
2126 03:46:24.479688
2127 03:46:25.201961 00400000 ################################################################
2128 03:46:25.202540
2129 03:46:25.929655 00480000 ################################################################
2130 03:46:25.930230
2131 03:46:26.630023 00500000 ################################################################
2132 03:46:26.630589
2133 03:46:27.331876 00580000 ################################################################
2134 03:46:27.332523
2135 03:46:28.054554 00600000 ################################################################
2136 03:46:28.055152
2137 03:46:28.779693 00680000 ################################################################
2138 03:46:28.780351
2139 03:46:29.492389 00700000 ################################################################
2140 03:46:29.492915
2141 03:46:30.162986 00780000 ################################################################
2142 03:46:30.163502
2143 03:46:30.882244 00800000 ################################################################
2144 03:46:30.882871
2145 03:46:31.602705 00880000 ################################################################
2146 03:46:31.603274
2147 03:46:32.263919 00900000 ################################################################
2148 03:46:32.264545
2149 03:46:32.963759 00980000 ################################################################
2150 03:46:32.964347
2151 03:46:33.645816 00a00000 ################################################################
2152 03:46:33.646799
2153 03:46:34.352243 00a80000 ################################################################
2154 03:46:34.352819
2155 03:46:34.407705 00b00000 ###### done.
2156 03:46:34.408324
2157 03:46:34.410686 The bootfile was 11575296 bytes long.
2158 03:46:34.411152
2159 03:46:34.413955 Sending tftp read request... done.
2160 03:46:34.414416
2161 03:46:34.417506 Waiting for the transfer...
2162 03:46:34.418074
2163 03:46:35.098436 00000000 ################################################################
2164 03:46:35.098962
2165 03:46:35.753868 00080000 ################################################################
2166 03:46:35.754194
2167 03:46:36.419025 00100000 ################################################################
2168 03:46:36.419586
2169 03:46:37.044995 00180000 ################################################################
2170 03:46:37.045142
2171 03:46:37.700537 00200000 ################################################################
2172 03:46:37.701057
2173 03:46:38.362980 00280000 ################################################################
2174 03:46:38.363494
2175 03:46:39.041011 00300000 ################################################################
2176 03:46:39.041160
2177 03:46:39.673426 00380000 ################################################################
2178 03:46:39.673574
2179 03:46:40.316998 00400000 ################################################################
2180 03:46:40.317541
2181 03:46:40.986224 00480000 ################################################################
2182 03:46:40.986791
2183 03:46:41.659428 00500000 ################################################################
2184 03:46:41.660100
2185 03:46:42.151383 00580000 ################################################ done.
2186 03:46:42.152188
2187 03:46:42.154979 Sending tftp read request... done.
2188 03:46:42.155413
2189 03:46:42.158261 Waiting for the transfer...
2190 03:46:42.158676
2191 03:46:42.159000 00000000 # done.
2192 03:46:42.159316
2193 03:46:42.168022 Command line loaded dynamically from TFTP file: 12543666/tftp-deploy-sxz1247e/kernel/cmdline
2194 03:46:42.168523
2195 03:46:42.197880 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12543666/extract-nfsrootfs-xrxr4e0d,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2196 03:46:42.198456
2197 03:46:42.204540 ec_init(0): CrosEC protocol v3 supported (256, 256)
2198 03:46:42.208116
2199 03:46:42.213611 Shutting down all USB controllers.
2200 03:46:42.214171
2201 03:46:42.214536 Removing current net device
2202 03:46:42.215777
2203 03:46:42.216193 Finalizing coreboot
2204 03:46:42.216533
2205 03:46:42.221835 Exiting depthcharge with code 4 at timestamp: 33418419
2206 03:46:42.222426
2207 03:46:42.222874
2208 03:46:42.223428 Starting kernel ...
2209 03:46:42.223776
2210 03:46:42.224167
2211 03:46:42.225541 end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
2212 03:46:42.226054 start: 2.2.5 auto-login-action (timeout 00:04:16) [common]
2213 03:46:42.226446 Setting prompt string to ['Linux version [0-9]']
2214 03:46:42.226811 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2215 03:46:42.227176 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2217 03:50:58.227068 end: 2.2.5 auto-login-action (duration 00:04:16) [common]
2219 03:50:58.228181 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 256 seconds'
2221 03:50:58.229055 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2224 03:50:58.230503 end: 2 depthcharge-action (duration 00:05:00) [common]
2226 03:50:58.231675 Cleaning after the job
2227 03:50:58.232199 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543666/tftp-deploy-sxz1247e/ramdisk
2228 03:50:58.237000 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543666/tftp-deploy-sxz1247e/kernel
2229 03:50:58.245473 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543666/tftp-deploy-sxz1247e/nfsrootfs
2230 03:50:58.361328 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543666/tftp-deploy-sxz1247e/modules
2231 03:50:58.362050 start: 4.1 power-off (timeout 00:00:30) [common]
2232 03:50:58.362212 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2233 03:50:58.438695 >> Command sent successfully.
2234 03:50:58.443161 Returned 0 in 0 seconds
2235 03:50:58.544331 end: 4.1 power-off (duration 00:00:00) [common]
2237 03:50:58.545985 start: 4.2 read-feedback (timeout 00:10:00) [common]
2238 03:50:58.547304 Listened to connection for namespace 'common' for up to 1s
2240 03:50:58.548718 Listened to connection for namespace 'common' for up to 1s
2241 03:50:59.547525 Finalising connection for namespace 'common'
2242 03:50:59.548265 Disconnecting from shell: Finalise
2243 03:50:59.548726
2244 03:50:59.649849 end: 4.2 read-feedback (duration 00:00:01) [common]
2245 03:50:59.650483 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12543666
2246 03:51:00.260690 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12543666
2247 03:51:00.260879 JobError: Your job cannot terminate cleanly.