Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 03:48:07.309653 lava-dispatcher, installed at version: 2023.10
2 03:48:07.309868 start: 0 validate
3 03:48:07.310008 Start time: 2024-01-16 03:48:07.310000+00:00 (UTC)
4 03:48:07.310129 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:48:07.310265 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 03:48:07.580167 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:48:07.580985 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.304-cip106-27-gf3e967c370d44%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:48:07.850967 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:48:07.851738 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 03:48:08.121276 Using caching service: 'http://localhost/cache/?uri=%s'
11 03:48:08.122020 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.304-cip106-27-gf3e967c370d44%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 03:48:08.391580 validate duration: 1.08
14 03:48:08.391913 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 03:48:08.392011 start: 1.1 download-retry (timeout 00:10:00) [common]
16 03:48:08.392101 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 03:48:08.392229 Not decompressing ramdisk as can be used compressed.
18 03:48:08.392345 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 03:48:08.392430 saving as /var/lib/lava/dispatcher/tmp/12543686/tftp-deploy-48fpjq2s/ramdisk/initrd.cpio.gz
20 03:48:08.392498 total size: 5671549 (5 MB)
21 03:48:08.393528 progress 0 % (0 MB)
22 03:48:08.395227 progress 5 % (0 MB)
23 03:48:08.396946 progress 10 % (0 MB)
24 03:48:08.398380 progress 15 % (0 MB)
25 03:48:08.399977 progress 20 % (1 MB)
26 03:48:08.401639 progress 25 % (1 MB)
27 03:48:08.403153 progress 30 % (1 MB)
28 03:48:08.404785 progress 35 % (1 MB)
29 03:48:08.406487 progress 40 % (2 MB)
30 03:48:08.407922 progress 45 % (2 MB)
31 03:48:08.409534 progress 50 % (2 MB)
32 03:48:08.411116 progress 55 % (3 MB)
33 03:48:08.412516 progress 60 % (3 MB)
34 03:48:08.414099 progress 65 % (3 MB)
35 03:48:08.415686 progress 70 % (3 MB)
36 03:48:08.417151 progress 75 % (4 MB)
37 03:48:08.418713 progress 80 % (4 MB)
38 03:48:08.420312 progress 85 % (4 MB)
39 03:48:08.421721 progress 90 % (4 MB)
40 03:48:08.423299 progress 95 % (5 MB)
41 03:48:08.424913 progress 100 % (5 MB)
42 03:48:08.425024 5 MB downloaded in 0.03 s (166.29 MB/s)
43 03:48:08.425174 end: 1.1.1 http-download (duration 00:00:00) [common]
45 03:48:08.425414 end: 1.1 download-retry (duration 00:00:00) [common]
46 03:48:08.425501 start: 1.2 download-retry (timeout 00:10:00) [common]
47 03:48:08.425586 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 03:48:08.425724 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.304-cip106-27-gf3e967c370d44/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 03:48:08.425795 saving as /var/lib/lava/dispatcher/tmp/12543686/tftp-deploy-48fpjq2s/kernel/bzImage
50 03:48:08.425860 total size: 11575296 (11 MB)
51 03:48:08.425943 No compression specified
52 03:48:08.427026 progress 0 % (0 MB)
53 03:48:08.430151 progress 5 % (0 MB)
54 03:48:08.433389 progress 10 % (1 MB)
55 03:48:08.436410 progress 15 % (1 MB)
56 03:48:08.439545 progress 20 % (2 MB)
57 03:48:08.442774 progress 25 % (2 MB)
58 03:48:08.445755 progress 30 % (3 MB)
59 03:48:08.448913 progress 35 % (3 MB)
60 03:48:08.452057 progress 40 % (4 MB)
61 03:48:08.455060 progress 45 % (4 MB)
62 03:48:08.458240 progress 50 % (5 MB)
63 03:48:08.461385 progress 55 % (6 MB)
64 03:48:08.464424 progress 60 % (6 MB)
65 03:48:08.467551 progress 65 % (7 MB)
66 03:48:08.470685 progress 70 % (7 MB)
67 03:48:08.473650 progress 75 % (8 MB)
68 03:48:08.476805 progress 80 % (8 MB)
69 03:48:08.479903 progress 85 % (9 MB)
70 03:48:08.482837 progress 90 % (9 MB)
71 03:48:08.486017 progress 95 % (10 MB)
72 03:48:08.489128 progress 100 % (11 MB)
73 03:48:08.489266 11 MB downloaded in 0.06 s (174.11 MB/s)
74 03:48:08.489415 end: 1.2.1 http-download (duration 00:00:00) [common]
76 03:48:08.489654 end: 1.2 download-retry (duration 00:00:00) [common]
77 03:48:08.489743 start: 1.3 download-retry (timeout 00:10:00) [common]
78 03:48:08.489832 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 03:48:08.489976 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 03:48:08.490047 saving as /var/lib/lava/dispatcher/tmp/12543686/tftp-deploy-48fpjq2s/nfsrootfs/full.rootfs.tar
81 03:48:08.490109 total size: 126031368 (120 MB)
82 03:48:08.490172 Using unxz to decompress xz
83 03:48:08.494389 progress 0 % (0 MB)
84 03:48:09.003022 progress 5 % (6 MB)
85 03:48:09.500982 progress 10 % (12 MB)
86 03:48:09.997504 progress 15 % (18 MB)
87 03:48:10.565475 progress 20 % (24 MB)
88 03:48:10.923869 progress 25 % (30 MB)
89 03:48:11.268653 progress 30 % (36 MB)
90 03:48:11.547532 progress 35 % (42 MB)
91 03:48:11.732093 progress 40 % (48 MB)
92 03:48:12.111584 progress 45 % (54 MB)
93 03:48:12.492144 progress 50 % (60 MB)
94 03:48:12.842639 progress 55 % (66 MB)
95 03:48:13.206527 progress 60 % (72 MB)
96 03:48:13.550704 progress 65 % (78 MB)
97 03:48:13.950552 progress 70 % (84 MB)
98 03:48:14.380127 progress 75 % (90 MB)
99 03:48:14.804137 progress 80 % (96 MB)
100 03:48:14.904928 progress 85 % (102 MB)
101 03:48:15.064596 progress 90 % (108 MB)
102 03:48:15.404706 progress 95 % (114 MB)
103 03:48:15.782653 progress 100 % (120 MB)
104 03:48:15.787692 120 MB downloaded in 7.30 s (16.47 MB/s)
105 03:48:15.788008 end: 1.3.1 http-download (duration 00:00:07) [common]
107 03:48:15.788400 end: 1.3 download-retry (duration 00:00:07) [common]
108 03:48:15.788496 start: 1.4 download-retry (timeout 00:09:53) [common]
109 03:48:15.788597 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 03:48:15.788754 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.304-cip106-27-gf3e967c370d44/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 03:48:15.788834 saving as /var/lib/lava/dispatcher/tmp/12543686/tftp-deploy-48fpjq2s/modules/modules.tar
112 03:48:15.788899 total size: 484060 (0 MB)
113 03:48:15.788967 Using unxz to decompress xz
114 03:48:15.793346 progress 6 % (0 MB)
115 03:48:15.793774 progress 13 % (0 MB)
116 03:48:15.794020 progress 20 % (0 MB)
117 03:48:15.795718 progress 27 % (0 MB)
118 03:48:15.797862 progress 33 % (0 MB)
119 03:48:15.799950 progress 40 % (0 MB)
120 03:48:15.802052 progress 47 % (0 MB)
121 03:48:15.804164 progress 54 % (0 MB)
122 03:48:15.806340 progress 60 % (0 MB)
123 03:48:15.808532 progress 67 % (0 MB)
124 03:48:15.810778 progress 74 % (0 MB)
125 03:48:15.812980 progress 81 % (0 MB)
126 03:48:15.815026 progress 88 % (0 MB)
127 03:48:15.817142 progress 94 % (0 MB)
128 03:48:15.819868 progress 100 % (0 MB)
129 03:48:15.826596 0 MB downloaded in 0.04 s (12.25 MB/s)
130 03:48:15.826894 end: 1.4.1 http-download (duration 00:00:00) [common]
132 03:48:15.827179 end: 1.4 download-retry (duration 00:00:00) [common]
133 03:48:15.827276 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 03:48:15.827377 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 03:48:19.095807 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12543686/extract-nfsrootfs-55tuluqs
136 03:48:19.096002 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 03:48:19.096099 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
138 03:48:19.096269 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv
139 03:48:19.096639 makedir: /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin
140 03:48:19.096747 makedir: /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/tests
141 03:48:19.096851 makedir: /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/results
142 03:48:19.096965 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-add-keys
143 03:48:19.097124 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-add-sources
144 03:48:19.097259 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-background-process-start
145 03:48:19.097389 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-background-process-stop
146 03:48:19.097518 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-common-functions
147 03:48:19.097645 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-echo-ipv4
148 03:48:19.097774 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-install-packages
149 03:48:19.097901 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-installed-packages
150 03:48:19.098025 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-os-build
151 03:48:19.098150 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-probe-channel
152 03:48:19.098276 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-probe-ip
153 03:48:19.098401 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-target-ip
154 03:48:19.098525 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-target-mac
155 03:48:19.098649 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-target-storage
156 03:48:19.098776 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-test-case
157 03:48:19.098900 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-test-event
158 03:48:19.099023 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-test-feedback
159 03:48:19.099146 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-test-raise
160 03:48:19.099269 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-test-reference
161 03:48:19.099395 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-test-runner
162 03:48:19.099560 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-test-set
163 03:48:19.099689 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-test-shell
164 03:48:19.099819 Updating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-install-packages (oe)
165 03:48:19.099971 Updating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/bin/lava-installed-packages (oe)
166 03:48:19.100101 Creating /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/environment
167 03:48:19.100202 LAVA metadata
168 03:48:19.100272 - LAVA_JOB_ID=12543686
169 03:48:19.100374 - LAVA_DISPATCHER_IP=192.168.201.1
170 03:48:19.100477 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
171 03:48:19.100574 skipped lava-vland-overlay
172 03:48:19.100648 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 03:48:19.100727 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
174 03:48:19.100788 skipped lava-multinode-overlay
175 03:48:19.100861 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 03:48:19.100939 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
177 03:48:19.101012 Loading test definitions
178 03:48:19.101103 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
179 03:48:19.101174 Using /lava-12543686 at stage 0
180 03:48:19.101268 Fetching tests from https://github.com/kernelci/test-definitions
181 03:48:19.101345 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/0/tests/0_ltp-mm'
182 03:48:25.099994 Running '/usr/bin/git checkout kernelci.org
183 03:48:25.180925 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
184 03:48:25.181753 uuid=12543686_1.5.2.3.1 testdef=None
185 03:48:25.181924 end: 1.5.2.3.1 git-repo-action (duration 00:00:06) [common]
187 03:48:25.182169 start: 1.5.2.3.2 test-overlay (timeout 00:09:43) [common]
188 03:48:25.182982 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 03:48:25.183227 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:43) [common]
191 03:48:25.184569 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 03:48:25.184814 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:43) [common]
194 03:48:25.185891 runner path: /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/0/tests/0_ltp-mm test_uuid 12543686_1.5.2.3.1
195 03:48:25.185983 SKIPFILE='skipfile-lkft.yaml'
196 03:48:25.186049 SKIP_INSTALL='true'
197 03:48:25.186109 TST_CMDFILES='mm'
198 03:48:25.186253 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 03:48:25.186461 Creating lava-test-runner.conf files
201 03:48:25.186526 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12543686/lava-overlay-zdcetkpv/lava-12543686/0 for stage 0
202 03:48:25.186621 - 0_ltp-mm
203 03:48:25.186726 end: 1.5.2.3 test-definition (duration 00:00:06) [common]
204 03:48:25.186815 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
205 03:48:32.709824 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 03:48:32.709979 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
207 03:48:32.710073 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 03:48:32.710174 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
209 03:48:32.710269 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
210 03:48:32.857365 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 03:48:32.857769 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
212 03:48:32.857896 extracting modules file /var/lib/lava/dispatcher/tmp/12543686/tftp-deploy-48fpjq2s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12543686/extract-nfsrootfs-55tuluqs
213 03:48:32.879032 extracting modules file /var/lib/lava/dispatcher/tmp/12543686/tftp-deploy-48fpjq2s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12543686/extract-overlay-ramdisk-89xn4gbe/ramdisk
214 03:48:32.900375 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 03:48:32.900520 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
216 03:48:32.900617 [common] Applying overlay to NFS
217 03:48:32.900691 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12543686/compress-overlay-u2ggvn5s/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12543686/extract-nfsrootfs-55tuluqs
218 03:48:33.842807 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 03:48:33.842972 start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
220 03:48:33.843068 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 03:48:33.843158 start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
222 03:48:33.843271 Building ramdisk /var/lib/lava/dispatcher/tmp/12543686/extract-overlay-ramdisk-89xn4gbe/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12543686/extract-overlay-ramdisk-89xn4gbe/ramdisk
223 03:48:33.932857 >> 31372 blocks
224 03:48:34.558691 rename /var/lib/lava/dispatcher/tmp/12543686/extract-overlay-ramdisk-89xn4gbe/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12543686/tftp-deploy-48fpjq2s/ramdisk/ramdisk.cpio.gz
225 03:48:34.559166 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 03:48:34.559323 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
227 03:48:34.559460 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
228 03:48:34.559600 No mkimage arch provided, not using FIT.
229 03:48:34.559729 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 03:48:34.559857 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 03:48:34.560005 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
232 03:48:34.560138 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
233 03:48:34.560256 No LXC device requested
234 03:48:34.560384 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 03:48:34.560520 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
236 03:48:34.560639 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 03:48:34.560754 Checking files for TFTP limit of 4294967296 bytes.
238 03:48:34.561312 end: 1 tftp-deploy (duration 00:00:26) [common]
239 03:48:34.561444 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 03:48:34.561577 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 03:48:34.561754 substitutions:
242 03:48:34.561853 - {DTB}: None
243 03:48:34.561947 - {INITRD}: 12543686/tftp-deploy-48fpjq2s/ramdisk/ramdisk.cpio.gz
244 03:48:34.562050 - {KERNEL}: 12543686/tftp-deploy-48fpjq2s/kernel/bzImage
245 03:48:34.562142 - {LAVA_MAC}: None
246 03:48:34.562237 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12543686/extract-nfsrootfs-55tuluqs
247 03:48:34.562333 - {NFS_SERVER_IP}: 192.168.201.1
248 03:48:34.562420 - {PRESEED_CONFIG}: None
249 03:48:34.562518 - {PRESEED_LOCAL}: None
250 03:48:34.562606 - {RAMDISK}: 12543686/tftp-deploy-48fpjq2s/ramdisk/ramdisk.cpio.gz
251 03:48:34.562693 - {ROOT_PART}: None
252 03:48:34.562789 - {ROOT}: None
253 03:48:34.562877 - {SERVER_IP}: 192.168.201.1
254 03:48:34.562967 - {TEE}: None
255 03:48:34.563061 Parsed boot commands:
256 03:48:34.563148 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 03:48:34.563386 Parsed boot commands: tftpboot 192.168.201.1 12543686/tftp-deploy-48fpjq2s/kernel/bzImage 12543686/tftp-deploy-48fpjq2s/kernel/cmdline 12543686/tftp-deploy-48fpjq2s/ramdisk/ramdisk.cpio.gz
258 03:48:34.563517 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 03:48:34.563639 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 03:48:34.563773 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 03:48:34.563895 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 03:48:34.564005 Not connected, no need to disconnect.
263 03:48:34.564115 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 03:48:34.564239 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 03:48:34.564347 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
266 03:48:34.568945 Setting prompt string to ['lava-test: # ']
267 03:48:34.569356 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 03:48:34.569468 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 03:48:34.569585 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 03:48:34.569678 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 03:48:34.569892 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
272 03:48:39.711772 >> Command sent successfully.
273 03:48:39.723634 Returned 0 in 5 seconds
274 03:48:39.825017 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 03:48:39.826460 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 03:48:39.826971 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 03:48:39.827413 Setting prompt string to 'Starting depthcharge on Helios...'
279 03:48:39.827896 Changing prompt to 'Starting depthcharge on Helios...'
280 03:48:39.828567 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
281 03:48:39.829929 [Enter `^Ec?' for help]
282 03:48:40.435592
283 03:48:40.436178
284 03:48:40.446131 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
285 03:48:40.449462 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
286 03:48:40.453204 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
287 03:48:40.459757 CPU: AES supported, TXT NOT supported, VT supported
288 03:48:40.466578 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
289 03:48:40.469348 PCH: device id 0284 (rev 00) is Cometlake-U Premium
290 03:48:40.476392 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
291 03:48:40.479787 VBOOT: Loading verstage.
292 03:48:40.483150 FMAP: Found "FLASH" version 1.1 at 0xc04000.
293 03:48:40.489451 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
294 03:48:40.493213 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
295 03:48:40.496552 CBFS @ c08000 size 3f8000
296 03:48:40.502649 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
297 03:48:40.506429 CBFS: Locating 'fallback/verstage'
298 03:48:40.509506 CBFS: Found @ offset 10fb80 size 1072c
299 03:48:40.509942
300 03:48:40.510285
301 03:48:40.522963 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
302 03:48:40.536358 Probing TPM: . done!
303 03:48:40.539945 TPM ready after 0 ms
304 03:48:40.542934 Connected to device vid:did:rid of 1ae0:0028:00
305 03:48:40.553491 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
306 03:48:40.557253 Initialized TPM device CR50 revision 0
307 03:48:40.601376 tlcl_send_startup: Startup return code is 0
308 03:48:40.601908 TPM: setup succeeded
309 03:48:40.613713 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
310 03:48:40.618115 Chrome EC: UHEPI supported
311 03:48:40.621140 Phase 1
312 03:48:40.624350 FMAP: area GBB found @ c05000 (12288 bytes)
313 03:48:40.631289 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
314 03:48:40.631727 Phase 2
315 03:48:40.634468 Phase 3
316 03:48:40.637996 FMAP: area GBB found @ c05000 (12288 bytes)
317 03:48:40.644548 VB2:vb2_report_dev_firmware() This is developer signed firmware
318 03:48:40.651361 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
319 03:48:40.654758 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 03:48:40.661022 VB2:vb2_verify_keyblock() Checking keyblock signature...
321 03:48:40.676728 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
322 03:48:40.679753 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 03:48:40.686770 VB2:vb2_verify_fw_preamble() Verifying preamble.
324 03:48:40.690550 Phase 4
325 03:48:40.694114 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
326 03:48:40.700833 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
327 03:48:40.879959 VB2:vb2_rsa_verify_digest() Digest check failed!
328 03:48:40.886920 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
329 03:48:40.887375 Saving nvdata
330 03:48:40.889941 Reboot requested (10020007)
331 03:48:40.893713 board_reset() called!
332 03:48:40.894162 full_reset() called!
333 03:48:45.402327
334 03:48:45.402856
335 03:48:45.411779 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
336 03:48:45.415051 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
337 03:48:45.422022 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
338 03:48:45.425708 CPU: AES supported, TXT NOT supported, VT supported
339 03:48:45.432216 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
340 03:48:45.435309 PCH: device id 0284 (rev 00) is Cometlake-U Premium
341 03:48:45.441810 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
342 03:48:45.445255 VBOOT: Loading verstage.
343 03:48:45.448466 FMAP: Found "FLASH" version 1.1 at 0xc04000.
344 03:48:45.455319 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
345 03:48:45.461906 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
346 03:48:45.462065 CBFS @ c08000 size 3f8000
347 03:48:45.467990 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
348 03:48:45.471397 CBFS: Locating 'fallback/verstage'
349 03:48:45.475079 CBFS: Found @ offset 10fb80 size 1072c
350 03:48:45.478729
351 03:48:45.478884
352 03:48:45.488606 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
353 03:48:45.503231 Probing TPM: . done!
354 03:48:45.506345 TPM ready after 0 ms
355 03:48:45.510032 Connected to device vid:did:rid of 1ae0:0028:00
356 03:48:45.520097 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
357 03:48:45.524134 Initialized TPM device CR50 revision 0
358 03:48:45.568601 tlcl_send_startup: Startup return code is 0
359 03:48:45.569091 TPM: setup succeeded
360 03:48:45.581078 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
361 03:48:45.584798 Chrome EC: UHEPI supported
362 03:48:45.588028 Phase 1
363 03:48:45.591007 FMAP: area GBB found @ c05000 (12288 bytes)
364 03:48:45.597677 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
365 03:48:45.604132 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
366 03:48:45.607907 Recovery requested (1009000e)
367 03:48:45.613277 Saving nvdata
368 03:48:45.619725 tlcl_extend: response is 0
369 03:48:45.627945 tlcl_extend: response is 0
370 03:48:45.635473 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
371 03:48:45.638829 CBFS @ c08000 size 3f8000
372 03:48:45.645006 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
373 03:48:45.648807 CBFS: Locating 'fallback/romstage'
374 03:48:45.651911 CBFS: Found @ offset 80 size 145fc
375 03:48:45.655122 Accumulated console time in verstage 98 ms
376 03:48:45.655276
377 03:48:45.655396
378 03:48:45.668732 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
379 03:48:45.675009 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
380 03:48:45.678036 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
381 03:48:45.681509 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
382 03:48:45.688018 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
383 03:48:45.691498 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
384 03:48:45.695071 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
385 03:48:45.698746 TCO_STS: 0000 0000
386 03:48:45.701517 GEN_PMCON: e0015238 00000200
387 03:48:45.704720 GBLRST_CAUSE: 00000000 00000000
388 03:48:45.704927 prev_sleep_state 5
389 03:48:45.708348 Boot Count incremented to 3897
390 03:48:45.715361 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 03:48:45.719455 CBFS @ c08000 size 3f8000
392 03:48:45.724937 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
393 03:48:45.725352 CBFS: Locating 'fspm.bin'
394 03:48:45.731912 CBFS: Found @ offset 5ffc0 size 71000
395 03:48:45.734941 Chrome EC: UHEPI supported
396 03:48:45.741489 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
397 03:48:45.745034 Probing TPM: done!
398 03:48:45.752034 Connected to device vid:did:rid of 1ae0:0028:00
399 03:48:45.761719 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
400 03:48:45.767904 Initialized TPM device CR50 revision 0
401 03:48:45.777171 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
402 03:48:45.783307 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
403 03:48:45.786858 MRC cache found, size 1948
404 03:48:45.790252 bootmode is set to: 2
405 03:48:45.793061 PRMRR disabled by config.
406 03:48:45.796977 SPD INDEX = 1
407 03:48:45.799808 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
408 03:48:45.803518 CBFS @ c08000 size 3f8000
409 03:48:45.809586 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
410 03:48:45.810171 CBFS: Locating 'spd.bin'
411 03:48:45.813061 CBFS: Found @ offset 5fb80 size 400
412 03:48:45.816030 SPD: module type is LPDDR3
413 03:48:45.820127 SPD: module part is
414 03:48:45.826660 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
415 03:48:45.829350 SPD: device width 4 bits, bus width 8 bits
416 03:48:45.832988 SPD: module size is 4096 MB (per channel)
417 03:48:45.836701 memory slot: 0 configuration done.
418 03:48:45.839657 memory slot: 2 configuration done.
419 03:48:45.891854 CBMEM:
420 03:48:45.894925 IMD: root @ 99fff000 254 entries.
421 03:48:45.898522 IMD: root @ 99ffec00 62 entries.
422 03:48:45.901745 External stage cache:
423 03:48:45.904875 IMD: root @ 9abff000 254 entries.
424 03:48:45.908453 IMD: root @ 9abfec00 62 entries.
425 03:48:45.911586 Chrome EC: clear events_b mask to 0x0000000020004000
426 03:48:45.927730 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
427 03:48:45.940545 tlcl_write: response is 0
428 03:48:45.950000 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
429 03:48:45.956207 MRC: TPM MRC hash updated successfully.
430 03:48:45.956786 2 DIMMs found
431 03:48:45.960027 SMM Memory Map
432 03:48:45.963079 SMRAM : 0x9a000000 0x1000000
433 03:48:45.966362 Subregion 0: 0x9a000000 0xa00000
434 03:48:45.969394 Subregion 1: 0x9aa00000 0x200000
435 03:48:45.973323 Subregion 2: 0x9ac00000 0x400000
436 03:48:45.976031 top_of_ram = 0x9a000000
437 03:48:45.979607 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
438 03:48:45.986590 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
439 03:48:45.989416 MTRR Range: Start=ff000000 End=0 (Size 1000000)
440 03:48:45.995990 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 03:48:45.999159 CBFS @ c08000 size 3f8000
442 03:48:46.002827 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 03:48:46.006364 CBFS: Locating 'fallback/postcar'
444 03:48:46.012422 CBFS: Found @ offset 107000 size 4b44
445 03:48:46.016388 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
446 03:48:46.028243 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
447 03:48:46.032116 Processing 180 relocs. Offset value of 0x97c0c000
448 03:48:46.039906 Accumulated console time in romstage 286 ms
449 03:48:46.040503
450 03:48:46.040917
451 03:48:46.049833 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
452 03:48:46.056877 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
453 03:48:46.059784 CBFS @ c08000 size 3f8000
454 03:48:46.063278 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
455 03:48:46.069881 CBFS: Locating 'fallback/ramstage'
456 03:48:46.073019 CBFS: Found @ offset 43380 size 1b9e8
457 03:48:46.080231 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
458 03:48:46.111820 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
459 03:48:46.115420 Processing 3976 relocs. Offset value of 0x98db0000
460 03:48:46.121605 Accumulated console time in postcar 52 ms
461 03:48:46.122354
462 03:48:46.122770
463 03:48:46.132639 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
464 03:48:46.138516 FMAP: area RO_VPD found @ c00000 (16384 bytes)
465 03:48:46.142041 WARNING: RO_VPD is uninitialized or empty.
466 03:48:46.145444 FMAP: area RW_VPD found @ af8000 (8192 bytes)
467 03:48:46.152074 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 03:48:46.152711 Normal boot.
469 03:48:46.158298 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
470 03:48:46.162413 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 03:48:46.165589 CBFS @ c08000 size 3f8000
472 03:48:46.172091 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 03:48:46.175072 CBFS: Locating 'cpu_microcode_blob.bin'
474 03:48:46.178614 CBFS: Found @ offset 14700 size 2ec00
475 03:48:46.181716 microcode: sig=0x806ec pf=0x4 revision=0xc9
476 03:48:46.185268 Skip microcode update
477 03:48:46.188469 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
478 03:48:46.191863 CBFS @ c08000 size 3f8000
479 03:48:46.198132 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
480 03:48:46.201523 CBFS: Locating 'fsps.bin'
481 03:48:46.205234 CBFS: Found @ offset d1fc0 size 35000
482 03:48:46.230112 Detected 4 core, 8 thread CPU.
483 03:48:46.233510 Setting up SMI for CPU
484 03:48:46.236920 IED base = 0x9ac00000
485 03:48:46.237519 IED size = 0x00400000
486 03:48:46.240028 Will perform SMM setup.
487 03:48:46.246616 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
488 03:48:46.252898 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
489 03:48:46.256605 Processing 16 relocs. Offset value of 0x00030000
490 03:48:46.260503 Attempting to start 7 APs
491 03:48:46.263516 Waiting for 10ms after sending INIT.
492 03:48:46.279630 Waiting for 1st SIPI to complete...done.
493 03:48:46.280218 AP: slot 3 apic_id 1.
494 03:48:46.286240 Waiting for 2nd SIPI to complete...done.
495 03:48:46.286735 AP: slot 7 apic_id 5.
496 03:48:46.289531 AP: slot 6 apic_id 4.
497 03:48:46.293120 AP: slot 1 apic_id 2.
498 03:48:46.293588 AP: slot 4 apic_id 3.
499 03:48:46.296099 AP: slot 2 apic_id 7.
500 03:48:46.299799 AP: slot 5 apic_id 6.
501 03:48:46.306402 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
502 03:48:46.312873 Processing 13 relocs. Offset value of 0x00038000
503 03:48:46.315962 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
504 03:48:46.322707 Installing SMM handler to 0x9a000000
505 03:48:46.329780 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
506 03:48:46.333084 Processing 658 relocs. Offset value of 0x9a010000
507 03:48:46.343265 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
508 03:48:46.345986 Processing 13 relocs. Offset value of 0x9a008000
509 03:48:46.352689 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
510 03:48:46.359246 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
511 03:48:46.366211 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
512 03:48:46.368851 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
513 03:48:46.375727 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
514 03:48:46.382459 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
515 03:48:46.385525 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
516 03:48:46.391949 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
517 03:48:46.395499 Clearing SMI status registers
518 03:48:46.399397 SMI_STS: PM1
519 03:48:46.399953 PM1_STS: PWRBTN
520 03:48:46.402699 TCO_STS: SECOND_TO
521 03:48:46.406377 New SMBASE 0x9a000000
522 03:48:46.408996 In relocation handler: CPU 0
523 03:48:46.412565 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
524 03:48:46.415779 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 03:48:46.419665 Relocation complete.
526 03:48:46.422456 New SMBASE 0x99fff400
527 03:48:46.422911 In relocation handler: CPU 3
528 03:48:46.428665 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
529 03:48:46.432449 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 03:48:46.436009 Relocation complete.
531 03:48:46.439232 New SMBASE 0x99fff800
532 03:48:46.439792 In relocation handler: CPU 2
533 03:48:46.445912 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
534 03:48:46.448948 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 03:48:46.452325 Relocation complete.
536 03:48:46.452879 New SMBASE 0x99ffec00
537 03:48:46.456343 In relocation handler: CPU 5
538 03:48:46.462418 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
539 03:48:46.465638 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 03:48:46.469061 Relocation complete.
541 03:48:46.469601 New SMBASE 0x99fffc00
542 03:48:46.472491 In relocation handler: CPU 1
543 03:48:46.475718 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
544 03:48:46.482527 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 03:48:46.485692 Relocation complete.
546 03:48:46.486234 New SMBASE 0x99fff000
547 03:48:46.489136 In relocation handler: CPU 4
548 03:48:46.492173 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
549 03:48:46.498855 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 03:48:46.502704 Relocation complete.
551 03:48:46.503248 New SMBASE 0x99ffe400
552 03:48:46.505353 In relocation handler: CPU 7
553 03:48:46.508695 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
554 03:48:46.515542 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 03:48:46.516090 Relocation complete.
556 03:48:46.518981 New SMBASE 0x99ffe800
557 03:48:46.522604 In relocation handler: CPU 6
558 03:48:46.525363 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
559 03:48:46.532431 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 03:48:46.532976 Relocation complete.
561 03:48:46.535807 Initializing CPU #0
562 03:48:46.538829 CPU: vendor Intel device 806ec
563 03:48:46.542329 CPU: family 06, model 8e, stepping 0c
564 03:48:46.545190 Clearing out pending MCEs
565 03:48:46.549249 Setting up local APIC...
566 03:48:46.549816 apic_id: 0x00 done.
567 03:48:46.551981 Turbo is available but hidden
568 03:48:46.556024 Turbo is available and visible
569 03:48:46.558853 VMX status: enabled
570 03:48:46.562363 IA32_FEATURE_CONTROL status: locked
571 03:48:46.565219 Skip microcode update
572 03:48:46.565778 CPU #0 initialized
573 03:48:46.568858 Initializing CPU #3
574 03:48:46.569307 Initializing CPU #2
575 03:48:46.572078 Initializing CPU #5
576 03:48:46.575493 CPU: vendor Intel device 806ec
577 03:48:46.578629 CPU: family 06, model 8e, stepping 0c
578 03:48:46.581947 CPU: vendor Intel device 806ec
579 03:48:46.585255 CPU: family 06, model 8e, stepping 0c
580 03:48:46.588640 Clearing out pending MCEs
581 03:48:46.592424 Clearing out pending MCEs
582 03:48:46.595591 Setting up local APIC...
583 03:48:46.596123 Initializing CPU #7
584 03:48:46.598633 Initializing CPU #6
585 03:48:46.602402 CPU: vendor Intel device 806ec
586 03:48:46.604999 CPU: family 06, model 8e, stepping 0c
587 03:48:46.608459 CPU: vendor Intel device 806ec
588 03:48:46.611716 CPU: family 06, model 8e, stepping 0c
589 03:48:46.615423 Clearing out pending MCEs
590 03:48:46.618091 Clearing out pending MCEs
591 03:48:46.618570 Setting up local APIC...
592 03:48:46.621657 apic_id: 0x07 done.
593 03:48:46.624912 Setting up local APIC...
594 03:48:46.628480 CPU: vendor Intel device 806ec
595 03:48:46.631850 CPU: family 06, model 8e, stepping 0c
596 03:48:46.634803 Clearing out pending MCEs
597 03:48:46.635284 Initializing CPU #4
598 03:48:46.638425 Initializing CPU #1
599 03:48:46.641865 CPU: vendor Intel device 806ec
600 03:48:46.644669 CPU: family 06, model 8e, stepping 0c
601 03:48:46.647980 CPU: vendor Intel device 806ec
602 03:48:46.651504 CPU: family 06, model 8e, stepping 0c
603 03:48:46.654649 Clearing out pending MCEs
604 03:48:46.657622 Clearing out pending MCEs
605 03:48:46.658184 Setting up local APIC...
606 03:48:46.661257 apic_id: 0x05 done.
607 03:48:46.665248 Setting up local APIC...
608 03:48:46.668541 Setting up local APIC...
609 03:48:46.669080 apic_id: 0x06 done.
610 03:48:46.671217 VMX status: enabled
611 03:48:46.671645 VMX status: enabled
612 03:48:46.678319 IA32_FEATURE_CONTROL status: locked
613 03:48:46.681263 IA32_FEATURE_CONTROL status: locked
614 03:48:46.681705 Skip microcode update
615 03:48:46.684941 apic_id: 0x01 done.
616 03:48:46.688081 Skip microcode update
617 03:48:46.688552 CPU #2 initialized
618 03:48:46.691443 CPU #5 initialized
619 03:48:46.691971 VMX status: enabled
620 03:48:46.694881 apic_id: 0x03 done.
621 03:48:46.698289 Setting up local APIC...
622 03:48:46.701256 IA32_FEATURE_CONTROL status: locked
623 03:48:46.705241 VMX status: enabled
624 03:48:46.705769 apic_id: 0x02 done.
625 03:48:46.708182 IA32_FEATURE_CONTROL status: locked
626 03:48:46.711370 VMX status: enabled
627 03:48:46.714049 Skip microcode update
628 03:48:46.718041 IA32_FEATURE_CONTROL status: locked
629 03:48:46.718468 CPU #4 initialized
630 03:48:46.721255 Skip microcode update
631 03:48:46.724628 Skip microcode update
632 03:48:46.725057 CPU #1 initialized
633 03:48:46.727814 VMX status: enabled
634 03:48:46.728406 apic_id: 0x04 done.
635 03:48:46.734541 IA32_FEATURE_CONTROL status: locked
636 03:48:46.735068 VMX status: enabled
637 03:48:46.737571 Skip microcode update
638 03:48:46.741056 IA32_FEATURE_CONTROL status: locked
639 03:48:46.741491 CPU #7 initialized
640 03:48:46.744263 Skip microcode update
641 03:48:46.747270 CPU #3 initialized
642 03:48:46.747836 CPU #6 initialized
643 03:48:46.754266 bsp_do_flight_plan done after 466 msecs.
644 03:48:46.756984 CPU: frequency set to 4200 MHz
645 03:48:46.757430 Enabling SMIs.
646 03:48:46.757777 Locking SMM.
647 03:48:46.773905 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
648 03:48:46.777110 CBFS @ c08000 size 3f8000
649 03:48:46.784091 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
650 03:48:46.784667 CBFS: Locating 'vbt.bin'
651 03:48:46.786889 CBFS: Found @ offset 5f5c0 size 499
652 03:48:46.793822 Found a VBT of 4608 bytes after decompression
653 03:48:46.974869 Display FSP Version Info HOB
654 03:48:46.978174 Reference Code - CPU = 9.0.1e.30
655 03:48:46.981520 uCode Version = 0.0.0.ca
656 03:48:46.984669 TXT ACM version = ff.ff.ff.ffff
657 03:48:46.988088 Display FSP Version Info HOB
658 03:48:46.991749 Reference Code - ME = 9.0.1e.30
659 03:48:46.994815 MEBx version = 0.0.0.0
660 03:48:46.997840 ME Firmware Version = Consumer SKU
661 03:48:47.001678 Display FSP Version Info HOB
662 03:48:47.004701 Reference Code - CML PCH = 9.0.1e.30
663 03:48:47.008258 PCH-CRID Status = Disabled
664 03:48:47.011347 PCH-CRID Original Value = ff.ff.ff.ffff
665 03:48:47.014482 PCH-CRID New Value = ff.ff.ff.ffff
666 03:48:47.017425 OPROM - RST - RAID = ff.ff.ff.ffff
667 03:48:47.021268 ChipsetInit Base Version = ff.ff.ff.ffff
668 03:48:47.024277 ChipsetInit Oem Version = ff.ff.ff.ffff
669 03:48:47.027582 Display FSP Version Info HOB
670 03:48:47.034403 Reference Code - SA - System Agent = 9.0.1e.30
671 03:48:47.037598 Reference Code - MRC = 0.7.1.6c
672 03:48:47.040709 SA - PCIe Version = 9.0.1e.30
673 03:48:47.041179 SA-CRID Status = Disabled
674 03:48:47.043829 SA-CRID Original Value = 0.0.0.c
675 03:48:47.047101 SA-CRID New Value = 0.0.0.c
676 03:48:47.050507 OPROM - VBIOS = ff.ff.ff.ffff
677 03:48:47.053712 RTC Init
678 03:48:47.056787 Set power on after power failure.
679 03:48:47.056977 Disabling Deep S3
680 03:48:47.060070 Disabling Deep S3
681 03:48:47.060257 Disabling Deep S4
682 03:48:47.063705 Disabling Deep S4
683 03:48:47.066951 Disabling Deep S5
684 03:48:47.067085 Disabling Deep S5
685 03:48:47.073714 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
686 03:48:47.076657 Enumerating buses...
687 03:48:47.079900 Show all devs... Before device enumeration.
688 03:48:47.083308 Root Device: enabled 1
689 03:48:47.083406 CPU_CLUSTER: 0: enabled 1
690 03:48:47.086127 DOMAIN: 0000: enabled 1
691 03:48:47.090397 APIC: 00: enabled 1
692 03:48:47.093453 PCI: 00:00.0: enabled 1
693 03:48:47.093541 PCI: 00:02.0: enabled 1
694 03:48:47.096664 PCI: 00:04.0: enabled 0
695 03:48:47.099637 PCI: 00:05.0: enabled 0
696 03:48:47.099722 PCI: 00:12.0: enabled 1
697 03:48:47.103439 PCI: 00:12.5: enabled 0
698 03:48:47.106456 PCI: 00:12.6: enabled 0
699 03:48:47.109658 PCI: 00:14.0: enabled 1
700 03:48:47.109746 PCI: 00:14.1: enabled 0
701 03:48:47.113206 PCI: 00:14.3: enabled 1
702 03:48:47.116282 PCI: 00:14.5: enabled 0
703 03:48:47.119615 PCI: 00:15.0: enabled 1
704 03:48:47.119702 PCI: 00:15.1: enabled 1
705 03:48:47.122991 PCI: 00:15.2: enabled 0
706 03:48:47.125937 PCI: 00:15.3: enabled 0
707 03:48:47.129541 PCI: 00:16.0: enabled 1
708 03:48:47.129630 PCI: 00:16.1: enabled 0
709 03:48:47.132801 PCI: 00:16.2: enabled 0
710 03:48:47.135917 PCI: 00:16.3: enabled 0
711 03:48:47.139609 PCI: 00:16.4: enabled 0
712 03:48:47.139695 PCI: 00:16.5: enabled 0
713 03:48:47.142669 PCI: 00:17.0: enabled 1
714 03:48:47.145819 PCI: 00:19.0: enabled 1
715 03:48:47.145917 PCI: 00:19.1: enabled 0
716 03:48:47.149288 PCI: 00:19.2: enabled 0
717 03:48:47.152831 PCI: 00:1a.0: enabled 0
718 03:48:47.156253 PCI: 00:1c.0: enabled 0
719 03:48:47.156389 PCI: 00:1c.1: enabled 0
720 03:48:47.159399 PCI: 00:1c.2: enabled 0
721 03:48:47.162501 PCI: 00:1c.3: enabled 0
722 03:48:47.166169 PCI: 00:1c.4: enabled 0
723 03:48:47.166258 PCI: 00:1c.5: enabled 0
724 03:48:47.169306 PCI: 00:1c.6: enabled 0
725 03:48:47.172492 PCI: 00:1c.7: enabled 0
726 03:48:47.175912 PCI: 00:1d.0: enabled 1
727 03:48:47.176026 PCI: 00:1d.1: enabled 0
728 03:48:47.178743 PCI: 00:1d.2: enabled 0
729 03:48:47.182558 PCI: 00:1d.3: enabled 0
730 03:48:47.185648 PCI: 00:1d.4: enabled 0
731 03:48:47.185735 PCI: 00:1d.5: enabled 1
732 03:48:47.189429 PCI: 00:1e.0: enabled 1
733 03:48:47.192342 PCI: 00:1e.1: enabled 0
734 03:48:47.192434 PCI: 00:1e.2: enabled 1
735 03:48:47.195573 PCI: 00:1e.3: enabled 1
736 03:48:47.199006 PCI: 00:1f.0: enabled 1
737 03:48:47.202265 PCI: 00:1f.1: enabled 1
738 03:48:47.202357 PCI: 00:1f.2: enabled 1
739 03:48:47.205804 PCI: 00:1f.3: enabled 1
740 03:48:47.208590 PCI: 00:1f.4: enabled 1
741 03:48:47.212095 PCI: 00:1f.5: enabled 1
742 03:48:47.212184 PCI: 00:1f.6: enabled 0
743 03:48:47.215210 USB0 port 0: enabled 1
744 03:48:47.218984 I2C: 00:15: enabled 1
745 03:48:47.219072 I2C: 00:5d: enabled 1
746 03:48:47.222093 GENERIC: 0.0: enabled 1
747 03:48:47.225275 I2C: 00:1a: enabled 1
748 03:48:47.228839 I2C: 00:38: enabled 1
749 03:48:47.228959 I2C: 00:39: enabled 1
750 03:48:47.231920 I2C: 00:3a: enabled 1
751 03:48:47.235720 I2C: 00:3b: enabled 1
752 03:48:47.235808 PCI: 00:00.0: enabled 1
753 03:48:47.238721 SPI: 00: enabled 1
754 03:48:47.238804 SPI: 01: enabled 1
755 03:48:47.241800 PNP: 0c09.0: enabled 1
756 03:48:47.245538 USB2 port 0: enabled 1
757 03:48:47.248780 USB2 port 1: enabled 1
758 03:48:47.248864 USB2 port 2: enabled 0
759 03:48:47.251855 USB2 port 3: enabled 0
760 03:48:47.254921 USB2 port 5: enabled 0
761 03:48:47.255005 USB2 port 6: enabled 1
762 03:48:47.259151 USB2 port 9: enabled 1
763 03:48:47.262222 USB3 port 0: enabled 1
764 03:48:47.265404 USB3 port 1: enabled 1
765 03:48:47.265491 USB3 port 2: enabled 1
766 03:48:47.268430 USB3 port 3: enabled 1
767 03:48:47.271923 USB3 port 4: enabled 0
768 03:48:47.272117 APIC: 02: enabled 1
769 03:48:47.275185 APIC: 07: enabled 1
770 03:48:47.278586 APIC: 01: enabled 1
771 03:48:47.278708 APIC: 03: enabled 1
772 03:48:47.281132 APIC: 06: enabled 1
773 03:48:47.281214 APIC: 04: enabled 1
774 03:48:47.284826 APIC: 05: enabled 1
775 03:48:47.288148 Compare with tree...
776 03:48:47.288358 Root Device: enabled 1
777 03:48:47.291562 CPU_CLUSTER: 0: enabled 1
778 03:48:47.294569 APIC: 00: enabled 1
779 03:48:47.298098 APIC: 02: enabled 1
780 03:48:47.298259 APIC: 07: enabled 1
781 03:48:47.301911 APIC: 01: enabled 1
782 03:48:47.304523 APIC: 03: enabled 1
783 03:48:47.304706 APIC: 06: enabled 1
784 03:48:47.307872 APIC: 04: enabled 1
785 03:48:47.311027 APIC: 05: enabled 1
786 03:48:47.311131 DOMAIN: 0000: enabled 1
787 03:48:47.314754 PCI: 00:00.0: enabled 1
788 03:48:47.317990 PCI: 00:02.0: enabled 1
789 03:48:47.320996 PCI: 00:04.0: enabled 0
790 03:48:47.324872 PCI: 00:05.0: enabled 0
791 03:48:47.325009 PCI: 00:12.0: enabled 1
792 03:48:47.327955 PCI: 00:12.5: enabled 0
793 03:48:47.331065 PCI: 00:12.6: enabled 0
794 03:48:47.334281 PCI: 00:14.0: enabled 1
795 03:48:47.337979 USB0 port 0: enabled 1
796 03:48:47.338184 USB2 port 0: enabled 1
797 03:48:47.341031 USB2 port 1: enabled 1
798 03:48:47.343952 USB2 port 2: enabled 0
799 03:48:47.348227 USB2 port 3: enabled 0
800 03:48:47.351356 USB2 port 5: enabled 0
801 03:48:47.351765 USB2 port 6: enabled 1
802 03:48:47.354206 USB2 port 9: enabled 1
803 03:48:47.357970 USB3 port 0: enabled 1
804 03:48:47.361013 USB3 port 1: enabled 1
805 03:48:47.365059 USB3 port 2: enabled 1
806 03:48:47.368350 USB3 port 3: enabled 1
807 03:48:47.368965 USB3 port 4: enabled 0
808 03:48:47.371012 PCI: 00:14.1: enabled 0
809 03:48:47.374852 PCI: 00:14.3: enabled 1
810 03:48:47.377861 PCI: 00:14.5: enabled 0
811 03:48:47.381151 PCI: 00:15.0: enabled 1
812 03:48:47.381748 I2C: 00:15: enabled 1
813 03:48:47.384439 PCI: 00:15.1: enabled 1
814 03:48:47.387879 I2C: 00:5d: enabled 1
815 03:48:47.391769 GENERIC: 0.0: enabled 1
816 03:48:47.394666 PCI: 00:15.2: enabled 0
817 03:48:47.395108 PCI: 00:15.3: enabled 0
818 03:48:47.397662 PCI: 00:16.0: enabled 1
819 03:48:47.400891 PCI: 00:16.1: enabled 0
820 03:48:47.404650 PCI: 00:16.2: enabled 0
821 03:48:47.407677 PCI: 00:16.3: enabled 0
822 03:48:47.408110 PCI: 00:16.4: enabled 0
823 03:48:47.410782 PCI: 00:16.5: enabled 0
824 03:48:47.414046 PCI: 00:17.0: enabled 1
825 03:48:47.417271 PCI: 00:19.0: enabled 1
826 03:48:47.417707 I2C: 00:1a: enabled 1
827 03:48:47.420511 I2C: 00:38: enabled 1
828 03:48:47.424003 I2C: 00:39: enabled 1
829 03:48:47.427263 I2C: 00:3a: enabled 1
830 03:48:47.430673 I2C: 00:3b: enabled 1
831 03:48:47.431205 PCI: 00:19.1: enabled 0
832 03:48:47.434125 PCI: 00:19.2: enabled 0
833 03:48:47.437015 PCI: 00:1a.0: enabled 0
834 03:48:47.440344 PCI: 00:1c.0: enabled 0
835 03:48:47.440876 PCI: 00:1c.1: enabled 0
836 03:48:47.444110 PCI: 00:1c.2: enabled 0
837 03:48:47.447050 PCI: 00:1c.3: enabled 0
838 03:48:47.450644 PCI: 00:1c.4: enabled 0
839 03:48:47.453714 PCI: 00:1c.5: enabled 0
840 03:48:47.454148 PCI: 00:1c.6: enabled 0
841 03:48:47.456896 PCI: 00:1c.7: enabled 0
842 03:48:47.460657 PCI: 00:1d.0: enabled 1
843 03:48:47.463843 PCI: 00:1d.1: enabled 0
844 03:48:47.467195 PCI: 00:1d.2: enabled 0
845 03:48:47.467637 PCI: 00:1d.3: enabled 0
846 03:48:47.470343 PCI: 00:1d.4: enabled 0
847 03:48:47.473649 PCI: 00:1d.5: enabled 1
848 03:48:47.476696 PCI: 00:00.0: enabled 1
849 03:48:47.479933 PCI: 00:1e.0: enabled 1
850 03:48:47.480406 PCI: 00:1e.1: enabled 0
851 03:48:47.483730 PCI: 00:1e.2: enabled 1
852 03:48:47.486655 SPI: 00: enabled 1
853 03:48:47.490022 PCI: 00:1e.3: enabled 1
854 03:48:47.490449 SPI: 01: enabled 1
855 03:48:47.493588 PCI: 00:1f.0: enabled 1
856 03:48:47.496829 PNP: 0c09.0: enabled 1
857 03:48:47.500317 PCI: 00:1f.1: enabled 1
858 03:48:47.503373 PCI: 00:1f.2: enabled 1
859 03:48:47.503907 PCI: 00:1f.3: enabled 1
860 03:48:47.507124 PCI: 00:1f.4: enabled 1
861 03:48:47.510035 PCI: 00:1f.5: enabled 1
862 03:48:47.513847 PCI: 00:1f.6: enabled 0
863 03:48:47.514380 Root Device scanning...
864 03:48:47.516768 scan_static_bus for Root Device
865 03:48:47.520052 CPU_CLUSTER: 0 enabled
866 03:48:47.523405 DOMAIN: 0000 enabled
867 03:48:47.526464 DOMAIN: 0000 scanning...
868 03:48:47.530228 PCI: pci_scan_bus for bus 00
869 03:48:47.530890 PCI: 00:00.0 [8086/0000] ops
870 03:48:47.532983 PCI: 00:00.0 [8086/9b61] enabled
871 03:48:47.536547 PCI: 00:02.0 [8086/0000] bus ops
872 03:48:47.539695 PCI: 00:02.0 [8086/9b41] enabled
873 03:48:47.546449 PCI: 00:04.0 [8086/1903] disabled
874 03:48:47.549620 PCI: 00:08.0 [8086/1911] enabled
875 03:48:47.552994 PCI: 00:12.0 [8086/02f9] enabled
876 03:48:47.556654 PCI: 00:14.0 [8086/0000] bus ops
877 03:48:47.559804 PCI: 00:14.0 [8086/02ed] enabled
878 03:48:47.563291 PCI: 00:14.2 [8086/02ef] enabled
879 03:48:47.566638 PCI: 00:14.3 [8086/02f0] enabled
880 03:48:47.569815 PCI: 00:15.0 [8086/0000] bus ops
881 03:48:47.572923 PCI: 00:15.0 [8086/02e8] enabled
882 03:48:47.575940 PCI: 00:15.1 [8086/0000] bus ops
883 03:48:47.579507 PCI: 00:15.1 [8086/02e9] enabled
884 03:48:47.579957 PCI: 00:16.0 [8086/0000] ops
885 03:48:47.582737 PCI: 00:16.0 [8086/02e0] enabled
886 03:48:47.586222 PCI: 00:17.0 [8086/0000] ops
887 03:48:47.590029 PCI: 00:17.0 [8086/02d3] enabled
888 03:48:47.593001 PCI: 00:19.0 [8086/0000] bus ops
889 03:48:47.596071 PCI: 00:19.0 [8086/02c5] enabled
890 03:48:47.600195 PCI: 00:1d.0 [8086/0000] bus ops
891 03:48:47.603305 PCI: 00:1d.0 [8086/02b0] enabled
892 03:48:47.609882 PCI: Static device PCI: 00:1d.5 not found, disabling it.
893 03:48:47.613037 PCI: 00:1e.0 [8086/0000] ops
894 03:48:47.616249 PCI: 00:1e.0 [8086/02a8] enabled
895 03:48:47.619747 PCI: 00:1e.2 [8086/0000] bus ops
896 03:48:47.622751 PCI: 00:1e.2 [8086/02aa] enabled
897 03:48:47.626020 PCI: 00:1e.3 [8086/0000] bus ops
898 03:48:47.629315 PCI: 00:1e.3 [8086/02ab] enabled
899 03:48:47.632763 PCI: 00:1f.0 [8086/0000] bus ops
900 03:48:47.636089 PCI: 00:1f.0 [8086/0284] enabled
901 03:48:47.642967 PCI: Static device PCI: 00:1f.1 not found, disabling it.
902 03:48:47.645903 PCI: Static device PCI: 00:1f.2 not found, disabling it.
903 03:48:47.649834 PCI: 00:1f.3 [8086/0000] bus ops
904 03:48:47.652674 PCI: 00:1f.3 [8086/02c8] enabled
905 03:48:47.656486 PCI: 00:1f.4 [8086/0000] bus ops
906 03:48:47.659121 PCI: 00:1f.4 [8086/02a3] enabled
907 03:48:47.663018 PCI: 00:1f.5 [8086/0000] bus ops
908 03:48:47.666251 PCI: 00:1f.5 [8086/02a4] enabled
909 03:48:47.669443 PCI: Leftover static devices:
910 03:48:47.672835 PCI: 00:05.0
911 03:48:47.673266 PCI: 00:12.5
912 03:48:47.675846 PCI: 00:12.6
913 03:48:47.676272 PCI: 00:14.1
914 03:48:47.676672 PCI: 00:14.5
915 03:48:47.678870 PCI: 00:15.2
916 03:48:47.679300 PCI: 00:15.3
917 03:48:47.683013 PCI: 00:16.1
918 03:48:47.683543 PCI: 00:16.2
919 03:48:47.683886 PCI: 00:16.3
920 03:48:47.685942 PCI: 00:16.4
921 03:48:47.686433 PCI: 00:16.5
922 03:48:47.689352 PCI: 00:19.1
923 03:48:47.689779 PCI: 00:19.2
924 03:48:47.690140 PCI: 00:1a.0
925 03:48:47.692564 PCI: 00:1c.0
926 03:48:47.693173 PCI: 00:1c.1
927 03:48:47.695768 PCI: 00:1c.2
928 03:48:47.696199 PCI: 00:1c.3
929 03:48:47.699322 PCI: 00:1c.4
930 03:48:47.699748 PCI: 00:1c.5
931 03:48:47.700088 PCI: 00:1c.6
932 03:48:47.702829 PCI: 00:1c.7
933 03:48:47.703357 PCI: 00:1d.1
934 03:48:47.705657 PCI: 00:1d.2
935 03:48:47.706083 PCI: 00:1d.3
936 03:48:47.706426 PCI: 00:1d.4
937 03:48:47.709836 PCI: 00:1d.5
938 03:48:47.710366 PCI: 00:1e.1
939 03:48:47.712939 PCI: 00:1f.1
940 03:48:47.713461 PCI: 00:1f.2
941 03:48:47.713810 PCI: 00:1f.6
942 03:48:47.715687 PCI: Check your devicetree.cb.
943 03:48:47.719388 PCI: 00:02.0 scanning...
944 03:48:47.722725 scan_generic_bus for PCI: 00:02.0
945 03:48:47.726016 scan_generic_bus for PCI: 00:02.0 done
946 03:48:47.732360 scan_bus: scanning of bus PCI: 00:02.0 took 10197 usecs
947 03:48:47.735432 PCI: 00:14.0 scanning...
948 03:48:47.739082 scan_static_bus for PCI: 00:14.0
949 03:48:47.742133 USB0 port 0 enabled
950 03:48:47.742561 USB0 port 0 scanning...
951 03:48:47.745985 scan_static_bus for USB0 port 0
952 03:48:47.748826 USB2 port 0 enabled
953 03:48:47.752660 USB2 port 1 enabled
954 03:48:47.753205 USB2 port 2 disabled
955 03:48:47.755902 USB2 port 3 disabled
956 03:48:47.758688 USB2 port 5 disabled
957 03:48:47.759115 USB2 port 6 enabled
958 03:48:47.761972 USB2 port 9 enabled
959 03:48:47.762398 USB3 port 0 enabled
960 03:48:47.765736 USB3 port 1 enabled
961 03:48:47.768605 USB3 port 2 enabled
962 03:48:47.769032 USB3 port 3 enabled
963 03:48:47.772001 USB3 port 4 disabled
964 03:48:47.775821 USB2 port 0 scanning...
965 03:48:47.778859 scan_static_bus for USB2 port 0
966 03:48:47.782218 scan_static_bus for USB2 port 0 done
967 03:48:47.785783 scan_bus: scanning of bus USB2 port 0 took 9707 usecs
968 03:48:47.788813 USB2 port 1 scanning...
969 03:48:47.792266 scan_static_bus for USB2 port 1
970 03:48:47.795242 scan_static_bus for USB2 port 1 done
971 03:48:47.802633 scan_bus: scanning of bus USB2 port 1 took 9702 usecs
972 03:48:47.805572 USB2 port 6 scanning...
973 03:48:47.808644 scan_static_bus for USB2 port 6
974 03:48:47.811919 scan_static_bus for USB2 port 6 done
975 03:48:47.815129 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
976 03:48:47.818546 USB2 port 9 scanning...
977 03:48:47.822360 scan_static_bus for USB2 port 9
978 03:48:47.825259 scan_static_bus for USB2 port 9 done
979 03:48:47.831796 scan_bus: scanning of bus USB2 port 9 took 9710 usecs
980 03:48:47.835191 USB3 port 0 scanning...
981 03:48:47.838830 scan_static_bus for USB3 port 0
982 03:48:47.841523 scan_static_bus for USB3 port 0 done
983 03:48:47.848282 scan_bus: scanning of bus USB3 port 0 took 9710 usecs
984 03:48:47.848821 USB3 port 1 scanning...
985 03:48:47.852053 scan_static_bus for USB3 port 1
986 03:48:47.854890 scan_static_bus for USB3 port 1 done
987 03:48:47.861603 scan_bus: scanning of bus USB3 port 1 took 9711 usecs
988 03:48:47.865892 USB3 port 2 scanning...
989 03:48:47.869153 scan_static_bus for USB3 port 2
990 03:48:47.871793 scan_static_bus for USB3 port 2 done
991 03:48:47.878683 scan_bus: scanning of bus USB3 port 2 took 9710 usecs
992 03:48:47.879259 USB3 port 3 scanning...
993 03:48:47.881849 scan_static_bus for USB3 port 3
994 03:48:47.888240 scan_static_bus for USB3 port 3 done
995 03:48:47.891878 scan_bus: scanning of bus USB3 port 3 took 9704 usecs
996 03:48:47.895082 scan_static_bus for USB0 port 0 done
997 03:48:47.901287 scan_bus: scanning of bus USB0 port 0 took 155492 usecs
998 03:48:47.904989 scan_static_bus for PCI: 00:14.0 done
999 03:48:47.911429 scan_bus: scanning of bus PCI: 00:14.0 took 173128 usecs
1000 03:48:47.914810 PCI: 00:15.0 scanning...
1001 03:48:47.917773 scan_generic_bus for PCI: 00:15.0
1002 03:48:47.921269 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1003 03:48:47.924956 scan_generic_bus for PCI: 00:15.0 done
1004 03:48:47.931319 scan_bus: scanning of bus PCI: 00:15.0 took 14304 usecs
1005 03:48:47.934886 PCI: 00:15.1 scanning...
1006 03:48:47.938053 scan_generic_bus for PCI: 00:15.1
1007 03:48:47.940827 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1008 03:48:47.944364 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1009 03:48:47.947397 scan_generic_bus for PCI: 00:15.1 done
1010 03:48:47.954173 scan_bus: scanning of bus PCI: 00:15.1 took 18624 usecs
1011 03:48:47.957828 PCI: 00:19.0 scanning...
1012 03:48:47.961413 scan_generic_bus for PCI: 00:19.0
1013 03:48:47.964396 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1014 03:48:47.967430 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1015 03:48:47.974849 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1016 03:48:47.978072 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1017 03:48:47.980882 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1018 03:48:47.984928 scan_generic_bus for PCI: 00:19.0 done
1019 03:48:47.990720 scan_bus: scanning of bus PCI: 00:19.0 took 30757 usecs
1020 03:48:47.994508 PCI: 00:1d.0 scanning...
1021 03:48:47.997493 do_pci_scan_bridge for PCI: 00:1d.0
1022 03:48:48.000728 PCI: pci_scan_bus for bus 01
1023 03:48:48.004741 PCI: 01:00.0 [1c5c/1327] enabled
1024 03:48:48.007562 Enabling Common Clock Configuration
1025 03:48:48.011169 L1 Sub-State supported from root port 29
1026 03:48:48.014169 L1 Sub-State Support = 0xf
1027 03:48:48.017508 CommonModeRestoreTime = 0x28
1028 03:48:48.020807 Power On Value = 0x16, Power On Scale = 0x0
1029 03:48:48.024009 ASPM: Enabled L1
1030 03:48:48.026980 scan_bus: scanning of bus PCI: 00:1d.0 took 32804 usecs
1031 03:48:48.031224 PCI: 00:1e.2 scanning...
1032 03:48:48.034033 scan_generic_bus for PCI: 00:1e.2
1033 03:48:48.037751 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1034 03:48:48.044010 scan_generic_bus for PCI: 00:1e.2 done
1035 03:48:48.047910 scan_bus: scanning of bus PCI: 00:1e.2 took 14014 usecs
1036 03:48:48.050898 PCI: 00:1e.3 scanning...
1037 03:48:48.053907 scan_generic_bus for PCI: 00:1e.3
1038 03:48:48.057389 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1039 03:48:48.060644 scan_generic_bus for PCI: 00:1e.3 done
1040 03:48:48.067425 scan_bus: scanning of bus PCI: 00:1e.3 took 14009 usecs
1041 03:48:48.070517 PCI: 00:1f.0 scanning...
1042 03:48:48.073822 scan_static_bus for PCI: 00:1f.0
1043 03:48:48.077036 PNP: 0c09.0 enabled
1044 03:48:48.080521 scan_static_bus for PCI: 00:1f.0 done
1045 03:48:48.084208 scan_bus: scanning of bus PCI: 00:1f.0 took 12073 usecs
1046 03:48:48.087458 PCI: 00:1f.3 scanning...
1047 03:48:48.094122 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1048 03:48:48.096944 PCI: 00:1f.4 scanning...
1049 03:48:48.100484 scan_generic_bus for PCI: 00:1f.4
1050 03:48:48.103861 scan_generic_bus for PCI: 00:1f.4 done
1051 03:48:48.110828 scan_bus: scanning of bus PCI: 00:1f.4 took 10195 usecs
1052 03:48:48.111354 PCI: 00:1f.5 scanning...
1053 03:48:48.117131 scan_generic_bus for PCI: 00:1f.5
1054 03:48:48.120003 scan_generic_bus for PCI: 00:1f.5 done
1055 03:48:48.123732 scan_bus: scanning of bus PCI: 00:1f.5 took 10197 usecs
1056 03:48:48.130772 scan_bus: scanning of bus DOMAIN: 0000 took 605346 usecs
1057 03:48:48.133551 scan_static_bus for Root Device done
1058 03:48:48.140954 scan_bus: scanning of bus Root Device took 625224 usecs
1059 03:48:48.141483 done
1060 03:48:48.143704 Chrome EC: UHEPI supported
1061 03:48:48.150725 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1062 03:48:48.157127 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1063 03:48:48.160163 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1064 03:48:48.168444 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1065 03:48:48.171851 SPI flash protection: WPSW=0 SRP0=0
1066 03:48:48.178467 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1067 03:48:48.181729 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1068 03:48:48.184886 found VGA at PCI: 00:02.0
1069 03:48:48.188543 Setting up VGA for PCI: 00:02.0
1070 03:48:48.194406 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1071 03:48:48.198273 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1072 03:48:48.201469 Allocating resources...
1073 03:48:48.204643 Reading resources...
1074 03:48:48.207987 Root Device read_resources bus 0 link: 0
1075 03:48:48.211581 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1076 03:48:48.218522 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1077 03:48:48.221355 DOMAIN: 0000 read_resources bus 0 link: 0
1078 03:48:48.228558 PCI: 00:14.0 read_resources bus 0 link: 0
1079 03:48:48.231709 USB0 port 0 read_resources bus 0 link: 0
1080 03:48:48.240226 USB0 port 0 read_resources bus 0 link: 0 done
1081 03:48:48.243216 PCI: 00:14.0 read_resources bus 0 link: 0 done
1082 03:48:48.250847 PCI: 00:15.0 read_resources bus 1 link: 0
1083 03:48:48.253934 PCI: 00:15.0 read_resources bus 1 link: 0 done
1084 03:48:48.260734 PCI: 00:15.1 read_resources bus 2 link: 0
1085 03:48:48.264107 PCI: 00:15.1 read_resources bus 2 link: 0 done
1086 03:48:48.271835 PCI: 00:19.0 read_resources bus 3 link: 0
1087 03:48:48.278097 PCI: 00:19.0 read_resources bus 3 link: 0 done
1088 03:48:48.281816 PCI: 00:1d.0 read_resources bus 1 link: 0
1089 03:48:48.288200 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1090 03:48:48.291696 PCI: 00:1e.2 read_resources bus 4 link: 0
1091 03:48:48.298080 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1092 03:48:48.301865 PCI: 00:1e.3 read_resources bus 5 link: 0
1093 03:48:48.307695 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1094 03:48:48.311320 PCI: 00:1f.0 read_resources bus 0 link: 0
1095 03:48:48.318045 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1096 03:48:48.324411 DOMAIN: 0000 read_resources bus 0 link: 0 done
1097 03:48:48.328062 Root Device read_resources bus 0 link: 0 done
1098 03:48:48.331093 Done reading resources.
1099 03:48:48.334674 Show resources in subtree (Root Device)...After reading.
1100 03:48:48.340828 Root Device child on link 0 CPU_CLUSTER: 0
1101 03:48:48.344428 CPU_CLUSTER: 0 child on link 0 APIC: 00
1102 03:48:48.344864 APIC: 00
1103 03:48:48.347975 APIC: 02
1104 03:48:48.348499 APIC: 07
1105 03:48:48.350956 APIC: 01
1106 03:48:48.351623 APIC: 03
1107 03:48:48.352156 APIC: 06
1108 03:48:48.354266 APIC: 04
1109 03:48:48.354757 APIC: 05
1110 03:48:48.357425 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1111 03:48:48.367668 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1112 03:48:48.417791 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1113 03:48:48.418315 PCI: 00:00.0
1114 03:48:48.419882 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1115 03:48:48.420681 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1116 03:48:48.421049 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1117 03:48:48.421432 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1118 03:48:48.462199 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1119 03:48:48.463145 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1120 03:48:48.463674 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1121 03:48:48.464022 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1122 03:48:48.466415 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1123 03:48:48.473184 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1124 03:48:48.483464 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1125 03:48:48.492740 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1126 03:48:48.502830 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1127 03:48:48.512643 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1128 03:48:48.519617 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1129 03:48:48.529154 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1130 03:48:48.532742 PCI: 00:02.0
1131 03:48:48.542753 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 03:48:48.552388 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1133 03:48:48.559202 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1134 03:48:48.562210 PCI: 00:04.0
1135 03:48:48.562698 PCI: 00:08.0
1136 03:48:48.572082 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1137 03:48:48.575468 PCI: 00:12.0
1138 03:48:48.585332 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 03:48:48.588766 PCI: 00:14.0 child on link 0 USB0 port 0
1140 03:48:48.598415 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1141 03:48:48.605583 USB0 port 0 child on link 0 USB2 port 0
1142 03:48:48.606007 USB2 port 0
1143 03:48:48.608691 USB2 port 1
1144 03:48:48.609114 USB2 port 2
1145 03:48:48.611933 USB2 port 3
1146 03:48:48.612492 USB2 port 5
1147 03:48:48.615596 USB2 port 6
1148 03:48:48.616113 USB2 port 9
1149 03:48:48.618718 USB3 port 0
1150 03:48:48.619238 USB3 port 1
1151 03:48:48.621479 USB3 port 2
1152 03:48:48.622047 USB3 port 3
1153 03:48:48.625316 USB3 port 4
1154 03:48:48.625848 PCI: 00:14.2
1155 03:48:48.635167 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1156 03:48:48.645026 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1157 03:48:48.648744 PCI: 00:14.3
1158 03:48:48.658644 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 03:48:48.661549 PCI: 00:15.0 child on link 0 I2C: 01:15
1160 03:48:48.672133 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 03:48:48.675159 I2C: 01:15
1162 03:48:48.678187 PCI: 00:15.1 child on link 0 I2C: 02:5d
1163 03:48:48.688178 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 03:48:48.688738 I2C: 02:5d
1165 03:48:48.691876 GENERIC: 0.0
1166 03:48:48.692431 PCI: 00:16.0
1167 03:48:48.701338 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 03:48:48.704957 PCI: 00:17.0
1169 03:48:48.715112 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1170 03:48:48.720991 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1171 03:48:48.731020 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1172 03:48:48.737653 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1173 03:48:48.747788 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1174 03:48:48.757530 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1175 03:48:48.760518 PCI: 00:19.0 child on link 0 I2C: 03:1a
1176 03:48:48.770937 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 03:48:48.771460 I2C: 03:1a
1178 03:48:48.774344 I2C: 03:38
1179 03:48:48.774763 I2C: 03:39
1180 03:48:48.777559 I2C: 03:3a
1181 03:48:48.778075 I2C: 03:3b
1182 03:48:48.784794 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1183 03:48:48.790899 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1184 03:48:48.800346 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1185 03:48:48.810750 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1186 03:48:48.813580 PCI: 01:00.0
1187 03:48:48.823961 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 03:48:48.824696 PCI: 00:1e.0
1189 03:48:48.833793 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1190 03:48:48.844061 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1191 03:48:48.850152 PCI: 00:1e.2 child on link 0 SPI: 00
1192 03:48:48.860367 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 03:48:48.860873 SPI: 00
1194 03:48:48.863338 PCI: 00:1e.3 child on link 0 SPI: 01
1195 03:48:48.873058 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 03:48:48.876968 SPI: 01
1197 03:48:48.880379 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1198 03:48:48.889960 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1199 03:48:48.896320 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1200 03:48:48.899394 PNP: 0c09.0
1201 03:48:48.906801 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1202 03:48:48.909812 PCI: 00:1f.3
1203 03:48:48.919967 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 03:48:48.929511 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1205 03:48:48.930038 PCI: 00:1f.4
1206 03:48:48.939614 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1207 03:48:48.949264 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1208 03:48:48.952785 PCI: 00:1f.5
1209 03:48:48.959329 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1210 03:48:48.966299 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1211 03:48:48.973151 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1212 03:48:48.979347 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1213 03:48:48.982836 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1214 03:48:48.986355 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1215 03:48:48.992989 PCI: 00:17.0 18 * [0x60 - 0x67] io
1216 03:48:48.996350 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1217 03:48:49.002408 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1218 03:48:49.009185 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1219 03:48:49.015757 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1220 03:48:49.025502 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1221 03:48:49.031941 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1222 03:48:49.035153 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1223 03:48:49.042350 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1224 03:48:49.048862 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1225 03:48:49.052556 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1226 03:48:49.058478 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1227 03:48:49.061880 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1228 03:48:49.068123 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1229 03:48:49.071504 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1230 03:48:49.078503 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1231 03:48:49.081444 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1232 03:48:49.085018 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1233 03:48:49.091744 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1234 03:48:49.094723 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1235 03:48:49.101451 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1236 03:48:49.104386 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1237 03:48:49.111178 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1238 03:48:49.114695 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1239 03:48:49.121125 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1240 03:48:49.124943 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1241 03:48:49.131260 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1242 03:48:49.134796 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1243 03:48:49.141320 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1244 03:48:49.144351 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1245 03:48:49.151267 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1246 03:48:49.154231 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1247 03:48:49.163771 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1248 03:48:49.167132 avoid_fixed_resources: DOMAIN: 0000
1249 03:48:49.173654 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1250 03:48:49.177529 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1251 03:48:49.187039 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1252 03:48:49.194085 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1253 03:48:49.200595 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1254 03:48:49.210390 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1255 03:48:49.217042 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1256 03:48:49.223572 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1257 03:48:49.233681 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1258 03:48:49.239932 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1259 03:48:49.247227 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1260 03:48:49.253228 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1261 03:48:49.256774 Setting resources...
1262 03:48:49.263048 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1263 03:48:49.266626 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1264 03:48:49.270405 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1265 03:48:49.272982 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1266 03:48:49.280084 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1267 03:48:49.286104 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1268 03:48:49.289391 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1269 03:48:49.295760 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1270 03:48:49.306118 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1271 03:48:49.309783 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1272 03:48:49.315988 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1273 03:48:49.319159 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1274 03:48:49.325963 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1275 03:48:49.328923 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1276 03:48:49.335688 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1277 03:48:49.338972 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1278 03:48:49.345676 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1279 03:48:49.348661 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1280 03:48:49.355878 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1281 03:48:49.359625 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1282 03:48:49.362186 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1283 03:48:49.368570 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1284 03:48:49.372071 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1285 03:48:49.378367 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1286 03:48:49.382024 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1287 03:48:49.388292 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1288 03:48:49.392211 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1289 03:48:49.398663 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1290 03:48:49.401608 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1291 03:48:49.408301 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1292 03:48:49.411452 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1293 03:48:49.417899 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1294 03:48:49.424541 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1295 03:48:49.430976 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1296 03:48:49.438162 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1297 03:48:49.448070 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1298 03:48:49.451093 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1299 03:48:49.457957 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1300 03:48:49.464604 Root Device assign_resources, bus 0 link: 0
1301 03:48:49.467629 DOMAIN: 0000 assign_resources, bus 0 link: 0
1302 03:48:49.477554 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1303 03:48:49.484265 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1304 03:48:49.494624 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1305 03:48:49.500988 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1306 03:48:49.511128 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1307 03:48:49.517611 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1308 03:48:49.523816 PCI: 00:14.0 assign_resources, bus 0 link: 0
1309 03:48:49.527354 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 03:48:49.534094 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1311 03:48:49.543625 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1312 03:48:49.550185 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1313 03:48:49.560037 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1314 03:48:49.564087 PCI: 00:15.0 assign_resources, bus 1 link: 0
1315 03:48:49.570546 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 03:48:49.577357 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1317 03:48:49.583803 PCI: 00:15.1 assign_resources, bus 2 link: 0
1318 03:48:49.586675 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 03:48:49.593533 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1320 03:48:49.603896 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1321 03:48:49.610219 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1322 03:48:49.620723 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1323 03:48:49.626994 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1324 03:48:49.633687 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1325 03:48:49.640451 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1326 03:48:49.650707 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1327 03:48:49.654031 PCI: 00:19.0 assign_resources, bus 3 link: 0
1328 03:48:49.660634 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 03:48:49.666753 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1330 03:48:49.676885 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1331 03:48:49.686387 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1332 03:48:49.689472 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1333 03:48:49.696407 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1334 03:48:49.703379 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1335 03:48:49.709707 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1336 03:48:49.719455 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1337 03:48:49.723436 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1338 03:48:49.729282 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 03:48:49.736263 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1340 03:48:49.739338 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1341 03:48:49.746867 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 03:48:49.749975 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1343 03:48:49.756405 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 03:48:49.759851 LPC: Trying to open IO window from 800 size 1ff
1345 03:48:49.769622 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1346 03:48:49.776484 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1347 03:48:49.786375 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1348 03:48:49.793181 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1349 03:48:49.800162 DOMAIN: 0000 assign_resources, bus 0 link: 0
1350 03:48:49.803283 Root Device assign_resources, bus 0 link: 0
1351 03:48:49.806653 Done setting resources.
1352 03:48:49.812503 Show resources in subtree (Root Device)...After assigning values.
1353 03:48:49.815816 Root Device child on link 0 CPU_CLUSTER: 0
1354 03:48:49.819634 CPU_CLUSTER: 0 child on link 0 APIC: 00
1355 03:48:49.822389 APIC: 00
1356 03:48:49.822471 APIC: 02
1357 03:48:49.822536 APIC: 07
1358 03:48:49.825428 APIC: 01
1359 03:48:49.825510 APIC: 03
1360 03:48:49.829326 APIC: 06
1361 03:48:49.829408 APIC: 04
1362 03:48:49.829472 APIC: 05
1363 03:48:49.835829 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1364 03:48:49.845735 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1365 03:48:49.855936 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1366 03:48:49.856155 PCI: 00:00.0
1367 03:48:49.865391 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1368 03:48:49.875741 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1369 03:48:49.885609 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1370 03:48:49.895905 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1371 03:48:49.905161 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1372 03:48:49.915184 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1373 03:48:49.922087 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1374 03:48:49.931995 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1375 03:48:49.942009 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1376 03:48:49.951828 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1377 03:48:49.961701 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1378 03:48:49.968391 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1379 03:48:49.978065 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1380 03:48:49.988190 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1381 03:48:49.997847 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1382 03:48:50.008145 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1383 03:48:50.008704 PCI: 00:02.0
1384 03:48:50.021308 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1385 03:48:50.031113 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1386 03:48:50.041026 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1387 03:48:50.041551 PCI: 00:04.0
1388 03:48:50.044610 PCI: 00:08.0
1389 03:48:50.054659 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1390 03:48:50.055186 PCI: 00:12.0
1391 03:48:50.064493 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1392 03:48:50.071074 PCI: 00:14.0 child on link 0 USB0 port 0
1393 03:48:50.080403 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1394 03:48:50.083646 USB0 port 0 child on link 0 USB2 port 0
1395 03:48:50.087075 USB2 port 0
1396 03:48:50.087498 USB2 port 1
1397 03:48:50.090739 USB2 port 2
1398 03:48:50.091159 USB2 port 3
1399 03:48:50.093921 USB2 port 5
1400 03:48:50.094341 USB2 port 6
1401 03:48:50.097483 USB2 port 9
1402 03:48:50.097905 USB3 port 0
1403 03:48:50.100442 USB3 port 1
1404 03:48:50.100864 USB3 port 2
1405 03:48:50.104362 USB3 port 3
1406 03:48:50.104786 USB3 port 4
1407 03:48:50.107568 PCI: 00:14.2
1408 03:48:50.117040 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1409 03:48:50.127089 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1410 03:48:50.130707 PCI: 00:14.3
1411 03:48:50.140868 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1412 03:48:50.143533 PCI: 00:15.0 child on link 0 I2C: 01:15
1413 03:48:50.153769 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1414 03:48:50.157303 I2C: 01:15
1415 03:48:50.160182 PCI: 00:15.1 child on link 0 I2C: 02:5d
1416 03:48:50.170325 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1417 03:48:50.173666 I2C: 02:5d
1418 03:48:50.174091 GENERIC: 0.0
1419 03:48:50.176814 PCI: 00:16.0
1420 03:48:50.186465 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1421 03:48:50.186973 PCI: 00:17.0
1422 03:48:50.196862 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1423 03:48:50.206506 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1424 03:48:50.216114 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1425 03:48:50.226434 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1426 03:48:50.236675 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1427 03:48:50.246269 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1428 03:48:50.250043 PCI: 00:19.0 child on link 0 I2C: 03:1a
1429 03:48:50.259565 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1430 03:48:50.262815 I2C: 03:1a
1431 03:48:50.263341 I2C: 03:38
1432 03:48:50.265965 I2C: 03:39
1433 03:48:50.266387 I2C: 03:3a
1434 03:48:50.266725 I2C: 03:3b
1435 03:48:50.272711 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1436 03:48:50.282895 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1437 03:48:50.292440 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1438 03:48:50.302446 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1439 03:48:50.302892 PCI: 01:00.0
1440 03:48:50.315980 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1441 03:48:50.316544 PCI: 00:1e.0
1442 03:48:50.325941 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1443 03:48:50.335860 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1444 03:48:50.341973 PCI: 00:1e.2 child on link 0 SPI: 00
1445 03:48:50.351809 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1446 03:48:50.352338 SPI: 00
1447 03:48:50.355128 PCI: 00:1e.3 child on link 0 SPI: 01
1448 03:48:50.368621 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1449 03:48:50.369145 SPI: 01
1450 03:48:50.372435 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1451 03:48:50.381667 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1452 03:48:50.391464 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1453 03:48:50.392113 PNP: 0c09.0
1454 03:48:50.401473 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1455 03:48:50.401911 PCI: 00:1f.3
1456 03:48:50.411199 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1457 03:48:50.424658 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1458 03:48:50.425200 PCI: 00:1f.4
1459 03:48:50.434871 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1460 03:48:50.444405 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1461 03:48:50.444980 PCI: 00:1f.5
1462 03:48:50.454611 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1463 03:48:50.457570 Done allocating resources.
1464 03:48:50.464467 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1465 03:48:50.467853 Enabling resources...
1466 03:48:50.470759 PCI: 00:00.0 subsystem <- 8086/9b61
1467 03:48:50.474198 PCI: 00:00.0 cmd <- 06
1468 03:48:50.476941 PCI: 00:02.0 subsystem <- 8086/9b41
1469 03:48:50.480637 PCI: 00:02.0 cmd <- 03
1470 03:48:50.483830 PCI: 00:08.0 cmd <- 06
1471 03:48:50.486977 PCI: 00:12.0 subsystem <- 8086/02f9
1472 03:48:50.490734 PCI: 00:12.0 cmd <- 02
1473 03:48:50.494142 PCI: 00:14.0 subsystem <- 8086/02ed
1474 03:48:50.494665 PCI: 00:14.0 cmd <- 02
1475 03:48:50.496988 PCI: 00:14.2 cmd <- 02
1476 03:48:50.500264 PCI: 00:14.3 subsystem <- 8086/02f0
1477 03:48:50.504124 PCI: 00:14.3 cmd <- 02
1478 03:48:50.507501 PCI: 00:15.0 subsystem <- 8086/02e8
1479 03:48:50.510366 PCI: 00:15.0 cmd <- 02
1480 03:48:50.514059 PCI: 00:15.1 subsystem <- 8086/02e9
1481 03:48:50.517066 PCI: 00:15.1 cmd <- 02
1482 03:48:50.520421 PCI: 00:16.0 subsystem <- 8086/02e0
1483 03:48:50.523868 PCI: 00:16.0 cmd <- 02
1484 03:48:50.527680 PCI: 00:17.0 subsystem <- 8086/02d3
1485 03:48:50.530708 PCI: 00:17.0 cmd <- 03
1486 03:48:50.533281 PCI: 00:19.0 subsystem <- 8086/02c5
1487 03:48:50.536645 PCI: 00:19.0 cmd <- 02
1488 03:48:50.539891 PCI: 00:1d.0 bridge ctrl <- 0013
1489 03:48:50.543081 PCI: 00:1d.0 subsystem <- 8086/02b0
1490 03:48:50.543516 PCI: 00:1d.0 cmd <- 06
1491 03:48:50.549945 PCI: 00:1e.0 subsystem <- 8086/02a8
1492 03:48:50.550384 PCI: 00:1e.0 cmd <- 06
1493 03:48:50.553314 PCI: 00:1e.2 subsystem <- 8086/02aa
1494 03:48:50.556963 PCI: 00:1e.2 cmd <- 06
1495 03:48:50.559957 PCI: 00:1e.3 subsystem <- 8086/02ab
1496 03:48:50.563465 PCI: 00:1e.3 cmd <- 02
1497 03:48:50.566641 PCI: 00:1f.0 subsystem <- 8086/0284
1498 03:48:50.569873 PCI: 00:1f.0 cmd <- 407
1499 03:48:50.573414 PCI: 00:1f.3 subsystem <- 8086/02c8
1500 03:48:50.577047 PCI: 00:1f.3 cmd <- 02
1501 03:48:50.580081 PCI: 00:1f.4 subsystem <- 8086/02a3
1502 03:48:50.583615 PCI: 00:1f.4 cmd <- 03
1503 03:48:50.586639 PCI: 00:1f.5 subsystem <- 8086/02a4
1504 03:48:50.589834 PCI: 00:1f.5 cmd <- 406
1505 03:48:50.598088 PCI: 01:00.0 cmd <- 02
1506 03:48:50.602913 done.
1507 03:48:50.615557 ME: Version: 14.0.39.1367
1508 03:48:50.621754 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1509 03:48:50.624944 Initializing devices...
1510 03:48:50.625368 Root Device init ...
1511 03:48:50.632254 Chrome EC: Set SMI mask to 0x0000000000000000
1512 03:48:50.635514 Chrome EC: clear events_b mask to 0x0000000000000000
1513 03:48:50.641488 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1514 03:48:50.648648 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1515 03:48:50.655572 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1516 03:48:50.658168 Chrome EC: Set WAKE mask to 0x0000000000000000
1517 03:48:50.661217 Root Device init finished in 35150 usecs
1518 03:48:50.665109 CPU_CLUSTER: 0 init ...
1519 03:48:50.671494 CPU_CLUSTER: 0 init finished in 2447 usecs
1520 03:48:50.676415 PCI: 00:00.0 init ...
1521 03:48:50.679531 CPU TDP: 15 Watts
1522 03:48:50.683160 CPU PL2 = 64 Watts
1523 03:48:50.686055 PCI: 00:00.0 init finished in 7079 usecs
1524 03:48:50.688859 PCI: 00:02.0 init ...
1525 03:48:50.692711 PCI: 00:02.0 init finished in 2243 usecs
1526 03:48:50.695569 PCI: 00:08.0 init ...
1527 03:48:50.698688 PCI: 00:08.0 init finished in 2252 usecs
1528 03:48:50.702299 PCI: 00:12.0 init ...
1529 03:48:50.705452 PCI: 00:12.0 init finished in 2251 usecs
1530 03:48:50.709109 PCI: 00:14.0 init ...
1531 03:48:50.712785 PCI: 00:14.0 init finished in 2242 usecs
1532 03:48:50.715824 PCI: 00:14.2 init ...
1533 03:48:50.718660 PCI: 00:14.2 init finished in 2243 usecs
1534 03:48:50.722411 PCI: 00:14.3 init ...
1535 03:48:50.725602 PCI: 00:14.3 init finished in 2269 usecs
1536 03:48:50.728913 PCI: 00:15.0 init ...
1537 03:48:50.732509 DW I2C bus 0 at 0xd121f000 (400 KHz)
1538 03:48:50.735426 PCI: 00:15.0 init finished in 5974 usecs
1539 03:48:50.739024 PCI: 00:15.1 init ...
1540 03:48:50.741981 DW I2C bus 1 at 0xd1220000 (400 KHz)
1541 03:48:50.748634 PCI: 00:15.1 init finished in 5974 usecs
1542 03:48:50.749062 PCI: 00:16.0 init ...
1543 03:48:50.754835 PCI: 00:16.0 init finished in 2252 usecs
1544 03:48:50.758741 PCI: 00:19.0 init ...
1545 03:48:50.761773 DW I2C bus 4 at 0xd1222000 (400 KHz)
1546 03:48:50.765110 PCI: 00:19.0 init finished in 5975 usecs
1547 03:48:50.768641 PCI: 00:1d.0 init ...
1548 03:48:50.772118 Initializing PCH PCIe bridge.
1549 03:48:50.775160 PCI: 00:1d.0 init finished in 5283 usecs
1550 03:48:50.778259 PCI: 00:1f.0 init ...
1551 03:48:50.781376 IOAPIC: Initializing IOAPIC at 0xfec00000
1552 03:48:50.788243 IOAPIC: Bootstrap Processor Local APIC = 0x00
1553 03:48:50.788869 IOAPIC: ID = 0x02
1554 03:48:50.791611 IOAPIC: Dumping registers
1555 03:48:50.795425 reg 0x0000: 0x02000000
1556 03:48:50.798298 reg 0x0001: 0x00770020
1557 03:48:50.798725 reg 0x0002: 0x00000000
1558 03:48:50.804801 PCI: 00:1f.0 init finished in 23519 usecs
1559 03:48:50.807969 PCI: 00:1f.4 init ...
1560 03:48:50.811384 PCI: 00:1f.4 init finished in 2261 usecs
1561 03:48:50.821986 PCI: 01:00.0 init ...
1562 03:48:50.825402 PCI: 01:00.0 init finished in 2251 usecs
1563 03:48:50.829823 PNP: 0c09.0 init ...
1564 03:48:50.833066 Google Chrome EC uptime: 11.094 seconds
1565 03:48:50.839573 Google Chrome AP resets since EC boot: 0
1566 03:48:50.843133 Google Chrome most recent AP reset causes:
1567 03:48:50.849697 Google Chrome EC reset flags at last EC boot: reset-pin
1568 03:48:50.852838 PNP: 0c09.0 init finished in 20628 usecs
1569 03:48:50.856251 Devices initialized
1570 03:48:50.859181 Show all devs... After init.
1571 03:48:50.859708 Root Device: enabled 1
1572 03:48:50.862702 CPU_CLUSTER: 0: enabled 1
1573 03:48:50.865960 DOMAIN: 0000: enabled 1
1574 03:48:50.866478 APIC: 00: enabled 1
1575 03:48:50.869374 PCI: 00:00.0: enabled 1
1576 03:48:50.872729 PCI: 00:02.0: enabled 1
1577 03:48:50.875630 PCI: 00:04.0: enabled 0
1578 03:48:50.876057 PCI: 00:05.0: enabled 0
1579 03:48:50.879211 PCI: 00:12.0: enabled 1
1580 03:48:50.882275 PCI: 00:12.5: enabled 0
1581 03:48:50.882696 PCI: 00:12.6: enabled 0
1582 03:48:50.885585 PCI: 00:14.0: enabled 1
1583 03:48:50.889169 PCI: 00:14.1: enabled 0
1584 03:48:50.892612 PCI: 00:14.3: enabled 1
1585 03:48:50.893141 PCI: 00:14.5: enabled 0
1586 03:48:50.895464 PCI: 00:15.0: enabled 1
1587 03:48:50.898737 PCI: 00:15.1: enabled 1
1588 03:48:50.902253 PCI: 00:15.2: enabled 0
1589 03:48:50.902672 PCI: 00:15.3: enabled 0
1590 03:48:50.905501 PCI: 00:16.0: enabled 1
1591 03:48:50.909257 PCI: 00:16.1: enabled 0
1592 03:48:50.912210 PCI: 00:16.2: enabled 0
1593 03:48:50.912766 PCI: 00:16.3: enabled 0
1594 03:48:50.915972 PCI: 00:16.4: enabled 0
1595 03:48:50.919350 PCI: 00:16.5: enabled 0
1596 03:48:50.921997 PCI: 00:17.0: enabled 1
1597 03:48:50.922521 PCI: 00:19.0: enabled 1
1598 03:48:50.925724 PCI: 00:19.1: enabled 0
1599 03:48:50.929000 PCI: 00:19.2: enabled 0
1600 03:48:50.929516 PCI: 00:1a.0: enabled 0
1601 03:48:50.932448 PCI: 00:1c.0: enabled 0
1602 03:48:50.934988 PCI: 00:1c.1: enabled 0
1603 03:48:50.938643 PCI: 00:1c.2: enabled 0
1604 03:48:50.939168 PCI: 00:1c.3: enabled 0
1605 03:48:50.941766 PCI: 00:1c.4: enabled 0
1606 03:48:50.945029 PCI: 00:1c.5: enabled 0
1607 03:48:50.948268 PCI: 00:1c.6: enabled 0
1608 03:48:50.948734 PCI: 00:1c.7: enabled 0
1609 03:48:50.952013 PCI: 00:1d.0: enabled 1
1610 03:48:50.954971 PCI: 00:1d.1: enabled 0
1611 03:48:50.958808 PCI: 00:1d.2: enabled 0
1612 03:48:50.959331 PCI: 00:1d.3: enabled 0
1613 03:48:50.961797 PCI: 00:1d.4: enabled 0
1614 03:48:50.965198 PCI: 00:1d.5: enabled 0
1615 03:48:50.968459 PCI: 00:1e.0: enabled 1
1616 03:48:50.968986 PCI: 00:1e.1: enabled 0
1617 03:48:50.971713 PCI: 00:1e.2: enabled 1
1618 03:48:50.975396 PCI: 00:1e.3: enabled 1
1619 03:48:50.975913 PCI: 00:1f.0: enabled 1
1620 03:48:50.978473 PCI: 00:1f.1: enabled 0
1621 03:48:50.981860 PCI: 00:1f.2: enabled 0
1622 03:48:50.984895 PCI: 00:1f.3: enabled 1
1623 03:48:50.985319 PCI: 00:1f.4: enabled 1
1624 03:48:50.988448 PCI: 00:1f.5: enabled 1
1625 03:48:50.991998 PCI: 00:1f.6: enabled 0
1626 03:48:50.994698 USB0 port 0: enabled 1
1627 03:48:50.995122 I2C: 01:15: enabled 1
1628 03:48:50.998222 I2C: 02:5d: enabled 1
1629 03:48:51.001753 GENERIC: 0.0: enabled 1
1630 03:48:51.002226 I2C: 03:1a: enabled 1
1631 03:48:51.004892 I2C: 03:38: enabled 1
1632 03:48:51.007872 I2C: 03:39: enabled 1
1633 03:48:51.008335 I2C: 03:3a: enabled 1
1634 03:48:51.010867 I2C: 03:3b: enabled 1
1635 03:48:51.014458 PCI: 00:00.0: enabled 1
1636 03:48:51.014882 SPI: 00: enabled 1
1637 03:48:51.017637 SPI: 01: enabled 1
1638 03:48:51.020898 PNP: 0c09.0: enabled 1
1639 03:48:51.021322 USB2 port 0: enabled 1
1640 03:48:51.025040 USB2 port 1: enabled 1
1641 03:48:51.028361 USB2 port 2: enabled 0
1642 03:48:51.031408 USB2 port 3: enabled 0
1643 03:48:51.031926 USB2 port 5: enabled 0
1644 03:48:51.034226 USB2 port 6: enabled 1
1645 03:48:51.038234 USB2 port 9: enabled 1
1646 03:48:51.038658 USB3 port 0: enabled 1
1647 03:48:51.041086 USB3 port 1: enabled 1
1648 03:48:51.044127 USB3 port 2: enabled 1
1649 03:48:51.044596 USB3 port 3: enabled 1
1650 03:48:51.047501 USB3 port 4: enabled 0
1651 03:48:51.050655 APIC: 02: enabled 1
1652 03:48:51.051080 APIC: 07: enabled 1
1653 03:48:51.054785 APIC: 01: enabled 1
1654 03:48:51.058014 APIC: 03: enabled 1
1655 03:48:51.058563 APIC: 06: enabled 1
1656 03:48:51.060546 APIC: 04: enabled 1
1657 03:48:51.060976 APIC: 05: enabled 1
1658 03:48:51.063772 PCI: 00:08.0: enabled 1
1659 03:48:51.067588 PCI: 00:14.2: enabled 1
1660 03:48:51.070968 PCI: 01:00.0: enabled 1
1661 03:48:51.074422 Disabling ACPI via APMC:
1662 03:48:51.074983 done.
1663 03:48:51.080838 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1664 03:48:51.083895 ELOG: NV offset 0xaf0000 size 0x4000
1665 03:48:51.091204 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1666 03:48:51.097952 ELOG: Event(17) added with size 13 at 2024-01-16 03:46:12 UTC
1667 03:48:51.104467 ELOG: Event(92) added with size 9 at 2024-01-16 03:46:12 UTC
1668 03:48:51.110815 ELOG: Event(93) added with size 9 at 2024-01-16 03:46:12 UTC
1669 03:48:51.117765 ELOG: Event(9A) added with size 9 at 2024-01-16 03:46:12 UTC
1670 03:48:51.124429 ELOG: Event(9E) added with size 10 at 2024-01-16 03:46:12 UTC
1671 03:48:51.131063 ELOG: Event(9F) added with size 14 at 2024-01-16 03:46:12 UTC
1672 03:48:51.134066 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1673 03:48:51.141036 ELOG: Event(A1) added with size 10 at 2024-01-16 03:46:12 UTC
1674 03:48:51.151082 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1675 03:48:51.158008 ELOG: Event(A0) added with size 9 at 2024-01-16 03:46:12 UTC
1676 03:48:51.160885 elog_add_boot_reason: Logged dev mode boot
1677 03:48:51.161314 Finalize devices...
1678 03:48:51.164814 PCI: 00:17.0 final
1679 03:48:51.167763 Devices finalized
1680 03:48:51.171070 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1681 03:48:51.178104 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1682 03:48:51.180986 ME: HFSTS1 : 0x90000245
1683 03:48:51.184024 ME: HFSTS2 : 0x3B850126
1684 03:48:51.191376 ME: HFSTS3 : 0x00000020
1685 03:48:51.194337 ME: HFSTS4 : 0x00004800
1686 03:48:51.197443 ME: HFSTS5 : 0x00000000
1687 03:48:51.200875 ME: HFSTS6 : 0x40400006
1688 03:48:51.204132 ME: Manufacturing Mode : NO
1689 03:48:51.207410 ME: FW Partition Table : OK
1690 03:48:51.210751 ME: Bringup Loader Failure : NO
1691 03:48:51.213697 ME: Firmware Init Complete : YES
1692 03:48:51.217086 ME: Boot Options Present : NO
1693 03:48:51.220749 ME: Update In Progress : NO
1694 03:48:51.224136 ME: D0i3 Support : YES
1695 03:48:51.227294 ME: Low Power State Enabled : NO
1696 03:48:51.231085 ME: CPU Replaced : NO
1697 03:48:51.234040 ME: CPU Replacement Valid : YES
1698 03:48:51.237033 ME: Current Working State : 5
1699 03:48:51.240191 ME: Current Operation State : 1
1700 03:48:51.244073 ME: Current Operation Mode : 0
1701 03:48:51.247222 ME: Error Code : 0
1702 03:48:51.250856 ME: CPU Debug Disabled : YES
1703 03:48:51.253559 ME: TXT Support : NO
1704 03:48:51.260525 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1705 03:48:51.267052 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1706 03:48:51.267493 CBFS @ c08000 size 3f8000
1707 03:48:51.273471 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1708 03:48:51.276936 CBFS: Locating 'fallback/dsdt.aml'
1709 03:48:51.280040 CBFS: Found @ offset 10bb80 size 3fa5
1710 03:48:51.287229 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1711 03:48:51.290494 CBFS @ c08000 size 3f8000
1712 03:48:51.293511 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1713 03:48:51.296855 CBFS: Locating 'fallback/slic'
1714 03:48:51.301770 CBFS: 'fallback/slic' not found.
1715 03:48:51.308852 ACPI: Writing ACPI tables at 99b3e000.
1716 03:48:51.309367 ACPI: * FACS
1717 03:48:51.311922 ACPI: * DSDT
1718 03:48:51.315072 Ramoops buffer: 0x100000@0x99a3d000.
1719 03:48:51.318196 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1720 03:48:51.324545 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1721 03:48:51.328036 Google Chrome EC: version:
1722 03:48:51.330981 ro: helios_v2.0.2659-56403530b
1723 03:48:51.334443 rw: helios_v2.0.2849-c41de27e7d
1724 03:48:51.334868 running image: 1
1725 03:48:51.339011 ACPI: * FADT
1726 03:48:51.339526 SCI is IRQ9
1727 03:48:51.345595 ACPI: added table 1/32, length now 40
1728 03:48:51.346159 ACPI: * SSDT
1729 03:48:51.349646 Found 1 CPU(s) with 8 core(s) each.
1730 03:48:51.352159 Error: Could not locate 'wifi_sar' in VPD.
1731 03:48:51.359266 Checking CBFS for default SAR values
1732 03:48:51.361894 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 03:48:51.365692 CBFS @ c08000 size 3f8000
1734 03:48:51.372318 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 03:48:51.375442 CBFS: Locating 'wifi_sar_defaults.hex'
1736 03:48:51.379209 CBFS: Found @ offset 5fac0 size 77
1737 03:48:51.382202 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1738 03:48:51.389239 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1739 03:48:51.392363 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1740 03:48:51.398249 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1741 03:48:51.401808 failed to find key in VPD: dsm_calib_r0_0
1742 03:48:51.411872 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1743 03:48:51.415010 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1744 03:48:51.417984 failed to find key in VPD: dsm_calib_r0_1
1745 03:48:51.428088 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1746 03:48:51.435119 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1747 03:48:51.438166 failed to find key in VPD: dsm_calib_r0_2
1748 03:48:51.448157 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1749 03:48:51.451644 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1750 03:48:51.458240 failed to find key in VPD: dsm_calib_r0_3
1751 03:48:51.464597 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1752 03:48:51.471274 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1753 03:48:51.474542 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1754 03:48:51.478491 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1755 03:48:51.481659 EC returned error result code 1
1756 03:48:51.485682 EC returned error result code 1
1757 03:48:51.489341 EC returned error result code 1
1758 03:48:51.495718 PS2K: Bad resp from EC. Vivaldi disabled!
1759 03:48:51.499259 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1760 03:48:51.506347 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1761 03:48:51.512913 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1762 03:48:51.516149 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1763 03:48:51.523272 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1764 03:48:51.529130 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1765 03:48:51.535788 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1766 03:48:51.538759 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1767 03:48:51.545427 ACPI: added table 2/32, length now 44
1768 03:48:51.545981 ACPI: * MCFG
1769 03:48:51.548833 ACPI: added table 3/32, length now 48
1770 03:48:51.552199 ACPI: * TPM2
1771 03:48:51.555905 TPM2 log created at 99a2d000
1772 03:48:51.559048 ACPI: added table 4/32, length now 52
1773 03:48:51.559565 ACPI: * MADT
1774 03:48:51.562059 SCI is IRQ9
1775 03:48:51.565595 ACPI: added table 5/32, length now 56
1776 03:48:51.566016 current = 99b43ac0
1777 03:48:51.569024 ACPI: * DMAR
1778 03:48:51.571880 ACPI: added table 6/32, length now 60
1779 03:48:51.575815 ACPI: * IGD OpRegion
1780 03:48:51.576381 GMA: Found VBT in CBFS
1781 03:48:51.578533 GMA: Found valid VBT in CBFS
1782 03:48:51.581810 ACPI: added table 7/32, length now 64
1783 03:48:51.585048 ACPI: * HPET
1784 03:48:51.588574 ACPI: added table 8/32, length now 68
1785 03:48:51.589116 ACPI: done.
1786 03:48:51.591544 ACPI tables: 31744 bytes.
1787 03:48:51.595433 smbios_write_tables: 99a2c000
1788 03:48:51.598814 EC returned error result code 3
1789 03:48:51.602121 Couldn't obtain OEM name from CBI
1790 03:48:51.605110 Create SMBIOS type 17
1791 03:48:51.608428 PCI: 00:00.0 (Intel Cannonlake)
1792 03:48:51.612177 PCI: 00:14.3 (Intel WiFi)
1793 03:48:51.615194 SMBIOS tables: 939 bytes.
1794 03:48:51.618375 Writing table forward entry at 0x00000500
1795 03:48:51.624910 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1796 03:48:51.628394 Writing coreboot table at 0x99b62000
1797 03:48:51.635098 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1798 03:48:51.638274 1. 0000000000001000-000000000009ffff: RAM
1799 03:48:51.641490 2. 00000000000a0000-00000000000fffff: RESERVED
1800 03:48:51.648107 3. 0000000000100000-0000000099a2bfff: RAM
1801 03:48:51.654897 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1802 03:48:51.658545 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1803 03:48:51.664352 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1804 03:48:51.668108 7. 000000009a000000-000000009f7fffff: RESERVED
1805 03:48:51.674790 8. 00000000e0000000-00000000efffffff: RESERVED
1806 03:48:51.677994 9. 00000000fc000000-00000000fc000fff: RESERVED
1807 03:48:51.684439 10. 00000000fe000000-00000000fe00ffff: RESERVED
1808 03:48:51.688174 11. 00000000fed10000-00000000fed17fff: RESERVED
1809 03:48:51.691158 12. 00000000fed80000-00000000fed83fff: RESERVED
1810 03:48:51.697721 13. 00000000fed90000-00000000fed91fff: RESERVED
1811 03:48:51.701200 14. 00000000feda0000-00000000feda1fff: RESERVED
1812 03:48:51.707548 15. 0000000100000000-000000045e7fffff: RAM
1813 03:48:51.711138 Graphics framebuffer located at 0xc0000000
1814 03:48:51.714556 Passing 5 GPIOs to payload:
1815 03:48:51.717469 NAME | PORT | POLARITY | VALUE
1816 03:48:51.724841 write protect | undefined | high | low
1817 03:48:51.730906 lid | undefined | high | high
1818 03:48:51.733884 power | undefined | high | low
1819 03:48:51.741128 oprom | undefined | high | low
1820 03:48:51.743717 EC in RW | 0x000000cb | high | low
1821 03:48:51.747591 Board ID: 4
1822 03:48:51.750844 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1823 03:48:51.753724 CBFS @ c08000 size 3f8000
1824 03:48:51.760743 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1825 03:48:51.767362 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1826 03:48:51.768065 coreboot table: 1492 bytes.
1827 03:48:51.771011 IMD ROOT 0. 99fff000 00001000
1828 03:48:51.773924 IMD SMALL 1. 99ffe000 00001000
1829 03:48:51.777961 FSP MEMORY 2. 99c4e000 003b0000
1830 03:48:51.780748 CONSOLE 3. 99c2e000 00020000
1831 03:48:51.784159 FMAP 4. 99c2d000 0000054e
1832 03:48:51.787059 TIME STAMP 5. 99c2c000 00000910
1833 03:48:51.790979 VBOOT WORK 6. 99c18000 00014000
1834 03:48:51.794310 MRC DATA 7. 99c16000 00001958
1835 03:48:51.796930 ROMSTG STCK 8. 99c15000 00001000
1836 03:48:51.800228 AFTER CAR 9. 99c0b000 0000a000
1837 03:48:51.803806 RAMSTAGE 10. 99baf000 0005c000
1838 03:48:51.806887 REFCODE 11. 99b7a000 00035000
1839 03:48:51.810795 SMM BACKUP 12. 99b6a000 00010000
1840 03:48:51.813760 COREBOOT 13. 99b62000 00008000
1841 03:48:51.816808 ACPI 14. 99b3e000 00024000
1842 03:48:51.820702 ACPI GNVS 15. 99b3d000 00001000
1843 03:48:51.823800 RAMOOPS 16. 99a3d000 00100000
1844 03:48:51.826905 TPM2 TCGLOG17. 99a2d000 00010000
1845 03:48:51.830276 SMBIOS 18. 99a2c000 00000800
1846 03:48:51.833711 IMD small region:
1847 03:48:51.837420 IMD ROOT 0. 99ffec00 00000400
1848 03:48:51.840424 FSP RUNTIME 1. 99ffebe0 00000004
1849 03:48:51.843249 EC HOSTEVENT 2. 99ffebc0 00000008
1850 03:48:51.847245 POWER STATE 3. 99ffeb80 00000040
1851 03:48:51.850091 ROMSTAGE 4. 99ffeb60 00000004
1852 03:48:51.853475 MEM INFO 5. 99ffe9a0 000001b9
1853 03:48:51.856948 VPD 6. 99ffe920 0000006c
1854 03:48:51.860427 MTRR: Physical address space:
1855 03:48:51.867007 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1856 03:48:51.873605 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1857 03:48:51.879972 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1858 03:48:51.886580 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1859 03:48:51.893218 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1860 03:48:51.899579 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1861 03:48:51.906845 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1862 03:48:51.909984 MTRR: Fixed MSR 0x250 0x0606060606060606
1863 03:48:51.912894 MTRR: Fixed MSR 0x258 0x0606060606060606
1864 03:48:51.916651 MTRR: Fixed MSR 0x259 0x0000000000000000
1865 03:48:51.922909 MTRR: Fixed MSR 0x268 0x0606060606060606
1866 03:48:51.926082 MTRR: Fixed MSR 0x269 0x0606060606060606
1867 03:48:51.929714 MTRR: Fixed MSR 0x26a 0x0606060606060606
1868 03:48:51.932678 MTRR: Fixed MSR 0x26b 0x0606060606060606
1869 03:48:51.936441 MTRR: Fixed MSR 0x26c 0x0606060606060606
1870 03:48:51.942890 MTRR: Fixed MSR 0x26d 0x0606060606060606
1871 03:48:51.945885 MTRR: Fixed MSR 0x26e 0x0606060606060606
1872 03:48:51.949555 MTRR: Fixed MSR 0x26f 0x0606060606060606
1873 03:48:51.952765 call enable_fixed_mtrr()
1874 03:48:51.956239 CPU physical address size: 39 bits
1875 03:48:51.962782 MTRR: default type WB/UC MTRR counts: 6/8.
1876 03:48:51.966075 MTRR: WB selected as default type.
1877 03:48:51.972814 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1878 03:48:51.975640 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1879 03:48:51.983058 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1880 03:48:51.988991 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1881 03:48:51.995931 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1882 03:48:52.002223 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1883 03:48:52.005618 MTRR: Fixed MSR 0x250 0x0606060606060606
1884 03:48:52.012855 MTRR: Fixed MSR 0x258 0x0606060606060606
1885 03:48:52.015936 MTRR: Fixed MSR 0x259 0x0000000000000000
1886 03:48:52.018446 MTRR: Fixed MSR 0x268 0x0606060606060606
1887 03:48:52.021965 MTRR: Fixed MSR 0x269 0x0606060606060606
1888 03:48:52.029443 MTRR: Fixed MSR 0x26a 0x0606060606060606
1889 03:48:52.032680 MTRR: Fixed MSR 0x26b 0x0606060606060606
1890 03:48:52.034953 MTRR: Fixed MSR 0x26c 0x0606060606060606
1891 03:48:52.038777 MTRR: Fixed MSR 0x26d 0x0606060606060606
1892 03:48:52.045320 MTRR: Fixed MSR 0x26e 0x0606060606060606
1893 03:48:52.048830 MTRR: Fixed MSR 0x26f 0x0606060606060606
1894 03:48:52.049251
1895 03:48:52.049584 MTRR check
1896 03:48:52.052086 Fixed MTRRs : Enabled
1897 03:48:52.054837 Variable MTRRs: Enabled
1898 03:48:52.055255
1899 03:48:52.058649 call enable_fixed_mtrr()
1900 03:48:52.061866 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1901 03:48:52.064829 CPU physical address size: 39 bits
1902 03:48:52.071607 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1903 03:48:52.075285 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 03:48:52.078403 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 03:48:52.085510 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 03:48:52.088629 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 03:48:52.091803 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 03:48:52.095686 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 03:48:52.101536 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 03:48:52.104626 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 03:48:52.108110 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 03:48:52.111265 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 03:48:52.115275 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 03:48:52.121525 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 03:48:52.124651 call enable_fixed_mtrr()
1916 03:48:52.128666 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 03:48:52.131484 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 03:48:52.134576 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 03:48:52.141545 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 03:48:52.144353 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 03:48:52.147532 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 03:48:52.151268 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 03:48:52.154361 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 03:48:52.160977 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 03:48:52.164730 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 03:48:52.167690 CPU physical address size: 39 bits
1927 03:48:52.170889 call enable_fixed_mtrr()
1928 03:48:52.174036 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 03:48:52.178059 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 03:48:52.184531 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 03:48:52.187529 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 03:48:52.190718 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 03:48:52.193722 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 03:48:52.200913 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 03:48:52.203938 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 03:48:52.207054 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 03:48:52.210760 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 03:48:52.216962 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 03:48:52.220873 MTRR: Fixed MSR 0x250 0x0606060606060606
1940 03:48:52.223899 call enable_fixed_mtrr()
1941 03:48:52.227365 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 03:48:52.230727 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 03:48:52.234284 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 03:48:52.240689 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 03:48:52.243905 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 03:48:52.246963 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 03:48:52.250708 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 03:48:52.256551 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 03:48:52.260173 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 03:48:52.263454 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 03:48:52.267064 CPU physical address size: 39 bits
1952 03:48:52.270190 call enable_fixed_mtrr()
1953 03:48:52.274048 CPU physical address size: 39 bits
1954 03:48:52.276913 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 03:48:52.283399 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 03:48:52.286977 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 03:48:52.290462 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 03:48:52.293213 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 03:48:52.296985 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 03:48:52.303260 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 03:48:52.306280 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 03:48:52.310026 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 03:48:52.313582 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 03:48:52.320268 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 03:48:52.322917 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 03:48:52.326645 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 03:48:52.329693 call enable_fixed_mtrr()
1968 03:48:52.332777 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 03:48:52.336488 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 03:48:52.342755 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 03:48:52.346322 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 03:48:52.349566 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 03:48:52.352596 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 03:48:52.359582 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 03:48:52.362378 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 03:48:52.365895 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 03:48:52.369462 CPU physical address size: 39 bits
1978 03:48:52.372737 call enable_fixed_mtrr()
1979 03:48:52.376202 CPU physical address size: 39 bits
1980 03:48:52.379331 CPU physical address size: 39 bits
1981 03:48:52.382194 CBFS @ c08000 size 3f8000
1982 03:48:52.389165 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1983 03:48:52.392522 CBFS: Locating 'fallback/payload'
1984 03:48:52.395444 CBFS: Found @ offset 1c96c0 size 3f798
1985 03:48:52.402028 Checking segment from ROM address 0xffdd16f8
1986 03:48:52.405923 Checking segment from ROM address 0xffdd1714
1987 03:48:52.408796 Loading segment from ROM address 0xffdd16f8
1988 03:48:52.412187 code (compression=0)
1989 03:48:52.422182 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1990 03:48:52.428884 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1991 03:48:52.432104 it's not compressed!
1992 03:48:52.523425 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1993 03:48:52.529861 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1994 03:48:52.533311 Loading segment from ROM address 0xffdd1714
1995 03:48:52.536732 Entry Point 0x30000000
1996 03:48:52.539569 Loaded segments
1997 03:48:52.545772 Finalizing chipset.
1998 03:48:52.548642 Finalizing SMM.
1999 03:48:52.551884 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2000 03:48:52.555785 mp_park_aps done after 0 msecs.
2001 03:48:52.561977 Jumping to boot code at 30000000(99b62000)
2002 03:48:52.568751 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2003 03:48:52.568908
2004 03:48:52.569029
2005 03:48:52.569140
2006 03:48:52.571988 Starting depthcharge on Helios...
2007 03:48:52.572118
2008 03:48:52.572558 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2009 03:48:52.572710 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2010 03:48:52.572839 Setting prompt string to ['hatch:']
2011 03:48:52.572967 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2012 03:48:52.581459 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2013 03:48:52.581594
2014 03:48:52.588245 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2015 03:48:52.588399
2016 03:48:52.595290 board_setup: Info: eMMC controller not present; skipping
2017 03:48:52.595423
2018 03:48:52.598474 New NVMe Controller 0x30053ac0 @ 00:1d:00
2019 03:48:52.598607
2020 03:48:52.605346 board_setup: Info: SDHCI controller not present; skipping
2021 03:48:52.605479
2022 03:48:52.608412 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2023 03:48:52.611539
2024 03:48:52.611670 Wipe memory regions:
2025 03:48:52.611772
2026 03:48:52.615136 [0x00000000001000, 0x000000000a0000)
2027 03:48:52.615269
2028 03:48:52.617974 [0x00000000100000, 0x00000030000000)
2029 03:48:52.683710
2030 03:48:52.686943 [0x00000030657430, 0x00000099a2c000)
2031 03:48:52.825098
2032 03:48:52.828048 [0x00000100000000, 0x0000045e800000)
2033 03:48:54.210345
2034 03:48:54.210873 R8152: Initializing
2035 03:48:54.211212
2036 03:48:54.213335 Version 9 (ocp_data = 6010)
2037 03:48:54.217477
2038 03:48:54.217896 R8152: Done initializing
2039 03:48:54.218232
2040 03:48:54.221351 Adding net device
2041 03:48:54.704023
2042 03:48:54.704582 R8152: Initializing
2043 03:48:54.704919
2044 03:48:54.706801 Version 6 (ocp_data = 5c30)
2045 03:48:54.707218
2046 03:48:54.710143 R8152: Done initializing
2047 03:48:54.710225
2048 03:48:54.713490 net_add_device: Attemp to include the same device
2049 03:48:54.716594
2050 03:48:54.723863 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2051 03:48:54.723959
2052 03:48:54.724033
2053 03:48:54.724102
2054 03:48:54.724365 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2056 03:48:54.825110 hatch: tftpboot 192.168.201.1 12543686/tftp-deploy-48fpjq2s/kernel/bzImage 12543686/tftp-deploy-48fpjq2s/kernel/cmdline 12543686/tftp-deploy-48fpjq2s/ramdisk/ramdisk.cpio.gz
2057 03:48:54.825720 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2058 03:48:54.826307 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2059 03:48:54.830615 tftpboot 192.168.201.1 12543686/tftp-deploy-48fpjq2s/kernel/bzIploy-48fpjq2s/kernel/cmdline 12543686/tftp-deploy-48fpjq2s/ramdisk/ramdisk.cpio.gz
2060 03:48:54.831055
2061 03:48:54.831384 Waiting for link
2062 03:48:55.031723
2063 03:48:55.032277 done.
2064 03:48:55.032688
2065 03:48:55.033010 MAC: 00:24:32:50:19:be
2066 03:48:55.033318
2067 03:48:55.034956 Sending DHCP discover... done.
2068 03:48:55.035381
2069 03:48:55.038749 Waiting for reply... done.
2070 03:48:55.039323
2071 03:48:55.041506 Sending DHCP request... done.
2072 03:48:55.041942
2073 03:48:55.064716 Waiting for reply... done.
2074 03:48:55.065293
2075 03:48:55.065640 My ip is 192.168.201.15
2076 03:48:55.065956
2077 03:48:55.067643 The DHCP server ip is 192.168.201.1
2078 03:48:55.070866
2079 03:48:55.074758 TFTP server IP predefined by user: 192.168.201.1
2080 03:48:55.075290
2081 03:48:55.080661 Bootfile predefined by user: 12543686/tftp-deploy-48fpjq2s/kernel/bzImage
2082 03:48:55.081091
2083 03:48:55.084052 Sending tftp read request... done.
2084 03:48:55.084629
2085 03:48:55.093363 Waiting for the transfer...
2086 03:48:55.093790
2087 03:48:55.795986 00000000 ################################################################
2088 03:48:55.796583
2089 03:48:56.495451 00080000 ################################################################
2090 03:48:56.495979
2091 03:48:57.191785 00100000 ################################################################
2092 03:48:57.192373
2093 03:48:57.894751 00180000 ################################################################
2094 03:48:57.895276
2095 03:48:58.531529 00200000 ################################################################
2096 03:48:58.531666
2097 03:48:59.111015 00280000 ################################################################
2098 03:48:59.111149
2099 03:48:59.729081 00300000 ################################################################
2100 03:48:59.729220
2101 03:49:00.305139 00380000 ################################################################
2102 03:49:00.305299
2103 03:49:00.929017 00400000 ################################################################
2104 03:49:00.929155
2105 03:49:01.558410 00480000 ################################################################
2106 03:49:01.558552
2107 03:49:02.235996 00500000 ################################################################
2108 03:49:02.236422
2109 03:49:02.880666 00580000 ################################################################
2110 03:49:02.880800
2111 03:49:03.540733 00600000 ################################################################
2112 03:49:03.541432
2113 03:49:04.245589 00680000 ################################################################
2114 03:49:04.246126
2115 03:49:04.960728 00700000 ################################################################
2116 03:49:04.961236
2117 03:49:05.621647 00780000 ################################################################
2118 03:49:05.622160
2119 03:49:06.327641 00800000 ################################################################
2120 03:49:06.328174
2121 03:49:07.054270 00880000 ################################################################
2122 03:49:07.054810
2123 03:49:07.729900 00900000 ################################################################
2124 03:49:07.730420
2125 03:49:08.429023 00980000 ################################################################
2126 03:49:08.429599
2127 03:49:09.150600 00a00000 ################################################################
2128 03:49:09.151118
2129 03:49:09.860532 00a80000 ################################################################
2130 03:49:09.860680
2131 03:49:09.905857 00b00000 ###### done.
2132 03:49:09.905994
2133 03:49:09.908977 The bootfile was 11575296 bytes long.
2134 03:49:09.909061
2135 03:49:09.912707 Sending tftp read request... done.
2136 03:49:09.912793
2137 03:49:09.915812 Waiting for the transfer...
2138 03:49:09.915900
2139 03:49:10.496889 00000000 ################################################################
2140 03:49:10.497031
2141 03:49:11.039226 00080000 ################################################################
2142 03:49:11.039378
2143 03:49:11.613860 00100000 ################################################################
2144 03:49:11.614010
2145 03:49:12.183745 00180000 ################################################################
2146 03:49:12.183895
2147 03:49:12.714423 00200000 ################################################################
2148 03:49:12.714627
2149 03:49:13.271755 00280000 ################################################################
2150 03:49:13.271904
2151 03:49:13.829695 00300000 ################################################################
2152 03:49:13.829848
2153 03:49:14.401968 00380000 ################################################################
2154 03:49:14.402127
2155 03:49:14.972314 00400000 ################################################################
2156 03:49:14.972504
2157 03:49:15.553783 00480000 ################################################################
2158 03:49:15.553942
2159 03:49:16.137892 00500000 ################################################################
2160 03:49:16.138048
2161 03:49:16.696332 00580000 ################################################################
2162 03:49:16.696489
2163 03:49:16.805226 00600000 ############# done.
2164 03:49:16.805381
2165 03:49:16.809080 Sending tftp read request... done.
2166 03:49:16.809164
2167 03:49:16.812018 Waiting for the transfer...
2168 03:49:16.812100
2169 03:49:16.812166 00000000 # done.
2170 03:49:16.812229
2171 03:49:16.822325 Command line loaded dynamically from TFTP file: 12543686/tftp-deploy-48fpjq2s/kernel/cmdline
2172 03:49:16.822478
2173 03:49:16.851433 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12543686/extract-nfsrootfs-55tuluqs,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2174 03:49:16.851591
2175 03:49:16.854736 ec_init(0): CrosEC protocol v3 supported (256, 256)
2176 03:49:16.861544
2177 03:49:16.864713 Shutting down all USB controllers.
2178 03:49:16.864807
2179 03:49:16.864873 Removing current net device
2180 03:49:16.869194
2181 03:49:16.869331 Finalizing coreboot
2182 03:49:16.869416
2183 03:49:16.875399 Exiting depthcharge with code 4 at timestamp: 31666560
2184 03:49:16.875502
2185 03:49:16.875570
2186 03:49:16.875631 Starting kernel ...
2187 03:49:16.875689
2188 03:49:16.875747
2189 03:49:16.876123 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
2190 03:49:16.876218 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2191 03:49:16.876325 Setting prompt string to ['Linux version [0-9]']
2192 03:49:16.876413 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2193 03:49:16.876482 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2195 03:53:34.877110 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2197 03:53:34.878101 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2199 03:53:34.878974 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2202 03:53:34.880275 end: 2 depthcharge-action (duration 00:05:00) [common]
2204 03:53:34.881427 Cleaning after the job
2205 03:53:34.881880 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543686/tftp-deploy-48fpjq2s/ramdisk
2206 03:53:34.886520 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543686/tftp-deploy-48fpjq2s/kernel
2207 03:53:34.894342 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543686/tftp-deploy-48fpjq2s/nfsrootfs
2208 03:53:35.039095 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12543686/tftp-deploy-48fpjq2s/modules
2209 03:53:35.039808 start: 4.1 power-off (timeout 00:00:30) [common]
2210 03:53:35.039975 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2211 03:53:35.110866 >> Command sent successfully.
2212 03:53:35.114794 Returned 0 in 0 seconds
2213 03:53:35.215673 end: 4.1 power-off (duration 00:00:00) [common]
2215 03:53:35.217208 start: 4.2 read-feedback (timeout 00:10:00) [common]
2216 03:53:35.218429 Listened to connection for namespace 'common' for up to 1s
2218 03:53:35.219646 Listened to connection for namespace 'common' for up to 1s
2219 03:53:36.219081 Finalising connection for namespace 'common'
2220 03:53:36.219777 Disconnecting from shell: Finalise
2221 03:53:36.220209
2222 03:53:36.321274 end: 4.2 read-feedback (duration 00:00:01) [common]
2223 03:53:36.321844 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12543686
2224 03:53:36.870793 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12543686
2225 03:53:36.870969 JobError: Your job cannot terminate cleanly.