Boot log: acer-cbv514-1h-34uz-brya
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 11:20:27.315762 lava-dispatcher, installed at version: 2024.01
2 11:20:27.315933 start: 0 validate
3 11:20:27.316047 Start time: 2024-02-23 11:20:27.316040+00:00 (UTC)
4 11:20:27.316153 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:20:27.316262 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 11:20:27.607830 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:20:27.608454 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-201-gc2afc54e2d6bb%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:20:27.900234 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:20:27.900851 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-201-gc2afc54e2d6bb%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 11:20:33.055952 validate duration: 5.74
12 11:20:33.056214 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:20:33.056322 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:20:33.056411 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:20:33.056538 Not decompressing ramdisk as can be used compressed.
16 11:20:33.056630 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 11:20:33.056685 saving as /var/lib/lava/dispatcher/tmp/12838136/tftp-deploy-8olk8tls/ramdisk/rootfs.cpio.gz
18 11:20:33.056736 total size: 8418130 (8 MB)
19 11:20:33.781212 progress 0 % (0 MB)
20 11:20:33.786819 progress 5 % (0 MB)
21 11:20:33.788522 progress 10 % (0 MB)
22 11:20:33.790236 progress 15 % (1 MB)
23 11:20:33.791801 progress 20 % (1 MB)
24 11:20:33.793374 progress 25 % (2 MB)
25 11:20:33.794907 progress 30 % (2 MB)
26 11:20:33.796328 progress 35 % (2 MB)
27 11:20:33.797914 progress 40 % (3 MB)
28 11:20:33.799449 progress 45 % (3 MB)
29 11:20:33.800956 progress 50 % (4 MB)
30 11:20:33.802541 progress 55 % (4 MB)
31 11:20:33.804035 progress 60 % (4 MB)
32 11:20:33.805558 progress 65 % (5 MB)
33 11:20:33.807070 progress 70 % (5 MB)
34 11:20:33.808569 progress 75 % (6 MB)
35 11:20:33.810171 progress 80 % (6 MB)
36 11:20:33.811750 progress 85 % (6 MB)
37 11:20:33.813278 progress 90 % (7 MB)
38 11:20:33.814832 progress 95 % (7 MB)
39 11:20:33.816277 progress 100 % (8 MB)
40 11:20:33.816453 8 MB downloaded in 0.76 s (10.57 MB/s)
41 11:20:33.816599 end: 1.1.1 http-download (duration 00:00:01) [common]
43 11:20:33.816818 end: 1.1 download-retry (duration 00:00:01) [common]
44 11:20:33.816901 start: 1.2 download-retry (timeout 00:09:59) [common]
45 11:20:33.816978 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 11:20:33.817108 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-201-gc2afc54e2d6bb/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 11:20:33.817168 saving as /var/lib/lava/dispatcher/tmp/12838136/tftp-deploy-8olk8tls/kernel/bzImage
48 11:20:33.817238 total size: 12349440 (11 MB)
49 11:20:33.817335 No compression specified
50 11:20:33.818338 progress 0 % (0 MB)
51 11:20:33.820575 progress 5 % (0 MB)
52 11:20:33.822932 progress 10 % (1 MB)
53 11:20:33.825142 progress 15 % (1 MB)
54 11:20:33.827453 progress 20 % (2 MB)
55 11:20:33.829688 progress 25 % (2 MB)
56 11:20:33.831938 progress 30 % (3 MB)
57 11:20:33.834083 progress 35 % (4 MB)
58 11:20:33.836641 progress 40 % (4 MB)
59 11:20:33.838900 progress 45 % (5 MB)
60 11:20:33.841136 progress 50 % (5 MB)
61 11:20:33.843386 progress 55 % (6 MB)
62 11:20:33.845647 progress 60 % (7 MB)
63 11:20:33.847754 progress 65 % (7 MB)
64 11:20:33.849960 progress 70 % (8 MB)
65 11:20:33.852125 progress 75 % (8 MB)
66 11:20:33.854316 progress 80 % (9 MB)
67 11:20:33.856513 progress 85 % (10 MB)
68 11:20:33.858801 progress 90 % (10 MB)
69 11:20:33.860956 progress 95 % (11 MB)
70 11:20:33.863054 progress 100 % (11 MB)
71 11:20:33.863232 11 MB downloaded in 0.05 s (256.09 MB/s)
72 11:20:33.863376 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:20:33.863602 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:20:33.863686 start: 1.3 download-retry (timeout 00:09:59) [common]
76 11:20:33.863771 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 11:20:33.863905 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-201-gc2afc54e2d6bb/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 11:20:33.863966 saving as /var/lib/lava/dispatcher/tmp/12838136/tftp-deploy-8olk8tls/modules/modules.tar
79 11:20:33.864028 total size: 484664 (0 MB)
80 11:20:33.864089 Using unxz to decompress xz
81 11:20:33.867680 progress 6 % (0 MB)
82 11:20:33.868005 progress 13 % (0 MB)
83 11:20:33.868213 progress 20 % (0 MB)
84 11:20:33.869880 progress 27 % (0 MB)
85 11:20:33.871686 progress 33 % (0 MB)
86 11:20:33.873453 progress 40 % (0 MB)
87 11:20:33.875104 progress 47 % (0 MB)
88 11:20:33.876936 progress 54 % (0 MB)
89 11:20:33.878554 progress 60 % (0 MB)
90 11:20:33.880279 progress 67 % (0 MB)
91 11:20:33.882096 progress 74 % (0 MB)
92 11:20:33.883850 progress 81 % (0 MB)
93 11:20:33.885550 progress 87 % (0 MB)
94 11:20:33.887297 progress 94 % (0 MB)
95 11:20:33.889405 progress 100 % (0 MB)
96 11:20:33.895267 0 MB downloaded in 0.03 s (14.80 MB/s)
97 11:20:33.895504 end: 1.3.1 http-download (duration 00:00:00) [common]
99 11:20:33.895747 end: 1.3 download-retry (duration 00:00:00) [common]
100 11:20:33.895835 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 11:20:33.895910 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 11:20:33.895974 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 11:20:33.896043 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 11:20:33.896229 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_
105 11:20:33.896342 makedir: /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin
106 11:20:33.896429 makedir: /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/tests
107 11:20:33.896513 makedir: /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/results
108 11:20:33.896612 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-add-keys
109 11:20:33.896733 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-add-sources
110 11:20:33.896838 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-background-process-start
111 11:20:33.896948 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-background-process-stop
112 11:20:33.897049 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-common-functions
113 11:20:33.897152 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-echo-ipv4
114 11:20:33.897261 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-install-packages
115 11:20:33.897365 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-installed-packages
116 11:20:33.897461 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-os-build
117 11:20:33.897555 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-probe-channel
118 11:20:33.897650 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-probe-ip
119 11:20:33.897750 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-target-ip
120 11:20:33.897844 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-target-mac
121 11:20:33.897936 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-target-storage
122 11:20:33.898034 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-test-case
123 11:20:33.898128 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-test-event
124 11:20:33.898221 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-test-feedback
125 11:20:33.898315 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-test-raise
126 11:20:33.898412 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-test-reference
127 11:20:33.898509 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-test-runner
128 11:20:33.898605 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-test-set
129 11:20:33.898699 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-test-shell
130 11:20:33.898795 Updating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-install-packages (oe)
131 11:20:33.898917 Updating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/bin/lava-installed-packages (oe)
132 11:20:33.899011 Creating /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/environment
133 11:20:33.899091 LAVA metadata
134 11:20:33.899153 - LAVA_JOB_ID=12838136
135 11:20:33.899206 - LAVA_DISPATCHER_IP=192.168.201.1
136 11:20:33.899289 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 11:20:33.899360 skipped lava-vland-overlay
138 11:20:33.899423 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 11:20:33.899487 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 11:20:33.899538 skipped lava-multinode-overlay
141 11:20:33.899595 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 11:20:33.899659 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 11:20:33.899719 Loading test definitions
144 11:20:33.899807 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 11:20:33.899873 Using /lava-12838136 at stage 0
146 11:20:33.900125 uuid=12838136_1.4.2.3.1 testdef=None
147 11:20:33.900214 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 11:20:33.900284 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 11:20:33.900714 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 11:20:33.900899 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 11:20:33.901465 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 11:20:33.901676 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 11:20:33.902257 runner path: /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/0/tests/0_dmesg test_uuid 12838136_1.4.2.3.1
156 11:20:33.902382 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 11:20:33.902595 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
159 11:20:33.902650 Using /lava-12838136 at stage 1
160 11:20:33.902871 uuid=12838136_1.4.2.3.5 testdef=None
161 11:20:33.902940 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 11:20:33.903002 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
163 11:20:33.903360 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 11:20:33.903538 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
166 11:20:33.904062 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 11:20:33.904244 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
169 11:20:33.904728 runner path: /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/1/tests/1_bootrr test_uuid 12838136_1.4.2.3.5
170 11:20:33.904848 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 11:20:33.905014 Creating lava-test-runner.conf files
173 11:20:33.905063 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/0 for stage 0
174 11:20:33.905130 - 0_dmesg
175 11:20:33.905197 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12838136/lava-overlay-xv572ih_/lava-12838136/1 for stage 1
176 11:20:33.905301 - 1_bootrr
177 11:20:33.905378 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 11:20:33.905447 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
179 11:20:33.911881 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 11:20:33.911988 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
181 11:20:33.912064 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 11:20:33.912132 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 11:20:33.912199 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
184 11:20:34.081101 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 11:20:34.081438 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 11:20:34.081538 extracting modules file /var/lib/lava/dispatcher/tmp/12838136/tftp-deploy-8olk8tls/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12838136/extract-overlay-ramdisk-psum83nz/ramdisk
187 11:20:34.095575 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 11:20:34.095734 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 11:20:34.095823 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12838136/compress-overlay-atpd8b1k/overlay-1.4.2.4.tar.gz to ramdisk
190 11:20:34.095885 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12838136/compress-overlay-atpd8b1k/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12838136/extract-overlay-ramdisk-psum83nz/ramdisk
191 11:20:34.101813 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 11:20:34.101914 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 11:20:34.101991 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 11:20:34.102060 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 11:20:34.102121 Building ramdisk /var/lib/lava/dispatcher/tmp/12838136/extract-overlay-ramdisk-psum83nz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12838136/extract-overlay-ramdisk-psum83nz/ramdisk
196 11:20:34.164896 >> 53982 blocks
197 11:20:34.945304 rename /var/lib/lava/dispatcher/tmp/12838136/extract-overlay-ramdisk-psum83nz/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12838136/tftp-deploy-8olk8tls/ramdisk/ramdisk.cpio.gz
198 11:20:34.945661 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 11:20:34.945780 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 11:20:34.945867 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 11:20:34.945945 No mkimage arch provided, not using FIT.
202 11:20:34.946016 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 11:20:34.946080 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 11:20:34.946156 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 11:20:34.946232 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 11:20:34.946299 No LXC device requested
207 11:20:34.946367 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 11:20:34.946439 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 11:20:34.946509 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 11:20:34.946572 Checking files for TFTP limit of 4294967296 bytes.
211 11:20:34.946907 end: 1 tftp-deploy (duration 00:00:02) [common]
212 11:20:34.946987 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 11:20:34.947058 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 11:20:34.947153 substitutions:
215 11:20:34.947207 - {DTB}: None
216 11:20:34.947257 - {INITRD}: 12838136/tftp-deploy-8olk8tls/ramdisk/ramdisk.cpio.gz
217 11:20:34.947303 - {KERNEL}: 12838136/tftp-deploy-8olk8tls/kernel/bzImage
218 11:20:34.947349 - {LAVA_MAC}: None
219 11:20:34.947396 - {PRESEED_CONFIG}: None
220 11:20:34.947441 - {PRESEED_LOCAL}: None
221 11:20:34.947485 - {RAMDISK}: 12838136/tftp-deploy-8olk8tls/ramdisk/ramdisk.cpio.gz
222 11:20:34.947529 - {ROOT_PART}: None
223 11:20:34.947573 - {ROOT}: None
224 11:20:34.947616 - {SERVER_IP}: 192.168.201.1
225 11:20:34.947659 - {TEE}: None
226 11:20:34.947704 Parsed boot commands:
227 11:20:34.947759 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 11:20:34.947898 Parsed boot commands: tftpboot 192.168.201.1 12838136/tftp-deploy-8olk8tls/kernel/bzImage 12838136/tftp-deploy-8olk8tls/kernel/cmdline 12838136/tftp-deploy-8olk8tls/ramdisk/ramdisk.cpio.gz
229 11:20:34.947978 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 11:20:34.948046 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 11:20:34.948114 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 11:20:34.948179 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 11:20:34.948234 Not connected, no need to disconnect.
234 11:20:34.948289 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 11:20:34.948350 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 11:20:34.948402 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-3'
237 11:20:34.951486 Setting prompt string to ['lava-test: # ']
238 11:20:34.951732 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 11:20:34.951825 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 11:20:34.951909 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 11:20:34.951978 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 11:20:34.952132 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=reboot'
243 11:20:40.089529 >> Command sent successfully.
244 11:20:40.097509 Returned 0 in 5 seconds
245 11:20:40.198468 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 11:20:40.199670 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 11:20:40.200075 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 11:20:40.200395 Setting prompt string to 'Starting depthcharge on Volmar...'
250 11:20:40.200635 Changing prompt to 'Starting depthcharge on Volmar...'
251 11:20:40.200867 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
252 11:20:40.201799 [Enter `^Ec?' for help]
253 11:20:41.569970
254 11:20:41.570134
255 11:20:41.577641 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
256 11:20:41.581670 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
257 11:20:41.584727 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
258 11:20:41.591288 CPU: AES supported, TXT NOT supported, VT supported
259 11:20:41.597923 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
260 11:20:41.600806 Cache size = 10 MiB
261 11:20:41.604192 MCH: device id 4609 (rev 04) is Alderlake-P
262 11:20:41.610745 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
263 11:20:41.614394 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
264 11:20:41.618404 VBOOT: Loading verstage.
265 11:20:41.622324 FMAP: Found "FLASH" version 1.1 at 0x1804000.
266 11:20:41.626449 FMAP: base = 0x0 size = 0x2000000 #areas = 37
267 11:20:41.632980 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
268 11:20:41.640221 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
269 11:20:41.646985 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
270 11:20:41.651105
271 11:20:41.651584
272 11:20:41.657134 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
273 11:20:41.664244 Probing TPM I2C: I2C bus 1 version 0x3230302a
274 11:20:41.667543 DW I2C bus 1 at 0xfe022000 (400 KHz)
275 11:20:41.671616 done! DID_VID 0x00281ae0
276 11:20:41.674490 TPM ready after 0 ms
277 11:20:41.677606 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
278 11:20:41.686484 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
279 11:20:41.694457 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
280 11:20:41.743319 tlcl_send_startup: Startup return code is 0
281 11:20:41.743805 TPM: setup succeeded
282 11:20:41.766139 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
283 11:20:41.787985 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
284 11:20:41.792605 Chrome EC: UHEPI supported
285 11:20:41.797410 Reading cr50 boot mode
286 11:20:41.814646 Cr50 says boot_mode is VERIFIED_RW(0x00).
287 11:20:41.815213 Phase 1
288 11:20:41.818459 FMAP: area GBB found @ 1805000 (458752 bytes)
289 11:20:41.824998 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
290 11:20:41.832232 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
291 11:20:41.842613 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
292 11:20:41.843099 Phase 2
293 11:20:41.843377 Phase 3
294 11:20:41.849506 FMAP: area GBB found @ 1805000 (458752 bytes)
295 11:20:41.853035 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
296 11:20:41.859073 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 11:20:41.862527 VB2:vb2_verify_keyblock() Checking keyblock signature...
298 11:20:41.868964 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
299 11:20:41.876105 VB2:vb2_verify_digest() HW RSA forbidden, using SW
300 11:20:41.882450 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
301 11:20:41.894930 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
302 11:20:41.898036 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
303 11:20:41.904877 VB2:vb2_verify_fw_preamble() Verifying preamble.
304 11:20:41.911589 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
305 11:20:41.915001 VB2:vb2_verify_digest() HW RSA forbidden, using SW
306 11:20:41.921417 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
307 11:20:41.925735 Phase 4
308 11:20:41.929195 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
309 11:20:41.935350 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
310 11:20:42.161092 VB2:vb2_verify_digest() HW RSA forbidden, using SW
311 11:20:42.168490 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
312 11:20:42.171752 Saving vboot hash.
313 11:20:42.178008 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
314 11:20:42.193416 tlcl_extend: response is 0
315 11:20:42.200155 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
316 11:20:42.206673 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
317 11:20:42.221815 tlcl_extend: response is 0
318 11:20:42.228273 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
319 11:20:42.250045 tlcl_lock_nv_write: response is 0
320 11:20:42.269087 tlcl_lock_nv_write: response is 0
321 11:20:42.269640 Slot A is selected
322 11:20:42.276337 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
323 11:20:42.282228 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
324 11:20:42.288814 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
325 11:20:42.295271 BS: verstage times (exec / console): total (unknown) / 246 ms
326 11:20:42.295350
327 11:20:42.295404
328 11:20:42.301817 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
329 11:20:42.307040 Google Chrome EC: version:
330 11:20:42.310158 ro: volmar_v2.0.14126-e605144e9c
331 11:20:42.313920 rw: volmar_v0.0.55-22d1557
332 11:20:42.316873 running image: 2
333 11:20:42.320312 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
334 11:20:42.330508 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
335 11:20:42.337236 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
336 11:20:42.343483 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
337 11:20:42.353470 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
338 11:20:42.363687 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
339 11:20:42.366858 EC took 941us to calculate image hash
340 11:20:42.376596 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
341 11:20:42.380158 VB2:sync_ec() select_rw=RW(active)
342 11:20:42.391784 Waited 269us to clear limit power flag.
343 11:20:42.395051 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
344 11:20:42.398349 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
345 11:20:42.401584 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
346 11:20:42.408305 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
347 11:20:42.411690 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
348 11:20:42.415254 TCO_STS: 0000 0000
349 11:20:42.415334 GEN_PMCON: d0015038 00002200
350 11:20:42.418514 GBLRST_CAUSE: 00000000 00000000
351 11:20:42.421800 HPR_CAUSE0: 00000000
352 11:20:42.425307 prev_sleep_state 5
353 11:20:42.428251 Abort disabling TXT, as CPU is not TXT capable.
354 11:20:42.435597 cse_lite: Number of partitions = 3
355 11:20:42.439014 cse_lite: Current partition = RO
356 11:20:42.439082 cse_lite: Next partition = RO
357 11:20:42.442053 cse_lite: Flags = 0x7
358 11:20:42.448790 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
359 11:20:42.459041 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
360 11:20:42.462230 FMAP: area SI_ME found @ 1000 (5238784 bytes)
361 11:20:42.469081 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
362 11:20:42.475359 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
363 11:20:42.481940 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
364 11:20:42.485567 cse_lite: CSE CBFS RW version : 16.1.25.2049
365 11:20:42.491990 cse_lite: Set Boot Partition Info Command (RW)
366 11:20:42.495415 HECI: Global Reset(Type:1) Command
367 11:20:43.915437 V��h�2023 bootblock starting (log level: 8)...
368 11:20:43.919304 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
369 11:20:43.922627 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
370 11:20:43.929507 CPU: AES supported, TXT NOT supported, VT supported
371 11:20:43.935738 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
372 11:20:43.939306 Cache size = 10 MiB
373 11:20:43.942943 MCH: device id 4609 (rev 04) is Alderlake-P
374 11:20:43.949380 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
375 11:20:43.952394 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
376 11:20:43.956268 VBOOT: Loading verstage.
377 11:20:43.960101 FMAP: Found "FLASH" version 1.1 at 0x1804000.
378 11:20:43.963344 FMAP: base = 0x0 size = 0x2000000 #areas = 37
379 11:20:43.970488 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 11:20:43.978367 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
381 11:20:43.985250 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
382 11:20:43.988493
383 11:20:43.989003
384 11:20:43.995266 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
385 11:20:44.002105 Probing TPM I2C: I2C bus 1 version 0x3230302a
386 11:20:44.005733 DW I2C bus 1 at 0xfe022000 (400 KHz)
387 11:20:44.008646 done! DID_VID 0x00281ae0
388 11:20:44.011999 TPM ready after 0 ms
389 11:20:44.016096 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
390 11:20:44.028179 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
391 11:20:44.031889 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
392 11:20:44.089088 tlcl_send_startup: Startup return code is 0
393 11:20:44.089607 TPM: setup succeeded
394 11:20:44.110832 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
395 11:20:44.132643 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
396 11:20:44.136520 Chrome EC: UHEPI supported
397 11:20:44.139613 Reading cr50 boot mode
398 11:20:44.155004 Cr50 says boot_mode is VERIFIED_RW(0x00).
399 11:20:44.155506 Phase 1
400 11:20:44.161550 FMAP: area GBB found @ 1805000 (458752 bytes)
401 11:20:44.168352 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
402 11:20:44.174928 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
403 11:20:44.181514 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
404 11:20:44.182023 Phase 2
405 11:20:44.184690 Phase 3
406 11:20:44.188052 FMAP: area GBB found @ 1805000 (458752 bytes)
407 11:20:44.194796 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
408 11:20:44.198141 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
409 11:20:44.204660 VB2:vb2_verify_keyblock() Checking keyblock signature...
410 11:20:44.211886 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
411 11:20:44.218630 VB2:vb2_verify_digest() HW RSA forbidden, using SW
412 11:20:44.221712 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
413 11:20:44.236102 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
414 11:20:44.239151 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
415 11:20:44.246066 VB2:vb2_verify_fw_preamble() Verifying preamble.
416 11:20:44.252215 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
417 11:20:44.255561 VB2:vb2_verify_digest() HW RSA forbidden, using SW
418 11:20:44.262559 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
419 11:20:44.266249 Phase 4
420 11:20:44.269885 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
421 11:20:44.276313 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
422 11:20:44.502516 VB2:vb2_verify_digest() HW RSA forbidden, using SW
423 11:20:44.509131 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
424 11:20:44.512925 Saving vboot hash.
425 11:20:44.519035 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
426 11:20:44.534734 tlcl_extend: response is 0
427 11:20:44.541330 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
428 11:20:44.547944 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
429 11:20:44.562856 tlcl_extend: response is 0
430 11:20:44.569376 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
431 11:20:44.589501 tlcl_lock_nv_write: response is 0
432 11:20:44.608485 tlcl_lock_nv_write: response is 0
433 11:20:44.608991 Slot A is selected
434 11:20:44.614976 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
435 11:20:44.621822 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
436 11:20:44.628331 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
437 11:20:44.634685 BS: verstage times (exec / console): total (unknown) / 246 ms
438 11:20:44.635090
439 11:20:44.635396
440 11:20:44.641352 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
441 11:20:44.645185 Google Chrome EC: version:
442 11:20:44.648878 ro: volmar_v2.0.14126-e605144e9c
443 11:20:44.652407 rw: volmar_v0.0.55-22d1557
444 11:20:44.655942 running image: 2
445 11:20:44.660093 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
446 11:20:44.668801 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
447 11:20:44.675478 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
448 11:20:44.682168 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
449 11:20:44.692273 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
450 11:20:44.702390 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
451 11:20:44.705207 EC took 1236us to calculate image hash
452 11:20:44.715879 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
453 11:20:44.718993 VB2:sync_ec() select_rw=RW(active)
454 11:20:44.734808 Waited 269us to clear limit power flag.
455 11:20:44.738163 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
456 11:20:44.741300 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
457 11:20:44.744717 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
458 11:20:44.751717 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
459 11:20:44.755113 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
460 11:20:44.758251 TCO_STS: 0000 0000
461 11:20:44.761869 GEN_PMCON: d1001038 00002200
462 11:20:44.765137 GBLRST_CAUSE: 00000040 00000000
463 11:20:44.765699 HPR_CAUSE0: 00000000
464 11:20:44.768408 prev_sleep_state 5
465 11:20:44.771813 Abort disabling TXT, as CPU is not TXT capable.
466 11:20:44.780011 cse_lite: Number of partitions = 3
467 11:20:44.782961 cse_lite: Current partition = RW
468 11:20:44.783322 cse_lite: Next partition = RW
469 11:20:44.786243 cse_lite: Flags = 0x7
470 11:20:44.793310 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
471 11:20:44.802910 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
472 11:20:44.806364 FMAP: area SI_ME found @ 1000 (5238784 bytes)
473 11:20:44.813342 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
474 11:20:44.819613 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
475 11:20:44.826136 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
476 11:20:44.829680 cse_lite: CSE CBFS RW version : 16.1.25.2049
477 11:20:44.832834 Boot Count incremented to 3269
478 11:20:44.839695 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
479 11:20:44.846138 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
480 11:20:44.859217 Probing TPM I2C: done! DID_VID 0x00281ae0
481 11:20:44.862385 Locality already claimed
482 11:20:44.865576 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
483 11:20:44.885103 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
484 11:20:44.891614 MRC: Hash idx 0x100d comparison successful.
485 11:20:44.895245 MRC cache found, size f6c8
486 11:20:44.895794 bootmode is set to: 2
487 11:20:44.899053 EC returned error result code 3
488 11:20:44.902199 FW_CONFIG value from CBI is 0x131
489 11:20:44.909835 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
490 11:20:44.912600 SPD index = 0
491 11:20:44.919060 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
492 11:20:44.919460 SPD: module type is LPDDR4X
493 11:20:44.926219 SPD: module part number is K4U6E3S4AB-MGCL
494 11:20:44.932829 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
495 11:20:44.936276 SPD: device width 16 bits, bus width 16 bits
496 11:20:44.939231 SPD: module size is 1024 MB (per channel)
497 11:20:45.008455 CBMEM:
498 11:20:45.011686 IMD: root @ 0x76fff000 254 entries.
499 11:20:45.014748 IMD: root @ 0x76ffec00 62 entries.
500 11:20:45.022819 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
501 11:20:45.025807 RO_VPD is uninitialized or empty.
502 11:20:45.029182 FMAP: area RW_VPD found @ f29000 (8192 bytes)
503 11:20:45.035855 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
504 11:20:45.039282 External stage cache:
505 11:20:45.042332 IMD: root @ 0x7bbff000 254 entries.
506 11:20:45.045768 IMD: root @ 0x7bbfec00 62 entries.
507 11:20:45.052254 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
508 11:20:45.059659 MRC: Checking cached data update for 'RW_MRC_CACHE'.
509 11:20:45.062650 MRC: 'RW_MRC_CACHE' does not need update.
510 11:20:45.063019 8 DIMMs found
511 11:20:45.065730 SMM Memory Map
512 11:20:45.069336 SMRAM : 0x7b800000 0x800000
513 11:20:45.072780 Subregion 0: 0x7b800000 0x200000
514 11:20:45.076019 Subregion 1: 0x7ba00000 0x200000
515 11:20:45.079246 Subregion 2: 0x7bc00000 0x400000
516 11:20:45.082966 top_of_ram = 0x77000000
517 11:20:45.085869 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
518 11:20:45.092341 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
519 11:20:45.098976 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
520 11:20:45.102983 MTRR Range: Start=ff000000 End=0 (Size 1000000)
521 11:20:45.103402 Normal boot
522 11:20:45.112249 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
523 11:20:45.119556 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
524 11:20:45.125795 Processing 237 relocs. Offset value of 0x74ab9000
525 11:20:45.133879 BS: romstage times (exec / console): total (unknown) / 377 ms
526 11:20:45.141386
527 11:20:45.141891
528 11:20:45.148263 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
529 11:20:45.148775 Normal boot
530 11:20:45.154792 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
531 11:20:45.161316 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
532 11:20:45.168038 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
533 11:20:45.178221 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
534 11:20:45.225178 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
535 11:20:45.231603 Processing 5931 relocs. Offset value of 0x72a2f000
536 11:20:45.235289 BS: postcar times (exec / console): total (unknown) / 51 ms
537 11:20:45.238378
538 11:20:45.238849
539 11:20:45.244772 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
540 11:20:45.248358 Reserving BERT start 76a1e000, size 10000
541 11:20:45.251712 Normal boot
542 11:20:45.255115 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
543 11:20:45.261689 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
544 11:20:45.272457 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
545 11:20:45.274785 FMAP: area RW_VPD found @ f29000 (8192 bytes)
546 11:20:45.278321 Google Chrome EC: version:
547 11:20:45.281866 ro: volmar_v2.0.14126-e605144e9c
548 11:20:45.285744 rw: volmar_v0.0.55-22d1557
549 11:20:45.286242 running image: 2
550 11:20:45.291787 ACPI _SWS is PM1 Index 8 GPE Index -1
551 11:20:45.295415 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
552 11:20:45.300154 EC returned error result code 3
553 11:20:45.303390 FW_CONFIG value from CBI is 0x131
554 11:20:45.310263 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
555 11:20:45.313617 PCI: 00:1c.2 disabled by fw_config
556 11:20:45.320194 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
557 11:20:45.323602 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
558 11:20:45.330494 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
559 11:20:45.333270 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
560 11:20:45.339992 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
561 11:20:45.346737 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
562 11:20:45.353318 microcode: sig=0x906a4 pf=0x80 revision=0x423
563 11:20:45.356608 microcode: Update skipped, already up-to-date
564 11:20:45.363509 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
565 11:20:45.395726 Detected 6 core, 8 thread CPU.
566 11:20:45.399120 Setting up SMI for CPU
567 11:20:45.402113 IED base = 0x7bc00000
568 11:20:45.402508 IED size = 0x00400000
569 11:20:45.405873 Will perform SMM setup.
570 11:20:45.409059 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
571 11:20:45.412372 LAPIC 0x0 in XAPIC mode.
572 11:20:45.422312 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
573 11:20:45.425837 Processing 18 relocs. Offset value of 0x00030000
574 11:20:45.430361 Attempting to start 7 APs
575 11:20:45.433280 Waiting for 10ms after sending INIT.
576 11:20:45.446686 Waiting for SIPI to complete...
577 11:20:45.450560 LAPIC 0x1 in XAPIC mode.
578 11:20:45.451061 done.
579 11:20:45.456490 AP: slot 5 apic_id 1, MCU rev: 0x00000423
580 11:20:45.460153 Waiting for SIPI to complete...
581 11:20:45.460648 done.
582 11:20:45.463161 LAPIC 0x12 in XAPIC mode.
583 11:20:45.463784 LAPIC 0x14 in XAPIC mode.
584 11:20:45.466332 LAPIC 0x10 in XAPIC mode.
585 11:20:45.473273 AP: slot 4 apic_id 14, MCU rev: 0x00000423
586 11:20:45.476690 AP: slot 3 apic_id 12, MCU rev: 0x00000423
587 11:20:45.480240 AP: slot 2 apic_id 10, MCU rev: 0x00000423
588 11:20:45.483413 LAPIC 0x16 in XAPIC mode.
589 11:20:45.486573 LAPIC 0x9 in XAPIC mode.
590 11:20:45.489891 AP: slot 1 apic_id 16, MCU rev: 0x00000423
591 11:20:45.493236 AP: slot 6 apic_id 9, MCU rev: 0x00000423
592 11:20:45.497029 LAPIC 0x8 in XAPIC mode.
593 11:20:45.500183 AP: slot 7 apic_id 8, MCU rev: 0x00000423
594 11:20:45.503030 smm_setup_relocation_handler: enter
595 11:20:45.506643 smm_setup_relocation_handler: exit
596 11:20:45.516598 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
597 11:20:45.519795 Processing 11 relocs. Offset value of 0x00038000
598 11:20:45.526727 smm_module_setup_stub: stack_top = 0x7b804000
599 11:20:45.530072 smm_module_setup_stub: per cpu stack_size = 0x800
600 11:20:45.536545 smm_module_setup_stub: runtime.start32_offset = 0x4c
601 11:20:45.539973 smm_module_setup_stub: runtime.smm_size = 0x10000
602 11:20:45.546739 SMM Module: stub loaded at 38000. Will call 0x76a52094
603 11:20:45.549989 Installing permanent SMM handler to 0x7b800000
604 11:20:45.556367 smm_load_module: total_smm_space_needed e468, available -> 200000
605 11:20:45.565943 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
606 11:20:45.569858 Processing 255 relocs. Offset value of 0x7b9f6000
607 11:20:45.575946 smm_load_module: smram_start: 0x7b800000
608 11:20:45.579608 smm_load_module: smram_end: 7ba00000
609 11:20:45.583012 smm_load_module: handler start 0x7b9f6d5f
610 11:20:45.586397 smm_load_module: handler_size 98d0
611 11:20:45.589977 smm_load_module: fxsave_area 0x7b9ff000
612 11:20:45.592856 smm_load_module: fxsave_size 1000
613 11:20:45.595987 smm_load_module: CONFIG_MSEG_SIZE 0x0
614 11:20:45.602706 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
615 11:20:45.609050 smm_load_module: handler_mod_params.smbase = 0x7b800000
616 11:20:45.612739 smm_load_module: per_cpu_save_state_size = 0x400
617 11:20:45.615762 smm_load_module: num_cpus = 0x8
618 11:20:45.622968 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
619 11:20:45.626786 smm_load_module: total_save_state_size = 0x2000
620 11:20:45.631947 smm_load_module: cpu0 entry: 7b9e6000
621 11:20:45.635787 smm_create_map: cpus allowed in one segment 30
622 11:20:45.639749 smm_create_map: min # of segments needed 1
623 11:20:45.640331 CPU 0x0
624 11:20:45.646111 smbase 7b9e6000 entry 7b9ee000
625 11:20:45.649288 ss_start 7b9f5c00 code_end 7b9ee208
626 11:20:45.649788 CPU 0x1
627 11:20:45.652812 smbase 7b9e5c00 entry 7b9edc00
628 11:20:45.659368 ss_start 7b9f5800 code_end 7b9ede08
629 11:20:45.659835 CPU 0x2
630 11:20:45.662411 smbase 7b9e5800 entry 7b9ed800
631 11:20:45.669735 ss_start 7b9f5400 code_end 7b9eda08
632 11:20:45.670221 CPU 0x3
633 11:20:45.672547 smbase 7b9e5400 entry 7b9ed400
634 11:20:45.676122 ss_start 7b9f5000 code_end 7b9ed608
635 11:20:45.679491 CPU 0x4
636 11:20:45.682714 smbase 7b9e5000 entry 7b9ed000
637 11:20:45.686022 ss_start 7b9f4c00 code_end 7b9ed208
638 11:20:45.686550 CPU 0x5
639 11:20:45.689312 smbase 7b9e4c00 entry 7b9ecc00
640 11:20:45.695963 ss_start 7b9f4800 code_end 7b9ece08
641 11:20:45.696457 CPU 0x6
642 11:20:45.699592 smbase 7b9e4800 entry 7b9ec800
643 11:20:45.705896 ss_start 7b9f4400 code_end 7b9eca08
644 11:20:45.706390 CPU 0x7
645 11:20:45.709718 smbase 7b9e4400 entry 7b9ec400
646 11:20:45.715949 ss_start 7b9f4000 code_end 7b9ec608
647 11:20:45.722224 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
648 11:20:45.725182 Processing 11 relocs. Offset value of 0x7b9ee000
649 11:20:45.732233 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
650 11:20:45.739019 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
651 11:20:45.745168 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
652 11:20:45.752024 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
653 11:20:45.759124 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
654 11:20:45.765854 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
655 11:20:45.772285 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
656 11:20:45.775540 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
657 11:20:45.781982 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
658 11:20:45.789012 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
659 11:20:45.795548 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
660 11:20:45.801921 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
661 11:20:45.809058 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
662 11:20:45.815245 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
663 11:20:45.821666 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
664 11:20:45.825337 smm_module_setup_stub: stack_top = 0x7b804000
665 11:20:45.831589 smm_module_setup_stub: per cpu stack_size = 0x800
666 11:20:45.835376 smm_module_setup_stub: runtime.start32_offset = 0x4c
667 11:20:45.842041 smm_module_setup_stub: runtime.smm_size = 0x200000
668 11:20:45.844763 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
669 11:20:45.850545 Clearing SMI status registers
670 11:20:45.853661 SMI_STS: PM1
671 11:20:45.854056 PM1_STS: WAK PWRBTN
672 11:20:45.864077 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
673 11:20:45.867272 In relocation handler: CPU 0
674 11:20:45.870284 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
675 11:20:45.873933 Writing SMRR. base = 0x7b800006, mask=0xff800c00
676 11:20:45.877046 Relocation complete.
677 11:20:45.883621 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
678 11:20:45.887379 In relocation handler: CPU 5
679 11:20:45.890545 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
680 11:20:45.894002 Relocation complete.
681 11:20:45.900907 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
682 11:20:45.903821 In relocation handler: CPU 4
683 11:20:45.907429 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
684 11:20:45.913783 Writing SMRR. base = 0x7b800006, mask=0xff800c00
685 11:20:45.914149 Relocation complete.
686 11:20:45.920733 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
687 11:20:45.923712 In relocation handler: CPU 1
688 11:20:45.926988 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
689 11:20:45.934170 Writing SMRR. base = 0x7b800006, mask=0xff800c00
690 11:20:45.936749 Relocation complete.
691 11:20:45.943638 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
692 11:20:45.946978 In relocation handler: CPU 3
693 11:20:45.950576 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
694 11:20:45.953677 Writing SMRR. base = 0x7b800006, mask=0xff800c00
695 11:20:45.957277 Relocation complete.
696 11:20:45.963924 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
697 11:20:45.967483 In relocation handler: CPU 2
698 11:20:45.970428 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
699 11:20:45.977373 Writing SMRR. base = 0x7b800006, mask=0xff800c00
700 11:20:45.977854 Relocation complete.
701 11:20:45.983756 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
702 11:20:45.986974 In relocation handler: CPU 7
703 11:20:45.994091 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
704 11:20:45.997348 Writing SMRR. base = 0x7b800006, mask=0xff800c00
705 11:20:46.000486 Relocation complete.
706 11:20:46.007218 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
707 11:20:46.010118 In relocation handler: CPU 6
708 11:20:46.013894 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
709 11:20:46.016919 Relocation complete.
710 11:20:46.017334 Initializing CPU #0
711 11:20:46.020055 CPU: vendor Intel device 906a4
712 11:20:46.023402 CPU: family 06, model 9a, stepping 04
713 11:20:46.026829 Clearing out pending MCEs
714 11:20:46.030230 cpu: energy policy set to 7
715 11:20:46.033279 Turbo is available but hidden
716 11:20:46.036907 Turbo is available and visible
717 11:20:46.040572 microcode: Update skipped, already up-to-date
718 11:20:46.043247 CPU #0 initialized
719 11:20:46.043639 Initializing CPU #5
720 11:20:46.046591 Initializing CPU #3
721 11:20:46.050482 Initializing CPU #1
722 11:20:46.050849 Initializing CPU #2
723 11:20:46.053640 CPU: vendor Intel device 906a4
724 11:20:46.056862 CPU: family 06, model 9a, stepping 04
725 11:20:46.060693 CPU: vendor Intel device 906a4
726 11:20:46.063807 CPU: family 06, model 9a, stepping 04
727 11:20:46.066651 Initializing CPU #4
728 11:20:46.070344 Clearing out pending MCEs
729 11:20:46.070816 Initializing CPU #6
730 11:20:46.073893 Initializing CPU #7
731 11:20:46.076944 CPU: vendor Intel device 906a4
732 11:20:46.080095 CPU: family 06, model 9a, stepping 04
733 11:20:46.083483 CPU: vendor Intel device 906a4
734 11:20:46.086604 CPU: family 06, model 9a, stepping 04
735 11:20:46.090350 Clearing out pending MCEs
736 11:20:46.093777 CPU: vendor Intel device 906a4
737 11:20:46.096663 CPU: family 06, model 9a, stepping 04
738 11:20:46.100339 cpu: energy policy set to 7
739 11:20:46.103835 cpu: energy policy set to 7
740 11:20:46.107397 Clearing out pending MCEs
741 11:20:46.110160 microcode: Update skipped, already up-to-date
742 11:20:46.113917 CPU #2 initialized
743 11:20:46.114420 cpu: energy policy set to 7
744 11:20:46.120184 microcode: Update skipped, already up-to-date
745 11:20:46.120656 CPU #1 initialized
746 11:20:46.123606 Clearing out pending MCEs
747 11:20:46.130161 microcode: Update skipped, already up-to-date
748 11:20:46.130665 CPU #3 initialized
749 11:20:46.133399 cpu: energy policy set to 7
750 11:20:46.137050 Clearing out pending MCEs
751 11:20:46.140474 microcode: Update skipped, already up-to-date
752 11:20:46.143771 CPU #4 initialized
753 11:20:46.146369 CPU: vendor Intel device 906a4
754 11:20:46.150425 CPU: family 06, model 9a, stepping 04
755 11:20:46.153402 cpu: energy policy set to 7
756 11:20:46.153904 Clearing out pending MCEs
757 11:20:46.156523 CPU: vendor Intel device 906a4
758 11:20:46.163215 CPU: family 06, model 9a, stepping 04
759 11:20:46.163656 cpu: energy policy set to 7
760 11:20:46.166752 Clearing out pending MCEs
761 11:20:46.173702 microcode: Update skipped, already up-to-date
762 11:20:46.174164 CPU #7 initialized
763 11:20:46.177015 cpu: energy policy set to 7
764 11:20:46.180064 microcode: Update skipped, already up-to-date
765 11:20:46.183689 CPU #5 initialized
766 11:20:46.187367 microcode: Update skipped, already up-to-date
767 11:20:46.190090 CPU #6 initialized
768 11:20:46.193277 bsp_do_flight_plan done after 730 msecs.
769 11:20:46.196574 CPU: frequency set to 4400 MHz
770 11:20:46.199644 Enabling SMIs.
771 11:20:46.206374 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
772 11:20:46.220866 Probing TPM I2C: done! DID_VID 0x00281ae0
773 11:20:46.224613 Locality already claimed
774 11:20:46.227799 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
775 11:20:46.239569 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
776 11:20:46.242473 Enabling GPIO PM b/c CR50 has long IRQ pulse support
777 11:20:46.248951 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
778 11:20:46.256003 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
779 11:20:46.259115 Found a VBT of 9216 bytes after decompression
780 11:20:46.262224 PCI 1.0, PIN A, using IRQ #16
781 11:20:46.265698 PCI 2.0, PIN A, using IRQ #17
782 11:20:46.268690 PCI 4.0, PIN A, using IRQ #18
783 11:20:46.272084 PCI 5.0, PIN A, using IRQ #16
784 11:20:46.275328 PCI 6.0, PIN A, using IRQ #16
785 11:20:46.278706 PCI 6.2, PIN C, using IRQ #18
786 11:20:46.281726 PCI 7.0, PIN A, using IRQ #19
787 11:20:46.285543 PCI 7.1, PIN B, using IRQ #20
788 11:20:46.288892 PCI 7.2, PIN C, using IRQ #21
789 11:20:46.291946 PCI 7.3, PIN D, using IRQ #22
790 11:20:46.295733 PCI 8.0, PIN A, using IRQ #23
791 11:20:46.298946 PCI D.0, PIN A, using IRQ #17
792 11:20:46.299024 PCI D.1, PIN B, using IRQ #19
793 11:20:46.301871 PCI 10.0, PIN A, using IRQ #24
794 11:20:46.305538 PCI 10.1, PIN B, using IRQ #25
795 11:20:46.309070 PCI 10.6, PIN C, using IRQ #20
796 11:20:46.311872 PCI 10.7, PIN D, using IRQ #21
797 11:20:46.315284 PCI 11.0, PIN A, using IRQ #26
798 11:20:46.318799 PCI 11.1, PIN B, using IRQ #27
799 11:20:46.322167 PCI 11.2, PIN C, using IRQ #28
800 11:20:46.325119 PCI 11.3, PIN D, using IRQ #29
801 11:20:46.328573 PCI 12.0, PIN A, using IRQ #30
802 11:20:46.331860 PCI 12.6, PIN B, using IRQ #31
803 11:20:46.335015 PCI 12.7, PIN C, using IRQ #22
804 11:20:46.338612 PCI 13.0, PIN A, using IRQ #32
805 11:20:46.342210 PCI 13.1, PIN B, using IRQ #33
806 11:20:46.345083 PCI 13.2, PIN C, using IRQ #34
807 11:20:46.348594 PCI 13.3, PIN D, using IRQ #35
808 11:20:46.352194 PCI 14.0, PIN B, using IRQ #23
809 11:20:46.352274 PCI 14.1, PIN A, using IRQ #36
810 11:20:46.355050 PCI 14.3, PIN C, using IRQ #17
811 11:20:46.358203 PCI 15.0, PIN A, using IRQ #37
812 11:20:46.361734 PCI 15.1, PIN B, using IRQ #38
813 11:20:46.365048 PCI 15.2, PIN C, using IRQ #39
814 11:20:46.368771 PCI 15.3, PIN D, using IRQ #40
815 11:20:46.371688 PCI 16.0, PIN A, using IRQ #18
816 11:20:46.375145 PCI 16.1, PIN B, using IRQ #19
817 11:20:46.378462 PCI 16.2, PIN C, using IRQ #20
818 11:20:46.382064 PCI 16.3, PIN D, using IRQ #21
819 11:20:46.385405 PCI 16.4, PIN A, using IRQ #18
820 11:20:46.388804 PCI 16.5, PIN B, using IRQ #19
821 11:20:46.392336 PCI 17.0, PIN A, using IRQ #22
822 11:20:46.395063 PCI 19.0, PIN A, using IRQ #41
823 11:20:46.398526 PCI 19.1, PIN B, using IRQ #42
824 11:20:46.402159 PCI 19.2, PIN C, using IRQ #43
825 11:20:46.402237 PCI 1C.0, PIN A, using IRQ #16
826 11:20:46.405543 PCI 1C.1, PIN B, using IRQ #17
827 11:20:46.408343 PCI 1C.2, PIN C, using IRQ #18
828 11:20:46.411643 PCI 1C.3, PIN D, using IRQ #19
829 11:20:46.415193 PCI 1C.4, PIN A, using IRQ #16
830 11:20:46.418252 PCI 1C.5, PIN B, using IRQ #17
831 11:20:46.421886 PCI 1C.6, PIN C, using IRQ #18
832 11:20:46.425032 PCI 1C.7, PIN D, using IRQ #19
833 11:20:46.428547 PCI 1D.0, PIN A, using IRQ #16
834 11:20:46.431516 PCI 1D.1, PIN B, using IRQ #17
835 11:20:46.435147 PCI 1D.2, PIN C, using IRQ #18
836 11:20:46.438228 PCI 1D.3, PIN D, using IRQ #19
837 11:20:46.441533 PCI 1E.0, PIN A, using IRQ #23
838 11:20:46.444912 PCI 1E.1, PIN B, using IRQ #20
839 11:20:46.448521 PCI 1E.2, PIN C, using IRQ #44
840 11:20:46.451488 PCI 1E.3, PIN D, using IRQ #45
841 11:20:46.455010 PCI 1F.3, PIN B, using IRQ #22
842 11:20:46.455090 PCI 1F.4, PIN C, using IRQ #23
843 11:20:46.458290 PCI 1F.6, PIN D, using IRQ #20
844 11:20:46.461391 PCI 1F.7, PIN A, using IRQ #21
845 11:20:46.467920 IRQ: Using dynamically assigned PCI IO-APIC IRQs
846 11:20:46.474691 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
847 11:20:46.657848 FSPS returned 0
848 11:20:46.661135 Executing Phase 1 of FspMultiPhaseSiInit
849 11:20:46.671080 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
850 11:20:46.674141 port C0 DISC req: usage 1 usb3 1 usb2 1
851 11:20:46.677486 Raw Buffer output 0 00000111
852 11:20:46.680410 Raw Buffer output 1 00000000
853 11:20:46.684254 pmc_send_ipc_cmd succeeded
854 11:20:46.691238 port C1 DISC req: usage 1 usb3 3 usb2 3
855 11:20:46.691321 Raw Buffer output 0 00000331
856 11:20:46.694423 Raw Buffer output 1 00000000
857 11:20:46.698343 pmc_send_ipc_cmd succeeded
858 11:20:46.702632 Detected 6 core, 8 thread CPU.
859 11:20:46.705925 Detected 6 core, 8 thread CPU.
860 11:20:46.710671 Detected 6 core, 8 thread CPU.
861 11:20:46.714163 Detected 6 core, 8 thread CPU.
862 11:20:46.717432 Detected 6 core, 8 thread CPU.
863 11:20:46.720602 Detected 6 core, 8 thread CPU.
864 11:20:46.724094 Detected 6 core, 8 thread CPU.
865 11:20:46.727586 Detected 6 core, 8 thread CPU.
866 11:20:46.730807 Detected 6 core, 8 thread CPU.
867 11:20:46.734181 Detected 6 core, 8 thread CPU.
868 11:20:46.737293 Detected 6 core, 8 thread CPU.
869 11:20:46.740875 Detected 6 core, 8 thread CPU.
870 11:20:46.744352 Detected 6 core, 8 thread CPU.
871 11:20:46.747321 Detected 6 core, 8 thread CPU.
872 11:20:46.750682 Detected 6 core, 8 thread CPU.
873 11:20:46.754032 Detected 6 core, 8 thread CPU.
874 11:20:46.757556 Detected 6 core, 8 thread CPU.
875 11:20:46.761083 Detected 6 core, 8 thread CPU.
876 11:20:46.764192 Detected 6 core, 8 thread CPU.
877 11:20:46.767950 Detected 6 core, 8 thread CPU.
878 11:20:46.771035 Detected 6 core, 8 thread CPU.
879 11:20:46.771114 Detected 6 core, 8 thread CPU.
880 11:20:47.064434 Detected 6 core, 8 thread CPU.
881 11:20:47.067628 Detected 6 core, 8 thread CPU.
882 11:20:47.071229 Detected 6 core, 8 thread CPU.
883 11:20:47.074121 Detected 6 core, 8 thread CPU.
884 11:20:47.077520 Detected 6 core, 8 thread CPU.
885 11:20:47.080752 Detected 6 core, 8 thread CPU.
886 11:20:47.084186 Detected 6 core, 8 thread CPU.
887 11:20:47.087485 Detected 6 core, 8 thread CPU.
888 11:20:47.091309 Detected 6 core, 8 thread CPU.
889 11:20:47.094533 Detected 6 core, 8 thread CPU.
890 11:20:47.097775 Detected 6 core, 8 thread CPU.
891 11:20:47.100902 Detected 6 core, 8 thread CPU.
892 11:20:47.104723 Detected 6 core, 8 thread CPU.
893 11:20:47.107988 Detected 6 core, 8 thread CPU.
894 11:20:47.110922 Detected 6 core, 8 thread CPU.
895 11:20:47.114283 Detected 6 core, 8 thread CPU.
896 11:20:47.117909 Detected 6 core, 8 thread CPU.
897 11:20:47.121071 Detected 6 core, 8 thread CPU.
898 11:20:47.124797 Detected 6 core, 8 thread CPU.
899 11:20:47.127620 Detected 6 core, 8 thread CPU.
900 11:20:47.131155 Display FSP Version Info HOB
901 11:20:47.134224 Reference Code - CPU = c.0.65.70
902 11:20:47.134316 uCode Version = 0.0.4.23
903 11:20:47.137776 TXT ACM version = ff.ff.ff.ffff
904 11:20:47.140806 Reference Code - ME = c.0.65.70
905 11:20:47.143997 MEBx version = 0.0.0.0
906 11:20:47.147424 ME Firmware Version = Lite SKU
907 11:20:47.150997 Reference Code - PCH = c.0.65.70
908 11:20:47.154096 PCH-CRID Status = Disabled
909 11:20:47.157645 PCH-CRID Original Value = ff.ff.ff.ffff
910 11:20:47.160940 PCH-CRID New Value = ff.ff.ff.ffff
911 11:20:47.164408 OPROM - RST - RAID = ff.ff.ff.ffff
912 11:20:47.167487 PCH Hsio Version = 4.0.0.0
913 11:20:47.170696 Reference Code - SA - System Agent = c.0.65.70
914 11:20:47.173923 Reference Code - MRC = 0.0.3.80
915 11:20:47.177946 SA - PCIe Version = c.0.65.70
916 11:20:47.180609 SA-CRID Status = Disabled
917 11:20:47.183995 SA-CRID Original Value = 0.0.0.4
918 11:20:47.187442 SA-CRID New Value = 0.0.0.4
919 11:20:47.190682 OPROM - VBIOS = ff.ff.ff.ffff
920 11:20:47.194219 IO Manageability Engine FW Version = 24.0.4.0
921 11:20:47.198063 PHY Build Version = 0.0.0.2016
922 11:20:47.200831 Thunderbolt(TM) FW Version = 0.0.0.0
923 11:20:47.207975 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
924 11:20:47.213995 BS: BS_DEV_INIT_CHIPS run times (exec / console): 495 / 507 ms
925 11:20:47.217428 Enumerating buses...
926 11:20:47.220690 Show all devs... Before device enumeration.
927 11:20:47.223997 Root Device: enabled 1
928 11:20:47.224056 CPU_CLUSTER: 0: enabled 1
929 11:20:47.227457 DOMAIN: 0000: enabled 1
930 11:20:47.230410 GPIO: 0: enabled 1
931 11:20:47.234054 PCI: 00:00.0: enabled 1
932 11:20:47.234116 PCI: 00:01.0: enabled 0
933 11:20:47.237092 PCI: 00:01.1: enabled 0
934 11:20:47.240555 PCI: 00:02.0: enabled 1
935 11:20:47.240622 PCI: 00:04.0: enabled 1
936 11:20:47.243465 PCI: 00:05.0: enabled 0
937 11:20:47.246996 PCI: 00:06.0: enabled 1
938 11:20:47.250442 PCI: 00:06.2: enabled 0
939 11:20:47.250507 PCI: 00:07.0: enabled 0
940 11:20:47.253594 PCI: 00:07.1: enabled 0
941 11:20:47.256916 PCI: 00:07.2: enabled 0
942 11:20:47.260255 PCI: 00:07.3: enabled 0
943 11:20:47.260320 PCI: 00:08.0: enabled 0
944 11:20:47.264451 PCI: 00:09.0: enabled 0
945 11:20:47.267355 PCI: 00:0a.0: enabled 1
946 11:20:47.270682 PCI: 00:0d.0: enabled 1
947 11:20:47.270744 PCI: 00:0d.1: enabled 0
948 11:20:47.274102 PCI: 00:0d.2: enabled 0
949 11:20:47.277272 PCI: 00:0d.3: enabled 0
950 11:20:47.277330 PCI: 00:0e.0: enabled 0
951 11:20:47.280382 PCI: 00:10.0: enabled 0
952 11:20:47.283726 PCI: 00:10.1: enabled 0
953 11:20:47.286883 PCI: 00:10.6: enabled 0
954 11:20:47.286949 PCI: 00:10.7: enabled 0
955 11:20:47.290176 PCI: 00:12.0: enabled 0
956 11:20:47.293550 PCI: 00:12.6: enabled 0
957 11:20:47.296807 PCI: 00:12.7: enabled 0
958 11:20:47.296863 PCI: 00:13.0: enabled 0
959 11:20:47.300053 PCI: 00:14.0: enabled 1
960 11:20:47.303661 PCI: 00:14.1: enabled 0
961 11:20:47.307447 PCI: 00:14.2: enabled 1
962 11:20:47.307511 PCI: 00:14.3: enabled 1
963 11:20:47.310187 PCI: 00:15.0: enabled 1
964 11:20:47.313607 PCI: 00:15.1: enabled 1
965 11:20:47.317316 PCI: 00:15.2: enabled 0
966 11:20:47.317371 PCI: 00:15.3: enabled 1
967 11:20:47.320156 PCI: 00:16.0: enabled 1
968 11:20:47.323769 PCI: 00:16.1: enabled 0
969 11:20:47.323824 PCI: 00:16.2: enabled 0
970 11:20:47.326949 PCI: 00:16.3: enabled 0
971 11:20:47.330091 PCI: 00:16.4: enabled 0
972 11:20:47.333458 PCI: 00:16.5: enabled 0
973 11:20:47.333512 PCI: 00:17.0: enabled 1
974 11:20:47.336861 PCI: 00:19.0: enabled 0
975 11:20:47.340557 PCI: 00:19.1: enabled 1
976 11:20:47.343406 PCI: 00:19.2: enabled 0
977 11:20:47.343464 PCI: 00:1a.0: enabled 0
978 11:20:47.346863 PCI: 00:1c.0: enabled 0
979 11:20:47.350274 PCI: 00:1c.1: enabled 0
980 11:20:47.353582 PCI: 00:1c.2: enabled 0
981 11:20:47.353661 PCI: 00:1c.3: enabled 0
982 11:20:47.357082 PCI: 00:1c.4: enabled 0
983 11:20:47.360415 PCI: 00:1c.5: enabled 0
984 11:20:47.360478 PCI: 00:1c.6: enabled 0
985 11:20:47.363537 PCI: 00:1c.7: enabled 0
986 11:20:47.366705 PCI: 00:1d.0: enabled 0
987 11:20:47.370123 PCI: 00:1d.1: enabled 0
988 11:20:47.370186 PCI: 00:1d.2: enabled 0
989 11:20:47.373345 PCI: 00:1d.3: enabled 0
990 11:20:47.377005 PCI: 00:1e.0: enabled 1
991 11:20:47.379922 PCI: 00:1e.1: enabled 0
992 11:20:47.379994 PCI: 00:1e.2: enabled 0
993 11:20:47.383674 PCI: 00:1e.3: enabled 1
994 11:20:47.387347 PCI: 00:1f.0: enabled 1
995 11:20:47.390200 PCI: 00:1f.1: enabled 0
996 11:20:47.390275 PCI: 00:1f.2: enabled 1
997 11:20:47.393557 PCI: 00:1f.3: enabled 1
998 11:20:47.396887 PCI: 00:1f.4: enabled 0
999 11:20:47.396967 PCI: 00:1f.5: enabled 1
1000 11:20:47.399949 PCI: 00:1f.6: enabled 0
1001 11:20:47.403681 PCI: 00:1f.7: enabled 0
1002 11:20:47.406953 GENERIC: 0.0: enabled 1
1003 11:20:47.407031 GENERIC: 0.0: enabled 1
1004 11:20:47.410040 GENERIC: 1.0: enabled 1
1005 11:20:47.413751 GENERIC: 0.0: enabled 1
1006 11:20:47.416542 GENERIC: 1.0: enabled 1
1007 11:20:47.416609 USB0 port 0: enabled 1
1008 11:20:47.420096 USB0 port 0: enabled 1
1009 11:20:47.423237 GENERIC: 0.0: enabled 1
1010 11:20:47.423313 I2C: 00:1a: enabled 1
1011 11:20:47.426608 I2C: 00:31: enabled 1
1012 11:20:47.430065 I2C: 00:32: enabled 1
1013 11:20:47.430173 I2C: 00:50: enabled 1
1014 11:20:47.433490 I2C: 00:10: enabled 1
1015 11:20:47.436957 I2C: 00:15: enabled 1
1016 11:20:47.437040 I2C: 00:2c: enabled 1
1017 11:20:47.440128 GENERIC: 0.0: enabled 1
1018 11:20:47.443603 SPI: 00: enabled 1
1019 11:20:47.446536 PNP: 0c09.0: enabled 1
1020 11:20:47.446659 GENERIC: 0.0: enabled 1
1021 11:20:47.450019 USB3 port 0: enabled 1
1022 11:20:47.453284 USB3 port 1: enabled 0
1023 11:20:47.453382 USB3 port 2: enabled 1
1024 11:20:47.456488 USB3 port 3: enabled 0
1025 11:20:47.460397 USB2 port 0: enabled 1
1026 11:20:47.460497 USB2 port 1: enabled 0
1027 11:20:47.463268 USB2 port 2: enabled 1
1028 11:20:47.466598 USB2 port 3: enabled 0
1029 11:20:47.470062 USB2 port 4: enabled 0
1030 11:20:47.470169 USB2 port 5: enabled 1
1031 11:20:47.473205 USB2 port 6: enabled 0
1032 11:20:47.476744 USB2 port 7: enabled 0
1033 11:20:47.476824 USB2 port 8: enabled 1
1034 11:20:47.480507 USB2 port 9: enabled 1
1035 11:20:47.482989 USB3 port 0: enabled 1
1036 11:20:47.486916 USB3 port 1: enabled 0
1037 11:20:47.487029 USB3 port 2: enabled 0
1038 11:20:47.490324 USB3 port 3: enabled 0
1039 11:20:47.493384 GENERIC: 0.0: enabled 1
1040 11:20:47.493467 GENERIC: 1.0: enabled 1
1041 11:20:47.496622 APIC: 00: enabled 1
1042 11:20:47.500069 APIC: 16: enabled 1
1043 11:20:47.500153 APIC: 10: enabled 1
1044 11:20:47.503230 APIC: 12: enabled 1
1045 11:20:47.506532 APIC: 14: enabled 1
1046 11:20:47.506615 APIC: 01: enabled 1
1047 11:20:47.509768 APIC: 09: enabled 1
1048 11:20:47.509852 APIC: 08: enabled 1
1049 11:20:47.513244 Compare with tree...
1050 11:20:47.516555 Root Device: enabled 1
1051 11:20:47.519873 CPU_CLUSTER: 0: enabled 1
1052 11:20:47.519951 APIC: 00: enabled 1
1053 11:20:47.523054 APIC: 16: enabled 1
1054 11:20:47.526879 APIC: 10: enabled 1
1055 11:20:47.526958 APIC: 12: enabled 1
1056 11:20:47.529637 APIC: 14: enabled 1
1057 11:20:47.532898 APIC: 01: enabled 1
1058 11:20:47.532980 APIC: 09: enabled 1
1059 11:20:47.536467 APIC: 08: enabled 1
1060 11:20:47.539892 DOMAIN: 0000: enabled 1
1061 11:20:47.539970 GPIO: 0: enabled 1
1062 11:20:47.543182 PCI: 00:00.0: enabled 1
1063 11:20:47.546702 PCI: 00:01.0: enabled 0
1064 11:20:47.549968 PCI: 00:01.1: enabled 0
1065 11:20:47.550037 PCI: 00:02.0: enabled 1
1066 11:20:47.553219 PCI: 00:04.0: enabled 1
1067 11:20:47.556556 GENERIC: 0.0: enabled 1
1068 11:20:47.560419 PCI: 00:05.0: enabled 0
1069 11:20:47.563295 PCI: 00:06.0: enabled 1
1070 11:20:47.563376 PCI: 00:06.2: enabled 0
1071 11:20:47.566598 PCI: 00:08.0: enabled 0
1072 11:20:47.570047 PCI: 00:09.0: enabled 0
1073 11:20:47.572977 PCI: 00:0a.0: enabled 1
1074 11:20:47.576484 PCI: 00:0d.0: enabled 1
1075 11:20:47.576563 USB0 port 0: enabled 1
1076 11:20:47.580159 USB3 port 0: enabled 1
1077 11:20:47.583480 USB3 port 1: enabled 0
1078 11:20:47.586370 USB3 port 2: enabled 1
1079 11:20:47.589618 USB3 port 3: enabled 0
1080 11:20:47.593449 PCI: 00:0d.1: enabled 0
1081 11:20:47.593521 PCI: 00:0d.2: enabled 0
1082 11:20:47.596397 PCI: 00:0d.3: enabled 0
1083 11:20:47.599637 PCI: 00:0e.0: enabled 0
1084 11:20:47.603141 PCI: 00:10.0: enabled 0
1085 11:20:47.606502 PCI: 00:10.1: enabled 0
1086 11:20:47.606580 PCI: 00:10.6: enabled 0
1087 11:20:47.609551 PCI: 00:10.7: enabled 0
1088 11:20:47.612866 PCI: 00:12.0: enabled 0
1089 11:20:47.616219 PCI: 00:12.6: enabled 0
1090 11:20:47.616298 PCI: 00:12.7: enabled 0
1091 11:20:47.620009 PCI: 00:13.0: enabled 0
1092 11:20:47.623051 PCI: 00:14.0: enabled 1
1093 11:20:47.626247 USB0 port 0: enabled 1
1094 11:20:47.629882 USB2 port 0: enabled 1
1095 11:20:47.633148 USB2 port 1: enabled 0
1096 11:20:47.633235 USB2 port 2: enabled 1
1097 11:20:47.635961 USB2 port 3: enabled 0
1098 11:20:47.639396 USB2 port 4: enabled 0
1099 11:20:47.642746 USB2 port 5: enabled 1
1100 11:20:47.646458 USB2 port 6: enabled 0
1101 11:20:47.646537 USB2 port 7: enabled 0
1102 11:20:47.649685 USB2 port 8: enabled 1
1103 11:20:47.652767 USB2 port 9: enabled 1
1104 11:20:47.656521 USB3 port 0: enabled 1
1105 11:20:47.659768 USB3 port 1: enabled 0
1106 11:20:47.662614 USB3 port 2: enabled 0
1107 11:20:47.662672 USB3 port 3: enabled 0
1108 11:20:47.666231 PCI: 00:14.1: enabled 0
1109 11:20:47.669422 PCI: 00:14.2: enabled 1
1110 11:20:47.672822 PCI: 00:14.3: enabled 1
1111 11:20:47.676264 GENERIC: 0.0: enabled 1
1112 11:20:47.676327 PCI: 00:15.0: enabled 1
1113 11:20:47.679165 I2C: 00:1a: enabled 1
1114 11:20:47.682583 I2C: 00:31: enabled 1
1115 11:20:47.685969 I2C: 00:32: enabled 1
1116 11:20:47.686029 PCI: 00:15.1: enabled 1
1117 11:20:47.689416 I2C: 00:50: enabled 1
1118 11:20:47.692468 PCI: 00:15.2: enabled 0
1119 11:20:47.695998 PCI: 00:15.3: enabled 1
1120 11:20:47.699359 I2C: 00:10: enabled 1
1121 11:20:47.699416 PCI: 00:16.0: enabled 1
1122 11:20:47.702677 PCI: 00:16.1: enabled 0
1123 11:20:47.705791 PCI: 00:16.2: enabled 0
1124 11:20:47.709473 PCI: 00:16.3: enabled 0
1125 11:20:47.712744 PCI: 00:16.4: enabled 0
1126 11:20:47.712801 PCI: 00:16.5: enabled 0
1127 11:20:47.716051 PCI: 00:17.0: enabled 1
1128 11:20:47.719133 PCI: 00:19.0: enabled 0
1129 11:20:47.722379 PCI: 00:19.1: enabled 1
1130 11:20:47.722443 I2C: 00:15: enabled 1
1131 11:20:47.726166 I2C: 00:2c: enabled 1
1132 11:20:47.729097 PCI: 00:19.2: enabled 0
1133 11:20:47.732464 PCI: 00:1a.0: enabled 0
1134 11:20:47.736207 PCI: 00:1e.0: enabled 1
1135 11:20:47.736283 PCI: 00:1e.1: enabled 0
1136 11:20:47.739281 PCI: 00:1e.2: enabled 0
1137 11:20:47.742591 PCI: 00:1e.3: enabled 1
1138 11:20:47.746048 SPI: 00: enabled 1
1139 11:20:47.746116 PCI: 00:1f.0: enabled 1
1140 11:20:47.749354 PNP: 0c09.0: enabled 1
1141 11:20:47.752485 PCI: 00:1f.1: enabled 0
1142 11:20:47.756015 PCI: 00:1f.2: enabled 1
1143 11:20:47.759099 GENERIC: 0.0: enabled 1
1144 11:20:47.762950 GENERIC: 0.0: enabled 1
1145 11:20:47.763010 GENERIC: 1.0: enabled 1
1146 11:20:47.765747 PCI: 00:1f.3: enabled 1
1147 11:20:47.769507 PCI: 00:1f.4: enabled 0
1148 11:20:47.772412 PCI: 00:1f.5: enabled 1
1149 11:20:47.775755 PCI: 00:1f.6: enabled 0
1150 11:20:47.775813 PCI: 00:1f.7: enabled 0
1151 11:20:47.779112 Root Device scanning...
1152 11:20:47.782372 scan_static_bus for Root Device
1153 11:20:47.785608 CPU_CLUSTER: 0 enabled
1154 11:20:47.785697 DOMAIN: 0000 enabled
1155 11:20:47.788985 DOMAIN: 0000 scanning...
1156 11:20:47.792549 PCI: pci_scan_bus for bus 00
1157 11:20:47.795541 PCI: 00:00.0 [8086/0000] ops
1158 11:20:47.799218 PCI: 00:00.0 [8086/4609] enabled
1159 11:20:47.802445 PCI: 00:02.0 [8086/0000] bus ops
1160 11:20:47.805901 PCI: 00:02.0 [8086/46b3] enabled
1161 11:20:47.809042 PCI: 00:04.0 [8086/0000] bus ops
1162 11:20:47.812674 PCI: 00:04.0 [8086/461d] enabled
1163 11:20:47.815890 PCI: 00:06.0 [8086/0000] bus ops
1164 11:20:47.819366 PCI: 00:06.0 [8086/464d] enabled
1165 11:20:47.822502 PCI: 00:08.0 [8086/464f] disabled
1166 11:20:47.825729 PCI: 00:0a.0 [8086/467d] enabled
1167 11:20:47.829018 PCI: 00:0d.0 [8086/0000] bus ops
1168 11:20:47.832497 PCI: 00:0d.0 [8086/461e] enabled
1169 11:20:47.836137 PCI: 00:14.0 [8086/0000] bus ops
1170 11:20:47.839343 PCI: 00:14.0 [8086/51ed] enabled
1171 11:20:47.842363 PCI: 00:14.2 [8086/51ef] enabled
1172 11:20:47.845739 PCI: 00:14.3 [8086/0000] bus ops
1173 11:20:47.849233 PCI: 00:14.3 [8086/51f0] enabled
1174 11:20:47.852654 PCI: 00:15.0 [8086/0000] bus ops
1175 11:20:47.856141 PCI: 00:15.0 [8086/51e8] enabled
1176 11:20:47.859151 PCI: 00:15.1 [8086/0000] bus ops
1177 11:20:47.862530 PCI: 00:15.1 [8086/51e9] enabled
1178 11:20:47.865844 PCI: 00:15.2 [8086/0000] bus ops
1179 11:20:47.869421 PCI: 00:15.2 [8086/51ea] disabled
1180 11:20:47.872593 PCI: 00:15.3 [8086/0000] bus ops
1181 11:20:47.876001 PCI: 00:15.3 [8086/51eb] enabled
1182 11:20:47.879203 PCI: 00:16.0 [8086/0000] ops
1183 11:20:47.883160 PCI: 00:16.0 [8086/51e0] enabled
1184 11:20:47.889292 PCI: Static device PCI: 00:17.0 not found, disabling it.
1185 11:20:47.892670 PCI: 00:19.0 [8086/0000] bus ops
1186 11:20:47.896170 PCI: 00:19.0 [8086/51c5] disabled
1187 11:20:47.899627 PCI: 00:19.1 [8086/0000] bus ops
1188 11:20:47.902780 PCI: 00:19.1 [8086/51c6] enabled
1189 11:20:47.906128 PCI: 00:1e.0 [8086/0000] ops
1190 11:20:47.909300 PCI: 00:1e.0 [8086/51a8] enabled
1191 11:20:47.912851 PCI: 00:1e.3 [8086/0000] bus ops
1192 11:20:47.916209 PCI: 00:1e.3 [8086/51ab] enabled
1193 11:20:47.919541 PCI: 00:1f.0 [8086/0000] bus ops
1194 11:20:47.923151 PCI: 00:1f.0 [8086/5182] enabled
1195 11:20:47.923229 RTC Init
1196 11:20:47.929223 Set power on after power failure.
1197 11:20:47.929300 Disabling Deep S3
1198 11:20:47.932457 Disabling Deep S3
1199 11:20:47.932533 Disabling Deep S4
1200 11:20:47.936274 Disabling Deep S4
1201 11:20:47.936361 Disabling Deep S5
1202 11:20:47.939072 Disabling Deep S5
1203 11:20:47.942458 PCI: 00:1f.2 [0000/0000] hidden
1204 11:20:47.945672 PCI: 00:1f.3 [8086/0000] bus ops
1205 11:20:47.949127 PCI: 00:1f.3 [8086/51c8] enabled
1206 11:20:47.952319 PCI: 00:1f.5 [8086/0000] bus ops
1207 11:20:47.955875 PCI: 00:1f.5 [8086/51a4] enabled
1208 11:20:47.955951 GPIO: 0 enabled
1209 11:20:47.959169 PCI: Leftover static devices:
1210 11:20:47.962448 PCI: 00:01.0
1211 11:20:47.962524 PCI: 00:01.1
1212 11:20:47.965796 PCI: 00:05.0
1213 11:20:47.965873 PCI: 00:06.2
1214 11:20:47.965928 PCI: 00:09.0
1215 11:20:47.968864 PCI: 00:0d.1
1216 11:20:47.968940 PCI: 00:0d.2
1217 11:20:47.972427 PCI: 00:0d.3
1218 11:20:47.972503 PCI: 00:0e.0
1219 11:20:47.972557 PCI: 00:10.0
1220 11:20:47.975915 PCI: 00:10.1
1221 11:20:47.975991 PCI: 00:10.6
1222 11:20:47.979279 PCI: 00:10.7
1223 11:20:47.979355 PCI: 00:12.0
1224 11:20:47.983122 PCI: 00:12.6
1225 11:20:47.983198 PCI: 00:12.7
1226 11:20:47.983251 PCI: 00:13.0
1227 11:20:47.985689 PCI: 00:14.1
1228 11:20:47.985766 PCI: 00:16.1
1229 11:20:47.989058 PCI: 00:16.2
1230 11:20:47.989136 PCI: 00:16.3
1231 11:20:47.989208 PCI: 00:16.4
1232 11:20:47.992605 PCI: 00:16.5
1233 11:20:47.992682 PCI: 00:17.0
1234 11:20:47.995635 PCI: 00:19.2
1235 11:20:47.995712 PCI: 00:1a.0
1236 11:20:47.995784 PCI: 00:1e.1
1237 11:20:47.999608 PCI: 00:1e.2
1238 11:20:47.999686 PCI: 00:1f.1
1239 11:20:48.002192 PCI: 00:1f.4
1240 11:20:48.002268 PCI: 00:1f.6
1241 11:20:48.005501 PCI: 00:1f.7
1242 11:20:48.005578 PCI: Check your devicetree.cb.
1243 11:20:48.009158 PCI: 00:02.0 scanning...
1244 11:20:48.012311 scan_generic_bus for PCI: 00:02.0
1245 11:20:48.015572 scan_generic_bus for PCI: 00:02.0 done
1246 11:20:48.022204 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1247 11:20:48.025669 PCI: 00:04.0 scanning...
1248 11:20:48.029410 scan_generic_bus for PCI: 00:04.0
1249 11:20:48.029481 GENERIC: 0.0 enabled
1250 11:20:48.035759 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1251 11:20:48.042183 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1252 11:20:48.042256 PCI: 00:06.0 scanning...
1253 11:20:48.045420 do_pci_scan_bridge for PCI: 00:06.0
1254 11:20:48.049292 PCI: pci_scan_bus for bus 01
1255 11:20:48.052016 PCI: 01:00.0 [15b7/5009] enabled
1256 11:20:48.055677 Enabling Common Clock Configuration
1257 11:20:48.062166 L1 Sub-State supported from root port 6
1258 11:20:48.062227 L1 Sub-State Support = 0x5
1259 11:20:48.065560 CommonModeRestoreTime = 0x6e
1260 11:20:48.072486 Power On Value = 0x5, Power On Scale = 0x2
1261 11:20:48.072540 ASPM: Enabled L1
1262 11:20:48.075956 PCIe: Max_Payload_Size adjusted to 256
1263 11:20:48.078892 PCI: 01:00.0: Enabled LTR
1264 11:20:48.082053 PCI: 01:00.0: Programmed LTR max latencies
1265 11:20:48.089384 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1266 11:20:48.092644 PCI: 00:0d.0 scanning...
1267 11:20:48.095471 scan_static_bus for PCI: 00:0d.0
1268 11:20:48.095524 USB0 port 0 enabled
1269 11:20:48.098836 USB0 port 0 scanning...
1270 11:20:48.102051 scan_static_bus for USB0 port 0
1271 11:20:48.105307 USB3 port 0 enabled
1272 11:20:48.105360 USB3 port 1 disabled
1273 11:20:48.108596 USB3 port 2 enabled
1274 11:20:48.108651 USB3 port 3 disabled
1275 11:20:48.112019 USB3 port 0 scanning...
1276 11:20:48.115590 scan_static_bus for USB3 port 0
1277 11:20:48.118797 scan_static_bus for USB3 port 0 done
1278 11:20:48.125174 scan_bus: bus USB3 port 0 finished in 6 msecs
1279 11:20:48.125239 USB3 port 2 scanning...
1280 11:20:48.128774 scan_static_bus for USB3 port 2
1281 11:20:48.135340 scan_static_bus for USB3 port 2 done
1282 11:20:48.139050 scan_bus: bus USB3 port 2 finished in 6 msecs
1283 11:20:48.142377 scan_static_bus for USB0 port 0 done
1284 11:20:48.145317 scan_bus: bus USB0 port 0 finished in 43 msecs
1285 11:20:48.152011 scan_static_bus for PCI: 00:0d.0 done
1286 11:20:48.155348 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1287 11:20:48.158595 PCI: 00:14.0 scanning...
1288 11:20:48.161795 scan_static_bus for PCI: 00:14.0
1289 11:20:48.161867 USB0 port 0 enabled
1290 11:20:48.165654 USB0 port 0 scanning...
1291 11:20:48.168569 scan_static_bus for USB0 port 0
1292 11:20:48.172127 USB2 port 0 enabled
1293 11:20:48.172184 USB2 port 1 disabled
1294 11:20:48.175597 USB2 port 2 enabled
1295 11:20:48.178808 USB2 port 3 disabled
1296 11:20:48.178863 USB2 port 4 disabled
1297 11:20:48.181803 USB2 port 5 enabled
1298 11:20:48.181860 USB2 port 6 disabled
1299 11:20:48.185459 USB2 port 7 disabled
1300 11:20:48.188653 USB2 port 8 enabled
1301 11:20:48.188708 USB2 port 9 enabled
1302 11:20:48.192510 USB3 port 0 enabled
1303 11:20:48.195639 USB3 port 1 disabled
1304 11:20:48.195692 USB3 port 2 disabled
1305 11:20:48.198703 USB3 port 3 disabled
1306 11:20:48.201974 USB2 port 0 scanning...
1307 11:20:48.205081 scan_static_bus for USB2 port 0
1308 11:20:48.208632 scan_static_bus for USB2 port 0 done
1309 11:20:48.211791 scan_bus: bus USB2 port 0 finished in 6 msecs
1310 11:20:48.215274 USB2 port 2 scanning...
1311 11:20:48.218349 scan_static_bus for USB2 port 2
1312 11:20:48.222142 scan_static_bus for USB2 port 2 done
1313 11:20:48.225236 scan_bus: bus USB2 port 2 finished in 6 msecs
1314 11:20:48.228683 USB2 port 5 scanning...
1315 11:20:48.231673 scan_static_bus for USB2 port 5
1316 11:20:48.235018 scan_static_bus for USB2 port 5 done
1317 11:20:48.241651 scan_bus: bus USB2 port 5 finished in 6 msecs
1318 11:20:48.241725 USB2 port 8 scanning...
1319 11:20:48.244919 scan_static_bus for USB2 port 8
1320 11:20:48.248191 scan_static_bus for USB2 port 8 done
1321 11:20:48.255239 scan_bus: bus USB2 port 8 finished in 6 msecs
1322 11:20:48.255306 USB2 port 9 scanning...
1323 11:20:48.258379 scan_static_bus for USB2 port 9
1324 11:20:48.265175 scan_static_bus for USB2 port 9 done
1325 11:20:48.268720 scan_bus: bus USB2 port 9 finished in 6 msecs
1326 11:20:48.271657 USB3 port 0 scanning...
1327 11:20:48.275413 scan_static_bus for USB3 port 0
1328 11:20:48.278286 scan_static_bus for USB3 port 0 done
1329 11:20:48.282065 scan_bus: bus USB3 port 0 finished in 6 msecs
1330 11:20:48.285030 scan_static_bus for USB0 port 0 done
1331 11:20:48.291812 scan_bus: bus USB0 port 0 finished in 120 msecs
1332 11:20:48.295930 scan_static_bus for PCI: 00:14.0 done
1333 11:20:48.298622 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1334 11:20:48.302098 PCI: 00:14.3 scanning...
1335 11:20:48.305366 scan_static_bus for PCI: 00:14.3
1336 11:20:48.308507 GENERIC: 0.0 enabled
1337 11:20:48.311844 scan_static_bus for PCI: 00:14.3 done
1338 11:20:48.315005 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1339 11:20:48.318885 PCI: 00:15.0 scanning...
1340 11:20:48.322327 scan_static_bus for PCI: 00:15.0
1341 11:20:48.325376 I2C: 00:1a enabled
1342 11:20:48.325444 I2C: 00:31 enabled
1343 11:20:48.328276 I2C: 00:32 enabled
1344 11:20:48.332057 scan_static_bus for PCI: 00:15.0 done
1345 11:20:48.335604 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1346 11:20:48.339005 PCI: 00:15.1 scanning...
1347 11:20:48.341930 scan_static_bus for PCI: 00:15.1
1348 11:20:48.345007 I2C: 00:50 enabled
1349 11:20:48.348945 scan_static_bus for PCI: 00:15.1 done
1350 11:20:48.351963 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1351 11:20:48.355028 PCI: 00:15.3 scanning...
1352 11:20:48.358236 scan_static_bus for PCI: 00:15.3
1353 11:20:48.362629 I2C: 00:10 enabled
1354 11:20:48.365401 scan_static_bus for PCI: 00:15.3 done
1355 11:20:48.368466 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1356 11:20:48.371787 PCI: 00:19.1 scanning...
1357 11:20:48.375234 scan_static_bus for PCI: 00:19.1
1358 11:20:48.375338 I2C: 00:15 enabled
1359 11:20:48.378486 I2C: 00:2c enabled
1360 11:20:48.381619 scan_static_bus for PCI: 00:19.1 done
1361 11:20:48.388276 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1362 11:20:48.388374 PCI: 00:1e.3 scanning...
1363 11:20:48.391657 scan_generic_bus for PCI: 00:1e.3
1364 11:20:48.395231 SPI: 00 enabled
1365 11:20:48.401567 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1366 11:20:48.405012 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1367 11:20:48.408234 PCI: 00:1f.0 scanning...
1368 11:20:48.411877 scan_static_bus for PCI: 00:1f.0
1369 11:20:48.414937 PNP: 0c09.0 enabled
1370 11:20:48.415024 PNP: 0c09.0 scanning...
1371 11:20:48.418313 scan_static_bus for PNP: 0c09.0
1372 11:20:48.421636 scan_static_bus for PNP: 0c09.0 done
1373 11:20:48.428341 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1374 11:20:48.431571 scan_static_bus for PCI: 00:1f.0 done
1375 11:20:48.435006 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1376 11:20:48.438462 PCI: 00:1f.2 scanning...
1377 11:20:48.441522 scan_static_bus for PCI: 00:1f.2
1378 11:20:48.444959 GENERIC: 0.0 enabled
1379 11:20:48.445037 GENERIC: 0.0 scanning...
1380 11:20:48.448389 scan_static_bus for GENERIC: 0.0
1381 11:20:48.451630 GENERIC: 0.0 enabled
1382 11:20:48.455055 GENERIC: 1.0 enabled
1383 11:20:48.458416 scan_static_bus for GENERIC: 0.0 done
1384 11:20:48.462029 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1385 11:20:48.464750 scan_static_bus for PCI: 00:1f.2 done
1386 11:20:48.471576 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1387 11:20:48.474769 PCI: 00:1f.3 scanning...
1388 11:20:48.477882 scan_static_bus for PCI: 00:1f.3
1389 11:20:48.481820 scan_static_bus for PCI: 00:1f.3 done
1390 11:20:48.484747 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1391 11:20:48.488149 PCI: 00:1f.5 scanning...
1392 11:20:48.491514 scan_generic_bus for PCI: 00:1f.5
1393 11:20:48.494626 scan_generic_bus for PCI: 00:1f.5 done
1394 11:20:48.501208 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1395 11:20:48.504965 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1396 11:20:48.507936 scan_static_bus for Root Device done
1397 11:20:48.514793 scan_bus: bus Root Device finished in 729 msecs
1398 11:20:48.514890 done
1399 11:20:48.521829 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1400 11:20:48.524749 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1401 11:20:48.531374 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1402 11:20:48.534892 SPI flash protection: WPSW=1 SRP0=0
1403 11:20:48.541379 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1404 11:20:48.547979 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1405 11:20:48.548078 found VGA at PCI: 00:02.0
1406 11:20:48.551658 Setting up VGA for PCI: 00:02.0
1407 11:20:48.557999 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1408 11:20:48.561541 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1409 11:20:48.564331 Allocating resources...
1410 11:20:48.567934 Reading resources...
1411 11:20:48.571591 Root Device read_resources bus 0 link: 0
1412 11:20:48.574729 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1413 11:20:48.581257 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1414 11:20:48.584449 DOMAIN: 0000 read_resources bus 0 link: 0
1415 11:20:48.591372 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1416 11:20:48.597749 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1417 11:20:48.604364 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1418 11:20:48.608194 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1419 11:20:48.614280 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1420 11:20:48.621373 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1421 11:20:48.628121 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1422 11:20:48.634201 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1423 11:20:48.640882 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1424 11:20:48.647559 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1425 11:20:48.654742 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1426 11:20:48.661191 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1427 11:20:48.667401 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1428 11:20:48.674369 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1429 11:20:48.680647 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1430 11:20:48.684118 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1431 11:20:48.690935 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1432 11:20:48.697234 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1433 11:20:48.703870 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1434 11:20:48.710479 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1435 11:20:48.716902 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1436 11:20:48.720665 PCI: 00:04.0 read_resources bus 1 link: 0
1437 11:20:48.726937 PCI: 00:04.0 read_resources bus 1 link: 0 done
1438 11:20:48.730338 PCI: 00:06.0 read_resources bus 1 link: 0
1439 11:20:48.733573 PCI: 00:06.0 read_resources bus 1 link: 0 done
1440 11:20:48.740396 PCI: 00:0d.0 read_resources bus 0 link: 0
1441 11:20:48.743701 USB0 port 0 read_resources bus 0 link: 0
1442 11:20:48.747057 USB0 port 0 read_resources bus 0 link: 0 done
1443 11:20:48.754145 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1444 11:20:48.757351 PCI: 00:14.0 read_resources bus 0 link: 0
1445 11:20:48.760322 USB0 port 0 read_resources bus 0 link: 0
1446 11:20:48.767281 USB0 port 0 read_resources bus 0 link: 0 done
1447 11:20:48.770607 PCI: 00:14.0 read_resources bus 0 link: 0 done
1448 11:20:48.773840 PCI: 00:14.3 read_resources bus 0 link: 0
1449 11:20:48.780368 PCI: 00:14.3 read_resources bus 0 link: 0 done
1450 11:20:48.783471 PCI: 00:15.0 read_resources bus 0 link: 0
1451 11:20:48.787387 PCI: 00:15.0 read_resources bus 0 link: 0 done
1452 11:20:48.794070 PCI: 00:15.1 read_resources bus 0 link: 0
1453 11:20:48.797018 PCI: 00:15.1 read_resources bus 0 link: 0 done
1454 11:20:48.800432 PCI: 00:15.3 read_resources bus 0 link: 0
1455 11:20:48.806956 PCI: 00:15.3 read_resources bus 0 link: 0 done
1456 11:20:48.810597 PCI: 00:19.1 read_resources bus 0 link: 0
1457 11:20:48.817211 PCI: 00:19.1 read_resources bus 0 link: 0 done
1458 11:20:48.820198 PCI: 00:1e.3 read_resources bus 2 link: 0
1459 11:20:48.823672 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1460 11:20:48.830074 PCI: 00:1f.0 read_resources bus 0 link: 0
1461 11:20:48.833733 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1462 11:20:48.836881 PCI: 00:1f.2 read_resources bus 0 link: 0
1463 11:20:48.843784 GENERIC: 0.0 read_resources bus 0 link: 0
1464 11:20:48.846871 GENERIC: 0.0 read_resources bus 0 link: 0 done
1465 11:20:48.850166 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1466 11:20:48.857054 DOMAIN: 0000 read_resources bus 0 link: 0 done
1467 11:20:48.860401 Root Device read_resources bus 0 link: 0 done
1468 11:20:48.863618 Done reading resources.
1469 11:20:48.870447 Show resources in subtree (Root Device)...After reading.
1470 11:20:48.873748 Root Device child on link 0 CPU_CLUSTER: 0
1471 11:20:48.876957 CPU_CLUSTER: 0 child on link 0 APIC: 00
1472 11:20:48.880402 APIC: 00
1473 11:20:48.880474 APIC: 16
1474 11:20:48.880536 APIC: 10
1475 11:20:48.883734 APIC: 12
1476 11:20:48.883839 APIC: 14
1477 11:20:48.886906 APIC: 01
1478 11:20:48.886973 APIC: 09
1479 11:20:48.887031 APIC: 08
1480 11:20:48.890049 DOMAIN: 0000 child on link 0 GPIO: 0
1481 11:20:48.900098 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1482 11:20:48.910006 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1483 11:20:48.913252 GPIO: 0
1484 11:20:48.913329 PCI: 00:00.0
1485 11:20:48.923654 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1486 11:20:48.933511 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1487 11:20:48.943404 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1488 11:20:48.950237 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1489 11:20:48.960156 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1490 11:20:48.970215 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1491 11:20:48.980344 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1492 11:20:48.990533 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1493 11:20:49.000453 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1494 11:20:49.006689 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1495 11:20:49.016401 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1496 11:20:49.026576 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1497 11:20:49.036362 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1498 11:20:49.046383 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1499 11:20:49.056666 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1500 11:20:49.063219 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1501 11:20:49.073273 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1502 11:20:49.083839 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1503 11:20:49.093029 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1504 11:20:49.103162 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1505 11:20:49.113445 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1506 11:20:49.123266 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1507 11:20:49.129679 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1508 11:20:49.140202 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1509 11:20:49.150048 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1510 11:20:49.159735 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1511 11:20:49.169747 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1512 11:20:49.179481 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1513 11:20:49.179542 PCI: 00:02.0
1514 11:20:49.192830 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1515 11:20:49.202911 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1516 11:20:49.209458 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1517 11:20:49.216070 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1518 11:20:49.226657 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1519 11:20:49.226714 GENERIC: 0.0
1520 11:20:49.229463 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1521 11:20:49.239380 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1522 11:20:49.249266 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1523 11:20:49.259404 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1524 11:20:49.259490 PCI: 01:00.0
1525 11:20:49.269441 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1526 11:20:49.279285 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1527 11:20:49.282745 PCI: 00:08.0
1528 11:20:49.282819 PCI: 00:0a.0
1529 11:20:49.292887 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1530 11:20:49.299021 PCI: 00:0d.0 child on link 0 USB0 port 0
1531 11:20:49.309083 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1532 11:20:49.312371 USB0 port 0 child on link 0 USB3 port 0
1533 11:20:49.312430 USB3 port 0
1534 11:20:49.315923 USB3 port 1
1535 11:20:49.315979 USB3 port 2
1536 11:20:49.319087 USB3 port 3
1537 11:20:49.322598 PCI: 00:14.0 child on link 0 USB0 port 0
1538 11:20:49.332646 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1539 11:20:49.339281 USB0 port 0 child on link 0 USB2 port 0
1540 11:20:49.339356 USB2 port 0
1541 11:20:49.342555 USB2 port 1
1542 11:20:49.342631 USB2 port 2
1543 11:20:49.346021 USB2 port 3
1544 11:20:49.346096 USB2 port 4
1545 11:20:49.349040 USB2 port 5
1546 11:20:49.349125 USB2 port 6
1547 11:20:49.352675 USB2 port 7
1548 11:20:49.352750 USB2 port 8
1549 11:20:49.355950 USB2 port 9
1550 11:20:49.359705 USB3 port 0
1551 11:20:49.359781 USB3 port 1
1552 11:20:49.362607 USB3 port 2
1553 11:20:49.362682 USB3 port 3
1554 11:20:49.366083 PCI: 00:14.2
1555 11:20:49.375708 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1556 11:20:49.385746 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1557 11:20:49.389050 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1558 11:20:49.399343 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1559 11:20:49.399418 GENERIC: 0.0
1560 11:20:49.405796 PCI: 00:15.0 child on link 0 I2C: 00:1a
1561 11:20:49.415956 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1562 11:20:49.416031 I2C: 00:1a
1563 11:20:49.419179 I2C: 00:31
1564 11:20:49.419260 I2C: 00:32
1565 11:20:49.422826 PCI: 00:15.1 child on link 0 I2C: 00:50
1566 11:20:49.432504 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1567 11:20:49.435705 I2C: 00:50
1568 11:20:49.435780 PCI: 00:15.2
1569 11:20:49.442324 PCI: 00:15.3 child on link 0 I2C: 00:10
1570 11:20:49.452262 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1571 11:20:49.452345 I2C: 00:10
1572 11:20:49.455669 PCI: 00:16.0
1573 11:20:49.465686 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1574 11:20:49.465762 PCI: 00:19.0
1575 11:20:49.468777 PCI: 00:19.1 child on link 0 I2C: 00:15
1576 11:20:49.478964 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1577 11:20:49.482325 I2C: 00:15
1578 11:20:49.482406 I2C: 00:2c
1579 11:20:49.485235 PCI: 00:1e.0
1580 11:20:49.495605 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1581 11:20:49.498720 PCI: 00:1e.3 child on link 0 SPI: 00
1582 11:20:49.508637 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1583 11:20:49.512249 SPI: 00
1584 11:20:49.515573 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1585 11:20:49.525618 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1586 11:20:49.525838 PNP: 0c09.0
1587 11:20:49.535321 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1588 11:20:49.538576 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1589 11:20:49.548557 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1590 11:20:49.558522 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1591 11:20:49.562162 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1592 11:20:49.565253 GENERIC: 0.0
1593 11:20:49.565314 GENERIC: 1.0
1594 11:20:49.568841 PCI: 00:1f.3
1595 11:20:49.578557 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1596 11:20:49.588457 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1597 11:20:49.588538 PCI: 00:1f.5
1598 11:20:49.598715 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1599 11:20:49.605448 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1600 11:20:49.611859 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1601 11:20:49.618217 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1602 11:20:49.625350 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1603 11:20:49.628522 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1604 11:20:49.631921 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1605 11:20:49.638437 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1606 11:20:49.648864 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1607 11:20:49.654999 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1608 11:20:49.661440 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1609 11:20:49.668186 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1610 11:20:49.675074 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1611 11:20:49.684796 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1612 11:20:49.691408 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1613 11:20:49.695121 DOMAIN: 0000: Resource ranges:
1614 11:20:49.697946 * Base: 1000, Size: 800, Tag: 100
1615 11:20:49.701386 * Base: 1900, Size: e700, Tag: 100
1616 11:20:49.708359 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1617 11:20:49.715165 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1618 11:20:49.721263 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1619 11:20:49.727814 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1620 11:20:49.734720 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1621 11:20:49.744680 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1622 11:20:49.751377 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1623 11:20:49.757818 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1624 11:20:49.768005 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1625 11:20:49.774286 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1626 11:20:49.781106 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1627 11:20:49.791304 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1628 11:20:49.797525 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1629 11:20:49.804395 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1630 11:20:49.814218 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1631 11:20:49.821084 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1632 11:20:49.827415 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1633 11:20:49.834405 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1634 11:20:49.844606 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1635 11:20:49.851018 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1636 11:20:49.857474 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1637 11:20:49.867585 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1638 11:20:49.874368 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1639 11:20:49.881044 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1640 11:20:49.890864 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1641 11:20:49.897592 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1642 11:20:49.904282 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1643 11:20:49.914158 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1644 11:20:49.920562 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1645 11:20:49.927281 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1646 11:20:49.937396 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1647 11:20:49.943967 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1648 11:20:49.950887 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1649 11:20:49.954033 DOMAIN: 0000: Resource ranges:
1650 11:20:49.960673 * Base: 80400000, Size: 3fc00000, Tag: 200
1651 11:20:49.964106 * Base: d0000000, Size: 28000000, Tag: 200
1652 11:20:49.967916 * Base: fa000000, Size: 1000000, Tag: 200
1653 11:20:49.970843 * Base: fb001000, Size: 17ff000, Tag: 200
1654 11:20:49.977409 * Base: fe800000, Size: 300000, Tag: 200
1655 11:20:49.980500 * Base: feb80000, Size: 80000, Tag: 200
1656 11:20:49.983904 * Base: fed00000, Size: 40000, Tag: 200
1657 11:20:49.987730 * Base: fed70000, Size: 10000, Tag: 200
1658 11:20:49.993935 * Base: fed88000, Size: 8000, Tag: 200
1659 11:20:49.997106 * Base: fed93000, Size: d000, Tag: 200
1660 11:20:50.000325 * Base: feda2000, Size: 1e000, Tag: 200
1661 11:20:50.003829 * Base: fede0000, Size: 1220000, Tag: 200
1662 11:20:50.010276 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1663 11:20:50.017039 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1664 11:20:50.023922 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1665 11:20:50.030532 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1666 11:20:50.036926 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1667 11:20:50.044008 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1668 11:20:50.050342 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1669 11:20:50.057241 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1670 11:20:50.063418 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1671 11:20:50.070331 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1672 11:20:50.076869 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1673 11:20:50.083607 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1674 11:20:50.090170 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1675 11:20:50.096549 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1676 11:20:50.103374 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1677 11:20:50.110443 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1678 11:20:50.116458 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1679 11:20:50.123189 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1680 11:20:50.129915 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1681 11:20:50.136474 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1682 11:20:50.143237 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1683 11:20:50.153118 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1684 11:20:50.156634 PCI: 00:06.0: Resource ranges:
1685 11:20:50.159719 * Base: 80400000, Size: 100000, Tag: 200
1686 11:20:50.166245 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1687 11:20:50.173390 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1688 11:20:50.179733 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1689 11:20:50.189445 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1690 11:20:50.192677 Root Device assign_resources, bus 0 link: 0
1691 11:20:50.196089 DOMAIN: 0000 assign_resources, bus 0 link: 0
1692 11:20:50.206033 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1693 11:20:50.213079 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1694 11:20:50.222430 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1695 11:20:50.229489 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1696 11:20:50.232382 PCI: 00:04.0 assign_resources, bus 1 link: 0
1697 11:20:50.239263 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1698 11:20:50.246039 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1699 11:20:50.255765 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1700 11:20:50.266054 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1701 11:20:50.269239 PCI: 00:06.0 assign_resources, bus 1 link: 0
1702 11:20:50.278886 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1703 11:20:50.286030 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1704 11:20:50.292820 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1705 11:20:50.298832 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1706 11:20:50.305906 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1707 11:20:50.312371 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1708 11:20:50.315783 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1709 11:20:50.325519 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1710 11:20:50.328971 PCI: 00:14.0 assign_resources, bus 0 link: 0
1711 11:20:50.332183 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1712 11:20:50.341960 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1713 11:20:50.348692 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1714 11:20:50.358728 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1715 11:20:50.362215 PCI: 00:14.3 assign_resources, bus 0 link: 0
1716 11:20:50.368566 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1717 11:20:50.375075 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1718 11:20:50.378526 PCI: 00:15.0 assign_resources, bus 0 link: 0
1719 11:20:50.385050 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1720 11:20:50.391959 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1721 11:20:50.398618 PCI: 00:15.1 assign_resources, bus 0 link: 0
1722 11:20:50.402085 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1723 11:20:50.412012 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1724 11:20:50.415209 PCI: 00:15.3 assign_resources, bus 0 link: 0
1725 11:20:50.418521 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1726 11:20:50.428189 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1727 11:20:50.434861 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1728 11:20:50.441738 PCI: 00:19.1 assign_resources, bus 0 link: 0
1729 11:20:50.444891 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1730 11:20:50.454907 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1731 11:20:50.458394 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1732 11:20:50.461339 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1733 11:20:50.468317 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1734 11:20:50.471777 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1735 11:20:50.478263 LPC: Trying to open IO window from 800 size 1ff
1736 11:20:50.484613 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1737 11:20:50.494571 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1738 11:20:50.501581 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1739 11:20:50.504940 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1740 11:20:50.511228 Root Device assign_resources, bus 0 link: 0 done
1741 11:20:50.514722 Done setting resources.
1742 11:20:50.521473 Show resources in subtree (Root Device)...After assigning values.
1743 11:20:50.524611 Root Device child on link 0 CPU_CLUSTER: 0
1744 11:20:50.528477 CPU_CLUSTER: 0 child on link 0 APIC: 00
1745 11:20:50.531625 APIC: 00
1746 11:20:50.531682 APIC: 16
1747 11:20:50.531731 APIC: 10
1748 11:20:50.534570 APIC: 12
1749 11:20:50.534629 APIC: 14
1750 11:20:50.534693 APIC: 01
1751 11:20:50.537788 APIC: 09
1752 11:20:50.537850 APIC: 08
1753 11:20:50.541602 DOMAIN: 0000 child on link 0 GPIO: 0
1754 11:20:50.551054 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1755 11:20:50.561389 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1756 11:20:50.564611 GPIO: 0
1757 11:20:50.564675 PCI: 00:00.0
1758 11:20:50.574404 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1759 11:20:50.584469 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1760 11:20:50.594727 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1761 11:20:50.600853 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1762 11:20:50.610694 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1763 11:20:50.621410 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1764 11:20:50.631080 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1765 11:20:50.640990 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1766 11:20:50.650880 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1767 11:20:50.657211 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1768 11:20:50.667501 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1769 11:20:50.677557 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1770 11:20:50.687875 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1771 11:20:50.697407 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1772 11:20:50.707510 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1773 11:20:50.713975 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1774 11:20:50.723918 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1775 11:20:50.733851 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1776 11:20:50.743976 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1777 11:20:50.753626 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1778 11:20:50.764117 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1779 11:20:50.773539 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1780 11:20:50.783776 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1781 11:20:50.790243 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1782 11:20:50.800105 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1783 11:20:50.810171 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1784 11:20:50.820120 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1785 11:20:50.829645 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1786 11:20:50.833152 PCI: 00:02.0
1787 11:20:50.842828 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1788 11:20:50.853062 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1789 11:20:50.862997 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1790 11:20:50.866107 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1791 11:20:50.876121 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1792 11:20:50.879680 GENERIC: 0.0
1793 11:20:50.882916 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1794 11:20:50.892979 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1795 11:20:50.902845 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1796 11:20:50.915900 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1797 11:20:50.915977 PCI: 01:00.0
1798 11:20:50.925930 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1799 11:20:50.935997 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1800 11:20:50.939478 PCI: 00:08.0
1801 11:20:50.939565 PCI: 00:0a.0
1802 11:20:50.949466 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1803 11:20:50.955939 PCI: 00:0d.0 child on link 0 USB0 port 0
1804 11:20:50.965938 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1805 11:20:50.969389 USB0 port 0 child on link 0 USB3 port 0
1806 11:20:50.973015 USB3 port 0
1807 11:20:50.973091 USB3 port 1
1808 11:20:50.976458 USB3 port 2
1809 11:20:50.976534 USB3 port 3
1810 11:20:50.982552 PCI: 00:14.0 child on link 0 USB0 port 0
1811 11:20:50.992474 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1812 11:20:50.995969 USB0 port 0 child on link 0 USB2 port 0
1813 11:20:50.999020 USB2 port 0
1814 11:20:50.999097 USB2 port 1
1815 11:20:51.002637 USB2 port 2
1816 11:20:51.002713 USB2 port 3
1817 11:20:51.005815 USB2 port 4
1818 11:20:51.005891 USB2 port 5
1819 11:20:51.009567 USB2 port 6
1820 11:20:51.009643 USB2 port 7
1821 11:20:51.012722 USB2 port 8
1822 11:20:51.012799 USB2 port 9
1823 11:20:51.015875 USB3 port 0
1824 11:20:51.018899 USB3 port 1
1825 11:20:51.018974 USB3 port 2
1826 11:20:51.022417 USB3 port 3
1827 11:20:51.022493 PCI: 00:14.2
1828 11:20:51.032531 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1829 11:20:51.042622 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1830 11:20:51.048916 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1831 11:20:51.059142 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1832 11:20:51.059225 GENERIC: 0.0
1833 11:20:51.065681 PCI: 00:15.0 child on link 0 I2C: 00:1a
1834 11:20:51.075797 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1835 11:20:51.075874 I2C: 00:1a
1836 11:20:51.078732 I2C: 00:31
1837 11:20:51.078807 I2C: 00:32
1838 11:20:51.082221 PCI: 00:15.1 child on link 0 I2C: 00:50
1839 11:20:51.095346 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1840 11:20:51.095423 I2C: 00:50
1841 11:20:51.098934 PCI: 00:15.2
1842 11:20:51.102039 PCI: 00:15.3 child on link 0 I2C: 00:10
1843 11:20:51.112108 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1844 11:20:51.112185 I2C: 00:10
1845 11:20:51.115618 PCI: 00:16.0
1846 11:20:51.125706 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1847 11:20:51.128556 PCI: 00:19.0
1848 11:20:51.132022 PCI: 00:19.1 child on link 0 I2C: 00:15
1849 11:20:51.141933 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1850 11:20:51.142010 I2C: 00:15
1851 11:20:51.145225 I2C: 00:2c
1852 11:20:51.145301 PCI: 00:1e.0
1853 11:20:51.158832 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1854 11:20:51.161925 PCI: 00:1e.3 child on link 0 SPI: 00
1855 11:20:51.172140 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1856 11:20:51.172218 SPI: 00
1857 11:20:51.178200 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1858 11:20:51.185144 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1859 11:20:51.188448 PNP: 0c09.0
1860 11:20:51.198443 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1861 11:20:51.202010 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1862 11:20:51.211787 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1863 11:20:51.221584 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1864 11:20:51.224917 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1865 11:20:51.224999 GENERIC: 0.0
1866 11:20:51.228581 GENERIC: 1.0
1867 11:20:51.231721 PCI: 00:1f.3
1868 11:20:51.241925 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1869 11:20:51.251802 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1870 11:20:51.251909 PCI: 00:1f.5
1871 11:20:51.261566 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1872 11:20:51.264925 Done allocating resources.
1873 11:20:51.271380 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1874 11:20:51.278228 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1875 11:20:51.281138 Configure audio over I2S with MAX98373 NAU88L25B.
1876 11:20:51.286456 Enabling BT offload
1877 11:20:51.293875 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1878 11:20:51.297085 Enabling resources...
1879 11:20:51.300754 PCI: 00:00.0 subsystem <- 8086/4609
1880 11:20:51.303925 PCI: 00:00.0 cmd <- 06
1881 11:20:51.307309 PCI: 00:02.0 subsystem <- 8086/46b3
1882 11:20:51.310566 PCI: 00:02.0 cmd <- 03
1883 11:20:51.313976 PCI: 00:04.0 subsystem <- 8086/461d
1884 11:20:51.314053 PCI: 00:04.0 cmd <- 02
1885 11:20:51.317217 PCI: 00:06.0 bridge ctrl <- 0013
1886 11:20:51.320213 PCI: 00:06.0 subsystem <- 8086/464d
1887 11:20:51.323656 PCI: 00:06.0 cmd <- 106
1888 11:20:51.327222 PCI: 00:0a.0 subsystem <- 8086/467d
1889 11:20:51.330474 PCI: 00:0a.0 cmd <- 02
1890 11:20:51.333650 PCI: 00:0d.0 subsystem <- 8086/461e
1891 11:20:51.337069 PCI: 00:0d.0 cmd <- 02
1892 11:20:51.340391 PCI: 00:14.0 subsystem <- 8086/51ed
1893 11:20:51.343727 PCI: 00:14.0 cmd <- 02
1894 11:20:51.346961 PCI: 00:14.2 subsystem <- 8086/51ef
1895 11:20:51.347038 PCI: 00:14.2 cmd <- 02
1896 11:20:51.353518 PCI: 00:14.3 subsystem <- 8086/51f0
1897 11:20:51.353607 PCI: 00:14.3 cmd <- 02
1898 11:20:51.356735 PCI: 00:15.0 subsystem <- 8086/51e8
1899 11:20:51.359814 PCI: 00:15.0 cmd <- 02
1900 11:20:51.363278 PCI: 00:15.1 subsystem <- 8086/51e9
1901 11:20:51.366391 PCI: 00:15.1 cmd <- 06
1902 11:20:51.369659 PCI: 00:15.3 subsystem <- 8086/51eb
1903 11:20:51.373468 PCI: 00:15.3 cmd <- 02
1904 11:20:51.376537 PCI: 00:16.0 subsystem <- 8086/51e0
1905 11:20:51.379918 PCI: 00:16.0 cmd <- 02
1906 11:20:51.383371 PCI: 00:19.1 subsystem <- 8086/51c6
1907 11:20:51.383447 PCI: 00:19.1 cmd <- 02
1908 11:20:51.386405 PCI: 00:1e.0 subsystem <- 8086/51a8
1909 11:20:51.390105 PCI: 00:1e.0 cmd <- 06
1910 11:20:51.393654 PCI: 00:1e.3 subsystem <- 8086/51ab
1911 11:20:51.396682 PCI: 00:1e.3 cmd <- 02
1912 11:20:51.399540 PCI: 00:1f.0 subsystem <- 8086/5182
1913 11:20:51.403313 PCI: 00:1f.0 cmd <- 407
1914 11:20:51.406732 PCI: 00:1f.3 subsystem <- 8086/51c8
1915 11:20:51.409640 PCI: 00:1f.3 cmd <- 02
1916 11:20:51.413187 PCI: 00:1f.5 subsystem <- 8086/51a4
1917 11:20:51.413253 PCI: 00:1f.5 cmd <- 406
1918 11:20:51.416740 PCI: 01:00.0 cmd <- 02
1919 11:20:51.416815 done.
1920 11:20:51.423074 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1921 11:20:51.426578 ME: Version: Unavailable
1922 11:20:51.430226 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1923 11:20:51.433254 Initializing devices...
1924 11:20:51.437085 Root Device init
1925 11:20:51.437553 mainboard: EC init
1926 11:20:51.443423 Chrome EC: Set SMI mask to 0x0000000000000000
1927 11:20:51.447008 Chrome EC: UHEPI supported
1928 11:20:51.450522 Chrome EC: clear events_b mask to 0x0000000000000000
1929 11:20:51.457092 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1930 11:20:51.463510 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1931 11:20:51.470046 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1932 11:20:51.473871 Chrome EC: Set WAKE mask to 0x0000000000000000
1933 11:20:51.481851 Root Device init finished in 40 msecs
1934 11:20:51.482345 PCI: 00:00.0 init
1935 11:20:51.485592 CPU TDP = 15 Watts
1936 11:20:51.488773 CPU PL1 = 15 Watts
1937 11:20:51.489291 CPU PL2 = 55 Watts
1938 11:20:51.491779 CPU PL4 = 123 Watts
1939 11:20:51.495720 PCI: 00:00.0 init finished in 8 msecs
1940 11:20:51.498545 PCI: 00:02.0 init
1941 11:20:51.498941 GMA: Found VBT in CBFS
1942 11:20:51.502013 GMA: Found valid VBT in CBFS
1943 11:20:51.508284 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1944 11:20:51.514551 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1945 11:20:51.517850 PCI: 00:02.0 init finished in 18 msecs
1946 11:20:51.521420 PCI: 00:06.0 init
1947 11:20:51.535757 Initializing PCH PCIe bridge.
1948 11:20:51.535883 PCI: 00:06.0 init finished in 3 msecs
1949 11:20:51.535973 PCI: 00:0a.0 init
1950 11:20:51.536046 PCI: 00:0a.0 init finished in 0 msecs
1951 11:20:51.536110 PCI: 00:14.0 init
1952 11:20:51.537628 PCI: 00:14.0 init finished in 0 msecs
1953 11:20:51.541085 PCI: 00:14.2 init
1954 11:20:51.544579 PCI: 00:14.2 init finished in 0 msecs
1955 11:20:51.548033 PCI: 00:15.0 init
1956 11:20:51.551244 I2C bus 0 version 0x3230302a
1957 11:20:51.554739 DW I2C bus 0 at 0x80655000 (400 KHz)
1958 11:20:51.557849 PCI: 00:15.0 init finished in 6 msecs
1959 11:20:51.557927 PCI: 00:15.1 init
1960 11:20:51.561075 I2C bus 1 version 0x3230302a
1961 11:20:51.564678 DW I2C bus 1 at 0x80656000 (400 KHz)
1962 11:20:51.570929 PCI: 00:15.1 init finished in 6 msecs
1963 11:20:51.571006 PCI: 00:15.3 init
1964 11:20:51.574460 I2C bus 3 version 0x3230302a
1965 11:20:51.577854 DW I2C bus 3 at 0x80657000 (400 KHz)
1966 11:20:51.580766 PCI: 00:15.3 init finished in 6 msecs
1967 11:20:51.584262 PCI: 00:16.0 init
1968 11:20:51.587497 PCI: 00:16.0 init finished in 0 msecs
1969 11:20:51.587578 PCI: 00:19.1 init
1970 11:20:51.590930 I2C bus 5 version 0x3230302a
1971 11:20:51.597508 DW I2C bus 5 at 0x80659000 (400 KHz)
1972 11:20:51.601012 PCI: 00:19.1 init finished in 6 msecs
1973 11:20:51.601093 PCI: 00:1f.0 init
1974 11:20:51.607639 IOAPIC: Initializing IOAPIC at 0xfec00000
1975 11:20:51.607716 IOAPIC: ID = 0x02
1976 11:20:51.610945 IOAPIC: Dumping registers
1977 11:20:51.613947 reg 0x0000: 0x02000000
1978 11:20:51.614023 reg 0x0001: 0x00770020
1979 11:20:51.617475 reg 0x0002: 0x00000000
1980 11:20:51.620885 IOAPIC: 120 interrupts
1981 11:20:51.624182 IOAPIC: Clearing IOAPIC at 0xfec00000
1982 11:20:51.631204 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1983 11:20:51.634454 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1984 11:20:51.637738 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1985 11:20:51.644859 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1986 11:20:51.647886 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1987 11:20:51.654643 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1988 11:20:51.657717 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1989 11:20:51.664371 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1990 11:20:51.667647 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1991 11:20:51.670912 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1992 11:20:51.677160 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1993 11:20:51.681367 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1994 11:20:51.687902 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1995 11:20:51.691044 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1996 11:20:51.697689 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1997 11:20:51.700789 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1998 11:20:51.707587 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1999 11:20:51.711128 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2000 11:20:51.714570 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2001 11:20:51.721056 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2002 11:20:51.724329 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2003 11:20:51.730798 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2004 11:20:51.734216 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2005 11:20:51.740860 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2006 11:20:51.744930 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2007 11:20:51.751149 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2008 11:20:51.753974 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2009 11:20:51.757944 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2010 11:20:51.764309 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2011 11:20:51.767761 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2012 11:20:51.773660 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2013 11:20:51.777100 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2014 11:20:51.784017 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2015 11:20:51.787553 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2016 11:20:51.794632 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2017 11:20:51.797194 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2018 11:20:51.801106 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2019 11:20:51.807511 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2020 11:20:51.811095 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2021 11:20:51.817660 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2022 11:20:51.821006 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2023 11:20:51.827808 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2024 11:20:51.830854 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2025 11:20:51.833529 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2026 11:20:51.840220 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2027 11:20:51.844071 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2028 11:20:51.851096 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2029 11:20:51.854068 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2030 11:20:51.860898 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2031 11:20:51.864144 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2032 11:20:51.870404 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2033 11:20:51.873773 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2034 11:20:51.877347 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2035 11:20:51.883674 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2036 11:20:51.887097 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2037 11:20:51.894261 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2038 11:20:51.896877 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2039 11:20:51.903843 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2040 11:20:51.907603 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2041 11:20:51.914420 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2042 11:20:51.917113 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2043 11:20:51.920679 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2044 11:20:51.926892 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2045 11:20:51.930644 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2046 11:20:51.937132 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2047 11:20:51.940839 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2048 11:20:51.947201 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2049 11:20:51.949940 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2050 11:20:51.956571 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2051 11:20:51.960182 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2052 11:20:51.963379 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2053 11:20:51.970367 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2054 11:20:51.973066 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2055 11:20:51.979990 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2056 11:20:51.983216 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2057 11:20:51.989807 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2058 11:20:51.993048 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2059 11:20:52.000076 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2060 11:20:52.003310 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2061 11:20:52.006512 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2062 11:20:52.013283 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2063 11:20:52.016188 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2064 11:20:52.022713 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2065 11:20:52.026103 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2066 11:20:52.032880 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2067 11:20:52.036414 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2068 11:20:52.042999 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2069 11:20:52.046303 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2070 11:20:52.049526 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2071 11:20:52.055660 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2072 11:20:52.059535 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2073 11:20:52.065677 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2074 11:20:52.069721 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2075 11:20:52.076226 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2076 11:20:52.079564 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2077 11:20:52.086492 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2078 11:20:52.089507 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2079 11:20:52.092606 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2080 11:20:52.099429 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2081 11:20:52.102640 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2082 11:20:52.109714 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2083 11:20:52.112391 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2084 11:20:52.119308 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2085 11:20:52.122580 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2086 11:20:52.129591 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2087 11:20:52.132596 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2088 11:20:52.136005 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2089 11:20:52.142556 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2090 11:20:52.146102 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2091 11:20:52.152504 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2092 11:20:52.155702 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2093 11:20:52.162959 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2094 11:20:52.165745 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2095 11:20:52.172488 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2096 11:20:52.176173 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2097 11:20:52.179246 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2098 11:20:52.185601 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2099 11:20:52.189042 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2100 11:20:52.196001 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2101 11:20:52.199770 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2102 11:20:52.205792 IOAPIC: Bootstrap Processor Local APIC = 0x00
2103 11:20:52.209566 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2104 11:20:52.212601 PCI: 00:1f.0 init finished in 607 msecs
2105 11:20:52.215719 PCI: 00:1f.2 init
2106 11:20:52.219889 apm_control: Disabling ACPI.
2107 11:20:52.222395 APMC done.
2108 11:20:52.225831 PCI: 00:1f.2 init finished in 6 msecs
2109 11:20:52.226202 PCI: 00:1f.3 init
2110 11:20:52.233111 PCI: 00:1f.3 init finished in 0 msecs
2111 11:20:52.233610 PCI: 01:00.0 init
2112 11:20:52.235764 PCI: 01:00.0 init finished in 0 msecs
2113 11:20:52.238932 PNP: 0c09.0 init
2114 11:20:52.242587 Google Chrome EC uptime: 12.126 seconds
2115 11:20:52.245682 Google Chrome AP resets since EC boot: 1
2116 11:20:52.252526 Google Chrome most recent AP reset causes:
2117 11:20:52.255437 0.341: 32775 shutdown: entering G3
2118 11:20:52.262514 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2119 11:20:52.265870 PNP: 0c09.0 init finished in 23 msecs
2120 11:20:52.268603 GENERIC: 0.0 init
2121 11:20:52.272559 GENERIC: 0.0 init finished in 0 msecs
2122 11:20:52.273019 GENERIC: 1.0 init
2123 11:20:52.275613 GENERIC: 1.0 init finished in 0 msecs
2124 11:20:52.279129 Devices initialized
2125 11:20:52.282647 Show all devs... After init.
2126 11:20:52.285873 Root Device: enabled 1
2127 11:20:52.286334 CPU_CLUSTER: 0: enabled 1
2128 11:20:52.289076 DOMAIN: 0000: enabled 1
2129 11:20:52.292412 GPIO: 0: enabled 1
2130 11:20:52.292838 PCI: 00:00.0: enabled 1
2131 11:20:52.295708 PCI: 00:01.0: enabled 0
2132 11:20:52.298646 PCI: 00:01.1: enabled 0
2133 11:20:52.302092 PCI: 00:02.0: enabled 1
2134 11:20:52.302584 PCI: 00:04.0: enabled 1
2135 11:20:52.305536 PCI: 00:05.0: enabled 0
2136 11:20:52.309279 PCI: 00:06.0: enabled 1
2137 11:20:52.312304 PCI: 00:06.2: enabled 0
2138 11:20:52.312761 PCI: 00:07.0: enabled 0
2139 11:20:52.315944 PCI: 00:07.1: enabled 0
2140 11:20:52.319151 PCI: 00:07.2: enabled 0
2141 11:20:52.322274 PCI: 00:07.3: enabled 0
2142 11:20:52.322772 PCI: 00:08.0: enabled 0
2143 11:20:52.325573 PCI: 00:09.0: enabled 0
2144 11:20:52.328781 PCI: 00:0a.0: enabled 1
2145 11:20:52.329275 PCI: 00:0d.0: enabled 1
2146 11:20:52.332716 PCI: 00:0d.1: enabled 0
2147 11:20:52.335631 PCI: 00:0d.2: enabled 0
2148 11:20:52.338980 PCI: 00:0d.3: enabled 0
2149 11:20:52.339468 PCI: 00:0e.0: enabled 0
2150 11:20:52.341971 PCI: 00:10.0: enabled 0
2151 11:20:52.345416 PCI: 00:10.1: enabled 0
2152 11:20:52.348575 PCI: 00:10.6: enabled 0
2153 11:20:52.348877 PCI: 00:10.7: enabled 0
2154 11:20:52.352135 PCI: 00:12.0: enabled 0
2155 11:20:52.355663 PCI: 00:12.6: enabled 0
2156 11:20:52.360658 PCI: 00:12.7: enabled 0
2157 11:20:52.361007 PCI: 00:13.0: enabled 0
2158 11:20:52.361755 PCI: 00:14.0: enabled 1
2159 11:20:52.365283 PCI: 00:14.1: enabled 0
2160 11:20:52.365731 PCI: 00:14.2: enabled 1
2161 11:20:52.369062 PCI: 00:14.3: enabled 1
2162 11:20:52.372330 PCI: 00:15.0: enabled 1
2163 11:20:52.375624 PCI: 00:15.1: enabled 1
2164 11:20:52.376081 PCI: 00:15.2: enabled 0
2165 11:20:52.378900 PCI: 00:15.3: enabled 1
2166 11:20:52.381899 PCI: 00:16.0: enabled 1
2167 11:20:52.384794 PCI: 00:16.1: enabled 0
2168 11:20:52.385139 PCI: 00:16.2: enabled 0
2169 11:20:52.388284 PCI: 00:16.3: enabled 0
2170 11:20:52.392153 PCI: 00:16.4: enabled 0
2171 11:20:52.395216 PCI: 00:16.5: enabled 0
2172 11:20:52.395674 PCI: 00:17.0: enabled 0
2173 11:20:52.398702 PCI: 00:19.0: enabled 0
2174 11:20:52.401999 PCI: 00:19.1: enabled 1
2175 11:20:52.405176 PCI: 00:19.2: enabled 0
2176 11:20:52.405674 PCI: 00:1a.0: enabled 0
2177 11:20:52.408520 PCI: 00:1c.0: enabled 0
2178 11:20:52.411642 PCI: 00:1c.1: enabled 0
2179 11:20:52.415062 PCI: 00:1c.2: enabled 0
2180 11:20:52.415418 PCI: 00:1c.3: enabled 0
2181 11:20:52.418531 PCI: 00:1c.4: enabled 0
2182 11:20:52.421278 PCI: 00:1c.5: enabled 0
2183 11:20:52.421631 PCI: 00:1c.6: enabled 0
2184 11:20:52.424605 PCI: 00:1c.7: enabled 0
2185 11:20:52.428352 PCI: 00:1d.0: enabled 0
2186 11:20:52.431683 PCI: 00:1d.1: enabled 0
2187 11:20:52.432207 PCI: 00:1d.2: enabled 0
2188 11:20:52.435428 PCI: 00:1d.3: enabled 0
2189 11:20:52.438380 PCI: 00:1e.0: enabled 1
2190 11:20:52.441153 PCI: 00:1e.1: enabled 0
2191 11:20:52.441585 PCI: 00:1e.2: enabled 0
2192 11:20:52.444981 PCI: 00:1e.3: enabled 1
2193 11:20:52.448137 PCI: 00:1f.0: enabled 1
2194 11:20:52.451580 PCI: 00:1f.1: enabled 0
2195 11:20:52.452071 PCI: 00:1f.2: enabled 1
2196 11:20:52.455346 PCI: 00:1f.3: enabled 1
2197 11:20:52.458120 PCI: 00:1f.4: enabled 0
2198 11:20:52.461687 PCI: 00:1f.5: enabled 1
2199 11:20:52.462179 PCI: 00:1f.6: enabled 0
2200 11:20:52.465099 PCI: 00:1f.7: enabled 0
2201 11:20:52.468143 GENERIC: 0.0: enabled 1
2202 11:20:52.468617 GENERIC: 0.0: enabled 1
2203 11:20:52.471915 GENERIC: 1.0: enabled 1
2204 11:20:52.475059 GENERIC: 0.0: enabled 1
2205 11:20:52.478016 GENERIC: 1.0: enabled 1
2206 11:20:52.478405 USB0 port 0: enabled 1
2207 11:20:52.481583 USB0 port 0: enabled 1
2208 11:20:52.484388 GENERIC: 0.0: enabled 1
2209 11:20:52.484822 I2C: 00:1a: enabled 1
2210 11:20:52.487744 I2C: 00:31: enabled 1
2211 11:20:52.491392 I2C: 00:32: enabled 1
2212 11:20:52.494976 I2C: 00:50: enabled 1
2213 11:20:52.495434 I2C: 00:10: enabled 1
2214 11:20:52.497967 I2C: 00:15: enabled 1
2215 11:20:52.500998 I2C: 00:2c: enabled 1
2216 11:20:52.501334 GENERIC: 0.0: enabled 1
2217 11:20:52.504866 SPI: 00: enabled 1
2218 11:20:52.508398 PNP: 0c09.0: enabled 1
2219 11:20:52.508848 GENERIC: 0.0: enabled 1
2220 11:20:52.511321 USB3 port 0: enabled 1
2221 11:20:52.514680 USB3 port 1: enabled 0
2222 11:20:52.515138 USB3 port 2: enabled 1
2223 11:20:52.518608 USB3 port 3: enabled 0
2224 11:20:52.521271 USB2 port 0: enabled 1
2225 11:20:52.524509 USB2 port 1: enabled 0
2226 11:20:52.524875 USB2 port 2: enabled 1
2227 11:20:52.528260 USB2 port 3: enabled 0
2228 11:20:52.531097 USB2 port 4: enabled 0
2229 11:20:52.531587 USB2 port 5: enabled 1
2230 11:20:52.534217 USB2 port 6: enabled 0
2231 11:20:52.537726 USB2 port 7: enabled 0
2232 11:20:52.538078 USB2 port 8: enabled 1
2233 11:20:52.540800 USB2 port 9: enabled 1
2234 11:20:52.544294 USB3 port 0: enabled 1
2235 11:20:52.547590 USB3 port 1: enabled 0
2236 11:20:52.547664 USB3 port 2: enabled 0
2237 11:20:52.551024 USB3 port 3: enabled 0
2238 11:20:52.554110 GENERIC: 0.0: enabled 1
2239 11:20:52.554185 GENERIC: 1.0: enabled 1
2240 11:20:52.557159 APIC: 00: enabled 1
2241 11:20:52.560614 APIC: 16: enabled 1
2242 11:20:52.560695 APIC: 10: enabled 1
2243 11:20:52.564319 APIC: 12: enabled 1
2244 11:20:52.567999 APIC: 14: enabled 1
2245 11:20:52.568342 APIC: 01: enabled 1
2246 11:20:52.571128 APIC: 09: enabled 1
2247 11:20:52.571581 APIC: 08: enabled 1
2248 11:20:52.575037 PCI: 01:00.0: enabled 1
2249 11:20:52.581307 BS: BS_DEV_INIT run times (exec / console): 10 / 1133 ms
2250 11:20:52.584240 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2251 11:20:52.587862 ELOG: NV offset 0xf20000 size 0x4000
2252 11:20:52.595574 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2253 11:20:52.602950 ELOG: Event(17) added with size 13 at 2024-02-23 11:20:52 UTC
2254 11:20:52.609755 ELOG: Event(9E) added with size 10 at 2024-02-23 11:20:52 UTC
2255 11:20:52.616190 ELOG: Event(9F) added with size 14 at 2024-02-23 11:20:52 UTC
2256 11:20:52.622650 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2257 11:20:52.629351 ELOG: Event(A0) added with size 9 at 2024-02-23 11:20:52 UTC
2258 11:20:52.632902 elog_add_boot_reason: Logged dev mode boot
2259 11:20:52.638886 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2260 11:20:52.642574 Finalize devices...
2261 11:20:52.642957 PCI: 00:16.0 final
2262 11:20:52.645372 PCI: 00:1f.2 final
2263 11:20:52.645665 GENERIC: 0.0 final
2264 11:20:52.652674 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2265 11:20:52.655780 GENERIC: 1.0 final
2266 11:20:52.662267 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2267 11:20:52.662633 Devices finalized
2268 11:20:52.669312 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2269 11:20:52.672837 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2270 11:20:52.679157 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2271 11:20:52.685888 ME: HFSTS1 : 0x90000245
2272 11:20:52.689245 ME: HFSTS2 : 0x82100116
2273 11:20:52.692340 ME: HFSTS3 : 0x00000050
2274 11:20:52.699561 ME: HFSTS4 : 0x00004000
2275 11:20:52.702494 ME: HFSTS5 : 0x00000000
2276 11:20:52.705350 ME: HFSTS6 : 0x40600006
2277 11:20:52.708990 ME: Manufacturing Mode : NO
2278 11:20:52.715587 ME: SPI Protection Mode Enabled : YES
2279 11:20:52.718865 ME: FPFs Committed : YES
2280 11:20:52.722226 ME: Manufacturing Vars Locked : YES
2281 11:20:52.725557 ME: FW Partition Table : OK
2282 11:20:52.729016 ME: Bringup Loader Failure : NO
2283 11:20:52.732727 ME: Firmware Init Complete : YES
2284 11:20:52.735237 ME: Boot Options Present : NO
2285 11:20:52.738493 ME: Update In Progress : NO
2286 11:20:52.745466 ME: D0i3 Support : YES
2287 11:20:52.749203 ME: Low Power State Enabled : NO
2288 11:20:52.752206 ME: CPU Replaced : YES
2289 11:20:52.755613 ME: CPU Replacement Valid : YES
2290 11:20:52.758371 ME: Current Working State : 5
2291 11:20:52.761738 ME: Current Operation State : 1
2292 11:20:52.765545 ME: Current Operation Mode : 0
2293 11:20:52.768658 ME: Error Code : 0
2294 11:20:52.775261 ME: Enhanced Debug Mode : NO
2295 11:20:52.778540 ME: CPU Debug Disabled : YES
2296 11:20:52.781456 ME: TXT Support : NO
2297 11:20:52.785618 ME: WP for RO is enabled : YES
2298 11:20:52.791957 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2299 11:20:52.798177 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2300 11:20:52.801596 Ramoops buffer: 0x100000@0x76899000.
2301 11:20:52.805115 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2302 11:20:52.814833 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2303 11:20:52.817838 CBFS: 'fallback/slic' not found.
2304 11:20:52.821390 ACPI: Writing ACPI tables at 7686d000.
2305 11:20:52.821466 ACPI: * FACS
2306 11:20:52.824584 ACPI: * DSDT
2307 11:20:52.831479 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2308 11:20:52.834456 ACPI: * FADT
2309 11:20:52.834541 SCI is IRQ9
2310 11:20:52.838230 ACPI: added table 1/32, length now 40
2311 11:20:52.841161 ACPI: * SSDT
2312 11:20:52.848119 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2313 11:20:52.851422 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2314 11:20:52.857741 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2315 11:20:52.861271 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2316 11:20:52.867594 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2317 11:20:52.871108 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2318 11:20:52.878082 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2319 11:20:52.884302 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2320 11:20:52.888417 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2321 11:20:52.894368 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2322 11:20:52.897967 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2323 11:20:52.904499 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2324 11:20:52.908060 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2325 11:20:52.914758 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2326 11:20:52.921265 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2327 11:20:52.924607 PS2K: Passing 80 keymaps to kernel
2328 11:20:52.931027 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2329 11:20:52.937517 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2330 11:20:52.943968 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2331 11:20:52.950777 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2332 11:20:52.954101 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2333 11:20:52.960691 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2334 11:20:52.967116 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2335 11:20:52.974121 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2336 11:20:52.980933 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2337 11:20:52.987719 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2338 11:20:52.990639 ACPI: added table 2/32, length now 44
2339 11:20:52.990715 ACPI: * MCFG
2340 11:20:52.994113 ACPI: added table 3/32, length now 48
2341 11:20:52.997562 ACPI: * TPM2
2342 11:20:53.000572 TPM2 log created at 0x7685d000
2343 11:20:53.004174 ACPI: added table 4/32, length now 52
2344 11:20:53.007569 ACPI: * LPIT
2345 11:20:53.010785 ACPI: added table 5/32, length now 56
2346 11:20:53.010860 ACPI: * MADT
2347 11:20:53.014072 SCI is IRQ9
2348 11:20:53.017007 ACPI: added table 6/32, length now 60
2349 11:20:53.020810 cmd_reg from pmc_make_ipc_cmd 1052838
2350 11:20:53.026987 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2351 11:20:53.033500 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2352 11:20:53.037238 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2353 11:20:53.043457 PMC CrashLog size in discovery mode: 0xC00
2354 11:20:53.046777 cpu crashlog bar addr: 0x80640000
2355 11:20:53.050251 cpu discovery table offset: 0x6030
2356 11:20:53.053259 cpu_crashlog_discovery_table buffer count: 0x3
2357 11:20:53.059888 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2358 11:20:53.066659 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2359 11:20:53.073510 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2360 11:20:53.079937 PMC crashLog size in discovery mode : 0xC00
2361 11:20:53.086780 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2362 11:20:53.090189 discover mode PMC crashlog size adjusted to: 0x200
2363 11:20:53.096606 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2364 11:20:53.103693 discover mode PMC crashlog size adjusted to: 0x0
2365 11:20:53.106498 m_cpu_crashLog_size : 0x3480 bytes
2366 11:20:53.106573 CPU crashLog present.
2367 11:20:53.113021 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2368 11:20:53.120444 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2369 11:20:53.123259 current = 76876550
2370 11:20:53.123334 ACPI: * DMAR
2371 11:20:53.126733 ACPI: added table 7/32, length now 64
2372 11:20:53.129972 ACPI: added table 8/32, length now 68
2373 11:20:53.133013 ACPI: * HPET
2374 11:20:53.136576 ACPI: added table 9/32, length now 72
2375 11:20:53.140014 ACPI: done.
2376 11:20:53.140089 ACPI tables: 38528 bytes.
2377 11:20:53.143058 smbios_write_tables: 76857000
2378 11:20:53.147175 EC returned error result code 3
2379 11:20:53.150072 Couldn't obtain OEM name from CBI
2380 11:20:53.153807 Create SMBIOS type 16
2381 11:20:53.157017 Create SMBIOS type 17
2382 11:20:53.160225 Create SMBIOS type 20
2383 11:20:53.160300 GENERIC: 0.0 (WIFI Device)
2384 11:20:53.163770 SMBIOS tables: 2156 bytes.
2385 11:20:53.167067 Writing table forward entry at 0x00000500
2386 11:20:53.173827 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2387 11:20:53.176922 Writing coreboot table at 0x76891000
2388 11:20:53.183503 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2389 11:20:53.189932 1. 0000000000001000-000000000009ffff: RAM
2390 11:20:53.193224 2. 00000000000a0000-00000000000fffff: RESERVED
2391 11:20:53.196656 3. 0000000000100000-0000000076856fff: RAM
2392 11:20:53.203448 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2393 11:20:53.206947 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2394 11:20:53.213309 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2395 11:20:53.220362 7. 0000000077000000-00000000803fffff: RESERVED
2396 11:20:53.223109 8. 00000000c0000000-00000000cfffffff: RESERVED
2397 11:20:53.229899 9. 00000000f8000000-00000000f9ffffff: RESERVED
2398 11:20:53.233551 10. 00000000fb000000-00000000fb000fff: RESERVED
2399 11:20:53.236402 11. 00000000fc800000-00000000fe7fffff: RESERVED
2400 11:20:53.243132 12. 00000000feb00000-00000000feb7ffff: RESERVED
2401 11:20:53.246514 13. 00000000fec00000-00000000fecfffff: RESERVED
2402 11:20:53.253115 14. 00000000fed40000-00000000fed6ffff: RESERVED
2403 11:20:53.256348 15. 00000000fed80000-00000000fed87fff: RESERVED
2404 11:20:53.263333 16. 00000000fed90000-00000000fed92fff: RESERVED
2405 11:20:53.266435 17. 00000000feda0000-00000000feda1fff: RESERVED
2406 11:20:53.272934 18. 00000000fedc0000-00000000feddffff: RESERVED
2407 11:20:53.276423 19. 0000000100000000-000000027fbfffff: RAM
2408 11:20:53.279379 Passing 4 GPIOs to payload:
2409 11:20:53.282974 NAME | PORT | POLARITY | VALUE
2410 11:20:53.289348 lid | undefined | high | high
2411 11:20:53.296362 power | undefined | high | low
2412 11:20:53.299649 oprom | undefined | high | low
2413 11:20:53.306065 EC in RW | 0x00000151 | high | high
2414 11:20:53.306128 Board ID: 3
2415 11:20:53.309769 FW config: 0x131
2416 11:20:53.316114 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum c641
2417 11:20:53.316174 coreboot table: 1788 bytes.
2418 11:20:53.319436 IMD ROOT 0. 0x76fff000 0x00001000
2419 11:20:53.326206 IMD SMALL 1. 0x76ffe000 0x00001000
2420 11:20:53.329454 FSP MEMORY 2. 0x76afe000 0x00500000
2421 11:20:53.332909 CONSOLE 3. 0x76ade000 0x00020000
2422 11:20:53.336030 RW MCACHE 4. 0x76add000 0x0000043c
2423 11:20:53.339315 RO MCACHE 5. 0x76adc000 0x00000fd8
2424 11:20:53.343055 FMAP 6. 0x76adb000 0x0000064a
2425 11:20:53.346037 TIME STAMP 7. 0x76ada000 0x00000910
2426 11:20:53.349503 VBOOT WORK 8. 0x76ac6000 0x00014000
2427 11:20:53.356174 MEM INFO 9. 0x76ac5000 0x000003b8
2428 11:20:53.359268 ROMSTG STCK10. 0x76ac4000 0x00001000
2429 11:20:53.362987 AFTER CAR 11. 0x76ab8000 0x0000c000
2430 11:20:53.366469 RAMSTAGE 12. 0x76a2e000 0x0008a000
2431 11:20:53.369361 ACPI BERT 13. 0x76a1e000 0x00010000
2432 11:20:53.372454 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2433 11:20:53.375961 REFCODE 15. 0x769ae000 0x0006f000
2434 11:20:53.382543 SMM BACKUP 16. 0x7699e000 0x00010000
2435 11:20:53.386051 IGD OPREGION17. 0x76999000 0x00004203
2436 11:20:53.389340 RAMOOPS 18. 0x76899000 0x00100000
2437 11:20:53.392848 COREBOOT 19. 0x76891000 0x00008000
2438 11:20:53.395838 ACPI 20. 0x7686d000 0x00024000
2439 11:20:53.399450 TPM2 TCGLOG21. 0x7685d000 0x00010000
2440 11:20:53.402488 PMC CRASHLOG22. 0x7685c000 0x00000c00
2441 11:20:53.405851 CPU CRASHLOG23. 0x76858000 0x00003480
2442 11:20:53.412419 SMBIOS 24. 0x76857000 0x00001000
2443 11:20:53.412480 IMD small region:
2444 11:20:53.416029 IMD ROOT 0. 0x76ffec00 0x00000400
2445 11:20:53.419156 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2446 11:20:53.426175 VPD 2. 0x76ffeb80 0x00000058
2447 11:20:53.429160 POWER STATE 3. 0x76ffeb20 0x00000044
2448 11:20:53.432403 ROMSTAGE 4. 0x76ffeb00 0x00000004
2449 11:20:53.435799 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2450 11:20:53.439266 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2451 11:20:53.446333 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2452 11:20:53.448998 MTRR: Physical address space:
2453 11:20:53.455809 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2454 11:20:53.462385 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2455 11:20:53.469140 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2456 11:20:53.475988 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2457 11:20:53.478952 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2458 11:20:53.485842 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2459 11:20:53.492487 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2460 11:20:53.495706 MTRR: Fixed MSR 0x250 0x0606060606060606
2461 11:20:53.502222 MTRR: Fixed MSR 0x258 0x0606060606060606
2462 11:20:53.505479 MTRR: Fixed MSR 0x259 0x0000000000000000
2463 11:20:53.509140 MTRR: Fixed MSR 0x268 0x0606060606060606
2464 11:20:53.512324 MTRR: Fixed MSR 0x269 0x0606060606060606
2465 11:20:53.519008 MTRR: Fixed MSR 0x26a 0x0606060606060606
2466 11:20:53.522028 MTRR: Fixed MSR 0x26b 0x0606060606060606
2467 11:20:53.525536 MTRR: Fixed MSR 0x26c 0x0606060606060606
2468 11:20:53.529047 MTRR: Fixed MSR 0x26d 0x0606060606060606
2469 11:20:53.535761 MTRR: Fixed MSR 0x26e 0x0606060606060606
2470 11:20:53.538796 MTRR: Fixed MSR 0x26f 0x0606060606060606
2471 11:20:53.542468 call enable_fixed_mtrr()
2472 11:20:53.545255 CPU physical address size: 39 bits
2473 11:20:53.548613 MTRR: default type WB/UC MTRR counts: 6/6.
2474 11:20:53.551994 MTRR: UC selected as default type.
2475 11:20:53.558699 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2476 11:20:53.565349 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2477 11:20:53.572103 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2478 11:20:53.578519 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2479 11:20:53.585140 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2480 11:20:53.592015 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2481 11:20:53.594991 MTRR: Fixed MSR 0x250 0x0606060606060606
2482 11:20:53.601963 MTRR: Fixed MSR 0x258 0x0606060606060606
2483 11:20:53.605185 MTRR: Fixed MSR 0x259 0x0000000000000000
2484 11:20:53.608591 MTRR: Fixed MSR 0x268 0x0606060606060606
2485 11:20:53.611891 MTRR: Fixed MSR 0x269 0x0606060606060606
2486 11:20:53.618960 MTRR: Fixed MSR 0x26a 0x0606060606060606
2487 11:20:53.621622 MTRR: Fixed MSR 0x26b 0x0606060606060606
2488 11:20:53.624978 MTRR: Fixed MSR 0x26c 0x0606060606060606
2489 11:20:53.628700 MTRR: Fixed MSR 0x26d 0x0606060606060606
2490 11:20:53.634950 MTRR: Fixed MSR 0x26e 0x0606060606060606
2491 11:20:53.638199 MTRR: Fixed MSR 0x26f 0x0606060606060606
2492 11:20:53.641549 MTRR: Fixed MSR 0x250 0x0606060606060606
2493 11:20:53.644989 MTRR: Fixed MSR 0x250 0x0606060606060606
2494 11:20:53.651706 MTRR: Fixed MSR 0x250 0x0606060606060606
2495 11:20:53.655229 MTRR: Fixed MSR 0x258 0x0606060606060606
2496 11:20:53.658131 MTRR: Fixed MSR 0x259 0x0000000000000000
2497 11:20:53.661870 MTRR: Fixed MSR 0x268 0x0606060606060606
2498 11:20:53.665092 MTRR: Fixed MSR 0x269 0x0606060606060606
2499 11:20:53.671456 MTRR: Fixed MSR 0x26a 0x0606060606060606
2500 11:20:53.674586 MTRR: Fixed MSR 0x26b 0x0606060606060606
2501 11:20:53.677896 MTRR: Fixed MSR 0x26c 0x0606060606060606
2502 11:20:53.681461 MTRR: Fixed MSR 0x26d 0x0606060606060606
2503 11:20:53.688022 MTRR: Fixed MSR 0x26e 0x0606060606060606
2504 11:20:53.691149 MTRR: Fixed MSR 0x26f 0x0606060606060606
2505 11:20:53.694538 MTRR: Fixed MSR 0x250 0x0606060606060606
2506 11:20:53.697985 MTRR: Fixed MSR 0x258 0x0606060606060606
2507 11:20:53.704892 MTRR: Fixed MSR 0x258 0x0606060606060606
2508 11:20:53.708198 MTRR: Fixed MSR 0x259 0x0000000000000000
2509 11:20:53.711202 MTRR: Fixed MSR 0x268 0x0606060606060606
2510 11:20:53.714718 MTRR: Fixed MSR 0x269 0x0606060606060606
2511 11:20:53.721480 MTRR: Fixed MSR 0x258 0x0606060606060606
2512 11:20:53.721555 call enable_fixed_mtrr()
2513 11:20:53.724437 call enable_fixed_mtrr()
2514 11:20:53.728189 CPU physical address size: 39 bits
2515 11:20:53.731191 CPU physical address size: 39 bits
2516 11:20:53.734464 MTRR: Fixed MSR 0x259 0x0000000000000000
2517 11:20:53.741300 MTRR: Fixed MSR 0x250 0x0606060606060606
2518 11:20:53.744690 MTRR: Fixed MSR 0x258 0x0606060606060606
2519 11:20:53.747882 MTRR: Fixed MSR 0x259 0x0000000000000000
2520 11:20:53.751171 MTRR: Fixed MSR 0x268 0x0606060606060606
2521 11:20:53.757776 MTRR: Fixed MSR 0x269 0x0606060606060606
2522 11:20:53.761027 MTRR: Fixed MSR 0x26a 0x0606060606060606
2523 11:20:53.764494 MTRR: Fixed MSR 0x26b 0x0606060606060606
2524 11:20:53.767636 MTRR: Fixed MSR 0x26c 0x0606060606060606
2525 11:20:53.774180 MTRR: Fixed MSR 0x26d 0x0606060606060606
2526 11:20:53.777760 MTRR: Fixed MSR 0x26e 0x0606060606060606
2527 11:20:53.781094 MTRR: Fixed MSR 0x26f 0x0606060606060606
2528 11:20:53.784094 MTRR: Fixed MSR 0x26a 0x0606060606060606
2529 11:20:53.787504 MTRR: Fixed MSR 0x250 0x0606060606060606
2530 11:20:53.794080 MTRR: Fixed MSR 0x268 0x0606060606060606
2531 11:20:53.797364 MTRR: Fixed MSR 0x269 0x0606060606060606
2532 11:20:53.801017 MTRR: Fixed MSR 0x26a 0x0606060606060606
2533 11:20:53.804432 MTRR: Fixed MSR 0x26b 0x0606060606060606
2534 11:20:53.810865 MTRR: Fixed MSR 0x26c 0x0606060606060606
2535 11:20:53.814536 MTRR: Fixed MSR 0x26d 0x0606060606060606
2536 11:20:53.817924 MTRR: Fixed MSR 0x26e 0x0606060606060606
2537 11:20:53.820549 MTRR: Fixed MSR 0x26f 0x0606060606060606
2538 11:20:53.827445 MTRR: Fixed MSR 0x259 0x0000000000000000
2539 11:20:53.827519 call enable_fixed_mtrr()
2540 11:20:53.833961 MTRR: Fixed MSR 0x268 0x0606060606060606
2541 11:20:53.837383 MTRR: Fixed MSR 0x269 0x0606060606060606
2542 11:20:53.840322 call enable_fixed_mtrr()
2543 11:20:53.843869 CPU physical address size: 39 bits
2544 11:20:53.847348 MTRR: Fixed MSR 0x258 0x0606060606060606
2545 11:20:53.850521 MTRR: Fixed MSR 0x26a 0x0606060606060606
2546 11:20:53.854073 CPU physical address size: 39 bits
2547 11:20:53.857058 MTRR: Fixed MSR 0x26b 0x0606060606060606
2548 11:20:53.863823 MTRR: Fixed MSR 0x259 0x0000000000000000
2549 11:20:53.867111 MTRR: Fixed MSR 0x26c 0x0606060606060606
2550 11:20:53.870458 MTRR: Fixed MSR 0x26d 0x0606060606060606
2551 11:20:53.873970 MTRR: Fixed MSR 0x26e 0x0606060606060606
2552 11:20:53.880244 MTRR: Fixed MSR 0x26f 0x0606060606060606
2553 11:20:53.883928 MTRR: Fixed MSR 0x268 0x0606060606060606
2554 11:20:53.887257 call enable_fixed_mtrr()
2555 11:20:53.890645 MTRR: Fixed MSR 0x26b 0x0606060606060606
2556 11:20:53.893848 CPU physical address size: 39 bits
2557 11:20:53.896867 MTRR: Fixed MSR 0x26c 0x0606060606060606
2558 11:20:53.900834 MTRR: Fixed MSR 0x269 0x0606060606060606
2559 11:20:53.907114 MTRR: Fixed MSR 0x26d 0x0606060606060606
2560 11:20:53.910241 MTRR: Fixed MSR 0x26e 0x0606060606060606
2561 11:20:53.913405 MTRR: Fixed MSR 0x26f 0x0606060606060606
2562 11:20:53.916899 MTRR: Fixed MSR 0x26a 0x0606060606060606
2563 11:20:53.920243 call enable_fixed_mtrr()
2564 11:20:53.923557 MTRR: Fixed MSR 0x26b 0x0606060606060606
2565 11:20:53.930074 MTRR: Fixed MSR 0x26c 0x0606060606060606
2566 11:20:53.933501 MTRR: Fixed MSR 0x26d 0x0606060606060606
2567 11:20:53.937071 MTRR: Fixed MSR 0x26e 0x0606060606060606
2568 11:20:53.940228 MTRR: Fixed MSR 0x26f 0x0606060606060606
2569 11:20:53.943620 CPU physical address size: 39 bits
2570 11:20:53.947011 call enable_fixed_mtrr()
2571 11:20:53.949899 CPU physical address size: 39 bits
2572 11:20:53.954528
2573 11:20:53.954615 MTRR check
2574 11:20:53.957768 Fixed MTRRs : Enabled
2575 11:20:53.957855 Variable MTRRs: Enabled
2576 11:20:53.957909
2577 11:20:53.964052 BS: BS_WRITE_TABLES exit times (exec / console): 249 / 150 ms
2578 11:20:53.967476 Checking cr50 for pending updates
2579 11:20:53.979482 Reading cr50 TPM mode
2580 11:20:53.994798 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2581 11:20:54.004677 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2582 11:20:54.007960 Checking segment from ROM address 0xf96cbe6c
2583 11:20:54.011606 Checking segment from ROM address 0xf96cbe88
2584 11:20:54.018182 Loading segment from ROM address 0xf96cbe6c
2585 11:20:54.018258 code (compression=1)
2586 11:20:54.027835 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2587 11:20:54.034808 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2588 11:20:54.037802 using LZMA
2589 11:20:54.060329 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2590 11:20:54.067350 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2591 11:20:54.075412 Loading segment from ROM address 0xf96cbe88
2592 11:20:54.078611 Entry Point 0x30000000
2593 11:20:54.078686 Loaded segments
2594 11:20:54.085377 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2595 11:20:54.091815 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 0 ms
2596 11:20:54.095579 Finalizing chipset.
2597 11:20:54.098492 apm_control: Finalizing SMM.
2598 11:20:54.098567 APMC done.
2599 11:20:54.101749 HECI: CSE device 16.1 is disabled
2600 11:20:54.105024 HECI: CSE device 16.2 is disabled
2601 11:20:54.108413 HECI: CSE device 16.3 is disabled
2602 11:20:54.111777 HECI: CSE device 16.4 is disabled
2603 11:20:54.115422 HECI: CSE device 16.5 is disabled
2604 11:20:54.118249 HECI: Sending End-of-Post
2605 11:20:54.127147 CSE: EOP requested action: continue boot
2606 11:20:54.129982 CSE EOP successful, continuing boot
2607 11:20:54.136748 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2608 11:20:54.140126 mp_park_aps done after 0 msecs.
2609 11:20:54.143979 Jumping to boot code at 0x30000000(0x76891000)
2610 11:20:54.153843 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2611 11:20:54.157439
2612 11:20:54.157519
2613 11:20:54.157581
2614 11:20:54.160861 Starting depthcharge on Volmar...
2615 11:20:54.160938
2616 11:20:54.161365 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2617 11:20:54.161463 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2618 11:20:54.161534 Setting prompt string to ['brya:']
2619 11:20:54.161608 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2620 11:20:54.167483 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2621 11:20:54.167562
2622 11:20:54.174477 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2623 11:20:54.174551
2624 11:20:54.181053 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2625 11:20:54.181129
2626 11:20:54.184282 configure_storage: Failed to remap 1C:2
2627 11:20:54.184357
2628 11:20:54.187513 Wipe memory regions:
2629 11:20:54.187589
2630 11:20:54.190881 [0x00000000001000, 0x000000000a0000)
2631 11:20:54.190955
2632 11:20:54.194004 [0x00000000100000, 0x00000030000000)
2633 11:20:54.304398
2634 11:20:54.307448 [0x00000032668e60, 0x00000076857000)
2635 11:20:54.459476
2636 11:20:54.462630 [0x00000100000000, 0x0000027fc00000)
2637 11:20:55.322472
2638 11:20:55.325399 ec_init: CrosEC protocol v3 supported (256, 256)
2639 11:20:55.929654
2640 11:20:55.929799 R8152: Initializing
2641 11:20:55.929881
2642 11:20:55.933071 Version 9 (ocp_data = 6010)
2643 11:20:55.933152
2644 11:20:55.936336 R8152: Done initializing
2645 11:20:55.936412
2646 11:20:55.939681 Adding net device
2647 11:20:56.240524
2648 11:20:56.243453 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2649 11:20:56.243547
2650 11:20:56.243607
2651 11:20:56.243662
2652 11:20:56.243925 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2654 11:20:56.344278 brya: tftpboot 192.168.201.1 12838136/tftp-deploy-8olk8tls/kernel/bzImage 12838136/tftp-deploy-8olk8tls/kernel/cmdline 12838136/tftp-deploy-8olk8tls/ramdisk/ramdisk.cpio.gz
2655 11:20:56.344434 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2656 11:20:56.344538 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2657 11:20:56.349170 tftpboot 192.168.201.1 12838136/tftp-deploy-8olk8tls/kernel/bzIploy-8olk8tls/kernel/cmdline 12838136/tftp-deploy-8olk8tls/ramdisk/ramdisk.cpio.gz
2658 11:20:56.349260
2659 11:20:56.349316 Waiting for link
2660 11:20:56.551955
2661 11:20:56.552082 done.
2662 11:20:56.552142
2663 11:20:56.552190 MAC: 00:e0:4c:68:02:ef
2664 11:20:56.552237
2665 11:20:56.555351 Sending DHCP discover... done.
2666 11:20:56.555440
2667 11:20:56.558722 Waiting for reply... done.
2668 11:20:56.558799
2669 11:20:56.561844 Sending DHCP request... done.
2670 11:20:56.561924
2671 11:20:56.565011 Waiting for reply... done.
2672 11:20:56.568672
2673 11:20:56.568748 My ip is 192.168.201.16
2674 11:20:56.568801
2675 11:20:56.571753 The DHCP server ip is 192.168.201.1
2676 11:20:56.571828
2677 11:20:56.578363 TFTP server IP predefined by user: 192.168.201.1
2678 11:20:56.578439
2679 11:20:56.585188 Bootfile predefined by user: 12838136/tftp-deploy-8olk8tls/kernel/bzImage
2680 11:20:56.585273
2681 11:20:56.588487 Sending tftp read request... done.
2682 11:20:56.588563
2683 11:20:56.592061 Waiting for the transfer...
2684 11:20:56.592145
2685 11:20:56.821482 00000000 ################################################################
2686 11:20:56.821609
2687 11:20:57.047942 00080000 ################################################################
2688 11:20:57.048079
2689 11:20:57.275120 00100000 ################################################################
2690 11:20:57.275256
2691 11:20:57.500422 00180000 ################################################################
2692 11:20:57.500548
2693 11:20:57.728020 00200000 ################################################################
2694 11:20:57.728152
2695 11:20:57.954654 00280000 ################################################################
2696 11:20:57.954779
2697 11:20:58.181708 00300000 ################################################################
2698 11:20:58.181840
2699 11:20:58.406276 00380000 ################################################################
2700 11:20:58.406406
2701 11:20:58.632313 00400000 ################################################################
2702 11:20:58.632442
2703 11:20:58.857322 00480000 ################################################################
2704 11:20:58.857453
2705 11:20:59.082395 00500000 ################################################################
2706 11:20:59.082528
2707 11:20:59.305762 00580000 ################################################################
2708 11:20:59.305882
2709 11:20:59.530746 00600000 ################################################################
2710 11:20:59.530880
2711 11:20:59.755447 00680000 ################################################################
2712 11:20:59.755572
2713 11:20:59.980110 00700000 ################################################################
2714 11:20:59.980238
2715 11:21:00.203759 00780000 ################################################################
2716 11:21:00.203884
2717 11:21:00.428267 00800000 ################################################################
2718 11:21:00.428393
2719 11:21:00.651963 00880000 ################################################################
2720 11:21:00.652087
2721 11:21:00.876046 00900000 ################################################################
2722 11:21:00.876176
2723 11:21:01.101002 00980000 ################################################################
2724 11:21:01.101138
2725 11:21:01.326507 00a00000 ################################################################
2726 11:21:01.326647
2727 11:21:01.550179 00a80000 ################################################################
2728 11:21:01.550317
2729 11:21:01.775442 00b00000 ################################################################
2730 11:21:01.775574
2731 11:21:01.900013 00b80000 #################################### done.
2732 11:21:01.900146
2733 11:21:01.902983 The bootfile was 12349440 bytes long.
2734 11:21:01.903064
2735 11:21:01.906556 Sending tftp read request... done.
2736 11:21:01.906634
2737 11:21:01.910042 Waiting for the transfer...
2738 11:21:01.910127
2739 11:21:02.140821 00000000 ################################################################
2740 11:21:02.140947
2741 11:21:02.369066 00080000 ################################################################
2742 11:21:02.369198
2743 11:21:02.595610 00100000 ################################################################
2744 11:21:02.595737
2745 11:21:02.822093 00180000 ################################################################
2746 11:21:02.822220
2747 11:21:03.048346 00200000 ################################################################
2748 11:21:03.048472
2749 11:21:03.276271 00280000 ################################################################
2750 11:21:03.276410
2751 11:21:03.504653 00300000 ################################################################
2752 11:21:03.504770
2753 11:21:03.732279 00380000 ################################################################
2754 11:21:03.732410
2755 11:21:03.960217 00400000 ################################################################
2756 11:21:03.960333
2757 11:21:04.191256 00480000 ################################################################
2758 11:21:04.191378
2759 11:21:04.418381 00500000 ################################################################
2760 11:21:04.418513
2761 11:21:04.646973 00580000 ################################################################
2762 11:21:04.647094
2763 11:21:04.873744 00600000 ################################################################
2764 11:21:04.873885
2765 11:21:05.101317 00680000 ################################################################
2766 11:21:05.101450
2767 11:21:05.329184 00700000 ################################################################
2768 11:21:05.329328
2769 11:21:05.557876 00780000 ################################################################
2770 11:21:05.558011
2771 11:21:05.786043 00800000 ################################################################
2772 11:21:05.786174
2773 11:21:05.918871 00880000 ###################################### done.
2774 11:21:05.919003
2775 11:21:05.921998 Sending tftp read request... done.
2776 11:21:05.922080
2777 11:21:05.925612 Waiting for the transfer...
2778 11:21:05.925680
2779 11:21:05.928887 00000000 # done.
2780 11:21:05.928946
2781 11:21:05.935443 Command line loaded dynamically from TFTP file: 12838136/tftp-deploy-8olk8tls/kernel/cmdline
2782 11:21:05.939194
2783 11:21:05.952501 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2784 11:21:05.957885
2785 11:21:05.961564 Shutting down all USB controllers.
2786 11:21:05.961921
2787 11:21:05.962204 Removing current net device
2788 11:21:05.962423
2789 11:21:05.964629 Finalizing coreboot
2790 11:21:05.964993
2791 11:21:05.971773 Exiting depthcharge with code 4 at timestamp: 22074518
2792 11:21:05.972239
2793 11:21:05.972510
2794 11:21:05.972731 Starting kernel ...
2795 11:21:05.972943
2796 11:21:05.973147
2797 11:21:05.974187 end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
2798 11:21:05.974583 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2799 11:21:05.974857 Setting prompt string to ['Linux version [0-9]']
2800 11:21:05.975099 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2801 11:21:05.975344 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2803 11:25:34.975282 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2805 11:25:34.976047 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2807 11:25:34.976624 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2810 11:25:34.977610 end: 2 depthcharge-action (duration 00:05:00) [common]
2812 11:25:34.978389 Cleaning after the job
2813 11:25:34.978688 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12838136/tftp-deploy-8olk8tls/ramdisk
2814 11:25:34.982196 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12838136/tftp-deploy-8olk8tls/kernel
2815 11:25:34.987065 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12838136/tftp-deploy-8olk8tls/modules
2816 11:25:34.988509 start: 5.1 power-off (timeout 00:00:30) [common]
2817 11:25:34.988895 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=off'
2818 11:25:35.065206 >> Command sent successfully.
2819 11:25:35.073406 Returned 0 in 0 seconds
2820 11:25:35.174347 end: 5.1 power-off (duration 00:00:00) [common]
2822 11:25:35.175524 start: 5.2 read-feedback (timeout 00:10:00) [common]
2823 11:25:35.176340 Listened to connection for namespace 'common' for up to 1s
2825 11:25:35.177289 Listened to connection for namespace 'common' for up to 1s
2826 11:25:36.177248 Finalising connection for namespace 'common'
2827 11:25:36.177800 Disconnecting from shell: Finalise
2828 11:25:36.178111