Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 11:21:11.614055 lava-dispatcher, installed at version: 2024.01
2 11:21:11.614293 start: 0 validate
3 11:21:11.614446 Start time: 2024-02-23 11:21:11.614433+00:00 (UTC)
4 11:21:11.614594 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:21:11.614742 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 11:21:11.905602 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:21:11.906339 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-201-gc2afc54e2d6bb%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:21:18.423197 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:21:18.423922 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-201-gc2afc54e2d6bb%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 11:21:19.427771 validate duration: 7.81
12 11:21:19.428071 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:21:19.428188 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:21:19.428301 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:21:19.428442 Not decompressing ramdisk as can be used compressed.
16 11:21:19.428537 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 11:21:19.428608 saving as /var/lib/lava/dispatcher/tmp/12838110/tftp-deploy-mre6q8z_/ramdisk/rootfs.cpio.gz
18 11:21:19.428679 total size: 8418130 (8 MB)
19 11:21:19.429907 progress 0 % (0 MB)
20 11:21:19.432511 progress 5 % (0 MB)
21 11:21:19.435058 progress 10 % (0 MB)
22 11:21:19.437596 progress 15 % (1 MB)
23 11:21:19.440299 progress 20 % (1 MB)
24 11:21:19.442852 progress 25 % (2 MB)
25 11:21:19.445454 progress 30 % (2 MB)
26 11:21:19.448012 progress 35 % (2 MB)
27 11:21:19.450716 progress 40 % (3 MB)
28 11:21:19.453354 progress 45 % (3 MB)
29 11:21:19.455922 progress 50 % (4 MB)
30 11:21:19.458513 progress 55 % (4 MB)
31 11:21:19.461060 progress 60 % (4 MB)
32 11:21:19.463413 progress 65 % (5 MB)
33 11:21:19.465929 progress 70 % (5 MB)
34 11:21:19.468538 progress 75 % (6 MB)
35 11:21:19.471114 progress 80 % (6 MB)
36 11:21:19.473633 progress 85 % (6 MB)
37 11:21:19.476125 progress 90 % (7 MB)
38 11:21:19.478614 progress 95 % (7 MB)
39 11:21:19.480948 progress 100 % (8 MB)
40 11:21:19.481211 8 MB downloaded in 0.05 s (152.82 MB/s)
41 11:21:19.481383 end: 1.1.1 http-download (duration 00:00:00) [common]
43 11:21:19.481650 end: 1.1 download-retry (duration 00:00:00) [common]
44 11:21:19.481750 start: 1.2 download-retry (timeout 00:10:00) [common]
45 11:21:19.481845 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 11:21:19.481998 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-201-gc2afc54e2d6bb/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 11:21:19.482075 saving as /var/lib/lava/dispatcher/tmp/12838110/tftp-deploy-mre6q8z_/kernel/bzImage
48 11:21:19.482143 total size: 12349440 (11 MB)
49 11:21:19.482209 No compression specified
50 11:21:19.483477 progress 0 % (0 MB)
51 11:21:19.487098 progress 5 % (0 MB)
52 11:21:19.490823 progress 10 % (1 MB)
53 11:21:19.494542 progress 15 % (1 MB)
54 11:21:19.498238 progress 20 % (2 MB)
55 11:21:19.501950 progress 25 % (2 MB)
56 11:21:19.505636 progress 30 % (3 MB)
57 11:21:19.509204 progress 35 % (4 MB)
58 11:21:19.512902 progress 40 % (4 MB)
59 11:21:19.516586 progress 45 % (5 MB)
60 11:21:19.520272 progress 50 % (5 MB)
61 11:21:19.523950 progress 55 % (6 MB)
62 11:21:19.527641 progress 60 % (7 MB)
63 11:21:19.531131 progress 65 % (7 MB)
64 11:21:19.534797 progress 70 % (8 MB)
65 11:21:19.538391 progress 75 % (8 MB)
66 11:21:19.542105 progress 80 % (9 MB)
67 11:21:19.545704 progress 85 % (10 MB)
68 11:21:19.549335 progress 90 % (10 MB)
69 11:21:19.552929 progress 95 % (11 MB)
70 11:21:19.556363 progress 100 % (11 MB)
71 11:21:19.556620 11 MB downloaded in 0.07 s (158.14 MB/s)
72 11:21:19.556783 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:21:19.557038 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:21:19.557139 start: 1.3 download-retry (timeout 00:10:00) [common]
76 11:21:19.557234 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 11:21:19.557392 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-201-gc2afc54e2d6bb/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 11:21:19.557471 saving as /var/lib/lava/dispatcher/tmp/12838110/tftp-deploy-mre6q8z_/modules/modules.tar
79 11:21:19.557539 total size: 484664 (0 MB)
80 11:21:19.557608 Using unxz to decompress xz
81 11:21:19.562371 progress 6 % (0 MB)
82 11:21:19.562863 progress 13 % (0 MB)
83 11:21:19.563134 progress 20 % (0 MB)
84 11:21:19.564882 progress 27 % (0 MB)
85 11:21:19.567072 progress 33 % (0 MB)
86 11:21:19.569309 progress 40 % (0 MB)
87 11:21:19.571373 progress 47 % (0 MB)
88 11:21:19.573742 progress 54 % (0 MB)
89 11:21:19.575834 progress 60 % (0 MB)
90 11:21:19.578019 progress 67 % (0 MB)
91 11:21:19.580326 progress 74 % (0 MB)
92 11:21:19.582612 progress 81 % (0 MB)
93 11:21:19.584794 progress 87 % (0 MB)
94 11:21:19.586891 progress 94 % (0 MB)
95 11:21:19.589489 progress 100 % (0 MB)
96 11:21:19.596925 0 MB downloaded in 0.04 s (11.74 MB/s)
97 11:21:19.597212 end: 1.3.1 http-download (duration 00:00:00) [common]
99 11:21:19.597510 end: 1.3 download-retry (duration 00:00:00) [common]
100 11:21:19.597614 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 11:21:19.597719 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 11:21:19.597810 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 11:21:19.597900 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 11:21:19.598158 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo
105 11:21:19.598310 makedir: /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin
106 11:21:19.598427 makedir: /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/tests
107 11:21:19.598537 makedir: /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/results
108 11:21:19.598669 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-add-keys
109 11:21:19.598835 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-add-sources
110 11:21:19.598985 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-background-process-start
111 11:21:19.599133 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-background-process-stop
112 11:21:19.599279 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-common-functions
113 11:21:19.599422 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-echo-ipv4
114 11:21:19.599564 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-install-packages
115 11:21:19.599706 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-installed-packages
116 11:21:19.599847 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-os-build
117 11:21:19.599990 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-probe-channel
118 11:21:19.600133 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-probe-ip
119 11:21:19.600283 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-target-ip
120 11:21:19.600428 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-target-mac
121 11:21:19.600631 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-target-storage
122 11:21:19.600789 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-test-case
123 11:21:19.600935 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-test-event
124 11:21:19.601078 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-test-feedback
125 11:21:19.601223 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-test-raise
126 11:21:19.601369 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-test-reference
127 11:21:19.601516 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-test-runner
128 11:21:19.601659 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-test-set
129 11:21:19.601804 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-test-shell
130 11:21:19.601951 Updating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-install-packages (oe)
131 11:21:19.602124 Updating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/bin/lava-installed-packages (oe)
132 11:21:19.602273 Creating /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/environment
133 11:21:19.602392 LAVA metadata
134 11:21:19.602477 - LAVA_JOB_ID=12838110
135 11:21:19.602576 - LAVA_DISPATCHER_IP=192.168.201.1
136 11:21:19.602699 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 11:21:19.602773 skipped lava-vland-overlay
138 11:21:19.602859 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 11:21:19.602948 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 11:21:19.603018 skipped lava-multinode-overlay
141 11:21:19.603099 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 11:21:19.603190 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 11:21:19.603276 Loading test definitions
144 11:21:19.603393 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 11:21:19.603481 Using /lava-12838110 at stage 0
146 11:21:19.603834 uuid=12838110_1.4.2.3.1 testdef=None
147 11:21:19.603934 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 11:21:19.604027 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 11:21:19.604641 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 11:21:19.604888 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 11:21:19.605620 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 11:21:19.605875 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 11:21:19.606574 runner path: /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/0/tests/0_dmesg test_uuid 12838110_1.4.2.3.1
156 11:21:19.606755 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 11:21:19.607008 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 11:21:19.607088 Using /lava-12838110 at stage 1
160 11:21:19.607423 uuid=12838110_1.4.2.3.5 testdef=None
161 11:21:19.607523 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 11:21:19.607615 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 11:21:19.608159 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 11:21:19.608409 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 11:21:19.609210 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 11:21:19.609464 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 11:21:19.610180 runner path: /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/1/tests/1_bootrr test_uuid 12838110_1.4.2.3.5
170 11:21:19.610351 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 11:21:19.610581 Creating lava-test-runner.conf files
173 11:21:19.610651 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/0 for stage 0
174 11:21:19.610754 - 0_dmesg
175 11:21:19.610849 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12838110/lava-overlay-j_c9b_bo/lava-12838110/1 for stage 1
176 11:21:19.610953 - 1_bootrr
177 11:21:19.611059 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 11:21:19.611152 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 11:21:19.621163 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 11:21:19.621303 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 11:21:19.621398 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 11:21:19.621493 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 11:21:19.621587 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 11:21:19.913053 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 11:21:19.913498 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 11:21:19.913635 extracting modules file /var/lib/lava/dispatcher/tmp/12838110/tftp-deploy-mre6q8z_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12838110/extract-overlay-ramdisk-aze8xi5g/ramdisk
187 11:21:19.937045 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 11:21:19.937227 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 11:21:19.937335 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12838110/compress-overlay-pmu8ojzs/overlay-1.4.2.4.tar.gz to ramdisk
190 11:21:19.937421 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12838110/compress-overlay-pmu8ojzs/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12838110/extract-overlay-ramdisk-aze8xi5g/ramdisk
191 11:21:19.947387 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 11:21:19.947524 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 11:21:19.947628 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 11:21:19.947727 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 11:21:19.947814 Building ramdisk /var/lib/lava/dispatcher/tmp/12838110/extract-overlay-ramdisk-aze8xi5g/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12838110/extract-overlay-ramdisk-aze8xi5g/ramdisk
196 11:21:20.119873 >> 53982 blocks
197 11:21:21.123069 rename /var/lib/lava/dispatcher/tmp/12838110/extract-overlay-ramdisk-aze8xi5g/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12838110/tftp-deploy-mre6q8z_/ramdisk/ramdisk.cpio.gz
198 11:21:21.123573 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 11:21:21.123717 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 11:21:21.123837 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 11:21:21.123940 No mkimage arch provided, not using FIT.
202 11:21:21.124039 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 11:21:21.124130 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 11:21:21.124251 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
205 11:21:21.124357 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 11:21:21.124451 No LXC device requested
207 11:21:21.124542 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 11:21:21.124643 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 11:21:21.124734 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 11:21:21.124818 Checking files for TFTP limit of 4294967296 bytes.
211 11:21:21.125278 end: 1 tftp-deploy (duration 00:00:02) [common]
212 11:21:21.125399 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 11:21:21.125502 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 11:21:21.125644 substitutions:
215 11:21:21.125717 - {DTB}: None
216 11:21:21.125786 - {INITRD}: 12838110/tftp-deploy-mre6q8z_/ramdisk/ramdisk.cpio.gz
217 11:21:21.125850 - {KERNEL}: 12838110/tftp-deploy-mre6q8z_/kernel/bzImage
218 11:21:21.125914 - {LAVA_MAC}: None
219 11:21:21.125976 - {PRESEED_CONFIG}: None
220 11:21:21.126037 - {PRESEED_LOCAL}: None
221 11:21:21.126098 - {RAMDISK}: 12838110/tftp-deploy-mre6q8z_/ramdisk/ramdisk.cpio.gz
222 11:21:21.126159 - {ROOT_PART}: None
223 11:21:21.126219 - {ROOT}: None
224 11:21:21.126279 - {SERVER_IP}: 192.168.201.1
225 11:21:21.126338 - {TEE}: None
226 11:21:21.126398 Parsed boot commands:
227 11:21:21.126456 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 11:21:21.126659 Parsed boot commands: tftpboot 192.168.201.1 12838110/tftp-deploy-mre6q8z_/kernel/bzImage 12838110/tftp-deploy-mre6q8z_/kernel/cmdline 12838110/tftp-deploy-mre6q8z_/ramdisk/ramdisk.cpio.gz
229 11:21:21.126759 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 11:21:21.126849 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 11:21:21.126946 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 11:21:21.127041 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 11:21:21.127117 Not connected, no need to disconnect.
234 11:21:21.127197 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 11:21:21.127285 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 11:21:21.127365 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
237 11:21:21.131987 Setting prompt string to ['lava-test: # ']
238 11:21:21.132457 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 11:21:21.132589 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 11:21:21.132706 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 11:21:21.132809 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 11:21:21.133183 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
243 11:21:26.271904 >> Command sent successfully.
244 11:21:26.274582 Returned 0 in 5 seconds
245 11:21:26.375020 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 11:21:26.375369 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 11:21:26.375478 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 11:21:26.375580 Setting prompt string to 'Starting depthcharge on Helios...'
250 11:21:26.375658 Changing prompt to 'Starting depthcharge on Helios...'
251 11:21:26.375734 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 11:21:26.376035 [Enter `^Ec?' for help]
253 11:21:26.997904
254 11:21:26.998073
255 11:21:27.008098 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 11:21:27.011170 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 11:21:27.017858 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 11:21:27.021345 CPU: AES supported, TXT NOT supported, VT supported
259 11:21:27.028326 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 11:21:27.031491 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 11:21:27.038257 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 11:21:27.041540 VBOOT: Loading verstage.
263 11:21:27.044827 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 11:21:27.051646 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 11:21:27.054814 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 11:21:27.058374 CBFS @ c08000 size 3f8000
267 11:21:27.064704 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 11:21:27.068574 CBFS: Locating 'fallback/verstage'
269 11:21:27.071486 CBFS: Found @ offset 10fb80 size 1072c
270 11:21:27.071578
271 11:21:27.074938
272 11:21:27.085040 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 11:21:27.098812 Probing TPM: . done!
274 11:21:27.102291 TPM ready after 0 ms
275 11:21:27.105430 Connected to device vid:did:rid of 1ae0:0028:00
276 11:21:27.116092 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
277 11:21:27.155937 Initialized TPM device CR50 revision 0
278 11:21:27.165275 tlcl_send_startup: Startup return code is 0
279 11:21:27.165388 TPM: setup succeeded
280 11:21:27.177754 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 11:21:27.181436 Chrome EC: UHEPI supported
282 11:21:27.184567 Phase 1
283 11:21:27.188465 FMAP: area GBB found @ c05000 (12288 bytes)
284 11:21:27.194792 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 11:21:27.194907 Phase 2
286 11:21:27.197902 Phase 3
287 11:21:27.201598 FMAP: area GBB found @ c05000 (12288 bytes)
288 11:21:27.208084 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 11:21:27.215208 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
290 11:21:27.217965 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
291 11:21:27.224507 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 11:21:27.240038 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
293 11:21:27.243757 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
294 11:21:27.250029 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 11:21:27.254575 Phase 4
296 11:21:27.257727 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
297 11:21:27.264071 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 11:21:27.443447 VB2:vb2_rsa_verify_digest() Digest check failed!
299 11:21:27.450111 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 11:21:27.450268 Saving nvdata
301 11:21:27.453796 Reboot requested (10020007)
302 11:21:27.457142 board_reset() called!
303 11:21:27.457275 full_reset() called!
304 11:21:31.966259
305 11:21:31.966753
306 11:21:31.975845 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 11:21:31.979260 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 11:21:31.985644 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 11:21:31.988929 CPU: AES supported, TXT NOT supported, VT supported
310 11:21:31.995770 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 11:21:31.998917 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 11:21:32.005776 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 11:21:32.009131 VBOOT: Loading verstage.
314 11:21:32.012025 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 11:21:32.019021 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 11:21:32.022026 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 11:21:32.025728 CBFS @ c08000 size 3f8000
318 11:21:32.032315 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 11:21:32.036059 CBFS: Locating 'fallback/verstage'
320 11:21:32.038818 CBFS: Found @ offset 10fb80 size 1072c
321 11:21:32.042289
322 11:21:32.042773
323 11:21:32.052079 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 11:21:32.066748 Probing TPM: . done!
325 11:21:32.070280 TPM ready after 0 ms
326 11:21:32.073069 Connected to device vid:did:rid of 1ae0:0028:00
327 11:21:32.083415 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
328 11:21:32.122948 Initialized TPM device CR50 revision 0
329 11:21:32.131767 tlcl_send_startup: Startup return code is 0
330 11:21:32.132318 TPM: setup succeeded
331 11:21:32.144421 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 11:21:32.148779 Chrome EC: UHEPI supported
333 11:21:32.151491 Phase 1
334 11:21:32.154960 FMAP: area GBB found @ c05000 (12288 bytes)
335 11:21:32.161046 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 11:21:32.168077 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 11:21:32.171097 Recovery requested (1009000e)
338 11:21:32.176963 Saving nvdata
339 11:21:32.183200 tlcl_extend: response is 0
340 11:21:32.192181 tlcl_extend: response is 0
341 11:21:32.198675 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 11:21:32.202553 CBFS @ c08000 size 3f8000
343 11:21:32.208835 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 11:21:32.212136 CBFS: Locating 'fallback/romstage'
345 11:21:32.215969 CBFS: Found @ offset 80 size 145fc
346 11:21:32.218706 Accumulated console time in verstage 98 ms
347 11:21:32.219206
348 11:21:32.219516
349 11:21:32.232313 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 11:21:32.239054 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 11:21:32.242469 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 11:21:32.245714 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 11:21:32.252517 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 11:21:32.255223 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 11:21:32.258807 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 11:21:32.262213 TCO_STS: 0000 0000
357 11:21:32.265485 GEN_PMCON: e0015238 00000200
358 11:21:32.269051 GBLRST_CAUSE: 00000000 00000000
359 11:21:32.269555 prev_sleep_state 5
360 11:21:32.272459 Boot Count incremented to 70597
361 11:21:32.278695 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 11:21:32.282026 CBFS @ c08000 size 3f8000
363 11:21:32.289112 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 11:21:32.289652 CBFS: Locating 'fspm.bin'
365 11:21:32.292586 CBFS: Found @ offset 5ffc0 size 71000
366 11:21:32.296325 Chrome EC: UHEPI supported
367 11:21:32.304203 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 11:21:32.309229 Probing TPM: done!
369 11:21:32.315908 Connected to device vid:did:rid of 1ae0:0028:00
370 11:21:32.325847 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
371 11:21:32.331412 Initialized TPM device CR50 revision 0
372 11:21:32.340744 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 11:21:32.347341 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 11:21:32.351036 MRC cache found, size 1948
375 11:21:32.353865 bootmode is set to: 2
376 11:21:32.356700 PRMRR disabled by config.
377 11:21:32.357164 SPD INDEX = 1
378 11:21:32.363842 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 11:21:32.367724 CBFS @ c08000 size 3f8000
380 11:21:32.373556 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 11:21:32.374095 CBFS: Locating 'spd.bin'
382 11:21:32.377235 CBFS: Found @ offset 5fb80 size 400
383 11:21:32.380018 SPD: module type is LPDDR3
384 11:21:32.384035 SPD: module part is
385 11:21:32.390530 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 11:21:32.393681 SPD: device width 4 bits, bus width 8 bits
387 11:21:32.397105 SPD: module size is 4096 MB (per channel)
388 11:21:32.400187 memory slot: 0 configuration done.
389 11:21:32.403279 memory slot: 2 configuration done.
390 11:21:32.454987 CBMEM:
391 11:21:32.457763 IMD: root @ 99fff000 254 entries.
392 11:21:32.461825 IMD: root @ 99ffec00 62 entries.
393 11:21:32.464659 External stage cache:
394 11:21:32.467842 IMD: root @ 9abff000 254 entries.
395 11:21:32.471520 IMD: root @ 9abfec00 62 entries.
396 11:21:32.474943 Chrome EC: clear events_b mask to 0x0000000020004000
397 11:21:32.490791 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 11:21:32.503915 tlcl_write: response is 0
399 11:21:32.512565 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 11:21:32.519254 MRC: TPM MRC hash updated successfully.
401 11:21:32.519359 2 DIMMs found
402 11:21:32.522714 SMM Memory Map
403 11:21:32.526669 SMRAM : 0x9a000000 0x1000000
404 11:21:32.529549 Subregion 0: 0x9a000000 0xa00000
405 11:21:32.532614 Subregion 1: 0x9aa00000 0x200000
406 11:21:32.536203 Subregion 2: 0x9ac00000 0x400000
407 11:21:32.539825 top_of_ram = 0x9a000000
408 11:21:32.542780 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 11:21:32.549269 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 11:21:32.552901 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 11:21:32.560052 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 11:21:32.560200 CBFS @ c08000 size 3f8000
413 11:21:32.566139 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 11:21:32.569968 CBFS: Locating 'fallback/postcar'
415 11:21:32.572791 CBFS: Found @ offset 107000 size 4b44
416 11:21:32.579959 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 11:21:32.591373 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 11:21:32.595022 Processing 180 relocs. Offset value of 0x97c0c000
419 11:21:32.602884 Accumulated console time in romstage 285 ms
420 11:21:32.603005
421 11:21:32.603081
422 11:21:32.612995 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 11:21:32.619924 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 11:21:32.623153 CBFS @ c08000 size 3f8000
425 11:21:32.627034 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 11:21:32.629899 CBFS: Locating 'fallback/ramstage'
427 11:21:32.636573 CBFS: Found @ offset 43380 size 1b9e8
428 11:21:32.643042 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 11:21:32.675199 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 11:21:32.678126 Processing 3976 relocs. Offset value of 0x98db0000
431 11:21:32.684633 Accumulated console time in postcar 52 ms
432 11:21:32.684800
433 11:21:32.684907
434 11:21:32.694964 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 11:21:32.701262 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 11:21:32.704728 WARNING: RO_VPD is uninitialized or empty.
437 11:21:32.708078 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 11:21:32.714693 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 11:21:32.714835 Normal boot.
440 11:21:32.721249 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 11:21:32.724648 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 11:21:32.727917 CBFS @ c08000 size 3f8000
443 11:21:32.734922 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 11:21:32.738137 CBFS: Locating 'cpu_microcode_blob.bin'
445 11:21:32.740932 CBFS: Found @ offset 14700 size 2ec00
446 11:21:32.744561 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 11:21:32.748110 Skip microcode update
448 11:21:32.751082 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 11:21:32.754662 CBFS @ c08000 size 3f8000
450 11:21:32.761306 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 11:21:32.764302 CBFS: Locating 'fsps.bin'
452 11:21:32.767608 CBFS: Found @ offset d1fc0 size 35000
453 11:21:32.792726 Detected 4 core, 8 thread CPU.
454 11:21:32.795961 Setting up SMI for CPU
455 11:21:32.799675 IED base = 0x9ac00000
456 11:21:32.799804 IED size = 0x00400000
457 11:21:32.802971 Will perform SMM setup.
458 11:21:32.809620 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 11:21:32.816419 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 11:21:32.819323 Processing 16 relocs. Offset value of 0x00030000
461 11:21:32.823019 Attempting to start 7 APs
462 11:21:32.826522 Waiting for 10ms after sending INIT.
463 11:21:32.842727 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
464 11:21:32.842915 done.
465 11:21:32.846068 AP: slot 7 apic_id 7.
466 11:21:32.849304 AP: slot 6 apic_id 6.
467 11:21:32.849423 AP: slot 1 apic_id 3.
468 11:21:32.852351 AP: slot 4 apic_id 2.
469 11:21:32.855712 AP: slot 5 apic_id 5.
470 11:21:32.855841 AP: slot 2 apic_id 4.
471 11:21:32.862245 Waiting for 2nd SIPI to complete...done.
472 11:21:32.869228 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 11:21:32.872165 Processing 13 relocs. Offset value of 0x00038000
474 11:21:32.878772 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 11:21:32.885919 Installing SMM handler to 0x9a000000
476 11:21:32.892187 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 11:21:32.896010 Processing 658 relocs. Offset value of 0x9a010000
478 11:21:32.905705 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 11:21:32.908965 Processing 13 relocs. Offset value of 0x9a008000
480 11:21:32.915521 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 11:21:32.922102 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 11:21:32.925938 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 11:21:32.932193 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 11:21:32.938674 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 11:21:32.945370 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 11:21:32.949188 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 11:21:32.955334 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 11:21:32.959189 Clearing SMI status registers
489 11:21:32.962267 SMI_STS: PM1
490 11:21:32.962367 PM1_STS: PWRBTN
491 11:21:32.965511 TCO_STS: SECOND_TO
492 11:21:32.968898 New SMBASE 0x9a000000
493 11:21:32.968992 In relocation handler: CPU 0
494 11:21:32.975415 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 11:21:32.979022 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 11:21:32.982099 Relocation complete.
497 11:21:32.982237 New SMBASE 0x99fff400
498 11:21:32.985678 In relocation handler: CPU 3
499 11:21:32.992270 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
500 11:21:32.995282 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 11:21:32.998767 Relocation complete.
502 11:21:32.998932 New SMBASE 0x99ffe400
503 11:21:33.001886 In relocation handler: CPU 7
504 11:21:33.008847 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
505 11:21:33.012053 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 11:21:33.015385 Relocation complete.
507 11:21:33.015487 New SMBASE 0x99fff800
508 11:21:33.018864 In relocation handler: CPU 2
509 11:21:33.022019 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
510 11:21:33.029039 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 11:21:33.031894 Relocation complete.
512 11:21:33.031988 New SMBASE 0x99ffec00
513 11:21:33.035462 In relocation handler: CPU 5
514 11:21:33.038528 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
515 11:21:33.045298 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 11:21:33.045396 Relocation complete.
517 11:21:33.048624 New SMBASE 0x99ffe800
518 11:21:33.052230 In relocation handler: CPU 6
519 11:21:33.055529 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
520 11:21:33.061986 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 11:21:33.062136 Relocation complete.
522 11:21:33.065282 New SMBASE 0x99fff000
523 11:21:33.068886 In relocation handler: CPU 4
524 11:21:33.071919 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
525 11:21:33.078447 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 11:21:33.078610 Relocation complete.
527 11:21:33.082287 New SMBASE 0x99fffc00
528 11:21:33.085205 In relocation handler: CPU 1
529 11:21:33.088530 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
530 11:21:33.095374 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 11:21:33.095482 Relocation complete.
532 11:21:33.098610 Initializing CPU #0
533 11:21:33.101835 CPU: vendor Intel device 806ec
534 11:21:33.104876 CPU: family 06, model 8e, stepping 0c
535 11:21:33.108647 Clearing out pending MCEs
536 11:21:33.111769 Setting up local APIC...
537 11:21:33.111863 apic_id: 0x00 done.
538 11:21:33.115043 Turbo is available but hidden
539 11:21:33.118597 Turbo is available and visible
540 11:21:33.121880 VMX status: enabled
541 11:21:33.124873 IA32_FEATURE_CONTROL status: locked
542 11:21:33.124967 Skip microcode update
543 11:21:33.128402 CPU #0 initialized
544 11:21:33.132116 Initializing CPU #3
545 11:21:33.132238 Initializing CPU #5
546 11:21:33.135101 Initializing CPU #2
547 11:21:33.138633 CPU: vendor Intel device 806ec
548 11:21:33.141662 CPU: family 06, model 8e, stepping 0c
549 11:21:33.145255 CPU: vendor Intel device 806ec
550 11:21:33.148409 CPU: family 06, model 8e, stepping 0c
551 11:21:33.151610 Clearing out pending MCEs
552 11:21:33.155143 Clearing out pending MCEs
553 11:21:33.155237 Setting up local APIC...
554 11:21:33.158462 CPU: vendor Intel device 806ec
555 11:21:33.161793 CPU: family 06, model 8e, stepping 0c
556 11:21:33.164864 Clearing out pending MCEs
557 11:21:33.168256 Setting up local APIC...
558 11:21:33.171714 Initializing CPU #6
559 11:21:33.171812 apic_id: 0x04 done.
560 11:21:33.175408 apic_id: 0x05 done.
561 11:21:33.178301 VMX status: enabled
562 11:21:33.178492 VMX status: enabled
563 11:21:33.182032 IA32_FEATURE_CONTROL status: locked
564 11:21:33.185095 IA32_FEATURE_CONTROL status: locked
565 11:21:33.188220 Skip microcode update
566 11:21:33.191712 Skip microcode update
567 11:21:33.191838 Setting up local APIC...
568 11:21:33.194834 CPU #5 initialized
569 11:21:33.197942 CPU #2 initialized
570 11:21:33.198057 Initializing CPU #4
571 11:21:33.201707 Initializing CPU #1
572 11:21:33.204962 CPU: vendor Intel device 806ec
573 11:21:33.208231 CPU: family 06, model 8e, stepping 0c
574 11:21:33.211487 CPU: vendor Intel device 806ec
575 11:21:33.215154 CPU: family 06, model 8e, stepping 0c
576 11:21:33.218027 Clearing out pending MCEs
577 11:21:33.221626 Clearing out pending MCEs
578 11:21:33.221719 Setting up local APIC...
579 11:21:33.225065 Initializing CPU #7
580 11:21:33.228223 CPU: vendor Intel device 806ec
581 11:21:33.231200 CPU: family 06, model 8e, stepping 0c
582 11:21:33.234791 CPU: vendor Intel device 806ec
583 11:21:33.238190 CPU: family 06, model 8e, stepping 0c
584 11:21:33.241462 Clearing out pending MCEs
585 11:21:33.245012 Clearing out pending MCEs
586 11:21:33.245138 Setting up local APIC...
587 11:21:33.247920 Setting up local APIC...
588 11:21:33.251466 Setting up local APIC...
589 11:21:33.254993 apic_id: 0x01 done.
590 11:21:33.255114 apic_id: 0x02 done.
591 11:21:33.258023 apic_id: 0x03 done.
592 11:21:33.261253 VMX status: enabled
593 11:21:33.261390 VMX status: enabled
594 11:21:33.264690 IA32_FEATURE_CONTROL status: locked
595 11:21:33.268347 IA32_FEATURE_CONTROL status: locked
596 11:21:33.271371 Skip microcode update
597 11:21:33.274826 Skip microcode update
598 11:21:33.274941 CPU #4 initialized
599 11:21:33.278108 CPU #1 initialized
600 11:21:33.278236 VMX status: enabled
601 11:21:33.281703 apic_id: 0x06 done.
602 11:21:33.284807 apic_id: 0x07 done.
603 11:21:33.284926 VMX status: enabled
604 11:21:33.288054 VMX status: enabled
605 11:21:33.291183 IA32_FEATURE_CONTROL status: locked
606 11:21:33.294881 IA32_FEATURE_CONTROL status: locked
607 11:21:33.298559 Skip microcode update
608 11:21:33.298679 Skip microcode update
609 11:21:33.301277 CPU #6 initialized
610 11:21:33.304506 CPU #7 initialized
611 11:21:33.307937 IA32_FEATURE_CONTROL status: locked
612 11:21:33.308054 Skip microcode update
613 11:21:33.311666 CPU #3 initialized
614 11:21:33.314915 bsp_do_flight_plan done after 452 msecs.
615 11:21:33.318260 CPU: frequency set to 4200 MHz
616 11:21:33.320922 Enabling SMIs.
617 11:21:33.321042 Locking SMM.
618 11:21:33.336634 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 11:21:33.340445 CBFS @ c08000 size 3f8000
620 11:21:33.343414 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 11:21:33.346695 CBFS: Locating 'vbt.bin'
622 11:21:33.349442 CBFS: Found @ offset 5f5c0 size 499
623 11:21:33.356411 Found a VBT of 4608 bytes after decompression
624 11:21:33.539581 Display FSP Version Info HOB
625 11:21:33.542496 Reference Code - CPU = 9.0.1e.30
626 11:21:33.545575 uCode Version = 0.0.0.ca
627 11:21:33.549157 TXT ACM version = ff.ff.ff.ffff
628 11:21:33.552567 Display FSP Version Info HOB
629 11:21:33.555857 Reference Code - ME = 9.0.1e.30
630 11:21:33.559080 MEBx version = 0.0.0.0
631 11:21:33.562260 ME Firmware Version = Consumer SKU
632 11:21:33.565705 Display FSP Version Info HOB
633 11:21:33.569164 Reference Code - CML PCH = 9.0.1e.30
634 11:21:33.572264 PCH-CRID Status = Disabled
635 11:21:33.575433 PCH-CRID Original Value = ff.ff.ff.ffff
636 11:21:33.579035 PCH-CRID New Value = ff.ff.ff.ffff
637 11:21:33.582597 OPROM - RST - RAID = ff.ff.ff.ffff
638 11:21:33.585849 ChipsetInit Base Version = ff.ff.ff.ffff
639 11:21:33.589244 ChipsetInit Oem Version = ff.ff.ff.ffff
640 11:21:33.592366 Display FSP Version Info HOB
641 11:21:33.598912 Reference Code - SA - System Agent = 9.0.1e.30
642 11:21:33.599096 Reference Code - MRC = 0.7.1.6c
643 11:21:33.602383 SA - PCIe Version = 9.0.1e.30
644 11:21:33.605634 SA-CRID Status = Disabled
645 11:21:33.608703 SA-CRID Original Value = 0.0.0.c
646 11:21:33.612207 SA-CRID New Value = 0.0.0.c
647 11:21:33.615955 OPROM - VBIOS = ff.ff.ff.ffff
648 11:21:33.616129 RTC Init
649 11:21:33.622366 Set power on after power failure.
650 11:21:33.622545 Disabling Deep S3
651 11:21:33.625972 Disabling Deep S3
652 11:21:33.626147 Disabling Deep S4
653 11:21:33.629062 Disabling Deep S4
654 11:21:33.629241 Disabling Deep S5
655 11:21:33.632215 Disabling Deep S5
656 11:21:33.638945 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
657 11:21:33.639124 Enumerating buses...
658 11:21:33.645517 Show all devs... Before device enumeration.
659 11:21:33.645696 Root Device: enabled 1
660 11:21:33.649023 CPU_CLUSTER: 0: enabled 1
661 11:21:33.652666 DOMAIN: 0000: enabled 1
662 11:21:33.652841 APIC: 00: enabled 1
663 11:21:33.655506 PCI: 00:00.0: enabled 1
664 11:21:33.659129 PCI: 00:02.0: enabled 1
665 11:21:33.662082 PCI: 00:04.0: enabled 0
666 11:21:33.662259 PCI: 00:05.0: enabled 0
667 11:21:33.665573 PCI: 00:12.0: enabled 1
668 11:21:33.668807 PCI: 00:12.5: enabled 0
669 11:21:33.672214 PCI: 00:12.6: enabled 0
670 11:21:33.672404 PCI: 00:14.0: enabled 1
671 11:21:33.675397 PCI: 00:14.1: enabled 0
672 11:21:33.679145 PCI: 00:14.3: enabled 1
673 11:21:33.679320 PCI: 00:14.5: enabled 0
674 11:21:33.682566 PCI: 00:15.0: enabled 1
675 11:21:33.686139 PCI: 00:15.1: enabled 1
676 11:21:33.689028 PCI: 00:15.2: enabled 0
677 11:21:33.689204 PCI: 00:15.3: enabled 0
678 11:21:33.692212 PCI: 00:16.0: enabled 1
679 11:21:33.695946 PCI: 00:16.1: enabled 0
680 11:21:33.698939 PCI: 00:16.2: enabled 0
681 11:21:33.699121 PCI: 00:16.3: enabled 0
682 11:21:33.702008 PCI: 00:16.4: enabled 0
683 11:21:33.705755 PCI: 00:16.5: enabled 0
684 11:21:33.709058 PCI: 00:17.0: enabled 1
685 11:21:33.709232 PCI: 00:19.0: enabled 1
686 11:21:33.712156 PCI: 00:19.1: enabled 0
687 11:21:33.715593 PCI: 00:19.2: enabled 0
688 11:21:33.715769 PCI: 00:1a.0: enabled 0
689 11:21:33.718681 PCI: 00:1c.0: enabled 0
690 11:21:33.722020 PCI: 00:1c.1: enabled 0
691 11:21:33.725777 PCI: 00:1c.2: enabled 0
692 11:21:33.725952 PCI: 00:1c.3: enabled 0
693 11:21:33.729376 PCI: 00:1c.4: enabled 0
694 11:21:33.732534 PCI: 00:1c.5: enabled 0
695 11:21:33.735842 PCI: 00:1c.6: enabled 0
696 11:21:33.736015 PCI: 00:1c.7: enabled 0
697 11:21:33.738994 PCI: 00:1d.0: enabled 1
698 11:21:33.742090 PCI: 00:1d.1: enabled 0
699 11:21:33.745678 PCI: 00:1d.2: enabled 0
700 11:21:33.745853 PCI: 00:1d.3: enabled 0
701 11:21:33.748620 PCI: 00:1d.4: enabled 0
702 11:21:33.752329 PCI: 00:1d.5: enabled 1
703 11:21:33.752503 PCI: 00:1e.0: enabled 1
704 11:21:33.755353 PCI: 00:1e.1: enabled 0
705 11:21:33.758710 PCI: 00:1e.2: enabled 1
706 11:21:33.762240 PCI: 00:1e.3: enabled 1
707 11:21:33.762412 PCI: 00:1f.0: enabled 1
708 11:21:33.765687 PCI: 00:1f.1: enabled 1
709 11:21:33.768715 PCI: 00:1f.2: enabled 1
710 11:21:33.772201 PCI: 00:1f.3: enabled 1
711 11:21:33.772388 PCI: 00:1f.4: enabled 1
712 11:21:33.775748 PCI: 00:1f.5: enabled 1
713 11:21:33.778980 PCI: 00:1f.6: enabled 0
714 11:21:33.779078 USB0 port 0: enabled 1
715 11:21:33.782056 I2C: 00:15: enabled 1
716 11:21:33.785615 I2C: 00:5d: enabled 1
717 11:21:33.785708 GENERIC: 0.0: enabled 1
718 11:21:33.788705 I2C: 00:1a: enabled 1
719 11:21:33.792232 I2C: 00:38: enabled 1
720 11:21:33.795274 I2C: 00:39: enabled 1
721 11:21:33.795366 I2C: 00:3a: enabled 1
722 11:21:33.798965 I2C: 00:3b: enabled 1
723 11:21:33.802458 PCI: 00:00.0: enabled 1
724 11:21:33.802550 SPI: 00: enabled 1
725 11:21:33.805277 SPI: 01: enabled 1
726 11:21:33.805368 PNP: 0c09.0: enabled 1
727 11:21:33.808700 USB2 port 0: enabled 1
728 11:21:33.812256 USB2 port 1: enabled 1
729 11:21:33.815424 USB2 port 2: enabled 0
730 11:21:33.815516 USB2 port 3: enabled 0
731 11:21:33.818730 USB2 port 5: enabled 0
732 11:21:33.821949 USB2 port 6: enabled 1
733 11:21:33.822041 USB2 port 9: enabled 1
734 11:21:33.825193 USB3 port 0: enabled 1
735 11:21:33.828356 USB3 port 1: enabled 1
736 11:21:33.831758 USB3 port 2: enabled 1
737 11:21:33.831850 USB3 port 3: enabled 1
738 11:21:33.835822 USB3 port 4: enabled 0
739 11:21:33.838978 APIC: 03: enabled 1
740 11:21:33.839070 APIC: 04: enabled 1
741 11:21:33.842096 APIC: 01: enabled 1
742 11:21:33.842188 APIC: 02: enabled 1
743 11:21:33.845111 APIC: 05: enabled 1
744 11:21:33.848618 APIC: 06: enabled 1
745 11:21:33.848710 APIC: 07: enabled 1
746 11:21:33.851706 Compare with tree...
747 11:21:33.855278 Root Device: enabled 1
748 11:21:33.855371 CPU_CLUSTER: 0: enabled 1
749 11:21:33.858381 APIC: 00: enabled 1
750 11:21:33.861991 APIC: 03: enabled 1
751 11:21:33.862085 APIC: 04: enabled 1
752 11:21:33.865099 APIC: 01: enabled 1
753 11:21:33.868596 APIC: 02: enabled 1
754 11:21:33.868688 APIC: 05: enabled 1
755 11:21:33.872138 APIC: 06: enabled 1
756 11:21:33.875165 APIC: 07: enabled 1
757 11:21:33.878232 DOMAIN: 0000: enabled 1
758 11:21:33.878324 PCI: 00:00.0: enabled 1
759 11:21:33.881866 PCI: 00:02.0: enabled 1
760 11:21:33.884864 PCI: 00:04.0: enabled 0
761 11:21:33.888193 PCI: 00:05.0: enabled 0
762 11:21:33.891786 PCI: 00:12.0: enabled 1
763 11:21:33.891878 PCI: 00:12.5: enabled 0
764 11:21:33.895107 PCI: 00:12.6: enabled 0
765 11:21:33.898556 PCI: 00:14.0: enabled 1
766 11:21:33.901483 USB0 port 0: enabled 1
767 11:21:33.904733 USB2 port 0: enabled 1
768 11:21:33.904826 USB2 port 1: enabled 1
769 11:21:33.908183 USB2 port 2: enabled 0
770 11:21:33.911689 USB2 port 3: enabled 0
771 11:21:33.915139 USB2 port 5: enabled 0
772 11:21:33.918071 USB2 port 6: enabled 1
773 11:21:33.918163 USB2 port 9: enabled 1
774 11:21:33.921471 USB3 port 0: enabled 1
775 11:21:33.924899 USB3 port 1: enabled 1
776 11:21:33.928286 USB3 port 2: enabled 1
777 11:21:33.931802 USB3 port 3: enabled 1
778 11:21:33.935040 USB3 port 4: enabled 0
779 11:21:33.935222 PCI: 00:14.1: enabled 0
780 11:21:33.938433 PCI: 00:14.3: enabled 1
781 11:21:33.941266 PCI: 00:14.5: enabled 0
782 11:21:33.945120 PCI: 00:15.0: enabled 1
783 11:21:33.945293 I2C: 00:15: enabled 1
784 11:21:33.948108 PCI: 00:15.1: enabled 1
785 11:21:33.951429 I2C: 00:5d: enabled 1
786 11:21:33.954678 GENERIC: 0.0: enabled 1
787 11:21:33.958217 PCI: 00:15.2: enabled 0
788 11:21:33.958313 PCI: 00:15.3: enabled 0
789 11:21:33.961582 PCI: 00:16.0: enabled 1
790 11:21:33.964916 PCI: 00:16.1: enabled 0
791 11:21:33.968442 PCI: 00:16.2: enabled 0
792 11:21:33.971473 PCI: 00:16.3: enabled 0
793 11:21:33.971565 PCI: 00:16.4: enabled 0
794 11:21:33.974695 PCI: 00:16.5: enabled 0
795 11:21:33.978317 PCI: 00:17.0: enabled 1
796 11:21:33.981790 PCI: 00:19.0: enabled 1
797 11:21:33.981885 I2C: 00:1a: enabled 1
798 11:21:33.984824 I2C: 00:38: enabled 1
799 11:21:33.988088 I2C: 00:39: enabled 1
800 11:21:33.991375 I2C: 00:3a: enabled 1
801 11:21:33.994726 I2C: 00:3b: enabled 1
802 11:21:33.994825 PCI: 00:19.1: enabled 0
803 11:21:33.998064 PCI: 00:19.2: enabled 0
804 11:21:34.001317 PCI: 00:1a.0: enabled 0
805 11:21:34.004563 PCI: 00:1c.0: enabled 0
806 11:21:34.008220 PCI: 00:1c.1: enabled 0
807 11:21:34.008333 PCI: 00:1c.2: enabled 0
808 11:21:34.011514 PCI: 00:1c.3: enabled 0
809 11:21:34.014583 PCI: 00:1c.4: enabled 0
810 11:21:34.018251 PCI: 00:1c.5: enabled 0
811 11:21:34.018344 PCI: 00:1c.6: enabled 0
812 11:21:34.021617 PCI: 00:1c.7: enabled 0
813 11:21:34.024610 PCI: 00:1d.0: enabled 1
814 11:21:34.028035 PCI: 00:1d.1: enabled 0
815 11:21:34.031211 PCI: 00:1d.2: enabled 0
816 11:21:34.031303 PCI: 00:1d.3: enabled 0
817 11:21:34.034602 PCI: 00:1d.4: enabled 0
818 11:21:34.037686 PCI: 00:1d.5: enabled 1
819 11:21:34.041405 PCI: 00:00.0: enabled 1
820 11:21:34.044403 PCI: 00:1e.0: enabled 1
821 11:21:34.044496 PCI: 00:1e.1: enabled 0
822 11:21:34.048189 PCI: 00:1e.2: enabled 1
823 11:21:34.051576 SPI: 00: enabled 1
824 11:21:34.054574 PCI: 00:1e.3: enabled 1
825 11:21:34.054667 SPI: 01: enabled 1
826 11:21:34.058050 PCI: 00:1f.0: enabled 1
827 11:21:34.061098 PNP: 0c09.0: enabled 1
828 11:21:34.064362 PCI: 00:1f.1: enabled 1
829 11:21:34.064454 PCI: 00:1f.2: enabled 1
830 11:21:34.067793 PCI: 00:1f.3: enabled 1
831 11:21:34.071400 PCI: 00:1f.4: enabled 1
832 11:21:34.074807 PCI: 00:1f.5: enabled 1
833 11:21:34.077578 PCI: 00:1f.6: enabled 0
834 11:21:34.077671 Root Device scanning...
835 11:21:34.081165 scan_static_bus for Root Device
836 11:21:34.084354 CPU_CLUSTER: 0 enabled
837 11:21:34.087820 DOMAIN: 0000 enabled
838 11:21:34.091295 DOMAIN: 0000 scanning...
839 11:21:34.094702 PCI: pci_scan_bus for bus 00
840 11:21:34.094794 PCI: 00:00.0 [8086/0000] ops
841 11:21:34.097716 PCI: 00:00.0 [8086/9b61] enabled
842 11:21:34.101377 PCI: 00:02.0 [8086/0000] bus ops
843 11:21:34.104409 PCI: 00:02.0 [8086/9b41] enabled
844 11:21:34.107803 PCI: 00:04.0 [8086/1903] disabled
845 11:21:34.111330 PCI: 00:08.0 [8086/1911] enabled
846 11:21:34.114469 PCI: 00:12.0 [8086/02f9] enabled
847 11:21:34.117705 PCI: 00:14.0 [8086/0000] bus ops
848 11:21:34.121535 PCI: 00:14.0 [8086/02ed] enabled
849 11:21:34.124445 PCI: 00:14.2 [8086/02ef] enabled
850 11:21:34.127837 PCI: 00:14.3 [8086/02f0] enabled
851 11:21:34.130860 PCI: 00:15.0 [8086/0000] bus ops
852 11:21:34.134517 PCI: 00:15.0 [8086/02e8] enabled
853 11:21:34.137416 PCI: 00:15.1 [8086/0000] bus ops
854 11:21:34.140901 PCI: 00:15.1 [8086/02e9] enabled
855 11:21:34.144513 PCI: 00:16.0 [8086/0000] ops
856 11:21:34.147540 PCI: 00:16.0 [8086/02e0] enabled
857 11:21:34.150875 PCI: 00:17.0 [8086/0000] ops
858 11:21:34.154415 PCI: 00:17.0 [8086/02d3] enabled
859 11:21:34.157817 PCI: 00:19.0 [8086/0000] bus ops
860 11:21:34.160930 PCI: 00:19.0 [8086/02c5] enabled
861 11:21:34.164602 PCI: 00:1d.0 [8086/0000] bus ops
862 11:21:34.167462 PCI: 00:1d.0 [8086/02b0] enabled
863 11:21:34.174176 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 11:21:34.177622 PCI: 00:1e.0 [8086/0000] ops
865 11:21:34.180824 PCI: 00:1e.0 [8086/02a8] enabled
866 11:21:34.184367 PCI: 00:1e.2 [8086/0000] bus ops
867 11:21:34.187592 PCI: 00:1e.2 [8086/02aa] enabled
868 11:21:34.191248 PCI: 00:1e.3 [8086/0000] bus ops
869 11:21:34.194340 PCI: 00:1e.3 [8086/02ab] enabled
870 11:21:34.197842 PCI: 00:1f.0 [8086/0000] bus ops
871 11:21:34.200797 PCI: 00:1f.0 [8086/0284] enabled
872 11:21:34.207585 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 11:21:34.210435 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 11:21:34.214186 PCI: 00:1f.3 [8086/0000] bus ops
875 11:21:34.217266 PCI: 00:1f.3 [8086/02c8] enabled
876 11:21:34.220700 PCI: 00:1f.4 [8086/0000] bus ops
877 11:21:34.223931 PCI: 00:1f.4 [8086/02a3] enabled
878 11:21:34.227328 PCI: 00:1f.5 [8086/0000] bus ops
879 11:21:34.231145 PCI: 00:1f.5 [8086/02a4] enabled
880 11:21:34.233992 PCI: Leftover static devices:
881 11:21:34.237413 PCI: 00:05.0
882 11:21:34.237507 PCI: 00:12.5
883 11:21:34.237584 PCI: 00:12.6
884 11:21:34.240502 PCI: 00:14.1
885 11:21:34.240595 PCI: 00:14.5
886 11:21:34.244147 PCI: 00:15.2
887 11:21:34.244238 PCI: 00:15.3
888 11:21:34.244319 PCI: 00:16.1
889 11:21:34.247455 PCI: 00:16.2
890 11:21:34.247548 PCI: 00:16.3
891 11:21:34.251127 PCI: 00:16.4
892 11:21:34.251220 PCI: 00:16.5
893 11:21:34.254087 PCI: 00:19.1
894 11:21:34.254179 PCI: 00:19.2
895 11:21:34.254251 PCI: 00:1a.0
896 11:21:34.257056 PCI: 00:1c.0
897 11:21:34.257148 PCI: 00:1c.1
898 11:21:34.260618 PCI: 00:1c.2
899 11:21:34.260711 PCI: 00:1c.3
900 11:21:34.260785 PCI: 00:1c.4
901 11:21:34.264448 PCI: 00:1c.5
902 11:21:34.264541 PCI: 00:1c.6
903 11:21:34.266985 PCI: 00:1c.7
904 11:21:34.267077 PCI: 00:1d.1
905 11:21:34.267150 PCI: 00:1d.2
906 11:21:34.270736 PCI: 00:1d.3
907 11:21:34.270828 PCI: 00:1d.4
908 11:21:34.273628 PCI: 00:1d.5
909 11:21:34.273721 PCI: 00:1e.1
910 11:21:34.277114 PCI: 00:1f.1
911 11:21:34.277207 PCI: 00:1f.2
912 11:21:34.277278 PCI: 00:1f.6
913 11:21:34.280541 PCI: Check your devicetree.cb.
914 11:21:34.283761 PCI: 00:02.0 scanning...
915 11:21:34.287172 scan_generic_bus for PCI: 00:02.0
916 11:21:34.290273 scan_generic_bus for PCI: 00:02.0 done
917 11:21:34.297029 scan_bus: scanning of bus PCI: 00:02.0 took 10180 usecs
918 11:21:34.300569 PCI: 00:14.0 scanning...
919 11:21:34.303410 scan_static_bus for PCI: 00:14.0
920 11:21:34.303505 USB0 port 0 enabled
921 11:21:34.307156 USB0 port 0 scanning...
922 11:21:34.310312 scan_static_bus for USB0 port 0
923 11:21:34.313747 USB2 port 0 enabled
924 11:21:34.313862 USB2 port 1 enabled
925 11:21:34.317012 USB2 port 2 disabled
926 11:21:34.320695 USB2 port 3 disabled
927 11:21:34.320864 USB2 port 5 disabled
928 11:21:34.323434 USB2 port 6 enabled
929 11:21:34.327356 USB2 port 9 enabled
930 11:21:34.327457 USB3 port 0 enabled
931 11:21:34.330129 USB3 port 1 enabled
932 11:21:34.330226 USB3 port 2 enabled
933 11:21:34.333802 USB3 port 3 enabled
934 11:21:34.337318 USB3 port 4 disabled
935 11:21:34.337436 USB2 port 0 scanning...
936 11:21:34.340171 scan_static_bus for USB2 port 0
937 11:21:34.346960 scan_static_bus for USB2 port 0 done
938 11:21:34.350586 scan_bus: scanning of bus USB2 port 0 took 9700 usecs
939 11:21:34.353759 USB2 port 1 scanning...
940 11:21:34.357066 scan_static_bus for USB2 port 1
941 11:21:34.360594 scan_static_bus for USB2 port 1 done
942 11:21:34.367128 scan_bus: scanning of bus USB2 port 1 took 9707 usecs
943 11:21:34.367228 USB2 port 6 scanning...
944 11:21:34.370938 scan_static_bus for USB2 port 6
945 11:21:34.377466 scan_static_bus for USB2 port 6 done
946 11:21:34.380493 scan_bus: scanning of bus USB2 port 6 took 9699 usecs
947 11:21:34.383453 USB2 port 9 scanning...
948 11:21:34.387254 scan_static_bus for USB2 port 9
949 11:21:34.390642 scan_static_bus for USB2 port 9 done
950 11:21:34.396648 scan_bus: scanning of bus USB2 port 9 took 9698 usecs
951 11:21:34.396745 USB3 port 0 scanning...
952 11:21:34.400270 scan_static_bus for USB3 port 0
953 11:21:34.407192 scan_static_bus for USB3 port 0 done
954 11:21:34.410234 scan_bus: scanning of bus USB3 port 0 took 9708 usecs
955 11:21:34.414097 USB3 port 1 scanning...
956 11:21:34.417214 scan_static_bus for USB3 port 1
957 11:21:34.420224 scan_static_bus for USB3 port 1 done
958 11:21:34.426960 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
959 11:21:34.427054 USB3 port 2 scanning...
960 11:21:34.430642 scan_static_bus for USB3 port 2
961 11:21:34.437168 scan_static_bus for USB3 port 2 done
962 11:21:34.440753 scan_bus: scanning of bus USB3 port 2 took 9706 usecs
963 11:21:34.443731 USB3 port 3 scanning...
964 11:21:34.447251 scan_static_bus for USB3 port 3
965 11:21:34.450834 scan_static_bus for USB3 port 3 done
966 11:21:34.457001 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
967 11:21:34.460711 scan_static_bus for USB0 port 0 done
968 11:21:34.463604 scan_bus: scanning of bus USB0 port 0 took 155424 usecs
969 11:21:34.470475 scan_static_bus for PCI: 00:14.0 done
970 11:21:34.473840 scan_bus: scanning of bus PCI: 00:14.0 took 173056 usecs
971 11:21:34.476956 PCI: 00:15.0 scanning...
972 11:21:34.480364 scan_generic_bus for PCI: 00:15.0
973 11:21:34.484154 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 11:21:34.490074 scan_generic_bus for PCI: 00:15.0 done
975 11:21:34.493762 scan_bus: scanning of bus PCI: 00:15.0 took 14299 usecs
976 11:21:34.497138 PCI: 00:15.1 scanning...
977 11:21:34.500513 scan_generic_bus for PCI: 00:15.1
978 11:21:34.503560 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 11:21:34.510188 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 11:21:34.513308 scan_generic_bus for PCI: 00:15.1 done
981 11:21:34.520063 scan_bus: scanning of bus PCI: 00:15.1 took 18663 usecs
982 11:21:34.520157 PCI: 00:19.0 scanning...
983 11:21:34.523579 scan_generic_bus for PCI: 00:19.0
984 11:21:34.530379 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 11:21:34.533445 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 11:21:34.536430 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 11:21:34.540239 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 11:21:34.546945 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 11:21:34.549615 scan_generic_bus for PCI: 00:19.0 done
990 11:21:34.553279 scan_bus: scanning of bus PCI: 00:19.0 took 30745 usecs
991 11:21:34.556743 PCI: 00:1d.0 scanning...
992 11:21:34.559690 do_pci_scan_bridge for PCI: 00:1d.0
993 11:21:34.563225 PCI: pci_scan_bus for bus 01
994 11:21:34.566915 PCI: 01:00.0 [1c5c/1327] enabled
995 11:21:34.569898 Enabling Common Clock Configuration
996 11:21:34.576618 L1 Sub-State supported from root port 29
997 11:21:34.579614 L1 Sub-State Support = 0xf
998 11:21:34.579707 CommonModeRestoreTime = 0x28
999 11:21:34.586770 Power On Value = 0x16, Power On Scale = 0x0
1000 11:21:34.586863 ASPM: Enabled L1
1001 11:21:34.592938 scan_bus: scanning of bus PCI: 00:1d.0 took 32791 usecs
1002 11:21:34.596351 PCI: 00:1e.2 scanning...
1003 11:21:34.600302 scan_generic_bus for PCI: 00:1e.2
1004 11:21:34.603290 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 11:21:34.606143 scan_generic_bus for PCI: 00:1e.2 done
1006 11:21:34.612813 scan_bus: scanning of bus PCI: 00:1e.2 took 14005 usecs
1007 11:21:34.616693 PCI: 00:1e.3 scanning...
1008 11:21:34.619637 scan_generic_bus for PCI: 00:1e.3
1009 11:21:34.622888 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 11:21:34.626430 scan_generic_bus for PCI: 00:1e.3 done
1011 11:21:34.632868 scan_bus: scanning of bus PCI: 00:1e.3 took 14019 usecs
1012 11:21:34.632961 PCI: 00:1f.0 scanning...
1013 11:21:34.636619 scan_static_bus for PCI: 00:1f.0
1014 11:21:34.639846 PNP: 0c09.0 enabled
1015 11:21:34.643358 scan_static_bus for PCI: 00:1f.0 done
1016 11:21:34.649714 scan_bus: scanning of bus PCI: 00:1f.0 took 12051 usecs
1017 11:21:34.653287 PCI: 00:1f.3 scanning...
1018 11:21:34.656430 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1019 11:21:34.659944 PCI: 00:1f.4 scanning...
1020 11:21:34.663389 scan_generic_bus for PCI: 00:1f.4
1021 11:21:34.666746 scan_generic_bus for PCI: 00:1f.4 done
1022 11:21:34.672831 scan_bus: scanning of bus PCI: 00:1f.4 took 10198 usecs
1023 11:21:34.676653 PCI: 00:1f.5 scanning...
1024 11:21:34.679702 scan_generic_bus for PCI: 00:1f.5
1025 11:21:34.683358 scan_generic_bus for PCI: 00:1f.5 done
1026 11:21:34.689318 scan_bus: scanning of bus PCI: 00:1f.5 took 10188 usecs
1027 11:21:34.696076 scan_bus: scanning of bus DOMAIN: 0000 took 605240 usecs
1028 11:21:34.699410 scan_static_bus for Root Device done
1029 11:21:34.702955 scan_bus: scanning of bus Root Device took 625111 usecs
1030 11:21:34.706205 done
1031 11:21:34.709494 Chrome EC: UHEPI supported
1032 11:21:34.712808 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 11:21:34.719536 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 11:21:34.726184 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 11:21:34.732976 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 11:21:34.736076 SPI flash protection: WPSW=0 SRP0=0
1037 11:21:34.742789 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 11:21:34.745949 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1039 11:21:34.749576 found VGA at PCI: 00:02.0
1040 11:21:34.752872 Setting up VGA for PCI: 00:02.0
1041 11:21:34.759473 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 11:21:34.762556 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 11:21:34.765733 Allocating resources...
1044 11:21:34.765825 Reading resources...
1045 11:21:34.772604 Root Device read_resources bus 0 link: 0
1046 11:21:34.776116 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 11:21:34.782926 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 11:21:34.785785 DOMAIN: 0000 read_resources bus 0 link: 0
1049 11:21:34.792932 PCI: 00:14.0 read_resources bus 0 link: 0
1050 11:21:34.796143 USB0 port 0 read_resources bus 0 link: 0
1051 11:21:34.804296 USB0 port 0 read_resources bus 0 link: 0 done
1052 11:21:34.807200 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 11:21:34.814989 PCI: 00:15.0 read_resources bus 1 link: 0
1054 11:21:34.818153 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 11:21:34.824691 PCI: 00:15.1 read_resources bus 2 link: 0
1056 11:21:34.828013 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 11:21:34.835327 PCI: 00:19.0 read_resources bus 3 link: 0
1058 11:21:34.842097 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 11:21:34.845729 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 11:21:34.851925 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 11:21:34.855435 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 11:21:34.862545 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 11:21:34.865576 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 11:21:34.871904 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 11:21:34.875489 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 11:21:34.882313 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 11:21:34.885202 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 11:21:34.892541 Root Device read_resources bus 0 link: 0 done
1069 11:21:34.895649 Done reading resources.
1070 11:21:34.899375 Show resources in subtree (Root Device)...After reading.
1071 11:21:34.905797 Root Device child on link 0 CPU_CLUSTER: 0
1072 11:21:34.909304 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 11:21:34.909395 APIC: 00
1074 11:21:34.912213 APIC: 03
1075 11:21:34.912314 APIC: 04
1076 11:21:34.912386 APIC: 01
1077 11:21:34.915744 APIC: 02
1078 11:21:34.915835 APIC: 05
1079 11:21:34.919434 APIC: 06
1080 11:21:34.919525 APIC: 07
1081 11:21:34.922438 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 11:21:34.932453 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 11:21:34.985159 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 11:21:34.985449 PCI: 00:00.0
1085 11:21:34.985543 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 11:21:34.987107 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 11:21:34.987390 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 11:21:34.988004 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 11:21:34.995413 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 11:21:35.002158 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 11:21:35.008951 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 11:21:35.018750 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 11:21:35.028141 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 11:21:35.038302 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 11:21:35.044712 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 11:21:35.055160 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 11:21:35.064830 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 11:21:35.074899 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 11:21:35.084848 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 11:21:35.094672 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 11:21:35.094764 PCI: 00:02.0
1102 11:21:35.104747 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 11:21:35.114505 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 11:21:35.124286 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 11:21:35.124379 PCI: 00:04.0
1106 11:21:35.127413 PCI: 00:08.0
1107 11:21:35.137536 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 11:21:35.140749 PCI: 00:12.0
1109 11:21:35.147279 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 11:21:35.154017 PCI: 00:14.0 child on link 0 USB0 port 0
1111 11:21:35.164139 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 11:21:35.167437 USB0 port 0 child on link 0 USB2 port 0
1113 11:21:35.171078 USB2 port 0
1114 11:21:35.171169 USB2 port 1
1115 11:21:35.174318 USB2 port 2
1116 11:21:35.174409 USB2 port 3
1117 11:21:35.177252 USB2 port 5
1118 11:21:35.177343 USB2 port 6
1119 11:21:35.181034 USB2 port 9
1120 11:21:35.181125 USB3 port 0
1121 11:21:35.184234 USB3 port 1
1122 11:21:35.184332 USB3 port 2
1123 11:21:35.187219 USB3 port 3
1124 11:21:35.187309 USB3 port 4
1125 11:21:35.191077 PCI: 00:14.2
1126 11:21:35.200983 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 11:21:35.210525 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 11:21:35.210618 PCI: 00:14.3
1129 11:21:35.221036 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 11:21:35.226958 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 11:21:35.237233 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 11:21:35.237356 I2C: 01:15
1133 11:21:35.240539 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 11:21:35.250889 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 11:21:35.254085 I2C: 02:5d
1136 11:21:35.254176 GENERIC: 0.0
1137 11:21:35.257059 PCI: 00:16.0
1138 11:21:35.266879 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 11:21:35.266973 PCI: 00:17.0
1140 11:21:35.277021 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 11:21:35.286923 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 11:21:35.293645 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 11:21:35.303639 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 11:21:35.310601 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 11:21:35.320128 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 11:21:35.323861 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 11:21:35.333540 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 11:21:35.336773 I2C: 03:1a
1149 11:21:35.336864 I2C: 03:38
1150 11:21:35.340631 I2C: 03:39
1151 11:21:35.340724 I2C: 03:3a
1152 11:21:35.343450 I2C: 03:3b
1153 11:21:35.346949 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 11:21:35.356853 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 11:21:35.367269 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 11:21:35.373248 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 11:21:35.376587 PCI: 01:00.0
1158 11:21:35.386484 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 11:21:35.386579 PCI: 00:1e.0
1160 11:21:35.400115 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 11:21:35.410061 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 11:21:35.413303 PCI: 00:1e.2 child on link 0 SPI: 00
1163 11:21:35.423437 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 11:21:35.423530 SPI: 00
1165 11:21:35.426610 PCI: 00:1e.3 child on link 0 SPI: 01
1166 11:21:35.436478 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 11:21:35.439511 SPI: 01
1168 11:21:35.443285 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 11:21:35.452986 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 11:21:35.459884 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 11:21:35.462996 PNP: 0c09.0
1172 11:21:35.472926 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 11:21:35.473018 PCI: 00:1f.3
1174 11:21:35.482990 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 11:21:35.493023 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 11:21:35.496150 PCI: 00:1f.4
1177 11:21:35.502680 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 11:21:35.512978 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 11:21:35.515964 PCI: 00:1f.5
1180 11:21:35.525869 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 11:21:35.529328 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 11:21:35.535999 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 11:21:35.542762 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 11:21:35.549557 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 11:21:35.552679 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 11:21:35.555766 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 11:21:35.559134 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 11:21:35.565668 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 11:21:35.572118 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 11:21:35.579374 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 11:21:35.589364 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 11:21:35.595581 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 11:21:35.599052 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 11:21:35.605720 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 11:21:35.612676 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 11:21:35.615456 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 11:21:35.622131 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 11:21:35.625890 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 11:21:35.632391 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 11:21:35.635318 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 11:21:35.642101 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 11:21:35.645540 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 11:21:35.648625 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 11:21:35.655383 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 11:21:35.658485 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 11:21:35.665257 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 11:21:35.668701 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 11:21:35.675639 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 11:21:35.678649 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 11:21:35.685438 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 11:21:35.688394 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 11:21:35.695211 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 11:21:35.698368 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 11:21:35.705180 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 11:21:35.708918 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 11:21:35.712170 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 11:21:35.718848 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 11:21:35.728797 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 11:21:35.732099 avoid_fixed_resources: DOMAIN: 0000
1220 11:21:35.735355 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 11:21:35.741464 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 11:21:35.751966 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 11:21:35.758123 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 11:21:35.765102 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 11:21:35.772054 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 11:21:35.781961 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 11:21:35.788667 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 11:21:35.795352 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 11:21:35.804692 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 11:21:35.811720 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 11:21:35.818666 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 11:21:35.821651 Setting resources...
1233 11:21:35.827955 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 11:21:35.831839 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 11:21:35.834995 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 11:21:35.837928 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 11:21:35.841607 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 11:21:35.847954 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 11:21:35.854837 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 11:21:35.861320 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 11:21:35.867997 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 11:21:35.874893 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 11:21:35.878124 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 11:21:35.884517 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 11:21:35.888062 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 11:21:35.894372 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 11:21:35.897921 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 11:21:35.904721 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 11:21:35.907780 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 11:21:35.914875 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 11:21:35.917831 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 11:21:35.921451 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 11:21:35.928123 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 11:21:35.931328 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 11:21:35.937980 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 11:21:35.941847 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 11:21:35.947889 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 11:21:35.951502 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 11:21:35.958515 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 11:21:35.961488 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 11:21:35.968039 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 11:21:35.971287 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 11:21:35.974938 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 11:21:35.981869 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 11:21:35.987920 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 11:21:35.994490 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 11:21:36.004732 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 11:21:36.011600 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 11:21:36.014616 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 11:21:36.025180 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 11:21:36.028052 Root Device assign_resources, bus 0 link: 0
1272 11:21:36.031149 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 11:21:36.041576 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 11:21:36.047844 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 11:21:36.057794 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 11:21:36.064696 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 11:21:36.074302 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 11:21:36.080916 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 11:21:36.088062 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 11:21:36.091123 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 11:21:36.097641 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 11:21:36.108071 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 11:21:36.114935 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 11:21:36.124450 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 11:21:36.127590 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 11:21:36.134075 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 11:21:36.140839 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 11:21:36.144097 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 11:21:36.151253 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 11:21:36.158037 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 11:21:36.167874 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 11:21:36.174465 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 11:21:36.181066 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 11:21:36.190965 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 11:21:36.197579 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 11:21:36.204595 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 11:21:36.214546 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 11:21:36.217961 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 11:21:36.224203 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 11:21:36.231067 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 11:21:36.241001 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 11:21:36.247434 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 11:21:36.254065 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 11:21:36.261028 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 11:21:36.267261 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 11:21:36.273852 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 11:21:36.284182 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 11:21:36.287515 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 11:21:36.293643 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 11:21:36.300335 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 11:21:36.303664 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 11:21:36.310309 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 11:21:36.313551 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 11:21:36.320634 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 11:21:36.324040 LPC: Trying to open IO window from 800 size 1ff
1316 11:21:36.333698 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 11:21:36.340465 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 11:21:36.350301 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 11:21:36.357129 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 11:21:36.363486 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 11:21:36.366600 Root Device assign_resources, bus 0 link: 0
1322 11:21:36.370093 Done setting resources.
1323 11:21:36.376736 Show resources in subtree (Root Device)...After assigning values.
1324 11:21:36.379871 Root Device child on link 0 CPU_CLUSTER: 0
1325 11:21:36.383607 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 11:21:36.386727 APIC: 00
1327 11:21:36.386818 APIC: 03
1328 11:21:36.386888 APIC: 04
1329 11:21:36.390272 APIC: 01
1330 11:21:36.390363 APIC: 02
1331 11:21:36.393486 APIC: 05
1332 11:21:36.393576 APIC: 06
1333 11:21:36.393647 APIC: 07
1334 11:21:36.400113 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 11:21:36.409844 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 11:21:36.419711 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 11:21:36.419805 PCI: 00:00.0
1338 11:21:36.430153 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 11:21:36.439810 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 11:21:36.449708 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 11:21:36.459811 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 11:21:36.470075 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 11:21:36.476604 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 11:21:36.486321 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 11:21:36.496033 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 11:21:36.506073 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 11:21:36.515674 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 11:21:36.522403 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 11:21:36.532391 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 11:21:36.542458 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 11:21:36.552649 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 11:21:36.562699 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 11:21:36.572276 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 11:21:36.572370 PCI: 00:02.0
1355 11:21:36.582363 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 11:21:36.595415 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 11:21:36.602131 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 11:21:36.605185 PCI: 00:04.0
1359 11:21:36.605276 PCI: 00:08.0
1360 11:21:36.618908 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 11:21:36.619002 PCI: 00:12.0
1362 11:21:36.628420 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 11:21:36.631733 PCI: 00:14.0 child on link 0 USB0 port 0
1364 11:21:36.644833 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 11:21:36.648419 USB0 port 0 child on link 0 USB2 port 0
1366 11:21:36.648536 USB2 port 0
1367 11:21:36.651582 USB2 port 1
1368 11:21:36.654674 USB2 port 2
1369 11:21:36.654766 USB2 port 3
1370 11:21:36.658119 USB2 port 5
1371 11:21:36.658211 USB2 port 6
1372 11:21:36.661457 USB2 port 9
1373 11:21:36.661550 USB3 port 0
1374 11:21:36.665090 USB3 port 1
1375 11:21:36.665192 USB3 port 2
1376 11:21:36.668022 USB3 port 3
1377 11:21:36.668113 USB3 port 4
1378 11:21:36.671855 PCI: 00:14.2
1379 11:21:36.681732 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 11:21:36.691526 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 11:21:36.691619 PCI: 00:14.3
1382 11:21:36.704972 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 11:21:36.708019 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 11:21:36.718046 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 11:21:36.718140 I2C: 01:15
1386 11:21:36.724850 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 11:21:36.734539 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 11:21:36.734632 I2C: 02:5d
1389 11:21:36.737772 GENERIC: 0.0
1390 11:21:36.737863 PCI: 00:16.0
1391 11:21:36.747945 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 11:21:36.751150 PCI: 00:17.0
1393 11:21:36.760789 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 11:21:36.771404 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 11:21:36.781007 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 11:21:36.790908 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 11:21:36.797700 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 11:21:36.807834 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 11:21:36.813843 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 11:21:36.824194 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 11:21:36.824298 I2C: 03:1a
1402 11:21:36.827271 I2C: 03:38
1403 11:21:36.827362 I2C: 03:39
1404 11:21:36.830477 I2C: 03:3a
1405 11:21:36.830571 I2C: 03:3b
1406 11:21:36.837049 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 11:21:36.843819 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 11:21:36.853968 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 11:21:36.866903 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 11:21:36.866997 PCI: 01:00.0
1411 11:21:36.876747 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 11:21:36.880408 PCI: 00:1e.0
1413 11:21:36.889972 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 11:21:36.900178 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 11:21:36.903107 PCI: 00:1e.2 child on link 0 SPI: 00
1416 11:21:36.916865 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 11:21:36.916958 SPI: 00
1418 11:21:36.919955 PCI: 00:1e.3 child on link 0 SPI: 01
1419 11:21:36.930025 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 11:21:36.933167 SPI: 01
1421 11:21:36.936183 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 11:21:36.946375 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 11:21:36.953295 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 11:21:36.956056 PNP: 0c09.0
1425 11:21:36.962913 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 11:21:36.966037 PCI: 00:1f.3
1427 11:21:36.975786 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 11:21:36.986186 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 11:21:36.989269 PCI: 00:1f.4
1430 11:21:36.996134 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 11:21:37.009072 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 11:21:37.009165 PCI: 00:1f.5
1433 11:21:37.019271 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 11:21:37.022290 Done allocating resources.
1435 11:21:37.029340 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 11:21:37.029434 Enabling resources...
1437 11:21:37.036845 PCI: 00:00.0 subsystem <- 8086/9b61
1438 11:21:37.036937 PCI: 00:00.0 cmd <- 06
1439 11:21:37.039751 PCI: 00:02.0 subsystem <- 8086/9b41
1440 11:21:37.042911 PCI: 00:02.0 cmd <- 03
1441 11:21:37.046465 PCI: 00:08.0 cmd <- 06
1442 11:21:37.049972 PCI: 00:12.0 subsystem <- 8086/02f9
1443 11:21:37.052989 PCI: 00:12.0 cmd <- 02
1444 11:21:37.056104 PCI: 00:14.0 subsystem <- 8086/02ed
1445 11:21:37.059719 PCI: 00:14.0 cmd <- 02
1446 11:21:37.063174 PCI: 00:14.2 cmd <- 02
1447 11:21:37.066164 PCI: 00:14.3 subsystem <- 8086/02f0
1448 11:21:37.066256 PCI: 00:14.3 cmd <- 02
1449 11:21:37.072910 PCI: 00:15.0 subsystem <- 8086/02e8
1450 11:21:37.073002 PCI: 00:15.0 cmd <- 02
1451 11:21:37.076622 PCI: 00:15.1 subsystem <- 8086/02e9
1452 11:21:37.079691 PCI: 00:15.1 cmd <- 02
1453 11:21:37.082833 PCI: 00:16.0 subsystem <- 8086/02e0
1454 11:21:37.086522 PCI: 00:16.0 cmd <- 02
1455 11:21:37.089505 PCI: 00:17.0 subsystem <- 8086/02d3
1456 11:21:37.092712 PCI: 00:17.0 cmd <- 03
1457 11:21:37.096329 PCI: 00:19.0 subsystem <- 8086/02c5
1458 11:21:37.099836 PCI: 00:19.0 cmd <- 02
1459 11:21:37.102974 PCI: 00:1d.0 bridge ctrl <- 0013
1460 11:21:37.106420 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 11:21:37.109294 PCI: 00:1d.0 cmd <- 06
1462 11:21:37.112971 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 11:21:37.116122 PCI: 00:1e.0 cmd <- 06
1464 11:21:37.119944 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 11:21:37.120070 PCI: 00:1e.2 cmd <- 06
1466 11:21:37.126453 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 11:21:37.126544 PCI: 00:1e.3 cmd <- 02
1468 11:21:37.129824 PCI: 00:1f.0 subsystem <- 8086/0284
1469 11:21:37.133201 PCI: 00:1f.0 cmd <- 407
1470 11:21:37.136241 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 11:21:37.139702 PCI: 00:1f.3 cmd <- 02
1472 11:21:37.143144 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 11:21:37.146396 PCI: 00:1f.4 cmd <- 03
1474 11:21:37.149438 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 11:21:37.153036 PCI: 00:1f.5 cmd <- 406
1476 11:21:37.161308 PCI: 01:00.0 cmd <- 02
1477 11:21:37.166754 done.
1478 11:21:37.177817 ME: Version: 14.0.39.1367
1479 11:21:37.184512 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1480 11:21:37.188264 Initializing devices...
1481 11:21:37.188357 Root Device init ...
1482 11:21:37.194512 Chrome EC: Set SMI mask to 0x0000000000000000
1483 11:21:37.197649 Chrome EC: clear events_b mask to 0x0000000000000000
1484 11:21:37.204721 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 11:21:37.211430 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 11:21:37.218176 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 11:21:37.221091 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 11:21:37.224155 Root Device init finished in 35259 usecs
1489 11:21:37.228067 CPU_CLUSTER: 0 init ...
1490 11:21:37.234830 CPU_CLUSTER: 0 init finished in 2439 usecs
1491 11:21:37.239120 PCI: 00:00.0 init ...
1492 11:21:37.242049 CPU TDP: 15 Watts
1493 11:21:37.245261 CPU PL2 = 64 Watts
1494 11:21:37.248697 PCI: 00:00.0 init finished in 7080 usecs
1495 11:21:37.252150 PCI: 00:02.0 init ...
1496 11:21:37.255310 PCI: 00:02.0 init finished in 2253 usecs
1497 11:21:37.258773 PCI: 00:08.0 init ...
1498 11:21:37.262200 PCI: 00:08.0 init finished in 2253 usecs
1499 11:21:37.265592 PCI: 00:12.0 init ...
1500 11:21:37.268760 PCI: 00:12.0 init finished in 2245 usecs
1501 11:21:37.272212 PCI: 00:14.0 init ...
1502 11:21:37.275589 PCI: 00:14.0 init finished in 2254 usecs
1503 11:21:37.278431 PCI: 00:14.2 init ...
1504 11:21:37.281614 PCI: 00:14.2 init finished in 2244 usecs
1505 11:21:37.285061 PCI: 00:14.3 init ...
1506 11:21:37.288846 PCI: 00:14.3 init finished in 2271 usecs
1507 11:21:37.291813 PCI: 00:15.0 init ...
1508 11:21:37.295657 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 11:21:37.298796 PCI: 00:15.0 init finished in 5978 usecs
1510 11:21:37.301824 PCI: 00:15.1 init ...
1511 11:21:37.305006 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 11:21:37.308431 PCI: 00:15.1 init finished in 5978 usecs
1513 11:21:37.312062 PCI: 00:16.0 init ...
1514 11:21:37.315519 PCI: 00:16.0 init finished in 2253 usecs
1515 11:21:37.319219 PCI: 00:19.0 init ...
1516 11:21:37.322616 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 11:21:37.328923 PCI: 00:19.0 init finished in 5971 usecs
1518 11:21:37.329015 PCI: 00:1d.0 init ...
1519 11:21:37.332698 Initializing PCH PCIe bridge.
1520 11:21:37.335754 PCI: 00:1d.0 init finished in 5276 usecs
1521 11:21:37.340866 PCI: 00:1f.0 init ...
1522 11:21:37.344015 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 11:21:37.350689 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 11:21:37.350780 IOAPIC: ID = 0x02
1525 11:21:37.353837 IOAPIC: Dumping registers
1526 11:21:37.357051 reg 0x0000: 0x02000000
1527 11:21:37.360533 reg 0x0001: 0x00770020
1528 11:21:37.360624 reg 0x0002: 0x00000000
1529 11:21:37.367231 PCI: 00:1f.0 init finished in 23555 usecs
1530 11:21:37.370879 PCI: 00:1f.4 init ...
1531 11:21:37.374480 PCI: 00:1f.4 init finished in 2262 usecs
1532 11:21:37.385611 PCI: 01:00.0 init ...
1533 11:21:37.387913 PCI: 01:00.0 init finished in 2252 usecs
1534 11:21:37.392410 PNP: 0c09.0 init ...
1535 11:21:37.396081 Google Chrome EC uptime: 11.048 seconds
1536 11:21:37.402270 Google Chrome AP resets since EC boot: 0
1537 11:21:37.405954 Google Chrome most recent AP reset causes:
1538 11:21:37.412766 Google Chrome EC reset flags at last EC boot: reset-pin
1539 11:21:37.416060 PNP: 0c09.0 init finished in 20571 usecs
1540 11:21:37.419110 Devices initialized
1541 11:21:37.419201 Show all devs... After init.
1542 11:21:37.422192 Root Device: enabled 1
1543 11:21:37.425618 CPU_CLUSTER: 0: enabled 1
1544 11:21:37.429214 DOMAIN: 0000: enabled 1
1545 11:21:37.429305 APIC: 00: enabled 1
1546 11:21:37.432495 PCI: 00:00.0: enabled 1
1547 11:21:37.436082 PCI: 00:02.0: enabled 1
1548 11:21:37.439188 PCI: 00:04.0: enabled 0
1549 11:21:37.439278 PCI: 00:05.0: enabled 0
1550 11:21:37.442310 PCI: 00:12.0: enabled 1
1551 11:21:37.445468 PCI: 00:12.5: enabled 0
1552 11:21:37.445558 PCI: 00:12.6: enabled 0
1553 11:21:37.449388 PCI: 00:14.0: enabled 1
1554 11:21:37.452424 PCI: 00:14.1: enabled 0
1555 11:21:37.455526 PCI: 00:14.3: enabled 1
1556 11:21:37.455616 PCI: 00:14.5: enabled 0
1557 11:21:37.459072 PCI: 00:15.0: enabled 1
1558 11:21:37.462169 PCI: 00:15.1: enabled 1
1559 11:21:37.465840 PCI: 00:15.2: enabled 0
1560 11:21:37.465931 PCI: 00:15.3: enabled 0
1561 11:21:37.468907 PCI: 00:16.0: enabled 1
1562 11:21:37.472116 PCI: 00:16.1: enabled 0
1563 11:21:37.475533 PCI: 00:16.2: enabled 0
1564 11:21:37.475623 PCI: 00:16.3: enabled 0
1565 11:21:37.478537 PCI: 00:16.4: enabled 0
1566 11:21:37.481814 PCI: 00:16.5: enabled 0
1567 11:21:37.481905 PCI: 00:17.0: enabled 1
1568 11:21:37.485580 PCI: 00:19.0: enabled 1
1569 11:21:37.488712 PCI: 00:19.1: enabled 0
1570 11:21:37.491992 PCI: 00:19.2: enabled 0
1571 11:21:37.492083 PCI: 00:1a.0: enabled 0
1572 11:21:37.495716 PCI: 00:1c.0: enabled 0
1573 11:21:37.498715 PCI: 00:1c.1: enabled 0
1574 11:21:37.501855 PCI: 00:1c.2: enabled 0
1575 11:21:37.501946 PCI: 00:1c.3: enabled 0
1576 11:21:37.505431 PCI: 00:1c.4: enabled 0
1577 11:21:37.508634 PCI: 00:1c.5: enabled 0
1578 11:21:37.511914 PCI: 00:1c.6: enabled 0
1579 11:21:37.512004 PCI: 00:1c.7: enabled 0
1580 11:21:37.515148 PCI: 00:1d.0: enabled 1
1581 11:21:37.518264 PCI: 00:1d.1: enabled 0
1582 11:21:37.521682 PCI: 00:1d.2: enabled 0
1583 11:21:37.521773 PCI: 00:1d.3: enabled 0
1584 11:21:37.525079 PCI: 00:1d.4: enabled 0
1585 11:21:37.528185 PCI: 00:1d.5: enabled 0
1586 11:21:37.528283 PCI: 00:1e.0: enabled 1
1587 11:21:37.531633 PCI: 00:1e.1: enabled 0
1588 11:21:37.534889 PCI: 00:1e.2: enabled 1
1589 11:21:37.538186 PCI: 00:1e.3: enabled 1
1590 11:21:37.538276 PCI: 00:1f.0: enabled 1
1591 11:21:37.541751 PCI: 00:1f.1: enabled 0
1592 11:21:37.544734 PCI: 00:1f.2: enabled 0
1593 11:21:37.548081 PCI: 00:1f.3: enabled 1
1594 11:21:37.548173 PCI: 00:1f.4: enabled 1
1595 11:21:37.551300 PCI: 00:1f.5: enabled 1
1596 11:21:37.554995 PCI: 00:1f.6: enabled 0
1597 11:21:37.558089 USB0 port 0: enabled 1
1598 11:21:37.558180 I2C: 01:15: enabled 1
1599 11:21:37.561279 I2C: 02:5d: enabled 1
1600 11:21:37.564232 GENERIC: 0.0: enabled 1
1601 11:21:37.564336 I2C: 03:1a: enabled 1
1602 11:21:37.568114 I2C: 03:38: enabled 1
1603 11:21:37.571203 I2C: 03:39: enabled 1
1604 11:21:37.571294 I2C: 03:3a: enabled 1
1605 11:21:37.575211 I2C: 03:3b: enabled 1
1606 11:21:37.578174 PCI: 00:00.0: enabled 1
1607 11:21:37.578265 SPI: 00: enabled 1
1608 11:21:37.581216 SPI: 01: enabled 1
1609 11:21:37.584785 PNP: 0c09.0: enabled 1
1610 11:21:37.584876 USB2 port 0: enabled 1
1611 11:21:37.587712 USB2 port 1: enabled 1
1612 11:21:37.591353 USB2 port 2: enabled 0
1613 11:21:37.591445 USB2 port 3: enabled 0
1614 11:21:37.594302 USB2 port 5: enabled 0
1615 11:21:37.598022 USB2 port 6: enabled 1
1616 11:21:37.600979 USB2 port 9: enabled 1
1617 11:21:37.601070 USB3 port 0: enabled 1
1618 11:21:37.604146 USB3 port 1: enabled 1
1619 11:21:37.607963 USB3 port 2: enabled 1
1620 11:21:37.608054 USB3 port 3: enabled 1
1621 11:21:37.610952 USB3 port 4: enabled 0
1622 11:21:37.614626 APIC: 03: enabled 1
1623 11:21:37.614717 APIC: 04: enabled 1
1624 11:21:37.617623 APIC: 01: enabled 1
1625 11:21:37.620729 APIC: 02: enabled 1
1626 11:21:37.620820 APIC: 05: enabled 1
1627 11:21:37.624368 APIC: 06: enabled 1
1628 11:21:37.624458 APIC: 07: enabled 1
1629 11:21:37.627594 PCI: 00:08.0: enabled 1
1630 11:21:37.630644 PCI: 00:14.2: enabled 1
1631 11:21:37.634298 PCI: 01:00.0: enabled 1
1632 11:21:37.637613 Disabling ACPI via APMC:
1633 11:21:37.637704 done.
1634 11:21:37.644644 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 11:21:37.647697 ELOG: NV offset 0xaf0000 size 0x4000
1636 11:21:37.654244 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 11:21:37.660945 ELOG: Event(17) added with size 13 at 2024-02-23 11:20:58 UTC
1638 11:21:37.667622 ELOG: Event(92) added with size 9 at 2024-02-23 11:20:58 UTC
1639 11:21:37.674428 ELOG: Event(93) added with size 9 at 2024-02-23 11:20:58 UTC
1640 11:21:37.680654 ELOG: Event(9A) added with size 9 at 2024-02-23 11:20:58 UTC
1641 11:21:37.687531 ELOG: Event(9E) added with size 10 at 2024-02-23 11:20:58 UTC
1642 11:21:37.693906 ELOG: Event(9F) added with size 14 at 2024-02-23 11:20:58 UTC
1643 11:21:37.697508 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1644 11:21:37.704225 ELOG: Event(A1) added with size 10 at 2024-02-23 11:20:58 UTC
1645 11:21:37.714781 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1646 11:21:37.721256 ELOG: Event(A0) added with size 9 at 2024-02-23 11:20:58 UTC
1647 11:21:37.724231 elog_add_boot_reason: Logged dev mode boot
1648 11:21:37.724332 Finalize devices...
1649 11:21:37.727573 PCI: 00:17.0 final
1650 11:21:37.730798 Devices finalized
1651 11:21:37.734382 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1652 11:21:37.741007 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1653 11:21:37.744450 ME: HFSTS1 : 0x90000245
1654 11:21:37.747813 ME: HFSTS2 : 0x3B850126
1655 11:21:37.754528 ME: HFSTS3 : 0x00000020
1656 11:21:37.757550 ME: HFSTS4 : 0x00004800
1657 11:21:37.760652 ME: HFSTS5 : 0x00000000
1658 11:21:37.764341 ME: HFSTS6 : 0x40400006
1659 11:21:37.767457 ME: Manufacturing Mode : NO
1660 11:21:37.771032 ME: FW Partition Table : OK
1661 11:21:37.774026 ME: Bringup Loader Failure : NO
1662 11:21:37.777236 ME: Firmware Init Complete : YES
1663 11:21:37.780363 ME: Boot Options Present : NO
1664 11:21:37.784100 ME: Update In Progress : NO
1665 11:21:37.787194 ME: D0i3 Support : YES
1666 11:21:37.790769 ME: Low Power State Enabled : NO
1667 11:21:37.793810 ME: CPU Replaced : NO
1668 11:21:37.796956 ME: CPU Replacement Valid : YES
1669 11:21:37.800631 ME: Current Working State : 5
1670 11:21:37.804031 ME: Current Operation State : 1
1671 11:21:37.807443 ME: Current Operation Mode : 0
1672 11:21:37.810332 ME: Error Code : 0
1673 11:21:37.813741 ME: CPU Debug Disabled : YES
1674 11:21:37.816879 ME: TXT Support : NO
1675 11:21:37.823810 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1676 11:21:37.827523 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1677 11:21:37.830640 CBFS @ c08000 size 3f8000
1678 11:21:37.836823 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1679 11:21:37.840603 CBFS: Locating 'fallback/dsdt.aml'
1680 11:21:37.843672 CBFS: Found @ offset 10bb80 size 3fa5
1681 11:21:37.850496 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1682 11:21:37.853640 CBFS @ c08000 size 3f8000
1683 11:21:37.856945 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1684 11:21:37.860419 CBFS: Locating 'fallback/slic'
1685 11:21:37.865332 CBFS: 'fallback/slic' not found.
1686 11:21:37.871516 ACPI: Writing ACPI tables at 99b3e000.
1687 11:21:37.871608 ACPI: * FACS
1688 11:21:37.875283 ACPI: * DSDT
1689 11:21:37.878382 Ramoops buffer: 0x100000@0x99a3d000.
1690 11:21:37.881499 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1691 11:21:37.888141 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1692 11:21:37.891788 Google Chrome EC: version:
1693 11:21:37.895134 ro: helios_v2.0.2659-56403530b
1694 11:21:37.897859 rw: helios_v2.0.2849-c41de27e7d
1695 11:21:37.897951 running image: 1
1696 11:21:37.902218 ACPI: * FADT
1697 11:21:37.902309 SCI is IRQ9
1698 11:21:37.909051 ACPI: added table 1/32, length now 40
1699 11:21:37.909142 ACPI: * SSDT
1700 11:21:37.912048 Found 1 CPU(s) with 8 core(s) each.
1701 11:21:37.915694 Error: Could not locate 'wifi_sar' in VPD.
1702 11:21:37.922164 Checking CBFS for default SAR values
1703 11:21:37.925984 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 11:21:37.929031 CBFS @ c08000 size 3f8000
1705 11:21:37.935255 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 11:21:37.938449 CBFS: Locating 'wifi_sar_defaults.hex'
1707 11:21:37.942283 CBFS: Found @ offset 5fac0 size 77
1708 11:21:37.945441 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1709 11:21:37.952265 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1710 11:21:37.955471 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1711 11:21:37.962022 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1712 11:21:37.965323 failed to find key in VPD: dsm_calib_r0_0
1713 11:21:37.974774 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1714 11:21:37.978587 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1715 11:21:37.984657 failed to find key in VPD: dsm_calib_r0_1
1716 11:21:37.991953 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1717 11:21:37.998264 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1718 11:21:38.001297 failed to find key in VPD: dsm_calib_r0_2
1719 11:21:38.011647 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1720 11:21:38.015122 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1721 11:21:38.021170 failed to find key in VPD: dsm_calib_r0_3
1722 11:21:38.028052 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1723 11:21:38.034691 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1724 11:21:38.037742 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1725 11:21:38.044715 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1726 11:21:38.047719 EC returned error result code 1
1727 11:21:38.051660 EC returned error result code 1
1728 11:21:38.055270 EC returned error result code 1
1729 11:21:38.058335 PS2K: Bad resp from EC. Vivaldi disabled!
1730 11:21:38.065242 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1731 11:21:38.071765 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1732 11:21:38.074570 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1733 11:21:38.081458 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1734 11:21:38.085112 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1735 11:21:38.091146 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1736 11:21:38.098135 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1737 11:21:38.104721 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1738 11:21:38.107888 ACPI: added table 2/32, length now 44
1739 11:21:38.107980 ACPI: * MCFG
1740 11:21:38.114639 ACPI: added table 3/32, length now 48
1741 11:21:38.114731 ACPI: * TPM2
1742 11:21:38.117833 TPM2 log created at 99a2d000
1743 11:21:38.121467 ACPI: added table 4/32, length now 52
1744 11:21:38.124614 ACPI: * MADT
1745 11:21:38.124705 SCI is IRQ9
1746 11:21:38.127870 ACPI: added table 5/32, length now 56
1747 11:21:38.131372 current = 99b43ac0
1748 11:21:38.131462 ACPI: * DMAR
1749 11:21:38.134379 ACPI: added table 6/32, length now 60
1750 11:21:38.137996 ACPI: * IGD OpRegion
1751 11:21:38.141041 GMA: Found VBT in CBFS
1752 11:21:38.144396 GMA: Found valid VBT in CBFS
1753 11:21:38.147614 ACPI: added table 7/32, length now 64
1754 11:21:38.147705 ACPI: * HPET
1755 11:21:38.151492 ACPI: added table 8/32, length now 68
1756 11:21:38.154663 ACPI: done.
1757 11:21:38.157735 ACPI tables: 31744 bytes.
1758 11:21:38.160898 smbios_write_tables: 99a2c000
1759 11:21:38.164628 EC returned error result code 3
1760 11:21:38.167761 Couldn't obtain OEM name from CBI
1761 11:21:38.170963 Create SMBIOS type 17
1762 11:21:38.174102 PCI: 00:00.0 (Intel Cannonlake)
1763 11:21:38.174193 PCI: 00:14.3 (Intel WiFi)
1764 11:21:38.177800 SMBIOS tables: 939 bytes.
1765 11:21:38.180490 Writing table forward entry at 0x00000500
1766 11:21:38.187301 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1767 11:21:38.190941 Writing coreboot table at 0x99b62000
1768 11:21:38.197561 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1769 11:21:38.200668 1. 0000000000001000-000000000009ffff: RAM
1770 11:21:38.207555 2. 00000000000a0000-00000000000fffff: RESERVED
1771 11:21:38.210614 3. 0000000000100000-0000000099a2bfff: RAM
1772 11:21:38.217407 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1773 11:21:38.220440 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1774 11:21:38.227316 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1775 11:21:38.233722 7. 000000009a000000-000000009f7fffff: RESERVED
1776 11:21:38.236767 8. 00000000e0000000-00000000efffffff: RESERVED
1777 11:21:38.243370 9. 00000000fc000000-00000000fc000fff: RESERVED
1778 11:21:38.247104 10. 00000000fe000000-00000000fe00ffff: RESERVED
1779 11:21:38.250652 11. 00000000fed10000-00000000fed17fff: RESERVED
1780 11:21:38.256640 12. 00000000fed80000-00000000fed83fff: RESERVED
1781 11:21:38.259950 13. 00000000fed90000-00000000fed91fff: RESERVED
1782 11:21:38.267133 14. 00000000feda0000-00000000feda1fff: RESERVED
1783 11:21:38.269957 15. 0000000100000000-000000045e7fffff: RAM
1784 11:21:38.273797 Graphics framebuffer located at 0xc0000000
1785 11:21:38.276959 Passing 5 GPIOs to payload:
1786 11:21:38.283468 NAME | PORT | POLARITY | VALUE
1787 11:21:38.286312 write protect | undefined | high | low
1788 11:21:38.293550 lid | undefined | high | high
1789 11:21:38.299544 power | undefined | high | low
1790 11:21:38.303401 oprom | undefined | high | low
1791 11:21:38.310055 EC in RW | 0x000000cb | high | low
1792 11:21:38.310151 Board ID: 4
1793 11:21:38.316696 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1794 11:21:38.316790 CBFS @ c08000 size 3f8000
1795 11:21:38.323079 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1796 11:21:38.329954 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1797 11:21:38.333013 coreboot table: 1492 bytes.
1798 11:21:38.336723 IMD ROOT 0. 99fff000 00001000
1799 11:21:38.339523 IMD SMALL 1. 99ffe000 00001000
1800 11:21:38.342816 FSP MEMORY 2. 99c4e000 003b0000
1801 11:21:38.346366 CONSOLE 3. 99c2e000 00020000
1802 11:21:38.349909 FMAP 4. 99c2d000 0000054e
1803 11:21:38.352967 TIME STAMP 5. 99c2c000 00000910
1804 11:21:38.356696 VBOOT WORK 6. 99c18000 00014000
1805 11:21:38.359850 MRC DATA 7. 99c16000 00001958
1806 11:21:38.363234 ROMSTG STCK 8. 99c15000 00001000
1807 11:21:38.366262 AFTER CAR 9. 99c0b000 0000a000
1808 11:21:38.369508 RAMSTAGE 10. 99baf000 0005c000
1809 11:21:38.373176 REFCODE 11. 99b7a000 00035000
1810 11:21:38.376549 SMM BACKUP 12. 99b6a000 00010000
1811 11:21:38.379553 COREBOOT 13. 99b62000 00008000
1812 11:21:38.382804 ACPI 14. 99b3e000 00024000
1813 11:21:38.386333 ACPI GNVS 15. 99b3d000 00001000
1814 11:21:38.389295 RAMOOPS 16. 99a3d000 00100000
1815 11:21:38.393027 TPM2 TCGLOG17. 99a2d000 00010000
1816 11:21:38.396525 SMBIOS 18. 99a2c000 00000800
1817 11:21:38.396616 IMD small region:
1818 11:21:38.399450 IMD ROOT 0. 99ffec00 00000400
1819 11:21:38.406252 FSP RUNTIME 1. 99ffebe0 00000004
1820 11:21:38.409283 EC HOSTEVENT 2. 99ffebc0 00000008
1821 11:21:38.412938 POWER STATE 3. 99ffeb80 00000040
1822 11:21:38.416134 ROMSTAGE 4. 99ffeb60 00000004
1823 11:21:38.419770 MEM INFO 5. 99ffe9a0 000001b9
1824 11:21:38.422857 VPD 6. 99ffe920 0000006c
1825 11:21:38.426003 MTRR: Physical address space:
1826 11:21:38.432816 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1827 11:21:38.439228 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1828 11:21:38.442709 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1829 11:21:38.449425 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1830 11:21:38.456028 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1831 11:21:38.462347 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1832 11:21:38.469199 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1833 11:21:38.472910 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 11:21:38.475826 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 11:21:38.482380 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 11:21:38.485483 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 11:21:38.489095 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 11:21:38.492697 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 11:21:38.498742 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 11:21:38.502059 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 11:21:38.505226 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 11:21:38.508827 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 11:21:38.515477 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 11:21:38.518899 call enable_fixed_mtrr()
1845 11:21:38.521945 CPU physical address size: 39 bits
1846 11:21:38.525670 MTRR: default type WB/UC MTRR counts: 6/8.
1847 11:21:38.528644 MTRR: WB selected as default type.
1848 11:21:38.535554 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1849 11:21:38.542048 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1850 11:21:38.548886 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1851 11:21:38.555669 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1852 11:21:38.558706 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1853 11:21:38.565176 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1854 11:21:38.572286 MTRR: Fixed MSR 0x250 0x0606060606060606
1855 11:21:38.575450 MTRR: Fixed MSR 0x258 0x0606060606060606
1856 11:21:38.578600 MTRR: Fixed MSR 0x259 0x0000000000000000
1857 11:21:38.582313 MTRR: Fixed MSR 0x268 0x0606060606060606
1858 11:21:38.589034 MTRR: Fixed MSR 0x269 0x0606060606060606
1859 11:21:38.592141 MTRR: Fixed MSR 0x26a 0x0606060606060606
1860 11:21:38.595324 MTRR: Fixed MSR 0x26b 0x0606060606060606
1861 11:21:38.598407 MTRR: Fixed MSR 0x26c 0x0606060606060606
1862 11:21:38.605469 MTRR: Fixed MSR 0x26d 0x0606060606060606
1863 11:21:38.608633 MTRR: Fixed MSR 0x26e 0x0606060606060606
1864 11:21:38.612118 MTRR: Fixed MSR 0x26f 0x0606060606060606
1865 11:21:38.612473
1866 11:21:38.615139 MTRR check
1867 11:21:38.615489 Fixed MTRRs : Enabled
1868 11:21:38.618801 Variable MTRRs: Enabled
1869 11:21:38.619127
1870 11:21:38.621780 call enable_fixed_mtrr()
1871 11:21:38.625010 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1872 11:21:38.632024 CPU physical address size: 39 bits
1873 11:21:38.635348 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1874 11:21:38.638367 MTRR: Fixed MSR 0x250 0x0606060606060606
1875 11:21:38.644971 MTRR: Fixed MSR 0x258 0x0606060606060606
1876 11:21:38.648635 MTRR: Fixed MSR 0x259 0x0000000000000000
1877 11:21:38.651886 MTRR: Fixed MSR 0x268 0x0606060606060606
1878 11:21:38.654973 MTRR: Fixed MSR 0x269 0x0606060606060606
1879 11:21:38.661971 MTRR: Fixed MSR 0x26a 0x0606060606060606
1880 11:21:38.664636 MTRR: Fixed MSR 0x26b 0x0606060606060606
1881 11:21:38.667898 MTRR: Fixed MSR 0x26c 0x0606060606060606
1882 11:21:38.671747 MTRR: Fixed MSR 0x26d 0x0606060606060606
1883 11:21:38.678157 MTRR: Fixed MSR 0x26e 0x0606060606060606
1884 11:21:38.681704 MTRR: Fixed MSR 0x26f 0x0606060606060606
1885 11:21:38.684825 MTRR: Fixed MSR 0x250 0x0606060606060606
1886 11:21:38.688044 call enable_fixed_mtrr()
1887 11:21:38.691299 MTRR: Fixed MSR 0x258 0x0606060606060606
1888 11:21:38.694910 MTRR: Fixed MSR 0x259 0x0000000000000000
1889 11:21:38.701333 MTRR: Fixed MSR 0x268 0x0606060606060606
1890 11:21:38.704713 MTRR: Fixed MSR 0x269 0x0606060606060606
1891 11:21:38.708215 MTRR: Fixed MSR 0x26a 0x0606060606060606
1892 11:21:38.711480 MTRR: Fixed MSR 0x26b 0x0606060606060606
1893 11:21:38.718116 MTRR: Fixed MSR 0x26c 0x0606060606060606
1894 11:21:38.721412 MTRR: Fixed MSR 0x26d 0x0606060606060606
1895 11:21:38.724539 MTRR: Fixed MSR 0x26e 0x0606060606060606
1896 11:21:38.728008 MTRR: Fixed MSR 0x26f 0x0606060606060606
1897 11:21:38.731399 CPU physical address size: 39 bits
1898 11:21:38.734792 call enable_fixed_mtrr()
1899 11:21:38.737506 CBFS @ c08000 size 3f8000
1900 11:21:38.744093 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1901 11:21:38.747603 CPU physical address size: 39 bits
1902 11:21:38.750812 MTRR: Fixed MSR 0x250 0x0606060606060606
1903 11:21:38.754427 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 11:21:38.760780 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 11:21:38.764448 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 11:21:38.767343 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 11:21:38.770679 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 11:21:38.774528 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 11:21:38.780545 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 11:21:38.784431 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 11:21:38.787567 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 11:21:38.791210 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 11:21:38.797188 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 11:21:38.800412 MTRR: Fixed MSR 0x258 0x0606060606060606
1915 11:21:38.804615 call enable_fixed_mtrr()
1916 11:21:38.807521 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 11:21:38.811061 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 11:21:38.814131 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 11:21:38.820534 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 11:21:38.824128 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 11:21:38.827545 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 11:21:38.831015 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 11:21:38.836924 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 11:21:38.840864 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 11:21:38.843520 CPU physical address size: 39 bits
1926 11:21:38.847584 call enable_fixed_mtrr()
1927 11:21:38.850634 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 11:21:38.853682 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 11:21:38.860793 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 11:21:38.863405 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 11:21:38.866872 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 11:21:38.870093 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 11:21:38.873820 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 11:21:38.880201 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 11:21:38.883396 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 11:21:38.886725 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 11:21:38.890562 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 11:21:38.896615 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 11:21:38.900097 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 11:21:38.903617 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 11:21:38.906652 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 11:21:38.913619 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 11:21:38.916467 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 11:21:38.920190 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 11:21:38.923484 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 11:21:38.930121 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 11:21:38.933852 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 11:21:38.936913 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 11:21:38.940196 call enable_fixed_mtrr()
1950 11:21:38.943059 call enable_fixed_mtrr()
1951 11:21:38.946155 CPU physical address size: 39 bits
1952 11:21:38.950121 CPU physical address size: 39 bits
1953 11:21:38.953060 CPU physical address size: 39 bits
1954 11:21:38.956154 CBFS: Locating 'fallback/payload'
1955 11:21:38.959982 CBFS: Found @ offset 1c96c0 size 3f798
1956 11:21:38.966686 Checking segment from ROM address 0xffdd16f8
1957 11:21:38.969696 Checking segment from ROM address 0xffdd1714
1958 11:21:38.973348 Loading segment from ROM address 0xffdd16f8
1959 11:21:38.976295 code (compression=0)
1960 11:21:38.986344 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1961 11:21:38.993204 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1962 11:21:38.996097 it's not compressed!
1963 11:21:39.088206 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1964 11:21:39.094950 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1965 11:21:39.098247 Loading segment from ROM address 0xffdd1714
1966 11:21:39.101389 Entry Point 0x30000000
1967 11:21:39.104675 Loaded segments
1968 11:21:39.110521 Finalizing chipset.
1969 11:21:39.113486 Finalizing SMM.
1970 11:21:39.117013 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1971 11:21:39.120211 mp_park_aps done after 0 msecs.
1972 11:21:39.127221 Jumping to boot code at 30000000(99b62000)
1973 11:21:39.133803 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1974 11:21:39.134193
1975 11:21:39.134470
1976 11:21:39.134758
1977 11:21:39.136950 Starting depthcharge on Helios...
1978 11:21:39.137301
1979 11:21:39.138191 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1980 11:21:39.138634 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1981 11:21:39.138963 Setting prompt string to ['hatch:']
1982 11:21:39.139311 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1983 11:21:39.147061 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1984 11:21:39.147584
1985 11:21:39.153241 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1986 11:21:39.153597
1987 11:21:39.160505 board_setup: Info: eMMC controller not present; skipping
1988 11:21:39.160957
1989 11:21:39.163386 New NVMe Controller 0x30053ac0 @ 00:1d:00
1990 11:21:39.163740
1991 11:21:39.169942 board_setup: Info: SDHCI controller not present; skipping
1992 11:21:39.170414
1993 11:21:39.176633 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1994 11:21:39.177025
1995 11:21:39.177325 Wipe memory regions:
1996 11:21:39.177605
1997 11:21:39.179849 [0x00000000001000, 0x000000000a0000)
1998 11:21:39.180228
1999 11:21:39.183238 [0x00000000100000, 0x00000030000000)
2000 11:21:39.249115
2001 11:21:39.252676 [0x00000030657430, 0x00000099a2c000)
2002 11:21:39.399247
2003 11:21:39.402647 [0x00000100000000, 0x0000045e800000)
2004 11:21:40.858639
2005 11:21:40.859089 R8152: Initializing
2006 11:21:40.859451
2007 11:21:40.862318 Version 9 (ocp_data = 6010)
2008 11:21:40.866021
2009 11:21:40.866405 R8152: Done initializing
2010 11:21:40.866706
2011 11:21:40.869996 Adding net device
2012 11:21:41.352407
2013 11:21:41.352944 R8152: Initializing
2014 11:21:41.353277
2015 11:21:41.355514 Version 6 (ocp_data = 5c30)
2016 11:21:41.356043
2017 11:21:41.358740 R8152: Done initializing
2018 11:21:41.359153
2019 11:21:41.361875 net_add_device: Attemp to include the same device
2020 11:21:41.365755
2021 11:21:41.372920 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2022 11:21:41.373355
2023 11:21:41.373705
2024 11:21:41.374015
2025 11:21:41.374940 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 11:21:41.476367 hatch: tftpboot 192.168.201.1 12838110/tftp-deploy-mre6q8z_/kernel/bzImage 12838110/tftp-deploy-mre6q8z_/kernel/cmdline 12838110/tftp-deploy-mre6q8z_/ramdisk/ramdisk.cpio.gz
2028 11:21:41.476890 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2029 11:21:41.477245 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2030 11:21:41.481333 tftpboot 192.168.201.1 12838110/tftp-deploy-mre6q8z_/kernel/bzIploy-mre6q8z_/kernel/cmdline 12838110/tftp-deploy-mre6q8z_/ramdisk/ramdisk.cpio.gz
2031 11:21:41.481736
2032 11:21:41.482037 Waiting for link
2033 11:21:41.682408
2034 11:21:41.682874 done.
2035 11:21:41.683360
2036 11:21:41.683889 MAC: 00:24:32:50:1a:59
2037 11:21:41.684406
2038 11:21:41.685844 Sending DHCP discover... done.
2039 11:21:41.686230
2040 11:21:41.689142 Waiting for reply... done.
2041 11:21:41.689526
2042 11:21:41.692361 Sending DHCP request... done.
2043 11:21:41.692745
2044 11:21:41.695435 Waiting for reply... done.
2045 11:21:41.695814
2046 11:21:41.699332 My ip is 192.168.201.14
2047 11:21:41.699720
2048 11:21:41.702599 The DHCP server ip is 192.168.201.1
2049 11:21:41.703074
2050 11:21:41.705724 TFTP server IP predefined by user: 192.168.201.1
2051 11:21:41.706109
2052 11:21:41.712020 Bootfile predefined by user: 12838110/tftp-deploy-mre6q8z_/kernel/bzImage
2053 11:21:41.712449
2054 11:21:41.715847 Sending tftp read request... done.
2055 11:21:41.716343
2056 11:21:41.725384 Waiting for the transfer...
2057 11:21:41.725892
2058 11:21:42.412643 00000000 ################################################################
2059 11:21:42.413105
2060 11:21:43.108461 00080000 ################################################################
2061 11:21:43.108929
2062 11:21:43.786335 00100000 ################################################################
2063 11:21:43.786835
2064 11:21:44.401001 00180000 ################################################################
2065 11:21:44.401145
2066 11:21:44.935914 00200000 ################################################################
2067 11:21:44.936055
2068 11:21:45.453649 00280000 ################################################################
2069 11:21:45.453797
2070 11:21:45.994657 00300000 ################################################################
2071 11:21:45.994795
2072 11:21:46.545443 00380000 ################################################################
2073 11:21:46.545593
2074 11:21:47.089939 00400000 ################################################################
2075 11:21:47.090088
2076 11:21:47.637253 00480000 ################################################################
2077 11:21:47.637390
2078 11:21:48.154413 00500000 ################################################################
2079 11:21:48.154559
2080 11:21:48.672543 00580000 ################################################################
2081 11:21:48.672686
2082 11:21:49.191853 00600000 ################################################################
2083 11:21:49.191993
2084 11:21:49.706444 00680000 ################################################################
2085 11:21:49.706642
2086 11:21:50.221429 00700000 ################################################################
2087 11:21:50.221587
2088 11:21:50.736869 00780000 ################################################################
2089 11:21:50.737016
2090 11:21:51.254905 00800000 ################################################################
2091 11:21:51.255085
2092 11:21:51.799895 00880000 ################################################################
2093 11:21:51.800066
2094 11:21:52.318975 00900000 ################################################################
2095 11:21:52.319124
2096 11:21:52.850254 00980000 ################################################################
2097 11:21:52.850399
2098 11:21:53.376512 00a00000 ################################################################
2099 11:21:53.376654
2100 11:21:53.905390 00a80000 ################################################################
2101 11:21:53.905561
2102 11:21:54.437391 00b00000 ################################################################
2103 11:21:54.437530
2104 11:21:54.727064 00b80000 #################################### done.
2105 11:21:54.727207
2106 11:21:54.730274 The bootfile was 12349440 bytes long.
2107 11:21:54.730368
2108 11:21:54.733386 Sending tftp read request... done.
2109 11:21:54.733480
2110 11:21:54.737049 Waiting for the transfer...
2111 11:21:54.737140
2112 11:21:55.250451 00000000 ################################################################
2113 11:21:55.250594
2114 11:21:55.764976 00080000 ################################################################
2115 11:21:55.765153
2116 11:21:56.282647 00100000 ################################################################
2117 11:21:56.282830
2118 11:21:56.805851 00180000 ################################################################
2119 11:21:56.806023
2120 11:21:57.337176 00200000 ################################################################
2121 11:21:57.337319
2122 11:21:57.865011 00280000 ################################################################
2123 11:21:57.865152
2124 11:21:58.391018 00300000 ################################################################
2125 11:21:58.391197
2126 11:21:58.908598 00380000 ################################################################
2127 11:21:58.908750
2128 11:21:59.426680 00400000 ################################################################
2129 11:21:59.426830
2130 11:21:59.944199 00480000 ################################################################
2131 11:21:59.944360
2132 11:22:00.459952 00500000 ################################################################
2133 11:22:00.460094
2134 11:22:00.980758 00580000 ################################################################
2135 11:22:00.980933
2136 11:22:01.497042 00600000 ################################################################
2137 11:22:01.497275
2138 11:22:02.008009 00680000 ################################################################
2139 11:22:02.008151
2140 11:22:02.549675 00700000 ################################################################
2141 11:22:02.549819
2142 11:22:03.116963 00780000 ################################################################
2143 11:22:03.117119
2144 11:22:03.673870 00800000 ################################################################
2145 11:22:03.674009
2146 11:22:04.003965 00880000 ###################################### done.
2147 11:22:04.004136
2148 11:22:04.006984 Sending tftp read request... done.
2149 11:22:04.007100
2150 11:22:04.010746 Waiting for the transfer...
2151 11:22:04.010865
2152 11:22:04.010971 00000000 # done.
2153 11:22:04.011079
2154 11:22:04.020150 Command line loaded dynamically from TFTP file: 12838110/tftp-deploy-mre6q8z_/kernel/cmdline
2155 11:22:04.020280
2156 11:22:04.040024 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2157 11:22:04.040157
2158 11:22:04.046927 ec_init(0): CrosEC protocol v3 supported (256, 256)
2159 11:22:04.051629
2160 11:22:04.054817 Shutting down all USB controllers.
2161 11:22:04.054957
2162 11:22:04.055078 Removing current net device
2163 11:22:04.058638
2164 11:22:04.058760 Finalizing coreboot
2165 11:22:04.058893
2166 11:22:04.065637 Exiting depthcharge with code 4 at timestamp: 32296717
2167 11:22:04.065782
2168 11:22:04.065887
2169 11:22:04.065982 Starting kernel ...
2170 11:22:04.066097
2171 11:22:04.066210
2172 11:22:04.067223 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2173 11:22:04.067456 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2174 11:22:04.067632 Setting prompt string to ['Linux version [0-9]']
2175 11:22:04.067811 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2176 11:22:04.067935 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2178 11:26:21.068656 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2180 11:26:21.069984 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2182 11:26:21.070837 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2185 11:26:21.072315 end: 2 depthcharge-action (duration 00:05:00) [common]
2187 11:26:21.072842 Cleaning after the job
2188 11:26:21.072932 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12838110/tftp-deploy-mre6q8z_/ramdisk
2189 11:26:21.074477 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12838110/tftp-deploy-mre6q8z_/kernel
2190 11:26:21.076595 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12838110/tftp-deploy-mre6q8z_/modules
2191 11:26:21.077262 start: 5.1 power-off (timeout 00:00:30) [common]
2192 11:26:21.077435 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2193 11:26:21.160171 >> Command sent successfully.
2194 11:26:21.168413 Returned 0 in 0 seconds
2195 11:26:21.269562 end: 5.1 power-off (duration 00:00:00) [common]
2197 11:26:21.271229 start: 5.2 read-feedback (timeout 00:10:00) [common]
2198 11:26:21.272636 Listened to connection for namespace 'common' for up to 1s
2200 11:26:21.273989 Listened to connection for namespace 'common' for up to 1s
2201 11:26:22.273227 Finalising connection for namespace 'common'
2202 11:26:22.273942 Disconnecting from shell: Finalise
2203 11:26:22.274380
2204 11:26:22.375458 end: 5.2 read-feedback (duration 00:00:01) [common]
2205 11:26:22.376069 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12838110
2206 11:26:22.432480 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12838110
2207 11:26:22.432707 JobError: Your job cannot terminate cleanly.