Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 11:20:26.964157 lava-dispatcher, installed at version: 2024.01
2 11:20:26.964375 start: 0 validate
3 11:20:26.964519 Start time: 2024-02-23 11:20:26.964511+00:00 (UTC)
4 11:20:26.964643 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:20:26.964781 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 11:20:27.279384 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:20:27.280411 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-201-gc2afc54e2d6bb%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:20:27.573003 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:20:27.573755 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:20:32.470012 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:20:32.470802 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-201-gc2afc54e2d6bb%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 11:20:32.754871 validate duration: 5.79
14 11:20:32.756525 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:20:32.757148 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:20:32.757712 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:20:32.758331 Not decompressing ramdisk as can be used compressed.
18 11:20:32.758884 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20240129.0/amd64/initrd.cpio.gz
19 11:20:32.759265 saving as /var/lib/lava/dispatcher/tmp/12838104/tftp-deploy-wll8m483/ramdisk/initrd.cpio.gz
20 11:20:32.759630 total size: 5670327 (5 MB)
21 11:20:33.430274 progress 0 % (0 MB)
22 11:20:33.435083 progress 5 % (0 MB)
23 11:20:33.436776 progress 10 % (0 MB)
24 11:20:33.438326 progress 15 % (0 MB)
25 11:20:33.440046 progress 20 % (1 MB)
26 11:20:33.441833 progress 25 % (1 MB)
27 11:20:33.443361 progress 30 % (1 MB)
28 11:20:33.444957 progress 35 % (1 MB)
29 11:20:33.446657 progress 40 % (2 MB)
30 11:20:33.448279 progress 45 % (2 MB)
31 11:20:33.449935 progress 50 % (2 MB)
32 11:20:33.451524 progress 55 % (3 MB)
33 11:20:33.452945 progress 60 % (3 MB)
34 11:20:33.454572 progress 65 % (3 MB)
35 11:20:33.456166 progress 70 % (3 MB)
36 11:20:33.457628 progress 75 % (4 MB)
37 11:20:33.459256 progress 80 % (4 MB)
38 11:20:33.461004 progress 85 % (4 MB)
39 11:20:33.462548 progress 90 % (4 MB)
40 11:20:33.464251 progress 95 % (5 MB)
41 11:20:33.465960 progress 100 % (5 MB)
42 11:20:33.466070 5 MB downloaded in 0.71 s (7.65 MB/s)
43 11:20:33.466224 end: 1.1.1 http-download (duration 00:00:01) [common]
45 11:20:33.466476 end: 1.1 download-retry (duration 00:00:01) [common]
46 11:20:33.466567 start: 1.2 download-retry (timeout 00:09:59) [common]
47 11:20:33.466656 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 11:20:33.466790 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-201-gc2afc54e2d6bb/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 11:20:33.466862 saving as /var/lib/lava/dispatcher/tmp/12838104/tftp-deploy-wll8m483/kernel/bzImage
50 11:20:33.466926 total size: 12349440 (11 MB)
51 11:20:33.466991 No compression specified
52 11:20:33.468137 progress 0 % (0 MB)
53 11:20:33.471465 progress 5 % (0 MB)
54 11:20:33.474842 progress 10 % (1 MB)
55 11:20:33.478203 progress 15 % (1 MB)
56 11:20:33.481516 progress 20 % (2 MB)
57 11:20:33.484875 progress 25 % (2 MB)
58 11:20:33.488243 progress 30 % (3 MB)
59 11:20:33.491436 progress 35 % (4 MB)
60 11:20:33.494802 progress 40 % (4 MB)
61 11:20:33.498473 progress 45 % (5 MB)
62 11:20:33.501846 progress 50 % (5 MB)
63 11:20:33.505255 progress 55 % (6 MB)
64 11:20:33.508890 progress 60 % (7 MB)
65 11:20:33.512146 progress 65 % (7 MB)
66 11:20:33.515715 progress 70 % (8 MB)
67 11:20:33.519148 progress 75 % (8 MB)
68 11:20:33.522625 progress 80 % (9 MB)
69 11:20:33.526130 progress 85 % (10 MB)
70 11:20:33.529587 progress 90 % (10 MB)
71 11:20:33.533037 progress 95 % (11 MB)
72 11:20:33.536386 progress 100 % (11 MB)
73 11:20:33.536632 11 MB downloaded in 0.07 s (168.97 MB/s)
74 11:20:33.536790 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:20:33.537040 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:20:33.537153 start: 1.3 download-retry (timeout 00:09:59) [common]
78 11:20:33.537253 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 11:20:33.537428 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20240129.0/amd64/full.rootfs.tar.xz
80 11:20:33.537502 saving as /var/lib/lava/dispatcher/tmp/12838104/tftp-deploy-wll8m483/nfsrootfs/full.rootfs.tar
81 11:20:33.537568 total size: 127582724 (121 MB)
82 11:20:33.537636 Using unxz to decompress xz
83 11:20:33.541785 progress 0 % (0 MB)
84 11:20:34.066460 progress 5 % (6 MB)
85 11:20:34.599311 progress 10 % (12 MB)
86 11:20:35.128424 progress 15 % (18 MB)
87 11:20:35.675927 progress 20 % (24 MB)
88 11:20:36.097493 progress 25 % (30 MB)
89 11:20:36.443026 progress 30 % (36 MB)
90 11:20:36.758708 progress 35 % (42 MB)
91 11:20:36.935887 progress 40 % (48 MB)
92 11:20:37.348187 progress 45 % (54 MB)
93 11:20:37.750480 progress 50 % (60 MB)
94 11:20:38.137588 progress 55 % (66 MB)
95 11:20:38.550642 progress 60 % (73 MB)
96 11:20:38.933964 progress 65 % (79 MB)
97 11:20:39.348053 progress 70 % (85 MB)
98 11:20:39.802964 progress 75 % (91 MB)
99 11:20:40.256776 progress 80 % (97 MB)
100 11:20:40.377233 progress 85 % (103 MB)
101 11:20:40.545034 progress 90 % (109 MB)
102 11:20:40.907848 progress 95 % (115 MB)
103 11:20:41.312955 progress 100 % (121 MB)
104 11:20:41.319010 121 MB downloaded in 7.78 s (15.64 MB/s)
105 11:20:41.319290 end: 1.3.1 http-download (duration 00:00:08) [common]
107 11:20:41.319606 end: 1.3 download-retry (duration 00:00:08) [common]
108 11:20:41.319721 start: 1.4 download-retry (timeout 00:09:51) [common]
109 11:20:41.319837 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 11:20:41.320010 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-201-gc2afc54e2d6bb/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 11:20:41.320097 saving as /var/lib/lava/dispatcher/tmp/12838104/tftp-deploy-wll8m483/modules/modules.tar
112 11:20:41.320187 total size: 484664 (0 MB)
113 11:20:41.320299 Using unxz to decompress xz
114 11:20:41.324917 progress 6 % (0 MB)
115 11:20:41.325385 progress 13 % (0 MB)
116 11:20:41.325684 progress 20 % (0 MB)
117 11:20:41.327148 progress 27 % (0 MB)
118 11:20:41.329327 progress 33 % (0 MB)
119 11:20:41.331571 progress 40 % (0 MB)
120 11:20:41.333600 progress 47 % (0 MB)
121 11:20:41.335998 progress 54 % (0 MB)
122 11:20:41.338111 progress 60 % (0 MB)
123 11:20:41.340272 progress 67 % (0 MB)
124 11:20:41.342604 progress 74 % (0 MB)
125 11:20:41.344917 progress 81 % (0 MB)
126 11:20:41.347025 progress 87 % (0 MB)
127 11:20:41.348906 progress 94 % (0 MB)
128 11:20:41.351576 progress 100 % (0 MB)
129 11:20:41.359087 0 MB downloaded in 0.04 s (11.88 MB/s)
130 11:20:41.359341 end: 1.4.1 http-download (duration 00:00:00) [common]
132 11:20:41.359653 end: 1.4 download-retry (duration 00:00:00) [common]
133 11:20:41.359771 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 11:20:41.359933 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 11:20:44.267294 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12838104/extract-nfsrootfs-5j59oc3b
136 11:20:44.267504 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 11:20:44.267615 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 11:20:44.267779 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34
139 11:20:44.267909 makedir: /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin
140 11:20:44.268013 makedir: /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/tests
141 11:20:44.268114 makedir: /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/results
142 11:20:44.268217 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-add-keys
143 11:20:44.268420 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-add-sources
144 11:20:44.268612 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-background-process-start
145 11:20:44.268745 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-background-process-stop
146 11:20:44.268875 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-common-functions
147 11:20:44.269005 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-echo-ipv4
148 11:20:44.269134 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-install-packages
149 11:20:44.269262 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-installed-packages
150 11:20:44.269392 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-os-build
151 11:20:44.269519 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-probe-channel
152 11:20:44.269646 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-probe-ip
153 11:20:44.270166 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-target-ip
154 11:20:44.270297 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-target-mac
155 11:20:44.270425 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-target-storage
156 11:20:44.270555 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-test-case
157 11:20:44.270685 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-test-event
158 11:20:44.270813 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-test-feedback
159 11:20:44.270940 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-test-raise
160 11:20:44.271066 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-test-reference
161 11:20:44.271194 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-test-runner
162 11:20:44.271320 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-test-set
163 11:20:44.271444 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-test-shell
164 11:20:44.271574 Updating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-install-packages (oe)
165 11:20:44.271728 Updating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/bin/lava-installed-packages (oe)
166 11:20:44.271853 Creating /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/environment
167 11:20:44.271952 LAVA metadata
168 11:20:44.272025 - LAVA_JOB_ID=12838104
169 11:20:44.272091 - LAVA_DISPATCHER_IP=192.168.201.1
170 11:20:44.272197 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
171 11:20:44.272269 skipped lava-vland-overlay
172 11:20:44.272348 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 11:20:44.272433 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
174 11:20:44.272499 skipped lava-multinode-overlay
175 11:20:44.272576 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 11:20:44.272660 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
177 11:20:44.272738 Loading test definitions
178 11:20:44.272831 start: 1.5.2.3.1 git-repo-action (timeout 00:09:48) [common]
179 11:20:44.272906 Using /lava-12838104 at stage 0
180 11:20:44.273013 Fetching tests from https://github.com/kernelci/test-definitions
181 11:20:44.273103 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/0/tests/0_ltp-ipc'
182 11:20:52.318271 Running '/usr/bin/git checkout kernelci.org
183 11:20:52.477251 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 11:20:52.478119 uuid=12838104_1.5.2.3.1 testdef=None
185 11:20:52.478291 end: 1.5.2.3.1 git-repo-action (duration 00:00:08) [common]
187 11:20:52.478562 start: 1.5.2.3.2 test-overlay (timeout 00:09:40) [common]
188 11:20:52.479400 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 11:20:52.479667 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:40) [common]
191 11:20:52.480772 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 11:20:52.481043 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:40) [common]
194 11:20:52.482105 runner path: /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/0/tests/0_ltp-ipc test_uuid 12838104_1.5.2.3.1
195 11:20:52.482207 SKIPFILE='skipfile-lkft.yaml'
196 11:20:52.482282 SKIP_INSTALL='true'
197 11:20:52.482349 TST_CMDFILES='ipc'
198 11:20:52.482506 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 11:20:52.482741 Creating lava-test-runner.conf files
201 11:20:52.482814 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12838104/lava-overlay-e2cgmj34/lava-12838104/0 for stage 0
202 11:20:52.482914 - 0_ltp-ipc
203 11:20:52.483029 end: 1.5.2.3 test-definition (duration 00:00:08) [common]
204 11:20:52.483127 start: 1.5.2.4 compress-overlay (timeout 00:09:40) [common]
205 11:21:00.779093 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 11:21:00.779262 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:32) [common]
207 11:21:00.779367 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 11:21:00.779475 end: 1.5.2 lava-overlay (duration 00:00:17) [common]
209 11:21:00.779575 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:32) [common]
210 11:21:00.930627 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 11:21:00.931048 start: 1.5.4 extract-modules (timeout 00:09:32) [common]
212 11:21:00.931177 extracting modules file /var/lib/lava/dispatcher/tmp/12838104/tftp-deploy-wll8m483/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12838104/extract-nfsrootfs-5j59oc3b
213 11:21:00.957361 extracting modules file /var/lib/lava/dispatcher/tmp/12838104/tftp-deploy-wll8m483/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12838104/extract-overlay-ramdisk-4lj84q3r/ramdisk
214 11:21:00.978401 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 11:21:00.978549 start: 1.5.5 apply-overlay-tftp (timeout 00:09:32) [common]
216 11:21:00.978651 [common] Applying overlay to NFS
217 11:21:00.978736 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12838104/compress-overlay-xayvywjp/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12838104/extract-nfsrootfs-5j59oc3b
218 11:21:01.958587 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 11:21:01.958775 start: 1.5.6 configure-preseed-file (timeout 00:09:31) [common]
220 11:21:01.958889 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 11:21:01.958989 start: 1.5.7 compress-ramdisk (timeout 00:09:31) [common]
222 11:21:01.959083 Building ramdisk /var/lib/lava/dispatcher/tmp/12838104/extract-overlay-ramdisk-4lj84q3r/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12838104/extract-overlay-ramdisk-4lj84q3r/ramdisk
223 11:21:02.054800 >> 31364 blocks
224 11:21:02.713851 rename /var/lib/lava/dispatcher/tmp/12838104/extract-overlay-ramdisk-4lj84q3r/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12838104/tftp-deploy-wll8m483/ramdisk/ramdisk.cpio.gz
225 11:21:02.714400 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 11:21:02.714538 start: 1.5.8 prepare-kernel (timeout 00:09:30) [common]
227 11:21:02.714640 start: 1.5.8.1 prepare-fit (timeout 00:09:30) [common]
228 11:21:02.714732 No mkimage arch provided, not using FIT.
229 11:21:02.714825 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 11:21:02.714910 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 11:21:02.715017 end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
232 11:21:02.715105 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:30) [common]
233 11:21:02.715216 No LXC device requested
234 11:21:02.715301 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 11:21:02.715392 start: 1.7 deploy-device-env (timeout 00:09:30) [common]
236 11:21:02.715481 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 11:21:02.715561 Checking files for TFTP limit of 4294967296 bytes.
238 11:21:02.715979 end: 1 tftp-deploy (duration 00:00:30) [common]
239 11:21:02.716082 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 11:21:02.716180 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 11:21:02.716336 substitutions:
242 11:21:02.716407 - {DTB}: None
243 11:21:02.716472 - {INITRD}: 12838104/tftp-deploy-wll8m483/ramdisk/ramdisk.cpio.gz
244 11:21:02.716532 - {KERNEL}: 12838104/tftp-deploy-wll8m483/kernel/bzImage
245 11:21:02.716592 - {LAVA_MAC}: None
246 11:21:02.716651 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12838104/extract-nfsrootfs-5j59oc3b
247 11:21:02.716711 - {NFS_SERVER_IP}: 192.168.201.1
248 11:21:02.716767 - {PRESEED_CONFIG}: None
249 11:21:02.716823 - {PRESEED_LOCAL}: None
250 11:21:02.716878 - {RAMDISK}: 12838104/tftp-deploy-wll8m483/ramdisk/ramdisk.cpio.gz
251 11:21:02.716933 - {ROOT_PART}: None
252 11:21:02.716988 - {ROOT}: None
253 11:21:02.717043 - {SERVER_IP}: 192.168.201.1
254 11:21:02.717098 - {TEE}: None
255 11:21:02.717152 Parsed boot commands:
256 11:21:02.717207 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 11:21:02.717386 Parsed boot commands: tftpboot 192.168.201.1 12838104/tftp-deploy-wll8m483/kernel/bzImage 12838104/tftp-deploy-wll8m483/kernel/cmdline 12838104/tftp-deploy-wll8m483/ramdisk/ramdisk.cpio.gz
258 11:21:02.717473 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 11:21:02.717561 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 11:21:02.717655 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 11:21:02.717783 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 11:21:02.717856 Not connected, no need to disconnect.
263 11:21:02.717932 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 11:21:02.718014 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 11:21:02.718083 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-15'
266 11:21:02.721811 Setting prompt string to ['lava-test: # ']
267 11:21:02.722158 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 11:21:02.722268 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 11:21:02.722403 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 11:21:02.722540 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 11:21:02.722764 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-15' '--port=1' '--command=reboot'
272 11:21:07.876773 >> Command sent successfully.
273 11:21:07.886908 Returned 0 in 5 seconds
274 11:21:07.988258 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 11:21:07.989809 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 11:21:07.990395 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 11:21:07.990891 Setting prompt string to 'Starting depthcharge on Voema...'
279 11:21:07.991272 Changing prompt to 'Starting depthcharge on Voema...'
280 11:21:07.991651 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
281 11:21:07.992942 [Enter `^Ec?' for help]
282 11:21:09.545016
283 11:21:09.545626
284 11:21:09.555241 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
285 11:21:09.558482 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
286 11:21:09.565587 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
287 11:21:09.570167 CPU: AES supported, TXT NOT supported, VT supported
288 11:21:09.576574 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
289 11:21:09.579824 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
290 11:21:09.583503 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
291 11:21:09.587784 VBOOT: Loading verstage.
292 11:21:09.594151 FMAP: Found "FLASH" version 1.1 at 0x1804000.
293 11:21:09.597643 FMAP: base = 0x0 size = 0x2000000 #areas = 32
294 11:21:09.604545 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
295 11:21:09.610875 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
296 11:21:09.618391 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
297 11:21:09.621602
298 11:21:09.622220
299 11:21:09.631061 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
300 11:21:09.646312 Probing TPM: . done!
301 11:21:09.648870 TPM ready after 0 ms
302 11:21:09.652366 Connected to device vid:did:rid of 1ae0:0028:00
303 11:21:09.663488 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
304 11:21:09.670250 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 11:21:09.674657 Initialized TPM device CR50 revision 0
306 11:21:09.722553 tlcl_send_startup: Startup return code is 0
307 11:21:09.723144 TPM: setup succeeded
308 11:21:09.737415 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 11:21:09.751033 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 11:21:09.764810 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 11:21:09.773850 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 11:21:09.777750 Chrome EC: UHEPI supported
313 11:21:09.780773 Phase 1
314 11:21:09.784728 FMAP: area GBB found @ 1805000 (458752 bytes)
315 11:21:09.791269 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
316 11:21:09.800702 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
317 11:21:09.807596 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
318 11:21:09.814446 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
319 11:21:09.817352 Recovery requested (1009000e)
320 11:21:09.822463 TPM: Extending digest for VBOOT: boot mode into PCR 0
321 11:21:09.832458 tlcl_extend: response is 0
322 11:21:09.839338 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
323 11:21:09.848906 tlcl_extend: response is 0
324 11:21:09.855565 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
325 11:21:09.862069 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
326 11:21:09.868937 BS: verstage times (exec / console): total (unknown) / 142 ms
327 11:21:09.869711
328 11:21:09.870359
329 11:21:09.882274 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
330 11:21:09.889066 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
331 11:21:09.892044 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
332 11:21:09.895091 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
333 11:21:09.903123 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
334 11:21:09.905473 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
335 11:21:09.908617 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
336 11:21:09.912013 TCO_STS: 0000 0000
337 11:21:09.915631 GEN_PMCON: d0015038 00002200
338 11:21:09.918640 GBLRST_CAUSE: 00000000 00000000
339 11:21:09.919158 HPR_CAUSE0: 00000000
340 11:21:09.921859 prev_sleep_state 5
341 11:21:09.926064 Boot Count incremented to 6447
342 11:21:09.932239 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
343 11:21:09.938446 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
344 11:21:09.945374 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
345 11:21:09.951723 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
346 11:21:09.956204 Chrome EC: UHEPI supported
347 11:21:09.962472 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
348 11:21:09.976051 Probing TPM: done!
349 11:21:09.982218 Connected to device vid:did:rid of 1ae0:0028:00
350 11:21:09.991835 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
351 11:21:09.996112 Initialized TPM device CR50 revision 0
352 11:21:10.011384 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
353 11:21:10.017611 MRC: Hash idx 0x100b comparison successful.
354 11:21:10.020567 MRC cache found, size faa8
355 11:21:10.021144 bootmode is set to: 2
356 11:21:10.024151 SPD index = 2
357 11:21:10.031256 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
358 11:21:10.034171 SPD: module type is LPDDR4X
359 11:21:10.037538 SPD: module part number is MT53D1G64D4NW-046
360 11:21:10.044013 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
361 11:21:10.047632 SPD: device width 16 bits, bus width 16 bits
362 11:21:10.054118 SPD: module size is 2048 MB (per channel)
363 11:21:10.484332 CBMEM:
364 11:21:10.487773 IMD: root @ 0x76fff000 254 entries.
365 11:21:10.490462 IMD: root @ 0x76ffec00 62 entries.
366 11:21:10.493665 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
367 11:21:10.500073 FMAP: area RW_VPD found @ f35000 (8192 bytes)
368 11:21:10.503245 External stage cache:
369 11:21:10.506478 IMD: root @ 0x7b3ff000 254 entries.
370 11:21:10.510580 IMD: root @ 0x7b3fec00 62 entries.
371 11:21:10.524923 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
372 11:21:10.531476 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
373 11:21:10.538102 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
374 11:21:10.553152 MRC: 'RECOVERY_MRC_CACHE' does not need update.
375 11:21:10.558286 cse_lite: Skip switching to RW in the recovery path
376 11:21:10.558920 8 DIMMs found
377 11:21:10.559429 SMM Memory Map
378 11:21:10.561580 SMRAM : 0x7b000000 0x800000
379 11:21:10.568126 Subregion 0: 0x7b000000 0x200000
380 11:21:10.572087 Subregion 1: 0x7b200000 0x200000
381 11:21:10.575100 Subregion 2: 0x7b400000 0x400000
382 11:21:10.575583 top_of_ram = 0x77000000
383 11:21:10.581597 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
384 11:21:10.588608 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
385 11:21:10.591862 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
386 11:21:10.598447 MTRR Range: Start=ff000000 End=0 (Size 1000000)
387 11:21:10.605151 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
388 11:21:10.611522 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
389 11:21:10.621636 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
390 11:21:10.625212 Processing 211 relocs. Offset value of 0x74c0b000
391 11:21:10.634575 BS: romstage times (exec / console): total (unknown) / 276 ms
392 11:21:10.640319
393 11:21:10.640890
394 11:21:10.651779 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
395 11:21:10.656341 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
396 11:21:10.661773 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
397 11:21:10.668214 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
398 11:21:10.678432 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
399 11:21:10.685129 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
400 11:21:10.726855 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
401 11:21:10.733801 Processing 5008 relocs. Offset value of 0x75d98000
402 11:21:10.737117 BS: postcar times (exec / console): total (unknown) / 59 ms
403 11:21:10.737748
404 11:21:10.740353
405 11:21:10.751148 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
406 11:21:10.751729 Normal boot
407 11:21:10.753457 FW_CONFIG value is 0x804c02
408 11:21:10.759633 PCI: 00:07.0 disabled by fw_config
409 11:21:10.760535 PCI: 00:07.1 disabled by fw_config
410 11:21:10.763643 PCI: 00:0d.2 disabled by fw_config
411 11:21:10.766909 PCI: 00:1c.7 disabled by fw_config
412 11:21:10.773345 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 11:21:10.780416 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 11:21:10.783644 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 11:21:10.786836 GENERIC: 0.0 disabled by fw_config
416 11:21:10.790344 GENERIC: 1.0 disabled by fw_config
417 11:21:10.797773 fw_config match found: DB_USB=USB3_ACTIVE
418 11:21:10.800042 fw_config match found: DB_USB=USB3_ACTIVE
419 11:21:10.803972 fw_config match found: DB_USB=USB3_ACTIVE
420 11:21:10.810341 fw_config match found: DB_USB=USB3_ACTIVE
421 11:21:10.814037 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
422 11:21:10.820271 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
423 11:21:10.830111 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
424 11:21:10.837653 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
425 11:21:10.840949 microcode: sig=0x806c1 pf=0x80 revision=0x86
426 11:21:10.847584 microcode: Update skipped, already up-to-date
427 11:21:10.853216 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
428 11:21:10.880403 Detected 4 core, 8 thread CPU.
429 11:21:10.883887 Setting up SMI for CPU
430 11:21:10.887191 IED base = 0x7b400000
431 11:21:10.887666 IED size = 0x00400000
432 11:21:10.890212 Will perform SMM setup.
433 11:21:10.896965 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
434 11:21:10.903643 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
435 11:21:10.910701 Processing 16 relocs. Offset value of 0x00030000
436 11:21:10.914254 Attempting to start 7 APs
437 11:21:10.917255 Waiting for 10ms after sending INIT.
438 11:21:10.932863 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
439 11:21:10.935707 AP: slot 4 apic_id 3.
440 11:21:10.939867 AP: slot 5 apic_id 2.
441 11:21:10.940531 AP: slot 2 apic_id 5.
442 11:21:10.942385 AP: slot 6 apic_id 4.
443 11:21:10.946420 AP: slot 3 apic_id 6.
444 11:21:10.947058 AP: slot 7 apic_id 7.
445 11:21:10.947449 done.
446 11:21:10.952426 Waiting for 2nd SIPI to complete...done.
447 11:21:10.958982 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 11:21:10.965896 Processing 13 relocs. Offset value of 0x00038000
449 11:21:10.969074 Unable to locate Global NVS
450 11:21:10.975598 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 11:21:10.978912 Installing permanent SMM handler to 0x7b000000
452 11:21:10.989060 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 11:21:10.992575 Processing 794 relocs. Offset value of 0x7b010000
454 11:21:11.002204 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 11:21:11.005654 Processing 13 relocs. Offset value of 0x7b008000
456 11:21:11.012669 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 11:21:11.018897 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 11:21:11.022084 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 11:21:11.028907 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 11:21:11.036294 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 11:21:11.044449 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 11:21:11.048511 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 11:21:11.049093 Unable to locate Global NVS
464 11:21:11.058881 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 11:21:11.061965 Clearing SMI status registers
466 11:21:11.062542 SMI_STS: PM1
467 11:21:11.065382 PM1_STS: PWRBTN
468 11:21:11.071939 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 11:21:11.075524 In relocation handler: CPU 0
470 11:21:11.078484 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 11:21:11.085529 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 11:21:11.086151 Relocation complete.
473 11:21:11.094759 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 11:21:11.095320 In relocation handler: CPU 1
475 11:21:11.101804 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 11:21:11.102394 Relocation complete.
477 11:21:11.108160 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
478 11:21:11.111817 In relocation handler: CPU 3
479 11:21:11.118412 New SMBASE=0x7afff400 IEDBASE=0x7b400000
480 11:21:11.121305 Writing SMRR. base = 0x7b000006, mask=0xff800c00
481 11:21:11.125508 Relocation complete.
482 11:21:11.131550 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
483 11:21:11.134818 In relocation handler: CPU 7
484 11:21:11.138540 New SMBASE=0x7affe400 IEDBASE=0x7b400000
485 11:21:11.141812 Relocation complete.
486 11:21:11.149499 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
487 11:21:11.152859 In relocation handler: CPU 4
488 11:21:11.154865 New SMBASE=0x7afff000 IEDBASE=0x7b400000
489 11:21:11.158177 Relocation complete.
490 11:21:11.165632 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
491 11:21:11.169877 In relocation handler: CPU 5
492 11:21:11.171473 New SMBASE=0x7affec00 IEDBASE=0x7b400000
493 11:21:11.175578 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 11:21:11.178271 Relocation complete.
495 11:21:11.184975 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
496 11:21:11.187888 In relocation handler: CPU 2
497 11:21:11.192400 New SMBASE=0x7afff800 IEDBASE=0x7b400000
498 11:21:11.194691 Relocation complete.
499 11:21:11.201477 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
500 11:21:11.205565 In relocation handler: CPU 6
501 11:21:11.208105 New SMBASE=0x7affe800 IEDBASE=0x7b400000
502 11:21:11.215106 Writing SMRR. base = 0x7b000006, mask=0xff800c00
503 11:21:11.215692 Relocation complete.
504 11:21:11.218118 Initializing CPU #0
505 11:21:11.221949 CPU: vendor Intel device 806c1
506 11:21:11.225080 CPU: family 06, model 8c, stepping 01
507 11:21:11.228284 Clearing out pending MCEs
508 11:21:11.231530 Setting up local APIC...
509 11:21:11.232148 apic_id: 0x00 done.
510 11:21:11.235056 Turbo is available but hidden
511 11:21:11.238426 Turbo is available and visible
512 11:21:11.245092 microcode: Update skipped, already up-to-date
513 11:21:11.245738 CPU #0 initialized
514 11:21:11.248158 Initializing CPU #1
515 11:21:11.251609 Initializing CPU #5
516 11:21:11.252084 Initializing CPU #4
517 11:21:11.254466 CPU: vendor Intel device 806c1
518 11:21:11.258365 CPU: family 06, model 8c, stepping 01
519 11:21:11.261456 CPU: vendor Intel device 806c1
520 11:21:11.264545 CPU: family 06, model 8c, stepping 01
521 11:21:11.268739 Clearing out pending MCEs
522 11:21:11.272567 Clearing out pending MCEs
523 11:21:11.274895 Setting up local APIC...
524 11:21:11.275467 Initializing CPU #3
525 11:21:11.277846 Initializing CPU #7
526 11:21:11.281606 CPU: vendor Intel device 806c1
527 11:21:11.284913 CPU: family 06, model 8c, stepping 01
528 11:21:11.288161 CPU: vendor Intel device 806c1
529 11:21:11.291903 CPU: family 06, model 8c, stepping 01
530 11:21:11.294715 Clearing out pending MCEs
531 11:21:11.298364 Clearing out pending MCEs
532 11:21:11.298945 apic_id: 0x02 done.
533 11:21:11.301464 Initializing CPU #2
534 11:21:11.304407 Initializing CPU #6
535 11:21:11.304986 CPU: vendor Intel device 806c1
536 11:21:11.312155 CPU: family 06, model 8c, stepping 01
537 11:21:11.312733 Setting up local APIC...
538 11:21:11.315387 CPU: vendor Intel device 806c1
539 11:21:11.319257 CPU: family 06, model 8c, stepping 01
540 11:21:11.322636 CPU: vendor Intel device 806c1
541 11:21:11.326550 CPU: family 06, model 8c, stepping 01
542 11:21:11.329756 Clearing out pending MCEs
543 11:21:11.333020 Clearing out pending MCEs
544 11:21:11.333593 Setting up local APIC...
545 11:21:11.336045 Clearing out pending MCEs
546 11:21:11.339121 Setting up local APIC...
547 11:21:11.342378 apic_id: 0x06 done.
548 11:21:11.342853 Setting up local APIC...
549 11:21:11.345957 Setting up local APIC...
550 11:21:11.352837 microcode: Update skipped, already up-to-date
551 11:21:11.353417 apic_id: 0x03 done.
552 11:21:11.355821 CPU #5 initialized
553 11:21:11.359600 microcode: Update skipped, already up-to-date
554 11:21:11.362417 apic_id: 0x04 done.
555 11:21:11.365420 apic_id: 0x05 done.
556 11:21:11.369309 microcode: Update skipped, already up-to-date
557 11:21:11.372279 microcode: Update skipped, already up-to-date
558 11:21:11.376039 CPU #4 initialized
559 11:21:11.376629 CPU #6 initialized
560 11:21:11.379130 CPU #2 initialized
561 11:21:11.382262 Setting up local APIC...
562 11:21:11.382748 apic_id: 0x07 done.
563 11:21:11.389383 microcode: Update skipped, already up-to-date
564 11:21:11.392841 microcode: Update skipped, already up-to-date
565 11:21:11.395578 CPU #3 initialized
566 11:21:11.396162 CPU #7 initialized
567 11:21:11.398882 apic_id: 0x01 done.
568 11:21:11.401967 microcode: Update skipped, already up-to-date
569 11:21:11.405608 CPU #1 initialized
570 11:21:11.408848 bsp_do_flight_plan done after 454 msecs.
571 11:21:11.412608 CPU: frequency set to 4400 MHz
572 11:21:11.415583 Enabling SMIs.
573 11:21:11.422215 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
574 11:21:11.437657 SATAXPCIE1 indicates PCIe NVMe is present
575 11:21:11.440349 Probing TPM: done!
576 11:21:11.443792 Connected to device vid:did:rid of 1ae0:0028:00
577 11:21:11.454647 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
578 11:21:11.457592 Initialized TPM device CR50 revision 0
579 11:21:11.461325 Enabling S0i3.4
580 11:21:11.467922 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
581 11:21:11.470931 Found a VBT of 8704 bytes after decompression
582 11:21:11.478094 cse_lite: CSE RO boot. HybridStorageMode disabled
583 11:21:11.484426 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
584 11:21:11.559498 FSPS returned 0
585 11:21:11.562500 Executing Phase 1 of FspMultiPhaseSiInit
586 11:21:11.572650 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
587 11:21:11.575896 port C0 DISC req: usage 1 usb3 1 usb2 5
588 11:21:11.580631 Raw Buffer output 0 00000511
589 11:21:11.583415 Raw Buffer output 1 00000000
590 11:21:11.587435 pmc_send_ipc_cmd succeeded
591 11:21:11.593403 port C1 DISC req: usage 1 usb3 2 usb2 3
592 11:21:11.594037 Raw Buffer output 0 00000321
593 11:21:11.596575 Raw Buffer output 1 00000000
594 11:21:11.601326 pmc_send_ipc_cmd succeeded
595 11:21:11.606390 Detected 4 core, 8 thread CPU.
596 11:21:11.608937 Detected 4 core, 8 thread CPU.
597 11:21:11.810137 Display FSP Version Info HOB
598 11:21:11.812941 Reference Code - CPU = a.0.4c.31
599 11:21:11.816327 uCode Version = 0.0.0.86
600 11:21:11.819926 TXT ACM version = ff.ff.ff.ffff
601 11:21:11.823157 Reference Code - ME = a.0.4c.31
602 11:21:11.826530 MEBx version = 0.0.0.0
603 11:21:11.829765 ME Firmware Version = Consumer SKU
604 11:21:11.832714 Reference Code - PCH = a.0.4c.31
605 11:21:11.836270 PCH-CRID Status = Disabled
606 11:21:11.839426 PCH-CRID Original Value = ff.ff.ff.ffff
607 11:21:11.842805 PCH-CRID New Value = ff.ff.ff.ffff
608 11:21:11.846233 OPROM - RST - RAID = ff.ff.ff.ffff
609 11:21:11.849900 PCH Hsio Version = 4.0.0.0
610 11:21:11.852814 Reference Code - SA - System Agent = a.0.4c.31
611 11:21:11.856214 Reference Code - MRC = 2.0.0.1
612 11:21:11.859663 SA - PCIe Version = a.0.4c.31
613 11:21:11.863511 SA-CRID Status = Disabled
614 11:21:11.866222 SA-CRID Original Value = 0.0.0.1
615 11:21:11.869389 SA-CRID New Value = 0.0.0.1
616 11:21:11.872815 OPROM - VBIOS = ff.ff.ff.ffff
617 11:21:11.875849 IO Manageability Engine FW Version = 11.1.4.0
618 11:21:11.879509 PHY Build Version = 0.0.0.e0
619 11:21:11.882666 Thunderbolt(TM) FW Version = 0.0.0.0
620 11:21:11.889228 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
621 11:21:11.893504 ITSS IRQ Polarities Before:
622 11:21:11.894280 IPC0: 0xffffffff
623 11:21:11.894719 IPC1: 0xffffffff
624 11:21:11.897328 IPC2: 0xffffffff
625 11:21:11.897954 IPC3: 0xffffffff
626 11:21:11.900930 ITSS IRQ Polarities After:
627 11:21:11.904117 IPC0: 0xffffffff
628 11:21:11.904698 IPC1: 0xffffffff
629 11:21:11.907392 IPC2: 0xffffffff
630 11:21:11.907870 IPC3: 0xffffffff
631 11:21:11.914978 Found PCIe Root Port #9 at PCI: 00:1d.0.
632 11:21:11.923844 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
633 11:21:11.937391 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
634 11:21:11.947330 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
635 11:21:11.954301 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
636 11:21:11.957099 Enumerating buses...
637 11:21:11.960648 Show all devs... Before device enumeration.
638 11:21:11.963824 Root Device: enabled 1
639 11:21:11.967242 DOMAIN: 0000: enabled 1
640 11:21:11.971146 CPU_CLUSTER: 0: enabled 1
641 11:21:11.971721 PCI: 00:00.0: enabled 1
642 11:21:11.974327 PCI: 00:02.0: enabled 1
643 11:21:11.976939 PCI: 00:04.0: enabled 1
644 11:21:11.977411 PCI: 00:05.0: enabled 1
645 11:21:11.980643 PCI: 00:06.0: enabled 0
646 11:21:11.983787 PCI: 00:07.0: enabled 0
647 11:21:11.987397 PCI: 00:07.1: enabled 0
648 11:21:11.987978 PCI: 00:07.2: enabled 0
649 11:21:11.991322 PCI: 00:07.3: enabled 0
650 11:21:11.994173 PCI: 00:08.0: enabled 1
651 11:21:11.997144 PCI: 00:09.0: enabled 0
652 11:21:11.997751 PCI: 00:0a.0: enabled 0
653 11:21:12.000160 PCI: 00:0d.0: enabled 1
654 11:21:12.005241 PCI: 00:0d.1: enabled 0
655 11:21:12.007522 PCI: 00:0d.2: enabled 0
656 11:21:12.008101 PCI: 00:0d.3: enabled 0
657 11:21:12.011030 PCI: 00:0e.0: enabled 0
658 11:21:12.013818 PCI: 00:10.2: enabled 1
659 11:21:12.016822 PCI: 00:10.6: enabled 0
660 11:21:12.017297 PCI: 00:10.7: enabled 0
661 11:21:12.020972 PCI: 00:12.0: enabled 0
662 11:21:12.023580 PCI: 00:12.6: enabled 0
663 11:21:12.024057 PCI: 00:13.0: enabled 0
664 11:21:12.026800 PCI: 00:14.0: enabled 1
665 11:21:12.030263 PCI: 00:14.1: enabled 0
666 11:21:12.033366 PCI: 00:14.2: enabled 1
667 11:21:12.033876 PCI: 00:14.3: enabled 1
668 11:21:12.036813 PCI: 00:15.0: enabled 1
669 11:21:12.040487 PCI: 00:15.1: enabled 1
670 11:21:12.043486 PCI: 00:15.2: enabled 1
671 11:21:12.044073 PCI: 00:15.3: enabled 1
672 11:21:12.047030 PCI: 00:16.0: enabled 1
673 11:21:12.050202 PCI: 00:16.1: enabled 0
674 11:21:12.053455 PCI: 00:16.2: enabled 0
675 11:21:12.053963 PCI: 00:16.3: enabled 0
676 11:21:12.056585 PCI: 00:16.4: enabled 0
677 11:21:12.059830 PCI: 00:16.5: enabled 0
678 11:21:12.063576 PCI: 00:17.0: enabled 1
679 11:21:12.064057 PCI: 00:19.0: enabled 0
680 11:21:12.066671 PCI: 00:19.1: enabled 1
681 11:21:12.070137 PCI: 00:19.2: enabled 0
682 11:21:12.070617 PCI: 00:1c.0: enabled 1
683 11:21:12.073251 PCI: 00:1c.1: enabled 0
684 11:21:12.076720 PCI: 00:1c.2: enabled 0
685 11:21:12.080900 PCI: 00:1c.3: enabled 0
686 11:21:12.081568 PCI: 00:1c.4: enabled 0
687 11:21:12.083188 PCI: 00:1c.5: enabled 0
688 11:21:12.086686 PCI: 00:1c.6: enabled 1
689 11:21:12.089847 PCI: 00:1c.7: enabled 0
690 11:21:12.090324 PCI: 00:1d.0: enabled 1
691 11:21:12.093707 PCI: 00:1d.1: enabled 0
692 11:21:12.096979 PCI: 00:1d.2: enabled 1
693 11:21:12.100898 PCI: 00:1d.3: enabled 0
694 11:21:12.101488 PCI: 00:1e.0: enabled 1
695 11:21:12.102914 PCI: 00:1e.1: enabled 0
696 11:21:12.107918 PCI: 00:1e.2: enabled 1
697 11:21:12.108505 PCI: 00:1e.3: enabled 1
698 11:21:12.109755 PCI: 00:1f.0: enabled 1
699 11:21:12.113196 PCI: 00:1f.1: enabled 0
700 11:21:12.116529 PCI: 00:1f.2: enabled 1
701 11:21:12.117117 PCI: 00:1f.3: enabled 1
702 11:21:12.119772 PCI: 00:1f.4: enabled 0
703 11:21:12.123260 PCI: 00:1f.5: enabled 1
704 11:21:12.126311 PCI: 00:1f.6: enabled 0
705 11:21:12.126791 PCI: 00:1f.7: enabled 0
706 11:21:12.129975 APIC: 00: enabled 1
707 11:21:12.133404 GENERIC: 0.0: enabled 1
708 11:21:12.134033 GENERIC: 0.0: enabled 1
709 11:21:12.137290 GENERIC: 1.0: enabled 1
710 11:21:12.139953 GENERIC: 0.0: enabled 1
711 11:21:12.143241 GENERIC: 1.0: enabled 1
712 11:21:12.143832 USB0 port 0: enabled 1
713 11:21:12.146624 GENERIC: 0.0: enabled 1
714 11:21:12.150169 USB0 port 0: enabled 1
715 11:21:12.152592 GENERIC: 0.0: enabled 1
716 11:21:12.153113 I2C: 00:1a: enabled 1
717 11:21:12.156070 I2C: 00:31: enabled 1
718 11:21:12.159807 I2C: 00:32: enabled 1
719 11:21:12.160395 I2C: 00:10: enabled 1
720 11:21:12.163088 I2C: 00:15: enabled 1
721 11:21:12.165980 GENERIC: 0.0: enabled 0
722 11:21:12.166460 GENERIC: 1.0: enabled 0
723 11:21:12.169822 GENERIC: 0.0: enabled 1
724 11:21:12.172895 SPI: 00: enabled 1
725 11:21:12.173494 SPI: 00: enabled 1
726 11:21:12.176329 PNP: 0c09.0: enabled 1
727 11:21:12.179456 GENERIC: 0.0: enabled 1
728 11:21:12.179934 USB3 port 0: enabled 1
729 11:21:12.182549 USB3 port 1: enabled 1
730 11:21:12.185894 USB3 port 2: enabled 0
731 11:21:12.189424 USB3 port 3: enabled 0
732 11:21:12.190056 USB2 port 0: enabled 0
733 11:21:12.192775 USB2 port 1: enabled 1
734 11:21:12.196182 USB2 port 2: enabled 1
735 11:21:12.196759 USB2 port 3: enabled 0
736 11:21:12.199315 USB2 port 4: enabled 1
737 11:21:12.202626 USB2 port 5: enabled 0
738 11:21:12.203105 USB2 port 6: enabled 0
739 11:21:12.206064 USB2 port 7: enabled 0
740 11:21:12.210131 USB2 port 8: enabled 0
741 11:21:12.213058 USB2 port 9: enabled 0
742 11:21:12.213631 USB3 port 0: enabled 0
743 11:21:12.216477 USB3 port 1: enabled 1
744 11:21:12.220190 USB3 port 2: enabled 0
745 11:21:12.220769 USB3 port 3: enabled 0
746 11:21:12.223526 GENERIC: 0.0: enabled 1
747 11:21:12.226526 GENERIC: 1.0: enabled 1
748 11:21:12.227073 APIC: 01: enabled 1
749 11:21:12.229575 APIC: 05: enabled 1
750 11:21:12.233315 APIC: 06: enabled 1
751 11:21:12.233936 APIC: 03: enabled 1
752 11:21:12.237265 APIC: 02: enabled 1
753 11:21:12.239582 APIC: 04: enabled 1
754 11:21:12.240159 APIC: 07: enabled 1
755 11:21:12.242800 Compare with tree...
756 11:21:12.246324 Root Device: enabled 1
757 11:21:12.246895 DOMAIN: 0000: enabled 1
758 11:21:12.249213 PCI: 00:00.0: enabled 1
759 11:21:12.252817 PCI: 00:02.0: enabled 1
760 11:21:12.256364 PCI: 00:04.0: enabled 1
761 11:21:12.256839 GENERIC: 0.0: enabled 1
762 11:21:12.259180 PCI: 00:05.0: enabled 1
763 11:21:12.263050 PCI: 00:06.0: enabled 0
764 11:21:12.265950 PCI: 00:07.0: enabled 0
765 11:21:12.269325 GENERIC: 0.0: enabled 1
766 11:21:12.269865 PCI: 00:07.1: enabled 0
767 11:21:12.273296 GENERIC: 1.0: enabled 1
768 11:21:12.275810 PCI: 00:07.2: enabled 0
769 11:21:12.279333 GENERIC: 0.0: enabled 1
770 11:21:12.282533 PCI: 00:07.3: enabled 0
771 11:21:12.286070 GENERIC: 1.0: enabled 1
772 11:21:12.286541 PCI: 00:08.0: enabled 1
773 11:21:12.289420 PCI: 00:09.0: enabled 0
774 11:21:12.292651 PCI: 00:0a.0: enabled 0
775 11:21:12.296545 PCI: 00:0d.0: enabled 1
776 11:21:12.299417 USB0 port 0: enabled 1
777 11:21:12.299993 USB3 port 0: enabled 1
778 11:21:12.303277 USB3 port 1: enabled 1
779 11:21:12.305783 USB3 port 2: enabled 0
780 11:21:12.309596 USB3 port 3: enabled 0
781 11:21:12.312541 PCI: 00:0d.1: enabled 0
782 11:21:12.313018 PCI: 00:0d.2: enabled 0
783 11:21:12.316387 GENERIC: 0.0: enabled 1
784 11:21:12.319497 PCI: 00:0d.3: enabled 0
785 11:21:12.322484 PCI: 00:0e.0: enabled 0
786 11:21:12.325723 PCI: 00:10.2: enabled 1
787 11:21:12.326309 PCI: 00:10.6: enabled 0
788 11:21:12.329197 PCI: 00:10.7: enabled 0
789 11:21:12.332809 PCI: 00:12.0: enabled 0
790 11:21:12.336204 PCI: 00:12.6: enabled 0
791 11:21:12.339809 PCI: 00:13.0: enabled 0
792 11:21:12.340392 PCI: 00:14.0: enabled 1
793 11:21:12.342861 USB0 port 0: enabled 1
794 11:21:12.346194 USB2 port 0: enabled 0
795 11:21:12.349752 USB2 port 1: enabled 1
796 11:21:12.352652 USB2 port 2: enabled 1
797 11:21:12.353130 USB2 port 3: enabled 0
798 11:21:12.355821 USB2 port 4: enabled 1
799 11:21:12.359335 USB2 port 5: enabled 0
800 11:21:12.362607 USB2 port 6: enabled 0
801 11:21:12.366539 USB2 port 7: enabled 0
802 11:21:12.368999 USB2 port 8: enabled 0
803 11:21:12.369585 USB2 port 9: enabled 0
804 11:21:12.372543 USB3 port 0: enabled 0
805 11:21:12.375677 USB3 port 1: enabled 1
806 11:21:12.379421 USB3 port 2: enabled 0
807 11:21:12.382574 USB3 port 3: enabled 0
808 11:21:12.383111 PCI: 00:14.1: enabled 0
809 11:21:12.385834 PCI: 00:14.2: enabled 1
810 11:21:12.388929 PCI: 00:14.3: enabled 1
811 11:21:12.392265 GENERIC: 0.0: enabled 1
812 11:21:12.396030 PCI: 00:15.0: enabled 1
813 11:21:12.396646 I2C: 00:1a: enabled 1
814 11:21:12.399061 I2C: 00:31: enabled 1
815 11:21:12.402414 I2C: 00:32: enabled 1
816 11:21:12.405514 PCI: 00:15.1: enabled 1
817 11:21:12.409087 I2C: 00:10: enabled 1
818 11:21:12.409706 PCI: 00:15.2: enabled 1
819 11:21:12.412097 PCI: 00:15.3: enabled 1
820 11:21:12.416395 PCI: 00:16.0: enabled 1
821 11:21:12.419736 PCI: 00:16.1: enabled 0
822 11:21:12.420379 PCI: 00:16.2: enabled 0
823 11:21:12.422141 PCI: 00:16.3: enabled 0
824 11:21:12.425367 PCI: 00:16.4: enabled 0
825 11:21:12.428904 PCI: 00:16.5: enabled 0
826 11:21:12.432381 PCI: 00:17.0: enabled 1
827 11:21:12.432970 PCI: 00:19.0: enabled 0
828 11:21:12.435661 PCI: 00:19.1: enabled 1
829 11:21:12.439091 I2C: 00:15: enabled 1
830 11:21:12.442758 PCI: 00:19.2: enabled 0
831 11:21:12.445604 PCI: 00:1d.0: enabled 1
832 11:21:12.446231 GENERIC: 0.0: enabled 1
833 11:21:12.449337 PCI: 00:1e.0: enabled 1
834 11:21:12.453150 PCI: 00:1e.1: enabled 0
835 11:21:12.456124 PCI: 00:1e.2: enabled 1
836 11:21:12.456718 SPI: 00: enabled 1
837 11:21:12.458660 PCI: 00:1e.3: enabled 1
838 11:21:12.462587 SPI: 00: enabled 1
839 11:21:12.466033 PCI: 00:1f.0: enabled 1
840 11:21:12.466521 PNP: 0c09.0: enabled 1
841 11:21:12.469398 PCI: 00:1f.1: enabled 0
842 11:21:12.472135 PCI: 00:1f.2: enabled 1
843 11:21:12.475493 GENERIC: 0.0: enabled 1
844 11:21:12.479386 GENERIC: 0.0: enabled 1
845 11:21:12.482135 GENERIC: 1.0: enabled 1
846 11:21:12.482716 PCI: 00:1f.3: enabled 1
847 11:21:12.485373 PCI: 00:1f.4: enabled 0
848 11:21:12.488721 PCI: 00:1f.5: enabled 1
849 11:21:12.491815 PCI: 00:1f.6: enabled 0
850 11:21:12.495540 PCI: 00:1f.7: enabled 0
851 11:21:12.496146 CPU_CLUSTER: 0: enabled 1
852 11:21:12.498541 APIC: 00: enabled 1
853 11:21:12.502143 APIC: 01: enabled 1
854 11:21:12.502623 APIC: 05: enabled 1
855 11:21:12.505111 APIC: 06: enabled 1
856 11:21:12.508808 APIC: 03: enabled 1
857 11:21:12.509290 APIC: 02: enabled 1
858 11:21:12.561851 APIC: 04: enabled 1
859 11:21:12.562493 APIC: 07: enabled 1
860 11:21:12.562903 Root Device scanning...
861 11:21:12.563456 scan_static_bus for Root Device
862 11:21:12.563828 DOMAIN: 0000 enabled
863 11:21:12.564172 CPU_CLUSTER: 0 enabled
864 11:21:12.564511 DOMAIN: 0000 scanning...
865 11:21:12.565187 PCI: pci_scan_bus for bus 00
866 11:21:12.565547 PCI: 00:00.0 [8086/0000] ops
867 11:21:12.566077 PCI: 00:00.0 [8086/9a12] enabled
868 11:21:12.566445 PCI: 00:02.0 [8086/0000] bus ops
869 11:21:12.566777 PCI: 00:02.0 [8086/9a40] enabled
870 11:21:12.567098 PCI: 00:04.0 [8086/0000] bus ops
871 11:21:12.567420 PCI: 00:04.0 [8086/9a03] enabled
872 11:21:12.567734 PCI: 00:05.0 [8086/9a19] enabled
873 11:21:12.568051 PCI: 00:07.0 [0000/0000] hidden
874 11:21:12.568366 PCI: 00:08.0 [8086/9a11] enabled
875 11:21:12.602570 PCI: 00:0a.0 [8086/9a0d] disabled
876 11:21:12.603156 PCI: 00:0d.0 [8086/0000] bus ops
877 11:21:12.603545 PCI: 00:0d.0 [8086/9a13] enabled
878 11:21:12.604401 PCI: 00:14.0 [8086/0000] bus ops
879 11:21:12.604805 PCI: 00:14.0 [8086/a0ed] enabled
880 11:21:12.605158 PCI: 00:14.2 [8086/a0ef] enabled
881 11:21:12.605498 PCI: 00:14.3 [8086/0000] bus ops
882 11:21:12.605893 PCI: 00:14.3 [8086/a0f0] enabled
883 11:21:12.606232 PCI: 00:15.0 [8086/0000] bus ops
884 11:21:12.606667 PCI: 00:15.0 [8086/a0e8] enabled
885 11:21:12.607003 PCI: 00:15.1 [8086/0000] bus ops
886 11:21:12.607436 PCI: 00:15.1 [8086/a0e9] enabled
887 11:21:12.607808 PCI: 00:15.2 [8086/0000] bus ops
888 11:21:12.610290 PCI: 00:15.2 [8086/a0ea] enabled
889 11:21:12.610773 PCI: 00:15.3 [8086/0000] bus ops
890 11:21:12.613378 PCI: 00:15.3 [8086/a0eb] enabled
891 11:21:12.616673 PCI: 00:16.0 [8086/0000] ops
892 11:21:12.620031 PCI: 00:16.0 [8086/a0e0] enabled
893 11:21:12.626797 PCI: Static device PCI: 00:17.0 not found, disabling it.
894 11:21:12.630150 PCI: 00:19.0 [8086/0000] bus ops
895 11:21:12.633487 PCI: 00:19.0 [8086/a0c5] disabled
896 11:21:12.637239 PCI: 00:19.1 [8086/0000] bus ops
897 11:21:12.640328 PCI: 00:19.1 [8086/a0c6] enabled
898 11:21:12.643684 PCI: 00:1d.0 [8086/0000] bus ops
899 11:21:12.647339 PCI: 00:1d.0 [8086/a0b0] enabled
900 11:21:12.651061 PCI: 00:1e.0 [8086/0000] ops
901 11:21:12.653499 PCI: 00:1e.0 [8086/a0a8] enabled
902 11:21:12.656543 PCI: 00:1e.2 [8086/0000] bus ops
903 11:21:12.660825 PCI: 00:1e.2 [8086/a0aa] enabled
904 11:21:12.663460 PCI: 00:1e.3 [8086/0000] bus ops
905 11:21:12.667089 PCI: 00:1e.3 [8086/a0ab] enabled
906 11:21:12.670291 PCI: 00:1f.0 [8086/0000] bus ops
907 11:21:12.673798 PCI: 00:1f.0 [8086/a087] enabled
908 11:21:12.674382 RTC Init
909 11:21:12.677104 Set power on after power failure.
910 11:21:12.680519 Disabling Deep S3
911 11:21:12.681097 Disabling Deep S3
912 11:21:12.684459 Disabling Deep S4
913 11:21:12.687035 Disabling Deep S4
914 11:21:12.687615 Disabling Deep S5
915 11:21:12.690530 Disabling Deep S5
916 11:21:12.694168 PCI: 00:1f.2 [0000/0000] hidden
917 11:21:12.697759 PCI: 00:1f.3 [8086/0000] bus ops
918 11:21:12.700500 PCI: 00:1f.3 [8086/a0c8] enabled
919 11:21:12.703657 PCI: 00:1f.5 [8086/0000] bus ops
920 11:21:12.707203 PCI: 00:1f.5 [8086/a0a4] enabled
921 11:21:12.712654 PCI: Leftover static devices:
922 11:21:12.713298 PCI: 00:10.2
923 11:21:12.713730 PCI: 00:10.6
924 11:21:12.714443 PCI: 00:10.7
925 11:21:12.714821 PCI: 00:06.0
926 11:21:12.717141 PCI: 00:07.1
927 11:21:12.717619 PCI: 00:07.2
928 11:21:12.718062 PCI: 00:07.3
929 11:21:12.720112 PCI: 00:09.0
930 11:21:12.720589 PCI: 00:0d.1
931 11:21:12.723726 PCI: 00:0d.2
932 11:21:12.724206 PCI: 00:0d.3
933 11:21:12.726708 PCI: 00:0e.0
934 11:21:12.727216 PCI: 00:12.0
935 11:21:12.727598 PCI: 00:12.6
936 11:21:12.729996 PCI: 00:13.0
937 11:21:12.730479 PCI: 00:14.1
938 11:21:12.733556 PCI: 00:16.1
939 11:21:12.734089 PCI: 00:16.2
940 11:21:12.734473 PCI: 00:16.3
941 11:21:12.737080 PCI: 00:16.4
942 11:21:12.737812 PCI: 00:16.5
943 11:21:12.740122 PCI: 00:17.0
944 11:21:12.740705 PCI: 00:19.2
945 11:21:12.741090 PCI: 00:1e.1
946 11:21:12.743794 PCI: 00:1f.1
947 11:21:12.744371 PCI: 00:1f.4
948 11:21:12.746876 PCI: 00:1f.6
949 11:21:12.747453 PCI: 00:1f.7
950 11:21:12.749967 PCI: Check your devicetree.cb.
951 11:21:12.753438 PCI: 00:02.0 scanning...
952 11:21:12.758019 scan_generic_bus for PCI: 00:02.0
953 11:21:12.760510 scan_generic_bus for PCI: 00:02.0 done
954 11:21:12.763299 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
955 11:21:12.766977 PCI: 00:04.0 scanning...
956 11:21:12.771583 scan_generic_bus for PCI: 00:04.0
957 11:21:12.773549 GENERIC: 0.0 enabled
958 11:21:12.781540 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
959 11:21:12.783882 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
960 11:21:12.787359 PCI: 00:0d.0 scanning...
961 11:21:12.790186 scan_static_bus for PCI: 00:0d.0
962 11:21:12.793263 USB0 port 0 enabled
963 11:21:12.793761 USB0 port 0 scanning...
964 11:21:12.797032 scan_static_bus for USB0 port 0
965 11:21:12.800462 USB3 port 0 enabled
966 11:21:12.803580 USB3 port 1 enabled
967 11:21:12.804152 USB3 port 2 disabled
968 11:21:12.807015 USB3 port 3 disabled
969 11:21:12.810493 USB3 port 0 scanning...
970 11:21:12.814705 scan_static_bus for USB3 port 0
971 11:21:12.817123 scan_static_bus for USB3 port 0 done
972 11:21:12.819880 scan_bus: bus USB3 port 0 finished in 6 msecs
973 11:21:12.823809 USB3 port 1 scanning...
974 11:21:12.827188 scan_static_bus for USB3 port 1
975 11:21:12.830095 scan_static_bus for USB3 port 1 done
976 11:21:12.836618 scan_bus: bus USB3 port 1 finished in 6 msecs
977 11:21:12.839987 scan_static_bus for USB0 port 0 done
978 11:21:12.843261 scan_bus: bus USB0 port 0 finished in 43 msecs
979 11:21:12.846458 scan_static_bus for PCI: 00:0d.0 done
980 11:21:12.853097 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
981 11:21:12.853798 PCI: 00:14.0 scanning...
982 11:21:12.856675 scan_static_bus for PCI: 00:14.0
983 11:21:12.859774 USB0 port 0 enabled
984 11:21:12.863799 USB0 port 0 scanning...
985 11:21:12.866514 scan_static_bus for USB0 port 0
986 11:21:12.867061 USB2 port 0 disabled
987 11:21:12.870108 USB2 port 1 enabled
988 11:21:12.873411 USB2 port 2 enabled
989 11:21:12.873999 USB2 port 3 disabled
990 11:21:12.876290 USB2 port 4 enabled
991 11:21:12.879992 USB2 port 5 disabled
992 11:21:12.880556 USB2 port 6 disabled
993 11:21:12.883174 USB2 port 7 disabled
994 11:21:12.886671 USB2 port 8 disabled
995 11:21:12.887167 USB2 port 9 disabled
996 11:21:12.889967 USB3 port 0 disabled
997 11:21:12.890424 USB3 port 1 enabled
998 11:21:12.893205 USB3 port 2 disabled
999 11:21:12.896838 USB3 port 3 disabled
1000 11:21:12.900021 USB2 port 1 scanning...
1001 11:21:12.903662 scan_static_bus for USB2 port 1
1002 11:21:12.906655 scan_static_bus for USB2 port 1 done
1003 11:21:12.910157 scan_bus: bus USB2 port 1 finished in 6 msecs
1004 11:21:12.913216 USB2 port 2 scanning...
1005 11:21:12.917969 scan_static_bus for USB2 port 2
1006 11:21:12.920304 scan_static_bus for USB2 port 2 done
1007 11:21:12.923214 scan_bus: bus USB2 port 2 finished in 6 msecs
1008 11:21:12.926564 USB2 port 4 scanning...
1009 11:21:12.930086 scan_static_bus for USB2 port 4
1010 11:21:12.933387 scan_static_bus for USB2 port 4 done
1011 11:21:12.940271 scan_bus: bus USB2 port 4 finished in 6 msecs
1012 11:21:12.940986 USB3 port 1 scanning...
1013 11:21:12.943417 scan_static_bus for USB3 port 1
1014 11:21:12.946790 scan_static_bus for USB3 port 1 done
1015 11:21:12.953097 scan_bus: bus USB3 port 1 finished in 6 msecs
1016 11:21:12.956339 scan_static_bus for USB0 port 0 done
1017 11:21:12.959661 scan_bus: bus USB0 port 0 finished in 93 msecs
1018 11:21:12.962861 scan_static_bus for PCI: 00:14.0 done
1019 11:21:12.969983 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1020 11:21:12.973334 PCI: 00:14.3 scanning...
1021 11:21:12.976565 scan_static_bus for PCI: 00:14.3
1022 11:21:12.977122 GENERIC: 0.0 enabled
1023 11:21:12.982979 scan_static_bus for PCI: 00:14.3 done
1024 11:21:12.986383 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1025 11:21:12.989546 PCI: 00:15.0 scanning...
1026 11:21:12.993341 scan_static_bus for PCI: 00:15.0
1027 11:21:12.993932 I2C: 00:1a enabled
1028 11:21:12.996763 I2C: 00:31 enabled
1029 11:21:12.999705 I2C: 00:32 enabled
1030 11:21:13.003273 scan_static_bus for PCI: 00:15.0 done
1031 11:21:13.006571 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1032 11:21:13.010018 PCI: 00:15.1 scanning...
1033 11:21:13.013252 scan_static_bus for PCI: 00:15.1
1034 11:21:13.016291 I2C: 00:10 enabled
1035 11:21:13.019848 scan_static_bus for PCI: 00:15.1 done
1036 11:21:13.024693 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1037 11:21:13.026983 PCI: 00:15.2 scanning...
1038 11:21:13.029736 scan_static_bus for PCI: 00:15.2
1039 11:21:13.033111 scan_static_bus for PCI: 00:15.2 done
1040 11:21:13.039649 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1041 11:21:13.040236 PCI: 00:15.3 scanning...
1042 11:21:13.043286 scan_static_bus for PCI: 00:15.3
1043 11:21:13.046254 scan_static_bus for PCI: 00:15.3 done
1044 11:21:13.052864 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1045 11:21:13.056303 PCI: 00:19.1 scanning...
1046 11:21:13.059672 scan_static_bus for PCI: 00:19.1
1047 11:21:13.060148 I2C: 00:15 enabled
1048 11:21:13.062903 scan_static_bus for PCI: 00:19.1 done
1049 11:21:13.069239 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1050 11:21:13.072826 PCI: 00:1d.0 scanning...
1051 11:21:13.075932 do_pci_scan_bridge for PCI: 00:1d.0
1052 11:21:13.079503 PCI: pci_scan_bus for bus 01
1053 11:21:13.082867 PCI: 01:00.0 [15b7/5009] enabled
1054 11:21:13.083446 GENERIC: 0.0 enabled
1055 11:21:13.086344 Enabling Common Clock Configuration
1056 11:21:13.093054 L1 Sub-State supported from root port 29
1057 11:21:13.096802 L1 Sub-State Support = 0x5
1058 11:21:13.097378 CommonModeRestoreTime = 0x28
1059 11:21:13.103628 Power On Value = 0x16, Power On Scale = 0x0
1060 11:21:13.104209 ASPM: Enabled L1
1061 11:21:13.106173 PCIe: Max_Payload_Size adjusted to 128
1062 11:21:13.113345 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1063 11:21:13.116504 PCI: 00:1e.2 scanning...
1064 11:21:13.120324 scan_generic_bus for PCI: 00:1e.2
1065 11:21:13.120902 SPI: 00 enabled
1066 11:21:13.128328 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1067 11:21:13.129768 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1068 11:21:13.133120 PCI: 00:1e.3 scanning...
1069 11:21:13.136934 scan_generic_bus for PCI: 00:1e.3
1070 11:21:13.140847 SPI: 00 enabled
1071 11:21:13.144081 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1072 11:21:13.150330 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1073 11:21:13.154182 PCI: 00:1f.0 scanning...
1074 11:21:13.157432 scan_static_bus for PCI: 00:1f.0
1075 11:21:13.158118 PNP: 0c09.0 enabled
1076 11:21:13.160346 PNP: 0c09.0 scanning...
1077 11:21:13.164373 scan_static_bus for PNP: 0c09.0
1078 11:21:13.166992 scan_static_bus for PNP: 0c09.0 done
1079 11:21:13.174003 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1080 11:21:13.177183 scan_static_bus for PCI: 00:1f.0 done
1081 11:21:13.180115 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1082 11:21:13.184332 PCI: 00:1f.2 scanning...
1083 11:21:13.187092 scan_static_bus for PCI: 00:1f.2
1084 11:21:13.190575 GENERIC: 0.0 enabled
1085 11:21:13.191115 GENERIC: 0.0 scanning...
1086 11:21:13.194085 scan_static_bus for GENERIC: 0.0
1087 11:21:13.197039 GENERIC: 0.0 enabled
1088 11:21:13.200473 GENERIC: 1.0 enabled
1089 11:21:13.204100 scan_static_bus for GENERIC: 0.0 done
1090 11:21:13.207844 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1091 11:21:13.210290 scan_static_bus for PCI: 00:1f.2 done
1092 11:21:13.217418 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1093 11:21:13.220405 PCI: 00:1f.3 scanning...
1094 11:21:13.223821 scan_static_bus for PCI: 00:1f.3
1095 11:21:13.227180 scan_static_bus for PCI: 00:1f.3 done
1096 11:21:13.232179 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1097 11:21:13.233974 PCI: 00:1f.5 scanning...
1098 11:21:13.237175 scan_generic_bus for PCI: 00:1f.5
1099 11:21:13.240506 scan_generic_bus for PCI: 00:1f.5 done
1100 11:21:13.247293 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1101 11:21:13.250770 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1102 11:21:13.253805 scan_static_bus for Root Device done
1103 11:21:13.260101 scan_bus: bus Root Device finished in 735 msecs
1104 11:21:13.260654 done
1105 11:21:13.267264 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1106 11:21:13.270418 Chrome EC: UHEPI supported
1107 11:21:13.277050 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1108 11:21:13.280328 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1109 11:21:13.286992 SPI flash protection: WPSW=0 SRP0=0
1110 11:21:13.290294 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1111 11:21:13.297089 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1112 11:21:13.300273 found VGA at PCI: 00:02.0
1113 11:21:13.303717 Setting up VGA for PCI: 00:02.0
1114 11:21:13.307201 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1115 11:21:13.313480 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1116 11:21:13.314114 Allocating resources...
1117 11:21:13.316907 Reading resources...
1118 11:21:13.320595 Root Device read_resources bus 0 link: 0
1119 11:21:13.323629 DOMAIN: 0000 read_resources bus 0 link: 0
1120 11:21:13.330899 PCI: 00:04.0 read_resources bus 1 link: 0
1121 11:21:13.335124 PCI: 00:04.0 read_resources bus 1 link: 0 done
1122 11:21:13.341186 PCI: 00:0d.0 read_resources bus 0 link: 0
1123 11:21:13.344573 USB0 port 0 read_resources bus 0 link: 0
1124 11:21:13.351160 USB0 port 0 read_resources bus 0 link: 0 done
1125 11:21:13.354425 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1126 11:21:13.357656 PCI: 00:14.0 read_resources bus 0 link: 0
1127 11:21:13.364772 USB0 port 0 read_resources bus 0 link: 0
1128 11:21:13.367828 USB0 port 0 read_resources bus 0 link: 0 done
1129 11:21:13.374792 PCI: 00:14.0 read_resources bus 0 link: 0 done
1130 11:21:13.378014 PCI: 00:14.3 read_resources bus 0 link: 0
1131 11:21:13.384445 PCI: 00:14.3 read_resources bus 0 link: 0 done
1132 11:21:13.387629 PCI: 00:15.0 read_resources bus 0 link: 0
1133 11:21:13.394395 PCI: 00:15.0 read_resources bus 0 link: 0 done
1134 11:21:13.398543 PCI: 00:15.1 read_resources bus 0 link: 0
1135 11:21:13.404502 PCI: 00:15.1 read_resources bus 0 link: 0 done
1136 11:21:13.408219 PCI: 00:19.1 read_resources bus 0 link: 0
1137 11:21:13.414779 PCI: 00:19.1 read_resources bus 0 link: 0 done
1138 11:21:13.418539 PCI: 00:1d.0 read_resources bus 1 link: 0
1139 11:21:13.425338 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1140 11:21:13.428300 PCI: 00:1e.2 read_resources bus 2 link: 0
1141 11:21:13.437617 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1142 11:21:13.438585 PCI: 00:1e.3 read_resources bus 3 link: 0
1143 11:21:13.445599 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1144 11:21:13.448372 PCI: 00:1f.0 read_resources bus 0 link: 0
1145 11:21:13.454631 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1146 11:21:13.458777 PCI: 00:1f.2 read_resources bus 0 link: 0
1147 11:21:13.461971 GENERIC: 0.0 read_resources bus 0 link: 0
1148 11:21:13.468277 GENERIC: 0.0 read_resources bus 0 link: 0 done
1149 11:21:13.472086 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1150 11:21:13.478923 DOMAIN: 0000 read_resources bus 0 link: 0 done
1151 11:21:13.483034 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1152 11:21:13.489149 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1153 11:21:13.492719 Root Device read_resources bus 0 link: 0 done
1154 11:21:13.496131 Done reading resources.
1155 11:21:13.502470 Show resources in subtree (Root Device)...After reading.
1156 11:21:13.505875 Root Device child on link 0 DOMAIN: 0000
1157 11:21:13.509390 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1158 11:21:13.519108 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1159 11:21:13.529107 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1160 11:21:13.529708 PCI: 00:00.0
1161 11:21:13.539384 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1162 11:21:13.549325 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1163 11:21:13.559091 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1164 11:21:13.569123 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1165 11:21:13.579022 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1166 11:21:13.585438 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1167 11:21:13.595362 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1168 11:21:13.605722 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1169 11:21:13.615349 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1170 11:21:13.624863 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1171 11:21:13.634788 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1172 11:21:13.642406 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1173 11:21:13.651623 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1174 11:21:13.660912 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1175 11:21:13.671007 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1176 11:21:13.680699 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1177 11:21:13.690963 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1178 11:21:13.700728 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1179 11:21:13.707283 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1180 11:21:13.717549 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1181 11:21:13.720714 PCI: 00:02.0
1182 11:21:13.730801 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 11:21:13.740524 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1184 11:21:13.750506 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1185 11:21:13.754062 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1186 11:21:13.763731 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1187 11:21:13.767261 GENERIC: 0.0
1188 11:21:13.767502 PCI: 00:05.0
1189 11:21:13.777710 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1190 11:21:13.780548 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1191 11:21:13.783947 GENERIC: 0.0
1192 11:21:13.784185 PCI: 00:08.0
1193 11:21:13.793635 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 11:21:13.796928 PCI: 00:0a.0
1195 11:21:13.800702 PCI: 00:0d.0 child on link 0 USB0 port 0
1196 11:21:13.810976 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 11:21:13.817064 USB0 port 0 child on link 0 USB3 port 0
1198 11:21:13.817392 USB3 port 0
1199 11:21:13.820466 USB3 port 1
1200 11:21:13.820730 USB3 port 2
1201 11:21:13.823772 USB3 port 3
1202 11:21:13.826996 PCI: 00:14.0 child on link 0 USB0 port 0
1203 11:21:13.837212 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1204 11:21:13.840442 USB0 port 0 child on link 0 USB2 port 0
1205 11:21:13.843971 USB2 port 0
1206 11:21:13.844217 USB2 port 1
1207 11:21:13.848358 USB2 port 2
1208 11:21:13.851585 USB2 port 3
1209 11:21:13.851823 USB2 port 4
1210 11:21:13.853636 USB2 port 5
1211 11:21:13.853897 USB2 port 6
1212 11:21:13.856894 USB2 port 7
1213 11:21:13.857133 USB2 port 8
1214 11:21:13.861714 USB2 port 9
1215 11:21:13.861952 USB3 port 0
1216 11:21:13.863971 USB3 port 1
1217 11:21:13.864209 USB3 port 2
1218 11:21:13.866817 USB3 port 3
1219 11:21:13.867056 PCI: 00:14.2
1220 11:21:13.876910 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 11:21:13.886863 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1222 11:21:13.893331 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1223 11:21:13.903450 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1224 11:21:13.903704 GENERIC: 0.0
1225 11:21:13.906800 PCI: 00:15.0 child on link 0 I2C: 00:1a
1226 11:21:13.916788 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 11:21:13.920496 I2C: 00:1a
1228 11:21:13.920633 I2C: 00:31
1229 11:21:13.923906 I2C: 00:32
1230 11:21:13.927253 PCI: 00:15.1 child on link 0 I2C: 00:10
1231 11:21:13.936710 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 11:21:13.939782 I2C: 00:10
1233 11:21:13.939888 PCI: 00:15.2
1234 11:21:13.949683 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 11:21:13.953425 PCI: 00:15.3
1236 11:21:13.963666 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 11:21:13.963769 PCI: 00:16.0
1238 11:21:13.972891 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 11:21:13.976602 PCI: 00:19.0
1240 11:21:13.979732 PCI: 00:19.1 child on link 0 I2C: 00:15
1241 11:21:13.989649 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 11:21:13.989752 I2C: 00:15
1243 11:21:13.996453 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1244 11:21:14.003010 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1245 11:21:14.013214 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1246 11:21:14.022746 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1247 11:21:14.026888 GENERIC: 0.0
1248 11:21:14.026980 PCI: 01:00.0
1249 11:21:14.036750 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1250 11:21:14.046718 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1251 11:21:14.049720 PCI: 00:1e.0
1252 11:21:14.059747 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1253 11:21:14.063060 PCI: 00:1e.2 child on link 0 SPI: 00
1254 11:21:14.072602 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1255 11:21:14.076509 SPI: 00
1256 11:21:14.079513 PCI: 00:1e.3 child on link 0 SPI: 00
1257 11:21:14.089375 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 11:21:14.089521 SPI: 00
1259 11:21:14.092843 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1260 11:21:14.102564 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1261 11:21:14.106017 PNP: 0c09.0
1262 11:21:14.112689 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1263 11:21:14.119483 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1264 11:21:14.125764 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1265 11:21:14.136424 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1266 11:21:14.143449 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1267 11:21:14.144010 GENERIC: 0.0
1268 11:21:14.146354 GENERIC: 1.0
1269 11:21:14.146819 PCI: 00:1f.3
1270 11:21:14.155886 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1271 11:21:14.166042 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1272 11:21:14.169321 PCI: 00:1f.5
1273 11:21:14.176401 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1274 11:21:14.182474 CPU_CLUSTER: 0 child on link 0 APIC: 00
1275 11:21:14.183024 APIC: 00
1276 11:21:14.186317 APIC: 01
1277 11:21:14.186882 APIC: 05
1278 11:21:14.187256 APIC: 06
1279 11:21:14.189380 APIC: 03
1280 11:21:14.189989 APIC: 02
1281 11:21:14.190367 APIC: 04
1282 11:21:14.192772 APIC: 07
1283 11:21:14.199906 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1284 11:21:14.206191 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1285 11:21:14.213271 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1286 11:21:14.219867 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1287 11:21:14.223243 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1288 11:21:14.226597 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1289 11:21:14.233207 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1290 11:21:14.239740 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1291 11:21:14.249441 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1292 11:21:14.255886 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1293 11:21:14.262526 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1294 11:21:14.269744 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1295 11:21:14.276867 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1296 11:21:14.286429 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1297 11:21:14.286998 DOMAIN: 0000: Resource ranges:
1298 11:21:14.293278 * Base: 1000, Size: 800, Tag: 100
1299 11:21:14.296509 * Base: 1900, Size: e700, Tag: 100
1300 11:21:14.299686 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1301 11:21:14.306039 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1302 11:21:14.312932 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1303 11:21:14.322779 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1304 11:21:14.329480 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1305 11:21:14.335863 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1306 11:21:14.346095 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1307 11:21:14.353021 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1308 11:21:14.359234 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1309 11:21:14.366307 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1310 11:21:14.376065 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1311 11:21:14.382397 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1312 11:21:14.388911 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1313 11:21:14.399120 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1314 11:21:14.405581 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1315 11:21:14.412287 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1316 11:21:14.422304 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1317 11:21:14.428714 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1318 11:21:14.435647 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1319 11:21:14.445646 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1320 11:21:14.452338 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1321 11:21:14.458683 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1322 11:21:14.469068 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1323 11:21:14.475744 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1324 11:21:14.482231 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1325 11:21:14.485602 DOMAIN: 0000: Resource ranges:
1326 11:21:14.491803 * Base: 7fc00000, Size: 40400000, Tag: 200
1327 11:21:14.494961 * Base: d0000000, Size: 28000000, Tag: 200
1328 11:21:14.498844 * Base: fa000000, Size: 1000000, Tag: 200
1329 11:21:14.505174 * Base: fb001000, Size: 2fff000, Tag: 200
1330 11:21:14.508421 * Base: fe010000, Size: 2e000, Tag: 200
1331 11:21:14.511828 * Base: fe03f000, Size: d41000, Tag: 200
1332 11:21:14.515264 * Base: fed88000, Size: 8000, Tag: 200
1333 11:21:14.518567 * Base: fed93000, Size: d000, Tag: 200
1334 11:21:14.525466 * Base: feda2000, Size: 1e000, Tag: 200
1335 11:21:14.528612 * Base: fede0000, Size: 1220000, Tag: 200
1336 11:21:14.532182 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1337 11:21:14.541745 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1338 11:21:14.548290 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1339 11:21:14.555435 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1340 11:21:14.561386 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1341 11:21:14.568281 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1342 11:21:14.576565 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1343 11:21:14.582334 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1344 11:21:14.589306 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1345 11:21:14.594828 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1346 11:21:14.601538 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1347 11:21:14.608865 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1348 11:21:14.615009 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1349 11:21:14.618192 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1350 11:21:14.625103 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1351 11:21:14.631947 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1352 11:21:14.638530 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1353 11:21:14.645136 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1354 11:21:14.652020 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1355 11:21:14.657880 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1356 11:21:14.665222 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1357 11:21:14.671183 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1358 11:21:14.678314 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1359 11:21:14.688219 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1360 11:21:14.694489 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1361 11:21:14.698049 PCI: 00:1d.0: Resource ranges:
1362 11:21:14.702657 * Base: 7fc00000, Size: 100000, Tag: 200
1363 11:21:14.708065 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1364 11:21:14.714390 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1365 11:21:14.724757 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1366 11:21:14.730748 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1367 11:21:14.734364 Root Device assign_resources, bus 0 link: 0
1368 11:21:14.741148 DOMAIN: 0000 assign_resources, bus 0 link: 0
1369 11:21:14.748147 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1370 11:21:14.758213 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1371 11:21:14.764151 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1372 11:21:14.774361 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1373 11:21:14.777560 PCI: 00:04.0 assign_resources, bus 1 link: 0
1374 11:21:14.781479 PCI: 00:04.0 assign_resources, bus 1 link: 0
1375 11:21:14.790918 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1376 11:21:14.797862 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1377 11:21:14.808154 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1378 11:21:14.811100 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1379 11:21:14.818279 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1380 11:21:14.824402 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1381 11:21:14.827650 PCI: 00:14.0 assign_resources, bus 0 link: 0
1382 11:21:14.834282 PCI: 00:14.0 assign_resources, bus 0 link: 0
1383 11:21:14.841153 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1384 11:21:14.851464 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1385 11:21:14.857754 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1386 11:21:14.861098 PCI: 00:14.3 assign_resources, bus 0 link: 0
1387 11:21:14.868135 PCI: 00:14.3 assign_resources, bus 0 link: 0
1388 11:21:14.875222 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1389 11:21:14.881358 PCI: 00:15.0 assign_resources, bus 0 link: 0
1390 11:21:14.885026 PCI: 00:15.0 assign_resources, bus 0 link: 0
1391 11:21:14.896237 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1392 11:21:14.898039 PCI: 00:15.1 assign_resources, bus 0 link: 0
1393 11:21:14.901868 PCI: 00:15.1 assign_resources, bus 0 link: 0
1394 11:21:14.911458 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1395 11:21:14.918036 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1396 11:21:14.927788 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1397 11:21:14.934262 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1398 11:21:14.940971 PCI: 00:19.1 assign_resources, bus 0 link: 0
1399 11:21:14.944509 PCI: 00:19.1 assign_resources, bus 0 link: 0
1400 11:21:14.954244 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1401 11:21:14.964783 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1402 11:21:14.971527 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1403 11:21:14.974157 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1404 11:21:14.984620 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1405 11:21:14.991134 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1406 11:21:14.998009 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1407 11:21:15.004798 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1408 11:21:15.011274 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1409 11:21:15.014422 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1410 11:21:15.024545 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1411 11:21:15.027640 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1412 11:21:15.031300 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1413 11:21:15.037986 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1414 11:21:15.041858 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1415 11:21:15.047621 LPC: Trying to open IO window from 800 size 1ff
1416 11:21:15.054932 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1417 11:21:15.064348 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1418 11:21:15.071427 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1419 11:21:15.074270 DOMAIN: 0000 assign_resources, bus 0 link: 0
1420 11:21:15.080891 Root Device assign_resources, bus 0 link: 0
1421 11:21:15.084653 Done setting resources.
1422 11:21:15.090909 Show resources in subtree (Root Device)...After assigning values.
1423 11:21:15.094375 Root Device child on link 0 DOMAIN: 0000
1424 11:21:15.097659 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1425 11:21:15.107784 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1426 11:21:15.117773 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1427 11:21:15.118342 PCI: 00:00.0
1428 11:21:15.127797 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1429 11:21:15.137484 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1430 11:21:15.147639 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1431 11:21:15.157495 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1432 11:21:15.167230 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1433 11:21:15.174078 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1434 11:21:15.184800 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1435 11:21:15.194332 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1436 11:21:15.204256 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1437 11:21:15.214027 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1438 11:21:15.220984 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1439 11:21:15.230388 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1440 11:21:15.241100 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1441 11:21:15.250666 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1442 11:21:15.260511 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1443 11:21:15.267273 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1444 11:21:15.277431 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1445 11:21:15.287763 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1446 11:21:15.297543 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1447 11:21:15.308017 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1448 11:21:15.308581 PCI: 00:02.0
1449 11:21:15.321049 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1450 11:21:15.330579 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1451 11:21:15.340446 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1452 11:21:15.343655 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1453 11:21:15.353788 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1454 11:21:15.356958 GENERIC: 0.0
1455 11:21:15.357537 PCI: 00:05.0
1456 11:21:15.366469 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1457 11:21:15.373163 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1458 11:21:15.373753 GENERIC: 0.0
1459 11:21:15.376754 PCI: 00:08.0
1460 11:21:15.386248 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1461 11:21:15.386806 PCI: 00:0a.0
1462 11:21:15.393228 PCI: 00:0d.0 child on link 0 USB0 port 0
1463 11:21:15.403785 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1464 11:21:15.407497 USB0 port 0 child on link 0 USB3 port 0
1465 11:21:15.412840 USB3 port 0
1466 11:21:15.413412 USB3 port 1
1467 11:21:15.414182 USB3 port 2
1468 11:21:15.414556 USB3 port 3
1469 11:21:15.420234 PCI: 00:14.0 child on link 0 USB0 port 0
1470 11:21:15.429838 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1471 11:21:15.433546 USB0 port 0 child on link 0 USB2 port 0
1472 11:21:15.436422 USB2 port 0
1473 11:21:15.436906 USB2 port 1
1474 11:21:15.439841 USB2 port 2
1475 11:21:15.440429 USB2 port 3
1476 11:21:15.443345 USB2 port 4
1477 11:21:15.443934 USB2 port 5
1478 11:21:15.446709 USB2 port 6
1479 11:21:15.447300 USB2 port 7
1480 11:21:15.449865 USB2 port 8
1481 11:21:15.450442 USB2 port 9
1482 11:21:15.453850 USB3 port 0
1483 11:21:15.454433 USB3 port 1
1484 11:21:15.456720 USB3 port 2
1485 11:21:15.459611 USB3 port 3
1486 11:21:15.460098 PCI: 00:14.2
1487 11:21:15.469632 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1488 11:21:15.479850 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1489 11:21:15.486528 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1490 11:21:15.496121 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1491 11:21:15.496677 GENERIC: 0.0
1492 11:21:15.503188 PCI: 00:15.0 child on link 0 I2C: 00:1a
1493 11:21:15.513778 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1494 11:21:15.514349 I2C: 00:1a
1495 11:21:15.516645 I2C: 00:31
1496 11:21:15.517204 I2C: 00:32
1497 11:21:15.521010 PCI: 00:15.1 child on link 0 I2C: 00:10
1498 11:21:15.530147 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1499 11:21:15.533407 I2C: 00:10
1500 11:21:15.534009 PCI: 00:15.2
1501 11:21:15.543371 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1502 11:21:15.546593 PCI: 00:15.3
1503 11:21:15.556276 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1504 11:21:15.559852 PCI: 00:16.0
1505 11:21:15.569795 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1506 11:21:15.570369 PCI: 00:19.0
1507 11:21:15.576606 PCI: 00:19.1 child on link 0 I2C: 00:15
1508 11:21:15.586318 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1509 11:21:15.586873 I2C: 00:15
1510 11:21:15.589896 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1511 11:21:15.599340 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1512 11:21:15.612710 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1513 11:21:15.622966 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1514 11:21:15.623545 GENERIC: 0.0
1515 11:21:15.626113 PCI: 01:00.0
1516 11:21:15.636296 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1517 11:21:15.646113 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1518 11:21:15.649444 PCI: 00:1e.0
1519 11:21:15.659597 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1520 11:21:15.662665 PCI: 00:1e.2 child on link 0 SPI: 00
1521 11:21:15.672762 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1522 11:21:15.676212 SPI: 00
1523 11:21:15.679663 PCI: 00:1e.3 child on link 0 SPI: 00
1524 11:21:15.689324 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1525 11:21:15.689943 SPI: 00
1526 11:21:15.697493 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1527 11:21:15.702604 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1528 11:21:15.706053 PNP: 0c09.0
1529 11:21:15.712517 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1530 11:21:15.719122 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1531 11:21:15.729220 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1532 11:21:15.736155 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1533 11:21:15.742289 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1534 11:21:15.742756 GENERIC: 0.0
1535 11:21:15.745873 GENERIC: 1.0
1536 11:21:15.746336 PCI: 00:1f.3
1537 11:21:15.759243 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1538 11:21:15.770232 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1539 11:21:15.770807 PCI: 00:1f.5
1540 11:21:15.779109 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1541 11:21:15.786121 CPU_CLUSTER: 0 child on link 0 APIC: 00
1542 11:21:15.786716 APIC: 00
1543 11:21:15.787091 APIC: 01
1544 11:21:15.789113 APIC: 05
1545 11:21:15.789721 APIC: 06
1546 11:21:15.790101 APIC: 03
1547 11:21:15.792273 APIC: 02
1548 11:21:15.792738 APIC: 04
1549 11:21:15.795990 APIC: 07
1550 11:21:15.796558 Done allocating resources.
1551 11:21:15.802189 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2474 ms
1552 11:21:15.809615 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1553 11:21:15.813024 Configure GPIOs for I2S audio on UP4.
1554 11:21:15.819906 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1555 11:21:15.823543 Enabling resources...
1556 11:21:15.826791 PCI: 00:00.0 subsystem <- 8086/9a12
1557 11:21:15.829645 PCI: 00:00.0 cmd <- 06
1558 11:21:15.832718 PCI: 00:02.0 subsystem <- 8086/9a40
1559 11:21:15.836316 PCI: 00:02.0 cmd <- 03
1560 11:21:15.839100 PCI: 00:04.0 subsystem <- 8086/9a03
1561 11:21:15.839576 PCI: 00:04.0 cmd <- 02
1562 11:21:15.846226 PCI: 00:05.0 subsystem <- 8086/9a19
1563 11:21:15.846783 PCI: 00:05.0 cmd <- 02
1564 11:21:15.849740 PCI: 00:08.0 subsystem <- 8086/9a11
1565 11:21:15.853637 PCI: 00:08.0 cmd <- 06
1566 11:21:15.856555 PCI: 00:0d.0 subsystem <- 8086/9a13
1567 11:21:15.859781 PCI: 00:0d.0 cmd <- 02
1568 11:21:15.863025 PCI: 00:14.0 subsystem <- 8086/a0ed
1569 11:21:15.866400 PCI: 00:14.0 cmd <- 02
1570 11:21:15.869945 PCI: 00:14.2 subsystem <- 8086/a0ef
1571 11:21:15.873183 PCI: 00:14.2 cmd <- 02
1572 11:21:15.876294 PCI: 00:14.3 subsystem <- 8086/a0f0
1573 11:21:15.879980 PCI: 00:14.3 cmd <- 02
1574 11:21:15.883416 PCI: 00:15.0 subsystem <- 8086/a0e8
1575 11:21:15.883980 PCI: 00:15.0 cmd <- 02
1576 11:21:15.889886 PCI: 00:15.1 subsystem <- 8086/a0e9
1577 11:21:15.890446 PCI: 00:15.1 cmd <- 02
1578 11:21:15.893088 PCI: 00:15.2 subsystem <- 8086/a0ea
1579 11:21:15.896634 PCI: 00:15.2 cmd <- 02
1580 11:21:15.900128 PCI: 00:15.3 subsystem <- 8086/a0eb
1581 11:21:15.903118 PCI: 00:15.3 cmd <- 02
1582 11:21:15.906514 PCI: 00:16.0 subsystem <- 8086/a0e0
1583 11:21:15.909758 PCI: 00:16.0 cmd <- 02
1584 11:21:15.912931 PCI: 00:19.1 subsystem <- 8086/a0c6
1585 11:21:15.916878 PCI: 00:19.1 cmd <- 02
1586 11:21:15.919820 PCI: 00:1d.0 bridge ctrl <- 0013
1587 11:21:15.923109 PCI: 00:1d.0 subsystem <- 8086/a0b0
1588 11:21:15.927794 PCI: 00:1d.0 cmd <- 06
1589 11:21:15.929806 PCI: 00:1e.0 subsystem <- 8086/a0a8
1590 11:21:15.930280 PCI: 00:1e.0 cmd <- 06
1591 11:21:15.936531 PCI: 00:1e.2 subsystem <- 8086/a0aa
1592 11:21:15.937096 PCI: 00:1e.2 cmd <- 06
1593 11:21:15.939661 PCI: 00:1e.3 subsystem <- 8086/a0ab
1594 11:21:15.943137 PCI: 00:1e.3 cmd <- 02
1595 11:21:15.946964 PCI: 00:1f.0 subsystem <- 8086/a087
1596 11:21:15.950218 PCI: 00:1f.0 cmd <- 407
1597 11:21:15.953784 PCI: 00:1f.3 subsystem <- 8086/a0c8
1598 11:21:15.956726 PCI: 00:1f.3 cmd <- 02
1599 11:21:15.959914 PCI: 00:1f.5 subsystem <- 8086/a0a4
1600 11:21:15.963405 PCI: 00:1f.5 cmd <- 406
1601 11:21:15.966600 PCI: 01:00.0 cmd <- 02
1602 11:21:15.971098 done.
1603 11:21:15.974016 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1604 11:21:15.977652 Initializing devices...
1605 11:21:15.980978 Root Device init
1606 11:21:15.984274 Chrome EC: Set SMI mask to 0x0000000000000000
1607 11:21:15.990841 Chrome EC: clear events_b mask to 0x0000000000000000
1608 11:21:15.997484 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1609 11:21:16.004672 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1610 11:21:16.010938 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1611 11:21:16.014169 Chrome EC: Set WAKE mask to 0x0000000000000000
1612 11:21:16.022044 fw_config match found: DB_USB=USB3_ACTIVE
1613 11:21:16.025330 Configure Right Type-C port orientation for retimer
1614 11:21:16.028270 Root Device init finished in 45 msecs
1615 11:21:16.032579 PCI: 00:00.0 init
1616 11:21:16.035392 CPU TDP = 9 Watts
1617 11:21:16.035855 CPU PL1 = 9 Watts
1618 11:21:16.038764 CPU PL2 = 40 Watts
1619 11:21:16.042651 CPU PL4 = 83 Watts
1620 11:21:16.045657 PCI: 00:00.0 init finished in 8 msecs
1621 11:21:16.046310 PCI: 00:02.0 init
1622 11:21:16.048628 GMA: Found VBT in CBFS
1623 11:21:16.052709 GMA: Found valid VBT in CBFS
1624 11:21:16.058796 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1625 11:21:16.065263 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1626 11:21:16.068477 PCI: 00:02.0 init finished in 18 msecs
1627 11:21:16.072943 PCI: 00:05.0 init
1628 11:21:16.075502 PCI: 00:05.0 init finished in 0 msecs
1629 11:21:16.078630 PCI: 00:08.0 init
1630 11:21:16.082296 PCI: 00:08.0 init finished in 0 msecs
1631 11:21:16.085846 PCI: 00:14.0 init
1632 11:21:16.088873 PCI: 00:14.0 init finished in 0 msecs
1633 11:21:16.092791 PCI: 00:14.2 init
1634 11:21:16.095404 PCI: 00:14.2 init finished in 0 msecs
1635 11:21:16.095975 PCI: 00:15.0 init
1636 11:21:16.099328 I2C bus 0 version 0x3230302a
1637 11:21:16.102108 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1638 11:21:16.108841 PCI: 00:15.0 init finished in 6 msecs
1639 11:21:16.109405 PCI: 00:15.1 init
1640 11:21:16.112297 I2C bus 1 version 0x3230302a
1641 11:21:16.115776 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1642 11:21:16.118877 PCI: 00:15.1 init finished in 6 msecs
1643 11:21:16.123272 PCI: 00:15.2 init
1644 11:21:16.125407 I2C bus 2 version 0x3230302a
1645 11:21:16.128773 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1646 11:21:16.131841 PCI: 00:15.2 init finished in 6 msecs
1647 11:21:16.136768 PCI: 00:15.3 init
1648 11:21:16.138941 I2C bus 3 version 0x3230302a
1649 11:21:16.142064 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1650 11:21:16.145340 PCI: 00:15.3 init finished in 6 msecs
1651 11:21:16.148697 PCI: 00:16.0 init
1652 11:21:16.151982 PCI: 00:16.0 init finished in 0 msecs
1653 11:21:16.155706 PCI: 00:19.1 init
1654 11:21:16.156270 I2C bus 5 version 0x3230302a
1655 11:21:16.159023 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1656 11:21:16.165558 PCI: 00:19.1 init finished in 6 msecs
1657 11:21:16.166072 PCI: 00:1d.0 init
1658 11:21:16.168835 Initializing PCH PCIe bridge.
1659 11:21:16.171869 PCI: 00:1d.0 init finished in 3 msecs
1660 11:21:16.176717 PCI: 00:1f.0 init
1661 11:21:16.179626 IOAPIC: Initializing IOAPIC at 0xfec00000
1662 11:21:16.186660 IOAPIC: Bootstrap Processor Local APIC = 0x00
1663 11:21:16.187226 IOAPIC: ID = 0x02
1664 11:21:16.189899 IOAPIC: Dumping registers
1665 11:21:16.192868 reg 0x0000: 0x02000000
1666 11:21:16.196673 reg 0x0001: 0x00770020
1667 11:21:16.197236 reg 0x0002: 0x00000000
1668 11:21:16.202924 PCI: 00:1f.0 init finished in 21 msecs
1669 11:21:16.203509 PCI: 00:1f.2 init
1670 11:21:16.206218 Disabling ACPI via APMC.
1671 11:21:16.209841 APMC done.
1672 11:21:16.213657 PCI: 00:1f.2 init finished in 5 msecs
1673 11:21:16.226048 PCI: 01:00.0 init
1674 11:21:16.228503 PCI: 01:00.0 init finished in 0 msecs
1675 11:21:16.231473 PNP: 0c09.0 init
1676 11:21:16.234326 Google Chrome EC uptime: 8.269 seconds
1677 11:21:16.241309 Google Chrome AP resets since EC boot: 1
1678 11:21:16.244518 Google Chrome most recent AP reset causes:
1679 11:21:16.248096 0.453: 32775 shutdown: entering G3
1680 11:21:16.254559 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1681 11:21:16.258112 PNP: 0c09.0 init finished in 22 msecs
1682 11:21:16.263433 Devices initialized
1683 11:21:16.266443 Show all devs... After init.
1684 11:21:16.270124 Root Device: enabled 1
1685 11:21:16.270682 DOMAIN: 0000: enabled 1
1686 11:21:16.273253 CPU_CLUSTER: 0: enabled 1
1687 11:21:16.276515 PCI: 00:00.0: enabled 1
1688 11:21:16.280072 PCI: 00:02.0: enabled 1
1689 11:21:16.280636 PCI: 00:04.0: enabled 1
1690 11:21:16.283580 PCI: 00:05.0: enabled 1
1691 11:21:16.286671 PCI: 00:06.0: enabled 0
1692 11:21:16.290294 PCI: 00:07.0: enabled 0
1693 11:21:16.290857 PCI: 00:07.1: enabled 0
1694 11:21:16.293211 PCI: 00:07.2: enabled 0
1695 11:21:16.296889 PCI: 00:07.3: enabled 0
1696 11:21:16.300010 PCI: 00:08.0: enabled 1
1697 11:21:16.300569 PCI: 00:09.0: enabled 0
1698 11:21:16.303116 PCI: 00:0a.0: enabled 0
1699 11:21:16.306364 PCI: 00:0d.0: enabled 1
1700 11:21:16.309709 PCI: 00:0d.1: enabled 0
1701 11:21:16.310292 PCI: 00:0d.2: enabled 0
1702 11:21:16.314369 PCI: 00:0d.3: enabled 0
1703 11:21:16.317016 PCI: 00:0e.0: enabled 0
1704 11:21:16.317576 PCI: 00:10.2: enabled 1
1705 11:21:16.319948 PCI: 00:10.6: enabled 0
1706 11:21:16.322966 PCI: 00:10.7: enabled 0
1707 11:21:16.326856 PCI: 00:12.0: enabled 0
1708 11:21:16.327469 PCI: 00:12.6: enabled 0
1709 11:21:16.329626 PCI: 00:13.0: enabled 0
1710 11:21:16.333119 PCI: 00:14.0: enabled 1
1711 11:21:16.336752 PCI: 00:14.1: enabled 0
1712 11:21:16.337317 PCI: 00:14.2: enabled 1
1713 11:21:16.340229 PCI: 00:14.3: enabled 1
1714 11:21:16.343117 PCI: 00:15.0: enabled 1
1715 11:21:16.346326 PCI: 00:15.1: enabled 1
1716 11:21:16.346889 PCI: 00:15.2: enabled 1
1717 11:21:16.349871 PCI: 00:15.3: enabled 1
1718 11:21:16.352785 PCI: 00:16.0: enabled 1
1719 11:21:16.353426 PCI: 00:16.1: enabled 0
1720 11:21:16.356132 PCI: 00:16.2: enabled 0
1721 11:21:16.359558 PCI: 00:16.3: enabled 0
1722 11:21:16.362824 PCI: 00:16.4: enabled 0
1723 11:21:16.363289 PCI: 00:16.5: enabled 0
1724 11:21:16.366555 PCI: 00:17.0: enabled 0
1725 11:21:16.369647 PCI: 00:19.0: enabled 0
1726 11:21:16.373012 PCI: 00:19.1: enabled 1
1727 11:21:16.373476 PCI: 00:19.2: enabled 0
1728 11:21:16.376336 PCI: 00:1c.0: enabled 1
1729 11:21:16.379912 PCI: 00:1c.1: enabled 0
1730 11:21:16.382708 PCI: 00:1c.2: enabled 0
1731 11:21:16.383276 PCI: 00:1c.3: enabled 0
1732 11:21:16.386113 PCI: 00:1c.4: enabled 0
1733 11:21:16.389519 PCI: 00:1c.5: enabled 0
1734 11:21:16.393268 PCI: 00:1c.6: enabled 1
1735 11:21:16.393879 PCI: 00:1c.7: enabled 0
1736 11:21:16.396253 PCI: 00:1d.0: enabled 1
1737 11:21:16.399963 PCI: 00:1d.1: enabled 0
1738 11:21:16.400533 PCI: 00:1d.2: enabled 1
1739 11:21:16.402866 PCI: 00:1d.3: enabled 0
1740 11:21:16.406246 PCI: 00:1e.0: enabled 1
1741 11:21:16.409593 PCI: 00:1e.1: enabled 0
1742 11:21:16.410194 PCI: 00:1e.2: enabled 1
1743 11:21:16.412648 PCI: 00:1e.3: enabled 1
1744 11:21:16.417638 PCI: 00:1f.0: enabled 1
1745 11:21:16.419178 PCI: 00:1f.1: enabled 0
1746 11:21:16.419646 PCI: 00:1f.2: enabled 1
1747 11:21:16.423343 PCI: 00:1f.3: enabled 1
1748 11:21:16.426285 PCI: 00:1f.4: enabled 0
1749 11:21:16.430067 PCI: 00:1f.5: enabled 1
1750 11:21:16.430770 PCI: 00:1f.6: enabled 0
1751 11:21:16.433197 PCI: 00:1f.7: enabled 0
1752 11:21:16.436461 APIC: 00: enabled 1
1753 11:21:16.437021 GENERIC: 0.0: enabled 1
1754 11:21:16.439253 GENERIC: 0.0: enabled 1
1755 11:21:16.443078 GENERIC: 1.0: enabled 1
1756 11:21:16.446541 GENERIC: 0.0: enabled 1
1757 11:21:16.447113 GENERIC: 1.0: enabled 1
1758 11:21:16.450238 USB0 port 0: enabled 1
1759 11:21:16.452508 GENERIC: 0.0: enabled 1
1760 11:21:16.453080 USB0 port 0: enabled 1
1761 11:21:16.456488 GENERIC: 0.0: enabled 1
1762 11:21:16.460325 I2C: 00:1a: enabled 1
1763 11:21:16.462545 I2C: 00:31: enabled 1
1764 11:21:16.463014 I2C: 00:32: enabled 1
1765 11:21:16.465789 I2C: 00:10: enabled 1
1766 11:21:16.469533 I2C: 00:15: enabled 1
1767 11:21:16.470294 GENERIC: 0.0: enabled 0
1768 11:21:16.472431 GENERIC: 1.0: enabled 0
1769 11:21:16.475943 GENERIC: 0.0: enabled 1
1770 11:21:16.476412 SPI: 00: enabled 1
1771 11:21:16.479363 SPI: 00: enabled 1
1772 11:21:16.482559 PNP: 0c09.0: enabled 1
1773 11:21:16.483275 GENERIC: 0.0: enabled 1
1774 11:21:16.485773 USB3 port 0: enabled 1
1775 11:21:16.489407 USB3 port 1: enabled 1
1776 11:21:16.490052 USB3 port 2: enabled 0
1777 11:21:16.492526 USB3 port 3: enabled 0
1778 11:21:16.495972 USB2 port 0: enabled 0
1779 11:21:16.499685 USB2 port 1: enabled 1
1780 11:21:16.500156 USB2 port 2: enabled 1
1781 11:21:16.502325 USB2 port 3: enabled 0
1782 11:21:16.505647 USB2 port 4: enabled 1
1783 11:21:16.506161 USB2 port 5: enabled 0
1784 11:21:16.509196 USB2 port 6: enabled 0
1785 11:21:16.512760 USB2 port 7: enabled 0
1786 11:21:16.515952 USB2 port 8: enabled 0
1787 11:21:16.516559 USB2 port 9: enabled 0
1788 11:21:16.519727 USB3 port 0: enabled 0
1789 11:21:16.522357 USB3 port 1: enabled 1
1790 11:21:16.522827 USB3 port 2: enabled 0
1791 11:21:16.525797 USB3 port 3: enabled 0
1792 11:21:16.529484 GENERIC: 0.0: enabled 1
1793 11:21:16.533212 GENERIC: 1.0: enabled 1
1794 11:21:16.533712 APIC: 01: enabled 1
1795 11:21:16.535724 APIC: 05: enabled 1
1796 11:21:16.536291 APIC: 06: enabled 1
1797 11:21:16.539111 APIC: 03: enabled 1
1798 11:21:16.542476 APIC: 02: enabled 1
1799 11:21:16.543041 APIC: 04: enabled 1
1800 11:21:16.546588 APIC: 07: enabled 1
1801 11:21:16.549417 PCI: 01:00.0: enabled 1
1802 11:21:16.552376 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1803 11:21:16.558982 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1804 11:21:16.562364 ELOG: NV offset 0xf30000 size 0x1000
1805 11:21:16.568763 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1806 11:21:16.575358 ELOG: Event(17) added with size 13 at 2024-02-23 11:21:15 UTC
1807 11:21:16.582273 ELOG: Event(92) added with size 9 at 2024-02-23 11:21:15 UTC
1808 11:21:16.588743 ELOG: Event(93) added with size 9 at 2024-02-23 11:21:15 UTC
1809 11:21:16.595767 ELOG: Event(9E) added with size 10 at 2024-02-23 11:21:15 UTC
1810 11:21:16.602591 ELOG: Event(9F) added with size 14 at 2024-02-23 11:21:15 UTC
1811 11:21:16.605643 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1812 11:21:16.612389 ELOG: Event(A1) added with size 10 at 2024-02-23 11:21:15 UTC
1813 11:21:16.618850 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1814 11:21:16.625901 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1815 11:21:16.628746 Finalize devices...
1816 11:21:16.629306 Devices finalized
1817 11:21:16.637526 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1818 11:21:16.639179 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1819 11:21:16.645240 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1820 11:21:16.648742 ME: HFSTS1 : 0x80030055
1821 11:21:16.656015 ME: HFSTS2 : 0x30280116
1822 11:21:16.658799 ME: HFSTS3 : 0x00000050
1823 11:21:16.662193 ME: HFSTS4 : 0x00004000
1824 11:21:16.668908 ME: HFSTS5 : 0x00000000
1825 11:21:16.672082 ME: HFSTS6 : 0x40400006
1826 11:21:16.675175 ME: Manufacturing Mode : YES
1827 11:21:16.678715 ME: SPI Protection Mode Enabled : NO
1828 11:21:16.685092 ME: FW Partition Table : OK
1829 11:21:16.689006 ME: Bringup Loader Failure : NO
1830 11:21:16.692187 ME: Firmware Init Complete : NO
1831 11:21:16.695210 ME: Boot Options Present : NO
1832 11:21:16.698258 ME: Update In Progress : NO
1833 11:21:16.701377 ME: D0i3 Support : YES
1834 11:21:16.704632 ME: Low Power State Enabled : NO
1835 11:21:16.711375 ME: CPU Replaced : YES
1836 11:21:16.715047 ME: CPU Replacement Valid : YES
1837 11:21:16.717945 ME: Current Working State : 5
1838 11:21:16.721737 ME: Current Operation State : 1
1839 11:21:16.725542 ME: Current Operation Mode : 3
1840 11:21:16.728035 ME: Error Code : 0
1841 11:21:16.732134 ME: Enhanced Debug Mode : NO
1842 11:21:16.734926 ME: CPU Debug Disabled : YES
1843 11:21:16.739377 ME: TXT Support : NO
1844 11:21:16.744914 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1845 11:21:16.755073 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1846 11:21:16.758052 CBFS: 'fallback/slic' not found.
1847 11:21:16.761395 ACPI: Writing ACPI tables at 76b01000.
1848 11:21:16.761914 ACPI: * FACS
1849 11:21:16.764695 ACPI: * DSDT
1850 11:21:16.767981 Ramoops buffer: 0x100000@0x76a00000.
1851 11:21:16.771306 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1852 11:21:16.777542 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1853 11:21:16.781253 Google Chrome EC: version:
1854 11:21:16.784590 ro: voema_v2.0.10114-a447f03e46
1855 11:21:16.788012 rw: voema_v2.0.10132-7b2059e3bc
1856 11:21:16.788695 running image: 2
1857 11:21:16.794452 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1858 11:21:16.799226 ACPI: * FADT
1859 11:21:16.799780 SCI is IRQ9
1860 11:21:16.805604 ACPI: added table 1/32, length now 40
1861 11:21:16.806104 ACPI: * SSDT
1862 11:21:16.809127 Found 1 CPU(s) with 8 core(s) each.
1863 11:21:16.815768 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1864 11:21:16.818885 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1865 11:21:16.822314 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1866 11:21:16.826108 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1867 11:21:16.832454 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1868 11:21:16.841039 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1869 11:21:16.842135 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1870 11:21:16.849154 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1871 11:21:16.855769 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1872 11:21:16.859101 \_SB.PCI0.RP09: Added StorageD3Enable property
1873 11:21:16.862712 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1874 11:21:16.869243 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1875 11:21:16.875621 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1876 11:21:16.878831 PS2K: Passing 80 keymaps to kernel
1877 11:21:16.885577 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1878 11:21:16.892778 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1879 11:21:16.899449 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1880 11:21:16.902704 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1881 11:21:16.908877 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1882 11:21:16.915449 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1883 11:21:16.922165 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1884 11:21:16.929016 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1885 11:21:16.932395 ACPI: added table 2/32, length now 44
1886 11:21:16.935840 ACPI: * MCFG
1887 11:21:16.939382 ACPI: added table 3/32, length now 48
1888 11:21:16.942132 ACPI: * TPM2
1889 11:21:16.945827 TPM2 log created at 0x769f0000
1890 11:21:16.949229 ACPI: added table 4/32, length now 52
1891 11:21:16.949736 ACPI: * MADT
1892 11:21:16.952872 SCI is IRQ9
1893 11:21:16.955852 ACPI: added table 5/32, length now 56
1894 11:21:16.956405 current = 76b09850
1895 11:21:16.959284 ACPI: * DMAR
1896 11:21:16.962291 ACPI: added table 6/32, length now 60
1897 11:21:16.966087 ACPI: added table 7/32, length now 64
1898 11:21:16.968790 ACPI: * HPET
1899 11:21:16.972520 ACPI: added table 8/32, length now 68
1900 11:21:16.972985 ACPI: done.
1901 11:21:16.976266 ACPI tables: 35216 bytes.
1902 11:21:16.978828 smbios_write_tables: 769ef000
1903 11:21:16.982188 EC returned error result code 3
1904 11:21:16.985855 Couldn't obtain OEM name from CBI
1905 11:21:16.988974 Create SMBIOS type 16
1906 11:21:16.993787 Create SMBIOS type 17
1907 11:21:16.994247 GENERIC: 0.0 (WIFI Device)
1908 11:21:16.995696 SMBIOS tables: 1734 bytes.
1909 11:21:17.002595 Writing table forward entry at 0x00000500
1910 11:21:17.005776 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1911 11:21:17.012310 Writing coreboot table at 0x76b25000
1912 11:21:17.015598 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1913 11:21:17.022031 1. 0000000000001000-000000000009ffff: RAM
1914 11:21:17.025351 2. 00000000000a0000-00000000000fffff: RESERVED
1915 11:21:17.028828 3. 0000000000100000-00000000769eefff: RAM
1916 11:21:17.035571 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1917 11:21:17.041881 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1918 11:21:17.045590 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1919 11:21:17.052330 7. 0000000077000000-000000007fbfffff: RESERVED
1920 11:21:17.055737 8. 00000000c0000000-00000000cfffffff: RESERVED
1921 11:21:17.062082 9. 00000000f8000000-00000000f9ffffff: RESERVED
1922 11:21:17.065421 10. 00000000fb000000-00000000fb000fff: RESERVED
1923 11:21:17.072063 11. 00000000fe000000-00000000fe00ffff: RESERVED
1924 11:21:17.075277 12. 00000000fed80000-00000000fed87fff: RESERVED
1925 11:21:17.078684 13. 00000000fed90000-00000000fed92fff: RESERVED
1926 11:21:17.085188 14. 00000000feda0000-00000000feda1fff: RESERVED
1927 11:21:17.088701 15. 00000000fedc0000-00000000feddffff: RESERVED
1928 11:21:17.095427 16. 0000000100000000-00000004803fffff: RAM
1929 11:21:17.095998 Passing 4 GPIOs to payload:
1930 11:21:17.102579 NAME | PORT | POLARITY | VALUE
1931 11:21:17.109426 lid | undefined | high | high
1932 11:21:17.111952 power | undefined | high | low
1933 11:21:17.119007 oprom | undefined | high | low
1934 11:21:17.122113 EC in RW | 0x000000e5 | high | high
1935 11:21:17.128707 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 13cd
1936 11:21:17.132414 coreboot table: 1576 bytes.
1937 11:21:17.135465 IMD ROOT 0. 0x76fff000 0x00001000
1938 11:21:17.140802 IMD SMALL 1. 0x76ffe000 0x00001000
1939 11:21:17.145502 FSP MEMORY 2. 0x76c4e000 0x003b0000
1940 11:21:17.149163 VPD 3. 0x76c4d000 0x00000367
1941 11:21:17.152013 RO MCACHE 4. 0x76c4c000 0x00000fdc
1942 11:21:17.155220 CONSOLE 5. 0x76c2c000 0x00020000
1943 11:21:17.158928 FMAP 6. 0x76c2b000 0x00000578
1944 11:21:17.161997 TIME STAMP 7. 0x76c2a000 0x00000910
1945 11:21:17.165558 VBOOT WORK 8. 0x76c16000 0x00014000
1946 11:21:17.168755 ROMSTG STCK 9. 0x76c15000 0x00001000
1947 11:21:17.172059 AFTER CAR 10. 0x76c0a000 0x0000b000
1948 11:21:17.178480 RAMSTAGE 11. 0x76b97000 0x00073000
1949 11:21:17.182606 REFCODE 12. 0x76b42000 0x00055000
1950 11:21:17.185468 SMM BACKUP 13. 0x76b32000 0x00010000
1951 11:21:17.188597 4f444749 14. 0x76b30000 0x00002000
1952 11:21:17.192107 EXT VBT15. 0x76b2d000 0x0000219f
1953 11:21:17.195709 COREBOOT 16. 0x76b25000 0x00008000
1954 11:21:17.198886 ACPI 17. 0x76b01000 0x00024000
1955 11:21:17.202530 ACPI GNVS 18. 0x76b00000 0x00001000
1956 11:21:17.205344 RAMOOPS 19. 0x76a00000 0x00100000
1957 11:21:17.211989 TPM2 TCGLOG20. 0x769f0000 0x00010000
1958 11:21:17.215833 SMBIOS 21. 0x769ef000 0x00000800
1959 11:21:17.216405 IMD small region:
1960 11:21:17.219186 IMD ROOT 0. 0x76ffec00 0x00000400
1961 11:21:17.225743 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1962 11:21:17.228945 POWER STATE 2. 0x76ffeb80 0x00000044
1963 11:21:17.231909 ROMSTAGE 3. 0x76ffeb60 0x00000004
1964 11:21:17.235041 MEM INFO 4. 0x76ffe980 0x000001e0
1965 11:21:17.242665 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1966 11:21:17.245173 MTRR: Physical address space:
1967 11:21:17.252468 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1968 11:21:17.258988 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1969 11:21:17.261554 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1970 11:21:17.268270 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1971 11:21:17.275702 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1972 11:21:17.282400 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1973 11:21:17.288581 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1974 11:21:17.292588 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 11:21:17.295618 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 11:21:17.301809 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 11:21:17.305415 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 11:21:17.308316 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 11:21:17.311521 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 11:21:17.318763 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 11:21:17.321481 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 11:21:17.325164 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 11:21:17.330287 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 11:21:17.331527 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 11:21:17.337102 call enable_fixed_mtrr()
1986 11:21:17.341260 CPU physical address size: 39 bits
1987 11:21:17.347358 MTRR: default type WB/UC MTRR counts: 6/7.
1988 11:21:17.350737 MTRR: WB selected as default type.
1989 11:21:17.357067 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1990 11:21:17.360745 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1991 11:21:17.366717 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1992 11:21:17.373639 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1993 11:21:17.380385 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1994 11:21:17.387375 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1995 11:21:17.390754
1996 11:21:17.391299 MTRR check
1997 11:21:17.394162 Fixed MTRRs : Enabled
1998 11:21:17.394715 Variable MTRRs: Enabled
1999 11:21:17.395071
2000 11:21:17.401608 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 11:21:17.404236 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 11:21:17.407855 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 11:21:17.410536 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 11:21:17.417309 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 11:21:17.420785 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 11:21:17.423935 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 11:21:17.427579 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 11:21:17.433768 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 11:21:17.437115 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 11:21:17.440880 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 11:21:17.447875 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2012 11:21:17.450570 call enable_fixed_mtrr()
2013 11:21:17.454431 Checking cr50 for pending updates
2014 11:21:17.458192 CPU physical address size: 39 bits
2015 11:21:17.461214 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 11:21:17.465303 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 11:21:17.468546 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 11:21:17.476143 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 11:21:17.479167 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 11:21:17.483006 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 11:21:17.486784 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 11:21:17.490143 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 11:21:17.493973 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 11:21:17.498065 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 11:21:17.504674 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 11:21:17.508267 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 11:21:17.511757 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 11:21:17.515867 call enable_fixed_mtrr()
2029 11:21:17.519762 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 11:21:17.522697 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 11:21:17.526502 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 11:21:17.533825 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 11:21:17.536692 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 11:21:17.540916 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 11:21:17.544416 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 11:21:17.547693 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 11:21:17.551518 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 11:21:17.556503 CPU physical address size: 39 bits
2039 11:21:17.562419 call enable_fixed_mtrr()
2040 11:21:17.565263 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 11:21:17.571793 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 11:21:17.575407 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 11:21:17.578464 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 11:21:17.582556 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 11:21:17.588963 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 11:21:17.591985 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 11:21:17.595770 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 11:21:17.598567 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 11:21:17.601899 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 11:21:17.608530 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 11:21:17.611540 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 11:21:17.615327 CPU physical address size: 39 bits
2053 11:21:17.618332 call enable_fixed_mtrr()
2054 11:21:17.621550 MTRR: Fixed MSR 0x258 0x0606060606060606
2055 11:21:17.624670 CPU physical address size: 39 bits
2056 11:21:17.632536 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 11:21:17.636094 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 11:21:17.638895 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 11:21:17.642561 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 11:21:17.648871 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 11:21:17.652186 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 11:21:17.655774 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 11:21:17.660096 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 11:21:17.665310 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 11:21:17.665815 TPM flow control failure
2066 11:21:17.668526 call enable_fixed_mtrr()
2067 11:21:17.673777 unexpected final status 0x40001d0
2068 11:21:17.675550 MTRR: Fixed MSR 0x250 0x0606060606060606
2069 11:21:17.682267 MTRR: Fixed MSR 0x250 0x0606060606060606
2070 11:21:17.685555 MTRR: Fixed MSR 0x258 0x0606060606060606
2071 11:21:17.688693 MTRR: Fixed MSR 0x259 0x0000000000000000
2072 11:21:17.692206 MTRR: Fixed MSR 0x268 0x0606060606060606
2073 11:21:17.695708 MTRR: Fixed MSR 0x269 0x0606060606060606
2074 11:21:17.702583 MTRR: Fixed MSR 0x26a 0x0606060606060606
2075 11:21:17.705731 MTRR: Fixed MSR 0x26b 0x0606060606060606
2076 11:21:17.708935 MTRR: Fixed MSR 0x26c 0x0606060606060606
2077 11:21:17.712093 MTRR: Fixed MSR 0x26d 0x0606060606060606
2078 11:21:17.719298 MTRR: Fixed MSR 0x26e 0x0606060606060606
2079 11:21:17.722231 MTRR: Fixed MSR 0x26f 0x0606060606060606
2080 11:21:17.729025 MTRR: Fixed MSR 0x258 0x0606060606060606
2081 11:21:17.732205 MTRR: Fixed MSR 0x259 0x0000000000000000
2082 11:21:17.735954 MTRR: Fixed MSR 0x268 0x0606060606060606
2083 11:21:17.739479 MTRR: Fixed MSR 0x269 0x0606060606060606
2084 11:21:17.746024 MTRR: Fixed MSR 0x26a 0x0606060606060606
2085 11:21:17.748711 MTRR: Fixed MSR 0x26b 0x0606060606060606
2086 11:21:17.752633 MTRR: Fixed MSR 0x26c 0x0606060606060606
2087 11:21:17.756299 MTRR: Fixed MSR 0x26d 0x0606060606060606
2088 11:21:17.762595 MTRR: Fixed MSR 0x26e 0x0606060606060606
2089 11:21:17.765864 MTRR: Fixed MSR 0x26f 0x0606060606060606
2090 11:21:17.768521 call enable_fixed_mtrr()
2091 11:21:17.772198 call enable_fixed_mtrr()
2092 11:21:17.775738 CPU physical address size: 39 bits
2093 11:21:17.778897 CPU physical address size: 39 bits
2094 11:21:17.782668 CPU physical address size: 39 bits
2095 11:21:17.786354 tpm transaction failed
2096 11:21:17.792707 ERROR: Attempt to enable CR50 update failed: 1f
2097 11:21:17.796056 BS: BS_PAYLOAD_LOAD entry times (exec / console): 322 / 16 ms
2098 11:21:17.806554 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2099 11:21:17.809820 Checking segment from ROM address 0xffc02b38
2100 11:21:17.812669 Checking segment from ROM address 0xffc02b54
2101 11:21:17.819228 Loading segment from ROM address 0xffc02b38
2102 11:21:17.819795 code (compression=0)
2103 11:21:17.829706 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2104 11:21:17.839486 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2105 11:21:17.840056 it's not compressed!
2106 11:21:17.985304 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2107 11:21:17.991029 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2108 11:21:17.998291 Loading segment from ROM address 0xffc02b54
2109 11:21:18.000941 Entry Point 0x30000000
2110 11:21:18.001408 Loaded segments
2111 11:21:18.007880 BS: BS_PAYLOAD_LOAD run times (exec / console): 141 / 63 ms
2112 11:21:18.053444 Finalizing chipset.
2113 11:21:18.056758 Finalizing SMM.
2114 11:21:18.057323 APMC done.
2115 11:21:18.063051 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2116 11:21:18.066710 mp_park_aps done after 0 msecs.
2117 11:21:18.071247 Jumping to boot code at 0x30000000(0x76b25000)
2118 11:21:18.079261 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2119 11:21:18.079775
2120 11:21:18.080160
2121 11:21:18.084107
2122 11:21:18.084522 Starting depthcharge on Voema...
2123 11:21:18.085535 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2124 11:21:18.086117 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2125 11:21:18.086561 Setting prompt string to ['volteer:']
2126 11:21:18.087085 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2127 11:21:18.087785
2128 11:21:18.092616 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2129 11:21:18.093346
2130 11:21:18.099745 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2131 11:21:18.100274
2132 11:21:18.106200 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2133 11:21:18.106724
2134 11:21:18.109309 Failed to find eMMC card reader
2135 11:21:18.109783
2136 11:21:18.110165 Wipe memory regions:
2137 11:21:18.113112
2138 11:21:18.115937 [0x00000000001000, 0x000000000a0000)
2139 11:21:18.116354
2140 11:21:18.119224 [0x00000000100000, 0x00000030000000)
2141 11:21:18.154954
2142 11:21:18.158324 [0x00000032662db0, 0x000000769ef000)
2143 11:21:18.208050
2144 11:21:18.211782 [0x00000100000000, 0x00000480400000)
2145 11:21:18.907124
2146 11:21:18.908643 ec_init: CrosEC protocol v3 supported (256, 256)
2147 11:21:19.339986
2148 11:21:19.340580 R8152: Initializing
2149 11:21:19.340990
2150 11:21:19.343255 Version 9 (ocp_data = 6010)
2151 11:21:19.343716
2152 11:21:19.347001 R8152: Done initializing
2153 11:21:19.347561
2154 11:21:19.349559 Adding net device
2155 11:21:19.651743
2156 11:21:19.655214 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2157 11:21:19.655802
2158 11:21:19.656170
2159 11:21:19.656511
2160 11:21:19.658700 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2162 11:21:19.760345 volteer: tftpboot 192.168.201.1 12838104/tftp-deploy-wll8m483/kernel/bzImage 12838104/tftp-deploy-wll8m483/kernel/cmdline 12838104/tftp-deploy-wll8m483/ramdisk/ramdisk.cpio.gz
2163 11:21:19.761035 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2164 11:21:19.761574 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2165 11:21:19.766286 tftpboot 192.168.201.1 12838104/tftp-deploy-wll8m483/kernel/bzIploy-wll8m483/kernel/cmdline 12838104/tftp-deploy-wll8m483/ramdisk/ramdisk.cpio.gz
2166 11:21:19.766775
2167 11:21:19.767147 Waiting for link
2168 11:21:19.970063
2169 11:21:19.970625 done.
2170 11:21:19.971029
2171 11:21:19.971497 MAC: 00:e0:4c:68:05:16
2172 11:21:19.971926
2173 11:21:19.973268 Sending DHCP discover... done.
2174 11:21:19.973771
2175 11:21:19.977421 Waiting for reply... done.
2176 11:21:19.978067
2177 11:21:19.980626 Sending DHCP request... done.
2178 11:21:19.981188
2179 11:21:19.983241 Waiting for reply... done.
2180 11:21:19.983706
2181 11:21:19.986700 My ip is 192.168.201.10
2182 11:21:19.987183
2183 11:21:19.990176 The DHCP server ip is 192.168.201.1
2184 11:21:19.990751
2185 11:21:19.994036 TFTP server IP predefined by user: 192.168.201.1
2186 11:21:19.994622
2187 11:21:20.000298 Bootfile predefined by user: 12838104/tftp-deploy-wll8m483/kernel/bzImage
2188 11:21:20.000871
2189 11:21:20.003280 Sending tftp read request... done.
2190 11:21:20.003847
2191 11:21:20.012475 Waiting for the transfer...
2192 11:21:20.012941
2193 11:21:20.323507 00000000 ################################################################
2194 11:21:20.323702
2195 11:21:20.611231 00080000 ################################################################
2196 11:21:20.611375
2197 11:21:20.905015 00100000 ################################################################
2198 11:21:20.905157
2199 11:21:21.200299 00180000 ################################################################
2200 11:21:21.200443
2201 11:21:21.491664 00200000 ################################################################
2202 11:21:21.491808
2203 11:21:21.777938 00280000 ################################################################
2204 11:21:21.778076
2205 11:21:22.064061 00300000 ################################################################
2206 11:21:22.064229
2207 11:21:22.359531 00380000 ################################################################
2208 11:21:22.359677
2209 11:21:22.656769 00400000 ################################################################
2210 11:21:22.656915
2211 11:21:22.951487 00480000 ################################################################
2212 11:21:22.951626
2213 11:21:23.249600 00500000 ################################################################
2214 11:21:23.249760
2215 11:21:23.562689 00580000 ################################################################
2216 11:21:23.562847
2217 11:21:23.919090 00600000 ################################################################
2218 11:21:23.919599
2219 11:21:24.307719 00680000 ################################################################
2220 11:21:24.308231
2221 11:21:24.648318 00700000 ################################################################
2222 11:21:24.648476
2223 11:21:24.946457 00780000 ################################################################
2224 11:21:24.946608
2225 11:21:25.244289 00800000 ################################################################
2226 11:21:25.244438
2227 11:21:25.542606 00880000 ################################################################
2228 11:21:25.542752
2229 11:21:25.870641 00900000 ################################################################
2230 11:21:25.871187
2231 11:21:26.185388 00980000 ################################################################
2232 11:21:26.185528
2233 11:21:26.461385 00a00000 ################################################################
2234 11:21:26.461521
2235 11:21:26.736516 00a80000 ################################################################
2236 11:21:26.736667
2237 11:21:27.034790 00b00000 ################################################################
2238 11:21:27.035331
2239 11:21:27.241535 00b80000 #################################### done.
2240 11:21:27.242074
2241 11:21:27.244965 The bootfile was 12349440 bytes long.
2242 11:21:27.245441
2243 11:21:27.249271 Sending tftp read request... done.
2244 11:21:27.249785
2245 11:21:27.252486 Waiting for the transfer...
2246 11:21:27.252941
2247 11:21:27.631955 00000000 ################################################################
2248 11:21:27.632460
2249 11:21:28.041036 00080000 ################################################################
2250 11:21:28.041546
2251 11:21:28.328485 00100000 ################################################################
2252 11:21:28.328630
2253 11:21:28.621141 00180000 ################################################################
2254 11:21:28.621281
2255 11:21:28.927348 00200000 ################################################################
2256 11:21:28.927854
2257 11:21:29.297397 00280000 ################################################################
2258 11:21:29.297947
2259 11:21:29.665611 00300000 ################################################################
2260 11:21:29.666177
2261 11:21:29.975400 00380000 ################################################################
2262 11:21:29.975581
2263 11:21:30.272392 00400000 ################################################################
2264 11:21:30.272573
2265 11:21:30.563844 00480000 ################################################################
2266 11:21:30.564000
2267 11:21:30.846383 00500000 ################################################################
2268 11:21:30.846540
2269 11:21:31.132882 00580000 ################################################################
2270 11:21:31.133063
2271 11:21:31.190348 00600000 ############# done.
2272 11:21:31.190464
2273 11:21:31.193461 Sending tftp read request... done.
2274 11:21:31.193561
2275 11:21:31.196969 Waiting for the transfer...
2276 11:21:31.197077
2277 11:21:31.197162 00000000 # done.
2278 11:21:31.197243
2279 11:21:31.206657 Command line loaded dynamically from TFTP file: 12838104/tftp-deploy-wll8m483/kernel/cmdline
2280 11:21:31.206873
2281 11:21:31.230305 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12838104/extract-nfsrootfs-5j59oc3b,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2282 11:21:31.236628
2283 11:21:31.240502 Shutting down all USB controllers.
2284 11:21:31.241068
2285 11:21:31.241437 Removing current net device
2286 11:21:31.241829
2287 11:21:31.243454 Finalizing coreboot
2288 11:21:31.243918
2289 11:21:31.250563 Exiting depthcharge with code 4 at timestamp: 21731463
2290 11:21:31.251112
2291 11:21:31.251613
2292 11:21:31.252268 Starting kernel ...
2293 11:21:31.252645
2294 11:21:31.252978
2295 11:21:31.254327 end: 2.2.4 bootloader-commands (duration 00:00:13) [common]
2296 11:21:31.254853 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2297 11:21:31.255264 Setting prompt string to ['Linux version [0-9]']
2298 11:21:31.255633 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2299 11:21:31.256008 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2301 11:26:02.256029 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2303 11:26:02.257338 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2305 11:26:02.258256 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2308 11:26:02.259680 end: 2 depthcharge-action (duration 00:05:00) [common]
2310 11:26:02.260259 Cleaning after the job
2311 11:26:02.260355 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12838104/tftp-deploy-wll8m483/ramdisk
2312 11:26:02.261311 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12838104/tftp-deploy-wll8m483/kernel
2313 11:26:02.262835 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12838104/tftp-deploy-wll8m483/nfsrootfs
2314 11:26:02.356430 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12838104/tftp-deploy-wll8m483/modules
2315 11:26:02.357183 start: 4.1 power-off (timeout 00:00:30) [common]
2316 11:26:02.357367 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-15' '--port=1' '--command=off'
2317 11:26:02.439588 >> Command sent successfully.
2318 11:26:02.446333 Returned 0 in 0 seconds
2319 11:26:02.547559 end: 4.1 power-off (duration 00:00:00) [common]
2321 11:26:02.549127 start: 4.2 read-feedback (timeout 00:10:00) [common]
2322 11:26:02.550403 Listened to connection for namespace 'common' for up to 1s
2323 11:26:03.551089 Finalising connection for namespace 'common'
2324 11:26:03.551774 Disconnecting from shell: Finalise
2325 11:26:03.552198
2326 11:26:03.653178 end: 4.2 read-feedback (duration 00:00:01) [common]
2327 11:26:03.653873 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12838104
2328 11:26:04.093132 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12838104
2329 11:26:04.093338 JobError: Your job cannot terminate cleanly.