Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 18:49:09.624269 lava-dispatcher, installed at version: 2024.01
2 18:49:09.624483 start: 0 validate
3 18:49:09.624615 Start time: 2024-03-01 18:49:09.624607+00:00 (UTC)
4 18:49:09.624779 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:49:09.624930 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 18:49:09.892476 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:49:09.892644 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:49:10.160247 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:49:10.161023 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 18:49:10.432089 validate duration: 0.81
12 18:49:10.433493 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 18:49:10.434126 start: 1.1 download-retry (timeout 00:10:00) [common]
14 18:49:10.434695 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 18:49:10.435459 Not decompressing ramdisk as can be used compressed.
16 18:49:10.435954 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 18:49:10.436390 saving as /var/lib/lava/dispatcher/tmp/12909618/tftp-deploy-xsbraosw/ramdisk/rootfs.cpio.gz
18 18:49:10.436781 total size: 8418130 (8 MB)
19 18:49:10.442628 progress 0 % (0 MB)
20 18:49:10.454733 progress 5 % (0 MB)
21 18:49:10.462101 progress 10 % (0 MB)
22 18:49:10.467503 progress 15 % (1 MB)
23 18:49:10.472097 progress 20 % (1 MB)
24 18:49:10.475998 progress 25 % (2 MB)
25 18:49:10.479564 progress 30 % (2 MB)
26 18:49:10.482488 progress 35 % (2 MB)
27 18:49:10.485500 progress 40 % (3 MB)
28 18:49:10.488336 progress 45 % (3 MB)
29 18:49:10.490953 progress 50 % (4 MB)
30 18:49:10.493479 progress 55 % (4 MB)
31 18:49:10.495853 progress 60 % (4 MB)
32 18:49:10.497976 progress 65 % (5 MB)
33 18:49:10.500288 progress 70 % (5 MB)
34 18:49:10.502531 progress 75 % (6 MB)
35 18:49:10.504797 progress 80 % (6 MB)
36 18:49:10.507029 progress 85 % (6 MB)
37 18:49:10.509303 progress 90 % (7 MB)
38 18:49:10.511518 progress 95 % (7 MB)
39 18:49:10.513665 progress 100 % (8 MB)
40 18:49:10.513899 8 MB downloaded in 0.08 s (104.05 MB/s)
41 18:49:10.514059 end: 1.1.1 http-download (duration 00:00:00) [common]
43 18:49:10.514304 end: 1.1 download-retry (duration 00:00:00) [common]
44 18:49:10.514396 start: 1.2 download-retry (timeout 00:10:00) [common]
45 18:49:10.514483 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 18:49:10.514622 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 18:49:10.514694 saving as /var/lib/lava/dispatcher/tmp/12909618/tftp-deploy-xsbraosw/kernel/bzImage
48 18:49:10.514757 total size: 12349440 (11 MB)
49 18:49:10.514836 No compression specified
50 18:49:10.515975 progress 0 % (0 MB)
51 18:49:10.519392 progress 5 % (0 MB)
52 18:49:10.522732 progress 10 % (1 MB)
53 18:49:10.526056 progress 15 % (1 MB)
54 18:49:10.529329 progress 20 % (2 MB)
55 18:49:10.532643 progress 25 % (2 MB)
56 18:49:10.535906 progress 30 % (3 MB)
57 18:49:10.539090 progress 35 % (4 MB)
58 18:49:10.542400 progress 40 % (4 MB)
59 18:49:10.545744 progress 45 % (5 MB)
60 18:49:10.549047 progress 50 % (5 MB)
61 18:49:10.552353 progress 55 % (6 MB)
62 18:49:10.555665 progress 60 % (7 MB)
63 18:49:10.558915 progress 65 % (7 MB)
64 18:49:10.562228 progress 70 % (8 MB)
65 18:49:10.565443 progress 75 % (8 MB)
66 18:49:10.568717 progress 80 % (9 MB)
67 18:49:10.571932 progress 85 % (10 MB)
68 18:49:10.575254 progress 90 % (10 MB)
69 18:49:10.578479 progress 95 % (11 MB)
70 18:49:10.581607 progress 100 % (11 MB)
71 18:49:10.581846 11 MB downloaded in 0.07 s (175.56 MB/s)
72 18:49:10.581995 end: 1.2.1 http-download (duration 00:00:00) [common]
74 18:49:10.582227 end: 1.2 download-retry (duration 00:00:00) [common]
75 18:49:10.582318 start: 1.3 download-retry (timeout 00:10:00) [common]
76 18:49:10.582404 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 18:49:10.582548 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 18:49:10.582630 saving as /var/lib/lava/dispatcher/tmp/12909618/tftp-deploy-xsbraosw/modules/modules.tar
79 18:49:10.582694 total size: 484604 (0 MB)
80 18:49:10.582758 Using unxz to decompress xz
81 18:49:10.587280 progress 6 % (0 MB)
82 18:49:10.587701 progress 13 % (0 MB)
83 18:49:10.587941 progress 20 % (0 MB)
84 18:49:10.589685 progress 27 % (0 MB)
85 18:49:10.591569 progress 33 % (0 MB)
86 18:49:10.593688 progress 40 % (0 MB)
87 18:49:10.595672 progress 47 % (0 MB)
88 18:49:10.597561 progress 54 % (0 MB)
89 18:49:10.599698 progress 60 % (0 MB)
90 18:49:10.602021 progress 67 % (0 MB)
91 18:49:10.604257 progress 74 % (0 MB)
92 18:49:10.606185 progress 81 % (0 MB)
93 18:49:10.608231 progress 87 % (0 MB)
94 18:49:10.610553 progress 94 % (0 MB)
95 18:49:10.612947 progress 100 % (0 MB)
96 18:49:10.619055 0 MB downloaded in 0.04 s (12.71 MB/s)
97 18:49:10.619324 end: 1.3.1 http-download (duration 00:00:00) [common]
99 18:49:10.619614 end: 1.3 download-retry (duration 00:00:00) [common]
100 18:49:10.619710 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 18:49:10.619838 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 18:49:10.619920 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 18:49:10.620011 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 18:49:10.620281 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_
105 18:49:10.620422 makedir: /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin
106 18:49:10.620534 makedir: /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/tests
107 18:49:10.620636 makedir: /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/results
108 18:49:10.620757 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-add-keys
109 18:49:10.620910 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-add-sources
110 18:49:10.621047 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-background-process-start
111 18:49:10.621186 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-background-process-stop
112 18:49:10.621319 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-common-functions
113 18:49:10.621449 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-echo-ipv4
114 18:49:10.621611 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-install-packages
115 18:49:10.621741 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-installed-packages
116 18:49:10.621870 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-os-build
117 18:49:10.622000 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-probe-channel
118 18:49:10.622133 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-probe-ip
119 18:49:10.622262 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-target-ip
120 18:49:10.622389 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-target-mac
121 18:49:10.622517 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-target-storage
122 18:49:10.622650 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-test-case
123 18:49:10.622837 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-test-event
124 18:49:10.622984 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-test-feedback
125 18:49:10.623148 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-test-raise
126 18:49:10.623285 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-test-reference
127 18:49:10.623423 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-test-runner
128 18:49:10.623596 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-test-set
129 18:49:10.623732 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-test-shell
130 18:49:10.623866 Updating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-install-packages (oe)
131 18:49:10.624026 Updating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/bin/lava-installed-packages (oe)
132 18:49:10.624195 Creating /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/environment
133 18:49:10.624298 LAVA metadata
134 18:49:10.624380 - LAVA_JOB_ID=12909618
135 18:49:10.624444 - LAVA_DISPATCHER_IP=192.168.201.1
136 18:49:10.624551 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 18:49:10.624618 skipped lava-vland-overlay
138 18:49:10.624697 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 18:49:10.624778 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 18:49:10.624839 skipped lava-multinode-overlay
141 18:49:10.624911 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 18:49:10.624994 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 18:49:10.625067 Loading test definitions
144 18:49:10.625168 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 18:49:10.625248 Using /lava-12909618 at stage 0
146 18:49:10.625585 uuid=12909618_1.4.2.3.1 testdef=None
147 18:49:10.625676 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 18:49:10.625773 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 18:49:10.626393 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 18:49:10.626621 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 18:49:10.627286 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 18:49:10.627521 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 18:49:10.628194 runner path: /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/0/tests/0_dmesg test_uuid 12909618_1.4.2.3.1
156 18:49:10.628360 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 18:49:10.628593 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 18:49:10.628668 Using /lava-12909618 at stage 1
160 18:49:10.628978 uuid=12909618_1.4.2.3.5 testdef=None
161 18:49:10.629068 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 18:49:10.629153 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 18:49:10.629834 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 18:49:10.630061 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 18:49:10.630732 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 18:49:10.630964 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 18:49:10.631612 runner path: /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/1/tests/1_bootrr test_uuid 12909618_1.4.2.3.5
170 18:49:10.631800 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 18:49:10.632010 Creating lava-test-runner.conf files
173 18:49:10.632117 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/0 for stage 0
174 18:49:10.632211 - 0_dmesg
175 18:49:10.632295 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12909618/lava-overlay-lhwg2lk_/lava-12909618/1 for stage 1
176 18:49:10.632412 - 1_bootrr
177 18:49:10.632523 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 18:49:10.632620 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 18:49:10.641166 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 18:49:10.641315 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 18:49:10.641409 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 18:49:10.641499 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 18:49:10.641585 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 18:49:10.900168 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 18:49:10.900622 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 18:49:10.900775 extracting modules file /var/lib/lava/dispatcher/tmp/12909618/tftp-deploy-xsbraosw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12909618/extract-overlay-ramdisk-ioo6jq2a/ramdisk
187 18:49:10.922117 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 18:49:10.922291 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 18:49:10.922386 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12909618/compress-overlay-en2rt6p7/overlay-1.4.2.4.tar.gz to ramdisk
190 18:49:10.922461 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12909618/compress-overlay-en2rt6p7/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12909618/extract-overlay-ramdisk-ioo6jq2a/ramdisk
191 18:49:10.931028 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 18:49:10.931168 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 18:49:10.931263 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 18:49:10.931352 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 18:49:10.931437 Building ramdisk /var/lib/lava/dispatcher/tmp/12909618/extract-overlay-ramdisk-ioo6jq2a/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12909618/extract-overlay-ramdisk-ioo6jq2a/ramdisk
196 18:49:11.077313 >> 53982 blocks
197 18:49:11.977474 rename /var/lib/lava/dispatcher/tmp/12909618/extract-overlay-ramdisk-ioo6jq2a/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12909618/tftp-deploy-xsbraosw/ramdisk/ramdisk.cpio.gz
198 18:49:11.977920 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 18:49:11.978045 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 18:49:11.978150 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 18:49:11.978250 No mkimage arch provided, not using FIT.
202 18:49:11.978340 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 18:49:11.978422 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 18:49:11.978526 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 18:49:11.978619 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 18:49:11.978702 No LXC device requested
207 18:49:11.978784 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 18:49:11.978874 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 18:49:11.978957 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 18:49:11.979033 Checking files for TFTP limit of 4294967296 bytes.
211 18:49:11.979448 end: 1 tftp-deploy (duration 00:00:02) [common]
212 18:49:11.979562 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 18:49:11.979657 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 18:49:11.979781 substitutions:
215 18:49:11.979848 - {DTB}: None
216 18:49:11.979910 - {INITRD}: 12909618/tftp-deploy-xsbraosw/ramdisk/ramdisk.cpio.gz
217 18:49:11.979971 - {KERNEL}: 12909618/tftp-deploy-xsbraosw/kernel/bzImage
218 18:49:11.980028 - {LAVA_MAC}: None
219 18:49:11.980129 - {PRESEED_CONFIG}: None
220 18:49:11.980186 - {PRESEED_LOCAL}: None
221 18:49:11.980242 - {RAMDISK}: 12909618/tftp-deploy-xsbraosw/ramdisk/ramdisk.cpio.gz
222 18:49:11.980297 - {ROOT_PART}: None
223 18:49:11.980352 - {ROOT}: None
224 18:49:11.980408 - {SERVER_IP}: 192.168.201.1
225 18:49:11.980462 - {TEE}: None
226 18:49:11.980517 Parsed boot commands:
227 18:49:11.980570 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 18:49:11.980753 Parsed boot commands: tftpboot 192.168.201.1 12909618/tftp-deploy-xsbraosw/kernel/bzImage 12909618/tftp-deploy-xsbraosw/kernel/cmdline 12909618/tftp-deploy-xsbraosw/ramdisk/ramdisk.cpio.gz
229 18:49:11.980841 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 18:49:11.980927 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 18:49:11.981018 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 18:49:11.981104 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 18:49:11.981174 Not connected, no need to disconnect.
234 18:49:11.981249 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 18:49:11.981327 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 18:49:11.981402 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-1'
237 18:49:11.985557 Setting prompt string to ['lava-test: # ']
238 18:49:11.985968 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 18:49:11.986085 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 18:49:11.986184 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 18:49:11.986278 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 18:49:11.986511 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-1' '--port=1' '--command=reboot'
243 18:49:17.130372 >> Command sent successfully.
244 18:49:17.144970 Returned 0 in 5 seconds
245 18:49:17.246335 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 18:49:17.247884 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 18:49:17.248445 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 18:49:17.248906 Setting prompt string to 'Starting depthcharge on Magolor...'
250 18:49:17.249283 Changing prompt to 'Starting depthcharge on Magolor...'
251 18:49:17.249629 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
252 18:49:17.251006 [Enter `^Ec?' for help]
253 18:49:18.376941
254 18:49:18.377472
255 18:49:18.386544 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
256 18:49:18.390144 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
257 18:49:18.393678 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
258 18:49:18.400190 CPU: AES supported, TXT NOT supported, VT supported
259 18:49:18.406392 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
260 18:49:18.410015 PCH: device id 4d87 (rev 01) is Jasperlake Super
261 18:49:18.413454 IGD: device id 4e55 (rev 01) is Jasperlake GT4
262 18:49:18.416744 VBOOT: Loading verstage.
263 18:49:18.424467 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 18:49:18.427704 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
265 18:49:18.431859 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 18:49:18.438705 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
267 18:49:18.439154
268 18:49:18.439584
269 18:49:18.451331 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
270 18:49:18.465245 Probing TPM: . done!
271 18:49:18.468844 TPM ready after 0 ms
272 18:49:18.471977 Connected to device vid:did:rid of 1ae0:0028:00
273 18:49:18.483896 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
274 18:49:18.490738 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 18:49:18.542262 Initialized TPM device CR50 revision 0
276 18:49:18.551805 tlcl_send_startup: Startup return code is 0
277 18:49:18.552342 TPM: setup succeeded
278 18:49:18.566171 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 18:49:18.580180 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 18:49:18.595798 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 18:49:18.607169 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 18:49:18.610348 Chrome EC: UHEPI supported
283 18:49:18.610800 Phase 1
284 18:49:18.616776 FMAP: area GBB found @ c05000 (12288 bytes)
285 18:49:18.623770 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
286 18:49:18.630288 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
287 18:49:18.633617 Recovery requested (1009000e)
288 18:49:18.637178 TPM: Extending digest for VBOOT: boot mode into PCR 0
289 18:49:18.648207 tlcl_extend: response is 0
290 18:49:18.654942 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
291 18:49:18.664421 tlcl_extend: response is 0
292 18:49:18.671077 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
293 18:49:18.675139 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
294 18:49:18.682803 BS: verstage times (exec / console): total (unknown) / 124 ms
295 18:49:18.683239
296 18:49:18.683581
297 18:49:18.693189 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
298 18:49:18.698953 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
299 18:49:18.706329 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
300 18:49:18.709231 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
301 18:49:18.712613 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
302 18:49:18.718993 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
303 18:49:18.722902 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
304 18:49:18.725878 TCO_STS: 0000 0001
305 18:49:18.726339 GEN_PMCON: d0015038 00002200
306 18:49:18.729872 GBLRST_CAUSE: 00000000 00000000
307 18:49:18.732519 prev_sleep_state 5
308 18:49:18.735730 Boot Count incremented to 9260
309 18:49:18.742438 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 18:49:18.745867 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
311 18:49:18.749654 Chrome EC: UHEPI supported
312 18:49:18.756425 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
313 18:49:18.762727 Probing TPM: done!
314 18:49:18.769868 Connected to device vid:did:rid of 1ae0:0028:00
315 18:49:18.779950 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
316 18:49:18.789592 Initialized TPM device CR50 revision 0
317 18:49:18.801095 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
318 18:49:18.804249 MRC: Hash idx 0x100b comparison successful.
319 18:49:18.807804 MRC cache found, size 5458
320 18:49:18.811317 bootmode is set to: 2
321 18:49:18.811741 SPD INDEX = 0
322 18:49:18.817706 CBFS: Found 'spd.bin' @0x40c40 size 0x600
323 18:49:18.821187 SPD: module type is LPDDR4X
324 18:49:18.824373 SPD: module part number is MT53E512M32D2NP-046 WT:E
325 18:49:18.831274 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
326 18:49:18.838267 SPD: device width 16 bits, bus width 32 bits
327 18:49:18.841484 SPD: module size is 4096 MB (per channel)
328 18:49:18.844568 meminit_channels: DRAM half-populated
329 18:49:18.926568 CBMEM:
330 18:49:18.930081 IMD: root @ 0x76fff000 254 entries.
331 18:49:18.933684 IMD: root @ 0x76ffec00 62 entries.
332 18:49:18.936547 FMAP: area RO_VPD found @ c00000 (16384 bytes)
333 18:49:18.943271 WARNING: RO_VPD is uninitialized or empty.
334 18:49:18.946203 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
335 18:49:18.950522 External stage cache:
336 18:49:18.953468 IMD: root @ 0x7b3ff000 254 entries.
337 18:49:18.957239 IMD: root @ 0x7b3fec00 62 entries.
338 18:49:18.966847 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
339 18:49:18.973833 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
340 18:49:18.980093 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
341 18:49:18.988506 MRC: 'RECOVERY_MRC_CACHE' does not need update.
342 18:49:18.991483 cse_lite: Skip switching to RW in the recovery path
343 18:49:18.994912 1 DIMMs found
344 18:49:18.995534 SMM Memory Map
345 18:49:18.998681 SMRAM : 0x7b000000 0x800000
346 18:49:19.001628 Subregion 0: 0x7b000000 0x200000
347 18:49:19.004781 Subregion 1: 0x7b200000 0x200000
348 18:49:19.008641 Subregion 2: 0x7b400000 0x400000
349 18:49:19.011636 top_of_ram = 0x77000000
350 18:49:19.018316 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
351 18:49:19.021421 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
352 18:49:19.028199 MTRR Range: Start=ff000000 End=0 (Size 1000000)
353 18:49:19.031496 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
354 18:49:19.038055 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
355 18:49:19.050247 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
356 18:49:19.053563 Processing 188 relocs. Offset value of 0x74c0e000
357 18:49:19.063745 BS: romstage times (exec / console): total (unknown) / 255 ms
358 18:49:19.068474
359 18:49:19.068997
360 18:49:19.078218 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
361 18:49:19.084974 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 18:49:19.088045 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
363 18:49:19.094263 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
364 18:49:19.151156 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
365 18:49:19.157269 Processing 4805 relocs. Offset value of 0x75da8000
366 18:49:19.160758 BS: postcar times (exec / console): total (unknown) / 42 ms
367 18:49:19.164031
368 18:49:19.164689
369 18:49:19.174197 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
370 18:49:19.174684 Normal boot
371 18:49:19.178329 EC returned error result code 3
372 18:49:19.181994 FW_CONFIG value is 0x204
373 18:49:19.185164 GENERIC: 0.0 disabled by fw_config
374 18:49:19.191589 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
375 18:49:19.195097 I2C: 00:10 disabled by fw_config
376 18:49:19.198225 I2C: 00:10 disabled by fw_config
377 18:49:19.202068 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
378 18:49:19.208196 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
379 18:49:19.212158 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
380 18:49:19.218610 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
381 18:49:19.221748 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
382 18:49:19.225003 I2C: 00:10 disabled by fw_config
383 18:49:19.232122 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
384 18:49:19.238192 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
385 18:49:19.241682 I2C: 00:1a disabled by fw_config
386 18:49:19.245080 I2C: 00:1a disabled by fw_config
387 18:49:19.251859 fw_config match found: AUDIO_AMP=UNPROVISIONED
388 18:49:19.255050 fw_config match found: AUDIO_AMP=UNPROVISIONED
389 18:49:19.258596 GENERIC: 0.0 disabled by fw_config
390 18:49:19.264685 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 18:49:19.268658 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
392 18:49:19.275117 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
393 18:49:19.277949 microcode: Update skipped, already up-to-date
394 18:49:19.284759 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
395 18:49:19.310700 Detected 2 core, 2 thread CPU.
396 18:49:19.313817 Setting up SMI for CPU
397 18:49:19.317037 IED base = 0x7b400000
398 18:49:19.317482 IED size = 0x00400000
399 18:49:19.320531 Will perform SMM setup.
400 18:49:19.323832 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
401 18:49:19.333654 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
402 18:49:19.336936 Processing 16 relocs. Offset value of 0x00030000
403 18:49:19.340635 Attempting to start 1 APs
404 18:49:19.344025 Waiting for 10ms after sending INIT.
405 18:49:19.360403 Waiting for 1st SIPI to complete...done.
406 18:49:19.363635 Waiting for 2nd SIPI to complete...done.
407 18:49:19.367011 AP: slot 1 apic_id 2.
408 18:49:19.373923 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
409 18:49:19.380257 Processing 13 relocs. Offset value of 0x00038000
410 18:49:19.380687 Unable to locate Global NVS
411 18:49:19.390650 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
412 18:49:19.393856 Installing permanent SMM handler to 0x7b000000
413 18:49:19.400553 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
414 18:49:19.407237 Processing 704 relocs. Offset value of 0x7b010000
415 18:49:19.413599 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
416 18:49:19.420172 Processing 13 relocs. Offset value of 0x7b008000
417 18:49:19.427335 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
418 18:49:19.430258 Unable to locate Global NVS
419 18:49:19.437001 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
420 18:49:19.440349 Clearing SMI status registers
421 18:49:19.440932 SMI_STS: PM1
422 18:49:19.443486 PM1_STS: PWRBTN
423 18:49:19.444107 TCO_STS: INTRD_DET
424 18:49:19.447134 GPE0 STD STS:
425 18:49:19.453403 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
426 18:49:19.457019 In relocation handler: CPU 0
427 18:49:19.461172 New SMBASE=0x7b000000 IEDBASE=0x7b400000
428 18:49:19.465419 Writing SMRR. base = 0x7b000006, mask=0xff800800
429 18:49:19.468992 Relocation complete.
430 18:49:19.475553 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
431 18:49:19.478570 In relocation handler: CPU 1
432 18:49:19.482529 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
433 18:49:19.485209 Writing SMRR. base = 0x7b000006, mask=0xff800800
434 18:49:19.488808 Relocation complete.
435 18:49:19.492224 Initializing CPU #0
436 18:49:19.495266 CPU: vendor Intel device 906c0
437 18:49:19.498664 CPU: family 06, model 9c, stepping 00
438 18:49:19.502164 Clearing out pending MCEs
439 18:49:19.502596 Setting up local APIC...
440 18:49:19.505504 apic_id: 0x00 done.
441 18:49:19.508643 Turbo is available but hidden
442 18:49:19.511646 Turbo is available and visible
443 18:49:19.515532 microcode: Update skipped, already up-to-date
444 18:49:19.518777 CPU #0 initialized
445 18:49:19.521662 Initializing CPU #1
446 18:49:19.524966 CPU: vendor Intel device 906c0
447 18:49:19.528640 CPU: family 06, model 9c, stepping 00
448 18:49:19.531415 Clearing out pending MCEs
449 18:49:19.531840 Setting up local APIC...
450 18:49:19.535126 apic_id: 0x02 done.
451 18:49:19.538439 microcode: Update skipped, already up-to-date
452 18:49:19.541697 CPU #1 initialized
453 18:49:19.544847 bsp_do_flight_plan done after 178 msecs.
454 18:49:19.548450 CPU: frequency set to 2800 MHz
455 18:49:19.551758 Enabling SMIs.
456 18:49:19.558151 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
457 18:49:19.566876 Probing TPM: done!
458 18:49:19.573511 Connected to device vid:did:rid of 1ae0:0028:00
459 18:49:19.583610 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
460 18:49:19.586982 Initialized TPM device CR50 revision 0
461 18:49:19.589965 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
462 18:49:19.597182 Found a VBT of 7680 bytes after decompression
463 18:49:19.603529 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
464 18:49:19.638982 Detected 2 core, 2 thread CPU.
465 18:49:19.642491 Detected 2 core, 2 thread CPU.
466 18:49:20.003681 Display FSP Version Info HOB
467 18:49:20.007177 Reference Code - CPU = 8.7.22.30
468 18:49:20.010326 uCode Version = 24.0.0.1f
469 18:49:20.013457 TXT ACM version = ff.ff.ff.ffff
470 18:49:20.016963 Reference Code - ME = 8.7.22.30
471 18:49:20.020134 MEBx version = 0.0.0.0
472 18:49:20.023977 ME Firmware Version = Consumer SKU
473 18:49:20.027220 Reference Code - PCH = 8.7.22.30
474 18:49:20.030258 PCH-CRID Status = Disabled
475 18:49:20.033729 PCH-CRID Original Value = ff.ff.ff.ffff
476 18:49:20.037462 PCH-CRID New Value = ff.ff.ff.ffff
477 18:49:20.041393 OPROM - RST - RAID = ff.ff.ff.ffff
478 18:49:20.041900 PCH Hsio Version = 4.0.0.0
479 18:49:20.048336 Reference Code - SA - System Agent = 8.7.22.30
480 18:49:20.051807 Reference Code - MRC = 0.0.4.68
481 18:49:20.055522 SA - PCIe Version = 8.7.22.30
482 18:49:20.056012 SA-CRID Status = Disabled
483 18:49:20.059712 SA-CRID Original Value = 0.0.0.0
484 18:49:20.062846 SA-CRID New Value = 0.0.0.0
485 18:49:20.066639 OPROM - VBIOS = ff.ff.ff.ffff
486 18:49:20.069813 IO Manageability Engine FW Version = ff.ff.ff.ffff
487 18:49:20.072563 PHY Build Version = ff.ff.ff.ffff
488 18:49:20.079518 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
489 18:49:20.086202 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
490 18:49:20.086727 ITSS IRQ Polarities Before:
491 18:49:20.089870 IPC0: 0xffffffff
492 18:49:20.090299 IPC1: 0xffffffff
493 18:49:20.093490 IPC2: 0xffffffff
494 18:49:20.094091 IPC3: 0xffffffff
495 18:49:20.096273 ITSS IRQ Polarities After:
496 18:49:20.099441 IPC0: 0xffffffff
497 18:49:20.099872 IPC1: 0xffffffff
498 18:49:20.103469 IPC2: 0xffffffff
499 18:49:20.104023 IPC3: 0xffffffff
500 18:49:20.115909 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
501 18:49:20.123090 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
502 18:49:20.126206 Enumerating buses...
503 18:49:20.129561 Show all devs... Before device enumeration.
504 18:49:20.132678 Root Device: enabled 1
505 18:49:20.133109 CPU_CLUSTER: 0: enabled 1
506 18:49:20.135789 DOMAIN: 0000: enabled 1
507 18:49:20.139661 PCI: 00:00.0: enabled 1
508 18:49:20.143346 PCI: 00:02.0: enabled 1
509 18:49:20.143875 PCI: 00:04.0: enabled 1
510 18:49:20.145999 PCI: 00:05.0: enabled 1
511 18:49:20.149606 PCI: 00:09.0: enabled 0
512 18:49:20.152611 PCI: 00:12.6: enabled 0
513 18:49:20.153053 PCI: 00:14.0: enabled 1
514 18:49:20.155876 PCI: 00:14.1: enabled 0
515 18:49:20.159717 PCI: 00:14.2: enabled 0
516 18:49:20.160187 PCI: 00:14.3: enabled 1
517 18:49:20.162737 PCI: 00:14.5: enabled 1
518 18:49:20.165960 PCI: 00:15.0: enabled 1
519 18:49:20.169311 PCI: 00:15.1: enabled 1
520 18:49:20.169742 PCI: 00:15.2: enabled 1
521 18:49:20.172729 PCI: 00:15.3: enabled 1
522 18:49:20.175929 PCI: 00:16.0: enabled 1
523 18:49:20.178782 PCI: 00:16.1: enabled 0
524 18:49:20.179211 PCI: 00:16.4: enabled 0
525 18:49:20.182103 PCI: 00:16.5: enabled 0
526 18:49:20.185557 PCI: 00:17.0: enabled 0
527 18:49:20.188990 PCI: 00:19.0: enabled 1
528 18:49:20.189546 PCI: 00:19.1: enabled 0
529 18:49:20.192462 PCI: 00:19.2: enabled 1
530 18:49:20.195515 PCI: 00:1a.0: enabled 1
531 18:49:20.198786 PCI: 00:1c.0: enabled 0
532 18:49:20.199432 PCI: 00:1c.1: enabled 0
533 18:49:20.202428 PCI: 00:1c.2: enabled 0
534 18:49:20.205745 PCI: 00:1c.3: enabled 0
535 18:49:20.206427 PCI: 00:1c.4: enabled 0
536 18:49:20.208677 PCI: 00:1c.5: enabled 0
537 18:49:20.212375 PCI: 00:1c.6: enabled 0
538 18:49:20.215265 PCI: 00:1c.7: enabled 1
539 18:49:20.215757 PCI: 00:1e.0: enabled 0
540 18:49:20.219282 PCI: 00:1e.1: enabled 0
541 18:49:20.222418 PCI: 00:1e.2: enabled 1
542 18:49:20.225451 PCI: 00:1e.3: enabled 0
543 18:49:20.225999 PCI: 00:1f.0: enabled 1
544 18:49:20.228544 PCI: 00:1f.1: enabled 1
545 18:49:20.231966 PCI: 00:1f.2: enabled 1
546 18:49:20.235538 PCI: 00:1f.3: enabled 1
547 18:49:20.236271 PCI: 00:1f.4: enabled 0
548 18:49:20.238944 PCI: 00:1f.5: enabled 1
549 18:49:20.242396 PCI: 00:1f.7: enabled 0
550 18:49:20.245280 GENERIC: 0.0: enabled 1
551 18:49:20.245851 GENERIC: 0.0: enabled 1
552 18:49:20.248719 USB0 port 0: enabled 1
553 18:49:20.252094 GENERIC: 0.0: enabled 1
554 18:49:20.252706 I2C: 00:2c: enabled 1
555 18:49:20.255196 I2C: 00:15: enabled 1
556 18:49:20.258579 GENERIC: 0.0: enabled 0
557 18:49:20.259005 I2C: 00:15: enabled 1
558 18:49:20.261809 I2C: 00:10: enabled 0
559 18:49:20.265127 I2C: 00:10: enabled 0
560 18:49:20.265552 I2C: 00:2c: enabled 1
561 18:49:20.268786 I2C: 00:40: enabled 1
562 18:49:20.271990 I2C: 00:10: enabled 1
563 18:49:20.272481 I2C: 00:39: enabled 1
564 18:49:20.275459 I2C: 00:36: enabled 1
565 18:49:20.278507 I2C: 00:10: enabled 0
566 18:49:20.281858 I2C: 00:0c: enabled 1
567 18:49:20.282387 I2C: 00:50: enabled 1
568 18:49:20.285442 I2C: 00:1a: enabled 1
569 18:49:20.288586 I2C: 00:1a: enabled 0
570 18:49:20.289010 I2C: 00:1a: enabled 0
571 18:49:20.292026 I2C: 00:28: enabled 1
572 18:49:20.294884 I2C: 00:29: enabled 1
573 18:49:20.295309 PCI: 00:00.0: enabled 1
574 18:49:20.298172 SPI: 00: enabled 1
575 18:49:20.301625 PNP: 0c09.0: enabled 1
576 18:49:20.302185 GENERIC: 0.0: enabled 0
577 18:49:20.304839 USB2 port 0: enabled 1
578 18:49:20.308327 USB2 port 1: enabled 1
579 18:49:20.308859 USB2 port 2: enabled 1
580 18:49:20.311614 USB2 port 3: enabled 1
581 18:49:20.315217 USB2 port 4: enabled 0
582 18:49:20.318234 USB2 port 5: enabled 1
583 18:49:20.318812 USB2 port 6: enabled 0
584 18:49:20.321275 USB2 port 7: enabled 1
585 18:49:20.324854 USB3 port 0: enabled 1
586 18:49:20.325406 USB3 port 1: enabled 1
587 18:49:20.328014 USB3 port 2: enabled 1
588 18:49:20.331193 USB3 port 3: enabled 1
589 18:49:20.331635 APIC: 00: enabled 1
590 18:49:20.335258 APIC: 02: enabled 1
591 18:49:20.338333 Compare with tree...
592 18:49:20.338757 Root Device: enabled 1
593 18:49:20.341543 CPU_CLUSTER: 0: enabled 1
594 18:49:20.344534 APIC: 00: enabled 1
595 18:49:20.347714 APIC: 02: enabled 1
596 18:49:20.348181 DOMAIN: 0000: enabled 1
597 18:49:20.351107 PCI: 00:00.0: enabled 1
598 18:49:20.354873 PCI: 00:02.0: enabled 1
599 18:49:20.358153 PCI: 00:04.0: enabled 1
600 18:49:20.361345 GENERIC: 0.0: enabled 1
601 18:49:20.361771 PCI: 00:05.0: enabled 1
602 18:49:20.364376 GENERIC: 0.0: enabled 1
603 18:49:20.367880 PCI: 00:09.0: enabled 0
604 18:49:20.371274 PCI: 00:12.6: enabled 0
605 18:49:20.374578 PCI: 00:14.0: enabled 1
606 18:49:20.375005 USB0 port 0: enabled 1
607 18:49:20.377994 USB2 port 0: enabled 1
608 18:49:20.381311 USB2 port 1: enabled 1
609 18:49:20.384512 USB2 port 2: enabled 1
610 18:49:20.387675 USB2 port 3: enabled 1
611 18:49:20.388144 USB2 port 4: enabled 0
612 18:49:20.390887 USB2 port 5: enabled 1
613 18:49:20.394107 USB2 port 6: enabled 0
614 18:49:20.397645 USB2 port 7: enabled 1
615 18:49:20.400879 USB3 port 0: enabled 1
616 18:49:20.404162 USB3 port 1: enabled 1
617 18:49:20.404568 USB3 port 2: enabled 1
618 18:49:20.407279 USB3 port 3: enabled 1
619 18:49:20.411232 PCI: 00:14.1: enabled 0
620 18:49:20.413936 PCI: 00:14.2: enabled 0
621 18:49:20.417276 PCI: 00:14.3: enabled 1
622 18:49:20.417702 GENERIC: 0.0: enabled 1
623 18:49:20.420508 PCI: 00:14.5: enabled 1
624 18:49:20.424338 PCI: 00:15.0: enabled 1
625 18:49:20.427382 I2C: 00:2c: enabled 1
626 18:49:20.431068 I2C: 00:15: enabled 1
627 18:49:20.431585 PCI: 00:15.1: enabled 1
628 18:49:20.433885 PCI: 00:15.2: enabled 1
629 18:49:20.437511 GENERIC: 0.0: enabled 0
630 18:49:20.440847 I2C: 00:15: enabled 1
631 18:49:20.441273 I2C: 00:10: enabled 0
632 18:49:20.443754 I2C: 00:10: enabled 0
633 18:49:20.447756 I2C: 00:2c: enabled 1
634 18:49:20.450976 I2C: 00:40: enabled 1
635 18:49:20.453868 I2C: 00:10: enabled 1
636 18:49:20.454401 I2C: 00:39: enabled 1
637 18:49:20.457128 PCI: 00:15.3: enabled 1
638 18:49:20.460465 I2C: 00:36: enabled 1
639 18:49:20.463942 I2C: 00:10: enabled 0
640 18:49:20.464418 I2C: 00:0c: enabled 1
641 18:49:20.466955 I2C: 00:50: enabled 1
642 18:49:20.470770 PCI: 00:16.0: enabled 1
643 18:49:20.474093 PCI: 00:16.1: enabled 0
644 18:49:20.477215 PCI: 00:16.4: enabled 0
645 18:49:20.477741 PCI: 00:16.5: enabled 0
646 18:49:20.480264 PCI: 00:17.0: enabled 0
647 18:49:20.484172 PCI: 00:19.0: enabled 1
648 18:49:20.487381 I2C: 00:1a: enabled 1
649 18:49:20.487884 I2C: 00:1a: enabled 0
650 18:49:20.490478 I2C: 00:1a: enabled 0
651 18:49:20.493849 I2C: 00:28: enabled 1
652 18:49:20.496890 I2C: 00:29: enabled 1
653 18:49:20.500731 PCI: 00:19.1: enabled 0
654 18:49:20.501250 PCI: 00:19.2: enabled 1
655 18:49:20.504346 PCI: 00:1a.0: enabled 1
656 18:49:20.507297 PCI: 00:1e.0: enabled 0
657 18:49:20.510546 PCI: 00:1e.1: enabled 0
658 18:49:20.511056 PCI: 00:1e.2: enabled 1
659 18:49:20.513950 SPI: 00: enabled 1
660 18:49:20.517229 PCI: 00:1e.3: enabled 0
661 18:49:20.520269 PCI: 00:1f.0: enabled 1
662 18:49:20.520860 PNP: 0c09.0: enabled 1
663 18:49:20.523583 PCI: 00:1f.1: enabled 1
664 18:49:20.527010 PCI: 00:1f.2: enabled 1
665 18:49:20.530399 PCI: 00:1f.3: enabled 1
666 18:49:20.533699 GENERIC: 0.0: enabled 0
667 18:49:20.537123 PCI: 00:1f.4: enabled 0
668 18:49:20.537655 PCI: 00:1f.5: enabled 1
669 18:49:20.540247 PCI: 00:1f.7: enabled 0
670 18:49:20.543872 Root Device scanning...
671 18:49:20.547252 scan_static_bus for Root Device
672 18:49:20.550433 CPU_CLUSTER: 0 enabled
673 18:49:20.550967 DOMAIN: 0000 enabled
674 18:49:20.553284 DOMAIN: 0000 scanning...
675 18:49:20.557140 PCI: pci_scan_bus for bus 00
676 18:49:20.560898 PCI: 00:00.0 [8086/0000] ops
677 18:49:20.564015 PCI: 00:00.0 [8086/4e22] enabled
678 18:49:20.567279 PCI: 00:02.0 [8086/0000] bus ops
679 18:49:20.570434 PCI: 00:02.0 [8086/4e55] enabled
680 18:49:20.573964 PCI: 00:04.0 [8086/0000] bus ops
681 18:49:20.576765 PCI: 00:04.0 [8086/4e03] enabled
682 18:49:20.580510 PCI: 00:05.0 [8086/0000] bus ops
683 18:49:20.584138 PCI: 00:05.0 [8086/4e19] enabled
684 18:49:20.587273 PCI: 00:08.0 [8086/4e11] enabled
685 18:49:20.590517 PCI: 00:14.0 [8086/0000] bus ops
686 18:49:20.593753 PCI: 00:14.0 [8086/4ded] enabled
687 18:49:20.596730 PCI: 00:14.2 [8086/4def] disabled
688 18:49:20.600016 PCI: 00:14.3 [8086/0000] bus ops
689 18:49:20.603464 PCI: 00:14.3 [8086/4df0] enabled
690 18:49:20.606998 PCI: 00:14.5 [8086/0000] ops
691 18:49:20.610358 PCI: 00:14.5 [8086/4df8] enabled
692 18:49:20.613423 PCI: 00:15.0 [8086/0000] bus ops
693 18:49:20.616664 PCI: 00:15.0 [8086/4de8] enabled
694 18:49:20.619925 PCI: 00:15.1 [8086/0000] bus ops
695 18:49:20.623363 PCI: 00:15.1 [8086/4de9] enabled
696 18:49:20.626851 PCI: 00:15.2 [8086/0000] bus ops
697 18:49:20.630507 PCI: 00:15.2 [8086/4dea] enabled
698 18:49:20.633368 PCI: 00:15.3 [8086/0000] bus ops
699 18:49:20.637125 PCI: 00:15.3 [8086/4deb] enabled
700 18:49:20.639914 PCI: 00:16.0 [8086/0000] ops
701 18:49:20.644093 PCI: 00:16.0 [8086/4de0] enabled
702 18:49:20.647232 PCI: 00:19.0 [8086/0000] bus ops
703 18:49:20.650522 PCI: 00:19.0 [8086/4dc5] enabled
704 18:49:20.651048 PCI: 00:19.2 [8086/0000] ops
705 18:49:20.653395 PCI: 00:19.2 [8086/4dc7] enabled
706 18:49:20.657050 PCI: 00:1a.0 [8086/0000] ops
707 18:49:20.660158 PCI: 00:1a.0 [8086/4dc4] enabled
708 18:49:20.663190 PCI: 00:1e.0 [8086/0000] ops
709 18:49:20.666856 PCI: 00:1e.0 [8086/4da8] disabled
710 18:49:20.670419 PCI: 00:1e.2 [8086/0000] bus ops
711 18:49:20.673099 PCI: 00:1e.2 [8086/4daa] enabled
712 18:49:20.676834 PCI: 00:1f.0 [8086/0000] bus ops
713 18:49:20.679828 PCI: 00:1f.0 [8086/4d87] enabled
714 18:49:20.686592 PCI: Static device PCI: 00:1f.1 not found, disabling it.
715 18:49:20.687088 RTC Init
716 18:49:20.689958 Set power on after power failure.
717 18:49:20.693689 Disabling Deep S3
718 18:49:20.694194 Disabling Deep S3
719 18:49:20.696655 Disabling Deep S4
720 18:49:20.700156 Disabling Deep S4
721 18:49:20.700646 Disabling Deep S5
722 18:49:20.703327 Disabling Deep S5
723 18:49:20.706591 PCI: 00:1f.2 [0000/0000] hidden
724 18:49:20.710386 PCI: 00:1f.3 [8086/0000] bus ops
725 18:49:20.713003 PCI: 00:1f.3 [8086/4dc8] enabled
726 18:49:20.716780 PCI: 00:1f.5 [8086/0000] bus ops
727 18:49:20.717224 PCI: 00:1f.5 [8086/4da4] enabled
728 18:49:20.720771 PCI: Leftover static devices:
729 18:49:20.724423 PCI: 00:12.6
730 18:49:20.724842 PCI: 00:09.0
731 18:49:20.725178 PCI: 00:14.1
732 18:49:20.727756 PCI: 00:16.1
733 18:49:20.728226 PCI: 00:16.4
734 18:49:20.731783 PCI: 00:16.5
735 18:49:20.732444 PCI: 00:17.0
736 18:49:20.732798 PCI: 00:19.1
737 18:49:20.734711 PCI: 00:1e.1
738 18:49:20.735270 PCI: 00:1e.3
739 18:49:20.738428 PCI: 00:1f.1
740 18:49:20.739009 PCI: 00:1f.4
741 18:49:20.739358 PCI: 00:1f.7
742 18:49:20.741180 PCI: Check your devicetree.cb.
743 18:49:20.744574 PCI: 00:02.0 scanning...
744 18:49:20.747679 scan_generic_bus for PCI: 00:02.0
745 18:49:20.751432 scan_generic_bus for PCI: 00:02.0 done
746 18:49:20.757969 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
747 18:49:20.761145 PCI: 00:04.0 scanning...
748 18:49:20.764636 scan_generic_bus for PCI: 00:04.0
749 18:49:20.765055 GENERIC: 0.0 enabled
750 18:49:20.771268 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
751 18:49:20.777818 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
752 18:49:20.778337 PCI: 00:05.0 scanning...
753 18:49:20.781431 scan_generic_bus for PCI: 00:05.0
754 18:49:20.784691 GENERIC: 0.0 enabled
755 18:49:20.791183 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
756 18:49:20.794239 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
757 18:49:20.798051 PCI: 00:14.0 scanning...
758 18:49:20.801380 scan_static_bus for PCI: 00:14.0
759 18:49:20.804084 USB0 port 0 enabled
760 18:49:20.804582 USB0 port 0 scanning...
761 18:49:20.808180 scan_static_bus for USB0 port 0
762 18:49:20.810874 USB2 port 0 enabled
763 18:49:20.814129 USB2 port 1 enabled
764 18:49:20.814553 USB2 port 2 enabled
765 18:49:20.817908 USB2 port 3 enabled
766 18:49:20.820928 USB2 port 4 disabled
767 18:49:20.821451 USB2 port 5 enabled
768 18:49:20.824313 USB2 port 6 disabled
769 18:49:20.824739 USB2 port 7 enabled
770 18:49:20.827379 USB3 port 0 enabled
771 18:49:20.831323 USB3 port 1 enabled
772 18:49:20.831838 USB3 port 2 enabled
773 18:49:20.834498 USB3 port 3 enabled
774 18:49:20.837446 USB2 port 0 scanning...
775 18:49:20.840686 scan_static_bus for USB2 port 0
776 18:49:20.844486 scan_static_bus for USB2 port 0 done
777 18:49:20.847565 scan_bus: bus USB2 port 0 finished in 6 msecs
778 18:49:20.851321 USB2 port 1 scanning...
779 18:49:20.854025 scan_static_bus for USB2 port 1
780 18:49:20.858070 scan_static_bus for USB2 port 1 done
781 18:49:20.860977 scan_bus: bus USB2 port 1 finished in 6 msecs
782 18:49:20.864251 USB2 port 2 scanning...
783 18:49:20.867419 scan_static_bus for USB2 port 2
784 18:49:20.870956 scan_static_bus for USB2 port 2 done
785 18:49:20.877513 scan_bus: bus USB2 port 2 finished in 6 msecs
786 18:49:20.878097 USB2 port 3 scanning...
787 18:49:20.880843 scan_static_bus for USB2 port 3
788 18:49:20.887672 scan_static_bus for USB2 port 3 done
789 18:49:20.890598 scan_bus: bus USB2 port 3 finished in 6 msecs
790 18:49:20.893963 USB2 port 5 scanning...
791 18:49:20.897103 scan_static_bus for USB2 port 5
792 18:49:20.900728 scan_static_bus for USB2 port 5 done
793 18:49:20.904148 scan_bus: bus USB2 port 5 finished in 6 msecs
794 18:49:20.907237 USB2 port 7 scanning...
795 18:49:20.910712 scan_static_bus for USB2 port 7
796 18:49:20.914000 scan_static_bus for USB2 port 7 done
797 18:49:20.917170 scan_bus: bus USB2 port 7 finished in 6 msecs
798 18:49:20.920234 USB3 port 0 scanning...
799 18:49:20.923697 scan_static_bus for USB3 port 0
800 18:49:20.927080 scan_static_bus for USB3 port 0 done
801 18:49:20.933562 scan_bus: bus USB3 port 0 finished in 6 msecs
802 18:49:20.934171 USB3 port 1 scanning...
803 18:49:20.936763 scan_static_bus for USB3 port 1
804 18:49:20.943934 scan_static_bus for USB3 port 1 done
805 18:49:20.947395 scan_bus: bus USB3 port 1 finished in 6 msecs
806 18:49:20.950411 USB3 port 2 scanning...
807 18:49:20.953477 scan_static_bus for USB3 port 2
808 18:49:20.956818 scan_static_bus for USB3 port 2 done
809 18:49:20.960353 scan_bus: bus USB3 port 2 finished in 6 msecs
810 18:49:20.963610 USB3 port 3 scanning...
811 18:49:20.967238 scan_static_bus for USB3 port 3
812 18:49:20.970457 scan_static_bus for USB3 port 3 done
813 18:49:20.973928 scan_bus: bus USB3 port 3 finished in 6 msecs
814 18:49:20.979973 scan_static_bus for USB0 port 0 done
815 18:49:20.983409 scan_bus: bus USB0 port 0 finished in 172 msecs
816 18:49:20.987355 scan_static_bus for PCI: 00:14.0 done
817 18:49:20.993242 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
818 18:49:20.993733 PCI: 00:14.3 scanning...
819 18:49:20.996773 scan_static_bus for PCI: 00:14.3
820 18:49:21.000371 GENERIC: 0.0 enabled
821 18:49:21.003401 scan_static_bus for PCI: 00:14.3 done
822 18:49:21.010566 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
823 18:49:21.011107 PCI: 00:15.0 scanning...
824 18:49:21.013323 scan_static_bus for PCI: 00:15.0
825 18:49:21.016506 I2C: 00:2c enabled
826 18:49:21.020131 I2C: 00:15 enabled
827 18:49:21.023973 scan_static_bus for PCI: 00:15.0 done
828 18:49:21.027095 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
829 18:49:21.030171 PCI: 00:15.1 scanning...
830 18:49:21.033213 scan_static_bus for PCI: 00:15.1
831 18:49:21.036718 scan_static_bus for PCI: 00:15.1 done
832 18:49:21.043192 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
833 18:49:21.043617 PCI: 00:15.2 scanning...
834 18:49:21.046384 scan_static_bus for PCI: 00:15.2
835 18:49:21.049726 GENERIC: 0.0 disabled
836 18:49:21.053212 I2C: 00:15 enabled
837 18:49:21.053680 I2C: 00:10 disabled
838 18:49:21.056186 I2C: 00:10 disabled
839 18:49:21.056611 I2C: 00:2c enabled
840 18:49:21.059774 I2C: 00:40 enabled
841 18:49:21.062970 I2C: 00:10 enabled
842 18:49:21.063389 I2C: 00:39 enabled
843 18:49:21.066804 scan_static_bus for PCI: 00:15.2 done
844 18:49:21.073120 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
845 18:49:21.076041 PCI: 00:15.3 scanning...
846 18:49:21.079577 scan_static_bus for PCI: 00:15.3
847 18:49:21.080047 I2C: 00:36 enabled
848 18:49:21.083435 I2C: 00:10 disabled
849 18:49:21.083955 I2C: 00:0c enabled
850 18:49:21.086226 I2C: 00:50 enabled
851 18:49:21.089884 scan_static_bus for PCI: 00:15.3 done
852 18:49:21.096211 scan_bus: bus PCI: 00:15.3 finished in 15 msecs
853 18:49:21.096638 PCI: 00:19.0 scanning...
854 18:49:21.099646 scan_static_bus for PCI: 00:19.0
855 18:49:21.102860 I2C: 00:1a enabled
856 18:49:21.106488 I2C: 00:1a disabled
857 18:49:21.106905 I2C: 00:1a disabled
858 18:49:21.109850 I2C: 00:28 enabled
859 18:49:21.110379 I2C: 00:29 enabled
860 18:49:21.116169 scan_static_bus for PCI: 00:19.0 done
861 18:49:21.119248 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
862 18:49:21.122714 PCI: 00:1e.2 scanning...
863 18:49:21.125871 scan_generic_bus for PCI: 00:1e.2
864 18:49:21.126525 SPI: 00 enabled
865 18:49:21.132988 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
866 18:49:21.139682 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
867 18:49:21.140327 PCI: 00:1f.0 scanning...
868 18:49:21.142315 scan_static_bus for PCI: 00:1f.0
869 18:49:21.145965 PNP: 0c09.0 enabled
870 18:49:21.149253 PNP: 0c09.0 scanning...
871 18:49:21.152800 scan_static_bus for PNP: 0c09.0
872 18:49:21.156007 scan_static_bus for PNP: 0c09.0 done
873 18:49:21.159702 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
874 18:49:21.162333 scan_static_bus for PCI: 00:1f.0 done
875 18:49:21.169168 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
876 18:49:21.172460 PCI: 00:1f.3 scanning...
877 18:49:21.176039 scan_static_bus for PCI: 00:1f.3
878 18:49:21.176591 GENERIC: 0.0 disabled
879 18:49:21.182984 scan_static_bus for PCI: 00:1f.3 done
880 18:49:21.185808 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
881 18:49:21.189261 PCI: 00:1f.5 scanning...
882 18:49:21.192368 scan_generic_bus for PCI: 00:1f.5
883 18:49:21.195773 scan_generic_bus for PCI: 00:1f.5 done
884 18:49:21.199008 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
885 18:49:21.205895 scan_bus: bus DOMAIN: 0000 finished in 647 msecs
886 18:49:21.209469 scan_static_bus for Root Device done
887 18:49:21.212519 scan_bus: bus Root Device finished in 666 msecs
888 18:49:21.215716 done
889 18:49:21.219098 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1086 ms
890 18:49:21.222198 Chrome EC: UHEPI supported
891 18:49:21.229701 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
892 18:49:21.236418 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
893 18:49:21.239373 SPI flash protection: WPSW=0 SRP0=0
894 18:49:21.242728 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
895 18:49:21.249512 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
896 18:49:21.252503 found VGA at PCI: 00:02.0
897 18:49:21.256210 Setting up VGA for PCI: 00:02.0
898 18:49:21.263140 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
899 18:49:21.265996 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
900 18:49:21.268860 Allocating resources...
901 18:49:21.269281 Reading resources...
902 18:49:21.276327 Root Device read_resources bus 0 link: 0
903 18:49:21.279191 CPU_CLUSTER: 0 read_resources bus 0 link: 0
904 18:49:21.285497 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
905 18:49:21.289138 DOMAIN: 0000 read_resources bus 0 link: 0
906 18:49:21.292568 PCI: 00:04.0 read_resources bus 1 link: 0
907 18:49:21.301053 PCI: 00:04.0 read_resources bus 1 link: 0 done
908 18:49:21.304128 PCI: 00:05.0 read_resources bus 2 link: 0
909 18:49:21.307624 PCI: 00:05.0 read_resources bus 2 link: 0 done
910 18:49:21.312108 PCI: 00:14.0 read_resources bus 0 link: 0
911 18:49:21.318432 USB0 port 0 read_resources bus 0 link: 0
912 18:49:21.325169 USB0 port 0 read_resources bus 0 link: 0 done
913 18:49:21.328731 PCI: 00:14.0 read_resources bus 0 link: 0 done
914 18:49:21.331825 PCI: 00:14.3 read_resources bus 0 link: 0
915 18:49:21.376881 PCI: 00:14.3 read_resources bus 0 link: 0 done
916 18:49:21.377448 PCI: 00:15.0 read_resources bus 0 link: 0
917 18:49:21.377800 PCI: 00:15.0 read_resources bus 0 link: 0 done
918 18:49:21.378452 PCI: 00:15.2 read_resources bus 0 link: 0
919 18:49:21.378789 PCI: 00:15.2 read_resources bus 0 link: 0 done
920 18:49:21.379101 PCI: 00:15.3 read_resources bus 0 link: 0
921 18:49:21.379398 PCI: 00:15.3 read_resources bus 0 link: 0 done
922 18:49:21.381277 PCI: 00:19.0 read_resources bus 0 link: 0
923 18:49:21.381704 PCI: 00:19.0 read_resources bus 0 link: 0 done
924 18:49:21.384321 PCI: 00:1e.2 read_resources bus 3 link: 0
925 18:49:21.387887 PCI: 00:1e.2 read_resources bus 3 link: 0 done
926 18:49:21.391092 PCI: 00:1f.0 read_resources bus 0 link: 0
927 18:49:21.398343 PCI: 00:1f.0 read_resources bus 0 link: 0 done
928 18:49:21.401221 PCI: 00:1f.3 read_resources bus 0 link: 0
929 18:49:21.408392 PCI: 00:1f.3 read_resources bus 0 link: 0 done
930 18:49:21.411396 DOMAIN: 0000 read_resources bus 0 link: 0 done
931 18:49:21.417887 Root Device read_resources bus 0 link: 0 done
932 18:49:21.418336 Done reading resources.
933 18:49:21.424491 Show resources in subtree (Root Device)...After reading.
934 18:49:21.427763 Root Device child on link 0 CPU_CLUSTER: 0
935 18:49:21.434628 CPU_CLUSTER: 0 child on link 0 APIC: 00
936 18:49:21.435060 APIC: 00
937 18:49:21.435403 APIC: 02
938 18:49:21.441398 DOMAIN: 0000 child on link 0 PCI: 00:00.0
939 18:49:21.451461 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
940 18:49:21.461044 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
941 18:49:21.461599 PCI: 00:00.0
942 18:49:21.471632 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
943 18:49:21.481067 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
944 18:49:21.491385 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
945 18:49:21.497837 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
946 18:49:21.507498 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
947 18:49:21.517476 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
948 18:49:21.527811 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
949 18:49:21.537297 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
950 18:49:21.544162 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
951 18:49:21.554508 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
952 18:49:21.564254 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
953 18:49:21.573969 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
954 18:49:21.584156 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
955 18:49:21.591494 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
956 18:49:21.600712 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
957 18:49:21.610534 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
958 18:49:21.620758 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
959 18:49:21.631144 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
960 18:49:21.640956 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
961 18:49:21.641388 PCI: 00:02.0
962 18:49:21.650796 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
963 18:49:21.660173 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
964 18:49:21.670837 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
965 18:49:21.673914 PCI: 00:04.0 child on link 0 GENERIC: 0.0
966 18:49:21.683687 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
967 18:49:21.686788 GENERIC: 0.0
968 18:49:21.690212 PCI: 00:05.0 child on link 0 GENERIC: 0.0
969 18:49:21.700635 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
970 18:49:21.703253 GENERIC: 0.0
971 18:49:21.703679 PCI: 00:08.0
972 18:49:21.713338 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
973 18:49:21.720232 PCI: 00:14.0 child on link 0 USB0 port 0
974 18:49:21.729986 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
975 18:49:21.733222 USB0 port 0 child on link 0 USB2 port 0
976 18:49:21.733751 USB2 port 0
977 18:49:21.736735 USB2 port 1
978 18:49:21.737163 USB2 port 2
979 18:49:21.740147 USB2 port 3
980 18:49:21.743091 USB2 port 4
981 18:49:21.743604 USB2 port 5
982 18:49:21.746366 USB2 port 6
983 18:49:21.746797 USB2 port 7
984 18:49:21.750051 USB3 port 0
985 18:49:21.750479 USB3 port 1
986 18:49:21.753205 USB3 port 2
987 18:49:21.753649 USB3 port 3
988 18:49:21.756383 PCI: 00:14.2
989 18:49:21.759703 PCI: 00:14.3 child on link 0 GENERIC: 0.0
990 18:49:21.769385 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
991 18:49:21.773125 GENERIC: 0.0
992 18:49:21.773555 PCI: 00:14.5
993 18:49:21.782978 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
994 18:49:21.786283 PCI: 00:15.0 child on link 0 I2C: 00:2c
995 18:49:21.796118 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
996 18:49:21.799701 I2C: 00:2c
997 18:49:21.800172 I2C: 00:15
998 18:49:21.803022 PCI: 00:15.1
999 18:49:21.812902 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1000 18:49:21.816178 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1001 18:49:21.826186 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1002 18:49:21.829470 GENERIC: 0.0
1003 18:49:21.829999 I2C: 00:15
1004 18:49:21.832842 I2C: 00:10
1005 18:49:21.833272 I2C: 00:10
1006 18:49:21.835585 I2C: 00:2c
1007 18:49:21.836011 I2C: 00:40
1008 18:49:21.838974 I2C: 00:10
1009 18:49:21.839402 I2C: 00:39
1010 18:49:21.842494 PCI: 00:15.3 child on link 0 I2C: 00:36
1011 18:49:21.852755 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1012 18:49:21.855818 I2C: 00:36
1013 18:49:21.856309 I2C: 00:10
1014 18:49:21.859080 I2C: 00:0c
1015 18:49:21.859719 I2C: 00:50
1016 18:49:21.862239 PCI: 00:16.0
1017 18:49:21.872382 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1018 18:49:21.875544 PCI: 00:19.0 child on link 0 I2C: 00:1a
1019 18:49:21.885282 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1020 18:49:21.885711 I2C: 00:1a
1021 18:49:21.888611 I2C: 00:1a
1022 18:49:21.889036 I2C: 00:1a
1023 18:49:21.892006 I2C: 00:28
1024 18:49:21.892474 I2C: 00:29
1025 18:49:21.895551 PCI: 00:19.2
1026 18:49:21.905115 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1027 18:49:21.915162 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1028 18:49:21.918632 PCI: 00:1a.0
1029 18:49:21.928333 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1030 18:49:21.928759 PCI: 00:1e.0
1031 18:49:21.931528 PCI: 00:1e.2 child on link 0 SPI: 00
1032 18:49:21.941692 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1033 18:49:21.944840 SPI: 00
1034 18:49:21.948290 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1035 18:49:21.958328 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1036 18:49:21.958818 PNP: 0c09.0
1037 18:49:21.967738 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1038 18:49:21.968202 PCI: 00:1f.2
1039 18:49:21.979114 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1040 18:49:21.988782 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1041 18:49:21.992484 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1042 18:49:22.002561 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1043 18:49:22.012415 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1044 18:49:22.015914 GENERIC: 0.0
1045 18:49:22.016243 PCI: 00:1f.5
1046 18:49:22.025194 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1047 18:49:22.032067 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1048 18:49:22.038544 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1049 18:49:22.045534 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1050 18:49:22.052301 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1051 18:49:22.061794 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1052 18:49:22.068621 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1053 18:49:22.071671 DOMAIN: 0000: Resource ranges:
1054 18:49:22.075398 * Base: 1000, Size: 800, Tag: 100
1055 18:49:22.078456 * Base: 1900, Size: e700, Tag: 100
1056 18:49:22.085286 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1057 18:49:22.091988 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1058 18:49:22.098886 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1059 18:49:22.105375 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1060 18:49:22.111779 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1061 18:49:22.121749 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1062 18:49:22.128294 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1063 18:49:22.134983 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1064 18:49:22.144857 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1065 18:49:22.151783 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1066 18:49:22.158053 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1067 18:49:22.167937 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1068 18:49:22.174578 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1069 18:49:22.181481 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1070 18:49:22.191465 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1071 18:49:22.198017 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1072 18:49:22.204447 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1073 18:49:22.214740 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1074 18:49:22.221126 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1075 18:49:22.228160 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1076 18:49:22.234761 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1077 18:49:22.244773 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1078 18:49:22.251300 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1079 18:49:22.258353 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1080 18:49:22.261675 DOMAIN: 0000: Resource ranges:
1081 18:49:22.267875 * Base: 7fc00000, Size: 40400000, Tag: 200
1082 18:49:22.271166 * Base: d0000000, Size: 2b000000, Tag: 200
1083 18:49:22.274552 * Base: fb001000, Size: 2fff000, Tag: 200
1084 18:49:22.281399 * Base: fe010000, Size: 22000, Tag: 200
1085 18:49:22.284424 * Base: fe033000, Size: a4d000, Tag: 200
1086 18:49:22.287826 * Base: fea88000, Size: 2f8000, Tag: 200
1087 18:49:22.291539 * Base: fed88000, Size: 8000, Tag: 200
1088 18:49:22.294621 * Base: fed93000, Size: d000, Tag: 200
1089 18:49:22.301106 * Base: feda2000, Size: 125e000, Tag: 200
1090 18:49:22.304604 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1091 18:49:22.311391 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1092 18:49:22.318253 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1093 18:49:22.324667 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1094 18:49:22.331190 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1095 18:49:22.338254 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1096 18:49:22.344756 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1097 18:49:22.350967 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1098 18:49:22.357610 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1099 18:49:22.364334 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1100 18:49:22.371076 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1101 18:49:22.377577 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1102 18:49:22.384032 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1103 18:49:22.391367 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1104 18:49:22.397692 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1105 18:49:22.404112 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1106 18:49:22.410519 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1107 18:49:22.417362 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1108 18:49:22.423709 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1109 18:49:22.430811 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1110 18:49:22.437633 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1111 18:49:22.443758 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1112 18:49:22.453871 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1113 18:49:22.457675 Root Device assign_resources, bus 0 link: 0
1114 18:49:22.460750 DOMAIN: 0000 assign_resources, bus 0 link: 0
1115 18:49:22.470411 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1116 18:49:22.477104 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1117 18:49:22.487111 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1118 18:49:22.493410 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1119 18:49:22.497409 PCI: 00:04.0 assign_resources, bus 1 link: 0
1120 18:49:22.503828 PCI: 00:04.0 assign_resources, bus 1 link: 0
1121 18:49:22.510624 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1122 18:49:22.516829 PCI: 00:05.0 assign_resources, bus 2 link: 0
1123 18:49:22.520242 PCI: 00:05.0 assign_resources, bus 2 link: 0
1124 18:49:22.530866 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1125 18:49:22.537234 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1126 18:49:22.540456 PCI: 00:14.0 assign_resources, bus 0 link: 0
1127 18:49:22.546959 PCI: 00:14.0 assign_resources, bus 0 link: 0
1128 18:49:22.554344 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1129 18:49:22.557600 PCI: 00:14.3 assign_resources, bus 0 link: 0
1130 18:49:22.564163 PCI: 00:14.3 assign_resources, bus 0 link: 0
1131 18:49:22.571201 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1132 18:49:22.581282 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1133 18:49:22.584676 PCI: 00:15.0 assign_resources, bus 0 link: 0
1134 18:49:22.587684 PCI: 00:15.0 assign_resources, bus 0 link: 0
1135 18:49:22.597783 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1136 18:49:22.604018 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1137 18:49:22.610834 PCI: 00:15.2 assign_resources, bus 0 link: 0
1138 18:49:22.614199 PCI: 00:15.2 assign_resources, bus 0 link: 0
1139 18:49:22.620710 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1140 18:49:22.627630 PCI: 00:15.3 assign_resources, bus 0 link: 0
1141 18:49:22.630857 PCI: 00:15.3 assign_resources, bus 0 link: 0
1142 18:49:22.640773 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1143 18:49:22.647567 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1144 18:49:22.650563 PCI: 00:19.0 assign_resources, bus 0 link: 0
1145 18:49:22.657374 PCI: 00:19.0 assign_resources, bus 0 link: 0
1146 18:49:22.664414 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1147 18:49:22.674055 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1148 18:49:22.680646 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1149 18:49:22.687292 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1150 18:49:22.690518 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1151 18:49:22.693766 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1152 18:49:22.700807 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1153 18:49:22.704119 LPC: Trying to open IO window from 800 size 1ff
1154 18:49:22.713911 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1155 18:49:22.720687 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1156 18:49:22.727339 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1157 18:49:22.730637 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1158 18:49:22.737090 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1159 18:49:22.743462 DOMAIN: 0000 assign_resources, bus 0 link: 0
1160 18:49:22.746799 Root Device assign_resources, bus 0 link: 0
1161 18:49:22.750281 Done setting resources.
1162 18:49:22.756961 Show resources in subtree (Root Device)...After assigning values.
1163 18:49:22.760528 Root Device child on link 0 CPU_CLUSTER: 0
1164 18:49:22.763736 CPU_CLUSTER: 0 child on link 0 APIC: 00
1165 18:49:22.766857 APIC: 00
1166 18:49:22.767269 APIC: 02
1167 18:49:22.770385 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1168 18:49:22.780355 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1169 18:49:22.790409 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1170 18:49:22.793568 PCI: 00:00.0
1171 18:49:22.803801 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1172 18:49:22.810026 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1173 18:49:22.820027 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1174 18:49:22.830273 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1175 18:49:22.839991 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1176 18:49:22.849797 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1177 18:49:22.859861 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1178 18:49:22.866620 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1179 18:49:22.876493 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1180 18:49:22.886748 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1181 18:49:22.896642 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1182 18:49:22.906421 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1183 18:49:22.913147 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1184 18:49:22.922857 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1185 18:49:22.933379 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1186 18:49:22.942758 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1187 18:49:22.952945 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1188 18:49:22.962777 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1189 18:49:22.969395 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1190 18:49:22.972921 PCI: 00:02.0
1191 18:49:22.982638 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1192 18:49:22.992696 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1193 18:49:23.002756 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1194 18:49:23.005880 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1195 18:49:23.019211 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1196 18:49:23.019634 GENERIC: 0.0
1197 18:49:23.022539 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1198 18:49:23.035902 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1199 18:49:23.036382 GENERIC: 0.0
1200 18:49:23.038787 PCI: 00:08.0
1201 18:49:23.048996 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1202 18:49:23.052008 PCI: 00:14.0 child on link 0 USB0 port 0
1203 18:49:23.062191 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1204 18:49:23.065737 USB0 port 0 child on link 0 USB2 port 0
1205 18:49:23.069016 USB2 port 0
1206 18:49:23.072378 USB2 port 1
1207 18:49:23.072794 USB2 port 2
1208 18:49:23.075573 USB2 port 3
1209 18:49:23.075986 USB2 port 4
1210 18:49:23.079332 USB2 port 5
1211 18:49:23.079746 USB2 port 6
1212 18:49:23.082320 USB2 port 7
1213 18:49:23.082735 USB3 port 0
1214 18:49:23.085743 USB3 port 1
1215 18:49:23.086161 USB3 port 2
1216 18:49:23.088963 USB3 port 3
1217 18:49:23.089379 PCI: 00:14.2
1218 18:49:23.095888 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1219 18:49:23.105519 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1220 18:49:23.105940 GENERIC: 0.0
1221 18:49:23.108651 PCI: 00:14.5
1222 18:49:23.118513 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1223 18:49:23.121876 PCI: 00:15.0 child on link 0 I2C: 00:2c
1224 18:49:23.132162 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1225 18:49:23.135185 I2C: 00:2c
1226 18:49:23.135617 I2C: 00:15
1227 18:49:23.138547 PCI: 00:15.1
1228 18:49:23.149055 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1229 18:49:23.151830 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1230 18:49:23.162124 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1231 18:49:23.165473 GENERIC: 0.0
1232 18:49:23.165891 I2C: 00:15
1233 18:49:23.168530 I2C: 00:10
1234 18:49:23.168947 I2C: 00:10
1235 18:49:23.171681 I2C: 00:2c
1236 18:49:23.172140 I2C: 00:40
1237 18:49:23.175251 I2C: 00:10
1238 18:49:23.175785 I2C: 00:39
1239 18:49:23.178972 PCI: 00:15.3 child on link 0 I2C: 00:36
1240 18:49:23.191649 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1241 18:49:23.192104 I2C: 00:36
1242 18:49:23.192448 I2C: 00:10
1243 18:49:23.195129 I2C: 00:0c
1244 18:49:23.195548 I2C: 00:50
1245 18:49:23.199038 PCI: 00:16.0
1246 18:49:23.208636 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1247 18:49:23.211984 PCI: 00:19.0 child on link 0 I2C: 00:1a
1248 18:49:23.222042 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1249 18:49:23.224952 I2C: 00:1a
1250 18:49:23.225375 I2C: 00:1a
1251 18:49:23.228495 I2C: 00:1a
1252 18:49:23.228968 I2C: 00:28
1253 18:49:23.231679 I2C: 00:29
1254 18:49:23.232133 PCI: 00:19.2
1255 18:49:23.245147 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1256 18:49:23.255058 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1257 18:49:23.255488 PCI: 00:1a.0
1258 18:49:23.264792 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1259 18:49:23.268176 PCI: 00:1e.0
1260 18:49:23.271500 PCI: 00:1e.2 child on link 0 SPI: 00
1261 18:49:23.281417 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1262 18:49:23.284762 SPI: 00
1263 18:49:23.287912 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1264 18:49:23.294742 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1265 18:49:23.298086 PNP: 0c09.0
1266 18:49:23.307966 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1267 18:49:23.308502 PCI: 00:1f.2
1268 18:49:23.318412 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1269 18:49:23.327918 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1270 18:49:23.331185 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1271 18:49:23.341078 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1272 18:49:23.351213 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1273 18:49:23.354396 GENERIC: 0.0
1274 18:49:23.354939 PCI: 00:1f.5
1275 18:49:23.364464 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1276 18:49:23.367883 Done allocating resources.
1277 18:49:23.374461 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2098 ms
1278 18:49:23.377622 Enabling resources...
1279 18:49:23.380821 PCI: 00:00.0 subsystem <- 8086/4e22
1280 18:49:23.384369 PCI: 00:00.0 cmd <- 06
1281 18:49:23.387307 PCI: 00:02.0 subsystem <- 8086/4e55
1282 18:49:23.391134 PCI: 00:02.0 cmd <- 03
1283 18:49:23.393987 PCI: 00:04.0 subsystem <- 8086/4e03
1284 18:49:23.397251 PCI: 00:04.0 cmd <- 02
1285 18:49:23.401034 PCI: 00:05.0 bridge ctrl <- 0003
1286 18:49:23.403973 PCI: 00:05.0 subsystem <- 8086/4e19
1287 18:49:23.404519 PCI: 00:05.0 cmd <- 02
1288 18:49:23.407580 PCI: 00:08.0 cmd <- 06
1289 18:49:23.410839 PCI: 00:14.0 subsystem <- 8086/4ded
1290 18:49:23.414042 PCI: 00:14.0 cmd <- 02
1291 18:49:23.417689 PCI: 00:14.3 subsystem <- 8086/4df0
1292 18:49:23.420464 PCI: 00:14.3 cmd <- 02
1293 18:49:23.423912 PCI: 00:14.5 subsystem <- 8086/4df8
1294 18:49:23.427510 PCI: 00:14.5 cmd <- 06
1295 18:49:23.430695 PCI: 00:15.0 subsystem <- 8086/4de8
1296 18:49:23.431238 PCI: 00:15.0 cmd <- 02
1297 18:49:23.437614 PCI: 00:15.1 subsystem <- 8086/4de9
1298 18:49:23.438219 PCI: 00:15.1 cmd <- 02
1299 18:49:23.440710 PCI: 00:15.2 subsystem <- 8086/4dea
1300 18:49:23.444119 PCI: 00:15.2 cmd <- 02
1301 18:49:23.447340 PCI: 00:15.3 subsystem <- 8086/4deb
1302 18:49:23.450608 PCI: 00:15.3 cmd <- 02
1303 18:49:23.454246 PCI: 00:16.0 subsystem <- 8086/4de0
1304 18:49:23.457101 PCI: 00:16.0 cmd <- 02
1305 18:49:23.460620 PCI: 00:19.0 subsystem <- 8086/4dc5
1306 18:49:23.464238 PCI: 00:19.0 cmd <- 02
1307 18:49:23.467461 PCI: 00:19.2 subsystem <- 8086/4dc7
1308 18:49:23.470629 PCI: 00:19.2 cmd <- 06
1309 18:49:23.474020 PCI: 00:1a.0 subsystem <- 8086/4dc4
1310 18:49:23.474513 PCI: 00:1a.0 cmd <- 06
1311 18:49:23.477318 PCI: 00:1e.2 subsystem <- 8086/4daa
1312 18:49:23.480887 PCI: 00:1e.2 cmd <- 06
1313 18:49:23.484120 PCI: 00:1f.0 subsystem <- 8086/4d87
1314 18:49:23.487839 PCI: 00:1f.0 cmd <- 407
1315 18:49:23.490786 PCI: 00:1f.3 subsystem <- 8086/4dc8
1316 18:49:23.494025 PCI: 00:1f.3 cmd <- 02
1317 18:49:23.497496 PCI: 00:1f.5 subsystem <- 8086/4da4
1318 18:49:23.500646 PCI: 00:1f.5 cmd <- 406
1319 18:49:23.504641 done.
1320 18:49:23.507195 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1321 18:49:23.510821 Initializing devices...
1322 18:49:23.514415 Root Device init
1323 18:49:23.514833 mainboard: EC init
1324 18:49:23.520763 Chrome EC: Set SMI mask to 0x0000000000000000
1325 18:49:23.527347 Chrome EC: clear events_b mask to 0x0000000000000000
1326 18:49:23.531105 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1327 18:49:23.537957 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1328 18:49:23.544096 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1329 18:49:23.547387 Chrome EC: Set WAKE mask to 0x0000000000000000
1330 18:49:23.555458 Root Device init finished in 37 msecs
1331 18:49:23.558513 PCI: 00:00.0 init
1332 18:49:23.558938 CPU TDP = 6 Watts
1333 18:49:23.561683 CPU PL1 = 7 Watts
1334 18:49:23.565238 CPU PL2 = 12 Watts
1335 18:49:23.568580 PCI: 00:00.0 init finished in 6 msecs
1336 18:49:23.569027 PCI: 00:02.0 init
1337 18:49:23.572198 GMA: Found VBT in CBFS
1338 18:49:23.574929 GMA: Found valid VBT in CBFS
1339 18:49:23.581889 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1340 18:49:23.588427 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1341 18:49:23.592209 PCI: 00:02.0 init finished in 18 msecs
1342 18:49:23.595418 PCI: 00:08.0 init
1343 18:49:23.598698 PCI: 00:08.0 init finished in 0 msecs
1344 18:49:23.602175 PCI: 00:14.0 init
1345 18:49:23.605483 XHCI: Updated LFPS sampling OFF time to 9 ms
1346 18:49:23.608761 PCI: 00:14.0 init finished in 4 msecs
1347 18:49:23.611836 PCI: 00:15.0 init
1348 18:49:23.615022 I2C bus 0 version 0x3230302a
1349 18:49:23.618664 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1350 18:49:23.621630 PCI: 00:15.0 init finished in 6 msecs
1351 18:49:23.624876 PCI: 00:15.1 init
1352 18:49:23.628401 I2C bus 1 version 0x3230302a
1353 18:49:23.631888 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1354 18:49:23.634880 PCI: 00:15.1 init finished in 6 msecs
1355 18:49:23.635372 PCI: 00:15.2 init
1356 18:49:23.638671 I2C bus 2 version 0x3230302a
1357 18:49:23.642112 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1358 18:49:23.648464 PCI: 00:15.2 init finished in 6 msecs
1359 18:49:23.648996 PCI: 00:15.3 init
1360 18:49:23.651638 I2C bus 3 version 0x3230302a
1361 18:49:23.655238 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1362 18:49:23.658240 PCI: 00:15.3 init finished in 6 msecs
1363 18:49:23.661481 PCI: 00:16.0 init
1364 18:49:23.665022 PCI: 00:16.0 init finished in 0 msecs
1365 18:49:23.668456 PCI: 00:19.0 init
1366 18:49:23.671517 I2C bus 4 version 0x3230302a
1367 18:49:23.674864 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1368 18:49:23.678499 PCI: 00:19.0 init finished in 6 msecs
1369 18:49:23.681730 PCI: 00:1a.0 init
1370 18:49:23.684976 PCI: 00:1a.0 init finished in 0 msecs
1371 18:49:23.688107 PCI: 00:1f.0 init
1372 18:49:23.691936 IOAPIC: Initializing IOAPIC at 0xfec00000
1373 18:49:23.695441 IOAPIC: Bootstrap Processor Local APIC = 0x00
1374 18:49:23.699154 IOAPIC: ID = 0x02
1375 18:49:23.701587 IOAPIC: Dumping registers
1376 18:49:23.702204 reg 0x0000: 0x02000000
1377 18:49:23.704680 reg 0x0001: 0x00770020
1378 18:49:23.708160 reg 0x0002: 0x00000000
1379 18:49:23.712318 PCI: 00:1f.0 init finished in 21 msecs
1380 18:49:23.715286 PCI: 00:1f.2 init
1381 18:49:23.715859 Disabling ACPI via APMC.
1382 18:49:23.720037 APMC done.
1383 18:49:23.723382 PCI: 00:1f.2 init finished in 5 msecs
1384 18:49:23.734572 PNP: 0c09.0 init
1385 18:49:23.737832 Google Chrome EC uptime: 6.560 seconds
1386 18:49:23.744791 Google Chrome AP resets since EC boot: 0
1387 18:49:23.747889 Google Chrome most recent AP reset causes:
1388 18:49:23.754775 Google Chrome EC reset flags at last EC boot: reset-pin
1389 18:49:23.758330 PNP: 0c09.0 init finished in 18 msecs
1390 18:49:23.758780 Devices initialized
1391 18:49:23.761134 Show all devs... After init.
1392 18:49:23.764548 Root Device: enabled 1
1393 18:49:23.767546 CPU_CLUSTER: 0: enabled 1
1394 18:49:23.771261 DOMAIN: 0000: enabled 1
1395 18:49:23.771754 PCI: 00:00.0: enabled 1
1396 18:49:23.774442 PCI: 00:02.0: enabled 1
1397 18:49:23.777855 PCI: 00:04.0: enabled 1
1398 18:49:23.778316 PCI: 00:05.0: enabled 1
1399 18:49:23.780920 PCI: 00:09.0: enabled 0
1400 18:49:23.784695 PCI: 00:12.6: enabled 0
1401 18:49:23.787938 PCI: 00:14.0: enabled 1
1402 18:49:23.788402 PCI: 00:14.1: enabled 0
1403 18:49:23.791150 PCI: 00:14.2: enabled 0
1404 18:49:23.794344 PCI: 00:14.3: enabled 1
1405 18:49:23.798259 PCI: 00:14.5: enabled 1
1406 18:49:23.798676 PCI: 00:15.0: enabled 1
1407 18:49:23.800878 PCI: 00:15.1: enabled 1
1408 18:49:23.804185 PCI: 00:15.2: enabled 1
1409 18:49:23.807811 PCI: 00:15.3: enabled 1
1410 18:49:23.808403 PCI: 00:16.0: enabled 1
1411 18:49:23.811005 PCI: 00:16.1: enabled 0
1412 18:49:23.814517 PCI: 00:16.4: enabled 0
1413 18:49:23.814934 PCI: 00:16.5: enabled 0
1414 18:49:23.817604 PCI: 00:17.0: enabled 0
1415 18:49:23.820679 PCI: 00:19.0: enabled 1
1416 18:49:23.824496 PCI: 00:19.1: enabled 0
1417 18:49:23.824915 PCI: 00:19.2: enabled 1
1418 18:49:23.827961 PCI: 00:1a.0: enabled 1
1419 18:49:23.830790 PCI: 00:1c.0: enabled 0
1420 18:49:23.834002 PCI: 00:1c.1: enabled 0
1421 18:49:23.834523 PCI: 00:1c.2: enabled 0
1422 18:49:23.837633 PCI: 00:1c.3: enabled 0
1423 18:49:23.840754 PCI: 00:1c.4: enabled 0
1424 18:49:23.844394 PCI: 00:1c.5: enabled 0
1425 18:49:23.844812 PCI: 00:1c.6: enabled 0
1426 18:49:23.847602 PCI: 00:1c.7: enabled 1
1427 18:49:23.850840 PCI: 00:1e.0: enabled 0
1428 18:49:23.851255 PCI: 00:1e.1: enabled 0
1429 18:49:23.854524 PCI: 00:1e.2: enabled 1
1430 18:49:23.857529 PCI: 00:1e.3: enabled 0
1431 18:49:23.860859 PCI: 00:1f.0: enabled 1
1432 18:49:23.861279 PCI: 00:1f.1: enabled 0
1433 18:49:23.863981 PCI: 00:1f.2: enabled 1
1434 18:49:23.867341 PCI: 00:1f.3: enabled 1
1435 18:49:23.870384 PCI: 00:1f.4: enabled 0
1436 18:49:23.870802 PCI: 00:1f.5: enabled 1
1437 18:49:23.874018 PCI: 00:1f.7: enabled 0
1438 18:49:23.877591 GENERIC: 0.0: enabled 1
1439 18:49:23.881135 GENERIC: 0.0: enabled 1
1440 18:49:23.881584 USB0 port 0: enabled 1
1441 18:49:23.883949 GENERIC: 0.0: enabled 1
1442 18:49:23.887021 I2C: 00:2c: enabled 1
1443 18:49:23.887597 I2C: 00:15: enabled 1
1444 18:49:23.890602 GENERIC: 0.0: enabled 0
1445 18:49:23.893829 I2C: 00:15: enabled 1
1446 18:49:23.894251 I2C: 00:10: enabled 0
1447 18:49:23.896923 I2C: 00:10: enabled 0
1448 18:49:23.900477 I2C: 00:2c: enabled 1
1449 18:49:23.901008 I2C: 00:40: enabled 1
1450 18:49:23.903802 I2C: 00:10: enabled 1
1451 18:49:23.906929 I2C: 00:39: enabled 1
1452 18:49:23.907344 I2C: 00:36: enabled 1
1453 18:49:23.910563 I2C: 00:10: enabled 0
1454 18:49:23.913679 I2C: 00:0c: enabled 1
1455 18:49:23.914097 I2C: 00:50: enabled 1
1456 18:49:23.917135 I2C: 00:1a: enabled 1
1457 18:49:23.920328 I2C: 00:1a: enabled 0
1458 18:49:23.923729 I2C: 00:1a: enabled 0
1459 18:49:23.924187 I2C: 00:28: enabled 1
1460 18:49:23.927080 I2C: 00:29: enabled 1
1461 18:49:23.930245 PCI: 00:00.0: enabled 1
1462 18:49:23.930723 SPI: 00: enabled 1
1463 18:49:23.933547 PNP: 0c09.0: enabled 1
1464 18:49:23.937148 GENERIC: 0.0: enabled 0
1465 18:49:23.937675 USB2 port 0: enabled 1
1466 18:49:23.939884 USB2 port 1: enabled 1
1467 18:49:23.943507 USB2 port 2: enabled 1
1468 18:49:23.943960 USB2 port 3: enabled 1
1469 18:49:23.946610 USB2 port 4: enabled 0
1470 18:49:23.950243 USB2 port 5: enabled 1
1471 18:49:23.953336 USB2 port 6: enabled 0
1472 18:49:23.953755 USB2 port 7: enabled 1
1473 18:49:23.956599 USB3 port 0: enabled 1
1474 18:49:23.960205 USB3 port 1: enabled 1
1475 18:49:23.960624 USB3 port 2: enabled 1
1476 18:49:23.963419 USB3 port 3: enabled 1
1477 18:49:23.966809 APIC: 00: enabled 1
1478 18:49:23.967241 APIC: 02: enabled 1
1479 18:49:23.969966 PCI: 00:08.0: enabled 1
1480 18:49:23.976369 BS: BS_DEV_INIT run times (exec / console): 24 / 437 ms
1481 18:49:23.980224 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1482 18:49:23.982968 ELOG: NV offset 0xbfa000 size 0x1000
1483 18:49:23.991844 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1484 18:49:23.997422 ELOG: Event(17) added with size 13 at 2024-03-01 18:49:22 UTC
1485 18:49:24.004144 ELOG: Event(92) added with size 9 at 2024-03-01 18:49:22 UTC
1486 18:49:24.010899 ELOG: Event(93) added with size 9 at 2024-03-01 18:49:22 UTC
1487 18:49:24.017385 ELOG: Event(9E) added with size 10 at 2024-03-01 18:49:22 UTC
1488 18:49:24.024212 ELOG: Event(9F) added with size 14 at 2024-03-01 18:49:22 UTC
1489 18:49:24.027508 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1490 18:49:24.034771 ELOG: Event(A1) added with size 10 at 2024-03-01 18:49:22 UTC
1491 18:49:24.044297 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1492 18:49:24.050926 ELOG: Event(A0) added with size 9 at 2024-03-01 18:49:22 UTC
1493 18:49:24.054246 elog_add_boot_reason: Logged dev mode boot
1494 18:49:24.060662 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1495 18:49:24.061090 Finalize devices...
1496 18:49:24.063925 Devices finalized
1497 18:49:24.067228 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1498 18:49:24.074147 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1499 18:49:24.080692 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1500 18:49:24.084365 ME: HFSTS1 : 0x80030045
1501 18:49:24.087668 ME: HFSTS2 : 0x30280136
1502 18:49:24.090782 ME: HFSTS3 : 0x00000050
1503 18:49:24.097244 ME: HFSTS4 : 0x00004000
1504 18:49:24.100553 ME: HFSTS5 : 0x00000000
1505 18:49:24.104103 ME: HFSTS6 : 0x40400006
1506 18:49:24.107193 ME: Manufacturing Mode : NO
1507 18:49:24.110563 ME: FW Partition Table : OK
1508 18:49:24.113733 ME: Bringup Loader Failure : NO
1509 18:49:24.117408 ME: Firmware Init Complete : NO
1510 18:49:24.120393 ME: Boot Options Present : NO
1511 18:49:24.124036 ME: Update In Progress : NO
1512 18:49:24.127224 ME: D0i3 Support : YES
1513 18:49:24.130779 ME: Low Power State Enabled : NO
1514 18:49:24.133865 ME: CPU Replaced : YES
1515 18:49:24.137146 ME: CPU Replacement Valid : YES
1516 18:49:24.140645 ME: Current Working State : 5
1517 18:49:24.144206 ME: Current Operation State : 1
1518 18:49:24.147274 ME: Current Operation Mode : 3
1519 18:49:24.150411 ME: Error Code : 0
1520 18:49:24.153632 ME: CPU Debug Disabled : YES
1521 18:49:24.157276 ME: TXT Support : NO
1522 18:49:24.163570 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1523 18:49:24.166919 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1524 18:49:24.174164 ACPI: Writing ACPI tables at 76b27000.
1525 18:49:24.174643 ACPI: * FACS
1526 18:49:24.177516 ACPI: * DSDT
1527 18:49:24.180776 Ramoops buffer: 0x100000@0x76a26000.
1528 18:49:24.183885 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1529 18:49:24.190674 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1530 18:49:24.193920 Google Chrome EC: version:
1531 18:49:24.197244 ro: magolor_1.1.9999-103b6f9
1532 18:49:24.200411 rw: magolor_1.1.9999-103b6f9
1533 18:49:24.200985 running image: 1
1534 18:49:24.207155 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1535 18:49:24.211393 ACPI: * FADT
1536 18:49:24.212166 SCI is IRQ9
1537 18:49:24.217735 ACPI: added table 1/32, length now 40
1538 18:49:24.218212 ACPI: * SSDT
1539 18:49:24.221561 Found 1 CPU(s) with 2 core(s) each.
1540 18:49:24.224909 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1541 18:49:24.231256 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1542 18:49:24.235031 Could not locate 'wifi_sar' in VPD.
1543 18:49:24.237992 Checking CBFS for default SAR values
1544 18:49:24.244563 wifi_sar_defaults.hex has bad len in CBFS
1545 18:49:24.247917 failed from getting SAR limits!
1546 18:49:24.251196 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1547 18:49:24.257794 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1548 18:49:24.261046 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1549 18:49:24.267764 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1550 18:49:24.271175 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1551 18:49:24.277798 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1552 18:49:24.281090 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1553 18:49:24.287593 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1554 18:49:24.294761 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1555 18:49:24.300894 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1556 18:49:24.304156 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1557 18:49:24.311110 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1558 18:49:24.314530 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1559 18:49:24.320729 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1560 18:49:24.324110 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1561 18:49:24.332343 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1562 18:49:24.336162 PS2K: Passing 101 keymaps to kernel
1563 18:49:24.342660 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1564 18:49:24.349166 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1565 18:49:24.352764 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1566 18:49:24.359505 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1567 18:49:24.362227 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1568 18:49:24.369027 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1569 18:49:24.375726 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1570 18:49:24.382167 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1571 18:49:24.385778 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1572 18:49:24.392523 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1573 18:49:24.395373 ACPI: added table 2/32, length now 44
1574 18:49:24.399215 ACPI: * MCFG
1575 18:49:24.402267 ACPI: added table 3/32, length now 48
1576 18:49:24.402679 ACPI: * TPM2
1577 18:49:24.406207 TPM2 log created at 0x76a16000
1578 18:49:24.409102 ACPI: added table 4/32, length now 52
1579 18:49:24.412293 ACPI: * MADT
1580 18:49:24.412842 SCI is IRQ9
1581 18:49:24.415694 ACPI: added table 5/32, length now 56
1582 18:49:24.418997 current = 76b2d580
1583 18:49:24.419439 ACPI: * DMAR
1584 18:49:24.425878 ACPI: added table 6/32, length now 60
1585 18:49:24.428993 ACPI: added table 7/32, length now 64
1586 18:49:24.429433 ACPI: * HPET
1587 18:49:24.432625 ACPI: added table 8/32, length now 68
1588 18:49:24.435567 ACPI: done.
1589 18:49:24.438713 ACPI tables: 26304 bytes.
1590 18:49:24.439191 smbios_write_tables: 76a15000
1591 18:49:24.443011 EC returned error result code 3
1592 18:49:24.446151 Couldn't obtain OEM name from CBI
1593 18:49:24.450291 Create SMBIOS type 16
1594 18:49:24.453256 Create SMBIOS type 17
1595 18:49:24.456781 GENERIC: 0.0 (WIFI Device)
1596 18:49:24.457235 SMBIOS tables: 913 bytes.
1597 18:49:24.463195 Writing table forward entry at 0x00000500
1598 18:49:24.470149 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1599 18:49:24.473281 Writing coreboot table at 0x76b4b000
1600 18:49:24.479789 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1601 18:49:24.483116 1. 0000000000001000-000000000009ffff: RAM
1602 18:49:24.486659 2. 00000000000a0000-00000000000fffff: RESERVED
1603 18:49:24.492953 3. 0000000000100000-0000000076a14fff: RAM
1604 18:49:24.496251 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1605 18:49:24.503068 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1606 18:49:24.510101 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1607 18:49:24.513321 7. 0000000077000000-000000007fbfffff: RESERVED
1608 18:49:24.516508 8. 00000000c0000000-00000000cfffffff: RESERVED
1609 18:49:24.523011 9. 00000000fb000000-00000000fb000fff: RESERVED
1610 18:49:24.526315 10. 00000000fe000000-00000000fe00ffff: RESERVED
1611 18:49:24.533111 11. 00000000fea80000-00000000fea87fff: RESERVED
1612 18:49:24.536095 12. 00000000fed80000-00000000fed87fff: RESERVED
1613 18:49:24.542925 13. 00000000fed90000-00000000fed92fff: RESERVED
1614 18:49:24.546240 14. 00000000feda0000-00000000feda1fff: RESERVED
1615 18:49:24.549827 15. 0000000100000000-00000001803fffff: RAM
1616 18:49:24.552906 Passing 4 GPIOs to payload:
1617 18:49:24.559626 NAME | PORT | POLARITY | VALUE
1618 18:49:24.563011 lid | undefined | high | high
1619 18:49:24.570118 power | undefined | high | low
1620 18:49:24.576387 oprom | undefined | high | low
1621 18:49:24.579151 EC in RW | 0x000000b9 | high | low
1622 18:49:24.586112 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum bfa1
1623 18:49:24.589440 coreboot table: 1504 bytes.
1624 18:49:24.592471 IMD ROOT 0. 0x76fff000 0x00001000
1625 18:49:24.595880 IMD SMALL 1. 0x76ffe000 0x00001000
1626 18:49:24.599179 FSP MEMORY 2. 0x76c4e000 0x003b0000
1627 18:49:24.602666 CONSOLE 3. 0x76c2e000 0x00020000
1628 18:49:24.606384 FMAP 4. 0x76c2d000 0x00000578
1629 18:49:24.612759 TIME STAMP 5. 0x76c2c000 0x00000910
1630 18:49:24.616122 VBOOT WORK 6. 0x76c18000 0x00014000
1631 18:49:24.619489 ROMSTG STCK 7. 0x76c17000 0x00001000
1632 18:49:24.623028 AFTER CAR 8. 0x76c0d000 0x0000a000
1633 18:49:24.626045 RAMSTAGE 9. 0x76ba7000 0x00066000
1634 18:49:24.629438 REFCODE 10. 0x76b67000 0x00040000
1635 18:49:24.632453 SMM BACKUP 11. 0x76b57000 0x00010000
1636 18:49:24.635934 4f444749 12. 0x76b55000 0x00002000
1637 18:49:24.639271 EXT VBT13. 0x76b53000 0x00001c43
1638 18:49:24.645661 COREBOOT 14. 0x76b4b000 0x00008000
1639 18:49:24.649813 ACPI 15. 0x76b27000 0x00024000
1640 18:49:24.652779 ACPI GNVS 16. 0x76b26000 0x00001000
1641 18:49:24.655951 RAMOOPS 17. 0x76a26000 0x00100000
1642 18:49:24.659249 TPM2 TCGLOG18. 0x76a16000 0x00010000
1643 18:49:24.662693 SMBIOS 19. 0x76a15000 0x00000800
1644 18:49:24.665627 IMD small region:
1645 18:49:24.669423 IMD ROOT 0. 0x76ffec00 0x00000400
1646 18:49:24.672605 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1647 18:49:24.675943 VPD 2. 0x76ffeb60 0x0000006c
1648 18:49:24.679597 POWER STATE 3. 0x76ffeb20 0x00000040
1649 18:49:24.685969 ROMSTAGE 4. 0x76ffeb00 0x00000004
1650 18:49:24.689298 MEM INFO 5. 0x76ffe920 0x000001e0
1651 18:49:24.692311 BS: BS_WRITE_TABLES run times (exec / console): 8 / 517 ms
1652 18:49:24.695721 MTRR: Physical address space:
1653 18:49:24.702646 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1654 18:49:24.709221 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1655 18:49:24.715709 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1656 18:49:24.722523 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1657 18:49:24.728674 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1658 18:49:24.735655 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1659 18:49:24.738814 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1660 18:49:24.745711 MTRR: Fixed MSR 0x250 0x0606060606060606
1661 18:49:24.749039 MTRR: Fixed MSR 0x258 0x0606060606060606
1662 18:49:24.752153 MTRR: Fixed MSR 0x259 0x0000000000000000
1663 18:49:24.755483 MTRR: Fixed MSR 0x268 0x0606060606060606
1664 18:49:24.762350 MTRR: Fixed MSR 0x269 0x0606060606060606
1665 18:49:24.765640 MTRR: Fixed MSR 0x26a 0x0606060606060606
1666 18:49:24.768939 MTRR: Fixed MSR 0x26b 0x0606060606060606
1667 18:49:24.772095 MTRR: Fixed MSR 0x26c 0x0606060606060606
1668 18:49:24.779380 MTRR: Fixed MSR 0x26d 0x0606060606060606
1669 18:49:24.782386 MTRR: Fixed MSR 0x26e 0x0606060606060606
1670 18:49:24.785728 MTRR: Fixed MSR 0x26f 0x0606060606060606
1671 18:49:24.789065 call enable_fixed_mtrr()
1672 18:49:24.792154 CPU physical address size: 39 bits
1673 18:49:24.795497 MTRR: default type WB/UC MTRR counts: 6/5.
1674 18:49:24.798733 MTRR: UC selected as default type.
1675 18:49:24.805544 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1676 18:49:24.811965 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1677 18:49:24.818629 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1678 18:49:24.825355 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1679 18:49:24.831740 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1680 18:49:24.832169
1681 18:49:24.832565 MTRR check
1682 18:49:24.835140 Fixed MTRRs : Enabled
1683 18:49:24.838737 Variable MTRRs: Enabled
1684 18:49:24.839090
1685 18:49:24.842058 MTRR: Fixed MSR 0x250 0x0606060606060606
1686 18:49:24.845286 MTRR: Fixed MSR 0x258 0x0606060606060606
1687 18:49:24.848549 MTRR: Fixed MSR 0x259 0x0000000000000000
1688 18:49:24.855468 MTRR: Fixed MSR 0x268 0x0606060606060606
1689 18:49:24.858399 MTRR: Fixed MSR 0x269 0x0606060606060606
1690 18:49:24.862052 MTRR: Fixed MSR 0x26a 0x0606060606060606
1691 18:49:24.865066 MTRR: Fixed MSR 0x26b 0x0606060606060606
1692 18:49:24.872044 MTRR: Fixed MSR 0x26c 0x0606060606060606
1693 18:49:24.875545 MTRR: Fixed MSR 0x26d 0x0606060606060606
1694 18:49:24.878360 MTRR: Fixed MSR 0x26e 0x0606060606060606
1695 18:49:24.881587 MTRR: Fixed MSR 0x26f 0x0606060606060606
1696 18:49:24.888639 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1697 18:49:24.891600 call enable_fixed_mtrr()
1698 18:49:24.895348 Checking cr50 for pending updates
1699 18:49:24.898873 CPU physical address size: 39 bits
1700 18:49:24.902347 Reading cr50 TPM mode
1701 18:49:24.911676 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1702 18:49:24.918866 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1703 18:49:24.922143 Checking segment from ROM address 0xfff9d5b8
1704 18:49:24.929066 Checking segment from ROM address 0xfff9d5d4
1705 18:49:24.932761 Loading segment from ROM address 0xfff9d5b8
1706 18:49:24.935811 code (compression=0)
1707 18:49:24.942903 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1708 18:49:24.952443 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1709 18:49:24.955931 it's not compressed!
1710 18:49:25.081283 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1711 18:49:25.088199 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1712 18:49:25.094982 Loading segment from ROM address 0xfff9d5d4
1713 18:49:25.098768 Entry Point 0x30000000
1714 18:49:25.098852 Loaded segments
1715 18:49:25.104965 BS: BS_PAYLOAD_LOAD run times (exec / console): 127 / 60 ms
1716 18:49:25.121372 Finalizing chipset.
1717 18:49:25.124614 Finalizing SMM.
1718 18:49:25.124699 APMC done.
1719 18:49:25.131289 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1720 18:49:25.135001 mp_park_aps done after 0 msecs.
1721 18:49:25.137725 Jumping to boot code at 0x30000000(0x76b4b000)
1722 18:49:25.147746 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1723 18:49:25.147832
1724 18:49:25.147932
1725 18:49:25.148032
1726 18:49:25.151469 Starting depthcharge on Magolor...
1727 18:49:25.151552
1728 18:49:25.151905 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1729 18:49:25.152021 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1730 18:49:25.152166 Setting prompt string to ['dedede:']
1731 18:49:25.152265 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1732 18:49:25.161351 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1733 18:49:25.161439
1734 18:49:25.167571 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1735 18:49:25.167655
1736 18:49:25.170865 fw_config match found: AUDIO_AMP=UNPROVISIONED
1737 18:49:25.170949
1738 18:49:25.174619 Wipe memory regions:
1739 18:49:25.174702
1740 18:49:25.177801 [0x00000000001000, 0x000000000a0000)
1741 18:49:25.177885
1742 18:49:25.181006 [0x00000000100000, 0x00000030000000)
1743 18:49:25.310855
1744 18:49:25.313540 [0x00000031062170, 0x00000076a15000)
1745 18:49:25.482678
1746 18:49:25.485948 [0x00000100000000, 0x00000180400000)
1747 18:49:26.549518
1748 18:49:26.549656 R8152: Initializing
1749 18:49:26.549722
1750 18:49:26.552836 Version 6 (ocp_data = 5c30)
1751 18:49:26.556375
1752 18:49:26.556458 R8152: Done initializing
1753 18:49:26.556524
1754 18:49:26.560096 Adding net device
1755 18:49:26.560178
1756 18:49:26.563251 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1757 18:49:26.566374
1758 18:49:26.566461
1759 18:49:26.566552
1760 18:49:26.566887 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1762 18:49:26.667250 dedede: tftpboot 192.168.201.1 12909618/tftp-deploy-xsbraosw/kernel/bzImage 12909618/tftp-deploy-xsbraosw/kernel/cmdline 12909618/tftp-deploy-xsbraosw/ramdisk/ramdisk.cpio.gz
1763 18:49:26.667378 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1764 18:49:26.667463 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1765 18:49:26.671513 tftpboot 192.168.201.1 12909618/tftp-deploy-xsbraosw/kernel/bzIploy-xsbraosw/kernel/cmdline 12909618/tftp-deploy-xsbraosw/ramdisk/ramdisk.cpio.gz
1766 18:49:26.671599
1767 18:49:26.671665 Waiting for link
1768 18:49:26.873714
1769 18:49:26.873841 done.
1770 18:49:26.873908
1771 18:49:26.873970 MAC: 00:24:32:30:7a:67
1772 18:49:26.874030
1773 18:49:26.876906 Sending DHCP discover... done.
1774 18:49:26.876988
1775 18:49:26.880073 Waiting for reply... done.
1776 18:49:26.880170
1777 18:49:26.883318 Sending DHCP request... done.
1778 18:49:26.883401
1779 18:49:26.890315 Waiting for reply... done.
1780 18:49:26.890397
1781 18:49:26.890462 My ip is 192.168.201.15
1782 18:49:26.890523
1783 18:49:26.893310 The DHCP server ip is 192.168.201.1
1784 18:49:26.893393
1785 18:49:26.900382 TFTP server IP predefined by user: 192.168.201.1
1786 18:49:26.900465
1787 18:49:26.906752 Bootfile predefined by user: 12909618/tftp-deploy-xsbraosw/kernel/bzImage
1788 18:49:26.906835
1789 18:49:26.910407 Sending tftp read request... done.
1790 18:49:26.910489
1791 18:49:26.913436 Waiting for the transfer...
1792 18:49:26.913520
1793 18:49:27.474909 00000000 ################################################################
1794 18:49:27.475047
1795 18:49:28.029529 00080000 ################################################################
1796 18:49:28.029660
1797 18:49:28.589462 00100000 ################################################################
1798 18:49:28.589599
1799 18:49:29.154727 00180000 ################################################################
1800 18:49:29.154870
1801 18:49:29.726453 00200000 ################################################################
1802 18:49:29.726606
1803 18:49:30.288172 00280000 ################################################################
1804 18:49:30.288311
1805 18:49:30.855339 00300000 ################################################################
1806 18:49:30.855473
1807 18:49:31.430526 00380000 ################################################################
1808 18:49:31.430695
1809 18:49:32.015738 00400000 ################################################################
1810 18:49:32.015918
1811 18:49:32.616785 00480000 ################################################################
1812 18:49:32.616924
1813 18:49:33.157005 00500000 ################################################################
1814 18:49:33.157138
1815 18:49:33.705894 00580000 ################################################################
1816 18:49:33.706063
1817 18:49:34.233513 00600000 ################################################################
1818 18:49:34.233669
1819 18:49:34.764040 00680000 ################################################################
1820 18:49:34.764185
1821 18:49:35.341172 00700000 ################################################################
1822 18:49:35.341310
1823 18:49:35.877148 00780000 ################################################################
1824 18:49:35.877308
1825 18:49:36.407876 00800000 ################################################################
1826 18:49:36.408067
1827 18:49:36.943479 00880000 ################################################################
1828 18:49:36.943647
1829 18:49:37.479333 00900000 ################################################################
1830 18:49:37.479466
1831 18:49:38.016066 00980000 ################################################################
1832 18:49:38.016219
1833 18:49:38.546882 00a00000 ################################################################
1834 18:49:38.547018
1835 18:49:39.103188 00a80000 ################################################################
1836 18:49:39.103328
1837 18:49:39.632168 00b00000 ################################################################
1838 18:49:39.632310
1839 18:49:39.930189 00b80000 #################################### done.
1840 18:49:39.930334
1841 18:49:39.933299 The bootfile was 12349440 bytes long.
1842 18:49:39.933373
1843 18:49:39.936679 Sending tftp read request... done.
1844 18:49:39.936751
1845 18:49:39.940202 Waiting for the transfer...
1846 18:49:39.940307
1847 18:49:40.494624 00000000 ################################################################
1848 18:49:40.494769
1849 18:49:41.035341 00080000 ################################################################
1850 18:49:41.035506
1851 18:49:41.576653 00100000 ################################################################
1852 18:49:41.576782
1853 18:49:42.106882 00180000 ################################################################
1854 18:49:42.107012
1855 18:49:42.646156 00200000 ################################################################
1856 18:49:42.646287
1857 18:49:43.221005 00280000 ################################################################
1858 18:49:43.221142
1859 18:49:43.802629 00300000 ################################################################
1860 18:49:43.802765
1861 18:49:44.371126 00380000 ################################################################
1862 18:49:44.371260
1863 18:49:44.914656 00400000 ################################################################
1864 18:49:44.914798
1865 18:49:45.482081 00480000 ################################################################
1866 18:49:45.482227
1867 18:49:46.044675 00500000 ################################################################
1868 18:49:46.044823
1869 18:49:46.591946 00580000 ################################################################
1870 18:49:46.592152
1871 18:49:47.152736 00600000 ################################################################
1872 18:49:47.152884
1873 18:49:47.711075 00680000 ################################################################
1874 18:49:47.711222
1875 18:49:48.256708 00700000 ################################################################
1876 18:49:48.256851
1877 18:49:48.823805 00780000 ################################################################
1878 18:49:48.823956
1879 18:49:49.391634 00800000 ################################################################
1880 18:49:49.391774
1881 18:49:49.728175 00880000 ##################################### done.
1882 18:49:49.728364
1883 18:49:49.731243 Sending tftp read request... done.
1884 18:49:49.731382
1885 18:49:49.734635 Waiting for the transfer...
1886 18:49:49.734792
1887 18:49:49.734922 00000000 # done.
1888 18:49:49.735060
1889 18:49:49.744620 Command line loaded dynamically from TFTP file: 12909618/tftp-deploy-xsbraosw/kernel/cmdline
1890 18:49:49.744699
1891 18:49:49.761257 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1892 18:49:49.761344
1893 18:49:49.764370 ec_init: CrosEC protocol v3 supported (256, 256)
1894 18:49:49.772440
1895 18:49:49.776009 Shutting down all USB controllers.
1896 18:49:49.776135
1897 18:49:49.776218 Removing current net device
1898 18:49:49.776296
1899 18:49:49.779251 Finalizing coreboot
1900 18:49:49.779344
1901 18:49:49.785482 Exiting depthcharge with code 4 at timestamp: 31454236
1902 18:49:49.785606
1903 18:49:49.785707
1904 18:49:49.785857 Starting kernel ...
1905 18:49:49.786002
1906 18:49:49.786099
1907 18:49:49.786620 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
1908 18:49:49.786771 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
1909 18:49:49.786889 Setting prompt string to ['Linux version [0-9]']
1910 18:49:49.787005 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1911 18:49:49.787113 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1913 18:54:11.787668 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
1915 18:54:11.788874 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
1917 18:54:11.789963 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1920 18:54:11.791977 end: 2 depthcharge-action (duration 00:05:00) [common]
1922 18:54:11.793589 Cleaning after the job
1923 18:54:11.794068 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909618/tftp-deploy-xsbraosw/ramdisk
1924 18:54:11.801225 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909618/tftp-deploy-xsbraosw/kernel
1925 18:54:11.810095 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909618/tftp-deploy-xsbraosw/modules
1926 18:54:11.813404 start: 5.1 power-off (timeout 00:00:30) [common]
1927 18:54:11.814016 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-1' '--port=1' '--command=off'
1928 18:54:11.898245 >> Command sent successfully.
1929 18:54:11.902873 Returned 0 in 0 seconds
1930 18:54:12.003920 end: 5.1 power-off (duration 00:00:00) [common]
1932 18:54:12.005608 start: 5.2 read-feedback (timeout 00:10:00) [common]
1933 18:54:12.006957 Listened to connection for namespace 'common' for up to 1s
1935 18:54:12.008413 Listened to connection for namespace 'common' for up to 1s
1936 18:54:13.007341 Finalising connection for namespace 'common'
1937 18:54:13.007554 Disconnecting from shell: Finalise
1938 18:54:13.007671
1939 18:54:13.108392 end: 5.2 read-feedback (duration 00:00:01) [common]
1940 18:54:13.109073 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12909618
1941 18:54:13.161542 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12909618
1942 18:54:13.161733 JobError: Your job cannot terminate cleanly.