Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 18:49:09.978172 lava-dispatcher, installed at version: 2024.01
2 18:49:09.978383 start: 0 validate
3 18:49:09.978516 Start time: 2024-03-01 18:49:09.978509+00:00 (UTC)
4 18:49:09.978632 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:49:09.978755 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 18:49:09.981578 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:49:09.981695 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:49:10.242216 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:49:10.242997 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 18:49:10.514127 validate duration: 0.54
12 18:49:10.514396 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 18:49:10.514509 start: 1.1 download-retry (timeout 00:10:00) [common]
14 18:49:10.514613 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 18:49:10.514729 Not decompressing ramdisk as can be used compressed.
16 18:49:10.514831 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 18:49:10.514909 saving as /var/lib/lava/dispatcher/tmp/12909632/tftp-deploy-kjr08e37/ramdisk/rootfs.cpio.gz
18 18:49:10.514972 total size: 8418130 (8 MB)
19 18:49:10.517461 progress 0 % (0 MB)
20 18:49:10.519914 progress 5 % (0 MB)
21 18:49:10.522233 progress 10 % (0 MB)
22 18:49:10.524549 progress 15 % (1 MB)
23 18:49:10.526814 progress 20 % (1 MB)
24 18:49:10.529069 progress 25 % (2 MB)
25 18:49:10.531313 progress 30 % (2 MB)
26 18:49:10.533437 progress 35 % (2 MB)
27 18:49:10.535686 progress 40 % (3 MB)
28 18:49:10.538008 progress 45 % (3 MB)
29 18:49:10.540374 progress 50 % (4 MB)
30 18:49:10.542620 progress 55 % (4 MB)
31 18:49:10.544854 progress 60 % (4 MB)
32 18:49:10.546903 progress 65 % (5 MB)
33 18:49:10.549119 progress 70 % (5 MB)
34 18:49:10.551365 progress 75 % (6 MB)
35 18:49:10.553576 progress 80 % (6 MB)
36 18:49:10.555789 progress 85 % (6 MB)
37 18:49:10.558153 progress 90 % (7 MB)
38 18:49:10.560511 progress 95 % (7 MB)
39 18:49:10.562672 progress 100 % (8 MB)
40 18:49:10.562932 8 MB downloaded in 0.05 s (167.40 MB/s)
41 18:49:10.563138 end: 1.1.1 http-download (duration 00:00:00) [common]
43 18:49:10.563509 end: 1.1 download-retry (duration 00:00:00) [common]
44 18:49:10.563628 start: 1.2 download-retry (timeout 00:10:00) [common]
45 18:49:10.563743 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 18:49:10.563914 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 18:49:10.564010 saving as /var/lib/lava/dispatcher/tmp/12909632/tftp-deploy-kjr08e37/kernel/bzImage
48 18:49:10.564096 total size: 12349440 (11 MB)
49 18:49:10.564158 No compression specified
50 18:49:10.565312 progress 0 % (0 MB)
51 18:49:10.568513 progress 5 % (0 MB)
52 18:49:10.571767 progress 10 % (1 MB)
53 18:49:10.575058 progress 15 % (1 MB)
54 18:49:10.578309 progress 20 % (2 MB)
55 18:49:10.581605 progress 25 % (2 MB)
56 18:49:10.584887 progress 30 % (3 MB)
57 18:49:10.588081 progress 35 % (4 MB)
58 18:49:10.591364 progress 40 % (4 MB)
59 18:49:10.594684 progress 45 % (5 MB)
60 18:49:10.598088 progress 50 % (5 MB)
61 18:49:10.601417 progress 55 % (6 MB)
62 18:49:10.604720 progress 60 % (7 MB)
63 18:49:10.607892 progress 65 % (7 MB)
64 18:49:10.611280 progress 70 % (8 MB)
65 18:49:10.614567 progress 75 % (8 MB)
66 18:49:10.617809 progress 80 % (9 MB)
67 18:49:10.621082 progress 85 % (10 MB)
68 18:49:10.624510 progress 90 % (10 MB)
69 18:49:10.627779 progress 95 % (11 MB)
70 18:49:10.631062 progress 100 % (11 MB)
71 18:49:10.631303 11 MB downloaded in 0.07 s (175.25 MB/s)
72 18:49:10.631450 end: 1.2.1 http-download (duration 00:00:00) [common]
74 18:49:10.631676 end: 1.2 download-retry (duration 00:00:00) [common]
75 18:49:10.631798 start: 1.3 download-retry (timeout 00:10:00) [common]
76 18:49:10.631881 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 18:49:10.632006 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 18:49:10.632115 saving as /var/lib/lava/dispatcher/tmp/12909632/tftp-deploy-kjr08e37/modules/modules.tar
79 18:49:10.632179 total size: 484604 (0 MB)
80 18:49:10.632242 Using unxz to decompress xz
81 18:49:10.636886 progress 6 % (0 MB)
82 18:49:10.637364 progress 13 % (0 MB)
83 18:49:10.637609 progress 20 % (0 MB)
84 18:49:10.639326 progress 27 % (0 MB)
85 18:49:10.641302 progress 33 % (0 MB)
86 18:49:10.643370 progress 40 % (0 MB)
87 18:49:10.645380 progress 47 % (0 MB)
88 18:49:10.647207 progress 54 % (0 MB)
89 18:49:10.649405 progress 60 % (0 MB)
90 18:49:10.651725 progress 67 % (0 MB)
91 18:49:10.654045 progress 74 % (0 MB)
92 18:49:10.655888 progress 81 % (0 MB)
93 18:49:10.658111 progress 87 % (0 MB)
94 18:49:10.660559 progress 94 % (0 MB)
95 18:49:10.662934 progress 100 % (0 MB)
96 18:49:10.669302 0 MB downloaded in 0.04 s (12.45 MB/s)
97 18:49:10.669566 end: 1.3.1 http-download (duration 00:00:00) [common]
99 18:49:10.669836 end: 1.3 download-retry (duration 00:00:00) [common]
100 18:49:10.669932 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 18:49:10.670029 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 18:49:10.670111 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 18:49:10.670199 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 18:49:10.670438 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh
105 18:49:10.670579 makedir: /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin
106 18:49:10.670701 makedir: /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/tests
107 18:49:10.670804 makedir: /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/results
108 18:49:10.670924 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-add-keys
109 18:49:10.671074 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-add-sources
110 18:49:10.671206 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-background-process-start
111 18:49:10.671342 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-background-process-stop
112 18:49:10.671471 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-common-functions
113 18:49:10.671601 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-echo-ipv4
114 18:49:10.671730 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-install-packages
115 18:49:10.671861 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-installed-packages
116 18:49:10.671991 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-os-build
117 18:49:10.672270 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-probe-channel
118 18:49:10.672405 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-probe-ip
119 18:49:10.672536 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-target-ip
120 18:49:10.672665 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-target-mac
121 18:49:10.672792 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-target-storage
122 18:49:10.672928 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-test-case
123 18:49:10.673058 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-test-event
124 18:49:10.673184 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-test-feedback
125 18:49:10.673312 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-test-raise
126 18:49:10.673443 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-test-reference
127 18:49:10.673580 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-test-runner
128 18:49:10.673716 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-test-set
129 18:49:10.673848 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-test-shell
130 18:49:10.674032 Updating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-install-packages (oe)
131 18:49:10.674207 Updating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/bin/lava-installed-packages (oe)
132 18:49:10.674341 Creating /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/environment
133 18:49:10.674449 LAVA metadata
134 18:49:10.674528 - LAVA_JOB_ID=12909632
135 18:49:10.674595 - LAVA_DISPATCHER_IP=192.168.201.1
136 18:49:10.674705 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 18:49:10.674773 skipped lava-vland-overlay
138 18:49:10.674851 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 18:49:10.674931 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 18:49:10.674999 skipped lava-multinode-overlay
141 18:49:10.675072 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 18:49:10.675156 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 18:49:10.675231 Loading test definitions
144 18:49:10.675339 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 18:49:10.675419 Using /lava-12909632 at stage 0
146 18:49:10.675744 uuid=12909632_1.4.2.3.1 testdef=None
147 18:49:10.675834 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 18:49:10.675919 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 18:49:10.676517 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 18:49:10.676746 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 18:49:10.677439 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 18:49:10.677669 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 18:49:10.678360 runner path: /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/0/tests/0_dmesg test_uuid 12909632_1.4.2.3.1
156 18:49:10.678526 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 18:49:10.678756 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 18:49:10.678830 Using /lava-12909632 at stage 1
160 18:49:10.679133 uuid=12909632_1.4.2.3.5 testdef=None
161 18:49:10.679222 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 18:49:10.679307 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 18:49:10.679784 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 18:49:10.680006 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 18:49:10.680722 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 18:49:10.681009 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 18:49:10.681655 runner path: /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/1/tests/1_bootrr test_uuid 12909632_1.4.2.3.5
170 18:49:10.681811 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 18:49:10.682021 Creating lava-test-runner.conf files
173 18:49:10.682086 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/0 for stage 0
174 18:49:10.682177 - 0_dmesg
175 18:49:10.682258 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12909632/lava-overlay-o39a44rh/lava-12909632/1 for stage 1
176 18:49:10.682352 - 1_bootrr
177 18:49:10.682448 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 18:49:10.682535 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 18:49:10.690834 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 18:49:10.690952 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 18:49:10.691041 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 18:49:10.691128 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 18:49:10.691214 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 18:49:10.949689 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 18:49:10.950090 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 18:49:10.950210 extracting modules file /var/lib/lava/dispatcher/tmp/12909632/tftp-deploy-kjr08e37/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12909632/extract-overlay-ramdisk-ju1ii1ef/ramdisk
187 18:49:10.971310 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 18:49:10.971474 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 18:49:10.971576 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12909632/compress-overlay-j3a10wn4/overlay-1.4.2.4.tar.gz to ramdisk
190 18:49:10.971656 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12909632/compress-overlay-j3a10wn4/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12909632/extract-overlay-ramdisk-ju1ii1ef/ramdisk
191 18:49:10.980612 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 18:49:10.980757 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 18:49:10.980857 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 18:49:10.980949 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 18:49:10.981032 Building ramdisk /var/lib/lava/dispatcher/tmp/12909632/extract-overlay-ramdisk-ju1ii1ef/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12909632/extract-overlay-ramdisk-ju1ii1ef/ramdisk
196 18:49:11.127196 >> 53982 blocks
197 18:49:12.027088 rename /var/lib/lava/dispatcher/tmp/12909632/extract-overlay-ramdisk-ju1ii1ef/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12909632/tftp-deploy-kjr08e37/ramdisk/ramdisk.cpio.gz
198 18:49:12.027539 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 18:49:12.027666 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 18:49:12.027780 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 18:49:12.027877 No mkimage arch provided, not using FIT.
202 18:49:12.027965 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 18:49:12.028049 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 18:49:12.028195 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 18:49:12.028283 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 18:49:12.028365 No LXC device requested
207 18:49:12.028451 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 18:49:12.028543 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 18:49:12.028629 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 18:49:12.028702 Checking files for TFTP limit of 4294967296 bytes.
211 18:49:12.029107 end: 1 tftp-deploy (duration 00:00:02) [common]
212 18:49:12.029220 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 18:49:12.029313 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 18:49:12.029441 substitutions:
215 18:49:12.029507 - {DTB}: None
216 18:49:12.029569 - {INITRD}: 12909632/tftp-deploy-kjr08e37/ramdisk/ramdisk.cpio.gz
217 18:49:12.029629 - {KERNEL}: 12909632/tftp-deploy-kjr08e37/kernel/bzImage
218 18:49:12.029687 - {LAVA_MAC}: None
219 18:49:12.029744 - {PRESEED_CONFIG}: None
220 18:49:12.029801 - {PRESEED_LOCAL}: None
221 18:49:12.029856 - {RAMDISK}: 12909632/tftp-deploy-kjr08e37/ramdisk/ramdisk.cpio.gz
222 18:49:12.029912 - {ROOT_PART}: None
223 18:49:12.029967 - {ROOT}: None
224 18:49:12.030021 - {SERVER_IP}: 192.168.201.1
225 18:49:12.030075 - {TEE}: None
226 18:49:12.030129 Parsed boot commands:
227 18:49:12.030185 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 18:49:12.030362 Parsed boot commands: tftpboot 192.168.201.1 12909632/tftp-deploy-kjr08e37/kernel/bzImage 12909632/tftp-deploy-kjr08e37/kernel/cmdline 12909632/tftp-deploy-kjr08e37/ramdisk/ramdisk.cpio.gz
229 18:49:12.030451 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 18:49:12.030533 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 18:49:12.030623 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 18:49:12.030711 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 18:49:12.030784 Not connected, no need to disconnect.
234 18:49:12.030859 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 18:49:12.030942 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 18:49:12.031010 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
237 18:49:12.035140 Setting prompt string to ['lava-test: # ']
238 18:49:12.035520 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 18:49:12.035628 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 18:49:12.035730 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 18:49:12.035841 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 18:49:12.036049 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
243 18:49:17.180939 >> Command sent successfully.
244 18:49:17.185887 Returned 0 in 5 seconds
245 18:49:17.286807 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 18:49:17.288227 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 18:49:17.288751 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 18:49:17.289214 Setting prompt string to 'Starting depthcharge on Helios...'
250 18:49:17.289597 Changing prompt to 'Starting depthcharge on Helios...'
251 18:49:17.289949 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
252 18:49:17.291160 [Enter `^Ec?' for help]
253 18:49:17.914451
254 18:49:17.914959
255 18:49:17.924641 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
256 18:49:17.927660 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
257 18:49:17.934576 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
258 18:49:17.937702 CPU: AES supported, TXT NOT supported, VT supported
259 18:49:17.944774 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
260 18:49:17.947994 PCH: device id 0284 (rev 00) is Cometlake-U Premium
261 18:49:17.954554 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
262 18:49:17.957715 VBOOT: Loading verstage.
263 18:49:17.960906 FMAP: Found "FLASH" version 1.1 at 0xc04000.
264 18:49:17.968141 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
265 18:49:17.971140 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
266 18:49:17.974453 CBFS @ c08000 size 3f8000
267 18:49:17.981419 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
268 18:49:17.984761 CBFS: Locating 'fallback/verstage'
269 18:49:17.988009 CBFS: Found @ offset 10fb80 size 1072c
270 18:49:17.988479
271 18:49:17.988812
272 18:49:18.001204 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
273 18:49:18.015396 Probing TPM: . done!
274 18:49:18.018857 TPM ready after 0 ms
275 18:49:18.021877 Connected to device vid:did:rid of 1ae0:0028:00
276 18:49:18.032210 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
277 18:49:18.035756 Initialized TPM device CR50 revision 0
278 18:49:18.082313 tlcl_send_startup: Startup return code is 0
279 18:49:18.082856 TPM: setup succeeded
280 18:49:18.095176 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
281 18:49:18.098846 Chrome EC: UHEPI supported
282 18:49:18.102149 Phase 1
283 18:49:18.105497 FMAP: area GBB found @ c05000 (12288 bytes)
284 18:49:18.112211 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 18:49:18.112655 Phase 2
286 18:49:18.115369 Phase 3
287 18:49:18.118936 FMAP: area GBB found @ c05000 (12288 bytes)
288 18:49:18.125701 VB2:vb2_report_dev_firmware() This is developer signed firmware
289 18:49:18.132275 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
290 18:49:18.135648 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
291 18:49:18.142099 VB2:vb2_verify_keyblock() Checking keyblock signature...
292 18:49:18.157915 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
293 18:49:18.161154 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
294 18:49:18.167743 VB2:vb2_verify_fw_preamble() Verifying preamble.
295 18:49:18.171994 Phase 4
296 18:49:18.175090 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
297 18:49:18.181999 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
298 18:49:18.361216 VB2:vb2_rsa_verify_digest() Digest check failed!
299 18:49:18.368192 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
300 18:49:18.368746 Saving nvdata
301 18:49:18.371585 Reboot requested (10020007)
302 18:49:18.374484 board_reset() called!
303 18:49:18.375024 full_reset() called!
304 18:49:22.896489
305 18:49:22.896975
306 18:49:22.897453 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
307 18:49:22.898095 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
308 18:49:22.900755 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
309 18:49:22.904615 CPU: AES supported, TXT NOT supported, VT supported
310 18:49:22.911264 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
311 18:49:22.914652 PCH: device id 0284 (rev 00) is Cometlake-U Premium
312 18:49:22.922017 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
313 18:49:22.925842 VBOOT: Loading verstage.
314 18:49:22.929982 FMAP: Found "FLASH" version 1.1 at 0xc04000.
315 18:49:22.933166 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
316 18:49:22.940659 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 18:49:22.941069 CBFS @ c08000 size 3f8000
318 18:49:22.948914 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
319 18:49:22.952265 CBFS: Locating 'fallback/verstage'
320 18:49:22.955925 CBFS: Found @ offset 10fb80 size 1072c
321 18:49:22.956358
322 18:49:22.956719
323 18:49:22.966630 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
324 18:49:22.982973 Probing TPM: . done!
325 18:49:22.983469 TPM ready after 0 ms
326 18:49:22.990730 Connected to device vid:did:rid of 1ae0:0028:00
327 18:49:22.997857 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
328 18:49:23.055433 Initialized TPM device CR50 revision 0
329 18:49:23.064018 tlcl_send_startup: Startup return code is 0
330 18:49:23.064614 TPM: setup succeeded
331 18:49:23.076514 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
332 18:49:23.080648 Chrome EC: UHEPI supported
333 18:49:23.083650 Phase 1
334 18:49:23.087018 FMAP: area GBB found @ c05000 (12288 bytes)
335 18:49:23.093772 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
336 18:49:23.099988 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
337 18:49:23.103642 Recovery requested (1009000e)
338 18:49:23.108999 Saving nvdata
339 18:49:23.115264 tlcl_extend: response is 0
340 18:49:23.124386 tlcl_extend: response is 0
341 18:49:23.131357 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
342 18:49:23.134501 CBFS @ c08000 size 3f8000
343 18:49:23.141267 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
344 18:49:23.144287 CBFS: Locating 'fallback/romstage'
345 18:49:23.147763 CBFS: Found @ offset 80 size 145fc
346 18:49:23.151005 Accumulated console time in verstage 98 ms
347 18:49:23.151449
348 18:49:23.151901
349 18:49:23.164613 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
350 18:49:23.170995 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
351 18:49:23.174098 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
352 18:49:23.177678 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
353 18:49:23.184150 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
354 18:49:23.187393 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
355 18:49:23.190561 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
356 18:49:23.194203 TCO_STS: 0000 0000
357 18:49:23.197204 GEN_PMCON: e0015238 00000200
358 18:49:23.200688 GBLRST_CAUSE: 00000000 00000000
359 18:49:23.201195 prev_sleep_state 5
360 18:49:23.203966 Boot Count incremented to 78530
361 18:49:23.210630 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 18:49:23.214515 CBFS @ c08000 size 3f8000
363 18:49:23.221247 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
364 18:49:23.221685 CBFS: Locating 'fspm.bin'
365 18:49:23.227653 CBFS: Found @ offset 5ffc0 size 71000
366 18:49:23.230379 Chrome EC: UHEPI supported
367 18:49:23.237423 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
368 18:49:23.240946 Probing TPM: done!
369 18:49:23.247437 Connected to device vid:did:rid of 1ae0:0028:00
370 18:49:23.257167 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
371 18:49:23.263737 Initialized TPM device CR50 revision 0
372 18:49:23.272293 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
373 18:49:23.278847 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
374 18:49:23.282275 MRC cache found, size 1948
375 18:49:23.285653 bootmode is set to: 2
376 18:49:23.288787 PRMRR disabled by config.
377 18:49:23.291894 SPD INDEX = 1
378 18:49:23.295091 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 18:49:23.298744 CBFS @ c08000 size 3f8000
380 18:49:23.305511 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 18:49:23.305943 CBFS: Locating 'spd.bin'
382 18:49:23.308359 CBFS: Found @ offset 5fb80 size 400
383 18:49:23.311753 SPD: module type is LPDDR3
384 18:49:23.314954 SPD: module part is
385 18:49:23.321816 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
386 18:49:23.325049 SPD: device width 4 bits, bus width 8 bits
387 18:49:23.328321 SPD: module size is 4096 MB (per channel)
388 18:49:23.331607 memory slot: 0 configuration done.
389 18:49:23.338214 memory slot: 2 configuration done.
390 18:49:23.386564 CBMEM:
391 18:49:23.389440 IMD: root @ 99fff000 254 entries.
392 18:49:23.392911 IMD: root @ 99ffec00 62 entries.
393 18:49:23.396113 External stage cache:
394 18:49:23.399490 IMD: root @ 9abff000 254 entries.
395 18:49:23.402864 IMD: root @ 9abfec00 62 entries.
396 18:49:23.406468 Chrome EC: clear events_b mask to 0x0000000020004000
397 18:49:23.422126 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
398 18:49:23.435341 tlcl_write: response is 0
399 18:49:23.444437 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
400 18:49:23.451255 MRC: TPM MRC hash updated successfully.
401 18:49:23.451689 2 DIMMs found
402 18:49:23.454347 SMM Memory Map
403 18:49:23.458092 SMRAM : 0x9a000000 0x1000000
404 18:49:23.460883 Subregion 0: 0x9a000000 0xa00000
405 18:49:23.464556 Subregion 1: 0x9aa00000 0x200000
406 18:49:23.467825 Subregion 2: 0x9ac00000 0x400000
407 18:49:23.471511 top_of_ram = 0x9a000000
408 18:49:23.474328 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
409 18:49:23.481027 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
410 18:49:23.484498 MTRR Range: Start=ff000000 End=0 (Size 1000000)
411 18:49:23.491048 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
412 18:49:23.494339 CBFS @ c08000 size 3f8000
413 18:49:23.497770 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
414 18:49:23.501052 CBFS: Locating 'fallback/postcar'
415 18:49:23.504362 CBFS: Found @ offset 107000 size 4b44
416 18:49:23.510961 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
417 18:49:23.523434 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
418 18:49:23.526743 Processing 180 relocs. Offset value of 0x97c0c000
419 18:49:23.535232 Accumulated console time in romstage 286 ms
420 18:49:23.535665
421 18:49:23.536009
422 18:49:23.544965 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
423 18:49:23.551933 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
424 18:49:23.555107 CBFS @ c08000 size 3f8000
425 18:49:23.562228 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
426 18:49:23.565191 CBFS: Locating 'fallback/ramstage'
427 18:49:23.568183 CBFS: Found @ offset 43380 size 1b9e8
428 18:49:23.574734 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
429 18:49:23.607096 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
430 18:49:23.610527 Processing 3976 relocs. Offset value of 0x98db0000
431 18:49:23.617166 Accumulated console time in postcar 52 ms
432 18:49:23.617629
433 18:49:23.618149
434 18:49:23.626815 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
435 18:49:23.633749 FMAP: area RO_VPD found @ c00000 (16384 bytes)
436 18:49:23.636977 WARNING: RO_VPD is uninitialized or empty.
437 18:49:23.640208 FMAP: area RW_VPD found @ af8000 (8192 bytes)
438 18:49:23.646515 FMAP: area RW_VPD found @ af8000 (8192 bytes)
439 18:49:23.646993 Normal boot.
440 18:49:23.653555 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
441 18:49:23.656737 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 18:49:23.660005 CBFS @ c08000 size 3f8000
443 18:49:23.666859 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 18:49:23.669912 CBFS: Locating 'cpu_microcode_blob.bin'
445 18:49:23.673527 CBFS: Found @ offset 14700 size 2ec00
446 18:49:23.677060 microcode: sig=0x806ec pf=0x4 revision=0xc9
447 18:49:23.679893 Skip microcode update
448 18:49:23.683052 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 18:49:23.687019 CBFS @ c08000 size 3f8000
450 18:49:23.693240 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 18:49:23.696215 CBFS: Locating 'fsps.bin'
452 18:49:23.699852 CBFS: Found @ offset d1fc0 size 35000
453 18:49:23.724901 Detected 4 core, 8 thread CPU.
454 18:49:23.728537 Setting up SMI for CPU
455 18:49:23.731663 IED base = 0x9ac00000
456 18:49:23.732284 IED size = 0x00400000
457 18:49:23.734941 Will perform SMM setup.
458 18:49:23.741881 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
459 18:49:23.748863 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
460 18:49:23.751317 Processing 16 relocs. Offset value of 0x00030000
461 18:49:23.755069 Attempting to start 7 APs
462 18:49:23.758471 Waiting for 10ms after sending INIT.
463 18:49:23.774773 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
464 18:49:23.775317 done.
465 18:49:23.778121 AP: slot 5 apic_id 6.
466 18:49:23.781447 AP: slot 2 apic_id 7.
467 18:49:23.781942 AP: slot 4 apic_id 5.
468 18:49:23.784694 AP: slot 1 apic_id 4.
469 18:49:23.788220 Waiting for 2nd SIPI to complete...done.
470 18:49:23.791503 AP: slot 7 apic_id 3.
471 18:49:23.794745 AP: slot 6 apic_id 2.
472 18:49:23.801447 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
473 18:49:23.804732 Processing 13 relocs. Offset value of 0x00038000
474 18:49:23.811479 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
475 18:49:23.817932 Installing SMM handler to 0x9a000000
476 18:49:23.824544 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
477 18:49:23.827965 Processing 658 relocs. Offset value of 0x9a010000
478 18:49:23.838187 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
479 18:49:23.841122 Processing 13 relocs. Offset value of 0x9a008000
480 18:49:23.848010 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
481 18:49:23.854503 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
482 18:49:23.857875 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
483 18:49:23.864205 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
484 18:49:23.871210 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
485 18:49:23.877578 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
486 18:49:23.881127 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
487 18:49:23.887914 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
488 18:49:23.890811 Clearing SMI status registers
489 18:49:23.893910 SMI_STS: PM1
490 18:49:23.894353 PM1_STS: PWRBTN
491 18:49:23.897332 TCO_STS: SECOND_TO
492 18:49:23.900943 New SMBASE 0x9a000000
493 18:49:23.904049 In relocation handler: CPU 0
494 18:49:23.907369 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
495 18:49:23.910518 Writing SMRR. base = 0x9a000006, mask=0xff000800
496 18:49:23.914175 Relocation complete.
497 18:49:23.917446 New SMBASE 0x99fff400
498 18:49:23.920747 In relocation handler: CPU 3
499 18:49:23.924147 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
500 18:49:23.927364 Writing SMRR. base = 0x9a000006, mask=0xff000800
501 18:49:23.930489 Relocation complete.
502 18:49:23.934381 New SMBASE 0x99fff000
503 18:49:23.934831 In relocation handler: CPU 4
504 18:49:23.940526 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
505 18:49:23.943795 Writing SMRR. base = 0x9a000006, mask=0xff000800
506 18:49:23.946928 Relocation complete.
507 18:49:23.947373 New SMBASE 0x99fffc00
508 18:49:23.950804 In relocation handler: CPU 1
509 18:49:23.956862 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
510 18:49:23.960844 Writing SMRR. base = 0x9a000006, mask=0xff000800
511 18:49:23.963876 Relocation complete.
512 18:49:23.964405 New SMBASE 0x99ffec00
513 18:49:23.967049 In relocation handler: CPU 5
514 18:49:23.973694 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
515 18:49:23.977225 Writing SMRR. base = 0x9a000006, mask=0xff000800
516 18:49:23.980603 Relocation complete.
517 18:49:23.981028 New SMBASE 0x99fff800
518 18:49:23.983684 In relocation handler: CPU 2
519 18:49:23.987131 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
520 18:49:23.993557 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 18:49:23.996854 Relocation complete.
522 18:49:23.997279 New SMBASE 0x99ffe400
523 18:49:24.000115 In relocation handler: CPU 7
524 18:49:24.003594 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
525 18:49:24.010309 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 18:49:24.013444 Relocation complete.
527 18:49:24.013869 New SMBASE 0x99ffe800
528 18:49:24.016962 In relocation handler: CPU 6
529 18:49:24.020343 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
530 18:49:24.026796 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 18:49:24.027297 Relocation complete.
532 18:49:24.030204 Initializing CPU #0
533 18:49:24.033447 CPU: vendor Intel device 806ec
534 18:49:24.036947 CPU: family 06, model 8e, stepping 0c
535 18:49:24.040034 Clearing out pending MCEs
536 18:49:24.043502 Setting up local APIC...
537 18:49:24.043928 apic_id: 0x00 done.
538 18:49:24.046979 Turbo is available but hidden
539 18:49:24.050125 Turbo is available and visible
540 18:49:24.053284 VMX status: enabled
541 18:49:24.056887 IA32_FEATURE_CONTROL status: locked
542 18:49:24.060134 Skip microcode update
543 18:49:24.060560 CPU #0 initialized
544 18:49:24.063345 Initializing CPU #3
545 18:49:24.066611 Initializing CPU #1
546 18:49:24.067035 CPU: vendor Intel device 806ec
547 18:49:24.073144 CPU: family 06, model 8e, stepping 0c
548 18:49:24.073569 Clearing out pending MCEs
549 18:49:24.076776 Initializing CPU #7
550 18:49:24.079960 Initializing CPU #6
551 18:49:24.083197 CPU: vendor Intel device 806ec
552 18:49:24.086908 CPU: family 06, model 8e, stepping 0c
553 18:49:24.089762 CPU: vendor Intel device 806ec
554 18:49:24.093601 CPU: family 06, model 8e, stepping 0c
555 18:49:24.096656 Clearing out pending MCEs
556 18:49:24.097084 Clearing out pending MCEs
557 18:49:24.099826 Setting up local APIC...
558 18:49:24.103158 Initializing CPU #4
559 18:49:24.106514 CPU: vendor Intel device 806ec
560 18:49:24.109928 CPU: family 06, model 8e, stepping 0c
561 18:49:24.113159 CPU: vendor Intel device 806ec
562 18:49:24.116481 CPU: family 06, model 8e, stepping 0c
563 18:49:24.119659 Clearing out pending MCEs
564 18:49:24.122918 Clearing out pending MCEs
565 18:49:24.123345 Setting up local APIC...
566 18:49:24.126417 Setting up local APIC...
567 18:49:24.129845 Setting up local APIC...
568 18:49:24.130270 apic_id: 0x03 done.
569 18:49:24.133247 apic_id: 0x02 done.
570 18:49:24.136694 VMX status: enabled
571 18:49:24.137122 VMX status: enabled
572 18:49:24.139854 IA32_FEATURE_CONTROL status: locked
573 18:49:24.143222 IA32_FEATURE_CONTROL status: locked
574 18:49:24.146621 Skip microcode update
575 18:49:24.149479 Skip microcode update
576 18:49:24.149906 CPU #7 initialized
577 18:49:24.152972 CPU #6 initialized
578 18:49:24.156301 Setting up local APIC...
579 18:49:24.156727 Initializing CPU #2
580 18:49:24.159588 apic_id: 0x01 done.
581 18:49:24.162948 CPU: vendor Intel device 806ec
582 18:49:24.166114 CPU: family 06, model 8e, stepping 0c
583 18:49:24.169794 Initializing CPU #5
584 18:49:24.173117 Clearing out pending MCEs
585 18:49:24.173544 CPU: vendor Intel device 806ec
586 18:49:24.179548 CPU: family 06, model 8e, stepping 0c
587 18:49:24.180236 Clearing out pending MCEs
588 18:49:24.182758 Setting up local APIC...
589 18:49:24.186383 apic_id: 0x04 done.
590 18:49:24.186807 apic_id: 0x05 done.
591 18:49:24.189680 VMX status: enabled
592 18:49:24.192690 VMX status: enabled
593 18:49:24.196436 IA32_FEATURE_CONTROL status: locked
594 18:49:24.199847 IA32_FEATURE_CONTROL status: locked
595 18:49:24.200436 Skip microcode update
596 18:49:24.203080 Skip microcode update
597 18:49:24.206309 CPU #1 initialized
598 18:49:24.206793 CPU #4 initialized
599 18:49:24.209329 apic_id: 0x07 done.
600 18:49:24.213163 Setting up local APIC...
601 18:49:24.213596 VMX status: enabled
602 18:49:24.216127 apic_id: 0x06 done.
603 18:49:24.219681 VMX status: enabled
604 18:49:24.220344 VMX status: enabled
605 18:49:24.222991 IA32_FEATURE_CONTROL status: locked
606 18:49:24.225790 IA32_FEATURE_CONTROL status: locked
607 18:49:24.229413 Skip microcode update
608 18:49:24.232450 Skip microcode update
609 18:49:24.232877 CPU #2 initialized
610 18:49:24.235755 CPU #5 initialized
611 18:49:24.239459 IA32_FEATURE_CONTROL status: locked
612 18:49:24.242839 Skip microcode update
613 18:49:24.243403 CPU #3 initialized
614 18:49:24.249451 bsp_do_flight_plan done after 457 msecs.
615 18:49:24.252574 CPU: frequency set to 4200 MHz
616 18:49:24.253002 Enabling SMIs.
617 18:49:24.253338 Locking SMM.
618 18:49:24.269208 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
619 18:49:24.272260 CBFS @ c08000 size 3f8000
620 18:49:24.278753 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
621 18:49:24.279266 CBFS: Locating 'vbt.bin'
622 18:49:24.282070 CBFS: Found @ offset 5f5c0 size 499
623 18:49:24.289018 Found a VBT of 4608 bytes after decompression
624 18:49:24.469083 Display FSP Version Info HOB
625 18:49:24.473038 Reference Code - CPU = 9.0.1e.30
626 18:49:24.475985 uCode Version = 0.0.0.ca
627 18:49:24.479393 TXT ACM version = ff.ff.ff.ffff
628 18:49:24.482517 Display FSP Version Info HOB
629 18:49:24.485960 Reference Code - ME = 9.0.1e.30
630 18:49:24.489175 MEBx version = 0.0.0.0
631 18:49:24.492379 ME Firmware Version = Consumer SKU
632 18:49:24.495721 Display FSP Version Info HOB
633 18:49:24.499064 Reference Code - CML PCH = 9.0.1e.30
634 18:49:24.499491 PCH-CRID Status = Disabled
635 18:49:24.505930 PCH-CRID Original Value = ff.ff.ff.ffff
636 18:49:24.509621 PCH-CRID New Value = ff.ff.ff.ffff
637 18:49:24.512701 OPROM - RST - RAID = ff.ff.ff.ffff
638 18:49:24.515841 ChipsetInit Base Version = ff.ff.ff.ffff
639 18:49:24.519096 ChipsetInit Oem Version = ff.ff.ff.ffff
640 18:49:24.522390 Display FSP Version Info HOB
641 18:49:24.528724 Reference Code - SA - System Agent = 9.0.1e.30
642 18:49:24.532499 Reference Code - MRC = 0.7.1.6c
643 18:49:24.532948 SA - PCIe Version = 9.0.1e.30
644 18:49:24.535653 SA-CRID Status = Disabled
645 18:49:24.538930 SA-CRID Original Value = 0.0.0.c
646 18:49:24.542199 SA-CRID New Value = 0.0.0.c
647 18:49:24.545580 OPROM - VBIOS = ff.ff.ff.ffff
648 18:49:24.546009 RTC Init
649 18:49:24.552240 Set power on after power failure.
650 18:49:24.552667 Disabling Deep S3
651 18:49:24.555606 Disabling Deep S3
652 18:49:24.556034 Disabling Deep S4
653 18:49:24.559357 Disabling Deep S4
654 18:49:24.559780 Disabling Deep S5
655 18:49:24.562547 Disabling Deep S5
656 18:49:24.569252 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
657 18:49:24.569684 Enumerating buses...
658 18:49:24.575820 Show all devs... Before device enumeration.
659 18:49:24.576324 Root Device: enabled 1
660 18:49:24.579060 CPU_CLUSTER: 0: enabled 1
661 18:49:24.582315 DOMAIN: 0000: enabled 1
662 18:49:24.582744 APIC: 00: enabled 1
663 18:49:24.585597 PCI: 00:00.0: enabled 1
664 18:49:24.588844 PCI: 00:02.0: enabled 1
665 18:49:24.592477 PCI: 00:04.0: enabled 0
666 18:49:24.592903 PCI: 00:05.0: enabled 0
667 18:49:24.595516 PCI: 00:12.0: enabled 1
668 18:49:24.598842 PCI: 00:12.5: enabled 0
669 18:49:24.602070 PCI: 00:12.6: enabled 0
670 18:49:24.602497 PCI: 00:14.0: enabled 1
671 18:49:24.605479 PCI: 00:14.1: enabled 0
672 18:49:24.608857 PCI: 00:14.3: enabled 1
673 18:49:24.611835 PCI: 00:14.5: enabled 0
674 18:49:24.612313 PCI: 00:15.0: enabled 1
675 18:49:24.615553 PCI: 00:15.1: enabled 1
676 18:49:24.618472 PCI: 00:15.2: enabled 0
677 18:49:24.622199 PCI: 00:15.3: enabled 0
678 18:49:24.622627 PCI: 00:16.0: enabled 1
679 18:49:24.625412 PCI: 00:16.1: enabled 0
680 18:49:24.628522 PCI: 00:16.2: enabled 0
681 18:49:24.628948 PCI: 00:16.3: enabled 0
682 18:49:24.632094 PCI: 00:16.4: enabled 0
683 18:49:24.635236 PCI: 00:16.5: enabled 0
684 18:49:24.638617 PCI: 00:17.0: enabled 1
685 18:49:24.639046 PCI: 00:19.0: enabled 1
686 18:49:24.641567 PCI: 00:19.1: enabled 0
687 18:49:24.645460 PCI: 00:19.2: enabled 0
688 18:49:24.648292 PCI: 00:1a.0: enabled 0
689 18:49:24.648718 PCI: 00:1c.0: enabled 0
690 18:49:24.651632 PCI: 00:1c.1: enabled 0
691 18:49:24.655187 PCI: 00:1c.2: enabled 0
692 18:49:24.658526 PCI: 00:1c.3: enabled 0
693 18:49:24.658954 PCI: 00:1c.4: enabled 0
694 18:49:24.661959 PCI: 00:1c.5: enabled 0
695 18:49:24.665098 PCI: 00:1c.6: enabled 0
696 18:49:24.665608 PCI: 00:1c.7: enabled 0
697 18:49:24.668189 PCI: 00:1d.0: enabled 1
698 18:49:24.671322 PCI: 00:1d.1: enabled 0
699 18:49:24.674691 PCI: 00:1d.2: enabled 0
700 18:49:24.675203 PCI: 00:1d.3: enabled 0
701 18:49:24.678798 PCI: 00:1d.4: enabled 0
702 18:49:24.681419 PCI: 00:1d.5: enabled 1
703 18:49:24.684869 PCI: 00:1e.0: enabled 1
704 18:49:24.685370 PCI: 00:1e.1: enabled 0
705 18:49:24.688115 PCI: 00:1e.2: enabled 1
706 18:49:24.691393 PCI: 00:1e.3: enabled 1
707 18:49:24.695112 PCI: 00:1f.0: enabled 1
708 18:49:24.695594 PCI: 00:1f.1: enabled 1
709 18:49:24.698233 PCI: 00:1f.2: enabled 1
710 18:49:24.701323 PCI: 00:1f.3: enabled 1
711 18:49:24.701747 PCI: 00:1f.4: enabled 1
712 18:49:24.704773 PCI: 00:1f.5: enabled 1
713 18:49:24.708549 PCI: 00:1f.6: enabled 0
714 18:49:24.711431 USB0 port 0: enabled 1
715 18:49:24.711883 I2C: 00:15: enabled 1
716 18:49:24.715074 I2C: 00:5d: enabled 1
717 18:49:24.718097 GENERIC: 0.0: enabled 1
718 18:49:24.718520 I2C: 00:1a: enabled 1
719 18:49:24.721553 I2C: 00:38: enabled 1
720 18:49:24.724811 I2C: 00:39: enabled 1
721 18:49:24.725392 I2C: 00:3a: enabled 1
722 18:49:24.728028 I2C: 00:3b: enabled 1
723 18:49:24.731309 PCI: 00:00.0: enabled 1
724 18:49:24.731733 SPI: 00: enabled 1
725 18:49:24.734697 SPI: 01: enabled 1
726 18:49:24.737863 PNP: 0c09.0: enabled 1
727 18:49:24.738305 USB2 port 0: enabled 1
728 18:49:24.741614 USB2 port 1: enabled 1
729 18:49:24.744491 USB2 port 2: enabled 0
730 18:49:24.748014 USB2 port 3: enabled 0
731 18:49:24.748480 USB2 port 5: enabled 0
732 18:49:24.751519 USB2 port 6: enabled 1
733 18:49:24.754896 USB2 port 9: enabled 1
734 18:49:24.755375 USB3 port 0: enabled 1
735 18:49:24.757860 USB3 port 1: enabled 1
736 18:49:24.761134 USB3 port 2: enabled 1
737 18:49:24.761560 USB3 port 3: enabled 1
738 18:49:24.764400 USB3 port 4: enabled 0
739 18:49:24.767599 APIC: 04: enabled 1
740 18:49:24.768022 APIC: 07: enabled 1
741 18:49:24.771122 APIC: 01: enabled 1
742 18:49:24.774326 APIC: 05: enabled 1
743 18:49:24.774930 APIC: 06: enabled 1
744 18:49:24.777793 APIC: 02: enabled 1
745 18:49:24.781023 APIC: 03: enabled 1
746 18:49:24.781451 Compare with tree...
747 18:49:24.784287 Root Device: enabled 1
748 18:49:24.787417 CPU_CLUSTER: 0: enabled 1
749 18:49:24.788001 APIC: 00: enabled 1
750 18:49:24.791181 APIC: 04: enabled 1
751 18:49:24.794555 APIC: 07: enabled 1
752 18:49:24.794984 APIC: 01: enabled 1
753 18:49:24.797757 APIC: 05: enabled 1
754 18:49:24.800862 APIC: 06: enabled 1
755 18:49:24.801327 APIC: 02: enabled 1
756 18:49:24.804571 APIC: 03: enabled 1
757 18:49:24.807554 DOMAIN: 0000: enabled 1
758 18:49:24.811287 PCI: 00:00.0: enabled 1
759 18:49:24.811720 PCI: 00:02.0: enabled 1
760 18:49:24.814540 PCI: 00:04.0: enabled 0
761 18:49:24.817630 PCI: 00:05.0: enabled 0
762 18:49:24.820961 PCI: 00:12.0: enabled 1
763 18:49:24.824309 PCI: 00:12.5: enabled 0
764 18:49:24.824783 PCI: 00:12.6: enabled 0
765 18:49:24.827409 PCI: 00:14.0: enabled 1
766 18:49:24.830651 USB0 port 0: enabled 1
767 18:49:24.833996 USB2 port 0: enabled 1
768 18:49:24.837953 USB2 port 1: enabled 1
769 18:49:24.838408 USB2 port 2: enabled 0
770 18:49:24.841016 USB2 port 3: enabled 0
771 18:49:24.843992 USB2 port 5: enabled 0
772 18:49:24.847480 USB2 port 6: enabled 1
773 18:49:24.850597 USB2 port 9: enabled 1
774 18:49:24.853877 USB3 port 0: enabled 1
775 18:49:24.854305 USB3 port 1: enabled 1
776 18:49:24.857371 USB3 port 2: enabled 1
777 18:49:24.860675 USB3 port 3: enabled 1
778 18:49:24.863979 USB3 port 4: enabled 0
779 18:49:24.867070 PCI: 00:14.1: enabled 0
780 18:49:24.867497 PCI: 00:14.3: enabled 1
781 18:49:24.870843 PCI: 00:14.5: enabled 0
782 18:49:24.874043 PCI: 00:15.0: enabled 1
783 18:49:24.877240 I2C: 00:15: enabled 1
784 18:49:24.880487 PCI: 00:15.1: enabled 1
785 18:49:24.880916 I2C: 00:5d: enabled 1
786 18:49:24.883752 GENERIC: 0.0: enabled 1
787 18:49:24.887362 PCI: 00:15.2: enabled 0
788 18:49:24.890439 PCI: 00:15.3: enabled 0
789 18:49:24.893822 PCI: 00:16.0: enabled 1
790 18:49:24.894246 PCI: 00:16.1: enabled 0
791 18:49:24.897364 PCI: 00:16.2: enabled 0
792 18:49:24.900727 PCI: 00:16.3: enabled 0
793 18:49:24.903910 PCI: 00:16.4: enabled 0
794 18:49:24.904379 PCI: 00:16.5: enabled 0
795 18:49:24.906898 PCI: 00:17.0: enabled 1
796 18:49:24.910661 PCI: 00:19.0: enabled 1
797 18:49:24.913568 I2C: 00:1a: enabled 1
798 18:49:24.917116 I2C: 00:38: enabled 1
799 18:49:24.917595 I2C: 00:39: enabled 1
800 18:49:24.919992 I2C: 00:3a: enabled 1
801 18:49:24.923600 I2C: 00:3b: enabled 1
802 18:49:24.927005 PCI: 00:19.1: enabled 0
803 18:49:24.927431 PCI: 00:19.2: enabled 0
804 18:49:24.930241 PCI: 00:1a.0: enabled 0
805 18:49:24.933352 PCI: 00:1c.0: enabled 0
806 18:49:24.937122 PCI: 00:1c.1: enabled 0
807 18:49:24.940477 PCI: 00:1c.2: enabled 0
808 18:49:24.941032 PCI: 00:1c.3: enabled 0
809 18:49:24.943202 PCI: 00:1c.4: enabled 0
810 18:49:24.946686 PCI: 00:1c.5: enabled 0
811 18:49:24.950453 PCI: 00:1c.6: enabled 0
812 18:49:24.953408 PCI: 00:1c.7: enabled 0
813 18:49:24.953895 PCI: 00:1d.0: enabled 1
814 18:49:24.956763 PCI: 00:1d.1: enabled 0
815 18:49:24.960115 PCI: 00:1d.2: enabled 0
816 18:49:24.963566 PCI: 00:1d.3: enabled 0
817 18:49:24.966892 PCI: 00:1d.4: enabled 0
818 18:49:24.967460 PCI: 00:1d.5: enabled 1
819 18:49:24.969956 PCI: 00:00.0: enabled 1
820 18:49:24.973178 PCI: 00:1e.0: enabled 1
821 18:49:24.976409 PCI: 00:1e.1: enabled 0
822 18:49:24.980008 PCI: 00:1e.2: enabled 1
823 18:49:24.980476 SPI: 00: enabled 1
824 18:49:24.983501 PCI: 00:1e.3: enabled 1
825 18:49:24.986766 SPI: 01: enabled 1
826 18:49:24.990041 PCI: 00:1f.0: enabled 1
827 18:49:24.990578 PNP: 0c09.0: enabled 1
828 18:49:24.993329 PCI: 00:1f.1: enabled 1
829 18:49:24.996536 PCI: 00:1f.2: enabled 1
830 18:49:24.999710 PCI: 00:1f.3: enabled 1
831 18:49:25.000337 PCI: 00:1f.4: enabled 1
832 18:49:25.003456 PCI: 00:1f.5: enabled 1
833 18:49:25.006582 PCI: 00:1f.6: enabled 0
834 18:49:25.009712 Root Device scanning...
835 18:49:25.012826 scan_static_bus for Root Device
836 18:49:25.016476 CPU_CLUSTER: 0 enabled
837 18:49:25.016918 DOMAIN: 0000 enabled
838 18:49:25.019986 DOMAIN: 0000 scanning...
839 18:49:25.022945 PCI: pci_scan_bus for bus 00
840 18:49:25.026263 PCI: 00:00.0 [8086/0000] ops
841 18:49:25.029953 PCI: 00:00.0 [8086/9b61] enabled
842 18:49:25.032884 PCI: 00:02.0 [8086/0000] bus ops
843 18:49:25.036467 PCI: 00:02.0 [8086/9b41] enabled
844 18:49:25.039917 PCI: 00:04.0 [8086/1903] disabled
845 18:49:25.043216 PCI: 00:08.0 [8086/1911] enabled
846 18:49:25.046528 PCI: 00:12.0 [8086/02f9] enabled
847 18:49:25.050177 PCI: 00:14.0 [8086/0000] bus ops
848 18:49:25.052948 PCI: 00:14.0 [8086/02ed] enabled
849 18:49:25.056256 PCI: 00:14.2 [8086/02ef] enabled
850 18:49:25.059426 PCI: 00:14.3 [8086/02f0] enabled
851 18:49:25.062600 PCI: 00:15.0 [8086/0000] bus ops
852 18:49:25.065999 PCI: 00:15.0 [8086/02e8] enabled
853 18:49:25.069653 PCI: 00:15.1 [8086/0000] bus ops
854 18:49:25.072479 PCI: 00:15.1 [8086/02e9] enabled
855 18:49:25.075976 PCI: 00:16.0 [8086/0000] ops
856 18:49:25.079353 PCI: 00:16.0 [8086/02e0] enabled
857 18:49:25.082673 PCI: 00:17.0 [8086/0000] ops
858 18:49:25.085955 PCI: 00:17.0 [8086/02d3] enabled
859 18:49:25.089322 PCI: 00:19.0 [8086/0000] bus ops
860 18:49:25.092555 PCI: 00:19.0 [8086/02c5] enabled
861 18:49:25.095762 PCI: 00:1d.0 [8086/0000] bus ops
862 18:49:25.099042 PCI: 00:1d.0 [8086/02b0] enabled
863 18:49:25.102302 PCI: Static device PCI: 00:1d.5 not found, disabling it.
864 18:49:25.105752 PCI: 00:1e.0 [8086/0000] ops
865 18:49:25.109257 PCI: 00:1e.0 [8086/02a8] enabled
866 18:49:25.112920 PCI: 00:1e.2 [8086/0000] bus ops
867 18:49:25.115660 PCI: 00:1e.2 [8086/02aa] enabled
868 18:49:25.119438 PCI: 00:1e.3 [8086/0000] bus ops
869 18:49:25.122354 PCI: 00:1e.3 [8086/02ab] enabled
870 18:49:25.125596 PCI: 00:1f.0 [8086/0000] bus ops
871 18:49:25.129037 PCI: 00:1f.0 [8086/0284] enabled
872 18:49:25.135488 PCI: Static device PCI: 00:1f.1 not found, disabling it.
873 18:49:25.142148 PCI: Static device PCI: 00:1f.2 not found, disabling it.
874 18:49:25.145637 PCI: 00:1f.3 [8086/0000] bus ops
875 18:49:25.149155 PCI: 00:1f.3 [8086/02c8] enabled
876 18:49:25.152491 PCI: 00:1f.4 [8086/0000] bus ops
877 18:49:25.155589 PCI: 00:1f.4 [8086/02a3] enabled
878 18:49:25.158880 PCI: 00:1f.5 [8086/0000] bus ops
879 18:49:25.162374 PCI: 00:1f.5 [8086/02a4] enabled
880 18:49:25.165324 PCI: Leftover static devices:
881 18:49:25.165407 PCI: 00:05.0
882 18:49:25.165473 PCI: 00:12.5
883 18:49:25.169048 PCI: 00:12.6
884 18:49:25.169130 PCI: 00:14.1
885 18:49:25.172581 PCI: 00:14.5
886 18:49:25.172663 PCI: 00:15.2
887 18:49:25.172729 PCI: 00:15.3
888 18:49:25.175365 PCI: 00:16.1
889 18:49:25.175457 PCI: 00:16.2
890 18:49:25.179005 PCI: 00:16.3
891 18:49:25.179108 PCI: 00:16.4
892 18:49:25.182294 PCI: 00:16.5
893 18:49:25.182371 PCI: 00:19.1
894 18:49:25.182435 PCI: 00:19.2
895 18:49:25.185745 PCI: 00:1a.0
896 18:49:25.185815 PCI: 00:1c.0
897 18:49:25.188596 PCI: 00:1c.1
898 18:49:25.188677 PCI: 00:1c.2
899 18:49:25.188744 PCI: 00:1c.3
900 18:49:25.191893 PCI: 00:1c.4
901 18:49:25.191995 PCI: 00:1c.5
902 18:49:25.195575 PCI: 00:1c.6
903 18:49:25.195670 PCI: 00:1c.7
904 18:49:25.195760 PCI: 00:1d.1
905 18:49:25.198964 PCI: 00:1d.2
906 18:49:25.199062 PCI: 00:1d.3
907 18:49:25.202163 PCI: 00:1d.4
908 18:49:25.202258 PCI: 00:1d.5
909 18:49:25.205513 PCI: 00:1e.1
910 18:49:25.205583 PCI: 00:1f.1
911 18:49:25.205642 PCI: 00:1f.2
912 18:49:25.208680 PCI: 00:1f.6
913 18:49:25.212020 PCI: Check your devicetree.cb.
914 18:49:25.212134 PCI: 00:02.0 scanning...
915 18:49:25.218826 scan_generic_bus for PCI: 00:02.0
916 18:49:25.222435 scan_generic_bus for PCI: 00:02.0 done
917 18:49:25.225479 scan_bus: scanning of bus PCI: 00:02.0 took 10202 usecs
918 18:49:25.228929 PCI: 00:14.0 scanning...
919 18:49:25.232178 scan_static_bus for PCI: 00:14.0
920 18:49:25.235302 USB0 port 0 enabled
921 18:49:25.238601 USB0 port 0 scanning...
922 18:49:25.242072 scan_static_bus for USB0 port 0
923 18:49:25.242145 USB2 port 0 enabled
924 18:49:25.245349 USB2 port 1 enabled
925 18:49:25.245422 USB2 port 2 disabled
926 18:49:25.249052 USB2 port 3 disabled
927 18:49:25.252032 USB2 port 5 disabled
928 18:49:25.252135 USB2 port 6 enabled
929 18:49:25.255181 USB2 port 9 enabled
930 18:49:25.258568 USB3 port 0 enabled
931 18:49:25.258671 USB3 port 1 enabled
932 18:49:25.262097 USB3 port 2 enabled
933 18:49:25.262197 USB3 port 3 enabled
934 18:49:25.265417 USB3 port 4 disabled
935 18:49:25.268966 USB2 port 0 scanning...
936 18:49:25.272016 scan_static_bus for USB2 port 0
937 18:49:25.275360 scan_static_bus for USB2 port 0 done
938 18:49:25.281813 scan_bus: scanning of bus USB2 port 0 took 9709 usecs
939 18:49:25.281899 USB2 port 1 scanning...
940 18:49:25.285403 scan_static_bus for USB2 port 1
941 18:49:25.291911 scan_static_bus for USB2 port 1 done
942 18:49:25.295060 scan_bus: scanning of bus USB2 port 1 took 9711 usecs
943 18:49:25.298277 USB2 port 6 scanning...
944 18:49:25.301668 scan_static_bus for USB2 port 6
945 18:49:25.305388 scan_static_bus for USB2 port 6 done
946 18:49:25.311486 scan_bus: scanning of bus USB2 port 6 took 9718 usecs
947 18:49:25.311561 USB2 port 9 scanning...
948 18:49:25.315555 scan_static_bus for USB2 port 9
949 18:49:25.321748 scan_static_bus for USB2 port 9 done
950 18:49:25.325178 scan_bus: scanning of bus USB2 port 9 took 9709 usecs
951 18:49:25.328350 USB3 port 0 scanning...
952 18:49:25.331985 scan_static_bus for USB3 port 0
953 18:49:25.335208 scan_static_bus for USB3 port 0 done
954 18:49:25.341518 scan_bus: scanning of bus USB3 port 0 took 9702 usecs
955 18:49:25.341601 USB3 port 1 scanning...
956 18:49:25.345765 scan_static_bus for USB3 port 1
957 18:49:25.351986 scan_static_bus for USB3 port 1 done
958 18:49:25.355119 scan_bus: scanning of bus USB3 port 1 took 9710 usecs
959 18:49:25.358719 USB3 port 2 scanning...
960 18:49:25.362014 scan_static_bus for USB3 port 2
961 18:49:25.365083 scan_static_bus for USB3 port 2 done
962 18:49:25.371557 scan_bus: scanning of bus USB3 port 2 took 9711 usecs
963 18:49:25.371641 USB3 port 3 scanning...
964 18:49:25.378585 scan_static_bus for USB3 port 3
965 18:49:25.382103 scan_static_bus for USB3 port 3 done
966 18:49:25.385015 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
967 18:49:25.388787 scan_static_bus for USB0 port 0 done
968 18:49:25.395062 scan_bus: scanning of bus USB0 port 0 took 155451 usecs
969 18:49:25.398298 scan_static_bus for PCI: 00:14.0 done
970 18:49:25.404978 scan_bus: scanning of bus PCI: 00:14.0 took 173071 usecs
971 18:49:25.408142 PCI: 00:15.0 scanning...
972 18:49:25.411749 scan_generic_bus for PCI: 00:15.0
973 18:49:25.414674 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
974 18:49:25.418023 scan_generic_bus for PCI: 00:15.0 done
975 18:49:25.425143 scan_bus: scanning of bus PCI: 00:15.0 took 14306 usecs
976 18:49:25.427714 PCI: 00:15.1 scanning...
977 18:49:25.431494 scan_generic_bus for PCI: 00:15.1
978 18:49:25.434730 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
979 18:49:25.437845 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
980 18:49:25.443983 scan_generic_bus for PCI: 00:15.1 done
981 18:49:25.447766 scan_bus: scanning of bus PCI: 00:15.1 took 18606 usecs
982 18:49:25.451084 PCI: 00:19.0 scanning...
983 18:49:25.454099 scan_generic_bus for PCI: 00:19.0
984 18:49:25.458090 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
985 18:49:25.464257 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
986 18:49:25.467799 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
987 18:49:25.471208 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
988 18:49:25.474377 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
989 18:49:25.477534 scan_generic_bus for PCI: 00:19.0 done
990 18:49:25.484092 scan_bus: scanning of bus PCI: 00:19.0 took 30741 usecs
991 18:49:25.487346 PCI: 00:1d.0 scanning...
992 18:49:25.491082 do_pci_scan_bridge for PCI: 00:1d.0
993 18:49:25.493867 PCI: pci_scan_bus for bus 01
994 18:49:25.497481 PCI: 01:00.0 [1c5c/1327] enabled
995 18:49:25.500595 Enabling Common Clock Configuration
996 18:49:25.504021 L1 Sub-State supported from root port 29
997 18:49:25.507374 L1 Sub-State Support = 0xf
998 18:49:25.510531 CommonModeRestoreTime = 0x28
999 18:49:25.513814 Power On Value = 0x16, Power On Scale = 0x0
1000 18:49:25.517158 ASPM: Enabled L1
1001 18:49:25.524237 scan_bus: scanning of bus PCI: 00:1d.0 took 32796 usecs
1002 18:49:25.524320 PCI: 00:1e.2 scanning...
1003 18:49:25.526997 scan_generic_bus for PCI: 00:1e.2
1004 18:49:25.533777 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1005 18:49:25.537155 scan_generic_bus for PCI: 00:1e.2 done
1006 18:49:25.540480 scan_bus: scanning of bus PCI: 00:1e.2 took 14019 usecs
1007 18:49:25.543711 PCI: 00:1e.3 scanning...
1008 18:49:25.547060 scan_generic_bus for PCI: 00:1e.3
1009 18:49:25.553893 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1010 18:49:25.557578 scan_generic_bus for PCI: 00:1e.3 done
1011 18:49:25.560217 scan_bus: scanning of bus PCI: 00:1e.3 took 14019 usecs
1012 18:49:25.563750 PCI: 00:1f.0 scanning...
1013 18:49:25.566969 scan_static_bus for PCI: 00:1f.0
1014 18:49:25.570451 PNP: 0c09.0 enabled
1015 18:49:25.573740 scan_static_bus for PCI: 00:1f.0 done
1016 18:49:25.580307 scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
1017 18:49:25.580391 PCI: 00:1f.3 scanning...
1018 18:49:25.586908 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1019 18:49:25.590424 PCI: 00:1f.4 scanning...
1020 18:49:25.593664 scan_generic_bus for PCI: 00:1f.4
1021 18:49:25.597054 scan_generic_bus for PCI: 00:1f.4 done
1022 18:49:25.603719 scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs
1023 18:49:25.606682 PCI: 00:1f.5 scanning...
1024 18:49:25.610242 scan_generic_bus for PCI: 00:1f.5
1025 18:49:25.613486 scan_generic_bus for PCI: 00:1f.5 done
1026 18:49:25.620405 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1027 18:49:25.623352 scan_bus: scanning of bus DOMAIN: 0000 took 605285 usecs
1028 18:49:25.626614 scan_static_bus for Root Device done
1029 18:49:25.633282 scan_bus: scanning of bus Root Device took 625175 usecs
1030 18:49:25.633365 done
1031 18:49:25.636454 Chrome EC: UHEPI supported
1032 18:49:25.643412 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1033 18:49:25.650035 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1034 18:49:25.656745 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1035 18:49:25.663131 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1036 18:49:25.666822 SPI flash protection: WPSW=0 SRP0=0
1037 18:49:25.670043 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1038 18:49:25.676570 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1039 18:49:25.679896 found VGA at PCI: 00:02.0
1040 18:49:25.683327 Setting up VGA for PCI: 00:02.0
1041 18:49:25.686290 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1042 18:49:25.693135 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1043 18:49:25.696542 Allocating resources...
1044 18:49:25.696625 Reading resources...
1045 18:49:25.702762 Root Device read_resources bus 0 link: 0
1046 18:49:25.706387 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1047 18:49:25.709607 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1048 18:49:25.716434 DOMAIN: 0000 read_resources bus 0 link: 0
1049 18:49:25.722960 PCI: 00:14.0 read_resources bus 0 link: 0
1050 18:49:25.726412 USB0 port 0 read_resources bus 0 link: 0
1051 18:49:25.733702 USB0 port 0 read_resources bus 0 link: 0 done
1052 18:49:25.737034 PCI: 00:14.0 read_resources bus 0 link: 0 done
1053 18:49:25.744810 PCI: 00:15.0 read_resources bus 1 link: 0
1054 18:49:25.747579 PCI: 00:15.0 read_resources bus 1 link: 0 done
1055 18:49:25.754748 PCI: 00:15.1 read_resources bus 2 link: 0
1056 18:49:25.757644 PCI: 00:15.1 read_resources bus 2 link: 0 done
1057 18:49:25.765082 PCI: 00:19.0 read_resources bus 3 link: 0
1058 18:49:25.771677 PCI: 00:19.0 read_resources bus 3 link: 0 done
1059 18:49:25.775003 PCI: 00:1d.0 read_resources bus 1 link: 0
1060 18:49:25.782029 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1061 18:49:25.785195 PCI: 00:1e.2 read_resources bus 4 link: 0
1062 18:49:25.791774 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1063 18:49:25.794975 PCI: 00:1e.3 read_resources bus 5 link: 0
1064 18:49:25.801448 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1065 18:49:25.805055 PCI: 00:1f.0 read_resources bus 0 link: 0
1066 18:49:25.811737 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1067 18:49:25.818039 DOMAIN: 0000 read_resources bus 0 link: 0 done
1068 18:49:25.821468 Root Device read_resources bus 0 link: 0 done
1069 18:49:25.824995 Done reading resources.
1070 18:49:25.828263 Show resources in subtree (Root Device)...After reading.
1071 18:49:25.834776 Root Device child on link 0 CPU_CLUSTER: 0
1072 18:49:25.838287 CPU_CLUSTER: 0 child on link 0 APIC: 00
1073 18:49:25.838369 APIC: 00
1074 18:49:25.841791 APIC: 04
1075 18:49:25.841873 APIC: 07
1076 18:49:25.844814 APIC: 01
1077 18:49:25.844895 APIC: 05
1078 18:49:25.844960 APIC: 06
1079 18:49:25.847927 APIC: 02
1080 18:49:25.848036 APIC: 03
1081 18:49:25.851657 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1082 18:49:25.861594 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1083 18:49:25.871308 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1084 18:49:25.875163 PCI: 00:00.0
1085 18:49:25.924417 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1086 18:49:25.924696 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1087 18:49:25.925778 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1088 18:49:25.926230 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1089 18:49:25.927082 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1090 18:49:25.947533 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1091 18:49:25.948400 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1092 18:49:25.950883 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1093 18:49:25.957479 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1094 18:49:25.967490 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1095 18:49:25.977156 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1096 18:49:25.987195 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1097 18:49:25.994124 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1098 18:49:26.003868 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1099 18:49:26.013796 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1100 18:49:26.023668 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1101 18:49:26.023755 PCI: 00:02.0
1102 18:49:26.037021 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1103 18:49:26.047090 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1104 18:49:26.053690 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1105 18:49:26.056864 PCI: 00:04.0
1106 18:49:26.056942 PCI: 00:08.0
1107 18:49:26.066919 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1108 18:49:26.069887 PCI: 00:12.0
1109 18:49:26.080539 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 18:49:26.083607 PCI: 00:14.0 child on link 0 USB0 port 0
1111 18:49:26.093500 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1112 18:49:26.096482 USB0 port 0 child on link 0 USB2 port 0
1113 18:49:26.099817 USB2 port 0
1114 18:49:26.099888 USB2 port 1
1115 18:49:26.103184 USB2 port 2
1116 18:49:26.103255 USB2 port 3
1117 18:49:26.106286 USB2 port 5
1118 18:49:26.110028 USB2 port 6
1119 18:49:26.110097 USB2 port 9
1120 18:49:26.113169 USB3 port 0
1121 18:49:26.113238 USB3 port 1
1122 18:49:26.116271 USB3 port 2
1123 18:49:26.116340 USB3 port 3
1124 18:49:26.119672 USB3 port 4
1125 18:49:26.119740 PCI: 00:14.2
1126 18:49:26.129841 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1127 18:49:26.139797 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 18:49:26.142874 PCI: 00:14.3
1129 18:49:26.153044 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1130 18:49:26.156322 PCI: 00:15.0 child on link 0 I2C: 01:15
1131 18:49:26.166221 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 18:49:26.166299 I2C: 01:15
1133 18:49:26.173079 PCI: 00:15.1 child on link 0 I2C: 02:5d
1134 18:49:26.183009 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 18:49:26.183091 I2C: 02:5d
1136 18:49:26.186207 GENERIC: 0.0
1137 18:49:26.186281 PCI: 00:16.0
1138 18:49:26.196565 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 18:49:26.199425 PCI: 00:17.0
1140 18:49:26.206066 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1141 18:49:26.215942 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1142 18:49:26.225913 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1143 18:49:26.232459 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1144 18:49:26.242704 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1145 18:49:26.248999 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1146 18:49:26.255472 PCI: 00:19.0 child on link 0 I2C: 03:1a
1147 18:49:26.265657 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 18:49:26.265735 I2C: 03:1a
1149 18:49:26.269301 I2C: 03:38
1150 18:49:26.269373 I2C: 03:39
1151 18:49:26.272273 I2C: 03:3a
1152 18:49:26.272341 I2C: 03:3b
1153 18:49:26.275676 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1154 18:49:26.285430 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1155 18:49:26.295733 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1156 18:49:26.305361 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1157 18:49:26.305442 PCI: 01:00.0
1158 18:49:26.315742 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 18:49:26.318724 PCI: 00:1e.0
1160 18:49:26.328670 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1161 18:49:26.338704 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 18:49:26.342153 PCI: 00:1e.2 child on link 0 SPI: 00
1163 18:49:26.351832 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 18:49:26.355298 SPI: 00
1165 18:49:26.358872 PCI: 00:1e.3 child on link 0 SPI: 01
1166 18:49:26.368351 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 18:49:26.368437 SPI: 01
1168 18:49:26.375501 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1169 18:49:26.381804 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1170 18:49:26.391352 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1171 18:49:26.391430 PNP: 0c09.0
1172 18:49:26.401565 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1173 18:49:26.401645 PCI: 00:1f.3
1174 18:49:26.411666 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 18:49:26.424949 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1176 18:49:26.425028 PCI: 00:1f.4
1177 18:49:26.434536 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1178 18:49:26.444600 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1179 18:49:26.444683 PCI: 00:1f.5
1180 18:49:26.454591 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 18:49:26.461397 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1182 18:49:26.467918 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1183 18:49:26.474322 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1184 18:49:26.478301 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1185 18:49:26.481536 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1186 18:49:26.484880 PCI: 00:17.0 18 * [0x60 - 0x67] io
1187 18:49:26.487893 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1188 18:49:26.494390 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1189 18:49:26.501628 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1190 18:49:26.511008 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1191 18:49:26.517482 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1192 18:49:26.524521 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1193 18:49:26.527496 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1194 18:49:26.537368 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1195 18:49:26.540841 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1196 18:49:26.547693 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1197 18:49:26.550924 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1198 18:49:26.557526 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1199 18:49:26.560639 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1200 18:49:26.564343 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1201 18:49:26.571098 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1202 18:49:26.574329 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1203 18:49:26.580580 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1204 18:49:26.584253 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1205 18:49:26.590928 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1206 18:49:26.594270 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1207 18:49:26.600814 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1208 18:49:26.603935 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1209 18:49:26.610757 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1210 18:49:26.614067 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1211 18:49:26.620532 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1212 18:49:26.623774 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1213 18:49:26.627157 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1214 18:49:26.634280 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1215 18:49:26.637154 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1216 18:49:26.644114 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1217 18:49:26.647119 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1218 18:49:26.657254 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1219 18:49:26.660350 avoid_fixed_resources: DOMAIN: 0000
1220 18:49:26.667045 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1221 18:49:26.673597 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1222 18:49:26.680438 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1223 18:49:26.686845 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1224 18:49:26.696953 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1225 18:49:26.703640 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1226 18:49:26.709927 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1227 18:49:26.716433 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1228 18:49:26.726696 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1229 18:49:26.733312 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1230 18:49:26.740057 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1231 18:49:26.746364 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1232 18:49:26.749951 Setting resources...
1233 18:49:26.756232 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1234 18:49:26.759690 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1235 18:49:26.763278 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1236 18:49:26.769501 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1237 18:49:26.773002 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1238 18:49:26.779573 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1239 18:49:26.786601 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 18:49:26.793054 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 18:49:26.799854 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1242 18:49:26.802882 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 18:49:26.809447 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 18:49:26.813077 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 18:49:26.819461 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1246 18:49:26.822823 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1247 18:49:26.829428 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1248 18:49:26.832605 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1249 18:49:26.839333 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1250 18:49:26.842596 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1251 18:49:26.849326 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1252 18:49:26.852535 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1253 18:49:26.856276 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1254 18:49:26.862474 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1255 18:49:26.865712 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1256 18:49:26.872333 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1257 18:49:26.876021 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1258 18:49:26.882535 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1259 18:49:26.886134 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1260 18:49:26.892394 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1261 18:49:26.895642 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1262 18:49:26.902090 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1263 18:49:26.905835 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1264 18:49:26.912579 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1265 18:49:26.918875 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1266 18:49:26.925343 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 18:49:26.931768 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 18:49:26.941756 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1269 18:49:26.945507 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1270 18:49:26.951891 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1271 18:49:26.958717 Root Device assign_resources, bus 0 link: 0
1272 18:49:26.961938 DOMAIN: 0000 assign_resources, bus 0 link: 0
1273 18:49:26.971781 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1274 18:49:26.978172 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1275 18:49:26.988498 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1276 18:49:26.994808 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1277 18:49:27.004539 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1278 18:49:27.011451 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1279 18:49:27.014557 PCI: 00:14.0 assign_resources, bus 0 link: 0
1280 18:49:27.021752 PCI: 00:14.0 assign_resources, bus 0 link: 0
1281 18:49:27.027833 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1282 18:49:27.037708 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1283 18:49:27.044594 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1284 18:49:27.054677 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1285 18:49:27.057845 PCI: 00:15.0 assign_resources, bus 1 link: 0
1286 18:49:27.064852 PCI: 00:15.0 assign_resources, bus 1 link: 0
1287 18:49:27.070882 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1288 18:49:27.074773 PCI: 00:15.1 assign_resources, bus 2 link: 0
1289 18:49:27.081282 PCI: 00:15.1 assign_resources, bus 2 link: 0
1290 18:49:27.087658 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1291 18:49:27.097866 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1292 18:49:27.104009 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1293 18:49:27.110565 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1294 18:49:27.120777 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1295 18:49:27.127142 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1296 18:49:27.133695 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1297 18:49:27.143933 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1298 18:49:27.147163 PCI: 00:19.0 assign_resources, bus 3 link: 0
1299 18:49:27.154106 PCI: 00:19.0 assign_resources, bus 3 link: 0
1300 18:49:27.160347 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1301 18:49:27.170600 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1302 18:49:27.180304 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1303 18:49:27.183893 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1304 18:49:27.190299 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1305 18:49:27.197019 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1306 18:49:27.203767 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1307 18:49:27.213468 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1308 18:49:27.216613 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1309 18:49:27.223959 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1310 18:49:27.230082 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1311 18:49:27.236349 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1312 18:49:27.240119 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1313 18:49:27.243335 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1314 18:49:27.250446 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1315 18:49:27.253562 LPC: Trying to open IO window from 800 size 1ff
1316 18:49:27.263391 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1317 18:49:27.270289 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1318 18:49:27.280324 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1319 18:49:27.287367 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1320 18:49:27.293466 DOMAIN: 0000 assign_resources, bus 0 link: 0
1321 18:49:27.297185 Root Device assign_resources, bus 0 link: 0
1322 18:49:27.299833 Done setting resources.
1323 18:49:27.306586 Show resources in subtree (Root Device)...After assigning values.
1324 18:49:27.309617 Root Device child on link 0 CPU_CLUSTER: 0
1325 18:49:27.312956 CPU_CLUSTER: 0 child on link 0 APIC: 00
1326 18:49:27.316453 APIC: 00
1327 18:49:27.316524 APIC: 04
1328 18:49:27.316585 APIC: 07
1329 18:49:27.319719 APIC: 01
1330 18:49:27.319787 APIC: 05
1331 18:49:27.323424 APIC: 06
1332 18:49:27.323494 APIC: 02
1333 18:49:27.323553 APIC: 03
1334 18:49:27.329915 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1335 18:49:27.339342 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1336 18:49:27.349667 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1337 18:49:27.349743 PCI: 00:00.0
1338 18:49:27.359259 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1339 18:49:27.369127 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1340 18:49:27.379260 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1341 18:49:27.389116 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1342 18:49:27.398772 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1343 18:49:27.409078 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1344 18:49:27.415385 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1345 18:49:27.425558 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1346 18:49:27.435293 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1347 18:49:27.445808 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1348 18:49:27.455807 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1349 18:49:27.462068 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1350 18:49:27.471701 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1351 18:49:27.481765 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1352 18:49:27.491936 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1353 18:49:27.501813 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1354 18:49:27.501897 PCI: 00:02.0
1355 18:49:27.515369 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1356 18:49:27.524893 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1357 18:49:27.534319 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1358 18:49:27.534426 PCI: 00:04.0
1359 18:49:27.537684 PCI: 00:08.0
1360 18:49:27.547994 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1361 18:49:27.548130 PCI: 00:12.0
1362 18:49:27.557861 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1363 18:49:27.564046 PCI: 00:14.0 child on link 0 USB0 port 0
1364 18:49:27.574134 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1365 18:49:27.577337 USB0 port 0 child on link 0 USB2 port 0
1366 18:49:27.581082 USB2 port 0
1367 18:49:27.581161 USB2 port 1
1368 18:49:27.584276 USB2 port 2
1369 18:49:27.584355 USB2 port 3
1370 18:49:27.587532 USB2 port 5
1371 18:49:27.587609 USB2 port 6
1372 18:49:27.590811 USB2 port 9
1373 18:49:27.590888 USB3 port 0
1374 18:49:27.594501 USB3 port 1
1375 18:49:27.594578 USB3 port 2
1376 18:49:27.597743 USB3 port 3
1377 18:49:27.597816 USB3 port 4
1378 18:49:27.600806 PCI: 00:14.2
1379 18:49:27.610957 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1380 18:49:27.620652 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1381 18:49:27.624155 PCI: 00:14.3
1382 18:49:27.634052 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1383 18:49:27.637281 PCI: 00:15.0 child on link 0 I2C: 01:15
1384 18:49:27.647162 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1385 18:49:27.650286 I2C: 01:15
1386 18:49:27.654048 PCI: 00:15.1 child on link 0 I2C: 02:5d
1387 18:49:27.663839 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1388 18:49:27.666697 I2C: 02:5d
1389 18:49:27.666797 GENERIC: 0.0
1390 18:49:27.670109 PCI: 00:16.0
1391 18:49:27.680501 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1392 18:49:27.680596 PCI: 00:17.0
1393 18:49:27.689982 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1394 18:49:27.700007 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1395 18:49:27.709688 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1396 18:49:27.719652 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1397 18:49:27.729359 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1398 18:49:27.739698 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1399 18:49:27.742605 PCI: 00:19.0 child on link 0 I2C: 03:1a
1400 18:49:27.752998 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1401 18:49:27.756193 I2C: 03:1a
1402 18:49:27.756267 I2C: 03:38
1403 18:49:27.759426 I2C: 03:39
1404 18:49:27.759527 I2C: 03:3a
1405 18:49:27.762935 I2C: 03:3b
1406 18:49:27.765988 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1407 18:49:27.775919 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1408 18:49:27.786026 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1409 18:49:27.796129 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1410 18:49:27.796214 PCI: 01:00.0
1411 18:49:27.809400 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1412 18:49:27.809483 PCI: 00:1e.0
1413 18:49:27.819104 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 18:49:27.828720 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1415 18:49:27.835622 PCI: 00:1e.2 child on link 0 SPI: 00
1416 18:49:27.845318 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1417 18:49:27.845400 SPI: 00
1418 18:49:27.848482 PCI: 00:1e.3 child on link 0 SPI: 01
1419 18:49:27.862391 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1420 18:49:27.862476 SPI: 01
1421 18:49:27.865254 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1422 18:49:27.875285 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1423 18:49:27.885060 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1424 18:49:27.885142 PNP: 0c09.0
1425 18:49:27.895053 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1426 18:49:27.895164 PCI: 00:1f.3
1427 18:49:27.905059 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1428 18:49:27.914929 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1429 18:49:27.917914 PCI: 00:1f.4
1430 18:49:27.928171 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1431 18:49:27.938223 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1432 18:49:27.938305 PCI: 00:1f.5
1433 18:49:27.947860 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1434 18:49:27.951422 Done allocating resources.
1435 18:49:27.958008 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1436 18:49:27.961073 Enabling resources...
1437 18:49:27.964489 PCI: 00:00.0 subsystem <- 8086/9b61
1438 18:49:27.967784 PCI: 00:00.0 cmd <- 06
1439 18:49:27.971106 PCI: 00:02.0 subsystem <- 8086/9b41
1440 18:49:27.974178 PCI: 00:02.0 cmd <- 03
1441 18:49:27.974248 PCI: 00:08.0 cmd <- 06
1442 18:49:27.981298 PCI: 00:12.0 subsystem <- 8086/02f9
1443 18:49:27.981399 PCI: 00:12.0 cmd <- 02
1444 18:49:27.984893 PCI: 00:14.0 subsystem <- 8086/02ed
1445 18:49:27.988137 PCI: 00:14.0 cmd <- 02
1446 18:49:27.991337 PCI: 00:14.2 cmd <- 02
1447 18:49:27.994568 PCI: 00:14.3 subsystem <- 8086/02f0
1448 18:49:27.997728 PCI: 00:14.3 cmd <- 02
1449 18:49:28.001299 PCI: 00:15.0 subsystem <- 8086/02e8
1450 18:49:28.004772 PCI: 00:15.0 cmd <- 02
1451 18:49:28.007774 PCI: 00:15.1 subsystem <- 8086/02e9
1452 18:49:28.010934 PCI: 00:15.1 cmd <- 02
1453 18:49:28.014222 PCI: 00:16.0 subsystem <- 8086/02e0
1454 18:49:28.017559 PCI: 00:16.0 cmd <- 02
1455 18:49:28.020646 PCI: 00:17.0 subsystem <- 8086/02d3
1456 18:49:28.020715 PCI: 00:17.0 cmd <- 03
1457 18:49:28.027805 PCI: 00:19.0 subsystem <- 8086/02c5
1458 18:49:28.027954 PCI: 00:19.0 cmd <- 02
1459 18:49:28.031418 PCI: 00:1d.0 bridge ctrl <- 0013
1460 18:49:28.034608 PCI: 00:1d.0 subsystem <- 8086/02b0
1461 18:49:28.037994 PCI: 00:1d.0 cmd <- 06
1462 18:49:28.040852 PCI: 00:1e.0 subsystem <- 8086/02a8
1463 18:49:28.044523 PCI: 00:1e.0 cmd <- 06
1464 18:49:28.047588 PCI: 00:1e.2 subsystem <- 8086/02aa
1465 18:49:28.050917 PCI: 00:1e.2 cmd <- 06
1466 18:49:28.054251 PCI: 00:1e.3 subsystem <- 8086/02ab
1467 18:49:28.057720 PCI: 00:1e.3 cmd <- 02
1468 18:49:28.060806 PCI: 00:1f.0 subsystem <- 8086/0284
1469 18:49:28.064237 PCI: 00:1f.0 cmd <- 407
1470 18:49:28.067457 PCI: 00:1f.3 subsystem <- 8086/02c8
1471 18:49:28.070693 PCI: 00:1f.3 cmd <- 02
1472 18:49:28.073891 PCI: 00:1f.4 subsystem <- 8086/02a3
1473 18:49:28.077569 PCI: 00:1f.4 cmd <- 03
1474 18:49:28.080776 PCI: 00:1f.5 subsystem <- 8086/02a4
1475 18:49:28.083807 PCI: 00:1f.5 cmd <- 406
1476 18:49:28.091650 PCI: 01:00.0 cmd <- 02
1477 18:49:28.096111 done.
1478 18:49:28.107720 ME: Version: 14.0.39.1367
1479 18:49:28.114537 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1480 18:49:28.117534 Initializing devices...
1481 18:49:28.117610 Root Device init ...
1482 18:49:28.124492 Chrome EC: Set SMI mask to 0x0000000000000000
1483 18:49:28.127771 Chrome EC: clear events_b mask to 0x0000000000000000
1484 18:49:28.134138 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1485 18:49:28.140697 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1486 18:49:28.147430 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1487 18:49:28.150685 Chrome EC: Set WAKE mask to 0x0000000000000000
1488 18:49:28.153881 Root Device init finished in 35164 usecs
1489 18:49:28.157551 CPU_CLUSTER: 0 init ...
1490 18:49:28.164377 CPU_CLUSTER: 0 init finished in 2446 usecs
1491 18:49:28.168320 PCI: 00:00.0 init ...
1492 18:49:28.171559 CPU TDP: 15 Watts
1493 18:49:28.175311 CPU PL2 = 64 Watts
1494 18:49:28.178280 PCI: 00:00.0 init finished in 7080 usecs
1495 18:49:28.181772 PCI: 00:02.0 init ...
1496 18:49:28.185448 PCI: 00:02.0 init finished in 2253 usecs
1497 18:49:28.188332 PCI: 00:08.0 init ...
1498 18:49:28.191676 PCI: 00:08.0 init finished in 2252 usecs
1499 18:49:28.195355 PCI: 00:12.0 init ...
1500 18:49:28.198231 PCI: 00:12.0 init finished in 2250 usecs
1501 18:49:28.201306 PCI: 00:14.0 init ...
1502 18:49:28.205147 PCI: 00:14.0 init finished in 2242 usecs
1503 18:49:28.208364 PCI: 00:14.2 init ...
1504 18:49:28.211410 PCI: 00:14.2 init finished in 2250 usecs
1505 18:49:28.214946 PCI: 00:14.3 init ...
1506 18:49:28.218071 PCI: 00:14.3 init finished in 2268 usecs
1507 18:49:28.221819 PCI: 00:15.0 init ...
1508 18:49:28.225025 DW I2C bus 0 at 0xd121f000 (400 KHz)
1509 18:49:28.227997 PCI: 00:15.0 init finished in 5975 usecs
1510 18:49:28.231601 PCI: 00:15.1 init ...
1511 18:49:28.235294 DW I2C bus 1 at 0xd1220000 (400 KHz)
1512 18:49:28.238183 PCI: 00:15.1 init finished in 5977 usecs
1513 18:49:28.241835 PCI: 00:16.0 init ...
1514 18:49:28.245117 PCI: 00:16.0 init finished in 2251 usecs
1515 18:49:28.249026 PCI: 00:19.0 init ...
1516 18:49:28.252164 DW I2C bus 4 at 0xd1222000 (400 KHz)
1517 18:49:28.259130 PCI: 00:19.0 init finished in 5975 usecs
1518 18:49:28.259204 PCI: 00:1d.0 init ...
1519 18:49:28.262121 Initializing PCH PCIe bridge.
1520 18:49:28.265303 PCI: 00:1d.0 init finished in 5282 usecs
1521 18:49:28.270431 PCI: 00:1f.0 init ...
1522 18:49:28.273803 IOAPIC: Initializing IOAPIC at 0xfec00000
1523 18:49:28.280225 IOAPIC: Bootstrap Processor Local APIC = 0x00
1524 18:49:28.280320 IOAPIC: ID = 0x02
1525 18:49:28.283600 IOAPIC: Dumping registers
1526 18:49:28.286745 reg 0x0000: 0x02000000
1527 18:49:28.289954 reg 0x0001: 0x00770020
1528 18:49:28.290051 reg 0x0002: 0x00000000
1529 18:49:28.297120 PCI: 00:1f.0 init finished in 23533 usecs
1530 18:49:28.300594 PCI: 00:1f.4 init ...
1531 18:49:28.303557 PCI: 00:1f.4 init finished in 2262 usecs
1532 18:49:28.314444 PCI: 01:00.0 init ...
1533 18:49:28.317584 PCI: 01:00.0 init finished in 2251 usecs
1534 18:49:28.322308 PNP: 0c09.0 init ...
1535 18:49:28.325262 Google Chrome EC uptime: 11.110 seconds
1536 18:49:28.332106 Google Chrome AP resets since EC boot: 0
1537 18:49:28.335620 Google Chrome most recent AP reset causes:
1538 18:49:28.341714 Google Chrome EC reset flags at last EC boot: reset-pin
1539 18:49:28.345740 PNP: 0c09.0 init finished in 20564 usecs
1540 18:49:28.348904 Devices initialized
1541 18:49:28.349002 Show all devs... After init.
1542 18:49:28.352178 Root Device: enabled 1
1543 18:49:28.355175 CPU_CLUSTER: 0: enabled 1
1544 18:49:28.358531 DOMAIN: 0000: enabled 1
1545 18:49:28.358627 APIC: 00: enabled 1
1546 18:49:28.361970 PCI: 00:00.0: enabled 1
1547 18:49:28.365484 PCI: 00:02.0: enabled 1
1548 18:49:28.368379 PCI: 00:04.0: enabled 0
1549 18:49:28.368460 PCI: 00:05.0: enabled 0
1550 18:49:28.372028 PCI: 00:12.0: enabled 1
1551 18:49:28.375098 PCI: 00:12.5: enabled 0
1552 18:49:28.375195 PCI: 00:12.6: enabled 0
1553 18:49:28.378258 PCI: 00:14.0: enabled 1
1554 18:49:28.382052 PCI: 00:14.1: enabled 0
1555 18:49:28.385279 PCI: 00:14.3: enabled 1
1556 18:49:28.385387 PCI: 00:14.5: enabled 0
1557 18:49:28.388345 PCI: 00:15.0: enabled 1
1558 18:49:28.391589 PCI: 00:15.1: enabled 1
1559 18:49:28.394861 PCI: 00:15.2: enabled 0
1560 18:49:28.394951 PCI: 00:15.3: enabled 0
1561 18:49:28.398307 PCI: 00:16.0: enabled 1
1562 18:49:28.401537 PCI: 00:16.1: enabled 0
1563 18:49:28.405349 PCI: 00:16.2: enabled 0
1564 18:49:28.405429 PCI: 00:16.3: enabled 0
1565 18:49:28.408373 PCI: 00:16.4: enabled 0
1566 18:49:28.411607 PCI: 00:16.5: enabled 0
1567 18:49:28.415085 PCI: 00:17.0: enabled 1
1568 18:49:28.415185 PCI: 00:19.0: enabled 1
1569 18:49:28.418027 PCI: 00:19.1: enabled 0
1570 18:49:28.421226 PCI: 00:19.2: enabled 0
1571 18:49:28.421322 PCI: 00:1a.0: enabled 0
1572 18:49:28.424985 PCI: 00:1c.0: enabled 0
1573 18:49:28.428128 PCI: 00:1c.1: enabled 0
1574 18:49:28.431523 PCI: 00:1c.2: enabled 0
1575 18:49:28.431601 PCI: 00:1c.3: enabled 0
1576 18:49:28.434553 PCI: 00:1c.4: enabled 0
1577 18:49:28.438304 PCI: 00:1c.5: enabled 0
1578 18:49:28.441436 PCI: 00:1c.6: enabled 0
1579 18:49:28.441539 PCI: 00:1c.7: enabled 0
1580 18:49:28.444263 PCI: 00:1d.0: enabled 1
1581 18:49:28.447727 PCI: 00:1d.1: enabled 0
1582 18:49:28.451008 PCI: 00:1d.2: enabled 0
1583 18:49:28.451108 PCI: 00:1d.3: enabled 0
1584 18:49:28.454548 PCI: 00:1d.4: enabled 0
1585 18:49:28.457782 PCI: 00:1d.5: enabled 0
1586 18:49:28.457887 PCI: 00:1e.0: enabled 1
1587 18:49:28.460790 PCI: 00:1e.1: enabled 0
1588 18:49:28.464272 PCI: 00:1e.2: enabled 1
1589 18:49:28.467708 PCI: 00:1e.3: enabled 1
1590 18:49:28.467812 PCI: 00:1f.0: enabled 1
1591 18:49:28.470969 PCI: 00:1f.1: enabled 0
1592 18:49:28.474266 PCI: 00:1f.2: enabled 0
1593 18:49:28.477344 PCI: 00:1f.3: enabled 1
1594 18:49:28.477445 PCI: 00:1f.4: enabled 1
1595 18:49:28.480951 PCI: 00:1f.5: enabled 1
1596 18:49:28.484835 PCI: 00:1f.6: enabled 0
1597 18:49:28.487328 USB0 port 0: enabled 1
1598 18:49:28.487440 I2C: 01:15: enabled 1
1599 18:49:28.490793 I2C: 02:5d: enabled 1
1600 18:49:28.493944 GENERIC: 0.0: enabled 1
1601 18:49:28.494041 I2C: 03:1a: enabled 1
1602 18:49:28.497620 I2C: 03:38: enabled 1
1603 18:49:28.501052 I2C: 03:39: enabled 1
1604 18:49:28.501147 I2C: 03:3a: enabled 1
1605 18:49:28.504082 I2C: 03:3b: enabled 1
1606 18:49:28.507556 PCI: 00:00.0: enabled 1
1607 18:49:28.507650 SPI: 00: enabled 1
1608 18:49:28.511062 SPI: 01: enabled 1
1609 18:49:28.514024 PNP: 0c09.0: enabled 1
1610 18:49:28.514121 USB2 port 0: enabled 1
1611 18:49:28.517399 USB2 port 1: enabled 1
1612 18:49:28.520767 USB2 port 2: enabled 0
1613 18:49:28.520839 USB2 port 3: enabled 0
1614 18:49:28.523848 USB2 port 5: enabled 0
1615 18:49:28.526987 USB2 port 6: enabled 1
1616 18:49:28.530703 USB2 port 9: enabled 1
1617 18:49:28.530802 USB3 port 0: enabled 1
1618 18:49:28.533815 USB3 port 1: enabled 1
1619 18:49:28.537353 USB3 port 2: enabled 1
1620 18:49:28.537424 USB3 port 3: enabled 1
1621 18:49:28.540620 USB3 port 4: enabled 0
1622 18:49:28.543800 APIC: 04: enabled 1
1623 18:49:28.543869 APIC: 07: enabled 1
1624 18:49:28.546984 APIC: 01: enabled 1
1625 18:49:28.550706 APIC: 05: enabled 1
1626 18:49:28.550805 APIC: 06: enabled 1
1627 18:49:28.553492 APIC: 02: enabled 1
1628 18:49:28.553594 APIC: 03: enabled 1
1629 18:49:28.557179 PCI: 00:08.0: enabled 1
1630 18:49:28.560146 PCI: 00:14.2: enabled 1
1631 18:49:28.563701 PCI: 01:00.0: enabled 1
1632 18:49:28.566997 Disabling ACPI via APMC:
1633 18:49:28.567070 done.
1634 18:49:28.573730 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1635 18:49:28.577671 ELOG: NV offset 0xaf0000 size 0x4000
1636 18:49:28.583808 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1637 18:49:28.590170 ELOG: Event(17) added with size 13 at 2024-03-01 18:49:28 UTC
1638 18:49:28.597421 ELOG: Event(92) added with size 9 at 2024-03-01 18:49:28 UTC
1639 18:49:28.603757 ELOG: Event(93) added with size 9 at 2024-03-01 18:49:28 UTC
1640 18:49:28.610583 ELOG: Event(9A) added with size 9 at 2024-03-01 18:49:28 UTC
1641 18:49:28.616751 ELOG: Event(9E) added with size 10 at 2024-03-01 18:49:28 UTC
1642 18:49:28.623224 ELOG: Event(9F) added with size 14 at 2024-03-01 18:49:28 UTC
1643 18:49:28.626441 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1644 18:49:28.633830 ELOG: Event(A1) added with size 10 at 2024-03-01 18:49:28 UTC
1645 18:49:28.643671 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1646 18:49:28.650142 ELOG: Event(A0) added with size 9 at 2024-03-01 18:49:28 UTC
1647 18:49:28.653940 elog_add_boot_reason: Logged dev mode boot
1648 18:49:28.656914 Finalize devices...
1649 18:49:28.656989 PCI: 00:17.0 final
1650 18:49:28.660124 Devices finalized
1651 18:49:28.663352 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1652 18:49:28.670318 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1653 18:49:28.673423 ME: HFSTS1 : 0x90000245
1654 18:49:28.676711 ME: HFSTS2 : 0x3B850126
1655 18:49:28.683266 ME: HFSTS3 : 0x00000020
1656 18:49:28.686565 ME: HFSTS4 : 0x00004800
1657 18:49:28.689762 ME: HFSTS5 : 0x00000000
1658 18:49:28.692948 ME: HFSTS6 : 0x40400006
1659 18:49:28.696670 ME: Manufacturing Mode : NO
1660 18:49:28.699662 ME: FW Partition Table : OK
1661 18:49:28.702898 ME: Bringup Loader Failure : NO
1662 18:49:28.706254 ME: Firmware Init Complete : YES
1663 18:49:28.709556 ME: Boot Options Present : NO
1664 18:49:28.712766 ME: Update In Progress : NO
1665 18:49:28.716007 ME: D0i3 Support : YES
1666 18:49:28.719411 ME: Low Power State Enabled : NO
1667 18:49:28.723022 ME: CPU Replaced : NO
1668 18:49:28.726225 ME: CPU Replacement Valid : YES
1669 18:49:28.729717 ME: Current Working State : 5
1670 18:49:28.732936 ME: Current Operation State : 1
1671 18:49:28.735984 ME: Current Operation Mode : 0
1672 18:49:28.739475 ME: Error Code : 0
1673 18:49:28.742814 ME: CPU Debug Disabled : YES
1674 18:49:28.745936 ME: TXT Support : NO
1675 18:49:28.753097 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1676 18:49:28.759569 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1677 18:49:28.759671 CBFS @ c08000 size 3f8000
1678 18:49:28.765563 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1679 18:49:28.769339 CBFS: Locating 'fallback/dsdt.aml'
1680 18:49:28.775581 CBFS: Found @ offset 10bb80 size 3fa5
1681 18:49:28.778800 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1682 18:49:28.782583 CBFS @ c08000 size 3f8000
1683 18:49:28.789053 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1684 18:49:28.792082 CBFS: Locating 'fallback/slic'
1685 18:49:28.795568 CBFS: 'fallback/slic' not found.
1686 18:49:28.798611 ACPI: Writing ACPI tables at 99b3e000.
1687 18:49:28.802273 ACPI: * FACS
1688 18:49:28.802351 ACPI: * DSDT
1689 18:49:28.805421 Ramoops buffer: 0x100000@0x99a3d000.
1690 18:49:28.811938 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1691 18:49:28.815209 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1692 18:49:28.818420 Google Chrome EC: version:
1693 18:49:28.822131 ro: helios_v2.0.2659-56403530b
1694 18:49:28.825277 rw: helios_v2.0.2849-c41de27e7d
1695 18:49:28.828460 running image: 1
1696 18:49:28.831706 ACPI: * FADT
1697 18:49:28.831787 SCI is IRQ9
1698 18:49:28.835098 ACPI: added table 1/32, length now 40
1699 18:49:28.838853 ACPI: * SSDT
1700 18:49:28.841970 Found 1 CPU(s) with 8 core(s) each.
1701 18:49:28.845117 Error: Could not locate 'wifi_sar' in VPD.
1702 18:49:28.851658 Checking CBFS for default SAR values
1703 18:49:28.854814 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 18:49:28.858066 CBFS @ c08000 size 3f8000
1705 18:49:28.865009 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 18:49:28.868224 CBFS: Locating 'wifi_sar_defaults.hex'
1707 18:49:28.871543 CBFS: Found @ offset 5fac0 size 77
1708 18:49:28.874567 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1709 18:49:28.881527 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1710 18:49:28.884639 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1711 18:49:28.891672 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1712 18:49:28.894827 failed to find key in VPD: dsm_calib_r0_0
1713 18:49:28.904867 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1714 18:49:28.907728 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1715 18:49:28.911057 failed to find key in VPD: dsm_calib_r0_1
1716 18:49:28.921094 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1717 18:49:28.927995 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1718 18:49:28.931384 failed to find key in VPD: dsm_calib_r0_2
1719 18:49:28.941108 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1720 18:49:28.944419 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1721 18:49:28.950637 failed to find key in VPD: dsm_calib_r0_3
1722 18:49:28.957493 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1723 18:49:28.963965 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1724 18:49:28.967721 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1725 18:49:28.971309 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1726 18:49:28.974681 EC returned error result code 1
1727 18:49:28.978641 EC returned error result code 1
1728 18:49:28.982332 EC returned error result code 1
1729 18:49:28.988661 PS2K: Bad resp from EC. Vivaldi disabled!
1730 18:49:28.991978 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1731 18:49:28.998744 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1732 18:49:29.005696 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1733 18:49:29.008544 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1734 18:49:29.015295 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1735 18:49:29.021992 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1736 18:49:29.028591 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1737 18:49:29.032014 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1738 18:49:29.038625 ACPI: added table 2/32, length now 44
1739 18:49:29.038706 ACPI: * MCFG
1740 18:49:29.041786 ACPI: added table 3/32, length now 48
1741 18:49:29.045112 ACPI: * TPM2
1742 18:49:29.048147 TPM2 log created at 99a2d000
1743 18:49:29.051328 ACPI: added table 4/32, length now 52
1744 18:49:29.051405 ACPI: * MADT
1745 18:49:29.055113 SCI is IRQ9
1746 18:49:29.058472 ACPI: added table 5/32, length now 56
1747 18:49:29.058544 current = 99b43ac0
1748 18:49:29.061783 ACPI: * DMAR
1749 18:49:29.064782 ACPI: added table 6/32, length now 60
1750 18:49:29.067904 ACPI: * IGD OpRegion
1751 18:49:29.068015 GMA: Found VBT in CBFS
1752 18:49:29.071350 GMA: Found valid VBT in CBFS
1753 18:49:29.075009 ACPI: added table 7/32, length now 64
1754 18:49:29.078079 ACPI: * HPET
1755 18:49:29.081043 ACPI: added table 8/32, length now 68
1756 18:49:29.081157 ACPI: done.
1757 18:49:29.084818 ACPI tables: 31744 bytes.
1758 18:49:29.087960 smbios_write_tables: 99a2c000
1759 18:49:29.091507 EC returned error result code 3
1760 18:49:29.094823 Couldn't obtain OEM name from CBI
1761 18:49:29.098265 Create SMBIOS type 17
1762 18:49:29.101292 PCI: 00:00.0 (Intel Cannonlake)
1763 18:49:29.104451 PCI: 00:14.3 (Intel WiFi)
1764 18:49:29.107953 SMBIOS tables: 939 bytes.
1765 18:49:29.111152 Writing table forward entry at 0x00000500
1766 18:49:29.118056 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1767 18:49:29.121153 Writing coreboot table at 0x99b62000
1768 18:49:29.127938 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1769 18:49:29.131032 1. 0000000000001000-000000000009ffff: RAM
1770 18:49:29.134481 2. 00000000000a0000-00000000000fffff: RESERVED
1771 18:49:29.140654 3. 0000000000100000-0000000099a2bfff: RAM
1772 18:49:29.147631 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1773 18:49:29.150876 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1774 18:49:29.157327 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1775 18:49:29.160714 7. 000000009a000000-000000009f7fffff: RESERVED
1776 18:49:29.167048 8. 00000000e0000000-00000000efffffff: RESERVED
1777 18:49:29.170951 9. 00000000fc000000-00000000fc000fff: RESERVED
1778 18:49:29.177321 10. 00000000fe000000-00000000fe00ffff: RESERVED
1779 18:49:29.180768 11. 00000000fed10000-00000000fed17fff: RESERVED
1780 18:49:29.183930 12. 00000000fed80000-00000000fed83fff: RESERVED
1781 18:49:29.190477 13. 00000000fed90000-00000000fed91fff: RESERVED
1782 18:49:29.193824 14. 00000000feda0000-00000000feda1fff: RESERVED
1783 18:49:29.200476 15. 0000000100000000-000000045e7fffff: RAM
1784 18:49:29.203476 Graphics framebuffer located at 0xc0000000
1785 18:49:29.206765 Passing 5 GPIOs to payload:
1786 18:49:29.210730 NAME | PORT | POLARITY | VALUE
1787 18:49:29.216967 write protect | undefined | high | low
1788 18:49:29.223580 lid | undefined | high | high
1789 18:49:29.227193 power | undefined | high | low
1790 18:49:29.233505 oprom | undefined | high | low
1791 18:49:29.236783 EC in RW | 0x000000cb | high | low
1792 18:49:29.240402 Board ID: 4
1793 18:49:29.243407 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1794 18:49:29.246699 CBFS @ c08000 size 3f8000
1795 18:49:29.253187 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1796 18:49:29.259971 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1797 18:49:29.260049 coreboot table: 1492 bytes.
1798 18:49:29.263459 IMD ROOT 0. 99fff000 00001000
1799 18:49:29.266624 IMD SMALL 1. 99ffe000 00001000
1800 18:49:29.270205 FSP MEMORY 2. 99c4e000 003b0000
1801 18:49:29.273334 CONSOLE 3. 99c2e000 00020000
1802 18:49:29.276557 FMAP 4. 99c2d000 0000054e
1803 18:49:29.279653 TIME STAMP 5. 99c2c000 00000910
1804 18:49:29.283474 VBOOT WORK 6. 99c18000 00014000
1805 18:49:29.286515 MRC DATA 7. 99c16000 00001958
1806 18:49:29.290116 ROMSTG STCK 8. 99c15000 00001000
1807 18:49:29.293018 AFTER CAR 9. 99c0b000 0000a000
1808 18:49:29.296402 RAMSTAGE 10. 99baf000 0005c000
1809 18:49:29.299999 REFCODE 11. 99b7a000 00035000
1810 18:49:29.303089 SMM BACKUP 12. 99b6a000 00010000
1811 18:49:29.306682 COREBOOT 13. 99b62000 00008000
1812 18:49:29.309741 ACPI 14. 99b3e000 00024000
1813 18:49:29.312916 ACPI GNVS 15. 99b3d000 00001000
1814 18:49:29.316482 RAMOOPS 16. 99a3d000 00100000
1815 18:49:29.319740 TPM2 TCGLOG17. 99a2d000 00010000
1816 18:49:29.323344 SMBIOS 18. 99a2c000 00000800
1817 18:49:29.326337 IMD small region:
1818 18:49:29.329839 IMD ROOT 0. 99ffec00 00000400
1819 18:49:29.332844 FSP RUNTIME 1. 99ffebe0 00000004
1820 18:49:29.336330 EC HOSTEVENT 2. 99ffebc0 00000008
1821 18:49:29.339783 POWER STATE 3. 99ffeb80 00000040
1822 18:49:29.343324 ROMSTAGE 4. 99ffeb60 00000004
1823 18:49:29.346656 MEM INFO 5. 99ffe9a0 000001b9
1824 18:49:29.349612 VPD 6. 99ffe920 0000006c
1825 18:49:29.353190 MTRR: Physical address space:
1826 18:49:29.359551 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1827 18:49:29.366354 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1828 18:49:29.372651 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1829 18:49:29.379350 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1830 18:49:29.385945 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1831 18:49:29.392336 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1832 18:49:29.399269 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1833 18:49:29.402390 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 18:49:29.405736 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 18:49:29.409011 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 18:49:29.415585 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 18:49:29.418881 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 18:49:29.422142 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 18:49:29.425797 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 18:49:29.429497 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 18:49:29.435808 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 18:49:29.438835 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 18:49:29.442200 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 18:49:29.445668 call enable_fixed_mtrr()
1845 18:49:29.448880 CPU physical address size: 39 bits
1846 18:49:29.455283 MTRR: default type WB/UC MTRR counts: 6/8.
1847 18:49:29.458466 MTRR: WB selected as default type.
1848 18:49:29.465474 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1849 18:49:29.468902 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1850 18:49:29.475132 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1851 18:49:29.481603 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1852 18:49:29.488535 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1853 18:49:29.495355 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1854 18:49:29.498619 MTRR: Fixed MSR 0x250 0x0606060606060606
1855 18:49:29.505015 MTRR: Fixed MSR 0x258 0x0606060606060606
1856 18:49:29.508009 MTRR: Fixed MSR 0x259 0x0000000000000000
1857 18:49:29.511823 MTRR: Fixed MSR 0x268 0x0606060606060606
1858 18:49:29.515174 MTRR: Fixed MSR 0x269 0x0606060606060606
1859 18:49:29.521305 MTRR: Fixed MSR 0x26a 0x0606060606060606
1860 18:49:29.524944 MTRR: Fixed MSR 0x26b 0x0606060606060606
1861 18:49:29.528226 MTRR: Fixed MSR 0x26c 0x0606060606060606
1862 18:49:29.531683 MTRR: Fixed MSR 0x26d 0x0606060606060606
1863 18:49:29.537976 MTRR: Fixed MSR 0x26e 0x0606060606060606
1864 18:49:29.541447 MTRR: Fixed MSR 0x26f 0x0606060606060606
1865 18:49:29.541548
1866 18:49:29.541640 MTRR check
1867 18:49:29.544838 Fixed MTRRs : Enabled
1868 18:49:29.548264 Variable MTRRs: Enabled
1869 18:49:29.548376
1870 18:49:29.551390 call enable_fixed_mtrr()
1871 18:49:29.554593 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1872 18:49:29.558041 CPU physical address size: 39 bits
1873 18:49:29.564708 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1874 18:49:29.568565 MTRR: Fixed MSR 0x250 0x0606060606060606
1875 18:49:29.571063 MTRR: Fixed MSR 0x258 0x0606060606060606
1876 18:49:29.577724 MTRR: Fixed MSR 0x259 0x0000000000000000
1877 18:49:29.581590 MTRR: Fixed MSR 0x268 0x0606060606060606
1878 18:49:29.584500 MTRR: Fixed MSR 0x269 0x0606060606060606
1879 18:49:29.587664 MTRR: Fixed MSR 0x26a 0x0606060606060606
1880 18:49:29.594653 MTRR: Fixed MSR 0x26b 0x0606060606060606
1881 18:49:29.597788 MTRR: Fixed MSR 0x26c 0x0606060606060606
1882 18:49:29.601202 MTRR: Fixed MSR 0x26d 0x0606060606060606
1883 18:49:29.604344 MTRR: Fixed MSR 0x26e 0x0606060606060606
1884 18:49:29.607577 MTRR: Fixed MSR 0x26f 0x0606060606060606
1885 18:49:29.614195 MTRR: Fixed MSR 0x250 0x0606060606060606
1886 18:49:29.617444 MTRR: Fixed MSR 0x258 0x0606060606060606
1887 18:49:29.621146 MTRR: Fixed MSR 0x259 0x0000000000000000
1888 18:49:29.627477 MTRR: Fixed MSR 0x268 0x0606060606060606
1889 18:49:29.630685 MTRR: Fixed MSR 0x269 0x0606060606060606
1890 18:49:29.634405 MTRR: Fixed MSR 0x26a 0x0606060606060606
1891 18:49:29.637571 MTRR: Fixed MSR 0x26b 0x0606060606060606
1892 18:49:29.641042 MTRR: Fixed MSR 0x26c 0x0606060606060606
1893 18:49:29.647689 MTRR: Fixed MSR 0x26d 0x0606060606060606
1894 18:49:29.650555 MTRR: Fixed MSR 0x26e 0x0606060606060606
1895 18:49:29.653909 MTRR: Fixed MSR 0x26f 0x0606060606060606
1896 18:49:29.657141 call enable_fixed_mtrr()
1897 18:49:29.660312 call enable_fixed_mtrr()
1898 18:49:29.663840 CPU physical address size: 39 bits
1899 18:49:29.667071 CPU physical address size: 39 bits
1900 18:49:29.670287 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 18:49:29.677111 MTRR: Fixed MSR 0x250 0x0606060606060606
1902 18:49:29.680525 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 18:49:29.683533 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 18:49:29.686921 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 18:49:29.693318 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 18:49:29.696880 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 18:49:29.699942 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 18:49:29.703178 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 18:49:29.706863 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 18:49:29.713266 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 18:49:29.716379 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 18:49:29.719959 MTRR: Fixed MSR 0x258 0x0606060606060606
1913 18:49:29.726183 MTRR: Fixed MSR 0x259 0x0000000000000000
1914 18:49:29.729676 MTRR: Fixed MSR 0x268 0x0606060606060606
1915 18:49:29.733123 MTRR: Fixed MSR 0x269 0x0606060606060606
1916 18:49:29.736214 MTRR: Fixed MSR 0x26a 0x0606060606060606
1917 18:49:29.742776 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 18:49:29.746166 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 18:49:29.749233 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 18:49:29.752456 MTRR: Fixed MSR 0x26e 0x0606060606060606
1921 18:49:29.759393 MTRR: Fixed MSR 0x26f 0x0606060606060606
1922 18:49:29.759472 call enable_fixed_mtrr()
1923 18:49:29.762615 call enable_fixed_mtrr()
1924 18:49:29.765659 CPU physical address size: 39 bits
1925 18:49:29.769000 CPU physical address size: 39 bits
1926 18:49:29.775883 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 18:49:29.779055 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 18:49:29.782728 CBFS @ c08000 size 3f8000
1929 18:49:29.785757 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1930 18:49:29.789297 CBFS: Locating 'fallback/payload'
1931 18:49:29.795839 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 18:49:29.798777 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 18:49:29.802277 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 18:49:29.805680 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 18:49:29.811972 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 18:49:29.815897 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 18:49:29.818863 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 18:49:29.822019 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 18:49:29.828681 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 18:49:29.831907 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 18:49:29.835384 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 18:49:29.838697 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 18:49:29.845300 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 18:49:29.848200 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 18:49:29.851946 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 18:49:29.855071 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 18:49:29.861610 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 18:49:29.864793 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 18:49:29.867974 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 18:49:29.871547 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 18:49:29.875040 call enable_fixed_mtrr()
1952 18:49:29.878234 call enable_fixed_mtrr()
1953 18:49:29.881834 CBFS: Found @ offset 1c96c0 size 3f798
1954 18:49:29.885061 CPU physical address size: 39 bits
1955 18:49:29.888437 CPU physical address size: 39 bits
1956 18:49:29.894919 Checking segment from ROM address 0xffdd16f8
1957 18:49:29.898085 Checking segment from ROM address 0xffdd1714
1958 18:49:29.901083 Loading segment from ROM address 0xffdd16f8
1959 18:49:29.905298 code (compression=0)
1960 18:49:29.914703 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1961 18:49:29.921305 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1962 18:49:29.924548 it's not compressed!
1963 18:49:30.016074 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1964 18:49:30.022859 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1965 18:49:30.026058 Loading segment from ROM address 0xffdd1714
1966 18:49:30.029342 Entry Point 0x30000000
1967 18:49:30.032455 Loaded segments
1968 18:49:30.038190 Finalizing chipset.
1969 18:49:30.041702 Finalizing SMM.
1970 18:49:30.044662 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1971 18:49:30.048488 mp_park_aps done after 0 msecs.
1972 18:49:30.054966 Jumping to boot code at 30000000(99b62000)
1973 18:49:30.061299 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1974 18:49:30.061376
1975 18:49:30.061439
1976 18:49:30.061497
1977 18:49:30.064846 Starting depthcharge on Helios...
1978 18:49:30.064918
1979 18:49:30.065251 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1980 18:49:30.065371 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1981 18:49:30.065469 Setting prompt string to ['hatch:']
1982 18:49:30.065551 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1983 18:49:30.074557 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1984 18:49:30.074640
1985 18:49:30.080998 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1986 18:49:30.081107
1987 18:49:30.087915 board_setup: Info: eMMC controller not present; skipping
1988 18:49:30.088032
1989 18:49:30.090867 New NVMe Controller 0x30053ac0 @ 00:1d:00
1990 18:49:30.090941
1991 18:49:30.097918 board_setup: Info: SDHCI controller not present; skipping
1992 18:49:30.098003
1993 18:49:30.104500 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1994 18:49:30.104575
1995 18:49:30.104635 Wipe memory regions:
1996 18:49:30.104701
1997 18:49:30.107798 [0x00000000001000, 0x000000000a0000)
1998 18:49:30.107871
1999 18:49:30.110681 [0x00000000100000, 0x00000030000000)
2000 18:49:30.177300
2001 18:49:30.180525 [0x00000030657430, 0x00000099a2c000)
2002 18:49:30.317562
2003 18:49:30.321035 [0x00000100000000, 0x0000045e800000)
2004 18:49:31.703707
2005 18:49:31.703850 R8152: Initializing
2006 18:49:31.703975
2007 18:49:31.706897 Version 9 (ocp_data = 6010)
2008 18:49:31.710896
2009 18:49:31.710997 R8152: Done initializing
2010 18:49:31.711088
2011 18:49:31.714221 Adding net device
2012 18:49:32.197407
2013 18:49:32.197545 R8152: Initializing
2014 18:49:32.197623
2015 18:49:32.200619 Version 6 (ocp_data = 5c30)
2016 18:49:32.200690
2017 18:49:32.203841 R8152: Done initializing
2018 18:49:32.203934
2019 18:49:32.210788 net_add_device: Attemp to include the same device
2020 18:49:32.210867
2021 18:49:32.217356 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2022 18:49:32.217441
2023 18:49:32.217508
2024 18:49:32.217570
2025 18:49:32.217857 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2027 18:49:32.318270 hatch: tftpboot 192.168.201.1 12909632/tftp-deploy-kjr08e37/kernel/bzImage 12909632/tftp-deploy-kjr08e37/kernel/cmdline 12909632/tftp-deploy-kjr08e37/ramdisk/ramdisk.cpio.gz
2028 18:49:32.318413 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2029 18:49:32.318514 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2030 18:49:32.322385 tftpboot 192.168.201.1 12909632/tftp-deploy-kjr08e37/kernel/bzImploy-kjr08e37/kernel/cmdline 12909632/tftp-deploy-kjr08e37/ramdisk/ramdisk.cpio.gz
2031 18:49:32.322476
2032 18:49:32.322543 Waiting for link
2033 18:49:32.523250
2034 18:49:32.523382 done.
2035 18:49:32.523483
2036 18:49:32.523544 MAC: 00:24:32:50:1a:5f
2037 18:49:32.523604
2038 18:49:32.526642 Sending DHCP discover... done.
2039 18:49:32.526714
2040 18:49:32.529797 Waiting for reply... done.
2041 18:49:32.529870
2042 18:49:32.532923 Sending DHCP request... done.
2043 18:49:32.533018
2044 18:49:32.536323 Waiting for reply... done.
2045 18:49:32.540000
2046 18:49:32.540131 My ip is 192.168.201.21
2047 18:49:32.540197
2048 18:49:32.543217 The DHCP server ip is 192.168.201.1
2049 18:49:32.543306
2050 18:49:32.549783 TFTP server IP predefined by user: 192.168.201.1
2051 18:49:32.549864
2052 18:49:32.556298 Bootfile predefined by user: 12909632/tftp-deploy-kjr08e37/kernel/bzImage
2053 18:49:32.556380
2054 18:49:32.559616 Sending tftp read request... done.
2055 18:49:32.559688
2056 18:49:32.562915 Waiting for the transfer...
2057 18:49:32.562987
2058 18:49:33.097603 00000000 ################################################################
2059 18:49:33.097737
2060 18:49:33.644683 00080000 ################################################################
2061 18:49:33.644813
2062 18:49:34.169163 00100000 ################################################################
2063 18:49:34.169306
2064 18:49:34.697461 00180000 ################################################################
2065 18:49:34.697615
2066 18:49:35.223303 00200000 ################################################################
2067 18:49:35.223477
2068 18:49:35.747743 00280000 ################################################################
2069 18:49:35.747873
2070 18:49:36.267234 00300000 ################################################################
2071 18:49:36.267379
2072 18:49:36.789591 00380000 ################################################################
2073 18:49:36.789742
2074 18:49:37.312523 00400000 ################################################################
2075 18:49:37.312679
2076 18:49:37.840150 00480000 ################################################################
2077 18:49:37.840300
2078 18:49:38.369163 00500000 ################################################################
2079 18:49:38.369323
2080 18:49:38.901366 00580000 ################################################################
2081 18:49:38.901549
2082 18:49:39.429317 00600000 ################################################################
2083 18:49:39.429450
2084 18:49:39.957268 00680000 ################################################################
2085 18:49:39.957404
2086 18:49:40.498284 00700000 ################################################################
2087 18:49:40.498415
2088 18:49:41.041950 00780000 ################################################################
2089 18:49:41.042084
2090 18:49:41.573952 00800000 ################################################################
2091 18:49:41.574097
2092 18:49:42.100591 00880000 ################################################################
2093 18:49:42.100735
2094 18:49:42.628360 00900000 ################################################################
2095 18:49:42.628510
2096 18:49:43.176483 00980000 ################################################################
2097 18:49:43.176626
2098 18:49:43.735696 00a00000 ################################################################
2099 18:49:43.735845
2100 18:49:44.282898 00a80000 ################################################################
2101 18:49:44.283039
2102 18:49:44.822906 00b00000 ################################################################
2103 18:49:44.823055
2104 18:49:45.119642 00b80000 #################################### done.
2105 18:49:45.119790
2106 18:49:45.122739 The bootfile was 12349440 bytes long.
2107 18:49:45.122832
2108 18:49:45.126591 Sending tftp read request... done.
2109 18:49:45.126674
2110 18:49:45.129856 Waiting for the transfer...
2111 18:49:45.129938
2112 18:49:45.699902 00000000 ################################################################
2113 18:49:45.700049
2114 18:49:46.256459 00080000 ################################################################
2115 18:49:46.256607
2116 18:49:46.812822 00100000 ################################################################
2117 18:49:46.812971
2118 18:49:47.380283 00180000 ################################################################
2119 18:49:47.380427
2120 18:49:47.933216 00200000 ################################################################
2121 18:49:47.933367
2122 18:49:48.485550 00280000 ################################################################
2123 18:49:48.485688
2124 18:49:49.058432 00300000 ################################################################
2125 18:49:49.058578
2126 18:49:49.619659 00380000 ################################################################
2127 18:49:49.619797
2128 18:49:50.257761 00400000 ################################################################
2129 18:49:50.258275
2130 18:49:50.901752 00480000 ################################################################
2131 18:49:50.901888
2132 18:49:51.433022 00500000 ################################################################
2133 18:49:51.433161
2134 18:49:51.954785 00580000 ################################################################
2135 18:49:51.954923
2136 18:49:52.497943 00600000 ################################################################
2137 18:49:52.498076
2138 18:49:53.077461 00680000 ################################################################
2139 18:49:53.077599
2140 18:49:53.637836 00700000 ################################################################
2141 18:49:53.637977
2142 18:49:54.251225 00780000 ################################################################
2143 18:49:54.251383
2144 18:49:54.899111 00800000 ################################################################
2145 18:49:54.899643
2146 18:49:55.279746 00880000 ##################################### done.
2147 18:49:55.280282
2148 18:49:55.282984 Sending tftp read request... done.
2149 18:49:55.283407
2150 18:49:55.286244 Waiting for the transfer...
2151 18:49:55.286666
2152 18:49:55.286999 00000000 # done.
2153 18:49:55.287426
2154 18:49:55.296493 Command line loaded dynamically from TFTP file: 12909632/tftp-deploy-kjr08e37/kernel/cmdline
2155 18:49:55.297006
2156 18:49:55.315976 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2157 18:49:55.316576
2158 18:49:55.322751 ec_init(0): CrosEC protocol v3 supported (256, 256)
2159 18:49:55.327355
2160 18:49:55.330841 Shutting down all USB controllers.
2161 18:49:55.331303
2162 18:49:55.331668 Removing current net device
2163 18:49:55.335086
2164 18:49:55.335543 Finalizing coreboot
2165 18:49:55.335912
2166 18:49:55.341468 Exiting depthcharge with code 4 at timestamp: 32659283
2167 18:49:55.341929
2168 18:49:55.342290
2169 18:49:55.342636 Starting kernel ...
2170 18:49:55.342967
2171 18:49:55.343288
2172 18:49:55.344740 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2173 18:49:55.345276 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2174 18:49:55.345681 Setting prompt string to ['Linux version [0-9]']
2175 18:49:55.346052 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2176 18:49:55.346428 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2178 18:54:12.346233 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2180 18:54:12.347571 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2182 18:54:12.348531 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2185 18:54:12.349979 end: 2 depthcharge-action (duration 00:05:00) [common]
2187 18:54:12.351370 Cleaning after the job
2188 18:54:12.351862 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909632/tftp-deploy-kjr08e37/ramdisk
2189 18:54:12.358931 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909632/tftp-deploy-kjr08e37/kernel
2190 18:54:12.368628 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909632/tftp-deploy-kjr08e37/modules
2191 18:54:12.372141 start: 5.1 power-off (timeout 00:00:30) [common]
2192 18:54:12.372863 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2193 18:54:12.482541 >> Command sent successfully.
2194 18:54:12.494717 Returned 0 in 0 seconds
2195 18:54:12.596213 end: 5.1 power-off (duration 00:00:00) [common]
2197 18:54:12.597902 start: 5.2 read-feedback (timeout 00:10:00) [common]
2198 18:54:12.599330 Listened to connection for namespace 'common' for up to 1s
2200 18:54:12.600754 Listened to connection for namespace 'common' for up to 1s
2201 18:54:13.599906 Finalising connection for namespace 'common'
2202 18:54:13.600699 Disconnecting from shell: Finalise
2203 18:54:13.601110
2204 18:54:13.702215 end: 5.2 read-feedback (duration 00:00:01) [common]
2205 18:54:13.702856 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12909632
2206 18:54:13.759723 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12909632
2207 18:54:13.759918 JobError: Your job cannot terminate cleanly.