Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 18:48:59.674579 lava-dispatcher, installed at version: 2024.01
2 18:48:59.674804 start: 0 validate
3 18:48:59.674941 Start time: 2024-03-01 18:48:59.674928+00:00 (UTC)
4 18:48:59.675073 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:48:59.675204 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 18:48:59.943902 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:48:59.944700 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:48:59.950335 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:48:59.951154 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 18:49:00.221903 validate duration: 0.55
12 18:49:00.223339 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 18:49:00.223969 start: 1.1 download-retry (timeout 00:10:00) [common]
14 18:49:00.224569 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 18:49:00.225245 Not decompressing ramdisk as can be used compressed.
16 18:49:00.225719 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 18:49:00.226093 saving as /var/lib/lava/dispatcher/tmp/12909599/tftp-deploy-cj4xsgx5/ramdisk/rootfs.cpio.gz
18 18:49:00.226483 total size: 8418130 (8 MB)
19 18:49:00.231674 progress 0 % (0 MB)
20 18:49:00.245082 progress 5 % (0 MB)
21 18:49:00.253187 progress 10 % (0 MB)
22 18:49:00.258983 progress 15 % (1 MB)
23 18:49:00.263637 progress 20 % (1 MB)
24 18:49:00.267579 progress 25 % (2 MB)
25 18:49:00.271183 progress 30 % (2 MB)
26 18:49:00.274127 progress 35 % (2 MB)
27 18:49:00.277163 progress 40 % (3 MB)
28 18:49:00.280026 progress 45 % (3 MB)
29 18:49:00.282666 progress 50 % (4 MB)
30 18:49:00.285150 progress 55 % (4 MB)
31 18:49:00.287492 progress 60 % (4 MB)
32 18:49:00.289626 progress 65 % (5 MB)
33 18:49:00.291880 progress 70 % (5 MB)
34 18:49:00.294193 progress 75 % (6 MB)
35 18:49:00.296439 progress 80 % (6 MB)
36 18:49:00.298756 progress 85 % (6 MB)
37 18:49:00.300977 progress 90 % (7 MB)
38 18:49:00.303259 progress 95 % (7 MB)
39 18:49:00.305513 progress 100 % (8 MB)
40 18:49:00.305753 8 MB downloaded in 0.08 s (101.24 MB/s)
41 18:49:00.305911 end: 1.1.1 http-download (duration 00:00:00) [common]
43 18:49:00.306158 end: 1.1 download-retry (duration 00:00:00) [common]
44 18:49:00.306247 start: 1.2 download-retry (timeout 00:10:00) [common]
45 18:49:00.306331 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 18:49:00.306508 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 18:49:00.306579 saving as /var/lib/lava/dispatcher/tmp/12909599/tftp-deploy-cj4xsgx5/kernel/bzImage
48 18:49:00.306640 total size: 12349440 (11 MB)
49 18:49:00.306702 No compression specified
50 18:49:00.307883 progress 0 % (0 MB)
51 18:49:00.311102 progress 5 % (0 MB)
52 18:49:00.314393 progress 10 % (1 MB)
53 18:49:00.317881 progress 15 % (1 MB)
54 18:49:00.321168 progress 20 % (2 MB)
55 18:49:00.324466 progress 25 % (2 MB)
56 18:49:00.327905 progress 30 % (3 MB)
57 18:49:00.331046 progress 35 % (4 MB)
58 18:49:00.334643 progress 40 % (4 MB)
59 18:49:00.338189 progress 45 % (5 MB)
60 18:49:00.341538 progress 50 % (5 MB)
61 18:49:00.344885 progress 55 % (6 MB)
62 18:49:00.348274 progress 60 % (7 MB)
63 18:49:00.351385 progress 65 % (7 MB)
64 18:49:00.354691 progress 70 % (8 MB)
65 18:49:00.357962 progress 75 % (8 MB)
66 18:49:00.361305 progress 80 % (9 MB)
67 18:49:00.364615 progress 85 % (10 MB)
68 18:49:00.367932 progress 90 % (10 MB)
69 18:49:00.371482 progress 95 % (11 MB)
70 18:49:00.374786 progress 100 % (11 MB)
71 18:49:00.375061 11 MB downloaded in 0.07 s (172.15 MB/s)
72 18:49:00.375229 end: 1.2.1 http-download (duration 00:00:00) [common]
74 18:49:00.375514 end: 1.2 download-retry (duration 00:00:00) [common]
75 18:49:00.375624 start: 1.3 download-retry (timeout 00:10:00) [common]
76 18:49:00.375761 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 18:49:00.375921 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 18:49:00.375992 saving as /var/lib/lava/dispatcher/tmp/12909599/tftp-deploy-cj4xsgx5/modules/modules.tar
79 18:49:00.376053 total size: 484604 (0 MB)
80 18:49:00.376115 Using unxz to decompress xz
81 18:49:00.380777 progress 6 % (0 MB)
82 18:49:00.381299 progress 13 % (0 MB)
83 18:49:00.381705 progress 20 % (0 MB)
84 18:49:00.383676 progress 27 % (0 MB)
85 18:49:00.386150 progress 33 % (0 MB)
86 18:49:00.388643 progress 40 % (0 MB)
87 18:49:00.390751 progress 47 % (0 MB)
88 18:49:00.392832 progress 54 % (0 MB)
89 18:49:00.395244 progress 60 % (0 MB)
90 18:49:00.397882 progress 67 % (0 MB)
91 18:49:00.400359 progress 74 % (0 MB)
92 18:49:00.402688 progress 81 % (0 MB)
93 18:49:00.404948 progress 87 % (0 MB)
94 18:49:00.407539 progress 94 % (0 MB)
95 18:49:00.410041 progress 100 % (0 MB)
96 18:49:00.416988 0 MB downloaded in 0.04 s (11.29 MB/s)
97 18:49:00.417318 end: 1.3.1 http-download (duration 00:00:00) [common]
99 18:49:00.417601 end: 1.3 download-retry (duration 00:00:00) [common]
100 18:49:00.417722 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 18:49:00.417816 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 18:49:00.417898 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 18:49:00.417985 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 18:49:00.418242 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2
105 18:49:00.418426 makedir: /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin
106 18:49:00.418547 makedir: /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/tests
107 18:49:00.418711 makedir: /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/results
108 18:49:00.418867 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-add-keys
109 18:49:00.419016 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-add-sources
110 18:49:00.419161 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-background-process-start
111 18:49:00.419373 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-background-process-stop
112 18:49:00.419545 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-common-functions
113 18:49:00.419673 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-echo-ipv4
114 18:49:00.419800 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-install-packages
115 18:49:00.419927 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-installed-packages
116 18:49:00.420081 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-os-build
117 18:49:00.420243 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-probe-channel
118 18:49:00.420371 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-probe-ip
119 18:49:00.420705 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-target-ip
120 18:49:00.420909 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-target-mac
121 18:49:00.421039 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-target-storage
122 18:49:00.421188 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-test-case
123 18:49:00.421394 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-test-event
124 18:49:00.421782 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-test-feedback
125 18:49:00.421977 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-test-raise
126 18:49:00.422143 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-test-reference
127 18:49:00.422305 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-test-runner
128 18:49:00.422487 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-test-set
129 18:49:00.422637 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-test-shell
130 18:49:00.422768 Updating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-install-packages (oe)
131 18:49:00.422961 Updating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/bin/lava-installed-packages (oe)
132 18:49:00.423087 Creating /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/environment
133 18:49:00.423190 LAVA metadata
134 18:49:00.423267 - LAVA_JOB_ID=12909599
135 18:49:00.423331 - LAVA_DISPATCHER_IP=192.168.201.1
136 18:49:00.423472 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 18:49:00.423542 skipped lava-vland-overlay
138 18:49:00.423620 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 18:49:00.423703 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 18:49:00.423765 skipped lava-multinode-overlay
141 18:49:00.423854 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 18:49:00.423948 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 18:49:00.424021 Loading test definitions
144 18:49:00.424123 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 18:49:00.424216 Using /lava-12909599 at stage 0
146 18:49:00.424586 uuid=12909599_1.4.2.3.1 testdef=None
147 18:49:00.424675 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 18:49:00.424779 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 18:49:00.425368 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 18:49:00.425595 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 18:49:00.426433 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 18:49:00.426678 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 18:49:00.427376 runner path: /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/0/tests/0_dmesg test_uuid 12909599_1.4.2.3.1
156 18:49:00.427537 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 18:49:00.427794 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 18:49:00.427866 Using /lava-12909599 at stage 1
160 18:49:00.428187 uuid=12909599_1.4.2.3.5 testdef=None
161 18:49:00.428276 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 18:49:00.428373 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 18:49:00.428867 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 18:49:00.429101 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 18:49:00.429804 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 18:49:00.430047 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 18:49:00.430776 runner path: /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/1/tests/1_bootrr test_uuid 12909599_1.4.2.3.5
170 18:49:00.430929 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 18:49:00.431165 Creating lava-test-runner.conf files
173 18:49:00.431229 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/0 for stage 0
174 18:49:00.431319 - 0_dmesg
175 18:49:00.431398 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12909599/lava-overlay-vlda5ri2/lava-12909599/1 for stage 1
176 18:49:00.431490 - 1_bootrr
177 18:49:00.431585 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 18:49:00.431671 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 18:49:00.440257 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 18:49:00.440399 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 18:49:00.440495 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 18:49:00.440583 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 18:49:00.440671 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 18:49:00.705246 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 18:49:00.705646 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 18:49:00.705773 extracting modules file /var/lib/lava/dispatcher/tmp/12909599/tftp-deploy-cj4xsgx5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12909599/extract-overlay-ramdisk-0h47296y/ramdisk
187 18:49:00.726807 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 18:49:00.726971 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 18:49:00.727070 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12909599/compress-overlay-m65yygk9/overlay-1.4.2.4.tar.gz to ramdisk
190 18:49:00.727143 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12909599/compress-overlay-m65yygk9/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12909599/extract-overlay-ramdisk-0h47296y/ramdisk
191 18:49:00.735644 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 18:49:00.735763 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 18:49:00.735854 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 18:49:00.735942 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 18:49:00.736019 Building ramdisk /var/lib/lava/dispatcher/tmp/12909599/extract-overlay-ramdisk-0h47296y/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12909599/extract-overlay-ramdisk-0h47296y/ramdisk
196 18:49:00.890804 >> 53982 blocks
197 18:49:01.849790 rename /var/lib/lava/dispatcher/tmp/12909599/extract-overlay-ramdisk-0h47296y/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12909599/tftp-deploy-cj4xsgx5/ramdisk/ramdisk.cpio.gz
198 18:49:01.850284 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 18:49:01.850490 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 18:49:01.850602 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 18:49:01.850704 No mkimage arch provided, not using FIT.
202 18:49:01.850826 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 18:49:01.850932 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 18:49:01.851033 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 18:49:01.851124 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 18:49:01.851209 No LXC device requested
207 18:49:01.851295 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 18:49:01.851383 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 18:49:01.851467 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 18:49:01.851545 Checking files for TFTP limit of 4294967296 bytes.
211 18:49:01.851954 end: 1 tftp-deploy (duration 00:00:02) [common]
212 18:49:01.852060 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 18:49:01.852179 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 18:49:01.852353 substitutions:
215 18:49:01.852428 - {DTB}: None
216 18:49:01.852495 - {INITRD}: 12909599/tftp-deploy-cj4xsgx5/ramdisk/ramdisk.cpio.gz
217 18:49:01.852556 - {KERNEL}: 12909599/tftp-deploy-cj4xsgx5/kernel/bzImage
218 18:49:01.852629 - {LAVA_MAC}: None
219 18:49:01.852718 - {PRESEED_CONFIG}: None
220 18:49:01.852806 - {PRESEED_LOCAL}: None
221 18:49:01.852892 - {RAMDISK}: 12909599/tftp-deploy-cj4xsgx5/ramdisk/ramdisk.cpio.gz
222 18:49:01.852978 - {ROOT_PART}: None
223 18:49:01.853065 - {ROOT}: None
224 18:49:01.853154 - {SERVER_IP}: 192.168.201.1
225 18:49:01.853239 - {TEE}: None
226 18:49:01.853324 Parsed boot commands:
227 18:49:01.853410 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 18:49:01.853626 Parsed boot commands: tftpboot 192.168.201.1 12909599/tftp-deploy-cj4xsgx5/kernel/bzImage 12909599/tftp-deploy-cj4xsgx5/kernel/cmdline 12909599/tftp-deploy-cj4xsgx5/ramdisk/ramdisk.cpio.gz
229 18:49:01.853718 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 18:49:01.853807 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 18:49:01.853900 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 18:49:01.853987 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 18:49:01.854122 Not connected, no need to disconnect.
234 18:49:01.854228 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 18:49:01.854346 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 18:49:01.854477 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-0'
237 18:49:01.858997 Setting prompt string to ['lava-test: # ']
238 18:49:01.859427 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 18:49:01.859576 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 18:49:01.859715 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 18:49:01.859848 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 18:49:01.860077 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
243 18:49:07.004921 >> Command sent successfully.
244 18:49:07.007579 Returned 0 in 5 seconds
245 18:49:07.107979 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
247 18:49:07.108425 end: 2.2.2 reset-device (duration 00:00:05) [common]
248 18:49:07.108531 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
249 18:49:07.108619 Setting prompt string to 'Starting depthcharge on Voema...'
250 18:49:07.108696 Changing prompt to 'Starting depthcharge on Voema...'
251 18:49:07.108806 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
252 18:49:07.109128 [Enter `^Ec?' for help]
253 18:49:08.738798
254 18:49:08.738948
255 18:49:08.748861 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
256 18:49:08.751797 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
257 18:49:08.758998 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
258 18:49:08.762082 CPU: AES supported, TXT NOT supported, VT supported
259 18:49:08.768740 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
260 18:49:08.775307 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
261 18:49:08.778734 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
262 18:49:08.781842 VBOOT: Loading verstage.
263 18:49:08.785374 FMAP: Found "FLASH" version 1.1 at 0x1804000.
264 18:49:08.791603 FMAP: base = 0x0 size = 0x2000000 #areas = 32
265 18:49:08.795129 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
266 18:49:08.805636 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
267 18:49:08.812409 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
268 18:49:08.812499
269 18:49:08.812567
270 18:49:08.825783 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
271 18:49:08.839665 Probing TPM: . done!
272 18:49:08.842931 TPM ready after 0 ms
273 18:49:08.846272 Connected to device vid:did:rid of 1ae0:0028:00
274 18:49:08.856931 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
275 18:49:08.863987 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
276 18:49:08.867222 Initialized TPM device CR50 revision 0
277 18:49:08.916658 tlcl_send_startup: Startup return code is 0
278 18:49:08.916797 TPM: setup succeeded
279 18:49:08.930893 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
280 18:49:08.945202 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 18:49:08.958098 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
282 18:49:08.968037 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
283 18:49:08.971583 Chrome EC: UHEPI supported
284 18:49:08.974890 Phase 1
285 18:49:08.978761 FMAP: area GBB found @ 1805000 (458752 bytes)
286 18:49:08.988368 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 18:49:08.994800 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 18:49:09.001293 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
289 18:49:09.008113 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
290 18:49:09.011095 Recovery requested (1009000e)
291 18:49:09.014443 TPM: Extending digest for VBOOT: boot mode into PCR 0
292 18:49:09.026233 tlcl_extend: response is 0
293 18:49:09.033152 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
294 18:49:09.042747 tlcl_extend: response is 0
295 18:49:09.049557 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 18:49:09.056344 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
297 18:49:09.063656 BS: verstage times (exec / console): total (unknown) / 142 ms
298 18:49:09.063784
299 18:49:09.063854
300 18:49:09.076510 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
301 18:49:09.082583 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
302 18:49:09.085825 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
303 18:49:09.089322 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
304 18:49:09.095666 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
305 18:49:09.099171 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
306 18:49:09.102544 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
307 18:49:09.105807 TCO_STS: 0000 0000
308 18:49:09.109205 GEN_PMCON: d0015038 00002200
309 18:49:09.112796 GBLRST_CAUSE: 00000000 00000000
310 18:49:09.112951 HPR_CAUSE0: 00000000
311 18:49:09.116125 prev_sleep_state 5
312 18:49:09.119230 Boot Count incremented to 27756
313 18:49:09.125772 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
314 18:49:09.132188 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 18:49:09.138849 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 18:49:09.145620 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
317 18:49:09.150602 Chrome EC: UHEPI supported
318 18:49:09.157031 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
319 18:49:09.169767 Probing TPM: done!
320 18:49:09.176495 Connected to device vid:did:rid of 1ae0:0028:00
321 18:49:09.187798 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
322 18:49:09.194576 Initialized TPM device CR50 revision 0
323 18:49:09.206596 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
324 18:49:09.210008 MRC: Hash idx 0x100b comparison successful.
325 18:49:09.213137 MRC cache found, size faa8
326 18:49:09.213250 bootmode is set to: 2
327 18:49:09.217105 SPD index = 0
328 18:49:09.223672 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
329 18:49:09.226928 SPD: module type is LPDDR4X
330 18:49:09.230317 SPD: module part number is MT53E512M64D4NW-046
331 18:49:09.236960 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
332 18:49:09.239776 SPD: device width 16 bits, bus width 16 bits
333 18:49:09.246845 SPD: module size is 1024 MB (per channel)
334 18:49:09.678802 CBMEM:
335 18:49:09.681863 IMD: root @ 0x76fff000 254 entries.
336 18:49:09.685451 IMD: root @ 0x76ffec00 62 entries.
337 18:49:09.688943 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
338 18:49:09.694961 FMAP: area RW_VPD found @ f35000 (8192 bytes)
339 18:49:09.698580 External stage cache:
340 18:49:09.702359 IMD: root @ 0x7b3ff000 254 entries.
341 18:49:09.705100 IMD: root @ 0x7b3fec00 62 entries.
342 18:49:09.720241 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 18:49:09.727617 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
344 18:49:09.733425 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
345 18:49:09.747675 MRC: 'RECOVERY_MRC_CACHE' does not need update.
346 18:49:09.754422 cse_lite: Skip switching to RW in the recovery path
347 18:49:09.754545 8 DIMMs found
348 18:49:09.754614 SMM Memory Map
349 18:49:09.757568 SMRAM : 0x7b000000 0x800000
350 18:49:09.761322 Subregion 0: 0x7b000000 0x200000
351 18:49:09.765002 Subregion 1: 0x7b200000 0x200000
352 18:49:09.768773 Subregion 2: 0x7b400000 0x400000
353 18:49:09.771848 top_of_ram = 0x77000000
354 18:49:09.778601 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
355 18:49:09.781765 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
356 18:49:09.789079 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
357 18:49:09.791630 MTRR Range: Start=ff000000 End=0 (Size 1000000)
358 18:49:09.801609 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
359 18:49:09.808755 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
360 18:49:09.818333 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
361 18:49:09.821713 Processing 211 relocs. Offset value of 0x74c0b000
362 18:49:09.830361 BS: romstage times (exec / console): total (unknown) / 277 ms
363 18:49:09.836454
364 18:49:09.836580
365 18:49:09.846679 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
366 18:49:09.849737 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
367 18:49:09.859628 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
368 18:49:09.866168 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
369 18:49:09.872934 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
370 18:49:09.879420 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
371 18:49:09.926298 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
372 18:49:09.933605 Processing 5008 relocs. Offset value of 0x75d98000
373 18:49:09.936453 BS: postcar times (exec / console): total (unknown) / 59 ms
374 18:49:09.936539
375 18:49:09.939572
376 18:49:09.949779 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
377 18:49:09.949878 Normal boot
378 18:49:09.953375 FW_CONFIG value is 0x804c02
379 18:49:09.956423 PCI: 00:07.0 disabled by fw_config
380 18:49:09.959835 PCI: 00:07.1 disabled by fw_config
381 18:49:09.963466 PCI: 00:0d.2 disabled by fw_config
382 18:49:09.967324 PCI: 00:1c.7 disabled by fw_config
383 18:49:09.973417 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 18:49:09.979925 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 18:49:09.983365 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
386 18:49:09.986596 GENERIC: 0.0 disabled by fw_config
387 18:49:09.989990 GENERIC: 1.0 disabled by fw_config
388 18:49:09.996759 fw_config match found: DB_USB=USB3_ACTIVE
389 18:49:10.000065 fw_config match found: DB_USB=USB3_ACTIVE
390 18:49:10.003066 fw_config match found: DB_USB=USB3_ACTIVE
391 18:49:10.006372 fw_config match found: DB_USB=USB3_ACTIVE
392 18:49:10.013021 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 18:49:10.019761 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 18:49:10.029332 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 18:49:10.036119 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
396 18:49:10.039504 microcode: sig=0x806c1 pf=0x80 revision=0x86
397 18:49:10.046289 microcode: Update skipped, already up-to-date
398 18:49:10.052987 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
399 18:49:10.079886 Detected 4 core, 8 thread CPU.
400 18:49:10.083058 Setting up SMI for CPU
401 18:49:10.086567 IED base = 0x7b400000
402 18:49:10.086664 IED size = 0x00400000
403 18:49:10.090192 Will perform SMM setup.
404 18:49:10.096547 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
405 18:49:10.103488 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
406 18:49:10.109862 Processing 16 relocs. Offset value of 0x00030000
407 18:49:10.114048 Attempting to start 7 APs
408 18:49:10.116559 Waiting for 10ms after sending INIT.
409 18:49:10.132112 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
410 18:49:10.132225 done.
411 18:49:10.135469 AP: slot 4 apic_id 5.
412 18:49:10.138628 AP: slot 5 apic_id 4.
413 18:49:10.138712 AP: slot 7 apic_id 7.
414 18:49:10.141802 AP: slot 3 apic_id 6.
415 18:49:10.145096 Waiting for 2nd SIPI to complete...done.
416 18:49:10.149042 AP: slot 2 apic_id 2.
417 18:49:10.152659 AP: slot 6 apic_id 3.
418 18:49:10.159034 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
419 18:49:10.165301 Processing 13 relocs. Offset value of 0x00038000
420 18:49:10.165394 Unable to locate Global NVS
421 18:49:10.175231 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
422 18:49:10.178843 Installing permanent SMM handler to 0x7b000000
423 18:49:10.188337 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
424 18:49:10.192001 Processing 794 relocs. Offset value of 0x7b010000
425 18:49:10.201903 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
426 18:49:10.205062 Processing 13 relocs. Offset value of 0x7b008000
427 18:49:10.211828 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
428 18:49:10.218267 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
429 18:49:10.221601 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
430 18:49:10.228302 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
431 18:49:10.235073 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
432 18:49:10.242520 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
433 18:49:10.248450 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
434 18:49:10.248536 Unable to locate Global NVS
435 18:49:10.258087 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
436 18:49:10.261879 Clearing SMI status registers
437 18:49:10.261965 SMI_STS: PM1
438 18:49:10.264696 PM1_STS: PWRBTN
439 18:49:10.271233 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
440 18:49:10.274855 In relocation handler: CPU 0
441 18:49:10.278538 New SMBASE=0x7b000000 IEDBASE=0x7b400000
442 18:49:10.284845 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 18:49:10.284957 Relocation complete.
444 18:49:10.294823 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
445 18:49:10.294909 In relocation handler: CPU 1
446 18:49:10.301325 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
447 18:49:10.301412 Relocation complete.
448 18:49:10.311400 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
449 18:49:10.311485 In relocation handler: CPU 4
450 18:49:10.318583 New SMBASE=0x7afff000 IEDBASE=0x7b400000
451 18:49:10.318668 Relocation complete.
452 18:49:10.324935 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
453 18:49:10.328237 In relocation handler: CPU 2
454 18:49:10.334534 New SMBASE=0x7afff800 IEDBASE=0x7b400000
455 18:49:10.338004 Writing SMRR. base = 0x7b000006, mask=0xff800c00
456 18:49:10.341064 Relocation complete.
457 18:49:10.348103 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
458 18:49:10.351375 In relocation handler: CPU 6
459 18:49:10.354710 New SMBASE=0x7affe800 IEDBASE=0x7b400000
460 18:49:10.358125 Relocation complete.
461 18:49:10.364470 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
462 18:49:10.368129 In relocation handler: CPU 5
463 18:49:10.371309 New SMBASE=0x7affec00 IEDBASE=0x7b400000
464 18:49:10.374581 Writing SMRR. base = 0x7b000006, mask=0xff800c00
465 18:49:10.377744 Relocation complete.
466 18:49:10.384442 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
467 18:49:10.387967 In relocation handler: CPU 3
468 18:49:10.391574 New SMBASE=0x7afff400 IEDBASE=0x7b400000
469 18:49:10.397986 Writing SMRR. base = 0x7b000006, mask=0xff800c00
470 18:49:10.400804 Relocation complete.
471 18:49:10.407816 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
472 18:49:10.410950 In relocation handler: CPU 7
473 18:49:10.414288 New SMBASE=0x7affe400 IEDBASE=0x7b400000
474 18:49:10.414406 Relocation complete.
475 18:49:10.418155 Initializing CPU #0
476 18:49:10.420926 CPU: vendor Intel device 806c1
477 18:49:10.424427 CPU: family 06, model 8c, stepping 01
478 18:49:10.428026 Clearing out pending MCEs
479 18:49:10.432119 Setting up local APIC...
480 18:49:10.432203 apic_id: 0x00 done.
481 18:49:10.435355 Turbo is available but hidden
482 18:49:10.438832 Turbo is available and visible
483 18:49:10.442271 microcode: Update skipped, already up-to-date
484 18:49:10.445748 CPU #0 initialized
485 18:49:10.448726 Initializing CPU #7
486 18:49:10.448810 Initializing CPU #3
487 18:49:10.451789 CPU: vendor Intel device 806c1
488 18:49:10.455800 CPU: family 06, model 8c, stepping 01
489 18:49:10.458555 CPU: vendor Intel device 806c1
490 18:49:10.462014 CPU: family 06, model 8c, stepping 01
491 18:49:10.465241 Clearing out pending MCEs
492 18:49:10.468454 Clearing out pending MCEs
493 18:49:10.471720 Initializing CPU #1
494 18:49:10.471803 Initializing CPU #5
495 18:49:10.475233 Initializing CPU #4
496 18:49:10.478535 CPU: vendor Intel device 806c1
497 18:49:10.482089 CPU: family 06, model 8c, stepping 01
498 18:49:10.485481 CPU: vendor Intel device 806c1
499 18:49:10.488643 CPU: family 06, model 8c, stepping 01
500 18:49:10.492129 Clearing out pending MCEs
501 18:49:10.494983 Clearing out pending MCEs
502 18:49:10.495067 Setting up local APIC...
503 18:49:10.498362 CPU: vendor Intel device 806c1
504 18:49:10.505071 CPU: family 06, model 8c, stepping 01
505 18:49:10.505156 Initializing CPU #2
506 18:49:10.508442 Initializing CPU #6
507 18:49:10.512040 CPU: vendor Intel device 806c1
508 18:49:10.515120 CPU: family 06, model 8c, stepping 01
509 18:49:10.518309 CPU: vendor Intel device 806c1
510 18:49:10.521847 CPU: family 06, model 8c, stepping 01
511 18:49:10.524995 Clearing out pending MCEs
512 18:49:10.528568 Clearing out pending MCEs
513 18:49:10.528653 Setting up local APIC...
514 18:49:10.532161 Setting up local APIC...
515 18:49:10.534871 apic_id: 0x02 done.
516 18:49:10.534955 Setting up local APIC...
517 18:49:10.539099 apic_id: 0x06 done.
518 18:49:10.541399 Setting up local APIC...
519 18:49:10.545342 apic_id: 0x04 done.
520 18:49:10.545425 Setting up local APIC...
521 18:49:10.551484 microcode: Update skipped, already up-to-date
522 18:49:10.551567 apic_id: 0x03 done.
523 18:49:10.554828 CPU #2 initialized
524 18:49:10.558010 microcode: Update skipped, already up-to-date
525 18:49:10.561850 Clearing out pending MCEs
526 18:49:10.564973 apic_id: 0x05 done.
527 18:49:10.568402 microcode: Update skipped, already up-to-date
528 18:49:10.575003 microcode: Update skipped, already up-to-date
529 18:49:10.575088 CPU #5 initialized
530 18:49:10.578378 CPU #4 initialized
531 18:49:10.578502 CPU #6 initialized
532 18:49:10.584887 microcode: Update skipped, already up-to-date
533 18:49:10.584975 apic_id: 0x07 done.
534 18:49:10.587980 CPU #3 initialized
535 18:49:10.591954 microcode: Update skipped, already up-to-date
536 18:49:10.594677 Setting up local APIC...
537 18:49:10.598646 CPU #7 initialized
538 18:49:10.598734 apic_id: 0x01 done.
539 18:49:10.605359 microcode: Update skipped, already up-to-date
540 18:49:10.605447 CPU #1 initialized
541 18:49:10.611427 bsp_do_flight_plan done after 459 msecs.
542 18:49:10.611516 CPU: frequency set to 4000 MHz
543 18:49:10.614772 Enabling SMIs.
544 18:49:10.621258 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
545 18:49:10.636880 SATAXPCIE1 indicates PCIe NVMe is present
546 18:49:10.640553 Probing TPM: done!
547 18:49:10.644370 Connected to device vid:did:rid of 1ae0:0028:00
548 18:49:10.654038 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
549 18:49:10.658049 Initialized TPM device CR50 revision 0
550 18:49:10.660849 Enabling S0i3.4
551 18:49:10.667597 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
552 18:49:10.670700 Found a VBT of 8704 bytes after decompression
553 18:49:10.677527 cse_lite: CSE RO boot. HybridStorageMode disabled
554 18:49:10.684253 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
555 18:49:10.760165 FSPS returned 0
556 18:49:10.763676 Executing Phase 1 of FspMultiPhaseSiInit
557 18:49:10.773471 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
558 18:49:10.777070 port C0 DISC req: usage 1 usb3 1 usb2 5
559 18:49:10.780221 Raw Buffer output 0 00000511
560 18:49:10.783323 Raw Buffer output 1 00000000
561 18:49:10.787825 pmc_send_ipc_cmd succeeded
562 18:49:10.794000 port C1 DISC req: usage 1 usb3 2 usb2 3
563 18:49:10.794105 Raw Buffer output 0 00000321
564 18:49:10.797133 Raw Buffer output 1 00000000
565 18:49:10.801271 pmc_send_ipc_cmd succeeded
566 18:49:10.806707 Detected 4 core, 8 thread CPU.
567 18:49:10.809918 Detected 4 core, 8 thread CPU.
568 18:49:11.044425 Display FSP Version Info HOB
569 18:49:11.047304 Reference Code - CPU = a.0.4c.31
570 18:49:11.050747 uCode Version = 0.0.0.86
571 18:49:11.053791 TXT ACM version = ff.ff.ff.ffff
572 18:49:11.057186 Reference Code - ME = a.0.4c.31
573 18:49:11.060259 MEBx version = 0.0.0.0
574 18:49:11.064135 ME Firmware Version = Consumer SKU
575 18:49:11.067597 Reference Code - PCH = a.0.4c.31
576 18:49:11.070321 PCH-CRID Status = Disabled
577 18:49:11.074010 PCH-CRID Original Value = ff.ff.ff.ffff
578 18:49:11.076909 PCH-CRID New Value = ff.ff.ff.ffff
579 18:49:11.080324 OPROM - RST - RAID = ff.ff.ff.ffff
580 18:49:11.083448 PCH Hsio Version = 4.0.0.0
581 18:49:11.087238 Reference Code - SA - System Agent = a.0.4c.31
582 18:49:11.090876 Reference Code - MRC = 2.0.0.1
583 18:49:11.093810 SA - PCIe Version = a.0.4c.31
584 18:49:11.097291 SA-CRID Status = Disabled
585 18:49:11.100325 SA-CRID Original Value = 0.0.0.1
586 18:49:11.103999 SA-CRID New Value = 0.0.0.1
587 18:49:11.106710 OPROM - VBIOS = ff.ff.ff.ffff
588 18:49:11.110647 IO Manageability Engine FW Version = 11.1.4.0
589 18:49:11.113445 PHY Build Version = 0.0.0.e0
590 18:49:11.117404 Thunderbolt(TM) FW Version = 0.0.0.0
591 18:49:11.123892 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
592 18:49:11.127002 ITSS IRQ Polarities Before:
593 18:49:11.127441 IPC0: 0xffffffff
594 18:49:11.130450 IPC1: 0xffffffff
595 18:49:11.130989 IPC2: 0xffffffff
596 18:49:11.133888 IPC3: 0xffffffff
597 18:49:11.137189 ITSS IRQ Polarities After:
598 18:49:11.137695 IPC0: 0xffffffff
599 18:49:11.140021 IPC1: 0xffffffff
600 18:49:11.140435 IPC2: 0xffffffff
601 18:49:11.143537 IPC3: 0xffffffff
602 18:49:11.147274 Found PCIe Root Port #9 at PCI: 00:1d.0.
603 18:49:11.159729 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
604 18:49:11.170129 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
605 18:49:11.183624 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
606 18:49:11.190022 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
607 18:49:11.193320 Enumerating buses...
608 18:49:11.196915 Show all devs... Before device enumeration.
609 18:49:11.200057 Root Device: enabled 1
610 18:49:11.200498 DOMAIN: 0000: enabled 1
611 18:49:11.203051 CPU_CLUSTER: 0: enabled 1
612 18:49:11.206875 PCI: 00:00.0: enabled 1
613 18:49:11.210222 PCI: 00:02.0: enabled 1
614 18:49:11.210793 PCI: 00:04.0: enabled 1
615 18:49:11.213211 PCI: 00:05.0: enabled 1
616 18:49:11.216806 PCI: 00:06.0: enabled 0
617 18:49:11.217308 PCI: 00:07.0: enabled 0
618 18:49:11.220012 PCI: 00:07.1: enabled 0
619 18:49:11.223665 PCI: 00:07.2: enabled 0
620 18:49:11.226781 PCI: 00:07.3: enabled 0
621 18:49:11.227282 PCI: 00:08.0: enabled 1
622 18:49:11.230074 PCI: 00:09.0: enabled 0
623 18:49:11.233394 PCI: 00:0a.0: enabled 0
624 18:49:11.236479 PCI: 00:0d.0: enabled 1
625 18:49:11.236976 PCI: 00:0d.1: enabled 0
626 18:49:11.239962 PCI: 00:0d.2: enabled 0
627 18:49:11.242947 PCI: 00:0d.3: enabled 0
628 18:49:11.246185 PCI: 00:0e.0: enabled 0
629 18:49:11.246702 PCI: 00:10.2: enabled 1
630 18:49:11.249461 PCI: 00:10.6: enabled 0
631 18:49:11.252658 PCI: 00:10.7: enabled 0
632 18:49:11.256248 PCI: 00:12.0: enabled 0
633 18:49:11.256645 PCI: 00:12.6: enabled 0
634 18:49:11.259685 PCI: 00:13.0: enabled 0
635 18:49:11.263003 PCI: 00:14.0: enabled 1
636 18:49:11.263414 PCI: 00:14.1: enabled 0
637 18:49:11.266001 PCI: 00:14.2: enabled 1
638 18:49:11.269810 PCI: 00:14.3: enabled 1
639 18:49:11.272873 PCI: 00:15.0: enabled 1
640 18:49:11.273266 PCI: 00:15.1: enabled 1
641 18:49:11.276029 PCI: 00:15.2: enabled 1
642 18:49:11.279593 PCI: 00:15.3: enabled 1
643 18:49:11.283213 PCI: 00:16.0: enabled 1
644 18:49:11.283609 PCI: 00:16.1: enabled 0
645 18:49:11.286045 PCI: 00:16.2: enabled 0
646 18:49:11.289558 PCI: 00:16.3: enabled 0
647 18:49:11.292669 PCI: 00:16.4: enabled 0
648 18:49:11.293066 PCI: 00:16.5: enabled 0
649 18:49:11.296583 PCI: 00:17.0: enabled 1
650 18:49:11.299463 PCI: 00:19.0: enabled 0
651 18:49:11.302529 PCI: 00:19.1: enabled 1
652 18:49:11.302929 PCI: 00:19.2: enabled 0
653 18:49:11.306065 PCI: 00:1c.0: enabled 1
654 18:49:11.309355 PCI: 00:1c.1: enabled 0
655 18:49:11.309859 PCI: 00:1c.2: enabled 0
656 18:49:11.313087 PCI: 00:1c.3: enabled 0
657 18:49:11.315738 PCI: 00:1c.4: enabled 0
658 18:49:11.319430 PCI: 00:1c.5: enabled 0
659 18:49:11.319935 PCI: 00:1c.6: enabled 1
660 18:49:11.322947 PCI: 00:1c.7: enabled 0
661 18:49:11.326462 PCI: 00:1d.0: enabled 1
662 18:49:11.329679 PCI: 00:1d.1: enabled 0
663 18:49:11.330176 PCI: 00:1d.2: enabled 1
664 18:49:11.332945 PCI: 00:1d.3: enabled 0
665 18:49:11.336058 PCI: 00:1e.0: enabled 1
666 18:49:11.339485 PCI: 00:1e.1: enabled 0
667 18:49:11.339998 PCI: 00:1e.2: enabled 1
668 18:49:11.342700 PCI: 00:1e.3: enabled 1
669 18:49:11.346116 PCI: 00:1f.0: enabled 1
670 18:49:11.346557 PCI: 00:1f.1: enabled 0
671 18:49:11.349384 PCI: 00:1f.2: enabled 1
672 18:49:11.352652 PCI: 00:1f.3: enabled 1
673 18:49:11.355736 PCI: 00:1f.4: enabled 0
674 18:49:11.356165 PCI: 00:1f.5: enabled 1
675 18:49:11.359422 PCI: 00:1f.6: enabled 0
676 18:49:11.362335 PCI: 00:1f.7: enabled 0
677 18:49:11.366002 APIC: 00: enabled 1
678 18:49:11.366463 GENERIC: 0.0: enabled 1
679 18:49:11.368929 GENERIC: 0.0: enabled 1
680 18:49:11.372295 GENERIC: 1.0: enabled 1
681 18:49:11.372726 GENERIC: 0.0: enabled 1
682 18:49:11.376190 GENERIC: 1.0: enabled 1
683 18:49:11.379539 USB0 port 0: enabled 1
684 18:49:11.382578 GENERIC: 0.0: enabled 1
685 18:49:11.383014 USB0 port 0: enabled 1
686 18:49:11.385827 GENERIC: 0.0: enabled 1
687 18:49:11.388977 I2C: 00:1a: enabled 1
688 18:49:11.389407 I2C: 00:31: enabled 1
689 18:49:11.392321 I2C: 00:32: enabled 1
690 18:49:11.395868 I2C: 00:10: enabled 1
691 18:49:11.396377 I2C: 00:15: enabled 1
692 18:49:11.398866 GENERIC: 0.0: enabled 0
693 18:49:11.402371 GENERIC: 1.0: enabled 0
694 18:49:11.406322 GENERIC: 0.0: enabled 1
695 18:49:11.406893 SPI: 00: enabled 1
696 18:49:11.409074 SPI: 00: enabled 1
697 18:49:11.412669 PNP: 0c09.0: enabled 1
698 18:49:11.413208 GENERIC: 0.0: enabled 1
699 18:49:11.415504 USB3 port 0: enabled 1
700 18:49:11.418932 USB3 port 1: enabled 1
701 18:49:11.419380 USB3 port 2: enabled 0
702 18:49:11.422201 USB3 port 3: enabled 0
703 18:49:11.425984 USB2 port 0: enabled 0
704 18:49:11.429088 USB2 port 1: enabled 1
705 18:49:11.429570 USB2 port 2: enabled 1
706 18:49:11.432732 USB2 port 3: enabled 0
707 18:49:11.435565 USB2 port 4: enabled 1
708 18:49:11.436000 USB2 port 5: enabled 0
709 18:49:11.438699 USB2 port 6: enabled 0
710 18:49:11.442763 USB2 port 7: enabled 0
711 18:49:11.443296 USB2 port 8: enabled 0
712 18:49:11.445734 USB2 port 9: enabled 0
713 18:49:11.449242 USB3 port 0: enabled 0
714 18:49:11.452708 USB3 port 1: enabled 1
715 18:49:11.453137 USB3 port 2: enabled 0
716 18:49:11.455978 USB3 port 3: enabled 0
717 18:49:11.458752 GENERIC: 0.0: enabled 1
718 18:49:11.459183 GENERIC: 1.0: enabled 1
719 18:49:11.462295 APIC: 01: enabled 1
720 18:49:11.465595 APIC: 02: enabled 1
721 18:49:11.466024 APIC: 06: enabled 1
722 18:49:11.469448 APIC: 05: enabled 1
723 18:49:11.472663 APIC: 04: enabled 1
724 18:49:11.473104 APIC: 03: enabled 1
725 18:49:11.475312 APIC: 07: enabled 1
726 18:49:11.475746 Compare with tree...
727 18:49:11.478882 Root Device: enabled 1
728 18:49:11.481875 DOMAIN: 0000: enabled 1
729 18:49:11.485718 PCI: 00:00.0: enabled 1
730 18:49:11.486149 PCI: 00:02.0: enabled 1
731 18:49:11.488940 PCI: 00:04.0: enabled 1
732 18:49:11.492388 GENERIC: 0.0: enabled 1
733 18:49:11.495625 PCI: 00:05.0: enabled 1
734 18:49:11.498759 PCI: 00:06.0: enabled 0
735 18:49:11.499192 PCI: 00:07.0: enabled 0
736 18:49:11.502535 GENERIC: 0.0: enabled 1
737 18:49:11.505455 PCI: 00:07.1: enabled 0
738 18:49:11.508601 GENERIC: 1.0: enabled 1
739 18:49:11.512141 PCI: 00:07.2: enabled 0
740 18:49:11.515825 GENERIC: 0.0: enabled 1
741 18:49:11.516257 PCI: 00:07.3: enabled 0
742 18:49:11.518605 GENERIC: 1.0: enabled 1
743 18:49:11.522153 PCI: 00:08.0: enabled 1
744 18:49:11.525541 PCI: 00:09.0: enabled 0
745 18:49:11.528550 PCI: 00:0a.0: enabled 0
746 18:49:11.529039 PCI: 00:0d.0: enabled 1
747 18:49:11.532199 USB0 port 0: enabled 1
748 18:49:11.535350 USB3 port 0: enabled 1
749 18:49:11.538880 USB3 port 1: enabled 1
750 18:49:11.542300 USB3 port 2: enabled 0
751 18:49:11.542870 USB3 port 3: enabled 0
752 18:49:11.546027 PCI: 00:0d.1: enabled 0
753 18:49:11.548971 PCI: 00:0d.2: enabled 0
754 18:49:11.552020 GENERIC: 0.0: enabled 1
755 18:49:11.555536 PCI: 00:0d.3: enabled 0
756 18:49:11.555968 PCI: 00:0e.0: enabled 0
757 18:49:11.558736 PCI: 00:10.2: enabled 1
758 18:49:11.562188 PCI: 00:10.6: enabled 0
759 18:49:11.565567 PCI: 00:10.7: enabled 0
760 18:49:11.569576 PCI: 00:12.0: enabled 0
761 18:49:11.570114 PCI: 00:12.6: enabled 0
762 18:49:11.572237 PCI: 00:13.0: enabled 0
763 18:49:11.575104 PCI: 00:14.0: enabled 1
764 18:49:11.578560 USB0 port 0: enabled 1
765 18:49:11.582183 USB2 port 0: enabled 0
766 18:49:11.582760 USB2 port 1: enabled 1
767 18:49:11.585358 USB2 port 2: enabled 1
768 18:49:11.589081 USB2 port 3: enabled 0
769 18:49:11.591925 USB2 port 4: enabled 1
770 18:49:11.595314 USB2 port 5: enabled 0
771 18:49:11.598906 USB2 port 6: enabled 0
772 18:49:11.599439 USB2 port 7: enabled 0
773 18:49:11.601982 USB2 port 8: enabled 0
774 18:49:11.605452 USB2 port 9: enabled 0
775 18:49:11.608644 USB3 port 0: enabled 0
776 18:49:11.612609 USB3 port 1: enabled 1
777 18:49:11.613165 USB3 port 2: enabled 0
778 18:49:11.614947 USB3 port 3: enabled 0
779 18:49:11.618953 PCI: 00:14.1: enabled 0
780 18:49:11.622171 PCI: 00:14.2: enabled 1
781 18:49:11.625247 PCI: 00:14.3: enabled 1
782 18:49:11.625780 GENERIC: 0.0: enabled 1
783 18:49:11.628853 PCI: 00:15.0: enabled 1
784 18:49:11.631931 I2C: 00:1a: enabled 1
785 18:49:11.635459 I2C: 00:31: enabled 1
786 18:49:11.638385 I2C: 00:32: enabled 1
787 18:49:11.638865 PCI: 00:15.1: enabled 1
788 18:49:11.642095 I2C: 00:10: enabled 1
789 18:49:11.645173 PCI: 00:15.2: enabled 1
790 18:49:11.648584 PCI: 00:15.3: enabled 1
791 18:49:11.651482 PCI: 00:16.0: enabled 1
792 18:49:11.651915 PCI: 00:16.1: enabled 0
793 18:49:11.655429 PCI: 00:16.2: enabled 0
794 18:49:11.659443 PCI: 00:16.3: enabled 0
795 18:49:11.661701 PCI: 00:16.4: enabled 0
796 18:49:11.662137 PCI: 00:16.5: enabled 0
797 18:49:11.665542 PCI: 00:17.0: enabled 1
798 18:49:11.668525 PCI: 00:19.0: enabled 0
799 18:49:11.671694 PCI: 00:19.1: enabled 1
800 18:49:11.675347 I2C: 00:15: enabled 1
801 18:49:11.675840 PCI: 00:19.2: enabled 0
802 18:49:11.678809 PCI: 00:1d.0: enabled 1
803 18:49:11.682582 GENERIC: 0.0: enabled 1
804 18:49:11.685420 PCI: 00:1e.0: enabled 1
805 18:49:11.685850 PCI: 00:1e.1: enabled 0
806 18:49:11.689129 PCI: 00:1e.2: enabled 1
807 18:49:11.739028 SPI: 00: enabled 1
808 18:49:11.739557 PCI: 00:1e.3: enabled 1
809 18:49:11.739902 SPI: 00: enabled 1
810 18:49:11.740218 PCI: 00:1f.0: enabled 1
811 18:49:11.740523 PNP: 0c09.0: enabled 1
812 18:49:11.741181 PCI: 00:1f.1: enabled 0
813 18:49:11.741516 PCI: 00:1f.2: enabled 1
814 18:49:11.741815 GENERIC: 0.0: enabled 1
815 18:49:11.742108 GENERIC: 0.0: enabled 1
816 18:49:11.742430 GENERIC: 1.0: enabled 1
817 18:49:11.742729 PCI: 00:1f.3: enabled 1
818 18:49:11.743156 PCI: 00:1f.4: enabled 0
819 18:49:11.743530 PCI: 00:1f.5: enabled 1
820 18:49:11.743828 PCI: 00:1f.6: enabled 0
821 18:49:11.744115 PCI: 00:1f.7: enabled 0
822 18:49:11.744399 CPU_CLUSTER: 0: enabled 1
823 18:49:11.744681 APIC: 00: enabled 1
824 18:49:11.744960 APIC: 01: enabled 1
825 18:49:11.745236 APIC: 02: enabled 1
826 18:49:11.745514 APIC: 06: enabled 1
827 18:49:11.745856 APIC: 05: enabled 1
828 18:49:11.746748 APIC: 04: enabled 1
829 18:49:11.747179 APIC: 03: enabled 1
830 18:49:11.750028 APIC: 07: enabled 1
831 18:49:11.753272 Root Device scanning...
832 18:49:11.756913 scan_static_bus for Root Device
833 18:49:11.759798 DOMAIN: 0000 enabled
834 18:49:11.760234 CPU_CLUSTER: 0 enabled
835 18:49:11.763304 DOMAIN: 0000 scanning...
836 18:49:11.766843 PCI: pci_scan_bus for bus 00
837 18:49:11.770098 PCI: 00:00.0 [8086/0000] ops
838 18:49:11.773972 PCI: 00:00.0 [8086/9a12] enabled
839 18:49:11.776677 PCI: 00:02.0 [8086/0000] bus ops
840 18:49:11.779856 PCI: 00:02.0 [8086/9a40] enabled
841 18:49:11.783461 PCI: 00:04.0 [8086/0000] bus ops
842 18:49:11.786477 PCI: 00:04.0 [8086/9a03] enabled
843 18:49:11.790568 PCI: 00:05.0 [8086/9a19] enabled
844 18:49:11.793426 PCI: 00:07.0 [0000/0000] hidden
845 18:49:11.796554 PCI: 00:08.0 [8086/9a11] enabled
846 18:49:11.800080 PCI: 00:0a.0 [8086/9a0d] disabled
847 18:49:11.803368 PCI: 00:0d.0 [8086/0000] bus ops
848 18:49:11.806534 PCI: 00:0d.0 [8086/9a13] enabled
849 18:49:11.810115 PCI: 00:14.0 [8086/0000] bus ops
850 18:49:11.813730 PCI: 00:14.0 [8086/a0ed] enabled
851 18:49:11.817046 PCI: 00:14.2 [8086/a0ef] enabled
852 18:49:11.819974 PCI: 00:14.3 [8086/0000] bus ops
853 18:49:11.823386 PCI: 00:14.3 [8086/a0f0] enabled
854 18:49:11.826715 PCI: 00:15.0 [8086/0000] bus ops
855 18:49:11.829986 PCI: 00:15.0 [8086/a0e8] enabled
856 18:49:11.833887 PCI: 00:15.1 [8086/0000] bus ops
857 18:49:11.836399 PCI: 00:15.1 [8086/a0e9] enabled
858 18:49:11.840297 PCI: 00:15.2 [8086/0000] bus ops
859 18:49:11.843165 PCI: 00:15.2 [8086/a0ea] enabled
860 18:49:11.847067 PCI: 00:15.3 [8086/0000] bus ops
861 18:49:11.849831 PCI: 00:15.3 [8086/a0eb] enabled
862 18:49:11.853720 PCI: 00:16.0 [8086/0000] ops
863 18:49:11.857380 PCI: 00:16.0 [8086/a0e0] enabled
864 18:49:11.863042 PCI: Static device PCI: 00:17.0 not found, disabling it.
865 18:49:11.866497 PCI: 00:19.0 [8086/0000] bus ops
866 18:49:11.869641 PCI: 00:19.0 [8086/a0c5] disabled
867 18:49:11.873436 PCI: 00:19.1 [8086/0000] bus ops
868 18:49:11.876301 PCI: 00:19.1 [8086/a0c6] enabled
869 18:49:11.880212 PCI: 00:1d.0 [8086/0000] bus ops
870 18:49:11.883289 PCI: 00:1d.0 [8086/a0b0] enabled
871 18:49:11.886785 PCI: 00:1e.0 [8086/0000] ops
872 18:49:11.890842 PCI: 00:1e.0 [8086/a0a8] enabled
873 18:49:11.893678 PCI: 00:1e.2 [8086/0000] bus ops
874 18:49:11.896664 PCI: 00:1e.2 [8086/a0aa] enabled
875 18:49:11.899925 PCI: 00:1e.3 [8086/0000] bus ops
876 18:49:11.903276 PCI: 00:1e.3 [8086/a0ab] enabled
877 18:49:11.906961 PCI: 00:1f.0 [8086/0000] bus ops
878 18:49:11.910213 PCI: 00:1f.0 [8086/a087] enabled
879 18:49:11.910777 RTC Init
880 18:49:11.913504 Set power on after power failure.
881 18:49:11.916616 Disabling Deep S3
882 18:49:11.917001 Disabling Deep S3
883 18:49:11.920220 Disabling Deep S4
884 18:49:11.920804 Disabling Deep S4
885 18:49:11.923868 Disabling Deep S5
886 18:49:11.924408 Disabling Deep S5
887 18:49:11.927380 PCI: 00:1f.2 [0000/0000] hidden
888 18:49:11.930434 PCI: 00:1f.3 [8086/0000] bus ops
889 18:49:11.933895 PCI: 00:1f.3 [8086/a0c8] enabled
890 18:49:11.936971 PCI: 00:1f.5 [8086/0000] bus ops
891 18:49:11.940244 PCI: 00:1f.5 [8086/a0a4] enabled
892 18:49:11.943858 PCI: Leftover static devices:
893 18:49:11.947123 PCI: 00:10.2
894 18:49:11.947551 PCI: 00:10.6
895 18:49:11.950182 PCI: 00:10.7
896 18:49:11.950751 PCI: 00:06.0
897 18:49:11.951098 PCI: 00:07.1
898 18:49:11.953045 PCI: 00:07.2
899 18:49:11.953487 PCI: 00:07.3
900 18:49:11.957040 PCI: 00:09.0
901 18:49:11.957569 PCI: 00:0d.1
902 18:49:11.957908 PCI: 00:0d.2
903 18:49:11.959913 PCI: 00:0d.3
904 18:49:11.960343 PCI: 00:0e.0
905 18:49:11.963414 PCI: 00:12.0
906 18:49:11.963845 PCI: 00:12.6
907 18:49:11.964182 PCI: 00:13.0
908 18:49:11.966435 PCI: 00:14.1
909 18:49:11.966877 PCI: 00:16.1
910 18:49:11.970362 PCI: 00:16.2
911 18:49:11.970947 PCI: 00:16.3
912 18:49:11.973203 PCI: 00:16.4
913 18:49:11.973729 PCI: 00:16.5
914 18:49:11.974070 PCI: 00:17.0
915 18:49:11.976513 PCI: 00:19.2
916 18:49:11.976943 PCI: 00:1e.1
917 18:49:11.979706 PCI: 00:1f.1
918 18:49:11.980135 PCI: 00:1f.4
919 18:49:11.980478 PCI: 00:1f.6
920 18:49:11.983860 PCI: 00:1f.7
921 18:49:11.987800 PCI: Check your devicetree.cb.
922 18:49:11.990004 PCI: 00:02.0 scanning...
923 18:49:11.993106 scan_generic_bus for PCI: 00:02.0
924 18:49:11.996279 scan_generic_bus for PCI: 00:02.0 done
925 18:49:11.999633 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 18:49:12.002953 PCI: 00:04.0 scanning...
927 18:49:12.007137 scan_generic_bus for PCI: 00:04.0
928 18:49:12.009718 GENERIC: 0.0 enabled
929 18:49:12.016070 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
930 18:49:12.019725 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
931 18:49:12.022935 PCI: 00:0d.0 scanning...
932 18:49:12.026066 scan_static_bus for PCI: 00:0d.0
933 18:49:12.026540 USB0 port 0 enabled
934 18:49:12.029412 USB0 port 0 scanning...
935 18:49:12.033060 scan_static_bus for USB0 port 0
936 18:49:12.036838 USB3 port 0 enabled
937 18:49:12.037353 USB3 port 1 enabled
938 18:49:12.039952 USB3 port 2 disabled
939 18:49:12.042919 USB3 port 3 disabled
940 18:49:12.043479 USB3 port 0 scanning...
941 18:49:12.046310 scan_static_bus for USB3 port 0
942 18:49:12.053105 scan_static_bus for USB3 port 0 done
943 18:49:12.056742 scan_bus: bus USB3 port 0 finished in 6 msecs
944 18:49:12.059724 USB3 port 1 scanning...
945 18:49:12.063856 scan_static_bus for USB3 port 1
946 18:49:12.066656 scan_static_bus for USB3 port 1 done
947 18:49:12.070250 scan_bus: bus USB3 port 1 finished in 6 msecs
948 18:49:12.072998 scan_static_bus for USB0 port 0 done
949 18:49:12.080280 scan_bus: bus USB0 port 0 finished in 43 msecs
950 18:49:12.083064 scan_static_bus for PCI: 00:0d.0 done
951 18:49:12.086310 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
952 18:49:12.089558 PCI: 00:14.0 scanning...
953 18:49:12.093142 scan_static_bus for PCI: 00:14.0
954 18:49:12.096375 USB0 port 0 enabled
955 18:49:12.099878 USB0 port 0 scanning...
956 18:49:12.103003 scan_static_bus for USB0 port 0
957 18:49:12.103462 USB2 port 0 disabled
958 18:49:12.106702 USB2 port 1 enabled
959 18:49:12.107158 USB2 port 2 enabled
960 18:49:12.109830 USB2 port 3 disabled
961 18:49:12.112817 USB2 port 4 enabled
962 18:49:12.113345 USB2 port 5 disabled
963 18:49:12.116724 USB2 port 6 disabled
964 18:49:12.119678 USB2 port 7 disabled
965 18:49:12.120226 USB2 port 8 disabled
966 18:49:12.123035 USB2 port 9 disabled
967 18:49:12.126262 USB3 port 0 disabled
968 18:49:12.126755 USB3 port 1 enabled
969 18:49:12.129532 USB3 port 2 disabled
970 18:49:12.133348 USB3 port 3 disabled
971 18:49:12.133784 USB2 port 1 scanning...
972 18:49:12.136436 scan_static_bus for USB2 port 1
973 18:49:12.139574 scan_static_bus for USB2 port 1 done
974 18:49:12.146351 scan_bus: bus USB2 port 1 finished in 6 msecs
975 18:49:12.149354 USB2 port 2 scanning...
976 18:49:12.153254 scan_static_bus for USB2 port 2
977 18:49:12.156217 scan_static_bus for USB2 port 2 done
978 18:49:12.159278 scan_bus: bus USB2 port 2 finished in 6 msecs
979 18:49:12.162739 USB2 port 4 scanning...
980 18:49:12.166384 scan_static_bus for USB2 port 4
981 18:49:12.169574 scan_static_bus for USB2 port 4 done
982 18:49:12.172750 scan_bus: bus USB2 port 4 finished in 6 msecs
983 18:49:12.176197 USB3 port 1 scanning...
984 18:49:12.179357 scan_static_bus for USB3 port 1
985 18:49:12.182569 scan_static_bus for USB3 port 1 done
986 18:49:12.189275 scan_bus: bus USB3 port 1 finished in 6 msecs
987 18:49:12.192900 scan_static_bus for USB0 port 0 done
988 18:49:12.195839 scan_bus: bus USB0 port 0 finished in 93 msecs
989 18:49:12.199157 scan_static_bus for PCI: 00:14.0 done
990 18:49:12.206446 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
991 18:49:12.209069 PCI: 00:14.3 scanning...
992 18:49:12.212315 scan_static_bus for PCI: 00:14.3
993 18:49:12.212756 GENERIC: 0.0 enabled
994 18:49:12.215742 scan_static_bus for PCI: 00:14.3 done
995 18:49:12.222522 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
996 18:49:12.225983 PCI: 00:15.0 scanning...
997 18:49:12.229249 scan_static_bus for PCI: 00:15.0
998 18:49:12.229685 I2C: 00:1a enabled
999 18:49:12.232391 I2C: 00:31 enabled
1000 18:49:12.232897 I2C: 00:32 enabled
1001 18:49:12.238903 scan_static_bus for PCI: 00:15.0 done
1002 18:49:12.242702 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1003 18:49:12.245855 PCI: 00:15.1 scanning...
1004 18:49:12.249830 scan_static_bus for PCI: 00:15.1
1005 18:49:12.250323 I2C: 00:10 enabled
1006 18:49:12.253207 scan_static_bus for PCI: 00:15.1 done
1007 18:49:12.259923 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1008 18:49:12.263040 PCI: 00:15.2 scanning...
1009 18:49:12.266086 scan_static_bus for PCI: 00:15.2
1010 18:49:12.269683 scan_static_bus for PCI: 00:15.2 done
1011 18:49:12.272862 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1012 18:49:12.276570 PCI: 00:15.3 scanning...
1013 18:49:12.279603 scan_static_bus for PCI: 00:15.3
1014 18:49:12.283136 scan_static_bus for PCI: 00:15.3 done
1015 18:49:12.289553 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1016 18:49:12.289993 PCI: 00:19.1 scanning...
1017 18:49:12.292722 scan_static_bus for PCI: 00:19.1
1018 18:49:12.296266 I2C: 00:15 enabled
1019 18:49:12.299425 scan_static_bus for PCI: 00:19.1 done
1020 18:49:12.306273 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1021 18:49:12.306751 PCI: 00:1d.0 scanning...
1022 18:49:12.312537 do_pci_scan_bridge for PCI: 00:1d.0
1023 18:49:12.312974 PCI: pci_scan_bus for bus 01
1024 18:49:12.316167 PCI: 01:00.0 [1c5c/174a] enabled
1025 18:49:12.319171 GENERIC: 0.0 enabled
1026 18:49:12.322594 Enabling Common Clock Configuration
1027 18:49:12.329116 L1 Sub-State supported from root port 29
1028 18:49:12.329544 L1 Sub-State Support = 0xf
1029 18:49:12.332440 CommonModeRestoreTime = 0x28
1030 18:49:12.339022 Power On Value = 0x16, Power On Scale = 0x0
1031 18:49:12.339541 ASPM: Enabled L1
1032 18:49:12.342858 PCIe: Max_Payload_Size adjusted to 128
1033 18:49:12.348941 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1034 18:49:12.349458 PCI: 00:1e.2 scanning...
1035 18:49:12.356159 scan_generic_bus for PCI: 00:1e.2
1036 18:49:12.356613 SPI: 00 enabled
1037 18:49:12.362804 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1038 18:49:12.366321 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1039 18:49:12.369163 PCI: 00:1e.3 scanning...
1040 18:49:12.372426 scan_generic_bus for PCI: 00:1e.3
1041 18:49:12.375893 SPI: 00 enabled
1042 18:49:12.379349 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1043 18:49:12.385875 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1044 18:49:12.389304 PCI: 00:1f.0 scanning...
1045 18:49:12.392352 scan_static_bus for PCI: 00:1f.0
1046 18:49:12.392850 PNP: 0c09.0 enabled
1047 18:49:12.396014 PNP: 0c09.0 scanning...
1048 18:49:12.399115 scan_static_bus for PNP: 0c09.0
1049 18:49:12.402717 scan_static_bus for PNP: 0c09.0 done
1050 18:49:12.409449 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1051 18:49:12.412890 scan_static_bus for PCI: 00:1f.0 done
1052 18:49:12.415651 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1053 18:49:12.419006 PCI: 00:1f.2 scanning...
1054 18:49:12.422690 scan_static_bus for PCI: 00:1f.2
1055 18:49:12.425678 GENERIC: 0.0 enabled
1056 18:49:12.426106 GENERIC: 0.0 scanning...
1057 18:49:12.429961 scan_static_bus for GENERIC: 0.0
1058 18:49:12.432515 GENERIC: 0.0 enabled
1059 18:49:12.435989 GENERIC: 1.0 enabled
1060 18:49:12.439241 scan_static_bus for GENERIC: 0.0 done
1061 18:49:12.442373 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1062 18:49:12.449298 scan_static_bus for PCI: 00:1f.2 done
1063 18:49:12.452665 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1064 18:49:12.456135 PCI: 00:1f.3 scanning...
1065 18:49:12.459909 scan_static_bus for PCI: 00:1f.3
1066 18:49:12.463233 scan_static_bus for PCI: 00:1f.3 done
1067 18:49:12.466225 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1068 18:49:12.469275 PCI: 00:1f.5 scanning...
1069 18:49:12.472517 scan_generic_bus for PCI: 00:1f.5
1070 18:49:12.476254 scan_generic_bus for PCI: 00:1f.5 done
1071 18:49:12.482587 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1072 18:49:12.485920 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1073 18:49:12.489189 scan_static_bus for Root Device done
1074 18:49:12.495783 scan_bus: bus Root Device finished in 736 msecs
1075 18:49:12.496360 done
1076 18:49:12.502306 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1077 18:49:12.505392 Chrome EC: UHEPI supported
1078 18:49:12.512112 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1079 18:49:12.518976 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1080 18:49:12.522459 SPI flash protection: WPSW=0 SRP0=0
1081 18:49:12.525668 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 18:49:12.532309 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1083 18:49:12.535466 found VGA at PCI: 00:02.0
1084 18:49:12.538994 Setting up VGA for PCI: 00:02.0
1085 18:49:12.541959 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 18:49:12.548988 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 18:49:12.552003 Allocating resources...
1088 18:49:12.552459 Reading resources...
1089 18:49:12.558662 Root Device read_resources bus 0 link: 0
1090 18:49:12.562372 DOMAIN: 0000 read_resources bus 0 link: 0
1091 18:49:12.565514 PCI: 00:04.0 read_resources bus 1 link: 0
1092 18:49:12.572780 PCI: 00:04.0 read_resources bus 1 link: 0 done
1093 18:49:12.575606 PCI: 00:0d.0 read_resources bus 0 link: 0
1094 18:49:12.582572 USB0 port 0 read_resources bus 0 link: 0
1095 18:49:12.585892 USB0 port 0 read_resources bus 0 link: 0 done
1096 18:49:12.592245 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1097 18:49:12.595627 PCI: 00:14.0 read_resources bus 0 link: 0
1098 18:49:12.599041 USB0 port 0 read_resources bus 0 link: 0
1099 18:49:12.607269 USB0 port 0 read_resources bus 0 link: 0 done
1100 18:49:12.610120 PCI: 00:14.0 read_resources bus 0 link: 0 done
1101 18:49:12.616959 PCI: 00:14.3 read_resources bus 0 link: 0
1102 18:49:12.620707 PCI: 00:14.3 read_resources bus 0 link: 0 done
1103 18:49:12.626561 PCI: 00:15.0 read_resources bus 0 link: 0
1104 18:49:12.630062 PCI: 00:15.0 read_resources bus 0 link: 0 done
1105 18:49:12.636599 PCI: 00:15.1 read_resources bus 0 link: 0
1106 18:49:12.640214 PCI: 00:15.1 read_resources bus 0 link: 0 done
1107 18:49:12.646995 PCI: 00:19.1 read_resources bus 0 link: 0
1108 18:49:12.650749 PCI: 00:19.1 read_resources bus 0 link: 0 done
1109 18:49:12.657462 PCI: 00:1d.0 read_resources bus 1 link: 0
1110 18:49:12.660627 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1111 18:49:12.667470 PCI: 00:1e.2 read_resources bus 2 link: 0
1112 18:49:12.670627 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1113 18:49:12.677094 PCI: 00:1e.3 read_resources bus 3 link: 0
1114 18:49:12.680518 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1115 18:49:12.687519 PCI: 00:1f.0 read_resources bus 0 link: 0
1116 18:49:12.690710 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1117 18:49:12.696721 PCI: 00:1f.2 read_resources bus 0 link: 0
1118 18:49:12.700437 GENERIC: 0.0 read_resources bus 0 link: 0
1119 18:49:12.706456 GENERIC: 0.0 read_resources bus 0 link: 0 done
1120 18:49:12.710341 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1121 18:49:12.716726 DOMAIN: 0000 read_resources bus 0 link: 0 done
1122 18:49:12.720224 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1123 18:49:12.726329 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1124 18:49:12.729586 Root Device read_resources bus 0 link: 0 done
1125 18:49:12.733667 Done reading resources.
1126 18:49:12.740311 Show resources in subtree (Root Device)...After reading.
1127 18:49:12.743336 Root Device child on link 0 DOMAIN: 0000
1128 18:49:12.746273 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1129 18:49:12.761647 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1130 18:49:12.766600 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1131 18:49:12.767055 PCI: 00:00.0
1132 18:49:12.776814 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1133 18:49:12.786839 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1134 18:49:12.795884 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1135 18:49:12.805827 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1136 18:49:12.816386 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1137 18:49:12.825764 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1138 18:49:12.833365 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1139 18:49:12.842471 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1140 18:49:12.852694 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1141 18:49:12.862340 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1142 18:49:12.872231 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1143 18:49:12.879422 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1144 18:49:12.889231 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1145 18:49:12.898665 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1146 18:49:12.908999 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1147 18:49:12.918698 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1148 18:49:12.929231 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1149 18:49:12.939191 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1150 18:49:12.945082 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1151 18:49:12.955586 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1152 18:49:12.958515 PCI: 00:02.0
1153 18:49:12.968593 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 18:49:12.978269 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1155 18:49:12.988409 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1156 18:49:12.991425 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1157 18:49:13.001473 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1158 18:49:13.001905 GENERIC: 0.0
1159 18:49:13.004727 PCI: 00:05.0
1160 18:49:13.015044 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1161 18:49:13.018446 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1162 18:49:13.021468 GENERIC: 0.0
1163 18:49:13.021893 PCI: 00:08.0
1164 18:49:13.031440 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 18:49:13.035045 PCI: 00:0a.0
1166 18:49:13.038467 PCI: 00:0d.0 child on link 0 USB0 port 0
1167 18:49:13.048557 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 18:49:13.054635 USB0 port 0 child on link 0 USB3 port 0
1169 18:49:13.055105 USB3 port 0
1170 18:49:13.058159 USB3 port 1
1171 18:49:13.058626 USB3 port 2
1172 18:49:13.061203 USB3 port 3
1173 18:49:13.064878 PCI: 00:14.0 child on link 0 USB0 port 0
1174 18:49:13.075039 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1175 18:49:13.077916 USB0 port 0 child on link 0 USB2 port 0
1176 18:49:13.081646 USB2 port 0
1177 18:49:13.082087 USB2 port 1
1178 18:49:13.084688 USB2 port 2
1179 18:49:13.088251 USB2 port 3
1180 18:49:13.088689 USB2 port 4
1181 18:49:13.091823 USB2 port 5
1182 18:49:13.092374 USB2 port 6
1183 18:49:13.095334 USB2 port 7
1184 18:49:13.095774 USB2 port 8
1185 18:49:13.098264 USB2 port 9
1186 18:49:13.098753 USB3 port 0
1187 18:49:13.101592 USB3 port 1
1188 18:49:13.102029 USB3 port 2
1189 18:49:13.104808 USB3 port 3
1190 18:49:13.105246 PCI: 00:14.2
1191 18:49:13.114538 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 18:49:13.124443 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 18:49:13.130880 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 18:49:13.140969 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 18:49:13.141421 GENERIC: 0.0
1196 18:49:13.147790 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 18:49:13.157812 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 18:49:13.158238 I2C: 00:1a
1199 18:49:13.160878 I2C: 00:31
1200 18:49:13.161297 I2C: 00:32
1201 18:49:13.164785 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 18:49:13.174168 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 18:49:13.177477 I2C: 00:10
1204 18:49:13.177901 PCI: 00:15.2
1205 18:49:13.187929 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 18:49:13.190454 PCI: 00:15.3
1207 18:49:13.201153 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 18:49:13.201585 PCI: 00:16.0
1209 18:49:13.211120 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 18:49:13.213790 PCI: 00:19.0
1211 18:49:13.217290 PCI: 00:19.1 child on link 0 I2C: 00:15
1212 18:49:13.227284 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 18:49:13.230499 I2C: 00:15
1214 18:49:13.233654 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1215 18:49:13.243678 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1216 18:49:13.253618 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1217 18:49:13.260221 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1218 18:49:13.263938 GENERIC: 0.0
1219 18:49:13.264366 PCI: 01:00.0
1220 18:49:13.273505 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 18:49:13.283789 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1222 18:49:13.293859 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1223 18:49:13.294287 PCI: 00:1e.0
1224 18:49:13.306695 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1225 18:49:13.310385 PCI: 00:1e.2 child on link 0 SPI: 00
1226 18:49:13.320293 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 18:49:13.320778 SPI: 00
1228 18:49:13.326607 PCI: 00:1e.3 child on link 0 SPI: 00
1229 18:49:13.336585 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 18:49:13.337010 SPI: 00
1231 18:49:13.340150 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1232 18:49:13.349873 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1233 18:49:13.350331 PNP: 0c09.0
1234 18:49:13.360040 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1235 18:49:13.363039 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1236 18:49:13.373369 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1237 18:49:13.383335 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1238 18:49:13.386475 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1239 18:49:13.390437 GENERIC: 0.0
1240 18:49:13.393486 GENERIC: 1.0
1241 18:49:13.393989 PCI: 00:1f.3
1242 18:49:13.403572 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 18:49:13.412988 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1244 18:49:13.416242 PCI: 00:1f.5
1245 18:49:13.423042 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1246 18:49:13.429754 CPU_CLUSTER: 0 child on link 0 APIC: 00
1247 18:49:13.430281 APIC: 00
1248 18:49:13.430772 APIC: 01
1249 18:49:13.433004 APIC: 02
1250 18:49:13.433567 APIC: 06
1251 18:49:13.434069 APIC: 05
1252 18:49:13.436378 APIC: 04
1253 18:49:13.436881 APIC: 03
1254 18:49:13.440027 APIC: 07
1255 18:49:13.446685 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1256 18:49:13.453382 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1257 18:49:13.459586 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1258 18:49:13.462637 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1259 18:49:13.469680 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1260 18:49:13.473081 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1261 18:49:13.476038 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1262 18:49:13.482941 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1263 18:49:13.492686 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1264 18:49:13.499404 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1265 18:49:13.506393 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1266 18:49:13.513068 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1267 18:49:13.519798 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1268 18:49:13.526342 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1269 18:49:13.535975 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1270 18:49:13.540023 DOMAIN: 0000: Resource ranges:
1271 18:49:13.542800 * Base: 1000, Size: 800, Tag: 100
1272 18:49:13.546026 * Base: 1900, Size: e700, Tag: 100
1273 18:49:13.549108 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1274 18:49:13.559473 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1275 18:49:13.565847 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1276 18:49:13.572510 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1277 18:49:13.578987 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1278 18:49:13.589196 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1279 18:49:13.595584 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1280 18:49:13.602572 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1281 18:49:13.612682 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1282 18:49:13.618875 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1283 18:49:13.625563 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1284 18:49:13.631878 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1285 18:49:13.641991 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1286 18:49:13.649134 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1287 18:49:13.655845 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1288 18:49:13.665528 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1289 18:49:13.671809 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1290 18:49:13.678281 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1291 18:49:13.688856 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1292 18:49:13.694987 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1293 18:49:13.701429 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1294 18:49:13.712120 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1295 18:49:13.718459 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1296 18:49:13.725185 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1297 18:49:13.734778 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1298 18:49:13.738465 DOMAIN: 0000: Resource ranges:
1299 18:49:13.741642 * Base: 7fc00000, Size: 40400000, Tag: 200
1300 18:49:13.744973 * Base: d0000000, Size: 28000000, Tag: 200
1301 18:49:13.751380 * Base: fa000000, Size: 1000000, Tag: 200
1302 18:49:13.754749 * Base: fb001000, Size: 2fff000, Tag: 200
1303 18:49:13.758051 * Base: fe010000, Size: 2e000, Tag: 200
1304 18:49:13.761428 * Base: fe03f000, Size: d41000, Tag: 200
1305 18:49:13.768318 * Base: fed88000, Size: 8000, Tag: 200
1306 18:49:13.771422 * Base: fed93000, Size: d000, Tag: 200
1307 18:49:13.774970 * Base: feda2000, Size: 1e000, Tag: 200
1308 18:49:13.777912 * Base: fede0000, Size: 1220000, Tag: 200
1309 18:49:13.784770 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1310 18:49:13.791697 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1311 18:49:13.797664 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1312 18:49:13.804401 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1313 18:49:13.811064 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1314 18:49:13.817971 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1315 18:49:13.824455 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1316 18:49:13.830971 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1317 18:49:13.837916 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1318 18:49:13.844942 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1319 18:49:13.851541 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1320 18:49:13.857685 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1321 18:49:13.864502 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1322 18:49:13.870871 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1323 18:49:13.877313 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1324 18:49:13.884374 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1325 18:49:13.891015 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1326 18:49:13.897458 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1327 18:49:13.903979 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1328 18:49:13.910883 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1329 18:49:13.917488 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1330 18:49:13.924290 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1331 18:49:13.930293 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1332 18:49:13.937373 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1333 18:49:13.947135 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1334 18:49:13.950977 PCI: 00:1d.0: Resource ranges:
1335 18:49:13.953646 * Base: 7fc00000, Size: 100000, Tag: 200
1336 18:49:13.960295 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1337 18:49:13.967057 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1338 18:49:13.973842 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1339 18:49:13.980489 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1340 18:49:13.990169 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1341 18:49:13.993567 Root Device assign_resources, bus 0 link: 0
1342 18:49:13.997094 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 18:49:14.006953 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1344 18:49:14.013679 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1345 18:49:14.023992 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1346 18:49:14.030306 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1347 18:49:14.037204 PCI: 00:04.0 assign_resources, bus 1 link: 0
1348 18:49:14.039882 PCI: 00:04.0 assign_resources, bus 1 link: 0
1349 18:49:14.046383 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1350 18:49:14.057045 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1351 18:49:14.063306 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1352 18:49:14.070006 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1353 18:49:14.073532 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1354 18:49:14.083289 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1355 18:49:14.086209 PCI: 00:14.0 assign_resources, bus 0 link: 0
1356 18:49:14.089620 PCI: 00:14.0 assign_resources, bus 0 link: 0
1357 18:49:14.100084 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1358 18:49:14.106711 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1359 18:49:14.116583 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1360 18:49:14.120284 PCI: 00:14.3 assign_resources, bus 0 link: 0
1361 18:49:14.126215 PCI: 00:14.3 assign_resources, bus 0 link: 0
1362 18:49:14.133342 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1363 18:49:14.136947 PCI: 00:15.0 assign_resources, bus 0 link: 0
1364 18:49:14.143104 PCI: 00:15.0 assign_resources, bus 0 link: 0
1365 18:49:14.149482 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1366 18:49:14.156187 PCI: 00:15.1 assign_resources, bus 0 link: 0
1367 18:49:14.159697 PCI: 00:15.1 assign_resources, bus 0 link: 0
1368 18:49:14.169760 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1369 18:49:14.176104 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1370 18:49:14.186245 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1371 18:49:14.192666 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1372 18:49:14.195760 PCI: 00:19.1 assign_resources, bus 0 link: 0
1373 18:49:14.202463 PCI: 00:19.1 assign_resources, bus 0 link: 0
1374 18:49:14.209022 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1375 18:49:14.219505 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1376 18:49:14.229559 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1377 18:49:14.232482 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1378 18:49:14.242247 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1379 18:49:14.249322 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1380 18:49:14.259239 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1381 18:49:14.262570 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1382 18:49:14.272332 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1383 18:49:14.275434 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1384 18:49:14.278947 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1385 18:49:14.288775 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1386 18:49:14.292490 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1387 18:49:14.298837 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1388 18:49:14.302466 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1389 18:49:14.308891 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1390 18:49:14.312277 LPC: Trying to open IO window from 800 size 1ff
1391 18:49:14.322297 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1392 18:49:14.328913 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1393 18:49:14.335119 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1394 18:49:14.342008 DOMAIN: 0000 assign_resources, bus 0 link: 0
1395 18:49:14.345687 Root Device assign_resources, bus 0 link: 0
1396 18:49:14.348518 Done setting resources.
1397 18:49:14.355966 Show resources in subtree (Root Device)...After assigning values.
1398 18:49:14.358726 Root Device child on link 0 DOMAIN: 0000
1399 18:49:14.362305 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1400 18:49:14.372387 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1401 18:49:14.381812 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1402 18:49:14.385484 PCI: 00:00.0
1403 18:49:14.395187 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1404 18:49:14.405314 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1405 18:49:14.411272 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1406 18:49:14.421520 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1407 18:49:14.431854 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1408 18:49:14.441570 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1409 18:49:14.451526 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1410 18:49:14.461052 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1411 18:49:14.468048 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1412 18:49:14.477767 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1413 18:49:14.487975 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1414 18:49:14.498037 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1415 18:49:14.507565 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1416 18:49:14.514530 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1417 18:49:14.524702 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1418 18:49:14.534496 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1419 18:49:14.544525 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1420 18:49:14.554124 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1421 18:49:14.564480 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1422 18:49:14.574105 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1423 18:49:14.574585 PCI: 00:02.0
1424 18:49:14.583652 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1425 18:49:14.597473 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1426 18:49:14.603801 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1427 18:49:14.610219 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1428 18:49:14.620361 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1429 18:49:14.620809 GENERIC: 0.0
1430 18:49:14.623358 PCI: 00:05.0
1431 18:49:14.633706 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1432 18:49:14.636940 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1433 18:49:14.640531 GENERIC: 0.0
1434 18:49:14.640954 PCI: 00:08.0
1435 18:49:14.653680 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1436 18:49:14.654198 PCI: 00:0a.0
1437 18:49:14.657388 PCI: 00:0d.0 child on link 0 USB0 port 0
1438 18:49:14.670243 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1439 18:49:14.673621 USB0 port 0 child on link 0 USB3 port 0
1440 18:49:14.674047 USB3 port 0
1441 18:49:14.676959 USB3 port 1
1442 18:49:14.677382 USB3 port 2
1443 18:49:14.680166 USB3 port 3
1444 18:49:14.683366 PCI: 00:14.0 child on link 0 USB0 port 0
1445 18:49:14.694127 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1446 18:49:14.700374 USB0 port 0 child on link 0 USB2 port 0
1447 18:49:14.700805 USB2 port 0
1448 18:49:14.703699 USB2 port 1
1449 18:49:14.704137 USB2 port 2
1450 18:49:14.706703 USB2 port 3
1451 18:49:14.707125 USB2 port 4
1452 18:49:14.710265 USB2 port 5
1453 18:49:14.710734 USB2 port 6
1454 18:49:14.713378 USB2 port 7
1455 18:49:14.717247 USB2 port 8
1456 18:49:14.717798 USB2 port 9
1457 18:49:14.720061 USB3 port 0
1458 18:49:14.720503 USB3 port 1
1459 18:49:14.723568 USB3 port 2
1460 18:49:14.724014 USB3 port 3
1461 18:49:14.727067 PCI: 00:14.2
1462 18:49:14.736856 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1463 18:49:14.746626 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1464 18:49:14.750122 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1465 18:49:14.760257 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1466 18:49:14.763521 GENERIC: 0.0
1467 18:49:14.766509 PCI: 00:15.0 child on link 0 I2C: 00:1a
1468 18:49:14.776650 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1469 18:49:14.780408 I2C: 00:1a
1470 18:49:14.780846 I2C: 00:31
1471 18:49:14.783621 I2C: 00:32
1472 18:49:14.786663 PCI: 00:15.1 child on link 0 I2C: 00:10
1473 18:49:14.797033 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1474 18:49:14.800238 I2C: 00:10
1475 18:49:14.800674 PCI: 00:15.2
1476 18:49:14.809905 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1477 18:49:14.813072 PCI: 00:15.3
1478 18:49:14.823086 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1479 18:49:14.823611 PCI: 00:16.0
1480 18:49:14.833274 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1481 18:49:14.836387 PCI: 00:19.0
1482 18:49:14.839858 PCI: 00:19.1 child on link 0 I2C: 00:15
1483 18:49:14.850030 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1484 18:49:14.852779 I2C: 00:15
1485 18:49:14.856240 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1486 18:49:14.866321 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1487 18:49:14.879973 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1488 18:49:14.890108 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1489 18:49:14.890691 GENERIC: 0.0
1490 18:49:14.892579 PCI: 01:00.0
1491 18:49:14.903535 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1492 18:49:14.912435 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1493 18:49:14.922479 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1494 18:49:14.926089 PCI: 00:1e.0
1495 18:49:14.935666 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1496 18:49:14.939323 PCI: 00:1e.2 child on link 0 SPI: 00
1497 18:49:14.949148 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1498 18:49:14.952713 SPI: 00
1499 18:49:14.955762 PCI: 00:1e.3 child on link 0 SPI: 00
1500 18:49:14.965752 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1501 18:49:14.966181 SPI: 00
1502 18:49:14.972797 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1503 18:49:14.979044 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1504 18:49:14.982309 PNP: 0c09.0
1505 18:49:14.992369 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1506 18:49:14.996009 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1507 18:49:15.006161 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1508 18:49:15.012440 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1509 18:49:15.019083 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1510 18:49:15.019527 GENERIC: 0.0
1511 18:49:15.022103 GENERIC: 1.0
1512 18:49:15.022650 PCI: 00:1f.3
1513 18:49:15.035661 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1514 18:49:15.045469 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1515 18:49:15.046017 PCI: 00:1f.5
1516 18:49:15.055746 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1517 18:49:15.062174 CPU_CLUSTER: 0 child on link 0 APIC: 00
1518 18:49:15.062677 APIC: 00
1519 18:49:15.063163 APIC: 01
1520 18:49:15.065655 APIC: 02
1521 18:49:15.066090 APIC: 06
1522 18:49:15.069001 APIC: 05
1523 18:49:15.069442 APIC: 04
1524 18:49:15.069796 APIC: 03
1525 18:49:15.072330 APIC: 07
1526 18:49:15.075466 Done allocating resources.
1527 18:49:15.078966 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1528 18:49:15.085753 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1529 18:49:15.089070 Configure GPIOs for I2S audio on UP4.
1530 18:49:15.096315 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1531 18:49:15.099949 Enabling resources...
1532 18:49:15.102957 PCI: 00:00.0 subsystem <- 8086/9a12
1533 18:49:15.106948 PCI: 00:00.0 cmd <- 06
1534 18:49:15.109827 PCI: 00:02.0 subsystem <- 8086/9a40
1535 18:49:15.112891 PCI: 00:02.0 cmd <- 03
1536 18:49:15.116734 PCI: 00:04.0 subsystem <- 8086/9a03
1537 18:49:15.117168 PCI: 00:04.0 cmd <- 02
1538 18:49:15.123329 PCI: 00:05.0 subsystem <- 8086/9a19
1539 18:49:15.123776 PCI: 00:05.0 cmd <- 02
1540 18:49:15.126258 PCI: 00:08.0 subsystem <- 8086/9a11
1541 18:49:15.129870 PCI: 00:08.0 cmd <- 06
1542 18:49:15.133376 PCI: 00:0d.0 subsystem <- 8086/9a13
1543 18:49:15.136995 PCI: 00:0d.0 cmd <- 02
1544 18:49:15.139494 PCI: 00:14.0 subsystem <- 8086/a0ed
1545 18:49:15.143028 PCI: 00:14.0 cmd <- 02
1546 18:49:15.146103 PCI: 00:14.2 subsystem <- 8086/a0ef
1547 18:49:15.149699 PCI: 00:14.2 cmd <- 02
1548 18:49:15.152951 PCI: 00:14.3 subsystem <- 8086/a0f0
1549 18:49:15.156449 PCI: 00:14.3 cmd <- 02
1550 18:49:15.160054 PCI: 00:15.0 subsystem <- 8086/a0e8
1551 18:49:15.162902 PCI: 00:15.0 cmd <- 02
1552 18:49:15.165980 PCI: 00:15.1 subsystem <- 8086/a0e9
1553 18:49:15.166588 PCI: 00:15.1 cmd <- 02
1554 18:49:15.173283 PCI: 00:15.2 subsystem <- 8086/a0ea
1555 18:49:15.173708 PCI: 00:15.2 cmd <- 02
1556 18:49:15.176493 PCI: 00:15.3 subsystem <- 8086/a0eb
1557 18:49:15.179539 PCI: 00:15.3 cmd <- 02
1558 18:49:15.183320 PCI: 00:16.0 subsystem <- 8086/a0e0
1559 18:49:15.186033 PCI: 00:16.0 cmd <- 02
1560 18:49:15.189550 PCI: 00:19.1 subsystem <- 8086/a0c6
1561 18:49:15.192978 PCI: 00:19.1 cmd <- 02
1562 18:49:15.196194 PCI: 00:1d.0 bridge ctrl <- 0013
1563 18:49:15.199702 PCI: 00:1d.0 subsystem <- 8086/a0b0
1564 18:49:15.202884 PCI: 00:1d.0 cmd <- 06
1565 18:49:15.205935 PCI: 00:1e.0 subsystem <- 8086/a0a8
1566 18:49:15.209292 PCI: 00:1e.0 cmd <- 06
1567 18:49:15.213030 PCI: 00:1e.2 subsystem <- 8086/a0aa
1568 18:49:15.216128 PCI: 00:1e.2 cmd <- 06
1569 18:49:15.219556 PCI: 00:1e.3 subsystem <- 8086/a0ab
1570 18:49:15.220005 PCI: 00:1e.3 cmd <- 02
1571 18:49:15.226381 PCI: 00:1f.0 subsystem <- 8086/a087
1572 18:49:15.226857 PCI: 00:1f.0 cmd <- 407
1573 18:49:15.229380 PCI: 00:1f.3 subsystem <- 8086/a0c8
1574 18:49:15.232759 PCI: 00:1f.3 cmd <- 02
1575 18:49:15.236010 PCI: 00:1f.5 subsystem <- 8086/a0a4
1576 18:49:15.239396 PCI: 00:1f.5 cmd <- 406
1577 18:49:15.243944 PCI: 01:00.0 cmd <- 02
1578 18:49:15.248488 done.
1579 18:49:15.251601 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1580 18:49:15.255401 Initializing devices...
1581 18:49:15.258588 Root Device init
1582 18:49:15.261682 Chrome EC: Set SMI mask to 0x0000000000000000
1583 18:49:15.268239 Chrome EC: clear events_b mask to 0x0000000000000000
1584 18:49:15.274605 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1585 18:49:15.278278 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1586 18:49:15.285185 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1587 18:49:15.291721 Chrome EC: Set WAKE mask to 0x0000000000000000
1588 18:49:15.294896 fw_config match found: DB_USB=USB3_ACTIVE
1589 18:49:15.301583 Configure Right Type-C port orientation for retimer
1590 18:49:15.305000 Root Device init finished in 42 msecs
1591 18:49:15.308548 PCI: 00:00.0 init
1592 18:49:15.308993 CPU TDP = 9 Watts
1593 18:49:15.311440 CPU PL1 = 9 Watts
1594 18:49:15.315381 CPU PL2 = 40 Watts
1595 18:49:15.315825 CPU PL4 = 83 Watts
1596 18:49:15.318098 PCI: 00:00.0 init finished in 8 msecs
1597 18:49:15.321420 PCI: 00:02.0 init
1598 18:49:15.324744 GMA: Found VBT in CBFS
1599 18:49:15.328589 GMA: Found valid VBT in CBFS
1600 18:49:15.331740 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1601 18:49:15.341550 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1602 18:49:15.345028 PCI: 00:02.0 init finished in 18 msecs
1603 18:49:15.348267 PCI: 00:05.0 init
1604 18:49:15.351164 PCI: 00:05.0 init finished in 0 msecs
1605 18:49:15.351674 PCI: 00:08.0 init
1606 18:49:15.358477 PCI: 00:08.0 init finished in 0 msecs
1607 18:49:15.359004 PCI: 00:14.0 init
1608 18:49:15.364676 PCI: 00:14.0 init finished in 0 msecs
1609 18:49:15.365146 PCI: 00:14.2 init
1610 18:49:15.368218 PCI: 00:14.2 init finished in 0 msecs
1611 18:49:15.371565 PCI: 00:15.0 init
1612 18:49:15.375184 I2C bus 0 version 0x3230302a
1613 18:49:15.378226 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1614 18:49:15.381662 PCI: 00:15.0 init finished in 6 msecs
1615 18:49:15.384814 PCI: 00:15.1 init
1616 18:49:15.388398 I2C bus 1 version 0x3230302a
1617 18:49:15.391435 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1618 18:49:15.394915 PCI: 00:15.1 init finished in 6 msecs
1619 18:49:15.398263 PCI: 00:15.2 init
1620 18:49:15.401319 I2C bus 2 version 0x3230302a
1621 18:49:15.404829 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1622 18:49:15.408440 PCI: 00:15.2 init finished in 6 msecs
1623 18:49:15.408889 PCI: 00:15.3 init
1624 18:49:15.411254 I2C bus 3 version 0x3230302a
1625 18:49:15.415234 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1626 18:49:15.421423 PCI: 00:15.3 init finished in 6 msecs
1627 18:49:15.421985 PCI: 00:16.0 init
1628 18:49:15.424476 PCI: 00:16.0 init finished in 0 msecs
1629 18:49:15.428333 PCI: 00:19.1 init
1630 18:49:15.431620 I2C bus 5 version 0x3230302a
1631 18:49:15.435171 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1632 18:49:15.438475 PCI: 00:19.1 init finished in 6 msecs
1633 18:49:15.441581 PCI: 00:1d.0 init
1634 18:49:15.444672 Initializing PCH PCIe bridge.
1635 18:49:15.448566 PCI: 00:1d.0 init finished in 3 msecs
1636 18:49:15.451541 PCI: 00:1f.0 init
1637 18:49:15.455018 IOAPIC: Initializing IOAPIC at 0xfec00000
1638 18:49:15.461737 IOAPIC: Bootstrap Processor Local APIC = 0x00
1639 18:49:15.462254 IOAPIC: ID = 0x02
1640 18:49:15.464922 IOAPIC: Dumping registers
1641 18:49:15.468019 reg 0x0000: 0x02000000
1642 18:49:15.468445 reg 0x0001: 0x00770020
1643 18:49:15.471859 reg 0x0002: 0x00000000
1644 18:49:15.474908 PCI: 00:1f.0 init finished in 21 msecs
1645 18:49:15.478473 PCI: 00:1f.2 init
1646 18:49:15.482353 Disabling ACPI via APMC.
1647 18:49:15.485432 APMC done.
1648 18:49:15.488372 PCI: 00:1f.2 init finished in 5 msecs
1649 18:49:15.499456 PCI: 01:00.0 init
1650 18:49:15.503193 PCI: 01:00.0 init finished in 0 msecs
1651 18:49:15.506171 PNP: 0c09.0 init
1652 18:49:15.509645 Google Chrome EC uptime: 8.426 seconds
1653 18:49:15.515773 Google Chrome AP resets since EC boot: 1
1654 18:49:15.519374 Google Chrome most recent AP reset causes:
1655 18:49:15.522648 0.379: 32775 shutdown: entering G3
1656 18:49:15.529282 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1657 18:49:15.532575 PNP: 0c09.0 init finished in 22 msecs
1658 18:49:15.538337 Devices initialized
1659 18:49:15.541763 Show all devs... After init.
1660 18:49:15.545258 Root Device: enabled 1
1661 18:49:15.545697 DOMAIN: 0000: enabled 1
1662 18:49:15.548484 CPU_CLUSTER: 0: enabled 1
1663 18:49:15.551754 PCI: 00:00.0: enabled 1
1664 18:49:15.555092 PCI: 00:02.0: enabled 1
1665 18:49:15.555513 PCI: 00:04.0: enabled 1
1666 18:49:15.557938 PCI: 00:05.0: enabled 1
1667 18:49:15.561212 PCI: 00:06.0: enabled 0
1668 18:49:15.565370 PCI: 00:07.0: enabled 0
1669 18:49:15.565838 PCI: 00:07.1: enabled 0
1670 18:49:15.568333 PCI: 00:07.2: enabled 0
1671 18:49:15.571679 PCI: 00:07.3: enabled 0
1672 18:49:15.574699 PCI: 00:08.0: enabled 1
1673 18:49:15.575119 PCI: 00:09.0: enabled 0
1674 18:49:15.578493 PCI: 00:0a.0: enabled 0
1675 18:49:15.581232 PCI: 00:0d.0: enabled 1
1676 18:49:15.584466 PCI: 00:0d.1: enabled 0
1677 18:49:15.584884 PCI: 00:0d.2: enabled 0
1678 18:49:15.587964 PCI: 00:0d.3: enabled 0
1679 18:49:15.591895 PCI: 00:0e.0: enabled 0
1680 18:49:15.592313 PCI: 00:10.2: enabled 1
1681 18:49:15.594810 PCI: 00:10.6: enabled 0
1682 18:49:15.597919 PCI: 00:10.7: enabled 0
1683 18:49:15.601281 PCI: 00:12.0: enabled 0
1684 18:49:15.601670 PCI: 00:12.6: enabled 0
1685 18:49:15.604472 PCI: 00:13.0: enabled 0
1686 18:49:15.608207 PCI: 00:14.0: enabled 1
1687 18:49:15.611190 PCI: 00:14.1: enabled 0
1688 18:49:15.611607 PCI: 00:14.2: enabled 1
1689 18:49:15.614627 PCI: 00:14.3: enabled 1
1690 18:49:15.618498 PCI: 00:15.0: enabled 1
1691 18:49:15.620951 PCI: 00:15.1: enabled 1
1692 18:49:15.621372 PCI: 00:15.2: enabled 1
1693 18:49:15.624740 PCI: 00:15.3: enabled 1
1694 18:49:15.628222 PCI: 00:16.0: enabled 1
1695 18:49:15.628640 PCI: 00:16.1: enabled 0
1696 18:49:15.631581 PCI: 00:16.2: enabled 0
1697 18:49:15.634452 PCI: 00:16.3: enabled 0
1698 18:49:15.637759 PCI: 00:16.4: enabled 0
1699 18:49:15.638194 PCI: 00:16.5: enabled 0
1700 18:49:15.641096 PCI: 00:17.0: enabled 0
1701 18:49:15.644361 PCI: 00:19.0: enabled 0
1702 18:49:15.647529 PCI: 00:19.1: enabled 1
1703 18:49:15.647951 PCI: 00:19.2: enabled 0
1704 18:49:15.651294 PCI: 00:1c.0: enabled 1
1705 18:49:15.654450 PCI: 00:1c.1: enabled 0
1706 18:49:15.657809 PCI: 00:1c.2: enabled 0
1707 18:49:15.658466 PCI: 00:1c.3: enabled 0
1708 18:49:15.660880 PCI: 00:1c.4: enabled 0
1709 18:49:15.664744 PCI: 00:1c.5: enabled 0
1710 18:49:15.667975 PCI: 00:1c.6: enabled 1
1711 18:49:15.668432 PCI: 00:1c.7: enabled 0
1712 18:49:15.670903 PCI: 00:1d.0: enabled 1
1713 18:49:15.674542 PCI: 00:1d.1: enabled 0
1714 18:49:15.674979 PCI: 00:1d.2: enabled 1
1715 18:49:15.677629 PCI: 00:1d.3: enabled 0
1716 18:49:15.681106 PCI: 00:1e.0: enabled 1
1717 18:49:15.684406 PCI: 00:1e.1: enabled 0
1718 18:49:15.684962 PCI: 00:1e.2: enabled 1
1719 18:49:15.687698 PCI: 00:1e.3: enabled 1
1720 18:49:15.690975 PCI: 00:1f.0: enabled 1
1721 18:49:15.694547 PCI: 00:1f.1: enabled 0
1722 18:49:15.694981 PCI: 00:1f.2: enabled 1
1723 18:49:15.697979 PCI: 00:1f.3: enabled 1
1724 18:49:15.701160 PCI: 00:1f.4: enabled 0
1725 18:49:15.701581 PCI: 00:1f.5: enabled 1
1726 18:49:15.704430 PCI: 00:1f.6: enabled 0
1727 18:49:15.708075 PCI: 00:1f.7: enabled 0
1728 18:49:15.711252 APIC: 00: enabled 1
1729 18:49:15.711670 GENERIC: 0.0: enabled 1
1730 18:49:15.714226 GENERIC: 0.0: enabled 1
1731 18:49:15.718263 GENERIC: 1.0: enabled 1
1732 18:49:15.720759 GENERIC: 0.0: enabled 1
1733 18:49:15.721178 GENERIC: 1.0: enabled 1
1734 18:49:15.724492 USB0 port 0: enabled 1
1735 18:49:15.727329 GENERIC: 0.0: enabled 1
1736 18:49:15.727801 USB0 port 0: enabled 1
1737 18:49:15.730869 GENERIC: 0.0: enabled 1
1738 18:49:15.733896 I2C: 00:1a: enabled 1
1739 18:49:15.737633 I2C: 00:31: enabled 1
1740 18:49:15.738051 I2C: 00:32: enabled 1
1741 18:49:15.741190 I2C: 00:10: enabled 1
1742 18:49:15.743818 I2C: 00:15: enabled 1
1743 18:49:15.744238 GENERIC: 0.0: enabled 0
1744 18:49:15.747815 GENERIC: 1.0: enabled 0
1745 18:49:15.750890 GENERIC: 0.0: enabled 1
1746 18:49:15.751307 SPI: 00: enabled 1
1747 18:49:15.754513 SPI: 00: enabled 1
1748 18:49:15.757245 PNP: 0c09.0: enabled 1
1749 18:49:15.757689 GENERIC: 0.0: enabled 1
1750 18:49:15.760634 USB3 port 0: enabled 1
1751 18:49:15.763786 USB3 port 1: enabled 1
1752 18:49:15.767667 USB3 port 2: enabled 0
1753 18:49:15.768095 USB3 port 3: enabled 0
1754 18:49:15.771012 USB2 port 0: enabled 0
1755 18:49:15.774052 USB2 port 1: enabled 1
1756 18:49:15.774517 USB2 port 2: enabled 1
1757 18:49:15.777049 USB2 port 3: enabled 0
1758 18:49:15.780512 USB2 port 4: enabled 1
1759 18:49:15.780937 USB2 port 5: enabled 0
1760 18:49:15.783912 USB2 port 6: enabled 0
1761 18:49:15.786975 USB2 port 7: enabled 0
1762 18:49:15.791005 USB2 port 8: enabled 0
1763 18:49:15.791425 USB2 port 9: enabled 0
1764 18:49:15.793724 USB3 port 0: enabled 0
1765 18:49:15.797495 USB3 port 1: enabled 1
1766 18:49:15.797914 USB3 port 2: enabled 0
1767 18:49:15.800447 USB3 port 3: enabled 0
1768 18:49:15.804748 GENERIC: 0.0: enabled 1
1769 18:49:15.807332 GENERIC: 1.0: enabled 1
1770 18:49:15.807750 APIC: 01: enabled 1
1771 18:49:15.810378 APIC: 02: enabled 1
1772 18:49:15.810865 APIC: 06: enabled 1
1773 18:49:15.814009 APIC: 05: enabled 1
1774 18:49:15.817142 APIC: 04: enabled 1
1775 18:49:15.817560 APIC: 03: enabled 1
1776 18:49:15.820322 APIC: 07: enabled 1
1777 18:49:15.823932 PCI: 01:00.0: enabled 1
1778 18:49:15.827324 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1779 18:49:15.833639 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1780 18:49:15.837154 ELOG: NV offset 0xf30000 size 0x1000
1781 18:49:15.843359 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1782 18:49:15.850595 ELOG: Event(17) added with size 13 at 2024-03-01 18:49:13 UTC
1783 18:49:15.857317 ELOG: Event(92) added with size 9 at 2024-03-01 18:49:13 UTC
1784 18:49:15.863185 ELOG: Event(93) added with size 9 at 2024-03-01 18:49:13 UTC
1785 18:49:15.869866 ELOG: Event(9E) added with size 10 at 2024-03-01 18:49:13 UTC
1786 18:49:15.876782 ELOG: Event(9F) added with size 14 at 2024-03-01 18:49:13 UTC
1787 18:49:15.883493 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1788 18:49:15.886239 ELOG: Event(A1) added with size 10 at 2024-03-01 18:49:13 UTC
1789 18:49:15.892850 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1790 18:49:15.899685 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1791 18:49:15.903694 Finalize devices...
1792 18:49:15.904123 Devices finalized
1793 18:49:15.910243 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1794 18:49:15.916237 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1795 18:49:15.919877 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1796 18:49:15.926388 ME: HFSTS1 : 0x80030055
1797 18:49:15.929664 ME: HFSTS2 : 0x30280116
1798 18:49:15.933199 ME: HFSTS3 : 0x00000050
1799 18:49:15.939400 ME: HFSTS4 : 0x00004000
1800 18:49:15.943353 ME: HFSTS5 : 0x00000000
1801 18:49:15.945961 ME: HFSTS6 : 0x00400006
1802 18:49:15.952541 ME: Manufacturing Mode : YES
1803 18:49:15.956505 ME: SPI Protection Mode Enabled : NO
1804 18:49:15.959557 ME: FW Partition Table : OK
1805 18:49:15.962728 ME: Bringup Loader Failure : NO
1806 18:49:15.966433 ME: Firmware Init Complete : NO
1807 18:49:15.969588 ME: Boot Options Present : NO
1808 18:49:15.972538 ME: Update In Progress : NO
1809 18:49:15.976231 ME: D0i3 Support : YES
1810 18:49:15.982686 ME: Low Power State Enabled : NO
1811 18:49:15.986202 ME: CPU Replaced : YES
1812 18:49:15.989435 ME: CPU Replacement Valid : YES
1813 18:49:15.992812 ME: Current Working State : 5
1814 18:49:15.995773 ME: Current Operation State : 1
1815 18:49:15.999203 ME: Current Operation Mode : 3
1816 18:49:16.002807 ME: Error Code : 0
1817 18:49:16.006221 ME: Enhanced Debug Mode : NO
1818 18:49:16.009721 ME: CPU Debug Disabled : YES
1819 18:49:16.015583 ME: TXT Support : NO
1820 18:49:16.018856 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1821 18:49:16.028852 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1822 18:49:16.032239 CBFS: 'fallback/slic' not found.
1823 18:49:16.035658 ACPI: Writing ACPI tables at 76b01000.
1824 18:49:16.035841 ACPI: * FACS
1825 18:49:16.039122 ACPI: * DSDT
1826 18:49:16.042086 Ramoops buffer: 0x100000@0x76a00000.
1827 18:49:16.045741 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1828 18:49:16.052206 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1829 18:49:16.055747 Google Chrome EC: version:
1830 18:49:16.058602 ro: voema_v2.0.7540-147f8d37d1
1831 18:49:16.061814 rw: voema_v2.0.7540-147f8d37d1
1832 18:49:16.062150 running image: 2
1833 18:49:16.068824 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1834 18:49:16.073929 ACPI: * FADT
1835 18:49:16.074349 SCI is IRQ9
1836 18:49:16.080830 ACPI: added table 1/32, length now 40
1837 18:49:16.081275 ACPI: * SSDT
1838 18:49:16.084376 Found 1 CPU(s) with 8 core(s) each.
1839 18:49:16.091261 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1840 18:49:16.093927 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1841 18:49:16.097677 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1842 18:49:16.101185 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1843 18:49:16.107063 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1844 18:49:16.113773 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1845 18:49:16.117323 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1846 18:49:16.123718 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1847 18:49:16.130251 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1848 18:49:16.133652 \_SB.PCI0.RP09: Added StorageD3Enable property
1849 18:49:16.137057 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1850 18:49:16.143791 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1851 18:49:16.150351 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1852 18:49:16.153858 PS2K: Passing 80 keymaps to kernel
1853 18:49:16.160713 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1854 18:49:16.167587 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1855 18:49:16.173717 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1856 18:49:16.180522 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1857 18:49:16.187083 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1858 18:49:16.193575 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1859 18:49:16.200376 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1860 18:49:16.206674 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1861 18:49:16.210386 ACPI: added table 2/32, length now 44
1862 18:49:16.213328 ACPI: * MCFG
1863 18:49:16.216920 ACPI: added table 3/32, length now 48
1864 18:49:16.217344 ACPI: * TPM2
1865 18:49:16.220093 TPM2 log created at 0x769f0000
1866 18:49:16.223418 ACPI: added table 4/32, length now 52
1867 18:49:16.226870 ACPI: * MADT
1868 18:49:16.227287 SCI is IRQ9
1869 18:49:16.230372 ACPI: added table 5/32, length now 56
1870 18:49:16.233381 current = 76b09850
1871 18:49:16.233800 ACPI: * DMAR
1872 18:49:16.240406 ACPI: added table 6/32, length now 60
1873 18:49:16.243095 ACPI: added table 7/32, length now 64
1874 18:49:16.243393 ACPI: * HPET
1875 18:49:16.246798 ACPI: added table 8/32, length now 68
1876 18:49:16.250223 ACPI: done.
1877 18:49:16.250538 ACPI tables: 35216 bytes.
1878 18:49:16.253080 smbios_write_tables: 769ef000
1879 18:49:16.256319 EC returned error result code 3
1880 18:49:16.259695 Couldn't obtain OEM name from CBI
1881 18:49:16.263696 Create SMBIOS type 16
1882 18:49:16.267115 Create SMBIOS type 17
1883 18:49:16.270154 GENERIC: 0.0 (WIFI Device)
1884 18:49:16.270235 SMBIOS tables: 1750 bytes.
1885 18:49:16.276569 Writing table forward entry at 0x00000500
1886 18:49:16.283339 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1887 18:49:16.286955 Writing coreboot table at 0x76b25000
1888 18:49:16.293193 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1889 18:49:16.296779 1. 0000000000001000-000000000009ffff: RAM
1890 18:49:16.300747 2. 00000000000a0000-00000000000fffff: RESERVED
1891 18:49:16.306998 3. 0000000000100000-00000000769eefff: RAM
1892 18:49:16.310335 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1893 18:49:16.316493 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1894 18:49:16.323343 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1895 18:49:16.326818 7. 0000000077000000-000000007fbfffff: RESERVED
1896 18:49:16.329818 8. 00000000c0000000-00000000cfffffff: RESERVED
1897 18:49:16.336332 9. 00000000f8000000-00000000f9ffffff: RESERVED
1898 18:49:16.339981 10. 00000000fb000000-00000000fb000fff: RESERVED
1899 18:49:16.347037 11. 00000000fe000000-00000000fe00ffff: RESERVED
1900 18:49:16.350464 12. 00000000fed80000-00000000fed87fff: RESERVED
1901 18:49:16.356256 13. 00000000fed90000-00000000fed92fff: RESERVED
1902 18:49:16.360229 14. 00000000feda0000-00000000feda1fff: RESERVED
1903 18:49:16.366391 15. 00000000fedc0000-00000000feddffff: RESERVED
1904 18:49:16.369439 16. 0000000100000000-00000002803fffff: RAM
1905 18:49:16.372926 Passing 4 GPIOs to payload:
1906 18:49:16.376286 NAME | PORT | POLARITY | VALUE
1907 18:49:16.382664 lid | undefined | high | high
1908 18:49:16.389642 power | undefined | high | low
1909 18:49:16.392794 oprom | undefined | high | low
1910 18:49:16.399644 EC in RW | 0x000000e5 | high | high
1911 18:49:16.406082 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 4192
1912 18:49:16.406184 coreboot table: 1576 bytes.
1913 18:49:16.412991 IMD ROOT 0. 0x76fff000 0x00001000
1914 18:49:16.416034 IMD SMALL 1. 0x76ffe000 0x00001000
1915 18:49:16.419570 FSP MEMORY 2. 0x76c4e000 0x003b0000
1916 18:49:16.422714 VPD 3. 0x76c4d000 0x00000367
1917 18:49:16.426320 RO MCACHE 4. 0x76c4c000 0x00000fdc
1918 18:49:16.429440 CONSOLE 5. 0x76c2c000 0x00020000
1919 18:49:16.433201 FMAP 6. 0x76c2b000 0x00000578
1920 18:49:16.436124 TIME STAMP 7. 0x76c2a000 0x00000910
1921 18:49:16.442830 VBOOT WORK 8. 0x76c16000 0x00014000
1922 18:49:16.446232 ROMSTG STCK 9. 0x76c15000 0x00001000
1923 18:49:16.449863 AFTER CAR 10. 0x76c0a000 0x0000b000
1924 18:49:16.452977 RAMSTAGE 11. 0x76b97000 0x00073000
1925 18:49:16.456450 REFCODE 12. 0x76b42000 0x00055000
1926 18:49:16.459466 SMM BACKUP 13. 0x76b32000 0x00010000
1927 18:49:16.463200 4f444749 14. 0x76b30000 0x00002000
1928 18:49:16.466302 EXT VBT15. 0x76b2d000 0x0000219f
1929 18:49:16.469502 COREBOOT 16. 0x76b25000 0x00008000
1930 18:49:16.473160 ACPI 17. 0x76b01000 0x00024000
1931 18:49:16.480319 ACPI GNVS 18. 0x76b00000 0x00001000
1932 18:49:16.482714 RAMOOPS 19. 0x76a00000 0x00100000
1933 18:49:16.486795 TPM2 TCGLOG20. 0x769f0000 0x00010000
1934 18:49:16.489903 SMBIOS 21. 0x769ef000 0x00000800
1935 18:49:16.489985 IMD small region:
1936 18:49:16.496540 IMD ROOT 0. 0x76ffec00 0x00000400
1937 18:49:16.499769 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1938 18:49:16.503233 POWER STATE 2. 0x76ffeb80 0x00000044
1939 18:49:16.506252 ROMSTAGE 3. 0x76ffeb60 0x00000004
1940 18:49:16.509776 MEM INFO 4. 0x76ffe980 0x000001e0
1941 18:49:16.516593 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1942 18:49:16.519471 MTRR: Physical address space:
1943 18:49:16.526430 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1944 18:49:16.533167 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1945 18:49:16.539953 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1946 18:49:16.546758 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1947 18:49:16.549857 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1948 18:49:16.556581 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1949 18:49:16.562925 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1950 18:49:16.566684 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 18:49:16.573075 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 18:49:16.576324 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 18:49:16.579941 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 18:49:16.582968 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 18:49:16.589592 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 18:49:16.592574 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 18:49:16.595974 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 18:49:16.599532 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 18:49:16.605866 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 18:49:16.609496 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 18:49:16.612854 call enable_fixed_mtrr()
1962 18:49:16.615927 CPU physical address size: 39 bits
1963 18:49:16.619545 MTRR: default type WB/UC MTRR counts: 6/6.
1964 18:49:16.622489 MTRR: UC selected as default type.
1965 18:49:16.629389 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1966 18:49:16.635931 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1967 18:49:16.642851 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1968 18:49:16.649440 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1969 18:49:16.656606 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1970 18:49:16.662265 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1971 18:49:16.665977 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 18:49:16.672333 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 18:49:16.676022 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 18:49:16.679313 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 18:49:16.682587 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 18:49:16.688605 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 18:49:16.692348 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 18:49:16.695644 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 18:49:16.699057 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 18:49:16.705667 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 18:49:16.709162 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 18:49:16.711836 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 18:49:16.715274 call enable_fixed_mtrr()
1984 18:49:16.718464 MTRR: Fixed MSR 0x258 0x0606060606060606
1985 18:49:16.725306 MTRR: Fixed MSR 0x259 0x0000000000000000
1986 18:49:16.728332 MTRR: Fixed MSR 0x268 0x0606060606060606
1987 18:49:16.731719 MTRR: Fixed MSR 0x269 0x0606060606060606
1988 18:49:16.735216 MTRR: Fixed MSR 0x26a 0x0606060606060606
1989 18:49:16.741437 MTRR: Fixed MSR 0x26b 0x0606060606060606
1990 18:49:16.744959 MTRR: Fixed MSR 0x26c 0x0606060606060606
1991 18:49:16.748267 MTRR: Fixed MSR 0x26d 0x0606060606060606
1992 18:49:16.751254 MTRR: Fixed MSR 0x26e 0x0606060606060606
1993 18:49:16.758056 MTRR: Fixed MSR 0x26f 0x0606060606060606
1994 18:49:16.761058 CPU physical address size: 39 bits
1995 18:49:16.764630 call enable_fixed_mtrr()
1996 18:49:16.768013 MTRR: Fixed MSR 0x250 0x0606060606060606
1997 18:49:16.774593 MTRR: Fixed MSR 0x250 0x0606060606060606
1998 18:49:16.777644 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 18:49:16.780851 MTRR: Fixed MSR 0x259 0x0000000000000000
2000 18:49:16.784711 MTRR: Fixed MSR 0x268 0x0606060606060606
2001 18:49:16.788102 MTRR: Fixed MSR 0x269 0x0606060606060606
2002 18:49:16.794572 MTRR: Fixed MSR 0x26a 0x0606060606060606
2003 18:49:16.798057 MTRR: Fixed MSR 0x26b 0x0606060606060606
2004 18:49:16.801033 MTRR: Fixed MSR 0x26c 0x0606060606060606
2005 18:49:16.804192 MTRR: Fixed MSR 0x26d 0x0606060606060606
2006 18:49:16.811229 MTRR: Fixed MSR 0x26e 0x0606060606060606
2007 18:49:16.814229 MTRR: Fixed MSR 0x26f 0x0606060606060606
2008 18:49:16.817282 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 18:49:16.821267 call enable_fixed_mtrr()
2010 18:49:16.824314 MTRR: Fixed MSR 0x259 0x0000000000000000
2011 18:49:16.830875 MTRR: Fixed MSR 0x268 0x0606060606060606
2012 18:49:16.834345 MTRR: Fixed MSR 0x269 0x0606060606060606
2013 18:49:16.837492 MTRR: Fixed MSR 0x26a 0x0606060606060606
2014 18:49:16.841097 MTRR: Fixed MSR 0x26b 0x0606060606060606
2015 18:49:16.847285 MTRR: Fixed MSR 0x26c 0x0606060606060606
2016 18:49:16.850560 MTRR: Fixed MSR 0x26d 0x0606060606060606
2017 18:49:16.854149 MTRR: Fixed MSR 0x26e 0x0606060606060606
2018 18:49:16.857082 MTRR: Fixed MSR 0x26f 0x0606060606060606
2019 18:49:16.861397 CPU physical address size: 39 bits
2020 18:49:16.867909 call enable_fixed_mtrr()
2021 18:49:16.871351 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 18:49:16.871801
2023 18:49:16.872146 MTRR check
2024 18:49:16.875048 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 18:49:16.881498 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 18:49:16.884529 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 18:49:16.888351 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 18:49:16.891623 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 18:49:16.897600 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 18:49:16.901637 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 18:49:16.904967 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 18:49:16.907498 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 18:49:16.914770 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 18:49:16.917908 Fixed MTRRs : call enable_fixed_mtrr()
2035 18:49:16.921182 CPU physical address size: 39 bits
2036 18:49:16.924724 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 18:49:16.931220 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 18:49:16.934846 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 18:49:16.937897 MTRR: Fixed MSR 0x259 0x0000000000000000
2040 18:49:16.940881 MTRR: Fixed MSR 0x268 0x0606060606060606
2041 18:49:16.947697 MTRR: Fixed MSR 0x269 0x0606060606060606
2042 18:49:16.951199 MTRR: Fixed MSR 0x26a 0x0606060606060606
2043 18:49:16.954170 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 18:49:16.957676 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 18:49:16.963883 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 18:49:16.968361 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 18:49:16.971479 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 18:49:16.977428 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 18:49:16.977857 call enable_fixed_mtrr()
2050 18:49:16.984108 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 18:49:16.987898 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 18:49:16.990873 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 18:49:16.993880 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 18:49:17.000634 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 18:49:17.003964 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 18:49:17.007388 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 18:49:17.010516 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 18:49:17.013897 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 18:49:17.023170 CPU physical address size: 39 bits
2060 18:49:17.024113 call enable_fixed_mtrr()
2061 18:49:17.027403 CPU physical address size: 39 bits
2062 18:49:17.030509 Enabled
2063 18:49:17.033751 CPU physical address size: 39 bits
2064 18:49:17.037483 CPU physical address size: 39 bits
2065 18:49:17.037951 Variable MTRRs: Enabled
2066 18:49:17.038294
2067 18:49:17.043849 BS: BS_WRITE_TABLES exit times (exec / console): 370 / 152 ms
2068 18:49:17.047524 Checking cr50 for pending updates
2069 18:49:17.055427 Reading cr50 TPM mode
2070 18:49:17.065686 BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 6 ms
2071 18:49:17.075717 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2072 18:49:17.079262 Checking segment from ROM address 0xffc02b38
2073 18:49:17.082259 Checking segment from ROM address 0xffc02b54
2074 18:49:17.088869 Loading segment from ROM address 0xffc02b38
2075 18:49:17.089318 code (compression=0)
2076 18:49:17.099283 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2077 18:49:17.105913 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2078 18:49:17.108884 it's not compressed!
2079 18:49:17.248602 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2080 18:49:17.254647 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2081 18:49:17.261603 Loading segment from ROM address 0xffc02b54
2082 18:49:17.262035 Entry Point 0x30000000
2083 18:49:17.264954 Loaded segments
2084 18:49:17.271218 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2085 18:49:17.314365 Finalizing chipset.
2086 18:49:17.317895 Finalizing SMM.
2087 18:49:17.318325 APMC done.
2088 18:49:17.324578 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2089 18:49:17.327588 mp_park_aps done after 0 msecs.
2090 18:49:17.330883 Jumping to boot code at 0x30000000(0x76b25000)
2091 18:49:17.340798 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2092 18:49:17.341231
2093 18:49:17.341566
2094 18:49:17.341880
2095 18:49:17.344449 Starting depthcharge on Voema...
2096 18:49:17.344876
2097 18:49:17.345938 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2098 18:49:17.346458 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2099 18:49:17.346931 Setting prompt string to ['volteer:']
2100 18:49:17.347527 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2101 18:49:17.354030 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2102 18:49:17.354518
2103 18:49:17.360876 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2104 18:49:17.361332
2105 18:49:17.367112 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2106 18:49:17.367637
2107 18:49:17.370793 Failed to find eMMC card reader
2108 18:49:17.371234
2109 18:49:17.371676 Wipe memory regions:
2110 18:49:17.372097
2111 18:49:17.377646 [0x00000000001000, 0x000000000a0000)
2112 18:49:17.378086
2113 18:49:17.380751 [0x00000000100000, 0x00000030000000)
2114 18:49:17.406353
2115 18:49:17.409514 [0x00000032662db0, 0x000000769ef000)
2116 18:49:17.445479
2117 18:49:17.448516 [0x00000100000000, 0x00000280400000)
2118 18:49:17.649857
2119 18:49:17.652855 ec_init: CrosEC protocol v3 supported (256, 256)
2120 18:49:17.652966
2121 18:49:17.659691 update_port_state: port C0 state: usb enable 1 mux conn 0
2122 18:49:17.659808
2123 18:49:17.666414 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2124 18:49:17.670433
2125 18:49:17.674162 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2126 18:49:17.674361
2127 18:49:17.677221 send_conn_disc_msg: pmc_send_cmd succeeded
2128 18:49:18.109298
2129 18:49:18.109975 R8152: Initializing
2130 18:49:18.110547
2131 18:49:18.112437 Version 6 (ocp_data = 5c30)
2132 18:49:18.112878
2133 18:49:18.115476 R8152: Done initializing
2134 18:49:18.115958
2135 18:49:18.119000 Adding net device
2136 18:49:18.420339
2137 18:49:18.423724 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2138 18:49:18.424215
2139 18:49:18.424561
2140 18:49:18.424881
2141 18:49:18.426740 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2143 18:49:18.527982 volteer: tftpboot 192.168.201.1 12909599/tftp-deploy-cj4xsgx5/kernel/bzImage 12909599/tftp-deploy-cj4xsgx5/kernel/cmdline 12909599/tftp-deploy-cj4xsgx5/ramdisk/ramdisk.cpio.gz
2144 18:49:18.528575 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2145 18:49:18.529078 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2146 18:49:18.533155 tftpboot 192.168.201.1 12909599/tftp-deploy-cj4xsgx5/kernel/bzImloy-cj4xsgx5/kernel/cmdline 12909599/tftp-deploy-cj4xsgx5/ramdisk/ramdisk.cpio.gz
2147 18:49:18.533604
2148 18:49:18.533942 Waiting for link
2149 18:49:18.737434
2150 18:49:18.737948 done.
2151 18:49:18.738290
2152 18:49:18.738696 MAC: 00:24:32:30:7b:ec
2153 18:49:18.739067
2154 18:49:18.740393 Sending DHCP discover... done.
2155 18:49:18.740817
2156 18:49:18.744228 Waiting for reply... done.
2157 18:49:18.744692
2158 18:49:18.747166 Sending DHCP request... done.
2159 18:49:18.747795
2160 18:49:18.753816 Waiting for reply... done.
2161 18:49:18.754243
2162 18:49:18.754697 My ip is 192.168.201.11
2163 18:49:18.755026
2164 18:49:18.757362 The DHCP server ip is 192.168.201.1
2165 18:49:18.757810
2166 18:49:18.763670 TFTP server IP predefined by user: 192.168.201.1
2167 18:49:18.764115
2168 18:49:18.770112 Bootfile predefined by user: 12909599/tftp-deploy-cj4xsgx5/kernel/bzImage
2169 18:49:18.770704
2170 18:49:18.773620 Sending tftp read request... done.
2171 18:49:18.774049
2172 18:49:18.782546 Waiting for the transfer...
2173 18:49:18.782981
2174 18:49:19.445394 00000000 ################################################################
2175 18:49:19.445904
2176 18:49:20.081325 00080000 ################################################################
2177 18:49:20.081470
2178 18:49:20.681085 00100000 ################################################################
2179 18:49:20.681216
2180 18:49:21.272540 00180000 ################################################################
2181 18:49:21.272676
2182 18:49:21.863411 00200000 ################################################################
2183 18:49:21.863553
2184 18:49:22.411831 00280000 ################################################################
2185 18:49:22.411985
2186 18:49:22.935964 00300000 ################################################################
2187 18:49:22.936103
2188 18:49:23.456162 00380000 ################################################################
2189 18:49:23.456300
2190 18:49:23.976653 00400000 ################################################################
2191 18:49:23.976790
2192 18:49:24.492237 00480000 ################################################################
2193 18:49:24.492403
2194 18:49:25.007998 00500000 ################################################################
2195 18:49:25.008167
2196 18:49:25.521592 00580000 ################################################################
2197 18:49:25.521755
2198 18:49:26.039023 00600000 ################################################################
2199 18:49:26.039192
2200 18:49:26.554445 00680000 ################################################################
2201 18:49:26.554600
2202 18:49:27.070219 00700000 ################################################################
2203 18:49:27.070382
2204 18:49:27.586582 00780000 ################################################################
2205 18:49:27.586725
2206 18:49:28.102640 00800000 ################################################################
2207 18:49:28.102780
2208 18:49:28.617123 00880000 ################################################################
2209 18:49:28.617276
2210 18:49:29.135102 00900000 ################################################################
2211 18:49:29.135240
2212 18:49:29.655034 00980000 ################################################################
2213 18:49:29.655197
2214 18:49:30.178729 00a00000 ################################################################
2215 18:49:30.178861
2216 18:49:30.697597 00a80000 ################################################################
2217 18:49:30.697734
2218 18:49:31.225797 00b00000 ################################################################
2219 18:49:31.225941
2220 18:49:31.527288 00b80000 #################################### done.
2221 18:49:31.527436
2222 18:49:31.530445 The bootfile was 12349440 bytes long.
2223 18:49:31.530558
2224 18:49:31.533732 Sending tftp read request... done.
2225 18:49:31.533835
2226 18:49:31.537372 Waiting for the transfer...
2227 18:49:31.537499
2228 18:49:32.062083 00000000 ################################################################
2229 18:49:32.062223
2230 18:49:32.588968 00080000 ################################################################
2231 18:49:32.589129
2232 18:49:33.114035 00100000 ################################################################
2233 18:49:33.114173
2234 18:49:33.639315 00180000 ################################################################
2235 18:49:33.639456
2236 18:49:34.162844 00200000 ################################################################
2237 18:49:34.163031
2238 18:49:34.686209 00280000 ################################################################
2239 18:49:34.686379
2240 18:49:35.210422 00300000 ################################################################
2241 18:49:35.210561
2242 18:49:35.724625 00380000 ################################################################
2243 18:49:35.724764
2244 18:49:36.244965 00400000 ################################################################
2245 18:49:36.245125
2246 18:49:36.773021 00480000 ################################################################
2247 18:49:36.773154
2248 18:49:37.301011 00500000 ################################################################
2249 18:49:37.301147
2250 18:49:37.834314 00580000 ################################################################
2251 18:49:37.834487
2252 18:49:38.360405 00600000 ################################################################
2253 18:49:38.360609
2254 18:49:38.877408 00680000 ################################################################
2255 18:49:38.877568
2256 18:49:39.397587 00700000 ################################################################
2257 18:49:39.397741
2258 18:49:39.931876 00780000 ################################################################
2259 18:49:39.932051
2260 18:49:40.534028 00800000 ################################################################
2261 18:49:40.534207
2262 18:49:40.857512 00880000 ##################################### done.
2263 18:49:40.857709
2264 18:49:40.861532 Sending tftp read request... done.
2265 18:49:40.861641
2266 18:49:40.861742 Waiting for the transfer...
2267 18:49:40.864392
2268 18:49:40.864471 00000000 # done.
2269 18:49:40.864555
2270 18:49:40.874935 Command line loaded dynamically from TFTP file: 12909599/tftp-deploy-cj4xsgx5/kernel/cmdline
2271 18:49:40.875025
2272 18:49:40.887575 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2273 18:49:40.894312
2274 18:49:40.897509 Shutting down all USB controllers.
2275 18:49:40.897595
2276 18:49:40.897660 Removing current net device
2277 18:49:40.897734
2278 18:49:40.900780 Finalizing coreboot
2279 18:49:40.900862
2280 18:49:40.907333 Exiting depthcharge with code 4 at timestamp: 32209807
2281 18:49:40.907415
2282 18:49:40.907479
2283 18:49:40.907539 Starting kernel ...
2284 18:49:40.907596
2285 18:49:40.907652
2286 18:49:40.908056 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
2287 18:49:40.908154 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2288 18:49:40.908228 Setting prompt string to ['Linux version [0-9]']
2289 18:49:40.908315 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2290 18:49:40.908384 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2292 18:54:01.908453 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2294 18:54:01.908677 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2296 18:54:01.908836 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2299 18:54:01.909088 end: 2 depthcharge-action (duration 00:05:00) [common]
2301 18:54:01.909305 Cleaning after the job
2302 18:54:01.909392 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909599/tftp-deploy-cj4xsgx5/ramdisk
2303 18:54:01.911109 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909599/tftp-deploy-cj4xsgx5/kernel
2304 18:54:01.912962 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909599/tftp-deploy-cj4xsgx5/modules
2305 18:54:01.913589 start: 5.1 power-off (timeout 00:00:30) [common]
2306 18:54:01.913748 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2307 18:54:01.993614 >> Command sent successfully.
2308 18:54:01.996099 Returned 0 in 0 seconds
2309 18:54:02.096508 end: 5.1 power-off (duration 00:00:00) [common]
2311 18:54:02.096863 start: 5.2 read-feedback (timeout 00:10:00) [common]
2312 18:54:02.097121 Listened to connection for namespace 'common' for up to 1s
2313 18:54:03.098106 Finalising connection for namespace 'common'
2314 18:54:03.098310 Disconnecting from shell: Finalise
2315 18:54:03.098458
2316 18:54:03.198772 end: 5.2 read-feedback (duration 00:00:01) [common]
2317 18:54:03.198934 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12909599
2318 18:54:03.217433 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12909599
2319 18:54:03.217595 JobError: Your job cannot terminate cleanly.