Boot log: acer-cbv514-1h-34uz-brya
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 18:49:00.373224 lava-dispatcher, installed at version: 2024.01
2 18:49:00.373518 start: 0 validate
3 18:49:00.373684 Start time: 2024-03-01 18:49:00.373674+00:00 (UTC)
4 18:49:00.373885 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:49:00.374086 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 18:49:00.639889 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:49:00.640062 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:49:00.899924 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:49:00.900605 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 18:49:07.084797 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:49:07.085539 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 18:49:08.091487 validate duration: 7.72
14 18:49:08.091756 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:49:08.091855 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:49:08.091940 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:49:08.092061 Not decompressing ramdisk as can be used compressed.
18 18:49:08.092144 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/initrd.cpio.gz
19 18:49:08.092207 saving as /var/lib/lava/dispatcher/tmp/12909594/tftp-deploy-lfs99dwd/ramdisk/initrd.cpio.gz
20 18:49:08.092268 total size: 5431448 (5 MB)
21 18:49:08.093314 progress 0 % (0 MB)
22 18:49:08.094940 progress 5 % (0 MB)
23 18:49:08.096340 progress 10 % (0 MB)
24 18:49:08.097723 progress 15 % (0 MB)
25 18:49:08.099305 progress 20 % (1 MB)
26 18:49:08.100723 progress 25 % (1 MB)
27 18:49:08.102102 progress 30 % (1 MB)
28 18:49:08.103622 progress 35 % (1 MB)
29 18:49:08.104979 progress 40 % (2 MB)
30 18:49:08.106376 progress 45 % (2 MB)
31 18:49:08.107731 progress 50 % (2 MB)
32 18:49:08.109242 progress 55 % (2 MB)
33 18:49:08.110642 progress 60 % (3 MB)
34 18:49:08.112002 progress 65 % (3 MB)
35 18:49:08.113519 progress 70 % (3 MB)
36 18:49:08.114920 progress 75 % (3 MB)
37 18:49:08.116321 progress 80 % (4 MB)
38 18:49:08.117680 progress 85 % (4 MB)
39 18:49:08.119254 progress 90 % (4 MB)
40 18:49:08.120610 progress 95 % (4 MB)
41 18:49:08.121986 progress 100 % (5 MB)
42 18:49:08.122237 5 MB downloaded in 0.03 s (172.84 MB/s)
43 18:49:08.122387 end: 1.1.1 http-download (duration 00:00:00) [common]
45 18:49:08.122628 end: 1.1 download-retry (duration 00:00:00) [common]
46 18:49:08.122715 start: 1.2 download-retry (timeout 00:10:00) [common]
47 18:49:08.122798 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 18:49:08.122929 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 18:49:08.123000 saving as /var/lib/lava/dispatcher/tmp/12909594/tftp-deploy-lfs99dwd/kernel/bzImage
50 18:49:08.123061 total size: 12349440 (11 MB)
51 18:49:08.123121 No compression specified
52 18:49:08.124264 progress 0 % (0 MB)
53 18:49:08.127483 progress 5 % (0 MB)
54 18:49:08.130718 progress 10 % (1 MB)
55 18:49:08.133932 progress 15 % (1 MB)
56 18:49:08.137102 progress 20 % (2 MB)
57 18:49:08.140307 progress 25 % (2 MB)
58 18:49:08.143497 progress 30 % (3 MB)
59 18:49:08.146533 progress 35 % (4 MB)
60 18:49:08.149688 progress 40 % (4 MB)
61 18:49:08.152850 progress 45 % (5 MB)
62 18:49:08.156004 progress 50 % (5 MB)
63 18:49:08.159164 progress 55 % (6 MB)
64 18:49:08.162341 progress 60 % (7 MB)
65 18:49:08.165326 progress 65 % (7 MB)
66 18:49:08.168470 progress 70 % (8 MB)
67 18:49:08.171648 progress 75 % (8 MB)
68 18:49:08.174840 progress 80 % (9 MB)
69 18:49:08.177984 progress 85 % (10 MB)
70 18:49:08.181166 progress 90 % (10 MB)
71 18:49:08.184335 progress 95 % (11 MB)
72 18:49:08.187406 progress 100 % (11 MB)
73 18:49:08.187633 11 MB downloaded in 0.06 s (182.40 MB/s)
74 18:49:08.187781 end: 1.2.1 http-download (duration 00:00:00) [common]
76 18:49:08.188017 end: 1.2 download-retry (duration 00:00:00) [common]
77 18:49:08.188104 start: 1.3 download-retry (timeout 00:10:00) [common]
78 18:49:08.188188 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 18:49:08.188310 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/full.rootfs.tar.xz
80 18:49:08.188379 saving as /var/lib/lava/dispatcher/tmp/12909594/tftp-deploy-lfs99dwd/nfsrootfs/full.rootfs.tar
81 18:49:08.188441 total size: 133429172 (127 MB)
82 18:49:08.188502 Using unxz to decompress xz
83 18:49:08.192206 progress 0 % (0 MB)
84 18:49:08.533819 progress 5 % (6 MB)
85 18:49:08.886697 progress 10 % (12 MB)
86 18:49:09.176469 progress 15 % (19 MB)
87 18:49:09.361695 progress 20 % (25 MB)
88 18:49:09.602902 progress 25 % (31 MB)
89 18:49:09.949069 progress 30 % (38 MB)
90 18:49:10.291815 progress 35 % (44 MB)
91 18:49:10.687543 progress 40 % (50 MB)
92 18:49:11.073870 progress 45 % (57 MB)
93 18:49:11.428386 progress 50 % (63 MB)
94 18:49:11.803441 progress 55 % (70 MB)
95 18:49:12.177054 progress 60 % (76 MB)
96 18:49:12.544506 progress 65 % (82 MB)
97 18:49:12.916879 progress 70 % (89 MB)
98 18:49:13.297309 progress 75 % (95 MB)
99 18:49:13.751719 progress 80 % (101 MB)
100 18:49:14.203013 progress 85 % (108 MB)
101 18:49:14.474758 progress 90 % (114 MB)
102 18:49:14.827289 progress 95 % (120 MB)
103 18:49:15.222489 progress 100 % (127 MB)
104 18:49:15.228828 127 MB downloaded in 7.04 s (18.07 MB/s)
105 18:49:15.229085 end: 1.3.1 http-download (duration 00:00:07) [common]
107 18:49:15.229356 end: 1.3 download-retry (duration 00:00:07) [common]
108 18:49:15.229446 start: 1.4 download-retry (timeout 00:09:53) [common]
109 18:49:15.229534 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 18:49:15.229680 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 18:49:15.229753 saving as /var/lib/lava/dispatcher/tmp/12909594/tftp-deploy-lfs99dwd/modules/modules.tar
112 18:49:15.229814 total size: 484604 (0 MB)
113 18:49:15.229877 Using unxz to decompress xz
114 18:49:15.233566 progress 6 % (0 MB)
115 18:49:15.233986 progress 13 % (0 MB)
116 18:49:15.234270 progress 20 % (0 MB)
117 18:49:15.235715 progress 27 % (0 MB)
118 18:49:15.237768 progress 33 % (0 MB)
119 18:49:15.239910 progress 40 % (0 MB)
120 18:49:15.241899 progress 47 % (0 MB)
121 18:49:15.243765 progress 54 % (0 MB)
122 18:49:15.245887 progress 60 % (0 MB)
123 18:49:15.248243 progress 67 % (0 MB)
124 18:49:15.250539 progress 74 % (0 MB)
125 18:49:15.252517 progress 81 % (0 MB)
126 18:49:15.254425 progress 87 % (0 MB)
127 18:49:15.256568 progress 94 % (0 MB)
128 18:49:15.258917 progress 100 % (0 MB)
129 18:49:15.264928 0 MB downloaded in 0.04 s (13.16 MB/s)
130 18:49:15.265166 end: 1.4.1 http-download (duration 00:00:00) [common]
132 18:49:15.265431 end: 1.4 download-retry (duration 00:00:00) [common]
133 18:49:15.265525 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 18:49:15.265623 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 18:49:17.236538 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12909594/extract-nfsrootfs-82cz2ayl
136 18:49:17.236760 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 18:49:17.236870 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
138 18:49:17.237041 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k
139 18:49:17.237166 makedir: /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin
140 18:49:17.237263 makedir: /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/tests
141 18:49:17.237356 makedir: /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/results
142 18:49:17.237457 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-add-keys
143 18:49:17.237593 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-add-sources
144 18:49:17.237726 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-background-process-start
145 18:49:17.237906 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-background-process-stop
146 18:49:17.238092 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-common-functions
147 18:49:17.238244 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-echo-ipv4
148 18:49:17.238394 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-install-packages
149 18:49:17.238513 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-installed-packages
150 18:49:17.238632 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-os-build
151 18:49:17.238750 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-probe-channel
152 18:49:17.238867 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-probe-ip
153 18:49:17.238984 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-target-ip
154 18:49:17.239103 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-target-mac
155 18:49:17.239220 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-target-storage
156 18:49:17.239340 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-test-case
157 18:49:17.239460 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-test-event
158 18:49:17.239581 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-test-feedback
159 18:49:17.239699 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-test-raise
160 18:49:17.239816 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-test-reference
161 18:49:17.239935 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-test-runner
162 18:49:17.240057 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-test-set
163 18:49:17.240172 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-test-shell
164 18:49:17.240292 Updating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-install-packages (oe)
165 18:49:17.240438 Updating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/bin/lava-installed-packages (oe)
166 18:49:17.240557 Creating /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/environment
167 18:49:17.240651 LAVA metadata
168 18:49:17.240722 - LAVA_JOB_ID=12909594
169 18:49:17.240785 - LAVA_DISPATCHER_IP=192.168.201.1
170 18:49:17.240892 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
171 18:49:17.240958 skipped lava-vland-overlay
172 18:49:17.241033 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 18:49:17.241109 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
174 18:49:17.241169 skipped lava-multinode-overlay
175 18:49:17.241238 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 18:49:17.241315 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
177 18:49:17.241387 Loading test definitions
178 18:49:17.241473 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
179 18:49:17.241545 Using /lava-12909594 at stage 0
180 18:49:17.241843 uuid=12909594_1.5.2.3.1 testdef=None
181 18:49:17.241930 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 18:49:17.242038 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
183 18:49:17.242550 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 18:49:17.242764 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
186 18:49:17.243384 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 18:49:17.243610 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
189 18:49:17.244226 runner path: /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/0/tests/0_dmesg test_uuid 12909594_1.5.2.3.1
190 18:49:17.244381 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 18:49:17.244601 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
193 18:49:17.244671 Using /lava-12909594 at stage 1
194 18:49:17.244958 uuid=12909594_1.5.2.3.5 testdef=None
195 18:49:17.245044 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 18:49:17.245125 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
197 18:49:17.245574 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 18:49:17.245782 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
200 18:49:17.246449 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 18:49:17.246668 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
203 18:49:17.247332 runner path: /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/1/tests/1_bootrr test_uuid 12909594_1.5.2.3.5
204 18:49:17.247482 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 18:49:17.247680 Creating lava-test-runner.conf files
207 18:49:17.247742 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/0 for stage 0
208 18:49:17.247827 - 0_dmesg
209 18:49:17.247904 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12909594/lava-overlay-r_wc8k0k/lava-12909594/1 for stage 1
210 18:49:17.247995 - 1_bootrr
211 18:49:17.248086 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 18:49:17.248169 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
213 18:49:17.255293 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 18:49:17.255438 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
215 18:49:17.255527 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 18:49:17.255613 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 18:49:17.255696 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
218 18:49:17.385907 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 18:49:17.386308 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
220 18:49:17.386417 extracting modules file /var/lib/lava/dispatcher/tmp/12909594/tftp-deploy-lfs99dwd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12909594/extract-nfsrootfs-82cz2ayl
221 18:49:17.405303 extracting modules file /var/lib/lava/dispatcher/tmp/12909594/tftp-deploy-lfs99dwd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12909594/extract-overlay-ramdisk-yydz8fl9/ramdisk
222 18:49:17.424252 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 18:49:17.424415 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
224 18:49:17.424508 [common] Applying overlay to NFS
225 18:49:17.424580 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12909594/compress-overlay-6e2zzd0l/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12909594/extract-nfsrootfs-82cz2ayl
226 18:49:17.432199 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 18:49:17.432311 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
228 18:49:17.432404 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 18:49:17.432494 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
230 18:49:17.432572 Building ramdisk /var/lib/lava/dispatcher/tmp/12909594/extract-overlay-ramdisk-yydz8fl9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12909594/extract-overlay-ramdisk-yydz8fl9/ramdisk
231 18:49:17.510647 >> 30345 blocks
232 18:49:18.119843 rename /var/lib/lava/dispatcher/tmp/12909594/extract-overlay-ramdisk-yydz8fl9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12909594/tftp-deploy-lfs99dwd/ramdisk/ramdisk.cpio.gz
233 18:49:18.120272 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 18:49:18.120391 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
235 18:49:18.120489 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
236 18:49:18.120578 No mkimage arch provided, not using FIT.
237 18:49:18.120665 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 18:49:18.120747 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 18:49:18.120851 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
240 18:49:18.120944 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
241 18:49:18.121025 No LXC device requested
242 18:49:18.121105 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 18:49:18.121196 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
244 18:49:18.121281 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 18:49:18.121350 Checking files for TFTP limit of 4294967296 bytes.
246 18:49:18.121755 end: 1 tftp-deploy (duration 00:00:10) [common]
247 18:49:18.121860 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 18:49:18.121955 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 18:49:18.122088 substitutions:
250 18:49:18.122158 - {DTB}: None
251 18:49:18.122223 - {INITRD}: 12909594/tftp-deploy-lfs99dwd/ramdisk/ramdisk.cpio.gz
252 18:49:18.122282 - {KERNEL}: 12909594/tftp-deploy-lfs99dwd/kernel/bzImage
253 18:49:18.122340 - {LAVA_MAC}: None
254 18:49:18.122395 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12909594/extract-nfsrootfs-82cz2ayl
255 18:49:18.122454 - {NFS_SERVER_IP}: 192.168.201.1
256 18:49:18.122509 - {PRESEED_CONFIG}: None
257 18:49:18.122564 - {PRESEED_LOCAL}: None
258 18:49:18.122619 - {RAMDISK}: 12909594/tftp-deploy-lfs99dwd/ramdisk/ramdisk.cpio.gz
259 18:49:18.122675 - {ROOT_PART}: None
260 18:49:18.122729 - {ROOT}: None
261 18:49:18.122783 - {SERVER_IP}: 192.168.201.1
262 18:49:18.122838 - {TEE}: None
263 18:49:18.122892 Parsed boot commands:
264 18:49:18.122947 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 18:49:18.123115 Parsed boot commands: tftpboot 192.168.201.1 12909594/tftp-deploy-lfs99dwd/kernel/bzImage 12909594/tftp-deploy-lfs99dwd/kernel/cmdline 12909594/tftp-deploy-lfs99dwd/ramdisk/ramdisk.cpio.gz
266 18:49:18.123204 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 18:49:18.123289 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 18:49:18.123378 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 18:49:18.123464 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 18:49:18.123534 Not connected, no need to disconnect.
271 18:49:18.123607 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 18:49:18.123688 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 18:49:18.123755 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-11'
274 18:49:18.127219 Setting prompt string to ['lava-test: # ']
275 18:49:18.127540 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 18:49:18.127648 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 18:49:18.127747 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 18:49:18.127876 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 18:49:18.128294 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-11' '--port=1' '--command=reboot'
280 18:49:23.274384 >> Command sent successfully.
281 18:49:23.285498 Returned 0 in 5 seconds
282 18:49:23.386873 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 18:49:23.388705 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 18:49:23.389308 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 18:49:23.389816 Setting prompt string to 'Starting depthcharge on Volmar...'
287 18:49:23.390326 Changing prompt to 'Starting depthcharge on Volmar...'
288 18:49:23.390907 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
289 18:49:23.392261 [Enter `^Ec?' for help]
290 18:49:24.752281
291 18:49:24.752840
292 18:49:24.759659 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
293 18:49:24.762997 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
294 18:49:24.769372 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
295 18:49:24.773490 CPU: AES supported, TXT NOT supported, VT supported
296 18:49:24.780419 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
297 18:49:24.784627 Cache size = 10 MiB
298 18:49:24.787435 MCH: device id 4609 (rev 04) is Alderlake-P
299 18:49:24.794190 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
300 18:49:24.797502 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
301 18:49:24.801137 VBOOT: Loading verstage.
302 18:49:24.804951 FMAP: Found "FLASH" version 1.1 at 0x1804000.
303 18:49:24.811208 FMAP: base = 0x0 size = 0x2000000 #areas = 37
304 18:49:24.815260 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
305 18:49:24.821346 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
306 18:49:24.832291 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
307 18:49:24.832959
308 18:49:24.833374
309 18:49:24.839261 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
310 18:49:24.846914 Probing TPM I2C: I2C bus 1 version 0x3230302a
311 18:49:24.850586 DW I2C bus 1 at 0xfe022000 (400 KHz)
312 18:49:24.853837 I2C TX abort detected (00000001)
313 18:49:24.857092 cr50_i2c_read: Address write failed
314 18:49:24.869232 .done! DID_VID 0x00281ae0
315 18:49:24.872018 TPM ready after 0 ms
316 18:49:24.875512 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
317 18:49:24.886500 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
318 18:49:24.893187 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
319 18:49:24.943699 tlcl_send_startup: Startup return code is 0
320 18:49:24.944247 TPM: setup succeeded
321 18:49:24.967046 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
322 18:49:24.989073 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
323 18:49:24.992597 Chrome EC: UHEPI supported
324 18:49:24.995991 Reading cr50 boot mode
325 18:49:25.011168 Cr50 says boot_mode is VERIFIED_RW(0x00).
326 18:49:25.011654 Phase 1
327 18:49:25.017498 FMAP: area GBB found @ 1805000 (458752 bytes)
328 18:49:25.024113 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
329 18:49:25.030950 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
330 18:49:25.037248 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
331 18:49:25.041281 Phase 2
332 18:49:25.041840 Phase 3
333 18:49:25.043958 FMAP: area GBB found @ 1805000 (458752 bytes)
334 18:49:25.050614 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
335 18:49:25.053802 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
336 18:49:25.060409 VB2:vb2_verify_keyblock() Checking keyblock signature...
337 18:49:25.067401 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
338 18:49:25.073798 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
339 18:49:25.083958 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
340 18:49:25.096155 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
341 18:49:25.099517 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
342 18:49:25.105856 VB2:vb2_verify_fw_preamble() Verifying preamble.
343 18:49:25.112680 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
344 18:49:25.119349 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
345 18:49:25.125886 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
346 18:49:25.130083 Phase 4
347 18:49:25.133152 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
348 18:49:25.139662 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
349 18:49:25.352784 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
350 18:49:25.359868 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
351 18:49:25.362642 Saving vboot hash.
352 18:49:25.369471 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
353 18:49:25.385205 tlcl_extend: response is 0
354 18:49:25.391731 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
355 18:49:25.398607 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
356 18:49:25.414732 tlcl_extend: response is 0
357 18:49:25.421504 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
358 18:49:25.441169 tlcl_lock_nv_write: response is 0
359 18:49:25.459844 tlcl_lock_nv_write: response is 0
360 18:49:25.460369 Slot A is selected
361 18:49:25.467151 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
362 18:49:25.473345 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
363 18:49:25.480122 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
364 18:49:25.486364 BS: verstage times (exec / console): total (unknown) / 264 ms
365 18:49:25.486839
366 18:49:25.487265
367 18:49:25.493588 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
368 18:49:25.496952 Google Chrome EC: version:
369 18:49:25.500673 ro: volmar_v2.0.14126-e605144e9c
370 18:49:25.504127 rw: volmar_v0.0.55-22d1557
371 18:49:25.508408 running image: 2
372 18:49:25.510324 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
373 18:49:25.520349 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
374 18:49:25.526883 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
375 18:49:25.533721 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
376 18:49:25.543920 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
377 18:49:25.553898 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
378 18:49:25.557075 EC took 941us to calculate image hash
379 18:49:25.567551 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
380 18:49:25.569998 VB2:sync_ec() select_rw=RW(active)
381 18:49:25.582759 Waited 1489us to clear limit power flag.
382 18:49:25.585987 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
383 18:49:25.589409 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
384 18:49:25.592994 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
385 18:49:25.599747 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
386 18:49:25.602646 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
387 18:49:25.606411 TCO_STS: 0000 0000
388 18:49:25.609368 GEN_PMCON: d0015038 00002200
389 18:49:25.612721 GBLRST_CAUSE: 00000000 00000000
390 18:49:25.613186 HPR_CAUSE0: 00000000
391 18:49:25.616717 prev_sleep_state 5
392 18:49:25.619178 Abort disabling TXT, as CPU is not TXT capable.
393 18:49:25.627464 cse_lite: Number of partitions = 3
394 18:49:25.631483 cse_lite: Current partition = RO
395 18:49:25.631949 cse_lite: Next partition = RO
396 18:49:25.633952 cse_lite: Flags = 0x7
397 18:49:25.641216 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
398 18:49:25.650640 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
399 18:49:25.654256 FMAP: area SI_ME found @ 1000 (5238784 bytes)
400 18:49:25.660708 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
401 18:49:25.667519 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
402 18:49:25.673877 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
403 18:49:25.677071 cse_lite: CSE CBFS RW version : 16.1.25.2049
404 18:49:25.683694 cse_lite: Set Boot Partition Info Command (RW)
405 18:49:25.687497 HECI: Global Reset(Type:1) Command
406 18:49:27.122419 6���{��+#c5֪ NOT supported, VT supported
407 18:49:27.128681 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
408 18:49:27.132240 Cache size = 10 MiB
409 18:49:27.135374 MCH: device id 4609 (rev 04) is Alderlake-P
410 18:49:27.141849 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
411 18:49:27.145558 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
412 18:49:27.149264 VBOOT: Loading verstage.
413 18:49:27.152705 FMAP: Found "FLASH" version 1.1 at 0x1804000.
414 18:49:27.156084 FMAP: base = 0x0 size = 0x2000000 #areas = 37
415 18:49:27.162836 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
416 18:49:27.169910 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
417 18:49:27.176467 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
418 18:49:27.181019
419 18:49:27.181489
420 18:49:27.187643 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
421 18:49:27.194145 Probing TPM I2C: I2C bus 1 version 0x3230302a
422 18:49:27.197825 DW I2C bus 1 at 0xfe022000 (400 KHz)
423 18:49:27.200900 done! DID_VID 0x00281ae0
424 18:49:27.205520 TPM ready after 0 ms
425 18:49:27.208314 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
426 18:49:27.217561 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
427 18:49:27.223771 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
428 18:49:27.277859 tlcl_send_startup: Startup return code is 0
429 18:49:27.278537 TPM: setup succeeded
430 18:49:27.299823 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
431 18:49:27.321160 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
432 18:49:27.324826 Chrome EC: UHEPI supported
433 18:49:27.328191 Reading cr50 boot mode
434 18:49:27.343020 Cr50 says boot_mode is VERIFIED_RW(0x00).
435 18:49:27.343555 Phase 1
436 18:49:27.350073 FMAP: area GBB found @ 1805000 (458752 bytes)
437 18:49:27.356492 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
438 18:49:27.363028 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
439 18:49:27.369878 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
440 18:49:27.373030 Phase 2
441 18:49:27.373504 Phase 3
442 18:49:27.376191 FMAP: area GBB found @ 1805000 (458752 bytes)
443 18:49:27.383025 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
444 18:49:27.387284 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
445 18:49:27.392963 VB2:vb2_verify_keyblock() Checking keyblock signature...
446 18:49:27.400138 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
447 18:49:27.406626 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
448 18:49:27.416054 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
449 18:49:27.427897 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
450 18:49:27.431402 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
451 18:49:27.438421 VB2:vb2_verify_fw_preamble() Verifying preamble.
452 18:49:27.444862 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
453 18:49:27.451725 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
454 18:49:27.457914 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
455 18:49:27.462109 Phase 4
456 18:49:27.465727 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
457 18:49:27.471941 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
458 18:49:27.684699 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
459 18:49:27.691072 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
460 18:49:27.695772 Saving vboot hash.
461 18:49:27.701149 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
462 18:49:27.717398 tlcl_extend: response is 0
463 18:49:27.723858 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
464 18:49:27.730354 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
465 18:49:27.744990 tlcl_extend: response is 0
466 18:49:27.751626 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
467 18:49:27.771464 tlcl_lock_nv_write: response is 0
468 18:49:27.790499 tlcl_lock_nv_write: response is 0
469 18:49:27.791043 Slot A is selected
470 18:49:27.796932 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
471 18:49:27.803402 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
472 18:49:27.810492 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
473 18:49:27.817404 BS: verstage times (exec / console): total (unknown) / 257 ms
474 18:49:27.817876
475 18:49:27.818289
476 18:49:27.824056 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
477 18:49:27.827664 Google Chrome EC: version:
478 18:49:27.831086 ro: volmar_v2.0.14126-e605144e9c
479 18:49:27.834738 rw: volmar_v0.0.55-22d1557
480 18:49:27.837742 running image: 2
481 18:49:27.840823 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
482 18:49:27.851576 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
483 18:49:27.857742 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
484 18:49:27.863859 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
485 18:49:27.874705 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
486 18:49:27.883845 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
487 18:49:27.887620 EC took 941us to calculate image hash
488 18:49:27.898817 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
489 18:49:27.901720 VB2:sync_ec() select_rw=RW(active)
490 18:49:27.913944 Waited 344us to clear limit power flag.
491 18:49:27.917091 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
492 18:49:27.920455 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
493 18:49:27.923867 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
494 18:49:27.930310 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
495 18:49:27.933588 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
496 18:49:27.936982 TCO_STS: 0000 0000
497 18:49:27.940266 GEN_PMCON: d1001038 00002200
498 18:49:27.940740 GBLRST_CAUSE: 00000040 00000000
499 18:49:27.943370 HPR_CAUSE0: 00000000
500 18:49:27.946874 prev_sleep_state 5
501 18:49:27.950561 Abort disabling TXT, as CPU is not TXT capable.
502 18:49:27.958510 cse_lite: Number of partitions = 3
503 18:49:27.961873 cse_lite: Current partition = RW
504 18:49:27.962501 cse_lite: Next partition = RW
505 18:49:27.965000 cse_lite: Flags = 0x7
506 18:49:27.971684 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
507 18:49:27.981690 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
508 18:49:27.984967 FMAP: area SI_ME found @ 1000 (5238784 bytes)
509 18:49:27.992067 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
510 18:49:27.998504 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
511 18:49:28.004972 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
512 18:49:28.008441 cse_lite: CSE CBFS RW version : 16.1.25.2049
513 18:49:28.011887 Boot Count incremented to 2862
514 18:49:28.018416 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
515 18:49:28.024955 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
516 18:49:28.037714 Probing TPM I2C: done! DID_VID 0x00281ae0
517 18:49:28.040990 Locality already claimed
518 18:49:28.044511 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
519 18:49:28.064067 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
520 18:49:28.070871 MRC: Hash idx 0x100d comparison successful.
521 18:49:28.074054 MRC cache found, size f6c8
522 18:49:28.074530 bootmode is set to: 2
523 18:49:28.077842 EC returned error result code 3
524 18:49:28.080574 FW_CONFIG value from CBI is 0x131
525 18:49:28.087601 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
526 18:49:28.090481 SPD index = 0
527 18:49:28.097088 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
528 18:49:28.097592 SPD: module type is LPDDR4X
529 18:49:28.104181 SPD: module part number is K4U6E3S4AB-MGCL
530 18:49:28.110710 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
531 18:49:28.113938 SPD: device width 16 bits, bus width 16 bits
532 18:49:28.117271 SPD: module size is 1024 MB (per channel)
533 18:49:28.187085 CBMEM:
534 18:49:28.189892 IMD: root @ 0x76fff000 254 entries.
535 18:49:28.193150 IMD: root @ 0x76ffec00 62 entries.
536 18:49:28.201140 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
537 18:49:28.204505 RO_VPD is uninitialized or empty.
538 18:49:28.207861 FMAP: area RW_VPD found @ f29000 (8192 bytes)
539 18:49:28.214399 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
540 18:49:28.218086 External stage cache:
541 18:49:28.221336 IMD: root @ 0x7bbff000 254 entries.
542 18:49:28.224487 IMD: root @ 0x7bbfec00 62 entries.
543 18:49:28.231630 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
544 18:49:28.238052 MRC: Checking cached data update for 'RW_MRC_CACHE'.
545 18:49:28.240802 MRC: 'RW_MRC_CACHE' does not need update.
546 18:49:28.241289 8 DIMMs found
547 18:49:28.244761 SMM Memory Map
548 18:49:28.247544 SMRAM : 0x7b800000 0x800000
549 18:49:28.251236 Subregion 0: 0x7b800000 0x200000
550 18:49:28.254791 Subregion 1: 0x7ba00000 0x200000
551 18:49:28.257830 Subregion 2: 0x7bc00000 0x400000
552 18:49:28.260994 top_of_ram = 0x77000000
553 18:49:28.264693 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
554 18:49:28.271327 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
555 18:49:28.277858 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
556 18:49:28.280828 MTRR Range: Start=ff000000 End=0 (Size 1000000)
557 18:49:28.281306 Normal boot
558 18:49:28.290976 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
559 18:49:28.297549 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
560 18:49:28.304725 Processing 237 relocs. Offset value of 0x74ab9000
561 18:49:28.312662 BS: romstage times (exec / console): total (unknown) / 377 ms
562 18:49:28.320116
563 18:49:28.320634
564 18:49:28.326331 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
565 18:49:28.326776 Normal boot
566 18:49:28.333216 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
567 18:49:28.339553 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
568 18:49:28.346164 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
569 18:49:28.355977 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
570 18:49:28.404839 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
571 18:49:28.411635 Processing 5931 relocs. Offset value of 0x72a2f000
572 18:49:28.414735 BS: postcar times (exec / console): total (unknown) / 51 ms
573 18:49:28.415278
574 18:49:28.418547
575 18:49:28.424843 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
576 18:49:28.428208 Reserving BERT start 76a1e000, size 10000
577 18:49:28.431525 Normal boot
578 18:49:28.434781 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
579 18:49:28.441279 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
580 18:49:28.451851 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
581 18:49:28.454537 FMAP: area RW_VPD found @ f29000 (8192 bytes)
582 18:49:28.457957 Google Chrome EC: version:
583 18:49:28.461344 ro: volmar_v2.0.14126-e605144e9c
584 18:49:28.464651 rw: volmar_v0.0.55-22d1557
585 18:49:28.467921 running image: 2
586 18:49:28.472111 ACPI _SWS is PM1 Index 8 GPE Index -1
587 18:49:28.475932 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
588 18:49:28.480000 EC returned error result code 3
589 18:49:28.482477 FW_CONFIG value from CBI is 0x131
590 18:49:28.489217 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
591 18:49:28.492322 PCI: 00:1c.2 disabled by fw_config
592 18:49:28.499337 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
593 18:49:28.502852 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
594 18:49:28.509583 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
595 18:49:28.513061 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
596 18:49:28.519489 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
597 18:49:28.525426 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
598 18:49:28.528932 microcode: sig=0x906a4 pf=0x80 revision=0x423
599 18:49:28.536355 microcode: Update skipped, already up-to-date
600 18:49:28.542109 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
601 18:49:28.574284 Detected 6 core, 8 thread CPU.
602 18:49:28.578164 Setting up SMI for CPU
603 18:49:28.580888 IED base = 0x7bc00000
604 18:49:28.581349 IED size = 0x00400000
605 18:49:28.584300 Will perform SMM setup.
606 18:49:28.587648 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
607 18:49:28.590891 LAPIC 0x0 in XAPIC mode.
608 18:49:28.601088 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
609 18:49:28.604077 Processing 18 relocs. Offset value of 0x00030000
610 18:49:28.609018 Attempting to start 7 APs
611 18:49:28.612007 Waiting for 10ms after sending INIT.
612 18:49:28.624957 Waiting for SIPI to complete...
613 18:49:28.628195 LAPIC 0x1 in XAPIC mode.
614 18:49:28.631632 LAPIC 0x12 in XAPIC mode.
615 18:49:28.635391 AP: slot 5 apic_id 1, MCU rev: 0x00000423
616 18:49:28.638681 LAPIC 0x16 in XAPIC mode.
617 18:49:28.639101 done.
618 18:49:28.644927 AP: slot 2 apic_id 16, MCU rev: 0x00000423
619 18:49:28.648326 AP: slot 4 apic_id 12, MCU rev: 0x00000423
620 18:49:28.651996 LAPIC 0x10 in XAPIC mode.
621 18:49:28.652543 LAPIC 0x14 in XAPIC mode.
622 18:49:28.658171 AP: slot 3 apic_id 10, MCU rev: 0x00000423
623 18:49:28.658714 LAPIC 0x8 in XAPIC mode.
624 18:49:28.665055 AP: slot 1 apic_id 14, MCU rev: 0x00000423
625 18:49:28.668305 Waiting for SIPI to complete...
626 18:49:28.668768 done.
627 18:49:28.672031 AP: slot 7 apic_id 8, MCU rev: 0x00000423
628 18:49:28.675427 LAPIC 0x9 in XAPIC mode.
629 18:49:28.678141 AP: slot 6 apic_id 9, MCU rev: 0x00000423
630 18:49:28.681911 smm_setup_relocation_handler: enter
631 18:49:28.685173 smm_setup_relocation_handler: exit
632 18:49:28.694891 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
633 18:49:28.697828 Processing 11 relocs. Offset value of 0x00038000
634 18:49:28.705052 smm_module_setup_stub: stack_top = 0x7b804000
635 18:49:28.707739 smm_module_setup_stub: per cpu stack_size = 0x800
636 18:49:28.714374 smm_module_setup_stub: runtime.start32_offset = 0x4c
637 18:49:28.717769 smm_module_setup_stub: runtime.smm_size = 0x10000
638 18:49:28.725008 SMM Module: stub loaded at 38000. Will call 0x76a52094
639 18:49:28.728525 Installing permanent SMM handler to 0x7b800000
640 18:49:28.734241 smm_load_module: total_smm_space_needed e468, available -> 200000
641 18:49:28.744068 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
642 18:49:28.747635 Processing 255 relocs. Offset value of 0x7b9f6000
643 18:49:28.754288 smm_load_module: smram_start: 0x7b800000
644 18:49:28.757851 smm_load_module: smram_end: 7ba00000
645 18:49:28.760720 smm_load_module: handler start 0x7b9f6d5f
646 18:49:28.764121 smm_load_module: handler_size 98d0
647 18:49:28.767549 smm_load_module: fxsave_area 0x7b9ff000
648 18:49:28.771027 smm_load_module: fxsave_size 1000
649 18:49:28.777863 smm_load_module: CONFIG_MSEG_SIZE 0x0
650 18:49:28.780761 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
651 18:49:28.788082 smm_load_module: handler_mod_params.smbase = 0x7b800000
652 18:49:28.790911 smm_load_module: per_cpu_save_state_size = 0x400
653 18:49:28.794391 smm_load_module: num_cpus = 0x8
654 18:49:28.800556 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
655 18:49:28.804146 smm_load_module: total_save_state_size = 0x2000
656 18:49:28.811262 smm_load_module: cpu0 entry: 7b9e6000
657 18:49:28.813942 smm_create_map: cpus allowed in one segment 30
658 18:49:28.817456 smm_create_map: min # of segments needed 1
659 18:49:28.820580 CPU 0x0
660 18:49:28.824193 smbase 7b9e6000 entry 7b9ee000
661 18:49:28.827039 ss_start 7b9f5c00 code_end 7b9ee208
662 18:49:28.827474 CPU 0x1
663 18:49:28.830917 smbase 7b9e5c00 entry 7b9edc00
664 18:49:28.837916 ss_start 7b9f5800 code_end 7b9ede08
665 18:49:28.838366 CPU 0x2
666 18:49:28.840367 smbase 7b9e5800 entry 7b9ed800
667 18:49:28.847484 ss_start 7b9f5400 code_end 7b9eda08
668 18:49:28.847927 CPU 0x3
669 18:49:28.850575 smbase 7b9e5400 entry 7b9ed400
670 18:49:28.853968 ss_start 7b9f5000 code_end 7b9ed608
671 18:49:28.856872 CPU 0x4
672 18:49:28.860502 smbase 7b9e5000 entry 7b9ed000
673 18:49:28.863806 ss_start 7b9f4c00 code_end 7b9ed208
674 18:49:28.867349 CPU 0x5
675 18:49:28.870933 smbase 7b9e4c00 entry 7b9ecc00
676 18:49:28.874051 ss_start 7b9f4800 code_end 7b9ece08
677 18:49:28.874493 CPU 0x6
678 18:49:28.877121 smbase 7b9e4800 entry 7b9ec800
679 18:49:28.884561 ss_start 7b9f4400 code_end 7b9eca08
680 18:49:28.885059 CPU 0x7
681 18:49:28.887749 smbase 7b9e4400 entry 7b9ec400
682 18:49:28.893591 ss_start 7b9f4000 code_end 7b9ec608
683 18:49:28.900247 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
684 18:49:28.906921 Processing 11 relocs. Offset value of 0x7b9ee000
685 18:49:28.910828 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
686 18:49:28.916960 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
687 18:49:28.924232 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
688 18:49:28.930502 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
689 18:49:28.937265 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
690 18:49:28.943190 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
691 18:49:28.949950 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
692 18:49:28.953737 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
693 18:49:28.963357 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
694 18:49:28.967239 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
695 18:49:28.973542 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
696 18:49:28.979906 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
697 18:49:28.986300 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
698 18:49:28.993092 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
699 18:49:28.999755 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
700 18:49:29.002992 smm_module_setup_stub: stack_top = 0x7b804000
701 18:49:29.010181 smm_module_setup_stub: per cpu stack_size = 0x800
702 18:49:29.013083 smm_module_setup_stub: runtime.start32_offset = 0x4c
703 18:49:29.019837 smm_module_setup_stub: runtime.smm_size = 0x200000
704 18:49:29.026477 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
705 18:49:29.030080 Clearing SMI status registers
706 18:49:29.033011 SMI_STS: PM1
707 18:49:29.033475 PM1_STS: WAK PWRBTN
708 18:49:29.039370 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
709 18:49:29.043073 In relocation handler: CPU 0
710 18:49:29.049513 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
711 18:49:29.053320 Writing SMRR. base = 0x7b800006, mask=0xff800c00
712 18:49:29.056502 Relocation complete.
713 18:49:29.063378 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
714 18:49:29.065984 In relocation handler: CPU 5
715 18:49:29.069533 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
716 18:49:29.072642 Relocation complete.
717 18:49:29.079752 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
718 18:49:29.083034 In relocation handler: CPU 3
719 18:49:29.086981 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
720 18:49:29.089661 Writing SMRR. base = 0x7b800006, mask=0xff800c00
721 18:49:29.092941 Relocation complete.
722 18:49:29.099418 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
723 18:49:29.102868 In relocation handler: CPU 1
724 18:49:29.105948 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
725 18:49:29.112646 Writing SMRR. base = 0x7b800006, mask=0xff800c00
726 18:49:29.113176 Relocation complete.
727 18:49:29.122287 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
728 18:49:29.122745 In relocation handler: CPU 2
729 18:49:29.129814 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
730 18:49:29.132577 Writing SMRR. base = 0x7b800006, mask=0xff800c00
731 18:49:29.136031 Relocation complete.
732 18:49:29.142471 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
733 18:49:29.146470 In relocation handler: CPU 4
734 18:49:29.148996 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
735 18:49:29.155873 Writing SMRR. base = 0x7b800006, mask=0xff800c00
736 18:49:29.156309 Relocation complete.
737 18:49:29.162241 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
738 18:49:29.165422 In relocation handler: CPU 6
739 18:49:29.172940 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
740 18:49:29.173433 Relocation complete.
741 18:49:29.178848 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
742 18:49:29.182518 In relocation handler: CPU 7
743 18:49:29.185731 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
744 18:49:29.192874 Writing SMRR. base = 0x7b800006, mask=0xff800c00
745 18:49:29.195685 Relocation complete.
746 18:49:29.196163 Initializing CPU #0
747 18:49:29.198937 CPU: vendor Intel device 906a4
748 18:49:29.202004 CPU: family 06, model 9a, stepping 04
749 18:49:29.205491 Clearing out pending MCEs
750 18:49:29.209058 cpu: energy policy set to 7
751 18:49:29.212115 Turbo is available but hidden
752 18:49:29.215923 Turbo is available and visible
753 18:49:29.219701 microcode: Update skipped, already up-to-date
754 18:49:29.222360 CPU #0 initialized
755 18:49:29.222871 Initializing CPU #5
756 18:49:29.225201 Initializing CPU #3
757 18:49:29.229112 Initializing CPU #1
758 18:49:29.229606 Initializing CPU #2
759 18:49:29.232577 Initializing CPU #4
760 18:49:29.235379 CPU: vendor Intel device 906a4
761 18:49:29.238852 CPU: family 06, model 9a, stepping 04
762 18:49:29.242076 Initializing CPU #6
763 18:49:29.245133 CPU: vendor Intel device 906a4
764 18:49:29.248664 CPU: family 06, model 9a, stepping 04
765 18:49:29.251925 Clearing out pending MCEs
766 18:49:29.252399 CPU: vendor Intel device 906a4
767 18:49:29.258586 CPU: family 06, model 9a, stepping 04
768 18:49:29.259015 Clearing out pending MCEs
769 18:49:29.262354 Clearing out pending MCEs
770 18:49:29.265220 CPU: vendor Intel device 906a4
771 18:49:29.268800 CPU: family 06, model 9a, stepping 04
772 18:49:29.272131 cpu: energy policy set to 7
773 18:49:29.275876 CPU: vendor Intel device 906a4
774 18:49:29.278458 CPU: family 06, model 9a, stepping 04
775 18:49:29.285381 microcode: Update skipped, already up-to-date
776 18:49:29.285883 CPU #3 initialized
777 18:49:29.288418 cpu: energy policy set to 7
778 18:49:29.291538 Clearing out pending MCEs
779 18:49:29.295463 microcode: Update skipped, already up-to-date
780 18:49:29.298583 CPU #1 initialized
781 18:49:29.301742 CPU: vendor Intel device 906a4
782 18:49:29.304812 CPU: family 06, model 9a, stepping 04
783 18:49:29.309058 cpu: energy policy set to 7
784 18:49:29.311442 cpu: energy policy set to 7
785 18:49:29.314753 microcode: Update skipped, already up-to-date
786 18:49:29.318356 CPU #2 initialized
787 18:49:29.322349 microcode: Update skipped, already up-to-date
788 18:49:29.324631 CPU #4 initialized
789 18:49:29.325057 Initializing CPU #7
790 18:49:29.328594 Clearing out pending MCEs
791 18:49:29.331549 Clearing out pending MCEs
792 18:49:29.335065 CPU: vendor Intel device 906a4
793 18:49:29.338260 CPU: family 06, model 9a, stepping 04
794 18:49:29.341246 cpu: energy policy set to 7
795 18:49:29.341674 Clearing out pending MCEs
796 18:49:29.344620 cpu: energy policy set to 7
797 18:49:29.351379 microcode: Update skipped, already up-to-date
798 18:49:29.351808 CPU #6 initialized
799 18:49:29.354960 cpu: energy policy set to 7
800 18:49:29.361062 microcode: Update skipped, already up-to-date
801 18:49:29.361578 CPU #5 initialized
802 18:49:29.368277 microcode: Update skipped, already up-to-date
803 18:49:29.368827 CPU #7 initialized
804 18:49:29.371647 bsp_do_flight_plan done after 700 msecs.
805 18:49:29.374616 CPU: frequency set to 4400 MHz
806 18:49:29.378135 Enabling SMIs.
807 18:49:29.385134 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
808 18:49:29.399854 Probing TPM I2C: done! DID_VID 0x00281ae0
809 18:49:29.403596 Locality already claimed
810 18:49:29.406865 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
811 18:49:29.417821 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
812 18:49:29.421361 Enabling GPIO PM b/c CR50 has long IRQ pulse support
813 18:49:29.428201 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
814 18:49:29.434791 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
815 18:49:29.437910 Found a VBT of 9216 bytes after decompression
816 18:49:29.440930 PCI 1.0, PIN A, using IRQ #16
817 18:49:29.444461 PCI 2.0, PIN A, using IRQ #17
818 18:49:29.448197 PCI 4.0, PIN A, using IRQ #18
819 18:49:29.451560 PCI 5.0, PIN A, using IRQ #16
820 18:49:29.454350 PCI 6.0, PIN A, using IRQ #16
821 18:49:29.458095 PCI 6.2, PIN C, using IRQ #18
822 18:49:29.462137 PCI 7.0, PIN A, using IRQ #19
823 18:49:29.464467 PCI 7.1, PIN B, using IRQ #20
824 18:49:29.468613 PCI 7.2, PIN C, using IRQ #21
825 18:49:29.471264 PCI 7.3, PIN D, using IRQ #22
826 18:49:29.474812 PCI 8.0, PIN A, using IRQ #23
827 18:49:29.477632 PCI D.0, PIN A, using IRQ #17
828 18:49:29.481595 PCI D.1, PIN B, using IRQ #19
829 18:49:29.482184 PCI 10.0, PIN A, using IRQ #24
830 18:49:29.484707 PCI 10.1, PIN B, using IRQ #25
831 18:49:29.487872 PCI 10.6, PIN C, using IRQ #20
832 18:49:29.490985 PCI 10.7, PIN D, using IRQ #21
833 18:49:29.494896 PCI 11.0, PIN A, using IRQ #26
834 18:49:29.497673 PCI 11.1, PIN B, using IRQ #27
835 18:49:29.500837 PCI 11.2, PIN C, using IRQ #28
836 18:49:29.504454 PCI 11.3, PIN D, using IRQ #29
837 18:49:29.507434 PCI 12.0, PIN A, using IRQ #30
838 18:49:29.510941 PCI 12.6, PIN B, using IRQ #31
839 18:49:29.514277 PCI 12.7, PIN C, using IRQ #22
840 18:49:29.517422 PCI 13.0, PIN A, using IRQ #32
841 18:49:29.520912 PCI 13.1, PIN B, using IRQ #33
842 18:49:29.524357 PCI 13.2, PIN C, using IRQ #34
843 18:49:29.527541 PCI 13.3, PIN D, using IRQ #35
844 18:49:29.530681 PCI 14.0, PIN B, using IRQ #23
845 18:49:29.534135 PCI 14.1, PIN A, using IRQ #36
846 18:49:29.534649 PCI 14.3, PIN C, using IRQ #17
847 18:49:29.537468 PCI 15.0, PIN A, using IRQ #37
848 18:49:29.540848 PCI 15.1, PIN B, using IRQ #38
849 18:49:29.544486 PCI 15.2, PIN C, using IRQ #39
850 18:49:29.547466 PCI 15.3, PIN D, using IRQ #40
851 18:49:29.550567 PCI 16.0, PIN A, using IRQ #18
852 18:49:29.554194 PCI 16.1, PIN B, using IRQ #19
853 18:49:29.557279 PCI 16.2, PIN C, using IRQ #20
854 18:49:29.560794 PCI 16.3, PIN D, using IRQ #21
855 18:49:29.564025 PCI 16.4, PIN A, using IRQ #18
856 18:49:29.567347 PCI 16.5, PIN B, using IRQ #19
857 18:49:29.570543 PCI 17.0, PIN A, using IRQ #22
858 18:49:29.574116 PCI 19.0, PIN A, using IRQ #41
859 18:49:29.577233 PCI 19.1, PIN B, using IRQ #42
860 18:49:29.580605 PCI 19.2, PIN C, using IRQ #43
861 18:49:29.584126 PCI 1C.0, PIN A, using IRQ #16
862 18:49:29.584597 PCI 1C.1, PIN B, using IRQ #17
863 18:49:29.587646 PCI 1C.2, PIN C, using IRQ #18
864 18:49:29.590720 PCI 1C.3, PIN D, using IRQ #19
865 18:49:29.594436 PCI 1C.4, PIN A, using IRQ #16
866 18:49:29.597145 PCI 1C.5, PIN B, using IRQ #17
867 18:49:29.600387 PCI 1C.6, PIN C, using IRQ #18
868 18:49:29.604082 PCI 1C.7, PIN D, using IRQ #19
869 18:49:29.606990 PCI 1D.0, PIN A, using IRQ #16
870 18:49:29.610859 PCI 1D.1, PIN B, using IRQ #17
871 18:49:29.614318 PCI 1D.2, PIN C, using IRQ #18
872 18:49:29.617094 PCI 1D.3, PIN D, using IRQ #19
873 18:49:29.620121 PCI 1E.0, PIN A, using IRQ #23
874 18:49:29.623903 PCI 1E.1, PIN B, using IRQ #20
875 18:49:29.626914 PCI 1E.2, PIN C, using IRQ #44
876 18:49:29.630284 PCI 1E.3, PIN D, using IRQ #45
877 18:49:29.633723 PCI 1F.3, PIN B, using IRQ #22
878 18:49:29.637011 PCI 1F.4, PIN C, using IRQ #23
879 18:49:29.640834 PCI 1F.6, PIN D, using IRQ #20
880 18:49:29.641417 PCI 1F.7, PIN A, using IRQ #21
881 18:49:29.647393 IRQ: Using dynamically assigned PCI IO-APIC IRQs
882 18:49:29.653587 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
883 18:49:29.828942 FSPS returned 0
884 18:49:29.831195 Executing Phase 1 of FspMultiPhaseSiInit
885 18:49:29.841241 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
886 18:49:29.844357 port C0 DISC req: usage 1 usb3 1 usb2 1
887 18:49:29.847674 Raw Buffer output 0 00000111
888 18:49:29.851034 Raw Buffer output 1 00000000
889 18:49:29.855203 pmc_send_ipc_cmd succeeded
890 18:49:29.861556 port C1 DISC req: usage 1 usb3 3 usb2 3
891 18:49:29.862048 Raw Buffer output 0 00000331
892 18:49:29.865028 Raw Buffer output 1 00000000
893 18:49:29.868715 pmc_send_ipc_cmd succeeded
894 18:49:29.873041 Detected 6 core, 8 thread CPU.
895 18:49:29.876055 Detected 6 core, 8 thread CPU.
896 18:49:29.881929 Detected 6 core, 8 thread CPU.
897 18:49:29.885161 Detected 6 core, 8 thread CPU.
898 18:49:29.887943 Detected 6 core, 8 thread CPU.
899 18:49:29.891335 Detected 6 core, 8 thread CPU.
900 18:49:29.895316 Detected 6 core, 8 thread CPU.
901 18:49:29.897893 Detected 6 core, 8 thread CPU.
902 18:49:29.901257 Detected 6 core, 8 thread CPU.
903 18:49:29.904912 Detected 6 core, 8 thread CPU.
904 18:49:29.908042 Detected 6 core, 8 thread CPU.
905 18:49:29.911263 Detected 6 core, 8 thread CPU.
906 18:49:29.914640 Detected 6 core, 8 thread CPU.
907 18:49:29.917709 Detected 6 core, 8 thread CPU.
908 18:49:29.921146 Detected 6 core, 8 thread CPU.
909 18:49:29.924170 Detected 6 core, 8 thread CPU.
910 18:49:29.929125 Detected 6 core, 8 thread CPU.
911 18:49:29.931110 Detected 6 core, 8 thread CPU.
912 18:49:29.934100 Detected 6 core, 8 thread CPU.
913 18:49:29.937916 Detected 6 core, 8 thread CPU.
914 18:49:29.941369 Detected 6 core, 8 thread CPU.
915 18:49:29.944730 Detected 6 core, 8 thread CPU.
916 18:49:30.234273 Detected 6 core, 8 thread CPU.
917 18:49:30.237539 Detected 6 core, 8 thread CPU.
918 18:49:30.241061 Detected 6 core, 8 thread CPU.
919 18:49:30.244202 Detected 6 core, 8 thread CPU.
920 18:49:30.247557 Detected 6 core, 8 thread CPU.
921 18:49:30.250550 Detected 6 core, 8 thread CPU.
922 18:49:30.254031 Detected 6 core, 8 thread CPU.
923 18:49:30.257364 Detected 6 core, 8 thread CPU.
924 18:49:30.260539 Detected 6 core, 8 thread CPU.
925 18:49:30.264264 Detected 6 core, 8 thread CPU.
926 18:49:30.267228 Detected 6 core, 8 thread CPU.
927 18:49:30.270397 Detected 6 core, 8 thread CPU.
928 18:49:30.273990 Detected 6 core, 8 thread CPU.
929 18:49:30.277089 Detected 6 core, 8 thread CPU.
930 18:49:30.280708 Detected 6 core, 8 thread CPU.
931 18:49:30.283872 Detected 6 core, 8 thread CPU.
932 18:49:30.287536 Detected 6 core, 8 thread CPU.
933 18:49:30.290968 Detected 6 core, 8 thread CPU.
934 18:49:30.293906 Detected 6 core, 8 thread CPU.
935 18:49:30.297359 Detected 6 core, 8 thread CPU.
936 18:49:30.300403 Display FSP Version Info HOB
937 18:49:30.303911 Reference Code - CPU = c.0.65.70
938 18:49:30.304383 uCode Version = 0.0.4.23
939 18:49:30.306967 TXT ACM version = ff.ff.ff.ffff
940 18:49:30.310962 Reference Code - ME = c.0.65.70
941 18:49:30.313954 MEBx version = 0.0.0.0
942 18:49:30.317337 ME Firmware Version = Lite SKU
943 18:49:30.320680 Reference Code - PCH = c.0.65.70
944 18:49:30.323927 PCH-CRID Status = Disabled
945 18:49:30.327604 PCH-CRID Original Value = ff.ff.ff.ffff
946 18:49:30.330485 PCH-CRID New Value = ff.ff.ff.ffff
947 18:49:30.333742 OPROM - RST - RAID = ff.ff.ff.ffff
948 18:49:30.337190 PCH Hsio Version = 4.0.0.0
949 18:49:30.340898 Reference Code - SA - System Agent = c.0.65.70
950 18:49:30.344187 Reference Code - MRC = 0.0.3.80
951 18:49:30.347470 SA - PCIe Version = c.0.65.70
952 18:49:30.350948 SA-CRID Status = Disabled
953 18:49:30.353701 SA-CRID Original Value = 0.0.0.4
954 18:49:30.357022 SA-CRID New Value = 0.0.0.4
955 18:49:30.360266 OPROM - VBIOS = ff.ff.ff.ffff
956 18:49:30.363679 IO Manageability Engine FW Version = 24.0.4.0
957 18:49:30.366889 PHY Build Version = 0.0.0.2016
958 18:49:30.370681 Thunderbolt(TM) FW Version = 0.0.0.0
959 18:49:30.377573 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
960 18:49:30.383911 BS: BS_DEV_INIT_CHIPS run times (exec / console): 485 / 507 ms
961 18:49:30.387637 Enumerating buses...
962 18:49:30.390220 Show all devs... Before device enumeration.
963 18:49:30.393998 Root Device: enabled 1
964 18:49:30.394602 CPU_CLUSTER: 0: enabled 1
965 18:49:30.397071 DOMAIN: 0000: enabled 1
966 18:49:30.400615 GPIO: 0: enabled 1
967 18:49:30.403748 PCI: 00:00.0: enabled 1
968 18:49:30.404238 PCI: 00:01.0: enabled 0
969 18:49:30.406851 PCI: 00:01.1: enabled 0
970 18:49:30.410569 PCI: 00:02.0: enabled 1
971 18:49:30.411294 PCI: 00:04.0: enabled 1
972 18:49:30.413810 PCI: 00:05.0: enabled 0
973 18:49:30.417041 PCI: 00:06.0: enabled 1
974 18:49:30.420546 PCI: 00:06.2: enabled 0
975 18:49:30.421010 PCI: 00:07.0: enabled 0
976 18:49:30.423335 PCI: 00:07.1: enabled 0
977 18:49:30.426755 PCI: 00:07.2: enabled 0
978 18:49:30.430064 PCI: 00:07.3: enabled 0
979 18:49:30.430557 PCI: 00:08.0: enabled 0
980 18:49:30.433914 PCI: 00:09.0: enabled 0
981 18:49:30.436758 PCI: 00:0a.0: enabled 1
982 18:49:30.439874 PCI: 00:0d.0: enabled 1
983 18:49:30.440386 PCI: 00:0d.1: enabled 0
984 18:49:30.443801 PCI: 00:0d.2: enabled 0
985 18:49:30.446982 PCI: 00:0d.3: enabled 0
986 18:49:30.447448 PCI: 00:0e.0: enabled 0
987 18:49:30.450382 PCI: 00:10.0: enabled 0
988 18:49:30.453334 PCI: 00:10.1: enabled 0
989 18:49:30.457202 PCI: 00:10.6: enabled 0
990 18:49:30.457754 PCI: 00:10.7: enabled 0
991 18:49:30.460411 PCI: 00:12.0: enabled 0
992 18:49:30.463272 PCI: 00:12.6: enabled 0
993 18:49:30.466806 PCI: 00:12.7: enabled 0
994 18:49:30.467354 PCI: 00:13.0: enabled 0
995 18:49:30.470218 PCI: 00:14.0: enabled 1
996 18:49:30.473605 PCI: 00:14.1: enabled 0
997 18:49:30.476395 PCI: 00:14.2: enabled 1
998 18:49:30.476952 PCI: 00:14.3: enabled 1
999 18:49:30.479948 PCI: 00:15.0: enabled 1
1000 18:49:30.483017 PCI: 00:15.1: enabled 1
1001 18:49:30.486918 PCI: 00:15.2: enabled 0
1002 18:49:30.487484 PCI: 00:15.3: enabled 1
1003 18:49:30.490114 PCI: 00:16.0: enabled 1
1004 18:49:30.493464 PCI: 00:16.1: enabled 0
1005 18:49:30.496662 PCI: 00:16.2: enabled 0
1006 18:49:30.497310 PCI: 00:16.3: enabled 0
1007 18:49:30.500200 PCI: 00:16.4: enabled 0
1008 18:49:30.502928 PCI: 00:16.5: enabled 0
1009 18:49:30.503430 PCI: 00:17.0: enabled 1
1010 18:49:30.506674 PCI: 00:19.0: enabled 0
1011 18:49:30.509849 PCI: 00:19.1: enabled 1
1012 18:49:30.512842 PCI: 00:19.2: enabled 0
1013 18:49:30.513309 PCI: 00:1a.0: enabled 0
1014 18:49:30.516418 PCI: 00:1c.0: enabled 0
1015 18:49:30.520531 PCI: 00:1c.1: enabled 0
1016 18:49:30.523152 PCI: 00:1c.2: enabled 0
1017 18:49:30.523619 PCI: 00:1c.3: enabled 0
1018 18:49:30.526805 PCI: 00:1c.4: enabled 0
1019 18:49:30.530045 PCI: 00:1c.5: enabled 0
1020 18:49:30.533214 PCI: 00:1c.6: enabled 0
1021 18:49:30.533683 PCI: 00:1c.7: enabled 0
1022 18:49:30.536781 PCI: 00:1d.0: enabled 0
1023 18:49:30.539601 PCI: 00:1d.1: enabled 0
1024 18:49:30.540088 PCI: 00:1d.2: enabled 0
1025 18:49:30.543228 PCI: 00:1d.3: enabled 0
1026 18:49:30.546865 PCI: 00:1e.0: enabled 1
1027 18:49:30.549526 PCI: 00:1e.1: enabled 0
1028 18:49:30.549987 PCI: 00:1e.2: enabled 0
1029 18:49:30.553853 PCI: 00:1e.3: enabled 1
1030 18:49:30.556867 PCI: 00:1f.0: enabled 1
1031 18:49:30.559900 PCI: 00:1f.1: enabled 0
1032 18:49:30.560399 PCI: 00:1f.2: enabled 1
1033 18:49:30.563176 PCI: 00:1f.3: enabled 1
1034 18:49:30.566092 PCI: 00:1f.4: enabled 0
1035 18:49:30.569527 PCI: 00:1f.5: enabled 1
1036 18:49:30.569991 PCI: 00:1f.6: enabled 0
1037 18:49:30.573147 PCI: 00:1f.7: enabled 0
1038 18:49:30.576760 GENERIC: 0.0: enabled 1
1039 18:49:30.577317 GENERIC: 0.0: enabled 1
1040 18:49:30.580213 GENERIC: 1.0: enabled 1
1041 18:49:30.583044 GENERIC: 0.0: enabled 1
1042 18:49:30.586809 GENERIC: 1.0: enabled 1
1043 18:49:30.587274 USB0 port 0: enabled 1
1044 18:49:30.589340 USB0 port 0: enabled 1
1045 18:49:30.593261 GENERIC: 0.0: enabled 1
1046 18:49:30.596372 I2C: 00:1a: enabled 1
1047 18:49:30.596938 I2C: 00:31: enabled 1
1048 18:49:30.600125 I2C: 00:32: enabled 1
1049 18:49:30.603334 I2C: 00:50: enabled 1
1050 18:49:30.603796 I2C: 00:10: enabled 1
1051 18:49:30.606094 I2C: 00:15: enabled 1
1052 18:49:30.609507 I2C: 00:2c: enabled 1
1053 18:49:30.609965 GENERIC: 0.0: enabled 1
1054 18:49:30.612972 SPI: 00: enabled 1
1055 18:49:30.616312 PNP: 0c09.0: enabled 1
1056 18:49:30.616773 GENERIC: 0.0: enabled 1
1057 18:49:30.619384 USB3 port 0: enabled 1
1058 18:49:30.622786 USB3 port 1: enabled 0
1059 18:49:30.623245 USB3 port 2: enabled 1
1060 18:49:30.626440 USB3 port 3: enabled 0
1061 18:49:30.629790 USB2 port 0: enabled 1
1062 18:49:30.632863 USB2 port 1: enabled 0
1063 18:49:30.633400 USB2 port 2: enabled 1
1064 18:49:30.636168 USB2 port 3: enabled 0
1065 18:49:30.639563 USB2 port 4: enabled 0
1066 18:49:30.640022 USB2 port 5: enabled 1
1067 18:49:30.643029 USB2 port 6: enabled 0
1068 18:49:30.645936 USB2 port 7: enabled 0
1069 18:49:30.649153 USB2 port 8: enabled 1
1070 18:49:30.649609 USB2 port 9: enabled 1
1071 18:49:30.652758 USB3 port 0: enabled 1
1072 18:49:30.656049 USB3 port 1: enabled 0
1073 18:49:30.656504 USB3 port 2: enabled 0
1074 18:49:30.659760 USB3 port 3: enabled 0
1075 18:49:30.662847 GENERIC: 0.0: enabled 1
1076 18:49:30.666087 GENERIC: 1.0: enabled 1
1077 18:49:30.666545 APIC: 00: enabled 1
1078 18:49:30.669437 APIC: 14: enabled 1
1079 18:49:30.669890 APIC: 16: enabled 1
1080 18:49:30.672706 APIC: 10: enabled 1
1081 18:49:30.676707 APIC: 12: enabled 1
1082 18:49:30.677262 APIC: 01: enabled 1
1083 18:49:30.679689 APIC: 09: enabled 1
1084 18:49:30.680263 APIC: 08: enabled 1
1085 18:49:30.682618 Compare with tree...
1086 18:49:30.685993 Root Device: enabled 1
1087 18:49:30.689341 CPU_CLUSTER: 0: enabled 1
1088 18:49:30.689898 APIC: 00: enabled 1
1089 18:49:30.692613 APIC: 14: enabled 1
1090 18:49:30.695948 APIC: 16: enabled 1
1091 18:49:30.696413 APIC: 10: enabled 1
1092 18:49:30.699840 APIC: 12: enabled 1
1093 18:49:30.702893 APIC: 01: enabled 1
1094 18:49:30.703352 APIC: 09: enabled 1
1095 18:49:30.706193 APIC: 08: enabled 1
1096 18:49:30.708964 DOMAIN: 0000: enabled 1
1097 18:49:30.709420 GPIO: 0: enabled 1
1098 18:49:30.712463 PCI: 00:00.0: enabled 1
1099 18:49:30.715966 PCI: 00:01.0: enabled 0
1100 18:49:30.719936 PCI: 00:01.1: enabled 0
1101 18:49:30.722703 PCI: 00:02.0: enabled 1
1102 18:49:30.723207 PCI: 00:04.0: enabled 1
1103 18:49:30.726166 GENERIC: 0.0: enabled 1
1104 18:49:30.729362 PCI: 00:05.0: enabled 0
1105 18:49:30.732834 PCI: 00:06.0: enabled 1
1106 18:49:30.735844 PCI: 00:06.2: enabled 0
1107 18:49:30.736322 PCI: 00:08.0: enabled 0
1108 18:49:30.739264 PCI: 00:09.0: enabled 0
1109 18:49:30.742626 PCI: 00:0a.0: enabled 1
1110 18:49:30.745845 PCI: 00:0d.0: enabled 1
1111 18:49:30.749608 USB0 port 0: enabled 1
1112 18:49:30.750329 USB3 port 0: enabled 1
1113 18:49:30.752495 USB3 port 1: enabled 0
1114 18:49:30.756075 USB3 port 2: enabled 1
1115 18:49:30.759158 USB3 port 3: enabled 0
1116 18:49:30.762455 PCI: 00:0d.1: enabled 0
1117 18:49:30.762939 PCI: 00:0d.2: enabled 0
1118 18:49:30.766076 PCI: 00:0d.3: enabled 0
1119 18:49:30.769096 PCI: 00:0e.0: enabled 0
1120 18:49:30.772112 PCI: 00:10.0: enabled 0
1121 18:49:30.776005 PCI: 00:10.1: enabled 0
1122 18:49:30.776544 PCI: 00:10.6: enabled 0
1123 18:49:30.778990 PCI: 00:10.7: enabled 0
1124 18:49:30.782649 PCI: 00:12.0: enabled 0
1125 18:49:30.785574 PCI: 00:12.6: enabled 0
1126 18:49:30.789518 PCI: 00:12.7: enabled 0
1127 18:49:30.789979 PCI: 00:13.0: enabled 0
1128 18:49:30.792577 PCI: 00:14.0: enabled 1
1129 18:49:30.795940 USB0 port 0: enabled 1
1130 18:49:30.799548 USB2 port 0: enabled 1
1131 18:49:30.802728 USB2 port 1: enabled 0
1132 18:49:30.803186 USB2 port 2: enabled 1
1133 18:49:30.806431 USB2 port 3: enabled 0
1134 18:49:30.809363 USB2 port 4: enabled 0
1135 18:49:30.812254 USB2 port 5: enabled 1
1136 18:49:30.815960 USB2 port 6: enabled 0
1137 18:49:30.819201 USB2 port 7: enabled 0
1138 18:49:30.819661 USB2 port 8: enabled 1
1139 18:49:30.822191 USB2 port 9: enabled 1
1140 18:49:30.825540 USB3 port 0: enabled 1
1141 18:49:30.829011 USB3 port 1: enabled 0
1142 18:49:30.832791 USB3 port 2: enabled 0
1143 18:49:30.833256 USB3 port 3: enabled 0
1144 18:49:30.835366 PCI: 00:14.1: enabled 0
1145 18:49:30.838906 PCI: 00:14.2: enabled 1
1146 18:49:30.842504 PCI: 00:14.3: enabled 1
1147 18:49:30.845642 GENERIC: 0.0: enabled 1
1148 18:49:30.846155 PCI: 00:15.0: enabled 1
1149 18:49:30.848974 I2C: 00:1a: enabled 1
1150 18:49:30.852263 I2C: 00:31: enabled 1
1151 18:49:30.855442 I2C: 00:32: enabled 1
1152 18:49:30.858668 PCI: 00:15.1: enabled 1
1153 18:49:30.859130 I2C: 00:50: enabled 1
1154 18:49:30.862271 PCI: 00:15.2: enabled 0
1155 18:49:30.865785 PCI: 00:15.3: enabled 1
1156 18:49:30.868815 I2C: 00:10: enabled 1
1157 18:49:30.869436 PCI: 00:16.0: enabled 1
1158 18:49:30.872754 PCI: 00:16.1: enabled 0
1159 18:49:30.875953 PCI: 00:16.2: enabled 0
1160 18:49:30.878742 PCI: 00:16.3: enabled 0
1161 18:49:30.882496 PCI: 00:16.4: enabled 0
1162 18:49:30.883057 PCI: 00:16.5: enabled 0
1163 18:49:30.885655 PCI: 00:17.0: enabled 1
1164 18:49:30.889134 PCI: 00:19.0: enabled 0
1165 18:49:30.891845 PCI: 00:19.1: enabled 1
1166 18:49:30.895608 I2C: 00:15: enabled 1
1167 18:49:30.896324 I2C: 00:2c: enabled 1
1168 18:49:30.898904 PCI: 00:19.2: enabled 0
1169 18:49:30.901969 PCI: 00:1a.0: enabled 0
1170 18:49:30.905483 PCI: 00:1e.0: enabled 1
1171 18:49:30.908876 PCI: 00:1e.1: enabled 0
1172 18:49:30.909368 PCI: 00:1e.2: enabled 0
1173 18:49:30.912734 PCI: 00:1e.3: enabled 1
1174 18:49:30.915146 SPI: 00: enabled 1
1175 18:49:30.919573 PCI: 00:1f.0: enabled 1
1176 18:49:30.920030 PNP: 0c09.0: enabled 1
1177 18:49:30.922217 PCI: 00:1f.1: enabled 0
1178 18:49:30.925409 PCI: 00:1f.2: enabled 1
1179 18:49:30.928757 GENERIC: 0.0: enabled 1
1180 18:49:30.932037 GENERIC: 0.0: enabled 1
1181 18:49:30.935345 GENERIC: 1.0: enabled 1
1182 18:49:30.935802 PCI: 00:1f.3: enabled 1
1183 18:49:30.938958 PCI: 00:1f.4: enabled 0
1184 18:49:30.941889 PCI: 00:1f.5: enabled 1
1185 18:49:30.945493 PCI: 00:1f.6: enabled 0
1186 18:49:30.945950 PCI: 00:1f.7: enabled 0
1187 18:49:30.949039 Root Device scanning...
1188 18:49:30.951965 scan_static_bus for Root Device
1189 18:49:30.955044 CPU_CLUSTER: 0 enabled
1190 18:49:30.958354 DOMAIN: 0000 enabled
1191 18:49:30.959047 DOMAIN: 0000 scanning...
1192 18:49:30.961928 PCI: pci_scan_bus for bus 00
1193 18:49:30.965105 PCI: 00:00.0 [8086/0000] ops
1194 18:49:30.968409 PCI: 00:00.0 [8086/4609] enabled
1195 18:49:30.971854 PCI: 00:02.0 [8086/0000] bus ops
1196 18:49:30.975288 PCI: 00:02.0 [8086/46b3] enabled
1197 18:49:30.978840 PCI: 00:04.0 [8086/0000] bus ops
1198 18:49:30.981964 PCI: 00:04.0 [8086/461d] enabled
1199 18:49:30.985547 PCI: 00:06.0 [8086/0000] bus ops
1200 18:49:30.988802 PCI: 00:06.0 [8086/464d] enabled
1201 18:49:30.991896 PCI: 00:08.0 [8086/464f] disabled
1202 18:49:30.995208 PCI: 00:0a.0 [8086/467d] enabled
1203 18:49:30.999156 PCI: 00:0d.0 [8086/0000] bus ops
1204 18:49:31.001640 PCI: 00:0d.0 [8086/461e] enabled
1205 18:49:31.005257 PCI: 00:14.0 [8086/0000] bus ops
1206 18:49:31.008562 PCI: 00:14.0 [8086/51ed] enabled
1207 18:49:31.012246 PCI: 00:14.2 [8086/51ef] enabled
1208 18:49:31.015385 PCI: 00:14.3 [8086/0000] bus ops
1209 18:49:31.018732 PCI: 00:14.3 [8086/51f0] enabled
1210 18:49:31.021705 PCI: 00:15.0 [8086/0000] bus ops
1211 18:49:31.025459 PCI: 00:15.0 [8086/51e8] enabled
1212 18:49:31.028334 PCI: 00:15.1 [8086/0000] bus ops
1213 18:49:31.031680 PCI: 00:15.1 [8086/51e9] enabled
1214 18:49:31.034886 PCI: 00:15.2 [8086/0000] bus ops
1215 18:49:31.038694 PCI: 00:15.2 [8086/51ea] disabled
1216 18:49:31.041680 PCI: 00:15.3 [8086/0000] bus ops
1217 18:49:31.045181 PCI: 00:15.3 [8086/51eb] enabled
1218 18:49:31.048437 PCI: 00:16.0 [8086/0000] ops
1219 18:49:31.051821 PCI: 00:16.0 [8086/51e0] enabled
1220 18:49:31.058255 PCI: Static device PCI: 00:17.0 not found, disabling it.
1221 18:49:31.061610 PCI: 00:19.0 [8086/0000] bus ops
1222 18:49:31.064756 PCI: 00:19.0 [8086/51c5] disabled
1223 18:49:31.068538 PCI: 00:19.1 [8086/0000] bus ops
1224 18:49:31.071779 PCI: 00:19.1 [8086/51c6] enabled
1225 18:49:31.074914 PCI: 00:1e.0 [8086/0000] ops
1226 18:49:31.078403 PCI: 00:1e.0 [8086/51a8] enabled
1227 18:49:31.082236 PCI: 00:1e.3 [8086/0000] bus ops
1228 18:49:31.084663 PCI: 00:1e.3 [8086/51ab] enabled
1229 18:49:31.088572 PCI: 00:1f.0 [8086/0000] bus ops
1230 18:49:31.091837 PCI: 00:1f.0 [8086/5182] enabled
1231 18:49:31.094959 RTC Init
1232 18:49:31.098338 Set power on after power failure.
1233 18:49:31.098895 Disabling Deep S3
1234 18:49:31.101926 Disabling Deep S3
1235 18:49:31.104605 Disabling Deep S4
1236 18:49:31.105063 Disabling Deep S4
1237 18:49:31.108346 Disabling Deep S5
1238 18:49:31.108804 Disabling Deep S5
1239 18:49:31.112483 PCI: 00:1f.2 [0000/0000] hidden
1240 18:49:31.115301 PCI: 00:1f.3 [8086/0000] bus ops
1241 18:49:31.118068 PCI: 00:1f.3 [8086/51c8] enabled
1242 18:49:31.121672 PCI: 00:1f.5 [8086/0000] bus ops
1243 18:49:31.125120 PCI: 00:1f.5 [8086/51a4] enabled
1244 18:49:31.128039 GPIO: 0 enabled
1245 18:49:31.131719 PCI: Leftover static devices:
1246 18:49:31.132184 PCI: 00:01.0
1247 18:49:31.132549 PCI: 00:01.1
1248 18:49:31.134713 PCI: 00:05.0
1249 18:49:31.135171 PCI: 00:06.2
1250 18:49:31.138477 PCI: 00:09.0
1251 18:49:31.138936 PCI: 00:0d.1
1252 18:49:31.141814 PCI: 00:0d.2
1253 18:49:31.142395 PCI: 00:0d.3
1254 18:49:31.142771 PCI: 00:0e.0
1255 18:49:31.145049 PCI: 00:10.0
1256 18:49:31.145505 PCI: 00:10.1
1257 18:49:31.148338 PCI: 00:10.6
1258 18:49:31.148791 PCI: 00:10.7
1259 18:49:31.149152 PCI: 00:12.0
1260 18:49:31.151418 PCI: 00:12.6
1261 18:49:31.151871 PCI: 00:12.7
1262 18:49:31.155014 PCI: 00:13.0
1263 18:49:31.155470 PCI: 00:14.1
1264 18:49:31.155833 PCI: 00:16.1
1265 18:49:31.157941 PCI: 00:16.2
1266 18:49:31.158428 PCI: 00:16.3
1267 18:49:31.161716 PCI: 00:16.4
1268 18:49:31.162211 PCI: 00:16.5
1269 18:49:31.164790 PCI: 00:17.0
1270 18:49:31.165242 PCI: 00:19.2
1271 18:49:31.165655 PCI: 00:1a.0
1272 18:49:31.168281 PCI: 00:1e.1
1273 18:49:31.168806 PCI: 00:1e.2
1274 18:49:31.171505 PCI: 00:1f.1
1275 18:49:31.172136 PCI: 00:1f.4
1276 18:49:31.172523 PCI: 00:1f.6
1277 18:49:31.174744 PCI: 00:1f.7
1278 18:49:31.178128 PCI: Check your devicetree.cb.
1279 18:49:31.181744 PCI: 00:02.0 scanning...
1280 18:49:31.184990 scan_generic_bus for PCI: 00:02.0
1281 18:49:31.188201 scan_generic_bus for PCI: 00:02.0 done
1282 18:49:31.191340 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1283 18:49:31.194513 PCI: 00:04.0 scanning...
1284 18:49:31.197779 scan_generic_bus for PCI: 00:04.0
1285 18:49:31.201565 GENERIC: 0.0 enabled
1286 18:49:31.205036 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1287 18:49:31.211543 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1288 18:49:31.214815 PCI: 00:06.0 scanning...
1289 18:49:31.217996 do_pci_scan_bridge for PCI: 00:06.0
1290 18:49:31.220915 PCI: pci_scan_bus for bus 01
1291 18:49:31.224587 PCI: 01:00.0 [15b7/5009] enabled
1292 18:49:31.228178 Enabling Common Clock Configuration
1293 18:49:31.231563 L1 Sub-State supported from root port 6
1294 18:49:31.234696 L1 Sub-State Support = 0x5
1295 18:49:31.238679 CommonModeRestoreTime = 0x6e
1296 18:49:31.241171 Power On Value = 0x5, Power On Scale = 0x2
1297 18:49:31.241628 ASPM: Enabled L1
1298 18:49:31.248118 PCIe: Max_Payload_Size adjusted to 256
1299 18:49:31.248643 PCI: 01:00.0: Enabled LTR
1300 18:49:31.254940 PCI: 01:00.0: Programmed LTR max latencies
1301 18:49:31.257574 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1302 18:49:31.261244 PCI: 00:0d.0 scanning...
1303 18:49:31.264994 scan_static_bus for PCI: 00:0d.0
1304 18:49:31.267816 USB0 port 0 enabled
1305 18:49:31.268375 USB0 port 0 scanning...
1306 18:49:31.271521 scan_static_bus for USB0 port 0
1307 18:49:31.274415 USB3 port 0 enabled
1308 18:49:31.278003 USB3 port 1 disabled
1309 18:49:31.278556 USB3 port 2 enabled
1310 18:49:31.281243 USB3 port 3 disabled
1311 18:49:31.284815 USB3 port 0 scanning...
1312 18:49:31.287713 scan_static_bus for USB3 port 0
1313 18:49:31.291473 scan_static_bus for USB3 port 0 done
1314 18:49:31.294256 scan_bus: bus USB3 port 0 finished in 6 msecs
1315 18:49:31.297369 USB3 port 2 scanning...
1316 18:49:31.300946 scan_static_bus for USB3 port 2
1317 18:49:31.304429 scan_static_bus for USB3 port 2 done
1318 18:49:31.307568 scan_bus: bus USB3 port 2 finished in 6 msecs
1319 18:49:31.311102 scan_static_bus for USB0 port 0 done
1320 18:49:31.317405 scan_bus: bus USB0 port 0 finished in 43 msecs
1321 18:49:31.321036 scan_static_bus for PCI: 00:0d.0 done
1322 18:49:31.324230 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1323 18:49:31.327753 PCI: 00:14.0 scanning...
1324 18:49:31.331099 scan_static_bus for PCI: 00:14.0
1325 18:49:31.334832 USB0 port 0 enabled
1326 18:49:31.335361 USB0 port 0 scanning...
1327 18:49:31.338066 scan_static_bus for USB0 port 0
1328 18:49:31.341271 USB2 port 0 enabled
1329 18:49:31.344393 USB2 port 1 disabled
1330 18:49:31.344920 USB2 port 2 enabled
1331 18:49:31.347881 USB2 port 3 disabled
1332 18:49:31.350875 USB2 port 4 disabled
1333 18:49:31.351336 USB2 port 5 enabled
1334 18:49:31.354532 USB2 port 6 disabled
1335 18:49:31.354992 USB2 port 7 disabled
1336 18:49:31.357698 USB2 port 8 enabled
1337 18:49:31.361082 USB2 port 9 enabled
1338 18:49:31.361558 USB3 port 0 enabled
1339 18:49:31.364549 USB3 port 1 disabled
1340 18:49:31.367426 USB3 port 2 disabled
1341 18:49:31.367883 USB3 port 3 disabled
1342 18:49:31.370876 USB2 port 0 scanning...
1343 18:49:31.374636 scan_static_bus for USB2 port 0
1344 18:49:31.377361 scan_static_bus for USB2 port 0 done
1345 18:49:31.380898 scan_bus: bus USB2 port 0 finished in 6 msecs
1346 18:49:31.384305 USB2 port 2 scanning...
1347 18:49:31.387207 scan_static_bus for USB2 port 2
1348 18:49:31.390865 scan_static_bus for USB2 port 2 done
1349 18:49:31.397610 scan_bus: bus USB2 port 2 finished in 6 msecs
1350 18:49:31.398098 USB2 port 5 scanning...
1351 18:49:31.400602 scan_static_bus for USB2 port 5
1352 18:49:31.407188 scan_static_bus for USB2 port 5 done
1353 18:49:31.411129 scan_bus: bus USB2 port 5 finished in 6 msecs
1354 18:49:31.413934 USB2 port 8 scanning...
1355 18:49:31.417288 scan_static_bus for USB2 port 8
1356 18:49:31.420520 scan_static_bus for USB2 port 8 done
1357 18:49:31.423763 scan_bus: bus USB2 port 8 finished in 6 msecs
1358 18:49:31.427211 USB2 port 9 scanning...
1359 18:49:31.431271 scan_static_bus for USB2 port 9
1360 18:49:31.434237 scan_static_bus for USB2 port 9 done
1361 18:49:31.437240 scan_bus: bus USB2 port 9 finished in 6 msecs
1362 18:49:31.441021 USB3 port 0 scanning...
1363 18:49:31.443705 scan_static_bus for USB3 port 0
1364 18:49:31.447191 scan_static_bus for USB3 port 0 done
1365 18:49:31.453833 scan_bus: bus USB3 port 0 finished in 6 msecs
1366 18:49:31.457387 scan_static_bus for USB0 port 0 done
1367 18:49:31.460796 scan_bus: bus USB0 port 0 finished in 120 msecs
1368 18:49:31.463751 scan_static_bus for PCI: 00:14.0 done
1369 18:49:31.470610 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1370 18:49:31.471072 PCI: 00:14.3 scanning...
1371 18:49:31.473848 scan_static_bus for PCI: 00:14.3
1372 18:49:31.477196 GENERIC: 0.0 enabled
1373 18:49:31.480556 scan_static_bus for PCI: 00:14.3 done
1374 18:49:31.487075 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1375 18:49:31.487599 PCI: 00:15.0 scanning...
1376 18:49:31.490168 scan_static_bus for PCI: 00:15.0
1377 18:49:31.493641 I2C: 00:1a enabled
1378 18:49:31.496956 I2C: 00:31 enabled
1379 18:49:31.497503 I2C: 00:32 enabled
1380 18:49:31.500167 scan_static_bus for PCI: 00:15.0 done
1381 18:49:31.507203 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1382 18:49:31.510253 PCI: 00:15.1 scanning...
1383 18:49:31.513626 scan_static_bus for PCI: 00:15.1
1384 18:49:31.514275 I2C: 00:50 enabled
1385 18:49:31.516832 scan_static_bus for PCI: 00:15.1 done
1386 18:49:31.523451 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1387 18:49:31.523976 PCI: 00:15.3 scanning...
1388 18:49:31.526882 scan_static_bus for PCI: 00:15.3
1389 18:49:31.530614 I2C: 00:10 enabled
1390 18:49:31.533521 scan_static_bus for PCI: 00:15.3 done
1391 18:49:31.540162 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1392 18:49:31.540619 PCI: 00:19.1 scanning...
1393 18:49:31.543705 scan_static_bus for PCI: 00:19.1
1394 18:49:31.547101 I2C: 00:15 enabled
1395 18:49:31.551344 I2C: 00:2c enabled
1396 18:49:31.553541 scan_static_bus for PCI: 00:19.1 done
1397 18:49:31.556519 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1398 18:49:31.560046 PCI: 00:1e.3 scanning...
1399 18:49:31.563660 scan_generic_bus for PCI: 00:1e.3
1400 18:49:31.564114 SPI: 00 enabled
1401 18:49:31.570144 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1402 18:49:31.576886 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1403 18:49:31.577350 PCI: 00:1f.0 scanning...
1404 18:49:31.580091 scan_static_bus for PCI: 00:1f.0
1405 18:49:31.583757 PNP: 0c09.0 enabled
1406 18:49:31.586799 PNP: 0c09.0 scanning...
1407 18:49:31.590043 scan_static_bus for PNP: 0c09.0
1408 18:49:31.593535 scan_static_bus for PNP: 0c09.0 done
1409 18:49:31.596304 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1410 18:49:31.600163 scan_static_bus for PCI: 00:1f.0 done
1411 18:49:31.606733 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1412 18:49:31.610204 PCI: 00:1f.2 scanning...
1413 18:49:31.613570 scan_static_bus for PCI: 00:1f.2
1414 18:49:31.614056 GENERIC: 0.0 enabled
1415 18:49:31.616667 GENERIC: 0.0 scanning...
1416 18:49:31.619787 scan_static_bus for GENERIC: 0.0
1417 18:49:31.622972 GENERIC: 0.0 enabled
1418 18:49:31.623568 GENERIC: 1.0 enabled
1419 18:49:31.629693 scan_static_bus for GENERIC: 0.0 done
1420 18:49:31.633237 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1421 18:49:31.636239 scan_static_bus for PCI: 00:1f.2 done
1422 18:49:31.642978 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1423 18:49:31.643438 PCI: 00:1f.3 scanning...
1424 18:49:31.646702 scan_static_bus for PCI: 00:1f.3
1425 18:49:31.650053 scan_static_bus for PCI: 00:1f.3 done
1426 18:49:31.656348 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1427 18:49:31.659690 PCI: 00:1f.5 scanning...
1428 18:49:31.663377 scan_generic_bus for PCI: 00:1f.5
1429 18:49:31.666159 scan_generic_bus for PCI: 00:1f.5 done
1430 18:49:31.669421 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1431 18:49:31.676460 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1432 18:49:31.679391 scan_static_bus for Root Device done
1433 18:49:31.682973 scan_bus: bus Root Device finished in 729 msecs
1434 18:49:31.683433 done
1435 18:49:31.689393 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1436 18:49:31.696134 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1437 18:49:31.702790 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1438 18:49:31.706165 SPI flash protection: WPSW=0 SRP0=0
1439 18:49:31.709476 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1440 18:49:31.716087 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1441 18:49:31.719801 found VGA at PCI: 00:02.0
1442 18:49:31.722765 Setting up VGA for PCI: 00:02.0
1443 18:49:31.726356 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1444 18:49:31.732848 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1445 18:49:31.735911 Allocating resources...
1446 18:49:31.736368 Reading resources...
1447 18:49:31.742668 Root Device read_resources bus 0 link: 0
1448 18:49:31.746365 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1449 18:49:31.749682 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1450 18:49:31.755688 DOMAIN: 0000 read_resources bus 0 link: 0
1451 18:49:31.762400 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1452 18:49:31.765856 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1453 18:49:31.772454 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1454 18:49:31.779027 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1455 18:49:31.785977 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1456 18:49:31.792764 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1457 18:49:31.799089 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1458 18:49:31.805746 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1459 18:49:31.812177 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1460 18:49:31.819246 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1461 18:49:31.825901 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1462 18:49:31.832329 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1463 18:49:31.838455 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1464 18:49:31.842062 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1465 18:49:31.848576 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1466 18:49:31.855500 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1467 18:49:31.862154 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1468 18:49:31.868873 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1469 18:49:31.874993 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1470 18:49:31.882127 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1471 18:49:31.888730 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1472 18:49:31.891718 PCI: 00:04.0 read_resources bus 1 link: 0
1473 18:49:31.895042 PCI: 00:04.0 read_resources bus 1 link: 0 done
1474 18:49:31.901946 PCI: 00:06.0 read_resources bus 1 link: 0
1475 18:49:31.905061 PCI: 00:06.0 read_resources bus 1 link: 0 done
1476 18:49:31.908288 PCI: 00:0d.0 read_resources bus 0 link: 0
1477 18:49:31.911613 USB0 port 0 read_resources bus 0 link: 0
1478 18:49:31.919037 USB0 port 0 read_resources bus 0 link: 0 done
1479 18:49:31.921504 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1480 18:49:31.928991 PCI: 00:14.0 read_resources bus 0 link: 0
1481 18:49:31.931362 USB0 port 0 read_resources bus 0 link: 0
1482 18:49:31.934849 USB0 port 0 read_resources bus 0 link: 0 done
1483 18:49:31.941120 PCI: 00:14.0 read_resources bus 0 link: 0 done
1484 18:49:31.944988 PCI: 00:14.3 read_resources bus 0 link: 0
1485 18:49:31.948326 PCI: 00:14.3 read_resources bus 0 link: 0 done
1486 18:49:31.954569 PCI: 00:15.0 read_resources bus 0 link: 0
1487 18:49:31.958149 PCI: 00:15.0 read_resources bus 0 link: 0 done
1488 18:49:31.962059 PCI: 00:15.1 read_resources bus 0 link: 0
1489 18:49:31.968280 PCI: 00:15.1 read_resources bus 0 link: 0 done
1490 18:49:31.971476 PCI: 00:15.3 read_resources bus 0 link: 0
1491 18:49:31.978225 PCI: 00:15.3 read_resources bus 0 link: 0 done
1492 18:49:31.981408 PCI: 00:19.1 read_resources bus 0 link: 0
1493 18:49:31.984689 PCI: 00:19.1 read_resources bus 0 link: 0 done
1494 18:49:31.991966 PCI: 00:1e.3 read_resources bus 2 link: 0
1495 18:49:31.994563 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1496 18:49:31.998462 PCI: 00:1f.0 read_resources bus 0 link: 0
1497 18:49:32.004747 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1498 18:49:32.008003 PCI: 00:1f.2 read_resources bus 0 link: 0
1499 18:49:32.011442 GENERIC: 0.0 read_resources bus 0 link: 0
1500 18:49:32.017847 GENERIC: 0.0 read_resources bus 0 link: 0 done
1501 18:49:32.021038 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1502 18:49:32.027668 DOMAIN: 0000 read_resources bus 0 link: 0 done
1503 18:49:32.030932 Root Device read_resources bus 0 link: 0 done
1504 18:49:32.034368 Done reading resources.
1505 18:49:32.037732 Show resources in subtree (Root Device)...After reading.
1506 18:49:32.044299 Root Device child on link 0 CPU_CLUSTER: 0
1507 18:49:32.048068 CPU_CLUSTER: 0 child on link 0 APIC: 00
1508 18:49:32.050961 APIC: 00
1509 18:49:32.051423 APIC: 14
1510 18:49:32.051794 APIC: 16
1511 18:49:32.054333 APIC: 10
1512 18:49:32.054789 APIC: 12
1513 18:49:32.055155 APIC: 01
1514 18:49:32.057782 APIC: 09
1515 18:49:32.058343 APIC: 08
1516 18:49:32.061210 DOMAIN: 0000 child on link 0 GPIO: 0
1517 18:49:32.070622 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1518 18:49:32.080616 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1519 18:49:32.083771 GPIO: 0
1520 18:49:32.084225 PCI: 00:00.0
1521 18:49:32.094254 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1522 18:49:32.103953 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1523 18:49:32.113958 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1524 18:49:32.120406 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1525 18:49:32.130431 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1526 18:49:32.140815 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1527 18:49:32.150769 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1528 18:49:32.160302 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1529 18:49:32.170416 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1530 18:49:32.180427 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1531 18:49:32.187085 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1532 18:49:32.197322 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1533 18:49:32.206849 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1534 18:49:32.216413 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1535 18:49:32.226306 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1536 18:49:32.233050 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1537 18:49:32.243147 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1538 18:49:32.253241 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1539 18:49:32.262938 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1540 18:49:32.273014 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1541 18:49:32.283148 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1542 18:49:32.292915 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1543 18:49:32.302971 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1544 18:49:32.312578 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1545 18:49:32.322611 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1546 18:49:32.329412 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1547 18:49:32.339146 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1548 18:49:32.349859 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1549 18:49:32.352578 PCI: 00:02.0
1550 18:49:32.362446 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1551 18:49:32.372977 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1552 18:49:32.379094 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1553 18:49:32.385788 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1554 18:49:32.395981 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1555 18:49:32.396436 GENERIC: 0.0
1556 18:49:32.402727 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1557 18:49:32.409342 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1558 18:49:32.419343 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1559 18:49:32.429223 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1560 18:49:32.429816 PCI: 01:00.0
1561 18:49:32.438823 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1562 18:49:32.448814 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1563 18:49:32.452363 PCI: 00:08.0
1564 18:49:32.452810 PCI: 00:0a.0
1565 18:49:32.462176 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1566 18:49:32.469376 PCI: 00:0d.0 child on link 0 USB0 port 0
1567 18:49:32.478962 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1568 18:49:32.482120 USB0 port 0 child on link 0 USB3 port 0
1569 18:49:32.485358 USB3 port 0
1570 18:49:32.485899 USB3 port 1
1571 18:49:32.488610 USB3 port 2
1572 18:49:32.489058 USB3 port 3
1573 18:49:32.495138 PCI: 00:14.0 child on link 0 USB0 port 0
1574 18:49:32.505263 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1575 18:49:32.508757 USB0 port 0 child on link 0 USB2 port 0
1576 18:49:32.509216 USB2 port 0
1577 18:49:32.512448 USB2 port 1
1578 18:49:32.512900 USB2 port 2
1579 18:49:32.515374 USB2 port 3
1580 18:49:32.519012 USB2 port 4
1581 18:49:32.519616 USB2 port 5
1582 18:49:32.521961 USB2 port 6
1583 18:49:32.522459 USB2 port 7
1584 18:49:32.525679 USB2 port 8
1585 18:49:32.526317 USB2 port 9
1586 18:49:32.529264 USB3 port 0
1587 18:49:32.529713 USB3 port 1
1588 18:49:32.531985 USB3 port 2
1589 18:49:32.532532 USB3 port 3
1590 18:49:32.535482 PCI: 00:14.2
1591 18:49:32.546108 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1592 18:49:32.555985 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1593 18:49:32.558901 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1594 18:49:32.568909 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1595 18:49:32.572256 GENERIC: 0.0
1596 18:49:32.575780 PCI: 00:15.0 child on link 0 I2C: 00:1a
1597 18:49:32.585621 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1598 18:49:32.586143 I2C: 00:1a
1599 18:49:32.588359 I2C: 00:31
1600 18:49:32.588819 I2C: 00:32
1601 18:49:32.595107 PCI: 00:15.1 child on link 0 I2C: 00:50
1602 18:49:32.605264 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1603 18:49:32.605796 I2C: 00:50
1604 18:49:32.608670 PCI: 00:15.2
1605 18:49:32.611928 PCI: 00:15.3 child on link 0 I2C: 00:10
1606 18:49:32.621937 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1607 18:49:32.622531 I2C: 00:10
1608 18:49:32.625159 PCI: 00:16.0
1609 18:49:32.635647 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1610 18:49:32.636118 PCI: 00:19.0
1611 18:49:32.641705 PCI: 00:19.1 child on link 0 I2C: 00:15
1612 18:49:32.652105 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1613 18:49:32.652675 I2C: 00:15
1614 18:49:32.654966 I2C: 00:2c
1615 18:49:32.655425 PCI: 00:1e.0
1616 18:49:32.668552 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1617 18:49:32.671835 PCI: 00:1e.3 child on link 0 SPI: 00
1618 18:49:32.681590 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1619 18:49:32.682155 SPI: 00
1620 18:49:32.685001 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1621 18:49:32.695211 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1622 18:49:32.698432 PNP: 0c09.0
1623 18:49:32.704709 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1624 18:49:32.711460 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1625 18:49:32.718168 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1626 18:49:32.728543 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1627 18:49:32.735036 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1628 18:49:32.735498 GENERIC: 0.0
1629 18:49:32.738501 GENERIC: 1.0
1630 18:49:32.738953 PCI: 00:1f.3
1631 18:49:32.748074 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1632 18:49:32.758537 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1633 18:49:32.761347 PCI: 00:1f.5
1634 18:49:32.767910 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1635 18:49:32.777806 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1636 18:49:32.781450 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1637 18:49:32.788051 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1638 18:49:32.794468 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1639 18:49:32.797876 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1640 18:49:32.804811 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1641 18:49:32.810885 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1642 18:49:32.818054 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1643 18:49:32.825010 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1644 18:49:32.830970 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1645 18:49:32.837922 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1646 18:49:32.847574 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1647 18:49:32.854001 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1648 18:49:32.861143 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1649 18:49:32.863986 DOMAIN: 0000: Resource ranges:
1650 18:49:32.867981 * Base: 1000, Size: 800, Tag: 100
1651 18:49:32.870712 * Base: 1900, Size: e700, Tag: 100
1652 18:49:32.877266 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1653 18:49:32.883894 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1654 18:49:32.890725 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1655 18:49:32.897784 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1656 18:49:32.907297 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1657 18:49:32.913988 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1658 18:49:32.920815 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1659 18:49:32.930632 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1660 18:49:32.936729 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1661 18:49:32.943718 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1662 18:49:32.953813 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1663 18:49:32.960351 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1664 18:49:32.966874 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1665 18:49:32.976748 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1666 18:49:32.983435 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1667 18:49:32.990353 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1668 18:49:32.999589 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1669 18:49:33.006652 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1670 18:49:33.012860 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1671 18:49:33.023304 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1672 18:49:33.029783 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1673 18:49:33.036133 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1674 18:49:33.046071 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1675 18:49:33.052517 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1676 18:49:33.059775 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1677 18:49:33.069250 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1678 18:49:33.075835 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1679 18:49:33.082841 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1680 18:49:33.092763 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1681 18:49:33.099387 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1682 18:49:33.106554 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1683 18:49:33.115697 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1684 18:49:33.122199 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1685 18:49:33.125972 DOMAIN: 0000: Resource ranges:
1686 18:49:33.129346 * Base: 80400000, Size: 3fc00000, Tag: 200
1687 18:49:33.132363 * Base: d0000000, Size: 28000000, Tag: 200
1688 18:49:33.139470 * Base: fa000000, Size: 1000000, Tag: 200
1689 18:49:33.142560 * Base: fb001000, Size: 17ff000, Tag: 200
1690 18:49:33.145590 * Base: fe800000, Size: 300000, Tag: 200
1691 18:49:33.152195 * Base: feb80000, Size: 80000, Tag: 200
1692 18:49:33.156356 * Base: fed00000, Size: 40000, Tag: 200
1693 18:49:33.158603 * Base: fed70000, Size: 10000, Tag: 200
1694 18:49:33.162426 * Base: fed88000, Size: 8000, Tag: 200
1695 18:49:33.165230 * Base: fed93000, Size: d000, Tag: 200
1696 18:49:33.172341 * Base: feda2000, Size: 1e000, Tag: 200
1697 18:49:33.175487 * Base: fede0000, Size: 1220000, Tag: 200
1698 18:49:33.179441 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1699 18:49:33.188649 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1700 18:49:33.195615 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1701 18:49:33.202147 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1702 18:49:33.208848 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1703 18:49:33.215243 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1704 18:49:33.221748 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1705 18:49:33.228762 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1706 18:49:33.235290 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1707 18:49:33.241884 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1708 18:49:33.248496 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1709 18:49:33.255035 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1710 18:49:33.261415 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1711 18:49:33.268355 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1712 18:49:33.275090 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1713 18:49:33.281700 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1714 18:49:33.288086 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1715 18:49:33.294806 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1716 18:49:33.301606 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1717 18:49:33.308111 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1718 18:49:33.314935 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1719 18:49:33.321500 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1720 18:49:33.324431 PCI: 00:06.0: Resource ranges:
1721 18:49:33.327994 * Base: 80400000, Size: 100000, Tag: 200
1722 18:49:33.334381 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1723 18:49:33.341604 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1724 18:49:33.351607 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1725 18:49:33.357828 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1726 18:49:33.360850 Root Device assign_resources, bus 0 link: 0
1727 18:49:33.367591 DOMAIN: 0000 assign_resources, bus 0 link: 0
1728 18:49:33.374571 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1729 18:49:33.384390 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1730 18:49:33.391226 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1731 18:49:33.400902 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1732 18:49:33.404436 PCI: 00:04.0 assign_resources, bus 1 link: 0
1733 18:49:33.407518 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1734 18:49:33.417459 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1735 18:49:33.427728 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1736 18:49:33.434375 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1737 18:49:33.440466 PCI: 00:06.0 assign_resources, bus 1 link: 0
1738 18:49:33.448132 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1739 18:49:33.457419 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1740 18:49:33.460950 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1741 18:49:33.470491 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1742 18:49:33.477358 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1743 18:49:33.480709 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1744 18:49:33.487060 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1745 18:49:33.494485 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1746 18:49:33.501053 PCI: 00:14.0 assign_resources, bus 0 link: 0
1747 18:49:33.503617 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1748 18:49:33.510423 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1749 18:49:33.521055 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1750 18:49:33.527217 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1751 18:49:33.533857 PCI: 00:14.3 assign_resources, bus 0 link: 0
1752 18:49:33.536833 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1753 18:49:33.547163 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1754 18:49:33.550262 PCI: 00:15.0 assign_resources, bus 0 link: 0
1755 18:49:33.553734 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1756 18:49:33.563985 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1757 18:49:33.567107 PCI: 00:15.1 assign_resources, bus 0 link: 0
1758 18:49:33.573380 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1759 18:49:33.580093 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1760 18:49:33.586701 PCI: 00:15.3 assign_resources, bus 0 link: 0
1761 18:49:33.590121 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1762 18:49:33.596814 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1763 18:49:33.607011 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1764 18:49:33.609834 PCI: 00:19.1 assign_resources, bus 0 link: 0
1765 18:49:33.616289 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1766 18:49:33.623001 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1767 18:49:33.626783 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1768 18:49:33.633125 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1769 18:49:33.636605 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1770 18:49:33.643171 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1771 18:49:33.646947 LPC: Trying to open IO window from 800 size 1ff
1772 18:49:33.656347 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1773 18:49:33.663011 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1774 18:49:33.669530 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1775 18:49:33.676064 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1776 18:49:33.679721 Root Device assign_resources, bus 0 link: 0 done
1777 18:49:33.682970 Done setting resources.
1778 18:49:33.689512 Show resources in subtree (Root Device)...After assigning values.
1779 18:49:33.692855 Root Device child on link 0 CPU_CLUSTER: 0
1780 18:49:33.699434 CPU_CLUSTER: 0 child on link 0 APIC: 00
1781 18:49:33.699907 APIC: 00
1782 18:49:33.702448 APIC: 14
1783 18:49:33.702920 APIC: 16
1784 18:49:33.703394 APIC: 10
1785 18:49:33.705918 APIC: 12
1786 18:49:33.706433 APIC: 01
1787 18:49:33.706905 APIC: 09
1788 18:49:33.709562 APIC: 08
1789 18:49:33.712729 DOMAIN: 0000 child on link 0 GPIO: 0
1790 18:49:33.722569 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1791 18:49:33.732631 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1792 18:49:33.733114 GPIO: 0
1793 18:49:33.735951 PCI: 00:00.0
1794 18:49:33.746255 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1795 18:49:33.752323 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1796 18:49:33.762386 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1797 18:49:33.772763 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1798 18:49:33.783024 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1799 18:49:33.792039 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1800 18:49:33.802057 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1801 18:49:33.808551 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1802 18:49:33.818940 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1803 18:49:33.828746 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1804 18:49:33.839812 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1805 18:49:33.848427 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1806 18:49:33.858769 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1807 18:49:33.865481 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1808 18:49:33.875302 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1809 18:49:33.885309 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1810 18:49:33.895260 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1811 18:49:33.905080 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1812 18:49:33.914685 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1813 18:49:33.924850 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1814 18:49:33.934493 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1815 18:49:33.941360 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1816 18:49:33.951420 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1817 18:49:33.961524 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1818 18:49:33.971104 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1819 18:49:33.981201 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1820 18:49:33.991391 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1821 18:49:34.001171 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1822 18:49:34.001647 PCI: 00:02.0
1823 18:49:34.014080 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1824 18:49:34.024046 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1825 18:49:34.034211 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1826 18:49:34.037144 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1827 18:49:34.047359 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1828 18:49:34.051157 GENERIC: 0.0
1829 18:49:34.054331 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1830 18:49:34.063707 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1831 18:49:34.073597 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1832 18:49:34.083850 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1833 18:49:34.086844 PCI: 01:00.0
1834 18:49:34.097206 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1835 18:49:34.107103 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1836 18:49:34.110425 PCI: 00:08.0
1837 18:49:34.110890 PCI: 00:0a.0
1838 18:49:34.119828 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1839 18:49:34.126586 PCI: 00:0d.0 child on link 0 USB0 port 0
1840 18:49:34.136902 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1841 18:49:34.140223 USB0 port 0 child on link 0 USB3 port 0
1842 18:49:34.143084 USB3 port 0
1843 18:49:34.143594 USB3 port 1
1844 18:49:34.146948 USB3 port 2
1845 18:49:34.147555 USB3 port 3
1846 18:49:34.153190 PCI: 00:14.0 child on link 0 USB0 port 0
1847 18:49:34.163000 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1848 18:49:34.166322 USB0 port 0 child on link 0 USB2 port 0
1849 18:49:34.170223 USB2 port 0
1850 18:49:34.170734 USB2 port 1
1851 18:49:34.173792 USB2 port 2
1852 18:49:34.174330 USB2 port 3
1853 18:49:34.176369 USB2 port 4
1854 18:49:34.176880 USB2 port 5
1855 18:49:34.180099 USB2 port 6
1856 18:49:34.180603 USB2 port 7
1857 18:49:34.182841 USB2 port 8
1858 18:49:34.183342 USB2 port 9
1859 18:49:34.186585 USB3 port 0
1860 18:49:34.187095 USB3 port 1
1861 18:49:34.189862 USB3 port 2
1862 18:49:34.192862 USB3 port 3
1863 18:49:34.193324 PCI: 00:14.2
1864 18:49:34.203107 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1865 18:49:34.212652 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1866 18:49:34.219507 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1867 18:49:34.229991 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1868 18:49:34.230527 GENERIC: 0.0
1869 18:49:34.236414 PCI: 00:15.0 child on link 0 I2C: 00:1a
1870 18:49:34.245923 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1871 18:49:34.246426 I2C: 00:1a
1872 18:49:34.249695 I2C: 00:31
1873 18:49:34.250291 I2C: 00:32
1874 18:49:34.252764 PCI: 00:15.1 child on link 0 I2C: 00:50
1875 18:49:34.265650 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1876 18:49:34.266239 I2C: 00:50
1877 18:49:34.269516 PCI: 00:15.2
1878 18:49:34.273151 PCI: 00:15.3 child on link 0 I2C: 00:10
1879 18:49:34.282660 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1880 18:49:34.283181 I2C: 00:10
1881 18:49:34.285506 PCI: 00:16.0
1882 18:49:34.295733 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1883 18:49:34.299431 PCI: 00:19.0
1884 18:49:34.302283 PCI: 00:19.1 child on link 0 I2C: 00:15
1885 18:49:34.312183 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1886 18:49:34.312669 I2C: 00:15
1887 18:49:34.315741 I2C: 00:2c
1888 18:49:34.316231 PCI: 00:1e.0
1889 18:49:34.328961 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1890 18:49:34.332430 PCI: 00:1e.3 child on link 0 SPI: 00
1891 18:49:34.342119 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1892 18:49:34.342793 SPI: 00
1893 18:49:34.348662 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1894 18:49:34.355824 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1895 18:49:34.359055 PNP: 0c09.0
1896 18:49:34.368883 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1897 18:49:34.372127 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1898 18:49:34.382039 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1899 18:49:34.388509 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1900 18:49:34.395673 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1901 18:49:34.396139 GENERIC: 0.0
1902 18:49:34.398720 GENERIC: 1.0
1903 18:49:34.401667 PCI: 00:1f.3
1904 18:49:34.411841 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1905 18:49:34.422372 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1906 18:49:34.422855 PCI: 00:1f.5
1907 18:49:34.432074 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1908 18:49:34.434970 Done allocating resources.
1909 18:49:34.441511 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1910 18:49:34.448434 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1911 18:49:34.452190 Configure audio over I2S with MAX98373 NAU88L25B.
1912 18:49:34.456575 Enabling BT offload
1913 18:49:34.464512 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1914 18:49:34.467503 Enabling resources...
1915 18:49:34.470500 PCI: 00:00.0 subsystem <- 8086/4609
1916 18:49:34.473801 PCI: 00:00.0 cmd <- 06
1917 18:49:34.477833 PCI: 00:02.0 subsystem <- 8086/46b3
1918 18:49:34.480837 PCI: 00:02.0 cmd <- 03
1919 18:49:34.484271 PCI: 00:04.0 subsystem <- 8086/461d
1920 18:49:34.484736 PCI: 00:04.0 cmd <- 02
1921 18:49:34.487706 PCI: 00:06.0 bridge ctrl <- 0013
1922 18:49:34.490602 PCI: 00:06.0 subsystem <- 8086/464d
1923 18:49:34.494087 PCI: 00:06.0 cmd <- 106
1924 18:49:34.497508 PCI: 00:0a.0 subsystem <- 8086/467d
1925 18:49:34.500468 PCI: 00:0a.0 cmd <- 02
1926 18:49:34.504319 PCI: 00:0d.0 subsystem <- 8086/461e
1927 18:49:34.507053 PCI: 00:0d.0 cmd <- 02
1928 18:49:34.510338 PCI: 00:14.0 subsystem <- 8086/51ed
1929 18:49:34.513778 PCI: 00:14.0 cmd <- 02
1930 18:49:34.517253 PCI: 00:14.2 subsystem <- 8086/51ef
1931 18:49:34.517755 PCI: 00:14.2 cmd <- 02
1932 18:49:34.523613 PCI: 00:14.3 subsystem <- 8086/51f0
1933 18:49:34.524082 PCI: 00:14.3 cmd <- 02
1934 18:49:34.527250 PCI: 00:15.0 subsystem <- 8086/51e8
1935 18:49:34.530481 PCI: 00:15.0 cmd <- 02
1936 18:49:34.533996 PCI: 00:15.1 subsystem <- 8086/51e9
1937 18:49:34.537594 PCI: 00:15.1 cmd <- 06
1938 18:49:34.540167 PCI: 00:15.3 subsystem <- 8086/51eb
1939 18:49:34.543697 PCI: 00:15.3 cmd <- 02
1940 18:49:34.546934 PCI: 00:16.0 subsystem <- 8086/51e0
1941 18:49:34.547406 PCI: 00:16.0 cmd <- 02
1942 18:49:34.553530 PCI: 00:19.1 subsystem <- 8086/51c6
1943 18:49:34.553993 PCI: 00:19.1 cmd <- 02
1944 18:49:34.557331 PCI: 00:1e.0 subsystem <- 8086/51a8
1945 18:49:34.559980 PCI: 00:1e.0 cmd <- 06
1946 18:49:34.563530 PCI: 00:1e.3 subsystem <- 8086/51ab
1947 18:49:34.566881 PCI: 00:1e.3 cmd <- 02
1948 18:49:34.570101 PCI: 00:1f.0 subsystem <- 8086/5182
1949 18:49:34.574030 PCI: 00:1f.0 cmd <- 407
1950 18:49:34.576925 PCI: 00:1f.3 subsystem <- 8086/51c8
1951 18:49:34.580386 PCI: 00:1f.3 cmd <- 02
1952 18:49:34.583573 PCI: 00:1f.5 subsystem <- 8086/51a4
1953 18:49:34.584064 PCI: 00:1f.5 cmd <- 406
1954 18:49:34.587034 PCI: 01:00.0 cmd <- 02
1955 18:49:34.587499 done.
1956 18:49:34.593677 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1957 18:49:34.597120 ME: Version: Unavailable
1958 18:49:34.600380 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1959 18:49:34.603647 Initializing devices...
1960 18:49:34.606598 Root Device init
1961 18:49:34.607098 mainboard: EC init
1962 18:49:34.613518 Chrome EC: Set SMI mask to 0x0000000000000000
1963 18:49:34.616829 Chrome EC: UHEPI supported
1964 18:49:34.623580 Chrome EC: clear events_b mask to 0x0000000000000000
1965 18:49:34.629926 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1966 18:49:34.636798 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1967 18:49:34.643614 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1968 18:49:34.646443 Chrome EC: Set WAKE mask to 0x0000000000000000
1969 18:49:34.654165 Root Device init finished in 43 msecs
1970 18:49:34.654647 PCI: 00:00.0 init
1971 18:49:34.657569 CPU TDP = 15 Watts
1972 18:49:34.661130 CPU PL1 = 15 Watts
1973 18:49:34.661589 CPU PL2 = 55 Watts
1974 18:49:34.664117 CPU PL4 = 123 Watts
1975 18:49:34.667582 PCI: 00:00.0 init finished in 8 msecs
1976 18:49:34.670415 PCI: 00:02.0 init
1977 18:49:34.670875 GMA: Found VBT in CBFS
1978 18:49:34.674078 GMA: Found valid VBT in CBFS
1979 18:49:34.680836 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1980 18:49:34.687417 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1981 18:49:34.690605 PCI: 00:02.0 init finished in 18 msecs
1982 18:49:34.694048 PCI: 00:06.0 init
1983 18:49:34.697207 Initializing PCH PCIe bridge.
1984 18:49:34.701224 PCI: 00:06.0 init finished in 3 msecs
1985 18:49:34.703962 PCI: 00:0a.0 init
1986 18:49:34.707349 PCI: 00:0a.0 init finished in 0 msecs
1987 18:49:34.707810 PCI: 00:14.0 init
1988 18:49:34.710493 PCI: 00:14.0 init finished in 0 msecs
1989 18:49:34.713549 PCI: 00:14.2 init
1990 18:49:34.717109 PCI: 00:14.2 init finished in 0 msecs
1991 18:49:34.720332 PCI: 00:15.0 init
1992 18:49:34.723562 I2C bus 0 version 0x3230302a
1993 18:49:34.727037 DW I2C bus 0 at 0x80655000 (400 KHz)
1994 18:49:34.730887 PCI: 00:15.0 init finished in 6 msecs
1995 18:49:34.731350 PCI: 00:15.1 init
1996 18:49:34.733408 I2C bus 1 version 0x3230302a
1997 18:49:34.737059 DW I2C bus 1 at 0x80656000 (400 KHz)
1998 18:49:34.743516 PCI: 00:15.1 init finished in 6 msecs
1999 18:49:34.744159 PCI: 00:15.3 init
2000 18:49:34.746651 I2C bus 3 version 0x3230302a
2001 18:49:34.750111 DW I2C bus 3 at 0x80657000 (400 KHz)
2002 18:49:34.754006 PCI: 00:15.3 init finished in 6 msecs
2003 18:49:34.757177 PCI: 00:16.0 init
2004 18:49:34.760886 PCI: 00:16.0 init finished in 0 msecs
2005 18:49:34.763427 PCI: 00:19.1 init
2006 18:49:34.763889 I2C bus 5 version 0x3230302a
2007 18:49:34.770808 DW I2C bus 5 at 0x80659000 (400 KHz)
2008 18:49:34.773301 PCI: 00:19.1 init finished in 6 msecs
2009 18:49:34.773866 PCI: 00:1f.0 init
2010 18:49:34.780403 IOAPIC: Initializing IOAPIC at 0xfec00000
2011 18:49:34.780963 IOAPIC: ID = 0x02
2012 18:49:34.783789 IOAPIC: Dumping registers
2013 18:49:34.786732 reg 0x0000: 0x02000000
2014 18:49:34.787193 reg 0x0001: 0x00770020
2015 18:49:34.789747 reg 0x0002: 0x00000000
2016 18:49:34.793323 IOAPIC: 120 interrupts
2017 18:49:34.797094 IOAPIC: Clearing IOAPIC at 0xfec00000
2018 18:49:34.803271 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2019 18:49:34.806685 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2020 18:49:34.809706 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2021 18:49:34.816918 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2022 18:49:34.820500 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2023 18:49:34.826450 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2024 18:49:34.830321 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2025 18:49:34.836425 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2026 18:49:34.839840 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2027 18:49:34.843498 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2028 18:49:34.850201 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2029 18:49:34.853862 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2030 18:49:34.860286 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2031 18:49:34.863551 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2032 18:49:34.869762 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2033 18:49:34.873060 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2034 18:49:34.879581 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2035 18:49:34.883370 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2036 18:49:34.890196 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2037 18:49:34.893092 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2038 18:49:34.896556 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2039 18:49:34.902735 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2040 18:49:34.906206 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2041 18:49:34.913132 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2042 18:49:34.916822 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2043 18:49:34.922717 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2044 18:49:34.926587 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2045 18:49:34.932891 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2046 18:49:34.935860 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2047 18:49:34.939566 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2048 18:49:34.946304 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2049 18:49:34.949734 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2050 18:49:34.956674 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2051 18:49:34.959190 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2052 18:49:34.966135 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2053 18:49:34.969539 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2054 18:49:34.972556 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2055 18:49:34.979457 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2056 18:49:34.983328 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2057 18:49:34.989169 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2058 18:49:34.992297 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2059 18:49:34.999249 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2060 18:49:35.002598 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2061 18:49:35.009149 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2062 18:49:35.012753 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2063 18:49:35.015865 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2064 18:49:35.022796 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2065 18:49:35.026239 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2066 18:49:35.032429 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2067 18:49:35.035747 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2068 18:49:35.042570 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2069 18:49:35.046428 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2070 18:49:35.052385 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2071 18:49:35.055932 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2072 18:49:35.058722 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2073 18:49:35.065838 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2074 18:49:35.068945 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2075 18:49:35.075322 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2076 18:49:35.078717 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2077 18:49:35.085474 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2078 18:49:35.089265 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2079 18:49:35.095447 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2080 18:49:35.099528 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2081 18:49:35.102175 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2082 18:49:35.108721 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2083 18:49:35.112186 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2084 18:49:35.118682 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2085 18:49:35.122626 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2086 18:49:35.128625 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2087 18:49:35.132292 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2088 18:49:35.138562 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2089 18:49:35.141881 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2090 18:49:35.145045 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2091 18:49:35.151697 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2092 18:49:35.155288 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2093 18:49:35.162111 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2094 18:49:35.165080 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2095 18:49:35.172128 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2096 18:49:35.174902 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2097 18:49:35.181561 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2098 18:49:35.185373 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2099 18:49:35.188552 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2100 18:49:35.194950 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2101 18:49:35.198577 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2102 18:49:35.205138 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2103 18:49:35.208528 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2104 18:49:35.214959 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2105 18:49:35.218396 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2106 18:49:35.221770 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2107 18:49:35.228561 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2108 18:49:35.231647 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2109 18:49:35.238531 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2110 18:49:35.241968 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2111 18:49:35.248629 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2112 18:49:35.251905 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2113 18:49:35.258841 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2114 18:49:35.261565 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2115 18:49:35.265083 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2116 18:49:35.271804 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2117 18:49:35.275333 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2118 18:49:35.281767 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2119 18:49:35.284530 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2120 18:49:35.291587 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2121 18:49:35.294610 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2122 18:49:35.301604 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2123 18:49:35.304948 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2124 18:49:35.307912 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2125 18:49:35.314642 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2126 18:49:35.317871 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2127 18:49:35.324977 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2128 18:49:35.327853 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2129 18:49:35.334922 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2130 18:49:35.337517 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2131 18:49:35.343984 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2132 18:49:35.347709 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2133 18:49:35.354409 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2134 18:49:35.357619 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2135 18:49:35.361581 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2136 18:49:35.367480 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2137 18:49:35.370825 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2138 18:49:35.377590 IOAPIC: Bootstrap Processor Local APIC = 0x00
2139 18:49:35.381301 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2140 18:49:35.384317 PCI: 00:1f.0 init finished in 607 msecs
2141 18:49:35.387583 PCI: 00:1f.2 init
2142 18:49:35.390603 apm_control: Disabling ACPI.
2143 18:49:35.394834 APMC done.
2144 18:49:35.397799 PCI: 00:1f.2 init finished in 6 msecs
2145 18:49:35.401396 PCI: 00:1f.3 init
2146 18:49:35.404330 PCI: 00:1f.3 init finished in 0 msecs
2147 18:49:35.404819 PCI: 01:00.0 init
2148 18:49:35.407884 PCI: 01:00.0 init finished in 0 msecs
2149 18:49:35.411208 PNP: 0c09.0 init
2150 18:49:35.414583 Google Chrome EC uptime: 12.128 seconds
2151 18:49:35.420927 Google Chrome AP resets since EC boot: 1
2152 18:49:35.424753 Google Chrome most recent AP reset causes:
2153 18:49:35.427507 0.342: 32775 shutdown: entering G3
2154 18:49:35.433971 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2155 18:49:35.437608 PNP: 0c09.0 init finished in 23 msecs
2156 18:49:35.440649 GENERIC: 0.0 init
2157 18:49:35.444407 GENERIC: 0.0 init finished in 0 msecs
2158 18:49:35.444905 GENERIC: 1.0 init
2159 18:49:35.450776 GENERIC: 1.0 init finished in 0 msecs
2160 18:49:35.451238 Devices initialized
2161 18:49:35.454092 Show all devs... After init.
2162 18:49:35.457431 Root Device: enabled 1
2163 18:49:35.461508 CPU_CLUSTER: 0: enabled 1
2164 18:49:35.461971 DOMAIN: 0000: enabled 1
2165 18:49:35.463892 GPIO: 0: enabled 1
2166 18:49:35.467258 PCI: 00:00.0: enabled 1
2167 18:49:35.467717 PCI: 00:01.0: enabled 0
2168 18:49:35.470871 PCI: 00:01.1: enabled 0
2169 18:49:35.473912 PCI: 00:02.0: enabled 1
2170 18:49:35.477568 PCI: 00:04.0: enabled 1
2171 18:49:35.478070 PCI: 00:05.0: enabled 0
2172 18:49:35.480566 PCI: 00:06.0: enabled 1
2173 18:49:35.483814 PCI: 00:06.2: enabled 0
2174 18:49:35.484286 PCI: 00:07.0: enabled 0
2175 18:49:35.486965 PCI: 00:07.1: enabled 0
2176 18:49:35.491249 PCI: 00:07.2: enabled 0
2177 18:49:35.494097 PCI: 00:07.3: enabled 0
2178 18:49:35.494593 PCI: 00:08.0: enabled 0
2179 18:49:35.497505 PCI: 00:09.0: enabled 0
2180 18:49:35.500760 PCI: 00:0a.0: enabled 1
2181 18:49:35.503617 PCI: 00:0d.0: enabled 1
2182 18:49:35.504076 PCI: 00:0d.1: enabled 0
2183 18:49:35.507487 PCI: 00:0d.2: enabled 0
2184 18:49:35.510352 PCI: 00:0d.3: enabled 0
2185 18:49:35.514105 PCI: 00:0e.0: enabled 0
2186 18:49:35.514573 PCI: 00:10.0: enabled 0
2187 18:49:35.517370 PCI: 00:10.1: enabled 0
2188 18:49:35.520250 PCI: 00:10.6: enabled 0
2189 18:49:35.523826 PCI: 00:10.7: enabled 0
2190 18:49:35.524317 PCI: 00:12.0: enabled 0
2191 18:49:35.526923 PCI: 00:12.6: enabled 0
2192 18:49:35.530437 PCI: 00:12.7: enabled 0
2193 18:49:35.530973 PCI: 00:13.0: enabled 0
2194 18:49:35.533598 PCI: 00:14.0: enabled 1
2195 18:49:35.537512 PCI: 00:14.1: enabled 0
2196 18:49:35.540735 PCI: 00:14.2: enabled 1
2197 18:49:35.541194 PCI: 00:14.3: enabled 1
2198 18:49:35.543374 PCI: 00:15.0: enabled 1
2199 18:49:35.547126 PCI: 00:15.1: enabled 1
2200 18:49:35.550337 PCI: 00:15.2: enabled 0
2201 18:49:35.550796 PCI: 00:15.3: enabled 1
2202 18:49:35.553845 PCI: 00:16.0: enabled 1
2203 18:49:35.556819 PCI: 00:16.1: enabled 0
2204 18:49:35.560567 PCI: 00:16.2: enabled 0
2205 18:49:35.561034 PCI: 00:16.3: enabled 0
2206 18:49:35.563751 PCI: 00:16.4: enabled 0
2207 18:49:35.566728 PCI: 00:16.5: enabled 0
2208 18:49:35.570510 PCI: 00:17.0: enabled 0
2209 18:49:35.570970 PCI: 00:19.0: enabled 0
2210 18:49:35.574056 PCI: 00:19.1: enabled 1
2211 18:49:35.576802 PCI: 00:19.2: enabled 0
2212 18:49:35.577345 PCI: 00:1a.0: enabled 0
2213 18:49:35.580424 PCI: 00:1c.0: enabled 0
2214 18:49:35.583961 PCI: 00:1c.1: enabled 0
2215 18:49:35.586951 PCI: 00:1c.2: enabled 0
2216 18:49:35.587430 PCI: 00:1c.3: enabled 0
2217 18:49:35.590307 PCI: 00:1c.4: enabled 0
2218 18:49:35.593637 PCI: 00:1c.5: enabled 0
2219 18:49:35.597015 PCI: 00:1c.6: enabled 0
2220 18:49:35.597472 PCI: 00:1c.7: enabled 0
2221 18:49:35.600121 PCI: 00:1d.0: enabled 0
2222 18:49:35.603707 PCI: 00:1d.1: enabled 0
2223 18:49:35.606813 PCI: 00:1d.2: enabled 0
2224 18:49:35.607297 PCI: 00:1d.3: enabled 0
2225 18:49:35.610069 PCI: 00:1e.0: enabled 1
2226 18:49:35.613440 PCI: 00:1e.1: enabled 0
2227 18:49:35.617325 PCI: 00:1e.2: enabled 0
2228 18:49:35.617800 PCI: 00:1e.3: enabled 1
2229 18:49:35.619835 PCI: 00:1f.0: enabled 1
2230 18:49:35.623595 PCI: 00:1f.1: enabled 0
2231 18:49:35.624185 PCI: 00:1f.2: enabled 1
2232 18:49:35.626942 PCI: 00:1f.3: enabled 1
2233 18:49:35.630668 PCI: 00:1f.4: enabled 0
2234 18:49:35.633592 PCI: 00:1f.5: enabled 1
2235 18:49:35.634080 PCI: 00:1f.6: enabled 0
2236 18:49:35.636655 PCI: 00:1f.7: enabled 0
2237 18:49:35.639805 GENERIC: 0.0: enabled 1
2238 18:49:35.643610 GENERIC: 0.0: enabled 1
2239 18:49:35.644086 GENERIC: 1.0: enabled 1
2240 18:49:35.646337 GENERIC: 0.0: enabled 1
2241 18:49:35.650112 GENERIC: 1.0: enabled 1
2242 18:49:35.653031 USB0 port 0: enabled 1
2243 18:49:35.653490 USB0 port 0: enabled 1
2244 18:49:35.656659 GENERIC: 0.0: enabled 1
2245 18:49:35.659662 I2C: 00:1a: enabled 1
2246 18:49:35.660142 I2C: 00:31: enabled 1
2247 18:49:35.663624 I2C: 00:32: enabled 1
2248 18:49:35.666440 I2C: 00:50: enabled 1
2249 18:49:35.666918 I2C: 00:10: enabled 1
2250 18:49:35.669784 I2C: 00:15: enabled 1
2251 18:49:35.673799 I2C: 00:2c: enabled 1
2252 18:49:35.674360 GENERIC: 0.0: enabled 1
2253 18:49:35.676936 SPI: 00: enabled 1
2254 18:49:35.680094 PNP: 0c09.0: enabled 1
2255 18:49:35.680601 GENERIC: 0.0: enabled 1
2256 18:49:35.682823 USB3 port 0: enabled 1
2257 18:49:35.686666 USB3 port 1: enabled 0
2258 18:49:35.689603 USB3 port 2: enabled 1
2259 18:49:35.690151 USB3 port 3: enabled 0
2260 18:49:35.692893 USB2 port 0: enabled 1
2261 18:49:35.696241 USB2 port 1: enabled 0
2262 18:49:35.696698 USB2 port 2: enabled 1
2263 18:49:35.699726 USB2 port 3: enabled 0
2264 18:49:35.703767 USB2 port 4: enabled 0
2265 18:49:35.706205 USB2 port 5: enabled 1
2266 18:49:35.706686 USB2 port 6: enabled 0
2267 18:49:35.709778 USB2 port 7: enabled 0
2268 18:49:35.712624 USB2 port 8: enabled 1
2269 18:49:35.713087 USB2 port 9: enabled 1
2270 18:49:35.716231 USB3 port 0: enabled 1
2271 18:49:35.719924 USB3 port 1: enabled 0
2272 18:49:35.720486 USB3 port 2: enabled 0
2273 18:49:35.722665 USB3 port 3: enabled 0
2274 18:49:35.726182 GENERIC: 0.0: enabled 1
2275 18:49:35.729602 GENERIC: 1.0: enabled 1
2276 18:49:35.730130 APIC: 00: enabled 1
2277 18:49:35.732757 APIC: 14: enabled 1
2278 18:49:35.736185 APIC: 16: enabled 1
2279 18:49:35.736650 APIC: 10: enabled 1
2280 18:49:35.739465 APIC: 12: enabled 1
2281 18:49:35.739927 APIC: 01: enabled 1
2282 18:49:35.743125 APIC: 09: enabled 1
2283 18:49:35.746052 APIC: 08: enabled 1
2284 18:49:35.746590 PCI: 01:00.0: enabled 1
2285 18:49:35.752483 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2286 18:49:35.759834 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2287 18:49:35.762434 ELOG: NV offset 0xf20000 size 0x4000
2288 18:49:35.769628 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2289 18:49:35.775742 ELOG: Event(17) added with size 13 at 2024-03-01 18:49:35 UTC
2290 18:49:35.782437 ELOG: Event(9E) added with size 10 at 2024-03-01 18:49:35 UTC
2291 18:49:35.789576 ELOG: Event(9F) added with size 14 at 2024-03-01 18:49:35 UTC
2292 18:49:35.796003 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2293 18:49:35.802435 ELOG: Event(A0) added with size 9 at 2024-03-01 18:49:35 UTC
2294 18:49:35.805614 elog_add_boot_reason: Logged dev mode boot
2295 18:49:35.812383 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2296 18:49:35.812910 Finalize devices...
2297 18:49:35.815420 PCI: 00:16.0 final
2298 18:49:35.815897 PCI: 00:1f.2 final
2299 18:49:35.818981 GENERIC: 0.0 final
2300 18:49:35.825626 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2301 18:49:35.826153 GENERIC: 1.0 final
2302 18:49:35.832339 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2303 18:49:35.835388 Devices finalized
2304 18:49:35.842334 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2305 18:49:35.845674 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2306 18:49:35.852048 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2307 18:49:35.855374 ME: HFSTS1 : 0x90000245
2308 18:49:35.861655 ME: HFSTS2 : 0x82100116
2309 18:49:35.865535 ME: HFSTS3 : 0x00000050
2310 18:49:35.868976 ME: HFSTS4 : 0x00004000
2311 18:49:35.875199 ME: HFSTS5 : 0x00000000
2312 18:49:35.878898 ME: HFSTS6 : 0x40600006
2313 18:49:35.881952 ME: Manufacturing Mode : NO
2314 18:49:35.885353 ME: SPI Protection Mode Enabled : YES
2315 18:49:35.888717 ME: FPFs Committed : YES
2316 18:49:35.894982 ME: Manufacturing Vars Locked : YES
2317 18:49:35.898943 ME: FW Partition Table : OK
2318 18:49:35.901760 ME: Bringup Loader Failure : NO
2319 18:49:35.905161 ME: Firmware Init Complete : YES
2320 18:49:35.908148 ME: Boot Options Present : NO
2321 18:49:35.911999 ME: Update In Progress : NO
2322 18:49:35.915414 ME: D0i3 Support : YES
2323 18:49:35.921676 ME: Low Power State Enabled : NO
2324 18:49:35.925068 ME: CPU Replaced : YES
2325 18:49:35.928079 ME: CPU Replacement Valid : YES
2326 18:49:35.931745 ME: Current Working State : 5
2327 18:49:35.935314 ME: Current Operation State : 1
2328 18:49:35.938479 ME: Current Operation Mode : 0
2329 18:49:35.941922 ME: Error Code : 0
2330 18:49:35.945122 ME: Enhanced Debug Mode : NO
2331 18:49:35.948292 ME: CPU Debug Disabled : YES
2332 18:49:35.955146 ME: TXT Support : NO
2333 18:49:35.958266 ME: WP for RO is enabled : YES
2334 18:49:35.961533 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2335 18:49:35.967887 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2336 18:49:35.971464 Ramoops buffer: 0x100000@0x76899000.
2337 18:49:35.978721 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2338 18:49:35.984827 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2339 18:49:35.988277 CBFS: 'fallback/slic' not found.
2340 18:49:35.994724 ACPI: Writing ACPI tables at 7686d000.
2341 18:49:35.995190 ACPI: * FACS
2342 18:49:35.998125 ACPI: * DSDT
2343 18:49:36.004310 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2344 18:49:36.008228 ACPI: * FADT
2345 18:49:36.008689 SCI is IRQ9
2346 18:49:36.011794 ACPI: added table 1/32, length now 40
2347 18:49:36.014402 ACPI: * SSDT
2348 18:49:36.017496 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2349 18:49:36.025297 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2350 18:49:36.028971 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2351 18:49:36.032673 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2352 18:49:36.038553 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2353 18:49:36.045083 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2354 18:49:36.051761 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2355 18:49:36.055614 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2356 18:49:36.062436 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2357 18:49:36.066197 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2358 18:49:36.072242 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2359 18:49:36.075105 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2360 18:49:36.081930 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2361 18:49:36.085368 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2362 18:49:36.092474 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2363 18:49:36.095743 PS2K: Passing 80 keymaps to kernel
2364 18:49:36.102532 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2365 18:49:36.109435 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2366 18:49:36.115801 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2367 18:49:36.121898 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2368 18:49:36.128690 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2369 18:49:36.135661 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2370 18:49:36.138380 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2371 18:49:36.144877 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2372 18:49:36.151455 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2373 18:49:36.158681 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2374 18:49:36.161706 ACPI: added table 2/32, length now 44
2375 18:49:36.165331 ACPI: * MCFG
2376 18:49:36.168440 ACPI: added table 3/32, length now 48
2377 18:49:36.168900 ACPI: * TPM2
2378 18:49:36.171857 TPM2 log created at 0x7685d000
2379 18:49:36.178142 ACPI: added table 4/32, length now 52
2380 18:49:36.178466 ACPI: * LPIT
2381 18:49:36.181605 ACPI: added table 5/32, length now 56
2382 18:49:36.185076 ACPI: * MADT
2383 18:49:36.185313 SCI is IRQ9
2384 18:49:36.188648 ACPI: added table 6/32, length now 60
2385 18:49:36.192031 cmd_reg from pmc_make_ipc_cmd 1052838
2386 18:49:36.198633 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2387 18:49:36.205337 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2388 18:49:36.211578 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2389 18:49:36.215092 PMC CrashLog size in discovery mode: 0xC00
2390 18:49:36.217865 cpu crashlog bar addr: 0x80640000
2391 18:49:36.222149 cpu discovery table offset: 0x6030
2392 18:49:36.228085 cpu_crashlog_discovery_table buffer count: 0x3
2393 18:49:36.234502 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2394 18:49:36.241520 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2395 18:49:36.248164 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2396 18:49:36.251218 PMC crashLog size in discovery mode : 0xC00
2397 18:49:36.257914 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2398 18:49:36.264616 discover mode PMC crashlog size adjusted to: 0x200
2399 18:49:36.271194 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2400 18:49:36.274549 discover mode PMC crashlog size adjusted to: 0x0
2401 18:49:36.278428 m_cpu_crashLog_size : 0x3480 bytes
2402 18:49:36.281826 CPU crashLog present.
2403 18:49:36.284202 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2404 18:49:36.294396 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2405 18:49:36.294870 current = 76876550
2406 18:49:36.298166 ACPI: * DMAR
2407 18:49:36.301158 ACPI: added table 7/32, length now 64
2408 18:49:36.304543 ACPI: added table 8/32, length now 68
2409 18:49:36.305006 ACPI: * HPET
2410 18:49:36.311045 ACPI: added table 9/32, length now 72
2411 18:49:36.311554 ACPI: done.
2412 18:49:36.314511 ACPI tables: 38528 bytes.
2413 18:49:36.317245 smbios_write_tables: 76857000
2414 18:49:36.321658 EC returned error result code 3
2415 18:49:36.324837 Couldn't obtain OEM name from CBI
2416 18:49:36.328079 Create SMBIOS type 16
2417 18:49:36.331506 Create SMBIOS type 17
2418 18:49:36.334971 Create SMBIOS type 20
2419 18:49:36.335437 GENERIC: 0.0 (WIFI Device)
2420 18:49:36.337671 SMBIOS tables: 2156 bytes.
2421 18:49:36.341329 Writing table forward entry at 0x00000500
2422 18:49:36.348167 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2423 18:49:36.351228 Writing coreboot table at 0x76891000
2424 18:49:36.358300 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2425 18:49:36.364545 1. 0000000000001000-000000000009ffff: RAM
2426 18:49:36.367877 2. 00000000000a0000-00000000000fffff: RESERVED
2427 18:49:36.371585 3. 0000000000100000-0000000076856fff: RAM
2428 18:49:36.377796 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2429 18:49:36.384462 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2430 18:49:36.387554 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2431 18:49:36.394127 7. 0000000077000000-00000000803fffff: RESERVED
2432 18:49:36.397655 8. 00000000c0000000-00000000cfffffff: RESERVED
2433 18:49:36.404298 9. 00000000f8000000-00000000f9ffffff: RESERVED
2434 18:49:36.407566 10. 00000000fb000000-00000000fb000fff: RESERVED
2435 18:49:36.414204 11. 00000000fc800000-00000000fe7fffff: RESERVED
2436 18:49:36.417787 12. 00000000feb00000-00000000feb7ffff: RESERVED
2437 18:49:36.420713 13. 00000000fec00000-00000000fecfffff: RESERVED
2438 18:49:36.427537 14. 00000000fed40000-00000000fed6ffff: RESERVED
2439 18:49:36.431262 15. 00000000fed80000-00000000fed87fff: RESERVED
2440 18:49:36.437430 16. 00000000fed90000-00000000fed92fff: RESERVED
2441 18:49:36.440505 17. 00000000feda0000-00000000feda1fff: RESERVED
2442 18:49:36.447233 18. 00000000fedc0000-00000000feddffff: RESERVED
2443 18:49:36.450540 19. 0000000100000000-000000027fbfffff: RAM
2444 18:49:36.454173 Passing 4 GPIOs to payload:
2445 18:49:36.457093 NAME | PORT | POLARITY | VALUE
2446 18:49:36.464156 lid | undefined | high | high
2447 18:49:36.470452 power | undefined | high | low
2448 18:49:36.474134 oprom | undefined | high | low
2449 18:49:36.480309 EC in RW | 0x00000151 | high | high
2450 18:49:36.480822 Board ID: 3
2451 18:49:36.484040 FW config: 0x131
2452 18:49:36.490874 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 73b7
2453 18:49:36.491339 coreboot table: 1788 bytes.
2454 18:49:36.496853 IMD ROOT 0. 0x76fff000 0x00001000
2455 18:49:36.500356 IMD SMALL 1. 0x76ffe000 0x00001000
2456 18:49:36.503586 FSP MEMORY 2. 0x76afe000 0x00500000
2457 18:49:36.506818 CONSOLE 3. 0x76ade000 0x00020000
2458 18:49:36.510818 RW MCACHE 4. 0x76add000 0x0000043c
2459 18:49:36.513621 RO MCACHE 5. 0x76adc000 0x00000fd8
2460 18:49:36.517084 FMAP 6. 0x76adb000 0x0000064a
2461 18:49:36.520132 TIME STAMP 7. 0x76ada000 0x00000910
2462 18:49:36.526817 VBOOT WORK 8. 0x76ac6000 0x00014000
2463 18:49:36.530116 MEM INFO 9. 0x76ac5000 0x000003b8
2464 18:49:36.533483 ROMSTG STCK10. 0x76ac4000 0x00001000
2465 18:49:36.536737 AFTER CAR 11. 0x76ab8000 0x0000c000
2466 18:49:36.540777 RAMSTAGE 12. 0x76a2e000 0x0008a000
2467 18:49:36.543777 ACPI BERT 13. 0x76a1e000 0x00010000
2468 18:49:36.546601 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2469 18:49:36.550571 REFCODE 15. 0x769ae000 0x0006f000
2470 18:49:36.556846 SMM BACKUP 16. 0x7699e000 0x00010000
2471 18:49:36.560122 IGD OPREGION17. 0x76999000 0x00004203
2472 18:49:36.563385 RAMOOPS 18. 0x76899000 0x00100000
2473 18:49:36.566709 COREBOOT 19. 0x76891000 0x00008000
2474 18:49:36.569802 ACPI 20. 0x7686d000 0x00024000
2475 18:49:36.573395 TPM2 TCGLOG21. 0x7685d000 0x00010000
2476 18:49:36.576619 PMC CRASHLOG22. 0x7685c000 0x00000c00
2477 18:49:36.583616 CPU CRASHLOG23. 0x76858000 0x00003480
2478 18:49:36.586285 SMBIOS 24. 0x76857000 0x00001000
2479 18:49:36.586802 IMD small region:
2480 18:49:36.589554 IMD ROOT 0. 0x76ffec00 0x00000400
2481 18:49:36.596281 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2482 18:49:36.599656 VPD 2. 0x76ffeb80 0x0000004c
2483 18:49:36.603132 POWER STATE 3. 0x76ffeb20 0x00000044
2484 18:49:36.606668 ROMSTAGE 4. 0x76ffeb00 0x00000004
2485 18:49:36.610141 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2486 18:49:36.616177 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2487 18:49:36.619454 BS: BS_WRITE_TABLES run times (exec / console): 8 / 628 ms
2488 18:49:36.622934 MTRR: Physical address space:
2489 18:49:36.629508 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2490 18:49:36.635959 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2491 18:49:36.642711 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2492 18:49:36.649381 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2493 18:49:36.656317 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2494 18:49:36.662637 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2495 18:49:36.666276 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2496 18:49:36.672396 MTRR: Fixed MSR 0x250 0x0606060606060606
2497 18:49:36.675959 MTRR: Fixed MSR 0x258 0x0606060606060606
2498 18:49:36.679282 MTRR: Fixed MSR 0x259 0x0000000000000000
2499 18:49:36.682602 MTRR: Fixed MSR 0x268 0x0606060606060606
2500 18:49:36.689513 MTRR: Fixed MSR 0x269 0x0606060606060606
2501 18:49:36.692596 MTRR: Fixed MSR 0x26a 0x0606060606060606
2502 18:49:36.695896 MTRR: Fixed MSR 0x26b 0x0606060606060606
2503 18:49:36.699424 MTRR: Fixed MSR 0x26c 0x0606060606060606
2504 18:49:36.705686 MTRR: Fixed MSR 0x26d 0x0606060606060606
2505 18:49:36.709237 MTRR: Fixed MSR 0x26e 0x0606060606060606
2506 18:49:36.712242 MTRR: Fixed MSR 0x26f 0x0606060606060606
2507 18:49:36.716052 call enable_fixed_mtrr()
2508 18:49:36.719322 CPU physical address size: 39 bits
2509 18:49:36.726067 MTRR: default type WB/UC MTRR counts: 6/6.
2510 18:49:36.729352 MTRR: UC selected as default type.
2511 18:49:36.735979 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2512 18:49:36.739631 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2513 18:49:36.745731 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2514 18:49:36.752935 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2515 18:49:36.759026 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2516 18:49:36.765792 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2517 18:49:36.772037 MTRR: Fixed MSR 0x250 0x0606060606060606
2518 18:49:36.775516 MTRR: Fixed MSR 0x258 0x0606060606060606
2519 18:49:36.778877 MTRR: Fixed MSR 0x259 0x0000000000000000
2520 18:49:36.782068 MTRR: Fixed MSR 0x268 0x0606060606060606
2521 18:49:36.788746 MTRR: Fixed MSR 0x269 0x0606060606060606
2522 18:49:36.792483 MTRR: Fixed MSR 0x26a 0x0606060606060606
2523 18:49:36.795523 MTRR: Fixed MSR 0x26b 0x0606060606060606
2524 18:49:36.798706 MTRR: Fixed MSR 0x26c 0x0606060606060606
2525 18:49:36.805540 MTRR: Fixed MSR 0x26d 0x0606060606060606
2526 18:49:36.808894 MTRR: Fixed MSR 0x26e 0x0606060606060606
2527 18:49:36.812600 MTRR: Fixed MSR 0x26f 0x0606060606060606
2528 18:49:36.815189 MTRR: Fixed MSR 0x250 0x0606060606060606
2529 18:49:36.822254 MTRR: Fixed MSR 0x250 0x0606060606060606
2530 18:49:36.824915 MTRR: Fixed MSR 0x258 0x0606060606060606
2531 18:49:36.828819 MTRR: Fixed MSR 0x259 0x0000000000000000
2532 18:49:36.831981 MTRR: Fixed MSR 0x268 0x0606060606060606
2533 18:49:36.835211 MTRR: Fixed MSR 0x269 0x0606060606060606
2534 18:49:36.841441 MTRR: Fixed MSR 0x26a 0x0606060606060606
2535 18:49:36.845291 MTRR: Fixed MSR 0x26b 0x0606060606060606
2536 18:49:36.848246 MTRR: Fixed MSR 0x26c 0x0606060606060606
2537 18:49:36.852335 MTRR: Fixed MSR 0x26d 0x0606060606060606
2538 18:49:36.858453 MTRR: Fixed MSR 0x26e 0x0606060606060606
2539 18:49:36.861322 MTRR: Fixed MSR 0x26f 0x0606060606060606
2540 18:49:36.864847 MTRR: Fixed MSR 0x250 0x0606060606060606
2541 18:49:36.867944 call enable_fixed_mtrr()
2542 18:49:36.871407 MTRR: Fixed MSR 0x258 0x0606060606060606
2543 18:49:36.874353 MTRR: Fixed MSR 0x259 0x0000000000000000
2544 18:49:36.881604 MTRR: Fixed MSR 0x268 0x0606060606060606
2545 18:49:36.885100 MTRR: Fixed MSR 0x269 0x0606060606060606
2546 18:49:36.888282 call enable_fixed_mtrr()
2547 18:49:36.891373 MTRR: Fixed MSR 0x258 0x0606060606060606
2548 18:49:36.894940 MTRR: Fixed MSR 0x250 0x0606060606060606
2549 18:49:36.897913 CPU physical address size: 39 bits
2550 18:49:36.901768 MTRR: Fixed MSR 0x259 0x0000000000000000
2551 18:49:36.908007 MTRR: Fixed MSR 0x26a 0x0606060606060606
2552 18:49:36.911134 CPU physical address size: 39 bits
2553 18:49:36.914441 MTRR: Fixed MSR 0x26b 0x0606060606060606
2554 18:49:36.917865 MTRR: Fixed MSR 0x258 0x0606060606060606
2555 18:49:36.921027 MTRR: Fixed MSR 0x259 0x0000000000000000
2556 18:49:36.927525 MTRR: Fixed MSR 0x268 0x0606060606060606
2557 18:49:36.931011 MTRR: Fixed MSR 0x269 0x0606060606060606
2558 18:49:36.934948 MTRR: Fixed MSR 0x26a 0x0606060606060606
2559 18:49:36.938050 MTRR: Fixed MSR 0x26b 0x0606060606060606
2560 18:49:36.944470 MTRR: Fixed MSR 0x26c 0x0606060606060606
2561 18:49:36.947526 MTRR: Fixed MSR 0x26d 0x0606060606060606
2562 18:49:36.950619 MTRR: Fixed MSR 0x26e 0x0606060606060606
2563 18:49:36.954691 MTRR: Fixed MSR 0x26f 0x0606060606060606
2564 18:49:36.957496 MTRR: Fixed MSR 0x250 0x0606060606060606
2565 18:49:36.964451 MTRR: Fixed MSR 0x268 0x0606060606060606
2566 18:49:36.964689 call enable_fixed_mtrr()
2567 18:49:36.971367 MTRR: Fixed MSR 0x26c 0x0606060606060606
2568 18:49:36.974284 CPU physical address size: 39 bits
2569 18:49:36.977798 MTRR: Fixed MSR 0x269 0x0606060606060606
2570 18:49:36.980930 MTRR: Fixed MSR 0x26d 0x0606060606060606
2571 18:49:36.984087 MTRR: Fixed MSR 0x26a 0x0606060606060606
2572 18:49:36.990791 MTRR: Fixed MSR 0x26b 0x0606060606060606
2573 18:49:36.994447 MTRR: Fixed MSR 0x26c 0x0606060606060606
2574 18:49:36.997968 MTRR: Fixed MSR 0x26d 0x0606060606060606
2575 18:49:37.000978 MTRR: Fixed MSR 0x26e 0x0606060606060606
2576 18:49:37.007209 MTRR: Fixed MSR 0x26f 0x0606060606060606
2577 18:49:37.011171 MTRR: Fixed MSR 0x26e 0x0606060606060606
2578 18:49:37.014139 call enable_fixed_mtrr()
2579 18:49:37.017473 MTRR: Fixed MSR 0x26f 0x0606060606060606
2580 18:49:37.020680 CPU physical address size: 39 bits
2581 18:49:37.023886 call enable_fixed_mtrr()
2582 18:49:37.027373 MTRR: Fixed MSR 0x250 0x0606060606060606
2583 18:49:37.031285 CPU physical address size: 39 bits
2584 18:49:37.033775 MTRR: Fixed MSR 0x258 0x0606060606060606
2585 18:49:37.037412 MTRR: Fixed MSR 0x258 0x0606060606060606
2586 18:49:37.043904 MTRR: Fixed MSR 0x259 0x0000000000000000
2587 18:49:37.046977 MTRR: Fixed MSR 0x268 0x0606060606060606
2588 18:49:37.050758 MTRR: Fixed MSR 0x269 0x0606060606060606
2589 18:49:37.053944 MTRR: Fixed MSR 0x259 0x0000000000000000
2590 18:49:37.060300 MTRR: Fixed MSR 0x268 0x0606060606060606
2591 18:49:37.063665 MTRR: Fixed MSR 0x269 0x0606060606060606
2592 18:49:37.067279 MTRR: Fixed MSR 0x26a 0x0606060606060606
2593 18:49:37.070432 MTRR: Fixed MSR 0x26b 0x0606060606060606
2594 18:49:37.077582 MTRR: Fixed MSR 0x26c 0x0606060606060606
2595 18:49:37.080415 MTRR: Fixed MSR 0x26d 0x0606060606060606
2596 18:49:37.083713 MTRR: Fixed MSR 0x26e 0x0606060606060606
2597 18:49:37.086913 MTRR: Fixed MSR 0x26f 0x0606060606060606
2598 18:49:37.093447 MTRR: Fixed MSR 0x26a 0x0606060606060606
2599 18:49:37.093913 call enable_fixed_mtrr()
2600 18:49:37.100543 MTRR: Fixed MSR 0x26b 0x0606060606060606
2601 18:49:37.103802 MTRR: Fixed MSR 0x26c 0x0606060606060606
2602 18:49:37.106910 MTRR: Fixed MSR 0x26d 0x0606060606060606
2603 18:49:37.110444 MTRR: Fixed MSR 0x26e 0x0606060606060606
2604 18:49:37.113874 MTRR: Fixed MSR 0x26f 0x0606060606060606
2605 18:49:37.120239 CPU physical address size: 39 bits
2606 18:49:37.120718 call enable_fixed_mtrr()
2607 18:49:37.123634 CPU physical address size: 39 bits
2608 18:49:37.127793
2609 18:49:37.128292 MTRR check
2610 18:49:37.131133 Fixed MTRRs : Enabled
2611 18:49:37.131722 Variable MTRRs: Enabled
2612 18:49:37.132080
2613 18:49:37.137764 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2614 18:49:37.140964 Checking cr50 for pending updates
2615 18:49:37.153536 Reading cr50 TPM mode
2616 18:49:37.168833 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2617 18:49:37.179149 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2618 18:49:37.181913 Checking segment from ROM address 0xf96cbe6c
2619 18:49:37.185476 Checking segment from ROM address 0xf96cbe88
2620 18:49:37.192200 Loading segment from ROM address 0xf96cbe6c
2621 18:49:37.192665 code (compression=1)
2622 18:49:37.201798 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2623 18:49:37.212150 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2624 18:49:37.212617 using LZMA
2625 18:49:37.234039 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2626 18:49:37.240396 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2627 18:49:37.248526 Loading segment from ROM address 0xf96cbe88
2628 18:49:37.252140 Entry Point 0x30000000
2629 18:49:37.252599 Loaded segments
2630 18:49:37.258826 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2631 18:49:37.265561 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2632 18:49:37.268841 Finalizing chipset.
2633 18:49:37.271851 apm_control: Finalizing SMM.
2634 18:49:37.272408 APMC done.
2635 18:49:37.274941 HECI: CSE device 16.1 is disabled
2636 18:49:37.278554 HECI: CSE device 16.2 is disabled
2637 18:49:37.282378 HECI: CSE device 16.3 is disabled
2638 18:49:37.285199 HECI: CSE device 16.4 is disabled
2639 18:49:37.288395 HECI: CSE device 16.5 is disabled
2640 18:49:37.291599 HECI: Sending End-of-Post
2641 18:49:37.300173 CSE: EOP requested action: continue boot
2642 18:49:37.303707 CSE EOP successful, continuing boot
2643 18:49:37.310577 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2644 18:49:37.313328 mp_park_aps done after 0 msecs.
2645 18:49:37.317058 Jumping to boot code at 0x30000000(0x76891000)
2646 18:49:37.326876 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2647 18:49:37.331389
2648 18:49:37.331883
2649 18:49:37.332293
2650 18:49:37.334134 Starting depthcharge on Volmar...
2651 18:49:37.334602
2652 18:49:37.336425 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2653 18:49:37.337004 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2654 18:49:37.337483 Setting prompt string to ['brya:']
2655 18:49:37.337972 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2656 18:49:37.340801 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2657 18:49:37.341272
2658 18:49:37.347981 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2659 18:49:37.348475
2660 18:49:37.353890 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2661 18:49:37.354427
2662 18:49:37.357589 configure_storage: Failed to remap 1C:2
2663 18:49:37.358330
2664 18:49:37.361067 Wipe memory regions:
2665 18:49:37.361568
2666 18:49:37.363835 [0x00000000001000, 0x000000000a0000)
2667 18:49:37.364343
2668 18:49:37.367667 [0x00000000100000, 0x00000030000000)
2669 18:49:37.474900
2670 18:49:37.478254 [0x00000032668e60, 0x00000076857000)
2671 18:49:37.625564
2672 18:49:37.629060 [0x00000100000000, 0x0000027fc00000)
2673 18:49:38.457681
2674 18:49:38.461387 ec_init: CrosEC protocol v3 supported (256, 256)
2675 18:49:39.071317
2676 18:49:39.071877 R8152: Initializing
2677 18:49:39.072356
2678 18:49:39.074363 Version 6 (ocp_data = 5c30)
2679 18:49:39.074902
2680 18:49:39.077692 R8152: Done initializing
2681 18:49:39.078211
2682 18:49:39.081315 Adding net device
2683 18:49:39.383269
2684 18:49:39.386545 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2685 18:49:39.387010
2686 18:49:39.387368
2687 18:49:39.387702
2688 18:49:39.388570 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2690 18:49:39.489870 brya: tftpboot 192.168.201.1 12909594/tftp-deploy-lfs99dwd/kernel/bzImage 12909594/tftp-deploy-lfs99dwd/kernel/cmdline 12909594/tftp-deploy-lfs99dwd/ramdisk/ramdisk.cpio.gz
2691 18:49:39.490583 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2692 18:49:39.491214 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2693 18:49:39.495491 tftpboot 192.168.201.1 12909594/tftp-deploy-lfs99dwd/kernel/bzImploy-lfs99dwd/kernel/cmdline 12909594/tftp-deploy-lfs99dwd/ramdisk/ramdisk.cpio.gz
2694 18:49:39.495963
2695 18:49:39.496331 Waiting for link
2696 18:49:39.697944
2697 18:49:39.698494 done.
2698 18:49:39.698861
2699 18:49:39.699259 MAC: 00:13:3b:00:0f:d5
2700 18:49:39.699609
2701 18:49:39.701673 Sending DHCP discover... done.
2702 18:49:39.702165
2703 18:49:39.704312 Waiting for reply... done.
2704 18:49:39.704804
2705 18:49:39.709282 Sending DHCP request... done.
2706 18:49:39.709754
2707 18:49:39.715101 Waiting for reply... done.
2708 18:49:39.715684
2709 18:49:39.716063 My ip is 192.168.201.23
2710 18:49:39.716404
2711 18:49:39.719013 The DHCP server ip is 192.168.201.1
2712 18:49:39.722605
2713 18:49:39.724868 TFTP server IP predefined by user: 192.168.201.1
2714 18:49:39.725484
2715 18:49:39.731488 Bootfile predefined by user: 12909594/tftp-deploy-lfs99dwd/kernel/bzImage
2716 18:49:39.732026
2717 18:49:39.734974 Sending tftp read request... done.
2718 18:49:39.735526
2719 18:49:39.744037 Waiting for the transfer...
2720 18:49:39.744699
2721 18:49:40.429787 00000000 ################################################################
2722 18:49:40.430419
2723 18:49:41.110144 00080000 ################################################################
2724 18:49:41.110677
2725 18:49:41.692494 00100000 ################################################################
2726 18:49:41.692679
2727 18:49:42.216345 00180000 ################################################################
2728 18:49:42.216510
2729 18:49:42.751586 00200000 ################################################################
2730 18:49:42.751738
2731 18:49:43.298351 00280000 ################################################################
2732 18:49:43.298485
2733 18:49:43.839572 00300000 ################################################################
2734 18:49:43.839709
2735 18:49:44.395757 00380000 ################################################################
2736 18:49:44.395894
2737 18:49:44.934663 00400000 ################################################################
2738 18:49:44.934821
2739 18:49:45.472806 00480000 ################################################################
2740 18:49:45.472945
2741 18:49:46.007789 00500000 ################################################################
2742 18:49:46.007929
2743 18:49:46.540139 00580000 ################################################################
2744 18:49:46.540281
2745 18:49:47.067426 00600000 ################################################################
2746 18:49:47.067568
2747 18:49:47.595346 00680000 ################################################################
2748 18:49:47.595494
2749 18:49:48.183506 00700000 ################################################################
2750 18:49:48.184134
2751 18:49:48.835647 00780000 ################################################################
2752 18:49:48.836311
2753 18:49:49.469480 00800000 ################################################################
2754 18:49:49.469626
2755 18:49:50.032354 00880000 ################################################################
2756 18:49:50.032507
2757 18:49:50.587438 00900000 ################################################################
2758 18:49:50.587591
2759 18:49:51.149064 00980000 ################################################################
2760 18:49:51.149203
2761 18:49:51.780963 00a00000 ################################################################
2762 18:49:51.781114
2763 18:49:52.407122 00a80000 ################################################################
2764 18:49:52.407269
2765 18:49:53.034532 00b00000 ################################################################
2766 18:49:53.034682
2767 18:49:53.376252 00b80000 #################################### done.
2768 18:49:53.376401
2769 18:49:53.379651 The bootfile was 12349440 bytes long.
2770 18:49:53.379736
2771 18:49:53.382333 Sending tftp read request... done.
2772 18:49:53.382417
2773 18:49:53.385750 Waiting for the transfer...
2774 18:49:53.385832
2775 18:49:54.023488 00000000 ################################################################
2776 18:49:54.024041
2777 18:49:54.674859 00080000 ################################################################
2778 18:49:54.675413
2779 18:49:55.346163 00100000 ################################################################
2780 18:49:55.346776
2781 18:49:55.968034 00180000 ################################################################
2782 18:49:55.968183
2783 18:49:56.557602 00200000 ################################################################
2784 18:49:56.557750
2785 18:49:57.173098 00280000 ################################################################
2786 18:49:57.173246
2787 18:49:57.793840 00300000 ################################################################
2788 18:49:57.793992
2789 18:49:58.459571 00380000 ################################################################
2790 18:49:58.460124
2791 18:49:59.130962 00400000 ################################################################
2792 18:49:59.131572
2793 18:49:59.826459 00480000 ################################################################
2794 18:49:59.826612
2795 18:50:00.496860 00500000 ################################################################
2796 18:50:00.497014
2797 18:50:00.960635 00580000 ################################################ done.
2798 18:50:00.960785
2799 18:50:00.964047 Sending tftp read request... done.
2800 18:50:00.964131
2801 18:50:00.967324 Waiting for the transfer...
2802 18:50:00.967407
2803 18:50:00.967472 00000000 # done.
2804 18:50:00.967550
2805 18:50:00.977158 Command line loaded dynamically from TFTP file: 12909594/tftp-deploy-lfs99dwd/kernel/cmdline
2806 18:50:00.977245
2807 18:50:01.000295 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12909594/extract-nfsrootfs-82cz2ayl,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2808 18:50:01.007409
2809 18:50:01.010974 Shutting down all USB controllers.
2810 18:50:01.011057
2811 18:50:01.011137 Removing current net device
2812 18:50:01.011211
2813 18:50:01.014277 Finalizing coreboot
2814 18:50:01.014359
2815 18:50:01.020571 Exiting depthcharge with code 4 at timestamp: 33931281
2816 18:50:01.020654
2817 18:50:01.020719
2818 18:50:01.020778 Starting kernel ...
2819 18:50:01.020836
2820 18:50:01.020892
2821 18:50:01.021258 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
2822 18:50:01.021357 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2823 18:50:01.021434 Setting prompt string to ['Linux version [0-9]']
2824 18:50:01.021503 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2825 18:50:01.021571 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2827 18:54:18.022471 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2829 18:54:18.023558 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2831 18:54:18.024404 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2834 18:54:18.025839 end: 2 depthcharge-action (duration 00:05:00) [common]
2836 18:54:18.027103 Cleaning after the job
2837 18:54:18.027566 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909594/tftp-deploy-lfs99dwd/ramdisk
2838 18:54:18.031706 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909594/tftp-deploy-lfs99dwd/kernel
2839 18:54:18.038830 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909594/tftp-deploy-lfs99dwd/nfsrootfs
2840 18:54:18.123132 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909594/tftp-deploy-lfs99dwd/modules
2841 18:54:18.123809 start: 5.1 power-off (timeout 00:00:30) [common]
2842 18:54:18.123990 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-11' '--port=1' '--command=off'
2843 18:54:18.193414 >> Command sent successfully.
2844 18:54:18.195929 Returned 0 in 0 seconds
2845 18:54:18.296816 end: 5.1 power-off (duration 00:00:00) [common]
2847 18:54:18.298405 start: 5.2 read-feedback (timeout 00:10:00) [common]
2848 18:54:18.299745 Listened to connection for namespace 'common' for up to 1s
2850 18:54:18.301350 Listened to connection for namespace 'common' for up to 1s
2851 18:54:19.300425 Finalising connection for namespace 'common'
2852 18:54:19.301110 Disconnecting from shell: Finalise
2853 18:54:19.301541
2854 18:54:19.402557 end: 5.2 read-feedback (duration 00:00:01) [common]
2855 18:54:19.403168 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12909594
2856 18:54:19.704421 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12909594
2857 18:54:19.704617 JobError: Your job cannot terminate cleanly.