Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 18:48:49.583652 lava-dispatcher, installed at version: 2024.01
2 18:48:49.583855 start: 0 validate
3 18:48:49.583984 Start time: 2024-03-01 18:48:49.583974+00:00 (UTC)
4 18:48:49.584106 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:48:49.584230 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 18:48:49.854440 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:48:49.855176 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:48:50.119224 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:48:50.119965 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 18:48:53.920809 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:48:53.921567 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 18:48:54.189374 validate duration: 4.61
14 18:48:54.189659 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:48:54.189753 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:48:54.189835 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:48:54.189959 Not decompressing ramdisk as can be used compressed.
18 18:48:54.190042 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/initrd.cpio.gz
19 18:48:54.190104 saving as /var/lib/lava/dispatcher/tmp/12909559/tftp-deploy-7p62gn9j/ramdisk/initrd.cpio.gz
20 18:48:54.190166 total size: 5431448 (5 MB)
21 18:48:54.831945 progress 0 % (0 MB)
22 18:48:54.836635 progress 5 % (0 MB)
23 18:48:54.838133 progress 10 % (0 MB)
24 18:48:54.839616 progress 15 % (0 MB)
25 18:48:54.841265 progress 20 % (1 MB)
26 18:48:54.842679 progress 25 % (1 MB)
27 18:48:54.844068 progress 30 % (1 MB)
28 18:48:54.845681 progress 35 % (1 MB)
29 18:48:54.847114 progress 40 % (2 MB)
30 18:48:54.848554 progress 45 % (2 MB)
31 18:48:54.849980 progress 50 % (2 MB)
32 18:48:54.851599 progress 55 % (2 MB)
33 18:48:54.853026 progress 60 % (3 MB)
34 18:48:54.854392 progress 65 % (3 MB)
35 18:48:54.855927 progress 70 % (3 MB)
36 18:48:54.857347 progress 75 % (3 MB)
37 18:48:54.858752 progress 80 % (4 MB)
38 18:48:54.860262 progress 85 % (4 MB)
39 18:48:54.861788 progress 90 % (4 MB)
40 18:48:54.863169 progress 95 % (4 MB)
41 18:48:54.864614 progress 100 % (5 MB)
42 18:48:54.864824 5 MB downloaded in 0.67 s (7.68 MB/s)
43 18:48:54.864969 end: 1.1.1 http-download (duration 00:00:01) [common]
45 18:48:54.865208 end: 1.1 download-retry (duration 00:00:01) [common]
46 18:48:54.865291 start: 1.2 download-retry (timeout 00:09:59) [common]
47 18:48:54.865373 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 18:48:54.865509 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 18:48:54.865575 saving as /var/lib/lava/dispatcher/tmp/12909559/tftp-deploy-7p62gn9j/kernel/bzImage
50 18:48:54.865634 total size: 12349440 (11 MB)
51 18:48:54.865692 No compression specified
52 18:48:54.866805 progress 0 % (0 MB)
53 18:48:54.869974 progress 5 % (0 MB)
54 18:48:54.873433 progress 10 % (1 MB)
55 18:48:54.876806 progress 15 % (1 MB)
56 18:48:54.880226 progress 20 % (2 MB)
57 18:48:54.883429 progress 25 % (2 MB)
58 18:48:54.886741 progress 30 % (3 MB)
59 18:48:54.890074 progress 35 % (4 MB)
60 18:48:54.893398 progress 40 % (4 MB)
61 18:48:54.896850 progress 45 % (5 MB)
62 18:48:54.900234 progress 50 % (5 MB)
63 18:48:54.903433 progress 55 % (6 MB)
64 18:48:54.906918 progress 60 % (7 MB)
65 18:48:54.910041 progress 65 % (7 MB)
66 18:48:54.913829 progress 70 % (8 MB)
67 18:48:54.917290 progress 75 % (8 MB)
68 18:48:54.920792 progress 80 % (9 MB)
69 18:48:54.924294 progress 85 % (10 MB)
70 18:48:54.927882 progress 90 % (10 MB)
71 18:48:54.931223 progress 95 % (11 MB)
72 18:48:54.934258 progress 100 % (11 MB)
73 18:48:54.934484 11 MB downloaded in 0.07 s (171.07 MB/s)
74 18:48:54.934629 end: 1.2.1 http-download (duration 00:00:00) [common]
76 18:48:54.934861 end: 1.2 download-retry (duration 00:00:00) [common]
77 18:48:54.934946 start: 1.3 download-retry (timeout 00:09:59) [common]
78 18:48:54.935038 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 18:48:54.935375 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/full.rootfs.tar.xz
80 18:48:54.935488 saving as /var/lib/lava/dispatcher/tmp/12909559/tftp-deploy-7p62gn9j/nfsrootfs/full.rootfs.tar
81 18:48:54.935641 total size: 133429172 (127 MB)
82 18:48:54.935733 Using unxz to decompress xz
83 18:48:54.940568 progress 0 % (0 MB)
84 18:48:55.277961 progress 5 % (6 MB)
85 18:48:55.627228 progress 10 % (12 MB)
86 18:48:55.914866 progress 15 % (19 MB)
87 18:48:56.097055 progress 20 % (25 MB)
88 18:48:56.337790 progress 25 % (31 MB)
89 18:48:56.681938 progress 30 % (38 MB)
90 18:48:57.019615 progress 35 % (44 MB)
91 18:48:57.419981 progress 40 % (50 MB)
92 18:48:57.804019 progress 45 % (57 MB)
93 18:48:58.156215 progress 50 % (63 MB)
94 18:48:58.531483 progress 55 % (70 MB)
95 18:48:58.889715 progress 60 % (76 MB)
96 18:48:59.250122 progress 65 % (82 MB)
97 18:48:59.614223 progress 70 % (89 MB)
98 18:48:59.977668 progress 75 % (95 MB)
99 18:49:00.414743 progress 80 % (101 MB)
100 18:49:00.846730 progress 85 % (108 MB)
101 18:49:01.108949 progress 90 % (114 MB)
102 18:49:01.454942 progress 95 % (120 MB)
103 18:49:01.842734 progress 100 % (127 MB)
104 18:49:01.848902 127 MB downloaded in 6.91 s (18.41 MB/s)
105 18:49:01.849171 end: 1.3.1 http-download (duration 00:00:07) [common]
107 18:49:01.849478 end: 1.3 download-retry (duration 00:00:07) [common]
108 18:49:01.849580 start: 1.4 download-retry (timeout 00:09:52) [common]
109 18:49:01.849682 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 18:49:01.849848 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 18:49:01.849950 saving as /var/lib/lava/dispatcher/tmp/12909559/tftp-deploy-7p62gn9j/modules/modules.tar
112 18:49:01.850046 total size: 484604 (0 MB)
113 18:49:01.850147 Using unxz to decompress xz
114 18:49:01.854448 progress 6 % (0 MB)
115 18:49:01.854861 progress 13 % (0 MB)
116 18:49:01.855109 progress 20 % (0 MB)
117 18:49:01.856779 progress 27 % (0 MB)
118 18:49:01.858635 progress 33 % (0 MB)
119 18:49:01.860705 progress 40 % (0 MB)
120 18:49:01.862629 progress 47 % (0 MB)
121 18:49:01.864471 progress 54 % (0 MB)
122 18:49:01.866483 progress 60 % (0 MB)
123 18:49:01.868795 progress 67 % (0 MB)
124 18:49:01.870980 progress 74 % (0 MB)
125 18:49:01.872835 progress 81 % (0 MB)
126 18:49:01.874893 progress 87 % (0 MB)
127 18:49:01.877097 progress 94 % (0 MB)
128 18:49:01.879280 progress 100 % (0 MB)
129 18:49:01.885381 0 MB downloaded in 0.04 s (13.08 MB/s)
130 18:49:01.885632 end: 1.4.1 http-download (duration 00:00:00) [common]
132 18:49:01.885919 end: 1.4 download-retry (duration 00:00:00) [common]
133 18:49:01.886026 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 18:49:01.886139 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 18:49:04.068815 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12909559/extract-nfsrootfs-kdg68mcp
136 18:49:04.069011 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 18:49:04.069111 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 18:49:04.069270 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv
139 18:49:04.069399 makedir: /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin
140 18:49:04.069499 makedir: /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/tests
141 18:49:04.069598 makedir: /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/results
142 18:49:04.069696 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-add-keys
143 18:49:04.069861 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-add-sources
144 18:49:04.070003 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-background-process-start
145 18:49:04.070132 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-background-process-stop
146 18:49:04.070259 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-common-functions
147 18:49:04.070384 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-echo-ipv4
148 18:49:04.070510 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-install-packages
149 18:49:04.070634 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-installed-packages
150 18:49:04.070759 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-os-build
151 18:49:04.070884 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-probe-channel
152 18:49:04.071010 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-probe-ip
153 18:49:04.071136 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-target-ip
154 18:49:04.071262 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-target-mac
155 18:49:04.071386 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-target-storage
156 18:49:04.071512 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-test-case
157 18:49:04.071639 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-test-event
158 18:49:04.071763 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-test-feedback
159 18:49:04.071887 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-test-raise
160 18:49:04.072041 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-test-reference
161 18:49:04.072295 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-test-runner
162 18:49:04.072421 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-test-set
163 18:49:04.072547 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-test-shell
164 18:49:04.072674 Updating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-install-packages (oe)
165 18:49:04.072828 Updating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/bin/lava-installed-packages (oe)
166 18:49:04.072950 Creating /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/environment
167 18:49:04.073045 LAVA metadata
168 18:49:04.073116 - LAVA_JOB_ID=12909559
169 18:49:04.073180 - LAVA_DISPATCHER_IP=192.168.201.1
170 18:49:04.073278 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 18:49:04.073343 skipped lava-vland-overlay
172 18:49:04.073414 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 18:49:04.073490 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 18:49:04.073549 skipped lava-multinode-overlay
175 18:49:04.073618 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 18:49:04.073694 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 18:49:04.073765 Loading test definitions
178 18:49:04.073849 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
179 18:49:04.073920 Using /lava-12909559 at stage 0
180 18:49:04.074228 uuid=12909559_1.5.2.3.1 testdef=None
181 18:49:04.074316 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 18:49:04.074399 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
183 18:49:04.074990 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 18:49:04.075210 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
186 18:49:04.075850 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 18:49:04.076150 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
189 18:49:04.076768 runner path: /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/0/tests/0_dmesg test_uuid 12909559_1.5.2.3.1
190 18:49:04.076926 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 18:49:04.077146 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
193 18:49:04.077215 Using /lava-12909559 at stage 1
194 18:49:04.077505 uuid=12909559_1.5.2.3.5 testdef=None
195 18:49:04.077590 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 18:49:04.077670 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
197 18:49:04.078176 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 18:49:04.078383 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
200 18:49:04.079003 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 18:49:04.079222 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
203 18:49:04.079831 runner path: /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/1/tests/1_bootrr test_uuid 12909559_1.5.2.3.5
204 18:49:04.080018 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 18:49:04.080253 Creating lava-test-runner.conf files
207 18:49:04.080314 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/0 for stage 0
208 18:49:04.080401 - 0_dmesg
209 18:49:04.080479 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12909559/lava-overlay-ksyx2niv/lava-12909559/1 for stage 1
210 18:49:04.080569 - 1_bootrr
211 18:49:04.080662 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 18:49:04.080742 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
213 18:49:04.087872 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 18:49:04.087972 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
215 18:49:04.088102 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 18:49:04.088215 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 18:49:04.088298 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
218 18:49:04.223174 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 18:49:04.223573 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
220 18:49:04.223690 extracting modules file /var/lib/lava/dispatcher/tmp/12909559/tftp-deploy-7p62gn9j/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12909559/extract-nfsrootfs-kdg68mcp
221 18:49:04.244233 extracting modules file /var/lib/lava/dispatcher/tmp/12909559/tftp-deploy-7p62gn9j/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12909559/extract-overlay-ramdisk-vzsy28qr/ramdisk
222 18:49:04.264628 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 18:49:04.264763 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
224 18:49:04.264853 [common] Applying overlay to NFS
225 18:49:04.264928 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12909559/compress-overlay-xiyr9zg7/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12909559/extract-nfsrootfs-kdg68mcp
226 18:49:04.272832 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 18:49:04.272942 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
228 18:49:04.273033 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 18:49:04.273118 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
230 18:49:04.273191 Building ramdisk /var/lib/lava/dispatcher/tmp/12909559/extract-overlay-ramdisk-vzsy28qr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12909559/extract-overlay-ramdisk-vzsy28qr/ramdisk
231 18:49:04.362250 >> 30345 blocks
232 18:49:04.945052 rename /var/lib/lava/dispatcher/tmp/12909559/extract-overlay-ramdisk-vzsy28qr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12909559/tftp-deploy-7p62gn9j/ramdisk/ramdisk.cpio.gz
233 18:49:04.945507 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 18:49:04.945625 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
235 18:49:04.945732 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
236 18:49:04.945828 No mkimage arch provided, not using FIT.
237 18:49:04.945916 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 18:49:04.945999 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 18:49:04.946104 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
240 18:49:04.946194 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
241 18:49:04.946280 No LXC device requested
242 18:49:04.946360 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 18:49:04.946452 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
244 18:49:04.946533 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 18:49:04.946605 Checking files for TFTP limit of 4294967296 bytes.
246 18:49:04.947008 end: 1 tftp-deploy (duration 00:00:11) [common]
247 18:49:04.947110 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 18:49:04.947201 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 18:49:04.947325 substitutions:
250 18:49:04.947390 - {DTB}: None
251 18:49:04.947450 - {INITRD}: 12909559/tftp-deploy-7p62gn9j/ramdisk/ramdisk.cpio.gz
252 18:49:04.947507 - {KERNEL}: 12909559/tftp-deploy-7p62gn9j/kernel/bzImage
253 18:49:04.947563 - {LAVA_MAC}: None
254 18:49:04.947617 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12909559/extract-nfsrootfs-kdg68mcp
255 18:49:04.947674 - {NFS_SERVER_IP}: 192.168.201.1
256 18:49:04.947727 - {PRESEED_CONFIG}: None
257 18:49:04.947780 - {PRESEED_LOCAL}: None
258 18:49:04.947832 - {RAMDISK}: 12909559/tftp-deploy-7p62gn9j/ramdisk/ramdisk.cpio.gz
259 18:49:04.947884 - {ROOT_PART}: None
260 18:49:04.947936 - {ROOT}: None
261 18:49:04.947988 - {SERVER_IP}: 192.168.201.1
262 18:49:04.948040 - {TEE}: None
263 18:49:04.948131 Parsed boot commands:
264 18:49:04.948184 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 18:49:04.948359 Parsed boot commands: tftpboot 192.168.201.1 12909559/tftp-deploy-7p62gn9j/kernel/bzImage 12909559/tftp-deploy-7p62gn9j/kernel/cmdline 12909559/tftp-deploy-7p62gn9j/ramdisk/ramdisk.cpio.gz
266 18:49:04.948445 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 18:49:04.948528 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 18:49:04.948616 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 18:49:04.948704 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 18:49:04.948774 Not connected, no need to disconnect.
271 18:49:04.948846 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 18:49:04.948926 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 18:49:04.948993 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-9'
274 18:49:04.953146 Setting prompt string to ['lava-test: # ']
275 18:49:04.953500 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 18:49:04.953612 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 18:49:04.953709 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 18:49:04.953842 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 18:49:04.954318 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
280 18:49:10.100572 >> Command sent successfully.
281 18:49:10.108441 Returned 0 in 5 seconds
282 18:49:10.209642 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 18:49:10.211781 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 18:49:10.212396 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 18:49:10.212900 Setting prompt string to 'Starting depthcharge on Voema...'
287 18:49:10.213305 Changing prompt to 'Starting depthcharge on Voema...'
288 18:49:10.213679 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
289 18:49:10.215135 [Enter `^Ec?' for help]
290 18:49:11.769791
291 18:49:11.769970
292 18:49:11.779229 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
293 18:49:11.785764 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
294 18:49:11.788967 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
295 18:49:11.792658 CPU: AES supported, TXT NOT supported, VT supported
296 18:49:11.799098 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
297 18:49:11.805766 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
298 18:49:11.808779 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
299 18:49:11.812172 VBOOT: Loading verstage.
300 18:49:11.818966 FMAP: Found "FLASH" version 1.1 at 0x1804000.
301 18:49:11.822587 FMAP: base = 0x0 size = 0x2000000 #areas = 32
302 18:49:11.825765 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 18:49:11.836330 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
304 18:49:11.843059 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
305 18:49:11.843146
306 18:49:11.843213
307 18:49:11.856114 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
308 18:49:11.869679 Probing TPM: . done!
309 18:49:11.872892 TPM ready after 0 ms
310 18:49:11.876729 Connected to device vid:did:rid of 1ae0:0028:00
311 18:49:11.887979 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
312 18:49:11.894519 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
313 18:49:11.897873 Initialized TPM device CR50 revision 0
314 18:49:11.948396 tlcl_send_startup: Startup return code is 0
315 18:49:11.948500 TPM: setup succeeded
316 18:49:11.963941 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
317 18:49:11.979162 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 18:49:11.992555 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
319 18:49:12.002772 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
320 18:49:12.006981 Chrome EC: UHEPI supported
321 18:49:12.010463 Phase 1
322 18:49:12.013356 FMAP: area GBB found @ 1805000 (458752 bytes)
323 18:49:12.023405 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
324 18:49:12.030801 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
325 18:49:12.036725 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
326 18:49:12.043553 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
327 18:49:12.046719 Recovery requested (1009000e)
328 18:49:12.049856 TPM: Extending digest for VBOOT: boot mode into PCR 0
329 18:49:12.061574 tlcl_extend: response is 0
330 18:49:12.068360 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
331 18:49:12.078393 tlcl_extend: response is 0
332 18:49:12.085207 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
333 18:49:12.091572 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
334 18:49:12.097984 BS: verstage times (exec / console): total (unknown) / 142 ms
335 18:49:12.098099
336 18:49:12.098197
337 18:49:12.111142 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
338 18:49:12.117953 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 18:49:12.121250 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 18:49:12.124787 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
341 18:49:12.130832 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
342 18:49:12.134876 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
343 18:49:12.138011 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
344 18:49:12.141144 TCO_STS: 0000 0000
345 18:49:12.144273 GEN_PMCON: d0015038 00002200
346 18:49:12.148059 GBLRST_CAUSE: 00000000 00000000
347 18:49:12.151638 HPR_CAUSE0: 00000000
348 18:49:12.151824 prev_sleep_state 5
349 18:49:12.154534 Boot Count incremented to 27088
350 18:49:12.161265 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 18:49:12.167942 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 18:49:12.177624 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 18:49:12.183995 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
354 18:49:12.187924 Chrome EC: UHEPI supported
355 18:49:12.194254 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
356 18:49:12.206094 Probing TPM: done!
357 18:49:12.213573 Connected to device vid:did:rid of 1ae0:0028:00
358 18:49:12.224184 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
359 18:49:12.231178 Initialized TPM device CR50 revision 0
360 18:49:12.241508 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
361 18:49:12.248171 MRC: Hash idx 0x100b comparison successful.
362 18:49:12.251637 MRC cache found, size faa8
363 18:49:12.252206 bootmode is set to: 2
364 18:49:12.254494 SPD index = 0
365 18:49:12.261367 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
366 18:49:12.264732 SPD: module type is LPDDR4X
367 18:49:12.267976 SPD: module part number is MT53E512M64D4NW-046
368 18:49:12.274464 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
369 18:49:12.277702 SPD: device width 16 bits, bus width 16 bits
370 18:49:12.284607 SPD: module size is 1024 MB (per channel)
371 18:49:12.717031 CBMEM:
372 18:49:12.720201 IMD: root @ 0x76fff000 254 entries.
373 18:49:12.723257 IMD: root @ 0x76ffec00 62 entries.
374 18:49:12.726731 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
375 18:49:12.733050 FMAP: area RW_VPD found @ f35000 (8192 bytes)
376 18:49:12.736982 External stage cache:
377 18:49:12.740150 IMD: root @ 0x7b3ff000 254 entries.
378 18:49:12.743005 IMD: root @ 0x7b3fec00 62 entries.
379 18:49:12.758889 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
380 18:49:12.765007 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
381 18:49:12.771795 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
382 18:49:12.785596 MRC: 'RECOVERY_MRC_CACHE' does not need update.
383 18:49:12.789345 cse_lite: Skip switching to RW in the recovery path
384 18:49:12.793472 8 DIMMs found
385 18:49:12.794032 SMM Memory Map
386 18:49:12.797346 SMRAM : 0x7b000000 0x800000
387 18:49:12.800194 Subregion 0: 0x7b000000 0x200000
388 18:49:12.803486 Subregion 1: 0x7b200000 0x200000
389 18:49:12.806937 Subregion 2: 0x7b400000 0x400000
390 18:49:12.809774 top_of_ram = 0x77000000
391 18:49:12.816765 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
392 18:49:12.820018 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
393 18:49:12.826906 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
394 18:49:12.830022 MTRR Range: Start=ff000000 End=0 (Size 1000000)
395 18:49:12.840488 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
396 18:49:12.846909 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
397 18:49:12.856900 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
398 18:49:12.860211 Processing 211 relocs. Offset value of 0x74c0b000
399 18:49:12.868598 BS: romstage times (exec / console): total (unknown) / 277 ms
400 18:49:12.874506
401 18:49:12.875029
402 18:49:12.884655 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
403 18:49:12.888410 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
404 18:49:12.897630 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
405 18:49:12.904782 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
406 18:49:12.910923 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
407 18:49:12.917633 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
408 18:49:12.964174 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
409 18:49:12.971246 Processing 5008 relocs. Offset value of 0x75d98000
410 18:49:12.975060 BS: postcar times (exec / console): total (unknown) / 59 ms
411 18:49:12.977951
412 18:49:12.978377
413 18:49:12.987981 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
414 18:49:12.988554 Normal boot
415 18:49:12.991808 FW_CONFIG value is 0x804c02
416 18:49:12.994736 PCI: 00:07.0 disabled by fw_config
417 18:49:12.997764 PCI: 00:07.1 disabled by fw_config
418 18:49:13.001152 PCI: 00:0d.2 disabled by fw_config
419 18:49:13.004511 PCI: 00:1c.7 disabled by fw_config
420 18:49:13.010977 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 18:49:13.017916 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 18:49:13.020903 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
423 18:49:13.024671 GENERIC: 0.0 disabled by fw_config
424 18:49:13.031310 GENERIC: 1.0 disabled by fw_config
425 18:49:13.034749 fw_config match found: DB_USB=USB3_ACTIVE
426 18:49:13.037742 fw_config match found: DB_USB=USB3_ACTIVE
427 18:49:13.040937 fw_config match found: DB_USB=USB3_ACTIVE
428 18:49:13.047677 fw_config match found: DB_USB=USB3_ACTIVE
429 18:49:13.050936 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
430 18:49:13.057866 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 18:49:13.067381 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 18:49:13.074476 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
433 18:49:13.077196 microcode: sig=0x806c1 pf=0x80 revision=0x86
434 18:49:13.083892 microcode: Update skipped, already up-to-date
435 18:49:13.090880 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
436 18:49:13.118186 Detected 4 core, 8 thread CPU.
437 18:49:13.122117 Setting up SMI for CPU
438 18:49:13.125112 IED base = 0x7b400000
439 18:49:13.125650 IED size = 0x00400000
440 18:49:13.128250 Will perform SMM setup.
441 18:49:13.135179 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
442 18:49:13.141297 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
443 18:49:13.148293 Processing 16 relocs. Offset value of 0x00030000
444 18:49:13.151572 Attempting to start 7 APs
445 18:49:13.154727 Waiting for 10ms after sending INIT.
446 18:49:13.170277 Waiting for 1st SIPI to complete...done.
447 18:49:13.170811 AP: slot 7 apic_id 4.
448 18:49:13.173522 AP: slot 2 apic_id 3.
449 18:49:13.177373 AP: slot 6 apic_id 2.
450 18:49:13.177900 AP: slot 1 apic_id 1.
451 18:49:13.183576 Waiting for 2nd SIPI to complete...done.
452 18:49:13.184148 AP: slot 3 apic_id 5.
453 18:49:13.187064 AP: slot 4 apic_id 7.
454 18:49:13.189769 AP: slot 5 apic_id 6.
455 18:49:13.196578 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
456 18:49:13.203536 Processing 13 relocs. Offset value of 0x00038000
457 18:49:13.206883 Unable to locate Global NVS
458 18:49:13.213404 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
459 18:49:13.216777 Installing permanent SMM handler to 0x7b000000
460 18:49:13.226616 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
461 18:49:13.230287 Processing 794 relocs. Offset value of 0x7b010000
462 18:49:13.240224 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
463 18:49:13.242893 Processing 13 relocs. Offset value of 0x7b008000
464 18:49:13.249797 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
465 18:49:13.256999 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
466 18:49:13.260197 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
467 18:49:13.266465 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
468 18:49:13.273031 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
469 18:49:13.279536 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
470 18:49:13.286210 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
471 18:49:13.286643 Unable to locate Global NVS
472 18:49:13.296452 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
473 18:49:13.299483 Clearing SMI status registers
474 18:49:13.299913 SMI_STS: PM1
475 18:49:13.302563 PM1_STS: PWRBTN
476 18:49:13.309974 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
477 18:49:13.312985 In relocation handler: CPU 0
478 18:49:13.315849 New SMBASE=0x7b000000 IEDBASE=0x7b400000
479 18:49:13.323019 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 18:49:13.323558 Relocation complete.
481 18:49:13.332425 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
482 18:49:13.336346 In relocation handler: CPU 1
483 18:49:13.339359 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
484 18:49:13.339901 Relocation complete.
485 18:49:13.349077 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
486 18:49:13.349512 In relocation handler: CPU 5
487 18:49:13.355963 New SMBASE=0x7affec00 IEDBASE=0x7b400000
488 18:49:13.358962 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 18:49:13.362201 Relocation complete.
490 18:49:13.368974 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
491 18:49:13.372688 In relocation handler: CPU 4
492 18:49:13.375667 New SMBASE=0x7afff000 IEDBASE=0x7b400000
493 18:49:13.379374 Relocation complete.
494 18:49:13.385984 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
495 18:49:13.388755 In relocation handler: CPU 3
496 18:49:13.391839 New SMBASE=0x7afff400 IEDBASE=0x7b400000
497 18:49:13.395675 Relocation complete.
498 18:49:13.402079 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
499 18:49:13.405940 In relocation handler: CPU 7
500 18:49:13.408984 New SMBASE=0x7affe400 IEDBASE=0x7b400000
501 18:49:13.415382 Writing SMRR. base = 0x7b000006, mask=0xff800c00
502 18:49:13.415812 Relocation complete.
503 18:49:13.422514 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
504 18:49:13.425295 In relocation handler: CPU 6
505 18:49:13.431931 New SMBASE=0x7affe800 IEDBASE=0x7b400000
506 18:49:13.435324 Writing SMRR. base = 0x7b000006, mask=0xff800c00
507 18:49:13.438819 Relocation complete.
508 18:49:13.445151 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
509 18:49:13.448748 In relocation handler: CPU 2
510 18:49:13.451565 New SMBASE=0x7afff800 IEDBASE=0x7b400000
511 18:49:13.456962 Relocation complete.
512 18:49:13.457493 Initializing CPU #0
513 18:49:13.459956 CPU: vendor Intel device 806c1
514 18:49:13.463260 CPU: family 06, model 8c, stepping 01
515 18:49:13.466216 Clearing out pending MCEs
516 18:49:13.469500 Setting up local APIC...
517 18:49:13.469924 apic_id: 0x00 done.
518 18:49:13.473221 Turbo is available but hidden
519 18:49:13.476793 Turbo is available and visible
520 18:49:13.483238 microcode: Update skipped, already up-to-date
521 18:49:13.483761 CPU #0 initialized
522 18:49:13.486290 Initializing CPU #1
523 18:49:13.486823 Initializing CPU #7
524 18:49:13.489967 Initializing CPU #3
525 18:49:13.493303 CPU: vendor Intel device 806c1
526 18:49:13.496961 CPU: family 06, model 8c, stepping 01
527 18:49:13.499899 CPU: vendor Intel device 806c1
528 18:49:13.502964 CPU: family 06, model 8c, stepping 01
529 18:49:13.506203 Clearing out pending MCEs
530 18:49:13.509751 Clearing out pending MCEs
531 18:49:13.512766 Setting up local APIC...
532 18:49:13.513194 Initializing CPU #6
533 18:49:13.516682 Initializing CPU #2
534 18:49:13.519955 CPU: vendor Intel device 806c1
535 18:49:13.523591 CPU: family 06, model 8c, stepping 01
536 18:49:13.527007 CPU: vendor Intel device 806c1
537 18:49:13.530072 CPU: family 06, model 8c, stepping 01
538 18:49:13.532915 Clearing out pending MCEs
539 18:49:13.536147 Clearing out pending MCEs
540 18:49:13.536574 Setting up local APIC...
541 18:49:13.539827 Initializing CPU #4
542 18:49:13.542931 Initializing CPU #5
543 18:49:13.545977 CPU: vendor Intel device 806c1
544 18:49:13.549459 CPU: family 06, model 8c, stepping 01
545 18:49:13.552840 CPU: vendor Intel device 806c1
546 18:49:13.556691 CPU: family 06, model 8c, stepping 01
547 18:49:13.559863 Clearing out pending MCEs
548 18:49:13.560439 Clearing out pending MCEs
549 18:49:13.562586 Setting up local APIC...
550 18:49:13.566223 apic_id: 0x02 done.
551 18:49:13.569483 Setting up local APIC...
552 18:49:13.570020 apic_id: 0x04 done.
553 18:49:13.572594 Setting up local APIC...
554 18:49:13.575855 apic_id: 0x06 done.
555 18:49:13.576331 Setting up local APIC...
556 18:49:13.579588 CPU: vendor Intel device 806c1
557 18:49:13.583344 CPU: family 06, model 8c, stepping 01
558 18:49:13.589265 microcode: Update skipped, already up-to-date
559 18:49:13.589812 apic_id: 0x07 done.
560 18:49:13.592756 CPU #5 initialized
561 18:49:13.595846 microcode: Update skipped, already up-to-date
562 18:49:13.602773 microcode: Update skipped, already up-to-date
563 18:49:13.603199 apic_id: 0x03 done.
564 18:49:13.605678 CPU #4 initialized
565 18:49:13.609614 CPU #6 initialized
566 18:49:13.612117 microcode: Update skipped, already up-to-date
567 18:49:13.615596 apic_id: 0x05 done.
568 18:49:13.619077 microcode: Update skipped, already up-to-date
569 18:49:13.622742 microcode: Update skipped, already up-to-date
570 18:49:13.625988 CPU #7 initialized
571 18:49:13.629143 CPU #3 initialized
572 18:49:13.629571 CPU #2 initialized
573 18:49:13.632620 Clearing out pending MCEs
574 18:49:13.636037 Setting up local APIC...
575 18:49:13.636595 apic_id: 0x01 done.
576 18:49:13.642182 microcode: Update skipped, already up-to-date
577 18:49:13.645458 CPU #1 initialized
578 18:49:13.648630 bsp_do_flight_plan done after 462 msecs.
579 18:49:13.652766 CPU: frequency set to 4000 MHz
580 18:49:13.653292 Enabling SMIs.
581 18:49:13.659436 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
582 18:49:13.675506 SATAXPCIE1 indicates PCIe NVMe is present
583 18:49:13.678872 Probing TPM: done!
584 18:49:13.682010 Connected to device vid:did:rid of 1ae0:0028:00
585 18:49:13.692943 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
586 18:49:13.696118 Initialized TPM device CR50 revision 0
587 18:49:13.699137 Enabling S0i3.4
588 18:49:13.705945 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
589 18:49:13.709540 Found a VBT of 8704 bytes after decompression
590 18:49:13.715654 cse_lite: CSE RO boot. HybridStorageMode disabled
591 18:49:13.722719 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
592 18:49:13.798985 FSPS returned 0
593 18:49:13.801447 Executing Phase 1 of FspMultiPhaseSiInit
594 18:49:13.811730 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
595 18:49:13.815268 port C0 DISC req: usage 1 usb3 1 usb2 5
596 18:49:13.818213 Raw Buffer output 0 00000511
597 18:49:13.821436 Raw Buffer output 1 00000000
598 18:49:13.825413 pmc_send_ipc_cmd succeeded
599 18:49:13.832426 port C1 DISC req: usage 1 usb3 2 usb2 3
600 18:49:13.832948 Raw Buffer output 0 00000321
601 18:49:13.835015 Raw Buffer output 1 00000000
602 18:49:13.839592 pmc_send_ipc_cmd succeeded
603 18:49:13.844741 Detected 4 core, 8 thread CPU.
604 18:49:13.848005 Detected 4 core, 8 thread CPU.
605 18:49:14.081974 Display FSP Version Info HOB
606 18:49:14.085393 Reference Code - CPU = a.0.4c.31
607 18:49:14.088759 uCode Version = 0.0.0.86
608 18:49:14.091895 TXT ACM version = ff.ff.ff.ffff
609 18:49:14.095293 Reference Code - ME = a.0.4c.31
610 18:49:14.098209 MEBx version = 0.0.0.0
611 18:49:14.102224 ME Firmware Version = Consumer SKU
612 18:49:14.104726 Reference Code - PCH = a.0.4c.31
613 18:49:14.108324 PCH-CRID Status = Disabled
614 18:49:14.111582 PCH-CRID Original Value = ff.ff.ff.ffff
615 18:49:14.115441 PCH-CRID New Value = ff.ff.ff.ffff
616 18:49:14.118330 OPROM - RST - RAID = ff.ff.ff.ffff
617 18:49:14.121674 PCH Hsio Version = 4.0.0.0
618 18:49:14.124943 Reference Code - SA - System Agent = a.0.4c.31
619 18:49:14.131355 Reference Code - MRC = 2.0.0.1
620 18:49:14.132146 SA - PCIe Version = a.0.4c.31
621 18:49:14.134733 SA-CRID Status = Disabled
622 18:49:14.138288 SA-CRID Original Value = 0.0.0.1
623 18:49:14.141517 SA-CRID New Value = 0.0.0.1
624 18:49:14.145014 OPROM - VBIOS = ff.ff.ff.ffff
625 18:49:14.148492 IO Manageability Engine FW Version = 11.1.4.0
626 18:49:14.151839 PHY Build Version = 0.0.0.e0
627 18:49:14.155951 Thunderbolt(TM) FW Version = 0.0.0.0
628 18:49:14.161258 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 18:49:14.165403 ITSS IRQ Polarities Before:
630 18:49:14.165929 IPC0: 0xffffffff
631 18:49:14.168456 IPC1: 0xffffffff
632 18:49:14.168979 IPC2: 0xffffffff
633 18:49:14.171689 IPC3: 0xffffffff
634 18:49:14.175005 ITSS IRQ Polarities After:
635 18:49:14.175538 IPC0: 0xffffffff
636 18:49:14.178761 IPC1: 0xffffffff
637 18:49:14.179285 IPC2: 0xffffffff
638 18:49:14.181675 IPC3: 0xffffffff
639 18:49:14.184737 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 18:49:14.198108 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 18:49:14.207785 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 18:49:14.221790 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 18:49:14.227780 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 237 ms
644 18:49:14.230859 Enumerating buses...
645 18:49:14.234862 Show all devs... Before device enumeration.
646 18:49:14.238194 Root Device: enabled 1
647 18:49:14.238716 DOMAIN: 0000: enabled 1
648 18:49:14.241321 CPU_CLUSTER: 0: enabled 1
649 18:49:14.244613 PCI: 00:00.0: enabled 1
650 18:49:14.247821 PCI: 00:02.0: enabled 1
651 18:49:14.248400 PCI: 00:04.0: enabled 1
652 18:49:14.251256 PCI: 00:05.0: enabled 1
653 18:49:14.254693 PCI: 00:06.0: enabled 0
654 18:49:14.255221 PCI: 00:07.0: enabled 0
655 18:49:14.258200 PCI: 00:07.1: enabled 0
656 18:49:14.261259 PCI: 00:07.2: enabled 0
657 18:49:14.264652 PCI: 00:07.3: enabled 0
658 18:49:14.265080 PCI: 00:08.0: enabled 1
659 18:49:14.267826 PCI: 00:09.0: enabled 0
660 18:49:14.271107 PCI: 00:0a.0: enabled 0
661 18:49:14.274439 PCI: 00:0d.0: enabled 1
662 18:49:14.274960 PCI: 00:0d.1: enabled 0
663 18:49:14.278066 PCI: 00:0d.2: enabled 0
664 18:49:14.281293 PCI: 00:0d.3: enabled 0
665 18:49:14.284739 PCI: 00:0e.0: enabled 0
666 18:49:14.285268 PCI: 00:10.2: enabled 1
667 18:49:14.287936 PCI: 00:10.6: enabled 0
668 18:49:14.291220 PCI: 00:10.7: enabled 0
669 18:49:14.294251 PCI: 00:12.0: enabled 0
670 18:49:14.294772 PCI: 00:12.6: enabled 0
671 18:49:14.297305 PCI: 00:13.0: enabled 0
672 18:49:14.300861 PCI: 00:14.0: enabled 1
673 18:49:14.301388 PCI: 00:14.1: enabled 0
674 18:49:14.304285 PCI: 00:14.2: enabled 1
675 18:49:14.307488 PCI: 00:14.3: enabled 1
676 18:49:14.311539 PCI: 00:15.0: enabled 1
677 18:49:14.312095 PCI: 00:15.1: enabled 1
678 18:49:14.314559 PCI: 00:15.2: enabled 1
679 18:49:14.317252 PCI: 00:15.3: enabled 1
680 18:49:14.320789 PCI: 00:16.0: enabled 1
681 18:49:14.321214 PCI: 00:16.1: enabled 0
682 18:49:14.324091 PCI: 00:16.2: enabled 0
683 18:49:14.327686 PCI: 00:16.3: enabled 0
684 18:49:14.331071 PCI: 00:16.4: enabled 0
685 18:49:14.331595 PCI: 00:16.5: enabled 0
686 18:49:14.333829 PCI: 00:17.0: enabled 1
687 18:49:14.337435 PCI: 00:19.0: enabled 0
688 18:49:14.340669 PCI: 00:19.1: enabled 1
689 18:49:14.341094 PCI: 00:19.2: enabled 0
690 18:49:14.344518 PCI: 00:1c.0: enabled 1
691 18:49:14.347047 PCI: 00:1c.1: enabled 0
692 18:49:14.347472 PCI: 00:1c.2: enabled 0
693 18:49:14.350562 PCI: 00:1c.3: enabled 0
694 18:49:14.354578 PCI: 00:1c.4: enabled 0
695 18:49:14.357484 PCI: 00:1c.5: enabled 0
696 18:49:14.358009 PCI: 00:1c.6: enabled 1
697 18:49:14.360506 PCI: 00:1c.7: enabled 0
698 18:49:14.363917 PCI: 00:1d.0: enabled 1
699 18:49:14.367084 PCI: 00:1d.1: enabled 0
700 18:49:14.367601 PCI: 00:1d.2: enabled 1
701 18:49:14.370536 PCI: 00:1d.3: enabled 0
702 18:49:14.374126 PCI: 00:1e.0: enabled 1
703 18:49:14.376981 PCI: 00:1e.1: enabled 0
704 18:49:14.377506 PCI: 00:1e.2: enabled 1
705 18:49:14.380707 PCI: 00:1e.3: enabled 1
706 18:49:14.384169 PCI: 00:1f.0: enabled 1
707 18:49:14.387458 PCI: 00:1f.1: enabled 0
708 18:49:14.387981 PCI: 00:1f.2: enabled 1
709 18:49:14.390608 PCI: 00:1f.3: enabled 1
710 18:49:14.393739 PCI: 00:1f.4: enabled 0
711 18:49:14.394272 PCI: 00:1f.5: enabled 1
712 18:49:14.397517 PCI: 00:1f.6: enabled 0
713 18:49:14.400577 PCI: 00:1f.7: enabled 0
714 18:49:14.403562 APIC: 00: enabled 1
715 18:49:14.404040 GENERIC: 0.0: enabled 1
716 18:49:14.407234 GENERIC: 0.0: enabled 1
717 18:49:14.410257 GENERIC: 1.0: enabled 1
718 18:49:14.413388 GENERIC: 0.0: enabled 1
719 18:49:14.413820 GENERIC: 1.0: enabled 1
720 18:49:14.416570 USB0 port 0: enabled 1
721 18:49:14.420623 GENERIC: 0.0: enabled 1
722 18:49:14.421159 USB0 port 0: enabled 1
723 18:49:14.423904 GENERIC: 0.0: enabled 1
724 18:49:14.427007 I2C: 00:1a: enabled 1
725 18:49:14.430336 I2C: 00:31: enabled 1
726 18:49:14.430862 I2C: 00:32: enabled 1
727 18:49:14.433535 I2C: 00:10: enabled 1
728 18:49:14.436815 I2C: 00:15: enabled 1
729 18:49:14.437345 GENERIC: 0.0: enabled 0
730 18:49:14.440028 GENERIC: 1.0: enabled 0
731 18:49:14.443882 GENERIC: 0.0: enabled 1
732 18:49:14.444574 SPI: 00: enabled 1
733 18:49:14.446904 SPI: 00: enabled 1
734 18:49:14.450234 PNP: 0c09.0: enabled 1
735 18:49:14.450757 GENERIC: 0.0: enabled 1
736 18:49:14.453428 USB3 port 0: enabled 1
737 18:49:14.456692 USB3 port 1: enabled 1
738 18:49:14.459967 USB3 port 2: enabled 0
739 18:49:14.460465 USB3 port 3: enabled 0
740 18:49:14.463434 USB2 port 0: enabled 0
741 18:49:14.466485 USB2 port 1: enabled 1
742 18:49:14.466989 USB2 port 2: enabled 1
743 18:49:14.469814 USB2 port 3: enabled 0
744 18:49:14.472931 USB2 port 4: enabled 1
745 18:49:14.473359 USB2 port 5: enabled 0
746 18:49:14.476122 USB2 port 6: enabled 0
747 18:49:14.479543 USB2 port 7: enabled 0
748 18:49:14.482987 USB2 port 8: enabled 0
749 18:49:14.483517 USB2 port 9: enabled 0
750 18:49:14.486458 USB3 port 0: enabled 0
751 18:49:14.489842 USB3 port 1: enabled 1
752 18:49:14.490394 USB3 port 2: enabled 0
753 18:49:14.492872 USB3 port 3: enabled 0
754 18:49:14.496252 GENERIC: 0.0: enabled 1
755 18:49:14.499436 GENERIC: 1.0: enabled 1
756 18:49:14.499876 APIC: 01: enabled 1
757 18:49:14.503461 APIC: 03: enabled 1
758 18:49:14.503900 APIC: 05: enabled 1
759 18:49:14.506743 APIC: 07: enabled 1
760 18:49:14.509936 APIC: 06: enabled 1
761 18:49:14.510501 APIC: 02: enabled 1
762 18:49:14.512953 APIC: 04: enabled 1
763 18:49:14.516188 Compare with tree...
764 18:49:14.516626 Root Device: enabled 1
765 18:49:14.519342 DOMAIN: 0000: enabled 1
766 18:49:14.522684 PCI: 00:00.0: enabled 1
767 18:49:14.526017 PCI: 00:02.0: enabled 1
768 18:49:14.526461 PCI: 00:04.0: enabled 1
769 18:49:14.529812 GENERIC: 0.0: enabled 1
770 18:49:14.532798 PCI: 00:05.0: enabled 1
771 18:49:14.536017 PCI: 00:06.0: enabled 0
772 18:49:14.539549 PCI: 00:07.0: enabled 0
773 18:49:14.540140 GENERIC: 0.0: enabled 1
774 18:49:14.542492 PCI: 00:07.1: enabled 0
775 18:49:14.545897 GENERIC: 1.0: enabled 1
776 18:49:14.549064 PCI: 00:07.2: enabled 0
777 18:49:14.552326 GENERIC: 0.0: enabled 1
778 18:49:14.556416 PCI: 00:07.3: enabled 0
779 18:49:14.556963 GENERIC: 1.0: enabled 1
780 18:49:14.559444 PCI: 00:08.0: enabled 1
781 18:49:14.562724 PCI: 00:09.0: enabled 0
782 18:49:14.565864 PCI: 00:0a.0: enabled 0
783 18:49:14.569482 PCI: 00:0d.0: enabled 1
784 18:49:14.570026 USB0 port 0: enabled 1
785 18:49:14.572428 USB3 port 0: enabled 1
786 18:49:14.576142 USB3 port 1: enabled 1
787 18:49:14.579473 USB3 port 2: enabled 0
788 18:49:14.582222 USB3 port 3: enabled 0
789 18:49:14.582691 PCI: 00:0d.1: enabled 0
790 18:49:14.586377 PCI: 00:0d.2: enabled 0
791 18:49:14.589322 GENERIC: 0.0: enabled 1
792 18:49:14.592670 PCI: 00:0d.3: enabled 0
793 18:49:14.595833 PCI: 00:0e.0: enabled 0
794 18:49:14.596430 PCI: 00:10.2: enabled 1
795 18:49:14.598718 PCI: 00:10.6: enabled 0
796 18:49:14.602602 PCI: 00:10.7: enabled 0
797 18:49:14.605827 PCI: 00:12.0: enabled 0
798 18:49:14.608796 PCI: 00:12.6: enabled 0
799 18:49:14.609242 PCI: 00:13.0: enabled 0
800 18:49:14.612695 PCI: 00:14.0: enabled 1
801 18:49:14.615871 USB0 port 0: enabled 1
802 18:49:14.618990 USB2 port 0: enabled 0
803 18:49:14.622095 USB2 port 1: enabled 1
804 18:49:14.625479 USB2 port 2: enabled 1
805 18:49:14.625931 USB2 port 3: enabled 0
806 18:49:14.629171 USB2 port 4: enabled 1
807 18:49:14.632232 USB2 port 5: enabled 0
808 18:49:14.635593 USB2 port 6: enabled 0
809 18:49:14.639025 USB2 port 7: enabled 0
810 18:49:14.639571 USB2 port 8: enabled 0
811 18:49:14.642040 USB2 port 9: enabled 0
812 18:49:14.645567 USB3 port 0: enabled 0
813 18:49:14.648683 USB3 port 1: enabled 1
814 18:49:14.652111 USB3 port 2: enabled 0
815 18:49:14.655397 USB3 port 3: enabled 0
816 18:49:14.655952 PCI: 00:14.1: enabled 0
817 18:49:14.658953 PCI: 00:14.2: enabled 1
818 18:49:14.662475 PCI: 00:14.3: enabled 1
819 18:49:14.665467 GENERIC: 0.0: enabled 1
820 18:49:14.668646 PCI: 00:15.0: enabled 1
821 18:49:14.669190 I2C: 00:1a: enabled 1
822 18:49:14.671924 I2C: 00:31: enabled 1
823 18:49:14.675813 I2C: 00:32: enabled 1
824 18:49:14.679108 PCI: 00:15.1: enabled 1
825 18:49:14.679659 I2C: 00:10: enabled 1
826 18:49:14.682437 PCI: 00:15.2: enabled 1
827 18:49:14.684819 PCI: 00:15.3: enabled 1
828 18:49:14.688606 PCI: 00:16.0: enabled 1
829 18:49:14.691896 PCI: 00:16.1: enabled 0
830 18:49:14.692502 PCI: 00:16.2: enabled 0
831 18:49:14.695156 PCI: 00:16.3: enabled 0
832 18:49:14.698816 PCI: 00:16.4: enabled 0
833 18:49:14.702497 PCI: 00:16.5: enabled 0
834 18:49:14.702936 PCI: 00:17.0: enabled 1
835 18:49:14.706467 PCI: 00:19.0: enabled 0
836 18:49:14.709308 PCI: 00:19.1: enabled 1
837 18:49:14.712751 I2C: 00:15: enabled 1
838 18:49:14.713293 PCI: 00:19.2: enabled 0
839 18:49:14.715901 PCI: 00:1d.0: enabled 1
840 18:49:14.719265 GENERIC: 0.0: enabled 1
841 18:49:14.722646 PCI: 00:1e.0: enabled 1
842 18:49:14.726059 PCI: 00:1e.1: enabled 0
843 18:49:14.726602 PCI: 00:1e.2: enabled 1
844 18:49:14.775943 SPI: 00: enabled 1
845 18:49:14.776752 PCI: 00:1e.3: enabled 1
846 18:49:14.777184 SPI: 00: enabled 1
847 18:49:14.777517 PCI: 00:1f.0: enabled 1
848 18:49:14.777835 PNP: 0c09.0: enabled 1
849 18:49:14.778145 PCI: 00:1f.1: enabled 0
850 18:49:14.778442 PCI: 00:1f.2: enabled 1
851 18:49:14.779090 GENERIC: 0.0: enabled 1
852 18:49:14.779420 GENERIC: 0.0: enabled 1
853 18:49:14.779722 GENERIC: 1.0: enabled 1
854 18:49:14.780015 PCI: 00:1f.3: enabled 1
855 18:49:14.780338 PCI: 00:1f.4: enabled 0
856 18:49:14.780629 PCI: 00:1f.5: enabled 1
857 18:49:14.780915 PCI: 00:1f.6: enabled 0
858 18:49:14.781197 PCI: 00:1f.7: enabled 0
859 18:49:14.781480 CPU_CLUSTER: 0: enabled 1
860 18:49:14.781761 APIC: 00: enabled 1
861 18:49:14.782043 APIC: 01: enabled 1
862 18:49:14.782327 APIC: 03: enabled 1
863 18:49:14.782670 APIC: 05: enabled 1
864 18:49:14.782962 APIC: 07: enabled 1
865 18:49:14.784176 APIC: 06: enabled 1
866 18:49:14.784607 APIC: 02: enabled 1
867 18:49:14.787922 APIC: 04: enabled 1
868 18:49:14.790935 Root Device scanning...
869 18:49:14.796447 scan_static_bus for Root Device
870 18:49:14.797206 DOMAIN: 0000 enabled
871 18:49:14.800644 CPU_CLUSTER: 0 enabled
872 18:49:14.801123 DOMAIN: 0000 scanning...
873 18:49:14.803786 PCI: pci_scan_bus for bus 00
874 18:49:14.806958 PCI: 00:00.0 [8086/0000] ops
875 18:49:14.810553 PCI: 00:00.0 [8086/9a12] enabled
876 18:49:14.813403 PCI: 00:02.0 [8086/0000] bus ops
877 18:49:14.817016 PCI: 00:02.0 [8086/9a40] enabled
878 18:49:14.820520 PCI: 00:04.0 [8086/0000] bus ops
879 18:49:14.823473 PCI: 00:04.0 [8086/9a03] enabled
880 18:49:14.827394 PCI: 00:05.0 [8086/9a19] enabled
881 18:49:14.830720 PCI: 00:07.0 [0000/0000] hidden
882 18:49:14.833797 PCI: 00:08.0 [8086/9a11] enabled
883 18:49:14.837550 PCI: 00:0a.0 [8086/9a0d] disabled
884 18:49:14.840500 PCI: 00:0d.0 [8086/0000] bus ops
885 18:49:14.843901 PCI: 00:0d.0 [8086/9a13] enabled
886 18:49:14.847004 PCI: 00:14.0 [8086/0000] bus ops
887 18:49:14.850424 PCI: 00:14.0 [8086/a0ed] enabled
888 18:49:14.853745 PCI: 00:14.2 [8086/a0ef] enabled
889 18:49:14.856893 PCI: 00:14.3 [8086/0000] bus ops
890 18:49:14.859915 PCI: 00:14.3 [8086/a0f0] enabled
891 18:49:14.863184 PCI: 00:15.0 [8086/0000] bus ops
892 18:49:14.866953 PCI: 00:15.0 [8086/a0e8] enabled
893 18:49:14.870373 PCI: 00:15.1 [8086/0000] bus ops
894 18:49:14.873320 PCI: 00:15.1 [8086/a0e9] enabled
895 18:49:14.876749 PCI: 00:15.2 [8086/0000] bus ops
896 18:49:14.880514 PCI: 00:15.2 [8086/a0ea] enabled
897 18:49:14.883553 PCI: 00:15.3 [8086/0000] bus ops
898 18:49:14.887053 PCI: 00:15.3 [8086/a0eb] enabled
899 18:49:14.890179 PCI: 00:16.0 [8086/0000] ops
900 18:49:14.893482 PCI: 00:16.0 [8086/a0e0] enabled
901 18:49:14.899933 PCI: Static device PCI: 00:17.0 not found, disabling it.
902 18:49:14.903351 PCI: 00:19.0 [8086/0000] bus ops
903 18:49:14.906478 PCI: 00:19.0 [8086/a0c5] disabled
904 18:49:14.909555 PCI: 00:19.1 [8086/0000] bus ops
905 18:49:14.912883 PCI: 00:19.1 [8086/a0c6] enabled
906 18:49:14.916500 PCI: 00:1d.0 [8086/0000] bus ops
907 18:49:14.920174 PCI: 00:1d.0 [8086/a0b0] enabled
908 18:49:14.922903 PCI: 00:1e.0 [8086/0000] ops
909 18:49:14.926604 PCI: 00:1e.0 [8086/a0a8] enabled
910 18:49:14.929997 PCI: 00:1e.2 [8086/0000] bus ops
911 18:49:14.932909 PCI: 00:1e.2 [8086/a0aa] enabled
912 18:49:14.936158 PCI: 00:1e.3 [8086/0000] bus ops
913 18:49:14.939581 PCI: 00:1e.3 [8086/a0ab] enabled
914 18:49:14.943062 PCI: 00:1f.0 [8086/0000] bus ops
915 18:49:14.945843 PCI: 00:1f.0 [8086/a087] enabled
916 18:49:14.946276 RTC Init
917 18:49:14.952895 Set power on after power failure.
918 18:49:14.953426 Disabling Deep S3
919 18:49:14.956344 Disabling Deep S3
920 18:49:14.956871 Disabling Deep S4
921 18:49:14.959087 Disabling Deep S4
922 18:49:14.959504 Disabling Deep S5
923 18:49:14.962410 Disabling Deep S5
924 18:49:14.966190 PCI: 00:1f.2 [0000/0000] hidden
925 18:49:14.969504 PCI: 00:1f.3 [8086/0000] bus ops
926 18:49:14.972758 PCI: 00:1f.3 [8086/a0c8] enabled
927 18:49:14.975657 PCI: 00:1f.5 [8086/0000] bus ops
928 18:49:14.979067 PCI: 00:1f.5 [8086/a0a4] enabled
929 18:49:14.982943 PCI: Leftover static devices:
930 18:49:14.983486 PCI: 00:10.2
931 18:49:14.985798 PCI: 00:10.6
932 18:49:14.986217 PCI: 00:10.7
933 18:49:14.989047 PCI: 00:06.0
934 18:49:14.989465 PCI: 00:07.1
935 18:49:14.989800 PCI: 00:07.2
936 18:49:14.992622 PCI: 00:07.3
937 18:49:14.993042 PCI: 00:09.0
938 18:49:14.995821 PCI: 00:0d.1
939 18:49:14.996271 PCI: 00:0d.2
940 18:49:14.996607 PCI: 00:0d.3
941 18:49:14.998941 PCI: 00:0e.0
942 18:49:14.999363 PCI: 00:12.0
943 18:49:15.002574 PCI: 00:12.6
944 18:49:15.002992 PCI: 00:13.0
945 18:49:15.003324 PCI: 00:14.1
946 18:49:15.005716 PCI: 00:16.1
947 18:49:15.006135 PCI: 00:16.2
948 18:49:15.009111 PCI: 00:16.3
949 18:49:15.009576 PCI: 00:16.4
950 18:49:15.012452 PCI: 00:16.5
951 18:49:15.012866 PCI: 00:17.0
952 18:49:15.013200 PCI: 00:19.2
953 18:49:15.015868 PCI: 00:1e.1
954 18:49:15.016402 PCI: 00:1f.1
955 18:49:15.019025 PCI: 00:1f.4
956 18:49:15.019445 PCI: 00:1f.6
957 18:49:15.019780 PCI: 00:1f.7
958 18:49:15.022241 PCI: Check your devicetree.cb.
959 18:49:15.025525 PCI: 00:02.0 scanning...
960 18:49:15.029425 scan_generic_bus for PCI: 00:02.0
961 18:49:15.032672 scan_generic_bus for PCI: 00:02.0 done
962 18:49:15.038975 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
963 18:49:15.042386 PCI: 00:04.0 scanning...
964 18:49:15.045496 scan_generic_bus for PCI: 00:04.0
965 18:49:15.045926 GENERIC: 0.0 enabled
966 18:49:15.052001 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
967 18:49:15.059083 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
968 18:49:15.059612 PCI: 00:0d.0 scanning...
969 18:49:15.062140 scan_static_bus for PCI: 00:0d.0
970 18:49:15.065804 USB0 port 0 enabled
971 18:49:15.069011 USB0 port 0 scanning...
972 18:49:15.072347 scan_static_bus for USB0 port 0
973 18:49:15.075617 USB3 port 0 enabled
974 18:49:15.076179 USB3 port 1 enabled
975 18:49:15.078747 USB3 port 2 disabled
976 18:49:15.079275 USB3 port 3 disabled
977 18:49:15.081629 USB3 port 0 scanning...
978 18:49:15.085664 scan_static_bus for USB3 port 0
979 18:49:15.088514 scan_static_bus for USB3 port 0 done
980 18:49:15.095818 scan_bus: bus USB3 port 0 finished in 6 msecs
981 18:49:15.096405 USB3 port 1 scanning...
982 18:49:15.098437 scan_static_bus for USB3 port 1
983 18:49:15.105467 scan_static_bus for USB3 port 1 done
984 18:49:15.109168 scan_bus: bus USB3 port 1 finished in 6 msecs
985 18:49:15.111954 scan_static_bus for USB0 port 0 done
986 18:49:15.115441 scan_bus: bus USB0 port 0 finished in 43 msecs
987 18:49:15.122115 scan_static_bus for PCI: 00:0d.0 done
988 18:49:15.125241 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
989 18:49:15.128563 PCI: 00:14.0 scanning...
990 18:49:15.131769 scan_static_bus for PCI: 00:14.0
991 18:49:15.135236 USB0 port 0 enabled
992 18:49:15.135678 USB0 port 0 scanning...
993 18:49:15.138554 scan_static_bus for USB0 port 0
994 18:49:15.141699 USB2 port 0 disabled
995 18:49:15.145076 USB2 port 1 enabled
996 18:49:15.145520 USB2 port 2 enabled
997 18:49:15.148223 USB2 port 3 disabled
998 18:49:15.148668 USB2 port 4 enabled
999 18:49:15.151941 USB2 port 5 disabled
1000 18:49:15.155422 USB2 port 6 disabled
1001 18:49:15.155968 USB2 port 7 disabled
1002 18:49:15.158782 USB2 port 8 disabled
1003 18:49:15.161773 USB2 port 9 disabled
1004 18:49:15.162219 USB3 port 0 disabled
1005 18:49:15.165002 USB3 port 1 enabled
1006 18:49:15.168440 USB3 port 2 disabled
1007 18:49:15.168980 USB3 port 3 disabled
1008 18:49:15.171770 USB2 port 1 scanning...
1009 18:49:15.175076 scan_static_bus for USB2 port 1
1010 18:49:15.178384 scan_static_bus for USB2 port 1 done
1011 18:49:15.184854 scan_bus: bus USB2 port 1 finished in 6 msecs
1012 18:49:15.185379 USB2 port 2 scanning...
1013 18:49:15.188545 scan_static_bus for USB2 port 2
1014 18:49:15.191989 scan_static_bus for USB2 port 2 done
1015 18:49:15.198182 scan_bus: bus USB2 port 2 finished in 6 msecs
1016 18:49:15.201432 USB2 port 4 scanning...
1017 18:49:15.204692 scan_static_bus for USB2 port 4
1018 18:49:15.208227 scan_static_bus for USB2 port 4 done
1019 18:49:15.211354 scan_bus: bus USB2 port 4 finished in 6 msecs
1020 18:49:15.214872 USB3 port 1 scanning...
1021 18:49:15.217703 scan_static_bus for USB3 port 1
1022 18:49:15.221298 scan_static_bus for USB3 port 1 done
1023 18:49:15.224698 scan_bus: bus USB3 port 1 finished in 6 msecs
1024 18:49:15.231612 scan_static_bus for USB0 port 0 done
1025 18:49:15.234695 scan_bus: bus USB0 port 0 finished in 93 msecs
1026 18:49:15.237933 scan_static_bus for PCI: 00:14.0 done
1027 18:49:15.244937 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1028 18:49:15.245503 PCI: 00:14.3 scanning...
1029 18:49:15.247991 scan_static_bus for PCI: 00:14.3
1030 18:49:15.251345 GENERIC: 0.0 enabled
1031 18:49:15.254489 scan_static_bus for PCI: 00:14.3 done
1032 18:49:15.260982 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1033 18:49:15.261543 PCI: 00:15.0 scanning...
1034 18:49:15.264368 scan_static_bus for PCI: 00:15.0
1035 18:49:15.268121 I2C: 00:1a enabled
1036 18:49:15.271321 I2C: 00:31 enabled
1037 18:49:15.271890 I2C: 00:32 enabled
1038 18:49:15.275086 scan_static_bus for PCI: 00:15.0 done
1039 18:49:15.281823 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1040 18:49:15.282393 PCI: 00:15.1 scanning...
1041 18:49:15.284930 scan_static_bus for PCI: 00:15.1
1042 18:49:15.288887 I2C: 00:10 enabled
1043 18:49:15.292030 scan_static_bus for PCI: 00:15.1 done
1044 18:49:15.298601 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1045 18:49:15.299176 PCI: 00:15.2 scanning...
1046 18:49:15.301792 scan_static_bus for PCI: 00:15.2
1047 18:49:15.308806 scan_static_bus for PCI: 00:15.2 done
1048 18:49:15.312044 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1049 18:49:15.315224 PCI: 00:15.3 scanning...
1050 18:49:15.318726 scan_static_bus for PCI: 00:15.3
1051 18:49:15.321720 scan_static_bus for PCI: 00:15.3 done
1052 18:49:15.324787 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1053 18:49:15.328215 PCI: 00:19.1 scanning...
1054 18:49:15.331906 scan_static_bus for PCI: 00:19.1
1055 18:49:15.334635 I2C: 00:15 enabled
1056 18:49:15.338396 scan_static_bus for PCI: 00:19.1 done
1057 18:49:15.341739 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1058 18:49:15.344764 PCI: 00:1d.0 scanning...
1059 18:49:15.348118 do_pci_scan_bridge for PCI: 00:1d.0
1060 18:49:15.351422 PCI: pci_scan_bus for bus 01
1061 18:49:15.355157 PCI: 01:00.0 [1c5c/174a] enabled
1062 18:49:15.358397 GENERIC: 0.0 enabled
1063 18:49:15.361678 Enabling Common Clock Configuration
1064 18:49:15.364720 L1 Sub-State supported from root port 29
1065 18:49:15.368132 L1 Sub-State Support = 0xf
1066 18:49:15.371590 CommonModeRestoreTime = 0x28
1067 18:49:15.374560 Power On Value = 0x16, Power On Scale = 0x0
1068 18:49:15.378448 ASPM: Enabled L1
1069 18:49:15.381012 PCIe: Max_Payload_Size adjusted to 128
1070 18:49:15.388203 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1071 18:49:15.388767 PCI: 00:1e.2 scanning...
1072 18:49:15.391349 scan_generic_bus for PCI: 00:1e.2
1073 18:49:15.394661 SPI: 00 enabled
1074 18:49:15.401046 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1075 18:49:15.404466 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1076 18:49:15.407875 PCI: 00:1e.3 scanning...
1077 18:49:15.411030 scan_generic_bus for PCI: 00:1e.3
1078 18:49:15.414598 SPI: 00 enabled
1079 18:49:15.418105 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1080 18:49:15.424436 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1081 18:49:15.427654 PCI: 00:1f.0 scanning...
1082 18:49:15.431186 scan_static_bus for PCI: 00:1f.0
1083 18:49:15.431740 PNP: 0c09.0 enabled
1084 18:49:15.433865 PNP: 0c09.0 scanning...
1085 18:49:15.437421 scan_static_bus for PNP: 0c09.0
1086 18:49:15.441304 scan_static_bus for PNP: 0c09.0 done
1087 18:49:15.447215 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1088 18:49:15.450606 scan_static_bus for PCI: 00:1f.0 done
1089 18:49:15.453979 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1090 18:49:15.457481 PCI: 00:1f.2 scanning...
1091 18:49:15.460721 scan_static_bus for PCI: 00:1f.2
1092 18:49:15.464432 GENERIC: 0.0 enabled
1093 18:49:15.464990 GENERIC: 0.0 scanning...
1094 18:49:15.467471 scan_static_bus for GENERIC: 0.0
1095 18:49:15.470718 GENERIC: 0.0 enabled
1096 18:49:15.474107 GENERIC: 1.0 enabled
1097 18:49:15.477750 scan_static_bus for GENERIC: 0.0 done
1098 18:49:15.480477 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1099 18:49:15.486947 scan_static_bus for PCI: 00:1f.2 done
1100 18:49:15.490899 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1101 18:49:15.494209 PCI: 00:1f.3 scanning...
1102 18:49:15.497295 scan_static_bus for PCI: 00:1f.3
1103 18:49:15.500661 scan_static_bus for PCI: 00:1f.3 done
1104 18:49:15.503542 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1105 18:49:15.506944 PCI: 00:1f.5 scanning...
1106 18:49:15.510633 scan_generic_bus for PCI: 00:1f.5
1107 18:49:15.513898 scan_generic_bus for PCI: 00:1f.5 done
1108 18:49:15.520295 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1109 18:49:15.524108 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1110 18:49:15.526691 scan_static_bus for Root Device done
1111 18:49:15.533208 scan_bus: bus Root Device finished in 737 msecs
1112 18:49:15.533630 done
1113 18:49:15.539847 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1114 18:49:15.543131 Chrome EC: UHEPI supported
1115 18:49:15.550754 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1116 18:49:15.556593 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1117 18:49:15.560383 SPI flash protection: WPSW=0 SRP0=0
1118 18:49:15.563064 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1119 18:49:15.569763 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1120 18:49:15.572824 found VGA at PCI: 00:02.0
1121 18:49:15.576509 Setting up VGA for PCI: 00:02.0
1122 18:49:15.579823 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1123 18:49:15.586335 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1124 18:49:15.590216 Allocating resources...
1125 18:49:15.590730 Reading resources...
1126 18:49:15.597015 Root Device read_resources bus 0 link: 0
1127 18:49:15.600276 DOMAIN: 0000 read_resources bus 0 link: 0
1128 18:49:15.603163 PCI: 00:04.0 read_resources bus 1 link: 0
1129 18:49:15.609768 PCI: 00:04.0 read_resources bus 1 link: 0 done
1130 18:49:15.612794 PCI: 00:0d.0 read_resources bus 0 link: 0
1131 18:49:15.619730 USB0 port 0 read_resources bus 0 link: 0
1132 18:49:15.623430 USB0 port 0 read_resources bus 0 link: 0 done
1133 18:49:15.630168 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1134 18:49:15.633397 PCI: 00:14.0 read_resources bus 0 link: 0
1135 18:49:15.636472 USB0 port 0 read_resources bus 0 link: 0
1136 18:49:15.644586 USB0 port 0 read_resources bus 0 link: 0 done
1137 18:49:15.647373 PCI: 00:14.0 read_resources bus 0 link: 0 done
1138 18:49:15.654335 PCI: 00:14.3 read_resources bus 0 link: 0
1139 18:49:15.657771 PCI: 00:14.3 read_resources bus 0 link: 0 done
1140 18:49:15.664211 PCI: 00:15.0 read_resources bus 0 link: 0
1141 18:49:15.667874 PCI: 00:15.0 read_resources bus 0 link: 0 done
1142 18:49:15.674558 PCI: 00:15.1 read_resources bus 0 link: 0
1143 18:49:15.677394 PCI: 00:15.1 read_resources bus 0 link: 0 done
1144 18:49:15.684758 PCI: 00:19.1 read_resources bus 0 link: 0
1145 18:49:15.688015 PCI: 00:19.1 read_resources bus 0 link: 0 done
1146 18:49:15.694893 PCI: 00:1d.0 read_resources bus 1 link: 0
1147 18:49:15.697919 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1148 18:49:15.704419 PCI: 00:1e.2 read_resources bus 2 link: 0
1149 18:49:15.707723 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1150 18:49:15.714187 PCI: 00:1e.3 read_resources bus 3 link: 0
1151 18:49:15.717831 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1152 18:49:15.724967 PCI: 00:1f.0 read_resources bus 0 link: 0
1153 18:49:15.727842 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1154 18:49:15.734310 PCI: 00:1f.2 read_resources bus 0 link: 0
1155 18:49:15.737838 GENERIC: 0.0 read_resources bus 0 link: 0
1156 18:49:15.744261 GENERIC: 0.0 read_resources bus 0 link: 0 done
1157 18:49:15.747469 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1158 18:49:15.754384 DOMAIN: 0000 read_resources bus 0 link: 0 done
1159 18:49:15.757415 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1160 18:49:15.764213 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1161 18:49:15.767178 Root Device read_resources bus 0 link: 0 done
1162 18:49:15.770960 Done reading resources.
1163 18:49:15.777938 Show resources in subtree (Root Device)...After reading.
1164 18:49:15.780970 Root Device child on link 0 DOMAIN: 0000
1165 18:49:15.784217 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 18:49:15.794688 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 18:49:15.803792 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 18:49:15.804394 PCI: 00:00.0
1169 18:49:15.814333 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 18:49:15.824355 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 18:49:15.834013 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 18:49:15.843781 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 18:49:15.853681 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 18:49:15.860516 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 18:49:15.870277 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 18:49:15.881040 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 18:49:15.890221 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 18:49:15.900249 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 18:49:15.910147 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 18:49:15.916758 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 18:49:15.927045 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 18:49:15.936417 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 18:49:15.946889 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 18:49:15.956465 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 18:49:15.966632 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 18:49:15.972990 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 18:49:15.983184 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 18:49:15.992970 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1189 18:49:15.995979 PCI: 00:02.0
1190 18:49:16.006037 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 18:49:16.016958 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1192 18:49:16.022730 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1193 18:49:16.029377 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 18:49:16.039556 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1195 18:49:16.040132 GENERIC: 0.0
1196 18:49:16.042846 PCI: 00:05.0
1197 18:49:16.052486 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 18:49:16.055864 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1199 18:49:16.059129 GENERIC: 0.0
1200 18:49:16.059658 PCI: 00:08.0
1201 18:49:16.069284 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 18:49:16.072523 PCI: 00:0a.0
1203 18:49:16.075437 PCI: 00:0d.0 child on link 0 USB0 port 0
1204 18:49:16.085690 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 18:49:16.092162 USB0 port 0 child on link 0 USB3 port 0
1206 18:49:16.092615 USB3 port 0
1207 18:49:16.095390 USB3 port 1
1208 18:49:16.095922 USB3 port 2
1209 18:49:16.098922 USB3 port 3
1210 18:49:16.101928 PCI: 00:14.0 child on link 0 USB0 port 0
1211 18:49:16.112835 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 18:49:16.115480 USB0 port 0 child on link 0 USB2 port 0
1213 18:49:16.119276 USB2 port 0
1214 18:49:16.119807 USB2 port 1
1215 18:49:16.122287 USB2 port 2
1216 18:49:16.125684 USB2 port 3
1217 18:49:16.126211 USB2 port 4
1218 18:49:16.128657 USB2 port 5
1219 18:49:16.129081 USB2 port 6
1220 18:49:16.132202 USB2 port 7
1221 18:49:16.132729 USB2 port 8
1222 18:49:16.135738 USB2 port 9
1223 18:49:16.136318 USB3 port 0
1224 18:49:16.138350 USB3 port 1
1225 18:49:16.138778 USB3 port 2
1226 18:49:16.142338 USB3 port 3
1227 18:49:16.142866 PCI: 00:14.2
1228 18:49:16.152212 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 18:49:16.162180 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1230 18:49:16.168803 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1231 18:49:16.179129 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1232 18:49:16.179707 GENERIC: 0.0
1233 18:49:16.185244 PCI: 00:15.0 child on link 0 I2C: 00:1a
1234 18:49:16.195080 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 18:49:16.195609 I2C: 00:1a
1236 18:49:16.198457 I2C: 00:31
1237 18:49:16.198984 I2C: 00:32
1238 18:49:16.201671 PCI: 00:15.1 child on link 0 I2C: 00:10
1239 18:49:16.211520 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 18:49:16.214318 I2C: 00:10
1241 18:49:16.214748 PCI: 00:15.2
1242 18:49:16.224482 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 18:49:16.228191 PCI: 00:15.3
1244 18:49:16.238070 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 18:49:16.238605 PCI: 00:16.0
1246 18:49:16.248388 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 18:49:16.251571 PCI: 00:19.0
1248 18:49:16.254997 PCI: 00:19.1 child on link 0 I2C: 00:15
1249 18:49:16.264841 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 18:49:16.268025 I2C: 00:15
1251 18:49:16.271655 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1252 18:49:16.281899 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1253 18:49:16.288120 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1254 18:49:16.297720 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1255 18:49:16.301038 GENERIC: 0.0
1256 18:49:16.301563 PCI: 01:00.0
1257 18:49:16.311227 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1258 18:49:16.320822 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1259 18:49:16.330691 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1260 18:49:16.331511 PCI: 00:1e.0
1261 18:49:16.344011 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1262 18:49:16.347659 PCI: 00:1e.2 child on link 0 SPI: 00
1263 18:49:16.357714 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 18:49:16.358233 SPI: 00
1265 18:49:16.364100 PCI: 00:1e.3 child on link 0 SPI: 00
1266 18:49:16.373910 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1267 18:49:16.374433 SPI: 00
1268 18:49:16.377149 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1269 18:49:16.387321 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1270 18:49:16.387839 PNP: 0c09.0
1271 18:49:16.397412 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1272 18:49:16.400774 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1273 18:49:16.410423 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1274 18:49:16.420146 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1275 18:49:16.423993 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1276 18:49:16.426926 GENERIC: 0.0
1277 18:49:16.430362 GENERIC: 1.0
1278 18:49:16.430876 PCI: 00:1f.3
1279 18:49:16.440213 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1280 18:49:16.450649 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1281 18:49:16.453477 PCI: 00:1f.5
1282 18:49:16.460201 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1283 18:49:16.466550 CPU_CLUSTER: 0 child on link 0 APIC: 00
1284 18:49:16.467077 APIC: 00
1285 18:49:16.467417 APIC: 01
1286 18:49:16.470049 APIC: 03
1287 18:49:16.470666 APIC: 05
1288 18:49:16.473361 APIC: 07
1289 18:49:16.473885 APIC: 06
1290 18:49:16.474239 APIC: 02
1291 18:49:16.476363 APIC: 04
1292 18:49:16.483324 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1293 18:49:16.489759 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1294 18:49:16.496459 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1295 18:49:16.502958 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1296 18:49:16.505970 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1297 18:49:16.509408 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1298 18:49:16.513064 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1299 18:49:16.522773 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1300 18:49:16.529361 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1301 18:49:16.536271 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1302 18:49:16.542859 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1303 18:49:16.549020 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1304 18:49:16.556103 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1305 18:49:16.566340 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1306 18:49:16.572434 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1307 18:49:16.576442 DOMAIN: 0000: Resource ranges:
1308 18:49:16.579467 * Base: 1000, Size: 800, Tag: 100
1309 18:49:16.583209 * Base: 1900, Size: e700, Tag: 100
1310 18:49:16.589434 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1311 18:49:16.595711 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1312 18:49:16.602395 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1313 18:49:16.609266 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1314 18:49:16.615742 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1315 18:49:16.625370 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1316 18:49:16.631963 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1317 18:49:16.638654 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1318 18:49:16.648705 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1319 18:49:16.655126 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1320 18:49:16.661791 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1321 18:49:16.672139 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1322 18:49:16.678847 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1323 18:49:16.685402 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1324 18:49:16.694969 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1325 18:49:16.702328 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1326 18:49:16.708751 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1327 18:49:16.718339 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1328 18:49:16.725188 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1329 18:49:16.731724 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1330 18:49:16.742171 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1331 18:49:16.748639 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1332 18:49:16.755387 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1333 18:49:16.765040 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1334 18:49:16.771678 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1335 18:49:16.775345 DOMAIN: 0000: Resource ranges:
1336 18:49:16.778529 * Base: 7fc00000, Size: 40400000, Tag: 200
1337 18:49:16.785022 * Base: d0000000, Size: 28000000, Tag: 200
1338 18:49:16.788484 * Base: fa000000, Size: 1000000, Tag: 200
1339 18:49:16.791375 * Base: fb001000, Size: 2fff000, Tag: 200
1340 18:49:16.795317 * Base: fe010000, Size: 2e000, Tag: 200
1341 18:49:16.801701 * Base: fe03f000, Size: d41000, Tag: 200
1342 18:49:16.804933 * Base: fed88000, Size: 8000, Tag: 200
1343 18:49:16.808519 * Base: fed93000, Size: d000, Tag: 200
1344 18:49:16.811188 * Base: feda2000, Size: 1e000, Tag: 200
1345 18:49:16.818321 * Base: fede0000, Size: 1220000, Tag: 200
1346 18:49:16.821218 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1347 18:49:16.827938 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1348 18:49:16.834593 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1349 18:49:16.841144 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1350 18:49:16.847838 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1351 18:49:16.854566 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1352 18:49:16.861064 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1353 18:49:16.867524 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1354 18:49:16.874233 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1355 18:49:16.880857 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1356 18:49:16.887408 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1357 18:49:16.894633 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1358 18:49:16.901374 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1359 18:49:16.907396 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1360 18:49:16.913977 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1361 18:49:16.920418 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1362 18:49:16.926997 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1363 18:49:16.934071 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1364 18:49:16.940482 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1365 18:49:16.947341 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1366 18:49:16.953887 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1367 18:49:16.960164 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1368 18:49:16.967081 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1369 18:49:16.973616 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1370 18:49:16.983690 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1371 18:49:16.986886 PCI: 00:1d.0: Resource ranges:
1372 18:49:16.989961 * Base: 7fc00000, Size: 100000, Tag: 200
1373 18:49:16.996893 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1374 18:49:17.003113 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1375 18:49:17.009745 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1376 18:49:17.019714 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1377 18:49:17.026250 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1378 18:49:17.029553 Root Device assign_resources, bus 0 link: 0
1379 18:49:17.036314 DOMAIN: 0000 assign_resources, bus 0 link: 0
1380 18:49:17.042792 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1381 18:49:17.053002 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1382 18:49:17.059379 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1383 18:49:17.069163 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1384 18:49:17.072110 PCI: 00:04.0 assign_resources, bus 1 link: 0
1385 18:49:17.076306 PCI: 00:04.0 assign_resources, bus 1 link: 0
1386 18:49:17.086182 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1387 18:49:17.092883 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1388 18:49:17.102682 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1389 18:49:17.105902 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1390 18:49:17.112594 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1391 18:49:17.118858 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1392 18:49:17.121878 PCI: 00:14.0 assign_resources, bus 0 link: 0
1393 18:49:17.128673 PCI: 00:14.0 assign_resources, bus 0 link: 0
1394 18:49:17.135284 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1395 18:49:17.145400 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1396 18:49:17.151822 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1397 18:49:17.158420 PCI: 00:14.3 assign_resources, bus 0 link: 0
1398 18:49:17.161635 PCI: 00:14.3 assign_resources, bus 0 link: 0
1399 18:49:17.171717 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1400 18:49:17.175070 PCI: 00:15.0 assign_resources, bus 0 link: 0
1401 18:49:17.178414 PCI: 00:15.0 assign_resources, bus 0 link: 0
1402 18:49:17.188303 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1403 18:49:17.191493 PCI: 00:15.1 assign_resources, bus 0 link: 0
1404 18:49:17.198524 PCI: 00:15.1 assign_resources, bus 0 link: 0
1405 18:49:17.204901 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1406 18:49:17.214656 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1407 18:49:17.220969 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1408 18:49:17.231848 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1409 18:49:17.235032 PCI: 00:19.1 assign_resources, bus 0 link: 0
1410 18:49:17.237971 PCI: 00:19.1 assign_resources, bus 0 link: 0
1411 18:49:17.248047 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1412 18:49:17.257732 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1413 18:49:17.267986 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1414 18:49:17.271010 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1415 18:49:17.277980 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1416 18:49:17.287766 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1417 18:49:17.294175 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1418 18:49:17.300848 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1419 18:49:17.307748 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1420 18:49:17.314200 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1421 18:49:17.317637 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1422 18:49:17.323773 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1423 18:49:17.330775 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1424 18:49:17.333881 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1425 18:49:17.340578 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1426 18:49:17.343997 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1427 18:49:17.350046 LPC: Trying to open IO window from 800 size 1ff
1428 18:49:17.357029 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1429 18:49:17.367359 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1430 18:49:17.373694 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1431 18:49:17.380119 DOMAIN: 0000 assign_resources, bus 0 link: 0
1432 18:49:17.383591 Root Device assign_resources, bus 0 link: 0
1433 18:49:17.386798 Done setting resources.
1434 18:49:17.393666 Show resources in subtree (Root Device)...After assigning values.
1435 18:49:17.396705 Root Device child on link 0 DOMAIN: 0000
1436 18:49:17.399887 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1437 18:49:17.409762 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1438 18:49:17.420090 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1439 18:49:17.420600 PCI: 00:00.0
1440 18:49:17.430059 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1441 18:49:17.439730 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1442 18:49:17.449842 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1443 18:49:17.459919 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1444 18:49:17.470215 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1445 18:49:17.479532 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1446 18:49:17.486215 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1447 18:49:17.496348 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1448 18:49:17.506111 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1449 18:49:17.515973 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1450 18:49:17.525881 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1451 18:49:17.535922 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1452 18:49:17.542986 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1453 18:49:17.552520 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1454 18:49:17.562889 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1455 18:49:17.572625 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1456 18:49:17.582912 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1457 18:49:17.592299 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1458 18:49:17.598561 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1459 18:49:17.608914 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1460 18:49:17.612103 PCI: 00:02.0
1461 18:49:17.621797 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1462 18:49:17.632520 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1463 18:49:17.642071 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1464 18:49:17.645136 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1465 18:49:17.658471 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1466 18:49:17.658902 GENERIC: 0.0
1467 18:49:17.661634 PCI: 00:05.0
1468 18:49:17.671726 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1469 18:49:17.675463 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1470 18:49:17.678298 GENERIC: 0.0
1471 18:49:17.678795 PCI: 00:08.0
1472 18:49:17.688556 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1473 18:49:17.691772 PCI: 00:0a.0
1474 18:49:17.694729 PCI: 00:0d.0 child on link 0 USB0 port 0
1475 18:49:17.705029 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1476 18:49:17.711369 USB0 port 0 child on link 0 USB3 port 0
1477 18:49:17.711803 USB3 port 0
1478 18:49:17.714641 USB3 port 1
1479 18:49:17.715185 USB3 port 2
1480 18:49:17.718259 USB3 port 3
1481 18:49:17.721338 PCI: 00:14.0 child on link 0 USB0 port 0
1482 18:49:17.731505 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1483 18:49:17.738243 USB0 port 0 child on link 0 USB2 port 0
1484 18:49:17.738855 USB2 port 0
1485 18:49:17.741130 USB2 port 1
1486 18:49:17.741544 USB2 port 2
1487 18:49:17.744562 USB2 port 3
1488 18:49:17.744978 USB2 port 4
1489 18:49:17.748229 USB2 port 5
1490 18:49:17.748647 USB2 port 6
1491 18:49:17.751306 USB2 port 7
1492 18:49:17.751723 USB2 port 8
1493 18:49:17.754134 USB2 port 9
1494 18:49:17.754609 USB3 port 0
1495 18:49:17.757687 USB3 port 1
1496 18:49:17.760952 USB3 port 2
1497 18:49:17.761534 USB3 port 3
1498 18:49:17.764140 PCI: 00:14.2
1499 18:49:17.774560 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1500 18:49:17.784217 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1501 18:49:17.787822 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1502 18:49:17.797558 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1503 18:49:17.801203 GENERIC: 0.0
1504 18:49:17.804207 PCI: 00:15.0 child on link 0 I2C: 00:1a
1505 18:49:17.814658 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1506 18:49:17.817249 I2C: 00:1a
1507 18:49:17.817665 I2C: 00:31
1508 18:49:17.821053 I2C: 00:32
1509 18:49:17.824176 PCI: 00:15.1 child on link 0 I2C: 00:10
1510 18:49:17.834034 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1511 18:49:17.837663 I2C: 00:10
1512 18:49:17.838193 PCI: 00:15.2
1513 18:49:17.847376 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1514 18:49:17.850379 PCI: 00:15.3
1515 18:49:17.860647 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1516 18:49:17.861170 PCI: 00:16.0
1517 18:49:17.870577 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1518 18:49:17.873608 PCI: 00:19.0
1519 18:49:17.876876 PCI: 00:19.1 child on link 0 I2C: 00:15
1520 18:49:17.886745 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1521 18:49:17.890174 I2C: 00:15
1522 18:49:17.894169 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1523 18:49:17.903825 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1524 18:49:17.913373 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1525 18:49:17.926787 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1526 18:49:17.927233 GENERIC: 0.0
1527 18:49:17.930381 PCI: 01:00.0
1528 18:49:17.939954 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1529 18:49:17.949702 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1530 18:49:17.959644 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1531 18:49:17.962865 PCI: 00:1e.0
1532 18:49:17.972943 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1533 18:49:17.976345 PCI: 00:1e.2 child on link 0 SPI: 00
1534 18:49:17.986375 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1535 18:49:17.989446 SPI: 00
1536 18:49:17.992546 PCI: 00:1e.3 child on link 0 SPI: 00
1537 18:49:18.002796 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1538 18:49:18.003295 SPI: 00
1539 18:49:18.009608 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1540 18:49:18.015789 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1541 18:49:18.019932 PNP: 0c09.0
1542 18:49:18.029340 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1543 18:49:18.033173 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1544 18:49:18.043037 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1545 18:49:18.052575 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1546 18:49:18.056381 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1547 18:49:18.056841 GENERIC: 0.0
1548 18:49:18.059164 GENERIC: 1.0
1549 18:49:18.062994 PCI: 00:1f.3
1550 18:49:18.072137 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1551 18:49:18.082355 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1552 18:49:18.082881 PCI: 00:1f.5
1553 18:49:18.092021 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1554 18:49:18.098830 CPU_CLUSTER: 0 child on link 0 APIC: 00
1555 18:49:18.099237 APIC: 00
1556 18:49:18.102349 APIC: 01
1557 18:49:18.102799 APIC: 03
1558 18:49:18.103190 APIC: 05
1559 18:49:18.105501 APIC: 07
1560 18:49:18.105937 APIC: 06
1561 18:49:18.106370 APIC: 02
1562 18:49:18.108768 APIC: 04
1563 18:49:18.112230 Done allocating resources.
1564 18:49:18.118947 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1565 18:49:18.122142 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1566 18:49:18.125723 Configure GPIOs for I2S audio on UP4.
1567 18:49:18.133502 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1568 18:49:18.136666 Enabling resources...
1569 18:49:18.139906 PCI: 00:00.0 subsystem <- 8086/9a12
1570 18:49:18.143219 PCI: 00:00.0 cmd <- 06
1571 18:49:18.146462 PCI: 00:02.0 subsystem <- 8086/9a40
1572 18:49:18.149943 PCI: 00:02.0 cmd <- 03
1573 18:49:18.153398 PCI: 00:04.0 subsystem <- 8086/9a03
1574 18:49:18.156607 PCI: 00:04.0 cmd <- 02
1575 18:49:18.159967 PCI: 00:05.0 subsystem <- 8086/9a19
1576 18:49:18.160416 PCI: 00:05.0 cmd <- 02
1577 18:49:18.166822 PCI: 00:08.0 subsystem <- 8086/9a11
1578 18:49:18.167336 PCI: 00:08.0 cmd <- 06
1579 18:49:18.169995 PCI: 00:0d.0 subsystem <- 8086/9a13
1580 18:49:18.172979 PCI: 00:0d.0 cmd <- 02
1581 18:49:18.176752 PCI: 00:14.0 subsystem <- 8086/a0ed
1582 18:49:18.179736 PCI: 00:14.0 cmd <- 02
1583 18:49:18.183488 PCI: 00:14.2 subsystem <- 8086/a0ef
1584 18:49:18.186977 PCI: 00:14.2 cmd <- 02
1585 18:49:18.189876 PCI: 00:14.3 subsystem <- 8086/a0f0
1586 18:49:18.193178 PCI: 00:14.3 cmd <- 02
1587 18:49:18.196159 PCI: 00:15.0 subsystem <- 8086/a0e8
1588 18:49:18.199345 PCI: 00:15.0 cmd <- 02
1589 18:49:18.203325 PCI: 00:15.1 subsystem <- 8086/a0e9
1590 18:49:18.206015 PCI: 00:15.1 cmd <- 02
1591 18:49:18.209778 PCI: 00:15.2 subsystem <- 8086/a0ea
1592 18:49:18.210196 PCI: 00:15.2 cmd <- 02
1593 18:49:18.216491 PCI: 00:15.3 subsystem <- 8086/a0eb
1594 18:49:18.216907 PCI: 00:15.3 cmd <- 02
1595 18:49:18.219540 PCI: 00:16.0 subsystem <- 8086/a0e0
1596 18:49:18.222704 PCI: 00:16.0 cmd <- 02
1597 18:49:18.226021 PCI: 00:19.1 subsystem <- 8086/a0c6
1598 18:49:18.229471 PCI: 00:19.1 cmd <- 02
1599 18:49:18.232753 PCI: 00:1d.0 bridge ctrl <- 0013
1600 18:49:18.235829 PCI: 00:1d.0 subsystem <- 8086/a0b0
1601 18:49:18.239225 PCI: 00:1d.0 cmd <- 06
1602 18:49:18.242298 PCI: 00:1e.0 subsystem <- 8086/a0a8
1603 18:49:18.245800 PCI: 00:1e.0 cmd <- 06
1604 18:49:18.249397 PCI: 00:1e.2 subsystem <- 8086/a0aa
1605 18:49:18.252586 PCI: 00:1e.2 cmd <- 06
1606 18:49:18.255695 PCI: 00:1e.3 subsystem <- 8086/a0ab
1607 18:49:18.259372 PCI: 00:1e.3 cmd <- 02
1608 18:49:18.262582 PCI: 00:1f.0 subsystem <- 8086/a087
1609 18:49:18.262997 PCI: 00:1f.0 cmd <- 407
1610 18:49:18.268940 PCI: 00:1f.3 subsystem <- 8086/a0c8
1611 18:49:18.269424 PCI: 00:1f.3 cmd <- 02
1612 18:49:18.272643 PCI: 00:1f.5 subsystem <- 8086/a0a4
1613 18:49:18.275901 PCI: 00:1f.5 cmd <- 406
1614 18:49:18.280797 PCI: 01:00.0 cmd <- 02
1615 18:49:18.285333 done.
1616 18:49:18.288567 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1617 18:49:18.292137 Initializing devices...
1618 18:49:18.295198 Root Device init
1619 18:49:18.298561 Chrome EC: Set SMI mask to 0x0000000000000000
1620 18:49:18.305007 Chrome EC: clear events_b mask to 0x0000000000000000
1621 18:49:18.311957 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1622 18:49:18.315011 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1623 18:49:18.322302 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1624 18:49:18.328777 Chrome EC: Set WAKE mask to 0x0000000000000000
1625 18:49:18.331785 fw_config match found: DB_USB=USB3_ACTIVE
1626 18:49:18.338388 Configure Right Type-C port orientation for retimer
1627 18:49:18.341870 Root Device init finished in 42 msecs
1628 18:49:18.344933 PCI: 00:00.0 init
1629 18:49:18.348133 CPU TDP = 9 Watts
1630 18:49:18.348549 CPU PL1 = 9 Watts
1631 18:49:18.351764 CPU PL2 = 40 Watts
1632 18:49:18.352317 CPU PL4 = 83 Watts
1633 18:49:18.354855 PCI: 00:00.0 init finished in 8 msecs
1634 18:49:18.358401 PCI: 00:02.0 init
1635 18:49:18.361578 GMA: Found VBT in CBFS
1636 18:49:18.365011 GMA: Found valid VBT in CBFS
1637 18:49:18.368560 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1638 18:49:18.378510 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1639 18:49:18.381798 PCI: 00:02.0 init finished in 18 msecs
1640 18:49:18.384827 PCI: 00:05.0 init
1641 18:49:18.387959 PCI: 00:05.0 init finished in 0 msecs
1642 18:49:18.388448 PCI: 00:08.0 init
1643 18:49:18.394801 PCI: 00:08.0 init finished in 0 msecs
1644 18:49:18.395283 PCI: 00:14.0 init
1645 18:49:18.401153 PCI: 00:14.0 init finished in 0 msecs
1646 18:49:18.401634 PCI: 00:14.2 init
1647 18:49:18.404809 PCI: 00:14.2 init finished in 0 msecs
1648 18:49:18.408469 PCI: 00:15.0 init
1649 18:49:18.412114 I2C bus 0 version 0x3230302a
1650 18:49:18.415235 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1651 18:49:18.418247 PCI: 00:15.0 init finished in 6 msecs
1652 18:49:18.421481 PCI: 00:15.1 init
1653 18:49:18.424968 I2C bus 1 version 0x3230302a
1654 18:49:18.428115 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1655 18:49:18.431768 PCI: 00:15.1 init finished in 6 msecs
1656 18:49:18.434884 PCI: 00:15.2 init
1657 18:49:18.438670 I2C bus 2 version 0x3230302a
1658 18:49:18.441684 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1659 18:49:18.444728 PCI: 00:15.2 init finished in 6 msecs
1660 18:49:18.445162 PCI: 00:15.3 init
1661 18:49:18.447934 I2C bus 3 version 0x3230302a
1662 18:49:18.451100 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1663 18:49:18.457831 PCI: 00:15.3 init finished in 6 msecs
1664 18:49:18.458283 PCI: 00:16.0 init
1665 18:49:18.461387 PCI: 00:16.0 init finished in 0 msecs
1666 18:49:18.465031 PCI: 00:19.1 init
1667 18:49:18.468675 I2C bus 5 version 0x3230302a
1668 18:49:18.471938 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1669 18:49:18.475210 PCI: 00:19.1 init finished in 6 msecs
1670 18:49:18.478979 PCI: 00:1d.0 init
1671 18:49:18.482213 Initializing PCH PCIe bridge.
1672 18:49:18.485359 PCI: 00:1d.0 init finished in 3 msecs
1673 18:49:18.488383 PCI: 00:1f.0 init
1674 18:49:18.491395 IOAPIC: Initializing IOAPIC at 0xfec00000
1675 18:49:18.498510 IOAPIC: Bootstrap Processor Local APIC = 0x00
1676 18:49:18.499031 IOAPIC: ID = 0x02
1677 18:49:18.501391 IOAPIC: Dumping registers
1678 18:49:18.504965 reg 0x0000: 0x02000000
1679 18:49:18.505454 reg 0x0001: 0x00770020
1680 18:49:18.507904 reg 0x0002: 0x00000000
1681 18:49:18.511394 PCI: 00:1f.0 init finished in 21 msecs
1682 18:49:18.515178 PCI: 00:1f.2 init
1683 18:49:18.518417 Disabling ACPI via APMC.
1684 18:49:18.521638 APMC done.
1685 18:49:18.525115 PCI: 00:1f.2 init finished in 5 msecs
1686 18:49:18.536507 PCI: 01:00.0 init
1687 18:49:18.539520 PCI: 01:00.0 init finished in 0 msecs
1688 18:49:18.542782 PNP: 0c09.0 init
1689 18:49:18.545951 Google Chrome EC uptime: 8.411 seconds
1690 18:49:18.552538 Google Chrome AP resets since EC boot: 0
1691 18:49:18.556025 Google Chrome most recent AP reset causes:
1692 18:49:18.563056 Google Chrome EC reset flags at last EC boot: reset-pin
1693 18:49:18.566125 PNP: 0c09.0 init finished in 18 msecs
1694 18:49:18.570533 Devices initialized
1695 18:49:18.574138 Show all devs... After init.
1696 18:49:18.576841 Root Device: enabled 1
1697 18:49:18.577431 DOMAIN: 0000: enabled 1
1698 18:49:18.580482 CPU_CLUSTER: 0: enabled 1
1699 18:49:18.583815 PCI: 00:00.0: enabled 1
1700 18:49:18.587198 PCI: 00:02.0: enabled 1
1701 18:49:18.587613 PCI: 00:04.0: enabled 1
1702 18:49:18.590528 PCI: 00:05.0: enabled 1
1703 18:49:18.593613 PCI: 00:06.0: enabled 0
1704 18:49:18.597045 PCI: 00:07.0: enabled 0
1705 18:49:18.597463 PCI: 00:07.1: enabled 0
1706 18:49:18.600279 PCI: 00:07.2: enabled 0
1707 18:49:18.603554 PCI: 00:07.3: enabled 0
1708 18:49:18.607017 PCI: 00:08.0: enabled 1
1709 18:49:18.607547 PCI: 00:09.0: enabled 0
1710 18:49:18.610327 PCI: 00:0a.0: enabled 0
1711 18:49:18.613777 PCI: 00:0d.0: enabled 1
1712 18:49:18.616876 PCI: 00:0d.1: enabled 0
1713 18:49:18.617293 PCI: 00:0d.2: enabled 0
1714 18:49:18.620018 PCI: 00:0d.3: enabled 0
1715 18:49:18.623380 PCI: 00:0e.0: enabled 0
1716 18:49:18.623764 PCI: 00:10.2: enabled 1
1717 18:49:18.626948 PCI: 00:10.6: enabled 0
1718 18:49:18.630490 PCI: 00:10.7: enabled 0
1719 18:49:18.633525 PCI: 00:12.0: enabled 0
1720 18:49:18.634050 PCI: 00:12.6: enabled 0
1721 18:49:18.637099 PCI: 00:13.0: enabled 0
1722 18:49:18.640342 PCI: 00:14.0: enabled 1
1723 18:49:18.643380 PCI: 00:14.1: enabled 0
1724 18:49:18.643796 PCI: 00:14.2: enabled 1
1725 18:49:18.647277 PCI: 00:14.3: enabled 1
1726 18:49:18.650053 PCI: 00:15.0: enabled 1
1727 18:49:18.653801 PCI: 00:15.1: enabled 1
1728 18:49:18.654216 PCI: 00:15.2: enabled 1
1729 18:49:18.657036 PCI: 00:15.3: enabled 1
1730 18:49:18.659847 PCI: 00:16.0: enabled 1
1731 18:49:18.660301 PCI: 00:16.1: enabled 0
1732 18:49:18.663542 PCI: 00:16.2: enabled 0
1733 18:49:18.666826 PCI: 00:16.3: enabled 0
1734 18:49:18.670213 PCI: 00:16.4: enabled 0
1735 18:49:18.670735 PCI: 00:16.5: enabled 0
1736 18:49:18.673242 PCI: 00:17.0: enabled 0
1737 18:49:18.676431 PCI: 00:19.0: enabled 0
1738 18:49:18.679659 PCI: 00:19.1: enabled 1
1739 18:49:18.680093 PCI: 00:19.2: enabled 0
1740 18:49:18.683056 PCI: 00:1c.0: enabled 1
1741 18:49:18.686587 PCI: 00:1c.1: enabled 0
1742 18:49:18.689871 PCI: 00:1c.2: enabled 0
1743 18:49:18.690370 PCI: 00:1c.3: enabled 0
1744 18:49:18.693290 PCI: 00:1c.4: enabled 0
1745 18:49:18.696401 PCI: 00:1c.5: enabled 0
1746 18:49:18.699857 PCI: 00:1c.6: enabled 1
1747 18:49:18.700320 PCI: 00:1c.7: enabled 0
1748 18:49:18.703176 PCI: 00:1d.0: enabled 1
1749 18:49:18.706793 PCI: 00:1d.1: enabled 0
1750 18:49:18.707293 PCI: 00:1d.2: enabled 1
1751 18:49:18.710036 PCI: 00:1d.3: enabled 0
1752 18:49:18.713255 PCI: 00:1e.0: enabled 1
1753 18:49:18.716607 PCI: 00:1e.1: enabled 0
1754 18:49:18.717023 PCI: 00:1e.2: enabled 1
1755 18:49:18.719992 PCI: 00:1e.3: enabled 1
1756 18:49:18.723135 PCI: 00:1f.0: enabled 1
1757 18:49:18.726157 PCI: 00:1f.1: enabled 0
1758 18:49:18.726571 PCI: 00:1f.2: enabled 1
1759 18:49:18.729922 PCI: 00:1f.3: enabled 1
1760 18:49:18.733097 PCI: 00:1f.4: enabled 0
1761 18:49:18.736334 PCI: 00:1f.5: enabled 1
1762 18:49:18.736748 PCI: 00:1f.6: enabled 0
1763 18:49:18.739640 PCI: 00:1f.7: enabled 0
1764 18:49:18.742752 APIC: 00: enabled 1
1765 18:49:18.743410 GENERIC: 0.0: enabled 1
1766 18:49:18.746751 GENERIC: 0.0: enabled 1
1767 18:49:18.750019 GENERIC: 1.0: enabled 1
1768 18:49:18.753095 GENERIC: 0.0: enabled 1
1769 18:49:18.753507 GENERIC: 1.0: enabled 1
1770 18:49:18.756309 USB0 port 0: enabled 1
1771 18:49:18.759945 GENERIC: 0.0: enabled 1
1772 18:49:18.760409 USB0 port 0: enabled 1
1773 18:49:18.762756 GENERIC: 0.0: enabled 1
1774 18:49:18.766259 I2C: 00:1a: enabled 1
1775 18:49:18.769774 I2C: 00:31: enabled 1
1776 18:49:18.770226 I2C: 00:32: enabled 1
1777 18:49:18.772761 I2C: 00:10: enabled 1
1778 18:49:18.776135 I2C: 00:15: enabled 1
1779 18:49:18.776552 GENERIC: 0.0: enabled 0
1780 18:49:18.779295 GENERIC: 1.0: enabled 0
1781 18:49:18.783049 GENERIC: 0.0: enabled 1
1782 18:49:18.783459 SPI: 00: enabled 1
1783 18:49:18.786280 SPI: 00: enabled 1
1784 18:49:18.789442 PNP: 0c09.0: enabled 1
1785 18:49:18.789895 GENERIC: 0.0: enabled 1
1786 18:49:18.792792 USB3 port 0: enabled 1
1787 18:49:18.796155 USB3 port 1: enabled 1
1788 18:49:18.799182 USB3 port 2: enabled 0
1789 18:49:18.799607 USB3 port 3: enabled 0
1790 18:49:18.802600 USB2 port 0: enabled 0
1791 18:49:18.806050 USB2 port 1: enabled 1
1792 18:49:18.806466 USB2 port 2: enabled 1
1793 18:49:18.809165 USB2 port 3: enabled 0
1794 18:49:18.812472 USB2 port 4: enabled 1
1795 18:49:18.815594 USB2 port 5: enabled 0
1796 18:49:18.816006 USB2 port 6: enabled 0
1797 18:49:18.819367 USB2 port 7: enabled 0
1798 18:49:18.822667 USB2 port 8: enabled 0
1799 18:49:18.823081 USB2 port 9: enabled 0
1800 18:49:18.825597 USB3 port 0: enabled 0
1801 18:49:18.829085 USB3 port 1: enabled 1
1802 18:49:18.829498 USB3 port 2: enabled 0
1803 18:49:18.832410 USB3 port 3: enabled 0
1804 18:49:18.835534 GENERIC: 0.0: enabled 1
1805 18:49:18.838842 GENERIC: 1.0: enabled 1
1806 18:49:18.839322 APIC: 01: enabled 1
1807 18:49:18.842153 APIC: 03: enabled 1
1808 18:49:18.842629 APIC: 05: enabled 1
1809 18:49:18.845746 APIC: 07: enabled 1
1810 18:49:18.849364 APIC: 06: enabled 1
1811 18:49:18.849777 APIC: 02: enabled 1
1812 18:49:18.852309 APIC: 04: enabled 1
1813 18:49:18.855763 PCI: 01:00.0: enabled 1
1814 18:49:18.859583 BS: BS_DEV_INIT run times (exec / console): 29 / 536 ms
1815 18:49:18.866174 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1816 18:49:18.868796 ELOG: NV offset 0xf30000 size 0x1000
1817 18:49:18.875720 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1818 18:49:18.882571 ELOG: Event(17) added with size 13 at 2024-03-01 18:49:18 UTC
1819 18:49:18.889257 ELOG: Event(92) added with size 9 at 2024-03-01 18:49:18 UTC
1820 18:49:18.895629 ELOG: Event(93) added with size 9 at 2024-03-01 18:49:18 UTC
1821 18:49:18.902670 ELOG: Event(9E) added with size 10 at 2024-03-01 18:49:18 UTC
1822 18:49:18.908507 ELOG: Event(9F) added with size 14 at 2024-03-01 18:49:18 UTC
1823 18:49:18.915227 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1824 18:49:18.918704 ELOG: Event(A1) added with size 10 at 2024-03-01 18:49:18 UTC
1825 18:49:18.928551 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1826 18:49:18.934886 ELOG: Event(A0) added with size 9 at 2024-03-01 18:49:18 UTC
1827 18:49:18.938878 elog_add_boot_reason: Logged dev mode boot
1828 18:49:18.945222 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1829 18:49:18.945640 Finalize devices...
1830 18:49:18.948200 Devices finalized
1831 18:49:18.954698 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1832 18:49:18.957982 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1833 18:49:18.964683 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1834 18:49:18.968193 ME: HFSTS1 : 0x80030055
1835 18:49:18.974977 ME: HFSTS2 : 0x30280116
1836 18:49:18.978163 ME: HFSTS3 : 0x00000050
1837 18:49:18.981351 ME: HFSTS4 : 0x00004000
1838 18:49:18.988481 ME: HFSTS5 : 0x00000000
1839 18:49:18.991665 ME: HFSTS6 : 0x00400006
1840 18:49:18.994822 ME: Manufacturing Mode : YES
1841 18:49:18.998025 ME: SPI Protection Mode Enabled : NO
1842 18:49:19.001572 ME: FW Partition Table : OK
1843 18:49:19.007785 ME: Bringup Loader Failure : NO
1844 18:49:19.011619 ME: Firmware Init Complete : NO
1845 18:49:19.014471 ME: Boot Options Present : NO
1846 18:49:19.017731 ME: Update In Progress : NO
1847 18:49:19.021414 ME: D0i3 Support : YES
1848 18:49:19.024425 ME: Low Power State Enabled : NO
1849 18:49:19.028006 ME: CPU Replaced : YES
1850 18:49:19.034514 ME: CPU Replacement Valid : YES
1851 18:49:19.038071 ME: Current Working State : 5
1852 18:49:19.041457 ME: Current Operation State : 1
1853 18:49:19.044359 ME: Current Operation Mode : 3
1854 18:49:19.047874 ME: Error Code : 0
1855 18:49:19.051164 ME: Enhanced Debug Mode : NO
1856 18:49:19.054322 ME: CPU Debug Disabled : YES
1857 18:49:19.057976 ME: TXT Support : NO
1858 18:49:19.064394 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1859 18:49:19.071398 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1860 18:49:19.074411 CBFS: 'fallback/slic' not found.
1861 18:49:19.081160 ACPI: Writing ACPI tables at 76b01000.
1862 18:49:19.081671 ACPI: * FACS
1863 18:49:19.084187 ACPI: * DSDT
1864 18:49:19.087360 Ramoops buffer: 0x100000@0x76a00000.
1865 18:49:19.091055 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1866 18:49:19.097525 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1867 18:49:19.101268 Google Chrome EC: version:
1868 18:49:19.103967 ro: voema_v2.0.10114-a447f03e46
1869 18:49:19.108103 rw: voema_v2.0.10114-a447f03e46
1870 18:49:19.108622 running image: 1
1871 18:49:19.113729 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1872 18:49:19.118572 ACPI: * FADT
1873 18:49:19.118992 SCI is IRQ9
1874 18:49:19.125199 ACPI: added table 1/32, length now 40
1875 18:49:19.125713 ACPI: * SSDT
1876 18:49:19.128217 Found 1 CPU(s) with 8 core(s) each.
1877 18:49:19.134796 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1878 18:49:19.138204 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1879 18:49:19.142230 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1880 18:49:19.144534 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1881 18:49:19.151441 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1882 18:49:19.157911 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1883 18:49:19.161648 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1884 18:49:19.168302 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1885 18:49:19.174582 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1886 18:49:19.178269 \_SB.PCI0.RP09: Added StorageD3Enable property
1887 18:49:19.184436 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1888 18:49:19.188426 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1889 18:49:19.194572 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1890 18:49:19.198053 PS2K: Passing 80 keymaps to kernel
1891 18:49:19.204508 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1892 18:49:19.211159 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1893 18:49:19.217877 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1894 18:49:19.224652 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1895 18:49:19.231543 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1896 18:49:19.238088 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1897 18:49:19.244248 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1898 18:49:19.251067 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1899 18:49:19.254248 ACPI: added table 2/32, length now 44
1900 18:49:19.254706 ACPI: * MCFG
1901 18:49:19.257957 ACPI: added table 3/32, length now 48
1902 18:49:19.261050 ACPI: * TPM2
1903 18:49:19.264310 TPM2 log created at 0x769f0000
1904 18:49:19.267452 ACPI: added table 4/32, length now 52
1905 18:49:19.267867 ACPI: * MADT
1906 18:49:19.270963 SCI is IRQ9
1907 18:49:19.274548 ACPI: added table 5/32, length now 56
1908 18:49:19.277321 current = 76b09850
1909 18:49:19.277864 ACPI: * DMAR
1910 18:49:19.280775 ACPI: added table 6/32, length now 60
1911 18:49:19.284521 ACPI: added table 7/32, length now 64
1912 18:49:19.287731 ACPI: * HPET
1913 18:49:19.290966 ACPI: added table 8/32, length now 68
1914 18:49:19.291392 ACPI: done.
1915 18:49:19.294135 ACPI tables: 35216 bytes.
1916 18:49:19.297392 smbios_write_tables: 769ef000
1917 18:49:19.300769 EC returned error result code 3
1918 18:49:19.304349 Couldn't obtain OEM name from CBI
1919 18:49:19.307106 Create SMBIOS type 16
1920 18:49:19.310344 Create SMBIOS type 17
1921 18:49:19.314163 GENERIC: 0.0 (WIFI Device)
1922 18:49:19.314621 SMBIOS tables: 1750 bytes.
1923 18:49:19.320981 Writing table forward entry at 0x00000500
1924 18:49:19.327544 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1925 18:49:19.330411 Writing coreboot table at 0x76b25000
1926 18:49:19.333759 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1927 18:49:19.340241 1. 0000000000001000-000000000009ffff: RAM
1928 18:49:19.343899 2. 00000000000a0000-00000000000fffff: RESERVED
1929 18:49:19.347148 3. 0000000000100000-00000000769eefff: RAM
1930 18:49:19.353432 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1931 18:49:19.359917 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1932 18:49:19.366567 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1933 18:49:19.370262 7. 0000000077000000-000000007fbfffff: RESERVED
1934 18:49:19.373253 8. 00000000c0000000-00000000cfffffff: RESERVED
1935 18:49:19.380193 9. 00000000f8000000-00000000f9ffffff: RESERVED
1936 18:49:19.383521 10. 00000000fb000000-00000000fb000fff: RESERVED
1937 18:49:19.390122 11. 00000000fe000000-00000000fe00ffff: RESERVED
1938 18:49:19.393567 12. 00000000fed80000-00000000fed87fff: RESERVED
1939 18:49:19.400152 13. 00000000fed90000-00000000fed92fff: RESERVED
1940 18:49:19.403511 14. 00000000feda0000-00000000feda1fff: RESERVED
1941 18:49:19.409810 15. 00000000fedc0000-00000000feddffff: RESERVED
1942 18:49:19.413606 16. 0000000100000000-00000002803fffff: RAM
1943 18:49:19.416747 Passing 4 GPIOs to payload:
1944 18:49:19.419862 NAME | PORT | POLARITY | VALUE
1945 18:49:19.427206 lid | undefined | high | high
1946 18:49:19.430244 power | undefined | high | low
1947 18:49:19.436820 oprom | undefined | high | low
1948 18:49:19.443232 EC in RW | 0x000000e5 | high | low
1949 18:49:19.450019 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 933d
1950 18:49:19.450436 coreboot table: 1576 bytes.
1951 18:49:19.453331 IMD ROOT 0. 0x76fff000 0x00001000
1952 18:49:19.459980 IMD SMALL 1. 0x76ffe000 0x00001000
1953 18:49:19.463048 FSP MEMORY 2. 0x76c4e000 0x003b0000
1954 18:49:19.466691 VPD 3. 0x76c4d000 0x00000367
1955 18:49:19.470004 RO MCACHE 4. 0x76c4c000 0x00000fdc
1956 18:49:19.473580 CONSOLE 5. 0x76c2c000 0x00020000
1957 18:49:19.476663 FMAP 6. 0x76c2b000 0x00000578
1958 18:49:19.480344 TIME STAMP 7. 0x76c2a000 0x00000910
1959 18:49:19.483259 VBOOT WORK 8. 0x76c16000 0x00014000
1960 18:49:19.489624 ROMSTG STCK 9. 0x76c15000 0x00001000
1961 18:49:19.493354 AFTER CAR 10. 0x76c0a000 0x0000b000
1962 18:49:19.496145 RAMSTAGE 11. 0x76b97000 0x00073000
1963 18:49:19.499538 REFCODE 12. 0x76b42000 0x00055000
1964 18:49:19.502869 SMM BACKUP 13. 0x76b32000 0x00010000
1965 18:49:19.506161 4f444749 14. 0x76b30000 0x00002000
1966 18:49:19.509563 EXT VBT15. 0x76b2d000 0x0000219f
1967 18:49:19.512752 COREBOOT 16. 0x76b25000 0x00008000
1968 18:49:19.516167 ACPI 17. 0x76b01000 0x00024000
1969 18:49:19.522807 ACPI GNVS 18. 0x76b00000 0x00001000
1970 18:49:19.526344 RAMOOPS 19. 0x76a00000 0x00100000
1971 18:49:19.529488 TPM2 TCGLOG20. 0x769f0000 0x00010000
1972 18:49:19.532728 SMBIOS 21. 0x769ef000 0x00000800
1973 18:49:19.535999 IMD small region:
1974 18:49:19.539894 IMD ROOT 0. 0x76ffec00 0x00000400
1975 18:49:19.543144 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1976 18:49:19.546223 POWER STATE 2. 0x76ffeb80 0x00000044
1977 18:49:19.549323 ROMSTAGE 3. 0x76ffeb60 0x00000004
1978 18:49:19.552644 MEM INFO 4. 0x76ffe980 0x000001e0
1979 18:49:19.559596 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1980 18:49:19.562948 MTRR: Physical address space:
1981 18:49:19.569052 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1982 18:49:19.575764 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1983 18:49:19.583122 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1984 18:49:19.589301 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1985 18:49:19.595970 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1986 18:49:19.599037 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1987 18:49:19.605657 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1988 18:49:19.612089 MTRR: Fixed MSR 0x250 0x0606060606060606
1989 18:49:19.615867 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 18:49:19.618787 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 18:49:19.622063 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 18:49:19.629119 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 18:49:19.632031 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 18:49:19.635806 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 18:49:19.638915 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 18:49:19.642218 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 18:49:19.649121 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 18:49:19.651763 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 18:49:19.655547 call enable_fixed_mtrr()
2000 18:49:19.658881 CPU physical address size: 39 bits
2001 18:49:19.662117 MTRR: default type WB/UC MTRR counts: 6/6.
2002 18:49:19.669080 MTRR: UC selected as default type.
2003 18:49:19.672505 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2004 18:49:19.678769 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2005 18:49:19.685653 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2006 18:49:19.692174 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2007 18:49:19.698849 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2008 18:49:19.705478 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2009 18:49:19.705993
2010 18:49:19.708666 MTRR check
2011 18:49:19.709243 Fixed MTRRs : Enabled
2012 18:49:19.711748 Variable MTRRs: Enabled
2013 18:49:19.712207
2014 18:49:19.714869 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 18:49:19.721991 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 18:49:19.725287 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 18:49:19.728617 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 18:49:19.731536 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 18:49:19.738499 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 18:49:19.741983 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 18:49:19.745053 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 18:49:19.748006 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 18:49:19.755023 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 18:49:19.758082 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 18:49:19.764746 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2026 18:49:19.768102 call enable_fixed_mtrr()
2027 18:49:19.771985 Checking cr50 for pending updates
2028 18:49:19.775852 CPU physical address size: 39 bits
2029 18:49:19.779684 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 18:49:19.782062 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 18:49:19.785455 MTRR: Fixed MSR 0x258 0x0606060606060606
2032 18:49:19.789045 MTRR: Fixed MSR 0x259 0x0000000000000000
2033 18:49:19.795567 MTRR: Fixed MSR 0x268 0x0606060606060606
2034 18:49:19.799098 MTRR: Fixed MSR 0x269 0x0606060606060606
2035 18:49:19.802215 MTRR: Fixed MSR 0x26a 0x0606060606060606
2036 18:49:19.805869 MTRR: Fixed MSR 0x26b 0x0606060606060606
2037 18:49:19.812016 MTRR: Fixed MSR 0x26c 0x0606060606060606
2038 18:49:19.815198 MTRR: Fixed MSR 0x26d 0x0606060606060606
2039 18:49:19.818613 MTRR: Fixed MSR 0x26e 0x0606060606060606
2040 18:49:19.821812 MTRR: Fixed MSR 0x26f 0x0606060606060606
2041 18:49:19.829433 MTRR: Fixed MSR 0x258 0x0606060606060606
2042 18:49:19.832682 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 18:49:19.835908 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 18:49:19.839251 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 18:49:19.846131 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 18:49:19.849380 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 18:49:19.852574 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 18:49:19.855887 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 18:49:19.862498 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 18:49:19.865729 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 18:49:19.869105 call enable_fixed_mtrr()
2052 18:49:19.872648 call enable_fixed_mtrr()
2053 18:49:19.875763 MTRR: Fixed MSR 0x250 0x0606060606060606
2054 18:49:19.879119 MTRR: Fixed MSR 0x250 0x0606060606060606
2055 18:49:19.882780 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 18:49:19.889525 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 18:49:19.892221 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 18:49:19.895707 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 18:49:19.899407 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 18:49:19.906208 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 18:49:19.909028 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 18:49:19.911973 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 18:49:19.915552 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 18:49:19.919010 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 18:49:19.926099 MTRR: Fixed MSR 0x258 0x0606060606060606
2066 18:49:19.928504 call enable_fixed_mtrr()
2067 18:49:19.932399 MTRR: Fixed MSR 0x259 0x0000000000000000
2068 18:49:19.935640 MTRR: Fixed MSR 0x268 0x0606060606060606
2069 18:49:19.941824 MTRR: Fixed MSR 0x269 0x0606060606060606
2070 18:49:19.945445 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 18:49:19.948575 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 18:49:19.951698 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 18:49:19.955249 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 18:49:19.962258 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 18:49:19.965670 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 18:49:19.968564 CPU physical address size: 39 bits
2077 18:49:19.972434 call enable_fixed_mtrr()
2078 18:49:19.975753 CPU physical address size: 39 bits
2079 18:49:19.979692 CPU physical address size: 39 bits
2080 18:49:19.986018 MTRR: Fixed MSR 0x250 0x0606060606060606
2081 18:49:19.990009 MTRR: Fixed MSR 0x250 0x0606060606060606
2082 18:49:19.992993 MTRR: Fixed MSR 0x258 0x0606060606060606
2083 18:49:19.996618 MTRR: Fixed MSR 0x259 0x0000000000000000
2084 18:49:20.003373 MTRR: Fixed MSR 0x268 0x0606060606060606
2085 18:49:20.006623 MTRR: Fixed MSR 0x269 0x0606060606060606
2086 18:49:20.009690 MTRR: Fixed MSR 0x26a 0x0606060606060606
2087 18:49:20.012763 MTRR: Fixed MSR 0x26b 0x0606060606060606
2088 18:49:20.019501 MTRR: Fixed MSR 0x26c 0x0606060606060606
2089 18:49:20.023491 MTRR: Fixed MSR 0x26d 0x0606060606060606
2090 18:49:20.026244 MTRR: Fixed MSR 0x26e 0x0606060606060606
2091 18:49:20.029336 MTRR: Fixed MSR 0x26f 0x0606060606060606
2092 18:49:20.036756 MTRR: Fixed MSR 0x258 0x0606060606060606
2093 18:49:20.040196 MTRR: Fixed MSR 0x259 0x0000000000000000
2094 18:49:20.043370 MTRR: Fixed MSR 0x268 0x0606060606060606
2095 18:49:20.046869 MTRR: Fixed MSR 0x269 0x0606060606060606
2096 18:49:20.053123 MTRR: Fixed MSR 0x26a 0x0606060606060606
2097 18:49:20.056282 MTRR: Fixed MSR 0x26b 0x0606060606060606
2098 18:49:20.059794 MTRR: Fixed MSR 0x26c 0x0606060606060606
2099 18:49:20.063222 MTRR: Fixed MSR 0x26d 0x0606060606060606
2100 18:49:20.069844 MTRR: Fixed MSR 0x26e 0x0606060606060606
2101 18:49:20.072978 MTRR: Fixed MSR 0x26f 0x0606060606060606
2102 18:49:20.076572 call enable_fixed_mtrr()
2103 18:49:20.080296 call enable_fixed_mtrr()
2104 18:49:20.080891 Reading cr50 TPM mode
2105 18:49:20.084133 CPU physical address size: 39 bits
2106 18:49:20.087166 CPU physical address size: 39 bits
2107 18:49:20.094002 BS: BS_PAYLOAD_LOAD entry times (exec / console): 315 / 6 ms
2108 18:49:20.097773 CPU physical address size: 39 bits
2109 18:49:20.107560 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2110 18:49:20.110378 Checking segment from ROM address 0xffc02b38
2111 18:49:20.113904 Checking segment from ROM address 0xffc02b54
2112 18:49:20.120400 Loading segment from ROM address 0xffc02b38
2113 18:49:20.120821 code (compression=0)
2114 18:49:20.130420 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2115 18:49:20.140516 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2116 18:49:20.141012 it's not compressed!
2117 18:49:20.279866 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2118 18:49:20.286817 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2119 18:49:20.293124 Loading segment from ROM address 0xffc02b54
2120 18:49:20.293549 Entry Point 0x30000000
2121 18:49:20.296801 Loaded segments
2122 18:49:20.303000 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2123 18:49:20.346141 Finalizing chipset.
2124 18:49:20.349471 Finalizing SMM.
2125 18:49:20.349893 APMC done.
2126 18:49:20.356239 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2127 18:49:20.359156 mp_park_aps done after 0 msecs.
2128 18:49:20.363114 Jumping to boot code at 0x30000000(0x76b25000)
2129 18:49:20.372697 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2130 18:49:20.373222
2131 18:49:20.373562
2132 18:49:20.373878
2133 18:49:20.376159 Starting depthcharge on Voema...
2134 18:49:20.376579
2135 18:49:20.377729 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2136 18:49:20.378248 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2137 18:49:20.378650 Setting prompt string to ['volteer:']
2138 18:49:20.379069 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2139 18:49:20.386030 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2140 18:49:20.386458
2141 18:49:20.393004 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2142 18:49:20.393429
2143 18:49:20.396232 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2144 18:49:20.399850
2145 18:49:20.402871 Failed to find eMMC card reader
2146 18:49:20.403314
2147 18:49:20.403652 Wipe memory regions:
2148 18:49:20.404195
2149 18:49:20.409538 [0x00000000001000, 0x000000000a0000)
2150 18:49:20.409992
2151 18:49:20.413170 [0x00000000100000, 0x00000030000000)
2152 18:49:20.437852
2153 18:49:20.440993 [0x00000032662db0, 0x000000769ef000)
2154 18:49:20.476817
2155 18:49:20.480096 [0x00000100000000, 0x00000280400000)
2156 18:49:20.681759
2157 18:49:20.684552 ec_init: CrosEC protocol v3 supported (256, 256)
2158 18:49:21.115300
2159 18:49:21.115778 R8152: Initializing
2160 18:49:21.116157
2161 18:49:21.118634 Version 6 (ocp_data = 5c30)
2162 18:49:21.119084
2163 18:49:21.122342 R8152: Done initializing
2164 18:49:21.122807
2165 18:49:21.125347 Adding net device
2166 18:49:21.426983
2167 18:49:21.430198 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2168 18:49:21.430651
2169 18:49:21.431032
2170 18:49:21.431377
2171 18:49:21.433834 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 18:49:21.535110 volteer: tftpboot 192.168.201.1 12909559/tftp-deploy-7p62gn9j/kernel/bzImage 12909559/tftp-deploy-7p62gn9j/kernel/cmdline 12909559/tftp-deploy-7p62gn9j/ramdisk/ramdisk.cpio.gz
2174 18:49:21.535712 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 18:49:21.536140 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2176 18:49:21.540506 tftpboot 192.168.201.1 12909559/tftp-deploy-7p62gn9j/kernel/bzIploy-7p62gn9j/kernel/cmdline 12909559/tftp-deploy-7p62gn9j/ramdisk/ramdisk.cpio.gz
2177 18:49:21.540969
2178 18:49:21.541308 Waiting for link
2179 18:49:21.743354
2180 18:49:21.743844 done.
2181 18:49:21.744223
2182 18:49:21.744541 MAC: 00:24:32:30:77:76
2183 18:49:21.744892
2184 18:49:21.747069 Sending DHCP discover... done.
2185 18:49:21.747486
2186 18:49:21.750259 Waiting for reply... done.
2187 18:49:21.750932
2188 18:49:21.753272 Sending DHCP request... done.
2189 18:49:21.753688
2190 18:49:21.759979 Waiting for reply... done.
2191 18:49:21.760576
2192 18:49:21.761009 My ip is 192.168.201.16
2193 18:49:21.761328
2194 18:49:21.763319 The DHCP server ip is 192.168.201.1
2195 18:49:21.766692
2196 18:49:21.769950 TFTP server IP predefined by user: 192.168.201.1
2197 18:49:21.770371
2198 18:49:21.776637 Bootfile predefined by user: 12909559/tftp-deploy-7p62gn9j/kernel/bzImage
2199 18:49:21.777074
2200 18:49:21.779771 Sending tftp read request... done.
2201 18:49:21.780231
2202 18:49:21.788621 Waiting for the transfer...
2203 18:49:21.789044
2204 18:49:22.459960 00000000 ################################################################
2205 18:49:22.460581
2206 18:49:23.143152 00080000 ################################################################
2207 18:49:23.143761
2208 18:49:23.824170 00100000 ################################################################
2209 18:49:23.824680
2210 18:49:24.526730 00180000 ################################################################
2211 18:49:24.527411
2212 18:49:25.189124 00200000 ################################################################
2213 18:49:25.189258
2214 18:49:25.768889 00280000 ################################################################
2215 18:49:25.769027
2216 18:49:26.355024 00300000 ################################################################
2217 18:49:26.355160
2218 18:49:26.967074 00380000 ################################################################
2219 18:49:26.967236
2220 18:49:27.519701 00400000 ################################################################
2221 18:49:27.519830
2222 18:49:28.107027 00480000 ################################################################
2223 18:49:28.107160
2224 18:49:28.676298 00500000 ################################################################
2225 18:49:28.676432
2226 18:49:29.249032 00580000 ################################################################
2227 18:49:29.249171
2228 18:49:29.813505 00600000 ################################################################
2229 18:49:29.813643
2230 18:49:30.383395 00680000 ################################################################
2231 18:49:30.383534
2232 18:49:30.958563 00700000 ################################################################
2233 18:49:30.958710
2234 18:49:31.534395 00780000 ################################################################
2235 18:49:31.534540
2236 18:49:32.118285 00800000 ################################################################
2237 18:49:32.118427
2238 18:49:32.708363 00880000 ################################################################
2239 18:49:32.708507
2240 18:49:33.259041 00900000 ################################################################
2241 18:49:33.259183
2242 18:49:33.806533 00980000 ################################################################
2243 18:49:33.806676
2244 18:49:34.338161 00a00000 ################################################################
2245 18:49:34.338343
2246 18:49:34.894206 00a80000 ################################################################
2247 18:49:34.894359
2248 18:49:35.434118 00b00000 ################################################################
2249 18:49:35.434259
2250 18:49:35.731811 00b80000 #################################### done.
2251 18:49:35.731979
2252 18:49:35.735688 The bootfile was 12349440 bytes long.
2253 18:49:35.735797
2254 18:49:35.738811 Sending tftp read request... done.
2255 18:49:35.738894
2256 18:49:35.741980 Waiting for the transfer...
2257 18:49:35.742064
2258 18:49:36.293503 00000000 ################################################################
2259 18:49:36.293639
2260 18:49:36.829569 00080000 ################################################################
2261 18:49:36.829705
2262 18:49:37.367166 00100000 ################################################################
2263 18:49:37.367304
2264 18:49:37.908575 00180000 ################################################################
2265 18:49:37.908717
2266 18:49:38.458160 00200000 ################################################################
2267 18:49:38.458303
2268 18:49:39.006545 00280000 ################################################################
2269 18:49:39.006682
2270 18:49:39.553139 00300000 ################################################################
2271 18:49:39.553289
2272 18:49:40.101736 00380000 ################################################################
2273 18:49:40.101902
2274 18:49:40.633485 00400000 ################################################################
2275 18:49:40.633658
2276 18:49:41.179872 00480000 ################################################################
2277 18:49:41.180019
2278 18:49:41.721177 00500000 ################################################################
2279 18:49:41.721314
2280 18:49:42.133711 00580000 ################################################ done.
2281 18:49:42.133850
2282 18:49:42.136766 Sending tftp read request... done.
2283 18:49:42.136844
2284 18:49:42.140412 Waiting for the transfer...
2285 18:49:42.140491
2286 18:49:42.140556 00000000 # done.
2287 18:49:42.140626
2288 18:49:42.150057 Command line loaded dynamically from TFTP file: 12909559/tftp-deploy-7p62gn9j/kernel/cmdline
2289 18:49:42.150140
2290 18:49:42.172993 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12909559/extract-nfsrootfs-kdg68mcp,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2291 18:49:42.179450
2292 18:49:42.183050 Shutting down all USB controllers.
2293 18:49:42.183153
2294 18:49:42.183248 Removing current net device
2295 18:49:42.183325
2296 18:49:42.186084 Finalizing coreboot
2297 18:49:42.186157
2298 18:49:42.193063 Exiting depthcharge with code 4 at timestamp: 30463476
2299 18:49:42.193147
2300 18:49:42.193215
2301 18:49:42.193281 Starting kernel ...
2302 18:49:42.193340
2303 18:49:42.193397
2304 18:49:42.193779 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2305 18:49:42.193874 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2306 18:49:42.193950 Setting prompt string to ['Linux version [0-9]']
2307 18:49:42.194020 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2308 18:49:42.194087 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2310 18:54:05.194114 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2312 18:54:05.194324 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2314 18:54:05.194484 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2317 18:54:05.194739 end: 2 depthcharge-action (duration 00:05:00) [common]
2319 18:54:05.194963 Cleaning after the job
2320 18:54:05.195054 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909559/tftp-deploy-7p62gn9j/ramdisk
2321 18:54:05.196015 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909559/tftp-deploy-7p62gn9j/kernel
2322 18:54:05.197969 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909559/tftp-deploy-7p62gn9j/nfsrootfs
2323 18:54:05.274864 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909559/tftp-deploy-7p62gn9j/modules
2324 18:54:05.275578 start: 5.1 power-off (timeout 00:00:30) [common]
2325 18:54:05.275768 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2326 18:54:05.352155 >> Command sent successfully.
2327 18:54:05.354547 Returned 0 in 0 seconds
2328 18:54:05.454918 end: 5.1 power-off (duration 00:00:00) [common]
2330 18:54:05.455239 start: 5.2 read-feedback (timeout 00:10:00) [common]
2331 18:54:05.455514 Listened to connection for namespace 'common' for up to 1s
2332 18:54:06.456183 Finalising connection for namespace 'common'
2333 18:54:06.456370 Disconnecting from shell: Finalise
2334 18:54:06.456451
2335 18:54:06.556951 end: 5.2 read-feedback (duration 00:00:01) [common]
2336 18:54:06.557328 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12909559
2337 18:54:06.883877 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12909559
2338 18:54:06.884103 JobError: Your job cannot terminate cleanly.