Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 18:48:54.476717 lava-dispatcher, installed at version: 2024.01
2 18:48:54.476937 start: 0 validate
3 18:48:54.477080 Start time: 2024-03-01 18:48:54.477073+00:00 (UTC)
4 18:48:54.477217 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:48:54.477347 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 18:48:54.792495 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:48:54.793151 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:48:54.796462 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:48:54.796571 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 18:48:55.069462 validate duration: 0.59
12 18:48:55.070793 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 18:48:55.071356 start: 1.1 download-retry (timeout 00:10:00) [common]
14 18:48:55.071972 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 18:48:55.072803 Not decompressing ramdisk as can be used compressed.
16 18:48:55.073264 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 18:48:55.073632 saving as /var/lib/lava/dispatcher/tmp/12909621/tftp-deploy-3ho5sisz/ramdisk/rootfs.cpio.gz
18 18:48:55.074004 total size: 35760064 (34 MB)
19 18:48:55.078874 progress 0 % (0 MB)
20 18:48:55.110806 progress 5 % (1 MB)
21 18:48:55.125362 progress 10 % (3 MB)
22 18:48:55.135927 progress 15 % (5 MB)
23 18:48:55.145473 progress 20 % (6 MB)
24 18:48:55.154858 progress 25 % (8 MB)
25 18:48:55.164543 progress 30 % (10 MB)
26 18:48:55.173847 progress 35 % (11 MB)
27 18:48:55.183412 progress 40 % (13 MB)
28 18:48:55.193028 progress 45 % (15 MB)
29 18:48:55.202590 progress 50 % (17 MB)
30 18:48:55.212297 progress 55 % (18 MB)
31 18:48:55.224188 progress 60 % (20 MB)
32 18:48:55.236650 progress 65 % (22 MB)
33 18:48:55.246201 progress 70 % (23 MB)
34 18:48:55.256254 progress 75 % (25 MB)
35 18:48:55.266025 progress 80 % (27 MB)
36 18:48:55.275557 progress 85 % (29 MB)
37 18:48:55.285284 progress 90 % (30 MB)
38 18:48:55.294739 progress 95 % (32 MB)
39 18:48:55.304139 progress 100 % (34 MB)
40 18:48:55.304382 34 MB downloaded in 0.23 s (148.02 MB/s)
41 18:48:55.304548 end: 1.1.1 http-download (duration 00:00:00) [common]
43 18:48:55.304794 end: 1.1 download-retry (duration 00:00:00) [common]
44 18:48:55.304881 start: 1.2 download-retry (timeout 00:10:00) [common]
45 18:48:55.304965 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 18:48:55.305109 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 18:48:55.305180 saving as /var/lib/lava/dispatcher/tmp/12909621/tftp-deploy-3ho5sisz/kernel/bzImage
48 18:48:55.305241 total size: 12349440 (11 MB)
49 18:48:55.305303 No compression specified
50 18:48:55.306501 progress 0 % (0 MB)
51 18:48:55.309809 progress 5 % (0 MB)
52 18:48:55.313190 progress 10 % (1 MB)
53 18:48:55.316842 progress 15 % (1 MB)
54 18:48:55.320355 progress 20 % (2 MB)
55 18:48:55.323990 progress 25 % (2 MB)
56 18:48:55.327572 progress 30 % (3 MB)
57 18:48:55.331050 progress 35 % (4 MB)
58 18:48:55.334696 progress 40 % (4 MB)
59 18:48:55.338325 progress 45 % (5 MB)
60 18:48:55.342027 progress 50 % (5 MB)
61 18:48:55.345620 progress 55 % (6 MB)
62 18:48:55.349467 progress 60 % (7 MB)
63 18:48:55.353257 progress 65 % (7 MB)
64 18:48:55.357050 progress 70 % (8 MB)
65 18:48:55.360444 progress 75 % (8 MB)
66 18:48:55.365229 progress 80 % (9 MB)
67 18:48:55.370743 progress 85 % (10 MB)
68 18:48:55.376166 progress 90 % (10 MB)
69 18:48:55.381546 progress 95 % (11 MB)
70 18:48:55.386756 progress 100 % (11 MB)
71 18:48:55.387177 11 MB downloaded in 0.08 s (143.75 MB/s)
72 18:48:55.387411 end: 1.2.1 http-download (duration 00:00:00) [common]
74 18:48:55.387827 end: 1.2 download-retry (duration 00:00:00) [common]
75 18:48:55.387964 start: 1.3 download-retry (timeout 00:10:00) [common]
76 18:48:55.388114 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 18:48:55.388311 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 18:48:55.388425 saving as /var/lib/lava/dispatcher/tmp/12909621/tftp-deploy-3ho5sisz/modules/modules.tar
79 18:48:55.388532 total size: 484604 (0 MB)
80 18:48:55.388645 Using unxz to decompress xz
81 18:48:55.394458 progress 6 % (0 MB)
82 18:48:55.395086 progress 13 % (0 MB)
83 18:48:55.395468 progress 20 % (0 MB)
84 18:48:55.397074 progress 27 % (0 MB)
85 18:48:55.399021 progress 33 % (0 MB)
86 18:48:55.401263 progress 40 % (0 MB)
87 18:48:55.403390 progress 47 % (0 MB)
88 18:48:55.405328 progress 54 % (0 MB)
89 18:48:55.407559 progress 60 % (0 MB)
90 18:48:55.410052 progress 67 % (0 MB)
91 18:48:55.412409 progress 74 % (0 MB)
92 18:48:55.414449 progress 81 % (0 MB)
93 18:48:55.416591 progress 87 % (0 MB)
94 18:48:55.418948 progress 94 % (0 MB)
95 18:48:55.421408 progress 100 % (0 MB)
96 18:48:55.428017 0 MB downloaded in 0.04 s (11.71 MB/s)
97 18:48:55.428371 end: 1.3.1 http-download (duration 00:00:00) [common]
99 18:48:55.428790 end: 1.3 download-retry (duration 00:00:00) [common]
100 18:48:55.428932 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 18:48:55.429077 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 18:48:55.429203 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 18:48:55.429337 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 18:48:55.429656 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn
105 18:48:55.429858 makedir: /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin
106 18:48:55.430012 makedir: /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/tests
107 18:48:55.430162 makedir: /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/results
108 18:48:55.430330 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-add-keys
109 18:48:55.430540 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-add-sources
110 18:48:55.430732 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-background-process-start
111 18:48:55.430927 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-background-process-stop
112 18:48:55.431117 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-common-functions
113 18:48:55.431303 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-echo-ipv4
114 18:48:55.431488 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-install-packages
115 18:48:55.431684 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-installed-packages
116 18:48:55.431876 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-os-build
117 18:48:55.432066 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-probe-channel
118 18:48:55.432256 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-probe-ip
119 18:48:55.432444 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-target-ip
120 18:48:55.432635 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-target-mac
121 18:48:55.432818 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-target-storage
122 18:48:55.433015 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-test-case
123 18:48:55.433202 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-test-event
124 18:48:55.433387 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-test-feedback
125 18:48:55.433575 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-test-raise
126 18:48:55.433766 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-test-reference
127 18:48:55.433956 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-test-runner
128 18:48:55.434144 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-test-set
129 18:48:55.434333 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-test-shell
130 18:48:55.434526 Updating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-install-packages (oe)
131 18:48:55.434750 Updating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/bin/lava-installed-packages (oe)
132 18:48:55.434944 Creating /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/environment
133 18:48:55.435099 LAVA metadata
134 18:48:55.435217 - LAVA_JOB_ID=12909621
135 18:48:55.435326 - LAVA_DISPATCHER_IP=192.168.201.1
136 18:48:55.435488 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 18:48:55.435599 skipped lava-vland-overlay
138 18:48:55.435729 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 18:48:55.435867 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 18:48:55.435975 skipped lava-multinode-overlay
141 18:48:55.436092 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 18:48:55.436224 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 18:48:55.436344 Loading test definitions
144 18:48:55.436491 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 18:48:55.436611 Using /lava-12909621 at stage 0
146 18:48:55.437077 uuid=12909621_1.4.2.3.1 testdef=None
147 18:48:55.437204 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 18:48:55.437334 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 18:48:55.438124 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 18:48:55.438476 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 18:48:55.439407 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 18:48:55.439773 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 18:48:55.440671 runner path: /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/0/tests/0_cros-ec test_uuid 12909621_1.4.2.3.1
156 18:48:55.440887 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 18:48:55.441223 Creating lava-test-runner.conf files
159 18:48:55.441324 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12909621/lava-overlay-g_7vidmn/lava-12909621/0 for stage 0
160 18:48:55.441459 - 0_cros-ec
161 18:48:55.441601 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 18:48:55.441732 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
163 18:48:55.452171 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 18:48:55.452353 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
165 18:48:55.452489 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 18:48:55.452619 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 18:48:55.452750 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
168 18:48:56.537085 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
169 18:48:56.537564 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
170 18:48:56.537722 extracting modules file /var/lib/lava/dispatcher/tmp/12909621/tftp-deploy-3ho5sisz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12909621/extract-overlay-ramdisk-275v374e/ramdisk
171 18:48:56.569959 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 18:48:56.570170 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
173 18:48:56.570355 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12909621/compress-overlay-klmpce6_/overlay-1.4.2.4.tar.gz to ramdisk
174 18:48:56.570471 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12909621/compress-overlay-klmpce6_/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12909621/extract-overlay-ramdisk-275v374e/ramdisk
175 18:48:56.580874 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 18:48:56.581049 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
177 18:48:56.581185 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 18:48:56.581317 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
179 18:48:56.581438 Building ramdisk /var/lib/lava/dispatcher/tmp/12909621/extract-overlay-ramdisk-275v374e/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12909621/extract-overlay-ramdisk-275v374e/ramdisk
180 18:48:57.131557 >> 188276 blocks
181 18:49:00.750594 rename /var/lib/lava/dispatcher/tmp/12909621/extract-overlay-ramdisk-275v374e/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12909621/tftp-deploy-3ho5sisz/ramdisk/ramdisk.cpio.gz
182 18:49:00.751085 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
183 18:49:00.751213 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
184 18:49:00.751460 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
185 18:49:00.751568 No mkimage arch provided, not using FIT.
186 18:49:00.751658 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 18:49:00.751765 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 18:49:00.751864 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
189 18:49:00.751951 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
190 18:49:00.752038 No LXC device requested
191 18:49:00.752121 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 18:49:00.752215 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
193 18:49:00.752297 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 18:49:00.752378 Checking files for TFTP limit of 4294967296 bytes.
195 18:49:00.752857 end: 1 tftp-deploy (duration 00:00:06) [common]
196 18:49:00.752962 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 18:49:00.753057 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 18:49:00.753223 substitutions:
199 18:49:00.753289 - {DTB}: None
200 18:49:00.753349 - {INITRD}: 12909621/tftp-deploy-3ho5sisz/ramdisk/ramdisk.cpio.gz
201 18:49:00.753407 - {KERNEL}: 12909621/tftp-deploy-3ho5sisz/kernel/bzImage
202 18:49:00.753463 - {LAVA_MAC}: None
203 18:49:00.753518 - {PRESEED_CONFIG}: None
204 18:49:00.753574 - {PRESEED_LOCAL}: None
205 18:49:00.753629 - {RAMDISK}: 12909621/tftp-deploy-3ho5sisz/ramdisk/ramdisk.cpio.gz
206 18:49:00.753683 - {ROOT_PART}: None
207 18:49:00.753785 - {ROOT}: None
208 18:49:00.753840 - {SERVER_IP}: 192.168.201.1
209 18:49:00.753893 - {TEE}: None
210 18:49:00.753947 Parsed boot commands:
211 18:49:00.754001 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 18:49:00.754180 Parsed boot commands: tftpboot 192.168.201.1 12909621/tftp-deploy-3ho5sisz/kernel/bzImage 12909621/tftp-deploy-3ho5sisz/kernel/cmdline 12909621/tftp-deploy-3ho5sisz/ramdisk/ramdisk.cpio.gz
213 18:49:00.754267 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 18:49:00.754355 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 18:49:00.754445 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 18:49:00.754529 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 18:49:00.754602 Not connected, no need to disconnect.
218 18:49:00.754676 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 18:49:00.754754 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 18:49:00.754820 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-13'
221 18:49:00.759556 Setting prompt string to ['lava-test: # ']
222 18:49:00.760032 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 18:49:00.760165 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 18:49:00.760325 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 18:49:00.760478 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 18:49:00.760766 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
227 18:49:05.895766 >> Command sent successfully.
228 18:49:05.905114 Returned 0 in 5 seconds
229 18:49:06.006205 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
231 18:49:06.007496 end: 2.2.2 reset-device (duration 00:00:05) [common]
232 18:49:06.007975 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
233 18:49:06.008406 Setting prompt string to 'Starting depthcharge on Voema...'
234 18:49:06.008699 Changing prompt to 'Starting depthcharge on Voema...'
235 18:49:06.008982 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
236 18:49:06.009999 [Enter `^Ec?' for help]
237 18:49:07.562465
238 18:49:07.563081
239 18:49:07.572851 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
240 18:49:07.579572 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
241 18:49:07.582215 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
242 18:49:07.585495 CPU: AES supported, TXT NOT supported, VT supported
243 18:49:07.592667 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
244 18:49:07.596069 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
245 18:49:07.602790 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
246 18:49:07.606391 VBOOT: Loading verstage.
247 18:49:07.609572 FMAP: Found "FLASH" version 1.1 at 0x1804000.
248 18:49:07.615834 FMAP: base = 0x0 size = 0x2000000 #areas = 32
249 18:49:07.619411 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
250 18:49:07.629675 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
251 18:49:07.636512 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
252 18:49:07.636960
253 18:49:07.637335
254 18:49:07.646379 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
255 18:49:07.663080 Probing TPM: . done!
256 18:49:07.666553 TPM ready after 0 ms
257 18:49:07.669953 Connected to device vid:did:rid of 1ae0:0028:00
258 18:49:07.681098 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
259 18:49:07.687767 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
260 18:49:07.691028 Initialized TPM device CR50 revision 0
261 18:49:07.747251 tlcl_send_startup: Startup return code is 0
262 18:49:07.747789 TPM: setup succeeded
263 18:49:07.761708 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
264 18:49:07.776003 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
265 18:49:07.788494 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
266 18:49:07.798146 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
267 18:49:07.802260 Chrome EC: UHEPI supported
268 18:49:07.805620 Phase 1
269 18:49:07.808403 FMAP: area GBB found @ 1805000 (458752 bytes)
270 18:49:07.818525 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
271 18:49:07.825636 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
272 18:49:07.832009 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
273 18:49:07.838589 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
274 18:49:07.842516 Recovery requested (1009000e)
275 18:49:07.845007 TPM: Extending digest for VBOOT: boot mode into PCR 0
276 18:49:07.856757 tlcl_extend: response is 0
277 18:49:07.863270 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
278 18:49:07.873279 tlcl_extend: response is 0
279 18:49:07.879992 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
280 18:49:07.886249 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
281 18:49:07.893398 BS: verstage times (exec / console): total (unknown) / 142 ms
282 18:49:07.893833
283 18:49:07.894171
284 18:49:07.906303 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
285 18:49:07.912505 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
286 18:49:07.916288 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
287 18:49:07.922677 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
288 18:49:07.926211 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
289 18:49:07.928966 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
290 18:49:07.932390 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
291 18:49:07.935586 TCO_STS: 0000 0000
292 18:49:07.938609 GEN_PMCON: d0015038 00002200
293 18:49:07.942028 GBLRST_CAUSE: 00000000 00000000
294 18:49:07.945360 HPR_CAUSE0: 00000000
295 18:49:07.946062 prev_sleep_state 5
296 18:49:07.948845 Boot Count incremented to 25725
297 18:49:07.955818 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 18:49:07.962955 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
299 18:49:07.972473 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
300 18:49:07.978825 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
301 18:49:07.982258 Chrome EC: UHEPI supported
302 18:49:07.989065 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
303 18:49:07.999984 Probing TPM: done!
304 18:49:08.006534 Connected to device vid:did:rid of 1ae0:0028:00
305 18:49:08.016756 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
306 18:49:08.019772 Initialized TPM device CR50 revision 0
307 18:49:08.034648 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
308 18:49:08.041701 MRC: Hash idx 0x100b comparison successful.
309 18:49:08.045089 MRC cache found, size faa8
310 18:49:08.045696 bootmode is set to: 2
311 18:49:08.047949 SPD index = 2
312 18:49:08.054884 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
313 18:49:08.058532 SPD: module type is LPDDR4X
314 18:49:08.061081 SPD: module part number is MT53D1G64D4NW-046
315 18:49:08.067264 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
316 18:49:08.074369 SPD: device width 16 bits, bus width 16 bits
317 18:49:08.078423 SPD: module size is 2048 MB (per channel)
318 18:49:08.506848 CBMEM:
319 18:49:08.510102 IMD: root @ 0x76fff000 254 entries.
320 18:49:08.513403 IMD: root @ 0x76ffec00 62 entries.
321 18:49:08.516974 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
322 18:49:08.523383 FMAP: area RW_VPD found @ f35000 (8192 bytes)
323 18:49:08.526430 External stage cache:
324 18:49:08.530339 IMD: root @ 0x7b3ff000 254 entries.
325 18:49:08.533577 IMD: root @ 0x7b3fec00 62 entries.
326 18:49:08.548262 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
327 18:49:08.554315 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
328 18:49:08.560956 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
329 18:49:08.575438 MRC: 'RECOVERY_MRC_CACHE' does not need update.
330 18:49:08.581268 cse_lite: Skip switching to RW in the recovery path
331 18:49:08.581429 8 DIMMs found
332 18:49:08.584611 SMM Memory Map
333 18:49:08.588095 SMRAM : 0x7b000000 0x800000
334 18:49:08.591412 Subregion 0: 0x7b000000 0x200000
335 18:49:08.594658 Subregion 1: 0x7b200000 0x200000
336 18:49:08.598235 Subregion 2: 0x7b400000 0x400000
337 18:49:08.598369 top_of_ram = 0x77000000
338 18:49:08.604792 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
339 18:49:08.611173 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
340 18:49:08.614760 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
341 18:49:08.621399 MTRR Range: Start=ff000000 End=0 (Size 1000000)
342 18:49:08.627555 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
343 18:49:08.633986 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
344 18:49:08.644590 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
345 18:49:08.650996 Processing 211 relocs. Offset value of 0x74c0b000
346 18:49:08.657845 BS: romstage times (exec / console): total (unknown) / 277 ms
347 18:49:08.663602
348 18:49:08.664113
349 18:49:08.674431 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
350 18:49:08.677850 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 18:49:08.684857 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 18:49:08.694340 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 18:49:08.701166 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
354 18:49:08.707573 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
355 18:49:08.750347 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
356 18:49:08.756954 Processing 5008 relocs. Offset value of 0x75d98000
357 18:49:08.760203 BS: postcar times (exec / console): total (unknown) / 59 ms
358 18:49:08.763428
359 18:49:08.763908
360 18:49:08.773551 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
361 18:49:08.773991 Normal boot
362 18:49:08.776733 FW_CONFIG value is 0x804c02
363 18:49:08.780067 PCI: 00:07.0 disabled by fw_config
364 18:49:08.783130 PCI: 00:07.1 disabled by fw_config
365 18:49:08.786480 PCI: 00:0d.2 disabled by fw_config
366 18:49:08.793011 PCI: 00:1c.7 disabled by fw_config
367 18:49:08.796293 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
368 18:49:08.802722 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
369 18:49:08.809966 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
370 18:49:08.813269 GENERIC: 0.0 disabled by fw_config
371 18:49:08.816058 GENERIC: 1.0 disabled by fw_config
372 18:49:08.819505 fw_config match found: DB_USB=USB3_ACTIVE
373 18:49:08.823106 fw_config match found: DB_USB=USB3_ACTIVE
374 18:49:08.826358 fw_config match found: DB_USB=USB3_ACTIVE
375 18:49:08.833204 fw_config match found: DB_USB=USB3_ACTIVE
376 18:49:08.836443 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
377 18:49:08.846258 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
378 18:49:08.852510 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
379 18:49:08.859570 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
380 18:49:08.863363 microcode: sig=0x806c1 pf=0x80 revision=0x86
381 18:49:08.869235 microcode: Update skipped, already up-to-date
382 18:49:08.875860 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
383 18:49:08.903785 Detected 4 core, 8 thread CPU.
384 18:49:08.907124 Setting up SMI for CPU
385 18:49:08.910428 IED base = 0x7b400000
386 18:49:08.910858 IED size = 0x00400000
387 18:49:08.913721 Will perform SMM setup.
388 18:49:08.920844 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
389 18:49:08.926900 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
390 18:49:08.933960 Processing 16 relocs. Offset value of 0x00030000
391 18:49:08.937039 Attempting to start 7 APs
392 18:49:08.940180 Waiting for 10ms after sending INIT.
393 18:49:08.955990 Waiting for 1st SIPI to complete...done.
394 18:49:08.956427 AP: slot 1 apic_id 1.
395 18:49:08.959100 AP: slot 4 apic_id 4.
396 18:49:08.962238 AP: slot 7 apic_id 5.
397 18:49:08.962693 AP: slot 3 apic_id 3.
398 18:49:08.965672 AP: slot 6 apic_id 2.
399 18:49:08.968999 Waiting for 2nd SIPI to complete...done.
400 18:49:08.972354 AP: slot 2 apic_id 7.
401 18:49:08.975615 AP: slot 5 apic_id 6.
402 18:49:08.982343 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
403 18:49:08.988347 Processing 13 relocs. Offset value of 0x00038000
404 18:49:08.992359 Unable to locate Global NVS
405 18:49:08.998596 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
406 18:49:09.002000 Installing permanent SMM handler to 0x7b000000
407 18:49:09.011915 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
408 18:49:09.015226 Processing 794 relocs. Offset value of 0x7b010000
409 18:49:09.024477 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
410 18:49:09.027889 Processing 13 relocs. Offset value of 0x7b008000
411 18:49:09.034552 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
412 18:49:09.041562 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
413 18:49:09.048177 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
414 18:49:09.051206 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
415 18:49:09.057776 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
416 18:49:09.064530 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
417 18:49:09.071016 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
418 18:49:09.074411 Unable to locate Global NVS
419 18:49:09.080908 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
420 18:49:09.084268 Clearing SMI status registers
421 18:49:09.087536 SMI_STS: PM1
422 18:49:09.088169 PM1_STS: PWRBTN
423 18:49:09.094093 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
424 18:49:09.097343 In relocation handler: CPU 0
425 18:49:09.104230 New SMBASE=0x7b000000 IEDBASE=0x7b400000
426 18:49:09.107185 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 18:49:09.111342 Relocation complete.
428 18:49:09.117068 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
429 18:49:09.120351 In relocation handler: CPU 1
430 18:49:09.123842 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
431 18:49:09.127437 Relocation complete.
432 18:49:09.133778 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
433 18:49:09.136787 In relocation handler: CPU 2
434 18:49:09.139974 New SMBASE=0x7afff800 IEDBASE=0x7b400000
435 18:49:09.143389 Relocation complete.
436 18:49:09.150278 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
437 18:49:09.153748 In relocation handler: CPU 5
438 18:49:09.156960 New SMBASE=0x7affec00 IEDBASE=0x7b400000
439 18:49:09.159772 Writing SMRR. base = 0x7b000006, mask=0xff800c00
440 18:49:09.163298 Relocation complete.
441 18:49:09.169719 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
442 18:49:09.173518 In relocation handler: CPU 6
443 18:49:09.176671 New SMBASE=0x7affe800 IEDBASE=0x7b400000
444 18:49:09.183133 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 18:49:09.186488 Relocation complete.
446 18:49:09.192853 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
447 18:49:09.196023 In relocation handler: CPU 3
448 18:49:09.199126 New SMBASE=0x7afff400 IEDBASE=0x7b400000
449 18:49:09.202541 Relocation complete.
450 18:49:09.209412 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
451 18:49:09.212786 In relocation handler: CPU 4
452 18:49:09.215849 New SMBASE=0x7afff000 IEDBASE=0x7b400000
453 18:49:09.219058 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 18:49:09.222933 Relocation complete.
455 18:49:09.229252 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
456 18:49:09.232158 In relocation handler: CPU 7
457 18:49:09.235769 New SMBASE=0x7affe400 IEDBASE=0x7b400000
458 18:49:09.239216 Relocation complete.
459 18:49:09.242781 Initializing CPU #0
460 18:49:09.245597 CPU: vendor Intel device 806c1
461 18:49:09.249256 CPU: family 06, model 8c, stepping 01
462 18:49:09.252084 Clearing out pending MCEs
463 18:49:09.255460 Setting up local APIC...
464 18:49:09.255929 apic_id: 0x00 done.
465 18:49:09.258697 Turbo is available but hidden
466 18:49:09.261840 Turbo is available and visible
467 18:49:09.265328 microcode: Update skipped, already up-to-date
468 18:49:09.269038 CPU #0 initialized
469 18:49:09.272105 Initializing CPU #1
470 18:49:09.272534 Initializing CPU #4
471 18:49:09.275385 Initializing CPU #5
472 18:49:09.278669 Initializing CPU #2
473 18:49:09.279095 CPU: vendor Intel device 806c1
474 18:49:09.285724 CPU: family 06, model 8c, stepping 01
475 18:49:09.288985 CPU: vendor Intel device 806c1
476 18:49:09.292196 CPU: family 06, model 8c, stepping 01
477 18:49:09.295314 Clearing out pending MCEs
478 18:49:09.295786 Clearing out pending MCEs
479 18:49:09.298653 Setting up local APIC...
480 18:49:09.301965 CPU: vendor Intel device 806c1
481 18:49:09.305224 CPU: family 06, model 8c, stepping 01
482 18:49:09.308840 Initializing CPU #3
483 18:49:09.309270 Initializing CPU #6
484 18:49:09.312368 Setting up local APIC...
485 18:49:09.315325 CPU: vendor Intel device 806c1
486 18:49:09.318500 CPU: family 06, model 8c, stepping 01
487 18:49:09.321868 Initializing CPU #7
488 18:49:09.325707 CPU: vendor Intel device 806c1
489 18:49:09.328968 CPU: family 06, model 8c, stepping 01
490 18:49:09.332339 CPU: vendor Intel device 806c1
491 18:49:09.335867 CPU: family 06, model 8c, stepping 01
492 18:49:09.340007 Clearing out pending MCEs
493 18:49:09.340437 Clearing out pending MCEs
494 18:49:09.343361 Setting up local APIC...
495 18:49:09.346530 CPU: vendor Intel device 806c1
496 18:49:09.349555 CPU: family 06, model 8c, stepping 01
497 18:49:09.353223 Clearing out pending MCEs
498 18:49:09.356173 Clearing out pending MCEs
499 18:49:09.356603 Clearing out pending MCEs
500 18:49:09.359511 Setting up local APIC...
501 18:49:09.362875 Setting up local APIC...
502 18:49:09.366259 Setting up local APIC...
503 18:49:09.369412 Setting up local APIC...
504 18:49:09.369906 apic_id: 0x03 done.
505 18:49:09.373162 apic_id: 0x07 done.
506 18:49:09.376541 apic_id: 0x06 done.
507 18:49:09.379477 microcode: Update skipped, already up-to-date
508 18:49:09.382628 microcode: Update skipped, already up-to-date
509 18:49:09.385921 CPU #2 initialized
510 18:49:09.386379 CPU #5 initialized
511 18:49:09.393252 microcode: Update skipped, already up-to-date
512 18:49:09.393839 apic_id: 0x02 done.
513 18:49:09.396164 CPU #3 initialized
514 18:49:09.399598 microcode: Update skipped, already up-to-date
515 18:49:09.402626 apic_id: 0x04 done.
516 18:49:09.406175 apic_id: 0x05 done.
517 18:49:09.406668 CPU #6 initialized
518 18:49:09.412466 microcode: Update skipped, already up-to-date
519 18:49:09.415817 microcode: Update skipped, already up-to-date
520 18:49:09.419414 CPU #7 initialized
521 18:49:09.419954 CPU #4 initialized
522 18:49:09.423087 apic_id: 0x01 done.
523 18:49:09.426079 microcode: Update skipped, already up-to-date
524 18:49:09.429016 CPU #1 initialized
525 18:49:09.432853 bsp_do_flight_plan done after 459 msecs.
526 18:49:09.436151 CPU: frequency set to 4400 MHz
527 18:49:09.439231 Enabling SMIs.
528 18:49:09.445914 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
529 18:49:09.460497 SATAXPCIE1 indicates PCIe NVMe is present
530 18:49:09.463551 Probing TPM: done!
531 18:49:09.466916 Connected to device vid:did:rid of 1ae0:0028:00
532 18:49:09.477492 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
533 18:49:09.480897 Initialized TPM device CR50 revision 0
534 18:49:09.484418 Enabling S0i3.4
535 18:49:09.491037 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
536 18:49:09.494192 Found a VBT of 8704 bytes after decompression
537 18:49:09.500844 cse_lite: CSE RO boot. HybridStorageMode disabled
538 18:49:09.507627 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
539 18:49:09.582497 FSPS returned 0
540 18:49:09.585693 Executing Phase 1 of FspMultiPhaseSiInit
541 18:49:09.595518 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
542 18:49:09.598596 port C0 DISC req: usage 1 usb3 1 usb2 5
543 18:49:09.601890 Raw Buffer output 0 00000511
544 18:49:09.605336 Raw Buffer output 1 00000000
545 18:49:09.609463 pmc_send_ipc_cmd succeeded
546 18:49:09.615857 port C1 DISC req: usage 1 usb3 2 usb2 3
547 18:49:09.616381 Raw Buffer output 0 00000321
548 18:49:09.619283 Raw Buffer output 1 00000000
549 18:49:09.623445 pmc_send_ipc_cmd succeeded
550 18:49:09.628657 Detected 4 core, 8 thread CPU.
551 18:49:09.631836 Detected 4 core, 8 thread CPU.
552 18:49:09.831862 Display FSP Version Info HOB
553 18:49:09.835146 Reference Code - CPU = a.0.4c.31
554 18:49:09.838199 uCode Version = 0.0.0.86
555 18:49:09.842095 TXT ACM version = ff.ff.ff.ffff
556 18:49:09.845392 Reference Code - ME = a.0.4c.31
557 18:49:09.848526 MEBx version = 0.0.0.0
558 18:49:09.851829 ME Firmware Version = Consumer SKU
559 18:49:09.855050 Reference Code - PCH = a.0.4c.31
560 18:49:09.858300 PCH-CRID Status = Disabled
561 18:49:09.861396 PCH-CRID Original Value = ff.ff.ff.ffff
562 18:49:09.864792 PCH-CRID New Value = ff.ff.ff.ffff
563 18:49:09.868603 OPROM - RST - RAID = ff.ff.ff.ffff
564 18:49:09.871489 PCH Hsio Version = 4.0.0.0
565 18:49:09.874838 Reference Code - SA - System Agent = a.0.4c.31
566 18:49:09.878389 Reference Code - MRC = 2.0.0.1
567 18:49:09.881324 SA - PCIe Version = a.0.4c.31
568 18:49:09.884683 SA-CRID Status = Disabled
569 18:49:09.888127 SA-CRID Original Value = 0.0.0.1
570 18:49:09.891584 SA-CRID New Value = 0.0.0.1
571 18:49:09.895242 OPROM - VBIOS = ff.ff.ff.ffff
572 18:49:09.898109 IO Manageability Engine FW Version = 11.1.4.0
573 18:49:09.901440 PHY Build Version = 0.0.0.e0
574 18:49:09.904608 Thunderbolt(TM) FW Version = 0.0.0.0
575 18:49:09.911627 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
576 18:49:09.915339 ITSS IRQ Polarities Before:
577 18:49:09.915781 IPC0: 0xffffffff
578 18:49:09.919301 IPC1: 0xffffffff
579 18:49:09.919605 IPC2: 0xffffffff
580 18:49:09.922192 IPC3: 0xffffffff
581 18:49:09.922423 ITSS IRQ Polarities After:
582 18:49:09.926243 IPC0: 0xffffffff
583 18:49:09.926428 IPC1: 0xffffffff
584 18:49:09.928651 IPC2: 0xffffffff
585 18:49:09.932143 IPC3: 0xffffffff
586 18:49:09.935259 Found PCIe Root Port #9 at PCI: 00:1d.0.
587 18:49:09.945291 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
588 18:49:09.958636 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
589 18:49:09.971482 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
590 18:49:09.978293 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
591 18:49:09.978539 Enumerating buses...
592 18:49:09.985314 Show all devs... Before device enumeration.
593 18:49:09.985709 Root Device: enabled 1
594 18:49:09.988705 DOMAIN: 0000: enabled 1
595 18:49:09.991876 CPU_CLUSTER: 0: enabled 1
596 18:49:09.995087 PCI: 00:00.0: enabled 1
597 18:49:09.995601 PCI: 00:02.0: enabled 1
598 18:49:09.998576 PCI: 00:04.0: enabled 1
599 18:49:10.001522 PCI: 00:05.0: enabled 1
600 18:49:10.005223 PCI: 00:06.0: enabled 0
601 18:49:10.005647 PCI: 00:07.0: enabled 0
602 18:49:10.008340 PCI: 00:07.1: enabled 0
603 18:49:10.011748 PCI: 00:07.2: enabled 0
604 18:49:10.014835 PCI: 00:07.3: enabled 0
605 18:49:10.015309 PCI: 00:08.0: enabled 1
606 18:49:10.017970 PCI: 00:09.0: enabled 0
607 18:49:10.021888 PCI: 00:0a.0: enabled 0
608 18:49:10.022332 PCI: 00:0d.0: enabled 1
609 18:49:10.024825 PCI: 00:0d.1: enabled 0
610 18:49:10.028028 PCI: 00:0d.2: enabled 0
611 18:49:10.031314 PCI: 00:0d.3: enabled 0
612 18:49:10.031874 PCI: 00:0e.0: enabled 0
613 18:49:10.034989 PCI: 00:10.2: enabled 1
614 18:49:10.037663 PCI: 00:10.6: enabled 0
615 18:49:10.041722 PCI: 00:10.7: enabled 0
616 18:49:10.042146 PCI: 00:12.0: enabled 0
617 18:49:10.044518 PCI: 00:12.6: enabled 0
618 18:49:10.047936 PCI: 00:13.0: enabled 0
619 18:49:10.051282 PCI: 00:14.0: enabled 1
620 18:49:10.051793 PCI: 00:14.1: enabled 0
621 18:49:10.054695 PCI: 00:14.2: enabled 1
622 18:49:10.058106 PCI: 00:14.3: enabled 1
623 18:49:10.061371 PCI: 00:15.0: enabled 1
624 18:49:10.061797 PCI: 00:15.1: enabled 1
625 18:49:10.064929 PCI: 00:15.2: enabled 1
626 18:49:10.068009 PCI: 00:15.3: enabled 1
627 18:49:10.071187 PCI: 00:16.0: enabled 1
628 18:49:10.071637 PCI: 00:16.1: enabled 0
629 18:49:10.074259 PCI: 00:16.2: enabled 0
630 18:49:10.077535 PCI: 00:16.3: enabled 0
631 18:49:10.078005 PCI: 00:16.4: enabled 0
632 18:49:10.080844 PCI: 00:16.5: enabled 0
633 18:49:10.084282 PCI: 00:17.0: enabled 1
634 18:49:10.087645 PCI: 00:19.0: enabled 0
635 18:49:10.088120 PCI: 00:19.1: enabled 1
636 18:49:10.091051 PCI: 00:19.2: enabled 0
637 18:49:10.093969 PCI: 00:1c.0: enabled 1
638 18:49:10.097519 PCI: 00:1c.1: enabled 0
639 18:49:10.097950 PCI: 00:1c.2: enabled 0
640 18:49:10.100784 PCI: 00:1c.3: enabled 0
641 18:49:10.104385 PCI: 00:1c.4: enabled 0
642 18:49:10.107448 PCI: 00:1c.5: enabled 0
643 18:49:10.108057 PCI: 00:1c.6: enabled 1
644 18:49:10.110553 PCI: 00:1c.7: enabled 0
645 18:49:10.113932 PCI: 00:1d.0: enabled 1
646 18:49:10.117394 PCI: 00:1d.1: enabled 0
647 18:49:10.117878 PCI: 00:1d.2: enabled 1
648 18:49:10.120315 PCI: 00:1d.3: enabled 0
649 18:49:10.124338 PCI: 00:1e.0: enabled 1
650 18:49:10.124833 PCI: 00:1e.1: enabled 0
651 18:49:10.127947 PCI: 00:1e.2: enabled 1
652 18:49:10.130802 PCI: 00:1e.3: enabled 1
653 18:49:10.133927 PCI: 00:1f.0: enabled 1
654 18:49:10.134408 PCI: 00:1f.1: enabled 0
655 18:49:10.137027 PCI: 00:1f.2: enabled 1
656 18:49:10.140381 PCI: 00:1f.3: enabled 1
657 18:49:10.143538 PCI: 00:1f.4: enabled 0
658 18:49:10.144065 PCI: 00:1f.5: enabled 1
659 18:49:10.147509 PCI: 00:1f.6: enabled 0
660 18:49:10.150787 PCI: 00:1f.7: enabled 0
661 18:49:10.151357 APIC: 00: enabled 1
662 18:49:10.153855 GENERIC: 0.0: enabled 1
663 18:49:10.156734 GENERIC: 0.0: enabled 1
664 18:49:10.160228 GENERIC: 1.0: enabled 1
665 18:49:10.160706 GENERIC: 0.0: enabled 1
666 18:49:10.163763 GENERIC: 1.0: enabled 1
667 18:49:10.167056 USB0 port 0: enabled 1
668 18:49:10.170095 GENERIC: 0.0: enabled 1
669 18:49:10.170691 USB0 port 0: enabled 1
670 18:49:10.173348 GENERIC: 0.0: enabled 1
671 18:49:10.176751 I2C: 00:1a: enabled 1
672 18:49:10.177198 I2C: 00:31: enabled 1
673 18:49:10.180220 I2C: 00:32: enabled 1
674 18:49:10.183849 I2C: 00:10: enabled 1
675 18:49:10.184316 I2C: 00:15: enabled 1
676 18:49:10.186880 GENERIC: 0.0: enabled 0
677 18:49:10.190004 GENERIC: 1.0: enabled 0
678 18:49:10.193429 GENERIC: 0.0: enabled 1
679 18:49:10.193960 SPI: 00: enabled 1
680 18:49:10.196774 SPI: 00: enabled 1
681 18:49:10.200388 PNP: 0c09.0: enabled 1
682 18:49:10.200792 GENERIC: 0.0: enabled 1
683 18:49:10.203450 USB3 port 0: enabled 1
684 18:49:10.206593 USB3 port 1: enabled 1
685 18:49:10.206993 USB3 port 2: enabled 0
686 18:49:10.209901 USB3 port 3: enabled 0
687 18:49:10.212903 USB2 port 0: enabled 0
688 18:49:10.216154 USB2 port 1: enabled 1
689 18:49:10.216458 USB2 port 2: enabled 1
690 18:49:10.219635 USB2 port 3: enabled 0
691 18:49:10.222784 USB2 port 4: enabled 1
692 18:49:10.223088 USB2 port 5: enabled 0
693 18:49:10.226653 USB2 port 6: enabled 0
694 18:49:10.229699 USB2 port 7: enabled 0
695 18:49:10.232677 USB2 port 8: enabled 0
696 18:49:10.232980 USB2 port 9: enabled 0
697 18:49:10.236120 USB3 port 0: enabled 0
698 18:49:10.239237 USB3 port 1: enabled 1
699 18:49:10.239541 USB3 port 2: enabled 0
700 18:49:10.242393 USB3 port 3: enabled 0
701 18:49:10.246342 GENERIC: 0.0: enabled 1
702 18:49:10.249323 GENERIC: 1.0: enabled 1
703 18:49:10.249665 APIC: 01: enabled 1
704 18:49:10.252399 APIC: 07: enabled 1
705 18:49:10.252703 APIC: 03: enabled 1
706 18:49:10.255725 APIC: 04: enabled 1
707 18:49:10.258918 APIC: 06: enabled 1
708 18:49:10.259193 APIC: 02: enabled 1
709 18:49:10.262344 APIC: 05: enabled 1
710 18:49:10.266055 Compare with tree...
711 18:49:10.266329 Root Device: enabled 1
712 18:49:10.269037 DOMAIN: 0000: enabled 1
713 18:49:10.272668 PCI: 00:00.0: enabled 1
714 18:49:10.275889 PCI: 00:02.0: enabled 1
715 18:49:10.276159 PCI: 00:04.0: enabled 1
716 18:49:10.279053 GENERIC: 0.0: enabled 1
717 18:49:10.282834 PCI: 00:05.0: enabled 1
718 18:49:10.286226 PCI: 00:06.0: enabled 0
719 18:49:10.289356 PCI: 00:07.0: enabled 0
720 18:49:10.289628 GENERIC: 0.0: enabled 1
721 18:49:10.292700 PCI: 00:07.1: enabled 0
722 18:49:10.295531 GENERIC: 1.0: enabled 1
723 18:49:10.299038 PCI: 00:07.2: enabled 0
724 18:49:10.302098 GENERIC: 0.0: enabled 1
725 18:49:10.305925 PCI: 00:07.3: enabled 0
726 18:49:10.306490 GENERIC: 1.0: enabled 1
727 18:49:10.309355 PCI: 00:08.0: enabled 1
728 18:49:10.312290 PCI: 00:09.0: enabled 0
729 18:49:10.315804 PCI: 00:0a.0: enabled 0
730 18:49:10.318718 PCI: 00:0d.0: enabled 1
731 18:49:10.319151 USB0 port 0: enabled 1
732 18:49:10.322056 USB3 port 0: enabled 1
733 18:49:10.325528 USB3 port 1: enabled 1
734 18:49:10.328882 USB3 port 2: enabled 0
735 18:49:10.332114 USB3 port 3: enabled 0
736 18:49:10.332539 PCI: 00:0d.1: enabled 0
737 18:49:10.335219 PCI: 00:0d.2: enabled 0
738 18:49:10.338417 GENERIC: 0.0: enabled 1
739 18:49:10.342749 PCI: 00:0d.3: enabled 0
740 18:49:10.345314 PCI: 00:0e.0: enabled 0
741 18:49:10.345910 PCI: 00:10.2: enabled 1
742 18:49:10.348804 PCI: 00:10.6: enabled 0
743 18:49:10.351761 PCI: 00:10.7: enabled 0
744 18:49:10.355483 PCI: 00:12.0: enabled 0
745 18:49:10.358861 PCI: 00:12.6: enabled 0
746 18:49:10.359291 PCI: 00:13.0: enabled 0
747 18:49:10.361796 PCI: 00:14.0: enabled 1
748 18:49:10.365416 USB0 port 0: enabled 1
749 18:49:10.368571 USB2 port 0: enabled 0
750 18:49:10.372199 USB2 port 1: enabled 1
751 18:49:10.375157 USB2 port 2: enabled 1
752 18:49:10.375586 USB2 port 3: enabled 0
753 18:49:10.378149 USB2 port 4: enabled 1
754 18:49:10.382222 USB2 port 5: enabled 0
755 18:49:10.385311 USB2 port 6: enabled 0
756 18:49:10.388151 USB2 port 7: enabled 0
757 18:49:10.388837 USB2 port 8: enabled 0
758 18:49:10.391880 USB2 port 9: enabled 0
759 18:49:10.394997 USB3 port 0: enabled 0
760 18:49:10.398171 USB3 port 1: enabled 1
761 18:49:10.401543 USB3 port 2: enabled 0
762 18:49:10.405177 USB3 port 3: enabled 0
763 18:49:10.405604 PCI: 00:14.1: enabled 0
764 18:49:10.408030 PCI: 00:14.2: enabled 1
765 18:49:10.411239 PCI: 00:14.3: enabled 1
766 18:49:10.414622 GENERIC: 0.0: enabled 1
767 18:49:10.418031 PCI: 00:15.0: enabled 1
768 18:49:10.418459 I2C: 00:1a: enabled 1
769 18:49:10.421118 I2C: 00:31: enabled 1
770 18:49:10.424486 I2C: 00:32: enabled 1
771 18:49:10.428320 PCI: 00:15.1: enabled 1
772 18:49:10.431058 I2C: 00:10: enabled 1
773 18:49:10.431568 PCI: 00:15.2: enabled 1
774 18:49:10.434714 PCI: 00:15.3: enabled 1
775 18:49:10.437560 PCI: 00:16.0: enabled 1
776 18:49:10.440929 PCI: 00:16.1: enabled 0
777 18:49:10.444509 PCI: 00:16.2: enabled 0
778 18:49:10.444940 PCI: 00:16.3: enabled 0
779 18:49:10.448392 PCI: 00:16.4: enabled 0
780 18:49:10.451400 PCI: 00:16.5: enabled 0
781 18:49:10.454203 PCI: 00:17.0: enabled 1
782 18:49:10.457461 PCI: 00:19.0: enabled 0
783 18:49:10.457908 PCI: 00:19.1: enabled 1
784 18:49:10.461099 I2C: 00:15: enabled 1
785 18:49:10.464127 PCI: 00:19.2: enabled 0
786 18:49:10.467453 PCI: 00:1d.0: enabled 1
787 18:49:10.467971 GENERIC: 0.0: enabled 1
788 18:49:10.470919 PCI: 00:1e.0: enabled 1
789 18:49:10.474092 PCI: 00:1e.1: enabled 0
790 18:49:10.477486 PCI: 00:1e.2: enabled 1
791 18:49:10.480658 SPI: 00: enabled 1
792 18:49:10.481087 PCI: 00:1e.3: enabled 1
793 18:49:10.483945 SPI: 00: enabled 1
794 18:49:10.487636 PCI: 00:1f.0: enabled 1
795 18:49:10.490881 PNP: 0c09.0: enabled 1
796 18:49:10.491367 PCI: 00:1f.1: enabled 0
797 18:49:10.493900 PCI: 00:1f.2: enabled 1
798 18:49:10.497740 GENERIC: 0.0: enabled 1
799 18:49:10.500466 GENERIC: 0.0: enabled 1
800 18:49:10.504070 GENERIC: 1.0: enabled 1
801 18:49:10.506999 PCI: 00:1f.3: enabled 1
802 18:49:10.507428 PCI: 00:1f.4: enabled 0
803 18:49:10.510703 PCI: 00:1f.5: enabled 1
804 18:49:10.514218 PCI: 00:1f.6: enabled 0
805 18:49:10.565772 PCI: 00:1f.7: enabled 0
806 18:49:10.566448 CPU_CLUSTER: 0: enabled 1
807 18:49:10.566979 APIC: 00: enabled 1
808 18:49:10.567973 APIC: 01: enabled 1
809 18:49:10.568476 APIC: 07: enabled 1
810 18:49:10.568978 APIC: 03: enabled 1
811 18:49:10.569466 APIC: 04: enabled 1
812 18:49:10.569965 APIC: 06: enabled 1
813 18:49:10.570428 APIC: 02: enabled 1
814 18:49:10.570864 APIC: 05: enabled 1
815 18:49:10.571287 Root Device scanning...
816 18:49:10.571821 scan_static_bus for Root Device
817 18:49:10.572341 DOMAIN: 0000 enabled
818 18:49:10.572857 CPU_CLUSTER: 0 enabled
819 18:49:10.573300 DOMAIN: 0000 scanning...
820 18:49:10.573726 PCI: pci_scan_bus for bus 00
821 18:49:10.574175 PCI: 00:00.0 [8086/0000] ops
822 18:49:10.574644 PCI: 00:00.0 [8086/9a12] enabled
823 18:49:10.575083 PCI: 00:02.0 [8086/0000] bus ops
824 18:49:10.575523 PCI: 00:02.0 [8086/9a40] enabled
825 18:49:10.576064 PCI: 00:04.0 [8086/0000] bus ops
826 18:49:10.576595 PCI: 00:04.0 [8086/9a03] enabled
827 18:49:10.578545 PCI: 00:05.0 [8086/9a19] enabled
828 18:49:10.581784 PCI: 00:07.0 [0000/0000] hidden
829 18:49:10.585549 PCI: 00:08.0 [8086/9a11] enabled
830 18:49:10.585844 PCI: 00:0a.0 [8086/9a0d] disabled
831 18:49:10.588983 PCI: 00:0d.0 [8086/0000] bus ops
832 18:49:10.592327 PCI: 00:0d.0 [8086/9a13] enabled
833 18:49:10.595658 PCI: 00:14.0 [8086/0000] bus ops
834 18:49:10.599291 PCI: 00:14.0 [8086/a0ed] enabled
835 18:49:10.602584 PCI: 00:14.2 [8086/a0ef] enabled
836 18:49:10.605754 PCI: 00:14.3 [8086/0000] bus ops
837 18:49:10.609175 PCI: 00:14.3 [8086/a0f0] enabled
838 18:49:10.612987 PCI: 00:15.0 [8086/0000] bus ops
839 18:49:10.615859 PCI: 00:15.0 [8086/a0e8] enabled
840 18:49:10.618768 PCI: 00:15.1 [8086/0000] bus ops
841 18:49:10.622439 PCI: 00:15.1 [8086/a0e9] enabled
842 18:49:10.625668 PCI: 00:15.2 [8086/0000] bus ops
843 18:49:10.628733 PCI: 00:15.2 [8086/a0ea] enabled
844 18:49:10.632344 PCI: 00:15.3 [8086/0000] bus ops
845 18:49:10.635587 PCI: 00:15.3 [8086/a0eb] enabled
846 18:49:10.638921 PCI: 00:16.0 [8086/0000] ops
847 18:49:10.642414 PCI: 00:16.0 [8086/a0e0] enabled
848 18:49:10.649059 PCI: Static device PCI: 00:17.0 not found, disabling it.
849 18:49:10.652620 PCI: 00:19.0 [8086/0000] bus ops
850 18:49:10.655489 PCI: 00:19.0 [8086/a0c5] disabled
851 18:49:10.658852 PCI: 00:19.1 [8086/0000] bus ops
852 18:49:10.662222 PCI: 00:19.1 [8086/a0c6] enabled
853 18:49:10.665467 PCI: 00:1d.0 [8086/0000] bus ops
854 18:49:10.668775 PCI: 00:1d.0 [8086/a0b0] enabled
855 18:49:10.672257 PCI: 00:1e.0 [8086/0000] ops
856 18:49:10.675453 PCI: 00:1e.0 [8086/a0a8] enabled
857 18:49:10.678450 PCI: 00:1e.2 [8086/0000] bus ops
858 18:49:10.682489 PCI: 00:1e.2 [8086/a0aa] enabled
859 18:49:10.685258 PCI: 00:1e.3 [8086/0000] bus ops
860 18:49:10.688714 PCI: 00:1e.3 [8086/a0ab] enabled
861 18:49:10.691800 PCI: 00:1f.0 [8086/0000] bus ops
862 18:49:10.695103 PCI: 00:1f.0 [8086/a087] enabled
863 18:49:10.698501 RTC Init
864 18:49:10.701775 Set power on after power failure.
865 18:49:10.702207 Disabling Deep S3
866 18:49:10.705149 Disabling Deep S3
867 18:49:10.705583 Disabling Deep S4
868 18:49:10.708725 Disabling Deep S4
869 18:49:10.709156 Disabling Deep S5
870 18:49:10.711847 Disabling Deep S5
871 18:49:10.715458 PCI: 00:1f.2 [0000/0000] hidden
872 18:49:10.718398 PCI: 00:1f.3 [8086/0000] bus ops
873 18:49:10.721577 PCI: 00:1f.3 [8086/a0c8] enabled
874 18:49:10.725094 PCI: 00:1f.5 [8086/0000] bus ops
875 18:49:10.728261 PCI: 00:1f.5 [8086/a0a4] enabled
876 18:49:10.731395 PCI: Leftover static devices:
877 18:49:10.731873 PCI: 00:10.2
878 18:49:10.734958 PCI: 00:10.6
879 18:49:10.735389 PCI: 00:10.7
880 18:49:10.738040 PCI: 00:06.0
881 18:49:10.738528 PCI: 00:07.1
882 18:49:10.738887 PCI: 00:07.2
883 18:49:10.741376 PCI: 00:07.3
884 18:49:10.741822 PCI: 00:09.0
885 18:49:10.744793 PCI: 00:0d.1
886 18:49:10.745227 PCI: 00:0d.2
887 18:49:10.747826 PCI: 00:0d.3
888 18:49:10.748538 PCI: 00:0e.0
889 18:49:10.749248 PCI: 00:12.0
890 18:49:10.751247 PCI: 00:12.6
891 18:49:10.751831 PCI: 00:13.0
892 18:49:10.754936 PCI: 00:14.1
893 18:49:10.755367 PCI: 00:16.1
894 18:49:10.755798 PCI: 00:16.2
895 18:49:10.757631 PCI: 00:16.3
896 18:49:10.758068 PCI: 00:16.4
897 18:49:10.761124 PCI: 00:16.5
898 18:49:10.761610 PCI: 00:17.0
899 18:49:10.764634 PCI: 00:19.2
900 18:49:10.765108 PCI: 00:1e.1
901 18:49:10.765453 PCI: 00:1f.1
902 18:49:10.767974 PCI: 00:1f.4
903 18:49:10.768452 PCI: 00:1f.6
904 18:49:10.771115 PCI: 00:1f.7
905 18:49:10.774484 PCI: Check your devicetree.cb.
906 18:49:10.774822 PCI: 00:02.0 scanning...
907 18:49:10.777702 scan_generic_bus for PCI: 00:02.0
908 18:49:10.784294 scan_generic_bus for PCI: 00:02.0 done
909 18:49:10.787756 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
910 18:49:10.791631 PCI: 00:04.0 scanning...
911 18:49:10.794649 scan_generic_bus for PCI: 00:04.0
912 18:49:10.797507 GENERIC: 0.0 enabled
913 18:49:10.800653 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
914 18:49:10.807440 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
915 18:49:10.810619 PCI: 00:0d.0 scanning...
916 18:49:10.814161 scan_static_bus for PCI: 00:0d.0
917 18:49:10.814551 USB0 port 0 enabled
918 18:49:10.817320 USB0 port 0 scanning...
919 18:49:10.820470 scan_static_bus for USB0 port 0
920 18:49:10.823612 USB3 port 0 enabled
921 18:49:10.824001 USB3 port 1 enabled
922 18:49:10.827444 USB3 port 2 disabled
923 18:49:10.830362 USB3 port 3 disabled
924 18:49:10.830669 USB3 port 0 scanning...
925 18:49:10.833485 scan_static_bus for USB3 port 0
926 18:49:10.840257 scan_static_bus for USB3 port 0 done
927 18:49:10.843826 scan_bus: bus USB3 port 0 finished in 6 msecs
928 18:49:10.847573 USB3 port 1 scanning...
929 18:49:10.850192 scan_static_bus for USB3 port 1
930 18:49:10.853535 scan_static_bus for USB3 port 1 done
931 18:49:10.857007 scan_bus: bus USB3 port 1 finished in 6 msecs
932 18:49:10.860580 scan_static_bus for USB0 port 0 done
933 18:49:10.866613 scan_bus: bus USB0 port 0 finished in 43 msecs
934 18:49:10.870190 scan_static_bus for PCI: 00:0d.0 done
935 18:49:10.873926 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
936 18:49:10.876716 PCI: 00:14.0 scanning...
937 18:49:10.880920 scan_static_bus for PCI: 00:14.0
938 18:49:10.883550 USB0 port 0 enabled
939 18:49:10.886650 USB0 port 0 scanning...
940 18:49:10.890199 scan_static_bus for USB0 port 0
941 18:49:10.890593 USB2 port 0 disabled
942 18:49:10.893597 USB2 port 1 enabled
943 18:49:10.894003 USB2 port 2 enabled
944 18:49:10.896586 USB2 port 3 disabled
945 18:49:10.899860 USB2 port 4 enabled
946 18:49:10.900254 USB2 port 5 disabled
947 18:49:10.903387 USB2 port 6 disabled
948 18:49:10.906730 USB2 port 7 disabled
949 18:49:10.907127 USB2 port 8 disabled
950 18:49:10.909575 USB2 port 9 disabled
951 18:49:10.913430 USB3 port 0 disabled
952 18:49:10.913825 USB3 port 1 enabled
953 18:49:10.916722 USB3 port 2 disabled
954 18:49:10.919922 USB3 port 3 disabled
955 18:49:10.920319 USB2 port 1 scanning...
956 18:49:10.922831 scan_static_bus for USB2 port 1
957 18:49:10.926132 scan_static_bus for USB2 port 1 done
958 18:49:10.932776 scan_bus: bus USB2 port 1 finished in 6 msecs
959 18:49:10.936236 USB2 port 2 scanning...
960 18:49:10.939466 scan_static_bus for USB2 port 2
961 18:49:10.942656 scan_static_bus for USB2 port 2 done
962 18:49:10.945963 scan_bus: bus USB2 port 2 finished in 6 msecs
963 18:49:10.949539 USB2 port 4 scanning...
964 18:49:10.952723 scan_static_bus for USB2 port 4
965 18:49:10.955963 scan_static_bus for USB2 port 4 done
966 18:49:10.959628 scan_bus: bus USB2 port 4 finished in 6 msecs
967 18:49:10.962649 USB3 port 1 scanning...
968 18:49:10.966373 scan_static_bus for USB3 port 1
969 18:49:10.970064 scan_static_bus for USB3 port 1 done
970 18:49:10.975727 scan_bus: bus USB3 port 1 finished in 6 msecs
971 18:49:10.978943 scan_static_bus for USB0 port 0 done
972 18:49:10.982558 scan_bus: bus USB0 port 0 finished in 93 msecs
973 18:49:10.985518 scan_static_bus for PCI: 00:14.0 done
974 18:49:10.992507 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
975 18:49:10.995788 PCI: 00:14.3 scanning...
976 18:49:10.999237 scan_static_bus for PCI: 00:14.3
977 18:49:10.999755 GENERIC: 0.0 enabled
978 18:49:11.005717 scan_static_bus for PCI: 00:14.3 done
979 18:49:11.008748 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
980 18:49:11.012070 PCI: 00:15.0 scanning...
981 18:49:11.015933 scan_static_bus for PCI: 00:15.0
982 18:49:11.016372 I2C: 00:1a enabled
983 18:49:11.019072 I2C: 00:31 enabled
984 18:49:11.021993 I2C: 00:32 enabled
985 18:49:11.025375 scan_static_bus for PCI: 00:15.0 done
986 18:49:11.028762 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
987 18:49:11.032071 PCI: 00:15.1 scanning...
988 18:49:11.035573 scan_static_bus for PCI: 00:15.1
989 18:49:11.038661 I2C: 00:10 enabled
990 18:49:11.041768 scan_static_bus for PCI: 00:15.1 done
991 18:49:11.045309 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
992 18:49:11.048686 PCI: 00:15.2 scanning...
993 18:49:11.051741 scan_static_bus for PCI: 00:15.2
994 18:49:11.055587 scan_static_bus for PCI: 00:15.2 done
995 18:49:11.061871 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
996 18:49:11.062272 PCI: 00:15.3 scanning...
997 18:49:11.064989 scan_static_bus for PCI: 00:15.3
998 18:49:11.071558 scan_static_bus for PCI: 00:15.3 done
999 18:49:11.075363 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1000 18:49:11.078225 PCI: 00:19.1 scanning...
1001 18:49:11.081684 scan_static_bus for PCI: 00:19.1
1002 18:49:11.082122 I2C: 00:15 enabled
1003 18:49:11.088585 scan_static_bus for PCI: 00:19.1 done
1004 18:49:11.091619 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1005 18:49:11.094924 PCI: 00:1d.0 scanning...
1006 18:49:11.098368 do_pci_scan_bridge for PCI: 00:1d.0
1007 18:49:11.101243 PCI: pci_scan_bus for bus 01
1008 18:49:11.104718 PCI: 01:00.0 [15b7/5009] enabled
1009 18:49:11.108084 GENERIC: 0.0 enabled
1010 18:49:11.111481 Enabling Common Clock Configuration
1011 18:49:11.114420 L1 Sub-State supported from root port 29
1012 18:49:11.117851 L1 Sub-State Support = 0x5
1013 18:49:11.121687 CommonModeRestoreTime = 0x28
1014 18:49:11.124683 Power On Value = 0x16, Power On Scale = 0x0
1015 18:49:11.127983 ASPM: Enabled L1
1016 18:49:11.130882 PCIe: Max_Payload_Size adjusted to 128
1017 18:49:11.134471 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1018 18:49:11.137929 PCI: 00:1e.2 scanning...
1019 18:49:11.141534 scan_generic_bus for PCI: 00:1e.2
1020 18:49:11.144205 SPI: 00 enabled
1021 18:49:11.147432 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1022 18:49:11.154186 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1023 18:49:11.157585 PCI: 00:1e.3 scanning...
1024 18:49:11.161431 scan_generic_bus for PCI: 00:1e.3
1025 18:49:11.161844 SPI: 00 enabled
1026 18:49:11.168426 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1027 18:49:11.171443 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1028 18:49:11.174487 PCI: 00:1f.0 scanning...
1029 18:49:11.177622 scan_static_bus for PCI: 00:1f.0
1030 18:49:11.181290 PNP: 0c09.0 enabled
1031 18:49:11.184167 PNP: 0c09.0 scanning...
1032 18:49:11.187524 scan_static_bus for PNP: 0c09.0
1033 18:49:11.191228 scan_static_bus for PNP: 0c09.0 done
1034 18:49:11.194195 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1035 18:49:11.197727 scan_static_bus for PCI: 00:1f.0 done
1036 18:49:11.204344 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1037 18:49:11.207505 PCI: 00:1f.2 scanning...
1038 18:49:11.210883 scan_static_bus for PCI: 00:1f.2
1039 18:49:11.211436 GENERIC: 0.0 enabled
1040 18:49:11.214269 GENERIC: 0.0 scanning...
1041 18:49:11.217296 scan_static_bus for GENERIC: 0.0
1042 18:49:11.220940 GENERIC: 0.0 enabled
1043 18:49:11.221365 GENERIC: 1.0 enabled
1044 18:49:11.227566 scan_static_bus for GENERIC: 0.0 done
1045 18:49:11.230668 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1046 18:49:11.234011 scan_static_bus for PCI: 00:1f.2 done
1047 18:49:11.240472 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1048 18:49:11.240954 PCI: 00:1f.3 scanning...
1049 18:49:11.243752 scan_static_bus for PCI: 00:1f.3
1050 18:49:11.250503 scan_static_bus for PCI: 00:1f.3 done
1051 18:49:11.253621 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1052 18:49:11.257437 PCI: 00:1f.5 scanning...
1053 18:49:11.260535 scan_generic_bus for PCI: 00:1f.5
1054 18:49:11.263730 scan_generic_bus for PCI: 00:1f.5 done
1055 18:49:11.267111 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1056 18:49:11.273468 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1057 18:49:11.276951 scan_static_bus for Root Device done
1058 18:49:11.283292 scan_bus: bus Root Device finished in 736 msecs
1059 18:49:11.283714 done
1060 18:49:11.290039 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1061 18:49:11.293716 Chrome EC: UHEPI supported
1062 18:49:11.296707 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1063 18:49:11.303581 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1064 18:49:11.306620 SPI flash protection: WPSW=0 SRP0=1
1065 18:49:11.313780 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1066 18:49:11.319957 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1067 18:49:11.320401 found VGA at PCI: 00:02.0
1068 18:49:11.323301 Setting up VGA for PCI: 00:02.0
1069 18:49:11.330249 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1070 18:49:11.336644 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1071 18:49:11.337069 Allocating resources...
1072 18:49:11.339716 Reading resources...
1073 18:49:11.343458 Root Device read_resources bus 0 link: 0
1074 18:49:11.346543 DOMAIN: 0000 read_resources bus 0 link: 0
1075 18:49:11.353819 PCI: 00:04.0 read_resources bus 1 link: 0
1076 18:49:11.357044 PCI: 00:04.0 read_resources bus 1 link: 0 done
1077 18:49:11.363823 PCI: 00:0d.0 read_resources bus 0 link: 0
1078 18:49:11.367408 USB0 port 0 read_resources bus 0 link: 0
1079 18:49:11.373957 USB0 port 0 read_resources bus 0 link: 0 done
1080 18:49:11.376934 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1081 18:49:11.383728 PCI: 00:14.0 read_resources bus 0 link: 0
1082 18:49:11.387537 USB0 port 0 read_resources bus 0 link: 0
1083 18:49:11.393589 USB0 port 0 read_resources bus 0 link: 0 done
1084 18:49:11.396900 PCI: 00:14.0 read_resources bus 0 link: 0 done
1085 18:49:11.403169 PCI: 00:14.3 read_resources bus 0 link: 0
1086 18:49:11.406600 PCI: 00:14.3 read_resources bus 0 link: 0 done
1087 18:49:11.413148 PCI: 00:15.0 read_resources bus 0 link: 0
1088 18:49:11.416688 PCI: 00:15.0 read_resources bus 0 link: 0 done
1089 18:49:11.422654 PCI: 00:15.1 read_resources bus 0 link: 0
1090 18:49:11.426112 PCI: 00:15.1 read_resources bus 0 link: 0 done
1091 18:49:11.432807 PCI: 00:19.1 read_resources bus 0 link: 0
1092 18:49:11.436698 PCI: 00:19.1 read_resources bus 0 link: 0 done
1093 18:49:11.443260 PCI: 00:1d.0 read_resources bus 1 link: 0
1094 18:49:11.446404 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1095 18:49:11.453184 PCI: 00:1e.2 read_resources bus 2 link: 0
1096 18:49:11.456279 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1097 18:49:11.463159 PCI: 00:1e.3 read_resources bus 3 link: 0
1098 18:49:11.466065 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1099 18:49:11.472956 PCI: 00:1f.0 read_resources bus 0 link: 0
1100 18:49:11.476161 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1101 18:49:11.479495 PCI: 00:1f.2 read_resources bus 0 link: 0
1102 18:49:11.486477 GENERIC: 0.0 read_resources bus 0 link: 0
1103 18:49:11.490087 GENERIC: 0.0 read_resources bus 0 link: 0 done
1104 18:49:11.495793 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1105 18:49:11.503388 DOMAIN: 0000 read_resources bus 0 link: 0 done
1106 18:49:11.505920 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1107 18:49:11.512201 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1108 18:49:11.515567 Root Device read_resources bus 0 link: 0 done
1109 18:49:11.518885 Done reading resources.
1110 18:49:11.522554 Show resources in subtree (Root Device)...After reading.
1111 18:49:11.529267 Root Device child on link 0 DOMAIN: 0000
1112 18:49:11.532167 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1113 18:49:11.542350 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1114 18:49:11.552702 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1115 18:49:11.553265 PCI: 00:00.0
1116 18:49:11.562739 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1117 18:49:11.572247 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1118 18:49:11.582339 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1119 18:49:11.591445 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1120 18:49:11.602179 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1121 18:49:11.608796 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1122 18:49:11.618508 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1123 18:49:11.628344 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1124 18:49:11.638546 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1125 18:49:11.648126 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1126 18:49:11.658173 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1127 18:49:11.664599 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1128 18:49:11.674448 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1129 18:49:11.684746 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1130 18:49:11.694451 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1131 18:49:11.704434 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1132 18:49:11.713889 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1133 18:49:11.724427 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1134 18:49:11.730440 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1135 18:49:11.740728 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1136 18:49:11.743862 PCI: 00:02.0
1137 18:49:11.754036 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 18:49:11.763859 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1139 18:49:11.773583 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1140 18:49:11.777351 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1141 18:49:11.787178 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1142 18:49:11.787481 GENERIC: 0.0
1143 18:49:11.790381 PCI: 00:05.0
1144 18:49:11.800251 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1145 18:49:11.804305 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1146 18:49:11.807123 GENERIC: 0.0
1147 18:49:11.807420 PCI: 00:08.0
1148 18:49:11.816907 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 18:49:11.820106 PCI: 00:0a.0
1150 18:49:11.823510 PCI: 00:0d.0 child on link 0 USB0 port 0
1151 18:49:11.833435 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 18:49:11.840248 USB0 port 0 child on link 0 USB3 port 0
1153 18:49:11.840696 USB3 port 0
1154 18:49:11.843103 USB3 port 1
1155 18:49:11.843486 USB3 port 2
1156 18:49:11.846624 USB3 port 3
1157 18:49:11.850223 PCI: 00:14.0 child on link 0 USB0 port 0
1158 18:49:11.860183 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1159 18:49:11.863309 USB0 port 0 child on link 0 USB2 port 0
1160 18:49:11.866845 USB2 port 0
1161 18:49:11.869868 USB2 port 1
1162 18:49:11.870407 USB2 port 2
1163 18:49:11.873011 USB2 port 3
1164 18:49:11.873508 USB2 port 4
1165 18:49:11.876797 USB2 port 5
1166 18:49:11.877227 USB2 port 6
1167 18:49:11.880058 USB2 port 7
1168 18:49:11.880563 USB2 port 8
1169 18:49:11.883028 USB2 port 9
1170 18:49:11.883447 USB3 port 0
1171 18:49:11.886449 USB3 port 1
1172 18:49:11.886877 USB3 port 2
1173 18:49:11.890101 USB3 port 3
1174 18:49:11.890574 PCI: 00:14.2
1175 18:49:11.899471 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 18:49:11.909553 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1177 18:49:11.916129 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1178 18:49:11.926090 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 18:49:11.926764 GENERIC: 0.0
1180 18:49:11.932446 PCI: 00:15.0 child on link 0 I2C: 00:1a
1181 18:49:11.942409 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 18:49:11.942920 I2C: 00:1a
1183 18:49:11.945994 I2C: 00:31
1184 18:49:11.946419 I2C: 00:32
1185 18:49:11.948932 PCI: 00:15.1 child on link 0 I2C: 00:10
1186 18:49:11.958959 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 18:49:11.962176 I2C: 00:10
1188 18:49:11.962599 PCI: 00:15.2
1189 18:49:11.972676 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 18:49:11.975828 PCI: 00:15.3
1191 18:49:11.985695 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 18:49:11.986211 PCI: 00:16.0
1193 18:49:11.995316 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 18:49:11.998789 PCI: 00:19.0
1195 18:49:12.002099 PCI: 00:19.1 child on link 0 I2C: 00:15
1196 18:49:12.012184 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 18:49:12.015480 I2C: 00:15
1198 18:49:12.018523 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1199 18:49:12.028562 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1200 18:49:12.038509 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1201 18:49:12.044762 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1202 18:49:12.048471 GENERIC: 0.0
1203 18:49:12.048699 PCI: 01:00.0
1204 18:49:12.061377 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 18:49:12.071527 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1206 18:49:12.071744 PCI: 00:1e.0
1207 18:49:12.081570 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1208 18:49:12.088747 PCI: 00:1e.2 child on link 0 SPI: 00
1209 18:49:12.097957 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 18:49:12.098720 SPI: 00
1211 18:49:12.101292 PCI: 00:1e.3 child on link 0 SPI: 00
1212 18:49:12.111292 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 18:49:12.114739 SPI: 00
1214 18:49:12.117919 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1215 18:49:12.127398 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1216 18:49:12.127858 PNP: 0c09.0
1217 18:49:12.137350 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1218 18:49:12.140748 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1219 18:49:12.150437 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1220 18:49:12.160633 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1221 18:49:12.163789 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1222 18:49:12.166812 GENERIC: 0.0
1223 18:49:12.167038 GENERIC: 1.0
1224 18:49:12.170289 PCI: 00:1f.3
1225 18:49:12.180599 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 18:49:12.190444 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 18:49:12.191050 PCI: 00:1f.5
1228 18:49:12.200203 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1229 18:49:12.203612 CPU_CLUSTER: 0 child on link 0 APIC: 00
1230 18:49:12.207001 APIC: 00
1231 18:49:12.207420 APIC: 01
1232 18:49:12.210338 APIC: 07
1233 18:49:12.210966 APIC: 03
1234 18:49:12.211494 APIC: 04
1235 18:49:12.213583 APIC: 06
1236 18:49:12.214224 APIC: 02
1237 18:49:12.214752 APIC: 05
1238 18:49:12.223454 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1239 18:49:12.226879 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1240 18:49:12.233412 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1241 18:49:12.240377 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1242 18:49:12.243500 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1243 18:49:12.250119 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1244 18:49:12.257186 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1245 18:49:12.263009 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1246 18:49:12.270032 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1247 18:49:12.280003 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1248 18:49:12.283102 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1249 18:49:12.292725 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 18:49:12.299626 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1251 18:49:12.306243 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1252 18:49:12.309689 DOMAIN: 0000: Resource ranges:
1253 18:49:12.313043 * Base: 1000, Size: 800, Tag: 100
1254 18:49:12.315749 * Base: 1900, Size: e700, Tag: 100
1255 18:49:12.322381 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1256 18:49:12.328924 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1257 18:49:12.335717 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1258 18:49:12.345952 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1259 18:49:12.352027 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1260 18:49:12.358548 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1261 18:49:12.368833 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1262 18:49:12.375526 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1263 18:49:12.382209 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1264 18:49:12.392079 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1265 18:49:12.398462 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1266 18:49:12.405362 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1267 18:49:12.414746 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1268 18:49:12.420937 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1269 18:49:12.428058 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1270 18:49:12.437668 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1271 18:49:12.444299 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1272 18:49:12.451366 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1273 18:49:12.460914 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1274 18:49:12.467593 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1275 18:49:12.474453 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1276 18:49:12.484295 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1277 18:49:12.490952 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1278 18:49:12.497210 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1279 18:49:12.507477 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1280 18:49:12.510206 DOMAIN: 0000: Resource ranges:
1281 18:49:12.514309 * Base: 7fc00000, Size: 40400000, Tag: 200
1282 18:49:12.516843 * Base: d0000000, Size: 28000000, Tag: 200
1283 18:49:12.523288 * Base: fa000000, Size: 1000000, Tag: 200
1284 18:49:12.526641 * Base: fb001000, Size: 2fff000, Tag: 200
1285 18:49:12.530303 * Base: fe010000, Size: 2e000, Tag: 200
1286 18:49:12.533562 * Base: fe03f000, Size: d41000, Tag: 200
1287 18:49:12.540154 * Base: fed88000, Size: 8000, Tag: 200
1288 18:49:12.543392 * Base: fed93000, Size: d000, Tag: 200
1289 18:49:12.546792 * Base: feda2000, Size: 1e000, Tag: 200
1290 18:49:12.550317 * Base: fede0000, Size: 1220000, Tag: 200
1291 18:49:12.556717 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1292 18:49:12.563375 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1293 18:49:12.570102 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1294 18:49:12.576902 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1295 18:49:12.583028 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1296 18:49:12.589547 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1297 18:49:12.596072 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1298 18:49:12.603084 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1299 18:49:12.609754 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1300 18:49:12.615945 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1301 18:49:12.622672 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1302 18:49:12.629502 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1303 18:49:12.636124 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1304 18:49:12.643000 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1305 18:49:12.649235 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1306 18:49:12.656225 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1307 18:49:12.662712 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1308 18:49:12.669229 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1309 18:49:12.676006 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1310 18:49:12.682360 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1311 18:49:12.688949 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1312 18:49:12.696451 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1313 18:49:12.702194 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1314 18:49:12.709268 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1315 18:49:12.718529 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1316 18:49:12.721906 PCI: 00:1d.0: Resource ranges:
1317 18:49:12.725259 * Base: 7fc00000, Size: 100000, Tag: 200
1318 18:49:12.732481 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1319 18:49:12.738865 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1320 18:49:12.745097 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1321 18:49:12.755340 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1322 18:49:12.758758 Root Device assign_resources, bus 0 link: 0
1323 18:49:12.762025 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 18:49:12.771716 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1325 18:49:12.778748 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1326 18:49:12.789096 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1327 18:49:12.795275 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1328 18:49:12.801863 PCI: 00:04.0 assign_resources, bus 1 link: 0
1329 18:49:12.804817 PCI: 00:04.0 assign_resources, bus 1 link: 0
1330 18:49:12.815047 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1331 18:49:12.822004 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1332 18:49:12.831633 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1333 18:49:12.834770 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1334 18:49:12.838085 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1335 18:49:12.847719 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1336 18:49:12.851021 PCI: 00:14.0 assign_resources, bus 0 link: 0
1337 18:49:12.857712 PCI: 00:14.0 assign_resources, bus 0 link: 0
1338 18:49:12.864663 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1339 18:49:12.874259 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1340 18:49:12.880867 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1341 18:49:12.884279 PCI: 00:14.3 assign_resources, bus 0 link: 0
1342 18:49:12.890555 PCI: 00:14.3 assign_resources, bus 0 link: 0
1343 18:49:12.897440 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1344 18:49:12.903942 PCI: 00:15.0 assign_resources, bus 0 link: 0
1345 18:49:12.906899 PCI: 00:15.0 assign_resources, bus 0 link: 0
1346 18:49:12.917273 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1347 18:49:12.920846 PCI: 00:15.1 assign_resources, bus 0 link: 0
1348 18:49:12.923478 PCI: 00:15.1 assign_resources, bus 0 link: 0
1349 18:49:12.933774 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1350 18:49:12.940217 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1351 18:49:12.950076 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1352 18:49:12.956727 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1353 18:49:12.962862 PCI: 00:19.1 assign_resources, bus 0 link: 0
1354 18:49:12.966597 PCI: 00:19.1 assign_resources, bus 0 link: 0
1355 18:49:12.977002 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1356 18:49:12.986374 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1357 18:49:12.992998 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1358 18:49:12.999555 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1359 18:49:13.006116 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1360 18:49:13.016825 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1361 18:49:13.019229 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 18:49:13.029656 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1363 18:49:13.033060 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1364 18:49:13.035698 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1365 18:49:13.045808 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1366 18:49:13.049485 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1367 18:49:13.055477 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1368 18:49:13.059047 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1369 18:49:13.065650 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1370 18:49:13.068980 LPC: Trying to open IO window from 800 size 1ff
1371 18:49:13.078735 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1372 18:49:13.085691 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1373 18:49:13.092222 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1374 18:49:13.098436 DOMAIN: 0000 assign_resources, bus 0 link: 0
1375 18:49:13.101873 Root Device assign_resources, bus 0 link: 0
1376 18:49:13.105130 Done setting resources.
1377 18:49:13.111926 Show resources in subtree (Root Device)...After assigning values.
1378 18:49:13.115126 Root Device child on link 0 DOMAIN: 0000
1379 18:49:13.121995 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1380 18:49:13.128225 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1381 18:49:13.138143 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1382 18:49:13.141338 PCI: 00:00.0
1383 18:49:13.151327 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1384 18:49:13.161337 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1385 18:49:13.171369 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1386 18:49:13.177945 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1387 18:49:13.187809 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1388 18:49:13.197512 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1389 18:49:13.207575 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1390 18:49:13.217664 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1391 18:49:13.224082 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1392 18:49:13.234298 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1393 18:49:13.243978 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1394 18:49:13.253839 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1395 18:49:13.263887 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1396 18:49:13.270275 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1397 18:49:13.280365 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1398 18:49:13.290724 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1399 18:49:13.300258 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1400 18:49:13.310167 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1401 18:49:13.319954 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1402 18:49:13.329948 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1403 18:49:13.330039 PCI: 00:02.0
1404 18:49:13.343625 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1405 18:49:13.353177 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1406 18:49:13.363191 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1407 18:49:13.366397 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1408 18:49:13.376249 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1409 18:49:13.379801 GENERIC: 0.0
1410 18:49:13.379887 PCI: 00:05.0
1411 18:49:13.389732 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1412 18:49:13.396169 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1413 18:49:13.396252 GENERIC: 0.0
1414 18:49:13.399096 PCI: 00:08.0
1415 18:49:13.409057 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1416 18:49:13.409153 PCI: 00:0a.0
1417 18:49:13.415936 PCI: 00:0d.0 child on link 0 USB0 port 0
1418 18:49:13.426083 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1419 18:49:13.428864 USB0 port 0 child on link 0 USB3 port 0
1420 18:49:13.432156 USB3 port 0
1421 18:49:13.432240 USB3 port 1
1422 18:49:13.435776 USB3 port 2
1423 18:49:13.435864 USB3 port 3
1424 18:49:13.442219 PCI: 00:14.0 child on link 0 USB0 port 0
1425 18:49:13.451993 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1426 18:49:13.455333 USB0 port 0 child on link 0 USB2 port 0
1427 18:49:13.458610 USB2 port 0
1428 18:49:13.458690 USB2 port 1
1429 18:49:13.462109 USB2 port 2
1430 18:49:13.462229 USB2 port 3
1431 18:49:13.465120 USB2 port 4
1432 18:49:13.465197 USB2 port 5
1433 18:49:13.469091 USB2 port 6
1434 18:49:13.469194 USB2 port 7
1435 18:49:13.471947 USB2 port 8
1436 18:49:13.472031 USB2 port 9
1437 18:49:13.475571 USB3 port 0
1438 18:49:13.478593 USB3 port 1
1439 18:49:13.478694 USB3 port 2
1440 18:49:13.481944 USB3 port 3
1441 18:49:13.482019 PCI: 00:14.2
1442 18:49:13.492073 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1443 18:49:13.502375 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1444 18:49:13.508272 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1445 18:49:13.518183 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1446 18:49:13.518265 GENERIC: 0.0
1447 18:49:13.525285 PCI: 00:15.0 child on link 0 I2C: 00:1a
1448 18:49:13.534807 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1449 18:49:13.534891 I2C: 00:1a
1450 18:49:13.538204 I2C: 00:31
1451 18:49:13.538283 I2C: 00:32
1452 18:49:13.544695 PCI: 00:15.1 child on link 0 I2C: 00:10
1453 18:49:13.554363 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1454 18:49:13.554454 I2C: 00:10
1455 18:49:13.557793 PCI: 00:15.2
1456 18:49:13.567663 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1457 18:49:13.567779 PCI: 00:15.3
1458 18:49:13.577500 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1459 18:49:13.581037 PCI: 00:16.0
1460 18:49:13.590647 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1461 18:49:13.594461 PCI: 00:19.0
1462 18:49:13.597275 PCI: 00:19.1 child on link 0 I2C: 00:15
1463 18:49:13.607624 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1464 18:49:13.607791 I2C: 00:15
1465 18:49:13.614043 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1466 18:49:13.624095 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1467 18:49:13.634181 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1468 18:49:13.643939 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1469 18:49:13.647298 GENERIC: 0.0
1470 18:49:13.647373 PCI: 01:00.0
1471 18:49:13.660233 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1472 18:49:13.670383 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1473 18:49:13.670476 PCI: 00:1e.0
1474 18:49:13.683470 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1475 18:49:13.686968 PCI: 00:1e.2 child on link 0 SPI: 00
1476 18:49:13.696547 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1477 18:49:13.696633 SPI: 00
1478 18:49:13.700100 PCI: 00:1e.3 child on link 0 SPI: 00
1479 18:49:13.713046 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1480 18:49:13.713132 SPI: 00
1481 18:49:13.716340 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1482 18:49:13.726480 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1483 18:49:13.726563 PNP: 0c09.0
1484 18:49:13.736394 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1485 18:49:13.739675 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1486 18:49:13.749360 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1487 18:49:13.759999 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1488 18:49:13.763036 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1489 18:49:13.766392 GENERIC: 0.0
1490 18:49:13.769260 GENERIC: 1.0
1491 18:49:13.769343 PCI: 00:1f.3
1492 18:49:13.779106 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1493 18:49:13.789258 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1494 18:49:13.792369 PCI: 00:1f.5
1495 18:49:13.802125 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1496 18:49:13.805668 CPU_CLUSTER: 0 child on link 0 APIC: 00
1497 18:49:13.808719 APIC: 00
1498 18:49:13.808800 APIC: 01
1499 18:49:13.811921 APIC: 07
1500 18:49:13.812002 APIC: 03
1501 18:49:13.812065 APIC: 04
1502 18:49:13.815542 APIC: 06
1503 18:49:13.815627 APIC: 02
1504 18:49:13.815719 APIC: 05
1505 18:49:13.819045 Done allocating resources.
1506 18:49:13.825213 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1507 18:49:13.831891 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1508 18:49:13.835506 Configure GPIOs for I2S audio on UP4.
1509 18:49:13.841908 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1510 18:49:13.845340 Enabling resources...
1511 18:49:13.848717 PCI: 00:00.0 subsystem <- 8086/9a12
1512 18:49:13.852021 PCI: 00:00.0 cmd <- 06
1513 18:49:13.855363 PCI: 00:02.0 subsystem <- 8086/9a40
1514 18:49:13.858324 PCI: 00:02.0 cmd <- 03
1515 18:49:13.861856 PCI: 00:04.0 subsystem <- 8086/9a03
1516 18:49:13.864892 PCI: 00:04.0 cmd <- 02
1517 18:49:13.867916 PCI: 00:05.0 subsystem <- 8086/9a19
1518 18:49:13.868000 PCI: 00:05.0 cmd <- 02
1519 18:49:13.874957 PCI: 00:08.0 subsystem <- 8086/9a11
1520 18:49:13.875042 PCI: 00:08.0 cmd <- 06
1521 18:49:13.878336 PCI: 00:0d.0 subsystem <- 8086/9a13
1522 18:49:13.881770 PCI: 00:0d.0 cmd <- 02
1523 18:49:13.884743 PCI: 00:14.0 subsystem <- 8086/a0ed
1524 18:49:13.888071 PCI: 00:14.0 cmd <- 02
1525 18:49:13.891364 PCI: 00:14.2 subsystem <- 8086/a0ef
1526 18:49:13.894907 PCI: 00:14.2 cmd <- 02
1527 18:49:13.898406 PCI: 00:14.3 subsystem <- 8086/a0f0
1528 18:49:13.901216 PCI: 00:14.3 cmd <- 02
1529 18:49:13.904269 PCI: 00:15.0 subsystem <- 8086/a0e8
1530 18:49:13.907769 PCI: 00:15.0 cmd <- 02
1531 18:49:13.911099 PCI: 00:15.1 subsystem <- 8086/a0e9
1532 18:49:13.914120 PCI: 00:15.1 cmd <- 02
1533 18:49:13.917465 PCI: 00:15.2 subsystem <- 8086/a0ea
1534 18:49:13.920649 PCI: 00:15.2 cmd <- 02
1535 18:49:13.924396 PCI: 00:15.3 subsystem <- 8086/a0eb
1536 18:49:13.924480 PCI: 00:15.3 cmd <- 02
1537 18:49:13.930704 PCI: 00:16.0 subsystem <- 8086/a0e0
1538 18:49:13.930787 PCI: 00:16.0 cmd <- 02
1539 18:49:13.934159 PCI: 00:19.1 subsystem <- 8086/a0c6
1540 18:49:13.937146 PCI: 00:19.1 cmd <- 02
1541 18:49:13.940570 PCI: 00:1d.0 bridge ctrl <- 0013
1542 18:49:13.943912 PCI: 00:1d.0 subsystem <- 8086/a0b0
1543 18:49:13.947406 PCI: 00:1d.0 cmd <- 06
1544 18:49:13.950657 PCI: 00:1e.0 subsystem <- 8086/a0a8
1545 18:49:13.953634 PCI: 00:1e.0 cmd <- 06
1546 18:49:13.957070 PCI: 00:1e.2 subsystem <- 8086/a0aa
1547 18:49:13.960259 PCI: 00:1e.2 cmd <- 06
1548 18:49:13.963777 PCI: 00:1e.3 subsystem <- 8086/a0ab
1549 18:49:13.967158 PCI: 00:1e.3 cmd <- 02
1550 18:49:13.970137 PCI: 00:1f.0 subsystem <- 8086/a087
1551 18:49:13.973437 PCI: 00:1f.0 cmd <- 407
1552 18:49:13.977057 PCI: 00:1f.3 subsystem <- 8086/a0c8
1553 18:49:13.977139 PCI: 00:1f.3 cmd <- 02
1554 18:49:13.984162 PCI: 00:1f.5 subsystem <- 8086/a0a4
1555 18:49:13.984243 PCI: 00:1f.5 cmd <- 406
1556 18:49:13.989199 PCI: 01:00.0 cmd <- 02
1557 18:49:13.993189 done.
1558 18:49:13.996970 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1559 18:49:13.999982 Initializing devices...
1560 18:49:14.003168 Root Device init
1561 18:49:14.006422 Chrome EC: Set SMI mask to 0x0000000000000000
1562 18:49:14.013699 Chrome EC: clear events_b mask to 0x0000000000000000
1563 18:49:14.020683 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1564 18:49:14.027570 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1565 18:49:14.033515 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1566 18:49:14.040271 Chrome EC: Set WAKE mask to 0x0000000000000000
1567 18:49:14.043233 fw_config match found: DB_USB=USB3_ACTIVE
1568 18:49:14.050247 Configure Right Type-C port orientation for retimer
1569 18:49:14.053411 Root Device init finished in 47 msecs
1570 18:49:14.056597 PCI: 00:00.0 init
1571 18:49:14.059978 CPU TDP = 9 Watts
1572 18:49:14.060061 CPU PL1 = 9 Watts
1573 18:49:14.063414 CPU PL2 = 40 Watts
1574 18:49:14.066630 CPU PL4 = 83 Watts
1575 18:49:14.070293 PCI: 00:00.0 init finished in 8 msecs
1576 18:49:14.070390 PCI: 00:02.0 init
1577 18:49:14.072998 GMA: Found VBT in CBFS
1578 18:49:14.076737 GMA: Found valid VBT in CBFS
1579 18:49:14.083225 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1580 18:49:14.090030 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1581 18:49:14.093059 PCI: 00:02.0 init finished in 18 msecs
1582 18:49:14.096438 PCI: 00:05.0 init
1583 18:49:14.099933 PCI: 00:05.0 init finished in 0 msecs
1584 18:49:14.102948 PCI: 00:08.0 init
1585 18:49:14.106338 PCI: 00:08.0 init finished in 0 msecs
1586 18:49:14.109365 PCI: 00:14.0 init
1587 18:49:14.112573 PCI: 00:14.0 init finished in 0 msecs
1588 18:49:14.115770 PCI: 00:14.2 init
1589 18:49:14.119133 PCI: 00:14.2 init finished in 0 msecs
1590 18:49:14.122480 PCI: 00:15.0 init
1591 18:49:14.122594 I2C bus 0 version 0x3230302a
1592 18:49:14.129227 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1593 18:49:14.131929 PCI: 00:15.0 init finished in 6 msecs
1594 18:49:14.132006 PCI: 00:15.1 init
1595 18:49:14.135256 I2C bus 1 version 0x3230302a
1596 18:49:14.138766 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1597 18:49:14.145633 PCI: 00:15.1 init finished in 6 msecs
1598 18:49:14.145714 PCI: 00:15.2 init
1599 18:49:14.148586 I2C bus 2 version 0x3230302a
1600 18:49:14.151741 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1601 18:49:14.155196 PCI: 00:15.2 init finished in 6 msecs
1602 18:49:14.158669 PCI: 00:15.3 init
1603 18:49:14.161951 I2C bus 3 version 0x3230302a
1604 18:49:14.165305 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1605 18:49:14.168794 PCI: 00:15.3 init finished in 6 msecs
1606 18:49:14.172175 PCI: 00:16.0 init
1607 18:49:14.175374 PCI: 00:16.0 init finished in 0 msecs
1608 18:49:14.178962 PCI: 00:19.1 init
1609 18:49:14.182144 I2C bus 5 version 0x3230302a
1610 18:49:14.185046 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1611 18:49:14.188602 PCI: 00:19.1 init finished in 6 msecs
1612 18:49:14.192404 PCI: 00:1d.0 init
1613 18:49:14.194952 Initializing PCH PCIe bridge.
1614 18:49:14.198652 PCI: 00:1d.0 init finished in 3 msecs
1615 18:49:14.201564 PCI: 00:1f.0 init
1616 18:49:14.204975 IOAPIC: Initializing IOAPIC at 0xfec00000
1617 18:49:14.207887 IOAPIC: Bootstrap Processor Local APIC = 0x00
1618 18:49:14.211361 IOAPIC: ID = 0x02
1619 18:49:14.214655 IOAPIC: Dumping registers
1620 18:49:14.214739 reg 0x0000: 0x02000000
1621 18:49:14.217836 reg 0x0001: 0x00770020
1622 18:49:14.221548 reg 0x0002: 0x00000000
1623 18:49:14.225287 PCI: 00:1f.0 init finished in 21 msecs
1624 18:49:14.227856 PCI: 00:1f.2 init
1625 18:49:14.231349 Disabling ACPI via APMC.
1626 18:49:14.231463 APMC done.
1627 18:49:14.237958 PCI: 00:1f.2 init finished in 5 msecs
1628 18:49:14.248256 PCI: 01:00.0 init
1629 18:49:14.251597 PCI: 01:00.0 init finished in 0 msecs
1630 18:49:14.255496 PNP: 0c09.0 init
1631 18:49:14.258639 Google Chrome EC uptime: 8.256 seconds
1632 18:49:14.264732 Google Chrome AP resets since EC boot: 1
1633 18:49:14.268297 Google Chrome most recent AP reset causes:
1634 18:49:14.271500 0.451: 32775 shutdown: entering G3
1635 18:49:14.278211 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1636 18:49:14.281697 PNP: 0c09.0 init finished in 22 msecs
1637 18:49:14.287363 Devices initialized
1638 18:49:14.290570 Show all devs... After init.
1639 18:49:14.294240 Root Device: enabled 1
1640 18:49:14.294349 DOMAIN: 0000: enabled 1
1641 18:49:14.297109 CPU_CLUSTER: 0: enabled 1
1642 18:49:14.300231 PCI: 00:00.0: enabled 1
1643 18:49:14.303895 PCI: 00:02.0: enabled 1
1644 18:49:14.306786 PCI: 00:04.0: enabled 1
1645 18:49:14.306879 PCI: 00:05.0: enabled 1
1646 18:49:14.310091 PCI: 00:06.0: enabled 0
1647 18:49:14.313519 PCI: 00:07.0: enabled 0
1648 18:49:14.313602 PCI: 00:07.1: enabled 0
1649 18:49:14.316632 PCI: 00:07.2: enabled 0
1650 18:49:14.319850 PCI: 00:07.3: enabled 0
1651 18:49:14.323242 PCI: 00:08.0: enabled 1
1652 18:49:14.323350 PCI: 00:09.0: enabled 0
1653 18:49:14.326950 PCI: 00:0a.0: enabled 0
1654 18:49:14.329735 PCI: 00:0d.0: enabled 1
1655 18:49:14.333012 PCI: 00:0d.1: enabled 0
1656 18:49:14.333142 PCI: 00:0d.2: enabled 0
1657 18:49:14.336500 PCI: 00:0d.3: enabled 0
1658 18:49:14.339890 PCI: 00:0e.0: enabled 0
1659 18:49:14.343551 PCI: 00:10.2: enabled 1
1660 18:49:14.343638 PCI: 00:10.6: enabled 0
1661 18:49:14.346419 PCI: 00:10.7: enabled 0
1662 18:49:14.349525 PCI: 00:12.0: enabled 0
1663 18:49:14.353339 PCI: 00:12.6: enabled 0
1664 18:49:14.353425 PCI: 00:13.0: enabled 0
1665 18:49:14.356488 PCI: 00:14.0: enabled 1
1666 18:49:14.359780 PCI: 00:14.1: enabled 0
1667 18:49:14.359865 PCI: 00:14.2: enabled 1
1668 18:49:14.363034 PCI: 00:14.3: enabled 1
1669 18:49:14.366418 PCI: 00:15.0: enabled 1
1670 18:49:14.369223 PCI: 00:15.1: enabled 1
1671 18:49:14.369328 PCI: 00:15.2: enabled 1
1672 18:49:14.373179 PCI: 00:15.3: enabled 1
1673 18:49:14.375931 PCI: 00:16.0: enabled 1
1674 18:49:14.379505 PCI: 00:16.1: enabled 0
1675 18:49:14.379616 PCI: 00:16.2: enabled 0
1676 18:49:14.382850 PCI: 00:16.3: enabled 0
1677 18:49:14.385928 PCI: 00:16.4: enabled 0
1678 18:49:14.389566 PCI: 00:16.5: enabled 0
1679 18:49:14.389651 PCI: 00:17.0: enabled 0
1680 18:49:14.392983 PCI: 00:19.0: enabled 0
1681 18:49:14.395545 PCI: 00:19.1: enabled 1
1682 18:49:14.399039 PCI: 00:19.2: enabled 0
1683 18:49:14.399118 PCI: 00:1c.0: enabled 1
1684 18:49:14.402608 PCI: 00:1c.1: enabled 0
1685 18:49:14.405790 PCI: 00:1c.2: enabled 0
1686 18:49:14.408970 PCI: 00:1c.3: enabled 0
1687 18:49:14.409090 PCI: 00:1c.4: enabled 0
1688 18:49:14.412230 PCI: 00:1c.5: enabled 0
1689 18:49:14.416024 PCI: 00:1c.6: enabled 1
1690 18:49:14.419483 PCI: 00:1c.7: enabled 0
1691 18:49:14.419568 PCI: 00:1d.0: enabled 1
1692 18:49:14.422330 PCI: 00:1d.1: enabled 0
1693 18:49:14.425771 PCI: 00:1d.2: enabled 1
1694 18:49:14.425855 PCI: 00:1d.3: enabled 0
1695 18:49:14.428574 PCI: 00:1e.0: enabled 1
1696 18:49:14.432188 PCI: 00:1e.1: enabled 0
1697 18:49:14.435729 PCI: 00:1e.2: enabled 1
1698 18:49:14.435805 PCI: 00:1e.3: enabled 1
1699 18:49:14.438774 PCI: 00:1f.0: enabled 1
1700 18:49:14.442045 PCI: 00:1f.1: enabled 0
1701 18:49:14.445417 PCI: 00:1f.2: enabled 1
1702 18:49:14.445494 PCI: 00:1f.3: enabled 1
1703 18:49:14.448912 PCI: 00:1f.4: enabled 0
1704 18:49:14.452057 PCI: 00:1f.5: enabled 1
1705 18:49:14.455625 PCI: 00:1f.6: enabled 0
1706 18:49:14.455756 PCI: 00:1f.7: enabled 0
1707 18:49:14.458477 APIC: 00: enabled 1
1708 18:49:14.461887 GENERIC: 0.0: enabled 1
1709 18:49:14.461991 GENERIC: 0.0: enabled 1
1710 18:49:14.465149 GENERIC: 1.0: enabled 1
1711 18:49:14.468454 GENERIC: 0.0: enabled 1
1712 18:49:14.471632 GENERIC: 1.0: enabled 1
1713 18:49:14.471759 USB0 port 0: enabled 1
1714 18:49:14.474951 GENERIC: 0.0: enabled 1
1715 18:49:14.478686 USB0 port 0: enabled 1
1716 18:49:14.481459 GENERIC: 0.0: enabled 1
1717 18:49:14.481573 I2C: 00:1a: enabled 1
1718 18:49:14.484858 I2C: 00:31: enabled 1
1719 18:49:14.488222 I2C: 00:32: enabled 1
1720 18:49:14.488348 I2C: 00:10: enabled 1
1721 18:49:14.491770 I2C: 00:15: enabled 1
1722 18:49:14.494609 GENERIC: 0.0: enabled 0
1723 18:49:14.494718 GENERIC: 1.0: enabled 0
1724 18:49:14.498270 GENERIC: 0.0: enabled 1
1725 18:49:14.501675 SPI: 00: enabled 1
1726 18:49:14.501784 SPI: 00: enabled 1
1727 18:49:14.504564 PNP: 0c09.0: enabled 1
1728 18:49:14.508048 GENERIC: 0.0: enabled 1
1729 18:49:14.511435 USB3 port 0: enabled 1
1730 18:49:14.511544 USB3 port 1: enabled 1
1731 18:49:14.514500 USB3 port 2: enabled 0
1732 18:49:14.517919 USB3 port 3: enabled 0
1733 18:49:14.518024 USB2 port 0: enabled 0
1734 18:49:14.521149 USB2 port 1: enabled 1
1735 18:49:14.525016 USB2 port 2: enabled 1
1736 18:49:14.525098 USB2 port 3: enabled 0
1737 18:49:14.528158 USB2 port 4: enabled 1
1738 18:49:14.531544 USB2 port 5: enabled 0
1739 18:49:14.534958 USB2 port 6: enabled 0
1740 18:49:14.535040 USB2 port 7: enabled 0
1741 18:49:14.538222 USB2 port 8: enabled 0
1742 18:49:14.541201 USB2 port 9: enabled 0
1743 18:49:14.541283 USB3 port 0: enabled 0
1744 18:49:14.544099 USB3 port 1: enabled 1
1745 18:49:14.548060 USB3 port 2: enabled 0
1746 18:49:14.551101 USB3 port 3: enabled 0
1747 18:49:14.551180 GENERIC: 0.0: enabled 1
1748 18:49:14.554214 GENERIC: 1.0: enabled 1
1749 18:49:14.557314 APIC: 01: enabled 1
1750 18:49:14.557399 APIC: 07: enabled 1
1751 18:49:14.560820 APIC: 03: enabled 1
1752 18:49:14.564336 APIC: 04: enabled 1
1753 18:49:14.564420 APIC: 06: enabled 1
1754 18:49:14.567861 APIC: 02: enabled 1
1755 18:49:14.567946 APIC: 05: enabled 1
1756 18:49:14.570702 PCI: 01:00.0: enabled 1
1757 18:49:14.577614 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1758 18:49:14.580778 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1759 18:49:14.583894 ELOG: NV offset 0xf30000 size 0x1000
1760 18:49:14.592162 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1761 18:49:14.599101 ELOG: Event(17) added with size 13 at 2024-03-01 18:49:14 UTC
1762 18:49:14.605648 ELOG: Event(92) added with size 9 at 2024-03-01 18:49:14 UTC
1763 18:49:14.612076 ELOG: Event(93) added with size 9 at 2024-03-01 18:49:14 UTC
1764 18:49:14.618638 ELOG: Event(9E) added with size 10 at 2024-03-01 18:49:14 UTC
1765 18:49:14.625333 ELOG: Event(9F) added with size 14 at 2024-03-01 18:49:14 UTC
1766 18:49:14.632041 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1767 18:49:14.638431 ELOG: Event(A1) added with size 10 at 2024-03-01 18:49:14 UTC
1768 18:49:14.645353 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1769 18:49:14.651994 ELOG: Event(A0) added with size 9 at 2024-03-01 18:49:14 UTC
1770 18:49:14.654991 elog_add_boot_reason: Logged dev mode boot
1771 18:49:14.661949 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1772 18:49:14.662034 Finalize devices...
1773 18:49:14.664952 Devices finalized
1774 18:49:14.671917 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1775 18:49:14.675032 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1776 18:49:14.681590 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1777 18:49:14.685158 ME: HFSTS1 : 0x80030055
1778 18:49:14.691266 ME: HFSTS2 : 0x30280116
1779 18:49:14.694697 ME: HFSTS3 : 0x00000050
1780 18:49:14.698507 ME: HFSTS4 : 0x00004000
1781 18:49:14.704794 ME: HFSTS5 : 0x00000000
1782 18:49:14.707650 ME: HFSTS6 : 0x40400006
1783 18:49:14.711284 ME: Manufacturing Mode : YES
1784 18:49:14.714385 ME: SPI Protection Mode Enabled : NO
1785 18:49:14.721387 ME: FW Partition Table : OK
1786 18:49:14.724160 ME: Bringup Loader Failure : NO
1787 18:49:14.727571 ME: Firmware Init Complete : NO
1788 18:49:14.731104 ME: Boot Options Present : NO
1789 18:49:14.734802 ME: Update In Progress : NO
1790 18:49:14.737918 ME: D0i3 Support : YES
1791 18:49:14.740917 ME: Low Power State Enabled : NO
1792 18:49:14.747947 ME: CPU Replaced : YES
1793 18:49:14.751210 ME: CPU Replacement Valid : YES
1794 18:49:14.754302 ME: Current Working State : 5
1795 18:49:14.757632 ME: Current Operation State : 1
1796 18:49:14.760956 ME: Current Operation Mode : 3
1797 18:49:14.763843 ME: Error Code : 0
1798 18:49:14.767292 ME: Enhanced Debug Mode : NO
1799 18:49:14.770784 ME: CPU Debug Disabled : YES
1800 18:49:14.774446 ME: TXT Support : NO
1801 18:49:14.780751 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1802 18:49:14.790841 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1803 18:49:14.793859 CBFS: 'fallback/slic' not found.
1804 18:49:14.797095 ACPI: Writing ACPI tables at 76b01000.
1805 18:49:14.797184 ACPI: * FACS
1806 18:49:14.800651 ACPI: * DSDT
1807 18:49:14.804112 Ramoops buffer: 0x100000@0x76a00000.
1808 18:49:14.807212 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1809 18:49:14.814293 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1810 18:49:14.817170 Google Chrome EC: version:
1811 18:49:14.820306 ro: voema_v2.0.10114-a447f03e46
1812 18:49:14.823782 rw: voema_v2.0.10114-a447f03e46
1813 18:49:14.823866 running image: 2
1814 18:49:14.829918 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1815 18:49:14.835313 ACPI: * FADT
1816 18:49:14.835397 SCI is IRQ9
1817 18:49:14.842124 ACPI: added table 1/32, length now 40
1818 18:49:14.842248 ACPI: * SSDT
1819 18:49:14.845065 Found 1 CPU(s) with 8 core(s) each.
1820 18:49:14.852232 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1821 18:49:14.855101 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1822 18:49:14.858309 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1823 18:49:14.864567 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1824 18:49:14.868172 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1825 18:49:14.874343 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1826 18:49:14.877876 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1827 18:49:14.884744 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1828 18:49:14.890803 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1829 18:49:14.894675 \_SB.PCI0.RP09: Added StorageD3Enable property
1830 18:49:14.900835 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1831 18:49:14.904087 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1832 18:49:14.910834 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1833 18:49:14.914249 PS2K: Passing 80 keymaps to kernel
1834 18:49:14.920706 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1835 18:49:14.927269 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1836 18:49:14.933904 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1837 18:49:14.940430 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1838 18:49:14.947084 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1839 18:49:14.954005 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1840 18:49:14.960269 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1841 18:49:14.967335 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1842 18:49:14.970208 ACPI: added table 2/32, length now 44
1843 18:49:14.973458 ACPI: * MCFG
1844 18:49:14.977009 ACPI: added table 3/32, length now 48
1845 18:49:14.977091 ACPI: * TPM2
1846 18:49:14.980537 TPM2 log created at 0x769f0000
1847 18:49:14.983645 ACPI: added table 4/32, length now 52
1848 18:49:14.986958 ACPI: * MADT
1849 18:49:14.987068 SCI is IRQ9
1850 18:49:14.989870 ACPI: added table 5/32, length now 56
1851 18:49:14.993323 current = 76b09850
1852 18:49:14.993407 ACPI: * DMAR
1853 18:49:14.999964 ACPI: added table 6/32, length now 60
1854 18:49:15.003166 ACPI: added table 7/32, length now 64
1855 18:49:15.003252 ACPI: * HPET
1856 18:49:15.006166 ACPI: added table 8/32, length now 68
1857 18:49:15.009722 ACPI: done.
1858 18:49:15.013272 ACPI tables: 35216 bytes.
1859 18:49:15.013358 smbios_write_tables: 769ef000
1860 18:49:15.018630 EC returned error result code 3
1861 18:49:15.021318 Couldn't obtain OEM name from CBI
1862 18:49:15.025836 Create SMBIOS type 16
1863 18:49:15.028722 Create SMBIOS type 17
1864 18:49:15.031951 GENERIC: 0.0 (WIFI Device)
1865 18:49:15.035386 SMBIOS tables: 1734 bytes.
1866 18:49:15.039106 Writing table forward entry at 0x00000500
1867 18:49:15.045164 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1868 18:49:15.048606 Writing coreboot table at 0x76b25000
1869 18:49:15.055179 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1870 18:49:15.058248 1. 0000000000001000-000000000009ffff: RAM
1871 18:49:15.061908 2. 00000000000a0000-00000000000fffff: RESERVED
1872 18:49:15.068855 3. 0000000000100000-00000000769eefff: RAM
1873 18:49:15.071766 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1874 18:49:15.078314 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1875 18:49:15.084929 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1876 18:49:15.088663 7. 0000000077000000-000000007fbfffff: RESERVED
1877 18:49:15.094546 8. 00000000c0000000-00000000cfffffff: RESERVED
1878 18:49:15.098101 9. 00000000f8000000-00000000f9ffffff: RESERVED
1879 18:49:15.101204 10. 00000000fb000000-00000000fb000fff: RESERVED
1880 18:49:15.108095 11. 00000000fe000000-00000000fe00ffff: RESERVED
1881 18:49:15.111245 12. 00000000fed80000-00000000fed87fff: RESERVED
1882 18:49:15.117728 13. 00000000fed90000-00000000fed92fff: RESERVED
1883 18:49:15.121163 14. 00000000feda0000-00000000feda1fff: RESERVED
1884 18:49:15.128002 15. 00000000fedc0000-00000000feddffff: RESERVED
1885 18:49:15.131621 16. 0000000100000000-00000004803fffff: RAM
1886 18:49:15.134184 Passing 4 GPIOs to payload:
1887 18:49:15.137704 NAME | PORT | POLARITY | VALUE
1888 18:49:15.143982 lid | undefined | high | high
1889 18:49:15.150774 power | undefined | high | low
1890 18:49:15.154310 oprom | undefined | high | low
1891 18:49:15.160942 EC in RW | 0x000000e5 | high | high
1892 18:49:15.167611 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1893 18:49:15.170665 coreboot table: 1576 bytes.
1894 18:49:15.174445 IMD ROOT 0. 0x76fff000 0x00001000
1895 18:49:15.177390 IMD SMALL 1. 0x76ffe000 0x00001000
1896 18:49:15.180446 FSP MEMORY 2. 0x76c4e000 0x003b0000
1897 18:49:15.183834 VPD 3. 0x76c4d000 0x00000367
1898 18:49:15.187158 RO MCACHE 4. 0x76c4c000 0x00000fdc
1899 18:49:15.190767 CONSOLE 5. 0x76c2c000 0x00020000
1900 18:49:15.196939 FMAP 6. 0x76c2b000 0x00000578
1901 18:49:15.200016 TIME STAMP 7. 0x76c2a000 0x00000910
1902 18:49:15.203818 VBOOT WORK 8. 0x76c16000 0x00014000
1903 18:49:15.206581 ROMSTG STCK 9. 0x76c15000 0x00001000
1904 18:49:15.210297 AFTER CAR 10. 0x76c0a000 0x0000b000
1905 18:49:15.213129 RAMSTAGE 11. 0x76b97000 0x00073000
1906 18:49:15.216865 REFCODE 12. 0x76b42000 0x00055000
1907 18:49:15.223279 SMM BACKUP 13. 0x76b32000 0x00010000
1908 18:49:15.226665 4f444749 14. 0x76b30000 0x00002000
1909 18:49:15.229856 EXT VBT15. 0x76b2d000 0x0000219f
1910 18:49:15.233409 COREBOOT 16. 0x76b25000 0x00008000
1911 18:49:15.236233 ACPI 17. 0x76b01000 0x00024000
1912 18:49:15.239715 ACPI GNVS 18. 0x76b00000 0x00001000
1913 18:49:15.243091 RAMOOPS 19. 0x76a00000 0x00100000
1914 18:49:15.246264 TPM2 TCGLOG20. 0x769f0000 0x00010000
1915 18:49:15.249856 SMBIOS 21. 0x769ef000 0x00000800
1916 18:49:15.252997 IMD small region:
1917 18:49:15.256177 IMD ROOT 0. 0x76ffec00 0x00000400
1918 18:49:15.259813 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1919 18:49:15.266114 POWER STATE 2. 0x76ffeb80 0x00000044
1920 18:49:15.269471 ROMSTAGE 3. 0x76ffeb60 0x00000004
1921 18:49:15.272513 MEM INFO 4. 0x76ffe980 0x000001e0
1922 18:49:15.279632 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1923 18:49:15.282508 MTRR: Physical address space:
1924 18:49:15.289208 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1925 18:49:15.292989 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1926 18:49:15.298992 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1927 18:49:15.306073 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1928 18:49:15.312506 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1929 18:49:15.318912 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1930 18:49:15.325506 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1931 18:49:15.329041 MTRR: Fixed MSR 0x250 0x0606060606060606
1932 18:49:15.332315 MTRR: Fixed MSR 0x258 0x0606060606060606
1933 18:49:15.338704 MTRR: Fixed MSR 0x259 0x0000000000000000
1934 18:49:15.342137 MTRR: Fixed MSR 0x268 0x0606060606060606
1935 18:49:15.345588 MTRR: Fixed MSR 0x269 0x0606060606060606
1936 18:49:15.349036 MTRR: Fixed MSR 0x26a 0x0606060606060606
1937 18:49:15.355232 MTRR: Fixed MSR 0x26b 0x0606060606060606
1938 18:49:15.358779 MTRR: Fixed MSR 0x26c 0x0606060606060606
1939 18:49:15.362086 MTRR: Fixed MSR 0x26d 0x0606060606060606
1940 18:49:15.365181 MTRR: Fixed MSR 0x26e 0x0606060606060606
1941 18:49:15.371643 MTRR: Fixed MSR 0x26f 0x0606060606060606
1942 18:49:15.375131 call enable_fixed_mtrr()
1943 18:49:15.378536 CPU physical address size: 39 bits
1944 18:49:15.381815 MTRR: default type WB/UC MTRR counts: 6/7.
1945 18:49:15.385548 MTRR: WB selected as default type.
1946 18:49:15.392187 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1947 18:49:15.398161 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1948 18:49:15.404906 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1949 18:49:15.411358 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1950 18:49:15.418004 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1951 18:49:15.424818 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1952 18:49:15.424902
1953 18:49:15.428144 MTRR check
1954 18:49:15.428237 Fixed MTRRs : Enabled
1955 18:49:15.431029 Variable MTRRs: Enabled
1956 18:49:15.431111
1957 18:49:15.437673 MTRR: Fixed MSR 0x250 0x0606060606060606
1958 18:49:15.441563 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 18:49:15.444540 MTRR: Fixed MSR 0x259 0x0000000000000000
1960 18:49:15.447627 MTRR: Fixed MSR 0x268 0x0606060606060606
1961 18:49:15.451129 MTRR: Fixed MSR 0x269 0x0606060606060606
1962 18:49:15.457736 MTRR: Fixed MSR 0x26a 0x0606060606060606
1963 18:49:15.461453 MTRR: Fixed MSR 0x26b 0x0606060606060606
1964 18:49:15.464456 MTRR: Fixed MSR 0x26c 0x0606060606060606
1965 18:49:15.467584 MTRR: Fixed MSR 0x26d 0x0606060606060606
1966 18:49:15.474456 MTRR: Fixed MSR 0x26e 0x0606060606060606
1967 18:49:15.477383 MTRR: Fixed MSR 0x26f 0x0606060606060606
1968 18:49:15.483772 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1969 18:49:15.487322 call enable_fixed_mtrr()
1970 18:49:15.491258 Checking cr50 for pending updates
1971 18:49:15.494293 CPU physical address size: 39 bits
1972 18:49:15.497998 MTRR: Fixed MSR 0x250 0x0606060606060606
1973 18:49:15.501205 MTRR: Fixed MSR 0x250 0x0606060606060606
1974 18:49:15.508109 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 18:49:15.511125 MTRR: Fixed MSR 0x259 0x0000000000000000
1976 18:49:15.514545 MTRR: Fixed MSR 0x268 0x0606060606060606
1977 18:49:15.517898 MTRR: Fixed MSR 0x269 0x0606060606060606
1978 18:49:15.524790 MTRR: Fixed MSR 0x26a 0x0606060606060606
1979 18:49:15.528281 MTRR: Fixed MSR 0x26b 0x0606060606060606
1980 18:49:15.531336 MTRR: Fixed MSR 0x26c 0x0606060606060606
1981 18:49:15.534661 MTRR: Fixed MSR 0x26d 0x0606060606060606
1982 18:49:15.538079 MTRR: Fixed MSR 0x26e 0x0606060606060606
1983 18:49:15.544499 MTRR: Fixed MSR 0x26f 0x0606060606060606
1984 18:49:15.548012 MTRR: Fixed MSR 0x258 0x0606060606060606
1985 18:49:15.551310 call enable_fixed_mtrr()
1986 18:49:15.554930 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 18:49:15.561035 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 18:49:15.564621 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 18:49:15.567699 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 18:49:15.570948 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 18:49:15.578093 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 18:49:15.581046 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 18:49:15.584396 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 18:49:15.587468 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 18:49:15.592606 CPU physical address size: 39 bits
1996 18:49:15.599537 call enable_fixed_mtrr()
1997 18:49:15.602743 MTRR: Fixed MSR 0x250 0x0606060606060606
1998 18:49:15.605640 CPU physical address size: 39 bits
1999 18:49:15.609796 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 18:49:15.615971 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 18:49:15.619138 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 18:49:15.622744 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 18:49:15.625723 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 18:49:15.629538 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 18:49:15.635545 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 18:49:15.638574 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 18:49:15.642473 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 18:49:15.645165 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 18:49:15.651944 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 18:49:15.655260 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 18:49:15.662023 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 18:49:15.662107 call enable_fixed_mtrr()
2013 18:49:15.668690 MTRR: Fixed MSR 0x259 0x0000000000000000
2014 18:49:15.672224 MTRR: Fixed MSR 0x268 0x0606060606060606
2015 18:49:15.675611 MTRR: Fixed MSR 0x269 0x0606060606060606
2016 18:49:15.678480 MTRR: Fixed MSR 0x26a 0x0606060606060606
2017 18:49:15.684858 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 18:49:15.688126 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 18:49:15.691788 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 18:49:15.694653 MTRR: Fixed MSR 0x26e 0x0606060606060606
2021 18:49:15.701385 MTRR: Fixed MSR 0x26f 0x0606060606060606
2022 18:49:15.704781 CPU physical address size: 39 bits
2023 18:49:15.709578 call enable_fixed_mtrr()
2024 18:49:15.712877 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 18:49:15.719467 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 18:49:15.722422 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 18:49:15.726030 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 18:49:15.729072 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 18:49:15.736070 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 18:49:15.739463 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 18:49:15.742190 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 18:49:15.745811 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 18:49:15.752205 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 18:49:15.755642 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 18:49:15.762108 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 18:49:15.762191 call enable_fixed_mtrr()
2037 18:49:15.768920 MTRR: Fixed MSR 0x259 0x0000000000000000
2038 18:49:15.772084 MTRR: Fixed MSR 0x268 0x0606060606060606
2039 18:49:15.775338 MTRR: Fixed MSR 0x269 0x0606060606060606
2040 18:49:15.779219 MTRR: Fixed MSR 0x26a 0x0606060606060606
2041 18:49:15.782114 MTRR: Fixed MSR 0x26b 0x0606060606060606
2042 18:49:15.788851 MTRR: Fixed MSR 0x26c 0x0606060606060606
2043 18:49:15.792059 MTRR: Fixed MSR 0x26d 0x0606060606060606
2044 18:49:15.795222 MTRR: Fixed MSR 0x26e 0x0606060606060606
2045 18:49:15.798813 MTRR: Fixed MSR 0x26f 0x0606060606060606
2046 18:49:15.803763 CPU physical address size: 39 bits
2047 18:49:15.810430 call enable_fixed_mtrr()
2048 18:49:15.813565 CPU physical address size: 39 bits
2049 18:49:15.816762 CPU physical address size: 39 bits
2050 18:49:15.820148 Reading cr50 TPM mode
2051 18:49:15.829353 BS: BS_PAYLOAD_LOAD entry times (exec / console): 333 / 6 ms
2052 18:49:15.839038 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2053 18:49:15.842579 Checking segment from ROM address 0xffc02b38
2054 18:49:15.845970 Checking segment from ROM address 0xffc02b54
2055 18:49:15.852467 Loading segment from ROM address 0xffc02b38
2056 18:49:15.852549 code (compression=0)
2057 18:49:15.862240 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2058 18:49:15.872016 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2059 18:49:15.872100 it's not compressed!
2060 18:49:16.013235 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2061 18:49:16.019692 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2062 18:49:16.026515 Loading segment from ROM address 0xffc02b54
2063 18:49:16.029884 Entry Point 0x30000000
2064 18:49:16.029989 Loaded segments
2065 18:49:16.036806 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2066 18:49:16.081378 Finalizing chipset.
2067 18:49:16.085077 Finalizing SMM.
2068 18:49:16.085188 APMC done.
2069 18:49:16.091206 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2070 18:49:16.094421 mp_park_aps done after 0 msecs.
2071 18:49:16.098046 Jumping to boot code at 0x30000000(0x76b25000)
2072 18:49:16.107899 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2073 18:49:16.108011
2074 18:49:16.110943
2075 18:49:16.111056
2076 18:49:16.111433 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2077 18:49:16.111535 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2078 18:49:16.111619 Setting prompt string to ['volteer:']
2079 18:49:16.111780 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2080 18:49:16.114603 Starting depthcharge on Voema...
2081 18:49:16.114699
2082 18:49:16.121179 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2083 18:49:16.121288
2084 18:49:16.127479 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2085 18:49:16.127561
2086 18:49:16.133980 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2087 18:49:16.134062
2088 18:49:16.137869 Failed to find eMMC card reader
2089 18:49:16.137951
2090 18:49:16.140747 Wipe memory regions:
2091 18:49:16.140829
2092 18:49:16.144189 [0x00000000001000, 0x000000000a0000)
2093 18:49:16.144277
2094 18:49:16.147609 [0x00000000100000, 0x00000030000000)
2095 18:49:16.182078
2096 18:49:16.185366 [0x00000032662db0, 0x000000769ef000)
2097 18:49:16.233017
2098 18:49:16.236200 [0x00000100000000, 0x00000480400000)
2099 18:49:16.879087
2100 18:49:16.882047 ec_init: CrosEC protocol v3 supported (256, 256)
2101 18:49:17.313823
2102 18:49:17.313962 R8152: Initializing
2103 18:49:17.314032
2104 18:49:17.316592 Version 6 (ocp_data = 5c30)
2105 18:49:17.316676
2106 18:49:17.320000 R8152: Done initializing
2107 18:49:17.320082
2108 18:49:17.322898 Adding net device
2109 18:49:17.624920
2110 18:49:17.627579 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2111 18:49:17.627659
2112 18:49:17.627762
2113 18:49:17.627857
2114 18:49:17.631139 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2116 18:49:17.731510 volteer: tftpboot 192.168.201.1 12909621/tftp-deploy-3ho5sisz/kernel/bzImage 12909621/tftp-deploy-3ho5sisz/kernel/cmdline 12909621/tftp-deploy-3ho5sisz/ramdisk/ramdisk.cpio.gz
2117 18:49:17.731682 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2118 18:49:17.731802 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2119 18:49:17.736489 tftpboot 192.168.201.1 12909621/tftp-deploy-3ho5sisz/kernel/bzImploy-3ho5sisz/kernel/cmdline 12909621/tftp-deploy-3ho5sisz/ramdisk/ramdisk.cpio.gz
2120 18:49:17.736575
2121 18:49:17.736641 Waiting for link
2122 18:49:17.940220
2123 18:49:17.940369 done.
2124 18:49:17.940436
2125 18:49:17.940497 MAC: 00:24:32:30:7d:ab
2126 18:49:17.940555
2127 18:49:17.943267 Sending DHCP discover... done.
2128 18:49:17.943350
2129 18:49:17.946596 Waiting for reply... done.
2130 18:49:17.946678
2131 18:49:17.951036 Sending DHCP request... done.
2132 18:49:17.951128
2133 18:49:17.956868 Waiting for reply... done.
2134 18:49:17.956951
2135 18:49:17.957016 My ip is 192.168.201.20
2136 18:49:17.957076
2137 18:49:17.959920 The DHCP server ip is 192.168.201.1
2138 18:49:17.963935
2139 18:49:17.966527 TFTP server IP predefined by user: 192.168.201.1
2140 18:49:17.966610
2141 18:49:17.973385 Bootfile predefined by user: 12909621/tftp-deploy-3ho5sisz/kernel/bzImage
2142 18:49:17.973468
2143 18:49:17.976423 Sending tftp read request... done.
2144 18:49:17.976505
2145 18:49:17.982903 Waiting for the transfer...
2146 18:49:17.982992
2147 18:49:18.515574 00000000 ################################################################
2148 18:49:18.515774
2149 18:49:19.033532 00080000 ################################################################
2150 18:49:19.033710
2151 18:49:19.557622 00100000 ################################################################
2152 18:49:19.557791
2153 18:49:20.083414 00180000 ################################################################
2154 18:49:20.083586
2155 18:49:20.601601 00200000 ################################################################
2156 18:49:20.601761
2157 18:49:21.128897 00280000 ################################################################
2158 18:49:21.129038
2159 18:49:21.647051 00300000 ################################################################
2160 18:49:21.647233
2161 18:49:22.167465 00380000 ################################################################
2162 18:49:22.167613
2163 18:49:22.683376 00400000 ################################################################
2164 18:49:22.683546
2165 18:49:23.200252 00480000 ################################################################
2166 18:49:23.200396
2167 18:49:23.714739 00500000 ################################################################
2168 18:49:23.714914
2169 18:49:24.233689 00580000 ################################################################
2170 18:49:24.233826
2171 18:49:24.751537 00600000 ################################################################
2172 18:49:24.751721
2173 18:49:25.266549 00680000 ################################################################
2174 18:49:25.266700
2175 18:49:25.771896 00700000 ################################################################
2176 18:49:25.772098
2177 18:49:26.283416 00780000 ################################################################
2178 18:49:26.283555
2179 18:49:26.827809 00800000 ################################################################
2180 18:49:26.827949
2181 18:49:27.368103 00880000 ################################################################
2182 18:49:27.368247
2183 18:49:27.923617 00900000 ################################################################
2184 18:49:27.923779
2185 18:49:28.489707 00980000 ################################################################
2186 18:49:28.489840
2187 18:49:29.042514 00a00000 ################################################################
2188 18:49:29.042650
2189 18:49:29.591901 00a80000 ################################################################
2190 18:49:29.592039
2191 18:49:30.127628 00b00000 ################################################################
2192 18:49:30.127788
2193 18:49:30.423960 00b80000 #################################### done.
2194 18:49:30.424104
2195 18:49:30.427870 The bootfile was 12349440 bytes long.
2196 18:49:30.427953
2197 18:49:30.430299 Sending tftp read request... done.
2198 18:49:30.430381
2199 18:49:30.434079 Waiting for the transfer...
2200 18:49:30.434161
2201 18:49:30.986261 00000000 ################################################################
2202 18:49:30.986398
2203 18:49:31.538520 00080000 ################################################################
2204 18:49:31.538663
2205 18:49:32.081156 00100000 ################################################################
2206 18:49:32.081289
2207 18:49:32.625570 00180000 ################################################################
2208 18:49:32.625713
2209 18:49:33.162116 00200000 ################################################################
2210 18:49:33.162366
2211 18:49:33.728468 00280000 ################################################################
2212 18:49:33.728599
2213 18:49:34.275931 00300000 ################################################################
2214 18:49:34.276068
2215 18:49:34.821132 00380000 ################################################################
2216 18:49:34.821276
2217 18:49:35.371983 00400000 ################################################################
2218 18:49:35.372132
2219 18:49:35.978098 00480000 ################################################################
2220 18:49:35.978264
2221 18:49:36.511503 00500000 ################################################################
2222 18:49:36.511664
2223 18:49:37.030200 00580000 ################################################################
2224 18:49:37.030344
2225 18:49:37.562942 00600000 ################################################################
2226 18:49:37.563075
2227 18:49:38.131395 00680000 ################################################################
2228 18:49:38.131951
2229 18:49:38.797830 00700000 ################################################################
2230 18:49:38.798408
2231 18:49:39.405748 00780000 ################################################################
2232 18:49:39.405913
2233 18:49:39.972913 00800000 ################################################################
2234 18:49:39.973044
2235 18:49:40.545021 00880000 ################################################################
2236 18:49:40.545158
2237 18:49:41.117390 00900000 ################################################################
2238 18:49:41.117556
2239 18:49:41.659063 00980000 ################################################################
2240 18:49:41.659228
2241 18:49:42.197144 00a00000 ################################################################
2242 18:49:42.197280
2243 18:49:42.750870 00a80000 ################################################################
2244 18:49:42.751007
2245 18:49:43.351851 00b00000 ################################################################
2246 18:49:43.351994
2247 18:49:43.972755 00b80000 ################################################################
2248 18:49:43.972926
2249 18:49:44.491637 00c00000 ################################################################
2250 18:49:44.491784
2251 18:49:45.013514 00c80000 ################################################################
2252 18:49:45.013677
2253 18:49:45.531817 00d00000 ################################################################
2254 18:49:45.531952
2255 18:49:46.049501 00d80000 ################################################################
2256 18:49:46.049673
2257 18:49:46.587585 00e00000 ################################################################
2258 18:49:46.587777
2259 18:49:47.122302 00e80000 ################################################################
2260 18:49:47.122440
2261 18:49:47.664431 00f00000 ################################################################
2262 18:49:47.664576
2263 18:49:48.228613 00f80000 ################################################################
2264 18:49:48.228751
2265 18:49:48.802549 01000000 ################################################################
2266 18:49:48.802688
2267 18:49:49.328797 01080000 ################################################################
2268 18:49:49.328936
2269 18:49:49.854300 01100000 ################################################################
2270 18:49:49.854465
2271 18:49:50.390188 01180000 ################################################################
2272 18:49:50.390324
2273 18:49:50.923901 01200000 ################################################################
2274 18:49:50.924047
2275 18:49:51.470256 01280000 ################################################################
2276 18:49:51.470406
2277 18:49:52.037254 01300000 ################################################################
2278 18:49:52.037400
2279 18:49:52.611464 01380000 ################################################################
2280 18:49:52.611615
2281 18:49:53.149678 01400000 ################################################################
2282 18:49:53.149833
2283 18:49:53.699123 01480000 ################################################################
2284 18:49:53.699255
2285 18:49:54.275107 01500000 ################################################################
2286 18:49:54.275245
2287 18:49:54.834818 01580000 ################################################################
2288 18:49:54.834972
2289 18:49:55.393021 01600000 ################################################################
2290 18:49:55.393158
2291 18:49:55.941840 01680000 ################################################################
2292 18:49:55.942097
2293 18:49:56.529195 01700000 ################################################################
2294 18:49:56.529327
2295 18:49:57.081315 01780000 ################################################################
2296 18:49:57.081530
2297 18:49:57.635346 01800000 ################################################################
2298 18:49:57.635484
2299 18:49:58.204509 01880000 ################################################################
2300 18:49:58.204641
2301 18:49:58.849727 01900000 ################################################################
2302 18:49:58.850252
2303 18:49:59.463605 01980000 ################################################################
2304 18:49:59.463926
2305 18:50:00.047650 01a00000 ################################################################
2306 18:50:00.047877
2307 18:50:00.682135 01a80000 ################################################################
2308 18:50:00.682656
2309 18:50:01.343709 01b00000 ################################################################
2310 18:50:01.344391
2311 18:50:02.014376 01b80000 ################################################################
2312 18:50:02.014911
2313 18:50:02.699097 01c00000 ################################################################
2314 18:50:02.699644
2315 18:50:03.343363 01c80000 ################################################################
2316 18:50:03.343909
2317 18:50:03.962741 01d00000 ################################################################
2318 18:50:03.962890
2319 18:50:04.540176 01d80000 ################################################################
2320 18:50:04.540329
2321 18:50:05.095780 01e00000 ################################################################
2322 18:50:05.096321
2323 18:50:05.755731 01e80000 ################################################################
2324 18:50:05.756249
2325 18:50:06.378582 01f00000 ################################################################
2326 18:50:06.378722
2327 18:50:06.974184 01f80000 ################################################################
2328 18:50:06.974697
2329 18:50:07.528830 02000000 ################################################################
2330 18:50:07.529027
2331 18:50:08.086726 02080000 ################################################################
2332 18:50:08.086872
2333 18:50:08.649864 02100000 ################################################################
2334 18:50:08.650016
2335 18:50:09.206846 02180000 ################################################################
2336 18:50:09.206998
2337 18:50:09.769574 02200000 ################################################################
2338 18:50:09.769735
2339 18:50:10.103457 02280000 ###################################### done.
2340 18:50:10.103593
2341 18:50:10.106564 Sending tftp read request... done.
2342 18:50:10.106655
2343 18:50:10.109572 Waiting for the transfer...
2344 18:50:10.109676
2345 18:50:10.112966 00000000 # done.
2346 18:50:10.113066
2347 18:50:10.119907 Command line loaded dynamically from TFTP file: 12909621/tftp-deploy-3ho5sisz/kernel/cmdline
2348 18:50:10.120021
2349 18:50:10.136074 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2350 18:50:10.143011
2351 18:50:10.146253 Shutting down all USB controllers.
2352 18:50:10.146452
2353 18:50:10.146608 Removing current net device
2354 18:50:10.146755
2355 18:50:10.150281 Finalizing coreboot
2356 18:50:10.150542
2357 18:50:10.156334 Exiting depthcharge with code 4 at timestamp: 62620832
2358 18:50:10.156542
2359 18:50:10.156772
2360 18:50:10.156989 Starting kernel ...
2361 18:50:10.157204
2362 18:50:10.157418
2363 18:50:10.159077 end: 2.2.4 bootloader-commands (duration 00:00:54) [common]
2364 18:50:10.159304 start: 2.2.5 auto-login-action (timeout 00:03:51) [common]
2365 18:50:10.159483 Setting prompt string to ['Linux version [0-9]']
2366 18:50:10.159643 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2367 18:50:10.159834 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2369 18:54:01.159615 end: 2.2.5 auto-login-action (duration 00:03:51) [common]
2371 18:54:01.159868 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 231 seconds'
2373 18:54:01.160037 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2376 18:54:01.160288 end: 2 depthcharge-action (duration 00:05:00) [common]
2378 18:54:01.160517 Cleaning after the job
2379 18:54:01.160604 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909621/tftp-deploy-3ho5sisz/ramdisk
2380 18:54:01.165896 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909621/tftp-deploy-3ho5sisz/kernel
2381 18:54:01.167788 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909621/tftp-deploy-3ho5sisz/modules
2382 18:54:01.168415 start: 4.1 power-off (timeout 00:00:30) [common]
2383 18:54:01.168577 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2384 18:54:01.244064 >> Command sent successfully.
2385 18:54:01.246552 Returned 0 in 0 seconds
2386 18:54:01.346896 end: 4.1 power-off (duration 00:00:00) [common]
2388 18:54:01.347222 start: 4.2 read-feedback (timeout 00:10:00) [common]
2389 18:54:01.347484 Listened to connection for namespace 'common' for up to 1s
2390 18:54:02.347766 Finalising connection for namespace 'common'
2391 18:54:02.347949 Disconnecting from shell: Finalise
2392 18:54:02.348033
2393 18:54:02.448325 end: 4.2 read-feedback (duration 00:00:01) [common]
2394 18:54:02.448484 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12909621
2395 18:54:02.540611 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12909621
2396 18:54:02.540792 JobError: Your job cannot terminate cleanly.