Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 18:48:58.565228 lava-dispatcher, installed at version: 2024.01
2 18:48:58.565476 start: 0 validate
3 18:48:58.565625 Start time: 2024-03-01 18:48:58.565617+00:00 (UTC)
4 18:48:58.565767 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:48:58.565916 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 18:48:58.819471 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:48:58.820008 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:48:59.089938 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:48:59.090570 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 18:49:03.651539 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:49:03.652537 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 18:49:03.912572 validate duration: 5.35
14 18:49:03.913852 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:49:03.914410 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:49:03.914860 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:49:03.915432 Not decompressing ramdisk as can be used compressed.
18 18:49:03.915861 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20240129.0/amd64/initrd.cpio.gz
19 18:49:03.916189 saving as /var/lib/lava/dispatcher/tmp/12909587/tftp-deploy-jpbbrewi/ramdisk/initrd.cpio.gz
20 18:49:03.916516 total size: 5670327 (5 MB)
21 18:49:04.535789 progress 0 % (0 MB)
22 18:49:04.539519 progress 5 % (0 MB)
23 18:49:04.541281 progress 10 % (0 MB)
24 18:49:04.542802 progress 15 % (0 MB)
25 18:49:04.544720 progress 20 % (1 MB)
26 18:49:04.546371 progress 25 % (1 MB)
27 18:49:04.547823 progress 30 % (1 MB)
28 18:49:04.549483 progress 35 % (1 MB)
29 18:49:04.551106 progress 40 % (2 MB)
30 18:49:04.552556 progress 45 % (2 MB)
31 18:49:04.554275 progress 50 % (2 MB)
32 18:49:04.555890 progress 55 % (3 MB)
33 18:49:04.557451 progress 60 % (3 MB)
34 18:49:04.559068 progress 65 % (3 MB)
35 18:49:04.560853 progress 70 % (3 MB)
36 18:49:04.562395 progress 75 % (4 MB)
37 18:49:04.564102 progress 80 % (4 MB)
38 18:49:04.565753 progress 85 % (4 MB)
39 18:49:04.567235 progress 90 % (4 MB)
40 18:49:04.568976 progress 95 % (5 MB)
41 18:49:04.570616 progress 100 % (5 MB)
42 18:49:04.570725 5 MB downloaded in 0.65 s (8.27 MB/s)
43 18:49:04.570878 end: 1.1.1 http-download (duration 00:00:01) [common]
45 18:49:04.571130 end: 1.1 download-retry (duration 00:00:01) [common]
46 18:49:04.571219 start: 1.2 download-retry (timeout 00:09:59) [common]
47 18:49:04.571305 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 18:49:04.571445 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 18:49:04.571518 saving as /var/lib/lava/dispatcher/tmp/12909587/tftp-deploy-jpbbrewi/kernel/bzImage
50 18:49:04.571581 total size: 12349440 (11 MB)
51 18:49:04.571644 No compression specified
52 18:49:04.572891 progress 0 % (0 MB)
53 18:49:04.576499 progress 5 % (0 MB)
54 18:49:04.580150 progress 10 % (1 MB)
55 18:49:04.583794 progress 15 % (1 MB)
56 18:49:04.587252 progress 20 % (2 MB)
57 18:49:04.590710 progress 25 % (2 MB)
58 18:49:04.594143 progress 30 % (3 MB)
59 18:49:04.597436 progress 35 % (4 MB)
60 18:49:04.600872 progress 40 % (4 MB)
61 18:49:04.604263 progress 45 % (5 MB)
62 18:49:04.607705 progress 50 % (5 MB)
63 18:49:04.611220 progress 55 % (6 MB)
64 18:49:04.614773 progress 60 % (7 MB)
65 18:49:04.618086 progress 65 % (7 MB)
66 18:49:04.621565 progress 70 % (8 MB)
67 18:49:04.625042 progress 75 % (8 MB)
68 18:49:04.628668 progress 80 % (9 MB)
69 18:49:04.632048 progress 85 % (10 MB)
70 18:49:04.635493 progress 90 % (10 MB)
71 18:49:04.639054 progress 95 % (11 MB)
72 18:49:04.642425 progress 100 % (11 MB)
73 18:49:04.642671 11 MB downloaded in 0.07 s (165.68 MB/s)
74 18:49:04.642825 end: 1.2.1 http-download (duration 00:00:00) [common]
76 18:49:04.643076 end: 1.2 download-retry (duration 00:00:00) [common]
77 18:49:04.643173 start: 1.3 download-retry (timeout 00:09:59) [common]
78 18:49:04.643267 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 18:49:04.643415 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20240129.0/amd64/full.rootfs.tar.xz
80 18:49:04.643489 saving as /var/lib/lava/dispatcher/tmp/12909587/tftp-deploy-jpbbrewi/nfsrootfs/full.rootfs.tar
81 18:49:04.643561 total size: 127582724 (121 MB)
82 18:49:04.643687 Using unxz to decompress xz
83 18:49:04.653391 progress 0 % (0 MB)
84 18:49:05.200294 progress 5 % (6 MB)
85 18:49:05.749438 progress 10 % (12 MB)
86 18:49:06.329434 progress 15 % (18 MB)
87 18:49:06.905018 progress 20 % (24 MB)
88 18:49:07.344036 progress 25 % (30 MB)
89 18:49:07.695761 progress 30 % (36 MB)
90 18:49:08.034644 progress 35 % (42 MB)
91 18:49:08.221013 progress 40 % (48 MB)
92 18:49:08.646678 progress 45 % (54 MB)
93 18:49:09.073549 progress 50 % (60 MB)
94 18:49:09.476804 progress 55 % (66 MB)
95 18:49:09.885945 progress 60 % (73 MB)
96 18:49:10.277429 progress 65 % (79 MB)
97 18:49:10.704607 progress 70 % (85 MB)
98 18:49:11.168681 progress 75 % (91 MB)
99 18:49:11.638181 progress 80 % (97 MB)
100 18:49:11.762165 progress 85 % (103 MB)
101 18:49:11.932755 progress 90 % (109 MB)
102 18:49:12.309651 progress 95 % (115 MB)
103 18:49:12.728661 progress 100 % (121 MB)
104 18:49:12.734733 121 MB downloaded in 8.09 s (15.04 MB/s)
105 18:49:12.735018 end: 1.3.1 http-download (duration 00:00:08) [common]
107 18:49:12.735321 end: 1.3 download-retry (duration 00:00:08) [common]
108 18:49:12.735422 start: 1.4 download-retry (timeout 00:09:51) [common]
109 18:49:12.735523 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 18:49:12.735694 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 18:49:12.735776 saving as /var/lib/lava/dispatcher/tmp/12909587/tftp-deploy-jpbbrewi/modules/modules.tar
112 18:49:12.735846 total size: 484604 (0 MB)
113 18:49:12.735917 Using unxz to decompress xz
114 18:49:12.740506 progress 6 % (0 MB)
115 18:49:12.741027 progress 13 % (0 MB)
116 18:49:12.741304 progress 20 % (0 MB)
117 18:49:12.743155 progress 27 % (0 MB)
118 18:49:12.745278 progress 33 % (0 MB)
119 18:49:12.747564 progress 40 % (0 MB)
120 18:49:12.749746 progress 47 % (0 MB)
121 18:49:12.751743 progress 54 % (0 MB)
122 18:49:12.754069 progress 60 % (0 MB)
123 18:49:12.756602 progress 67 % (0 MB)
124 18:49:12.759068 progress 74 % (0 MB)
125 18:49:12.761099 progress 81 % (0 MB)
126 18:49:12.763291 progress 87 % (0 MB)
127 18:49:12.765755 progress 94 % (0 MB)
128 18:49:12.768244 progress 100 % (0 MB)
129 18:49:12.774962 0 MB downloaded in 0.04 s (11.82 MB/s)
130 18:49:12.775230 end: 1.4.1 http-download (duration 00:00:00) [common]
132 18:49:12.775532 end: 1.4 download-retry (duration 00:00:00) [common]
133 18:49:12.775638 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 18:49:12.775746 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 18:49:16.067359 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12909587/extract-nfsrootfs-v9gzu7mf
136 18:49:16.067594 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 18:49:16.067751 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 18:49:16.067998 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw
139 18:49:16.068204 makedir: /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin
140 18:49:16.068367 makedir: /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/tests
141 18:49:16.068534 makedir: /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/results
142 18:49:16.068978 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-add-keys
143 18:49:16.069216 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-add-sources
144 18:49:16.069377 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-background-process-start
145 18:49:16.069528 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-background-process-stop
146 18:49:16.069675 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-common-functions
147 18:49:16.069820 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-echo-ipv4
148 18:49:16.069964 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-install-packages
149 18:49:16.070107 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-installed-packages
150 18:49:16.070250 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-os-build
151 18:49:16.070393 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-probe-channel
152 18:49:16.070540 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-probe-ip
153 18:49:16.070683 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-target-ip
154 18:49:16.070824 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-target-mac
155 18:49:16.070965 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-target-storage
156 18:49:16.071111 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-test-case
157 18:49:16.071255 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-test-event
158 18:49:16.071396 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-test-feedback
159 18:49:16.071539 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-test-raise
160 18:49:16.071679 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-test-reference
161 18:49:16.071821 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-test-runner
162 18:49:16.071963 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-test-set
163 18:49:16.072104 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-test-shell
164 18:49:16.072246 Updating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-install-packages (oe)
165 18:49:16.072418 Updating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/bin/lava-installed-packages (oe)
166 18:49:16.072557 Creating /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/environment
167 18:49:16.072675 LAVA metadata
168 18:49:16.072757 - LAVA_JOB_ID=12909587
169 18:49:16.072829 - LAVA_DISPATCHER_IP=192.168.201.1
170 18:49:16.072940 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
171 18:49:16.073015 skipped lava-vland-overlay
172 18:49:16.073099 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 18:49:16.073188 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
174 18:49:16.073256 skipped lava-multinode-overlay
175 18:49:16.073338 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 18:49:16.073426 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
177 18:49:16.073509 Loading test definitions
178 18:49:16.073607 start: 1.5.2.3.1 git-repo-action (timeout 00:09:48) [common]
179 18:49:16.073686 Using /lava-12909587 at stage 0
180 18:49:16.073802 Fetching tests from https://github.com/kernelci/test-definitions
181 18:49:16.073897 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/0/tests/0_ltp-ipc'
182 18:49:18.469893 Running '/usr/bin/git checkout kernelci.org
183 18:49:18.632271 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 18:49:18.633197 uuid=12909587_1.5.2.3.1 testdef=None
185 18:49:18.633380 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
187 18:49:18.633656 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
188 18:49:18.634515 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 18:49:18.634772 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
191 18:49:18.635884 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 18:49:18.636149 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
194 18:49:18.637273 runner path: /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/0/tests/0_ltp-ipc test_uuid 12909587_1.5.2.3.1
195 18:49:18.637372 SKIPFILE='skipfile-lkft.yaml'
196 18:49:18.637446 SKIP_INSTALL='true'
197 18:49:18.637513 TST_CMDFILES='ipc'
198 18:49:18.637677 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 18:49:18.637915 Creating lava-test-runner.conf files
201 18:49:18.637988 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12909587/lava-overlay-n2wqflkw/lava-12909587/0 for stage 0
202 18:49:18.638090 - 0_ltp-ipc
203 18:49:18.638225 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
204 18:49:18.638339 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
205 18:49:26.927732 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 18:49:26.927893 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
207 18:49:26.927991 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 18:49:26.928094 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
209 18:49:26.928191 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
210 18:49:27.086402 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 18:49:27.086856 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
212 18:49:27.086989 extracting modules file /var/lib/lava/dispatcher/tmp/12909587/tftp-deploy-jpbbrewi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12909587/extract-nfsrootfs-v9gzu7mf
213 18:49:27.109492 extracting modules file /var/lib/lava/dispatcher/tmp/12909587/tftp-deploy-jpbbrewi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12909587/extract-overlay-ramdisk-qw5wowc1/ramdisk
214 18:49:27.132022 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 18:49:27.132169 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
216 18:49:27.132271 [common] Applying overlay to NFS
217 18:49:27.132378 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12909587/compress-overlay-z9a53ppe/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12909587/extract-nfsrootfs-v9gzu7mf
218 18:49:28.164540 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 18:49:28.164718 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
220 18:49:28.164827 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 18:49:28.164924 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
222 18:49:28.165017 Building ramdisk /var/lib/lava/dispatcher/tmp/12909587/extract-overlay-ramdisk-qw5wowc1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12909587/extract-overlay-ramdisk-qw5wowc1/ramdisk
223 18:49:28.268920 >> 31364 blocks
224 18:49:28.941322 rename /var/lib/lava/dispatcher/tmp/12909587/extract-overlay-ramdisk-qw5wowc1/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12909587/tftp-deploy-jpbbrewi/ramdisk/ramdisk.cpio.gz
225 18:49:28.941810 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 18:49:28.941950 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
227 18:49:28.942061 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
228 18:49:28.942169 No mkimage arch provided, not using FIT.
229 18:49:28.942271 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 18:49:28.942369 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 18:49:28.942488 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
232 18:49:28.942589 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
233 18:49:28.942680 No LXC device requested
234 18:49:28.942770 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 18:49:28.942868 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
236 18:49:28.942956 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 18:49:28.943036 Checking files for TFTP limit of 4294967296 bytes.
238 18:49:28.943473 end: 1 tftp-deploy (duration 00:00:25) [common]
239 18:49:28.943588 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 18:49:28.943694 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 18:49:28.943837 substitutions:
242 18:49:28.943911 - {DTB}: None
243 18:49:28.943981 - {INITRD}: 12909587/tftp-deploy-jpbbrewi/ramdisk/ramdisk.cpio.gz
244 18:49:28.944047 - {KERNEL}: 12909587/tftp-deploy-jpbbrewi/kernel/bzImage
245 18:49:28.944142 - {LAVA_MAC}: None
246 18:49:28.944233 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12909587/extract-nfsrootfs-v9gzu7mf
247 18:49:28.944296 - {NFS_SERVER_IP}: 192.168.201.1
248 18:49:28.944357 - {PRESEED_CONFIG}: None
249 18:49:28.944417 - {PRESEED_LOCAL}: None
250 18:49:28.944476 - {RAMDISK}: 12909587/tftp-deploy-jpbbrewi/ramdisk/ramdisk.cpio.gz
251 18:49:28.944536 - {ROOT_PART}: None
252 18:49:28.944595 - {ROOT}: None
253 18:49:28.944701 - {SERVER_IP}: 192.168.201.1
254 18:49:28.944761 - {TEE}: None
255 18:49:28.944820 Parsed boot commands:
256 18:49:28.944879 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 18:49:28.945081 Parsed boot commands: tftpboot 192.168.201.1 12909587/tftp-deploy-jpbbrewi/kernel/bzImage 12909587/tftp-deploy-jpbbrewi/kernel/cmdline 12909587/tftp-deploy-jpbbrewi/ramdisk/ramdisk.cpio.gz
258 18:49:28.945180 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 18:49:28.945280 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 18:49:28.945382 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 18:49:28.945479 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 18:49:28.945557 Not connected, no need to disconnect.
263 18:49:28.945638 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 18:49:28.945726 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 18:49:28.945803 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-11'
266 18:49:28.950622 Setting prompt string to ['lava-test: # ']
267 18:49:28.951028 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 18:49:28.951150 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 18:49:28.951254 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 18:49:28.951353 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 18:49:28.951597 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
272 18:49:34.087571 >> Command sent successfully.
273 18:49:34.090285 Returned 0 in 5 seconds
274 18:49:34.190704 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 18:49:34.191171 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 18:49:34.191324 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 18:49:34.191463 Setting prompt string to 'Starting depthcharge on Voema...'
279 18:49:34.191575 Changing prompt to 'Starting depthcharge on Voema...'
280 18:49:34.191675 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
281 18:49:34.191983 [Enter `^Ec?' for help]
282 18:49:35.753658
283 18:49:35.753818
284 18:49:35.764302 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
285 18:49:35.767102 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
286 18:49:35.773844 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
287 18:49:35.777256 CPU: AES supported, TXT NOT supported, VT supported
288 18:49:35.784041 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
289 18:49:35.787942 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
290 18:49:35.794784 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
291 18:49:35.797457 VBOOT: Loading verstage.
292 18:49:35.800929 FMAP: Found "FLASH" version 1.1 at 0x1804000.
293 18:49:35.807364 FMAP: base = 0x0 size = 0x2000000 #areas = 32
294 18:49:35.811174 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
295 18:49:35.820678 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
296 18:49:35.827631 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
297 18:49:35.827731
298 18:49:35.827829
299 18:49:35.838028 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
300 18:49:35.854347 Probing TPM: . done!
301 18:49:35.858281 TPM ready after 0 ms
302 18:49:35.861629 Connected to device vid:did:rid of 1ae0:0028:00
303 18:49:35.872286 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
304 18:49:35.879151 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 18:49:35.882419 Initialized TPM device CR50 revision 0
306 18:49:35.937813 tlcl_send_startup: Startup return code is 0
307 18:49:35.937942 TPM: setup succeeded
308 18:49:35.952305 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 18:49:35.966075 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 18:49:35.979341 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 18:49:35.989187 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 18:49:35.992432 Chrome EC: UHEPI supported
313 18:49:35.995947 Phase 1
314 18:49:35.999343 FMAP: area GBB found @ 1805000 (458752 bytes)
315 18:49:36.005930 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
316 18:49:36.015568 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
317 18:49:36.022829 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
318 18:49:36.029191 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
319 18:49:36.032510 Recovery requested (1009000e)
320 18:49:36.035675 TPM: Extending digest for VBOOT: boot mode into PCR 0
321 18:49:36.047280 tlcl_extend: response is 0
322 18:49:36.053651 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
323 18:49:36.063680 tlcl_extend: response is 0
324 18:49:36.070142 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
325 18:49:36.076796 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
326 18:49:36.083640 BS: verstage times (exec / console): total (unknown) / 142 ms
327 18:49:36.083765
328 18:49:36.083873
329 18:49:36.096868 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
330 18:49:36.103606 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
331 18:49:36.106665 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
332 18:49:36.109979 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
333 18:49:36.116902 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
334 18:49:36.120014 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
335 18:49:36.123448 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
336 18:49:36.126943 TCO_STS: 0000 0000
337 18:49:36.130046 GEN_PMCON: d0015038 00002200
338 18:49:36.133164 GBLRST_CAUSE: 00000000 00000000
339 18:49:36.133244 HPR_CAUSE0: 00000000
340 18:49:36.136497 prev_sleep_state 5
341 18:49:36.140062 Boot Count incremented to 25174
342 18:49:36.146855 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
343 18:49:36.152965 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
344 18:49:36.159693 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
345 18:49:36.166521 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
346 18:49:36.170778 Chrome EC: UHEPI supported
347 18:49:36.177782 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
348 18:49:36.190391 Probing TPM: done!
349 18:49:36.197445 Connected to device vid:did:rid of 1ae0:0028:00
350 18:49:36.207068 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
351 18:49:36.210840 Initialized TPM device CR50 revision 0
352 18:49:36.225574 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
353 18:49:36.232126 MRC: Hash idx 0x100b comparison successful.
354 18:49:36.235528 MRC cache found, size faa8
355 18:49:36.235609 bootmode is set to: 2
356 18:49:36.238854 SPD index = 2
357 18:49:36.245277 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
358 18:49:36.248449 SPD: module type is LPDDR4X
359 18:49:36.251877 SPD: module part number is MT53D1G64D4NW-046
360 18:49:36.258534 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
361 18:49:36.262015 SPD: device width 16 bits, bus width 16 bits
362 18:49:36.268785 SPD: module size is 2048 MB (per channel)
363 18:49:36.697096 CBMEM:
364 18:49:36.700454 IMD: root @ 0x76fff000 254 entries.
365 18:49:36.703553 IMD: root @ 0x76ffec00 62 entries.
366 18:49:36.707431 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
367 18:49:36.713539 FMAP: area RW_VPD found @ f35000 (8192 bytes)
368 18:49:36.717182 External stage cache:
369 18:49:36.720269 IMD: root @ 0x7b3ff000 254 entries.
370 18:49:36.723546 IMD: root @ 0x7b3fec00 62 entries.
371 18:49:36.738278 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
372 18:49:36.745012 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
373 18:49:36.751694 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
374 18:49:36.765347 MRC: 'RECOVERY_MRC_CACHE' does not need update.
375 18:49:36.771926 cse_lite: Skip switching to RW in the recovery path
376 18:49:36.772040 8 DIMMs found
377 18:49:36.772149 SMM Memory Map
378 18:49:36.775070 SMRAM : 0x7b000000 0x800000
379 18:49:36.781847 Subregion 0: 0x7b000000 0x200000
380 18:49:36.785559 Subregion 1: 0x7b200000 0x200000
381 18:49:36.788715 Subregion 2: 0x7b400000 0x400000
382 18:49:36.788830 top_of_ram = 0x77000000
383 18:49:36.795624 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
384 18:49:36.801915 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
385 18:49:36.805351 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
386 18:49:36.811833 MTRR Range: Start=ff000000 End=0 (Size 1000000)
387 18:49:36.818215 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
388 18:49:36.825374 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
389 18:49:36.834917 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
390 18:49:36.841680 Processing 211 relocs. Offset value of 0x74c0b000
391 18:49:36.848105 BS: romstage times (exec / console): total (unknown) / 277 ms
392 18:49:36.853691
393 18:49:36.853806
394 18:49:36.864893 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
395 18:49:36.868233 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
396 18:49:36.874937 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
397 18:49:36.884804 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
398 18:49:36.891375 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
399 18:49:36.898189 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
400 18:49:36.940741 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
401 18:49:36.947327 Processing 5008 relocs. Offset value of 0x75d98000
402 18:49:36.950649 BS: postcar times (exec / console): total (unknown) / 59 ms
403 18:49:36.953790
404 18:49:36.953878
405 18:49:36.963639 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
406 18:49:36.963762 Normal boot
407 18:49:36.967250 FW_CONFIG value is 0x804c02
408 18:49:36.970623 PCI: 00:07.0 disabled by fw_config
409 18:49:36.973785 PCI: 00:07.1 disabled by fw_config
410 18:49:36.977167 PCI: 00:0d.2 disabled by fw_config
411 18:49:36.980457 PCI: 00:1c.7 disabled by fw_config
412 18:49:36.987280 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 18:49:36.993704 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 18:49:36.996947 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 18:49:37.000319 GENERIC: 0.0 disabled by fw_config
416 18:49:37.007075 GENERIC: 1.0 disabled by fw_config
417 18:49:37.010249 fw_config match found: DB_USB=USB3_ACTIVE
418 18:49:37.013447 fw_config match found: DB_USB=USB3_ACTIVE
419 18:49:37.017301 fw_config match found: DB_USB=USB3_ACTIVE
420 18:49:37.023797 fw_config match found: DB_USB=USB3_ACTIVE
421 18:49:37.026959 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
422 18:49:37.033550 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
423 18:49:37.043831 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
424 18:49:37.050232 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
425 18:49:37.053324 microcode: sig=0x806c1 pf=0x80 revision=0x86
426 18:49:37.060163 microcode: Update skipped, already up-to-date
427 18:49:37.067230 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
428 18:49:37.094101 Detected 4 core, 8 thread CPU.
429 18:49:37.097720 Setting up SMI for CPU
430 18:49:37.101012 IED base = 0x7b400000
431 18:49:37.101108 IED size = 0x00400000
432 18:49:37.104346 Will perform SMM setup.
433 18:49:37.111101 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
434 18:49:37.117225 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
435 18:49:37.124031 Processing 16 relocs. Offset value of 0x00030000
436 18:49:37.127985 Attempting to start 7 APs
437 18:49:37.130740 Waiting for 10ms after sending INIT.
438 18:49:37.145956 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
439 18:49:37.146051 done.
440 18:49:37.149353 AP: slot 2 apic_id 3.
441 18:49:37.152928 AP: slot 6 apic_id 2.
442 18:49:37.153023 AP: slot 5 apic_id 4.
443 18:49:37.156284 AP: slot 4 apic_id 5.
444 18:49:37.160248 Waiting for 2nd SIPI to complete...done.
445 18:49:37.162984 AP: slot 3 apic_id 7.
446 18:49:37.166276 AP: slot 7 apic_id 6.
447 18:49:37.172594 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 18:49:37.179514 Processing 13 relocs. Offset value of 0x00038000
449 18:49:37.179609 Unable to locate Global NVS
450 18:49:37.189181 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 18:49:37.192587 Installing permanent SMM handler to 0x7b000000
452 18:49:37.202860 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 18:49:37.205767 Processing 794 relocs. Offset value of 0x7b010000
454 18:49:37.215794 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 18:49:37.219187 Processing 13 relocs. Offset value of 0x7b008000
456 18:49:37.225952 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 18:49:37.232519 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 18:49:37.235759 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 18:49:37.242399 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 18:49:37.249197 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 18:49:37.255656 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 18:49:37.262536 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 18:49:37.262632 Unable to locate Global NVS
464 18:49:37.272156 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 18:49:37.275846 Clearing SMI status registers
466 18:49:37.275941 SMI_STS: PM1
467 18:49:37.279068 PM1_STS: PWRBTN
468 18:49:37.285892 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 18:49:37.288973 In relocation handler: CPU 0
470 18:49:37.292741 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 18:49:37.298964 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 18:49:37.299059 Relocation complete.
473 18:49:37.308589 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 18:49:37.308693 In relocation handler: CPU 1
475 18:49:37.315818 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 18:49:37.315914 Relocation complete.
477 18:49:37.322374 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
478 18:49:37.325465 In relocation handler: CPU 2
479 18:49:37.332441 New SMBASE=0x7afff800 IEDBASE=0x7b400000
480 18:49:37.332536 Relocation complete.
481 18:49:37.338727 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
482 18:49:37.342425 In relocation handler: CPU 6
483 18:49:37.345435 New SMBASE=0x7affe800 IEDBASE=0x7b400000
484 18:49:37.352072 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 18:49:37.355528 Relocation complete.
486 18:49:37.362273 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
487 18:49:37.365302 In relocation handler: CPU 4
488 18:49:37.368636 New SMBASE=0x7afff000 IEDBASE=0x7b400000
489 18:49:37.372231 Relocation complete.
490 18:49:37.379004 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
491 18:49:37.382038 In relocation handler: CPU 5
492 18:49:37.385327 New SMBASE=0x7affec00 IEDBASE=0x7b400000
493 18:49:37.388974 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 18:49:37.392155 Relocation complete.
495 18:49:37.398618 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
496 18:49:37.402028 In relocation handler: CPU 7
497 18:49:37.405178 New SMBASE=0x7affe400 IEDBASE=0x7b400000
498 18:49:37.411834 Writing SMRR. base = 0x7b000006, mask=0xff800c00
499 18:49:37.411929 Relocation complete.
500 18:49:37.421745 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
501 18:49:37.425065 In relocation handler: CPU 3
502 18:49:37.428633 New SMBASE=0x7afff400 IEDBASE=0x7b400000
503 18:49:37.428730 Relocation complete.
504 18:49:37.431819 Initializing CPU #0
505 18:49:37.434940 CPU: vendor Intel device 806c1
506 18:49:37.438400 CPU: family 06, model 8c, stepping 01
507 18:49:37.441625 Clearing out pending MCEs
508 18:49:37.445302 Setting up local APIC...
509 18:49:37.445397 apic_id: 0x00 done.
510 18:49:37.448225 Turbo is available but hidden
511 18:49:37.451888 Turbo is available and visible
512 18:49:37.458200 microcode: Update skipped, already up-to-date
513 18:49:37.458295 CPU #0 initialized
514 18:49:37.461579 Initializing CPU #2
515 18:49:37.465113 Initializing CPU #6
516 18:49:37.468239 CPU: vendor Intel device 806c1
517 18:49:37.471413 CPU: family 06, model 8c, stepping 01
518 18:49:37.474841 CPU: vendor Intel device 806c1
519 18:49:37.478133 CPU: family 06, model 8c, stepping 01
520 18:49:37.481351 Clearing out pending MCEs
521 18:49:37.481445 Clearing out pending MCEs
522 18:49:37.484892 Initializing CPU #7
523 18:49:37.488448 Initializing CPU #3
524 18:49:37.491220 CPU: vendor Intel device 806c1
525 18:49:37.494884 CPU: family 06, model 8c, stepping 01
526 18:49:37.497882 CPU: vendor Intel device 806c1
527 18:49:37.501608 CPU: family 06, model 8c, stepping 01
528 18:49:37.504505 Clearing out pending MCEs
529 18:49:37.504600 Setting up local APIC...
530 18:49:37.507767 Setting up local APIC...
531 18:49:37.511519 Initializing CPU #5
532 18:49:37.511613 Initializing CPU #4
533 18:49:37.514583 CPU: vendor Intel device 806c1
534 18:49:37.518166 CPU: family 06, model 8c, stepping 01
535 18:49:37.521173 CPU: vendor Intel device 806c1
536 18:49:37.528683 CPU: family 06, model 8c, stepping 01
537 18:49:37.528778 Clearing out pending MCEs
538 18:49:37.532259 Clearing out pending MCEs
539 18:49:37.535197 Setting up local APIC...
540 18:49:37.535293 apic_id: 0x03 done.
541 18:49:37.538676 Setting up local APIC...
542 18:49:37.542065 apic_id: 0x06 done.
543 18:49:37.542152 Clearing out pending MCEs
544 18:49:37.545464 apic_id: 0x02 done.
545 18:49:37.551934 microcode: Update skipped, already up-to-date
546 18:49:37.555305 microcode: Update skipped, already up-to-date
547 18:49:37.555390 CPU #2 initialized
548 18:49:37.558827 CPU #6 initialized
549 18:49:37.562014 Setting up local APIC...
550 18:49:37.565314 microcode: Update skipped, already up-to-date
551 18:49:37.568916 Setting up local APIC...
552 18:49:37.572005 apic_id: 0x04 done.
553 18:49:37.572099 apic_id: 0x05 done.
554 18:49:37.578404 microcode: Update skipped, already up-to-date
555 18:49:37.581699 microcode: Update skipped, already up-to-date
556 18:49:37.585603 CPU #5 initialized
557 18:49:37.585698 apic_id: 0x07 done.
558 18:49:37.588645 CPU #7 initialized
559 18:49:37.591915 microcode: Update skipped, already up-to-date
560 18:49:37.595268 Initializing CPU #1
561 18:49:37.595362 CPU #4 initialized
562 18:49:37.598212 CPU: vendor Intel device 806c1
563 18:49:37.605297 CPU: family 06, model 8c, stepping 01
564 18:49:37.605393 CPU #3 initialized
565 18:49:37.608634 Clearing out pending MCEs
566 18:49:37.611685 Setting up local APIC...
567 18:49:37.611780 apic_id: 0x01 done.
568 18:49:37.618253 microcode: Update skipped, already up-to-date
569 18:49:37.618348 CPU #1 initialized
570 18:49:37.625248 bsp_do_flight_plan done after 459 msecs.
571 18:49:37.628634 CPU: frequency set to 4400 MHz
572 18:49:37.628729 Enabling SMIs.
573 18:49:37.635726 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
574 18:49:37.651070 SATAXPCIE1 indicates PCIe NVMe is present
575 18:49:37.654633 Probing TPM: done!
576 18:49:37.657556 Connected to device vid:did:rid of 1ae0:0028:00
577 18:49:37.668397 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
578 18:49:37.671687 Initialized TPM device CR50 revision 0
579 18:49:37.675279 Enabling S0i3.4
580 18:49:37.681612 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
581 18:49:37.684902 Found a VBT of 8704 bytes after decompression
582 18:49:37.691633 cse_lite: CSE RO boot. HybridStorageMode disabled
583 18:49:37.698313 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
584 18:49:37.773118 FSPS returned 0
585 18:49:37.776505 Executing Phase 1 of FspMultiPhaseSiInit
586 18:49:37.786609 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
587 18:49:37.790002 port C0 DISC req: usage 1 usb3 1 usb2 5
588 18:49:37.792911 Raw Buffer output 0 00000511
589 18:49:37.796650 Raw Buffer output 1 00000000
590 18:49:37.800227 pmc_send_ipc_cmd succeeded
591 18:49:37.806817 port C1 DISC req: usage 1 usb3 2 usb2 3
592 18:49:37.806911 Raw Buffer output 0 00000321
593 18:49:37.809846 Raw Buffer output 1 00000000
594 18:49:37.813926 pmc_send_ipc_cmd succeeded
595 18:49:37.819297 Detected 4 core, 8 thread CPU.
596 18:49:37.822204 Detected 4 core, 8 thread CPU.
597 18:49:38.022463 Display FSP Version Info HOB
598 18:49:38.025785 Reference Code - CPU = a.0.4c.31
599 18:49:38.028992 uCode Version = 0.0.0.86
600 18:49:38.032239 TXT ACM version = ff.ff.ff.ffff
601 18:49:38.035664 Reference Code - ME = a.0.4c.31
602 18:49:38.038934 MEBx version = 0.0.0.0
603 18:49:38.042312 ME Firmware Version = Consumer SKU
604 18:49:38.045642 Reference Code - PCH = a.0.4c.31
605 18:49:38.049044 PCH-CRID Status = Disabled
606 18:49:38.052790 PCH-CRID Original Value = ff.ff.ff.ffff
607 18:49:38.055658 PCH-CRID New Value = ff.ff.ff.ffff
608 18:49:38.059458 OPROM - RST - RAID = ff.ff.ff.ffff
609 18:49:38.062213 PCH Hsio Version = 4.0.0.0
610 18:49:38.065670 Reference Code - SA - System Agent = a.0.4c.31
611 18:49:38.068814 Reference Code - MRC = 2.0.0.1
612 18:49:38.072159 SA - PCIe Version = a.0.4c.31
613 18:49:38.075661 SA-CRID Status = Disabled
614 18:49:38.078986 SA-CRID Original Value = 0.0.0.1
615 18:49:38.082409 SA-CRID New Value = 0.0.0.1
616 18:49:38.085689 OPROM - VBIOS = ff.ff.ff.ffff
617 18:49:38.089019 IO Manageability Engine FW Version = 11.1.4.0
618 18:49:38.092567 PHY Build Version = 0.0.0.e0
619 18:49:38.095471 Thunderbolt(TM) FW Version = 0.0.0.0
620 18:49:38.101968 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
621 18:49:38.105431 ITSS IRQ Polarities Before:
622 18:49:38.105529 IPC0: 0xffffffff
623 18:49:38.110032 IPC1: 0xffffffff
624 18:49:38.110129 IPC2: 0xffffffff
625 18:49:38.113280 IPC3: 0xffffffff
626 18:49:38.113375 ITSS IRQ Polarities After:
627 18:49:38.116892 IPC0: 0xffffffff
628 18:49:38.116977 IPC1: 0xffffffff
629 18:49:38.119968 IPC2: 0xffffffff
630 18:49:38.120046 IPC3: 0xffffffff
631 18:49:38.126600 Found PCIe Root Port #9 at PCI: 00:1d.0.
632 18:49:38.136409 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
633 18:49:38.150093 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
634 18:49:38.159866 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
635 18:49:38.166519 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
636 18:49:38.169972 Enumerating buses...
637 18:49:38.173510 Show all devs... Before device enumeration.
638 18:49:38.177086 Root Device: enabled 1
639 18:49:38.180149 DOMAIN: 0000: enabled 1
640 18:49:38.183264 CPU_CLUSTER: 0: enabled 1
641 18:49:38.183380 PCI: 00:00.0: enabled 1
642 18:49:38.186574 PCI: 00:02.0: enabled 1
643 18:49:38.189877 PCI: 00:04.0: enabled 1
644 18:49:38.193175 PCI: 00:05.0: enabled 1
645 18:49:38.193294 PCI: 00:06.0: enabled 0
646 18:49:38.196909 PCI: 00:07.0: enabled 0
647 18:49:38.200150 PCI: 00:07.1: enabled 0
648 18:49:38.200267 PCI: 00:07.2: enabled 0
649 18:49:38.203173 PCI: 00:07.3: enabled 0
650 18:49:38.206579 PCI: 00:08.0: enabled 1
651 18:49:38.209730 PCI: 00:09.0: enabled 0
652 18:49:38.209815 PCI: 00:0a.0: enabled 0
653 18:49:38.213335 PCI: 00:0d.0: enabled 1
654 18:49:38.216934 PCI: 00:0d.1: enabled 0
655 18:49:38.219695 PCI: 00:0d.2: enabled 0
656 18:49:38.219807 PCI: 00:0d.3: enabled 0
657 18:49:38.223071 PCI: 00:0e.0: enabled 0
658 18:49:38.226289 PCI: 00:10.2: enabled 1
659 18:49:38.230014 PCI: 00:10.6: enabled 0
660 18:49:38.230096 PCI: 00:10.7: enabled 0
661 18:49:38.233197 PCI: 00:12.0: enabled 0
662 18:49:38.236547 PCI: 00:12.6: enabled 0
663 18:49:38.239979 PCI: 00:13.0: enabled 0
664 18:49:38.240060 PCI: 00:14.0: enabled 1
665 18:49:38.242777 PCI: 00:14.1: enabled 0
666 18:49:38.246540 PCI: 00:14.2: enabled 1
667 18:49:38.246641 PCI: 00:14.3: enabled 1
668 18:49:38.249561 PCI: 00:15.0: enabled 1
669 18:49:38.252963 PCI: 00:15.1: enabled 1
670 18:49:38.256182 PCI: 00:15.2: enabled 1
671 18:49:38.256277 PCI: 00:15.3: enabled 1
672 18:49:38.259798 PCI: 00:16.0: enabled 1
673 18:49:38.263154 PCI: 00:16.1: enabled 0
674 18:49:38.266222 PCI: 00:16.2: enabled 0
675 18:49:38.266316 PCI: 00:16.3: enabled 0
676 18:49:38.269773 PCI: 00:16.4: enabled 0
677 18:49:38.272730 PCI: 00:16.5: enabled 0
678 18:49:38.276456 PCI: 00:17.0: enabled 1
679 18:49:38.276550 PCI: 00:19.0: enabled 0
680 18:49:38.279387 PCI: 00:19.1: enabled 1
681 18:49:38.282766 PCI: 00:19.2: enabled 0
682 18:49:38.282860 PCI: 00:1c.0: enabled 1
683 18:49:38.286438 PCI: 00:1c.1: enabled 0
684 18:49:38.289348 PCI: 00:1c.2: enabled 0
685 18:49:38.292577 PCI: 00:1c.3: enabled 0
686 18:49:38.292681 PCI: 00:1c.4: enabled 0
687 18:49:38.296593 PCI: 00:1c.5: enabled 0
688 18:49:38.299782 PCI: 00:1c.6: enabled 1
689 18:49:38.302957 PCI: 00:1c.7: enabled 0
690 18:49:38.303051 PCI: 00:1d.0: enabled 1
691 18:49:38.306102 PCI: 00:1d.1: enabled 0
692 18:49:38.309269 PCI: 00:1d.2: enabled 1
693 18:49:38.312644 PCI: 00:1d.3: enabled 0
694 18:49:38.312739 PCI: 00:1e.0: enabled 1
695 18:49:38.316364 PCI: 00:1e.1: enabled 0
696 18:49:38.319611 PCI: 00:1e.2: enabled 1
697 18:49:38.322551 PCI: 00:1e.3: enabled 1
698 18:49:38.322644 PCI: 00:1f.0: enabled 1
699 18:49:38.325850 PCI: 00:1f.1: enabled 0
700 18:49:38.329190 PCI: 00:1f.2: enabled 1
701 18:49:38.329284 PCI: 00:1f.3: enabled 1
702 18:49:38.332643 PCI: 00:1f.4: enabled 0
703 18:49:38.336010 PCI: 00:1f.5: enabled 1
704 18:49:38.339387 PCI: 00:1f.6: enabled 0
705 18:49:38.339481 PCI: 00:1f.7: enabled 0
706 18:49:38.342881 APIC: 00: enabled 1
707 18:49:38.345914 GENERIC: 0.0: enabled 1
708 18:49:38.346009 GENERIC: 0.0: enabled 1
709 18:49:38.349093 GENERIC: 1.0: enabled 1
710 18:49:38.352346 GENERIC: 0.0: enabled 1
711 18:49:38.355798 GENERIC: 1.0: enabled 1
712 18:49:38.355892 USB0 port 0: enabled 1
713 18:49:38.359656 GENERIC: 0.0: enabled 1
714 18:49:38.362547 USB0 port 0: enabled 1
715 18:49:38.365597 GENERIC: 0.0: enabled 1
716 18:49:38.365690 I2C: 00:1a: enabled 1
717 18:49:38.369222 I2C: 00:31: enabled 1
718 18:49:38.372287 I2C: 00:32: enabled 1
719 18:49:38.372368 I2C: 00:10: enabled 1
720 18:49:38.375739 I2C: 00:15: enabled 1
721 18:49:38.379156 GENERIC: 0.0: enabled 0
722 18:49:38.379265 GENERIC: 1.0: enabled 0
723 18:49:38.382545 GENERIC: 0.0: enabled 1
724 18:49:38.386106 SPI: 00: enabled 1
725 18:49:38.386189 SPI: 00: enabled 1
726 18:49:38.389209 PNP: 0c09.0: enabled 1
727 18:49:38.392377 GENERIC: 0.0: enabled 1
728 18:49:38.392459 USB3 port 0: enabled 1
729 18:49:38.395655 USB3 port 1: enabled 1
730 18:49:38.398965 USB3 port 2: enabled 0
731 18:49:38.402257 USB3 port 3: enabled 0
732 18:49:38.402370 USB2 port 0: enabled 0
733 18:49:38.405755 USB2 port 1: enabled 1
734 18:49:38.409117 USB2 port 2: enabled 1
735 18:49:38.409205 USB2 port 3: enabled 0
736 18:49:38.412348 USB2 port 4: enabled 1
737 18:49:38.415744 USB2 port 5: enabled 0
738 18:49:38.418729 USB2 port 6: enabled 0
739 18:49:38.418807 USB2 port 7: enabled 0
740 18:49:38.421988 USB2 port 8: enabled 0
741 18:49:38.425748 USB2 port 9: enabled 0
742 18:49:38.425832 USB3 port 0: enabled 0
743 18:49:38.428934 USB3 port 1: enabled 1
744 18:49:38.432335 USB3 port 2: enabled 0
745 18:49:38.432445 USB3 port 3: enabled 0
746 18:49:38.435537 GENERIC: 0.0: enabled 1
747 18:49:38.439160 GENERIC: 1.0: enabled 1
748 18:49:38.442131 APIC: 01: enabled 1
749 18:49:38.442215 APIC: 03: enabled 1
750 18:49:38.445315 APIC: 07: enabled 1
751 18:49:38.445397 APIC: 05: enabled 1
752 18:49:38.448658 APIC: 04: enabled 1
753 18:49:38.452151 APIC: 02: enabled 1
754 18:49:38.452245 APIC: 06: enabled 1
755 18:49:38.455604 Compare with tree...
756 18:49:38.458578 Root Device: enabled 1
757 18:49:38.458672 DOMAIN: 0000: enabled 1
758 18:49:38.462228 PCI: 00:00.0: enabled 1
759 18:49:38.465930 PCI: 00:02.0: enabled 1
760 18:49:38.468920 PCI: 00:04.0: enabled 1
761 18:49:38.472338 GENERIC: 0.0: enabled 1
762 18:49:38.472433 PCI: 00:05.0: enabled 1
763 18:49:38.475233 PCI: 00:06.0: enabled 0
764 18:49:38.478893 PCI: 00:07.0: enabled 0
765 18:49:38.482168 GENERIC: 0.0: enabled 1
766 18:49:38.485628 PCI: 00:07.1: enabled 0
767 18:49:38.485723 GENERIC: 1.0: enabled 1
768 18:49:38.488520 PCI: 00:07.2: enabled 0
769 18:49:38.491890 GENERIC: 0.0: enabled 1
770 18:49:38.495592 PCI: 00:07.3: enabled 0
771 18:49:38.498591 GENERIC: 1.0: enabled 1
772 18:49:38.498685 PCI: 00:08.0: enabled 1
773 18:49:38.501931 PCI: 00:09.0: enabled 0
774 18:49:38.505121 PCI: 00:0a.0: enabled 0
775 18:49:38.508628 PCI: 00:0d.0: enabled 1
776 18:49:38.511973 USB0 port 0: enabled 1
777 18:49:38.512067 USB3 port 0: enabled 1
778 18:49:38.515399 USB3 port 1: enabled 1
779 18:49:38.518355 USB3 port 2: enabled 0
780 18:49:38.521739 USB3 port 3: enabled 0
781 18:49:38.525049 PCI: 00:0d.1: enabled 0
782 18:49:38.529065 PCI: 00:0d.2: enabled 0
783 18:49:38.529169 GENERIC: 0.0: enabled 1
784 18:49:38.531759 PCI: 00:0d.3: enabled 0
785 18:49:38.535189 PCI: 00:0e.0: enabled 0
786 18:49:38.538473 PCI: 00:10.2: enabled 1
787 18:49:38.541582 PCI: 00:10.6: enabled 0
788 18:49:38.541662 PCI: 00:10.7: enabled 0
789 18:49:38.545055 PCI: 00:12.0: enabled 0
790 18:49:38.548265 PCI: 00:12.6: enabled 0
791 18:49:38.551811 PCI: 00:13.0: enabled 0
792 18:49:38.551920 PCI: 00:14.0: enabled 1
793 18:49:38.555118 USB0 port 0: enabled 1
794 18:49:38.558234 USB2 port 0: enabled 0
795 18:49:38.561671 USB2 port 1: enabled 1
796 18:49:38.564789 USB2 port 2: enabled 1
797 18:49:38.568350 USB2 port 3: enabled 0
798 18:49:38.568438 USB2 port 4: enabled 1
799 18:49:38.572548 USB2 port 5: enabled 0
800 18:49:38.575150 USB2 port 6: enabled 0
801 18:49:38.578133 USB2 port 7: enabled 0
802 18:49:38.581546 USB2 port 8: enabled 0
803 18:49:38.585024 USB2 port 9: enabled 0
804 18:49:38.585108 USB3 port 0: enabled 0
805 18:49:38.588073 USB3 port 1: enabled 1
806 18:49:38.591451 USB3 port 2: enabled 0
807 18:49:38.594857 USB3 port 3: enabled 0
808 18:49:38.598093 PCI: 00:14.1: enabled 0
809 18:49:38.598172 PCI: 00:14.2: enabled 1
810 18:49:38.601489 PCI: 00:14.3: enabled 1
811 18:49:38.605110 GENERIC: 0.0: enabled 1
812 18:49:38.608154 PCI: 00:15.0: enabled 1
813 18:49:38.611433 I2C: 00:1a: enabled 1
814 18:49:38.611512 I2C: 00:31: enabled 1
815 18:49:38.614765 I2C: 00:32: enabled 1
816 18:49:38.618123 PCI: 00:15.1: enabled 1
817 18:49:38.621536 I2C: 00:10: enabled 1
818 18:49:38.621615 PCI: 00:15.2: enabled 1
819 18:49:38.624789 PCI: 00:15.3: enabled 1
820 18:49:38.628458 PCI: 00:16.0: enabled 1
821 18:49:38.631552 PCI: 00:16.1: enabled 0
822 18:49:38.634685 PCI: 00:16.2: enabled 0
823 18:49:38.634780 PCI: 00:16.3: enabled 0
824 18:49:38.638270 PCI: 00:16.4: enabled 0
825 18:49:38.641401 PCI: 00:16.5: enabled 0
826 18:49:38.644622 PCI: 00:17.0: enabled 1
827 18:49:38.648018 PCI: 00:19.0: enabled 0
828 18:49:38.648113 PCI: 00:19.1: enabled 1
829 18:49:38.651377 I2C: 00:15: enabled 1
830 18:49:38.654937 PCI: 00:19.2: enabled 0
831 18:49:38.658181 PCI: 00:1d.0: enabled 1
832 18:49:38.661360 GENERIC: 0.0: enabled 1
833 18:49:38.661454 PCI: 00:1e.0: enabled 1
834 18:49:38.664895 PCI: 00:1e.1: enabled 0
835 18:49:38.668311 PCI: 00:1e.2: enabled 1
836 18:49:38.671522 SPI: 00: enabled 1
837 18:49:38.671616 PCI: 00:1e.3: enabled 1
838 18:49:38.675123 SPI: 00: enabled 1
839 18:49:38.677971 PCI: 00:1f.0: enabled 1
840 18:49:38.681139 PNP: 0c09.0: enabled 1
841 18:49:38.681233 PCI: 00:1f.1: enabled 0
842 18:49:38.684537 PCI: 00:1f.2: enabled 1
843 18:49:38.688110 GENERIC: 0.0: enabled 1
844 18:49:38.691649 GENERIC: 0.0: enabled 1
845 18:49:38.694888 GENERIC: 1.0: enabled 1
846 18:49:38.698485 PCI: 00:1f.3: enabled 1
847 18:49:38.698579 PCI: 00:1f.4: enabled 0
848 18:49:38.701521 PCI: 00:1f.5: enabled 1
849 18:49:38.704595 PCI: 00:1f.6: enabled 0
850 18:49:38.707870 PCI: 00:1f.7: enabled 0
851 18:49:38.711399 CPU_CLUSTER: 0: enabled 1
852 18:49:38.711493 APIC: 00: enabled 1
853 18:49:38.714320 APIC: 01: enabled 1
854 18:49:38.717885 APIC: 03: enabled 1
855 18:49:38.717978 APIC: 07: enabled 1
856 18:49:38.721131 APIC: 05: enabled 1
857 18:49:38.772741 APIC: 04: enabled 1
858 18:49:38.772837 APIC: 02: enabled 1
859 18:49:38.772912 APIC: 06: enabled 1
860 18:49:38.773173 Root Device scanning...
861 18:49:38.773246 scan_static_bus for Root Device
862 18:49:38.773326 DOMAIN: 0000 enabled
863 18:49:38.773395 CPU_CLUSTER: 0 enabled
864 18:49:38.773460 DOMAIN: 0000 scanning...
865 18:49:38.773536 PCI: pci_scan_bus for bus 00
866 18:49:38.773603 PCI: 00:00.0 [8086/0000] ops
867 18:49:38.773865 PCI: 00:00.0 [8086/9a12] enabled
868 18:49:38.773938 PCI: 00:02.0 [8086/0000] bus ops
869 18:49:38.774014 PCI: 00:02.0 [8086/9a40] enabled
870 18:49:38.774080 PCI: 00:04.0 [8086/0000] bus ops
871 18:49:38.774169 PCI: 00:04.0 [8086/9a03] enabled
872 18:49:38.774239 PCI: 00:05.0 [8086/9a19] enabled
873 18:49:38.774601 PCI: 00:07.0 [0000/0000] hidden
874 18:49:38.774696 PCI: 00:08.0 [8086/9a11] enabled
875 18:49:38.810242 PCI: 00:0a.0 [8086/9a0d] disabled
876 18:49:38.810801 PCI: 00:0d.0 [8086/0000] bus ops
877 18:49:38.810896 PCI: 00:0d.0 [8086/9a13] enabled
878 18:49:38.811369 PCI: 00:14.0 [8086/0000] bus ops
879 18:49:38.811463 PCI: 00:14.0 [8086/a0ed] enabled
880 18:49:38.811730 PCI: 00:14.2 [8086/a0ef] enabled
881 18:49:38.811809 PCI: 00:14.3 [8086/0000] bus ops
882 18:49:38.812072 PCI: 00:14.3 [8086/a0f0] enabled
883 18:49:38.812178 PCI: 00:15.0 [8086/0000] bus ops
884 18:49:38.812279 PCI: 00:15.0 [8086/a0e8] enabled
885 18:49:38.812377 PCI: 00:15.1 [8086/0000] bus ops
886 18:49:38.815175 PCI: 00:15.1 [8086/a0e9] enabled
887 18:49:38.818320 PCI: 00:15.2 [8086/0000] bus ops
888 18:49:38.822219 PCI: 00:15.2 [8086/a0ea] enabled
889 18:49:38.825213 PCI: 00:15.3 [8086/0000] bus ops
890 18:49:38.828727 PCI: 00:15.3 [8086/a0eb] enabled
891 18:49:38.832038 PCI: 00:16.0 [8086/0000] ops
892 18:49:38.835088 PCI: 00:16.0 [8086/a0e0] enabled
893 18:49:38.838783 PCI: Static device PCI: 00:17.0 not found, disabling it.
894 18:49:38.842524 PCI: 00:19.0 [8086/0000] bus ops
895 18:49:38.848660 PCI: 00:19.0 [8086/a0c5] disabled
896 18:49:38.852181 PCI: 00:19.1 [8086/0000] bus ops
897 18:49:38.855209 PCI: 00:19.1 [8086/a0c6] enabled
898 18:49:38.858793 PCI: 00:1d.0 [8086/0000] bus ops
899 18:49:38.861995 PCI: 00:1d.0 [8086/a0b0] enabled
900 18:49:38.862166 PCI: 00:1e.0 [8086/0000] ops
901 18:49:38.864930 PCI: 00:1e.0 [8086/a0a8] enabled
902 18:49:38.868312 PCI: 00:1e.2 [8086/0000] bus ops
903 18:49:38.872225 PCI: 00:1e.2 [8086/a0aa] enabled
904 18:49:38.875479 PCI: 00:1e.3 [8086/0000] bus ops
905 18:49:38.878683 PCI: 00:1e.3 [8086/a0ab] enabled
906 18:49:38.881988 PCI: 00:1f.0 [8086/0000] bus ops
907 18:49:38.885109 PCI: 00:1f.0 [8086/a087] enabled
908 18:49:38.888603 RTC Init
909 18:49:38.892392 Set power on after power failure.
910 18:49:38.892878 Disabling Deep S3
911 18:49:38.895248 Disabling Deep S3
912 18:49:38.898859 Disabling Deep S4
913 18:49:38.899292 Disabling Deep S4
914 18:49:38.902183 Disabling Deep S5
915 18:49:38.902668 Disabling Deep S5
916 18:49:38.905184 PCI: 00:1f.2 [0000/0000] hidden
917 18:49:38.908464 PCI: 00:1f.3 [8086/0000] bus ops
918 18:49:38.911931 PCI: 00:1f.3 [8086/a0c8] enabled
919 18:49:38.915717 PCI: 00:1f.5 [8086/0000] bus ops
920 18:49:38.918879 PCI: 00:1f.5 [8086/a0a4] enabled
921 18:49:38.922501 PCI: Leftover static devices:
922 18:49:38.925294 PCI: 00:10.2
923 18:49:38.925957 PCI: 00:10.6
924 18:49:38.926420 PCI: 00:10.7
925 18:49:38.928545 PCI: 00:06.0
926 18:49:38.929152 PCI: 00:07.1
927 18:49:38.932069 PCI: 00:07.2
928 18:49:38.932494 PCI: 00:07.3
929 18:49:38.932888 PCI: 00:09.0
930 18:49:38.935299 PCI: 00:0d.1
931 18:49:38.935723 PCI: 00:0d.2
932 18:49:38.938598 PCI: 00:0d.3
933 18:49:38.939026 PCI: 00:0e.0
934 18:49:38.939362 PCI: 00:12.0
935 18:49:38.942248 PCI: 00:12.6
936 18:49:38.942668 PCI: 00:13.0
937 18:49:38.945706 PCI: 00:14.1
938 18:49:38.946129 PCI: 00:16.1
939 18:49:38.948341 PCI: 00:16.2
940 18:49:38.948864 PCI: 00:16.3
941 18:49:38.949257 PCI: 00:16.4
942 18:49:38.951871 PCI: 00:16.5
943 18:49:38.952280 PCI: 00:17.0
944 18:49:38.954936 PCI: 00:19.2
945 18:49:38.955020 PCI: 00:1e.1
946 18:49:38.955090 PCI: 00:1f.1
947 18:49:38.957865 PCI: 00:1f.4
948 18:49:38.957958 PCI: 00:1f.6
949 18:49:38.961780 PCI: 00:1f.7
950 18:49:38.964570 PCI: Check your devicetree.cb.
951 18:49:38.964669 PCI: 00:02.0 scanning...
952 18:49:38.971382 scan_generic_bus for PCI: 00:02.0
953 18:49:38.974690 scan_generic_bus for PCI: 00:02.0 done
954 18:49:38.978267 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
955 18:49:38.981161 PCI: 00:04.0 scanning...
956 18:49:38.984578 scan_generic_bus for PCI: 00:04.0
957 18:49:38.987641 GENERIC: 0.0 enabled
958 18:49:38.991183 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
959 18:49:38.998027 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
960 18:49:39.001329 PCI: 00:0d.0 scanning...
961 18:49:39.004727 scan_static_bus for PCI: 00:0d.0
962 18:49:39.004825 USB0 port 0 enabled
963 18:49:39.007713 USB0 port 0 scanning...
964 18:49:39.010851 scan_static_bus for USB0 port 0
965 18:49:39.014284 USB3 port 0 enabled
966 18:49:39.014400 USB3 port 1 enabled
967 18:49:39.017963 USB3 port 2 disabled
968 18:49:39.021295 USB3 port 3 disabled
969 18:49:39.021448 USB3 port 0 scanning...
970 18:49:39.024268 scan_static_bus for USB3 port 0
971 18:49:39.030918 scan_static_bus for USB3 port 0 done
972 18:49:39.034208 scan_bus: bus USB3 port 0 finished in 6 msecs
973 18:49:39.037909 USB3 port 1 scanning...
974 18:49:39.040610 scan_static_bus for USB3 port 1
975 18:49:39.044122 scan_static_bus for USB3 port 1 done
976 18:49:39.047822 scan_bus: bus USB3 port 1 finished in 6 msecs
977 18:49:39.051276 scan_static_bus for USB0 port 0 done
978 18:49:39.057445 scan_bus: bus USB0 port 0 finished in 43 msecs
979 18:49:39.060584 scan_static_bus for PCI: 00:0d.0 done
980 18:49:39.064047 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
981 18:49:39.067335 PCI: 00:14.0 scanning...
982 18:49:39.070957 scan_static_bus for PCI: 00:14.0
983 18:49:39.073830 USB0 port 0 enabled
984 18:49:39.077517 USB0 port 0 scanning...
985 18:49:39.081093 scan_static_bus for USB0 port 0
986 18:49:39.081185 USB2 port 0 disabled
987 18:49:39.083723 USB2 port 1 enabled
988 18:49:39.087478 USB2 port 2 enabled
989 18:49:39.087569 USB2 port 3 disabled
990 18:49:39.090481 USB2 port 4 enabled
991 18:49:39.090573 USB2 port 5 disabled
992 18:49:39.093820 USB2 port 6 disabled
993 18:49:39.097301 USB2 port 7 disabled
994 18:49:39.097392 USB2 port 8 disabled
995 18:49:39.100461 USB2 port 9 disabled
996 18:49:39.103635 USB3 port 0 disabled
997 18:49:39.103722 USB3 port 1 enabled
998 18:49:39.106825 USB3 port 2 disabled
999 18:49:39.110212 USB3 port 3 disabled
1000 18:49:39.110302 USB2 port 1 scanning...
1001 18:49:39.113788 scan_static_bus for USB2 port 1
1002 18:49:39.117251 scan_static_bus for USB2 port 1 done
1003 18:49:39.123337 scan_bus: bus USB2 port 1 finished in 6 msecs
1004 18:49:39.126864 USB2 port 2 scanning...
1005 18:49:39.130124 scan_static_bus for USB2 port 2
1006 18:49:39.133914 scan_static_bus for USB2 port 2 done
1007 18:49:39.136824 scan_bus: bus USB2 port 2 finished in 6 msecs
1008 18:49:39.140229 USB2 port 4 scanning...
1009 18:49:39.143514 scan_static_bus for USB2 port 4
1010 18:49:39.147034 scan_static_bus for USB2 port 4 done
1011 18:49:39.150405 scan_bus: bus USB2 port 4 finished in 6 msecs
1012 18:49:39.153477 USB3 port 1 scanning...
1013 18:49:39.156842 scan_static_bus for USB3 port 1
1014 18:49:39.160293 scan_static_bus for USB3 port 1 done
1015 18:49:39.166686 scan_bus: bus USB3 port 1 finished in 6 msecs
1016 18:49:39.170059 scan_static_bus for USB0 port 0 done
1017 18:49:39.173644 scan_bus: bus USB0 port 0 finished in 93 msecs
1018 18:49:39.176721 scan_static_bus for PCI: 00:14.0 done
1019 18:49:39.183482 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1020 18:49:39.186291 PCI: 00:14.3 scanning...
1021 18:49:39.189969 scan_static_bus for PCI: 00:14.3
1022 18:49:39.190053 GENERIC: 0.0 enabled
1023 18:49:39.196193 scan_static_bus for PCI: 00:14.3 done
1024 18:49:39.199688 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1025 18:49:39.203209 PCI: 00:15.0 scanning...
1026 18:49:39.206553 scan_static_bus for PCI: 00:15.0
1027 18:49:39.206645 I2C: 00:1a enabled
1028 18:49:39.209699 I2C: 00:31 enabled
1029 18:49:39.212882 I2C: 00:32 enabled
1030 18:49:39.216512 scan_static_bus for PCI: 00:15.0 done
1031 18:49:39.220109 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1032 18:49:39.223135 PCI: 00:15.1 scanning...
1033 18:49:39.226503 scan_static_bus for PCI: 00:15.1
1034 18:49:39.229679 I2C: 00:10 enabled
1035 18:49:39.232938 scan_static_bus for PCI: 00:15.1 done
1036 18:49:39.236104 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1037 18:49:39.240051 PCI: 00:15.2 scanning...
1038 18:49:39.243033 scan_static_bus for PCI: 00:15.2
1039 18:49:39.246263 scan_static_bus for PCI: 00:15.2 done
1040 18:49:39.249745 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1041 18:49:39.252978 PCI: 00:15.3 scanning...
1042 18:49:39.256468 scan_static_bus for PCI: 00:15.3
1043 18:49:39.259411 scan_static_bus for PCI: 00:15.3 done
1044 18:49:39.266253 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1045 18:49:39.269701 PCI: 00:19.1 scanning...
1046 18:49:39.273110 scan_static_bus for PCI: 00:19.1
1047 18:49:39.273193 I2C: 00:15 enabled
1048 18:49:39.275989 scan_static_bus for PCI: 00:19.1 done
1049 18:49:39.283022 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1050 18:49:39.286000 PCI: 00:1d.0 scanning...
1051 18:49:39.289273 do_pci_scan_bridge for PCI: 00:1d.0
1052 18:49:39.293323 PCI: pci_scan_bus for bus 01
1053 18:49:39.296434 PCI: 01:00.0 [15b7/5009] enabled
1054 18:49:39.296517 GENERIC: 0.0 enabled
1055 18:49:39.299306 Enabling Common Clock Configuration
1056 18:49:39.305917 L1 Sub-State supported from root port 29
1057 18:49:39.309755 L1 Sub-State Support = 0x5
1058 18:49:39.309850 CommonModeRestoreTime = 0x28
1059 18:49:39.316007 Power On Value = 0x16, Power On Scale = 0x0
1060 18:49:39.316099 ASPM: Enabled L1
1061 18:49:39.319650 PCIe: Max_Payload_Size adjusted to 128
1062 18:49:39.326062 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1063 18:49:39.329199 PCI: 00:1e.2 scanning...
1064 18:49:39.333232 scan_generic_bus for PCI: 00:1e.2
1065 18:49:39.333329 SPI: 00 enabled
1066 18:49:39.339262 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1067 18:49:39.346292 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1068 18:49:39.346387 PCI: 00:1e.3 scanning...
1069 18:49:39.349478 scan_generic_bus for PCI: 00:1e.3
1070 18:49:39.352628 SPI: 00 enabled
1071 18:49:39.359950 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1072 18:49:39.363134 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1073 18:49:39.366516 PCI: 00:1f.0 scanning...
1074 18:49:39.370176 scan_static_bus for PCI: 00:1f.0
1075 18:49:39.370263 PNP: 0c09.0 enabled
1076 18:49:39.373481 PNP: 0c09.0 scanning...
1077 18:49:39.377070 scan_static_bus for PNP: 0c09.0
1078 18:49:39.379868 scan_static_bus for PNP: 0c09.0 done
1079 18:49:39.386293 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1080 18:49:39.390254 scan_static_bus for PCI: 00:1f.0 done
1081 18:49:39.393326 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1082 18:49:39.396287 PCI: 00:1f.2 scanning...
1083 18:49:39.400428 scan_static_bus for PCI: 00:1f.2
1084 18:49:39.403260 GENERIC: 0.0 enabled
1085 18:49:39.403355 GENERIC: 0.0 scanning...
1086 18:49:39.406583 scan_static_bus for GENERIC: 0.0
1087 18:49:39.410181 GENERIC: 0.0 enabled
1088 18:49:39.413342 GENERIC: 1.0 enabled
1089 18:49:39.416589 scan_static_bus for GENERIC: 0.0 done
1090 18:49:39.420359 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1091 18:49:39.426812 scan_static_bus for PCI: 00:1f.2 done
1092 18:49:39.430297 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1093 18:49:39.433251 PCI: 00:1f.3 scanning...
1094 18:49:39.436721 scan_static_bus for PCI: 00:1f.3
1095 18:49:39.439895 scan_static_bus for PCI: 00:1f.3 done
1096 18:49:39.443653 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1097 18:49:39.446535 PCI: 00:1f.5 scanning...
1098 18:49:39.449907 scan_generic_bus for PCI: 00:1f.5
1099 18:49:39.453283 scan_generic_bus for PCI: 00:1f.5 done
1100 18:49:39.459811 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1101 18:49:39.463012 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1102 18:49:39.466341 scan_static_bus for Root Device done
1103 18:49:39.473387 scan_bus: bus Root Device finished in 735 msecs
1104 18:49:39.473478 done
1105 18:49:39.479763 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1106 18:49:39.483033 Chrome EC: UHEPI supported
1107 18:49:39.489771 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1108 18:49:39.496771 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1109 18:49:39.499783 SPI flash protection: WPSW=0 SRP0=1
1110 18:49:39.503069 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1111 18:49:39.509743 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1112 18:49:39.512873 found VGA at PCI: 00:02.0
1113 18:49:39.516334 Setting up VGA for PCI: 00:02.0
1114 18:49:39.523074 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1115 18:49:39.526163 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1116 18:49:39.529499 Allocating resources...
1117 18:49:39.529583 Reading resources...
1118 18:49:39.536371 Root Device read_resources bus 0 link: 0
1119 18:49:39.539666 DOMAIN: 0000 read_resources bus 0 link: 0
1120 18:49:39.546219 PCI: 00:04.0 read_resources bus 1 link: 0
1121 18:49:39.549460 PCI: 00:04.0 read_resources bus 1 link: 0 done
1122 18:49:39.555955 PCI: 00:0d.0 read_resources bus 0 link: 0
1123 18:49:39.559580 USB0 port 0 read_resources bus 0 link: 0
1124 18:49:39.566229 USB0 port 0 read_resources bus 0 link: 0 done
1125 18:49:39.569445 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1126 18:49:39.572650 PCI: 00:14.0 read_resources bus 0 link: 0
1127 18:49:39.579414 USB0 port 0 read_resources bus 0 link: 0
1128 18:49:39.582621 USB0 port 0 read_resources bus 0 link: 0 done
1129 18:49:39.589333 PCI: 00:14.0 read_resources bus 0 link: 0 done
1130 18:49:39.592528 PCI: 00:14.3 read_resources bus 0 link: 0
1131 18:49:39.599365 PCI: 00:14.3 read_resources bus 0 link: 0 done
1132 18:49:39.602505 PCI: 00:15.0 read_resources bus 0 link: 0
1133 18:49:39.609496 PCI: 00:15.0 read_resources bus 0 link: 0 done
1134 18:49:39.612418 PCI: 00:15.1 read_resources bus 0 link: 0
1135 18:49:39.619149 PCI: 00:15.1 read_resources bus 0 link: 0 done
1136 18:49:39.622702 PCI: 00:19.1 read_resources bus 0 link: 0
1137 18:49:39.629696 PCI: 00:19.1 read_resources bus 0 link: 0 done
1138 18:49:39.633028 PCI: 00:1d.0 read_resources bus 1 link: 0
1139 18:49:39.639205 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1140 18:49:39.642616 PCI: 00:1e.2 read_resources bus 2 link: 0
1141 18:49:39.649438 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1142 18:49:39.652879 PCI: 00:1e.3 read_resources bus 3 link: 0
1143 18:49:39.659470 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1144 18:49:39.662519 PCI: 00:1f.0 read_resources bus 0 link: 0
1145 18:49:39.669792 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1146 18:49:39.672636 PCI: 00:1f.2 read_resources bus 0 link: 0
1147 18:49:39.675858 GENERIC: 0.0 read_resources bus 0 link: 0
1148 18:49:39.683248 GENERIC: 0.0 read_resources bus 0 link: 0 done
1149 18:49:39.686284 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1150 18:49:39.693599 DOMAIN: 0000 read_resources bus 0 link: 0 done
1151 18:49:39.697109 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1152 18:49:39.703861 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1153 18:49:39.707007 Root Device read_resources bus 0 link: 0 done
1154 18:49:39.710182 Done reading resources.
1155 18:49:39.716551 Show resources in subtree (Root Device)...After reading.
1156 18:49:39.720239 Root Device child on link 0 DOMAIN: 0000
1157 18:49:39.723365 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1158 18:49:39.733266 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1159 18:49:39.743568 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1160 18:49:39.746703 PCI: 00:00.0
1161 18:49:39.753740 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1162 18:49:39.763099 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1163 18:49:39.772992 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1164 18:49:39.782999 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1165 18:49:39.793129 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1166 18:49:39.802933 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1167 18:49:39.809603 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1168 18:49:39.819786 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1169 18:49:39.829343 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1170 18:49:39.839636 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1171 18:49:39.849387 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1172 18:49:39.859244 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1173 18:49:39.865835 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1174 18:49:39.876141 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1175 18:49:39.885793 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1176 18:49:39.895750 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1177 18:49:39.905716 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1178 18:49:39.915552 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1179 18:49:39.922140 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1180 18:49:39.932485 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1181 18:49:39.936044 PCI: 00:02.0
1182 18:49:39.945606 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 18:49:39.955585 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1184 18:49:39.965321 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1185 18:49:39.968855 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1186 18:49:39.978935 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1187 18:49:39.982258 GENERIC: 0.0
1188 18:49:39.982350 PCI: 00:05.0
1189 18:49:39.992085 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1190 18:49:39.995587 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1191 18:49:39.998561 GENERIC: 0.0
1192 18:49:40.001823 PCI: 00:08.0
1193 18:49:40.011877 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 18:49:40.011974 PCI: 00:0a.0
1195 18:49:40.015236 PCI: 00:0d.0 child on link 0 USB0 port 0
1196 18:49:40.025050 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 18:49:40.032169 USB0 port 0 child on link 0 USB3 port 0
1198 18:49:40.032264 USB3 port 0
1199 18:49:40.035620 USB3 port 1
1200 18:49:40.035710 USB3 port 2
1201 18:49:40.038488 USB3 port 3
1202 18:49:40.041857 PCI: 00:14.0 child on link 0 USB0 port 0
1203 18:49:40.051824 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1204 18:49:40.055217 USB0 port 0 child on link 0 USB2 port 0
1205 18:49:40.058597 USB2 port 0
1206 18:49:40.061912 USB2 port 1
1207 18:49:40.061994 USB2 port 2
1208 18:49:40.065236 USB2 port 3
1209 18:49:40.065332 USB2 port 4
1210 18:49:40.068180 USB2 port 5
1211 18:49:40.068271 USB2 port 6
1212 18:49:40.071678 USB2 port 7
1213 18:49:40.071760 USB2 port 8
1214 18:49:40.075206 USB2 port 9
1215 18:49:40.075300 USB3 port 0
1216 18:49:40.078445 USB3 port 1
1217 18:49:40.078534 USB3 port 2
1218 18:49:40.081763 USB3 port 3
1219 18:49:40.081843 PCI: 00:14.2
1220 18:49:40.091524 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 18:49:40.101931 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1222 18:49:40.108119 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1223 18:49:40.118217 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1224 18:49:40.118309 GENERIC: 0.0
1225 18:49:40.124925 PCI: 00:15.0 child on link 0 I2C: 00:1a
1226 18:49:40.134599 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 18:49:40.134693 I2C: 00:1a
1228 18:49:40.138246 I2C: 00:31
1229 18:49:40.138331 I2C: 00:32
1230 18:49:40.141919 PCI: 00:15.1 child on link 0 I2C: 00:10
1231 18:49:40.151246 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 18:49:40.154886 I2C: 00:10
1233 18:49:40.154971 PCI: 00:15.2
1234 18:49:40.164831 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 18:49:40.167848 PCI: 00:15.3
1236 18:49:40.178189 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 18:49:40.178278 PCI: 00:16.0
1238 18:49:40.188249 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 18:49:40.191812 PCI: 00:19.0
1240 18:49:40.194377 PCI: 00:19.1 child on link 0 I2C: 00:15
1241 18:49:40.204158 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 18:49:40.207464 I2C: 00:15
1243 18:49:40.210816 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1244 18:49:40.221080 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1245 18:49:40.230391 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1246 18:49:40.238156 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1247 18:49:40.240353 GENERIC: 0.0
1248 18:49:40.240437 PCI: 01:00.0
1249 18:49:40.250445 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1250 18:49:40.260623 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1251 18:49:40.264008 PCI: 00:1e.0
1252 18:49:40.273651 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1253 18:49:40.277081 PCI: 00:1e.2 child on link 0 SPI: 00
1254 18:49:40.286780 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1255 18:49:40.290365 SPI: 00
1256 18:49:40.293714 PCI: 00:1e.3 child on link 0 SPI: 00
1257 18:49:40.303600 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 18:49:40.303711 SPI: 00
1259 18:49:40.310381 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1260 18:49:40.316741 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1261 18:49:40.320196 PNP: 0c09.0
1262 18:49:40.330011 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1263 18:49:40.333189 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1264 18:49:40.343305 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1265 18:49:40.353397 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1266 18:49:40.356888 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1267 18:49:40.356973 GENERIC: 0.0
1268 18:49:40.359914 GENERIC: 1.0
1269 18:49:40.363021 PCI: 00:1f.3
1270 18:49:40.373049 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1271 18:49:40.383144 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1272 18:49:40.383233 PCI: 00:1f.5
1273 18:49:40.393136 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1274 18:49:40.396400 CPU_CLUSTER: 0 child on link 0 APIC: 00
1275 18:49:40.396485 APIC: 00
1276 18:49:40.400004 APIC: 01
1277 18:49:40.400083 APIC: 03
1278 18:49:40.402909 APIC: 07
1279 18:49:40.403015 APIC: 05
1280 18:49:40.403115 APIC: 04
1281 18:49:40.406439 APIC: 02
1282 18:49:40.406526 APIC: 06
1283 18:49:40.416537 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1284 18:49:40.419790 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1285 18:49:40.426129 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1286 18:49:40.432890 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1287 18:49:40.436323 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1288 18:49:40.439390 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1289 18:49:40.449455 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1290 18:49:40.456473 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1291 18:49:40.462637 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1292 18:49:40.469386 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1293 18:49:40.475996 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1294 18:49:40.482897 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1295 18:49:40.492599 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1296 18:49:40.499356 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1297 18:49:40.502515 DOMAIN: 0000: Resource ranges:
1298 18:49:40.505809 * Base: 1000, Size: 800, Tag: 100
1299 18:49:40.509174 * Base: 1900, Size: e700, Tag: 100
1300 18:49:40.515531 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1301 18:49:40.522384 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1302 18:49:40.529034 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1303 18:49:40.535539 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1304 18:49:40.542262 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1305 18:49:40.552222 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1306 18:49:40.558820 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1307 18:49:40.565495 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1308 18:49:40.575295 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1309 18:49:40.582120 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1310 18:49:40.588767 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1311 18:49:40.598703 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1312 18:49:40.605272 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1313 18:49:40.611779 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1314 18:49:40.621736 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1315 18:49:40.628459 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1316 18:49:40.635253 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1317 18:49:40.645023 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1318 18:49:40.651745 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1319 18:49:40.658079 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1320 18:49:40.668479 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1321 18:49:40.674761 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1322 18:49:40.681141 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1323 18:49:40.691733 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1324 18:49:40.698156 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1325 18:49:40.701261 DOMAIN: 0000: Resource ranges:
1326 18:49:40.704473 * Base: 7fc00000, Size: 40400000, Tag: 200
1327 18:49:40.711327 * Base: d0000000, Size: 28000000, Tag: 200
1328 18:49:40.714574 * Base: fa000000, Size: 1000000, Tag: 200
1329 18:49:40.717608 * Base: fb001000, Size: 2fff000, Tag: 200
1330 18:49:40.721020 * Base: fe010000, Size: 2e000, Tag: 200
1331 18:49:40.727466 * Base: fe03f000, Size: d41000, Tag: 200
1332 18:49:40.730951 * Base: fed88000, Size: 8000, Tag: 200
1333 18:49:40.734995 * Base: fed93000, Size: d000, Tag: 200
1334 18:49:40.737663 * Base: feda2000, Size: 1e000, Tag: 200
1335 18:49:40.744240 * Base: fede0000, Size: 1220000, Tag: 200
1336 18:49:40.747637 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1337 18:49:40.754186 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1338 18:49:40.761006 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1339 18:49:40.767707 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1340 18:49:40.773933 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1341 18:49:40.780580 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1342 18:49:40.787511 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1343 18:49:40.794113 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1344 18:49:40.800845 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1345 18:49:40.807205 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1346 18:49:40.814042 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1347 18:49:40.820562 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1348 18:49:40.827148 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1349 18:49:40.833686 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1350 18:49:40.840275 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1351 18:49:40.847065 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1352 18:49:40.853932 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1353 18:49:40.860553 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1354 18:49:40.866949 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1355 18:49:40.873661 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1356 18:49:40.880149 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1357 18:49:40.886767 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1358 18:49:40.893636 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1359 18:49:40.903478 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1360 18:49:40.910594 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1361 18:49:40.913582 PCI: 00:1d.0: Resource ranges:
1362 18:49:40.916970 * Base: 7fc00000, Size: 100000, Tag: 200
1363 18:49:40.923138 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1364 18:49:40.930332 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1365 18:49:40.939725 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1366 18:49:40.946371 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1367 18:49:40.949821 Root Device assign_resources, bus 0 link: 0
1368 18:49:40.956686 DOMAIN: 0000 assign_resources, bus 0 link: 0
1369 18:49:40.963112 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1370 18:49:40.973152 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1371 18:49:40.979714 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1372 18:49:40.986321 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1373 18:49:40.993110 PCI: 00:04.0 assign_resources, bus 1 link: 0
1374 18:49:40.996882 PCI: 00:04.0 assign_resources, bus 1 link: 0
1375 18:49:41.006385 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1376 18:49:41.013023 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1377 18:49:41.023034 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1378 18:49:41.026618 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1379 18:49:41.029662 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1380 18:49:41.039906 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1381 18:49:41.043112 PCI: 00:14.0 assign_resources, bus 0 link: 0
1382 18:49:41.049599 PCI: 00:14.0 assign_resources, bus 0 link: 0
1383 18:49:41.056077 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1384 18:49:41.066288 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1385 18:49:41.073078 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1386 18:49:41.076030 PCI: 00:14.3 assign_resources, bus 0 link: 0
1387 18:49:41.083008 PCI: 00:14.3 assign_resources, bus 0 link: 0
1388 18:49:41.089158 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1389 18:49:41.096299 PCI: 00:15.0 assign_resources, bus 0 link: 0
1390 18:49:41.099624 PCI: 00:15.0 assign_resources, bus 0 link: 0
1391 18:49:41.109194 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1392 18:49:41.112790 PCI: 00:15.1 assign_resources, bus 0 link: 0
1393 18:49:41.116126 PCI: 00:15.1 assign_resources, bus 0 link: 0
1394 18:49:41.125906 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1395 18:49:41.132794 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1396 18:49:41.142167 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1397 18:49:41.149022 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1398 18:49:41.155612 PCI: 00:19.1 assign_resources, bus 0 link: 0
1399 18:49:41.159040 PCI: 00:19.1 assign_resources, bus 0 link: 0
1400 18:49:41.168980 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1401 18:49:41.178798 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1402 18:49:41.185335 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1403 18:49:41.192192 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1404 18:49:41.199011 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1405 18:49:41.209065 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1406 18:49:41.211813 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1407 18:49:41.222453 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1408 18:49:41.225238 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1409 18:49:41.228936 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1410 18:49:41.238933 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1411 18:49:41.241914 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1412 18:49:41.248991 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1413 18:49:41.251650 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1414 18:49:41.255089 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1415 18:49:41.262231 LPC: Trying to open IO window from 800 size 1ff
1416 18:49:41.268708 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1417 18:49:41.278303 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1418 18:49:41.284861 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1419 18:49:41.291451 DOMAIN: 0000 assign_resources, bus 0 link: 0
1420 18:49:41.295320 Root Device assign_resources, bus 0 link: 0
1421 18:49:41.298164 Done setting resources.
1422 18:49:41.304926 Show resources in subtree (Root Device)...After assigning values.
1423 18:49:41.308295 Root Device child on link 0 DOMAIN: 0000
1424 18:49:41.311916 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1425 18:49:41.321623 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1426 18:49:41.331885 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1427 18:49:41.335063 PCI: 00:00.0
1428 18:49:41.344640 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1429 18:49:41.354429 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1430 18:49:41.361051 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1431 18:49:41.370882 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1432 18:49:41.380791 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1433 18:49:41.390849 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1434 18:49:41.400726 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1435 18:49:41.410674 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1436 18:49:41.417159 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1437 18:49:41.427607 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1438 18:49:41.436995 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1439 18:49:41.446922 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1440 18:49:41.457080 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1441 18:49:41.463946 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1442 18:49:41.473404 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1443 18:49:41.483234 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1444 18:49:41.493315 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1445 18:49:41.503683 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1446 18:49:41.513324 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1447 18:49:41.523113 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1448 18:49:41.523205 PCI: 00:02.0
1449 18:49:41.533163 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1450 18:49:41.546395 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1451 18:49:41.552824 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1452 18:49:41.559676 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1453 18:49:41.569499 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1454 18:49:41.569593 GENERIC: 0.0
1455 18:49:41.572574 PCI: 00:05.0
1456 18:49:41.582894 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1457 18:49:41.589077 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1458 18:49:41.589164 GENERIC: 0.0
1459 18:49:41.592484 PCI: 00:08.0
1460 18:49:41.602782 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1461 18:49:41.602875 PCI: 00:0a.0
1462 18:49:41.609762 PCI: 00:0d.0 child on link 0 USB0 port 0
1463 18:49:41.618828 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1464 18:49:41.622373 USB0 port 0 child on link 0 USB3 port 0
1465 18:49:41.625607 USB3 port 0
1466 18:49:41.625694 USB3 port 1
1467 18:49:41.629027 USB3 port 2
1468 18:49:41.629111 USB3 port 3
1469 18:49:41.632559 PCI: 00:14.0 child on link 0 USB0 port 0
1470 18:49:41.645703 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1471 18:49:41.649165 USB0 port 0 child on link 0 USB2 port 0
1472 18:49:41.649254 USB2 port 0
1473 18:49:41.652011 USB2 port 1
1474 18:49:41.655956 USB2 port 2
1475 18:49:41.656042 USB2 port 3
1476 18:49:41.659118 USB2 port 4
1477 18:49:41.659200 USB2 port 5
1478 18:49:41.662236 USB2 port 6
1479 18:49:41.662317 USB2 port 7
1480 18:49:41.665695 USB2 port 8
1481 18:49:41.665779 USB2 port 9
1482 18:49:41.668790 USB3 port 0
1483 18:49:41.668873 USB3 port 1
1484 18:49:41.672509 USB3 port 2
1485 18:49:41.672589 USB3 port 3
1486 18:49:41.675279 PCI: 00:14.2
1487 18:49:41.685538 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1488 18:49:41.695306 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1489 18:49:41.698720 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1490 18:49:41.712091 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1491 18:49:41.712186 GENERIC: 0.0
1492 18:49:41.715279 PCI: 00:15.0 child on link 0 I2C: 00:1a
1493 18:49:41.728597 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1494 18:49:41.728696 I2C: 00:1a
1495 18:49:41.728813 I2C: 00:31
1496 18:49:41.732155 I2C: 00:32
1497 18:49:41.735275 PCI: 00:15.1 child on link 0 I2C: 00:10
1498 18:49:41.745355 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1499 18:49:41.748567 I2C: 00:10
1500 18:49:41.748657 PCI: 00:15.2
1501 18:49:41.758208 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1502 18:49:41.762046 PCI: 00:15.3
1503 18:49:41.771808 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1504 18:49:41.774947 PCI: 00:16.0
1505 18:49:41.785082 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1506 18:49:41.785183 PCI: 00:19.0
1507 18:49:41.788344 PCI: 00:19.1 child on link 0 I2C: 00:15
1508 18:49:41.801648 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1509 18:49:41.801744 I2C: 00:15
1510 18:49:41.804694 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1511 18:49:41.815085 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1512 18:49:41.828043 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1513 18:49:41.838076 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1514 18:49:41.838165 GENERIC: 0.0
1515 18:49:41.841430 PCI: 01:00.0
1516 18:49:41.851417 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1517 18:49:41.861452 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1518 18:49:41.864475 PCI: 00:1e.0
1519 18:49:41.874816 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1520 18:49:41.878146 PCI: 00:1e.2 child on link 0 SPI: 00
1521 18:49:41.888073 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1522 18:49:41.891374 SPI: 00
1523 18:49:41.894482 PCI: 00:1e.3 child on link 0 SPI: 00
1524 18:49:41.904342 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1525 18:49:41.904440 SPI: 00
1526 18:49:41.911369 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1527 18:49:41.918146 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1528 18:49:41.921219 PNP: 0c09.0
1529 18:49:41.927984 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1530 18:49:41.934274 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1531 18:49:41.944225 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1532 18:49:41.950905 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1533 18:49:41.957924 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1534 18:49:41.958020 GENERIC: 0.0
1535 18:49:41.961167 GENERIC: 1.0
1536 18:49:41.961248 PCI: 00:1f.3
1537 18:49:41.974205 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1538 18:49:41.984296 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1539 18:49:41.984382 PCI: 00:1f.5
1540 18:49:41.994345 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1541 18:49:42.001168 CPU_CLUSTER: 0 child on link 0 APIC: 00
1542 18:49:42.001261 APIC: 00
1543 18:49:42.001333 APIC: 01
1544 18:49:42.003989 APIC: 03
1545 18:49:42.004068 APIC: 07
1546 18:49:42.007633 APIC: 05
1547 18:49:42.007718 APIC: 04
1548 18:49:42.007797 APIC: 02
1549 18:49:42.010705 APIC: 06
1550 18:49:42.013947 Done allocating resources.
1551 18:49:42.017330 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1552 18:49:42.023985 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1553 18:49:42.027931 Configure GPIOs for I2S audio on UP4.
1554 18:49:42.035049 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1555 18:49:42.038578 Enabling resources...
1556 18:49:42.041907 PCI: 00:00.0 subsystem <- 8086/9a12
1557 18:49:42.044823 PCI: 00:00.0 cmd <- 06
1558 18:49:42.048258 PCI: 00:02.0 subsystem <- 8086/9a40
1559 18:49:42.051346 PCI: 00:02.0 cmd <- 03
1560 18:49:42.054891 PCI: 00:04.0 subsystem <- 8086/9a03
1561 18:49:42.055099 PCI: 00:04.0 cmd <- 02
1562 18:49:42.062022 PCI: 00:05.0 subsystem <- 8086/9a19
1563 18:49:42.062277 PCI: 00:05.0 cmd <- 02
1564 18:49:42.064970 PCI: 00:08.0 subsystem <- 8086/9a11
1565 18:49:42.068899 PCI: 00:08.0 cmd <- 06
1566 18:49:42.071978 PCI: 00:0d.0 subsystem <- 8086/9a13
1567 18:49:42.075638 PCI: 00:0d.0 cmd <- 02
1568 18:49:42.078376 PCI: 00:14.0 subsystem <- 8086/a0ed
1569 18:49:42.081783 PCI: 00:14.0 cmd <- 02
1570 18:49:42.085225 PCI: 00:14.2 subsystem <- 8086/a0ef
1571 18:49:42.088434 PCI: 00:14.2 cmd <- 02
1572 18:49:42.092034 PCI: 00:14.3 subsystem <- 8086/a0f0
1573 18:49:42.095558 PCI: 00:14.3 cmd <- 02
1574 18:49:42.098351 PCI: 00:15.0 subsystem <- 8086/a0e8
1575 18:49:42.098805 PCI: 00:15.0 cmd <- 02
1576 18:49:42.105359 PCI: 00:15.1 subsystem <- 8086/a0e9
1577 18:49:42.105865 PCI: 00:15.1 cmd <- 02
1578 18:49:42.108981 PCI: 00:15.2 subsystem <- 8086/a0ea
1579 18:49:42.112053 PCI: 00:15.2 cmd <- 02
1580 18:49:42.115679 PCI: 00:15.3 subsystem <- 8086/a0eb
1581 18:49:42.119264 PCI: 00:15.3 cmd <- 02
1582 18:49:42.122105 PCI: 00:16.0 subsystem <- 8086/a0e0
1583 18:49:42.125783 PCI: 00:16.0 cmd <- 02
1584 18:49:42.129239 PCI: 00:19.1 subsystem <- 8086/a0c6
1585 18:49:42.132227 PCI: 00:19.1 cmd <- 02
1586 18:49:42.135550 PCI: 00:1d.0 bridge ctrl <- 0013
1587 18:49:42.139081 PCI: 00:1d.0 subsystem <- 8086/a0b0
1588 18:49:42.142432 PCI: 00:1d.0 cmd <- 06
1589 18:49:42.145576 PCI: 00:1e.0 subsystem <- 8086/a0a8
1590 18:49:42.146114 PCI: 00:1e.0 cmd <- 06
1591 18:49:42.152578 PCI: 00:1e.2 subsystem <- 8086/a0aa
1592 18:49:42.153155 PCI: 00:1e.2 cmd <- 06
1593 18:49:42.155794 PCI: 00:1e.3 subsystem <- 8086/a0ab
1594 18:49:42.158919 PCI: 00:1e.3 cmd <- 02
1595 18:49:42.162438 PCI: 00:1f.0 subsystem <- 8086/a087
1596 18:49:42.165819 PCI: 00:1f.0 cmd <- 407
1597 18:49:42.169611 PCI: 00:1f.3 subsystem <- 8086/a0c8
1598 18:49:42.172575 PCI: 00:1f.3 cmd <- 02
1599 18:49:42.176055 PCI: 00:1f.5 subsystem <- 8086/a0a4
1600 18:49:42.178945 PCI: 00:1f.5 cmd <- 406
1601 18:49:42.182428 PCI: 01:00.0 cmd <- 02
1602 18:49:42.186951 done.
1603 18:49:42.190148 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1604 18:49:42.193815 Initializing devices...
1605 18:49:42.196697 Root Device init
1606 18:49:42.200214 Chrome EC: Set SMI mask to 0x0000000000000000
1607 18:49:42.206513 Chrome EC: clear events_b mask to 0x0000000000000000
1608 18:49:42.214090 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1609 18:49:42.216788 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1610 18:49:42.223973 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1611 18:49:42.230361 Chrome EC: Set WAKE mask to 0x0000000000000000
1612 18:49:42.233900 fw_config match found: DB_USB=USB3_ACTIVE
1613 18:49:42.240260 Configure Right Type-C port orientation for retimer
1614 18:49:42.243671 Root Device init finished in 44 msecs
1615 18:49:42.247264 PCI: 00:00.0 init
1616 18:49:42.250479 CPU TDP = 9 Watts
1617 18:49:42.250997 CPU PL1 = 9 Watts
1618 18:49:42.253450 CPU PL2 = 40 Watts
1619 18:49:42.257159 CPU PL4 = 83 Watts
1620 18:49:42.260231 PCI: 00:00.0 init finished in 8 msecs
1621 18:49:42.260823 PCI: 00:02.0 init
1622 18:49:42.263457 GMA: Found VBT in CBFS
1623 18:49:42.267191 GMA: Found valid VBT in CBFS
1624 18:49:42.273760 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1625 18:49:42.280447 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1626 18:49:42.283760 PCI: 00:02.0 init finished in 18 msecs
1627 18:49:42.287230 PCI: 00:05.0 init
1628 18:49:42.290034 PCI: 00:05.0 init finished in 0 msecs
1629 18:49:42.293630 PCI: 00:08.0 init
1630 18:49:42.296949 PCI: 00:08.0 init finished in 0 msecs
1631 18:49:42.300255 PCI: 00:14.0 init
1632 18:49:42.303774 PCI: 00:14.0 init finished in 0 msecs
1633 18:49:42.306752 PCI: 00:14.2 init
1634 18:49:42.309861 PCI: 00:14.2 init finished in 0 msecs
1635 18:49:42.310473 PCI: 00:15.0 init
1636 18:49:42.313670 I2C bus 0 version 0x3230302a
1637 18:49:42.316716 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1638 18:49:42.323666 PCI: 00:15.0 init finished in 6 msecs
1639 18:49:42.324177 PCI: 00:15.1 init
1640 18:49:42.326968 I2C bus 1 version 0x3230302a
1641 18:49:42.329957 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1642 18:49:42.332984 PCI: 00:15.1 init finished in 6 msecs
1643 18:49:42.337039 PCI: 00:15.2 init
1644 18:49:42.340349 I2C bus 2 version 0x3230302a
1645 18:49:42.343289 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1646 18:49:42.347348 PCI: 00:15.2 init finished in 6 msecs
1647 18:49:42.350311 PCI: 00:15.3 init
1648 18:49:42.353585 I2C bus 3 version 0x3230302a
1649 18:49:42.356992 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1650 18:49:42.360208 PCI: 00:15.3 init finished in 6 msecs
1651 18:49:42.363618 PCI: 00:16.0 init
1652 18:49:42.367645 PCI: 00:16.0 init finished in 0 msecs
1653 18:49:42.370415 PCI: 00:19.1 init
1654 18:49:42.370937 I2C bus 5 version 0x3230302a
1655 18:49:42.377184 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1656 18:49:42.380346 PCI: 00:19.1 init finished in 6 msecs
1657 18:49:42.380963 PCI: 00:1d.0 init
1658 18:49:42.383404 Initializing PCH PCIe bridge.
1659 18:49:42.386634 PCI: 00:1d.0 init finished in 3 msecs
1660 18:49:42.391353 PCI: 00:1f.0 init
1661 18:49:42.394669 IOAPIC: Initializing IOAPIC at 0xfec00000
1662 18:49:42.401270 IOAPIC: Bootstrap Processor Local APIC = 0x00
1663 18:49:42.401695 IOAPIC: ID = 0x02
1664 18:49:42.404371 IOAPIC: Dumping registers
1665 18:49:42.407264 reg 0x0000: 0x02000000
1666 18:49:42.410732 reg 0x0001: 0x00770020
1667 18:49:42.411221 reg 0x0002: 0x00000000
1668 18:49:42.417207 PCI: 00:1f.0 init finished in 21 msecs
1669 18:49:42.417711 PCI: 00:1f.2 init
1670 18:49:42.421204 Disabling ACPI via APMC.
1671 18:49:42.424235 APMC done.
1672 18:49:42.427681 PCI: 00:1f.2 init finished in 5 msecs
1673 18:49:42.438668 PCI: 01:00.0 init
1674 18:49:42.442171 PCI: 01:00.0 init finished in 0 msecs
1675 18:49:42.445316 PNP: 0c09.0 init
1676 18:49:42.448837 Google Chrome EC uptime: 8.250 seconds
1677 18:49:42.455348 Google Chrome AP resets since EC boot: 1
1678 18:49:42.458691 Google Chrome most recent AP reset causes:
1679 18:49:42.461834 0.452: 32775 shutdown: entering G3
1680 18:49:42.468416 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1681 18:49:42.471879 PNP: 0c09.0 init finished in 22 msecs
1682 18:49:42.476975 Devices initialized
1683 18:49:42.480403 Show all devs... After init.
1684 18:49:42.483981 Root Device: enabled 1
1685 18:49:42.484395 DOMAIN: 0000: enabled 1
1686 18:49:42.487291 CPU_CLUSTER: 0: enabled 1
1687 18:49:42.490582 PCI: 00:00.0: enabled 1
1688 18:49:42.493627 PCI: 00:02.0: enabled 1
1689 18:49:42.494040 PCI: 00:04.0: enabled 1
1690 18:49:42.497349 PCI: 00:05.0: enabled 1
1691 18:49:42.500345 PCI: 00:06.0: enabled 0
1692 18:49:42.504209 PCI: 00:07.0: enabled 0
1693 18:49:42.504767 PCI: 00:07.1: enabled 0
1694 18:49:42.507220 PCI: 00:07.2: enabled 0
1695 18:49:42.510502 PCI: 00:07.3: enabled 0
1696 18:49:42.513899 PCI: 00:08.0: enabled 1
1697 18:49:42.514464 PCI: 00:09.0: enabled 0
1698 18:49:42.517246 PCI: 00:0a.0: enabled 0
1699 18:49:42.520413 PCI: 00:0d.0: enabled 1
1700 18:49:42.524267 PCI: 00:0d.1: enabled 0
1701 18:49:42.524831 PCI: 00:0d.2: enabled 0
1702 18:49:42.526845 PCI: 00:0d.3: enabled 0
1703 18:49:42.530340 PCI: 00:0e.0: enabled 0
1704 18:49:42.530757 PCI: 00:10.2: enabled 1
1705 18:49:42.533281 PCI: 00:10.6: enabled 0
1706 18:49:42.537201 PCI: 00:10.7: enabled 0
1707 18:49:42.540296 PCI: 00:12.0: enabled 0
1708 18:49:42.540748 PCI: 00:12.6: enabled 0
1709 18:49:42.544201 PCI: 00:13.0: enabled 0
1710 18:49:42.547236 PCI: 00:14.0: enabled 1
1711 18:49:42.550456 PCI: 00:14.1: enabled 0
1712 18:49:42.550968 PCI: 00:14.2: enabled 1
1713 18:49:42.553901 PCI: 00:14.3: enabled 1
1714 18:49:42.557594 PCI: 00:15.0: enabled 1
1715 18:49:42.560783 PCI: 00:15.1: enabled 1
1716 18:49:42.561295 PCI: 00:15.2: enabled 1
1717 18:49:42.564121 PCI: 00:15.3: enabled 1
1718 18:49:42.567116 PCI: 00:16.0: enabled 1
1719 18:49:42.567622 PCI: 00:16.1: enabled 0
1720 18:49:42.570827 PCI: 00:16.2: enabled 0
1721 18:49:42.573503 PCI: 00:16.3: enabled 0
1722 18:49:42.576763 PCI: 00:16.4: enabled 0
1723 18:49:42.577181 PCI: 00:16.5: enabled 0
1724 18:49:42.580438 PCI: 00:17.0: enabled 0
1725 18:49:42.583498 PCI: 00:19.0: enabled 0
1726 18:49:42.587154 PCI: 00:19.1: enabled 1
1727 18:49:42.587667 PCI: 00:19.2: enabled 0
1728 18:49:42.590028 PCI: 00:1c.0: enabled 1
1729 18:49:42.593569 PCI: 00:1c.1: enabled 0
1730 18:49:42.596544 PCI: 00:1c.2: enabled 0
1731 18:49:42.597106 PCI: 00:1c.3: enabled 0
1732 18:49:42.600093 PCI: 00:1c.4: enabled 0
1733 18:49:42.603462 PCI: 00:1c.5: enabled 0
1734 18:49:42.603981 PCI: 00:1c.6: enabled 1
1735 18:49:42.607045 PCI: 00:1c.7: enabled 0
1736 18:49:42.610101 PCI: 00:1d.0: enabled 1
1737 18:49:42.613236 PCI: 00:1d.1: enabled 0
1738 18:49:42.613652 PCI: 00:1d.2: enabled 1
1739 18:49:42.616509 PCI: 00:1d.3: enabled 0
1740 18:49:42.619888 PCI: 00:1e.0: enabled 1
1741 18:49:42.623405 PCI: 00:1e.1: enabled 0
1742 18:49:42.623940 PCI: 00:1e.2: enabled 1
1743 18:49:42.626921 PCI: 00:1e.3: enabled 1
1744 18:49:42.630274 PCI: 00:1f.0: enabled 1
1745 18:49:42.633622 PCI: 00:1f.1: enabled 0
1746 18:49:42.634038 PCI: 00:1f.2: enabled 1
1747 18:49:42.636903 PCI: 00:1f.3: enabled 1
1748 18:49:42.639920 PCI: 00:1f.4: enabled 0
1749 18:49:42.643376 PCI: 00:1f.5: enabled 1
1750 18:49:42.643887 PCI: 00:1f.6: enabled 0
1751 18:49:42.646757 PCI: 00:1f.7: enabled 0
1752 18:49:42.650337 APIC: 00: enabled 1
1753 18:49:42.650849 GENERIC: 0.0: enabled 1
1754 18:49:42.653430 GENERIC: 0.0: enabled 1
1755 18:49:42.656725 GENERIC: 1.0: enabled 1
1756 18:49:42.660212 GENERIC: 0.0: enabled 1
1757 18:49:42.660769 GENERIC: 1.0: enabled 1
1758 18:49:42.663499 USB0 port 0: enabled 1
1759 18:49:42.667086 GENERIC: 0.0: enabled 1
1760 18:49:42.667593 USB0 port 0: enabled 1
1761 18:49:42.670449 GENERIC: 0.0: enabled 1
1762 18:49:42.673377 I2C: 00:1a: enabled 1
1763 18:49:42.676418 I2C: 00:31: enabled 1
1764 18:49:42.676885 I2C: 00:32: enabled 1
1765 18:49:42.680212 I2C: 00:10: enabled 1
1766 18:49:42.683725 I2C: 00:15: enabled 1
1767 18:49:42.684236 GENERIC: 0.0: enabled 0
1768 18:49:42.686620 GENERIC: 1.0: enabled 0
1769 18:49:42.689711 GENERIC: 0.0: enabled 1
1770 18:49:42.690125 SPI: 00: enabled 1
1771 18:49:42.693092 SPI: 00: enabled 1
1772 18:49:42.696950 PNP: 0c09.0: enabled 1
1773 18:49:42.697461 GENERIC: 0.0: enabled 1
1774 18:49:42.699771 USB3 port 0: enabled 1
1775 18:49:42.703064 USB3 port 1: enabled 1
1776 18:49:42.703576 USB3 port 2: enabled 0
1777 18:49:42.706944 USB3 port 3: enabled 0
1778 18:49:42.709915 USB2 port 0: enabled 0
1779 18:49:42.712773 USB2 port 1: enabled 1
1780 18:49:42.713192 USB2 port 2: enabled 1
1781 18:49:42.716912 USB2 port 3: enabled 0
1782 18:49:42.719782 USB2 port 4: enabled 1
1783 18:49:42.720289 USB2 port 5: enabled 0
1784 18:49:42.722942 USB2 port 6: enabled 0
1785 18:49:42.726122 USB2 port 7: enabled 0
1786 18:49:42.729435 USB2 port 8: enabled 0
1787 18:49:42.729848 USB2 port 9: enabled 0
1788 18:49:42.732926 USB3 port 0: enabled 0
1789 18:49:42.736975 USB3 port 1: enabled 1
1790 18:49:42.737490 USB3 port 2: enabled 0
1791 18:49:42.740173 USB3 port 3: enabled 0
1792 18:49:42.742834 GENERIC: 0.0: enabled 1
1793 18:49:42.746205 GENERIC: 1.0: enabled 1
1794 18:49:42.746733 APIC: 01: enabled 1
1795 18:49:42.749449 APIC: 03: enabled 1
1796 18:49:42.749866 APIC: 07: enabled 1
1797 18:49:42.753199 APIC: 05: enabled 1
1798 18:49:42.756282 APIC: 04: enabled 1
1799 18:49:42.756837 APIC: 02: enabled 1
1800 18:49:42.759645 APIC: 06: enabled 1
1801 18:49:42.762898 PCI: 01:00.0: enabled 1
1802 18:49:42.766602 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1803 18:49:42.772761 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1804 18:49:42.776000 ELOG: NV offset 0xf30000 size 0x1000
1805 18:49:42.782787 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1806 18:49:42.789107 ELOG: Event(17) added with size 13 at 2024-03-01 18:49:42 UTC
1807 18:49:42.796143 ELOG: Event(92) added with size 9 at 2024-03-01 18:49:42 UTC
1808 18:49:42.802369 ELOG: Event(93) added with size 9 at 2024-03-01 18:49:42 UTC
1809 18:49:42.808882 ELOG: Event(9E) added with size 10 at 2024-03-01 18:49:42 UTC
1810 18:49:42.815750 ELOG: Event(9F) added with size 14 at 2024-03-01 18:49:42 UTC
1811 18:49:42.822493 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1812 18:49:42.825719 ELOG: Event(A1) added with size 10 at 2024-03-01 18:49:42 UTC
1813 18:49:42.835671 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1814 18:49:42.842323 ELOG: Event(A0) added with size 9 at 2024-03-01 18:49:42 UTC
1815 18:49:42.845446 elog_add_boot_reason: Logged dev mode boot
1816 18:49:42.852017 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1817 18:49:42.852524 Finalize devices...
1818 18:49:42.855377 Devices finalized
1819 18:49:42.862126 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1820 18:49:42.865918 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1821 18:49:42.872271 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1822 18:49:42.875696 ME: HFSTS1 : 0x80030055
1823 18:49:42.882376 ME: HFSTS2 : 0x30280116
1824 18:49:42.884988 ME: HFSTS3 : 0x00000050
1825 18:49:42.888699 ME: HFSTS4 : 0x00004000
1826 18:49:42.894962 ME: HFSTS5 : 0x00000000
1827 18:49:42.898177 ME: HFSTS6 : 0x40400006
1828 18:49:42.901451 ME: Manufacturing Mode : YES
1829 18:49:42.905456 ME: SPI Protection Mode Enabled : NO
1830 18:49:42.908733 ME: FW Partition Table : OK
1831 18:49:42.914898 ME: Bringup Loader Failure : NO
1832 18:49:42.918136 ME: Firmware Init Complete : NO
1833 18:49:42.921905 ME: Boot Options Present : NO
1834 18:49:42.924964 ME: Update In Progress : NO
1835 18:49:42.927946 ME: D0i3 Support : YES
1836 18:49:42.931402 ME: Low Power State Enabled : NO
1837 18:49:42.934745 ME: CPU Replaced : YES
1838 18:49:42.941149 ME: CPU Replacement Valid : YES
1839 18:49:42.944816 ME: Current Working State : 5
1840 18:49:42.948037 ME: Current Operation State : 1
1841 18:49:42.951367 ME: Current Operation Mode : 3
1842 18:49:42.954901 ME: Error Code : 0
1843 18:49:42.957928 ME: Enhanced Debug Mode : NO
1844 18:49:42.961313 ME: CPU Debug Disabled : YES
1845 18:49:42.964753 ME: TXT Support : NO
1846 18:49:42.971715 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1847 18:49:42.977516 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1848 18:49:42.980800 CBFS: 'fallback/slic' not found.
1849 18:49:42.987672 ACPI: Writing ACPI tables at 76b01000.
1850 18:49:42.988198 ACPI: * FACS
1851 18:49:42.990929 ACPI: * DSDT
1852 18:49:42.994343 Ramoops buffer: 0x100000@0x76a00000.
1853 18:49:42.997680 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1854 18:49:43.004186 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1855 18:49:43.007823 Google Chrome EC: version:
1856 18:49:43.010556 ro: voema_v2.0.10114-a447f03e46
1857 18:49:43.014827 rw: voema_v2.0.10114-a447f03e46
1858 18:49:43.015240 running image: 2
1859 18:49:43.020914 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1860 18:49:43.025234 ACPI: * FADT
1861 18:49:43.025763 SCI is IRQ9
1862 18:49:43.031813 ACPI: added table 1/32, length now 40
1863 18:49:43.032343 ACPI: * SSDT
1864 18:49:43.035184 Found 1 CPU(s) with 8 core(s) each.
1865 18:49:43.041887 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1866 18:49:43.044941 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1867 18:49:43.048795 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1868 18:49:43.052028 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1869 18:49:43.058300 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1870 18:49:43.065356 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1871 18:49:43.068433 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1872 18:49:43.075192 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1873 18:49:43.081788 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1874 18:49:43.085032 \_SB.PCI0.RP09: Added StorageD3Enable property
1875 18:49:43.091758 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1876 18:49:43.095162 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1877 18:49:43.101726 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1878 18:49:43.105013 PS2K: Passing 80 keymaps to kernel
1879 18:49:43.112120 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1880 18:49:43.117856 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1881 18:49:43.124755 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1882 18:49:43.131438 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1883 18:49:43.138184 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1884 18:49:43.144667 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1885 18:49:43.151918 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1886 18:49:43.157910 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1887 18:49:43.161529 ACPI: added table 2/32, length now 44
1888 18:49:43.162039 ACPI: * MCFG
1889 18:49:43.167805 ACPI: added table 3/32, length now 48
1890 18:49:43.168315 ACPI: * TPM2
1891 18:49:43.171850 TPM2 log created at 0x769f0000
1892 18:49:43.174452 ACPI: added table 4/32, length now 52
1893 18:49:43.177985 ACPI: * MADT
1894 18:49:43.178508 SCI is IRQ9
1895 18:49:43.181553 ACPI: added table 5/32, length now 56
1896 18:49:43.184753 current = 76b09850
1897 18:49:43.185268 ACPI: * DMAR
1898 18:49:43.188040 ACPI: added table 6/32, length now 60
1899 18:49:43.194356 ACPI: added table 7/32, length now 64
1900 18:49:43.194868 ACPI: * HPET
1901 18:49:43.197635 ACPI: added table 8/32, length now 68
1902 18:49:43.201017 ACPI: done.
1903 18:49:43.201694 ACPI tables: 35216 bytes.
1904 18:49:43.204691 smbios_write_tables: 769ef000
1905 18:49:43.208031 EC returned error result code 3
1906 18:49:43.211117 Couldn't obtain OEM name from CBI
1907 18:49:43.216457 Create SMBIOS type 16
1908 18:49:43.219777 Create SMBIOS type 17
1909 18:49:43.223608 GENERIC: 0.0 (WIFI Device)
1910 18:49:43.224127 SMBIOS tables: 1734 bytes.
1911 18:49:43.229457 Writing table forward entry at 0x00000500
1912 18:49:43.236877 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1913 18:49:43.239645 Writing coreboot table at 0x76b25000
1914 18:49:43.246495 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1915 18:49:43.249328 1. 0000000000001000-000000000009ffff: RAM
1916 18:49:43.253145 2. 00000000000a0000-00000000000fffff: RESERVED
1917 18:49:43.259640 3. 0000000000100000-00000000769eefff: RAM
1918 18:49:43.263341 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1919 18:49:43.269581 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1920 18:49:43.276103 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1921 18:49:43.279569 7. 0000000077000000-000000007fbfffff: RESERVED
1922 18:49:43.282744 8. 00000000c0000000-00000000cfffffff: RESERVED
1923 18:49:43.289515 9. 00000000f8000000-00000000f9ffffff: RESERVED
1924 18:49:43.292704 10. 00000000fb000000-00000000fb000fff: RESERVED
1925 18:49:43.299554 11. 00000000fe000000-00000000fe00ffff: RESERVED
1926 18:49:43.302987 12. 00000000fed80000-00000000fed87fff: RESERVED
1927 18:49:43.309589 13. 00000000fed90000-00000000fed92fff: RESERVED
1928 18:49:43.312600 14. 00000000feda0000-00000000feda1fff: RESERVED
1929 18:49:43.319338 15. 00000000fedc0000-00000000feddffff: RESERVED
1930 18:49:43.322811 16. 0000000100000000-00000004803fffff: RAM
1931 18:49:43.326175 Passing 4 GPIOs to payload:
1932 18:49:43.329068 NAME | PORT | POLARITY | VALUE
1933 18:49:43.335803 lid | undefined | high | high
1934 18:49:43.339382 power | undefined | high | low
1935 18:49:43.346143 oprom | undefined | high | low
1936 18:49:43.352391 EC in RW | 0x000000e5 | high | high
1937 18:49:43.359307 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1938 18:49:43.359834 coreboot table: 1576 bytes.
1939 18:49:43.365984 IMD ROOT 0. 0x76fff000 0x00001000
1940 18:49:43.369620 IMD SMALL 1. 0x76ffe000 0x00001000
1941 18:49:43.373219 FSP MEMORY 2. 0x76c4e000 0x003b0000
1942 18:49:43.376189 VPD 3. 0x76c4d000 0x00000367
1943 18:49:43.378904 RO MCACHE 4. 0x76c4c000 0x00000fdc
1944 18:49:43.382756 CONSOLE 5. 0x76c2c000 0x00020000
1945 18:49:43.385544 FMAP 6. 0x76c2b000 0x00000578
1946 18:49:43.389004 TIME STAMP 7. 0x76c2a000 0x00000910
1947 18:49:43.392487 VBOOT WORK 8. 0x76c16000 0x00014000
1948 18:49:43.399514 ROMSTG STCK 9. 0x76c15000 0x00001000
1949 18:49:43.402982 AFTER CAR 10. 0x76c0a000 0x0000b000
1950 18:49:43.405519 RAMSTAGE 11. 0x76b97000 0x00073000
1951 18:49:43.409190 REFCODE 12. 0x76b42000 0x00055000
1952 18:49:43.412855 SMM BACKUP 13. 0x76b32000 0x00010000
1953 18:49:43.415667 4f444749 14. 0x76b30000 0x00002000
1954 18:49:43.419063 EXT VBT15. 0x76b2d000 0x0000219f
1955 18:49:43.422676 COREBOOT 16. 0x76b25000 0x00008000
1956 18:49:43.426118 ACPI 17. 0x76b01000 0x00024000
1957 18:49:43.432180 ACPI GNVS 18. 0x76b00000 0x00001000
1958 18:49:43.435418 RAMOOPS 19. 0x76a00000 0x00100000
1959 18:49:43.438769 TPM2 TCGLOG20. 0x769f0000 0x00010000
1960 18:49:43.442091 SMBIOS 21. 0x769ef000 0x00000800
1961 18:49:43.442511 IMD small region:
1962 18:49:43.448999 IMD ROOT 0. 0x76ffec00 0x00000400
1963 18:49:43.452068 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1964 18:49:43.455701 POWER STATE 2. 0x76ffeb80 0x00000044
1965 18:49:43.458654 ROMSTAGE 3. 0x76ffeb60 0x00000004
1966 18:49:43.462083 MEM INFO 4. 0x76ffe980 0x000001e0
1967 18:49:43.469276 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1968 18:49:43.472101 MTRR: Physical address space:
1969 18:49:43.478926 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1970 18:49:43.485668 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1971 18:49:43.492264 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1972 18:49:43.498680 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1973 18:49:43.502011 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1974 18:49:43.508577 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1975 18:49:43.515049 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1976 18:49:43.518722 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 18:49:43.525176 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 18:49:43.528956 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 18:49:43.532093 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 18:49:43.535029 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 18:49:43.541525 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 18:49:43.546013 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 18:49:43.548822 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 18:49:43.551908 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 18:49:43.558693 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 18:49:43.561713 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 18:49:43.565450 call enable_fixed_mtrr()
1988 18:49:43.568468 CPU physical address size: 39 bits
1989 18:49:43.575540 MTRR: default type WB/UC MTRR counts: 6/7.
1990 18:49:43.578464 MTRR: WB selected as default type.
1991 18:49:43.584942 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1992 18:49:43.588785 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1993 18:49:43.595511 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1994 18:49:43.601810 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1995 18:49:43.608650 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1996 18:49:43.615004 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1997 18:49:43.619295
1998 18:49:43.619815 MTRR check
1999 18:49:43.622762 Fixed MTRRs : Enabled
2000 18:49:43.623285 Variable MTRRs: Enabled
2001 18:49:43.623616
2002 18:49:43.629344 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 18:49:43.632759 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 18:49:43.635414 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 18:49:43.639275 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 18:49:43.645487 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 18:49:43.648903 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 18:49:43.652145 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 18:49:43.655508 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 18:49:43.662154 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 18:49:43.665543 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 18:49:43.668783 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 18:49:43.676227 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2014 18:49:43.680334 call enable_fixed_mtrr()
2015 18:49:43.683194 Checking cr50 for pending updates
2016 18:49:43.686899 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 18:49:43.689690 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 18:49:43.697082 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 18:49:43.700147 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 18:49:43.703257 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 18:49:43.706903 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 18:49:43.709872 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 18:49:43.716174 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 18:49:43.720114 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 18:49:43.723650 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 18:49:43.726618 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 18:49:43.733267 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 18:49:43.736583 MTRR: Fixed MSR 0x258 0x0606060606060606
2029 18:49:43.743555 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 18:49:43.746467 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 18:49:43.749761 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 18:49:43.753269 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 18:49:43.759319 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 18:49:43.763123 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 18:49:43.766375 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 18:49:43.769730 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 18:49:43.776362 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 18:49:43.779493 call enable_fixed_mtrr()
2039 18:49:43.782933 call enable_fixed_mtrr()
2040 18:49:43.786792 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 18:49:43.789527 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 18:49:43.792661 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 18:49:43.799188 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 18:49:43.802584 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 18:49:43.806403 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 18:49:43.809466 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 18:49:43.816228 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 18:49:43.819488 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 18:49:43.822771 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 18:49:43.826093 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 18:49:43.832832 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 18:49:43.835998 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 18:49:43.839479 call enable_fixed_mtrr()
2054 18:49:43.842802 MTRR: Fixed MSR 0x250 0x0606060606060606
2055 18:49:43.846700 Reading cr50 TPM mode
2056 18:49:43.849699 CPU physical address size: 39 bits
2057 18:49:43.853425 CPU physical address size: 39 bits
2058 18:49:43.857533 CPU physical address size: 39 bits
2059 18:49:43.863842 BS: BS_PAYLOAD_LOAD entry times (exec / console): 171 / 6 ms
2060 18:49:43.867589 CPU physical address size: 39 bits
2061 18:49:43.876003 MTRR: Fixed MSR 0x259 0x0000000000000000
2062 18:49:43.879523 MTRR: Fixed MSR 0x268 0x0606060606060606
2063 18:49:43.882934 MTRR: Fixed MSR 0x269 0x0606060606060606
2064 18:49:43.886362 MTRR: Fixed MSR 0x26a 0x0606060606060606
2065 18:49:43.892981 MTRR: Fixed MSR 0x26b 0x0606060606060606
2066 18:49:43.896404 MTRR: Fixed MSR 0x26c 0x0606060606060606
2067 18:49:43.899052 MTRR: Fixed MSR 0x26d 0x0606060606060606
2068 18:49:43.902366 MTRR: Fixed MSR 0x26e 0x0606060606060606
2069 18:49:43.909184 MTRR: Fixed MSR 0x26f 0x0606060606060606
2070 18:49:43.912258 MTRR: Fixed MSR 0x250 0x0606060606060606
2071 18:49:43.915648 MTRR: Fixed MSR 0x258 0x0606060606060606
2072 18:49:43.919159 MTRR: Fixed MSR 0x259 0x0000000000000000
2073 18:49:43.922883 MTRR: Fixed MSR 0x268 0x0606060606060606
2074 18:49:43.929332 MTRR: Fixed MSR 0x269 0x0606060606060606
2075 18:49:43.932432 MTRR: Fixed MSR 0x26a 0x0606060606060606
2076 18:49:43.935716 MTRR: Fixed MSR 0x26b 0x0606060606060606
2077 18:49:43.938703 MTRR: Fixed MSR 0x26c 0x0606060606060606
2078 18:49:43.945823 MTRR: Fixed MSR 0x26d 0x0606060606060606
2079 18:49:43.949131 MTRR: Fixed MSR 0x26e 0x0606060606060606
2080 18:49:43.952540 MTRR: Fixed MSR 0x26f 0x0606060606060606
2081 18:49:43.960754 MTRR: Fixed MSR 0x258 0x0606060606060606
2082 18:49:43.963571 MTRR: Fixed MSR 0x259 0x0000000000000000
2083 18:49:43.967223 MTRR: Fixed MSR 0x268 0x0606060606060606
2084 18:49:43.969942 MTRR: Fixed MSR 0x269 0x0606060606060606
2085 18:49:43.976695 MTRR: Fixed MSR 0x26a 0x0606060606060606
2086 18:49:43.980205 MTRR: Fixed MSR 0x26b 0x0606060606060606
2087 18:49:43.983011 MTRR: Fixed MSR 0x26c 0x0606060606060606
2088 18:49:43.986833 MTRR: Fixed MSR 0x26d 0x0606060606060606
2089 18:49:43.993163 MTRR: Fixed MSR 0x26e 0x0606060606060606
2090 18:49:43.996780 MTRR: Fixed MSR 0x26f 0x0606060606060606
2091 18:49:44.000143 call enable_fixed_mtrr()
2092 18:49:44.003457 call enable_fixed_mtrr()
2093 18:49:44.006660 call enable_fixed_mtrr()
2094 18:49:44.010378 CPU physical address size: 39 bits
2095 18:49:44.013352 CPU physical address size: 39 bits
2096 18:49:44.019871 CPU physical address size: 39 bits
2097 18:49:44.026731 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2098 18:49:44.029973 Checking segment from ROM address 0xffc02b38
2099 18:49:44.036730 Checking segment from ROM address 0xffc02b54
2100 18:49:44.040503 Loading segment from ROM address 0xffc02b38
2101 18:49:44.043718 code (compression=0)
2102 18:49:44.050119 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2103 18:49:44.060173 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2104 18:49:44.060738 it's not compressed!
2105 18:49:44.210566 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2106 18:49:44.216825 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2107 18:49:44.224125 Loading segment from ROM address 0xffc02b54
2108 18:49:44.227310 Entry Point 0x30000000
2109 18:49:44.227832 Loaded segments
2110 18:49:44.233508 BS: BS_PAYLOAD_LOAD run times (exec / console): 299 / 63 ms
2111 18:49:44.279701 Finalizing chipset.
2112 18:49:44.282609 Finalizing SMM.
2113 18:49:44.283173 APMC done.
2114 18:49:44.289491 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2115 18:49:44.292772 mp_park_aps done after 0 msecs.
2116 18:49:44.296247 Jumping to boot code at 0x30000000(0x76b25000)
2117 18:49:44.305977 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2118 18:49:44.306548
2119 18:49:44.306916
2120 18:49:44.307251
2121 18:49:44.309077 Starting depthcharge on Voema...
2122 18:49:44.309534
2123 18:49:44.310675 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2124 18:49:44.311168 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2125 18:49:44.311555 Setting prompt string to ['volteer:']
2126 18:49:44.311985 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2127 18:49:44.319226 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2128 18:49:44.319748
2129 18:49:44.326024 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2130 18:49:44.326553
2131 18:49:44.329082 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2132 18:49:44.332337
2133 18:49:44.335423 Failed to find eMMC card reader
2134 18:49:44.335849
2135 18:49:44.336178 Wipe memory regions:
2136 18:49:44.336482
2137 18:49:44.342010 [0x00000000001000, 0x000000000a0000)
2138 18:49:44.342434
2139 18:49:44.345505 [0x00000000100000, 0x00000030000000)
2140 18:49:44.384723
2141 18:49:44.387639 [0x00000032662db0, 0x000000769ef000)
2142 18:49:44.441889
2143 18:49:44.445449 [0x00000100000000, 0x00000480400000)
2144 18:49:45.124613
2145 18:49:45.128035 ec_init: CrosEC protocol v3 supported (256, 256)
2146 18:49:45.559546
2147 18:49:45.560066 R8152: Initializing
2148 18:49:45.560419
2149 18:49:45.562759 Version 6 (ocp_data = 5c30)
2150 18:49:45.563277
2151 18:49:45.565879 R8152: Done initializing
2152 18:49:45.566296
2153 18:49:45.569051 Adding net device
2154 18:49:45.870963
2155 18:49:45.874437 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2156 18:49:45.874983
2157 18:49:45.875321
2158 18:49:45.875630
2159 18:49:45.877839 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2161 18:49:45.979061 volteer: tftpboot 192.168.201.1 12909587/tftp-deploy-jpbbrewi/kernel/bzImage 12909587/tftp-deploy-jpbbrewi/kernel/cmdline 12909587/tftp-deploy-jpbbrewi/ramdisk/ramdisk.cpio.gz
2162 18:49:45.979659 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2163 18:49:45.980154 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2164 18:49:45.984551 tftpboot 192.168.201.1 12909587/tftp-deploy-jpbbrewi/kernel/bzImloy-jpbbrewi/kernel/cmdline 12909587/tftp-deploy-jpbbrewi/ramdisk/ramdisk.cpio.gz
2165 18:49:45.985015
2166 18:49:45.985479 Waiting for link
2167 18:49:46.188787
2168 18:49:46.189275 done.
2169 18:49:46.189606
2170 18:49:46.189912 MAC: 00:24:32:30:77:d1
2171 18:49:46.190204
2172 18:49:46.192169 Sending DHCP discover... done.
2173 18:49:46.192585
2174 18:49:46.195621 Waiting for reply... done.
2175 18:49:46.196223
2176 18:49:46.199561 Sending DHCP request... done.
2177 18:49:46.199976
2178 18:49:46.206383 Waiting for reply... done.
2179 18:49:46.206807
2180 18:49:46.207170 My ip is 192.168.201.13
2181 18:49:46.207477
2182 18:49:46.212887 The DHCP server ip is 192.168.201.1
2183 18:49:46.213308
2184 18:49:46.216216 TFTP server IP predefined by user: 192.168.201.1
2185 18:49:46.216679
2186 18:49:46.222787 Bootfile predefined by user: 12909587/tftp-deploy-jpbbrewi/kernel/bzImage
2187 18:49:46.223207
2188 18:49:46.226187 Sending tftp read request... done.
2189 18:49:46.226604
2190 18:49:46.235438 Waiting for the transfer...
2191 18:49:46.235900
2192 18:49:46.945264 00000000 ################################################################
2193 18:49:46.945739
2194 18:49:47.464330 00080000 ################################################################
2195 18:49:47.464548
2196 18:49:48.054504 00100000 ################################################################
2197 18:49:48.055213
2198 18:49:48.775870 00180000 ################################################################
2199 18:49:48.776427
2200 18:49:49.477173 00200000 ################################################################
2201 18:49:49.477708
2202 18:49:50.186628 00280000 ################################################################
2203 18:49:50.187171
2204 18:49:50.913425 00300000 ################################################################
2205 18:49:50.913943
2206 18:49:51.636386 00380000 ################################################################
2207 18:49:51.636977
2208 18:49:52.360882 00400000 ################################################################
2209 18:49:52.361402
2210 18:49:53.078289 00480000 ################################################################
2211 18:49:53.078834
2212 18:49:53.752722 00500000 ################################################################
2213 18:49:53.752873
2214 18:49:54.340149 00580000 ################################################################
2215 18:49:54.340312
2216 18:49:54.928538 00600000 ################################################################
2217 18:49:54.928725
2218 18:49:55.597181 00680000 ################################################################
2219 18:49:55.597697
2220 18:49:56.278622 00700000 ################################################################
2221 18:49:56.279144
2222 18:49:56.936684 00780000 ################################################################
2223 18:49:56.936941
2224 18:49:57.518410 00800000 ################################################################
2225 18:49:57.518574
2226 18:49:58.101204 00880000 ################################################################
2227 18:49:58.101366
2228 18:49:58.724525 00900000 ################################################################
2229 18:49:58.724708
2230 18:49:59.316563 00980000 ################################################################
2231 18:49:59.316738
2232 18:49:59.928204 00a00000 ################################################################
2233 18:49:59.928365
2234 18:50:00.540634 00a80000 ################################################################
2235 18:50:00.540794
2236 18:50:01.142315 00b00000 ################################################################
2237 18:50:01.142851
2238 18:50:01.494592 00b80000 #################################### done.
2239 18:50:01.494752
2240 18:50:01.498027 The bootfile was 12349440 bytes long.
2241 18:50:01.498127
2242 18:50:01.501603 Sending tftp read request... done.
2243 18:50:01.501697
2244 18:50:01.504459 Waiting for the transfer...
2245 18:50:01.504553
2246 18:50:02.156294 00000000 ################################################################
2247 18:50:02.156849
2248 18:50:02.845529 00080000 ################################################################
2249 18:50:02.846036
2250 18:50:03.517986 00100000 ################################################################
2251 18:50:03.518502
2252 18:50:04.191043 00180000 ################################################################
2253 18:50:04.191564
2254 18:50:04.872259 00200000 ################################################################
2255 18:50:04.872813
2256 18:50:05.582700 00280000 ################################################################
2257 18:50:05.583217
2258 18:50:06.267857 00300000 ################################################################
2259 18:50:06.268363
2260 18:50:06.954897 00380000 ################################################################
2261 18:50:06.955431
2262 18:50:07.628723 00400000 ################################################################
2263 18:50:07.629285
2264 18:50:08.307968 00480000 ################################################################
2265 18:50:08.308490
2266 18:50:08.983189 00500000 ################################################################
2267 18:50:08.983710
2268 18:50:09.658624 00580000 ################################################################
2269 18:50:09.659177
2270 18:50:09.800149 00600000 ############# done.
2271 18:50:09.800705
2272 18:50:09.803551 Sending tftp read request... done.
2273 18:50:09.803989
2274 18:50:09.806754 Waiting for the transfer...
2275 18:50:09.807196
2276 18:50:09.807640 00000000 # done.
2277 18:50:09.808068
2278 18:50:09.817018 Command line loaded dynamically from TFTP file: 12909587/tftp-deploy-jpbbrewi/kernel/cmdline
2279 18:50:09.817534
2280 18:50:09.843331 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12909587/extract-nfsrootfs-v9gzu7mf,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2281 18:50:09.847048
2282 18:50:09.850649 Shutting down all USB controllers.
2283 18:50:09.851186
2284 18:50:09.851731 Removing current net device
2285 18:50:09.852160
2286 18:50:09.853773 Finalizing coreboot
2287 18:50:09.854212
2288 18:50:09.860162 Exiting depthcharge with code 4 at timestamp: 34131505
2289 18:50:09.860750
2290 18:50:09.861197
2291 18:50:09.861618 Starting kernel ...
2292 18:50:09.862030
2293 18:50:09.862434
2294 18:50:09.863775 end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
2295 18:50:09.864339 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2296 18:50:09.864793 Setting prompt string to ['Linux version [0-9]']
2297 18:50:09.865230 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2298 18:50:09.865665 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2300 18:54:28.864577 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2302 18:54:28.864923 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2304 18:54:28.865207 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2307 18:54:28.865691 end: 2 depthcharge-action (duration 00:05:00) [common]
2309 18:54:28.865998 Cleaning after the job
2310 18:54:28.866137 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909587/tftp-deploy-jpbbrewi/ramdisk
2311 18:54:28.867239 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909587/tftp-deploy-jpbbrewi/kernel
2312 18:54:28.869222 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909587/tftp-deploy-jpbbrewi/nfsrootfs
2313 18:54:29.003928 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909587/tftp-deploy-jpbbrewi/modules
2314 18:54:29.004747 start: 4.1 power-off (timeout 00:00:30) [common]
2315 18:54:29.004957 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2316 18:54:29.085752 >> Command sent successfully.
2317 18:54:29.088903 Returned 0 in 0 seconds
2318 18:54:29.189322 end: 4.1 power-off (duration 00:00:00) [common]
2320 18:54:29.189716 start: 4.2 read-feedback (timeout 00:10:00) [common]
2321 18:54:29.190031 Listened to connection for namespace 'common' for up to 1s
2322 18:54:30.191191 Finalising connection for namespace 'common'
2323 18:54:30.191499 Disconnecting from shell: Finalise
2324 18:54:30.191685
2325 18:54:30.292381 end: 4.2 read-feedback (duration 00:00:01) [common]
2326 18:54:30.293008 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12909587
2327 18:54:30.857793 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12909587
2328 18:54:30.858016 JobError: Your job cannot terminate cleanly.