Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 18:49:49.497205 lava-dispatcher, installed at version: 2024.01
2 18:49:49.497446 start: 0 validate
3 18:49:49.497604 Start time: 2024-03-01 18:49:49.497590+00:00 (UTC)
4 18:49:49.497745 Using caching service: 'http://localhost/cache/?uri=%s'
5 18:49:49.497890 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 18:49:49.757548 Using caching service: 'http://localhost/cache/?uri=%s'
7 18:49:49.757821 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 18:49:49.759692 Using caching service: 'http://localhost/cache/?uri=%s'
9 18:49:49.759894 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 18:49:50.017353 Using caching service: 'http://localhost/cache/?uri=%s'
11 18:49:50.017544 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.306-cip107-254-gfeae08b50ac51%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 18:49:50.020136 validate duration: 0.52
14 18:49:50.020467 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 18:49:50.020574 start: 1.1 download-retry (timeout 00:10:00) [common]
16 18:49:50.020669 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 18:49:50.020809 Not decompressing ramdisk as can be used compressed.
18 18:49:50.020902 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20240129.0/amd64/initrd.cpio.gz
19 18:49:50.020972 saving as /var/lib/lava/dispatcher/tmp/12909589/tftp-deploy-wo5pn23h/ramdisk/initrd.cpio.gz
20 18:49:50.021042 total size: 5670327 (5 MB)
21 18:49:50.022262 progress 0 % (0 MB)
22 18:49:50.024110 progress 5 % (0 MB)
23 18:49:50.025923 progress 10 % (0 MB)
24 18:49:50.027528 progress 15 % (0 MB)
25 18:49:50.029323 progress 20 % (1 MB)
26 18:49:50.031130 progress 25 % (1 MB)
27 18:49:50.032755 progress 30 % (1 MB)
28 18:49:50.034520 progress 35 % (1 MB)
29 18:49:50.036281 progress 40 % (2 MB)
30 18:49:50.037843 progress 45 % (2 MB)
31 18:49:50.039585 progress 50 % (2 MB)
32 18:49:50.041370 progress 55 % (3 MB)
33 18:49:50.042933 progress 60 % (3 MB)
34 18:49:50.044696 progress 65 % (3 MB)
35 18:49:50.046469 progress 70 % (3 MB)
36 18:49:50.048038 progress 75 % (4 MB)
37 18:49:50.049799 progress 80 % (4 MB)
38 18:49:50.051607 progress 85 % (4 MB)
39 18:49:50.053205 progress 90 % (4 MB)
40 18:49:50.054952 progress 95 % (5 MB)
41 18:49:50.056730 progress 100 % (5 MB)
42 18:49:50.056852 5 MB downloaded in 0.04 s (151.01 MB/s)
43 18:49:50.057021 end: 1.1.1 http-download (duration 00:00:00) [common]
45 18:49:50.057288 end: 1.1 download-retry (duration 00:00:00) [common]
46 18:49:50.057384 start: 1.2 download-retry (timeout 00:10:00) [common]
47 18:49:50.057476 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 18:49:50.057609 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 18:49:50.057686 saving as /var/lib/lava/dispatcher/tmp/12909589/tftp-deploy-wo5pn23h/kernel/bzImage
50 18:49:50.057753 total size: 12349440 (11 MB)
51 18:49:50.057820 No compression specified
52 18:49:50.058973 progress 0 % (0 MB)
53 18:49:50.062534 progress 5 % (0 MB)
54 18:49:50.066192 progress 10 % (1 MB)
55 18:49:50.069864 progress 15 % (1 MB)
56 18:49:50.073536 progress 20 % (2 MB)
57 18:49:50.077228 progress 25 % (2 MB)
58 18:49:50.080896 progress 30 % (3 MB)
59 18:49:50.084396 progress 35 % (4 MB)
60 18:49:50.088077 progress 40 % (4 MB)
61 18:49:50.091762 progress 45 % (5 MB)
62 18:49:50.095453 progress 50 % (5 MB)
63 18:49:50.099166 progress 55 % (6 MB)
64 18:49:50.102862 progress 60 % (7 MB)
65 18:49:50.106381 progress 65 % (7 MB)
66 18:49:50.110117 progress 70 % (8 MB)
67 18:49:50.113744 progress 75 % (8 MB)
68 18:49:50.117417 progress 80 % (9 MB)
69 18:49:50.121043 progress 85 % (10 MB)
70 18:49:50.124657 progress 90 % (10 MB)
71 18:49:50.128263 progress 95 % (11 MB)
72 18:49:50.131682 progress 100 % (11 MB)
73 18:49:50.131946 11 MB downloaded in 0.07 s (158.75 MB/s)
74 18:49:50.132103 end: 1.2.1 http-download (duration 00:00:00) [common]
76 18:49:50.132369 end: 1.2 download-retry (duration 00:00:00) [common]
77 18:49:50.132468 start: 1.3 download-retry (timeout 00:10:00) [common]
78 18:49:50.132564 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 18:49:50.132695 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20240129.0/amd64/full.rootfs.tar.xz
80 18:49:50.132769 saving as /var/lib/lava/dispatcher/tmp/12909589/tftp-deploy-wo5pn23h/nfsrootfs/full.rootfs.tar
81 18:49:50.132835 total size: 127582724 (121 MB)
82 18:49:50.132903 Using unxz to decompress xz
83 18:49:50.137719 progress 0 % (0 MB)
84 18:49:50.714177 progress 5 % (6 MB)
85 18:49:51.268289 progress 10 % (12 MB)
86 18:49:51.833032 progress 15 % (18 MB)
87 18:49:52.414129 progress 20 % (24 MB)
88 18:49:52.854890 progress 25 % (30 MB)
89 18:49:53.207573 progress 30 % (36 MB)
90 18:49:53.533420 progress 35 % (42 MB)
91 18:49:53.714481 progress 40 % (48 MB)
92 18:49:54.142305 progress 45 % (54 MB)
93 18:49:54.559217 progress 50 % (60 MB)
94 18:49:54.957495 progress 55 % (66 MB)
95 18:49:55.360604 progress 60 % (73 MB)
96 18:49:55.742154 progress 65 % (79 MB)
97 18:49:56.169266 progress 70 % (85 MB)
98 18:49:56.632811 progress 75 % (91 MB)
99 18:49:57.107273 progress 80 % (97 MB)
100 18:49:57.230984 progress 85 % (103 MB)
101 18:49:57.401734 progress 90 % (109 MB)
102 18:49:57.780636 progress 95 % (115 MB)
103 18:49:58.201182 progress 100 % (121 MB)
104 18:49:58.207271 121 MB downloaded in 8.07 s (15.07 MB/s)
105 18:49:58.207553 end: 1.3.1 http-download (duration 00:00:08) [common]
107 18:49:58.207845 end: 1.3 download-retry (duration 00:00:08) [common]
108 18:49:58.207945 start: 1.4 download-retry (timeout 00:09:52) [common]
109 18:49:58.208043 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 18:49:58.208210 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.306-cip107-254-gfeae08b50ac51/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 18:49:58.208299 saving as /var/lib/lava/dispatcher/tmp/12909589/tftp-deploy-wo5pn23h/modules/modules.tar
112 18:49:58.208369 total size: 484604 (0 MB)
113 18:49:58.208440 Using unxz to decompress xz
114 18:49:58.476782 progress 6 % (0 MB)
115 18:49:58.477299 progress 13 % (0 MB)
116 18:49:58.477575 progress 20 % (0 MB)
117 18:49:58.479482 progress 27 % (0 MB)
118 18:49:58.481637 progress 33 % (0 MB)
119 18:49:58.483944 progress 40 % (0 MB)
120 18:49:58.486137 progress 47 % (0 MB)
121 18:49:58.488153 progress 54 % (0 MB)
122 18:49:58.490469 progress 60 % (0 MB)
123 18:49:58.492998 progress 67 % (0 MB)
124 18:49:58.495488 progress 74 % (0 MB)
125 18:49:58.497530 progress 81 % (0 MB)
126 18:49:58.499747 progress 87 % (0 MB)
127 18:49:58.502239 progress 94 % (0 MB)
128 18:49:58.504774 progress 100 % (0 MB)
129 18:49:58.511513 0 MB downloaded in 0.30 s (1.52 MB/s)
130 18:49:58.511777 end: 1.4.1 http-download (duration 00:00:00) [common]
132 18:49:58.512065 end: 1.4 download-retry (duration 00:00:00) [common]
133 18:49:58.512171 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 18:49:58.512286 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 18:50:01.787569 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12909589/extract-nfsrootfs-3lyxbsvw
136 18:50:01.787772 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 18:50:01.787879 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
138 18:50:01.788059 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic
139 18:50:01.788204 makedir: /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin
140 18:50:01.788322 makedir: /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/tests
141 18:50:01.788431 makedir: /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/results
142 18:50:01.788542 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-add-keys
143 18:50:01.788697 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-add-sources
144 18:50:01.788840 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-background-process-start
145 18:50:01.788982 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-background-process-stop
146 18:50:01.789120 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-common-functions
147 18:50:01.789258 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-echo-ipv4
148 18:50:01.789395 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-install-packages
149 18:50:01.789531 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-installed-packages
150 18:50:01.789669 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-os-build
151 18:50:01.789808 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-probe-channel
152 18:50:01.789943 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-probe-ip
153 18:50:01.790079 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-target-ip
154 18:50:01.790213 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-target-mac
155 18:50:01.790347 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-target-storage
156 18:50:01.790485 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-test-case
157 18:50:01.790625 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-test-event
158 18:50:01.790760 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-test-feedback
159 18:50:01.790894 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-test-raise
160 18:50:01.791028 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-test-reference
161 18:50:01.791165 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-test-runner
162 18:50:01.791302 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-test-set
163 18:50:01.791437 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-test-shell
164 18:50:01.791575 Updating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-install-packages (oe)
165 18:50:01.791742 Updating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/bin/lava-installed-packages (oe)
166 18:50:01.791876 Creating /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/environment
167 18:50:01.791980 LAVA metadata
168 18:50:01.792056 - LAVA_JOB_ID=12909589
169 18:50:01.792125 - LAVA_DISPATCHER_IP=192.168.201.1
170 18:50:01.792236 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
171 18:50:01.792313 skipped lava-vland-overlay
172 18:50:01.792393 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 18:50:01.792478 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
174 18:50:01.792542 skipped lava-multinode-overlay
175 18:50:01.792629 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 18:50:01.792713 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
177 18:50:01.792792 Loading test definitions
178 18:50:01.792885 start: 1.5.2.3.1 git-repo-action (timeout 00:09:48) [common]
179 18:50:01.792959 Using /lava-12909589 at stage 0
180 18:50:01.793062 Fetching tests from https://github.com/kernelci/test-definitions
181 18:50:01.793153 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/0/tests/0_ltp-mm'
182 18:50:04.773508 Running '/usr/bin/git checkout kernelci.org
183 18:50:04.942767 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
184 18:50:04.943737 uuid=12909589_1.5.2.3.1 testdef=None
185 18:50:04.943947 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
187 18:50:04.944252 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
188 18:50:04.945238 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 18:50:04.945496 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
191 18:50:04.946633 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 18:50:04.946893 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
194 18:50:04.948351 runner path: /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/0/tests/0_ltp-mm test_uuid 12909589_1.5.2.3.1
195 18:50:04.948451 SKIPFILE='skipfile-lkft.yaml'
196 18:50:04.948522 SKIP_INSTALL='true'
197 18:50:04.948589 TST_CMDFILES='mm'
198 18:50:04.948752 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 18:50:04.948979 Creating lava-test-runner.conf files
201 18:50:04.949049 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12909589/lava-overlay-h59k0hic/lava-12909589/0 for stage 0
202 18:50:04.949151 - 0_ltp-mm
203 18:50:04.949265 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
204 18:50:04.949365 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
205 18:50:13.356104 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 18:50:13.356300 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
207 18:50:13.356407 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 18:50:13.356555 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
209 18:50:13.356699 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
210 18:50:13.531428 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 18:50:13.531913 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
212 18:50:13.532042 extracting modules file /var/lib/lava/dispatcher/tmp/12909589/tftp-deploy-wo5pn23h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12909589/extract-nfsrootfs-3lyxbsvw
213 18:50:13.555664 extracting modules file /var/lib/lava/dispatcher/tmp/12909589/tftp-deploy-wo5pn23h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12909589/extract-overlay-ramdisk-ckhswkky/ramdisk
214 18:50:13.578989 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 18:50:13.579151 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
216 18:50:13.579253 [common] Applying overlay to NFS
217 18:50:13.579331 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12909589/compress-overlay-4ar17byy/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12909589/extract-nfsrootfs-3lyxbsvw
218 18:50:14.626497 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 18:50:14.626671 start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
220 18:50:14.626774 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 18:50:14.626869 start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
222 18:50:14.626960 Building ramdisk /var/lib/lava/dispatcher/tmp/12909589/extract-overlay-ramdisk-ckhswkky/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12909589/extract-overlay-ramdisk-ckhswkky/ramdisk
223 18:50:14.719851 >> 31364 blocks
224 18:50:15.405652 rename /var/lib/lava/dispatcher/tmp/12909589/extract-overlay-ramdisk-ckhswkky/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12909589/tftp-deploy-wo5pn23h/ramdisk/ramdisk.cpio.gz
225 18:50:15.406174 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 18:50:15.406319 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
227 18:50:15.406446 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
228 18:50:15.406550 No mkimage arch provided, not using FIT.
229 18:50:15.406660 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 18:50:15.406755 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 18:50:15.406898 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
232 18:50:15.407006 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
233 18:50:15.407112 No LXC device requested
234 18:50:15.407205 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 18:50:15.407308 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
236 18:50:15.407446 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 18:50:15.407574 Checking files for TFTP limit of 4294967296 bytes.
238 18:50:15.408094 end: 1 tftp-deploy (duration 00:00:25) [common]
239 18:50:15.408264 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 18:50:15.408393 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 18:50:15.408557 substitutions:
242 18:50:15.408644 - {DTB}: None
243 18:50:15.408739 - {INITRD}: 12909589/tftp-deploy-wo5pn23h/ramdisk/ramdisk.cpio.gz
244 18:50:15.408824 - {KERNEL}: 12909589/tftp-deploy-wo5pn23h/kernel/bzImage
245 18:50:15.408893 - {LAVA_MAC}: None
246 18:50:15.408983 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12909589/extract-nfsrootfs-3lyxbsvw
247 18:50:15.409092 - {NFS_SERVER_IP}: 192.168.201.1
248 18:50:15.409157 - {PRESEED_CONFIG}: None
249 18:50:15.409239 - {PRESEED_LOCAL}: None
250 18:50:15.409353 - {RAMDISK}: 12909589/tftp-deploy-wo5pn23h/ramdisk/ramdisk.cpio.gz
251 18:50:15.409449 - {ROOT_PART}: None
252 18:50:15.409560 - {ROOT}: None
253 18:50:15.409655 - {SERVER_IP}: 192.168.201.1
254 18:50:15.409757 - {TEE}: None
255 18:50:15.409862 Parsed boot commands:
256 18:50:15.409975 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 18:50:15.410253 Parsed boot commands: tftpboot 192.168.201.1 12909589/tftp-deploy-wo5pn23h/kernel/bzImage 12909589/tftp-deploy-wo5pn23h/kernel/cmdline 12909589/tftp-deploy-wo5pn23h/ramdisk/ramdisk.cpio.gz
258 18:50:15.410401 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 18:50:15.410552 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 18:50:15.410710 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 18:50:15.410862 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 18:50:15.410977 Not connected, no need to disconnect.
263 18:50:15.411120 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 18:50:15.411262 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 18:50:15.411369 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
266 18:50:15.416127 Setting prompt string to ['lava-test: # ']
267 18:50:15.416575 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 18:50:15.416736 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 18:50:15.416849 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 18:50:15.416960 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 18:50:15.417210 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
272 18:50:20.570796 >> Command sent successfully.
273 18:50:20.581720 Returned 0 in 5 seconds
274 18:50:20.682974 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 18:50:20.684452 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 18:50:20.684959 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 18:50:20.685426 Setting prompt string to 'Starting depthcharge on Helios...'
279 18:50:20.685789 Changing prompt to 'Starting depthcharge on Helios...'
280 18:50:20.686143 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
281 18:50:20.687351 [Enter `^Ec?' for help]
282 18:50:21.296172
283 18:50:21.296384
284 18:50:21.306466 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
285 18:50:21.309711 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
286 18:50:21.316734 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
287 18:50:21.319793 CPU: AES supported, TXT NOT supported, VT supported
288 18:50:21.326407 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
289 18:50:21.329776 PCH: device id 0284 (rev 00) is Cometlake-U Premium
290 18:50:21.336521 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
291 18:50:21.339999 VBOOT: Loading verstage.
292 18:50:21.343105 FMAP: Found "FLASH" version 1.1 at 0xc04000.
293 18:50:21.349983 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
294 18:50:21.353028 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
295 18:50:21.356712 CBFS @ c08000 size 3f8000
296 18:50:21.363107 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
297 18:50:21.410615 CBFS: Locating 'fallback/verstage'
298 18:50:21.411117 CBFS: Found @ offset 10fb80 size 1072c
299 18:50:21.411595
300 18:50:21.412111
301 18:50:21.412619 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
302 18:50:21.412945 Probing TPM: . done!
303 18:50:21.413336 TPM ready after 0 ms
304 18:50:21.413655 Connected to device vid:did:rid of 1ae0:0028:00
305 18:50:21.414970 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
306 18:50:21.417908 Initialized TPM device CR50 revision 0
307 18:50:21.463551 tlcl_send_startup: Startup return code is 0
308 18:50:21.463739 TPM: setup succeeded
309 18:50:21.476130 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
310 18:50:21.479842 Chrome EC: UHEPI supported
311 18:50:21.483126 Phase 1
312 18:50:21.486250 FMAP: area GBB found @ c05000 (12288 bytes)
313 18:50:21.493290 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
314 18:50:21.493399 Phase 2
315 18:50:21.496212 Phase 3
316 18:50:21.499584 FMAP: area GBB found @ c05000 (12288 bytes)
317 18:50:21.506757 VB2:vb2_report_dev_firmware() This is developer signed firmware
318 18:50:21.513358 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
319 18:50:21.516526 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
320 18:50:21.522905 VB2:vb2_verify_keyblock() Checking keyblock signature...
321 18:50:21.538644 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
322 18:50:21.541992 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
323 18:50:21.548381 VB2:vb2_verify_fw_preamble() Verifying preamble.
324 18:50:21.552990 Phase 4
325 18:50:21.556140 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
326 18:50:21.562486 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
327 18:50:21.741827 VB2:vb2_rsa_verify_digest() Digest check failed!
328 18:50:21.748839 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
329 18:50:21.748969 Saving nvdata
330 18:50:21.752080 Reboot requested (10020007)
331 18:50:21.755434 board_reset() called!
332 18:50:21.755585 full_reset() called!
333 18:50:26.263121
334 18:50:26.263289
335 18:50:26.272769 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
336 18:50:26.276144 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
337 18:50:26.282866 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
338 18:50:26.286308 CPU: AES supported, TXT NOT supported, VT supported
339 18:50:26.292859 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
340 18:50:26.296588 PCH: device id 0284 (rev 00) is Cometlake-U Premium
341 18:50:26.302927 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
342 18:50:26.306040 VBOOT: Loading verstage.
343 18:50:26.309466 FMAP: Found "FLASH" version 1.1 at 0xc04000.
344 18:50:26.316005 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
345 18:50:26.319233 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
346 18:50:26.322885 CBFS @ c08000 size 3f8000
347 18:50:26.329305 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
348 18:50:26.332789 CBFS: Locating 'fallback/verstage'
349 18:50:26.335977 CBFS: Found @ offset 10fb80 size 1072c
350 18:50:26.340010
351 18:50:26.340101
352 18:50:26.349834 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
353 18:50:26.364405 Probing TPM: . done!
354 18:50:26.367619 TPM ready after 0 ms
355 18:50:26.371177 Connected to device vid:did:rid of 1ae0:0028:00
356 18:50:26.380970 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
357 18:50:26.384478 Initialized TPM device CR50 revision 0
358 18:50:26.430240 tlcl_send_startup: Startup return code is 0
359 18:50:26.430354 TPM: setup succeeded
360 18:50:26.442888 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
361 18:50:26.447049 Chrome EC: UHEPI supported
362 18:50:26.449818 Phase 1
363 18:50:26.453524 FMAP: area GBB found @ c05000 (12288 bytes)
364 18:50:26.459647 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
365 18:50:26.466397 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
366 18:50:26.470322 Recovery requested (1009000e)
367 18:50:26.475371 Saving nvdata
368 18:50:26.482090 tlcl_extend: response is 0
369 18:50:26.490385 tlcl_extend: response is 0
370 18:50:26.497519 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
371 18:50:26.500730 CBFS @ c08000 size 3f8000
372 18:50:26.507609 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
373 18:50:26.511102 CBFS: Locating 'fallback/romstage'
374 18:50:26.514012 CBFS: Found @ offset 80 size 145fc
375 18:50:26.517761 Accumulated console time in verstage 98 ms
376 18:50:26.517864
377 18:50:26.517939
378 18:50:26.530409 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
379 18:50:26.537017 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
380 18:50:26.540958 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
381 18:50:26.544165 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
382 18:50:26.550745 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
383 18:50:26.553843 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
384 18:50:26.557126 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
385 18:50:26.560586 TCO_STS: 0000 0000
386 18:50:26.563541 GEN_PMCON: e0015238 00000200
387 18:50:26.566933 GBLRST_CAUSE: 00000000 00000000
388 18:50:26.567026 prev_sleep_state 5
389 18:50:26.570476 Boot Count incremented to 71174
390 18:50:26.577260 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 18:50:26.580389 CBFS @ c08000 size 3f8000
392 18:50:26.586802 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
393 18:50:26.586891 CBFS: Locating 'fspm.bin'
394 18:50:26.593413 CBFS: Found @ offset 5ffc0 size 71000
395 18:50:26.597341 Chrome EC: UHEPI supported
396 18:50:26.603804 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
397 18:50:26.607253 Probing TPM: done!
398 18:50:26.613661 Connected to device vid:did:rid of 1ae0:0028:00
399 18:50:26.623958 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
400 18:50:26.630006 Initialized TPM device CR50 revision 0
401 18:50:26.638667 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
402 18:50:26.645356 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
403 18:50:26.648574 MRC cache found, size 1948
404 18:50:26.651752 bootmode is set to: 2
405 18:50:26.654867 PRMRR disabled by config.
406 18:50:26.654990 SPD INDEX = 1
407 18:50:26.661923 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
408 18:50:26.665278 CBFS @ c08000 size 3f8000
409 18:50:26.671462 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
410 18:50:26.671560 CBFS: Locating 'spd.bin'
411 18:50:26.675277 CBFS: Found @ offset 5fb80 size 400
412 18:50:26.678814 SPD: module type is LPDDR3
413 18:50:26.681962 SPD: module part is
414 18:50:26.688539 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
415 18:50:26.691695 SPD: device width 4 bits, bus width 8 bits
416 18:50:26.694938 SPD: module size is 4096 MB (per channel)
417 18:50:26.698177 memory slot: 0 configuration done.
418 18:50:26.701297 memory slot: 2 configuration done.
419 18:50:26.752523 CBMEM:
420 18:50:26.756278 IMD: root @ 99fff000 254 entries.
421 18:50:26.759088 IMD: root @ 99ffec00 62 entries.
422 18:50:26.762577 External stage cache:
423 18:50:26.766088 IMD: root @ 9abff000 254 entries.
424 18:50:26.769367 IMD: root @ 9abfec00 62 entries.
425 18:50:26.772602 Chrome EC: clear events_b mask to 0x0000000020004000
426 18:50:26.788726 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
427 18:50:26.801915 tlcl_write: response is 0
428 18:50:26.810889 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
429 18:50:26.817417 MRC: TPM MRC hash updated successfully.
430 18:50:26.817514 2 DIMMs found
431 18:50:26.821385 SMM Memory Map
432 18:50:26.824467 SMRAM : 0x9a000000 0x1000000
433 18:50:26.827719 Subregion 0: 0x9a000000 0xa00000
434 18:50:26.831022 Subregion 1: 0x9aa00000 0x200000
435 18:50:26.834311 Subregion 2: 0x9ac00000 0x400000
436 18:50:26.837451 top_of_ram = 0x9a000000
437 18:50:26.840779 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
438 18:50:26.847653 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
439 18:50:26.850686 MTRR Range: Start=ff000000 End=0 (Size 1000000)
440 18:50:26.857449 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 18:50:26.861002 CBFS @ c08000 size 3f8000
442 18:50:26.863851 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 18:50:26.867454 CBFS: Locating 'fallback/postcar'
444 18:50:26.870700 CBFS: Found @ offset 107000 size 4b44
445 18:50:26.877239 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
446 18:50:26.890076 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
447 18:50:26.892816 Processing 180 relocs. Offset value of 0x97c0c000
448 18:50:26.901423 Accumulated console time in romstage 285 ms
449 18:50:26.901517
450 18:50:26.901591
451 18:50:26.911526 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
452 18:50:26.918070 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
453 18:50:26.921288 CBFS @ c08000 size 3f8000
454 18:50:26.924520 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
455 18:50:26.931223 CBFS: Locating 'fallback/ramstage'
456 18:50:26.934494 CBFS: Found @ offset 43380 size 1b9e8
457 18:50:26.941191 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
458 18:50:26.973063 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
459 18:50:26.976272 Processing 3976 relocs. Offset value of 0x98db0000
460 18:50:26.982845 Accumulated console time in postcar 52 ms
461 18:50:26.982940
462 18:50:26.983014
463 18:50:26.993064 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
464 18:50:26.999896 FMAP: area RO_VPD found @ c00000 (16384 bytes)
465 18:50:27.002999 WARNING: RO_VPD is uninitialized or empty.
466 18:50:27.006439 FMAP: area RW_VPD found @ af8000 (8192 bytes)
467 18:50:27.013151 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 18:50:27.013246 Normal boot.
469 18:50:27.019589 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
470 18:50:27.023227 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 18:50:27.026643 CBFS @ c08000 size 3f8000
472 18:50:27.033314 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 18:50:27.036471 CBFS: Locating 'cpu_microcode_blob.bin'
474 18:50:27.039590 CBFS: Found @ offset 14700 size 2ec00
475 18:50:27.043007 microcode: sig=0x806ec pf=0x4 revision=0xc9
476 18:50:27.046130 Skip microcode update
477 18:50:27.049987 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
478 18:50:27.052657 CBFS @ c08000 size 3f8000
479 18:50:27.059476 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
480 18:50:27.062835 CBFS: Locating 'fsps.bin'
481 18:50:27.066176 CBFS: Found @ offset d1fc0 size 35000
482 18:50:27.090928 Detected 4 core, 8 thread CPU.
483 18:50:27.094267 Setting up SMI for CPU
484 18:50:27.098022 IED base = 0x9ac00000
485 18:50:27.098115 IED size = 0x00400000
486 18:50:27.101242 Will perform SMM setup.
487 18:50:27.107817 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
488 18:50:27.114628 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
489 18:50:27.118143 Processing 16 relocs. Offset value of 0x00030000
490 18:50:27.121092 Attempting to start 7 APs
491 18:50:27.124528 Waiting for 10ms after sending INIT.
492 18:50:27.141431 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
493 18:50:27.141539 done.
494 18:50:27.144473 AP: slot 7 apic_id 6.
495 18:50:27.147714 AP: slot 6 apic_id 7.
496 18:50:27.151350 Waiting for 2nd SIPI to complete...done.
497 18:50:27.154149 AP: slot 4 apic_id 4.
498 18:50:27.154240 AP: slot 5 apic_id 5.
499 18:50:27.157877 AP: slot 2 apic_id 2.
500 18:50:27.161120 AP: slot 1 apic_id 3.
501 18:50:27.167456 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
502 18:50:27.170867 Processing 13 relocs. Offset value of 0x00038000
503 18:50:27.177470 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
504 18:50:27.184373 Installing SMM handler to 0x9a000000
505 18:50:27.190948 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
506 18:50:27.194111 Processing 658 relocs. Offset value of 0x9a010000
507 18:50:27.204060 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
508 18:50:27.207427 Processing 13 relocs. Offset value of 0x9a008000
509 18:50:27.214281 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
510 18:50:27.220401 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
511 18:50:27.223659 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
512 18:50:27.230425 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
513 18:50:27.237156 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
514 18:50:27.243764 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
515 18:50:27.247294 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
516 18:50:27.253358 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
517 18:50:27.257030 Clearing SMI status registers
518 18:50:27.260192 SMI_STS: PM1
519 18:50:27.260292 PM1_STS: PWRBTN
520 18:50:27.263820 TCO_STS: SECOND_TO
521 18:50:27.267063 New SMBASE 0x9a000000
522 18:50:27.270778 In relocation handler: CPU 0
523 18:50:27.273924 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
524 18:50:27.276817 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 18:50:27.280601 Relocation complete.
526 18:50:27.283979 New SMBASE 0x99fff400
527 18:50:27.284072 In relocation handler: CPU 3
528 18:50:27.290420 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
529 18:50:27.293866 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 18:50:27.296886 Relocation complete.
531 18:50:27.296980 New SMBASE 0x99ffe800
532 18:50:27.300684 In relocation handler: CPU 6
533 18:50:27.307160 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
534 18:50:27.310617 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 18:50:27.314132 Relocation complete.
536 18:50:27.314225 New SMBASE 0x99ffe400
537 18:50:27.317126 In relocation handler: CPU 7
538 18:50:27.320912 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
539 18:50:27.327249 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 18:50:27.330494 Relocation complete.
541 18:50:27.330587 New SMBASE 0x99fffc00
542 18:50:27.334111 In relocation handler: CPU 1
543 18:50:27.337517 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
544 18:50:27.344089 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 18:50:27.344233 Relocation complete.
546 18:50:27.347019 New SMBASE 0x99fff800
547 18:50:27.350434 In relocation handler: CPU 2
548 18:50:27.353594 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
549 18:50:27.360270 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 18:50:27.360396 Relocation complete.
551 18:50:27.363455 New SMBASE 0x99fff000
552 18:50:27.367230 In relocation handler: CPU 4
553 18:50:27.370916 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
554 18:50:27.376957 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 18:50:27.377156 Relocation complete.
556 18:50:27.380379 New SMBASE 0x99ffec00
557 18:50:27.383498 In relocation handler: CPU 5
558 18:50:27.386931 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
559 18:50:27.393514 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 18:50:27.393633 Relocation complete.
561 18:50:27.396909 Initializing CPU #0
562 18:50:27.400559 CPU: vendor Intel device 806ec
563 18:50:27.403962 CPU: family 06, model 8e, stepping 0c
564 18:50:27.406950 Clearing out pending MCEs
565 18:50:27.409968 Setting up local APIC...
566 18:50:27.410118 apic_id: 0x00 done.
567 18:50:27.413514 Turbo is available but hidden
568 18:50:27.416810 Turbo is available and visible
569 18:50:27.420378 VMX status: enabled
570 18:50:27.423488 IA32_FEATURE_CONTROL status: locked
571 18:50:27.423620 Skip microcode update
572 18:50:27.426838 CPU #0 initialized
573 18:50:27.430535 Initializing CPU #3
574 18:50:27.430662 Initializing CPU #5
575 18:50:27.433887 Initializing CPU #4
576 18:50:27.437203 CPU: vendor Intel device 806ec
577 18:50:27.440830 CPU: family 06, model 8e, stepping 0c
578 18:50:27.443341 CPU: vendor Intel device 806ec
579 18:50:27.447330 CPU: family 06, model 8e, stepping 0c
580 18:50:27.450478 Clearing out pending MCEs
581 18:50:27.450609 Initializing CPU #7
582 18:50:27.453483 Initializing CPU #6
583 18:50:27.456812 CPU: vendor Intel device 806ec
584 18:50:27.459962 CPU: family 06, model 8e, stepping 0c
585 18:50:27.463846 CPU: vendor Intel device 806ec
586 18:50:27.466909 CPU: family 06, model 8e, stepping 0c
587 18:50:27.470149 Clearing out pending MCEs
588 18:50:27.473570 Clearing out pending MCEs
589 18:50:27.476624 Setting up local APIC...
590 18:50:27.476707 Setting up local APIC...
591 18:50:27.480034 Initializing CPU #1
592 18:50:27.483160 Initializing CPU #2
593 18:50:27.486665 CPU: vendor Intel device 806ec
594 18:50:27.490387 CPU: family 06, model 8e, stepping 0c
595 18:50:27.493734 CPU: vendor Intel device 806ec
596 18:50:27.496759 CPU: family 06, model 8e, stepping 0c
597 18:50:27.499980 Clearing out pending MCEs
598 18:50:27.500078 Clearing out pending MCEs
599 18:50:27.503185 Setting up local APIC...
600 18:50:27.507024 apic_id: 0x01 done.
601 18:50:27.509616 Setting up local APIC...
602 18:50:27.509701 VMX status: enabled
603 18:50:27.513183 apic_id: 0x06 done.
604 18:50:27.513270 apic_id: 0x07 done.
605 18:50:27.516879 VMX status: enabled
606 18:50:27.520310 VMX status: enabled
607 18:50:27.523226 IA32_FEATURE_CONTROL status: locked
608 18:50:27.526734 IA32_FEATURE_CONTROL status: locked
609 18:50:27.529810 Skip microcode update
610 18:50:27.529927 Skip microcode update
611 18:50:27.532947 CPU #7 initialized
612 18:50:27.533066 CPU #6 initialized
613 18:50:27.536936 apic_id: 0x03 done.
614 18:50:27.539569 Setting up local APIC...
615 18:50:27.542825 Clearing out pending MCEs
616 18:50:27.546223 CPU: vendor Intel device 806ec
617 18:50:27.549364 CPU: family 06, model 8e, stepping 0c
618 18:50:27.549522 Setting up local APIC...
619 18:50:27.556172 IA32_FEATURE_CONTROL status: locked
620 18:50:27.556310 VMX status: enabled
621 18:50:27.559367 apic_id: 0x02 done.
622 18:50:27.562623 IA32_FEATURE_CONTROL status: locked
623 18:50:27.562722 VMX status: enabled
624 18:50:27.566049 Skip microcode update
625 18:50:27.569664 IA32_FEATURE_CONTROL status: locked
626 18:50:27.572620 CPU #1 initialized
627 18:50:27.576026 Skip microcode update
628 18:50:27.576110 apic_id: 0x05 done.
629 18:50:27.579130 Clearing out pending MCEs
630 18:50:27.583011 VMX status: enabled
631 18:50:27.583097 Skip microcode update
632 18:50:27.585765 CPU #2 initialized
633 18:50:27.589391 Setting up local APIC...
634 18:50:27.589482 CPU #3 initialized
635 18:50:27.592733 IA32_FEATURE_CONTROL status: locked
636 18:50:27.595756 apic_id: 0x04 done.
637 18:50:27.599420 Skip microcode update
638 18:50:27.599549 VMX status: enabled
639 18:50:27.602469 CPU #5 initialized
640 18:50:27.605946 IA32_FEATURE_CONTROL status: locked
641 18:50:27.609196 Skip microcode update
642 18:50:27.609362 CPU #4 initialized
643 18:50:27.613097 bsp_do_flight_plan done after 461 msecs.
644 18:50:27.615650 CPU: frequency set to 4200 MHz
645 18:50:27.619197 Enabling SMIs.
646 18:50:27.619384 Locking SMM.
647 18:50:27.634918 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
648 18:50:27.638285 CBFS @ c08000 size 3f8000
649 18:50:27.644795 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
650 18:50:27.645172 CBFS: Locating 'vbt.bin'
651 18:50:27.648311 CBFS: Found @ offset 5f5c0 size 499
652 18:50:27.655103 Found a VBT of 4608 bytes after decompression
653 18:50:27.837698 Display FSP Version Info HOB
654 18:50:27.841037 Reference Code - CPU = 9.0.1e.30
655 18:50:27.844670 uCode Version = 0.0.0.ca
656 18:50:27.847823 TXT ACM version = ff.ff.ff.ffff
657 18:50:27.851059 Display FSP Version Info HOB
658 18:50:27.854114 Reference Code - ME = 9.0.1e.30
659 18:50:27.857717 MEBx version = 0.0.0.0
660 18:50:27.860866 ME Firmware Version = Consumer SKU
661 18:50:27.864372 Display FSP Version Info HOB
662 18:50:27.867921 Reference Code - CML PCH = 9.0.1e.30
663 18:50:27.868604 PCH-CRID Status = Disabled
664 18:50:27.874347 PCH-CRID Original Value = ff.ff.ff.ffff
665 18:50:27.877973 PCH-CRID New Value = ff.ff.ff.ffff
666 18:50:27.881093 OPROM - RST - RAID = ff.ff.ff.ffff
667 18:50:27.884757 ChipsetInit Base Version = ff.ff.ff.ffff
668 18:50:27.887408 ChipsetInit Oem Version = ff.ff.ff.ffff
669 18:50:27.891335 Display FSP Version Info HOB
670 18:50:27.894230 Reference Code - SA - System Agent = 9.0.1e.30
671 18:50:27.897604 Reference Code - MRC = 0.7.1.6c
672 18:50:27.900684 SA - PCIe Version = 9.0.1e.30
673 18:50:27.904461 SA-CRID Status = Disabled
674 18:50:27.907609 SA-CRID Original Value = 0.0.0.c
675 18:50:27.911001 SA-CRID New Value = 0.0.0.c
676 18:50:27.914430 OPROM - VBIOS = ff.ff.ff.ffff
677 18:50:27.914870 RTC Init
678 18:50:27.921615 Set power on after power failure.
679 18:50:27.922116 Disabling Deep S3
680 18:50:27.924290 Disabling Deep S3
681 18:50:27.924746 Disabling Deep S4
682 18:50:27.928004 Disabling Deep S4
683 18:50:27.928631 Disabling Deep S5
684 18:50:27.931054 Disabling Deep S5
685 18:50:27.938420 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
686 18:50:27.938847 Enumerating buses...
687 18:50:27.944767 Show all devs... Before device enumeration.
688 18:50:27.945189 Root Device: enabled 1
689 18:50:27.947675 CPU_CLUSTER: 0: enabled 1
690 18:50:27.950923 DOMAIN: 0000: enabled 1
691 18:50:27.951421 APIC: 00: enabled 1
692 18:50:27.954197 PCI: 00:00.0: enabled 1
693 18:50:27.957710 PCI: 00:02.0: enabled 1
694 18:50:27.961074 PCI: 00:04.0: enabled 0
695 18:50:27.961563 PCI: 00:05.0: enabled 0
696 18:50:27.964400 PCI: 00:12.0: enabled 1
697 18:50:27.968039 PCI: 00:12.5: enabled 0
698 18:50:27.970902 PCI: 00:12.6: enabled 0
699 18:50:27.971679 PCI: 00:14.0: enabled 1
700 18:50:27.973929 PCI: 00:14.1: enabled 0
701 18:50:27.977398 PCI: 00:14.3: enabled 1
702 18:50:27.981020 PCI: 00:14.5: enabled 0
703 18:50:27.981500 PCI: 00:15.0: enabled 1
704 18:50:27.984043 PCI: 00:15.1: enabled 1
705 18:50:27.987788 PCI: 00:15.2: enabled 0
706 18:50:27.988398 PCI: 00:15.3: enabled 0
707 18:50:27.990712 PCI: 00:16.0: enabled 1
708 18:50:27.994290 PCI: 00:16.1: enabled 0
709 18:50:27.997635 PCI: 00:16.2: enabled 0
710 18:50:27.998047 PCI: 00:16.3: enabled 0
711 18:50:28.001446 PCI: 00:16.4: enabled 0
712 18:50:28.004126 PCI: 00:16.5: enabled 0
713 18:50:28.008109 PCI: 00:17.0: enabled 1
714 18:50:28.008624 PCI: 00:19.0: enabled 1
715 18:50:28.011096 PCI: 00:19.1: enabled 0
716 18:50:28.014287 PCI: 00:19.2: enabled 0
717 18:50:28.014743 PCI: 00:1a.0: enabled 0
718 18:50:28.017730 PCI: 00:1c.0: enabled 0
719 18:50:28.020984 PCI: 00:1c.1: enabled 0
720 18:50:28.024099 PCI: 00:1c.2: enabled 0
721 18:50:28.024716 PCI: 00:1c.3: enabled 0
722 18:50:28.028029 PCI: 00:1c.4: enabled 0
723 18:50:28.031352 PCI: 00:1c.5: enabled 0
724 18:50:28.034668 PCI: 00:1c.6: enabled 0
725 18:50:28.035154 PCI: 00:1c.7: enabled 0
726 18:50:28.037887 PCI: 00:1d.0: enabled 1
727 18:50:28.040920 PCI: 00:1d.1: enabled 0
728 18:50:28.041342 PCI: 00:1d.2: enabled 0
729 18:50:28.044370 PCI: 00:1d.3: enabled 0
730 18:50:28.047573 PCI: 00:1d.4: enabled 0
731 18:50:28.051480 PCI: 00:1d.5: enabled 1
732 18:50:28.051947 PCI: 00:1e.0: enabled 1
733 18:50:28.054064 PCI: 00:1e.1: enabled 0
734 18:50:28.057828 PCI: 00:1e.2: enabled 1
735 18:50:28.060921 PCI: 00:1e.3: enabled 1
736 18:50:28.061445 PCI: 00:1f.0: enabled 1
737 18:50:28.064421 PCI: 00:1f.1: enabled 1
738 18:50:28.067366 PCI: 00:1f.2: enabled 1
739 18:50:28.071483 PCI: 00:1f.3: enabled 1
740 18:50:28.071923 PCI: 00:1f.4: enabled 1
741 18:50:28.074287 PCI: 00:1f.5: enabled 1
742 18:50:28.077637 PCI: 00:1f.6: enabled 0
743 18:50:28.078059 USB0 port 0: enabled 1
744 18:50:28.080668 I2C: 00:15: enabled 1
745 18:50:28.083855 I2C: 00:5d: enabled 1
746 18:50:28.087296 GENERIC: 0.0: enabled 1
747 18:50:28.087727 I2C: 00:1a: enabled 1
748 18:50:28.090642 I2C: 00:38: enabled 1
749 18:50:28.093911 I2C: 00:39: enabled 1
750 18:50:28.094334 I2C: 00:3a: enabled 1
751 18:50:28.097341 I2C: 00:3b: enabled 1
752 18:50:28.100680 PCI: 00:00.0: enabled 1
753 18:50:28.101106 SPI: 00: enabled 1
754 18:50:28.104356 SPI: 01: enabled 1
755 18:50:28.104783 PNP: 0c09.0: enabled 1
756 18:50:28.107550 USB2 port 0: enabled 1
757 18:50:28.110805 USB2 port 1: enabled 1
758 18:50:28.113921 USB2 port 2: enabled 0
759 18:50:28.114349 USB2 port 3: enabled 0
760 18:50:28.117766 USB2 port 5: enabled 0
761 18:50:28.120414 USB2 port 6: enabled 1
762 18:50:28.120850 USB2 port 9: enabled 1
763 18:50:28.124319 USB3 port 0: enabled 1
764 18:50:28.127313 USB3 port 1: enabled 1
765 18:50:28.127842 USB3 port 2: enabled 1
766 18:50:28.130799 USB3 port 3: enabled 1
767 18:50:28.134265 USB3 port 4: enabled 0
768 18:50:28.134709 APIC: 03: enabled 1
769 18:50:28.137372 APIC: 02: enabled 1
770 18:50:28.140720 APIC: 01: enabled 1
771 18:50:28.141312 APIC: 04: enabled 1
772 18:50:28.144581 APIC: 05: enabled 1
773 18:50:28.147534 APIC: 07: enabled 1
774 18:50:28.148141 APIC: 06: enabled 1
775 18:50:28.150871 Compare with tree...
776 18:50:28.154317 Root Device: enabled 1
777 18:50:28.154895 CPU_CLUSTER: 0: enabled 1
778 18:50:28.157395 APIC: 00: enabled 1
779 18:50:28.160874 APIC: 03: enabled 1
780 18:50:28.161464 APIC: 02: enabled 1
781 18:50:28.163974 APIC: 01: enabled 1
782 18:50:28.167202 APIC: 04: enabled 1
783 18:50:28.167646 APIC: 05: enabled 1
784 18:50:28.170734 APIC: 07: enabled 1
785 18:50:28.173955 APIC: 06: enabled 1
786 18:50:28.174546 DOMAIN: 0000: enabled 1
787 18:50:28.177277 PCI: 00:00.0: enabled 1
788 18:50:28.180657 PCI: 00:02.0: enabled 1
789 18:50:28.184222 PCI: 00:04.0: enabled 0
790 18:50:28.187236 PCI: 00:05.0: enabled 0
791 18:50:28.187784 PCI: 00:12.0: enabled 1
792 18:50:28.190434 PCI: 00:12.5: enabled 0
793 18:50:28.193906 PCI: 00:12.6: enabled 0
794 18:50:28.196973 PCI: 00:14.0: enabled 1
795 18:50:28.200553 USB0 port 0: enabled 1
796 18:50:28.201040 USB2 port 0: enabled 1
797 18:50:28.203870 USB2 port 1: enabled 1
798 18:50:28.206993 USB2 port 2: enabled 0
799 18:50:28.210299 USB2 port 3: enabled 0
800 18:50:28.213582 USB2 port 5: enabled 0
801 18:50:28.217070 USB2 port 6: enabled 1
802 18:50:28.217574 USB2 port 9: enabled 1
803 18:50:28.220295 USB3 port 0: enabled 1
804 18:50:28.223613 USB3 port 1: enabled 1
805 18:50:28.226760 USB3 port 2: enabled 1
806 18:50:28.230414 USB3 port 3: enabled 1
807 18:50:28.233543 USB3 port 4: enabled 0
808 18:50:28.234024 PCI: 00:14.1: enabled 0
809 18:50:28.236832 PCI: 00:14.3: enabled 1
810 18:50:28.240092 PCI: 00:14.5: enabled 0
811 18:50:28.243176 PCI: 00:15.0: enabled 1
812 18:50:28.243710 I2C: 00:15: enabled 1
813 18:50:28.246624 PCI: 00:15.1: enabled 1
814 18:50:28.250438 I2C: 00:5d: enabled 1
815 18:50:28.253856 GENERIC: 0.0: enabled 1
816 18:50:28.256648 PCI: 00:15.2: enabled 0
817 18:50:28.257151 PCI: 00:15.3: enabled 0
818 18:50:28.260555 PCI: 00:16.0: enabled 1
819 18:50:28.263519 PCI: 00:16.1: enabled 0
820 18:50:28.266830 PCI: 00:16.2: enabled 0
821 18:50:28.270112 PCI: 00:16.3: enabled 0
822 18:50:28.270623 PCI: 00:16.4: enabled 0
823 18:50:28.273512 PCI: 00:16.5: enabled 0
824 18:50:28.276525 PCI: 00:17.0: enabled 1
825 18:50:28.280127 PCI: 00:19.0: enabled 1
826 18:50:28.280797 I2C: 00:1a: enabled 1
827 18:50:28.283417 I2C: 00:38: enabled 1
828 18:50:28.286592 I2C: 00:39: enabled 1
829 18:50:28.290011 I2C: 00:3a: enabled 1
830 18:50:28.290445 I2C: 00:3b: enabled 1
831 18:50:28.293355 PCI: 00:19.1: enabled 0
832 18:50:28.296446 PCI: 00:19.2: enabled 0
833 18:50:28.300169 PCI: 00:1a.0: enabled 0
834 18:50:28.303150 PCI: 00:1c.0: enabled 0
835 18:50:28.303621 PCI: 00:1c.1: enabled 0
836 18:50:28.306610 PCI: 00:1c.2: enabled 0
837 18:50:28.310156 PCI: 00:1c.3: enabled 0
838 18:50:28.313630 PCI: 00:1c.4: enabled 0
839 18:50:28.316948 PCI: 00:1c.5: enabled 0
840 18:50:28.317386 PCI: 00:1c.6: enabled 0
841 18:50:28.320228 PCI: 00:1c.7: enabled 0
842 18:50:28.323273 PCI: 00:1d.0: enabled 1
843 18:50:28.326562 PCI: 00:1d.1: enabled 0
844 18:50:28.329916 PCI: 00:1d.2: enabled 0
845 18:50:28.330350 PCI: 00:1d.3: enabled 0
846 18:50:28.333206 PCI: 00:1d.4: enabled 0
847 18:50:28.336723 PCI: 00:1d.5: enabled 1
848 18:50:28.340137 PCI: 00:00.0: enabled 1
849 18:50:28.343489 PCI: 00:1e.0: enabled 1
850 18:50:28.343934 PCI: 00:1e.1: enabled 0
851 18:50:28.346357 PCI: 00:1e.2: enabled 1
852 18:50:28.349762 SPI: 00: enabled 1
853 18:50:28.353369 PCI: 00:1e.3: enabled 1
854 18:50:28.354009 SPI: 01: enabled 1
855 18:50:28.356671 PCI: 00:1f.0: enabled 1
856 18:50:28.359646 PNP: 0c09.0: enabled 1
857 18:50:28.363193 PCI: 00:1f.1: enabled 1
858 18:50:28.363755 PCI: 00:1f.2: enabled 1
859 18:50:28.366175 PCI: 00:1f.3: enabled 1
860 18:50:28.370169 PCI: 00:1f.4: enabled 1
861 18:50:28.373440 PCI: 00:1f.5: enabled 1
862 18:50:28.376343 PCI: 00:1f.6: enabled 0
863 18:50:28.376440 Root Device scanning...
864 18:50:28.379606 scan_static_bus for Root Device
865 18:50:28.383100 CPU_CLUSTER: 0 enabled
866 18:50:28.386035 DOMAIN: 0000 enabled
867 18:50:28.389286 DOMAIN: 0000 scanning...
868 18:50:28.389385 PCI: pci_scan_bus for bus 00
869 18:50:28.393016 PCI: 00:00.0 [8086/0000] ops
870 18:50:28.396221 PCI: 00:00.0 [8086/9b61] enabled
871 18:50:28.399909 PCI: 00:02.0 [8086/0000] bus ops
872 18:50:28.402645 PCI: 00:02.0 [8086/9b41] enabled
873 18:50:28.405845 PCI: 00:04.0 [8086/1903] disabled
874 18:50:28.409779 PCI: 00:08.0 [8086/1911] enabled
875 18:50:28.412781 PCI: 00:12.0 [8086/02f9] enabled
876 18:50:28.416115 PCI: 00:14.0 [8086/0000] bus ops
877 18:50:28.419399 PCI: 00:14.0 [8086/02ed] enabled
878 18:50:28.422872 PCI: 00:14.2 [8086/02ef] enabled
879 18:50:28.426012 PCI: 00:14.3 [8086/02f0] enabled
880 18:50:28.429487 PCI: 00:15.0 [8086/0000] bus ops
881 18:50:28.432487 PCI: 00:15.0 [8086/02e8] enabled
882 18:50:28.436181 PCI: 00:15.1 [8086/0000] bus ops
883 18:50:28.439227 PCI: 00:15.1 [8086/02e9] enabled
884 18:50:28.442874 PCI: 00:16.0 [8086/0000] ops
885 18:50:28.446049 PCI: 00:16.0 [8086/02e0] enabled
886 18:50:28.449368 PCI: 00:17.0 [8086/0000] ops
887 18:50:28.453113 PCI: 00:17.0 [8086/02d3] enabled
888 18:50:28.455732 PCI: 00:19.0 [8086/0000] bus ops
889 18:50:28.459241 PCI: 00:19.0 [8086/02c5] enabled
890 18:50:28.462594 PCI: 00:1d.0 [8086/0000] bus ops
891 18:50:28.465701 PCI: 00:1d.0 [8086/02b0] enabled
892 18:50:28.473029 PCI: Static device PCI: 00:1d.5 not found, disabling it.
893 18:50:28.475669 PCI: 00:1e.0 [8086/0000] ops
894 18:50:28.479411 PCI: 00:1e.0 [8086/02a8] enabled
895 18:50:28.482776 PCI: 00:1e.2 [8086/0000] bus ops
896 18:50:28.486025 PCI: 00:1e.2 [8086/02aa] enabled
897 18:50:28.489301 PCI: 00:1e.3 [8086/0000] bus ops
898 18:50:28.492516 PCI: 00:1e.3 [8086/02ab] enabled
899 18:50:28.495575 PCI: 00:1f.0 [8086/0000] bus ops
900 18:50:28.499521 PCI: 00:1f.0 [8086/0284] enabled
901 18:50:28.502835 PCI: Static device PCI: 00:1f.1 not found, disabling it.
902 18:50:28.508948 PCI: Static device PCI: 00:1f.2 not found, disabling it.
903 18:50:28.512201 PCI: 00:1f.3 [8086/0000] bus ops
904 18:50:28.516015 PCI: 00:1f.3 [8086/02c8] enabled
905 18:50:28.519143 PCI: 00:1f.4 [8086/0000] bus ops
906 18:50:28.522299 PCI: 00:1f.4 [8086/02a3] enabled
907 18:50:28.526019 PCI: 00:1f.5 [8086/0000] bus ops
908 18:50:28.529344 PCI: 00:1f.5 [8086/02a4] enabled
909 18:50:28.532216 PCI: Leftover static devices:
910 18:50:28.535838 PCI: 00:05.0
911 18:50:28.535931 PCI: 00:12.5
912 18:50:28.536012 PCI: 00:12.6
913 18:50:28.538970 PCI: 00:14.1
914 18:50:28.539062 PCI: 00:14.5
915 18:50:28.542620 PCI: 00:15.2
916 18:50:28.542721 PCI: 00:15.3
917 18:50:28.542794 PCI: 00:16.1
918 18:50:28.545634 PCI: 00:16.2
919 18:50:28.545739 PCI: 00:16.3
920 18:50:28.548822 PCI: 00:16.4
921 18:50:28.548922 PCI: 00:16.5
922 18:50:28.548996 PCI: 00:19.1
923 18:50:28.551994 PCI: 00:19.2
924 18:50:28.552086 PCI: 00:1a.0
925 18:50:28.555292 PCI: 00:1c.0
926 18:50:28.555383 PCI: 00:1c.1
927 18:50:28.558516 PCI: 00:1c.2
928 18:50:28.558608 PCI: 00:1c.3
929 18:50:28.558680 PCI: 00:1c.4
930 18:50:28.562367 PCI: 00:1c.5
931 18:50:28.562464 PCI: 00:1c.6
932 18:50:28.565727 PCI: 00:1c.7
933 18:50:28.565811 PCI: 00:1d.1
934 18:50:28.565881 PCI: 00:1d.2
935 18:50:28.568425 PCI: 00:1d.3
936 18:50:28.568508 PCI: 00:1d.4
937 18:50:28.571961 PCI: 00:1d.5
938 18:50:28.572047 PCI: 00:1e.1
939 18:50:28.572118 PCI: 00:1f.1
940 18:50:28.575232 PCI: 00:1f.2
941 18:50:28.575325 PCI: 00:1f.6
942 18:50:28.578467 PCI: Check your devicetree.cb.
943 18:50:28.581903 PCI: 00:02.0 scanning...
944 18:50:28.585197 scan_generic_bus for PCI: 00:02.0
945 18:50:28.588427 scan_generic_bus for PCI: 00:02.0 done
946 18:50:28.595163 scan_bus: scanning of bus PCI: 00:02.0 took 10172 usecs
947 18:50:28.598707 PCI: 00:14.0 scanning...
948 18:50:28.601957 scan_static_bus for PCI: 00:14.0
949 18:50:28.602049 USB0 port 0 enabled
950 18:50:28.605082 USB0 port 0 scanning...
951 18:50:28.609001 scan_static_bus for USB0 port 0
952 18:50:28.611966 USB2 port 0 enabled
953 18:50:28.612052 USB2 port 1 enabled
954 18:50:28.615400 USB2 port 2 disabled
955 18:50:28.618591 USB2 port 3 disabled
956 18:50:28.618681 USB2 port 5 disabled
957 18:50:28.621815 USB2 port 6 enabled
958 18:50:28.625570 USB2 port 9 enabled
959 18:50:28.625664 USB3 port 0 enabled
960 18:50:28.628937 USB3 port 1 enabled
961 18:50:28.629025 USB3 port 2 enabled
962 18:50:28.632115 USB3 port 3 enabled
963 18:50:28.635415 USB3 port 4 disabled
964 18:50:28.635505 USB2 port 0 scanning...
965 18:50:28.638559 scan_static_bus for USB2 port 0
966 18:50:28.645412 scan_static_bus for USB2 port 0 done
967 18:50:28.648883 scan_bus: scanning of bus USB2 port 0 took 9706 usecs
968 18:50:28.651906 USB2 port 1 scanning...
969 18:50:28.655067 scan_static_bus for USB2 port 1
970 18:50:28.658414 scan_static_bus for USB2 port 1 done
971 18:50:28.665465 scan_bus: scanning of bus USB2 port 1 took 9699 usecs
972 18:50:28.665577 USB2 port 6 scanning...
973 18:50:28.668365 scan_static_bus for USB2 port 6
974 18:50:28.675045 scan_static_bus for USB2 port 6 done
975 18:50:28.678593 scan_bus: scanning of bus USB2 port 6 took 9690 usecs
976 18:50:28.682037 USB2 port 9 scanning...
977 18:50:28.685175 scan_static_bus for USB2 port 9
978 18:50:28.688711 scan_static_bus for USB2 port 9 done
979 18:50:28.695171 scan_bus: scanning of bus USB2 port 9 took 9708 usecs
980 18:50:28.695265 USB3 port 0 scanning...
981 18:50:28.698569 scan_static_bus for USB3 port 0
982 18:50:28.704875 scan_static_bus for USB3 port 0 done
983 18:50:28.708823 scan_bus: scanning of bus USB3 port 0 took 9705 usecs
984 18:50:28.711732 USB3 port 1 scanning...
985 18:50:28.715426 scan_static_bus for USB3 port 1
986 18:50:28.718697 scan_static_bus for USB3 port 1 done
987 18:50:28.725061 scan_bus: scanning of bus USB3 port 1 took 9706 usecs
988 18:50:28.725156 USB3 port 2 scanning...
989 18:50:28.728481 scan_static_bus for USB3 port 2
990 18:50:28.734987 scan_static_bus for USB3 port 2 done
991 18:50:28.738311 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
992 18:50:28.742170 USB3 port 3 scanning...
993 18:50:28.745595 scan_static_bus for USB3 port 3
994 18:50:28.748265 scan_static_bus for USB3 port 3 done
995 18:50:28.755218 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
996 18:50:28.758416 scan_static_bus for USB0 port 0 done
997 18:50:28.761617 scan_bus: scanning of bus USB0 port 0 took 155419 usecs
998 18:50:28.768550 scan_static_bus for PCI: 00:14.0 done
999 18:50:28.771449 scan_bus: scanning of bus PCI: 00:14.0 took 173037 usecs
1000 18:50:28.775038 PCI: 00:15.0 scanning...
1001 18:50:28.778332 scan_generic_bus for PCI: 00:15.0
1002 18:50:28.782259 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1003 18:50:28.788726 scan_generic_bus for PCI: 00:15.0 done
1004 18:50:28.791766 scan_bus: scanning of bus PCI: 00:15.0 took 14297 usecs
1005 18:50:28.795363 PCI: 00:15.1 scanning...
1006 18:50:28.798728 scan_generic_bus for PCI: 00:15.1
1007 18:50:28.802017 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1008 18:50:28.808365 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1009 18:50:28.812029 scan_generic_bus for PCI: 00:15.1 done
1010 18:50:28.815131 scan_bus: scanning of bus PCI: 00:15.1 took 18612 usecs
1011 18:50:28.818038 PCI: 00:19.0 scanning...
1012 18:50:28.821849 scan_generic_bus for PCI: 00:19.0
1013 18:50:28.828058 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1014 18:50:28.832106 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1015 18:50:28.835259 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1016 18:50:28.838405 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1017 18:50:28.841811 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1018 18:50:28.848569 scan_generic_bus for PCI: 00:19.0 done
1019 18:50:28.851893 scan_bus: scanning of bus PCI: 00:19.0 took 30741 usecs
1020 18:50:28.855197 PCI: 00:1d.0 scanning...
1021 18:50:28.858546 do_pci_scan_bridge for PCI: 00:1d.0
1022 18:50:28.861555 PCI: pci_scan_bus for bus 01
1023 18:50:28.864795 PCI: 01:00.0 [1c5c/1327] enabled
1024 18:50:28.868531 Enabling Common Clock Configuration
1025 18:50:28.874866 L1 Sub-State supported from root port 29
1026 18:50:28.874961 L1 Sub-State Support = 0xf
1027 18:50:28.878819 CommonModeRestoreTime = 0x28
1028 18:50:28.885110 Power On Value = 0x16, Power On Scale = 0x0
1029 18:50:28.885229 ASPM: Enabled L1
1030 18:50:28.891885 scan_bus: scanning of bus PCI: 00:1d.0 took 32788 usecs
1031 18:50:28.891978 PCI: 00:1e.2 scanning...
1032 18:50:28.898970 scan_generic_bus for PCI: 00:1e.2
1033 18:50:28.902046 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1034 18:50:28.905334 scan_generic_bus for PCI: 00:1e.2 done
1035 18:50:28.908970 scan_bus: scanning of bus PCI: 00:1e.2 took 13994 usecs
1036 18:50:28.912020 PCI: 00:1e.3 scanning...
1037 18:50:28.915231 scan_generic_bus for PCI: 00:1e.3
1038 18:50:28.921684 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1039 18:50:28.925351 scan_generic_bus for PCI: 00:1e.3 done
1040 18:50:28.928428 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
1041 18:50:28.932228 PCI: 00:1f.0 scanning...
1042 18:50:28.935353 scan_static_bus for PCI: 00:1f.0
1043 18:50:28.938556 PNP: 0c09.0 enabled
1044 18:50:28.941900 scan_static_bus for PCI: 00:1f.0 done
1045 18:50:28.948308 scan_bus: scanning of bus PCI: 00:1f.0 took 12049 usecs
1046 18:50:28.948437 PCI: 00:1f.3 scanning...
1047 18:50:28.955570 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1048 18:50:28.958722 PCI: 00:1f.4 scanning...
1049 18:50:28.962153 scan_generic_bus for PCI: 00:1f.4
1050 18:50:28.965342 scan_generic_bus for PCI: 00:1f.4 done
1051 18:50:28.972195 scan_bus: scanning of bus PCI: 00:1f.4 took 10179 usecs
1052 18:50:28.975225 PCI: 00:1f.5 scanning...
1053 18:50:28.978645 scan_generic_bus for PCI: 00:1f.5
1054 18:50:28.981981 scan_generic_bus for PCI: 00:1f.5 done
1055 18:50:28.988344 scan_bus: scanning of bus PCI: 00:1f.5 took 10182 usecs
1056 18:50:28.991633 scan_bus: scanning of bus DOMAIN: 0000 took 605085 usecs
1057 18:50:28.995391 scan_static_bus for Root Device done
1058 18:50:29.001805 scan_bus: scanning of bus Root Device took 624947 usecs
1059 18:50:29.001896 done
1060 18:50:29.005604 Chrome EC: UHEPI supported
1061 18:50:29.011547 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1062 18:50:29.018724 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1063 18:50:29.024768 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1064 18:50:29.031567 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1065 18:50:29.034865 SPI flash protection: WPSW=0 SRP0=0
1066 18:50:29.038680 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1067 18:50:29.044846 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1068 18:50:29.048840 found VGA at PCI: 00:02.0
1069 18:50:29.051458 Setting up VGA for PCI: 00:02.0
1070 18:50:29.055249 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1071 18:50:29.061835 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1072 18:50:29.061928 Allocating resources...
1073 18:50:29.065244 Reading resources...
1074 18:50:29.068357 Root Device read_resources bus 0 link: 0
1075 18:50:29.075212 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1076 18:50:29.078749 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1077 18:50:29.085169 DOMAIN: 0000 read_resources bus 0 link: 0
1078 18:50:29.088189 PCI: 00:14.0 read_resources bus 0 link: 0
1079 18:50:29.094692 USB0 port 0 read_resources bus 0 link: 0
1080 18:50:29.101833 USB0 port 0 read_resources bus 0 link: 0 done
1081 18:50:29.105476 PCI: 00:14.0 read_resources bus 0 link: 0 done
1082 18:50:29.112288 PCI: 00:15.0 read_resources bus 1 link: 0
1083 18:50:29.115903 PCI: 00:15.0 read_resources bus 1 link: 0 done
1084 18:50:29.122333 PCI: 00:15.1 read_resources bus 2 link: 0
1085 18:50:29.125565 PCI: 00:15.1 read_resources bus 2 link: 0 done
1086 18:50:29.133225 PCI: 00:19.0 read_resources bus 3 link: 0
1087 18:50:29.139680 PCI: 00:19.0 read_resources bus 3 link: 0 done
1088 18:50:29.143323 PCI: 00:1d.0 read_resources bus 1 link: 0
1089 18:50:29.150299 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1090 18:50:29.153616 PCI: 00:1e.2 read_resources bus 4 link: 0
1091 18:50:29.159919 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1092 18:50:29.163286 PCI: 00:1e.3 read_resources bus 5 link: 0
1093 18:50:29.170413 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1094 18:50:29.173623 PCI: 00:1f.0 read_resources bus 0 link: 0
1095 18:50:29.179943 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1096 18:50:29.186620 DOMAIN: 0000 read_resources bus 0 link: 0 done
1097 18:50:29.189823 Root Device read_resources bus 0 link: 0 done
1098 18:50:29.192769 Done reading resources.
1099 18:50:29.196236 Show resources in subtree (Root Device)...After reading.
1100 18:50:29.202937 Root Device child on link 0 CPU_CLUSTER: 0
1101 18:50:29.206084 CPU_CLUSTER: 0 child on link 0 APIC: 00
1102 18:50:29.206178 APIC: 00
1103 18:50:29.209716 APIC: 03
1104 18:50:29.209795 APIC: 02
1105 18:50:29.212814 APIC: 01
1106 18:50:29.212897 APIC: 04
1107 18:50:29.212965 APIC: 05
1108 18:50:29.216206 APIC: 07
1109 18:50:29.216304 APIC: 06
1110 18:50:29.219880 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1111 18:50:29.230065 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1112 18:50:29.282632 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1113 18:50:29.282942 PCI: 00:00.0
1114 18:50:29.283021 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1115 18:50:29.283280 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1116 18:50:29.283762 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1117 18:50:29.284736 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1118 18:50:29.297207 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1119 18:50:29.300295 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1120 18:50:29.306867 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1121 18:50:29.317120 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1122 18:50:29.326493 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1123 18:50:29.333571 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1124 18:50:29.343229 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1125 18:50:29.353292 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1126 18:50:29.363375 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1127 18:50:29.373819 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1128 18:50:29.383435 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1129 18:50:29.389738 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1130 18:50:29.393572 PCI: 00:02.0
1131 18:50:29.403222 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 18:50:29.413212 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1133 18:50:29.423086 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1134 18:50:29.423185 PCI: 00:04.0
1135 18:50:29.426317 PCI: 00:08.0
1136 18:50:29.436229 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1137 18:50:29.436333 PCI: 00:12.0
1138 18:50:29.446698 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 18:50:29.450078 PCI: 00:14.0 child on link 0 USB0 port 0
1140 18:50:29.459918 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1141 18:50:29.466517 USB0 port 0 child on link 0 USB2 port 0
1142 18:50:29.466614 USB2 port 0
1143 18:50:29.469568 USB2 port 1
1144 18:50:29.469660 USB2 port 2
1145 18:50:29.473376 USB2 port 3
1146 18:50:29.473467 USB2 port 5
1147 18:50:29.476728 USB2 port 6
1148 18:50:29.476819 USB2 port 9
1149 18:50:29.479837 USB3 port 0
1150 18:50:29.479927 USB3 port 1
1151 18:50:29.483527 USB3 port 2
1152 18:50:29.486390 USB3 port 3
1153 18:50:29.486481 USB3 port 4
1154 18:50:29.489835 PCI: 00:14.2
1155 18:50:29.499832 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1156 18:50:29.509949 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1157 18:50:29.510070 PCI: 00:14.3
1158 18:50:29.519817 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 18:50:29.522821 PCI: 00:15.0 child on link 0 I2C: 01:15
1160 18:50:29.533380 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 18:50:29.536155 I2C: 01:15
1162 18:50:29.539450 PCI: 00:15.1 child on link 0 I2C: 02:5d
1163 18:50:29.550048 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 18:50:29.550140 I2C: 02:5d
1165 18:50:29.553427 GENERIC: 0.0
1166 18:50:29.556453 PCI: 00:16.0
1167 18:50:29.563170 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 18:50:29.566562 PCI: 00:17.0
1169 18:50:29.576718 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1170 18:50:29.583152 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1171 18:50:29.592789 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1172 18:50:29.599509 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1173 18:50:29.609484 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1174 18:50:29.619419 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1175 18:50:29.622980 PCI: 00:19.0 child on link 0 I2C: 03:1a
1176 18:50:29.632499 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 18:50:29.632593 I2C: 03:1a
1178 18:50:29.636192 I2C: 03:38
1179 18:50:29.636319 I2C: 03:39
1180 18:50:29.639280 I2C: 03:3a
1181 18:50:29.639370 I2C: 03:3b
1182 18:50:29.646405 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1183 18:50:29.653032 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1184 18:50:29.663006 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1185 18:50:29.672903 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1186 18:50:29.672994 PCI: 01:00.0
1187 18:50:29.682461 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 18:50:29.685798 PCI: 00:1e.0
1189 18:50:29.696074 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1190 18:50:29.706090 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1191 18:50:29.709325 PCI: 00:1e.2 child on link 0 SPI: 00
1192 18:50:29.719631 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 18:50:29.722591 SPI: 00
1194 18:50:29.725860 PCI: 00:1e.3 child on link 0 SPI: 01
1195 18:50:29.735777 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 18:50:29.735869 SPI: 01
1197 18:50:29.742235 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1198 18:50:29.749021 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1199 18:50:29.759143 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1200 18:50:29.759237 PNP: 0c09.0
1201 18:50:29.768974 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1202 18:50:29.772389 PCI: 00:1f.3
1203 18:50:29.782229 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 18:50:29.792613 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1205 18:50:29.792707 PCI: 00:1f.4
1206 18:50:29.802449 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1207 18:50:29.812550 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1208 18:50:29.812646 PCI: 00:1f.5
1209 18:50:29.822220 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1210 18:50:29.828685 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1211 18:50:29.835247 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1212 18:50:29.842213 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1213 18:50:29.845662 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1214 18:50:29.848524 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1215 18:50:29.851854 PCI: 00:17.0 18 * [0x60 - 0x67] io
1216 18:50:29.855092 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1217 18:50:29.862052 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1218 18:50:29.868722 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1219 18:50:29.878433 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1220 18:50:29.885009 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1221 18:50:29.891735 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1222 18:50:29.894909 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1223 18:50:29.904703 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1224 18:50:29.908653 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1225 18:50:29.915186 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1226 18:50:29.918480 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1227 18:50:29.924767 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1228 18:50:29.927919 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1229 18:50:29.934595 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1230 18:50:29.938214 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1231 18:50:29.945167 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1232 18:50:29.948007 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1233 18:50:29.951628 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1234 18:50:29.958491 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1235 18:50:29.961564 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1236 18:50:29.968073 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1237 18:50:29.971597 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1238 18:50:29.977964 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1239 18:50:29.981212 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1240 18:50:29.987820 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1241 18:50:29.991053 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1242 18:50:29.998293 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1243 18:50:30.001754 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1244 18:50:30.007870 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1245 18:50:30.011447 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1246 18:50:30.014704 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1247 18:50:30.025183 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1248 18:50:30.028185 avoid_fixed_resources: DOMAIN: 0000
1249 18:50:30.034226 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1250 18:50:30.041137 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1251 18:50:30.048112 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1252 18:50:30.054674 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1253 18:50:30.064107 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1254 18:50:30.071095 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1255 18:50:30.077524 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1256 18:50:30.087562 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1257 18:50:30.094359 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1258 18:50:30.101365 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1259 18:50:30.107424 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1260 18:50:30.114580 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1261 18:50:30.117658 Setting resources...
1262 18:50:30.124108 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1263 18:50:30.127584 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1264 18:50:30.130922 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1265 18:50:30.137975 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1266 18:50:30.141096 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1267 18:50:30.147616 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1268 18:50:30.154656 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1269 18:50:30.157440 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1270 18:50:30.167648 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1271 18:50:30.171229 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1272 18:50:30.177845 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1273 18:50:30.180864 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1274 18:50:30.187942 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1275 18:50:30.190739 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1276 18:50:30.197363 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1277 18:50:30.200691 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1278 18:50:30.207303 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1279 18:50:30.210909 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1280 18:50:30.217257 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1281 18:50:30.220431 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1282 18:50:30.224163 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1283 18:50:30.230644 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1284 18:50:30.234010 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1285 18:50:30.240731 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1286 18:50:30.243851 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1287 18:50:30.250701 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1288 18:50:30.253823 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1289 18:50:30.260618 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1290 18:50:30.264238 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1291 18:50:30.270718 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1292 18:50:30.274006 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1293 18:50:30.276945 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1294 18:50:30.287300 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1295 18:50:30.294281 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1296 18:50:30.300697 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1297 18:50:30.307228 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1298 18:50:30.313881 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1299 18:50:30.320551 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1300 18:50:30.323875 Root Device assign_resources, bus 0 link: 0
1301 18:50:30.330799 DOMAIN: 0000 assign_resources, bus 0 link: 0
1302 18:50:30.336782 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1303 18:50:30.347105 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1304 18:50:30.354070 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1305 18:50:30.363610 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1306 18:50:30.370133 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1307 18:50:30.379937 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1308 18:50:30.383257 PCI: 00:14.0 assign_resources, bus 0 link: 0
1309 18:50:30.390265 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 18:50:30.397133 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1311 18:50:30.403497 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1312 18:50:30.413748 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1313 18:50:30.420114 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1314 18:50:30.426956 PCI: 00:15.0 assign_resources, bus 1 link: 0
1315 18:50:30.430041 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 18:50:30.440205 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1317 18:50:30.443285 PCI: 00:15.1 assign_resources, bus 2 link: 0
1318 18:50:30.446551 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 18:50:30.456894 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1320 18:50:30.463840 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1321 18:50:30.473524 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1322 18:50:30.479795 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1323 18:50:30.486273 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1324 18:50:30.496415 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1325 18:50:30.502891 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1326 18:50:30.512877 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1327 18:50:30.516091 PCI: 00:19.0 assign_resources, bus 3 link: 0
1328 18:50:30.519427 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 18:50:30.529586 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1330 18:50:30.539215 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1331 18:50:30.545782 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1332 18:50:30.552758 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1333 18:50:30.559147 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1334 18:50:30.565658 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1335 18:50:30.572568 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1336 18:50:30.582213 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1337 18:50:30.585611 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1338 18:50:30.589389 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 18:50:30.598729 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1340 18:50:30.601943 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1341 18:50:30.609094 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 18:50:30.612217 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1343 18:50:30.618768 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 18:50:30.622313 LPC: Trying to open IO window from 800 size 1ff
1345 18:50:30.632135 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1346 18:50:30.638345 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1347 18:50:30.648534 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1348 18:50:30.654896 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1349 18:50:30.658652 DOMAIN: 0000 assign_resources, bus 0 link: 0
1350 18:50:30.665096 Root Device assign_resources, bus 0 link: 0
1351 18:50:30.668603 Done setting resources.
1352 18:50:30.674805 Show resources in subtree (Root Device)...After assigning values.
1353 18:50:30.678536 Root Device child on link 0 CPU_CLUSTER: 0
1354 18:50:30.681801 CPU_CLUSTER: 0 child on link 0 APIC: 00
1355 18:50:30.681890 APIC: 00
1356 18:50:30.684531 APIC: 03
1357 18:50:30.684623 APIC: 02
1358 18:50:30.688278 APIC: 01
1359 18:50:30.688368 APIC: 04
1360 18:50:30.688438 APIC: 05
1361 18:50:30.691195 APIC: 07
1362 18:50:30.691283 APIC: 06
1363 18:50:30.698118 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1364 18:50:30.704799 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1365 18:50:30.717734 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1366 18:50:30.717825 PCI: 00:00.0
1367 18:50:30.727732 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1368 18:50:30.737767 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1369 18:50:30.747726 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1370 18:50:30.757621 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1371 18:50:30.767625 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1372 18:50:30.774131 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1373 18:50:30.784305 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1374 18:50:30.793990 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1375 18:50:30.804159 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1376 18:50:30.810648 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1377 18:50:30.820554 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1378 18:50:30.830316 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1379 18:50:30.840103 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1380 18:50:30.850254 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1381 18:50:30.860208 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1382 18:50:30.870062 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1383 18:50:30.870156 PCI: 00:02.0
1384 18:50:30.879827 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1385 18:50:30.893068 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1386 18:50:30.899573 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1387 18:50:30.903105 PCI: 00:04.0
1388 18:50:30.903197 PCI: 00:08.0
1389 18:50:30.916134 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1390 18:50:30.916265 PCI: 00:12.0
1391 18:50:30.926132 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1392 18:50:30.929478 PCI: 00:14.0 child on link 0 USB0 port 0
1393 18:50:30.942425 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1394 18:50:30.946017 USB0 port 0 child on link 0 USB2 port 0
1395 18:50:30.946108 USB2 port 0
1396 18:50:30.949191 USB2 port 1
1397 18:50:30.952636 USB2 port 2
1398 18:50:30.952727 USB2 port 3
1399 18:50:30.955540 USB2 port 5
1400 18:50:30.955636 USB2 port 6
1401 18:50:30.959305 USB2 port 9
1402 18:50:30.959386 USB3 port 0
1403 18:50:30.962307 USB3 port 1
1404 18:50:30.962388 USB3 port 2
1405 18:50:30.966346 USB3 port 3
1406 18:50:30.966431 USB3 port 4
1407 18:50:30.968971 PCI: 00:14.2
1408 18:50:30.978838 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1409 18:50:30.988952 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1410 18:50:30.992176 PCI: 00:14.3
1411 18:50:31.002180 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1412 18:50:31.005454 PCI: 00:15.0 child on link 0 I2C: 01:15
1413 18:50:31.015832 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1414 18:50:31.018798 I2C: 01:15
1415 18:50:31.022277 PCI: 00:15.1 child on link 0 I2C: 02:5d
1416 18:50:31.031976 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1417 18:50:31.032097 I2C: 02:5d
1418 18:50:31.035247 GENERIC: 0.0
1419 18:50:31.035338 PCI: 00:16.0
1420 18:50:31.048296 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1421 18:50:31.048388 PCI: 00:17.0
1422 18:50:31.058424 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1423 18:50:31.068101 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1424 18:50:31.078389 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1425 18:50:31.088069 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1426 18:50:31.094837 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1427 18:50:31.108445 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1428 18:50:31.111315 PCI: 00:19.0 child on link 0 I2C: 03:1a
1429 18:50:31.121329 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1430 18:50:31.121420 I2C: 03:1a
1431 18:50:31.124560 I2C: 03:38
1432 18:50:31.124650 I2C: 03:39
1433 18:50:31.127790 I2C: 03:3a
1434 18:50:31.127880 I2C: 03:3b
1435 18:50:31.134435 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1436 18:50:31.141395 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1437 18:50:31.151071 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1438 18:50:31.164266 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1439 18:50:31.164357 PCI: 01:00.0
1440 18:50:31.173805 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1441 18:50:31.177697 PCI: 00:1e.0
1442 18:50:31.187213 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1443 18:50:31.197194 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1444 18:50:31.203738 PCI: 00:1e.2 child on link 0 SPI: 00
1445 18:50:31.214095 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1446 18:50:31.214184 SPI: 00
1447 18:50:31.217105 PCI: 00:1e.3 child on link 0 SPI: 01
1448 18:50:31.227334 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1449 18:50:31.230318 SPI: 01
1450 18:50:31.233610 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1451 18:50:31.243497 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1452 18:50:31.250447 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1453 18:50:31.253683 PNP: 0c09.0
1454 18:50:31.260427 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1455 18:50:31.263336 PCI: 00:1f.3
1456 18:50:31.273171 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1457 18:50:31.283220 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1458 18:50:31.286483 PCI: 00:1f.4
1459 18:50:31.296507 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1460 18:50:31.306408 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1461 18:50:31.306494 PCI: 00:1f.5
1462 18:50:31.316486 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1463 18:50:31.319330 Done allocating resources.
1464 18:50:31.326264 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1465 18:50:31.329856 Enabling resources...
1466 18:50:31.332676 PCI: 00:00.0 subsystem <- 8086/9b61
1467 18:50:31.335941 PCI: 00:00.0 cmd <- 06
1468 18:50:31.339625 PCI: 00:02.0 subsystem <- 8086/9b41
1469 18:50:31.342336 PCI: 00:02.0 cmd <- 03
1470 18:50:31.342419 PCI: 00:08.0 cmd <- 06
1471 18:50:31.349413 PCI: 00:12.0 subsystem <- 8086/02f9
1472 18:50:31.349499 PCI: 00:12.0 cmd <- 02
1473 18:50:31.352927 PCI: 00:14.0 subsystem <- 8086/02ed
1474 18:50:31.355791 PCI: 00:14.0 cmd <- 02
1475 18:50:31.359713 PCI: 00:14.2 cmd <- 02
1476 18:50:31.363196 PCI: 00:14.3 subsystem <- 8086/02f0
1477 18:50:31.365821 PCI: 00:14.3 cmd <- 02
1478 18:50:31.369060 PCI: 00:15.0 subsystem <- 8086/02e8
1479 18:50:31.372646 PCI: 00:15.0 cmd <- 02
1480 18:50:31.376108 PCI: 00:15.1 subsystem <- 8086/02e9
1481 18:50:31.379450 PCI: 00:15.1 cmd <- 02
1482 18:50:31.382707 PCI: 00:16.0 subsystem <- 8086/02e0
1483 18:50:31.382798 PCI: 00:16.0 cmd <- 02
1484 18:50:31.389363 PCI: 00:17.0 subsystem <- 8086/02d3
1485 18:50:31.389454 PCI: 00:17.0 cmd <- 03
1486 18:50:31.392794 PCI: 00:19.0 subsystem <- 8086/02c5
1487 18:50:31.395783 PCI: 00:19.0 cmd <- 02
1488 18:50:31.399812 PCI: 00:1d.0 bridge ctrl <- 0013
1489 18:50:31.402529 PCI: 00:1d.0 subsystem <- 8086/02b0
1490 18:50:31.406171 PCI: 00:1d.0 cmd <- 06
1491 18:50:31.409229 PCI: 00:1e.0 subsystem <- 8086/02a8
1492 18:50:31.413001 PCI: 00:1e.0 cmd <- 06
1493 18:50:31.416033 PCI: 00:1e.2 subsystem <- 8086/02aa
1494 18:50:31.419186 PCI: 00:1e.2 cmd <- 06
1495 18:50:31.422576 PCI: 00:1e.3 subsystem <- 8086/02ab
1496 18:50:31.425775 PCI: 00:1e.3 cmd <- 02
1497 18:50:31.429100 PCI: 00:1f.0 subsystem <- 8086/0284
1498 18:50:31.432481 PCI: 00:1f.0 cmd <- 407
1499 18:50:31.435651 PCI: 00:1f.3 subsystem <- 8086/02c8
1500 18:50:31.439433 PCI: 00:1f.3 cmd <- 02
1501 18:50:31.442533 PCI: 00:1f.4 subsystem <- 8086/02a3
1502 18:50:31.442629 PCI: 00:1f.4 cmd <- 03
1503 18:50:31.448860 PCI: 00:1f.5 subsystem <- 8086/02a4
1504 18:50:31.448951 PCI: 00:1f.5 cmd <- 406
1505 18:50:31.459034 PCI: 01:00.0 cmd <- 02
1506 18:50:31.464590 done.
1507 18:50:31.475885 ME: Version: 14.0.39.1367
1508 18:50:31.482607 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1509 18:50:31.486368 Initializing devices...
1510 18:50:31.486459 Root Device init ...
1511 18:50:31.492268 Chrome EC: Set SMI mask to 0x0000000000000000
1512 18:50:31.495473 Chrome EC: clear events_b mask to 0x0000000000000000
1513 18:50:31.502469 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1514 18:50:31.509734 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1515 18:50:31.515809 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1516 18:50:31.519089 Chrome EC: Set WAKE mask to 0x0000000000000000
1517 18:50:31.522182 Root Device init finished in 35213 usecs
1518 18:50:31.526099 CPU_CLUSTER: 0 init ...
1519 18:50:31.532298 CPU_CLUSTER: 0 init finished in 2448 usecs
1520 18:50:31.536699 PCI: 00:00.0 init ...
1521 18:50:31.539725 CPU TDP: 15 Watts
1522 18:50:31.543617 CPU PL2 = 64 Watts
1523 18:50:31.546550 PCI: 00:00.0 init finished in 7085 usecs
1524 18:50:31.550024 PCI: 00:02.0 init ...
1525 18:50:31.553453 PCI: 00:02.0 init finished in 2244 usecs
1526 18:50:31.556657 PCI: 00:08.0 init ...
1527 18:50:31.560159 PCI: 00:08.0 init finished in 2252 usecs
1528 18:50:31.563334 PCI: 00:12.0 init ...
1529 18:50:31.566399 PCI: 00:12.0 init finished in 2254 usecs
1530 18:50:31.570256 PCI: 00:14.0 init ...
1531 18:50:31.573313 PCI: 00:14.0 init finished in 2253 usecs
1532 18:50:31.576768 PCI: 00:14.2 init ...
1533 18:50:31.579973 PCI: 00:14.2 init finished in 2244 usecs
1534 18:50:31.583232 PCI: 00:14.3 init ...
1535 18:50:31.586552 PCI: 00:14.3 init finished in 2263 usecs
1536 18:50:31.589947 PCI: 00:15.0 init ...
1537 18:50:31.593204 DW I2C bus 0 at 0xd121f000 (400 KHz)
1538 18:50:31.596482 PCI: 00:15.0 init finished in 5971 usecs
1539 18:50:31.599740 PCI: 00:15.1 init ...
1540 18:50:31.603495 DW I2C bus 1 at 0xd1220000 (400 KHz)
1541 18:50:31.606202 PCI: 00:15.1 init finished in 5979 usecs
1542 18:50:31.610270 PCI: 00:16.0 init ...
1543 18:50:31.613287 PCI: 00:16.0 init finished in 2252 usecs
1544 18:50:31.617179 PCI: 00:19.0 init ...
1545 18:50:31.620147 DW I2C bus 4 at 0xd1222000 (400 KHz)
1546 18:50:31.627089 PCI: 00:19.0 init finished in 5979 usecs
1547 18:50:31.627180 PCI: 00:1d.0 init ...
1548 18:50:31.630177 Initializing PCH PCIe bridge.
1549 18:50:31.633604 PCI: 00:1d.0 init finished in 5285 usecs
1550 18:50:31.638591 PCI: 00:1f.0 init ...
1551 18:50:31.641724 IOAPIC: Initializing IOAPIC at 0xfec00000
1552 18:50:31.648381 IOAPIC: Bootstrap Processor Local APIC = 0x00
1553 18:50:31.648467 IOAPIC: ID = 0x02
1554 18:50:31.651680 IOAPIC: Dumping registers
1555 18:50:31.654894 reg 0x0000: 0x02000000
1556 18:50:31.658738 reg 0x0001: 0x00770020
1557 18:50:31.658823 reg 0x0002: 0x00000000
1558 18:50:31.665250 PCI: 00:1f.0 init finished in 23539 usecs
1559 18:50:31.668766 PCI: 00:1f.4 init ...
1560 18:50:31.671656 PCI: 00:1f.4 init finished in 2263 usecs
1561 18:50:31.682593 PCI: 01:00.0 init ...
1562 18:50:31.686095 PCI: 01:00.0 init finished in 2254 usecs
1563 18:50:31.690345 PNP: 0c09.0 init ...
1564 18:50:31.693854 Google Chrome EC uptime: 11.051 seconds
1565 18:50:31.700386 Google Chrome AP resets since EC boot: 0
1566 18:50:31.703693 Google Chrome most recent AP reset causes:
1567 18:50:31.710345 Google Chrome EC reset flags at last EC boot: reset-pin
1568 18:50:31.713425 PNP: 0c09.0 init finished in 20573 usecs
1569 18:50:31.717126 Devices initialized
1570 18:50:31.717216 Show all devs... After init.
1571 18:50:31.719991 Root Device: enabled 1
1572 18:50:31.723278 CPU_CLUSTER: 0: enabled 1
1573 18:50:31.726768 DOMAIN: 0000: enabled 1
1574 18:50:31.726859 APIC: 00: enabled 1
1575 18:50:31.729980 PCI: 00:00.0: enabled 1
1576 18:50:31.733661 PCI: 00:02.0: enabled 1
1577 18:50:31.736874 PCI: 00:04.0: enabled 0
1578 18:50:31.736965 PCI: 00:05.0: enabled 0
1579 18:50:31.740166 PCI: 00:12.0: enabled 1
1580 18:50:31.743389 PCI: 00:12.5: enabled 0
1581 18:50:31.743476 PCI: 00:12.6: enabled 0
1582 18:50:31.746822 PCI: 00:14.0: enabled 1
1583 18:50:31.749996 PCI: 00:14.1: enabled 0
1584 18:50:31.753250 PCI: 00:14.3: enabled 1
1585 18:50:31.753341 PCI: 00:14.5: enabled 0
1586 18:50:31.756819 PCI: 00:15.0: enabled 1
1587 18:50:31.759743 PCI: 00:15.1: enabled 1
1588 18:50:31.763754 PCI: 00:15.2: enabled 0
1589 18:50:31.763845 PCI: 00:15.3: enabled 0
1590 18:50:31.766571 PCI: 00:16.0: enabled 1
1591 18:50:31.770094 PCI: 00:16.1: enabled 0
1592 18:50:31.773200 PCI: 00:16.2: enabled 0
1593 18:50:31.773290 PCI: 00:16.3: enabled 0
1594 18:50:31.776255 PCI: 00:16.4: enabled 0
1595 18:50:31.780087 PCI: 00:16.5: enabled 0
1596 18:50:31.783032 PCI: 00:17.0: enabled 1
1597 18:50:31.783122 PCI: 00:19.0: enabled 1
1598 18:50:31.786416 PCI: 00:19.1: enabled 0
1599 18:50:31.789806 PCI: 00:19.2: enabled 0
1600 18:50:31.789902 PCI: 00:1a.0: enabled 0
1601 18:50:31.793441 PCI: 00:1c.0: enabled 0
1602 18:50:31.796201 PCI: 00:1c.1: enabled 0
1603 18:50:31.799582 PCI: 00:1c.2: enabled 0
1604 18:50:31.799672 PCI: 00:1c.3: enabled 0
1605 18:50:31.803009 PCI: 00:1c.4: enabled 0
1606 18:50:31.806154 PCI: 00:1c.5: enabled 0
1607 18:50:31.809473 PCI: 00:1c.6: enabled 0
1608 18:50:31.809563 PCI: 00:1c.7: enabled 0
1609 18:50:31.812683 PCI: 00:1d.0: enabled 1
1610 18:50:31.816426 PCI: 00:1d.1: enabled 0
1611 18:50:31.819241 PCI: 00:1d.2: enabled 0
1612 18:50:31.819331 PCI: 00:1d.3: enabled 0
1613 18:50:31.822542 PCI: 00:1d.4: enabled 0
1614 18:50:31.826365 PCI: 00:1d.5: enabled 0
1615 18:50:31.826455 PCI: 00:1e.0: enabled 1
1616 18:50:31.829526 PCI: 00:1e.1: enabled 0
1617 18:50:31.832688 PCI: 00:1e.2: enabled 1
1618 18:50:31.836118 PCI: 00:1e.3: enabled 1
1619 18:50:31.836206 PCI: 00:1f.0: enabled 1
1620 18:50:31.839403 PCI: 00:1f.1: enabled 0
1621 18:50:31.842477 PCI: 00:1f.2: enabled 0
1622 18:50:31.846075 PCI: 00:1f.3: enabled 1
1623 18:50:31.846167 PCI: 00:1f.4: enabled 1
1624 18:50:31.849226 PCI: 00:1f.5: enabled 1
1625 18:50:31.852395 PCI: 00:1f.6: enabled 0
1626 18:50:31.855827 USB0 port 0: enabled 1
1627 18:50:31.855934 I2C: 01:15: enabled 1
1628 18:50:31.859054 I2C: 02:5d: enabled 1
1629 18:50:31.862928 GENERIC: 0.0: enabled 1
1630 18:50:31.863062 I2C: 03:1a: enabled 1
1631 18:50:31.865692 I2C: 03:38: enabled 1
1632 18:50:31.869325 I2C: 03:39: enabled 1
1633 18:50:31.869481 I2C: 03:3a: enabled 1
1634 18:50:31.872590 I2C: 03:3b: enabled 1
1635 18:50:31.876361 PCI: 00:00.0: enabled 1
1636 18:50:31.876537 SPI: 00: enabled 1
1637 18:50:31.878932 SPI: 01: enabled 1
1638 18:50:31.882897 PNP: 0c09.0: enabled 1
1639 18:50:31.883171 USB2 port 0: enabled 1
1640 18:50:31.885683 USB2 port 1: enabled 1
1641 18:50:31.888917 USB2 port 2: enabled 0
1642 18:50:31.889282 USB2 port 3: enabled 0
1643 18:50:31.892844 USB2 port 5: enabled 0
1644 18:50:31.895737 USB2 port 6: enabled 1
1645 18:50:31.899235 USB2 port 9: enabled 1
1646 18:50:31.899651 USB3 port 0: enabled 1
1647 18:50:31.902603 USB3 port 1: enabled 1
1648 18:50:31.906213 USB3 port 2: enabled 1
1649 18:50:31.906740 USB3 port 3: enabled 1
1650 18:50:31.909460 USB3 port 4: enabled 0
1651 18:50:31.912543 APIC: 03: enabled 1
1652 18:50:31.912958 APIC: 02: enabled 1
1653 18:50:31.915854 APIC: 01: enabled 1
1654 18:50:31.919447 APIC: 04: enabled 1
1655 18:50:31.919898 APIC: 05: enabled 1
1656 18:50:31.922640 APIC: 07: enabled 1
1657 18:50:31.923054 APIC: 06: enabled 1
1658 18:50:31.926103 PCI: 00:08.0: enabled 1
1659 18:50:31.929245 PCI: 00:14.2: enabled 1
1660 18:50:31.932435 PCI: 01:00.0: enabled 1
1661 18:50:31.935784 Disabling ACPI via APMC:
1662 18:50:31.936204 done.
1663 18:50:31.942578 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1664 18:50:31.946201 ELOG: NV offset 0xaf0000 size 0x4000
1665 18:50:31.952706 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1666 18:50:31.959335 ELOG: Event(17) added with size 13 at 2024-03-01 18:49:51 UTC
1667 18:50:31.965670 ELOG: Event(92) added with size 9 at 2024-03-01 18:49:51 UTC
1668 18:50:31.972853 ELOG: Event(93) added with size 9 at 2024-03-01 18:49:51 UTC
1669 18:50:31.979187 ELOG: Event(9A) added with size 9 at 2024-03-01 18:49:51 UTC
1670 18:50:31.985652 ELOG: Event(9E) added with size 10 at 2024-03-01 18:49:51 UTC
1671 18:50:31.993129 ELOG: Event(9F) added with size 14 at 2024-03-01 18:49:51 UTC
1672 18:50:31.995441 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1673 18:50:32.002528 ELOG: Event(A1) added with size 10 at 2024-03-01 18:49:51 UTC
1674 18:50:32.012743 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1675 18:50:32.019096 ELOG: Event(A0) added with size 9 at 2024-03-01 18:49:51 UTC
1676 18:50:32.022874 elog_add_boot_reason: Logged dev mode boot
1677 18:50:32.025926 Finalize devices...
1678 18:50:32.026380 PCI: 00:17.0 final
1679 18:50:32.029624 Devices finalized
1680 18:50:32.032756 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1681 18:50:32.039403 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1682 18:50:32.042604 ME: HFSTS1 : 0x90000245
1683 18:50:32.046390 ME: HFSTS2 : 0x3B850126
1684 18:50:32.052798 ME: HFSTS3 : 0x00000020
1685 18:50:32.055918 ME: HFSTS4 : 0x00004800
1686 18:50:32.059269 ME: HFSTS5 : 0x00000000
1687 18:50:32.062350 ME: HFSTS6 : 0x40400006
1688 18:50:32.065764 ME: Manufacturing Mode : NO
1689 18:50:32.069199 ME: FW Partition Table : OK
1690 18:50:32.072327 ME: Bringup Loader Failure : NO
1691 18:50:32.075819 ME: Firmware Init Complete : YES
1692 18:50:32.079301 ME: Boot Options Present : NO
1693 18:50:32.082490 ME: Update In Progress : NO
1694 18:50:32.085870 ME: D0i3 Support : YES
1695 18:50:32.089062 ME: Low Power State Enabled : NO
1696 18:50:32.092026 ME: CPU Replaced : NO
1697 18:50:32.095623 ME: CPU Replacement Valid : YES
1698 18:50:32.099048 ME: Current Working State : 5
1699 18:50:32.102263 ME: Current Operation State : 1
1700 18:50:32.105564 ME: Current Operation Mode : 0
1701 18:50:32.108589 ME: Error Code : 0
1702 18:50:32.111951 ME: CPU Debug Disabled : YES
1703 18:50:32.115154 ME: TXT Support : NO
1704 18:50:32.121807 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1705 18:50:32.128590 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1706 18:50:32.129180 CBFS @ c08000 size 3f8000
1707 18:50:32.135123 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1708 18:50:32.138454 CBFS: Locating 'fallback/dsdt.aml'
1709 18:50:32.141644 CBFS: Found @ offset 10bb80 size 3fa5
1710 18:50:32.148115 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1711 18:50:32.151529 CBFS @ c08000 size 3f8000
1712 18:50:32.154834 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1713 18:50:32.158243 CBFS: Locating 'fallback/slic'
1714 18:50:32.163322 CBFS: 'fallback/slic' not found.
1715 18:50:32.169796 ACPI: Writing ACPI tables at 99b3e000.
1716 18:50:32.170241 ACPI: * FACS
1717 18:50:32.173564 ACPI: * DSDT
1718 18:50:32.176676 Ramoops buffer: 0x100000@0x99a3d000.
1719 18:50:32.179561 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1720 18:50:32.186192 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1721 18:50:32.190117 Google Chrome EC: version:
1722 18:50:32.193139 ro: helios_v2.0.2659-56403530b
1723 18:50:32.196748 rw: helios_v2.0.2849-c41de27e7d
1724 18:50:32.197316 running image: 1
1725 18:50:32.200496 ACPI: * FADT
1726 18:50:32.200938 SCI is IRQ9
1727 18:50:32.207371 ACPI: added table 1/32, length now 40
1728 18:50:32.207782 ACPI: * SSDT
1729 18:50:32.210623 Found 1 CPU(s) with 8 core(s) each.
1730 18:50:32.213732 Error: Could not locate 'wifi_sar' in VPD.
1731 18:50:32.220469 Checking CBFS for default SAR values
1732 18:50:32.223652 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 18:50:32.226846 CBFS @ c08000 size 3f8000
1734 18:50:32.234127 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 18:50:32.236994 CBFS: Locating 'wifi_sar_defaults.hex'
1736 18:50:32.240326 CBFS: Found @ offset 5fac0 size 77
1737 18:50:32.243588 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1738 18:50:32.250532 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1739 18:50:32.253712 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1740 18:50:32.260164 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1741 18:50:32.263608 failed to find key in VPD: dsm_calib_r0_0
1742 18:50:32.273849 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1743 18:50:32.276593 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1744 18:50:32.279925 failed to find key in VPD: dsm_calib_r0_1
1745 18:50:32.289649 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1746 18:50:32.296556 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1747 18:50:32.299447 failed to find key in VPD: dsm_calib_r0_2
1748 18:50:32.309658 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1749 18:50:32.312754 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1750 18:50:32.319318 failed to find key in VPD: dsm_calib_r0_3
1751 18:50:32.325907 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1752 18:50:32.332550 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1753 18:50:32.336458 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1754 18:50:32.339650 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1755 18:50:32.343552 EC returned error result code 1
1756 18:50:32.347386 EC returned error result code 1
1757 18:50:32.350546 EC returned error result code 1
1758 18:50:32.357779 PS2K: Bad resp from EC. Vivaldi disabled!
1759 18:50:32.360462 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1760 18:50:32.367603 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1761 18:50:32.374266 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1762 18:50:32.377125 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1763 18:50:32.383695 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1764 18:50:32.390582 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1765 18:50:32.397502 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1766 18:50:32.400512 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1767 18:50:32.403493 ACPI: added table 2/32, length now 44
1768 18:50:32.406975 ACPI: * MCFG
1769 18:50:32.410100 ACPI: added table 3/32, length now 48
1770 18:50:32.413645 ACPI: * TPM2
1771 18:50:32.417422 TPM2 log created at 99a2d000
1772 18:50:32.420845 ACPI: added table 4/32, length now 52
1773 18:50:32.420949 ACPI: * MADT
1774 18:50:32.424108 SCI is IRQ9
1775 18:50:32.426991 ACPI: added table 5/32, length now 56
1776 18:50:32.427085 current = 99b43ac0
1777 18:50:32.430153 ACPI: * DMAR
1778 18:50:32.433490 ACPI: added table 6/32, length now 60
1779 18:50:32.436664 ACPI: * IGD OpRegion
1780 18:50:32.436752 GMA: Found VBT in CBFS
1781 18:50:32.439989 GMA: Found valid VBT in CBFS
1782 18:50:32.443831 ACPI: added table 7/32, length now 64
1783 18:50:32.447065 ACPI: * HPET
1784 18:50:32.450302 ACPI: added table 8/32, length now 68
1785 18:50:32.450382 ACPI: done.
1786 18:50:32.453651 ACPI tables: 31744 bytes.
1787 18:50:32.457346 smbios_write_tables: 99a2c000
1788 18:50:32.460499 EC returned error result code 3
1789 18:50:32.463670 Couldn't obtain OEM name from CBI
1790 18:50:32.467125 Create SMBIOS type 17
1791 18:50:32.470328 PCI: 00:00.0 (Intel Cannonlake)
1792 18:50:32.473544 PCI: 00:14.3 (Intel WiFi)
1793 18:50:32.476803 SMBIOS tables: 939 bytes.
1794 18:50:32.480054 Writing table forward entry at 0x00000500
1795 18:50:32.487198 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1796 18:50:32.490496 Writing coreboot table at 0x99b62000
1797 18:50:32.496691 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1798 18:50:32.500345 1. 0000000000001000-000000000009ffff: RAM
1799 18:50:32.503884 2. 00000000000a0000-00000000000fffff: RESERVED
1800 18:50:32.510391 3. 0000000000100000-0000000099a2bfff: RAM
1801 18:50:32.513091 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1802 18:50:32.520066 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1803 18:50:32.526813 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1804 18:50:32.530354 7. 000000009a000000-000000009f7fffff: RESERVED
1805 18:50:32.536381 8. 00000000e0000000-00000000efffffff: RESERVED
1806 18:50:32.539741 9. 00000000fc000000-00000000fc000fff: RESERVED
1807 18:50:32.543165 10. 00000000fe000000-00000000fe00ffff: RESERVED
1808 18:50:32.549511 11. 00000000fed10000-00000000fed17fff: RESERVED
1809 18:50:32.552875 12. 00000000fed80000-00000000fed83fff: RESERVED
1810 18:50:32.559397 13. 00000000fed90000-00000000fed91fff: RESERVED
1811 18:50:32.562897 14. 00000000feda0000-00000000feda1fff: RESERVED
1812 18:50:32.566257 15. 0000000100000000-000000045e7fffff: RAM
1813 18:50:32.572758 Graphics framebuffer located at 0xc0000000
1814 18:50:32.576006 Passing 5 GPIOs to payload:
1815 18:50:32.579322 NAME | PORT | POLARITY | VALUE
1816 18:50:32.586485 write protect | undefined | high | low
1817 18:50:32.589674 lid | undefined | high | high
1818 18:50:32.596161 power | undefined | high | low
1819 18:50:32.602609 oprom | undefined | high | low
1820 18:50:32.605828 EC in RW | 0x000000cb | high | low
1821 18:50:32.609537 Board ID: 4
1822 18:50:32.612954 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1823 18:50:32.616187 CBFS @ c08000 size 3f8000
1824 18:50:32.622980 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1825 18:50:32.626103 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1826 18:50:32.629118 coreboot table: 1492 bytes.
1827 18:50:32.632401 IMD ROOT 0. 99fff000 00001000
1828 18:50:32.635445 IMD SMALL 1. 99ffe000 00001000
1829 18:50:32.639306 FSP MEMORY 2. 99c4e000 003b0000
1830 18:50:32.642529 CONSOLE 3. 99c2e000 00020000
1831 18:50:32.645700 FMAP 4. 99c2d000 0000054e
1832 18:50:32.649281 TIME STAMP 5. 99c2c000 00000910
1833 18:50:32.652170 VBOOT WORK 6. 99c18000 00014000
1834 18:50:32.655678 MRC DATA 7. 99c16000 00001958
1835 18:50:32.658985 ROMSTG STCK 8. 99c15000 00001000
1836 18:50:32.662409 AFTER CAR 9. 99c0b000 0000a000
1837 18:50:32.665771 RAMSTAGE 10. 99baf000 0005c000
1838 18:50:32.668788 REFCODE 11. 99b7a000 00035000
1839 18:50:32.672548 SMM BACKUP 12. 99b6a000 00010000
1840 18:50:32.675728 COREBOOT 13. 99b62000 00008000
1841 18:50:32.679028 ACPI 14. 99b3e000 00024000
1842 18:50:32.682148 ACPI GNVS 15. 99b3d000 00001000
1843 18:50:32.685489 RAMOOPS 16. 99a3d000 00100000
1844 18:50:32.688730 TPM2 TCGLOG17. 99a2d000 00010000
1845 18:50:32.691914 SMBIOS 18. 99a2c000 00000800
1846 18:50:32.695836 IMD small region:
1847 18:50:32.698767 IMD ROOT 0. 99ffec00 00000400
1848 18:50:32.701785 FSP RUNTIME 1. 99ffebe0 00000004
1849 18:50:32.705735 EC HOSTEVENT 2. 99ffebc0 00000008
1850 18:50:32.708852 POWER STATE 3. 99ffeb80 00000040
1851 18:50:32.712129 ROMSTAGE 4. 99ffeb60 00000004
1852 18:50:32.715128 MEM INFO 5. 99ffe9a0 000001b9
1853 18:50:32.719014 VPD 6. 99ffe920 0000006c
1854 18:50:32.722326 MTRR: Physical address space:
1855 18:50:32.728577 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1856 18:50:32.735359 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1857 18:50:32.741733 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1858 18:50:32.748390 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1859 18:50:32.755168 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1860 18:50:32.762186 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1861 18:50:32.768511 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1862 18:50:32.771471 MTRR: Fixed MSR 0x250 0x0606060606060606
1863 18:50:32.775082 MTRR: Fixed MSR 0x258 0x0606060606060606
1864 18:50:32.778498 MTRR: Fixed MSR 0x259 0x0000000000000000
1865 18:50:32.781539 MTRR: Fixed MSR 0x268 0x0606060606060606
1866 18:50:32.788526 MTRR: Fixed MSR 0x269 0x0606060606060606
1867 18:50:32.791294 MTRR: Fixed MSR 0x26a 0x0606060606060606
1868 18:50:32.794509 MTRR: Fixed MSR 0x26b 0x0606060606060606
1869 18:50:32.798271 MTRR: Fixed MSR 0x26c 0x0606060606060606
1870 18:50:32.804876 MTRR: Fixed MSR 0x26d 0x0606060606060606
1871 18:50:32.807812 MTRR: Fixed MSR 0x26e 0x0606060606060606
1872 18:50:32.811368 MTRR: Fixed MSR 0x26f 0x0606060606060606
1873 18:50:32.814749 call enable_fixed_mtrr()
1874 18:50:32.817849 CPU physical address size: 39 bits
1875 18:50:32.824458 MTRR: default type WB/UC MTRR counts: 6/8.
1876 18:50:32.827556 MTRR: WB selected as default type.
1877 18:50:32.831225 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1878 18:50:32.837545 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1879 18:50:32.844113 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1880 18:50:32.851052 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1881 18:50:32.857372 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1882 18:50:32.863857 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1883 18:50:32.867229 MTRR: Fixed MSR 0x250 0x0606060606060606
1884 18:50:32.873675 MTRR: Fixed MSR 0x258 0x0606060606060606
1885 18:50:32.877003 MTRR: Fixed MSR 0x259 0x0000000000000000
1886 18:50:32.880691 MTRR: Fixed MSR 0x268 0x0606060606060606
1887 18:50:32.884018 MTRR: Fixed MSR 0x269 0x0606060606060606
1888 18:50:32.890617 MTRR: Fixed MSR 0x26a 0x0606060606060606
1889 18:50:32.894440 MTRR: Fixed MSR 0x26b 0x0606060606060606
1890 18:50:32.897215 MTRR: Fixed MSR 0x26c 0x0606060606060606
1891 18:50:32.900039 MTRR: Fixed MSR 0x26d 0x0606060606060606
1892 18:50:32.907057 MTRR: Fixed MSR 0x26e 0x0606060606060606
1893 18:50:32.910344 MTRR: Fixed MSR 0x26f 0x0606060606060606
1894 18:50:32.910462
1895 18:50:32.910568 MTRR check
1896 18:50:32.913498 call enable_fixed_mtrr()
1897 18:50:32.916611 Fixed MTRRs : Enabled
1898 18:50:32.920156 Variable MTRRs: Enabled
1899 18:50:32.920274
1900 18:50:32.923181 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 18:50:32.927133 MTRR: Fixed MSR 0x250 0x0606060606060606
1902 18:50:32.929758 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 18:50:32.936532 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 18:50:32.939681 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 18:50:32.943295 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 18:50:32.946361 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 18:50:32.952846 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 18:50:32.956395 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 18:50:32.960031 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 18:50:32.963129 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 18:50:32.969717 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 18:50:32.973002 MTRR: Fixed MSR 0x258 0x0606060606060606
1913 18:50:32.976417 call enable_fixed_mtrr()
1914 18:50:32.979650 MTRR: Fixed MSR 0x259 0x0000000000000000
1915 18:50:32.982964 MTRR: Fixed MSR 0x268 0x0606060606060606
1916 18:50:32.986287 MTRR: Fixed MSR 0x269 0x0606060606060606
1917 18:50:32.992858 MTRR: Fixed MSR 0x26a 0x0606060606060606
1918 18:50:32.996044 MTRR: Fixed MSR 0x26b 0x0606060606060606
1919 18:50:32.999225 MTRR: Fixed MSR 0x26c 0x0606060606060606
1920 18:50:33.002941 MTRR: Fixed MSR 0x26d 0x0606060606060606
1921 18:50:33.009806 MTRR: Fixed MSR 0x26e 0x0606060606060606
1922 18:50:33.012630 MTRR: Fixed MSR 0x26f 0x0606060606060606
1923 18:50:33.015780 CPU physical address size: 39 bits
1924 18:50:33.019337 call enable_fixed_mtrr()
1925 18:50:33.022665 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 18:50:33.025987 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 18:50:33.029281 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 18:50:33.035896 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 18:50:33.039162 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 18:50:33.042277 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 18:50:33.045543 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 18:50:33.052319 MTRR: Fixed MSR 0x250 0x0606060606060606
1933 18:50:33.055794 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 18:50:33.058894 MTRR: Fixed MSR 0x259 0x0000000000000000
1935 18:50:33.062739 MTRR: Fixed MSR 0x268 0x0606060606060606
1936 18:50:33.069027 MTRR: Fixed MSR 0x269 0x0606060606060606
1937 18:50:33.072315 MTRR: Fixed MSR 0x26a 0x0606060606060606
1938 18:50:33.075609 MTRR: Fixed MSR 0x26b 0x0606060606060606
1939 18:50:33.079012 MTRR: Fixed MSR 0x26c 0x0606060606060606
1940 18:50:33.085551 MTRR: Fixed MSR 0x26d 0x0606060606060606
1941 18:50:33.088970 MTRR: Fixed MSR 0x26e 0x0606060606060606
1942 18:50:33.092213 MTRR: Fixed MSR 0x26f 0x0606060606060606
1943 18:50:33.095336 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 18:50:33.098653 call enable_fixed_mtrr()
1945 18:50:33.102062 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 18:50:33.105400 CPU physical address size: 39 bits
1947 18:50:33.111805 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 18:50:33.115023 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 18:50:33.118437 CPU physical address size: 39 bits
1950 18:50:33.121646 call enable_fixed_mtrr()
1951 18:50:33.125322 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 18:50:33.128506 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 18:50:33.131996 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 18:50:33.138352 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 18:50:33.141709 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 18:50:33.145006 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 18:50:33.148400 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 18:50:33.154833 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 18:50:33.158035 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 18:50:33.161770 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 18:50:33.164766 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 18:50:33.171234 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 18:50:33.171356 call enable_fixed_mtrr()
1964 18:50:33.177949 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 18:50:33.181170 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 18:50:33.184785 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 18:50:33.188507 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 18:50:33.195025 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 18:50:33.197640 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 18:50:33.201306 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 18:50:33.204163 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 18:50:33.211320 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 18:50:33.214562 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 18:50:33.217904 CPU physical address size: 39 bits
1975 18:50:33.220988 call enable_fixed_mtrr()
1976 18:50:33.224347 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1977 18:50:33.230683 CPU physical address size: 39 bits
1978 18:50:33.234455 CPU physical address size: 39 bits
1979 18:50:33.237551 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1980 18:50:33.241208 CPU physical address size: 39 bits
1981 18:50:33.244080 CBFS @ c08000 size 3f8000
1982 18:50:33.250595 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1983 18:50:33.253918 CBFS: Locating 'fallback/payload'
1984 18:50:33.257540 CBFS: Found @ offset 1c96c0 size 3f798
1985 18:50:33.263769 Checking segment from ROM address 0xffdd16f8
1986 18:50:33.267234 Checking segment from ROM address 0xffdd1714
1987 18:50:33.270801 Loading segment from ROM address 0xffdd16f8
1988 18:50:33.273715 code (compression=0)
1989 18:50:33.284158 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1990 18:50:33.290557 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1991 18:50:33.293844 it's not compressed!
1992 18:50:33.385474 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1993 18:50:33.392096 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1994 18:50:33.395099 Loading segment from ROM address 0xffdd1714
1995 18:50:33.398871 Entry Point 0x30000000
1996 18:50:33.401521 Loaded segments
1997 18:50:33.407869 Finalizing chipset.
1998 18:50:33.410567 Finalizing SMM.
1999 18:50:33.414300 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2000 18:50:33.417742 mp_park_aps done after 0 msecs.
2001 18:50:33.424142 Jumping to boot code at 30000000(99b62000)
2002 18:50:33.430895 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2003 18:50:33.431012
2004 18:50:33.431086
2005 18:50:33.431158
2006 18:50:33.433904 Starting depthcharge on Helios...
2007 18:50:33.433997
2008 18:50:33.434364 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2009 18:50:33.434472 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2010 18:50:33.434564 Setting prompt string to ['hatch:']
2011 18:50:33.434653 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2012 18:50:33.443939 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2013 18:50:33.444073
2014 18:50:33.450726 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2015 18:50:33.450833
2016 18:50:33.457413 board_setup: Info: eMMC controller not present; skipping
2017 18:50:33.457518
2018 18:50:33.460173 New NVMe Controller 0x30053ac0 @ 00:1d:00
2019 18:50:33.460308
2020 18:50:33.467239 board_setup: Info: SDHCI controller not present; skipping
2021 18:50:33.467332
2022 18:50:33.470579 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2023 18:50:33.473801
2024 18:50:33.473879 Wipe memory regions:
2025 18:50:33.473948
2026 18:50:33.477033 [0x00000000001000, 0x000000000a0000)
2027 18:50:33.477119
2028 18:50:33.480223 [0x00000000100000, 0x00000030000000)
2029 18:50:33.546681
2030 18:50:33.549838 [0x00000030657430, 0x00000099a2c000)
2031 18:50:33.696617
2032 18:50:33.699820 [0x00000100000000, 0x0000045e800000)
2033 18:50:35.155691
2034 18:50:35.155832 R8152: Initializing
2035 18:50:35.155907
2036 18:50:35.158824 Version 9 (ocp_data = 6010)
2037 18:50:35.163154
2038 18:50:35.163252 R8152: Done initializing
2039 18:50:35.163325
2040 18:50:35.166495 Adding net device
2041 18:50:35.649771
2042 18:50:35.650025 R8152: Initializing
2043 18:50:35.650266
2044 18:50:35.652438 Version 6 (ocp_data = 5c30)
2045 18:50:35.652730
2046 18:50:35.655782 R8152: Done initializing
2047 18:50:35.655894
2048 18:50:35.658982 net_add_device: Attemp to include the same device
2049 18:50:35.662587
2050 18:50:35.670303 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2051 18:50:35.670411
2052 18:50:35.670495
2053 18:50:35.670571
2054 18:50:35.670885 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2056 18:50:35.771458 hatch: tftpboot 192.168.201.1 12909589/tftp-deploy-wo5pn23h/kernel/bzImage 12909589/tftp-deploy-wo5pn23h/kernel/cmdline 12909589/tftp-deploy-wo5pn23h/ramdisk/ramdisk.cpio.gz
2057 18:50:35.771997 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2058 18:50:35.772605 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2059 18:50:35.776948 tftpboot 192.168.201.1 12909589/tftp-deploy-wo5pn23h/kernel/bzIploy-wo5pn23h/kernel/cmdline 12909589/tftp-deploy-wo5pn23h/ramdisk/ramdisk.cpio.gz
2060 18:50:35.777425
2061 18:50:35.777902 Waiting for link
2062 18:50:35.978039
2063 18:50:35.978652 done.
2064 18:50:35.979104
2065 18:50:35.979684 MAC: 00:24:32:50:1a:59
2066 18:50:35.980322
2067 18:50:35.981245 Sending DHCP discover... done.
2068 18:50:35.981599
2069 18:50:35.984541 Waiting for reply... done.
2070 18:50:35.985103
2071 18:50:35.988525 Sending DHCP request... done.
2072 18:50:35.989086
2073 18:50:36.004830 Waiting for reply... done.
2074 18:50:36.005290
2075 18:50:36.005616 My ip is 192.168.201.14
2076 18:50:36.006003
2077 18:50:36.007941 The DHCP server ip is 192.168.201.1
2078 18:50:36.011045
2079 18:50:36.014482 TFTP server IP predefined by user: 192.168.201.1
2080 18:50:36.014929
2081 18:50:36.020948 Bootfile predefined by user: 12909589/tftp-deploy-wo5pn23h/kernel/bzImage
2082 18:50:36.021386
2083 18:50:36.024526 Sending tftp read request... done.
2084 18:50:36.024959
2085 18:50:36.033975 Waiting for the transfer...
2086 18:50:36.034480
2087 18:50:36.607467 00000000 ################################################################
2088 18:50:36.607627
2089 18:50:37.180139 00080000 ################################################################
2090 18:50:37.180325
2091 18:50:37.737426 00100000 ################################################################
2092 18:50:37.737572
2093 18:50:38.284267 00180000 ################################################################
2094 18:50:38.284404
2095 18:50:38.837877 00200000 ################################################################
2096 18:50:38.838017
2097 18:50:39.362815 00280000 ################################################################
2098 18:50:39.362959
2099 18:50:39.892881 00300000 ################################################################
2100 18:50:39.893026
2101 18:50:40.417165 00380000 ################################################################
2102 18:50:40.417310
2103 18:50:40.956198 00400000 ################################################################
2104 18:50:40.956357
2105 18:50:41.516875 00480000 ################################################################
2106 18:50:41.517033
2107 18:50:42.062269 00500000 ################################################################
2108 18:50:42.062411
2109 18:50:42.626232 00580000 ################################################################
2110 18:50:42.626386
2111 18:50:43.173578 00600000 ################################################################
2112 18:50:43.173751
2113 18:50:43.725521 00680000 ################################################################
2114 18:50:43.725658
2115 18:50:44.268520 00700000 ################################################################
2116 18:50:44.268668
2117 18:50:44.800627 00780000 ################################################################
2118 18:50:44.800771
2119 18:50:45.357698 00800000 ################################################################
2120 18:50:45.357874
2121 18:50:45.902246 00880000 ################################################################
2122 18:50:45.902392
2123 18:50:46.441430 00900000 ################################################################
2124 18:50:46.441597
2125 18:50:46.992544 00980000 ################################################################
2126 18:50:46.992689
2127 18:50:47.544004 00a00000 ################################################################
2128 18:50:47.544149
2129 18:50:48.078270 00a80000 ################################################################
2130 18:50:48.078410
2131 18:50:48.732982 00b00000 ################################################################
2132 18:50:48.733485
2133 18:50:49.121544 00b80000 #################################### done.
2134 18:50:49.122051
2135 18:50:49.125131 The bootfile was 12349440 bytes long.
2136 18:50:49.125782
2137 18:50:49.128673 Sending tftp read request... done.
2138 18:50:49.129087
2139 18:50:49.131610 Waiting for the transfer...
2140 18:50:49.132109
2141 18:50:49.832356 00000000 ################################################################
2142 18:50:49.832862
2143 18:50:50.520543 00080000 ################################################################
2144 18:50:50.521137
2145 18:50:51.205870 00100000 ################################################################
2146 18:50:51.206356
2147 18:50:51.848204 00180000 ################################################################
2148 18:50:51.848372
2149 18:50:52.497095 00200000 ################################################################
2150 18:50:52.497639
2151 18:50:53.175139 00280000 ################################################################
2152 18:50:53.175829
2153 18:50:53.820900 00300000 ################################################################
2154 18:50:53.821426
2155 18:50:54.496565 00380000 ################################################################
2156 18:50:54.497128
2157 18:50:55.171742 00400000 ################################################################
2158 18:50:55.172342
2159 18:50:55.864442 00480000 ################################################################
2160 18:50:55.864975
2161 18:50:56.557773 00500000 ################################################################
2162 18:50:56.558313
2163 18:50:57.254852 00580000 ################################################################
2164 18:50:57.255375
2165 18:50:57.395719 00600000 ############# done.
2166 18:50:57.396212
2167 18:50:57.398855 Sending tftp read request... done.
2168 18:50:57.399322
2169 18:50:57.401853 Waiting for the transfer...
2170 18:50:57.402326
2171 18:50:57.402712 00000000 # done.
2172 18:50:57.403028
2173 18:50:57.412114 Command line loaded dynamically from TFTP file: 12909589/tftp-deploy-wo5pn23h/kernel/cmdline
2174 18:50:57.412587
2175 18:50:57.441852 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12909589/extract-nfsrootfs-3lyxbsvw,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2176 18:50:57.442290
2177 18:50:57.448418 ec_init(0): CrosEC protocol v3 supported (256, 256)
2178 18:50:57.452640
2179 18:50:57.455890 Shutting down all USB controllers.
2180 18:50:57.456330
2181 18:50:57.456660 Removing current net device
2182 18:50:57.460282
2183 18:50:57.460702 Finalizing coreboot
2184 18:50:57.461034
2185 18:50:57.466886 Exiting depthcharge with code 4 at timestamp: 31394413
2186 18:50:57.467303
2187 18:50:57.467628
2188 18:50:57.467935 Starting kernel ...
2189 18:50:57.468229
2190 18:50:57.468554
2191 18:50:57.469767 end: 2.2.4 bootloader-commands (duration 00:00:24) [common]
2192 18:50:57.470250 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2193 18:50:57.470608 Setting prompt string to ['Linux version [0-9]']
2194 18:50:57.470950 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2195 18:50:57.471282 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2197 18:55:15.471214 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2199 18:55:15.472488 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2201 18:55:15.473796 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2204 18:55:15.475235 end: 2 depthcharge-action (duration 00:05:00) [common]
2206 18:55:15.476366 Cleaning after the job
2207 18:55:15.476916 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909589/tftp-deploy-wo5pn23h/ramdisk
2208 18:55:15.481893 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909589/tftp-deploy-wo5pn23h/kernel
2209 18:55:15.490744 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909589/tftp-deploy-wo5pn23h/nfsrootfs
2210 18:55:15.638404 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12909589/tftp-deploy-wo5pn23h/modules
2211 18:55:15.639169 start: 4.1 power-off (timeout 00:00:30) [common]
2212 18:55:15.639360 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2213 18:55:15.720242 >> Command sent successfully.
2214 18:55:15.723706 Returned 0 in 0 seconds
2215 18:55:15.824688 end: 4.1 power-off (duration 00:00:00) [common]
2217 18:55:15.826312 start: 4.2 read-feedback (timeout 00:10:00) [common]
2218 18:55:15.827571 Listened to connection for namespace 'common' for up to 1s
2220 18:55:15.828993 Listened to connection for namespace 'common' for up to 1s
2221 18:55:16.828128 Finalising connection for namespace 'common'
2222 18:55:16.828346 Disconnecting from shell: Finalise
2223 18:55:16.828472
2224 18:55:16.929113 end: 4.2 read-feedback (duration 00:00:01) [common]
2225 18:55:16.929716 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12909589
2226 18:55:17.536975 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12909589
2227 18:55:17.537217 JobError: Your job cannot terminate cleanly.