Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 08:28:10.433222 lava-dispatcher, installed at version: 2024.01
2 08:28:10.433432 start: 0 validate
3 08:28:10.433562 Start time: 2024-04-03 08:28:10.433552+00:00 (UTC)
4 08:28:10.433675 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:28:10.433800 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 08:28:10.696563 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:28:10.697483 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.310-cip108-146-g11e6e1e552ab6%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:28:10.959458 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:28:10.960265 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.310-cip108-146-g11e6e1e552ab6%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 08:28:23.452629 validate duration: 13.02
12 08:28:23.453918 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 08:28:23.454497 start: 1.1 download-retry (timeout 00:10:00) [common]
14 08:28:23.455033 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 08:28:23.455660 Not decompressing ramdisk as can be used compressed.
16 08:28:23.456181 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 08:28:23.456588 saving as /var/lib/lava/dispatcher/tmp/13238245/tftp-deploy-m3p53_xx/ramdisk/rootfs.cpio.gz
18 08:28:23.457200 total size: 8417901 (8 MB)
19 08:28:24.857877 progress 0 % (0 MB)
20 08:28:24.872544 progress 5 % (0 MB)
21 08:28:24.886340 progress 10 % (0 MB)
22 08:28:24.894286 progress 15 % (1 MB)
23 08:28:24.900033 progress 20 % (1 MB)
24 08:28:24.904589 progress 25 % (2 MB)
25 08:28:24.908636 progress 30 % (2 MB)
26 08:28:24.911973 progress 35 % (2 MB)
27 08:28:24.915339 progress 40 % (3 MB)
28 08:28:24.918338 progress 45 % (3 MB)
29 08:28:24.921289 progress 50 % (4 MB)
30 08:28:24.923872 progress 55 % (4 MB)
31 08:28:24.926406 progress 60 % (4 MB)
32 08:28:24.928553 progress 65 % (5 MB)
33 08:28:24.930880 progress 70 % (5 MB)
34 08:28:24.933103 progress 75 % (6 MB)
35 08:28:24.935348 progress 80 % (6 MB)
36 08:28:24.937666 progress 85 % (6 MB)
37 08:28:24.939946 progress 90 % (7 MB)
38 08:28:24.942274 progress 95 % (7 MB)
39 08:28:24.944357 progress 100 % (8 MB)
40 08:28:24.944591 8 MB downloaded in 1.49 s (5.40 MB/s)
41 08:28:24.944747 end: 1.1.1 http-download (duration 00:00:01) [common]
43 08:28:24.944986 end: 1.1 download-retry (duration 00:00:01) [common]
44 08:28:24.945073 start: 1.2 download-retry (timeout 00:09:59) [common]
45 08:28:24.945158 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 08:28:24.945303 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.310-cip108-146-g11e6e1e552ab6/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 08:28:24.945374 saving as /var/lib/lava/dispatcher/tmp/13238245/tftp-deploy-m3p53_xx/kernel/bzImage
48 08:28:24.945435 total size: 17068032 (16 MB)
49 08:28:24.945497 No compression specified
50 08:28:25.204906 progress 0 % (0 MB)
51 08:28:25.231916 progress 5 % (0 MB)
52 08:28:25.248066 progress 10 % (1 MB)
53 08:28:25.257043 progress 15 % (2 MB)
54 08:28:25.264173 progress 20 % (3 MB)
55 08:28:25.270179 progress 25 % (4 MB)
56 08:28:25.275465 progress 30 % (4 MB)
57 08:28:25.280172 progress 35 % (5 MB)
58 08:28:25.284721 progress 40 % (6 MB)
59 08:28:25.289169 progress 45 % (7 MB)
60 08:28:25.293631 progress 50 % (8 MB)
61 08:28:25.298067 progress 55 % (8 MB)
62 08:28:25.302515 progress 60 % (9 MB)
63 08:28:25.307002 progress 65 % (10 MB)
64 08:28:25.311532 progress 70 % (11 MB)
65 08:28:25.316054 progress 75 % (12 MB)
66 08:28:25.320508 progress 80 % (13 MB)
67 08:28:25.324869 progress 85 % (13 MB)
68 08:28:25.329221 progress 90 % (14 MB)
69 08:28:25.333648 progress 95 % (15 MB)
70 08:28:25.338359 progress 100 % (16 MB)
71 08:28:25.338594 16 MB downloaded in 0.39 s (41.40 MB/s)
72 08:28:25.338742 end: 1.2.1 http-download (duration 00:00:00) [common]
74 08:28:25.338976 end: 1.2 download-retry (duration 00:00:00) [common]
75 08:28:25.339069 start: 1.3 download-retry (timeout 00:09:58) [common]
76 08:28:25.339157 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 08:28:25.339299 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.310-cip108-146-g11e6e1e552ab6/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 08:28:25.339370 saving as /var/lib/lava/dispatcher/tmp/13238245/tftp-deploy-m3p53_xx/modules/modules.tar
79 08:28:25.339432 total size: 955892 (0 MB)
80 08:28:25.339496 Using unxz to decompress xz
81 08:28:25.343861 progress 3 % (0 MB)
82 08:28:25.344482 progress 10 % (0 MB)
83 08:28:25.348175 progress 17 % (0 MB)
84 08:28:25.351960 progress 23 % (0 MB)
85 08:28:25.356090 progress 30 % (0 MB)
86 08:28:25.359916 progress 37 % (0 MB)
87 08:28:25.363197 progress 44 % (0 MB)
88 08:28:25.367637 progress 51 % (0 MB)
89 08:28:25.371172 progress 58 % (0 MB)
90 08:28:25.375762 progress 65 % (0 MB)
91 08:28:25.379662 progress 71 % (0 MB)
92 08:28:25.383557 progress 78 % (0 MB)
93 08:28:25.387220 progress 85 % (0 MB)
94 08:28:25.391423 progress 92 % (0 MB)
95 08:28:25.395129 progress 99 % (0 MB)
96 08:28:25.402841 0 MB downloaded in 0.06 s (14.38 MB/s)
97 08:28:25.403082 end: 1.3.1 http-download (duration 00:00:00) [common]
99 08:28:25.403348 end: 1.3 download-retry (duration 00:00:00) [common]
100 08:28:25.403443 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
101 08:28:25.403538 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
102 08:28:25.403620 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 08:28:25.403703 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
104 08:28:25.403937 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj
105 08:28:25.404080 makedir: /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin
106 08:28:25.404192 makedir: /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/tests
107 08:28:25.404294 makedir: /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/results
108 08:28:25.404414 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-add-keys
109 08:28:25.404565 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-add-sources
110 08:28:25.404699 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-background-process-start
111 08:28:25.404833 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-background-process-stop
112 08:28:25.404964 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-common-functions
113 08:28:25.405095 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-echo-ipv4
114 08:28:25.405224 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-install-packages
115 08:28:25.405353 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-installed-packages
116 08:28:25.405481 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-os-build
117 08:28:25.405611 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-probe-channel
118 08:28:25.405741 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-probe-ip
119 08:28:25.405870 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-target-ip
120 08:28:25.405999 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-target-mac
121 08:28:25.406126 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-target-storage
122 08:28:25.406258 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-test-case
123 08:28:25.406387 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-test-event
124 08:28:25.406514 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-test-feedback
125 08:28:25.406641 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-test-raise
126 08:28:25.406772 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-test-reference
127 08:28:25.406905 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-test-runner
128 08:28:25.407037 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-test-set
129 08:28:25.407167 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-test-shell
130 08:28:25.407299 Updating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-install-packages (oe)
131 08:28:25.407459 Updating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/bin/lava-installed-packages (oe)
132 08:28:25.407587 Creating /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/environment
133 08:28:25.407689 LAVA metadata
134 08:28:25.407765 - LAVA_JOB_ID=13238245
135 08:28:25.407830 - LAVA_DISPATCHER_IP=192.168.201.1
136 08:28:25.407935 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
137 08:28:25.408003 skipped lava-vland-overlay
138 08:28:25.408086 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 08:28:25.408174 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
140 08:28:25.408238 skipped lava-multinode-overlay
141 08:28:25.408311 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 08:28:25.408394 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
143 08:28:25.408470 Loading test definitions
144 08:28:25.408563 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
145 08:28:25.408638 Using /lava-13238245 at stage 0
146 08:28:25.408966 uuid=13238245_1.4.2.3.1 testdef=None
147 08:28:25.409055 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 08:28:25.409140 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
149 08:28:25.409689 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 08:28:25.409911 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
152 08:28:25.410566 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 08:28:25.410795 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
155 08:28:25.411424 runner path: /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/0/tests/0_dmesg test_uuid 13238245_1.4.2.3.1
156 08:28:25.411586 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 08:28:25.411802 Creating lava-test-runner.conf files
159 08:28:25.411865 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13238245/lava-overlay-fdmgl3nj/lava-13238245/0 for stage 0
160 08:28:25.411956 - 0_dmesg
161 08:28:25.412058 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 08:28:25.412182 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
163 08:28:25.419344 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 08:28:25.419447 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
165 08:28:25.419532 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 08:28:25.419616 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 08:28:25.419700 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
168 08:28:25.675138 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
169 08:28:25.675549 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
170 08:28:25.675673 extracting modules file /var/lib/lava/dispatcher/tmp/13238245/tftp-deploy-m3p53_xx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13238245/extract-overlay-ramdisk-dnbbv9u0/ramdisk
171 08:28:25.705819 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 08:28:25.705996 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
173 08:28:25.706124 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13238245/compress-overlay-bea19kjr/overlay-1.4.2.4.tar.gz to ramdisk
174 08:28:25.706226 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13238245/compress-overlay-bea19kjr/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13238245/extract-overlay-ramdisk-dnbbv9u0/ramdisk
175 08:28:25.715055 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 08:28:25.715198 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
177 08:28:25.715323 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 08:28:25.715441 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
179 08:28:25.715547 Building ramdisk /var/lib/lava/dispatcher/tmp/13238245/extract-overlay-ramdisk-dnbbv9u0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13238245/extract-overlay-ramdisk-dnbbv9u0/ramdisk
180 08:28:25.884035 >> 59030 blocks
181 08:28:26.859443 rename /var/lib/lava/dispatcher/tmp/13238245/extract-overlay-ramdisk-dnbbv9u0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13238245/tftp-deploy-m3p53_xx/ramdisk/ramdisk.cpio.gz
182 08:28:26.859916 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
183 08:28:26.860101 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
184 08:28:26.860223 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
185 08:28:26.860325 No mkimage arch provided, not using FIT.
186 08:28:26.860422 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 08:28:26.860511 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 08:28:26.860615 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
189 08:28:26.860705 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
190 08:28:26.860793 No LXC device requested
191 08:28:26.860883 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 08:28:26.860975 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
193 08:28:26.861078 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 08:28:26.861151 Checking files for TFTP limit of 4294967296 bytes.
195 08:28:26.861630 end: 1 tftp-deploy (duration 00:00:03) [common]
196 08:28:26.861765 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 08:28:26.861863 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 08:28:26.862027 substitutions:
199 08:28:26.862098 - {DTB}: None
200 08:28:26.862164 - {INITRD}: 13238245/tftp-deploy-m3p53_xx/ramdisk/ramdisk.cpio.gz
201 08:28:26.862225 - {KERNEL}: 13238245/tftp-deploy-m3p53_xx/kernel/bzImage
202 08:28:26.862284 - {LAVA_MAC}: None
203 08:28:26.862348 - {PRESEED_CONFIG}: None
204 08:28:26.862407 - {PRESEED_LOCAL}: None
205 08:28:26.862462 - {RAMDISK}: 13238245/tftp-deploy-m3p53_xx/ramdisk/ramdisk.cpio.gz
206 08:28:26.862518 - {ROOT_PART}: None
207 08:28:26.862592 - {ROOT}: None
208 08:28:26.862676 - {SERVER_IP}: 192.168.201.1
209 08:28:26.862759 - {TEE}: None
210 08:28:26.862849 Parsed boot commands:
211 08:28:26.862933 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 08:28:26.863159 Parsed boot commands: tftpboot 192.168.201.1 13238245/tftp-deploy-m3p53_xx/kernel/bzImage 13238245/tftp-deploy-m3p53_xx/kernel/cmdline 13238245/tftp-deploy-m3p53_xx/ramdisk/ramdisk.cpio.gz
213 08:28:26.863285 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 08:28:26.863405 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 08:28:26.863529 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 08:28:26.863645 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 08:28:26.863746 Not connected, no need to disconnect.
218 08:28:26.863859 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 08:28:26.863973 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 08:28:26.864124 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
221 08:28:26.868349 Setting prompt string to ['lava-test: # ']
222 08:28:26.868723 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 08:28:26.868835 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 08:28:26.868933 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 08:28:26.869020 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 08:28:26.869219 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
227 08:28:32.022791 >> Command sent successfully.
228 08:28:32.034731 Returned 0 in 5 seconds
229 08:28:32.136112 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
231 08:28:32.137616 end: 2.2.2 reset-device (duration 00:00:05) [common]
232 08:28:32.138179 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
233 08:28:32.138702 Setting prompt string to 'Starting depthcharge on Helios...'
234 08:28:32.139089 Changing prompt to 'Starting depthcharge on Helios...'
235 08:28:32.139491 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
236 08:28:32.140898 [Enter `^Ec?' for help]
237 08:28:32.745790
238 08:28:32.747248
239 08:28:32.755424 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
240 08:28:32.758731 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
241 08:28:32.765605 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
242 08:28:32.768681 CPU: AES supported, TXT NOT supported, VT supported
243 08:28:32.775806 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
244 08:28:32.778891 PCH: device id 0284 (rev 00) is Cometlake-U Premium
245 08:28:32.785654 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
246 08:28:32.788700 VBOOT: Loading verstage.
247 08:28:32.791995 FMAP: Found "FLASH" version 1.1 at 0xc04000.
248 08:28:32.798368 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
249 08:28:32.802655 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
250 08:28:32.805331 CBFS @ c08000 size 3f8000
251 08:28:32.811898 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
252 08:28:32.814992 CBFS: Locating 'fallback/verstage'
253 08:28:32.818272 CBFS: Found @ offset 10fb80 size 1072c
254 08:28:32.822277
255 08:28:32.822743
256 08:28:32.832270 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
257 08:28:32.847461 Probing TPM: . done!
258 08:28:32.849895 TPM ready after 0 ms
259 08:28:32.852992 Connected to device vid:did:rid of 1ae0:0028:00
260 08:28:32.863440 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
261 08:28:32.867275 Initialized TPM device CR50 revision 0
262 08:28:32.914275 tlcl_send_startup: Startup return code is 0
263 08:28:32.914840 TPM: setup succeeded
264 08:28:32.927460 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
265 08:28:32.930591 Chrome EC: UHEPI supported
266 08:28:32.934003 Phase 1
267 08:28:32.936983 FMAP: area GBB found @ c05000 (12288 bytes)
268 08:28:32.943644 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
269 08:28:32.947873 Phase 2
270 08:28:32.948522 Phase 3
271 08:28:32.950350 FMAP: area GBB found @ c05000 (12288 bytes)
272 08:28:32.956781 VB2:vb2_report_dev_firmware() This is developer signed firmware
273 08:28:32.964148 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
274 08:28:32.967016 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
275 08:28:32.973963 VB2:vb2_verify_keyblock() Checking keyblock signature...
276 08:28:32.989439 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
277 08:28:32.992971 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
278 08:28:32.998935 VB2:vb2_verify_fw_preamble() Verifying preamble.
279 08:28:33.003496 Phase 4
280 08:28:33.006950 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
281 08:28:33.013939 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
282 08:28:33.193158 VB2:vb2_rsa_verify_digest() Digest check failed!
283 08:28:33.199471 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
284 08:28:33.200044 Saving nvdata
285 08:28:33.203546 Reboot requested (10020007)
286 08:28:33.206871 board_reset() called!
287 08:28:33.207437 full_reset() called!
288 08:28:37.712615
289 08:28:37.713200
290 08:28:37.722505 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
291 08:28:37.726072 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
292 08:28:37.732793 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
293 08:28:37.735717 CPU: AES supported, TXT NOT supported, VT supported
294 08:28:37.742296 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
295 08:28:37.745855 PCH: device id 0284 (rev 00) is Cometlake-U Premium
296 08:28:37.752368 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
297 08:28:37.755519 VBOOT: Loading verstage.
298 08:28:37.759255 FMAP: Found "FLASH" version 1.1 at 0xc04000.
299 08:28:37.765805 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
300 08:28:37.772599 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
301 08:28:37.773175 CBFS @ c08000 size 3f8000
302 08:28:37.779177 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
303 08:28:37.782228 CBFS: Locating 'fallback/verstage'
304 08:28:37.785571 CBFS: Found @ offset 10fb80 size 1072c
305 08:28:37.789607
306 08:28:37.790167
307 08:28:37.799404 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
308 08:28:37.813650 Probing TPM: . done!
309 08:28:37.817741 TPM ready after 0 ms
310 08:28:37.820477 Connected to device vid:did:rid of 1ae0:0028:00
311 08:28:37.830615 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
312 08:28:37.834154 Initialized TPM device CR50 revision 0
313 08:28:37.881229 tlcl_send_startup: Startup return code is 0
314 08:28:37.881784 TPM: setup succeeded
315 08:28:37.894147 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
316 08:28:37.897803 Chrome EC: UHEPI supported
317 08:28:37.901061 Phase 1
318 08:28:37.904172 FMAP: area GBB found @ c05000 (12288 bytes)
319 08:28:37.910909 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
320 08:28:37.918004 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
321 08:28:37.920740 Recovery requested (1009000e)
322 08:28:37.927358 Saving nvdata
323 08:28:37.932440 tlcl_extend: response is 0
324 08:28:37.941426 tlcl_extend: response is 0
325 08:28:37.948327 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
326 08:28:37.952014 CBFS @ c08000 size 3f8000
327 08:28:37.958514 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
328 08:28:37.961478 CBFS: Locating 'fallback/romstage'
329 08:28:37.965004 CBFS: Found @ offset 80 size 145fc
330 08:28:37.968130 Accumulated console time in verstage 98 ms
331 08:28:37.968620
332 08:28:37.968992
333 08:28:37.981824 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
334 08:28:37.987993 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
335 08:28:37.991649 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
336 08:28:37.994681 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
337 08:28:38.001358 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
338 08:28:38.005026 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
339 08:28:38.008628 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
340 08:28:38.011435 TCO_STS: 0000 0000
341 08:28:38.014899 GEN_PMCON: e0015238 00000200
342 08:28:38.018425 GBLRST_CAUSE: 00000000 00000000
343 08:28:38.018996 prev_sleep_state 5
344 08:28:38.021503 Boot Count incremented to 81390
345 08:28:38.028449 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
346 08:28:38.031368 CBFS @ c08000 size 3f8000
347 08:28:38.037526 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
348 08:28:38.037609 CBFS: Locating 'fspm.bin'
349 08:28:38.043816 CBFS: Found @ offset 5ffc0 size 71000
350 08:28:38.047369 Chrome EC: UHEPI supported
351 08:28:38.053890 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
352 08:28:38.057968 Probing TPM: done!
353 08:28:38.064302 Connected to device vid:did:rid of 1ae0:0028:00
354 08:28:38.074534 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
355 08:28:38.080312 Initialized TPM device CR50 revision 0
356 08:28:38.089292 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
357 08:28:38.095970 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
358 08:28:38.099453 MRC cache found, size 1948
359 08:28:38.102359 bootmode is set to: 2
360 08:28:38.106201 PRMRR disabled by config.
361 08:28:38.106537 SPD INDEX = 1
362 08:28:38.112538 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
363 08:28:38.116657 CBFS @ c08000 size 3f8000
364 08:28:38.122750 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
365 08:28:38.123338 CBFS: Locating 'spd.bin'
366 08:28:38.125704 CBFS: Found @ offset 5fb80 size 400
367 08:28:38.129469 SPD: module type is LPDDR3
368 08:28:38.132489 SPD: module part is
369 08:28:38.139336 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
370 08:28:38.142818 SPD: device width 4 bits, bus width 8 bits
371 08:28:38.146049 SPD: module size is 4096 MB (per channel)
372 08:28:38.149015 memory slot: 0 configuration done.
373 08:28:38.152364 memory slot: 2 configuration done.
374 08:28:38.204176 CBMEM:
375 08:28:38.208140 IMD: root @ 99fff000 254 entries.
376 08:28:38.210722 IMD: root @ 99ffec00 62 entries.
377 08:28:38.213847 External stage cache:
378 08:28:38.217309 IMD: root @ 9abff000 254 entries.
379 08:28:38.220490 IMD: root @ 9abfec00 62 entries.
380 08:28:38.223680 Chrome EC: clear events_b mask to 0x0000000020004000
381 08:28:38.240418 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
382 08:28:38.253551 tlcl_write: response is 0
383 08:28:38.262490 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
384 08:28:38.269120 MRC: TPM MRC hash updated successfully.
385 08:28:38.269735 2 DIMMs found
386 08:28:38.272140 SMM Memory Map
387 08:28:38.275910 SMRAM : 0x9a000000 0x1000000
388 08:28:38.279611 Subregion 0: 0x9a000000 0xa00000
389 08:28:38.282892 Subregion 1: 0x9aa00000 0x200000
390 08:28:38.286184 Subregion 2: 0x9ac00000 0x400000
391 08:28:38.289062 top_of_ram = 0x9a000000
392 08:28:38.292544 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
393 08:28:38.298943 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
394 08:28:38.302149 MTRR Range: Start=ff000000 End=0 (Size 1000000)
395 08:28:38.309146 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
396 08:28:38.312581 CBFS @ c08000 size 3f8000
397 08:28:38.315920 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
398 08:28:38.319228 CBFS: Locating 'fallback/postcar'
399 08:28:38.322134 CBFS: Found @ offset 107000 size 4b44
400 08:28:38.328988 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
401 08:28:38.341271 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
402 08:28:38.344512 Processing 180 relocs. Offset value of 0x97c0c000
403 08:28:38.353351 Accumulated console time in romstage 286 ms
404 08:28:38.353909
405 08:28:38.354332
406 08:28:38.363234 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
407 08:28:38.369157 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
408 08:28:38.372637 CBFS @ c08000 size 3f8000
409 08:28:38.379495 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
410 08:28:38.382666 CBFS: Locating 'fallback/ramstage'
411 08:28:38.385842 CBFS: Found @ offset 43380 size 1b9e8
412 08:28:38.392707 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
413 08:28:38.425371 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
414 08:28:38.428222 Processing 3976 relocs. Offset value of 0x98db0000
415 08:28:38.435045 Accumulated console time in postcar 52 ms
416 08:28:38.435616
417 08:28:38.435991
418 08:28:38.444718 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
419 08:28:38.451631 FMAP: area RO_VPD found @ c00000 (16384 bytes)
420 08:28:38.454667 WARNING: RO_VPD is uninitialized or empty.
421 08:28:38.458564 FMAP: area RW_VPD found @ af8000 (8192 bytes)
422 08:28:38.464640 FMAP: area RW_VPD found @ af8000 (8192 bytes)
423 08:28:38.465201 Normal boot.
424 08:28:38.471199 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
425 08:28:38.474912 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
426 08:28:38.477748 CBFS @ c08000 size 3f8000
427 08:28:38.485018 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
428 08:28:38.488110 CBFS: Locating 'cpu_microcode_blob.bin'
429 08:28:38.491705 CBFS: Found @ offset 14700 size 2ec00
430 08:28:38.495194 microcode: sig=0x806ec pf=0x4 revision=0xc9
431 08:28:38.498299 Skip microcode update
432 08:28:38.501069 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
433 08:28:38.504747 CBFS @ c08000 size 3f8000
434 08:28:38.511194 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
435 08:28:38.515758 CBFS: Locating 'fsps.bin'
436 08:28:38.517929 CBFS: Found @ offset d1fc0 size 35000
437 08:28:38.543160 Detected 4 core, 8 thread CPU.
438 08:28:38.546412 Setting up SMI for CPU
439 08:28:38.549849 IED base = 0x9ac00000
440 08:28:38.550417 IED size = 0x00400000
441 08:28:38.553023 Will perform SMM setup.
442 08:28:38.560024 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
443 08:28:38.566316 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
444 08:28:38.569561 Processing 16 relocs. Offset value of 0x00030000
445 08:28:38.573390 Attempting to start 7 APs
446 08:28:38.576488 Waiting for 10ms after sending INIT.
447 08:28:38.593029 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
448 08:28:38.593596 done.
449 08:28:38.596442 AP: slot 1 apic_id 3.
450 08:28:38.599760 AP: slot 4 apic_id 2.
451 08:28:38.603036 Waiting for 2nd SIPI to complete...done.
452 08:28:38.606069 AP: slot 3 apic_id 5.
453 08:28:38.606634 AP: slot 5 apic_id 4.
454 08:28:38.609415 AP: slot 7 apic_id 6.
455 08:28:38.612581 AP: slot 6 apic_id 7.
456 08:28:38.619100 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
457 08:28:38.626079 Processing 13 relocs. Offset value of 0x00038000
458 08:28:38.629244 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
459 08:28:38.635597 Installing SMM handler to 0x9a000000
460 08:28:38.643066 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
461 08:28:38.645874 Processing 658 relocs. Offset value of 0x9a010000
462 08:28:38.655818 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
463 08:28:38.659176 Processing 13 relocs. Offset value of 0x9a008000
464 08:28:38.665540 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
465 08:28:38.672717 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
466 08:28:38.679151 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
467 08:28:38.682161 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
468 08:28:38.688641 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
469 08:28:38.695778 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
470 08:28:38.698620 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
471 08:28:38.705137 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
472 08:28:38.709259 Clearing SMI status registers
473 08:28:38.711953 SMI_STS: PM1
474 08:28:38.712459 PM1_STS: PWRBTN
475 08:28:38.715448 TCO_STS: SECOND_TO
476 08:28:38.719282 New SMBASE 0x9a000000
477 08:28:38.722266 In relocation handler: CPU 0
478 08:28:38.725730 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
479 08:28:38.728810 Writing SMRR. base = 0x9a000006, mask=0xff000800
480 08:28:38.732228 Relocation complete.
481 08:28:38.735226 New SMBASE 0x99fff800
482 08:28:38.735705 In relocation handler: CPU 2
483 08:28:38.742055 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
484 08:28:38.745331 Writing SMRR. base = 0x9a000006, mask=0xff000800
485 08:28:38.748521 Relocation complete.
486 08:28:38.752360 New SMBASE 0x99fff400
487 08:28:38.752933 In relocation handler: CPU 3
488 08:28:38.758908 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
489 08:28:38.762273 Writing SMRR. base = 0x9a000006, mask=0xff000800
490 08:28:38.765203 Relocation complete.
491 08:28:38.765806 New SMBASE 0x99ffec00
492 08:28:38.768787 In relocation handler: CPU 5
493 08:28:38.775997 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
494 08:28:38.779126 Writing SMRR. base = 0x9a000006, mask=0xff000800
495 08:28:38.782432 Relocation complete.
496 08:28:38.783000 New SMBASE 0x99ffe800
497 08:28:38.785926 In relocation handler: CPU 6
498 08:28:38.788773 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
499 08:28:38.795250 Writing SMRR. base = 0x9a000006, mask=0xff000800
500 08:28:38.798883 Relocation complete.
501 08:28:38.799451 New SMBASE 0x99ffe400
502 08:28:38.801589 In relocation handler: CPU 7
503 08:28:38.805455 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
504 08:28:38.812146 Writing SMRR. base = 0x9a000006, mask=0xff000800
505 08:28:38.815722 Relocation complete.
506 08:28:38.816342 New SMBASE 0x99fffc00
507 08:28:38.818790 In relocation handler: CPU 1
508 08:28:38.821923 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
509 08:28:38.828706 Writing SMRR. base = 0x9a000006, mask=0xff000800
510 08:28:38.829292 Relocation complete.
511 08:28:38.831976 New SMBASE 0x99fff000
512 08:28:38.835281 In relocation handler: CPU 4
513 08:28:38.838433 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
514 08:28:38.845055 Writing SMRR. base = 0x9a000006, mask=0xff000800
515 08:28:38.845613 Relocation complete.
516 08:28:38.848695 Initializing CPU #0
517 08:28:38.851650 CPU: vendor Intel device 806ec
518 08:28:38.854740 CPU: family 06, model 8e, stepping 0c
519 08:28:38.858841 Clearing out pending MCEs
520 08:28:38.861870 Setting up local APIC...
521 08:28:38.862447 apic_id: 0x00 done.
522 08:28:38.865214 Turbo is available but hidden
523 08:28:38.868459 Turbo is available and visible
524 08:28:38.871850 VMX status: enabled
525 08:28:38.874903 IA32_FEATURE_CONTROL status: locked
526 08:28:38.878388 Skip microcode update
527 08:28:38.878953 CPU #0 initialized
528 08:28:38.881872 Initializing CPU #2
529 08:28:38.882441 Initializing CPU #7
530 08:28:38.885021 Initializing CPU #6
531 08:28:38.888358 CPU: vendor Intel device 806ec
532 08:28:38.891876 CPU: family 06, model 8e, stepping 0c
533 08:28:38.895041 CPU: vendor Intel device 806ec
534 08:28:38.898143 CPU: family 06, model 8e, stepping 0c
535 08:28:38.901752 Clearing out pending MCEs
536 08:28:38.904866 Clearing out pending MCEs
537 08:28:38.908211 Setting up local APIC...
538 08:28:38.909124 Initializing CPU #4
539 08:28:38.911773 Initializing CPU #1
540 08:28:38.914572 CPU: vendor Intel device 806ec
541 08:28:38.917696 CPU: family 06, model 8e, stepping 0c
542 08:28:38.921295 CPU: vendor Intel device 806ec
543 08:28:38.924569 CPU: family 06, model 8e, stepping 0c
544 08:28:38.927737 Clearing out pending MCEs
545 08:28:38.931270 Clearing out pending MCEs
546 08:28:38.931735 Setting up local APIC...
547 08:28:38.934546 apic_id: 0x07 done.
548 08:28:38.937630 Setting up local APIC...
549 08:28:38.938100 apic_id: 0x03 done.
550 08:28:38.941253 Setting up local APIC...
551 08:28:38.944493 Initializing CPU #3
552 08:28:38.944975 Initializing CPU #5
553 08:28:38.947943 CPU: vendor Intel device 806ec
554 08:28:38.954268 CPU: family 06, model 8e, stepping 0c
555 08:28:38.954742 CPU: vendor Intel device 806ec
556 08:28:38.960883 CPU: family 06, model 8e, stepping 0c
557 08:28:38.961451 Clearing out pending MCEs
558 08:28:38.964223 Clearing out pending MCEs
559 08:28:38.967338 Setting up local APIC...
560 08:28:38.971188 CPU: vendor Intel device 806ec
561 08:28:38.974273 CPU: family 06, model 8e, stepping 0c
562 08:28:38.977695 Clearing out pending MCEs
563 08:28:38.978392 apic_id: 0x05 done.
564 08:28:38.981130 apic_id: 0x02 done.
565 08:28:38.984123 VMX status: enabled
566 08:28:38.984627 VMX status: enabled
567 08:28:38.987561 IA32_FEATURE_CONTROL status: locked
568 08:28:38.994210 IA32_FEATURE_CONTROL status: locked
569 08:28:38.994684 Skip microcode update
570 08:28:38.997288 Skip microcode update
571 08:28:38.997806 CPU #1 initialized
572 08:28:39.001103 CPU #4 initialized
573 08:28:39.004275 Setting up local APIC...
574 08:28:39.004798 apic_id: 0x06 done.
575 08:28:39.007199 VMX status: enabled
576 08:28:39.010439 VMX status: enabled
577 08:28:39.014013 IA32_FEATURE_CONTROL status: locked
578 08:28:39.017749 IA32_FEATURE_CONTROL status: locked
579 08:28:39.020772 Skip microcode update
580 08:28:39.021194 Skip microcode update
581 08:28:39.024230 CPU #6 initialized
582 08:28:39.024666 CPU #7 initialized
583 08:28:39.027331 apic_id: 0x01 done.
584 08:28:39.030632 Setting up local APIC...
585 08:28:39.031352 VMX status: enabled
586 08:28:39.034832 apic_id: 0x04 done.
587 08:28:39.037122 VMX status: enabled
588 08:28:39.037726 VMX status: enabled
589 08:28:39.040432 IA32_FEATURE_CONTROL status: locked
590 08:28:39.043988 IA32_FEATURE_CONTROL status: locked
591 08:28:39.047282 Skip microcode update
592 08:28:39.050319 Skip microcode update
593 08:28:39.050743 CPU #3 initialized
594 08:28:39.053946 CPU #5 initialized
595 08:28:39.057316 IA32_FEATURE_CONTROL status: locked
596 08:28:39.060437 Skip microcode update
597 08:28:39.061013 CPU #2 initialized
598 08:28:39.066761 bsp_do_flight_plan done after 461 msecs.
599 08:28:39.070307 CPU: frequency set to 4200 MHz
600 08:28:39.070723 Enabling SMIs.
601 08:28:39.071063 Locking SMM.
602 08:28:39.087076 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
603 08:28:39.090163 CBFS @ c08000 size 3f8000
604 08:28:39.096766 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
605 08:28:39.097484 CBFS: Locating 'vbt.bin'
606 08:28:39.099972 CBFS: Found @ offset 5f5c0 size 499
607 08:28:39.106875 Found a VBT of 4608 bytes after decompression
608 08:28:39.291945 Display FSP Version Info HOB
609 08:28:39.295558 Reference Code - CPU = 9.0.1e.30
610 08:28:39.298711 uCode Version = 0.0.0.ca
611 08:28:39.302034 TXT ACM version = ff.ff.ff.ffff
612 08:28:39.304795 Display FSP Version Info HOB
613 08:28:39.308713 Reference Code - ME = 9.0.1e.30
614 08:28:39.311811 MEBx version = 0.0.0.0
615 08:28:39.314922 ME Firmware Version = Consumer SKU
616 08:28:39.318248 Display FSP Version Info HOB
617 08:28:39.321549 Reference Code - CML PCH = 9.0.1e.30
618 08:28:39.324704 PCH-CRID Status = Disabled
619 08:28:39.328245 PCH-CRID Original Value = ff.ff.ff.ffff
620 08:28:39.331616 PCH-CRID New Value = ff.ff.ff.ffff
621 08:28:39.335050 OPROM - RST - RAID = ff.ff.ff.ffff
622 08:28:39.338702 ChipsetInit Base Version = ff.ff.ff.ffff
623 08:28:39.341758 ChipsetInit Oem Version = ff.ff.ff.ffff
624 08:28:39.344867 Display FSP Version Info HOB
625 08:28:39.351945 Reference Code - SA - System Agent = 9.0.1e.30
626 08:28:39.355292 Reference Code - MRC = 0.7.1.6c
627 08:28:39.355868 SA - PCIe Version = 9.0.1e.30
628 08:28:39.358367 SA-CRID Status = Disabled
629 08:28:39.361481 SA-CRID Original Value = 0.0.0.c
630 08:28:39.364722 SA-CRID New Value = 0.0.0.c
631 08:28:39.367922 OPROM - VBIOS = ff.ff.ff.ffff
632 08:28:39.371459 RTC Init
633 08:28:39.374717 Set power on after power failure.
634 08:28:39.375188 Disabling Deep S3
635 08:28:39.377865 Disabling Deep S3
636 08:28:39.378330 Disabling Deep S4
637 08:28:39.381296 Disabling Deep S4
638 08:28:39.381760 Disabling Deep S5
639 08:28:39.384719 Disabling Deep S5
640 08:28:39.391244 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
641 08:28:39.391834 Enumerating buses...
642 08:28:39.398576 Show all devs... Before device enumeration.
643 08:28:39.399147 Root Device: enabled 1
644 08:28:39.401268 CPU_CLUSTER: 0: enabled 1
645 08:28:39.404922 DOMAIN: 0000: enabled 1
646 08:28:39.408324 APIC: 00: enabled 1
647 08:28:39.408899 PCI: 00:00.0: enabled 1
648 08:28:39.411485 PCI: 00:02.0: enabled 1
649 08:28:39.414953 PCI: 00:04.0: enabled 0
650 08:28:39.415519 PCI: 00:05.0: enabled 0
651 08:28:39.418576 PCI: 00:12.0: enabled 1
652 08:28:39.421817 PCI: 00:12.5: enabled 0
653 08:28:39.424813 PCI: 00:12.6: enabled 0
654 08:28:39.425387 PCI: 00:14.0: enabled 1
655 08:28:39.428108 PCI: 00:14.1: enabled 0
656 08:28:39.431207 PCI: 00:14.3: enabled 1
657 08:28:39.434610 PCI: 00:14.5: enabled 0
658 08:28:39.435199 PCI: 00:15.0: enabled 1
659 08:28:39.438048 PCI: 00:15.1: enabled 1
660 08:28:39.441147 PCI: 00:15.2: enabled 0
661 08:28:39.444200 PCI: 00:15.3: enabled 0
662 08:28:39.444672 PCI: 00:16.0: enabled 1
663 08:28:39.448111 PCI: 00:16.1: enabled 0
664 08:28:39.450777 PCI: 00:16.2: enabled 0
665 08:28:39.454338 PCI: 00:16.3: enabled 0
666 08:28:39.454902 PCI: 00:16.4: enabled 0
667 08:28:39.457884 PCI: 00:16.5: enabled 0
668 08:28:39.461203 PCI: 00:17.0: enabled 1
669 08:28:39.461675 PCI: 00:19.0: enabled 1
670 08:28:39.464474 PCI: 00:19.1: enabled 0
671 08:28:39.467389 PCI: 00:19.2: enabled 0
672 08:28:39.471132 PCI: 00:1a.0: enabled 0
673 08:28:39.471700 PCI: 00:1c.0: enabled 0
674 08:28:39.474150 PCI: 00:1c.1: enabled 0
675 08:28:39.477256 PCI: 00:1c.2: enabled 0
676 08:28:39.480624 PCI: 00:1c.3: enabled 0
677 08:28:39.481095 PCI: 00:1c.4: enabled 0
678 08:28:39.484713 PCI: 00:1c.5: enabled 0
679 08:28:39.487763 PCI: 00:1c.6: enabled 0
680 08:28:39.490614 PCI: 00:1c.7: enabled 0
681 08:28:39.491084 PCI: 00:1d.0: enabled 1
682 08:28:39.494004 PCI: 00:1d.1: enabled 0
683 08:28:39.497736 PCI: 00:1d.2: enabled 0
684 08:28:39.498333 PCI: 00:1d.3: enabled 0
685 08:28:39.500599 PCI: 00:1d.4: enabled 0
686 08:28:39.504316 PCI: 00:1d.5: enabled 1
687 08:28:39.507701 PCI: 00:1e.0: enabled 1
688 08:28:39.508332 PCI: 00:1e.1: enabled 0
689 08:28:39.510830 PCI: 00:1e.2: enabled 1
690 08:28:39.514179 PCI: 00:1e.3: enabled 1
691 08:28:39.517827 PCI: 00:1f.0: enabled 1
692 08:28:39.518393 PCI: 00:1f.1: enabled 1
693 08:28:39.520842 PCI: 00:1f.2: enabled 1
694 08:28:39.524396 PCI: 00:1f.3: enabled 1
695 08:28:39.524968 PCI: 00:1f.4: enabled 1
696 08:28:39.527412 PCI: 00:1f.5: enabled 1
697 08:28:39.531093 PCI: 00:1f.6: enabled 0
698 08:28:39.533803 USB0 port 0: enabled 1
699 08:28:39.534274 I2C: 00:15: enabled 1
700 08:28:39.537416 I2C: 00:5d: enabled 1
701 08:28:39.540618 GENERIC: 0.0: enabled 1
702 08:28:39.541184 I2C: 00:1a: enabled 1
703 08:28:39.544283 I2C: 00:38: enabled 1
704 08:28:39.547615 I2C: 00:39: enabled 1
705 08:28:39.548218 I2C: 00:3a: enabled 1
706 08:28:39.550713 I2C: 00:3b: enabled 1
707 08:28:39.554706 PCI: 00:00.0: enabled 1
708 08:28:39.555272 SPI: 00: enabled 1
709 08:28:39.557980 SPI: 01: enabled 1
710 08:28:39.560800 PNP: 0c09.0: enabled 1
711 08:28:39.561271 USB2 port 0: enabled 1
712 08:28:39.564288 USB2 port 1: enabled 1
713 08:28:39.567263 USB2 port 2: enabled 0
714 08:28:39.567738 USB2 port 3: enabled 0
715 08:28:39.570708 USB2 port 5: enabled 0
716 08:28:39.574717 USB2 port 6: enabled 1
717 08:28:39.577374 USB2 port 9: enabled 1
718 08:28:39.577843 USB3 port 0: enabled 1
719 08:28:39.580800 USB3 port 1: enabled 1
720 08:28:39.584001 USB3 port 2: enabled 1
721 08:28:39.584623 USB3 port 3: enabled 1
722 08:28:39.587523 USB3 port 4: enabled 0
723 08:28:39.590905 APIC: 03: enabled 1
724 08:28:39.591469 APIC: 01: enabled 1
725 08:28:39.594113 APIC: 05: enabled 1
726 08:28:39.597450 APIC: 02: enabled 1
727 08:28:39.598015 APIC: 04: enabled 1
728 08:28:39.600501 APIC: 07: enabled 1
729 08:28:39.601068 APIC: 06: enabled 1
730 08:28:39.603968 Compare with tree...
731 08:28:39.606913 Root Device: enabled 1
732 08:28:39.610449 CPU_CLUSTER: 0: enabled 1
733 08:28:39.611042 APIC: 00: enabled 1
734 08:28:39.613549 APIC: 03: enabled 1
735 08:28:39.617310 APIC: 01: enabled 1
736 08:28:39.617878 APIC: 05: enabled 1
737 08:28:39.620590 APIC: 02: enabled 1
738 08:28:39.623871 APIC: 04: enabled 1
739 08:28:39.624378 APIC: 07: enabled 1
740 08:28:39.627345 APIC: 06: enabled 1
741 08:28:39.630730 DOMAIN: 0000: enabled 1
742 08:28:39.633563 PCI: 00:00.0: enabled 1
743 08:28:39.634031 PCI: 00:02.0: enabled 1
744 08:28:39.637234 PCI: 00:04.0: enabled 0
745 08:28:39.640657 PCI: 00:05.0: enabled 0
746 08:28:39.643942 PCI: 00:12.0: enabled 1
747 08:28:39.646864 PCI: 00:12.5: enabled 0
748 08:28:39.647332 PCI: 00:12.6: enabled 0
749 08:28:39.650492 PCI: 00:14.0: enabled 1
750 08:28:39.653526 USB0 port 0: enabled 1
751 08:28:39.657227 USB2 port 0: enabled 1
752 08:28:39.660336 USB2 port 1: enabled 1
753 08:28:39.660906 USB2 port 2: enabled 0
754 08:28:39.663588 USB2 port 3: enabled 0
755 08:28:39.666869 USB2 port 5: enabled 0
756 08:28:39.670427 USB2 port 6: enabled 1
757 08:28:39.673634 USB2 port 9: enabled 1
758 08:28:39.674322 USB3 port 0: enabled 1
759 08:28:39.676840 USB3 port 1: enabled 1
760 08:28:39.680312 USB3 port 2: enabled 1
761 08:28:39.683540 USB3 port 3: enabled 1
762 08:28:39.687201 USB3 port 4: enabled 0
763 08:28:39.690218 PCI: 00:14.1: enabled 0
764 08:28:39.690792 PCI: 00:14.3: enabled 1
765 08:28:39.693391 PCI: 00:14.5: enabled 0
766 08:28:39.696683 PCI: 00:15.0: enabled 1
767 08:28:39.700614 I2C: 00:15: enabled 1
768 08:28:39.703900 PCI: 00:15.1: enabled 1
769 08:28:39.704516 I2C: 00:5d: enabled 1
770 08:28:39.706536 GENERIC: 0.0: enabled 1
771 08:28:39.710447 PCI: 00:15.2: enabled 0
772 08:28:39.713142 PCI: 00:15.3: enabled 0
773 08:28:39.713613 PCI: 00:16.0: enabled 1
774 08:28:39.716836 PCI: 00:16.1: enabled 0
775 08:28:39.719833 PCI: 00:16.2: enabled 0
776 08:28:39.723609 PCI: 00:16.3: enabled 0
777 08:28:39.726541 PCI: 00:16.4: enabled 0
778 08:28:39.727098 PCI: 00:16.5: enabled 0
779 08:28:39.730124 PCI: 00:17.0: enabled 1
780 08:28:39.733181 PCI: 00:19.0: enabled 1
781 08:28:39.736629 I2C: 00:1a: enabled 1
782 08:28:39.740041 I2C: 00:38: enabled 1
783 08:28:39.740664 I2C: 00:39: enabled 1
784 08:28:39.743131 I2C: 00:3a: enabled 1
785 08:28:39.746137 I2C: 00:3b: enabled 1
786 08:28:39.749937 PCI: 00:19.1: enabled 0
787 08:28:39.750502 PCI: 00:19.2: enabled 0
788 08:28:39.753286 PCI: 00:1a.0: enabled 0
789 08:28:39.756358 PCI: 00:1c.0: enabled 0
790 08:28:39.759741 PCI: 00:1c.1: enabled 0
791 08:28:39.762968 PCI: 00:1c.2: enabled 0
792 08:28:39.763548 PCI: 00:1c.3: enabled 0
793 08:28:39.765938 PCI: 00:1c.4: enabled 0
794 08:28:39.769420 PCI: 00:1c.5: enabled 0
795 08:28:39.772991 PCI: 00:1c.6: enabled 0
796 08:28:39.776631 PCI: 00:1c.7: enabled 0
797 08:28:39.777202 PCI: 00:1d.0: enabled 1
798 08:28:39.779530 PCI: 00:1d.1: enabled 0
799 08:28:39.782816 PCI: 00:1d.2: enabled 0
800 08:28:39.786167 PCI: 00:1d.3: enabled 0
801 08:28:39.789720 PCI: 00:1d.4: enabled 0
802 08:28:39.790290 PCI: 00:1d.5: enabled 1
803 08:28:39.792792 PCI: 00:00.0: enabled 1
804 08:28:39.796445 PCI: 00:1e.0: enabled 1
805 08:28:39.799387 PCI: 00:1e.1: enabled 0
806 08:28:39.802812 PCI: 00:1e.2: enabled 1
807 08:28:39.803437 SPI: 00: enabled 1
808 08:28:39.805931 PCI: 00:1e.3: enabled 1
809 08:28:39.809458 SPI: 01: enabled 1
810 08:28:39.810029 PCI: 00:1f.0: enabled 1
811 08:28:39.812458 PNP: 0c09.0: enabled 1
812 08:28:39.816296 PCI: 00:1f.1: enabled 1
813 08:28:39.819614 PCI: 00:1f.2: enabled 1
814 08:28:39.823402 PCI: 00:1f.3: enabled 1
815 08:28:39.824026 PCI: 00:1f.4: enabled 1
816 08:28:39.826148 PCI: 00:1f.5: enabled 1
817 08:28:39.829311 PCI: 00:1f.6: enabled 0
818 08:28:39.832342 Root Device scanning...
819 08:28:39.835610 scan_static_bus for Root Device
820 08:28:39.839451 CPU_CLUSTER: 0 enabled
821 08:28:39.840019 DOMAIN: 0000 enabled
822 08:28:39.842791 DOMAIN: 0000 scanning...
823 08:28:39.845794 PCI: pci_scan_bus for bus 00
824 08:28:39.849509 PCI: 00:00.0 [8086/0000] ops
825 08:28:39.852291 PCI: 00:00.0 [8086/9b61] enabled
826 08:28:39.855787 PCI: 00:02.0 [8086/0000] bus ops
827 08:28:39.859068 PCI: 00:02.0 [8086/9b41] enabled
828 08:28:39.862496 PCI: 00:04.0 [8086/1903] disabled
829 08:28:39.865796 PCI: 00:08.0 [8086/1911] enabled
830 08:28:39.868999 PCI: 00:12.0 [8086/02f9] enabled
831 08:28:39.872542 PCI: 00:14.0 [8086/0000] bus ops
832 08:28:39.875615 PCI: 00:14.0 [8086/02ed] enabled
833 08:28:39.879228 PCI: 00:14.2 [8086/02ef] enabled
834 08:28:39.882456 PCI: 00:14.3 [8086/02f0] enabled
835 08:28:39.885980 PCI: 00:15.0 [8086/0000] bus ops
836 08:28:39.890020 PCI: 00:15.0 [8086/02e8] enabled
837 08:28:39.892167 PCI: 00:15.1 [8086/0000] bus ops
838 08:28:39.895733 PCI: 00:15.1 [8086/02e9] enabled
839 08:28:39.898762 PCI: 00:16.0 [8086/0000] ops
840 08:28:39.902419 PCI: 00:16.0 [8086/02e0] enabled
841 08:28:39.905987 PCI: 00:17.0 [8086/0000] ops
842 08:28:39.908646 PCI: 00:17.0 [8086/02d3] enabled
843 08:28:39.912254 PCI: 00:19.0 [8086/0000] bus ops
844 08:28:39.915972 PCI: 00:19.0 [8086/02c5] enabled
845 08:28:39.918974 PCI: 00:1d.0 [8086/0000] bus ops
846 08:28:39.922242 PCI: 00:1d.0 [8086/02b0] enabled
847 08:28:39.925880 PCI: Static device PCI: 00:1d.5 not found, disabling it.
848 08:28:39.928821 PCI: 00:1e.0 [8086/0000] ops
849 08:28:39.932187 PCI: 00:1e.0 [8086/02a8] enabled
850 08:28:39.935743 PCI: 00:1e.2 [8086/0000] bus ops
851 08:28:39.939074 PCI: 00:1e.2 [8086/02aa] enabled
852 08:28:39.941970 PCI: 00:1e.3 [8086/0000] bus ops
853 08:28:39.945479 PCI: 00:1e.3 [8086/02ab] enabled
854 08:28:39.948478 PCI: 00:1f.0 [8086/0000] bus ops
855 08:28:39.952348 PCI: 00:1f.0 [8086/0284] enabled
856 08:28:39.958764 PCI: Static device PCI: 00:1f.1 not found, disabling it.
857 08:28:39.965374 PCI: Static device PCI: 00:1f.2 not found, disabling it.
858 08:28:39.968359 PCI: 00:1f.3 [8086/0000] bus ops
859 08:28:39.971992 PCI: 00:1f.3 [8086/02c8] enabled
860 08:28:39.975556 PCI: 00:1f.4 [8086/0000] bus ops
861 08:28:39.978873 PCI: 00:1f.4 [8086/02a3] enabled
862 08:28:39.981811 PCI: 00:1f.5 [8086/0000] bus ops
863 08:28:39.985440 PCI: 00:1f.5 [8086/02a4] enabled
864 08:28:39.988616 PCI: Leftover static devices:
865 08:28:39.989189 PCI: 00:05.0
866 08:28:39.989568 PCI: 00:12.5
867 08:28:39.992174 PCI: 00:12.6
868 08:28:39.992813 PCI: 00:14.1
869 08:28:39.995709 PCI: 00:14.5
870 08:28:39.996329 PCI: 00:15.2
871 08:28:39.996711 PCI: 00:15.3
872 08:28:39.999073 PCI: 00:16.1
873 08:28:39.999641 PCI: 00:16.2
874 08:28:40.002003 PCI: 00:16.3
875 08:28:40.002570 PCI: 00:16.4
876 08:28:40.004805 PCI: 00:16.5
877 08:28:40.005275 PCI: 00:19.1
878 08:28:40.005646 PCI: 00:19.2
879 08:28:40.008088 PCI: 00:1a.0
880 08:28:40.008522 PCI: 00:1c.0
881 08:28:40.011676 PCI: 00:1c.1
882 08:28:40.012174 PCI: 00:1c.2
883 08:28:40.012547 PCI: 00:1c.3
884 08:28:40.014999 PCI: 00:1c.4
885 08:28:40.015465 PCI: 00:1c.5
886 08:28:40.018430 PCI: 00:1c.6
887 08:28:40.018915 PCI: 00:1c.7
888 08:28:40.019286 PCI: 00:1d.1
889 08:28:40.021942 PCI: 00:1d.2
890 08:28:40.022514 PCI: 00:1d.3
891 08:28:40.025330 PCI: 00:1d.4
892 08:28:40.025904 PCI: 00:1d.5
893 08:28:40.028556 PCI: 00:1e.1
894 08:28:40.029127 PCI: 00:1f.1
895 08:28:40.029508 PCI: 00:1f.2
896 08:28:40.031819 PCI: 00:1f.6
897 08:28:40.035071 PCI: Check your devicetree.cb.
898 08:28:40.035660 PCI: 00:02.0 scanning...
899 08:28:40.042022 scan_generic_bus for PCI: 00:02.0
900 08:28:40.045260 scan_generic_bus for PCI: 00:02.0 done
901 08:28:40.048569 scan_bus: scanning of bus PCI: 00:02.0 took 10192 usecs
902 08:28:40.051351 PCI: 00:14.0 scanning...
903 08:28:40.054668 scan_static_bus for PCI: 00:14.0
904 08:28:40.058009 USB0 port 0 enabled
905 08:28:40.061832 USB0 port 0 scanning...
906 08:28:40.065601 scan_static_bus for USB0 port 0
907 08:28:40.066176 USB2 port 0 enabled
908 08:28:40.068343 USB2 port 1 enabled
909 08:28:40.071577 USB2 port 2 disabled
910 08:28:40.072189 USB2 port 3 disabled
911 08:28:40.075402 USB2 port 5 disabled
912 08:28:40.075975 USB2 port 6 enabled
913 08:28:40.078290 USB2 port 9 enabled
914 08:28:40.081203 USB3 port 0 enabled
915 08:28:40.081673 USB3 port 1 enabled
916 08:28:40.084728 USB3 port 2 enabled
917 08:28:40.088250 USB3 port 3 enabled
918 08:28:40.088817 USB3 port 4 disabled
919 08:28:40.091417 USB2 port 0 scanning...
920 08:28:40.094891 scan_static_bus for USB2 port 0
921 08:28:40.097942 scan_static_bus for USB2 port 0 done
922 08:28:40.104551 scan_bus: scanning of bus USB2 port 0 took 9711 usecs
923 08:28:40.105109 USB2 port 1 scanning...
924 08:28:40.107866 scan_static_bus for USB2 port 1
925 08:28:40.114868 scan_static_bus for USB2 port 1 done
926 08:28:40.118243 scan_bus: scanning of bus USB2 port 1 took 9713 usecs
927 08:28:40.121735 USB2 port 6 scanning...
928 08:28:40.124749 scan_static_bus for USB2 port 6
929 08:28:40.127851 scan_static_bus for USB2 port 6 done
930 08:28:40.134405 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
931 08:28:40.134963 USB2 port 9 scanning...
932 08:28:40.137832 scan_static_bus for USB2 port 9
933 08:28:40.144848 scan_static_bus for USB2 port 9 done
934 08:28:40.147838 scan_bus: scanning of bus USB2 port 9 took 9709 usecs
935 08:28:40.151540 USB3 port 0 scanning...
936 08:28:40.154964 scan_static_bus for USB3 port 0
937 08:28:40.157764 scan_static_bus for USB3 port 0 done
938 08:28:40.164610 scan_bus: scanning of bus USB3 port 0 took 9708 usecs
939 08:28:40.165081 USB3 port 1 scanning...
940 08:28:40.167945 scan_static_bus for USB3 port 1
941 08:28:40.174576 scan_static_bus for USB3 port 1 done
942 08:28:40.178046 scan_bus: scanning of bus USB3 port 1 took 9711 usecs
943 08:28:40.181474 USB3 port 2 scanning...
944 08:28:40.184536 scan_static_bus for USB3 port 2
945 08:28:40.187867 scan_static_bus for USB3 port 2 done
946 08:28:40.194331 scan_bus: scanning of bus USB3 port 2 took 9701 usecs
947 08:28:40.197655 USB3 port 3 scanning...
948 08:28:40.200855 scan_static_bus for USB3 port 3
949 08:28:40.204304 scan_static_bus for USB3 port 3 done
950 08:28:40.207779 scan_bus: scanning of bus USB3 port 3 took 9702 usecs
951 08:28:40.210734 scan_static_bus for USB0 port 0 done
952 08:28:40.218438 scan_bus: scanning of bus USB0 port 0 took 155459 usecs
953 08:28:40.220785 scan_static_bus for PCI: 00:14.0 done
954 08:28:40.227525 scan_bus: scanning of bus PCI: 00:14.0 took 173075 usecs
955 08:28:40.230673 PCI: 00:15.0 scanning...
956 08:28:40.234065 scan_generic_bus for PCI: 00:15.0
957 08:28:40.237618 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
958 08:28:40.240550 scan_generic_bus for PCI: 00:15.0 done
959 08:28:40.247676 scan_bus: scanning of bus PCI: 00:15.0 took 14312 usecs
960 08:28:40.250852 PCI: 00:15.1 scanning...
961 08:28:40.254270 scan_generic_bus for PCI: 00:15.1
962 08:28:40.258116 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
963 08:28:40.260706 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
964 08:28:40.264228 scan_generic_bus for PCI: 00:15.1 done
965 08:28:40.270744 scan_bus: scanning of bus PCI: 00:15.1 took 18611 usecs
966 08:28:40.273991 PCI: 00:19.0 scanning...
967 08:28:40.277417 scan_generic_bus for PCI: 00:19.0
968 08:28:40.280804 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
969 08:28:40.287089 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
970 08:28:40.290916 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
971 08:28:40.294494 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
972 08:28:40.297171 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
973 08:28:40.301038 scan_generic_bus for PCI: 00:19.0 done
974 08:28:40.307474 scan_bus: scanning of bus PCI: 00:19.0 took 30731 usecs
975 08:28:40.310593 PCI: 00:1d.0 scanning...
976 08:28:40.314118 do_pci_scan_bridge for PCI: 00:1d.0
977 08:28:40.317654 PCI: pci_scan_bus for bus 01
978 08:28:40.320979 PCI: 01:00.0 [1c5c/1327] enabled
979 08:28:40.324111 Enabling Common Clock Configuration
980 08:28:40.327379 L1 Sub-State supported from root port 29
981 08:28:40.330740 L1 Sub-State Support = 0xf
982 08:28:40.334284 CommonModeRestoreTime = 0x28
983 08:28:40.336835 Power On Value = 0x16, Power On Scale = 0x0
984 08:28:40.340447 ASPM: Enabled L1
985 08:28:40.347342 scan_bus: scanning of bus PCI: 00:1d.0 took 32799 usecs
986 08:28:40.347922 PCI: 00:1e.2 scanning...
987 08:28:40.351151 scan_generic_bus for PCI: 00:1e.2
988 08:28:40.357137 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
989 08:28:40.360194 scan_generic_bus for PCI: 00:1e.2 done
990 08:28:40.363678 scan_bus: scanning of bus PCI: 00:1e.2 took 14014 usecs
991 08:28:40.367226 PCI: 00:1e.3 scanning...
992 08:28:40.369977 scan_generic_bus for PCI: 00:1e.3
993 08:28:40.373578 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
994 08:28:40.379917 scan_generic_bus for PCI: 00:1e.3 done
995 08:28:40.383613 scan_bus: scanning of bus PCI: 00:1e.3 took 14016 usecs
996 08:28:40.386842 PCI: 00:1f.0 scanning...
997 08:28:40.390818 scan_static_bus for PCI: 00:1f.0
998 08:28:40.393722 PNP: 0c09.0 enabled
999 08:28:40.397193 scan_static_bus for PCI: 00:1f.0 done
1000 08:28:40.403464 scan_bus: scanning of bus PCI: 00:1f.0 took 12044 usecs
1001 08:28:40.404037 PCI: 00:1f.3 scanning...
1002 08:28:40.409891 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1003 08:28:40.413150 PCI: 00:1f.4 scanning...
1004 08:28:40.416681 scan_generic_bus for PCI: 00:1f.4
1005 08:28:40.420021 scan_generic_bus for PCI: 00:1f.4 done
1006 08:28:40.426297 scan_bus: scanning of bus PCI: 00:1f.4 took 10189 usecs
1007 08:28:40.429804 PCI: 00:1f.5 scanning...
1008 08:28:40.433327 scan_generic_bus for PCI: 00:1f.5
1009 08:28:40.436482 scan_generic_bus for PCI: 00:1f.5 done
1010 08:28:40.443250 scan_bus: scanning of bus PCI: 00:1f.5 took 10196 usecs
1011 08:28:40.446429 scan_bus: scanning of bus DOMAIN: 0000 took 605168 usecs
1012 08:28:40.450074 scan_static_bus for Root Device done
1013 08:28:40.456358 scan_bus: scanning of bus Root Device took 625084 usecs
1014 08:28:40.456824 done
1015 08:28:40.460142 Chrome EC: UHEPI supported
1016 08:28:40.466513 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1017 08:28:40.472793 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1018 08:28:40.479519 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1019 08:28:40.486348 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1020 08:28:40.489305 SPI flash protection: WPSW=0 SRP0=0
1021 08:28:40.492629 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1022 08:28:40.499592 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1023 08:28:40.502827 found VGA at PCI: 00:02.0
1024 08:28:40.506087 Setting up VGA for PCI: 00:02.0
1025 08:28:40.509327 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1026 08:28:40.516124 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1027 08:28:40.519046 Allocating resources...
1028 08:28:40.519500 Reading resources...
1029 08:28:40.526390 Root Device read_resources bus 0 link: 0
1030 08:28:40.529666 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1031 08:28:40.532832 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1032 08:28:40.539195 DOMAIN: 0000 read_resources bus 0 link: 0
1033 08:28:40.546199 PCI: 00:14.0 read_resources bus 0 link: 0
1034 08:28:40.549998 USB0 port 0 read_resources bus 0 link: 0
1035 08:28:40.557406 USB0 port 0 read_resources bus 0 link: 0 done
1036 08:28:40.560173 PCI: 00:14.0 read_resources bus 0 link: 0 done
1037 08:28:40.567412 PCI: 00:15.0 read_resources bus 1 link: 0
1038 08:28:40.570454 PCI: 00:15.0 read_resources bus 1 link: 0 done
1039 08:28:40.576958 PCI: 00:15.1 read_resources bus 2 link: 0
1040 08:28:40.580648 PCI: 00:15.1 read_resources bus 2 link: 0 done
1041 08:28:40.588848 PCI: 00:19.0 read_resources bus 3 link: 0
1042 08:28:40.594793 PCI: 00:19.0 read_resources bus 3 link: 0 done
1043 08:28:40.598781 PCI: 00:1d.0 read_resources bus 1 link: 0
1044 08:28:40.604807 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1045 08:28:40.608140 PCI: 00:1e.2 read_resources bus 4 link: 0
1046 08:28:40.614745 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1047 08:28:40.618049 PCI: 00:1e.3 read_resources bus 5 link: 0
1048 08:28:40.624656 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1049 08:28:40.627970 PCI: 00:1f.0 read_resources bus 0 link: 0
1050 08:28:40.634560 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1051 08:28:40.641141 DOMAIN: 0000 read_resources bus 0 link: 0 done
1052 08:28:40.644619 Root Device read_resources bus 0 link: 0 done
1053 08:28:40.648152 Done reading resources.
1054 08:28:40.651320 Show resources in subtree (Root Device)...After reading.
1055 08:28:40.657876 Root Device child on link 0 CPU_CLUSTER: 0
1056 08:28:40.661507 CPU_CLUSTER: 0 child on link 0 APIC: 00
1057 08:28:40.662158 APIC: 00
1058 08:28:40.664787 APIC: 03
1059 08:28:40.665354 APIC: 01
1060 08:28:40.667717 APIC: 05
1061 08:28:40.668246 APIC: 02
1062 08:28:40.668795 APIC: 04
1063 08:28:40.671210 APIC: 07
1064 08:28:40.671673 APIC: 06
1065 08:28:40.674863 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1066 08:28:40.684466 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1067 08:28:40.735135 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1068 08:28:40.735692 PCI: 00:00.0
1069 08:28:40.736477 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1070 08:28:40.736928 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1071 08:28:40.737357 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1072 08:28:40.737712 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1073 08:28:40.784351 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1074 08:28:40.784959 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1075 08:28:40.786040 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1076 08:28:40.786838 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1077 08:28:40.787289 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1078 08:28:40.834364 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1079 08:28:40.835285 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1080 08:28:40.835790 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1081 08:28:40.836404 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1082 08:28:40.836930 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1083 08:28:40.881365 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1084 08:28:40.882551 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1085 08:28:40.883082 PCI: 00:02.0
1086 08:28:40.883451 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1087 08:28:40.883956 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1088 08:28:40.884397 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1089 08:28:40.884736 PCI: 00:04.0
1090 08:28:40.886496 PCI: 00:08.0
1091 08:28:40.890287 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1092 08:28:40.893233 PCI: 00:12.0
1093 08:28:40.903879 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1094 08:28:40.906290 PCI: 00:14.0 child on link 0 USB0 port 0
1095 08:28:40.916013 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1096 08:28:40.919936 USB0 port 0 child on link 0 USB2 port 0
1097 08:28:40.922876 USB2 port 0
1098 08:28:40.923388 USB2 port 1
1099 08:28:40.926685 USB2 port 2
1100 08:28:40.927242 USB2 port 3
1101 08:28:40.930483 USB2 port 5
1102 08:28:40.931049 USB2 port 6
1103 08:28:40.933474 USB2 port 9
1104 08:28:40.936297 USB3 port 0
1105 08:28:40.936754 USB3 port 1
1106 08:28:40.939319 USB3 port 2
1107 08:28:40.939775 USB3 port 3
1108 08:28:40.943509 USB3 port 4
1109 08:28:40.944099 PCI: 00:14.2
1110 08:28:40.953115 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1111 08:28:40.963110 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1112 08:28:40.966078 PCI: 00:14.3
1113 08:28:40.976607 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1114 08:28:40.979432 PCI: 00:15.0 child on link 0 I2C: 01:15
1115 08:28:40.989558 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1116 08:28:40.990116 I2C: 01:15
1117 08:28:40.996176 PCI: 00:15.1 child on link 0 I2C: 02:5d
1118 08:28:41.006082 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 08:28:41.006645 I2C: 02:5d
1120 08:28:41.009334 GENERIC: 0.0
1121 08:28:41.009893 PCI: 00:16.0
1122 08:28:41.019451 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1123 08:28:41.022462 PCI: 00:17.0
1124 08:28:41.029455 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1125 08:28:41.038956 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1126 08:28:41.049362 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1127 08:28:41.055772 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1128 08:28:41.066025 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1129 08:28:41.072126 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1130 08:28:41.079126 PCI: 00:19.0 child on link 0 I2C: 03:1a
1131 08:28:41.089034 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 08:28:41.089584 I2C: 03:1a
1133 08:28:41.091936 I2C: 03:38
1134 08:28:41.092459 I2C: 03:39
1135 08:28:41.092831 I2C: 03:3a
1136 08:28:41.095866 I2C: 03:3b
1137 08:28:41.098939 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1138 08:28:41.108704 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1139 08:28:41.118573 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1140 08:28:41.128916 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1141 08:28:41.129521 PCI: 01:00.0
1142 08:28:41.138690 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1143 08:28:41.142202 PCI: 00:1e.0
1144 08:28:41.151988 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1145 08:28:41.161431 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1146 08:28:41.164817 PCI: 00:1e.2 child on link 0 SPI: 00
1147 08:28:41.175150 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 08:28:41.178203 SPI: 00
1149 08:28:41.181603 PCI: 00:1e.3 child on link 0 SPI: 01
1150 08:28:41.191496 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 08:28:41.192095 SPI: 01
1152 08:28:41.195358 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1153 08:28:41.205163 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1154 08:28:41.215168 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1155 08:28:41.215714 PNP: 0c09.0
1156 08:28:41.225208 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1157 08:28:41.225766 PCI: 00:1f.3
1158 08:28:41.235615 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 08:28:41.244737 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1160 08:28:41.248419 PCI: 00:1f.4
1161 08:28:41.258111 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1162 08:28:41.268169 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1163 08:28:41.268633 PCI: 00:1f.5
1164 08:28:41.278274 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1165 08:28:41.284651 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1166 08:28:41.291233 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1167 08:28:41.297680 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1168 08:28:41.301159 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1169 08:28:41.304143 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1170 08:28:41.307852 PCI: 00:17.0 18 * [0x60 - 0x67] io
1171 08:28:41.311093 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1172 08:28:41.317843 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1173 08:28:41.324972 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1174 08:28:41.334001 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1175 08:28:41.341213 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1176 08:28:41.347058 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1177 08:28:41.350705 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1178 08:28:41.360565 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1179 08:28:41.363890 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1180 08:28:41.370715 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1181 08:28:41.374095 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1182 08:28:41.377525 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1183 08:28:41.384018 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1184 08:28:41.387278 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1185 08:28:41.394158 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1186 08:28:41.397821 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1187 08:28:41.403669 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1188 08:28:41.407747 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1189 08:28:41.414309 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1190 08:28:41.417084 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1191 08:28:41.424177 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1192 08:28:41.427486 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1193 08:28:41.433746 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1194 08:28:41.436889 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1195 08:28:41.443887 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1196 08:28:41.447201 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1197 08:28:41.450206 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1198 08:28:41.457081 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1199 08:28:41.460325 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1200 08:28:41.466856 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1201 08:28:41.470062 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1202 08:28:41.480115 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1203 08:28:41.483429 avoid_fixed_resources: DOMAIN: 0000
1204 08:28:41.490324 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1205 08:28:41.496434 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1206 08:28:41.503154 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1207 08:28:41.509978 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1208 08:28:41.520199 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1209 08:28:41.526986 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1210 08:28:41.533207 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1211 08:28:41.539773 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1212 08:28:41.549523 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1213 08:28:41.556443 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1214 08:28:41.562856 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1215 08:28:41.569982 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1216 08:28:41.572976 Setting resources...
1217 08:28:41.579772 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1218 08:28:41.582869 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1219 08:28:41.586475 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1220 08:28:41.592643 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1221 08:28:41.595969 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1222 08:28:41.602705 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1223 08:28:41.609050 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1224 08:28:41.616234 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1225 08:28:41.623258 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1226 08:28:41.625799 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1227 08:28:41.632759 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1228 08:28:41.635792 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1229 08:28:41.642633 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1230 08:28:41.645716 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1231 08:28:41.652593 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1232 08:28:41.655354 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1233 08:28:41.661883 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1234 08:28:41.665305 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1235 08:28:41.672377 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1236 08:28:41.675625 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1237 08:28:41.682686 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1238 08:28:41.685675 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1239 08:28:41.688596 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1240 08:28:41.695732 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1241 08:28:41.698868 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1242 08:28:41.705381 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1243 08:28:41.708720 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1244 08:28:41.715197 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1245 08:28:41.718732 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1246 08:28:41.725443 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1247 08:28:41.728869 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1248 08:28:41.735475 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1249 08:28:41.742362 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1250 08:28:41.749024 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1251 08:28:41.755279 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1252 08:28:41.765277 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1253 08:28:41.768468 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1254 08:28:41.775113 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1255 08:28:41.781564 Root Device assign_resources, bus 0 link: 0
1256 08:28:41.784807 DOMAIN: 0000 assign_resources, bus 0 link: 0
1257 08:28:41.795256 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1258 08:28:41.801584 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1259 08:28:41.808261 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1260 08:28:41.818520 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1261 08:28:41.824797 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1262 08:28:41.835046 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1263 08:28:41.838117 PCI: 00:14.0 assign_resources, bus 0 link: 0
1264 08:28:41.844853 PCI: 00:14.0 assign_resources, bus 0 link: 0
1265 08:28:41.851977 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1266 08:28:41.861494 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1267 08:28:41.868166 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1268 08:28:41.878311 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1269 08:28:41.881264 PCI: 00:15.0 assign_resources, bus 1 link: 0
1270 08:28:41.884707 PCI: 00:15.0 assign_resources, bus 1 link: 0
1271 08:28:41.894452 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1272 08:28:41.897924 PCI: 00:15.1 assign_resources, bus 2 link: 0
1273 08:28:41.904700 PCI: 00:15.1 assign_resources, bus 2 link: 0
1274 08:28:41.911429 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1275 08:28:41.921226 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1276 08:28:41.927747 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1277 08:28:41.934496 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1278 08:28:41.944389 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1279 08:28:41.951079 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1280 08:28:41.957774 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1281 08:28:41.968218 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1282 08:28:41.970960 PCI: 00:19.0 assign_resources, bus 3 link: 0
1283 08:28:41.977330 PCI: 00:19.0 assign_resources, bus 3 link: 0
1284 08:28:41.983944 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1285 08:28:41.993707 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1286 08:28:42.000766 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1287 08:28:42.007372 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1288 08:28:42.013544 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1289 08:28:42.020159 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1290 08:28:42.027157 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1291 08:28:42.036900 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1292 08:28:42.040192 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1293 08:28:42.046651 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1294 08:28:42.052961 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1295 08:28:42.056190 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1296 08:28:42.063074 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1297 08:28:42.066756 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1298 08:28:42.073505 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1299 08:28:42.076592 LPC: Trying to open IO window from 800 size 1ff
1300 08:28:42.086905 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1301 08:28:42.093358 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1302 08:28:42.103185 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1303 08:28:42.110406 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1304 08:28:42.116458 DOMAIN: 0000 assign_resources, bus 0 link: 0
1305 08:28:42.119580 Root Device assign_resources, bus 0 link: 0
1306 08:28:42.123009 Done setting resources.
1307 08:28:42.129671 Show resources in subtree (Root Device)...After assigning values.
1308 08:28:42.132728 Root Device child on link 0 CPU_CLUSTER: 0
1309 08:28:42.136565 CPU_CLUSTER: 0 child on link 0 APIC: 00
1310 08:28:42.139482 APIC: 00
1311 08:28:42.139942 APIC: 03
1312 08:28:42.140350 APIC: 01
1313 08:28:42.142996 APIC: 05
1314 08:28:42.143456 APIC: 02
1315 08:28:42.145860 APIC: 04
1316 08:28:42.146323 APIC: 07
1317 08:28:42.146691 APIC: 06
1318 08:28:42.153271 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1319 08:28:42.162503 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1320 08:28:42.172589 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1321 08:28:42.173188 PCI: 00:00.0
1322 08:28:42.182775 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1323 08:28:42.192524 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1324 08:28:42.202263 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1325 08:28:42.212201 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1326 08:28:42.222169 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1327 08:28:42.232428 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1328 08:28:42.238506 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1329 08:28:42.248676 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1330 08:28:42.258877 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1331 08:28:42.268442 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1332 08:28:42.278790 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1333 08:28:42.285183 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1334 08:28:42.294978 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1335 08:28:42.305286 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1336 08:28:42.314511 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1337 08:28:42.325049 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1338 08:28:42.325616 PCI: 00:02.0
1339 08:28:42.337713 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1340 08:28:42.347606 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1341 08:28:42.357548 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1342 08:28:42.358102 PCI: 00:04.0
1343 08:28:42.360905 PCI: 00:08.0
1344 08:28:42.371268 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1345 08:28:42.371836 PCI: 00:12.0
1346 08:28:42.380830 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1347 08:28:42.387548 PCI: 00:14.0 child on link 0 USB0 port 0
1348 08:28:42.397253 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1349 08:28:42.400389 USB0 port 0 child on link 0 USB2 port 0
1350 08:28:42.404271 USB2 port 0
1351 08:28:42.404828 USB2 port 1
1352 08:28:42.407511 USB2 port 2
1353 08:28:42.407980 USB2 port 3
1354 08:28:42.410517 USB2 port 5
1355 08:28:42.410982 USB2 port 6
1356 08:28:42.414026 USB2 port 9
1357 08:28:42.414568 USB3 port 0
1358 08:28:42.417587 USB3 port 1
1359 08:28:42.418510 USB3 port 2
1360 08:28:42.420775 USB3 port 3
1361 08:28:42.421242 USB3 port 4
1362 08:28:42.424116 PCI: 00:14.2
1363 08:28:42.433650 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1364 08:28:42.443926 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1365 08:28:42.446881 PCI: 00:14.3
1366 08:28:42.456824 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1367 08:28:42.460228 PCI: 00:15.0 child on link 0 I2C: 01:15
1368 08:28:42.470016 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1369 08:28:42.473533 I2C: 01:15
1370 08:28:42.476930 PCI: 00:15.1 child on link 0 I2C: 02:5d
1371 08:28:42.486412 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1372 08:28:42.489711 I2C: 02:5d
1373 08:28:42.490230 GENERIC: 0.0
1374 08:28:42.493408 PCI: 00:16.0
1375 08:28:42.503086 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1376 08:28:42.503513 PCI: 00:17.0
1377 08:28:42.513049 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1378 08:28:42.522898 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1379 08:28:42.533057 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1380 08:28:42.543293 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1381 08:28:42.552652 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1382 08:28:42.562613 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1383 08:28:42.566431 PCI: 00:19.0 child on link 0 I2C: 03:1a
1384 08:28:42.576179 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1385 08:28:42.579569 I2C: 03:1a
1386 08:28:42.580184 I2C: 03:38
1387 08:28:42.582747 I2C: 03:39
1388 08:28:42.583304 I2C: 03:3a
1389 08:28:42.583676 I2C: 03:3b
1390 08:28:42.589391 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1391 08:28:42.598977 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1392 08:28:42.609095 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1393 08:28:42.619296 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1394 08:28:42.619857 PCI: 01:00.0
1395 08:28:42.632269 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1396 08:28:42.632834 PCI: 00:1e.0
1397 08:28:42.642152 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1398 08:28:42.652154 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1399 08:28:42.658748 PCI: 00:1e.2 child on link 0 SPI: 00
1400 08:28:42.668371 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1401 08:28:42.668936 SPI: 00
1402 08:28:42.671549 PCI: 00:1e.3 child on link 0 SPI: 01
1403 08:28:42.685244 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1404 08:28:42.685815 SPI: 01
1405 08:28:42.688314 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1406 08:28:42.698691 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1407 08:28:42.708787 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1408 08:28:42.709349 PNP: 0c09.0
1409 08:28:42.718575 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1410 08:28:42.719135 PCI: 00:1f.3
1411 08:28:42.728335 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1412 08:28:42.737947 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1413 08:28:42.741444 PCI: 00:1f.4
1414 08:28:42.751146 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1415 08:28:42.761203 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1416 08:28:42.761974 PCI: 00:1f.5
1417 08:28:42.770946 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1418 08:28:42.773932 Done allocating resources.
1419 08:28:42.780610 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1420 08:28:42.784159 Enabling resources...
1421 08:28:42.787714 PCI: 00:00.0 subsystem <- 8086/9b61
1422 08:28:42.790636 PCI: 00:00.0 cmd <- 06
1423 08:28:42.793842 PCI: 00:02.0 subsystem <- 8086/9b41
1424 08:28:42.797330 PCI: 00:02.0 cmd <- 03
1425 08:28:42.800631 PCI: 00:08.0 cmd <- 06
1426 08:28:42.804406 PCI: 00:12.0 subsystem <- 8086/02f9
1427 08:28:42.804959 PCI: 00:12.0 cmd <- 02
1428 08:28:42.811023 PCI: 00:14.0 subsystem <- 8086/02ed
1429 08:28:42.811574 PCI: 00:14.0 cmd <- 02
1430 08:28:42.813799 PCI: 00:14.2 cmd <- 02
1431 08:28:42.817597 PCI: 00:14.3 subsystem <- 8086/02f0
1432 08:28:42.820888 PCI: 00:14.3 cmd <- 02
1433 08:28:42.824339 PCI: 00:15.0 subsystem <- 8086/02e8
1434 08:28:42.827492 PCI: 00:15.0 cmd <- 02
1435 08:28:42.830319 PCI: 00:15.1 subsystem <- 8086/02e9
1436 08:28:42.834320 PCI: 00:15.1 cmd <- 02
1437 08:28:42.837208 PCI: 00:16.0 subsystem <- 8086/02e0
1438 08:28:42.840205 PCI: 00:16.0 cmd <- 02
1439 08:28:42.843603 PCI: 00:17.0 subsystem <- 8086/02d3
1440 08:28:42.846862 PCI: 00:17.0 cmd <- 03
1441 08:28:42.850647 PCI: 00:19.0 subsystem <- 8086/02c5
1442 08:28:42.851206 PCI: 00:19.0 cmd <- 02
1443 08:28:42.854112 PCI: 00:1d.0 bridge ctrl <- 0013
1444 08:28:42.860185 PCI: 00:1d.0 subsystem <- 8086/02b0
1445 08:28:42.860649 PCI: 00:1d.0 cmd <- 06
1446 08:28:42.863886 PCI: 00:1e.0 subsystem <- 8086/02a8
1447 08:28:42.866973 PCI: 00:1e.0 cmd <- 06
1448 08:28:42.870876 PCI: 00:1e.2 subsystem <- 8086/02aa
1449 08:28:42.873592 PCI: 00:1e.2 cmd <- 06
1450 08:28:42.876840 PCI: 00:1e.3 subsystem <- 8086/02ab
1451 08:28:42.880580 PCI: 00:1e.3 cmd <- 02
1452 08:28:42.883752 PCI: 00:1f.0 subsystem <- 8086/0284
1453 08:28:42.886875 PCI: 00:1f.0 cmd <- 407
1454 08:28:42.890024 PCI: 00:1f.3 subsystem <- 8086/02c8
1455 08:28:42.893963 PCI: 00:1f.3 cmd <- 02
1456 08:28:42.897202 PCI: 00:1f.4 subsystem <- 8086/02a3
1457 08:28:42.900021 PCI: 00:1f.4 cmd <- 03
1458 08:28:42.903481 PCI: 00:1f.5 subsystem <- 8086/02a4
1459 08:28:42.906744 PCI: 00:1f.5 cmd <- 406
1460 08:28:42.914574 PCI: 01:00.0 cmd <- 02
1461 08:28:42.919623 done.
1462 08:28:42.932195 ME: Version: 14.0.39.1367
1463 08:28:42.938918 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1464 08:28:42.942055 Initializing devices...
1465 08:28:42.942607 Root Device init ...
1466 08:28:42.948839 Chrome EC: Set SMI mask to 0x0000000000000000
1467 08:28:42.951759 Chrome EC: clear events_b mask to 0x0000000000000000
1468 08:28:42.958426 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1469 08:28:42.965332 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1470 08:28:42.971704 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1471 08:28:42.975648 Chrome EC: Set WAKE mask to 0x0000000000000000
1472 08:28:42.978518 Root Device init finished in 35162 usecs
1473 08:28:42.981747 CPU_CLUSTER: 0 init ...
1474 08:28:42.988391 CPU_CLUSTER: 0 init finished in 2447 usecs
1475 08:28:42.993032 PCI: 00:00.0 init ...
1476 08:28:42.996311 CPU TDP: 15 Watts
1477 08:28:42.999677 CPU PL2 = 64 Watts
1478 08:28:43.002413 PCI: 00:00.0 init finished in 7070 usecs
1479 08:28:43.006127 PCI: 00:02.0 init ...
1480 08:28:43.009009 PCI: 00:02.0 init finished in 2245 usecs
1481 08:28:43.012096 PCI: 00:08.0 init ...
1482 08:28:43.015424 PCI: 00:08.0 init finished in 2251 usecs
1483 08:28:43.019151 PCI: 00:12.0 init ...
1484 08:28:43.022782 PCI: 00:12.0 init finished in 2251 usecs
1485 08:28:43.025326 PCI: 00:14.0 init ...
1486 08:28:43.028645 PCI: 00:14.0 init finished in 2251 usecs
1487 08:28:43.032429 PCI: 00:14.2 init ...
1488 08:28:43.035574 PCI: 00:14.2 init finished in 2252 usecs
1489 08:28:43.038627 PCI: 00:14.3 init ...
1490 08:28:43.042011 PCI: 00:14.3 init finished in 2270 usecs
1491 08:28:43.045433 PCI: 00:15.0 init ...
1492 08:28:43.048731 DW I2C bus 0 at 0xd121f000 (400 KHz)
1493 08:28:43.052228 PCI: 00:15.0 init finished in 5974 usecs
1494 08:28:43.055455 PCI: 00:15.1 init ...
1495 08:28:43.058573 DW I2C bus 1 at 0xd1220000 (400 KHz)
1496 08:28:43.065772 PCI: 00:15.1 init finished in 5975 usecs
1497 08:28:43.066331 PCI: 00:16.0 init ...
1498 08:28:43.071584 PCI: 00:16.0 init finished in 2252 usecs
1499 08:28:43.075596 PCI: 00:19.0 init ...
1500 08:28:43.078422 DW I2C bus 4 at 0xd1222000 (400 KHz)
1501 08:28:43.082191 PCI: 00:19.0 init finished in 5976 usecs
1502 08:28:43.084970 PCI: 00:1d.0 init ...
1503 08:28:43.088480 Initializing PCH PCIe bridge.
1504 08:28:43.091481 PCI: 00:1d.0 init finished in 5285 usecs
1505 08:28:43.094483 PCI: 00:1f.0 init ...
1506 08:28:43.098754 IOAPIC: Initializing IOAPIC at 0xfec00000
1507 08:28:43.104836 IOAPIC: Bootstrap Processor Local APIC = 0x00
1508 08:28:43.105390 IOAPIC: ID = 0x02
1509 08:28:43.107884 IOAPIC: Dumping registers
1510 08:28:43.111629 reg 0x0000: 0x02000000
1511 08:28:43.114664 reg 0x0001: 0x00770020
1512 08:28:43.115251 reg 0x0002: 0x00000000
1513 08:28:43.121218 PCI: 00:1f.0 init finished in 23529 usecs
1514 08:28:43.124304 PCI: 00:1f.4 init ...
1515 08:28:43.127285 PCI: 00:1f.4 init finished in 2263 usecs
1516 08:28:43.138672 PCI: 01:00.0 init ...
1517 08:28:43.141879 PCI: 01:00.0 init finished in 2250 usecs
1518 08:28:43.146363 PNP: 0c09.0 init ...
1519 08:28:43.149525 Google Chrome EC uptime: 11.102 seconds
1520 08:28:43.155973 Google Chrome AP resets since EC boot: 0
1521 08:28:43.159108 Google Chrome most recent AP reset causes:
1522 08:28:43.165680 Google Chrome EC reset flags at last EC boot: reset-pin
1523 08:28:43.169135 PNP: 0c09.0 init finished in 20653 usecs
1524 08:28:43.172817 Devices initialized
1525 08:28:43.175610 Show all devs... After init.
1526 08:28:43.176192 Root Device: enabled 1
1527 08:28:43.179162 CPU_CLUSTER: 0: enabled 1
1528 08:28:43.182377 DOMAIN: 0000: enabled 1
1529 08:28:43.183004 APIC: 00: enabled 1
1530 08:28:43.185784 PCI: 00:00.0: enabled 1
1531 08:28:43.188819 PCI: 00:02.0: enabled 1
1532 08:28:43.192468 PCI: 00:04.0: enabled 0
1533 08:28:43.193029 PCI: 00:05.0: enabled 0
1534 08:28:43.195642 PCI: 00:12.0: enabled 1
1535 08:28:43.199357 PCI: 00:12.5: enabled 0
1536 08:28:43.202389 PCI: 00:12.6: enabled 0
1537 08:28:43.202969 PCI: 00:14.0: enabled 1
1538 08:28:43.205767 PCI: 00:14.1: enabled 0
1539 08:28:43.209030 PCI: 00:14.3: enabled 1
1540 08:28:43.212690 PCI: 00:14.5: enabled 0
1541 08:28:43.213247 PCI: 00:15.0: enabled 1
1542 08:28:43.215861 PCI: 00:15.1: enabled 1
1543 08:28:43.218875 PCI: 00:15.2: enabled 0
1544 08:28:43.219435 PCI: 00:15.3: enabled 0
1545 08:28:43.222515 PCI: 00:16.0: enabled 1
1546 08:28:43.225230 PCI: 00:16.1: enabled 0
1547 08:28:43.228693 PCI: 00:16.2: enabled 0
1548 08:28:43.229154 PCI: 00:16.3: enabled 0
1549 08:28:43.232034 PCI: 00:16.4: enabled 0
1550 08:28:43.235545 PCI: 00:16.5: enabled 0
1551 08:28:43.238860 PCI: 00:17.0: enabled 1
1552 08:28:43.239325 PCI: 00:19.0: enabled 1
1553 08:28:43.242494 PCI: 00:19.1: enabled 0
1554 08:28:43.245277 PCI: 00:19.2: enabled 0
1555 08:28:43.248361 PCI: 00:1a.0: enabled 0
1556 08:28:43.248858 PCI: 00:1c.0: enabled 0
1557 08:28:43.251699 PCI: 00:1c.1: enabled 0
1558 08:28:43.255239 PCI: 00:1c.2: enabled 0
1559 08:28:43.255701 PCI: 00:1c.3: enabled 0
1560 08:28:43.258658 PCI: 00:1c.4: enabled 0
1561 08:28:43.262345 PCI: 00:1c.5: enabled 0
1562 08:28:43.265122 PCI: 00:1c.6: enabled 0
1563 08:28:43.265600 PCI: 00:1c.7: enabled 0
1564 08:28:43.268215 PCI: 00:1d.0: enabled 1
1565 08:28:43.272100 PCI: 00:1d.1: enabled 0
1566 08:28:43.275362 PCI: 00:1d.2: enabled 0
1567 08:28:43.275895 PCI: 00:1d.3: enabled 0
1568 08:28:43.278195 PCI: 00:1d.4: enabled 0
1569 08:28:43.281555 PCI: 00:1d.5: enabled 0
1570 08:28:43.285357 PCI: 00:1e.0: enabled 1
1571 08:28:43.285914 PCI: 00:1e.1: enabled 0
1572 08:28:43.288868 PCI: 00:1e.2: enabled 1
1573 08:28:43.291439 PCI: 00:1e.3: enabled 1
1574 08:28:43.294606 PCI: 00:1f.0: enabled 1
1575 08:28:43.295162 PCI: 00:1f.1: enabled 0
1576 08:28:43.298675 PCI: 00:1f.2: enabled 0
1577 08:28:43.301163 PCI: 00:1f.3: enabled 1
1578 08:28:43.301631 PCI: 00:1f.4: enabled 1
1579 08:28:43.304782 PCI: 00:1f.5: enabled 1
1580 08:28:43.308340 PCI: 00:1f.6: enabled 0
1581 08:28:43.311506 USB0 port 0: enabled 1
1582 08:28:43.312113 I2C: 01:15: enabled 1
1583 08:28:43.314882 I2C: 02:5d: enabled 1
1584 08:28:43.318309 GENERIC: 0.0: enabled 1
1585 08:28:43.318882 I2C: 03:1a: enabled 1
1586 08:28:43.321555 I2C: 03:38: enabled 1
1587 08:28:43.324490 I2C: 03:39: enabled 1
1588 08:28:43.325110 I2C: 03:3a: enabled 1
1589 08:28:43.327901 I2C: 03:3b: enabled 1
1590 08:28:43.331401 PCI: 00:00.0: enabled 1
1591 08:28:43.331962 SPI: 00: enabled 1
1592 08:28:43.334846 SPI: 01: enabled 1
1593 08:28:43.337989 PNP: 0c09.0: enabled 1
1594 08:28:43.338553 USB2 port 0: enabled 1
1595 08:28:43.341013 USB2 port 1: enabled 1
1596 08:28:43.344766 USB2 port 2: enabled 0
1597 08:28:43.347989 USB2 port 3: enabled 0
1598 08:28:43.348589 USB2 port 5: enabled 0
1599 08:28:43.350945 USB2 port 6: enabled 1
1600 08:28:43.354209 USB2 port 9: enabled 1
1601 08:28:43.354653 USB3 port 0: enabled 1
1602 08:28:43.357652 USB3 port 1: enabled 1
1603 08:28:43.360524 USB3 port 2: enabled 1
1604 08:28:43.364828 USB3 port 3: enabled 1
1605 08:28:43.365394 USB3 port 4: enabled 0
1606 08:28:43.367297 APIC: 03: enabled 1
1607 08:28:43.367851 APIC: 01: enabled 1
1608 08:28:43.370763 APIC: 05: enabled 1
1609 08:28:43.374182 APIC: 02: enabled 1
1610 08:28:43.374700 APIC: 04: enabled 1
1611 08:28:43.377221 APIC: 07: enabled 1
1612 08:28:43.380623 APIC: 06: enabled 1
1613 08:28:43.381082 PCI: 00:08.0: enabled 1
1614 08:28:43.384346 PCI: 00:14.2: enabled 1
1615 08:28:43.387368 PCI: 01:00.0: enabled 1
1616 08:28:43.391180 Disabling ACPI via APMC:
1617 08:28:43.394553 done.
1618 08:28:43.397521 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1619 08:28:43.401079 ELOG: NV offset 0xaf0000 size 0x4000
1620 08:28:43.407556 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1621 08:28:43.414143 ELOG: Event(17) added with size 13 at 2024-04-03 08:28:43 UTC
1622 08:28:43.421444 ELOG: Event(92) added with size 9 at 2024-04-03 08:28:43 UTC
1623 08:28:43.427901 ELOG: Event(93) added with size 9 at 2024-04-03 08:28:43 UTC
1624 08:28:43.434544 ELOG: Event(9A) added with size 9 at 2024-04-03 08:28:43 UTC
1625 08:28:43.440881 ELOG: Event(9E) added with size 10 at 2024-04-03 08:28:43 UTC
1626 08:28:43.448367 ELOG: Event(9F) added with size 14 at 2024-04-03 08:28:43 UTC
1627 08:28:43.450840 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1628 08:28:43.458370 ELOG: Event(A1) added with size 10 at 2024-04-03 08:28:43 UTC
1629 08:28:43.467921 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1630 08:28:43.474340 ELOG: Event(A0) added with size 9 at 2024-04-03 08:28:43 UTC
1631 08:28:43.477975 elog_add_boot_reason: Logged dev mode boot
1632 08:28:43.481738 Finalize devices...
1633 08:28:43.482308 PCI: 00:17.0 final
1634 08:28:43.484525 Devices finalized
1635 08:28:43.488131 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1636 08:28:43.494999 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1637 08:28:43.497664 ME: HFSTS1 : 0x90000245
1638 08:28:43.501016 ME: HFSTS2 : 0x3B850126
1639 08:28:43.507726 ME: HFSTS3 : 0x00000020
1640 08:28:43.511134 ME: HFSTS4 : 0x00004800
1641 08:28:43.515008 ME: HFSTS5 : 0x00000000
1642 08:28:43.517733 ME: HFSTS6 : 0x40400006
1643 08:28:43.520750 ME: Manufacturing Mode : NO
1644 08:28:43.524386 ME: FW Partition Table : OK
1645 08:28:43.527467 ME: Bringup Loader Failure : NO
1646 08:28:43.531013 ME: Firmware Init Complete : YES
1647 08:28:43.533925 ME: Boot Options Present : NO
1648 08:28:43.537840 ME: Update In Progress : NO
1649 08:28:43.540585 ME: D0i3 Support : YES
1650 08:28:43.543601 ME: Low Power State Enabled : NO
1651 08:28:43.547504 ME: CPU Replaced : NO
1652 08:28:43.550727 ME: CPU Replacement Valid : YES
1653 08:28:43.554285 ME: Current Working State : 5
1654 08:28:43.557216 ME: Current Operation State : 1
1655 08:28:43.560304 ME: Current Operation Mode : 0
1656 08:28:43.563964 ME: Error Code : 0
1657 08:28:43.567004 ME: CPU Debug Disabled : YES
1658 08:28:43.570404 ME: TXT Support : NO
1659 08:28:43.576944 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1660 08:28:43.584039 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1661 08:28:43.584548 CBFS @ c08000 size 3f8000
1662 08:28:43.590387 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1663 08:28:43.593378 CBFS: Locating 'fallback/dsdt.aml'
1664 08:28:43.596561 CBFS: Found @ offset 10bb80 size 3fa5
1665 08:28:43.603153 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1666 08:28:43.606428 CBFS @ c08000 size 3f8000
1667 08:28:43.609905 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1668 08:28:43.613677 CBFS: Locating 'fallback/slic'
1669 08:28:43.619283 CBFS: 'fallback/slic' not found.
1670 08:28:43.624866 ACPI: Writing ACPI tables at 99b3e000.
1671 08:28:43.625428 ACPI: * FACS
1672 08:28:43.628569 ACPI: * DSDT
1673 08:28:43.631584 Ramoops buffer: 0x100000@0x99a3d000.
1674 08:28:43.635065 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1675 08:28:43.641960 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1676 08:28:43.644917 Google Chrome EC: version:
1677 08:28:43.648681 ro: helios_v2.0.2659-56403530b
1678 08:28:43.651494 rw: helios_v2.0.2849-c41de27e7d
1679 08:28:43.651957 running image: 1
1680 08:28:43.656311 ACPI: * FADT
1681 08:28:43.656896 SCI is IRQ9
1682 08:28:43.662128 ACPI: added table 1/32, length now 40
1683 08:28:43.662680 ACPI: * SSDT
1684 08:28:43.665730 Found 1 CPU(s) with 8 core(s) each.
1685 08:28:43.669456 Error: Could not locate 'wifi_sar' in VPD.
1686 08:28:43.675676 Checking CBFS for default SAR values
1687 08:28:43.679114 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1688 08:28:43.682912 CBFS @ c08000 size 3f8000
1689 08:28:43.688732 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1690 08:28:43.692453 CBFS: Locating 'wifi_sar_defaults.hex'
1691 08:28:43.695436 CBFS: Found @ offset 5fac0 size 77
1692 08:28:43.698559 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1693 08:28:43.705692 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1694 08:28:43.708761 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1695 08:28:43.715410 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1696 08:28:43.718572 failed to find key in VPD: dsm_calib_r0_0
1697 08:28:43.728949 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1698 08:28:43.731960 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1699 08:28:43.735539 failed to find key in VPD: dsm_calib_r0_1
1700 08:28:43.745351 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1701 08:28:43.751696 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1702 08:28:43.755114 failed to find key in VPD: dsm_calib_r0_2
1703 08:28:43.765275 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1704 08:28:43.768075 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1705 08:28:43.775333 failed to find key in VPD: dsm_calib_r0_3
1706 08:28:43.782033 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1707 08:28:43.788114 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1708 08:28:43.791489 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1709 08:28:43.794937 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1710 08:28:43.798635 EC returned error result code 1
1711 08:28:43.802217 EC returned error result code 1
1712 08:28:43.806155 EC returned error result code 1
1713 08:28:43.812606 PS2K: Bad resp from EC. Vivaldi disabled!
1714 08:28:43.816141 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1715 08:28:43.822791 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1716 08:28:43.829264 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1717 08:28:43.832422 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1718 08:28:43.839114 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1719 08:28:43.845839 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1720 08:28:43.852354 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1721 08:28:43.855700 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1722 08:28:43.862427 ACPI: added table 2/32, length now 44
1723 08:28:43.862985 ACPI: * MCFG
1724 08:28:43.865507 ACPI: added table 3/32, length now 48
1725 08:28:43.869014 ACPI: * TPM2
1726 08:28:43.872408 TPM2 log created at 99a2d000
1727 08:28:43.875296 ACPI: added table 4/32, length now 52
1728 08:28:43.875814 ACPI: * MADT
1729 08:28:43.878847 SCI is IRQ9
1730 08:28:43.882419 ACPI: added table 5/32, length now 56
1731 08:28:43.882976 current = 99b43ac0
1732 08:28:43.885775 ACPI: * DMAR
1733 08:28:43.889106 ACPI: added table 6/32, length now 60
1734 08:28:43.891950 ACPI: * IGD OpRegion
1735 08:28:43.892563 GMA: Found VBT in CBFS
1736 08:28:43.895380 GMA: Found valid VBT in CBFS
1737 08:28:43.898965 ACPI: added table 7/32, length now 64
1738 08:28:43.902097 ACPI: * HPET
1739 08:28:43.905250 ACPI: added table 8/32, length now 68
1740 08:28:43.905725 ACPI: done.
1741 08:28:43.908906 ACPI tables: 31744 bytes.
1742 08:28:43.912214 smbios_write_tables: 99a2c000
1743 08:28:43.915586 EC returned error result code 3
1744 08:28:43.919009 Couldn't obtain OEM name from CBI
1745 08:28:43.923362 Create SMBIOS type 17
1746 08:28:43.925172 PCI: 00:00.0 (Intel Cannonlake)
1747 08:28:43.928544 PCI: 00:14.3 (Intel WiFi)
1748 08:28:43.932297 SMBIOS tables: 939 bytes.
1749 08:28:43.935408 Writing table forward entry at 0x00000500
1750 08:28:43.942013 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1751 08:28:43.945275 Writing coreboot table at 0x99b62000
1752 08:28:43.952174 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1753 08:28:43.955646 1. 0000000000001000-000000000009ffff: RAM
1754 08:28:43.958359 2. 00000000000a0000-00000000000fffff: RESERVED
1755 08:28:43.965032 3. 0000000000100000-0000000099a2bfff: RAM
1756 08:28:43.968553 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1757 08:28:43.975817 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1758 08:28:43.981647 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1759 08:28:43.985147 7. 000000009a000000-000000009f7fffff: RESERVED
1760 08:28:43.992108 8. 00000000e0000000-00000000efffffff: RESERVED
1761 08:28:43.995065 9. 00000000fc000000-00000000fc000fff: RESERVED
1762 08:28:43.998255 10. 00000000fe000000-00000000fe00ffff: RESERVED
1763 08:28:44.004700 11. 00000000fed10000-00000000fed17fff: RESERVED
1764 08:28:44.008275 12. 00000000fed80000-00000000fed83fff: RESERVED
1765 08:28:44.015116 13. 00000000fed90000-00000000fed91fff: RESERVED
1766 08:28:44.017929 14. 00000000feda0000-00000000feda1fff: RESERVED
1767 08:28:44.025004 15. 0000000100000000-000000045e7fffff: RAM
1768 08:28:44.027784 Graphics framebuffer located at 0xc0000000
1769 08:28:44.030999 Passing 5 GPIOs to payload:
1770 08:28:44.034460 NAME | PORT | POLARITY | VALUE
1771 08:28:44.041199 write protect | undefined | high | low
1772 08:28:44.044855 lid | undefined | high | high
1773 08:28:44.050916 power | undefined | high | low
1774 08:28:44.057701 oprom | undefined | high | low
1775 08:28:44.060990 EC in RW | 0x000000cb | high | low
1776 08:28:44.064175 Board ID: 4
1777 08:28:44.067927 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1778 08:28:44.071363 CBFS @ c08000 size 3f8000
1779 08:28:44.077247 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1780 08:28:44.084385 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1781 08:28:44.084947 coreboot table: 1492 bytes.
1782 08:28:44.087360 IMD ROOT 0. 99fff000 00001000
1783 08:28:44.091152 IMD SMALL 1. 99ffe000 00001000
1784 08:28:44.094614 FSP MEMORY 2. 99c4e000 003b0000
1785 08:28:44.097524 CONSOLE 3. 99c2e000 00020000
1786 08:28:44.100918 FMAP 4. 99c2d000 0000054e
1787 08:28:44.103732 TIME STAMP 5. 99c2c000 00000910
1788 08:28:44.107242 VBOOT WORK 6. 99c18000 00014000
1789 08:28:44.110910 MRC DATA 7. 99c16000 00001958
1790 08:28:44.114232 ROMSTG STCK 8. 99c15000 00001000
1791 08:28:44.116968 AFTER CAR 9. 99c0b000 0000a000
1792 08:28:44.120671 RAMSTAGE 10. 99baf000 0005c000
1793 08:28:44.123743 REFCODE 11. 99b7a000 00035000
1794 08:28:44.127572 SMM BACKUP 12. 99b6a000 00010000
1795 08:28:44.130490 COREBOOT 13. 99b62000 00008000
1796 08:28:44.134138 ACPI 14. 99b3e000 00024000
1797 08:28:44.137689 ACPI GNVS 15. 99b3d000 00001000
1798 08:28:44.140973 RAMOOPS 16. 99a3d000 00100000
1799 08:28:44.143891 TPM2 TCGLOG17. 99a2d000 00010000
1800 08:28:44.147597 SMBIOS 18. 99a2c000 00000800
1801 08:28:44.150734 IMD small region:
1802 08:28:44.153662 IMD ROOT 0. 99ffec00 00000400
1803 08:28:44.157437 FSP RUNTIME 1. 99ffebe0 00000004
1804 08:28:44.160399 EC HOSTEVENT 2. 99ffebc0 00000008
1805 08:28:44.164115 POWER STATE 3. 99ffeb80 00000040
1806 08:28:44.167416 ROMSTAGE 4. 99ffeb60 00000004
1807 08:28:44.170430 MEM INFO 5. 99ffe9a0 000001b9
1808 08:28:44.173814 VPD 6. 99ffe920 0000006c
1809 08:28:44.177268 MTRR: Physical address space:
1810 08:28:44.183776 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1811 08:28:44.190158 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1812 08:28:44.196545 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1813 08:28:44.203156 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1814 08:28:44.210017 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1815 08:28:44.216478 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1816 08:28:44.223226 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1817 08:28:44.226853 MTRR: Fixed MSR 0x250 0x0606060606060606
1818 08:28:44.229739 MTRR: Fixed MSR 0x258 0x0606060606060606
1819 08:28:44.233404 MTRR: Fixed MSR 0x259 0x0000000000000000
1820 08:28:44.240043 MTRR: Fixed MSR 0x268 0x0606060606060606
1821 08:28:44.243242 MTRR: Fixed MSR 0x269 0x0606060606060606
1822 08:28:44.246780 MTRR: Fixed MSR 0x26a 0x0606060606060606
1823 08:28:44.250332 MTRR: Fixed MSR 0x26b 0x0606060606060606
1824 08:28:44.253325 MTRR: Fixed MSR 0x26c 0x0606060606060606
1825 08:28:44.259872 MTRR: Fixed MSR 0x26d 0x0606060606060606
1826 08:28:44.263373 MTRR: Fixed MSR 0x26e 0x0606060606060606
1827 08:28:44.266564 MTRR: Fixed MSR 0x26f 0x0606060606060606
1828 08:28:44.270089 call enable_fixed_mtrr()
1829 08:28:44.272907 CPU physical address size: 39 bits
1830 08:28:44.279759 MTRR: default type WB/UC MTRR counts: 6/8.
1831 08:28:44.282757 MTRR: WB selected as default type.
1832 08:28:44.287235 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1833 08:28:44.292699 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1834 08:28:44.299386 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1835 08:28:44.306410 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1836 08:28:44.312940 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1837 08:28:44.319307 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1838 08:28:44.322543 MTRR: Fixed MSR 0x250 0x0606060606060606
1839 08:28:44.330025 MTRR: Fixed MSR 0x258 0x0606060606060606
1840 08:28:44.332903 MTRR: Fixed MSR 0x259 0x0000000000000000
1841 08:28:44.335985 MTRR: Fixed MSR 0x268 0x0606060606060606
1842 08:28:44.339296 MTRR: Fixed MSR 0x269 0x0606060606060606
1843 08:28:44.346115 MTRR: Fixed MSR 0x26a 0x0606060606060606
1844 08:28:44.348741 MTRR: Fixed MSR 0x26b 0x0606060606060606
1845 08:28:44.352170 MTRR: Fixed MSR 0x26c 0x0606060606060606
1846 08:28:44.356328 MTRR: Fixed MSR 0x26d 0x0606060606060606
1847 08:28:44.358987 MTRR: Fixed MSR 0x26e 0x0606060606060606
1848 08:28:44.365457 MTRR: Fixed MSR 0x26f 0x0606060606060606
1849 08:28:44.365923
1850 08:28:44.366296 MTRR check
1851 08:28:44.369174 Fixed MTRRs : Enabled
1852 08:28:44.371784 Variable MTRRs: Enabled
1853 08:28:44.372469
1854 08:28:44.375153 call enable_fixed_mtrr()
1855 08:28:44.378561 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1856 08:28:44.382223 CPU physical address size: 39 bits
1857 08:28:44.388440 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1858 08:28:44.391780 CBFS @ c08000 size 3f8000
1859 08:28:44.394562 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1860 08:28:44.401367 MTRR: Fixed MSR 0x250 0x0606060606060606
1861 08:28:44.405059 MTRR: Fixed MSR 0x250 0x0606060606060606
1862 08:28:44.407992 MTRR: Fixed MSR 0x258 0x0606060606060606
1863 08:28:44.411331 MTRR: Fixed MSR 0x259 0x0000000000000000
1864 08:28:44.417679 MTRR: Fixed MSR 0x268 0x0606060606060606
1865 08:28:44.421460 MTRR: Fixed MSR 0x269 0x0606060606060606
1866 08:28:44.424896 MTRR: Fixed MSR 0x26a 0x0606060606060606
1867 08:28:44.427582 MTRR: Fixed MSR 0x26b 0x0606060606060606
1868 08:28:44.434361 MTRR: Fixed MSR 0x26c 0x0606060606060606
1869 08:28:44.438011 MTRR: Fixed MSR 0x26d 0x0606060606060606
1870 08:28:44.440832 MTRR: Fixed MSR 0x26e 0x0606060606060606
1871 08:28:44.444158 MTRR: Fixed MSR 0x26f 0x0606060606060606
1872 08:28:44.451184 MTRR: Fixed MSR 0x258 0x0606060606060606
1873 08:28:44.451266 call enable_fixed_mtrr()
1874 08:28:44.457581 MTRR: Fixed MSR 0x259 0x0000000000000000
1875 08:28:44.460765 MTRR: Fixed MSR 0x268 0x0606060606060606
1876 08:28:44.464326 MTRR: Fixed MSR 0x269 0x0606060606060606
1877 08:28:44.467454 MTRR: Fixed MSR 0x26a 0x0606060606060606
1878 08:28:44.474045 MTRR: Fixed MSR 0x26b 0x0606060606060606
1879 08:28:44.477288 MTRR: Fixed MSR 0x26c 0x0606060606060606
1880 08:28:44.481246 MTRR: Fixed MSR 0x26d 0x0606060606060606
1881 08:28:44.484189 MTRR: Fixed MSR 0x26e 0x0606060606060606
1882 08:28:44.487496 MTRR: Fixed MSR 0x26f 0x0606060606060606
1883 08:28:44.494446 CPU physical address size: 39 bits
1884 08:28:44.494528 call enable_fixed_mtrr()
1885 08:28:44.500743 MTRR: Fixed MSR 0x250 0x0606060606060606
1886 08:28:44.504104 MTRR: Fixed MSR 0x250 0x0606060606060606
1887 08:28:44.507167 MTRR: Fixed MSR 0x258 0x0606060606060606
1888 08:28:44.510597 MTRR: Fixed MSR 0x259 0x0000000000000000
1889 08:28:44.517623 MTRR: Fixed MSR 0x268 0x0606060606060606
1890 08:28:44.520455 MTRR: Fixed MSR 0x269 0x0606060606060606
1891 08:28:44.523521 MTRR: Fixed MSR 0x26a 0x0606060606060606
1892 08:28:44.527326 MTRR: Fixed MSR 0x26b 0x0606060606060606
1893 08:28:44.533368 MTRR: Fixed MSR 0x26c 0x0606060606060606
1894 08:28:44.537779 MTRR: Fixed MSR 0x26d 0x0606060606060606
1895 08:28:44.540265 MTRR: Fixed MSR 0x26e 0x0606060606060606
1896 08:28:44.543273 MTRR: Fixed MSR 0x26f 0x0606060606060606
1897 08:28:44.550326 MTRR: Fixed MSR 0x258 0x0606060606060606
1898 08:28:44.550407 call enable_fixed_mtrr()
1899 08:28:44.556829 MTRR: Fixed MSR 0x259 0x0000000000000000
1900 08:28:44.560293 MTRR: Fixed MSR 0x268 0x0606060606060606
1901 08:28:44.563563 MTRR: Fixed MSR 0x269 0x0606060606060606
1902 08:28:44.567228 MTRR: Fixed MSR 0x26a 0x0606060606060606
1903 08:28:44.570136 MTRR: Fixed MSR 0x26b 0x0606060606060606
1904 08:28:44.576613 MTRR: Fixed MSR 0x26c 0x0606060606060606
1905 08:28:44.580007 MTRR: Fixed MSR 0x26d 0x0606060606060606
1906 08:28:44.583602 MTRR: Fixed MSR 0x26e 0x0606060606060606
1907 08:28:44.586745 MTRR: Fixed MSR 0x26f 0x0606060606060606
1908 08:28:44.593548 CPU physical address size: 39 bits
1909 08:28:44.593629 call enable_fixed_mtrr()
1910 08:28:44.596559 CBFS: Locating 'fallback/payload'
1911 08:28:44.603081 CPU physical address size: 39 bits
1912 08:28:44.606722 CBFS: Found @ offset 1c96c0 size 3f798
1913 08:28:44.609838 CPU physical address size: 39 bits
1914 08:28:44.613452 Checking segment from ROM address 0xffdd16f8
1915 08:28:44.616511 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 08:28:44.623400 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 08:28:44.626340 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 08:28:44.630392 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 08:28:44.632880 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 08:28:44.640516 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 08:28:44.642976 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 08:28:44.646259 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 08:28:44.649483 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 08:28:44.652560 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 08:28:44.659839 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 08:28:44.662771 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 08:28:44.666128 call enable_fixed_mtrr()
1928 08:28:44.669220 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 08:28:44.673047 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 08:28:44.679533 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 08:28:44.682982 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 08:28:44.685896 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 08:28:44.689364 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 08:28:44.692619 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 08:28:44.698967 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 08:28:44.702530 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 08:28:44.705863 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 08:28:44.709069 CPU physical address size: 39 bits
1939 08:28:44.712332 call enable_fixed_mtrr()
1940 08:28:44.718834 Checking segment from ROM address 0xffdd1714
1941 08:28:44.722046 CPU physical address size: 39 bits
1942 08:28:44.725398 Loading segment from ROM address 0xffdd16f8
1943 08:28:44.728776 code (compression=0)
1944 08:28:44.735425 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1945 08:28:44.745468 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1946 08:28:44.745550 it's not compressed!
1947 08:28:44.838955 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1948 08:28:44.845711 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1949 08:28:44.849096 Loading segment from ROM address 0xffdd1714
1950 08:28:44.852602 Entry Point 0x30000000
1951 08:28:44.855368 Loaded segments
1952 08:28:44.861455 Finalizing chipset.
1953 08:28:44.864792 Finalizing SMM.
1954 08:28:44.868177 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1955 08:28:44.871056 mp_park_aps done after 0 msecs.
1956 08:28:44.877712 Jumping to boot code at 30000000(99b62000)
1957 08:28:44.884834 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1958 08:28:44.884936
1959 08:28:44.885001
1960 08:28:44.885061
1961 08:28:44.888196 Starting depthcharge on Helios...
1962 08:28:44.888277
1963 08:28:44.888613 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1964 08:28:44.888708 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1965 08:28:44.888792 Setting prompt string to ['hatch:']
1966 08:28:44.888877 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1967 08:28:44.897839 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1968 08:28:44.898005
1969 08:28:44.904389 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1970 08:28:44.904649
1971 08:28:44.910811 board_setup: Info: eMMC controller not present; skipping
1972 08:28:44.910988
1973 08:28:44.914390 New NVMe Controller 0x30053ac0 @ 00:1d:00
1974 08:28:44.914593
1975 08:28:44.921411 board_setup: Info: SDHCI controller not present; skipping
1976 08:28:44.921613
1977 08:28:44.927363 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1978 08:28:44.927567
1979 08:28:44.927746 Wipe memory regions:
1980 08:28:44.927932
1981 08:28:44.930445 [0x00000000001000, 0x000000000a0000)
1982 08:28:44.930623
1983 08:28:44.933902 [0x00000000100000, 0x00000030000000)
1984 08:28:44.999976
1985 08:28:45.003213 [0x00000030657430, 0x00000099a2c000)
1986 08:28:45.140824
1987 08:28:45.144101 [0x00000100000000, 0x0000045e800000)
1988 08:28:46.526485
1989 08:28:46.526664 R8152: Initializing
1990 08:28:46.526757
1991 08:28:46.529969 Version 9 (ocp_data = 6010)
1992 08:28:46.533819
1993 08:28:46.534019 R8152: Done initializing
1994 08:28:46.534130
1995 08:28:46.536986 Adding net device
1996 08:28:47.020511
1997 08:28:47.021066 R8152: Initializing
1998 08:28:47.021441
1999 08:28:47.023249 Version 6 (ocp_data = 5c30)
2000 08:28:47.023705
2001 08:28:47.026775 R8152: Done initializing
2002 08:28:47.027231
2003 08:28:47.029847 net_add_device: Attemp to include the same device
2004 08:28:47.033257
2005 08:28:47.040096 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2006 08:28:47.040564
2007 08:28:47.040928
2008 08:28:47.041263
2009 08:28:47.042055 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2011 08:28:47.143463 hatch: tftpboot 192.168.201.1 13238245/tftp-deploy-m3p53_xx/kernel/bzImage 13238245/tftp-deploy-m3p53_xx/kernel/cmdline 13238245/tftp-deploy-m3p53_xx/ramdisk/ramdisk.cpio.gz
2012 08:28:47.144197 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2013 08:28:47.144947 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2014 08:28:47.149794 tftpboot 192.168.201.1 13238245/tftp-deploy-m3p53_xx/kernel/bzIloy-m3p53_xx/kernel/cmdline 13238245/tftp-deploy-m3p53_xx/ramdisk/ramdisk.cpio.gz
2015 08:28:47.150378
2016 08:28:47.150749 Waiting for link
2017 08:28:47.350809
2018 08:28:47.351375 done.
2019 08:28:47.351744
2020 08:28:47.352192 MAC: 00:24:32:50:1a:5f
2021 08:28:47.352557
2022 08:28:47.353526 Sending DHCP discover... done.
2023 08:28:47.353986
2024 08:28:47.356747 Waiting for reply... done.
2025 08:28:47.357208
2026 08:28:47.360233 Sending DHCP request... done.
2027 08:28:47.360695
2028 08:28:47.368129 Waiting for reply... done.
2029 08:28:47.368708
2030 08:28:47.369080 My ip is 192.168.201.21
2031 08:28:47.369427
2032 08:28:47.370561 The DHCP server ip is 192.168.201.1
2033 08:28:47.373868
2034 08:28:47.377324 TFTP server IP predefined by user: 192.168.201.1
2035 08:28:47.377821
2036 08:28:47.384119 Bootfile predefined by user: 13238245/tftp-deploy-m3p53_xx/kernel/bzImage
2037 08:28:47.384590
2038 08:28:47.387313 Sending tftp read request... done.
2039 08:28:47.387776
2040 08:28:47.397281 Waiting for the transfer...
2041 08:28:47.397843
2042 08:28:48.095693 00000000 ################################################################
2043 08:28:48.095941
2044 08:28:48.819486 00080000 ################################################################
2045 08:28:48.820106
2046 08:28:49.527446 00100000 ################################################################
2047 08:28:49.528027
2048 08:28:50.264820 00180000 ################################################################
2049 08:28:50.265338
2050 08:28:50.974269 00200000 ################################################################
2051 08:28:50.974786
2052 08:28:51.663488 00280000 ################################################################
2053 08:28:51.664008
2054 08:28:52.386073 00300000 ################################################################
2055 08:28:52.386837
2056 08:28:53.102522 00380000 ################################################################
2057 08:28:53.103361
2058 08:28:53.814857 00400000 ################################################################
2059 08:28:53.815501
2060 08:28:54.541873 00480000 ################################################################
2061 08:28:54.542478
2062 08:28:55.244142 00500000 ################################################################
2063 08:28:55.244723
2064 08:28:55.939063 00580000 ################################################################
2065 08:28:55.939635
2066 08:28:56.656805 00600000 ################################################################
2067 08:28:56.657391
2068 08:28:57.382369 00680000 ################################################################
2069 08:28:57.382960
2070 08:28:58.098947 00700000 ################################################################
2071 08:28:58.099587
2072 08:28:58.803428 00780000 ################################################################
2073 08:28:58.804019
2074 08:28:59.494272 00800000 ################################################################
2075 08:28:59.494810
2076 08:29:00.195676 00880000 ################################################################
2077 08:29:00.196357
2078 08:29:00.922023 00900000 ################################################################
2079 08:29:00.922551
2080 08:29:01.611951 00980000 ################################################################
2081 08:29:01.612530
2082 08:29:02.332958 00a00000 ################################################################
2083 08:29:02.333491
2084 08:29:03.056659 00a80000 ################################################################
2085 08:29:03.057250
2086 08:29:03.779077 00b00000 ################################################################
2087 08:29:03.779662
2088 08:29:04.503436 00b80000 ################################################################
2089 08:29:04.503996
2090 08:29:05.237711 00c00000 ################################################################
2091 08:29:05.238278
2092 08:29:05.937476 00c80000 ################################################################
2093 08:29:05.938047
2094 08:29:06.642938 00d00000 ################################################################
2095 08:29:06.643525
2096 08:29:07.353224 00d80000 ################################################################
2097 08:29:07.353777
2098 08:29:08.071349 00e00000 ################################################################
2099 08:29:08.071948
2100 08:29:08.797334 00e80000 ################################################################
2101 08:29:08.797915
2102 08:29:09.502367 00f00000 ################################################################
2103 08:29:09.502915
2104 08:29:10.215180 00f80000 ################################################################
2105 08:29:10.215727
2106 08:29:10.614533 01000000 #################################### done.
2107 08:29:10.615112
2108 08:29:10.617383 The bootfile was 17068032 bytes long.
2109 08:29:10.617876
2110 08:29:10.620807 Sending tftp read request... done.
2111 08:29:10.621274
2112 08:29:10.624112 Waiting for the transfer...
2113 08:29:10.624714
2114 08:29:11.329850 00000000 ################################################################
2115 08:29:11.330381
2116 08:29:12.038607 00080000 ################################################################
2117 08:29:12.039205
2118 08:29:12.751278 00100000 ################################################################
2119 08:29:12.751960
2120 08:29:13.476727 00180000 ################################################################
2121 08:29:13.477280
2122 08:29:14.192106 00200000 ################################################################
2123 08:29:14.192695
2124 08:29:14.902272 00280000 ################################################################
2125 08:29:14.902835
2126 08:29:15.589384 00300000 ################################################################
2127 08:29:15.589922
2128 08:29:16.286668 00380000 ################################################################
2129 08:29:16.287240
2130 08:29:16.992201 00400000 ################################################################
2131 08:29:16.992778
2132 08:29:17.694815 00480000 ################################################################
2133 08:29:17.695562
2134 08:29:18.386186 00500000 ################################################################
2135 08:29:18.386734
2136 08:29:19.081644 00580000 ################################################################
2137 08:29:19.082195
2138 08:29:19.783703 00600000 ################################################################
2139 08:29:19.784366
2140 08:29:20.482607 00680000 ################################################################
2141 08:29:20.483195
2142 08:29:21.214864 00700000 ################################################################
2143 08:29:21.215453
2144 08:29:21.919356 00780000 ################################################################
2145 08:29:21.919879
2146 08:29:22.626319 00800000 ################################################################
2147 08:29:22.626838
2148 08:29:23.354094 00880000 ################################################################
2149 08:29:23.354696
2150 08:29:23.966673 00900000 ######################################################## done.
2151 08:29:23.967294
2152 08:29:23.969608 Sending tftp read request... done.
2153 08:29:23.970076
2154 08:29:23.973806 Waiting for the transfer...
2155 08:29:23.974364
2156 08:29:23.976180 00000000 # done.
2157 08:29:23.976655
2158 08:29:23.986292 Command line loaded dynamically from TFTP file: 13238245/tftp-deploy-m3p53_xx/kernel/cmdline
2159 08:29:23.986839
2160 08:29:24.006309 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2161 08:29:24.006896
2162 08:29:24.009232 ec_init(0): CrosEC protocol v3 supported (256, 256)
2163 08:29:24.017163
2164 08:29:24.020333 Shutting down all USB controllers.
2165 08:29:24.020892
2166 08:29:24.021269 Removing current net device
2167 08:29:24.024036
2168 08:29:24.024693 Finalizing coreboot
2169 08:29:24.025080
2170 08:29:24.030173 Exiting depthcharge with code 4 at timestamp: 46595989
2171 08:29:24.030643
2172 08:29:24.031017
2173 08:29:24.031371 Starting kernel ...
2174 08:29:24.031710
2175 08:29:24.033205 end: 2.2.4 bootloader-commands (duration 00:00:39) [common]
2176 08:29:24.033731 start: 2.2.5 auto-login-action (timeout 00:04:03) [common]
2177 08:29:24.034140 Setting prompt string to ['Linux version [0-9]']
2178 08:29:24.034529 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2179 08:29:24.034910 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2180 08:29:24.035809
2182 08:33:27.034654 end: 2.2.5 auto-login-action (duration 00:04:03) [common]
2184 08:33:27.035799 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 243 seconds'
2186 08:33:27.036664 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2189 08:33:27.037970 end: 2 depthcharge-action (duration 00:05:00) [common]
2191 08:33:27.039073 Cleaning after the job
2192 08:33:27.039163 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13238245/tftp-deploy-m3p53_xx/ramdisk
2193 08:33:27.040627 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13238245/tftp-deploy-m3p53_xx/kernel
2194 08:33:27.043249 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13238245/tftp-deploy-m3p53_xx/modules
2195 08:33:27.044218 start: 4.1 power-off (timeout 00:00:30) [common]
2196 08:33:27.044500 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2197 08:33:27.121077 >> Command sent successfully.
2198 08:33:27.126154 Returned 0 in 0 seconds
2199 08:33:27.227125 end: 4.1 power-off (duration 00:00:00) [common]
2201 08:33:27.228532 start: 4.2 read-feedback (timeout 00:10:00) [common]
2202 08:33:27.229731 Listened to connection for namespace 'common' for up to 1s
2204 08:33:27.231012 Listened to connection for namespace 'common' for up to 1s
2205 08:33:28.230386 Finalising connection for namespace 'common'
2206 08:33:28.231162 Disconnecting from shell: Finalise
2207 08:33:28.231711
2208 08:33:28.332815 end: 4.2 read-feedback (duration 00:00:01) [common]
2209 08:33:28.333624 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13238245
2210 08:33:28.387311 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13238245
2211 08:33:28.387521 JobError: Your job cannot terminate cleanly.