Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 08:28:06.059263 lava-dispatcher, installed at version: 2024.01
2 08:28:06.059469 start: 0 validate
3 08:28:06.059602 Start time: 2024-04-03 08:28:06.059594+00:00 (UTC)
4 08:28:06.059725 Using caching service: 'http://localhost/cache/?uri=%s'
5 08:28:06.059851 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 08:28:06.062574 Using caching service: 'http://localhost/cache/?uri=%s'
7 08:28:06.062692 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.310-cip108-146-g11e6e1e552ab6%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 08:28:26.566082 Using caching service: 'http://localhost/cache/?uri=%s'
9 08:28:26.566366 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 08:28:26.568248 Using caching service: 'http://localhost/cache/?uri=%s'
11 08:28:26.568487 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.310-cip108-146-g11e6e1e552ab6%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 08:28:27.071067 validate duration: 21.01
14 08:28:27.071341 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 08:28:27.071442 start: 1.1 download-retry (timeout 00:10:00) [common]
16 08:28:27.071526 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 08:28:27.071650 Not decompressing ramdisk as can be used compressed.
18 08:28:27.071733 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/amd64/initrd.cpio.gz
19 08:28:27.071795 saving as /var/lib/lava/dispatcher/tmp/13238252/tftp-deploy-uilc58q8/ramdisk/initrd.cpio.gz
20 08:28:27.071857 total size: 6137767 (5 MB)
21 08:28:27.329383 progress 0 % (0 MB)
22 08:28:27.331205 progress 5 % (0 MB)
23 08:28:27.332845 progress 10 % (0 MB)
24 08:28:27.334669 progress 15 % (0 MB)
25 08:28:27.336286 progress 20 % (1 MB)
26 08:28:27.338043 progress 25 % (1 MB)
27 08:28:27.339866 progress 30 % (1 MB)
28 08:28:27.341579 progress 35 % (2 MB)
29 08:28:27.343167 progress 40 % (2 MB)
30 08:28:27.344956 progress 45 % (2 MB)
31 08:28:27.346713 progress 50 % (2 MB)
32 08:28:27.348459 progress 55 % (3 MB)
33 08:28:27.350117 progress 60 % (3 MB)
34 08:28:27.351731 progress 65 % (3 MB)
35 08:28:27.353510 progress 70 % (4 MB)
36 08:28:27.355172 progress 75 % (4 MB)
37 08:28:27.356742 progress 80 % (4 MB)
38 08:28:27.358563 progress 85 % (5 MB)
39 08:28:27.360182 progress 90 % (5 MB)
40 08:28:27.361820 progress 95 % (5 MB)
41 08:28:27.363671 progress 100 % (5 MB)
42 08:28:27.363819 5 MB downloaded in 0.29 s (20.05 MB/s)
43 08:28:27.363971 end: 1.1.1 http-download (duration 00:00:00) [common]
45 08:28:27.364250 end: 1.1 download-retry (duration 00:00:00) [common]
46 08:28:27.364339 start: 1.2 download-retry (timeout 00:10:00) [common]
47 08:28:27.364421 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 08:28:27.364604 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.310-cip108-146-g11e6e1e552ab6/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 08:28:27.364676 saving as /var/lib/lava/dispatcher/tmp/13238252/tftp-deploy-uilc58q8/kernel/bzImage
50 08:28:27.364736 total size: 17068032 (16 MB)
51 08:28:27.364796 No compression specified
52 08:28:27.366032 progress 0 % (0 MB)
53 08:28:27.370631 progress 5 % (0 MB)
54 08:28:27.375178 progress 10 % (1 MB)
55 08:28:27.379848 progress 15 % (2 MB)
56 08:28:27.384672 progress 20 % (3 MB)
57 08:28:27.389308 progress 25 % (4 MB)
58 08:28:27.393967 progress 30 % (4 MB)
59 08:28:27.398593 progress 35 % (5 MB)
60 08:28:27.403412 progress 40 % (6 MB)
61 08:28:27.408096 progress 45 % (7 MB)
62 08:28:27.412919 progress 50 % (8 MB)
63 08:28:27.417611 progress 55 % (8 MB)
64 08:28:27.422198 progress 60 % (9 MB)
65 08:28:27.426930 progress 65 % (10 MB)
66 08:28:27.431481 progress 70 % (11 MB)
67 08:28:27.435994 progress 75 % (12 MB)
68 08:28:27.440520 progress 80 % (13 MB)
69 08:28:27.445007 progress 85 % (13 MB)
70 08:28:27.449773 progress 90 % (14 MB)
71 08:28:27.454597 progress 95 % (15 MB)
72 08:28:27.459326 progress 100 % (16 MB)
73 08:28:27.459670 16 MB downloaded in 0.09 s (171.47 MB/s)
74 08:28:27.459874 end: 1.2.1 http-download (duration 00:00:00) [common]
76 08:28:27.460271 end: 1.2 download-retry (duration 00:00:00) [common]
77 08:28:27.460363 start: 1.3 download-retry (timeout 00:10:00) [common]
78 08:28:27.460489 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 08:28:27.460635 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/amd64/full.rootfs.tar.xz
80 08:28:27.460705 saving as /var/lib/lava/dispatcher/tmp/13238252/tftp-deploy-uilc58q8/nfsrootfs/full.rootfs.tar
81 08:28:27.460800 total size: 116951716 (111 MB)
82 08:28:27.460892 Using unxz to decompress xz
83 08:28:27.465760 progress 0 % (0 MB)
84 08:28:27.771675 progress 5 % (5 MB)
85 08:28:28.116859 progress 10 % (11 MB)
86 08:28:28.456886 progress 15 % (16 MB)
87 08:28:28.807587 progress 20 % (22 MB)
88 08:28:29.109169 progress 25 % (27 MB)
89 08:28:29.429935 progress 30 % (33 MB)
90 08:28:29.742471 progress 35 % (39 MB)
91 08:28:29.914575 progress 40 % (44 MB)
92 08:28:30.181920 progress 45 % (50 MB)
93 08:28:30.539279 progress 50 % (55 MB)
94 08:28:30.835487 progress 55 % (61 MB)
95 08:28:31.178699 progress 60 % (66 MB)
96 08:28:31.525086 progress 65 % (72 MB)
97 08:28:31.882983 progress 70 % (78 MB)
98 08:28:32.237874 progress 75 % (83 MB)
99 08:28:32.556148 progress 80 % (89 MB)
100 08:28:32.880820 progress 85 % (94 MB)
101 08:28:33.223591 progress 90 % (100 MB)
102 08:28:33.553388 progress 95 % (105 MB)
103 08:28:33.903645 progress 100 % (111 MB)
104 08:28:33.908493 111 MB downloaded in 6.45 s (17.30 MB/s)
105 08:28:33.908750 end: 1.3.1 http-download (duration 00:00:06) [common]
107 08:28:33.909027 end: 1.3 download-retry (duration 00:00:06) [common]
108 08:28:33.909119 start: 1.4 download-retry (timeout 00:09:53) [common]
109 08:28:33.909208 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 08:28:33.909361 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.310-cip108-146-g11e6e1e552ab6/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 08:28:33.909435 saving as /var/lib/lava/dispatcher/tmp/13238252/tftp-deploy-uilc58q8/modules/modules.tar
112 08:28:33.909512 total size: 955892 (0 MB)
113 08:28:33.909630 Using unxz to decompress xz
114 08:28:33.913893 progress 3 % (0 MB)
115 08:28:33.914457 progress 10 % (0 MB)
116 08:28:33.918165 progress 17 % (0 MB)
117 08:28:33.922031 progress 23 % (0 MB)
118 08:28:33.926078 progress 30 % (0 MB)
119 08:28:33.929910 progress 37 % (0 MB)
120 08:28:33.933143 progress 44 % (0 MB)
121 08:28:33.937617 progress 51 % (0 MB)
122 08:28:33.941203 progress 58 % (0 MB)
123 08:28:33.945867 progress 65 % (0 MB)
124 08:28:33.949770 progress 71 % (0 MB)
125 08:28:33.953861 progress 78 % (0 MB)
126 08:28:33.957687 progress 85 % (0 MB)
127 08:28:33.962030 progress 92 % (0 MB)
128 08:28:33.965892 progress 99 % (0 MB)
129 08:28:33.973744 0 MB downloaded in 0.06 s (14.19 MB/s)
130 08:28:33.973991 end: 1.4.1 http-download (duration 00:00:00) [common]
132 08:28:33.974256 end: 1.4 download-retry (duration 00:00:00) [common]
133 08:28:33.974348 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 08:28:33.974447 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 08:28:36.155749 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13238252/extract-nfsrootfs-fkz8ik7u
136 08:28:36.155939 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 08:28:36.156041 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
138 08:28:36.156204 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk
139 08:28:36.156337 makedir: /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin
140 08:28:36.156442 makedir: /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/tests
141 08:28:36.156542 makedir: /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/results
142 08:28:36.156645 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-add-keys
143 08:28:36.156789 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-add-sources
144 08:28:36.156936 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-background-process-start
145 08:28:36.157091 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-background-process-stop
146 08:28:36.157221 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-common-functions
147 08:28:36.157348 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-echo-ipv4
148 08:28:36.157476 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-install-packages
149 08:28:36.157603 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-installed-packages
150 08:28:36.157729 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-os-build
151 08:28:36.157856 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-probe-channel
152 08:28:36.157982 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-probe-ip
153 08:28:36.158109 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-target-ip
154 08:28:36.158236 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-target-mac
155 08:28:36.158364 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-target-storage
156 08:28:36.158493 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-test-case
157 08:28:36.158622 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-test-event
158 08:28:36.158748 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-test-feedback
159 08:28:36.158874 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-test-raise
160 08:28:36.158998 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-test-reference
161 08:28:36.159126 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-test-runner
162 08:28:36.159251 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-test-set
163 08:28:36.159377 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-test-shell
164 08:28:36.159506 Updating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-install-packages (oe)
165 08:28:36.159662 Updating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/bin/lava-installed-packages (oe)
166 08:28:36.159789 Creating /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/environment
167 08:28:36.159886 LAVA metadata
168 08:28:36.159957 - LAVA_JOB_ID=13238252
169 08:28:36.160021 - LAVA_DISPATCHER_IP=192.168.201.1
170 08:28:36.160125 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
171 08:28:36.160192 skipped lava-vland-overlay
172 08:28:36.160267 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 08:28:36.160346 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
174 08:28:36.160409 skipped lava-multinode-overlay
175 08:28:36.160482 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 08:28:36.160559 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
177 08:28:36.160631 Loading test definitions
178 08:28:36.160719 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
179 08:28:36.160790 Using /lava-13238252 at stage 0
180 08:28:36.161144 uuid=13238252_1.5.2.3.1 testdef=None
181 08:28:36.161234 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 08:28:36.161319 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
183 08:28:36.161830 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 08:28:36.162049 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
186 08:28:36.162691 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 08:28:36.162920 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
189 08:28:36.163546 runner path: /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/0/tests/0_dmesg test_uuid 13238252_1.5.2.3.1
190 08:28:36.163707 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 08:28:36.163911 Creating lava-test-runner.conf files
193 08:28:36.163973 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13238252/lava-overlay-f0n7u0xk/lava-13238252/0 for stage 0
194 08:28:36.164063 - 0_dmesg
195 08:28:36.164161 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
196 08:28:36.164245 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
197 08:28:36.170641 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
198 08:28:36.170757 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
199 08:28:36.170844 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
200 08:28:36.170930 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
201 08:28:36.171015 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
202 08:28:36.337860 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
203 08:28:36.338247 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
204 08:28:36.338370 extracting modules file /var/lib/lava/dispatcher/tmp/13238252/tftp-deploy-uilc58q8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13238252/extract-nfsrootfs-fkz8ik7u
205 08:28:36.364872 extracting modules file /var/lib/lava/dispatcher/tmp/13238252/tftp-deploy-uilc58q8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13238252/extract-overlay-ramdisk-zu1v4onf/ramdisk
206 08:28:36.390301 end: 1.5.4 extract-modules (duration 00:00:00) [common]
207 08:28:36.390454 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
208 08:28:36.390549 [common] Applying overlay to NFS
209 08:28:36.390618 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13238252/compress-overlay-byrq9ewj/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13238252/extract-nfsrootfs-fkz8ik7u
210 08:28:36.397181 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
211 08:28:36.397288 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
212 08:28:36.397378 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
213 08:28:36.397463 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
214 08:28:36.397539 Building ramdisk /var/lib/lava/dispatcher/tmp/13238252/extract-overlay-ramdisk-zu1v4onf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13238252/extract-overlay-ramdisk-zu1v4onf/ramdisk
215 08:28:36.500122 >> 39935 blocks
216 08:28:37.276705 rename /var/lib/lava/dispatcher/tmp/13238252/extract-overlay-ramdisk-zu1v4onf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13238252/tftp-deploy-uilc58q8/ramdisk/ramdisk.cpio.gz
217 08:28:37.277157 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
218 08:28:37.277280 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
219 08:28:37.277382 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
220 08:28:37.277477 No mkimage arch provided, not using FIT.
221 08:28:37.277566 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
222 08:28:37.277645 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
223 08:28:37.277743 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
224 08:28:37.277831 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
225 08:28:37.277914 No LXC device requested
226 08:28:37.277991 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
227 08:28:37.278077 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
228 08:28:37.278160 end: 1.7 deploy-device-env (duration 00:00:00) [common]
229 08:28:37.278231 Checking files for TFTP limit of 4294967296 bytes.
230 08:28:37.278625 end: 1 tftp-deploy (duration 00:00:10) [common]
231 08:28:37.278723 start: 2 depthcharge-action (timeout 00:05:00) [common]
232 08:28:37.278812 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
233 08:28:37.278935 substitutions:
234 08:28:37.278999 - {DTB}: None
235 08:28:37.279059 - {INITRD}: 13238252/tftp-deploy-uilc58q8/ramdisk/ramdisk.cpio.gz
236 08:28:37.279117 - {KERNEL}: 13238252/tftp-deploy-uilc58q8/kernel/bzImage
237 08:28:37.279172 - {LAVA_MAC}: None
238 08:28:37.279227 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13238252/extract-nfsrootfs-fkz8ik7u
239 08:28:37.279280 - {NFS_SERVER_IP}: 192.168.201.1
240 08:28:37.279333 - {PRESEED_CONFIG}: None
241 08:28:37.279385 - {PRESEED_LOCAL}: None
242 08:28:37.279437 - {RAMDISK}: 13238252/tftp-deploy-uilc58q8/ramdisk/ramdisk.cpio.gz
243 08:28:37.279489 - {ROOT_PART}: None
244 08:28:37.279540 - {ROOT}: None
245 08:28:37.279591 - {SERVER_IP}: 192.168.201.1
246 08:28:37.279643 - {TEE}: None
247 08:28:37.279694 Parsed boot commands:
248 08:28:37.279747 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
249 08:28:37.279923 Parsed boot commands: tftpboot 192.168.201.1 13238252/tftp-deploy-uilc58q8/kernel/bzImage 13238252/tftp-deploy-uilc58q8/kernel/cmdline 13238252/tftp-deploy-uilc58q8/ramdisk/ramdisk.cpio.gz
250 08:28:37.280008 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
251 08:28:37.280087 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
252 08:28:37.280175 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
253 08:28:37.280259 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
254 08:28:37.280330 Not connected, no need to disconnect.
255 08:28:37.280402 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
256 08:28:37.280485 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
257 08:28:37.280553 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-10'
258 08:28:37.285147 Setting prompt string to ['lava-test: # ']
259 08:28:37.285495 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
260 08:28:37.285608 end: 2.2.1 reset-connection (duration 00:00:00) [common]
261 08:28:37.285701 start: 2.2.2 reset-device (timeout 00:05:00) [common]
262 08:28:37.285786 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
263 08:28:37.286087 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-10' '--port=1' '--command=reboot'
264 08:28:42.419540 >> Command sent successfully.
265 08:28:42.422297 Returned 0 in 5 seconds
266 08:28:42.522703 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
268 08:28:42.523182 end: 2.2.2 reset-device (duration 00:00:05) [common]
269 08:28:42.523336 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
270 08:28:42.523452 Setting prompt string to 'Starting depthcharge on Volmar...'
271 08:28:42.523553 Changing prompt to 'Starting depthcharge on Volmar...'
272 08:28:42.523656 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
273 08:28:42.524078 [Enter `^Ec?' for help]
274 08:28:43.902192
275 08:28:43.902337
276 08:28:43.909889 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
277 08:28:43.913243 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
278 08:28:43.917058 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
279 08:28:43.923565 CPU: AES supported, TXT NOT supported, VT supported
280 08:28:43.931874 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
281 08:28:43.935486 Cache size = 10 MiB
282 08:28:43.938288 MCH: device id 4609 (rev 04) is Alderlake-P
283 08:28:43.942690 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
284 08:28:43.945986 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
285 08:28:43.949493 VBOOT: Loading verstage.
286 08:28:43.956835 FMAP: Found "FLASH" version 1.1 at 0x1804000.
287 08:28:43.961251 FMAP: base = 0x0 size = 0x2000000 #areas = 37
288 08:28:43.965195 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 08:28:43.974030 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
290 08:28:43.980833 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
291 08:28:43.980953
292 08:28:43.981064
293 08:28:43.991184 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
294 08:28:43.997661 Probing TPM I2C: I2C bus 1 version 0x3230302a
295 08:28:44.001415 DW I2C bus 1 at 0xfe022000 (400 KHz)
296 08:28:44.001502 I2C TX abort detected (00000001)
297 08:28:44.008393 cr50_i2c_read: Address write failed
298 08:28:44.018301 .done! DID_VID 0x00281ae0
299 08:28:44.022133 TPM ready after 0 ms
300 08:28:44.025451 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
301 08:28:44.038791 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
302 08:28:44.045499 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
303 08:28:44.096622 tlcl_send_startup: Startup return code is 0
304 08:28:44.096723 TPM: setup succeeded
305 08:28:44.116672 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
306 08:28:44.139753 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 08:28:44.143611 Chrome EC: UHEPI supported
308 08:28:44.147327 Reading cr50 boot mode
309 08:28:44.161904 Cr50 says boot_mode is VERIFIED_RW(0x00).
310 08:28:44.161999 Phase 1
311 08:28:44.169600 FMAP: area GBB found @ 1805000 (458752 bytes)
312 08:28:44.176512 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
313 08:28:44.183947 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
314 08:28:44.190544 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 08:28:44.190680 Phase 2
316 08:28:44.190769 Phase 3
317 08:28:44.197667 FMAP: area GBB found @ 1805000 (458752 bytes)
318 08:28:44.200266 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
319 08:28:44.207084 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
320 08:28:44.210746 VB2:vb2_verify_keyblock() Checking keyblock signature...
321 08:28:44.220553 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
322 08:28:44.228589 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
323 08:28:44.235489 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
324 08:28:44.247291 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
325 08:28:44.251330 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
326 08:28:44.257889 VB2:vb2_verify_fw_preamble() Verifying preamble.
327 08:28:44.264351 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
328 08:28:44.270717 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
329 08:28:44.277917 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
330 08:28:44.280820 Phase 4
331 08:28:44.284239 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
332 08:28:44.290825 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
333 08:28:44.503535 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
334 08:28:44.510022 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
335 08:28:44.513462 Saving vboot hash.
336 08:28:44.520082 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
337 08:28:44.536205 tlcl_extend: response is 0
338 08:28:44.542586 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
339 08:28:44.549255 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
340 08:28:44.563496 tlcl_extend: response is 0
341 08:28:44.570618 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
342 08:28:44.586154 tlcl_lock_nv_write: response is 0
343 08:28:44.607796 tlcl_lock_nv_write: response is 0
344 08:28:44.608403 Slot A is selected
345 08:28:44.614995 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
346 08:28:44.621690 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
347 08:28:44.628035 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
348 08:28:44.634640 BS: verstage times (exec / console): total (unknown) / 264 ms
349 08:28:44.635042
350 08:28:44.635411
351 08:28:44.641584 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
352 08:28:44.646489 Google Chrome EC: version:
353 08:28:44.650366 ro: volmar_v2.0.14126-e605144e9c
354 08:28:44.653539 rw: volmar_v0.0.55-22d1557
355 08:28:44.656842 running image: 2
356 08:28:44.660042 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
357 08:28:44.670256 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
358 08:28:44.677042 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
359 08:28:44.683370 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
360 08:28:44.693555 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
361 08:28:44.703342 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
362 08:28:44.707141 EC took 982us to calculate image hash
363 08:28:44.716841 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
364 08:28:44.720386 VB2:sync_ec() select_rw=RW(active)
365 08:28:44.732068 Waited 270us to clear limit power flag.
366 08:28:44.735357 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
367 08:28:44.738750 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
368 08:28:44.741768 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
369 08:28:44.748524 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
370 08:28:44.751603 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
371 08:28:44.755032 TCO_STS: 0000 0000
372 08:28:44.755555 GEN_PMCON: d0015038 00002200
373 08:28:44.758626 GBLRST_CAUSE: 00000000 00000000
374 08:28:44.762056 HPR_CAUSE0: 00000000
375 08:28:44.765309 prev_sleep_state 5
376 08:28:44.768225 Abort disabling TXT, as CPU is not TXT capable.
377 08:28:44.776708 cse_lite: Number of partitions = 3
378 08:28:44.780111 cse_lite: Current partition = RO
379 08:28:44.780678 cse_lite: Next partition = RO
380 08:28:44.783131 cse_lite: Flags = 0x7
381 08:28:44.790394 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
382 08:28:44.799734 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
383 08:28:44.803151 FMAP: area SI_ME found @ 1000 (5238784 bytes)
384 08:28:44.810241 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
385 08:28:44.816543 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
386 08:28:44.823139 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
387 08:28:44.826932 cse_lite: CSE CBFS RW version : 16.1.25.2049
388 08:28:44.833499 cse_lite: Set Boot Partition Info Command (RW)
389 08:28:44.836427 HECI: Global Reset(Type:1) Command
390 08:28:46.247884
391 08:28:46.248586
392 08:28:46.255413 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
393 08:28:46.259585 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
394 08:28:46.265698 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
395 08:28:46.269063 CPU: AES supported, TXT NOT supported, VT supported
396 08:28:46.278714 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
397 08:28:46.279220 Cache size = 10 MiB
398 08:28:46.285647 MCH: device id 4609 (rev 04) is Alderlake-P
399 08:28:46.289040 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
400 08:28:46.295114 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
401 08:28:46.295621 VBOOT: Loading verstage.
402 08:28:46.302791 FMAP: Found "FLASH" version 1.1 at 0x1804000.
403 08:28:46.306171 FMAP: base = 0x0 size = 0x2000000 #areas = 37
404 08:28:46.309961 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
405 08:28:46.320510 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
406 08:28:46.326957 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
407 08:28:46.327525
408 08:28:46.327932
409 08:28:46.337231 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
410 08:28:46.343813 Probing TPM I2C: I2C bus 1 version 0x3230302a
411 08:28:46.347436 DW I2C bus 1 at 0xfe022000 (400 KHz)
412 08:28:46.350711 done! DID_VID 0x00281ae0
413 08:28:46.351195 TPM ready after 0 ms
414 08:28:46.355872 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
415 08:28:46.369284 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
416 08:28:46.372091 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
417 08:28:46.423979 tlcl_send_startup: Startup return code is 0
418 08:28:46.424449 TPM: setup succeeded
419 08:28:46.442715 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
420 08:28:46.464637 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
421 08:28:46.469215 Chrome EC: UHEPI supported
422 08:28:46.472336 Reading cr50 boot mode
423 08:28:46.487674 Cr50 says boot_mode is VERIFIED_RW(0x00).
424 08:28:46.488120 Phase 1
425 08:28:46.493958 FMAP: area GBB found @ 1805000 (458752 bytes)
426 08:28:46.501235 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
427 08:28:46.507269 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
428 08:28:46.513698 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
429 08:28:46.514156 Phase 2
430 08:28:46.517503 Phase 3
431 08:28:46.520680 FMAP: area GBB found @ 1805000 (458752 bytes)
432 08:28:46.527365 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
433 08:28:46.531319 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
434 08:28:46.537171 VB2:vb2_verify_keyblock() Checking keyblock signature...
435 08:28:46.543824 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
436 08:28:46.550530 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
437 08:28:46.560745 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
438 08:28:46.572525 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
439 08:28:46.575424 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
440 08:28:46.582202 VB2:vb2_verify_fw_preamble() Verifying preamble.
441 08:28:46.588945 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
442 08:28:46.595980 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
443 08:28:46.602301 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
444 08:28:46.605991 Phase 4
445 08:28:46.609369 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
446 08:28:46.615853 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
447 08:28:46.828281 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
448 08:28:46.835099 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
449 08:28:46.838392 Saving vboot hash.
450 08:28:46.844852 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
451 08:28:46.860823 tlcl_extend: response is 0
452 08:28:46.867426 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
453 08:28:46.873832 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
454 08:28:46.888664 tlcl_extend: response is 0
455 08:28:46.895263 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
456 08:28:46.913503 tlcl_lock_nv_write: response is 0
457 08:28:46.931486 tlcl_lock_nv_write: response is 0
458 08:28:46.931613 Slot A is selected
459 08:28:46.938029 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
460 08:28:46.944788 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
461 08:28:46.951447 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
462 08:28:46.957797 BS: verstage times (exec / console): total (unknown) / 256 ms
463 08:28:46.957883
464 08:28:46.957950
465 08:28:46.964570 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
466 08:28:46.968962 Google Chrome EC: version:
467 08:28:46.972180 ro: volmar_v2.0.14126-e605144e9c
468 08:28:46.975511 rw: volmar_v0.0.55-22d1557
469 08:28:46.978537 running image: 2
470 08:28:46.981925 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
471 08:28:46.991849 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
472 08:28:46.998797 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
473 08:28:47.005407 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
474 08:28:47.015488 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
475 08:28:47.025397 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
476 08:28:47.028707 EC took 941us to calculate image hash
477 08:28:47.038818 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
478 08:28:47.041981 VB2:sync_ec() select_rw=RW(active)
479 08:28:47.053271 Waited 300us to clear limit power flag.
480 08:28:47.056959 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
481 08:28:47.060275 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
482 08:28:47.063833 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
483 08:28:47.070052 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
484 08:28:47.073682 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
485 08:28:47.076644 TCO_STS: 0000 0000
486 08:28:47.080122 GEN_PMCON: d1001038 00002200
487 08:28:47.080207 GBLRST_CAUSE: 00000040 00000000
488 08:28:47.083586 HPR_CAUSE0: 00000000
489 08:28:47.087414 prev_sleep_state 5
490 08:28:47.090963 Abort disabling TXT, as CPU is not TXT capable.
491 08:28:47.098211 cse_lite: Number of partitions = 3
492 08:28:47.101702 cse_lite: Current partition = RW
493 08:28:47.101778 cse_lite: Next partition = RW
494 08:28:47.104931 cse_lite: Flags = 0x7
495 08:28:47.111177 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
496 08:28:47.121601 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
497 08:28:47.124569 FMAP: area SI_ME found @ 1000 (5238784 bytes)
498 08:28:47.131746 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
499 08:28:47.137941 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
500 08:28:47.144502 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
501 08:28:47.147746 cse_lite: CSE CBFS RW version : 16.1.25.2049
502 08:28:47.151270 Boot Count incremented to 8295
503 08:28:47.158224 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
504 08:28:47.164453 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
505 08:28:47.177650 Probing TPM I2C: done! DID_VID 0x00281ae0
506 08:28:47.181254 Locality already claimed
507 08:28:47.184366 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
508 08:28:47.203998 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
509 08:28:47.210092 MRC: Hash idx 0x100d comparison successful.
510 08:28:47.213912 MRC cache found, size f6c8
511 08:28:47.213997 bootmode is set to: 2
512 08:28:47.217361 EC returned error result code 3
513 08:28:47.220313 FW_CONFIG value from CBI is 0x131
514 08:28:47.227155 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
515 08:28:47.230487 SPD index = 0
516 08:28:47.236933 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
517 08:28:47.237065 SPD: module type is LPDDR4X
518 08:28:47.243873 SPD: module part number is K4U6E3S4AB-MGCL
519 08:28:47.250714 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
520 08:28:47.254388 SPD: device width 16 bits, bus width 16 bits
521 08:28:47.257222 SPD: module size is 1024 MB (per channel)
522 08:28:47.326403 CBMEM:
523 08:28:47.329818 IMD: root @ 0x76fff000 254 entries.
524 08:28:47.333355 IMD: root @ 0x76ffec00 62 entries.
525 08:28:47.341467 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
526 08:28:47.344654 RO_VPD is uninitialized or empty.
527 08:28:47.348015 FMAP: area RW_VPD found @ f29000 (8192 bytes)
528 08:28:47.354492 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
529 08:28:47.357902 External stage cache:
530 08:28:47.361586 IMD: root @ 0x7bbff000 254 entries.
531 08:28:47.364475 IMD: root @ 0x7bbfec00 62 entries.
532 08:28:47.371273 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
533 08:28:47.378290 MRC: Checking cached data update for 'RW_MRC_CACHE'.
534 08:28:47.381520 MRC: 'RW_MRC_CACHE' does not need update.
535 08:28:47.381604 8 DIMMs found
536 08:28:47.384688 SMM Memory Map
537 08:28:47.388373 SMRAM : 0x7b800000 0x800000
538 08:28:47.391215 Subregion 0: 0x7b800000 0x200000
539 08:28:47.394719 Subregion 1: 0x7ba00000 0x200000
540 08:28:47.397847 Subregion 2: 0x7bc00000 0x400000
541 08:28:47.401425 top_of_ram = 0x77000000
542 08:28:47.404813 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
543 08:28:47.411064 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
544 08:28:47.417823 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
545 08:28:47.421209 MTRR Range: Start=ff000000 End=0 (Size 1000000)
546 08:28:47.421291 Normal boot
547 08:28:47.431472 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
548 08:28:47.437751 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
549 08:28:47.444134 Processing 237 relocs. Offset value of 0x74ab9000
550 08:28:47.452743 BS: romstage times (exec / console): total (unknown) / 377 ms
551 08:28:47.459975
552 08:28:47.460072
553 08:28:47.466978 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
554 08:28:47.467062 Normal boot
555 08:28:47.473485 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
556 08:28:47.480223 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
557 08:28:47.487133 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
558 08:28:47.496836 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
559 08:28:47.544734 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
560 08:28:47.551100 Processing 5931 relocs. Offset value of 0x72a2f000
561 08:28:47.554540 BS: postcar times (exec / console): total (unknown) / 51 ms
562 08:28:47.557583
563 08:28:47.557698
564 08:28:47.564399 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
565 08:28:47.567950 Reserving BERT start 76a1e000, size 10000
566 08:28:47.570664 Normal boot
567 08:28:47.574165 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
568 08:28:47.581119 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
569 08:28:47.590811 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
570 08:28:47.594273 FMAP: area RW_VPD found @ f29000 (8192 bytes)
571 08:28:47.597548 Google Chrome EC: version:
572 08:28:47.600838 ro: volmar_v2.0.14126-e605144e9c
573 08:28:47.604419 rw: volmar_v0.0.55-22d1557
574 08:28:47.604503 running image: 2
575 08:28:47.610809 ACPI _SWS is PM1 Index 8 GPE Index -1
576 08:28:47.614096 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
577 08:28:47.617744 EC returned error result code 3
578 08:28:47.621233 FW_CONFIG value from CBI is 0x131
579 08:28:47.627955 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
580 08:28:47.631343 PCI: 00:1c.2 disabled by fw_config
581 08:28:47.637670 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
582 08:28:47.641312 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
583 08:28:47.647453 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
584 08:28:47.651208 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
585 08:28:47.657692 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
586 08:28:47.664372 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
587 08:28:47.671620 microcode: sig=0x906a4 pf=0x80 revision=0x423
588 08:28:47.675159 microcode: Update skipped, already up-to-date
589 08:28:47.681370 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
590 08:28:47.713492 Detected 6 core, 8 thread CPU.
591 08:28:47.716928 Setting up SMI for CPU
592 08:28:47.720296 IED base = 0x7bc00000
593 08:28:47.720437 IED size = 0x00400000
594 08:28:47.723366 Will perform SMM setup.
595 08:28:47.727167 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
596 08:28:47.730398 LAPIC 0x0 in XAPIC mode.
597 08:28:47.740106 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
598 08:28:47.743257 Processing 18 relocs. Offset value of 0x00030000
599 08:28:47.748437 Attempting to start 7 APs
600 08:28:47.751522 Waiting for 10ms after sending INIT.
601 08:28:47.764680 Waiting for SIPI to complete...
602 08:28:47.767869 done.
603 08:28:47.767979 LAPIC 0x18 in XAPIC mode.
604 08:28:47.771278 LAPIC 0x9 in XAPIC mode.
605 08:28:47.774592 LAPIC 0x1c in XAPIC mode.
606 08:28:47.777986 Waiting for SIPI to complete...
607 08:28:47.778066 done.
608 08:28:47.781426 AP: slot 4 apic_id 1c, MCU rev: 0x00000423
609 08:28:47.784305 LAPIC 0x1e in XAPIC mode.
610 08:28:47.791164 AP: slot 2 apic_id 18, MCU rev: 0x00000423
611 08:28:47.791242 LAPIC 0x1a in XAPIC mode.
612 08:28:47.794584 LAPIC 0x1 in XAPIC mode.
613 08:28:47.797740 AP: slot 1 apic_id 1e, MCU rev: 0x00000423
614 08:28:47.804251 AP: slot 3 apic_id 1a, MCU rev: 0x00000423
615 08:28:47.807595 AP: slot 6 apic_id 1, MCU rev: 0x00000423
616 08:28:47.810984 AP: slot 5 apic_id 9, MCU rev: 0x00000423
617 08:28:47.814534 LAPIC 0x8 in XAPIC mode.
618 08:28:47.817918 AP: slot 7 apic_id 8, MCU rev: 0x00000423
619 08:28:47.821391 smm_setup_relocation_handler: enter
620 08:28:47.824337 smm_setup_relocation_handler: exit
621 08:28:47.834666 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
622 08:28:47.838123 Processing 11 relocs. Offset value of 0x00038000
623 08:28:47.844709 smm_module_setup_stub: stack_top = 0x7b804000
624 08:28:47.848117 smm_module_setup_stub: per cpu stack_size = 0x800
625 08:28:47.854396 smm_module_setup_stub: runtime.start32_offset = 0x4c
626 08:28:47.858289 smm_module_setup_stub: runtime.smm_size = 0x10000
627 08:28:47.864698 SMM Module: stub loaded at 38000. Will call 0x76a52094
628 08:28:47.867904 Installing permanent SMM handler to 0x7b800000
629 08:28:47.874669 smm_load_module: total_smm_space_needed e468, available -> 200000
630 08:28:47.884470 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
631 08:28:47.887515 Processing 255 relocs. Offset value of 0x7b9f6000
632 08:28:47.894283 smm_load_module: smram_start: 0x7b800000
633 08:28:47.897535 smm_load_module: smram_end: 7ba00000
634 08:28:47.901072 smm_load_module: handler start 0x7b9f6d5f
635 08:28:47.904416 smm_load_module: handler_size 98d0
636 08:28:47.907348 smm_load_module: fxsave_area 0x7b9ff000
637 08:28:47.910879 smm_load_module: fxsave_size 1000
638 08:28:47.914039 smm_load_module: CONFIG_MSEG_SIZE 0x0
639 08:28:47.920905 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
640 08:28:47.928234 smm_load_module: handler_mod_params.smbase = 0x7b800000
641 08:28:47.930861 smm_load_module: per_cpu_save_state_size = 0x400
642 08:28:47.934104 smm_load_module: num_cpus = 0x8
643 08:28:47.940839 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
644 08:28:47.944265 smm_load_module: total_save_state_size = 0x2000
645 08:28:47.947161 smm_load_module: cpu0 entry: 7b9e6000
646 08:28:47.954154 smm_create_map: cpus allowed in one segment 30
647 08:28:47.957212 smm_create_map: min # of segments needed 1
648 08:28:47.957291 CPU 0x0
649 08:28:47.961160 smbase 7b9e6000 entry 7b9ee000
650 08:28:47.967628 ss_start 7b9f5c00 code_end 7b9ee208
651 08:28:47.967768 CPU 0x1
652 08:28:47.970798 smbase 7b9e5c00 entry 7b9edc00
653 08:28:47.977254 ss_start 7b9f5800 code_end 7b9ede08
654 08:28:47.977365 CPU 0x2
655 08:28:47.980701 smbase 7b9e5800 entry 7b9ed800
656 08:28:47.984042 ss_start 7b9f5400 code_end 7b9eda08
657 08:28:47.987310 CPU 0x3
658 08:28:47.990621 smbase 7b9e5400 entry 7b9ed400
659 08:28:47.993910 ss_start 7b9f5000 code_end 7b9ed608
660 08:28:47.997212 CPU 0x4
661 08:28:48.000838 smbase 7b9e5000 entry 7b9ed000
662 08:28:48.003742 ss_start 7b9f4c00 code_end 7b9ed208
663 08:28:48.003849 CPU 0x5
664 08:28:48.007692 smbase 7b9e4c00 entry 7b9ecc00
665 08:28:48.014192 ss_start 7b9f4800 code_end 7b9ece08
666 08:28:48.014303 CPU 0x6
667 08:28:48.017297 smbase 7b9e4800 entry 7b9ec800
668 08:28:48.023674 ss_start 7b9f4400 code_end 7b9eca08
669 08:28:48.023782 CPU 0x7
670 08:28:48.027668 smbase 7b9e4400 entry 7b9ec400
671 08:28:48.030942 ss_start 7b9f4000 code_end 7b9ec608
672 08:28:48.040861 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
673 08:28:48.044255 Processing 11 relocs. Offset value of 0x7b9ee000
674 08:28:48.050802 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
675 08:28:48.057246 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
676 08:28:48.064094 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
677 08:28:48.070668 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
678 08:28:48.077198 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
679 08:28:48.080661 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
680 08:28:48.087665 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
681 08:28:48.093978 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
682 08:28:48.100397 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
683 08:28:48.107031 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
684 08:28:48.114053 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
685 08:28:48.120672 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
686 08:28:48.127136 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
687 08:28:48.130645 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
688 08:28:48.140362 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
689 08:28:48.144050 smm_module_setup_stub: stack_top = 0x7b804000
690 08:28:48.146694 smm_module_setup_stub: per cpu stack_size = 0x800
691 08:28:48.153607 smm_module_setup_stub: runtime.start32_offset = 0x4c
692 08:28:48.160542 smm_module_setup_stub: runtime.smm_size = 0x200000
693 08:28:48.163559 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
694 08:28:48.168185 Clearing SMI status registers
695 08:28:48.171504 SMI_STS: PM1
696 08:28:48.171610 PM1_STS: WAK PWRBTN
697 08:28:48.181800 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
698 08:28:48.184795 In relocation handler: CPU 0
699 08:28:48.188061 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
700 08:28:48.191339 Writing SMRR. base = 0x7b800006, mask=0xff800c00
701 08:28:48.194678 Relocation complete.
702 08:28:48.201604 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
703 08:28:48.204893 In relocation handler: CPU 6
704 08:28:48.208381 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
705 08:28:48.211790 Relocation complete.
706 08:28:48.217982 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
707 08:28:48.221608 In relocation handler: CPU 3
708 08:28:48.224638 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
709 08:28:48.231478 Writing SMRR. base = 0x7b800006, mask=0xff800c00
710 08:28:48.231588 Relocation complete.
711 08:28:48.238358 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
712 08:28:48.241738 In relocation handler: CPU 2
713 08:28:48.244827 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
714 08:28:48.251438 Writing SMRR. base = 0x7b800006, mask=0xff800c00
715 08:28:48.254457 Relocation complete.
716 08:28:48.261250 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
717 08:28:48.264667 In relocation handler: CPU 4
718 08:28:48.268075 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
719 08:28:48.271215 Writing SMRR. base = 0x7b800006, mask=0xff800c00
720 08:28:48.274778 Relocation complete.
721 08:28:48.281014 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
722 08:28:48.284501 In relocation handler: CPU 1
723 08:28:48.287976 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
724 08:28:48.294346 Writing SMRR. base = 0x7b800006, mask=0xff800c00
725 08:28:48.294434 Relocation complete.
726 08:28:48.301104 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
727 08:28:48.304506 In relocation handler: CPU 5
728 08:28:48.311025 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
729 08:28:48.311137 Relocation complete.
730 08:28:48.318008 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
731 08:28:48.321587 In relocation handler: CPU 7
732 08:28:48.324559 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
733 08:28:48.331057 Writing SMRR. base = 0x7b800006, mask=0xff800c00
734 08:28:48.334600 Relocation complete.
735 08:28:48.334706 Initializing CPU #0
736 08:28:48.338342 CPU: vendor Intel device 906a4
737 08:28:48.341517 CPU: family 06, model 9a, stepping 04
738 08:28:48.344424 Clearing out pending MCEs
739 08:28:48.348008 cpu: energy policy set to 7
740 08:28:48.351329 Turbo is available but hidden
741 08:28:48.354333 Turbo is available and visible
742 08:28:48.357668 microcode: Update skipped, already up-to-date
743 08:28:48.361194 CPU #0 initialized
744 08:28:48.361272 Initializing CPU #6
745 08:28:48.364445 Initializing CPU #1
746 08:28:48.368055 Initializing CPU #3
747 08:28:48.368159 Initializing CPU #2
748 08:28:48.371291 CPU: vendor Intel device 906a4
749 08:28:48.374548 CPU: family 06, model 9a, stepping 04
750 08:28:48.377723 Initializing CPU #5
751 08:28:48.381272 CPU: vendor Intel device 906a4
752 08:28:48.384586 CPU: family 06, model 9a, stepping 04
753 08:28:48.387820 Initializing CPU #4
754 08:28:48.391292 CPU: vendor Intel device 906a4
755 08:28:48.394696 CPU: family 06, model 9a, stepping 04
756 08:28:48.398159 CPU: vendor Intel device 906a4
757 08:28:48.401563 CPU: family 06, model 9a, stepping 04
758 08:28:48.404619 CPU: vendor Intel device 906a4
759 08:28:48.408006 CPU: family 06, model 9a, stepping 04
760 08:28:48.411393 CPU: vendor Intel device 906a4
761 08:28:48.414637 CPU: family 06, model 9a, stepping 04
762 08:28:48.417669 Clearing out pending MCEs
763 08:28:48.421152 Clearing out pending MCEs
764 08:28:48.421260 Clearing out pending MCEs
765 08:28:48.424709 Clearing out pending MCEs
766 08:28:48.427658 Clearing out pending MCEs
767 08:28:48.430993 cpu: energy policy set to 7
768 08:28:48.434749 cpu: energy policy set to 7
769 08:28:48.438142 microcode: Update skipped, already up-to-date
770 08:28:48.441316 CPU #2 initialized
771 08:28:48.441392 cpu: energy policy set to 7
772 08:28:48.444758 Initializing CPU #7
773 08:28:48.447822 cpu: energy policy set to 7
774 08:28:48.451292 CPU: vendor Intel device 906a4
775 08:28:48.454347 CPU: family 06, model 9a, stepping 04
776 08:28:48.458212 microcode: Update skipped, already up-to-date
777 08:28:48.461099 CPU #3 initialized
778 08:28:48.464532 cpu: energy policy set to 7
779 08:28:48.468119 microcode: Update skipped, already up-to-date
780 08:28:48.471586 CPU #4 initialized
781 08:28:48.474373 microcode: Update skipped, already up-to-date
782 08:28:48.477961 CPU #1 initialized
783 08:28:48.481256 microcode: Update skipped, already up-to-date
784 08:28:48.484785 CPU #5 initialized
785 08:28:48.484860 Clearing out pending MCEs
786 08:28:48.488037 Clearing out pending MCEs
787 08:28:48.491283 cpu: energy policy set to 7
788 08:28:48.494170 cpu: energy policy set to 7
789 08:28:48.497784 microcode: Update skipped, already up-to-date
790 08:28:48.501237 CPU #7 initialized
791 08:28:48.504662 microcode: Update skipped, already up-to-date
792 08:28:48.507919 CPU #6 initialized
793 08:28:48.510799 bsp_do_flight_plan done after 728 msecs.
794 08:28:48.514520 CPU: frequency set to 4400 MHz
795 08:28:48.517560 Enabling SMIs.
796 08:28:48.524306 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
797 08:28:48.538810 Probing TPM I2C: done! DID_VID 0x00281ae0
798 08:28:48.542347 Locality already claimed
799 08:28:48.545480 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
800 08:28:48.557036 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
801 08:28:48.560505 Enabling GPIO PM b/c CR50 has long IRQ pulse support
802 08:28:48.566941 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
803 08:28:48.573305 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
804 08:28:48.576954 Found a VBT of 9216 bytes after decompression
805 08:28:48.580270 PCI 1.0, PIN A, using IRQ #16
806 08:28:48.583329 PCI 2.0, PIN A, using IRQ #17
807 08:28:48.586932 PCI 4.0, PIN A, using IRQ #18
808 08:28:48.590147 PCI 5.0, PIN A, using IRQ #16
809 08:28:48.593713 PCI 6.0, PIN A, using IRQ #16
810 08:28:48.597050 PCI 6.2, PIN C, using IRQ #18
811 08:28:48.600175 PCI 7.0, PIN A, using IRQ #19
812 08:28:48.603577 PCI 7.1, PIN B, using IRQ #20
813 08:28:48.606535 PCI 7.2, PIN C, using IRQ #21
814 08:28:48.610434 PCI 7.3, PIN D, using IRQ #22
815 08:28:48.613411 PCI 8.0, PIN A, using IRQ #23
816 08:28:48.617040 PCI D.0, PIN A, using IRQ #17
817 08:28:48.620203 PCI D.1, PIN B, using IRQ #19
818 08:28:48.620279 PCI 10.0, PIN A, using IRQ #24
819 08:28:48.623324 PCI 10.1, PIN B, using IRQ #25
820 08:28:48.626663 PCI 10.6, PIN C, using IRQ #20
821 08:28:48.630278 PCI 10.7, PIN D, using IRQ #21
822 08:28:48.633208 PCI 11.0, PIN A, using IRQ #26
823 08:28:48.637112 PCI 11.1, PIN B, using IRQ #27
824 08:28:48.640002 PCI 11.2, PIN C, using IRQ #28
825 08:28:48.643632 PCI 11.3, PIN D, using IRQ #29
826 08:28:48.646479 PCI 12.0, PIN A, using IRQ #30
827 08:28:48.650079 PCI 12.6, PIN B, using IRQ #31
828 08:28:48.653232 PCI 12.7, PIN C, using IRQ #22
829 08:28:48.656711 PCI 13.0, PIN A, using IRQ #32
830 08:28:48.659857 PCI 13.1, PIN B, using IRQ #33
831 08:28:48.663311 PCI 13.2, PIN C, using IRQ #34
832 08:28:48.667368 PCI 13.3, PIN D, using IRQ #35
833 08:28:48.670033 PCI 14.0, PIN B, using IRQ #23
834 08:28:48.670118 PCI 14.1, PIN A, using IRQ #36
835 08:28:48.673319 PCI 14.3, PIN C, using IRQ #17
836 08:28:48.676834 PCI 15.0, PIN A, using IRQ #37
837 08:28:48.680013 PCI 15.1, PIN B, using IRQ #38
838 08:28:48.683581 PCI 15.2, PIN C, using IRQ #39
839 08:28:48.686533 PCI 15.3, PIN D, using IRQ #40
840 08:28:48.689813 PCI 16.0, PIN A, using IRQ #18
841 08:28:48.693294 PCI 16.1, PIN B, using IRQ #19
842 08:28:48.696877 PCI 16.2, PIN C, using IRQ #20
843 08:28:48.699700 PCI 16.3, PIN D, using IRQ #21
844 08:28:48.703232 PCI 16.4, PIN A, using IRQ #18
845 08:28:48.706384 PCI 16.5, PIN B, using IRQ #19
846 08:28:48.709857 PCI 17.0, PIN A, using IRQ #22
847 08:28:48.713059 PCI 19.0, PIN A, using IRQ #41
848 08:28:48.716572 PCI 19.1, PIN B, using IRQ #42
849 08:28:48.720155 PCI 19.2, PIN C, using IRQ #43
850 08:28:48.720240 PCI 1C.0, PIN A, using IRQ #16
851 08:28:48.723026 PCI 1C.1, PIN B, using IRQ #17
852 08:28:48.726450 PCI 1C.2, PIN C, using IRQ #18
853 08:28:48.729682 PCI 1C.3, PIN D, using IRQ #19
854 08:28:48.733584 PCI 1C.4, PIN A, using IRQ #16
855 08:28:48.736588 PCI 1C.5, PIN B, using IRQ #17
856 08:28:48.739677 PCI 1C.6, PIN C, using IRQ #18
857 08:28:48.743031 PCI 1C.7, PIN D, using IRQ #19
858 08:28:48.746384 PCI 1D.0, PIN A, using IRQ #16
859 08:28:48.749500 PCI 1D.1, PIN B, using IRQ #17
860 08:28:48.752848 PCI 1D.2, PIN C, using IRQ #18
861 08:28:48.756134 PCI 1D.3, PIN D, using IRQ #19
862 08:28:48.759779 PCI 1E.0, PIN A, using IRQ #23
863 08:28:48.762959 PCI 1E.1, PIN B, using IRQ #20
864 08:28:48.766063 PCI 1E.2, PIN C, using IRQ #44
865 08:28:48.769372 PCI 1E.3, PIN D, using IRQ #45
866 08:28:48.773366 PCI 1F.3, PIN B, using IRQ #22
867 08:28:48.773467 PCI 1F.4, PIN C, using IRQ #23
868 08:28:48.776194 PCI 1F.6, PIN D, using IRQ #20
869 08:28:48.779389 PCI 1F.7, PIN A, using IRQ #21
870 08:28:48.786485 IRQ: Using dynamically assigned PCI IO-APIC IRQs
871 08:28:48.792788 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
872 08:28:48.970621 FSPS returned 0
873 08:28:48.973830 Executing Phase 1 of FspMultiPhaseSiInit
874 08:28:48.983912 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
875 08:28:48.987700 port C0 DISC req: usage 1 usb3 1 usb2 1
876 08:28:48.990510 Raw Buffer output 0 00000111
877 08:28:48.993785 Raw Buffer output 1 00000000
878 08:28:48.997858 pmc_send_ipc_cmd succeeded
879 08:28:49.004317 port C1 DISC req: usage 1 usb3 3 usb2 3
880 08:28:49.004450 Raw Buffer output 0 00000331
881 08:28:49.007382 Raw Buffer output 1 00000000
882 08:28:49.011832 pmc_send_ipc_cmd succeeded
883 08:28:49.015254 Detected 6 core, 8 thread CPU.
884 08:28:49.018610 Detected 6 core, 8 thread CPU.
885 08:28:49.024216 Detected 6 core, 8 thread CPU.
886 08:28:49.027577 Detected 6 core, 8 thread CPU.
887 08:28:49.030973 Detected 6 core, 8 thread CPU.
888 08:28:49.034524 Detected 6 core, 8 thread CPU.
889 08:28:49.037343 Detected 6 core, 8 thread CPU.
890 08:28:49.041395 Detected 6 core, 8 thread CPU.
891 08:28:49.044269 Detected 6 core, 8 thread CPU.
892 08:28:49.047550 Detected 6 core, 8 thread CPU.
893 08:28:49.050580 Detected 6 core, 8 thread CPU.
894 08:28:49.054189 Detected 6 core, 8 thread CPU.
895 08:28:49.057698 Detected 6 core, 8 thread CPU.
896 08:28:49.060815 Detected 6 core, 8 thread CPU.
897 08:28:49.064222 Detected 6 core, 8 thread CPU.
898 08:28:49.067964 Detected 6 core, 8 thread CPU.
899 08:28:49.071175 Detected 6 core, 8 thread CPU.
900 08:28:49.074562 Detected 6 core, 8 thread CPU.
901 08:28:49.077519 Detected 6 core, 8 thread CPU.
902 08:28:49.077618 Detected 6 core, 8 thread CPU.
903 08:28:49.081515 Detected 6 core, 8 thread CPU.
904 08:28:49.084574 Detected 6 core, 8 thread CPU.
905 08:28:49.377660 Detected 6 core, 8 thread CPU.
906 08:28:49.381182 Detected 6 core, 8 thread CPU.
907 08:28:49.384653 Detected 6 core, 8 thread CPU.
908 08:28:49.387626 Detected 6 core, 8 thread CPU.
909 08:28:49.391122 Detected 6 core, 8 thread CPU.
910 08:28:49.394413 Detected 6 core, 8 thread CPU.
911 08:28:49.397796 Detected 6 core, 8 thread CPU.
912 08:28:49.401297 Detected 6 core, 8 thread CPU.
913 08:28:49.404503 Detected 6 core, 8 thread CPU.
914 08:28:49.407846 Detected 6 core, 8 thread CPU.
915 08:28:49.411461 Detected 6 core, 8 thread CPU.
916 08:28:49.414712 Detected 6 core, 8 thread CPU.
917 08:28:49.418003 Detected 6 core, 8 thread CPU.
918 08:28:49.421541 Detected 6 core, 8 thread CPU.
919 08:28:49.424712 Detected 6 core, 8 thread CPU.
920 08:28:49.427745 Detected 6 core, 8 thread CPU.
921 08:28:49.431405 Detected 6 core, 8 thread CPU.
922 08:28:49.434761 Detected 6 core, 8 thread CPU.
923 08:28:49.434854 Detected 6 core, 8 thread CPU.
924 08:28:49.438290 Detected 6 core, 8 thread CPU.
925 08:28:49.441238 Display FSP Version Info HOB
926 08:28:49.444755 Reference Code - CPU = c.0.65.70
927 08:28:49.447870 uCode Version = 0.0.4.23
928 08:28:49.451206 TXT ACM version = ff.ff.ff.ffff
929 08:28:49.454831 Reference Code - ME = c.0.65.70
930 08:28:49.457913 MEBx version = 0.0.0.0
931 08:28:49.461391 ME Firmware Version = Lite SKU
932 08:28:49.464855 Reference Code - PCH = c.0.65.70
933 08:28:49.467993 PCH-CRID Status = Disabled
934 08:28:49.471535 PCH-CRID Original Value = ff.ff.ff.ffff
935 08:28:49.474636 PCH-CRID New Value = ff.ff.ff.ffff
936 08:28:49.478143 OPROM - RST - RAID = ff.ff.ff.ffff
937 08:28:49.481058 PCH Hsio Version = 4.0.0.0
938 08:28:49.484329 Reference Code - SA - System Agent = c.0.65.70
939 08:28:49.488061 Reference Code - MRC = 0.0.3.80
940 08:28:49.491174 SA - PCIe Version = c.0.65.70
941 08:28:49.494629 SA-CRID Status = Disabled
942 08:28:49.497852 SA-CRID Original Value = 0.0.0.4
943 08:28:49.501331 SA-CRID New Value = 0.0.0.4
944 08:28:49.504454 OPROM - VBIOS = ff.ff.ff.ffff
945 08:28:49.508159 IO Manageability Engine FW Version = 24.0.4.0
946 08:28:49.511441 PHY Build Version = 0.0.0.2016
947 08:28:49.514501 Thunderbolt(TM) FW Version = 0.0.0.0
948 08:28:49.521388 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
949 08:28:49.527804 BS: BS_DEV_INIT_CHIPS run times (exec / console): 490 / 507 ms
950 08:28:49.527908 Enumerating buses...
951 08:28:49.534752 Show all devs... Before device enumeration.
952 08:28:49.534860 Root Device: enabled 1
953 08:28:49.537973 CPU_CLUSTER: 0: enabled 1
954 08:28:49.541405 DOMAIN: 0000: enabled 1
955 08:28:49.544430 GPIO: 0: enabled 1
956 08:28:49.544556 PCI: 00:00.0: enabled 1
957 08:28:49.548202 PCI: 00:01.0: enabled 0
958 08:28:49.551481 PCI: 00:01.1: enabled 0
959 08:28:49.551565 PCI: 00:02.0: enabled 1
960 08:28:49.554607 PCI: 00:04.0: enabled 1
961 08:28:49.558626 PCI: 00:05.0: enabled 0
962 08:28:49.561169 PCI: 00:06.0: enabled 1
963 08:28:49.561270 PCI: 00:06.2: enabled 0
964 08:28:49.564486 PCI: 00:07.0: enabled 0
965 08:28:49.568262 PCI: 00:07.1: enabled 0
966 08:28:49.571431 PCI: 00:07.2: enabled 0
967 08:28:49.571536 PCI: 00:07.3: enabled 0
968 08:28:49.574265 PCI: 00:08.0: enabled 0
969 08:28:49.578702 PCI: 00:09.0: enabled 0
970 08:28:49.581262 PCI: 00:0a.0: enabled 1
971 08:28:49.581345 PCI: 00:0d.0: enabled 1
972 08:28:49.584673 PCI: 00:0d.1: enabled 0
973 08:28:49.587622 PCI: 00:0d.2: enabled 0
974 08:28:49.590997 PCI: 00:0d.3: enabled 0
975 08:28:49.591106 PCI: 00:0e.0: enabled 0
976 08:28:49.594499 PCI: 00:10.0: enabled 0
977 08:28:49.597514 PCI: 00:10.1: enabled 0
978 08:28:49.597644 PCI: 00:10.6: enabled 0
979 08:28:49.600915 PCI: 00:10.7: enabled 0
980 08:28:49.604342 PCI: 00:12.0: enabled 0
981 08:28:49.607571 PCI: 00:12.6: enabled 0
982 08:28:49.607655 PCI: 00:12.7: enabled 0
983 08:28:49.611209 PCI: 00:13.0: enabled 0
984 08:28:49.614500 PCI: 00:14.0: enabled 1
985 08:28:49.617573 PCI: 00:14.1: enabled 0
986 08:28:49.617713 PCI: 00:14.2: enabled 1
987 08:28:49.620834 PCI: 00:14.3: enabled 1
988 08:28:49.624541 PCI: 00:15.0: enabled 1
989 08:28:49.627747 PCI: 00:15.1: enabled 1
990 08:28:49.627832 PCI: 00:15.2: enabled 0
991 08:28:49.631254 PCI: 00:15.3: enabled 1
992 08:28:49.634246 PCI: 00:16.0: enabled 1
993 08:28:49.634329 PCI: 00:16.1: enabled 0
994 08:28:49.637822 PCI: 00:16.2: enabled 0
995 08:28:49.641134 PCI: 00:16.3: enabled 0
996 08:28:49.644645 PCI: 00:16.4: enabled 0
997 08:28:49.644728 PCI: 00:16.5: enabled 0
998 08:28:49.648031 PCI: 00:17.0: enabled 1
999 08:28:49.651347 PCI: 00:19.0: enabled 0
1000 08:28:49.654379 PCI: 00:19.1: enabled 1
1001 08:28:49.654459 PCI: 00:19.2: enabled 0
1002 08:28:49.658044 PCI: 00:1a.0: enabled 0
1003 08:28:49.661149 PCI: 00:1c.0: enabled 0
1004 08:28:49.661227 PCI: 00:1c.1: enabled 0
1005 08:28:49.664595 PCI: 00:1c.2: enabled 0
1006 08:28:49.667818 PCI: 00:1c.3: enabled 0
1007 08:28:49.671219 PCI: 00:1c.4: enabled 0
1008 08:28:49.671302 PCI: 00:1c.5: enabled 0
1009 08:28:49.674421 PCI: 00:1c.6: enabled 0
1010 08:28:49.677769 PCI: 00:1c.7: enabled 0
1011 08:28:49.680996 PCI: 00:1d.0: enabled 0
1012 08:28:49.681103 PCI: 00:1d.1: enabled 0
1013 08:28:49.685761 PCI: 00:1d.2: enabled 0
1014 08:28:49.687752 PCI: 00:1d.3: enabled 0
1015 08:28:49.691074 PCI: 00:1e.0: enabled 1
1016 08:28:49.691158 PCI: 00:1e.1: enabled 0
1017 08:28:49.694623 PCI: 00:1e.2: enabled 0
1018 08:28:49.697915 PCI: 00:1e.3: enabled 1
1019 08:28:49.698030 PCI: 00:1f.0: enabled 1
1020 08:28:49.700896 PCI: 00:1f.1: enabled 0
1021 08:28:49.704465 PCI: 00:1f.2: enabled 1
1022 08:28:49.707951 PCI: 00:1f.3: enabled 1
1023 08:28:49.708035 PCI: 00:1f.4: enabled 0
1024 08:28:49.710879 PCI: 00:1f.5: enabled 1
1025 08:28:49.714225 PCI: 00:1f.6: enabled 0
1026 08:28:49.718010 PCI: 00:1f.7: enabled 0
1027 08:28:49.718093 GENERIC: 0.0: enabled 1
1028 08:28:49.721177 GENERIC: 0.0: enabled 1
1029 08:28:49.724374 GENERIC: 1.0: enabled 1
1030 08:28:49.727991 GENERIC: 0.0: enabled 1
1031 08:28:49.728069 GENERIC: 1.0: enabled 1
1032 08:28:49.730779 USB0 port 0: enabled 1
1033 08:28:49.734547 USB0 port 0: enabled 1
1034 08:28:49.734629 GENERIC: 0.0: enabled 1
1035 08:28:49.737893 I2C: 00:1a: enabled 1
1036 08:28:49.741309 I2C: 00:31: enabled 1
1037 08:28:49.741392 I2C: 00:32: enabled 1
1038 08:28:49.744386 I2C: 00:50: enabled 1
1039 08:28:49.747869 I2C: 00:10: enabled 1
1040 08:28:49.751397 I2C: 00:15: enabled 1
1041 08:28:49.751479 I2C: 00:2c: enabled 1
1042 08:28:49.754276 GENERIC: 0.0: enabled 1
1043 08:28:49.757343 SPI: 00: enabled 1
1044 08:28:49.757425 PNP: 0c09.0: enabled 1
1045 08:28:49.761493 GENERIC: 0.0: enabled 1
1046 08:28:49.764371 USB3 port 0: enabled 1
1047 08:28:49.764449 USB3 port 1: enabled 0
1048 08:28:49.767641 USB3 port 2: enabled 1
1049 08:28:49.770772 USB3 port 3: enabled 0
1050 08:28:49.770854 USB2 port 0: enabled 1
1051 08:28:49.774179 USB2 port 1: enabled 0
1052 08:28:49.777487 USB2 port 2: enabled 1
1053 08:28:49.780839 USB2 port 3: enabled 0
1054 08:28:49.780949 USB2 port 4: enabled 0
1055 08:28:49.784131 USB2 port 5: enabled 1
1056 08:28:49.787326 USB2 port 6: enabled 0
1057 08:28:49.787414 USB2 port 7: enabled 0
1058 08:28:49.790782 USB2 port 8: enabled 1
1059 08:28:49.794306 USB2 port 9: enabled 1
1060 08:28:49.797400 USB3 port 0: enabled 1
1061 08:28:49.797509 USB3 port 1: enabled 0
1062 08:28:49.801061 USB3 port 2: enabled 0
1063 08:28:49.803909 USB3 port 3: enabled 0
1064 08:28:49.804050 GENERIC: 0.0: enabled 1
1065 08:28:49.807447 GENERIC: 1.0: enabled 1
1066 08:28:49.810930 APIC: 00: enabled 1
1067 08:28:49.811055 APIC: 1e: enabled 1
1068 08:28:49.814001 APIC: 18: enabled 1
1069 08:28:49.817764 APIC: 1a: enabled 1
1070 08:28:49.817850 APIC: 1c: enabled 1
1071 08:28:49.820859 APIC: 09: enabled 1
1072 08:28:49.820942 APIC: 01: enabled 1
1073 08:28:49.823847 APIC: 08: enabled 1
1074 08:28:49.827364 Compare with tree...
1075 08:28:49.827440 Root Device: enabled 1
1076 08:28:49.831212 CPU_CLUSTER: 0: enabled 1
1077 08:28:49.833933 APIC: 00: enabled 1
1078 08:28:49.837977 APIC: 1e: enabled 1
1079 08:28:49.838073 APIC: 18: enabled 1
1080 08:28:49.840820 APIC: 1a: enabled 1
1081 08:28:49.844439 APIC: 1c: enabled 1
1082 08:28:49.844536 APIC: 09: enabled 1
1083 08:28:49.847099 APIC: 01: enabled 1
1084 08:28:49.850905 APIC: 08: enabled 1
1085 08:28:49.850976 DOMAIN: 0000: enabled 1
1086 08:28:49.854123 GPIO: 0: enabled 1
1087 08:28:49.857610 PCI: 00:00.0: enabled 1
1088 08:28:49.860683 PCI: 00:01.0: enabled 0
1089 08:28:49.860773 PCI: 00:01.1: enabled 0
1090 08:28:49.864163 PCI: 00:02.0: enabled 1
1091 08:28:49.867575 PCI: 00:04.0: enabled 1
1092 08:28:49.870550 GENERIC: 0.0: enabled 1
1093 08:28:49.873815 PCI: 00:05.0: enabled 0
1094 08:28:49.873903 PCI: 00:06.0: enabled 1
1095 08:28:49.877387 PCI: 00:06.2: enabled 0
1096 08:28:49.880727 PCI: 00:08.0: enabled 0
1097 08:28:49.883748 PCI: 00:09.0: enabled 0
1098 08:28:49.887401 PCI: 00:0a.0: enabled 1
1099 08:28:49.887470 PCI: 00:0d.0: enabled 1
1100 08:28:49.891001 USB0 port 0: enabled 1
1101 08:28:49.894462 USB3 port 0: enabled 1
1102 08:28:49.897884 USB3 port 1: enabled 0
1103 08:28:49.901345 USB3 port 2: enabled 1
1104 08:28:49.901434 USB3 port 3: enabled 0
1105 08:28:49.904142 PCI: 00:0d.1: enabled 0
1106 08:28:49.907525 PCI: 00:0d.2: enabled 0
1107 08:28:49.911162 PCI: 00:0d.3: enabled 0
1108 08:28:49.914198 PCI: 00:0e.0: enabled 0
1109 08:28:49.914305 PCI: 00:10.0: enabled 0
1110 08:28:49.917453 PCI: 00:10.1: enabled 0
1111 08:28:49.920678 PCI: 00:10.6: enabled 0
1112 08:28:49.924189 PCI: 00:10.7: enabled 0
1113 08:28:49.927367 PCI: 00:12.0: enabled 0
1114 08:28:49.927467 PCI: 00:12.6: enabled 0
1115 08:28:49.930575 PCI: 00:12.7: enabled 0
1116 08:28:49.934328 PCI: 00:13.0: enabled 0
1117 08:28:49.937221 PCI: 00:14.0: enabled 1
1118 08:28:49.937328 USB0 port 0: enabled 1
1119 08:28:49.940977 USB2 port 0: enabled 1
1120 08:28:49.943894 USB2 port 1: enabled 0
1121 08:28:49.947869 USB2 port 2: enabled 1
1122 08:28:49.950830 USB2 port 3: enabled 0
1123 08:28:49.954318 USB2 port 4: enabled 0
1124 08:28:49.954400 USB2 port 5: enabled 1
1125 08:28:49.957391 USB2 port 6: enabled 0
1126 08:28:49.960919 USB2 port 7: enabled 0
1127 08:28:49.963747 USB2 port 8: enabled 1
1128 08:28:49.967224 USB2 port 9: enabled 1
1129 08:28:49.971107 USB3 port 0: enabled 1
1130 08:28:49.971190 USB3 port 1: enabled 0
1131 08:28:49.974035 USB3 port 2: enabled 0
1132 08:28:49.977278 USB3 port 3: enabled 0
1133 08:28:49.980777 PCI: 00:14.1: enabled 0
1134 08:28:49.984207 PCI: 00:14.2: enabled 1
1135 08:28:49.984306 PCI: 00:14.3: enabled 1
1136 08:28:49.987352 GENERIC: 0.0: enabled 1
1137 08:28:49.990662 PCI: 00:15.0: enabled 1
1138 08:28:49.994240 I2C: 00:1a: enabled 1
1139 08:28:49.997420 I2C: 00:31: enabled 1
1140 08:28:49.997495 I2C: 00:32: enabled 1
1141 08:28:50.000524 PCI: 00:15.1: enabled 1
1142 08:28:50.004086 I2C: 00:50: enabled 1
1143 08:28:50.007464 PCI: 00:15.2: enabled 0
1144 08:28:50.007554 PCI: 00:15.3: enabled 1
1145 08:28:50.010292 I2C: 00:10: enabled 1
1146 08:28:50.013883 PCI: 00:16.0: enabled 1
1147 08:28:50.017152 PCI: 00:16.1: enabled 0
1148 08:28:50.020225 PCI: 00:16.2: enabled 0
1149 08:28:50.020323 PCI: 00:16.3: enabled 0
1150 08:28:50.023807 PCI: 00:16.4: enabled 0
1151 08:28:50.027180 PCI: 00:16.5: enabled 0
1152 08:28:50.030494 PCI: 00:17.0: enabled 1
1153 08:28:50.034129 PCI: 00:19.0: enabled 0
1154 08:28:50.034213 PCI: 00:19.1: enabled 1
1155 08:28:50.037028 I2C: 00:15: enabled 1
1156 08:28:50.040104 I2C: 00:2c: enabled 1
1157 08:28:50.043966 PCI: 00:19.2: enabled 0
1158 08:28:50.044051 PCI: 00:1a.0: enabled 0
1159 08:28:50.047242 PCI: 00:1e.0: enabled 1
1160 08:28:50.050400 PCI: 00:1e.1: enabled 0
1161 08:28:50.053562 PCI: 00:1e.2: enabled 0
1162 08:28:50.056778 PCI: 00:1e.3: enabled 1
1163 08:28:50.056862 SPI: 00: enabled 1
1164 08:28:50.060336 PCI: 00:1f.0: enabled 1
1165 08:28:50.063790 PNP: 0c09.0: enabled 1
1166 08:28:50.067437 PCI: 00:1f.1: enabled 0
1167 08:28:50.070214 PCI: 00:1f.2: enabled 1
1168 08:28:50.070300 GENERIC: 0.0: enabled 1
1169 08:28:50.073677 GENERIC: 0.0: enabled 1
1170 08:28:50.076950 GENERIC: 1.0: enabled 1
1171 08:28:50.080336 PCI: 00:1f.3: enabled 1
1172 08:28:50.083833 PCI: 00:1f.4: enabled 0
1173 08:28:50.083927 PCI: 00:1f.5: enabled 1
1174 08:28:50.086779 PCI: 00:1f.6: enabled 0
1175 08:28:50.090383 PCI: 00:1f.7: enabled 0
1176 08:28:50.093583 Root Device scanning...
1177 08:28:50.096950 scan_static_bus for Root Device
1178 08:28:50.097033 CPU_CLUSTER: 0 enabled
1179 08:28:50.100115 DOMAIN: 0000 enabled
1180 08:28:50.103433 DOMAIN: 0000 scanning...
1181 08:28:50.106667 PCI: pci_scan_bus for bus 00
1182 08:28:50.110269 PCI: 00:00.0 [8086/0000] ops
1183 08:28:50.113288 PCI: 00:00.0 [8086/4609] enabled
1184 08:28:50.117089 PCI: 00:02.0 [8086/0000] bus ops
1185 08:28:50.119848 PCI: 00:02.0 [8086/46b3] enabled
1186 08:28:50.123319 PCI: 00:04.0 [8086/0000] bus ops
1187 08:28:50.127164 PCI: 00:04.0 [8086/461d] enabled
1188 08:28:50.130010 PCI: 00:06.0 [8086/0000] bus ops
1189 08:28:50.133727 PCI: 00:06.0 [8086/464d] enabled
1190 08:28:50.136601 PCI: 00:08.0 [8086/464f] disabled
1191 08:28:50.139944 PCI: 00:0a.0 [8086/467d] enabled
1192 08:28:50.143351 PCI: 00:0d.0 [8086/0000] bus ops
1193 08:28:50.147108 PCI: 00:0d.0 [8086/461e] enabled
1194 08:28:50.149663 PCI: 00:14.0 [8086/0000] bus ops
1195 08:28:50.153124 PCI: 00:14.0 [8086/51ed] enabled
1196 08:28:50.156538 PCI: 00:14.2 [8086/51ef] enabled
1197 08:28:50.160286 PCI: 00:14.3 [8086/0000] bus ops
1198 08:28:50.163386 PCI: 00:14.3 [8086/51f0] enabled
1199 08:28:50.166825 PCI: 00:15.0 [8086/0000] bus ops
1200 08:28:50.169938 PCI: 00:15.0 [8086/51e8] enabled
1201 08:28:50.173691 PCI: 00:15.1 [8086/0000] bus ops
1202 08:28:50.177312 PCI: 00:15.1 [8086/51e9] enabled
1203 08:28:50.180123 PCI: 00:15.2 [8086/0000] bus ops
1204 08:28:50.183698 PCI: 00:15.2 [8086/51ea] disabled
1205 08:28:50.186977 PCI: 00:15.3 [8086/0000] bus ops
1206 08:28:50.190054 PCI: 00:15.3 [8086/51eb] enabled
1207 08:28:50.193610 PCI: 00:16.0 [8086/0000] ops
1208 08:28:50.196647 PCI: 00:16.0 [8086/51e0] enabled
1209 08:28:50.203526 PCI: Static device PCI: 00:17.0 not found, disabling it.
1210 08:28:50.206423 PCI: 00:19.0 [8086/0000] bus ops
1211 08:28:50.210186 PCI: 00:19.0 [8086/51c5] disabled
1212 08:28:50.212995 PCI: 00:19.1 [8086/0000] bus ops
1213 08:28:50.216492 PCI: 00:19.1 [8086/51c6] enabled
1214 08:28:50.219614 PCI: 00:1e.0 [8086/0000] ops
1215 08:28:50.222961 PCI: 00:1e.0 [8086/51a8] enabled
1216 08:28:50.226892 PCI: 00:1e.3 [8086/0000] bus ops
1217 08:28:50.229578 PCI: 00:1e.3 [8086/51ab] enabled
1218 08:28:50.233082 PCI: 00:1f.0 [8086/0000] bus ops
1219 08:28:50.236542 PCI: 00:1f.0 [8086/5182] enabled
1220 08:28:50.236657 RTC Init
1221 08:28:50.240051 Set power on after power failure.
1222 08:28:50.242782 Disabling Deep S3
1223 08:28:50.246276 Disabling Deep S3
1224 08:28:50.246358 Disabling Deep S4
1225 08:28:50.249893 Disabling Deep S4
1226 08:28:50.249977 Disabling Deep S5
1227 08:28:50.253024 Disabling Deep S5
1228 08:28:50.256482 PCI: 00:1f.2 [0000/0000] hidden
1229 08:28:50.259987 PCI: 00:1f.3 [8086/0000] bus ops
1230 08:28:50.262837 PCI: 00:1f.3 [8086/51c8] enabled
1231 08:28:50.266246 PCI: 00:1f.5 [8086/0000] bus ops
1232 08:28:50.269638 PCI: 00:1f.5 [8086/51a4] enabled
1233 08:28:50.269750 GPIO: 0 enabled
1234 08:28:50.273029 PCI: Leftover static devices:
1235 08:28:50.276300 PCI: 00:01.0
1236 08:28:50.276382 PCI: 00:01.1
1237 08:28:50.276447 PCI: 00:05.0
1238 08:28:50.280018 PCI: 00:06.2
1239 08:28:50.280101 PCI: 00:09.0
1240 08:28:50.283000 PCI: 00:0d.1
1241 08:28:50.283083 PCI: 00:0d.2
1242 08:28:50.283148 PCI: 00:0d.3
1243 08:28:50.286206 PCI: 00:0e.0
1244 08:28:50.286288 PCI: 00:10.0
1245 08:28:50.289735 PCI: 00:10.1
1246 08:28:50.289817 PCI: 00:10.6
1247 08:28:50.293148 PCI: 00:10.7
1248 08:28:50.293231 PCI: 00:12.0
1249 08:28:50.293296 PCI: 00:12.6
1250 08:28:50.296648 PCI: 00:12.7
1251 08:28:50.296737 PCI: 00:13.0
1252 08:28:50.300139 PCI: 00:14.1
1253 08:28:50.300221 PCI: 00:16.1
1254 08:28:50.300286 PCI: 00:16.2
1255 08:28:50.302989 PCI: 00:16.3
1256 08:28:50.303104 PCI: 00:16.4
1257 08:28:50.306753 PCI: 00:16.5
1258 08:28:50.306836 PCI: 00:17.0
1259 08:28:50.306902 PCI: 00:19.2
1260 08:28:50.309668 PCI: 00:1a.0
1261 08:28:50.309751 PCI: 00:1e.1
1262 08:28:50.313138 PCI: 00:1e.2
1263 08:28:50.313220 PCI: 00:1f.1
1264 08:28:50.313285 PCI: 00:1f.4
1265 08:28:50.316722 PCI: 00:1f.6
1266 08:28:50.316805 PCI: 00:1f.7
1267 08:28:50.319717 PCI: Check your devicetree.cb.
1268 08:28:50.323606 PCI: 00:02.0 scanning...
1269 08:28:50.326147 scan_generic_bus for PCI: 00:02.0
1270 08:28:50.329953 scan_generic_bus for PCI: 00:02.0 done
1271 08:28:50.337009 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1272 08:28:50.337127 PCI: 00:04.0 scanning...
1273 08:28:50.339938 scan_generic_bus for PCI: 00:04.0
1274 08:28:50.342960 GENERIC: 0.0 enabled
1275 08:28:50.349573 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1276 08:28:50.353261 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1277 08:28:50.356442 PCI: 00:06.0 scanning...
1278 08:28:50.359719 do_pci_scan_bridge for PCI: 00:06.0
1279 08:28:50.363280 PCI: pci_scan_bus for bus 01
1280 08:28:50.366458 PCI: 01:00.0 [15b7/5009] enabled
1281 08:28:50.369803 Enabling Common Clock Configuration
1282 08:28:50.372910 L1 Sub-State supported from root port 6
1283 08:28:50.376698 L1 Sub-State Support = 0x5
1284 08:28:50.379775 CommonModeRestoreTime = 0x6e
1285 08:28:50.383131 Power On Value = 0x5, Power On Scale = 0x2
1286 08:28:50.386581 ASPM: Enabled L1
1287 08:28:50.389718 PCIe: Max_Payload_Size adjusted to 256
1288 08:28:50.393240 PCI: 01:00.0: Enabled LTR
1289 08:28:50.396461 PCI: 01:00.0: Programmed LTR max latencies
1290 08:28:50.402989 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1291 08:28:50.403065 PCI: 00:0d.0 scanning...
1292 08:28:50.406551 scan_static_bus for PCI: 00:0d.0
1293 08:28:50.410077 USB0 port 0 enabled
1294 08:28:50.413111 USB0 port 0 scanning...
1295 08:28:50.416794 scan_static_bus for USB0 port 0
1296 08:28:50.416899 USB3 port 0 enabled
1297 08:28:50.420381 USB3 port 1 disabled
1298 08:28:50.423198 USB3 port 2 enabled
1299 08:28:50.423271 USB3 port 3 disabled
1300 08:28:50.426799 USB3 port 0 scanning...
1301 08:28:50.429737 scan_static_bus for USB3 port 0
1302 08:28:50.433666 scan_static_bus for USB3 port 0 done
1303 08:28:50.436910 scan_bus: bus USB3 port 0 finished in 6 msecs
1304 08:28:50.439818 USB3 port 2 scanning...
1305 08:28:50.443412 scan_static_bus for USB3 port 2
1306 08:28:50.446554 scan_static_bus for USB3 port 2 done
1307 08:28:50.449983 scan_bus: bus USB3 port 2 finished in 6 msecs
1308 08:28:50.456581 scan_static_bus for USB0 port 0 done
1309 08:28:50.460247 scan_bus: bus USB0 port 0 finished in 43 msecs
1310 08:28:50.463175 scan_static_bus for PCI: 00:0d.0 done
1311 08:28:50.470619 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1312 08:28:50.470700 PCI: 00:14.0 scanning...
1313 08:28:50.473390 scan_static_bus for PCI: 00:14.0
1314 08:28:50.476954 USB0 port 0 enabled
1315 08:28:50.480107 USB0 port 0 scanning...
1316 08:28:50.483227 scan_static_bus for USB0 port 0
1317 08:28:50.483338 USB2 port 0 enabled
1318 08:28:50.486464 USB2 port 1 disabled
1319 08:28:50.490063 USB2 port 2 enabled
1320 08:28:50.490139 USB2 port 3 disabled
1321 08:28:50.493332 USB2 port 4 disabled
1322 08:28:50.493407 USB2 port 5 enabled
1323 08:28:50.496653 USB2 port 6 disabled
1324 08:28:50.499816 USB2 port 7 disabled
1325 08:28:50.499893 USB2 port 8 enabled
1326 08:28:50.503267 USB2 port 9 enabled
1327 08:28:50.506521 USB3 port 0 enabled
1328 08:28:50.506597 USB3 port 1 disabled
1329 08:28:50.510098 USB3 port 2 disabled
1330 08:28:50.513040 USB3 port 3 disabled
1331 08:28:50.513113 USB2 port 0 scanning...
1332 08:28:50.516838 scan_static_bus for USB2 port 0
1333 08:28:50.519965 scan_static_bus for USB2 port 0 done
1334 08:28:50.526439 scan_bus: bus USB2 port 0 finished in 6 msecs
1335 08:28:50.529586 USB2 port 2 scanning...
1336 08:28:50.529660 scan_static_bus for USB2 port 2
1337 08:28:50.536507 scan_static_bus for USB2 port 2 done
1338 08:28:50.539910 scan_bus: bus USB2 port 2 finished in 6 msecs
1339 08:28:50.543448 USB2 port 5 scanning...
1340 08:28:50.546355 scan_static_bus for USB2 port 5
1341 08:28:50.550066 scan_static_bus for USB2 port 5 done
1342 08:28:50.553104 scan_bus: bus USB2 port 5 finished in 6 msecs
1343 08:28:50.556993 USB2 port 8 scanning...
1344 08:28:50.559651 scan_static_bus for USB2 port 8
1345 08:28:50.563350 scan_static_bus for USB2 port 8 done
1346 08:28:50.566263 scan_bus: bus USB2 port 8 finished in 6 msecs
1347 08:28:50.569767 USB2 port 9 scanning...
1348 08:28:50.573209 scan_static_bus for USB2 port 9
1349 08:28:50.576242 scan_static_bus for USB2 port 9 done
1350 08:28:50.583137 scan_bus: bus USB2 port 9 finished in 6 msecs
1351 08:28:50.583217 USB3 port 0 scanning...
1352 08:28:50.586889 scan_static_bus for USB3 port 0
1353 08:28:50.589961 scan_static_bus for USB3 port 0 done
1354 08:28:50.596734 scan_bus: bus USB3 port 0 finished in 6 msecs
1355 08:28:50.599925 scan_static_bus for USB0 port 0 done
1356 08:28:50.602818 scan_bus: bus USB0 port 0 finished in 120 msecs
1357 08:28:50.606250 scan_static_bus for PCI: 00:14.0 done
1358 08:28:50.613111 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1359 08:28:50.616114 PCI: 00:14.3 scanning...
1360 08:28:50.619711 scan_static_bus for PCI: 00:14.3
1361 08:28:50.619845 GENERIC: 0.0 enabled
1362 08:28:50.623258 scan_static_bus for PCI: 00:14.3 done
1363 08:28:50.629619 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1364 08:28:50.633203 PCI: 00:15.0 scanning...
1365 08:28:50.636707 scan_static_bus for PCI: 00:15.0
1366 08:28:50.636826 I2C: 00:1a enabled
1367 08:28:50.639419 I2C: 00:31 enabled
1368 08:28:50.639498 I2C: 00:32 enabled
1369 08:28:50.646351 scan_static_bus for PCI: 00:15.0 done
1370 08:28:50.649894 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1371 08:28:50.652671 PCI: 00:15.1 scanning...
1372 08:28:50.656075 scan_static_bus for PCI: 00:15.1
1373 08:28:50.656145 I2C: 00:50 enabled
1374 08:28:50.663160 scan_static_bus for PCI: 00:15.1 done
1375 08:28:50.666325 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1376 08:28:50.669559 PCI: 00:15.3 scanning...
1377 08:28:50.672630 scan_static_bus for PCI: 00:15.3
1378 08:28:50.672706 I2C: 00:10 enabled
1379 08:28:50.676150 scan_static_bus for PCI: 00:15.3 done
1380 08:28:50.682530 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1381 08:28:50.686111 PCI: 00:19.1 scanning...
1382 08:28:50.689613 scan_static_bus for PCI: 00:19.1
1383 08:28:50.689684 I2C: 00:15 enabled
1384 08:28:50.693063 I2C: 00:2c enabled
1385 08:28:50.696451 scan_static_bus for PCI: 00:19.1 done
1386 08:28:50.699306 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1387 08:28:50.703009 PCI: 00:1e.3 scanning...
1388 08:28:50.706183 scan_generic_bus for PCI: 00:1e.3
1389 08:28:50.709089 SPI: 00 enabled
1390 08:28:50.712571 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1391 08:28:50.719308 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1392 08:28:50.722645 PCI: 00:1f.0 scanning...
1393 08:28:50.725967 scan_static_bus for PCI: 00:1f.0
1394 08:28:50.726073 PNP: 0c09.0 enabled
1395 08:28:50.728952 PNP: 0c09.0 scanning...
1396 08:28:50.732537 scan_static_bus for PNP: 0c09.0
1397 08:28:50.735758 scan_static_bus for PNP: 0c09.0 done
1398 08:28:50.742474 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1399 08:28:50.745798 scan_static_bus for PCI: 00:1f.0 done
1400 08:28:50.749253 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1401 08:28:50.752833 PCI: 00:1f.2 scanning...
1402 08:28:50.755604 scan_static_bus for PCI: 00:1f.2
1403 08:28:50.755710 GENERIC: 0.0 enabled
1404 08:28:50.759444 GENERIC: 0.0 scanning...
1405 08:28:50.762737 scan_static_bus for GENERIC: 0.0
1406 08:28:50.765997 GENERIC: 0.0 enabled
1407 08:28:50.769358 GENERIC: 1.0 enabled
1408 08:28:50.772657 scan_static_bus for GENERIC: 0.0 done
1409 08:28:50.775618 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1410 08:28:50.779341 scan_static_bus for PCI: 00:1f.2 done
1411 08:28:50.785728 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1412 08:28:50.785808 PCI: 00:1f.3 scanning...
1413 08:28:50.789261 scan_static_bus for PCI: 00:1f.3
1414 08:28:50.795727 scan_static_bus for PCI: 00:1f.3 done
1415 08:28:50.798901 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1416 08:28:50.802424 PCI: 00:1f.5 scanning...
1417 08:28:50.806072 scan_generic_bus for PCI: 00:1f.5
1418 08:28:50.808947 scan_generic_bus for PCI: 00:1f.5 done
1419 08:28:50.812864 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1420 08:28:50.819132 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1421 08:28:50.822212 scan_static_bus for Root Device done
1422 08:28:50.825418 scan_bus: bus Root Device finished in 729 msecs
1423 08:28:50.829426 done
1424 08:28:50.832159 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1425 08:28:50.839116 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1426 08:28:50.845355 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1427 08:28:50.848602 SPI flash protection: WPSW=1 SRP0=0
1428 08:28:50.856382 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1429 08:28:50.858893 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1430 08:28:50.862195 found VGA at PCI: 00:02.0
1431 08:28:50.865890 Setting up VGA for PCI: 00:02.0
1432 08:28:50.872093 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1433 08:28:50.875800 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1434 08:28:50.878890 Allocating resources...
1435 08:28:50.878963 Reading resources...
1436 08:28:50.885662 Root Device read_resources bus 0 link: 0
1437 08:28:50.888951 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1438 08:28:50.895287 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1439 08:28:50.898718 DOMAIN: 0000 read_resources bus 0 link: 0
1440 08:28:50.905831 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1441 08:28:50.912309 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1442 08:28:50.915580 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1443 08:28:50.922605 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1444 08:28:50.928697 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1445 08:28:50.935481 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1446 08:28:50.942102 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1447 08:28:50.948429 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1448 08:28:50.955112 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1449 08:28:50.961891 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1450 08:28:50.968638 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1451 08:28:50.975547 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1452 08:28:50.982478 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1453 08:28:50.985236 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1454 08:28:50.991695 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1455 08:28:50.998994 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1456 08:28:51.005462 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1457 08:28:51.011964 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1458 08:28:51.019178 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1459 08:28:51.024936 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1460 08:28:51.031675 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1461 08:28:51.035350 PCI: 00:04.0 read_resources bus 1 link: 0
1462 08:28:51.038372 PCI: 00:04.0 read_resources bus 1 link: 0 done
1463 08:28:51.045109 PCI: 00:06.0 read_resources bus 1 link: 0
1464 08:28:51.048327 PCI: 00:06.0 read_resources bus 1 link: 0 done
1465 08:28:51.051662 PCI: 00:0d.0 read_resources bus 0 link: 0
1466 08:28:51.055197 USB0 port 0 read_resources bus 0 link: 0
1467 08:28:51.061641 USB0 port 0 read_resources bus 0 link: 0 done
1468 08:28:51.065050 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1469 08:28:51.071905 PCI: 00:14.0 read_resources bus 0 link: 0
1470 08:28:51.074947 USB0 port 0 read_resources bus 0 link: 0
1471 08:28:51.078451 USB0 port 0 read_resources bus 0 link: 0 done
1472 08:28:51.085448 PCI: 00:14.0 read_resources bus 0 link: 0 done
1473 08:28:51.088512 PCI: 00:14.3 read_resources bus 0 link: 0
1474 08:28:51.092178 PCI: 00:14.3 read_resources bus 0 link: 0 done
1475 08:28:51.098430 PCI: 00:15.0 read_resources bus 0 link: 0
1476 08:28:51.101887 PCI: 00:15.0 read_resources bus 0 link: 0 done
1477 08:28:51.105150 PCI: 00:15.1 read_resources bus 0 link: 0
1478 08:28:51.112100 PCI: 00:15.1 read_resources bus 0 link: 0 done
1479 08:28:51.114881 PCI: 00:15.3 read_resources bus 0 link: 0
1480 08:28:51.118543 PCI: 00:15.3 read_resources bus 0 link: 0 done
1481 08:28:51.125332 PCI: 00:19.1 read_resources bus 0 link: 0
1482 08:28:51.128228 PCI: 00:19.1 read_resources bus 0 link: 0 done
1483 08:28:51.131740 PCI: 00:1e.3 read_resources bus 2 link: 0
1484 08:28:51.138324 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1485 08:28:51.141863 PCI: 00:1f.0 read_resources bus 0 link: 0
1486 08:28:51.148504 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1487 08:28:51.151903 PCI: 00:1f.2 read_resources bus 0 link: 0
1488 08:28:51.154984 GENERIC: 0.0 read_resources bus 0 link: 0
1489 08:28:51.161379 GENERIC: 0.0 read_resources bus 0 link: 0 done
1490 08:28:51.164894 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1491 08:28:51.168436 DOMAIN: 0000 read_resources bus 0 link: 0 done
1492 08:28:51.174916 Root Device read_resources bus 0 link: 0 done
1493 08:28:51.178593 Done reading resources.
1494 08:28:51.181894 Show resources in subtree (Root Device)...After reading.
1495 08:28:51.188106 Root Device child on link 0 CPU_CLUSTER: 0
1496 08:28:51.191309 CPU_CLUSTER: 0 child on link 0 APIC: 00
1497 08:28:51.191391 APIC: 00
1498 08:28:51.194750 APIC: 1e
1499 08:28:51.194828 APIC: 18
1500 08:28:51.194890 APIC: 1a
1501 08:28:51.198176 APIC: 1c
1502 08:28:51.198258 APIC: 09
1503 08:28:51.201677 APIC: 01
1504 08:28:51.201749 APIC: 08
1505 08:28:51.204997 DOMAIN: 0000 child on link 0 GPIO: 0
1506 08:28:51.214604 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1507 08:28:51.224681 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1508 08:28:51.224773 GPIO: 0
1509 08:28:51.228061 PCI: 00:00.0
1510 08:28:51.237981 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1511 08:28:51.244546 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1512 08:28:51.254972 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1513 08:28:51.265026 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1514 08:28:51.274738 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1515 08:28:51.284703 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1516 08:28:51.294326 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1517 08:28:51.301039 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1518 08:28:51.311198 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1519 08:28:51.321100 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1520 08:28:51.331374 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1521 08:28:51.341157 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1522 08:28:51.351310 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1523 08:28:51.358298 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1524 08:28:51.368116 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1525 08:28:51.377763 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1526 08:28:51.387979 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1527 08:28:51.398156 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1528 08:28:51.408006 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1529 08:28:51.418248 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1530 08:28:51.424928 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1531 08:28:51.434680 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1532 08:28:51.444987 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1533 08:28:51.454458 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1534 08:28:51.464727 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1535 08:28:51.474581 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1536 08:28:51.481536 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1537 08:28:51.491326 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1538 08:28:51.494830 PCI: 00:02.0
1539 08:28:51.504985 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1540 08:28:51.514720 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1541 08:28:51.524614 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1542 08:28:51.528074 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1543 08:28:51.537769 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1544 08:28:51.541460 GENERIC: 0.0
1545 08:28:51.544498 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1546 08:28:51.551464 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1547 08:28:51.561325 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1548 08:28:51.571194 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1549 08:28:51.574573 PCI: 01:00.0
1550 08:28:51.584604 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1551 08:28:51.594734 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1552 08:28:51.594821 PCI: 00:08.0
1553 08:28:51.598190 PCI: 00:0a.0
1554 08:28:51.607567 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1555 08:28:51.611185 PCI: 00:0d.0 child on link 0 USB0 port 0
1556 08:28:51.621043 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1557 08:28:51.624363 USB0 port 0 child on link 0 USB3 port 0
1558 08:28:51.627845 USB3 port 0
1559 08:28:51.627920 USB3 port 1
1560 08:28:51.631077 USB3 port 2
1561 08:28:51.631149 USB3 port 3
1562 08:28:51.637697 PCI: 00:14.0 child on link 0 USB0 port 0
1563 08:28:51.648002 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1564 08:28:51.651443 USB0 port 0 child on link 0 USB2 port 0
1565 08:28:51.654686 USB2 port 0
1566 08:28:51.654783 USB2 port 1
1567 08:28:51.657878 USB2 port 2
1568 08:28:51.657952 USB2 port 3
1569 08:28:51.661388 USB2 port 4
1570 08:28:51.661461 USB2 port 5
1571 08:28:51.664366 USB2 port 6
1572 08:28:51.664437 USB2 port 7
1573 08:28:51.668163 USB2 port 8
1574 08:28:51.668235 USB2 port 9
1575 08:28:51.671461 USB3 port 0
1576 08:28:51.671537 USB3 port 1
1577 08:28:51.674397 USB3 port 2
1578 08:28:51.678139 USB3 port 3
1579 08:28:51.678209 PCI: 00:14.2
1580 08:28:51.687896 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1581 08:28:51.698048 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1582 08:28:51.701119 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1583 08:28:51.711163 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1584 08:28:51.714210 GENERIC: 0.0
1585 08:28:51.717466 PCI: 00:15.0 child on link 0 I2C: 00:1a
1586 08:28:51.727390 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1587 08:28:51.730666 I2C: 00:1a
1588 08:28:51.730745 I2C: 00:31
1589 08:28:51.734353 I2C: 00:32
1590 08:28:51.737517 PCI: 00:15.1 child on link 0 I2C: 00:50
1591 08:28:51.748266 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1592 08:28:51.748354 I2C: 00:50
1593 08:28:51.751125 PCI: 00:15.2
1594 08:28:51.754651 PCI: 00:15.3 child on link 0 I2C: 00:10
1595 08:28:51.764379 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1596 08:28:51.767640 I2C: 00:10
1597 08:28:51.767719 PCI: 00:16.0
1598 08:28:51.777366 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1599 08:28:51.780885 PCI: 00:19.0
1600 08:28:51.784366 PCI: 00:19.1 child on link 0 I2C: 00:15
1601 08:28:51.794262 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1602 08:28:51.794345 I2C: 00:15
1603 08:28:51.797422 I2C: 00:2c
1604 08:28:51.797499 PCI: 00:1e.0
1605 08:28:51.810739 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1606 08:28:51.814095 PCI: 00:1e.3 child on link 0 SPI: 00
1607 08:28:51.824463 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1608 08:28:51.824550 SPI: 00
1609 08:28:51.830745 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1610 08:28:51.837714 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1611 08:28:51.841083 PNP: 0c09.0
1612 08:28:51.847401 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1613 08:28:51.853929 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1614 08:28:51.860978 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1615 08:28:51.870802 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1616 08:28:51.877422 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1617 08:28:51.877549 GENERIC: 0.0
1618 08:28:51.880515 GENERIC: 1.0
1619 08:28:51.880591 PCI: 00:1f.3
1620 08:28:51.891067 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1621 08:28:51.900713 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1622 08:28:51.903988 PCI: 00:1f.5
1623 08:28:51.914044 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1624 08:28:51.920629 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1625 08:28:51.926998 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1626 08:28:51.930705 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1627 08:28:51.937361 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1628 08:28:51.940587 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1629 08:28:51.947327 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1630 08:28:51.953936 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1631 08:28:51.960628 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1632 08:28:51.967171 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1633 08:28:51.977149 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1634 08:28:51.980430 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1635 08:28:51.990740 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1636 08:28:51.997133 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1637 08:28:52.003474 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1638 08:28:52.007076 DOMAIN: 0000: Resource ranges:
1639 08:28:52.010416 * Base: 1000, Size: 800, Tag: 100
1640 08:28:52.014031 * Base: 1900, Size: e700, Tag: 100
1641 08:28:52.020380 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1642 08:28:52.026832 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1643 08:28:52.033710 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1644 08:28:52.040098 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1645 08:28:52.050598 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1646 08:28:52.056744 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1647 08:28:52.063282 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1648 08:28:52.073426 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1649 08:28:52.080264 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1650 08:28:52.086712 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1651 08:28:52.096840 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1652 08:28:52.104049 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1653 08:28:52.110451 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1654 08:28:52.120228 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1655 08:28:52.127165 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1656 08:28:52.133518 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1657 08:28:52.140306 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1658 08:28:52.150226 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1659 08:28:52.156544 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1660 08:28:52.163346 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1661 08:28:52.173355 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1662 08:28:52.179805 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1663 08:28:52.186745 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1664 08:28:52.196409 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1665 08:28:52.203367 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1666 08:28:52.209865 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1667 08:28:52.219815 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1668 08:28:52.226752 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1669 08:28:52.233206 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1670 08:28:52.243772 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1671 08:28:52.249690 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1672 08:28:52.256317 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1673 08:28:52.266362 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1674 08:28:52.269899 DOMAIN: 0000: Resource ranges:
1675 08:28:52.272898 * Base: 80400000, Size: 3fc00000, Tag: 200
1676 08:28:52.276282 * Base: d0000000, Size: 28000000, Tag: 200
1677 08:28:52.279733 * Base: fa000000, Size: 1000000, Tag: 200
1678 08:28:52.286017 * Base: fb001000, Size: 17ff000, Tag: 200
1679 08:28:52.289360 * Base: fe800000, Size: 300000, Tag: 200
1680 08:28:52.293120 * Base: feb80000, Size: 80000, Tag: 200
1681 08:28:52.299567 * Base: fed00000, Size: 40000, Tag: 200
1682 08:28:52.303039 * Base: fed70000, Size: 10000, Tag: 200
1683 08:28:52.305974 * Base: fed88000, Size: 8000, Tag: 200
1684 08:28:52.309685 * Base: fed93000, Size: d000, Tag: 200
1685 08:28:52.313012 * Base: feda2000, Size: 1e000, Tag: 200
1686 08:28:52.319443 * Base: fede0000, Size: 1220000, Tag: 200
1687 08:28:52.322823 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1688 08:28:52.329087 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1689 08:28:52.336258 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1690 08:28:52.342546 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1691 08:28:52.349139 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1692 08:28:52.355915 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1693 08:28:52.363148 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1694 08:28:52.369319 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1695 08:28:52.376257 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1696 08:28:52.382961 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1697 08:28:52.389207 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1698 08:28:52.396548 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1699 08:28:52.402419 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1700 08:28:52.408814 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1701 08:28:52.415900 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1702 08:28:52.422362 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1703 08:28:52.428589 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1704 08:28:52.435181 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1705 08:28:52.441766 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1706 08:28:52.448766 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1707 08:28:52.458618 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1708 08:28:52.465374 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1709 08:28:52.468556 PCI: 00:06.0: Resource ranges:
1710 08:28:52.472166 * Base: 80400000, Size: 100000, Tag: 200
1711 08:28:52.478582 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1712 08:28:52.485363 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1713 08:28:52.495046 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1714 08:28:52.501819 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1715 08:28:52.505435 Root Device assign_resources, bus 0 link: 0
1716 08:28:52.511778 DOMAIN: 0000 assign_resources, bus 0 link: 0
1717 08:28:52.518519 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1718 08:28:52.527964 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1719 08:28:52.534647 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1720 08:28:52.541468 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1721 08:28:52.547819 PCI: 00:04.0 assign_resources, bus 1 link: 0
1722 08:28:52.551531 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1723 08:28:52.561708 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1724 08:28:52.571456 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1725 08:28:52.578138 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1726 08:28:52.585052 PCI: 00:06.0 assign_resources, bus 1 link: 0
1727 08:28:52.591339 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1728 08:28:52.597878 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1729 08:28:52.604726 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1730 08:28:52.611377 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1731 08:28:52.621266 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1732 08:28:52.624212 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1733 08:28:52.631038 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1734 08:28:52.638025 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1735 08:28:52.640955 PCI: 00:14.0 assign_resources, bus 0 link: 0
1736 08:28:52.647786 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1737 08:28:52.654033 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1738 08:28:52.664333 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1739 08:28:52.670796 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1740 08:28:52.674136 PCI: 00:14.3 assign_resources, bus 0 link: 0
1741 08:28:52.680667 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1742 08:28:52.687325 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1743 08:28:52.693801 PCI: 00:15.0 assign_resources, bus 0 link: 0
1744 08:28:52.697353 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1745 08:28:52.707119 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1746 08:28:52.710601 PCI: 00:15.1 assign_resources, bus 0 link: 0
1747 08:28:52.717358 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1748 08:28:52.724385 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1749 08:28:52.727657 PCI: 00:15.3 assign_resources, bus 0 link: 0
1750 08:28:52.733612 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1751 08:28:52.740564 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1752 08:28:52.750436 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1753 08:28:52.754076 PCI: 00:19.1 assign_resources, bus 0 link: 0
1754 08:28:52.756928 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1755 08:28:52.767227 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1756 08:28:52.770389 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1757 08:28:52.776811 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1758 08:28:52.780101 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1759 08:28:52.786789 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1760 08:28:52.790318 LPC: Trying to open IO window from 800 size 1ff
1761 08:28:52.797387 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1762 08:28:52.807365 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1763 08:28:52.813430 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1764 08:28:52.820141 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1765 08:28:52.823393 Root Device assign_resources, bus 0 link: 0 done
1766 08:28:52.826947 Done setting resources.
1767 08:28:52.833506 Show resources in subtree (Root Device)...After assigning values.
1768 08:28:52.836792 Root Device child on link 0 CPU_CLUSTER: 0
1769 08:28:52.843165 CPU_CLUSTER: 0 child on link 0 APIC: 00
1770 08:28:52.843247 APIC: 00
1771 08:28:52.843314 APIC: 1e
1772 08:28:52.846780 APIC: 18
1773 08:28:52.846855 APIC: 1a
1774 08:28:52.846918 APIC: 1c
1775 08:28:52.850130 APIC: 09
1776 08:28:52.850204 APIC: 01
1777 08:28:52.853612 APIC: 08
1778 08:28:52.856497 DOMAIN: 0000 child on link 0 GPIO: 0
1779 08:28:52.866500 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1780 08:28:52.876749 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1781 08:28:52.876835 GPIO: 0
1782 08:28:52.876939 PCI: 00:00.0
1783 08:28:52.886315 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1784 08:28:52.896186 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1785 08:28:52.906516 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1786 08:28:52.916255 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1787 08:28:52.926158 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1788 08:28:52.932838 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1789 08:28:52.942548 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1790 08:28:52.952787 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1791 08:28:52.963073 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1792 08:28:52.972401 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1793 08:28:52.982810 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1794 08:28:52.992418 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1795 08:28:52.999383 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1796 08:28:53.009363 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1797 08:28:53.019181 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1798 08:28:53.029069 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1799 08:28:53.039118 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1800 08:28:53.049443 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1801 08:28:53.059374 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1802 08:28:53.065741 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1803 08:28:53.075567 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1804 08:28:53.085520 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1805 08:28:53.096040 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1806 08:28:53.105925 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1807 08:28:53.115241 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1808 08:28:53.125138 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1809 08:28:53.135030 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1810 08:28:53.142227 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1811 08:28:53.145060 PCI: 00:02.0
1812 08:28:53.154881 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1813 08:28:53.164761 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1814 08:28:53.175016 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1815 08:28:53.181672 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1816 08:28:53.191407 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1817 08:28:53.191521 GENERIC: 0.0
1818 08:28:53.198171 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1819 08:28:53.205137 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1820 08:28:53.217954 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1821 08:28:53.228343 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1822 08:28:53.231484 PCI: 01:00.0
1823 08:28:53.241408 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1824 08:28:53.251262 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1825 08:28:53.251378 PCI: 00:08.0
1826 08:28:53.254399 PCI: 00:0a.0
1827 08:28:53.264291 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1828 08:28:53.267908 PCI: 00:0d.0 child on link 0 USB0 port 0
1829 08:28:53.277968 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1830 08:28:53.284611 USB0 port 0 child on link 0 USB3 port 0
1831 08:28:53.284719 USB3 port 0
1832 08:28:53.287929 USB3 port 1
1833 08:28:53.288009 USB3 port 2
1834 08:28:53.290848 USB3 port 3
1835 08:28:53.294530 PCI: 00:14.0 child on link 0 USB0 port 0
1836 08:28:53.304790 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1837 08:28:53.311112 USB0 port 0 child on link 0 USB2 port 0
1838 08:28:53.311221 USB2 port 0
1839 08:28:53.314539 USB2 port 1
1840 08:28:53.314641 USB2 port 2
1841 08:28:53.318153 USB2 port 3
1842 08:28:53.318229 USB2 port 4
1843 08:28:53.321091 USB2 port 5
1844 08:28:53.321174 USB2 port 6
1845 08:28:53.324095 USB2 port 7
1846 08:28:53.324173 USB2 port 8
1847 08:28:53.327793 USB2 port 9
1848 08:28:53.327939 USB3 port 0
1849 08:28:53.330909 USB3 port 1
1850 08:28:53.334744 USB3 port 2
1851 08:28:53.334863 USB3 port 3
1852 08:28:53.337605 PCI: 00:14.2
1853 08:28:53.347506 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1854 08:28:53.357508 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1855 08:28:53.360624 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1856 08:28:53.370423 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1857 08:28:53.373786 GENERIC: 0.0
1858 08:28:53.377387 PCI: 00:15.0 child on link 0 I2C: 00:1a
1859 08:28:53.387271 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1860 08:28:53.390856 I2C: 00:1a
1861 08:28:53.390931 I2C: 00:31
1862 08:28:53.394126 I2C: 00:32
1863 08:28:53.397118 PCI: 00:15.1 child on link 0 I2C: 00:50
1864 08:28:53.407489 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1865 08:28:53.407595 I2C: 00:50
1866 08:28:53.410974 PCI: 00:15.2
1867 08:28:53.413825 PCI: 00:15.3 child on link 0 I2C: 00:10
1868 08:28:53.424082 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1869 08:28:53.427002 I2C: 00:10
1870 08:28:53.427105 PCI: 00:16.0
1871 08:28:53.440474 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1872 08:28:53.440603 PCI: 00:19.0
1873 08:28:53.443968 PCI: 00:19.1 child on link 0 I2C: 00:15
1874 08:28:53.453348 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1875 08:28:53.456873 I2C: 00:15
1876 08:28:53.456995 I2C: 00:2c
1877 08:28:53.460471 PCI: 00:1e.0
1878 08:28:53.470341 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1879 08:28:53.473274 PCI: 00:1e.3 child on link 0 SPI: 00
1880 08:28:53.486523 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1881 08:28:53.486604 SPI: 00
1882 08:28:53.490086 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1883 08:28:53.499809 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1884 08:28:53.499917 PNP: 0c09.0
1885 08:28:53.509939 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1886 08:28:53.513148 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1887 08:28:53.523340 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1888 08:28:53.532931 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1889 08:28:53.537149 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1890 08:28:53.539691 GENERIC: 0.0
1891 08:28:53.543312 GENERIC: 1.0
1892 08:28:53.543396 PCI: 00:1f.3
1893 08:28:53.553269 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1894 08:28:53.562852 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1895 08:28:53.566283 PCI: 00:1f.5
1896 08:28:53.576594 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1897 08:28:53.579461 Done allocating resources.
1898 08:28:53.586274 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1899 08:28:53.589160 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1900 08:28:53.596091 Configure audio over I2S with MAX98373 NAU88L25B.
1901 08:28:53.599758 Enabling BT offload
1902 08:28:53.607230 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1903 08:28:53.610317 Enabling resources...
1904 08:28:53.614275 PCI: 00:00.0 subsystem <- 8086/4609
1905 08:28:53.617549 PCI: 00:00.0 cmd <- 06
1906 08:28:53.620850 PCI: 00:02.0 subsystem <- 8086/46b3
1907 08:28:53.623733 PCI: 00:02.0 cmd <- 03
1908 08:28:53.627318 PCI: 00:04.0 subsystem <- 8086/461d
1909 08:28:53.627424 PCI: 00:04.0 cmd <- 02
1910 08:28:53.630563 PCI: 00:06.0 bridge ctrl <- 0013
1911 08:28:53.634530 PCI: 00:06.0 subsystem <- 8086/464d
1912 08:28:53.636984 PCI: 00:06.0 cmd <- 106
1913 08:28:53.640576 PCI: 00:0a.0 subsystem <- 8086/467d
1914 08:28:53.643973 PCI: 00:0a.0 cmd <- 02
1915 08:28:53.647300 PCI: 00:0d.0 subsystem <- 8086/461e
1916 08:28:53.650289 PCI: 00:0d.0 cmd <- 02
1917 08:28:53.653772 PCI: 00:14.0 subsystem <- 8086/51ed
1918 08:28:53.657379 PCI: 00:14.0 cmd <- 02
1919 08:28:53.660822 PCI: 00:14.2 subsystem <- 8086/51ef
1920 08:28:53.660929 PCI: 00:14.2 cmd <- 02
1921 08:28:53.663750 PCI: 00:14.3 subsystem <- 8086/51f0
1922 08:28:53.667176 PCI: 00:14.3 cmd <- 02
1923 08:28:53.670352 PCI: 00:15.0 subsystem <- 8086/51e8
1924 08:28:53.673730 PCI: 00:15.0 cmd <- 02
1925 08:28:53.677425 PCI: 00:15.1 subsystem <- 8086/51e9
1926 08:28:53.680575 PCI: 00:15.1 cmd <- 06
1927 08:28:53.684063 PCI: 00:15.3 subsystem <- 8086/51eb
1928 08:28:53.687579 PCI: 00:15.3 cmd <- 02
1929 08:28:53.690138 PCI: 00:16.0 subsystem <- 8086/51e0
1930 08:28:53.690213 PCI: 00:16.0 cmd <- 02
1931 08:28:53.693915 PCI: 00:19.1 subsystem <- 8086/51c6
1932 08:28:53.696980 PCI: 00:19.1 cmd <- 02
1933 08:28:53.700374 PCI: 00:1e.0 subsystem <- 8086/51a8
1934 08:28:53.703604 PCI: 00:1e.0 cmd <- 06
1935 08:28:53.706975 PCI: 00:1e.3 subsystem <- 8086/51ab
1936 08:28:53.710076 PCI: 00:1e.3 cmd <- 02
1937 08:28:53.713541 PCI: 00:1f.0 subsystem <- 8086/5182
1938 08:28:53.716914 PCI: 00:1f.0 cmd <- 407
1939 08:28:53.720304 PCI: 00:1f.3 subsystem <- 8086/51c8
1940 08:28:53.720382 PCI: 00:1f.3 cmd <- 02
1941 08:28:53.723870 PCI: 00:1f.5 subsystem <- 8086/51a4
1942 08:28:53.726705 PCI: 00:1f.5 cmd <- 406
1943 08:28:53.730374 PCI: 01:00.0 cmd <- 02
1944 08:28:53.730476 done.
1945 08:28:53.737050 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1946 08:28:53.740357 ME: Version: Unavailable
1947 08:28:53.743780 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1948 08:28:53.746655 Initializing devices...
1949 08:28:53.750188 Root Device init
1950 08:28:53.750291 mainboard: EC init
1951 08:28:53.753437 Chrome EC: Set SMI mask to 0x0000000000000000
1952 08:28:53.756868 Chrome EC: UHEPI supported
1953 08:28:53.764489 Chrome EC: clear events_b mask to 0x0000000000000000
1954 08:28:53.771332 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1955 08:28:53.777515 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1956 08:28:53.784420 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1957 08:28:53.790614 Chrome EC: Set WAKE mask to 0x0000000000000000
1958 08:28:53.794184 Root Device init finished in 41 msecs
1959 08:28:53.797300 PCI: 00:00.0 init
1960 08:28:53.800740 CPU TDP = 15 Watts
1961 08:28:53.800842 CPU PL1 = 15 Watts
1962 08:28:53.803992 CPU PL2 = 55 Watts
1963 08:28:53.804094 CPU PL4 = 123 Watts
1964 08:28:53.810383 PCI: 00:00.0 init finished in 8 msecs
1965 08:28:53.810465 PCI: 00:02.0 init
1966 08:28:53.813656 GMA: Found VBT in CBFS
1967 08:28:53.817151 GMA: Found valid VBT in CBFS
1968 08:28:53.823564 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1969 08:28:53.830735 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1970 08:28:53.833776 PCI: 00:02.0 init finished in 18 msecs
1971 08:28:53.837065 PCI: 00:06.0 init
1972 08:28:53.837167 Initializing PCH PCIe bridge.
1973 08:28:53.843735 PCI: 00:06.0 init finished in 3 msecs
1974 08:28:53.843818 PCI: 00:0a.0 init
1975 08:28:53.847075 PCI: 00:0a.0 init finished in 0 msecs
1976 08:28:53.850607 PCI: 00:14.0 init
1977 08:28:53.853853 PCI: 00:14.0 init finished in 0 msecs
1978 08:28:53.857509 PCI: 00:14.2 init
1979 08:28:53.860530 PCI: 00:14.2 init finished in 0 msecs
1980 08:28:53.860607 PCI: 00:15.0 init
1981 08:28:53.863731 I2C bus 0 version 0x3230302a
1982 08:28:53.867277 DW I2C bus 0 at 0x80655000 (400 KHz)
1983 08:28:53.870162 PCI: 00:15.0 init finished in 6 msecs
1984 08:28:53.873538 PCI: 00:15.1 init
1985 08:28:53.876993 I2C bus 1 version 0x3230302a
1986 08:28:53.880452 DW I2C bus 1 at 0x80656000 (400 KHz)
1987 08:28:53.883742 PCI: 00:15.1 init finished in 6 msecs
1988 08:28:53.887256 PCI: 00:15.3 init
1989 08:28:53.890468 I2C bus 3 version 0x3230302a
1990 08:28:53.893520 DW I2C bus 3 at 0x80657000 (400 KHz)
1991 08:28:53.897258 PCI: 00:15.3 init finished in 6 msecs
1992 08:28:53.897331 PCI: 00:16.0 init
1993 08:28:53.903843 PCI: 00:16.0 init finished in 0 msecs
1994 08:28:53.903923 PCI: 00:19.1 init
1995 08:28:53.907000 I2C bus 5 version 0x3230302a
1996 08:28:53.910430 DW I2C bus 5 at 0x80659000 (400 KHz)
1997 08:28:53.913488 PCI: 00:19.1 init finished in 6 msecs
1998 08:28:53.917415 PCI: 00:1f.0 init
1999 08:28:53.920448 IOAPIC: Initializing IOAPIC at 0xfec00000
2000 08:28:53.923558 IOAPIC: ID = 0x02
2001 08:28:53.923661 IOAPIC: Dumping registers
2002 08:28:53.926920 reg 0x0000: 0x02000000
2003 08:28:53.930590 reg 0x0001: 0x00770020
2004 08:28:53.933776 reg 0x0002: 0x00000000
2005 08:28:53.933850 IOAPIC: 120 interrupts
2006 08:28:53.940161 IOAPIC: Clearing IOAPIC at 0xfec00000
2007 08:28:53.943926 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2008 08:28:53.946658 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2009 08:28:53.953843 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2010 08:28:53.956914 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2011 08:28:53.963501 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2012 08:28:53.967006 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2013 08:28:53.973741 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2014 08:28:53.976744 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2015 08:28:53.983557 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2016 08:28:53.986664 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2017 08:28:53.990183 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2018 08:28:53.996754 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2019 08:28:54.000240 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2020 08:28:54.006648 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2021 08:28:54.010224 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2022 08:28:54.017170 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2023 08:28:54.020061 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2024 08:28:54.023519 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2025 08:28:54.030142 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2026 08:28:54.033208 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2027 08:28:54.039905 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2028 08:28:54.043654 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2029 08:28:54.050122 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2030 08:28:54.053202 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2031 08:28:54.060226 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2032 08:28:54.063398 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2033 08:28:54.070036 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2034 08:28:54.073151 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2035 08:28:54.076355 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2036 08:28:54.083401 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2037 08:28:54.086428 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2038 08:28:54.093363 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2039 08:28:54.096815 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2040 08:28:54.103037 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2041 08:28:54.106432 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2042 08:28:54.112814 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2043 08:28:54.116543 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2044 08:28:54.119764 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2045 08:28:54.126362 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2046 08:28:54.129856 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2047 08:28:54.136101 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2048 08:28:54.140013 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2049 08:28:54.146070 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2050 08:28:54.149158 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2051 08:28:54.156371 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2052 08:28:54.159110 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2053 08:28:54.162434 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2054 08:28:54.169859 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2055 08:28:54.172843 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2056 08:28:54.179115 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2057 08:28:54.182491 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2058 08:28:54.189096 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2059 08:28:54.192495 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2060 08:28:54.195861 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2061 08:28:54.202889 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2062 08:28:54.206363 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2063 08:28:54.212347 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2064 08:28:54.216264 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2065 08:28:54.222557 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2066 08:28:54.225843 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2067 08:28:54.232096 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2068 08:28:54.235716 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2069 08:28:54.239353 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2070 08:28:54.245570 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2071 08:28:54.249108 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2072 08:28:54.255389 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2073 08:28:54.258848 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2074 08:28:54.265580 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2075 08:28:54.268762 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2076 08:28:54.275184 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2077 08:28:54.278690 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2078 08:28:54.285187 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2079 08:28:54.288395 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2080 08:28:54.292013 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2081 08:28:54.298615 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2082 08:28:54.301700 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2083 08:28:54.308615 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2084 08:28:54.312087 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2085 08:28:54.318635 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2086 08:28:54.321883 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2087 08:28:54.328566 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2088 08:28:54.331679 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2089 08:28:54.335447 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2090 08:28:54.342082 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2091 08:28:54.345098 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2092 08:28:54.352062 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2093 08:28:54.355185 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2094 08:28:54.361798 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2095 08:28:54.365400 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2096 08:28:54.368411 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2097 08:28:54.375008 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2098 08:28:54.378402 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2099 08:28:54.384776 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2100 08:28:54.388193 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2101 08:28:54.394803 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2102 08:28:54.398363 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2103 08:28:54.405079 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2104 08:28:54.408379 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2105 08:28:54.411294 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2106 08:28:54.417928 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2107 08:28:54.421363 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2108 08:28:54.427971 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2109 08:28:54.431335 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2110 08:28:54.438303 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2111 08:28:54.441410 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2112 08:28:54.447808 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2113 08:28:54.451285 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2114 08:28:54.454402 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2115 08:28:54.461370 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2116 08:28:54.464856 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2117 08:28:54.471148 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2118 08:28:54.474513 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2119 08:28:54.480898 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2120 08:28:54.484676 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2121 08:28:54.491009 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2122 08:28:54.494436 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2123 08:28:54.498035 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2124 08:28:54.504393 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2125 08:28:54.508040 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2126 08:28:54.514238 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2127 08:28:54.517589 IOAPIC: Bootstrap Processor Local APIC = 0x00
2128 08:28:54.524559 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2129 08:28:54.527419 PCI: 00:1f.0 init finished in 607 msecs
2130 08:28:54.530958 PCI: 00:1f.2 init
2131 08:28:54.531034 apm_control: Disabling ACPI.
2132 08:28:54.537522 APMC done.
2133 08:28:54.540922 PCI: 00:1f.2 init finished in 7 msecs
2134 08:28:54.544168 PCI: 00:1f.3 init
2135 08:28:54.547511 PCI: 00:1f.3 init finished in 0 msecs
2136 08:28:54.547586 PCI: 01:00.0 init
2137 08:28:54.550601 PCI: 01:00.0 init finished in 0 msecs
2138 08:28:54.553817 PNP: 0c09.0 init
2139 08:28:54.557262 Google Chrome EC uptime: 12.024 seconds
2140 08:28:54.563755 Google Chrome AP resets since EC boot: 1
2141 08:28:54.567413 Google Chrome most recent AP reset causes:
2142 08:28:54.570923 0.338: 32775 shutdown: entering G3
2143 08:28:54.577030 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2144 08:28:54.580661 PNP: 0c09.0 init finished in 23 msecs
2145 08:28:54.583816 GENERIC: 0.0 init
2146 08:28:54.586926 GENERIC: 0.0 init finished in 0 msecs
2147 08:28:54.587010 GENERIC: 1.0 init
2148 08:28:54.594221 GENERIC: 1.0 init finished in 0 msecs
2149 08:28:54.594326 Devices initialized
2150 08:28:54.596935 Show all devs... After init.
2151 08:28:54.600407 Root Device: enabled 1
2152 08:28:54.603659 CPU_CLUSTER: 0: enabled 1
2153 08:28:54.603798 DOMAIN: 0000: enabled 1
2154 08:28:54.607188 GPIO: 0: enabled 1
2155 08:28:54.610272 PCI: 00:00.0: enabled 1
2156 08:28:54.610387 PCI: 00:01.0: enabled 0
2157 08:28:54.613612 PCI: 00:01.1: enabled 0
2158 08:28:54.617157 PCI: 00:02.0: enabled 1
2159 08:28:54.620647 PCI: 00:04.0: enabled 1
2160 08:28:54.620752 PCI: 00:05.0: enabled 0
2161 08:28:54.623713 PCI: 00:06.0: enabled 1
2162 08:28:54.627106 PCI: 00:06.2: enabled 0
2163 08:28:54.627209 PCI: 00:07.0: enabled 0
2164 08:28:54.630648 PCI: 00:07.1: enabled 0
2165 08:28:54.633510 PCI: 00:07.2: enabled 0
2166 08:28:54.636805 PCI: 00:07.3: enabled 0
2167 08:28:54.636912 PCI: 00:08.0: enabled 0
2168 08:28:54.640395 PCI: 00:09.0: enabled 0
2169 08:28:54.643376 PCI: 00:0a.0: enabled 1
2170 08:28:54.646928 PCI: 00:0d.0: enabled 1
2171 08:28:54.647022 PCI: 00:0d.1: enabled 0
2172 08:28:54.649843 PCI: 00:0d.2: enabled 0
2173 08:28:54.653392 PCI: 00:0d.3: enabled 0
2174 08:28:54.656677 PCI: 00:0e.0: enabled 0
2175 08:28:54.656778 PCI: 00:10.0: enabled 0
2176 08:28:54.659899 PCI: 00:10.1: enabled 0
2177 08:28:54.663688 PCI: 00:10.6: enabled 0
2178 08:28:54.666554 PCI: 00:10.7: enabled 0
2179 08:28:54.666652 PCI: 00:12.0: enabled 0
2180 08:28:54.670049 PCI: 00:12.6: enabled 0
2181 08:28:54.673664 PCI: 00:12.7: enabled 0
2182 08:28:54.673741 PCI: 00:13.0: enabled 0
2183 08:28:54.676489 PCI: 00:14.0: enabled 1
2184 08:28:54.680118 PCI: 00:14.1: enabled 0
2185 08:28:54.683176 PCI: 00:14.2: enabled 1
2186 08:28:54.683261 PCI: 00:14.3: enabled 1
2187 08:28:54.686643 PCI: 00:15.0: enabled 1
2188 08:28:54.689974 PCI: 00:15.1: enabled 1
2189 08:28:54.693162 PCI: 00:15.2: enabled 0
2190 08:28:54.693278 PCI: 00:15.3: enabled 1
2191 08:28:54.696775 PCI: 00:16.0: enabled 1
2192 08:28:54.700197 PCI: 00:16.1: enabled 0
2193 08:28:54.702988 PCI: 00:16.2: enabled 0
2194 08:28:54.703073 PCI: 00:16.3: enabled 0
2195 08:28:54.706431 PCI: 00:16.4: enabled 0
2196 08:28:54.709745 PCI: 00:16.5: enabled 0
2197 08:28:54.712932 PCI: 00:17.0: enabled 0
2198 08:28:54.713054 PCI: 00:19.0: enabled 0
2199 08:28:54.716306 PCI: 00:19.1: enabled 1
2200 08:28:54.719534 PCI: 00:19.2: enabled 0
2201 08:28:54.719616 PCI: 00:1a.0: enabled 0
2202 08:28:54.723412 PCI: 00:1c.0: enabled 0
2203 08:28:54.726263 PCI: 00:1c.1: enabled 0
2204 08:28:54.729539 PCI: 00:1c.2: enabled 0
2205 08:28:54.729621 PCI: 00:1c.3: enabled 0
2206 08:28:54.733165 PCI: 00:1c.4: enabled 0
2207 08:28:54.736392 PCI: 00:1c.5: enabled 0
2208 08:28:54.739981 PCI: 00:1c.6: enabled 0
2209 08:28:54.740071 PCI: 00:1c.7: enabled 0
2210 08:28:54.743229 PCI: 00:1d.0: enabled 0
2211 08:28:54.746070 PCI: 00:1d.1: enabled 0
2212 08:28:54.749367 PCI: 00:1d.2: enabled 0
2213 08:28:54.749450 PCI: 00:1d.3: enabled 0
2214 08:28:54.752868 PCI: 00:1e.0: enabled 1
2215 08:28:54.755953 PCI: 00:1e.1: enabled 0
2216 08:28:54.759319 PCI: 00:1e.2: enabled 0
2217 08:28:54.759401 PCI: 00:1e.3: enabled 1
2218 08:28:54.762792 PCI: 00:1f.0: enabled 1
2219 08:28:54.766104 PCI: 00:1f.1: enabled 0
2220 08:28:54.766202 PCI: 00:1f.2: enabled 1
2221 08:28:54.769949 PCI: 00:1f.3: enabled 1
2222 08:28:54.773179 PCI: 00:1f.4: enabled 0
2223 08:28:54.776132 PCI: 00:1f.5: enabled 1
2224 08:28:54.776214 PCI: 00:1f.6: enabled 0
2225 08:28:54.779641 PCI: 00:1f.7: enabled 0
2226 08:28:54.782666 GENERIC: 0.0: enabled 1
2227 08:28:54.785991 GENERIC: 0.0: enabled 1
2228 08:28:54.786072 GENERIC: 1.0: enabled 1
2229 08:28:54.789495 GENERIC: 0.0: enabled 1
2230 08:28:54.793385 GENERIC: 1.0: enabled 1
2231 08:28:54.796114 USB0 port 0: enabled 1
2232 08:28:54.796195 USB0 port 0: enabled 1
2233 08:28:54.799612 GENERIC: 0.0: enabled 1
2234 08:28:54.802542 I2C: 00:1a: enabled 1
2235 08:28:54.802624 I2C: 00:31: enabled 1
2236 08:28:54.806007 I2C: 00:32: enabled 1
2237 08:28:54.809270 I2C: 00:50: enabled 1
2238 08:28:54.809352 I2C: 00:10: enabled 1
2239 08:28:54.812983 I2C: 00:15: enabled 1
2240 08:28:54.816384 I2C: 00:2c: enabled 1
2241 08:28:54.816466 GENERIC: 0.0: enabled 1
2242 08:28:54.819348 SPI: 00: enabled 1
2243 08:28:54.822922 PNP: 0c09.0: enabled 1
2244 08:28:54.823005 GENERIC: 0.0: enabled 1
2245 08:28:54.826279 USB3 port 0: enabled 1
2246 08:28:54.829483 USB3 port 1: enabled 0
2247 08:28:54.832641 USB3 port 2: enabled 1
2248 08:28:54.832723 USB3 port 3: enabled 0
2249 08:28:54.836291 USB2 port 0: enabled 1
2250 08:28:54.839160 USB2 port 1: enabled 0
2251 08:28:54.839243 USB2 port 2: enabled 1
2252 08:28:54.842385 USB2 port 3: enabled 0
2253 08:28:54.845548 USB2 port 4: enabled 0
2254 08:28:54.849668 USB2 port 5: enabled 1
2255 08:28:54.849753 USB2 port 6: enabled 0
2256 08:28:54.852371 USB2 port 7: enabled 0
2257 08:28:54.856117 USB2 port 8: enabled 1
2258 08:28:54.856199 USB2 port 9: enabled 1
2259 08:28:54.859453 USB3 port 0: enabled 1
2260 08:28:54.862220 USB3 port 1: enabled 0
2261 08:28:54.862302 USB3 port 2: enabled 0
2262 08:28:54.866172 USB3 port 3: enabled 0
2263 08:28:54.869288 GENERIC: 0.0: enabled 1
2264 08:28:54.872466 GENERIC: 1.0: enabled 1
2265 08:28:54.872549 APIC: 00: enabled 1
2266 08:28:54.875574 APIC: 1e: enabled 1
2267 08:28:54.878851 APIC: 18: enabled 1
2268 08:28:54.878929 APIC: 1a: enabled 1
2269 08:28:54.882468 APIC: 1c: enabled 1
2270 08:28:54.882550 APIC: 09: enabled 1
2271 08:28:54.885368 APIC: 01: enabled 1
2272 08:28:54.888639 APIC: 08: enabled 1
2273 08:28:54.888722 PCI: 01:00.0: enabled 1
2274 08:28:54.895383 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2275 08:28:54.902206 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2276 08:28:54.905795 ELOG: NV offset 0xf20000 size 0x4000
2277 08:28:54.912079 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2278 08:28:54.918862 ELOG: Event(17) added with size 13 at 2024-04-03 08:28:55 UTC
2279 08:28:54.925260 ELOG: Event(9E) added with size 10 at 2024-04-03 08:28:55 UTC
2280 08:28:54.932564 ELOG: Event(9F) added with size 14 at 2024-04-03 08:28:55 UTC
2281 08:28:54.939082 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2282 08:28:54.945253 ELOG: Event(A0) added with size 9 at 2024-04-03 08:28:55 UTC
2283 08:28:54.948706 elog_add_boot_reason: Logged dev mode boot
2284 08:28:54.955593 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2285 08:28:54.955676 Finalize devices...
2286 08:28:54.958327 PCI: 00:16.0 final
2287 08:28:54.958410 PCI: 00:1f.2 final
2288 08:28:54.962112 GENERIC: 0.0 final
2289 08:28:54.968833 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2290 08:28:54.968916 GENERIC: 1.0 final
2291 08:28:54.975371 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2292 08:28:54.978621 Devices finalized
2293 08:28:54.985340 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2294 08:28:54.988143 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2295 08:28:54.994997 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2296 08:28:54.998553 ME: HFSTS1 : 0x90000245
2297 08:28:55.005244 ME: HFSTS2 : 0x82100116
2298 08:28:55.008167 ME: HFSTS3 : 0x00000050
2299 08:28:55.011331 ME: HFSTS4 : 0x00004000
2300 08:28:55.018081 ME: HFSTS5 : 0x00000000
2301 08:28:55.021622 ME: HFSTS6 : 0x40600006
2302 08:28:55.024837 ME: Manufacturing Mode : NO
2303 08:28:55.028367 ME: SPI Protection Mode Enabled : YES
2304 08:28:55.034707 ME: FPFs Committed : YES
2305 08:28:55.038335 ME: Manufacturing Vars Locked : YES
2306 08:28:55.041212 ME: FW Partition Table : OK
2307 08:28:55.044882 ME: Bringup Loader Failure : NO
2308 08:28:55.048467 ME: Firmware Init Complete : YES
2309 08:28:55.051241 ME: Boot Options Present : NO
2310 08:28:55.054738 ME: Update In Progress : NO
2311 08:28:55.057820 ME: D0i3 Support : YES
2312 08:28:55.064547 ME: Low Power State Enabled : NO
2313 08:28:55.068194 ME: CPU Replaced : YES
2314 08:28:55.071091 ME: CPU Replacement Valid : YES
2315 08:28:55.074262 ME: Current Working State : 5
2316 08:28:55.077730 ME: Current Operation State : 1
2317 08:28:55.081276 ME: Current Operation Mode : 0
2318 08:28:55.084292 ME: Error Code : 0
2319 08:28:55.087574 ME: Enhanced Debug Mode : NO
2320 08:28:55.090942 ME: CPU Debug Disabled : YES
2321 08:28:55.098157 ME: TXT Support : NO
2322 08:28:55.101118 ME: WP for RO is enabled : YES
2323 08:28:55.104585 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2324 08:28:55.111206 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2325 08:28:55.114089 Ramoops buffer: 0x100000@0x76899000.
2326 08:28:55.121106 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2327 08:28:55.128249 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2328 08:28:55.131116 CBFS: 'fallback/slic' not found.
2329 08:28:55.137581 ACPI: Writing ACPI tables at 7686d000.
2330 08:28:55.137674 ACPI: * FACS
2331 08:28:55.140921 ACPI: * DSDT
2332 08:28:55.147424 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2333 08:28:55.150960 ACPI: * FADT
2334 08:28:55.151062 SCI is IRQ9
2335 08:28:55.154031 ACPI: added table 1/32, length now 40
2336 08:28:55.157521 ACPI: * SSDT
2337 08:28:55.160455 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2338 08:28:55.168038 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2339 08:28:55.171547 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2340 08:28:55.174649 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2341 08:28:55.181344 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2342 08:28:55.187974 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2343 08:28:55.194904 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2344 08:28:55.198277 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2345 08:28:55.204704 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2346 08:28:55.208845 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2347 08:28:55.214906 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2348 08:28:55.217832 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2349 08:28:55.224536 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2350 08:28:55.227833 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2351 08:28:55.235058 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2352 08:28:55.238359 PS2K: Passing 80 keymaps to kernel
2353 08:28:55.245066 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2354 08:28:55.251561 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2355 08:28:55.258204 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2356 08:28:55.265418 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2357 08:28:55.271880 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2358 08:28:55.278440 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2359 08:28:55.281596 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2360 08:28:55.288414 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2361 08:28:55.295011 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2362 08:28:55.301704 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2363 08:28:55.304647 ACPI: added table 2/32, length now 44
2364 08:28:55.308305 ACPI: * MCFG
2365 08:28:55.311217 ACPI: added table 3/32, length now 48
2366 08:28:55.311301 ACPI: * TPM2
2367 08:28:55.314834 TPM2 log created at 0x7685d000
2368 08:28:55.322335 ACPI: added table 4/32, length now 52
2369 08:28:55.322421 ACPI: * LPIT
2370 08:28:55.325366 ACPI: added table 5/32, length now 56
2371 08:28:55.327851 ACPI: * MADT
2372 08:28:55.327922 SCI is IRQ9
2373 08:28:55.331435 ACPI: added table 6/32, length now 60
2374 08:28:55.334647 cmd_reg from pmc_make_ipc_cmd 1052838
2375 08:28:55.341221 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2376 08:28:55.348477 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2377 08:28:55.354566 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2378 08:28:55.358142 PMC CrashLog size in discovery mode: 0xC00
2379 08:28:55.361414 cpu crashlog bar addr: 0x80640000
2380 08:28:55.364307 cpu discovery table offset: 0x6030
2381 08:28:55.370966 cpu_crashlog_discovery_table buffer count: 0x3
2382 08:28:55.377799 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2383 08:28:55.384304 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2384 08:28:55.390884 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2385 08:28:55.394343 PMC crashLog size in discovery mode : 0xC00
2386 08:28:55.400878 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2387 08:28:55.407695 discover mode PMC crashlog size adjusted to: 0x200
2388 08:28:55.414327 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2389 08:28:55.417571 discover mode PMC crashlog size adjusted to: 0x0
2390 08:28:55.420805 m_cpu_crashLog_size : 0x3480 bytes
2391 08:28:55.424508 CPU crashLog present.
2392 08:28:55.427987 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2393 08:28:55.434616 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2394 08:28:55.437769 current = 76876550
2395 08:28:55.441143 ACPI: * DMAR
2396 08:28:55.444403 ACPI: added table 7/32, length now 64
2397 08:28:55.447766 ACPI: added table 8/32, length now 68
2398 08:28:55.447841 ACPI: * HPET
2399 08:28:55.454248 ACPI: added table 9/32, length now 72
2400 08:28:55.454329 ACPI: done.
2401 08:28:55.457307 ACPI tables: 38528 bytes.
2402 08:28:55.461625 smbios_write_tables: 76857000
2403 08:28:55.464497 EC returned error result code 3
2404 08:28:55.468115 Couldn't obtain OEM name from CBI
2405 08:28:55.471033 Create SMBIOS type 16
2406 08:28:55.471119 Create SMBIOS type 17
2407 08:28:55.474497 Create SMBIOS type 20
2408 08:28:55.477653 GENERIC: 0.0 (WIFI Device)
2409 08:28:55.481215 SMBIOS tables: 2156 bytes.
2410 08:28:55.484608 Writing table forward entry at 0x00000500
2411 08:28:55.490994 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2412 08:28:55.494474 Writing coreboot table at 0x76891000
2413 08:28:55.501246 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2414 08:28:55.504882 1. 0000000000001000-000000000009ffff: RAM
2415 08:28:55.507473 2. 00000000000a0000-00000000000fffff: RESERVED
2416 08:28:55.514490 3. 0000000000100000-0000000076856fff: RAM
2417 08:28:55.521226 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2418 08:28:55.524387 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2419 08:28:55.531351 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2420 08:28:55.534398 7. 0000000077000000-00000000803fffff: RESERVED
2421 08:28:55.540782 8. 00000000c0000000-00000000cfffffff: RESERVED
2422 08:28:55.544263 9. 00000000f8000000-00000000f9ffffff: RESERVED
2423 08:28:55.550761 10. 00000000fb000000-00000000fb000fff: RESERVED
2424 08:28:55.554415 11. 00000000fc800000-00000000fe7fffff: RESERVED
2425 08:28:55.557312 12. 00000000feb00000-00000000feb7ffff: RESERVED
2426 08:28:55.564314 13. 00000000fec00000-00000000fecfffff: RESERVED
2427 08:28:55.567775 14. 00000000fed40000-00000000fed6ffff: RESERVED
2428 08:28:55.573794 15. 00000000fed80000-00000000fed87fff: RESERVED
2429 08:28:55.577142 16. 00000000fed90000-00000000fed92fff: RESERVED
2430 08:28:55.583869 17. 00000000feda0000-00000000feda1fff: RESERVED
2431 08:28:55.587213 18. 00000000fedc0000-00000000feddffff: RESERVED
2432 08:28:55.590533 19. 0000000100000000-000000027fbfffff: RAM
2433 08:28:55.594165 Passing 4 GPIOs to payload:
2434 08:28:55.600948 NAME | PORT | POLARITY | VALUE
2435 08:28:55.603740 lid | undefined | high | high
2436 08:28:55.611004 power | undefined | high | low
2437 08:28:55.617172 oprom | undefined | high | low
2438 08:28:55.620703 EC in RW | 0x00000151 | high | high
2439 08:28:55.624476 Board ID: 3
2440 08:28:55.624559 FW config: 0x131
2441 08:28:55.630618 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 650
2442 08:28:55.633861 coreboot table: 1788 bytes.
2443 08:28:55.637539 IMD ROOT 0. 0x76fff000 0x00001000
2444 08:28:55.640634 IMD SMALL 1. 0x76ffe000 0x00001000
2445 08:28:55.644360 FSP MEMORY 2. 0x76afe000 0x00500000
2446 08:28:55.647199 CONSOLE 3. 0x76ade000 0x00020000
2447 08:28:55.650694 RW MCACHE 4. 0x76add000 0x0000043c
2448 08:28:55.653997 RO MCACHE 5. 0x76adc000 0x00000fd8
2449 08:28:55.660919 FMAP 6. 0x76adb000 0x0000064a
2450 08:28:55.663775 TIME STAMP 7. 0x76ada000 0x00000910
2451 08:28:55.667411 VBOOT WORK 8. 0x76ac6000 0x00014000
2452 08:28:55.670896 MEM INFO 9. 0x76ac5000 0x000003b8
2453 08:28:55.674098 ROMSTG STCK10. 0x76ac4000 0x00001000
2454 08:28:55.677867 AFTER CAR 11. 0x76ab8000 0x0000c000
2455 08:28:55.680994 RAMSTAGE 12. 0x76a2e000 0x0008a000
2456 08:28:55.684626 ACPI BERT 13. 0x76a1e000 0x00010000
2457 08:28:55.690733 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2458 08:28:55.694103 REFCODE 15. 0x769ae000 0x0006f000
2459 08:28:55.697751 SMM BACKUP 16. 0x7699e000 0x00010000
2460 08:28:55.700957 IGD OPREGION17. 0x76999000 0x00004203
2461 08:28:55.704045 RAMOOPS 18. 0x76899000 0x00100000
2462 08:28:55.707622 COREBOOT 19. 0x76891000 0x00008000
2463 08:28:55.710999 ACPI 20. 0x7686d000 0x00024000
2464 08:28:55.714422 TPM2 TCGLOG21. 0x7685d000 0x00010000
2465 08:28:55.721170 PMC CRASHLOG22. 0x7685c000 0x00000c00
2466 08:28:55.724003 CPU CRASHLOG23. 0x76858000 0x00003480
2467 08:28:55.727655 SMBIOS 24. 0x76857000 0x00001000
2468 08:28:55.727737 IMD small region:
2469 08:28:55.733959 IMD ROOT 0. 0x76ffec00 0x00000400
2470 08:28:55.737633 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2471 08:28:55.741127 VPD 2. 0x76ffeb60 0x0000006c
2472 08:28:55.744245 POWER STATE 3. 0x76ffeb00 0x00000044
2473 08:28:55.747604 ROMSTAGE 4. 0x76ffeae0 0x00000004
2474 08:28:55.750973 ACPI GNVS 5. 0x76ffea80 0x00000048
2475 08:28:55.757460 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2476 08:28:55.761211 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2477 08:28:55.764503 MTRR: Physical address space:
2478 08:28:55.770687 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2479 08:28:55.777493 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2480 08:28:55.783775 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2481 08:28:55.790945 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2482 08:28:55.797305 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2483 08:28:55.803768 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2484 08:28:55.810741 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2485 08:28:55.813617 MTRR: Fixed MSR 0x250 0x0606060606060606
2486 08:28:55.817150 MTRR: Fixed MSR 0x258 0x0606060606060606
2487 08:28:55.820110 MTRR: Fixed MSR 0x259 0x0000000000000000
2488 08:28:55.827070 MTRR: Fixed MSR 0x268 0x0606060606060606
2489 08:28:55.830471 MTRR: Fixed MSR 0x269 0x0606060606060606
2490 08:28:55.833796 MTRR: Fixed MSR 0x26a 0x0606060606060606
2491 08:28:55.836753 MTRR: Fixed MSR 0x26b 0x0606060606060606
2492 08:28:55.840023 MTRR: Fixed MSR 0x26c 0x0606060606060606
2493 08:28:55.846809 MTRR: Fixed MSR 0x26d 0x0606060606060606
2494 08:28:55.850383 MTRR: Fixed MSR 0x26e 0x0606060606060606
2495 08:28:55.853692 MTRR: Fixed MSR 0x26f 0x0606060606060606
2496 08:28:55.857327 call enable_fixed_mtrr()
2497 08:28:55.860597 CPU physical address size: 39 bits
2498 08:28:55.867031 MTRR: default type WB/UC MTRR counts: 6/6.
2499 08:28:55.870619 MTRR: UC selected as default type.
2500 08:28:55.876863 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2501 08:28:55.880629 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2502 08:28:55.886975 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2503 08:28:55.893569 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2504 08:28:55.900518 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2505 08:28:55.907189 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2506 08:28:55.913547 MTRR: Fixed MSR 0x250 0x0606060606060606
2507 08:28:55.916747 MTRR: Fixed MSR 0x258 0x0606060606060606
2508 08:28:55.920263 MTRR: Fixed MSR 0x259 0x0000000000000000
2509 08:28:55.923919 MTRR: Fixed MSR 0x268 0x0606060606060606
2510 08:28:55.930001 MTRR: Fixed MSR 0x269 0x0606060606060606
2511 08:28:55.933528 MTRR: Fixed MSR 0x26a 0x0606060606060606
2512 08:28:55.936599 MTRR: Fixed MSR 0x26b 0x0606060606060606
2513 08:28:55.940043 MTRR: Fixed MSR 0x26c 0x0606060606060606
2514 08:28:55.946609 MTRR: Fixed MSR 0x26d 0x0606060606060606
2515 08:28:55.949908 MTRR: Fixed MSR 0x26e 0x0606060606060606
2516 08:28:55.953472 MTRR: Fixed MSR 0x26f 0x0606060606060606
2517 08:28:55.956766 MTRR: Fixed MSR 0x250 0x0606060606060606
2518 08:28:55.960025 MTRR: Fixed MSR 0x250 0x0606060606060606
2519 08:28:55.963306 call enable_fixed_mtrr()
2520 08:28:55.966672 MTRR: Fixed MSR 0x250 0x0606060606060606
2521 08:28:55.973370 CPU physical address size: 39 bits
2522 08:28:55.976719 MTRR: Fixed MSR 0x250 0x0606060606060606
2523 08:28:55.980430 MTRR: Fixed MSR 0x258 0x0606060606060606
2524 08:28:55.983532 MTRR: Fixed MSR 0x258 0x0606060606060606
2525 08:28:55.986878 MTRR: Fixed MSR 0x258 0x0606060606060606
2526 08:28:55.993628 MTRR: Fixed MSR 0x258 0x0606060606060606
2527 08:28:55.996775 MTRR: Fixed MSR 0x259 0x0000000000000000
2528 08:28:56.000286 MTRR: Fixed MSR 0x268 0x0606060606060606
2529 08:28:56.003542 MTRR: Fixed MSR 0x269 0x0606060606060606
2530 08:28:56.010266 MTRR: Fixed MSR 0x26a 0x0606060606060606
2531 08:28:56.013275 MTRR: Fixed MSR 0x26b 0x0606060606060606
2532 08:28:56.016745 MTRR: Fixed MSR 0x26c 0x0606060606060606
2533 08:28:56.019698 MTRR: Fixed MSR 0x26d 0x0606060606060606
2534 08:28:56.026485 MTRR: Fixed MSR 0x26e 0x0606060606060606
2535 08:28:56.029916 MTRR: Fixed MSR 0x26f 0x0606060606060606
2536 08:28:56.033250 MTRR: Fixed MSR 0x259 0x0000000000000000
2537 08:28:56.036756 call enable_fixed_mtrr()
2538 08:28:56.039719 MTRR: Fixed MSR 0x259 0x0000000000000000
2539 08:28:56.043208 MTRR: Fixed MSR 0x268 0x0606060606060606
2540 08:28:56.049786 MTRR: Fixed MSR 0x269 0x0606060606060606
2541 08:28:56.053609 MTRR: Fixed MSR 0x26a 0x0606060606060606
2542 08:28:56.056502 MTRR: Fixed MSR 0x26b 0x0606060606060606
2543 08:28:56.059666 MTRR: Fixed MSR 0x26c 0x0606060606060606
2544 08:28:56.063188 MTRR: Fixed MSR 0x26d 0x0606060606060606
2545 08:28:56.069995 MTRR: Fixed MSR 0x26e 0x0606060606060606
2546 08:28:56.073249 MTRR: Fixed MSR 0x26f 0x0606060606060606
2547 08:28:56.076437 MTRR: Fixed MSR 0x268 0x0606060606060606
2548 08:28:56.079633 CPU physical address size: 39 bits
2549 08:28:56.083315 MTRR: Fixed MSR 0x250 0x0606060606060606
2550 08:28:56.089783 MTRR: Fixed MSR 0x250 0x0606060606060606
2551 08:28:56.089865 call enable_fixed_mtrr()
2552 08:28:56.096718 MTRR: Fixed MSR 0x269 0x0606060606060606
2553 08:28:56.099640 MTRR: Fixed MSR 0x259 0x0000000000000000
2554 08:28:56.103143 MTRR: Fixed MSR 0x268 0x0606060606060606
2555 08:28:56.106484 MTRR: Fixed MSR 0x269 0x0606060606060606
2556 08:28:56.112539 MTRR: Fixed MSR 0x26a 0x0606060606060606
2557 08:28:56.115917 MTRR: Fixed MSR 0x26b 0x0606060606060606
2558 08:28:56.119231 MTRR: Fixed MSR 0x26c 0x0606060606060606
2559 08:28:56.122600 MTRR: Fixed MSR 0x26d 0x0606060606060606
2560 08:28:56.129309 MTRR: Fixed MSR 0x26e 0x0606060606060606
2561 08:28:56.132829 MTRR: Fixed MSR 0x26f 0x0606060606060606
2562 08:28:56.135884 CPU physical address size: 39 bits
2563 08:28:56.139459 MTRR: Fixed MSR 0x26a 0x0606060606060606
2564 08:28:56.143074 call enable_fixed_mtrr()
2565 08:28:56.145892 MTRR: Fixed MSR 0x26b 0x0606060606060606
2566 08:28:56.149008 MTRR: Fixed MSR 0x26c 0x0606060606060606
2567 08:28:56.155819 MTRR: Fixed MSR 0x26d 0x0606060606060606
2568 08:28:56.159416 MTRR: Fixed MSR 0x26e 0x0606060606060606
2569 08:28:56.162777 MTRR: Fixed MSR 0x26f 0x0606060606060606
2570 08:28:56.166310 CPU physical address size: 39 bits
2571 08:28:56.169028 call enable_fixed_mtrr()
2572 08:28:56.172541 MTRR: Fixed MSR 0x258 0x0606060606060606
2573 08:28:56.175603 CPU physical address size: 39 bits
2574 08:28:56.179278 MTRR: Fixed MSR 0x258 0x0606060606060606
2575 08:28:56.185512 MTRR: Fixed MSR 0x259 0x0000000000000000
2576 08:28:56.189178 MTRR: Fixed MSR 0x259 0x0000000000000000
2577 08:28:56.192182 MTRR: Fixed MSR 0x268 0x0606060606060606
2578 08:28:56.196145 MTRR: Fixed MSR 0x269 0x0606060606060606
2579 08:28:56.202458 MTRR: Fixed MSR 0x268 0x0606060606060606
2580 08:28:56.205804 MTRR: Fixed MSR 0x269 0x0606060606060606
2581 08:28:56.209147 MTRR: Fixed MSR 0x26a 0x0606060606060606
2582 08:28:56.212641 MTRR: Fixed MSR 0x26b 0x0606060606060606
2583 08:28:56.218741 MTRR: Fixed MSR 0x26c 0x0606060606060606
2584 08:28:56.222331 MTRR: Fixed MSR 0x26d 0x0606060606060606
2585 08:28:56.225840 MTRR: Fixed MSR 0x26e 0x0606060606060606
2586 08:28:56.228803 MTRR: Fixed MSR 0x26f 0x0606060606060606
2587 08:28:56.233138 MTRR: Fixed MSR 0x26a 0x0606060606060606
2588 08:28:56.236201 call enable_fixed_mtrr()
2589 08:28:56.239629 MTRR: Fixed MSR 0x26b 0x0606060606060606
2590 08:28:56.246663 MTRR: Fixed MSR 0x26c 0x0606060606060606
2591 08:28:56.249416 MTRR: Fixed MSR 0x26d 0x0606060606060606
2592 08:28:56.252855 MTRR: Fixed MSR 0x26e 0x0606060606060606
2593 08:28:56.255862 MTRR: Fixed MSR 0x26f 0x0606060606060606
2594 08:28:56.263172 CPU physical address size: 39 bits
2595 08:28:56.265949 call enable_fixed_mtrr()
2596 08:28:56.269483 CPU physical address size: 39 bits
2597 08:28:56.269568
2598 08:28:56.272861 MTRR check
2599 08:28:56.272945 Fixed MTRRs : Enabled
2600 08:28:56.276461 Variable MTRRs: Enabled
2601 08:28:56.276568
2602 08:28:56.283014 BS: BS_WRITE_TABLES exit times (exec / console): 251 / 150 ms
2603 08:28:56.286175 Checking cr50 for pending updates
2604 08:28:56.297200 Reading cr50 TPM mode
2605 08:28:56.312423 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2606 08:28:56.322309 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2607 08:28:56.325912 Checking segment from ROM address 0xf96cbe6c
2608 08:28:56.329259 Checking segment from ROM address 0xf96cbe88
2609 08:28:56.336078 Loading segment from ROM address 0xf96cbe6c
2610 08:28:56.336214 code (compression=1)
2611 08:28:56.346169 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2612 08:28:56.352581 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2613 08:28:56.356065 using LZMA
2614 08:28:56.379293 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2615 08:28:56.385721 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2616 08:28:56.393948 Loading segment from ROM address 0xf96cbe88
2617 08:28:56.396985 Entry Point 0x30000000
2618 08:28:56.397084 Loaded segments
2619 08:28:56.403804 BS: BS_PAYLOAD_LOAD run times (exec / console): 22 / 62 ms
2620 08:28:56.410623 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2621 08:28:56.413817 Finalizing chipset.
2622 08:28:56.413908 apm_control: Finalizing SMM.
2623 08:28:56.417231 APMC done.
2624 08:28:56.420243 HECI: CSE device 16.1 is disabled
2625 08:28:56.423638 HECI: CSE device 16.2 is disabled
2626 08:28:56.427344 HECI: CSE device 16.3 is disabled
2627 08:28:56.430645 HECI: CSE device 16.4 is disabled
2628 08:28:56.433733 HECI: CSE device 16.5 is disabled
2629 08:28:56.436905 HECI: Sending End-of-Post
2630 08:28:56.445620 CSE: EOP requested action: continue boot
2631 08:28:56.448540 CSE EOP successful, continuing boot
2632 08:28:56.455139 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2633 08:28:56.458775 mp_park_aps done after 0 msecs.
2634 08:28:56.462180 Jumping to boot code at 0x30000000(0x76891000)
2635 08:28:56.472107 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2636 08:28:56.476017
2637 08:28:56.476098
2638 08:28:56.476166
2639 08:28:56.479456 Starting depthcharge on Volmar...
2640 08:28:56.479537
2641 08:28:56.479915 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2642 08:28:56.480014 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2643 08:28:56.480119 Setting prompt string to ['brya:']
2644 08:28:56.480212 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2645 08:28:56.486031 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2646 08:28:56.486114
2647 08:28:56.493042 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2648 08:28:56.493150
2649 08:28:56.499066 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2650 08:28:56.499178
2651 08:28:56.502961 configure_storage: Failed to remap 1C:2
2652 08:28:56.503042
2653 08:28:56.505842 Wipe memory regions:
2654 08:28:56.505923
2655 08:28:56.509287 [0x00000000001000, 0x000000000a0000)
2656 08:28:56.509369
2657 08:28:56.512861 [0x00000000100000, 0x00000030000000)
2658 08:28:56.623368
2659 08:28:56.626353 [0x00000032668e60, 0x00000076857000)
2660 08:28:56.778451
2661 08:28:56.781356 [0x00000100000000, 0x0000027fc00000)
2662 08:28:57.639525
2663 08:28:57.642933 ec_init: CrosEC protocol v3 supported (256, 256)
2664 08:28:58.251424
2665 08:28:58.251560 R8152: Initializing
2666 08:28:58.251628
2667 08:28:58.254697 Version 9 (ocp_data = 6010)
2668 08:28:58.254768
2669 08:28:58.258072 R8152: Done initializing
2670 08:28:58.258143
2671 08:28:58.261773 Adding net device
2672 08:28:58.563147
2673 08:28:58.566756 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2674 08:28:58.566835
2675 08:28:58.566898
2676 08:28:58.566957
2677 08:28:58.567232 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2679 08:28:58.667534 brya: tftpboot 192.168.201.1 13238252/tftp-deploy-uilc58q8/kernel/bzImage 13238252/tftp-deploy-uilc58q8/kernel/cmdline 13238252/tftp-deploy-uilc58q8/ramdisk/ramdisk.cpio.gz
2680 08:28:58.667674 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2681 08:28:58.667759 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2682 08:28:58.671794 tftpboot 192.168.201.1 13238252/tftp-deploy-uilc58q8/kernel/bzIploy-uilc58q8/kernel/cmdline 13238252/tftp-deploy-uilc58q8/ramdisk/ramdisk.cpio.gz
2683 08:28:58.671880
2684 08:28:58.671946 Waiting for link
2685 08:28:58.874337
2686 08:28:58.874469 done.
2687 08:28:58.874541
2688 08:28:58.874607 MAC: 00:e0:4c:68:05:c6
2689 08:28:58.874666
2690 08:28:58.878160 Sending DHCP discover... done.
2691 08:28:58.878257
2692 08:28:58.881255 Waiting for reply... done.
2693 08:28:58.881325
2694 08:28:58.885480 Sending DHCP request... done.
2695 08:28:58.885633
2696 08:28:58.887737 Waiting for reply... done.
2697 08:28:58.887817
2698 08:28:58.891257 My ip is 192.168.201.17
2699 08:28:58.891337
2700 08:28:58.894541 The DHCP server ip is 192.168.201.1
2701 08:28:58.894622
2702 08:28:58.901523 TFTP server IP predefined by user: 192.168.201.1
2703 08:28:58.901622
2704 08:28:58.907769 Bootfile predefined by user: 13238252/tftp-deploy-uilc58q8/kernel/bzImage
2705 08:28:58.907845
2706 08:28:58.911186 Sending tftp read request... done.
2707 08:28:58.911287
2708 08:28:58.914624 Waiting for the transfer...
2709 08:28:58.914726
2710 08:28:59.161484 00000000 ################################################################
2711 08:28:59.161621
2712 08:28:59.408314 00080000 ################################################################
2713 08:28:59.408452
2714 08:28:59.656299 00100000 ################################################################
2715 08:28:59.656433
2716 08:28:59.904008 00180000 ################################################################
2717 08:28:59.904137
2718 08:29:00.151518 00200000 ################################################################
2719 08:29:00.151680
2720 08:29:00.399230 00280000 ################################################################
2721 08:29:00.399362
2722 08:29:00.649775 00300000 ################################################################
2723 08:29:00.649923
2724 08:29:00.897583 00380000 ################################################################
2725 08:29:00.897718
2726 08:29:01.145108 00400000 ################################################################
2727 08:29:01.145243
2728 08:29:01.392246 00480000 ################################################################
2729 08:29:01.392379
2730 08:29:01.645053 00500000 ################################################################
2731 08:29:01.645187
2732 08:29:01.907114 00580000 ################################################################
2733 08:29:01.907311
2734 08:29:02.152646 00600000 ################################################################
2735 08:29:02.152776
2736 08:29:02.402123 00680000 ################################################################
2737 08:29:02.402269
2738 08:29:02.653585 00700000 ################################################################
2739 08:29:02.653732
2740 08:29:02.916373 00780000 ################################################################
2741 08:29:02.916504
2742 08:29:03.181122 00800000 ################################################################
2743 08:29:03.181267
2744 08:29:03.448926 00880000 ################################################################
2745 08:29:03.449095
2746 08:29:03.689325 00900000 ################################################################
2747 08:29:03.689461
2748 08:29:03.953946 00980000 ################################################################
2749 08:29:03.954107
2750 08:29:04.206825 00a00000 ################################################################
2751 08:29:04.206954
2752 08:29:04.460694 00a80000 ################################################################
2753 08:29:04.460832
2754 08:29:04.721051 00b00000 ################################################################
2755 08:29:04.721220
2756 08:29:04.989370 00b80000 ################################################################
2757 08:29:04.989504
2758 08:29:05.272783 00c00000 ################################################################
2759 08:29:05.272932
2760 08:29:05.543896 00c80000 ################################################################
2761 08:29:05.544054
2762 08:29:05.796875 00d00000 ################################################################
2763 08:29:05.797039
2764 08:29:06.060103 00d80000 ################################################################
2765 08:29:06.060236
2766 08:29:06.333494 00e00000 ################################################################
2767 08:29:06.333625
2768 08:29:06.598685 00e80000 ################################################################
2769 08:29:06.598819
2770 08:29:06.859848 00f00000 ################################################################
2771 08:29:06.860013
2772 08:29:07.113565 00f80000 ################################################################
2773 08:29:07.113702
2774 08:29:07.251387 01000000 #################################### done.
2775 08:29:07.251516
2776 08:29:07.254533 The bootfile was 17068032 bytes long.
2777 08:29:07.254612
2778 08:29:07.258266 Sending tftp read request... done.
2779 08:29:07.261299
2780 08:29:07.261384 Waiting for the transfer...
2781 08:29:07.261470
2782 08:29:07.526486 00000000 ################################################################
2783 08:29:07.526644
2784 08:29:07.776222 00080000 ################################################################
2785 08:29:07.776383
2786 08:29:08.028505 00100000 ################################################################
2787 08:29:08.028665
2788 08:29:08.280135 00180000 ################################################################
2789 08:29:08.280296
2790 08:29:08.530075 00200000 ################################################################
2791 08:29:08.530235
2792 08:29:08.783376 00280000 ################################################################
2793 08:29:08.783538
2794 08:29:09.024763 00300000 ################################################################
2795 08:29:09.024989
2796 08:29:09.265700 00380000 ################################################################
2797 08:29:09.265833
2798 08:29:09.508560 00400000 ################################################################
2799 08:29:09.508720
2800 08:29:09.761754 00480000 ################################################################
2801 08:29:09.761921
2802 08:29:10.014413 00500000 ################################################################
2803 08:29:10.014543
2804 08:29:10.265240 00580000 ################################################################
2805 08:29:10.265402
2806 08:29:10.516728 00600000 ################################################################
2807 08:29:10.516887
2808 08:29:10.766385 00680000 ################################################################
2809 08:29:10.766543
2810 08:29:10.862422 00700000 ######################### done.
2811 08:29:10.862540
2812 08:29:10.865756 Sending tftp read request... done.
2813 08:29:10.866173
2814 08:29:10.869261 Waiting for the transfer...
2815 08:29:10.869704
2816 08:29:10.872741 00000000 # done.
2817 08:29:10.873344
2818 08:29:10.879450 Command line loaded dynamically from TFTP file: 13238252/tftp-deploy-uilc58q8/kernel/cmdline
2819 08:29:10.879929
2820 08:29:10.905523 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13238252/extract-nfsrootfs-fkz8ik7u,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2821 08:29:10.911356
2822 08:29:10.915133 Shutting down all USB controllers.
2823 08:29:10.915671
2824 08:29:10.916033 Removing current net device
2825 08:29:10.916367
2826 08:29:10.918111 Finalizing coreboot
2827 08:29:10.918567
2828 08:29:10.924952 Exiting depthcharge with code 4 at timestamp: 24686647
2829 08:29:10.925462
2830 08:29:10.925817
2831 08:29:10.926145 Starting kernel ...
2832 08:29:10.926461
2833 08:29:10.926765
2834 08:29:10.928258 end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
2835 08:29:10.928761 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2836 08:29:10.929194 Setting prompt string to ['Linux version [0-9]']
2837 08:29:10.929570 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2838 08:29:10.929938 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2840 08:33:36.929729 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2842 08:33:36.930816 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2844 08:33:36.931688 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2847 08:33:36.933132 end: 2 depthcharge-action (duration 00:05:00) [common]
2849 08:33:36.933952 Cleaning after the job
2850 08:33:36.934037 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13238252/tftp-deploy-uilc58q8/ramdisk
2851 08:33:36.935153 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13238252/tftp-deploy-uilc58q8/kernel
2852 08:33:36.937585 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13238252/tftp-deploy-uilc58q8/nfsrootfs
2853 08:33:37.011026 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13238252/tftp-deploy-uilc58q8/modules
2854 08:33:37.017734 start: 4.1 power-off (timeout 00:00:30) [common]
2855 08:33:37.018226 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-10' '--port=1' '--command=off'
2856 08:33:37.100904 >> Command sent successfully.
2857 08:33:37.105884 Returned 0 in 0 seconds
2858 08:33:37.206888 end: 4.1 power-off (duration 00:00:00) [common]
2860 08:33:37.208601 start: 4.2 read-feedback (timeout 00:10:00) [common]
2861 08:33:37.210034 Listened to connection for namespace 'common' for up to 1s
2863 08:33:37.211554 Listened to connection for namespace 'common' for up to 1s
2864 08:33:38.210821 Finalising connection for namespace 'common'
2865 08:33:38.211523 Disconnecting from shell: Finalise
2866 08:33:38.212021
2867 08:33:38.313371 end: 4.2 read-feedback (duration 00:00:01) [common]
2868 08:33:38.314018 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13238252
2869 08:33:38.633512 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13238252
2870 08:33:38.633720 JobError: Your job cannot terminate cleanly.