Boot log: acer-cp514-2h-1130g7-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 14:50:06.763196 lava-dispatcher, installed at version: 2024.03
2 14:50:06.763408 start: 0 validate
3 14:50:06.763538 Start time: 2024-05-28 14:50:06.763531+00:00 (UTC)
4 14:50:06.763660 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:50:06.763787 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 14:50:07.026014 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:50:07.026739 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.312-cip109-160-gd72fa2f84aefe%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:50:07.280831 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:50:07.281016 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.312-cip109-160-gd72fa2f84aefe%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 14:50:13.888511 validate duration: 7.13
12 14:50:13.888857 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:50:13.888993 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:50:13.889117 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:50:13.889277 Not decompressing ramdisk as can be used compressed.
16 14:50:13.889399 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 14:50:13.889492 saving as /var/lib/lava/dispatcher/tmp/14064515/tftp-deploy-m1mbs9fx/ramdisk/rootfs.cpio.gz
18 14:50:13.889585 total size: 8417901 (8 MB)
19 14:50:15.088381 progress 0 % (0 MB)
20 14:50:15.090718 progress 5 % (0 MB)
21 14:50:15.093025 progress 10 % (0 MB)
22 14:50:15.095357 progress 15 % (1 MB)
23 14:50:15.097682 progress 20 % (1 MB)
24 14:50:15.099986 progress 25 % (2 MB)
25 14:50:15.102297 progress 30 % (2 MB)
26 14:50:15.104417 progress 35 % (2 MB)
27 14:50:15.106634 progress 40 % (3 MB)
28 14:50:15.108911 progress 45 % (3 MB)
29 14:50:15.111163 progress 50 % (4 MB)
30 14:50:15.113519 progress 55 % (4 MB)
31 14:50:15.115765 progress 60 % (4 MB)
32 14:50:15.117819 progress 65 % (5 MB)
33 14:50:15.120084 progress 70 % (5 MB)
34 14:50:15.122327 progress 75 % (6 MB)
35 14:50:15.124548 progress 80 % (6 MB)
36 14:50:15.126740 progress 85 % (6 MB)
37 14:50:15.129060 progress 90 % (7 MB)
38 14:50:15.131230 progress 95 % (7 MB)
39 14:50:15.133270 progress 100 % (8 MB)
40 14:50:15.133500 8 MB downloaded in 1.24 s (6.45 MB/s)
41 14:50:15.133649 end: 1.1.1 http-download (duration 00:00:01) [common]
43 14:50:15.133882 end: 1.1 download-retry (duration 00:00:01) [common]
44 14:50:15.133976 start: 1.2 download-retry (timeout 00:09:59) [common]
45 14:50:15.134058 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 14:50:15.134192 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.312-cip109-160-gd72fa2f84aefe/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 14:50:15.134260 saving as /var/lib/lava/dispatcher/tmp/14064515/tftp-deploy-m1mbs9fx/kernel/bzImage
48 14:50:15.134319 total size: 17121280 (16 MB)
49 14:50:15.134380 No compression specified
50 14:50:15.135468 progress 0 % (0 MB)
51 14:50:15.139997 progress 5 % (0 MB)
52 14:50:15.144462 progress 10 % (1 MB)
53 14:50:15.148896 progress 15 % (2 MB)
54 14:50:15.153378 progress 20 % (3 MB)
55 14:50:15.157783 progress 25 % (4 MB)
56 14:50:15.162150 progress 30 % (4 MB)
57 14:50:15.166538 progress 35 % (5 MB)
58 14:50:15.170929 progress 40 % (6 MB)
59 14:50:15.175592 progress 45 % (7 MB)
60 14:50:15.179955 progress 50 % (8 MB)
61 14:50:15.184307 progress 55 % (9 MB)
62 14:50:15.188725 progress 60 % (9 MB)
63 14:50:15.193097 progress 65 % (10 MB)
64 14:50:15.197487 progress 70 % (11 MB)
65 14:50:15.201994 progress 75 % (12 MB)
66 14:50:15.206421 progress 80 % (13 MB)
67 14:50:15.210884 progress 85 % (13 MB)
68 14:50:15.215186 progress 90 % (14 MB)
69 14:50:15.219659 progress 95 % (15 MB)
70 14:50:15.223998 progress 100 % (16 MB)
71 14:50:15.224244 16 MB downloaded in 0.09 s (181.58 MB/s)
72 14:50:15.224394 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:50:15.224625 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:50:15.224710 start: 1.3 download-retry (timeout 00:09:59) [common]
76 14:50:15.224795 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 14:50:15.224928 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.312-cip109-160-gd72fa2f84aefe/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 14:50:15.224997 saving as /var/lib/lava/dispatcher/tmp/14064515/tftp-deploy-m1mbs9fx/modules/modules.tar
79 14:50:15.225061 total size: 1253532 (1 MB)
80 14:50:15.225123 Using unxz to decompress xz
81 14:50:15.229413 progress 2 % (0 MB)
82 14:50:15.229968 progress 7 % (0 MB)
83 14:50:15.233854 progress 13 % (0 MB)
84 14:50:15.237952 progress 18 % (0 MB)
85 14:50:15.242189 progress 23 % (0 MB)
86 14:50:15.245956 progress 28 % (0 MB)
87 14:50:15.249977 progress 33 % (0 MB)
88 14:50:15.254274 progress 39 % (0 MB)
89 14:50:15.258227 progress 44 % (0 MB)
90 14:50:15.261551 progress 49 % (0 MB)
91 14:50:15.265864 progress 54 % (0 MB)
92 14:50:15.269708 progress 60 % (0 MB)
93 14:50:15.273876 progress 65 % (0 MB)
94 14:50:15.277802 progress 70 % (0 MB)
95 14:50:15.281176 progress 75 % (0 MB)
96 14:50:15.285152 progress 81 % (0 MB)
97 14:50:15.289577 progress 86 % (1 MB)
98 14:50:15.293287 progress 91 % (1 MB)
99 14:50:15.297449 progress 96 % (1 MB)
100 14:50:15.307339 1 MB downloaded in 0.08 s (14.53 MB/s)
101 14:50:15.307571 end: 1.3.1 http-download (duration 00:00:00) [common]
103 14:50:15.307845 end: 1.3 download-retry (duration 00:00:00) [common]
104 14:50:15.307937 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
105 14:50:15.308033 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
106 14:50:15.308146 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
107 14:50:15.308251 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
108 14:50:15.308494 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3
109 14:50:15.308689 makedir: /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin
110 14:50:15.308847 makedir: /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/tests
111 14:50:15.308985 makedir: /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/results
112 14:50:15.309127 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-add-keys
113 14:50:15.309273 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-add-sources
114 14:50:15.309407 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-background-process-start
115 14:50:15.309534 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-background-process-stop
116 14:50:15.309658 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-common-functions
117 14:50:15.309782 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-echo-ipv4
118 14:50:15.309908 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-install-packages
119 14:50:15.310031 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-installed-packages
120 14:50:15.310151 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-os-build
121 14:50:15.310273 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-probe-channel
122 14:50:15.310394 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-probe-ip
123 14:50:15.310520 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-target-ip
124 14:50:15.310642 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-target-mac
125 14:50:15.310762 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-target-storage
126 14:50:15.310889 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-test-case
127 14:50:15.311015 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-test-event
128 14:50:15.311137 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-test-feedback
129 14:50:15.311257 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-test-raise
130 14:50:15.311378 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-test-reference
131 14:50:15.311503 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-test-runner
132 14:50:15.311624 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-test-set
133 14:50:15.311748 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-test-shell
134 14:50:15.311873 Updating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-install-packages (oe)
135 14:50:15.312022 Updating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/bin/lava-installed-packages (oe)
136 14:50:15.312180 Creating /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/environment
137 14:50:15.312330 LAVA metadata
138 14:50:15.312434 - LAVA_JOB_ID=14064515
139 14:50:15.312525 - LAVA_DISPATCHER_IP=192.168.201.1
140 14:50:15.312633 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
141 14:50:15.312701 skipped lava-vland-overlay
142 14:50:15.312775 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
143 14:50:15.312855 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
144 14:50:15.312920 skipped lava-multinode-overlay
145 14:50:15.312992 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
146 14:50:15.313077 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
147 14:50:15.313152 Loading test definitions
148 14:50:15.313251 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
149 14:50:15.313326 Using /lava-14064515 at stage 0
150 14:50:15.313643 uuid=14064515_1.4.2.3.1 testdef=None
151 14:50:15.313731 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
152 14:50:15.313815 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
153 14:50:15.314339 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
155 14:50:15.314559 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
156 14:50:15.315187 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
158 14:50:15.315455 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
159 14:50:15.316318 runner path: /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/0/tests/0_dmesg test_uuid 14064515_1.4.2.3.1
160 14:50:15.316471 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
162 14:50:15.316676 Creating lava-test-runner.conf files
163 14:50:15.316738 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14064515/lava-overlay-dh6c5iz3/lava-14064515/0 for stage 0
164 14:50:15.316833 - 0_dmesg
165 14:50:15.316927 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
166 14:50:15.317011 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
167 14:50:15.324829 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
168 14:50:15.324933 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
169 14:50:15.325020 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
170 14:50:15.325105 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
171 14:50:15.325187 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
172 14:50:15.572375 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
173 14:50:15.572766 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
174 14:50:15.572874 extracting modules file /var/lib/lava/dispatcher/tmp/14064515/tftp-deploy-m1mbs9fx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14064515/extract-overlay-ramdisk-vp7j8cq9/ramdisk
175 14:50:15.606747 end: 1.4.4 extract-modules (duration 00:00:00) [common]
176 14:50:15.606899 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
177 14:50:15.606994 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14064515/compress-overlay-lhpj8kx9/overlay-1.4.2.4.tar.gz to ramdisk
178 14:50:15.607064 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14064515/compress-overlay-lhpj8kx9/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14064515/extract-overlay-ramdisk-vp7j8cq9/ramdisk
179 14:50:15.613694 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
180 14:50:15.613802 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
181 14:50:15.613890 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
182 14:50:15.613978 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
183 14:50:15.614060 Building ramdisk /var/lib/lava/dispatcher/tmp/14064515/extract-overlay-ramdisk-vp7j8cq9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14064515/extract-overlay-ramdisk-vp7j8cq9/ramdisk
184 14:50:15.765265 >> 62600 blocks
185 14:50:16.809372 rename /var/lib/lava/dispatcher/tmp/14064515/extract-overlay-ramdisk-vp7j8cq9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14064515/tftp-deploy-m1mbs9fx/ramdisk/ramdisk.cpio.gz
186 14:50:16.809814 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
187 14:50:16.809944 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
188 14:50:16.810051 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
189 14:50:16.810154 No mkimage arch provided, not using FIT.
190 14:50:16.810241 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
191 14:50:16.810326 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
192 14:50:16.810426 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
193 14:50:16.810516 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
194 14:50:16.810593 No LXC device requested
195 14:50:16.810672 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
196 14:50:16.810766 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
197 14:50:16.810848 end: 1.6 deploy-device-env (duration 00:00:00) [common]
198 14:50:16.810921 Checking files for TFTP limit of 4294967296 bytes.
199 14:50:16.811320 end: 1 tftp-deploy (duration 00:00:03) [common]
200 14:50:16.811424 start: 2 depthcharge-action (timeout 00:05:00) [common]
201 14:50:16.811511 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
202 14:50:16.811633 substitutions:
203 14:50:16.811697 - {DTB}: None
204 14:50:16.811758 - {INITRD}: 14064515/tftp-deploy-m1mbs9fx/ramdisk/ramdisk.cpio.gz
205 14:50:16.811820 - {KERNEL}: 14064515/tftp-deploy-m1mbs9fx/kernel/bzImage
206 14:50:16.811879 - {LAVA_MAC}: None
207 14:50:16.811935 - {PRESEED_CONFIG}: None
208 14:50:16.811989 - {PRESEED_LOCAL}: None
209 14:50:16.812044 - {RAMDISK}: 14064515/tftp-deploy-m1mbs9fx/ramdisk/ramdisk.cpio.gz
210 14:50:16.812105 - {ROOT_PART}: None
211 14:50:16.812195 - {ROOT}: None
212 14:50:16.812249 - {SERVER_IP}: 192.168.201.1
213 14:50:16.812302 - {TEE}: None
214 14:50:16.812360 Parsed boot commands:
215 14:50:16.812413 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
216 14:50:16.812579 Parsed boot commands: tftpboot 192.168.201.1 14064515/tftp-deploy-m1mbs9fx/kernel/bzImage 14064515/tftp-deploy-m1mbs9fx/kernel/cmdline 14064515/tftp-deploy-m1mbs9fx/ramdisk/ramdisk.cpio.gz
217 14:50:16.812665 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
218 14:50:16.812748 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
219 14:50:16.812839 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
220 14:50:16.812925 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
221 14:50:16.812996 Not connected, no need to disconnect.
222 14:50:16.813070 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
223 14:50:16.813148 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
224 14:50:16.813212 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-6'
225 14:50:16.816751 Setting prompt string to ['lava-test: # ']
226 14:50:16.817115 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
227 14:50:16.817227 end: 2.2.1 reset-connection (duration 00:00:00) [common]
228 14:50:16.817326 start: 2.2.2 reset-device (timeout 00:05:00) [common]
229 14:50:16.817459 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
230 14:50:16.817661 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cp514-2h-1130g7-volteer-cbg-6']
231 14:50:25.537116 Returned 0 in 8 seconds
232 14:50:25.637753 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 14:50:25.638078 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 14:50:25.638173 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 14:50:25.638260 Setting prompt string to 'Starting depthcharge on Voema...'
237 14:50:25.638327 Changing prompt to 'Starting depthcharge on Voema...'
238 14:50:25.638396 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 14:50:25.638791 [Enter `^Ec?' for help]
240 14:50:25.638920
241 14:50:25.639044
242 14:50:25.639140 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 14:50:25.639208 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 14:50:25.639271 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 14:50:25.639333 CPU: AES supported, TXT NOT supported, VT supported
246 14:50:25.639395 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 14:50:25.639456 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 14:50:25.639513 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 14:50:25.639572 VBOOT: Loading verstage.
250 14:50:25.639628 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 14:50:25.639684 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 14:50:25.639740 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 14:50:25.639795 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 14:50:25.639851 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 14:50:25.639906
256 14:50:25.639960
257 14:50:25.640015 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 14:50:25.640070 Probing TPM: . done!
259 14:50:25.640169 TPM ready after 0 ms
260 14:50:25.640229 Connected to device vid:did:rid of 1ae0:0028:00
261 14:50:25.640284 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
262 14:50:25.640343 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 14:50:25.640398 Initialized TPM device CR50 revision 0
264 14:50:25.640453 tlcl_send_startup: Startup return code is 0
265 14:50:25.640508 TPM: setup succeeded
266 14:50:25.640562 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 14:50:25.640617 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 14:50:25.640676 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 14:50:25.640731 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 14:50:25.640785 Chrome EC: UHEPI supported
271 14:50:25.640839 Phase 1
272 14:50:25.640892 FMAP: area GBB found @ 1805000 (458752 bytes)
273 14:50:25.640947 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 14:50:25.641002 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 14:50:25.641057 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 14:50:25.641112 VB2:vb2_check_recovery() Recovery was requested manually
277 14:50:25.641168 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7
278 14:50:25.641223 Recovery requested (1009000e)
279 14:50:25.641280 TPM: Extending digest for VBOOT: boot mode into PCR 0
280 14:50:25.641335 tlcl_extend: response is 0
281 14:50:25.641389 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
282 14:50:25.641444 tlcl_extend: response is 0
283 14:50:25.641498 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
284 14:50:25.641552 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
285 14:50:25.641607 BS: verstage times (exec / console): total (unknown) / 148 ms
286 14:50:25.641662
287 14:50:25.641719
288 14:50:25.641773 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
289 14:50:25.641828 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
290 14:50:25.641883 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
291 14:50:25.641937 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
292 14:50:25.641992 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
293 14:50:25.642045 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
294 14:50:25.642099 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
295 14:50:25.642152 TCO_STS: 0000 0000
296 14:50:25.642206 GEN_PMCON: d0015038 00002200
297 14:50:25.642264 GBLRST_CAUSE: 00000000 00000000
298 14:50:25.642319 HPR_CAUSE0: 00000000
299 14:50:25.642373 prev_sleep_state 5
300 14:50:25.642427 Boot Count incremented to 30615
301 14:50:25.642481 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
302 14:50:25.642535 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 14:50:25.642590 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 14:50:25.642644 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
305 14:50:25.642699 Chrome EC: UHEPI supported
306 14:50:25.642753 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
307 14:50:25.642810 Probing TPM: done!
308 14:50:25.642864 Connected to device vid:did:rid of 1ae0:0028:00
309 14:50:25.642919 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
310 14:50:25.642974 Initialized TPM device CR50 revision 0
311 14:50:25.643028 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
312 14:50:25.643083 MRC: Hash idx 0x100b comparison successful.
313 14:50:25.643138 MRC cache found, size faa8
314 14:50:25.643192 bootmode is set to: 2
315 14:50:25.643246 SPD index = 0
316 14:50:25.643300 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
317 14:50:25.643358 SPD: module type is LPDDR4X
318 14:50:25.643415 SPD: module part number is MT53E512M64D4NW-046
319 14:50:25.643470 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
320 14:50:25.643525 SPD: device width 16 bits, bus width 16 bits
321 14:50:25.643579 SPD: module size is 1024 MB (per channel)
322 14:50:25.643633 CBMEM:
323 14:50:25.643687 IMD: root @ 0x76fff000 254 entries.
324 14:50:25.643741 IMD: root @ 0x76ffec00 62 entries.
325 14:50:25.643796 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
326 14:50:25.644038 FMAP: area RW_VPD found @ f35000 (8192 bytes)
327 14:50:25.644123 External stage cache:
328 14:50:25.644196 IMD: root @ 0x7b3ff000 254 entries.
329 14:50:25.644251 IMD: root @ 0x7b3fec00 62 entries.
330 14:50:25.644306 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
331 14:50:25.644362 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
332 14:50:25.644417 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
333 14:50:25.644475 MRC: 'RECOVERY_MRC_CACHE' does not need update.
334 14:50:25.644533 cse_lite: Skip switching to RW in the recovery path
335 14:50:25.644588 8 DIMMs found
336 14:50:25.644643 SMM Memory Map
337 14:50:25.644698 SMRAM : 0x7b000000 0x800000
338 14:50:25.644753 Subregion 0: 0x7b000000 0x200000
339 14:50:25.644807 Subregion 1: 0x7b200000 0x200000
340 14:50:25.644862 Subregion 2: 0x7b400000 0x400000
341 14:50:25.644916 top_of_ram = 0x77000000
342 14:50:25.644970 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
343 14:50:25.645028 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
344 14:50:25.645083 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
345 14:50:25.645137 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 14:50:25.645191 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
347 14:50:25.645246 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
348 14:50:25.645300 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
349 14:50:25.645355 Processing 211 relocs. Offset value of 0x74c0b000
350 14:50:25.645439 BS: romstage times (exec / console): total (unknown) / 277 ms
351 14:50:25.645494
352 14:50:25.645583
353 14:50:25.645639 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
354 14:50:25.645695 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
355 14:50:25.645750 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
356 14:50:25.645806 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
357 14:50:25.645861 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
358 14:50:25.645916 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
359 14:50:25.645971 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
360 14:50:25.646026 Processing 5008 relocs. Offset value of 0x75d98000
361 14:50:25.646083 BS: postcar times (exec / console): total (unknown) / 59 ms
362 14:50:25.646137
363 14:50:25.646191
364 14:50:25.646244 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
365 14:50:25.646300 Normal boot
366 14:50:25.646354 FW_CONFIG value is 0x804c02
367 14:50:25.646409 PCI: 00:07.0 disabled by fw_config
368 14:50:25.646464 PCI: 00:07.1 disabled by fw_config
369 14:50:25.646518 PCI: 00:0d.2 disabled by fw_config
370 14:50:25.646572 PCI: 00:1c.7 disabled by fw_config
371 14:50:25.646630 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 14:50:25.646687 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 14:50:25.646742 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
374 14:50:25.646796 GENERIC: 0.0 disabled by fw_config
375 14:50:25.646850 GENERIC: 1.0 disabled by fw_config
376 14:50:25.646905 fw_config match found: DB_USB=USB3_ACTIVE
377 14:50:25.646959 fw_config match found: DB_USB=USB3_ACTIVE
378 14:50:25.647013 fw_config match found: DB_USB=USB3_ACTIVE
379 14:50:25.647067 fw_config match found: DB_USB=USB3_ACTIVE
380 14:50:25.647121 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
381 14:50:25.647179 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
382 14:50:25.647234 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
383 14:50:25.647288 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
384 14:50:25.647343 microcode: sig=0x806c1 pf=0x80 revision=0x86
385 14:50:25.647397 microcode: Update skipped, already up-to-date
386 14:50:25.647451 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
387 14:50:25.647506 Detected 4 core, 8 thread CPU.
388 14:50:25.647561 Setting up SMI for CPU
389 14:50:25.647615 IED base = 0x7b400000
390 14:50:25.647668 IED size = 0x00400000
391 14:50:25.647725 Will perform SMM setup.
392 14:50:25.647781 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
393 14:50:25.647836 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
394 14:50:25.647890 Processing 16 relocs. Offset value of 0x00030000
395 14:50:25.647944 Attempting to start 7 APs
396 14:50:25.648000 Waiting for 10ms after sending INIT.
397 14:50:25.648054 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
398 14:50:25.648154 AP: slot 5 apic_id 3.
399 14:50:25.648233 AP: slot 4 apic_id 2.
400 14:50:25.648334 AP: slot 2 apic_id 5.
401 14:50:25.648389 AP: slot 6 apic_id 4.
402 14:50:25.648443 AP: slot 3 apic_id 6.
403 14:50:25.648496 AP: slot 7 apic_id 7.
404 14:50:25.648550 done.
405 14:50:25.648604 Waiting for 2nd SIPI to complete...done.
406 14:50:25.648660 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
407 14:50:25.648715 Processing 13 relocs. Offset value of 0x00038000
408 14:50:25.648769 Unable to locate Global NVS
409 14:50:25.648826 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
410 14:50:25.648883 Installing permanent SMM handler to 0x7b000000
411 14:50:25.648937 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
412 14:50:25.648992 Processing 794 relocs. Offset value of 0x7b010000
413 14:50:25.649232 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
414 14:50:25.649296 Processing 13 relocs. Offset value of 0x7b008000
415 14:50:25.649354 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
416 14:50:25.649410 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
417 14:50:25.649465 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
418 14:50:25.649519 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
419 14:50:25.649573 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
420 14:50:25.649628 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
421 14:50:25.649681 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
422 14:50:25.649736 Unable to locate Global NVS
423 14:50:25.649790 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
424 14:50:25.649844 Clearing SMI status registers
425 14:50:25.649900 SMI_STS: PM1
426 14:50:25.649954 PM1_STS: PWRBTN
427 14:50:25.650010 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
428 14:50:25.650065 In relocation handler: CPU 0
429 14:50:25.650119 New SMBASE=0x7b000000 IEDBASE=0x7b400000
430 14:50:25.650174 Writing SMRR. base = 0x7b000006, mask=0xff800c00
431 14:50:25.650229 Relocation complete.
432 14:50:25.650282 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
433 14:50:25.650337 In relocation handler: CPU 1
434 14:50:25.650391 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
435 14:50:25.650445 Relocation complete.
436 14:50:25.650501 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
437 14:50:25.650556 In relocation handler: CPU 5
438 14:50:25.650610 New SMBASE=0x7affec00 IEDBASE=0x7b400000
439 14:50:25.650664 Relocation complete.
440 14:50:25.650718 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
441 14:50:25.650773 In relocation handler: CPU 4
442 14:50:25.650826 New SMBASE=0x7afff000 IEDBASE=0x7b400000
443 14:50:25.650881 Writing SMRR. base = 0x7b000006, mask=0xff800c00
444 14:50:25.650934 Relocation complete.
445 14:50:25.650991 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
446 14:50:25.651047 In relocation handler: CPU 2
447 14:50:25.651101 New SMBASE=0x7afff800 IEDBASE=0x7b400000
448 14:50:25.651156 Relocation complete.
449 14:50:25.651209 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
450 14:50:25.651263 In relocation handler: CPU 6
451 14:50:25.651317 New SMBASE=0x7affe800 IEDBASE=0x7b400000
452 14:50:25.651372 Writing SMRR. base = 0x7b000006, mask=0xff800c00
453 14:50:25.651426 Relocation complete.
454 14:50:25.651480 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
455 14:50:25.651537 In relocation handler: CPU 3
456 14:50:25.651591 New SMBASE=0x7afff400 IEDBASE=0x7b400000
457 14:50:25.651646 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 14:50:25.651699 Relocation complete.
459 14:50:25.651752 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
460 14:50:25.651807 In relocation handler: CPU 7
461 14:50:25.651860 New SMBASE=0x7affe400 IEDBASE=0x7b400000
462 14:50:25.651914 Relocation complete.
463 14:50:25.651968 Initializing CPU #0
464 14:50:25.652025 CPU: vendor Intel device 806c1
465 14:50:25.652095 CPU: family 06, model 8c, stepping 01
466 14:50:25.652172 Clearing out pending MCEs
467 14:50:25.652226 Setting up local APIC...
468 14:50:25.652296 apic_id: 0x00 done.
469 14:50:25.652365 Turbo is available but hidden
470 14:50:25.652419 Turbo is available and visible
471 14:50:25.652473 microcode: Update skipped, already up-to-date
472 14:50:25.652527 CPU #0 initialized
473 14:50:25.652584 Initializing CPU #3
474 14:50:25.652638 Initializing CPU #7
475 14:50:25.652692 Initializing CPU #2
476 14:50:25.652745 Initializing CPU #1
477 14:50:25.652799 CPU: vendor Intel device 806c1
478 14:50:25.652853 CPU: family 06, model 8c, stepping 01
479 14:50:25.652907 Initializing CPU #6
480 14:50:25.652961 Clearing out pending MCEs
481 14:50:25.653016 CPU: vendor Intel device 806c1
482 14:50:25.653072 CPU: family 06, model 8c, stepping 01
483 14:50:25.653129 Setting up local APIC...
484 14:50:25.653183 Initializing CPU #5
485 14:50:25.653236 Initializing CPU #4
486 14:50:25.653290 CPU: vendor Intel device 806c1
487 14:50:25.653344 CPU: family 06, model 8c, stepping 01
488 14:50:25.653398 CPU: vendor Intel device 806c1
489 14:50:25.653452 CPU: family 06, model 8c, stepping 01
490 14:50:25.653506 Clearing out pending MCEs
491 14:50:25.653560 Clearing out pending MCEs
492 14:50:25.653617 Setting up local APIC...
493 14:50:25.653671 CPU: vendor Intel device 806c1
494 14:50:25.653725 CPU: family 06, model 8c, stepping 01
495 14:50:25.653779 CPU: vendor Intel device 806c1
496 14:50:25.653833 CPU: vendor Intel device 806c1
497 14:50:25.653887 CPU: family 06, model 8c, stepping 01
498 14:50:25.653942 CPU: family 06, model 8c, stepping 01
499 14:50:25.653995 Clearing out pending MCEs
500 14:50:25.654049 Clearing out pending MCEs
501 14:50:25.654103 Setting up local APIC...
502 14:50:25.654159 Setting up local APIC...
503 14:50:25.654215 Clearing out pending MCEs
504 14:50:25.654269 apic_id: 0x05 done.
505 14:50:25.654322 Setting up local APIC...
506 14:50:25.654377 microcode: Update skipped, already up-to-date
507 14:50:25.654431 apic_id: 0x04 done.
508 14:50:25.654485 CPU #2 initialized
509 14:50:25.654539 microcode: Update skipped, already up-to-date
510 14:50:25.654593 Setting up local APIC...
511 14:50:25.654647 CPU #6 initialized
512 14:50:25.654703 apic_id: 0x02 done.
513 14:50:25.654757 apic_id: 0x03 done.
514 14:50:25.654811 microcode: Update skipped, already up-to-date
515 14:50:25.654865 microcode: Update skipped, already up-to-date
516 14:50:25.654919 CPU #4 initialized
517 14:50:25.654972 CPU #5 initialized
518 14:50:25.655054 apic_id: 0x07 done.
519 14:50:25.655107 apic_id: 0x06 done.
520 14:50:25.655161 microcode: Update skipped, already up-to-date
521 14:50:25.655284 microcode: Update skipped, already up-to-date
522 14:50:25.655340 CPU #7 initialized
523 14:50:25.655394 CPU #3 initialized
524 14:50:25.655447 Clearing out pending MCEs
525 14:50:25.655500 Setting up local APIC...
526 14:50:25.655555 apic_id: 0x01 done.
527 14:50:25.655822 microcode: Update skipped, already up-to-date
528 14:50:25.655898 CPU #1 initialized
529 14:50:25.655955 bsp_do_flight_plan done after 455 msecs.
530 14:50:25.656009 CPU: frequency set to 4000 MHz
531 14:50:25.656063 Enabling SMIs.
532 14:50:25.656142 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
533 14:50:25.656213 SATAXPCIE1 indicates PCIe NVMe is present
534 14:50:25.656268 Probing TPM: done!
535 14:50:25.656322 Connected to device vid:did:rid of 1ae0:0028:00
536 14:50:25.656377 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
537 14:50:25.656462 Initialized TPM device CR50 revision 0
538 14:50:25.656522 Enabling S0i3.4
539 14:50:25.656580 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
540 14:50:25.656635 Found a VBT of 8704 bytes after decompression
541 14:50:25.656719 cse_lite: CSE RO boot. HybridStorageMode disabled
542 14:50:25.656773 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
543 14:50:25.656842 FSPS returned 0
544 14:50:25.656910 Executing Phase 1 of FspMultiPhaseSiInit
545 14:50:25.656964 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
546 14:50:25.657049 port C0 DISC req: usage 1 usb3 1 usb2 5
547 14:50:25.657106 Raw Buffer output 0 00000511
548 14:50:25.657160 Raw Buffer output 1 00000000
549 14:50:25.657214 pmc_send_ipc_cmd succeeded
550 14:50:25.657268 port C1 DISC req: usage 1 usb3 2 usb2 3
551 14:50:25.657323 Raw Buffer output 0 00000321
552 14:50:25.657377 Raw Buffer output 1 00000000
553 14:50:25.657432 pmc_send_ipc_cmd succeeded
554 14:50:25.657485 Detected 4 core, 8 thread CPU.
555 14:50:25.657540 Detected 4 core, 8 thread CPU.
556 14:50:25.657594 Display FSP Version Info HOB
557 14:50:25.657651 Reference Code - CPU = a.0.4c.31
558 14:50:25.657707 uCode Version = 0.0.0.86
559 14:50:25.657763 TXT ACM version = ff.ff.ff.ffff
560 14:50:25.657820 Reference Code - ME = a.0.4c.31
561 14:50:25.657873 MEBx version = 0.0.0.0
562 14:50:25.657927 ME Firmware Version = Consumer SKU
563 14:50:25.657982 Reference Code - PCH = a.0.4c.31
564 14:50:25.658036 PCH-CRID Status = Disabled
565 14:50:25.658090 PCH-CRID Original Value = ff.ff.ff.ffff
566 14:50:25.658144 PCH-CRID New Value = ff.ff.ff.ffff
567 14:50:25.658198 OPROM - RST - RAID = ff.ff.ff.ffff
568 14:50:25.658252 PCH Hsio Version = 4.0.0.0
569 14:50:25.658308 Reference Code - SA - System Agent = a.0.4c.31
570 14:50:25.658363 Reference Code - MRC = 2.0.0.1
571 14:50:25.658418 SA - PCIe Version = a.0.4c.31
572 14:50:25.658472 SA-CRID Status = Disabled
573 14:50:25.658526 SA-CRID Original Value = 0.0.0.1
574 14:50:25.658580 SA-CRID New Value = 0.0.0.1
575 14:50:25.658634 OPROM - VBIOS = ff.ff.ff.ffff
576 14:50:25.658688 IO Manageability Engine FW Version = 11.1.4.0
577 14:50:25.658742 PHY Build Version = 0.0.0.e0
578 14:50:25.658796 Thunderbolt(TM) FW Version = 0.0.0.0
579 14:50:25.658851 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
580 14:50:25.658907 ITSS IRQ Polarities Before:
581 14:50:25.658964 IPC0: 0xffffffff
582 14:50:25.659018 IPC1: 0xffffffff
583 14:50:25.659072 IPC2: 0xffffffff
584 14:50:25.659125 IPC3: 0xffffffff
585 14:50:25.659178 ITSS IRQ Polarities After:
586 14:50:25.659232 IPC0: 0xffffffff
587 14:50:25.659286 IPC1: 0xffffffff
588 14:50:25.659339 IPC2: 0xffffffff
589 14:50:25.659393 IPC3: 0xffffffff
590 14:50:25.659446 Found PCIe Root Port #9 at PCI: 00:1d.0.
591 14:50:25.659505 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
592 14:50:25.659567 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
593 14:50:25.659623 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
594 14:50:25.659678 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
595 14:50:25.659735 Enumerating buses...
596 14:50:25.659789 Show all devs... Before device enumeration.
597 14:50:25.659843 Root Device: enabled 1
598 14:50:25.659897 DOMAIN: 0000: enabled 1
599 14:50:25.659951 CPU_CLUSTER: 0: enabled 1
600 14:50:25.660009 PCI: 00:00.0: enabled 1
601 14:50:25.660068 PCI: 00:02.0: enabled 1
602 14:50:25.660167 PCI: 00:04.0: enabled 1
603 14:50:25.660227 PCI: 00:05.0: enabled 1
604 14:50:25.660281 PCI: 00:06.0: enabled 0
605 14:50:25.660335 PCI: 00:07.0: enabled 0
606 14:50:25.660390 PCI: 00:07.1: enabled 0
607 14:50:25.660443 PCI: 00:07.2: enabled 0
608 14:50:25.660497 PCI: 00:07.3: enabled 0
609 14:50:25.660551 PCI: 00:08.0: enabled 1
610 14:50:25.660636 PCI: 00:09.0: enabled 0
611 14:50:25.660693 PCI: 00:0a.0: enabled 0
612 14:50:25.660748 PCI: 00:0d.0: enabled 1
613 14:50:25.660802 PCI: 00:0d.1: enabled 0
614 14:50:25.660856 PCI: 00:0d.2: enabled 0
615 14:50:25.660910 PCI: 00:0d.3: enabled 0
616 14:50:25.660964 PCI: 00:0e.0: enabled 0
617 14:50:25.661018 PCI: 00:10.2: enabled 1
618 14:50:25.661072 PCI: 00:10.6: enabled 0
619 14:50:25.661126 PCI: 00:10.7: enabled 0
620 14:50:25.661180 PCI: 00:12.0: enabled 0
621 14:50:25.661237 PCI: 00:12.6: enabled 0
622 14:50:25.661291 PCI: 00:13.0: enabled 0
623 14:50:25.661345 PCI: 00:14.0: enabled 1
624 14:50:25.661399 PCI: 00:14.1: enabled 0
625 14:50:25.661452 PCI: 00:14.2: enabled 1
626 14:50:25.661506 PCI: 00:14.3: enabled 1
627 14:50:25.661559 PCI: 00:15.0: enabled 1
628 14:50:25.661613 PCI: 00:15.1: enabled 1
629 14:50:25.661666 PCI: 00:15.2: enabled 1
630 14:50:25.661720 PCI: 00:15.3: enabled 1
631 14:50:25.661773 PCI: 00:16.0: enabled 1
632 14:50:25.661831 PCI: 00:16.1: enabled 0
633 14:50:25.661885 PCI: 00:16.2: enabled 0
634 14:50:25.661939 PCI: 00:16.3: enabled 0
635 14:50:25.661993 PCI: 00:16.4: enabled 0
636 14:50:25.662046 PCI: 00:16.5: enabled 0
637 14:50:25.662100 PCI: 00:17.0: enabled 1
638 14:50:25.662153 PCI: 00:19.0: enabled 0
639 14:50:25.662207 PCI: 00:19.1: enabled 1
640 14:50:25.662261 PCI: 00:19.2: enabled 0
641 14:50:25.662345 PCI: 00:1c.0: enabled 1
642 14:50:25.662402 PCI: 00:1c.1: enabled 0
643 14:50:25.662456 PCI: 00:1c.2: enabled 0
644 14:50:25.662509 PCI: 00:1c.3: enabled 0
645 14:50:25.662562 PCI: 00:1c.4: enabled 0
646 14:50:25.662615 PCI: 00:1c.5: enabled 0
647 14:50:25.662669 PCI: 00:1c.6: enabled 1
648 14:50:25.662723 PCI: 00:1c.7: enabled 0
649 14:50:25.662776 PCI: 00:1d.0: enabled 1
650 14:50:25.663021 PCI: 00:1d.1: enabled 0
651 14:50:25.663082 PCI: 00:1d.2: enabled 1
652 14:50:25.663137 PCI: 00:1d.3: enabled 0
653 14:50:25.663192 PCI: 00:1e.0: enabled 1
654 14:50:25.663246 PCI: 00:1e.1: enabled 0
655 14:50:25.663300 PCI: 00:1e.2: enabled 1
656 14:50:25.663354 PCI: 00:1e.3: enabled 1
657 14:50:25.663408 PCI: 00:1f.0: enabled 1
658 14:50:25.663462 PCI: 00:1f.1: enabled 0
659 14:50:25.663519 PCI: 00:1f.2: enabled 1
660 14:50:25.663573 PCI: 00:1f.3: enabled 1
661 14:50:25.663627 PCI: 00:1f.4: enabled 0
662 14:50:25.663681 PCI: 00:1f.5: enabled 1
663 14:50:25.663735 PCI: 00:1f.6: enabled 0
664 14:50:25.663788 PCI: 00:1f.7: enabled 0
665 14:50:25.663842 APIC: 00: enabled 1
666 14:50:25.663896 GENERIC: 0.0: enabled 1
667 14:50:25.663950 GENERIC: 0.0: enabled 1
668 14:50:25.664026 GENERIC: 1.0: enabled 1
669 14:50:25.664084 GENERIC: 0.0: enabled 1
670 14:50:25.664163 GENERIC: 1.0: enabled 1
671 14:50:25.664218 USB0 port 0: enabled 1
672 14:50:25.664272 GENERIC: 0.0: enabled 1
673 14:50:25.664326 USB0 port 0: enabled 1
674 14:50:25.664380 GENERIC: 0.0: enabled 1
675 14:50:25.664434 I2C: 00:1a: enabled 1
676 14:50:25.664488 I2C: 00:31: enabled 1
677 14:50:25.664542 I2C: 00:32: enabled 1
678 14:50:25.664596 I2C: 00:10: enabled 1
679 14:50:25.664699 I2C: 00:15: enabled 1
680 14:50:25.664753 GENERIC: 0.0: enabled 0
681 14:50:25.664807 GENERIC: 1.0: enabled 0
682 14:50:25.664862 GENERIC: 0.0: enabled 1
683 14:50:25.664915 SPI: 00: enabled 1
684 14:50:25.664969 SPI: 00: enabled 1
685 14:50:25.665035 PNP: 0c09.0: enabled 1
686 14:50:25.665121 GENERIC: 0.0: enabled 1
687 14:50:25.665220 USB3 port 0: enabled 1
688 14:50:25.665312 USB3 port 1: enabled 1
689 14:50:25.665391 USB3 port 2: enabled 0
690 14:50:25.665480 USB3 port 3: enabled 0
691 14:50:25.665548 USB2 port 0: enabled 0
692 14:50:25.665626 USB2 port 1: enabled 1
693 14:50:25.665696 USB2 port 2: enabled 1
694 14:50:25.665751 USB2 port 3: enabled 0
695 14:50:25.665805 USB2 port 4: enabled 1
696 14:50:25.665859 USB2 port 5: enabled 0
697 14:50:25.665921 USB2 port 6: enabled 0
698 14:50:25.665994 USB2 port 7: enabled 0
699 14:50:25.666058 USB2 port 8: enabled 0
700 14:50:25.666145 USB2 port 9: enabled 0
701 14:50:25.666203 USB3 port 0: enabled 0
702 14:50:25.666271 USB3 port 1: enabled 1
703 14:50:25.666337 USB3 port 2: enabled 0
704 14:50:25.666409 USB3 port 3: enabled 0
705 14:50:25.666477 GENERIC: 0.0: enabled 1
706 14:50:25.666531 GENERIC: 1.0: enabled 1
707 14:50:25.666584 APIC: 01: enabled 1
708 14:50:25.666638 APIC: 05: enabled 1
709 14:50:25.666692 APIC: 06: enabled 1
710 14:50:25.666749 APIC: 02: enabled 1
711 14:50:25.666803 APIC: 03: enabled 1
712 14:50:25.666857 APIC: 04: enabled 1
713 14:50:25.666938 APIC: 07: enabled 1
714 14:50:25.667006 Compare with tree...
715 14:50:25.667118 Root Device: enabled 1
716 14:50:25.667173 DOMAIN: 0000: enabled 1
717 14:50:25.667246 PCI: 00:00.0: enabled 1
718 14:50:25.667301 PCI: 00:02.0: enabled 1
719 14:50:25.667381 PCI: 00:04.0: enabled 1
720 14:50:25.667463 GENERIC: 0.0: enabled 1
721 14:50:25.667517 PCI: 00:05.0: enabled 1
722 14:50:25.667572 PCI: 00:06.0: enabled 0
723 14:50:25.667626 PCI: 00:07.0: enabled 0
724 14:50:25.667680 GENERIC: 0.0: enabled 1
725 14:50:25.667737 PCI: 00:07.1: enabled 0
726 14:50:25.667792 GENERIC: 1.0: enabled 1
727 14:50:25.667846 PCI: 00:07.2: enabled 0
728 14:50:25.667900 GENERIC: 0.0: enabled 1
729 14:50:25.667954 PCI: 00:07.3: enabled 0
730 14:50:25.668008 GENERIC: 1.0: enabled 1
731 14:50:25.668062 PCI: 00:08.0: enabled 1
732 14:50:25.668140 PCI: 00:09.0: enabled 0
733 14:50:25.668209 PCI: 00:0a.0: enabled 0
734 14:50:25.668263 PCI: 00:0d.0: enabled 1
735 14:50:25.668317 USB0 port 0: enabled 1
736 14:50:25.668371 USB3 port 0: enabled 1
737 14:50:25.668425 USB3 port 1: enabled 1
738 14:50:25.668479 USB3 port 2: enabled 0
739 14:50:25.668533 USB3 port 3: enabled 0
740 14:50:25.668587 PCI: 00:0d.1: enabled 0
741 14:50:25.668641 PCI: 00:0d.2: enabled 0
742 14:50:25.668694 GENERIC: 0.0: enabled 1
743 14:50:25.668748 PCI: 00:0d.3: enabled 0
744 14:50:25.668801 PCI: 00:0e.0: enabled 0
745 14:50:25.668854 PCI: 00:10.2: enabled 1
746 14:50:25.668908 PCI: 00:10.6: enabled 0
747 14:50:25.668962 PCI: 00:10.7: enabled 0
748 14:50:25.669015 PCI: 00:12.0: enabled 0
749 14:50:25.669068 PCI: 00:12.6: enabled 0
750 14:50:25.669122 PCI: 00:13.0: enabled 0
751 14:50:25.669191 PCI: 00:14.0: enabled 1
752 14:50:25.669255 USB0 port 0: enabled 1
753 14:50:25.669310 USB2 port 0: enabled 0
754 14:50:25.669364 USB2 port 1: enabled 1
755 14:50:25.669418 USB2 port 2: enabled 1
756 14:50:25.669494 USB2 port 3: enabled 0
757 14:50:25.669549 USB2 port 4: enabled 1
758 14:50:25.669604 USB2 port 5: enabled 0
759 14:50:25.669657 USB2 port 6: enabled 0
760 14:50:25.669711 USB2 port 7: enabled 0
761 14:50:25.669768 USB2 port 8: enabled 0
762 14:50:25.669822 USB2 port 9: enabled 0
763 14:50:25.669876 USB3 port 0: enabled 0
764 14:50:25.669930 USB3 port 1: enabled 1
765 14:50:25.669983 USB3 port 2: enabled 0
766 14:50:25.670037 USB3 port 3: enabled 0
767 14:50:25.670091 PCI: 00:14.1: enabled 0
768 14:50:25.670145 PCI: 00:14.2: enabled 1
769 14:50:25.670199 PCI: 00:14.3: enabled 1
770 14:50:25.670256 GENERIC: 0.0: enabled 1
771 14:50:25.670311 PCI: 00:15.0: enabled 1
772 14:50:25.670365 I2C: 00:1a: enabled 1
773 14:50:25.670419 I2C: 00:31: enabled 1
774 14:50:25.670473 I2C: 00:32: enabled 1
775 14:50:25.670527 PCI: 00:15.1: enabled 1
776 14:50:25.670581 I2C: 00:10: enabled 1
777 14:50:25.670635 PCI: 00:15.2: enabled 1
778 14:50:25.670689 PCI: 00:15.3: enabled 1
779 14:50:25.670742 PCI: 00:16.0: enabled 1
780 14:50:25.670799 PCI: 00:16.1: enabled 0
781 14:50:25.670853 PCI: 00:16.2: enabled 0
782 14:50:25.670907 PCI: 00:16.3: enabled 0
783 14:50:25.670961 PCI: 00:16.4: enabled 0
784 14:50:25.671015 PCI: 00:16.5: enabled 0
785 14:50:25.671069 PCI: 00:17.0: enabled 1
786 14:50:25.671123 PCI: 00:19.0: enabled 0
787 14:50:25.671176 PCI: 00:19.1: enabled 1
788 14:50:25.671230 I2C: 00:15: enabled 1
789 14:50:25.671284 PCI: 00:19.2: enabled 0
790 14:50:25.671337 PCI: 00:1d.0: enabled 1
791 14:50:25.671396 GENERIC: 0.0: enabled 1
792 14:50:25.671496 PCI: 00:1e.0: enabled 1
793 14:50:25.671559 PCI: 00:1e.1: enabled 0
794 14:50:25.671619 PCI: 00:1e.2: enabled 1
795 14:50:25.671708 SPI: 00: enabled 1
796 14:50:25.671813 PCI: 00:1e.3: enabled 1
797 14:50:25.671899 SPI: 00: enabled 1
798 14:50:25.671956 PCI: 00:1f.0: enabled 1
799 14:50:25.672011 PNP: 0c09.0: enabled 1
800 14:50:25.672066 PCI: 00:1f.1: enabled 0
801 14:50:25.672145 PCI: 00:1f.2: enabled 1
802 14:50:25.672243 GENERIC: 0.0: enabled 1
803 14:50:25.672326 GENERIC: 0.0: enabled 1
804 14:50:25.672407 GENERIC: 1.0: enabled 1
805 14:50:25.672482 PCI: 00:1f.3: enabled 1
806 14:50:25.672537 PCI: 00:1f.4: enabled 0
807 14:50:25.672592 PCI: 00:1f.5: enabled 1
808 14:50:25.672646 PCI: 00:1f.6: enabled 0
809 14:50:25.672926 PCI: 00:1f.7: enabled 0
810 14:50:25.673020 CPU_CLUSTER: 0: enabled 1
811 14:50:25.673077 APIC: 00: enabled 1
812 14:50:25.673146 APIC: 01: enabled 1
813 14:50:25.673218 APIC: 05: enabled 1
814 14:50:25.673272 APIC: 06: enabled 1
815 14:50:25.673326 APIC: 02: enabled 1
816 14:50:25.673380 APIC: 03: enabled 1
817 14:50:25.673454 APIC: 04: enabled 1
818 14:50:25.673526 APIC: 07: enabled 1
819 14:50:25.673609 Root Device scanning...
820 14:50:25.673663 scan_static_bus for Root Device
821 14:50:25.673717 DOMAIN: 0000 enabled
822 14:50:25.673784 CPU_CLUSTER: 0 enabled
823 14:50:25.673853 DOMAIN: 0000 scanning...
824 14:50:25.673934 PCI: pci_scan_bus for bus 00
825 14:50:25.674004 PCI: 00:00.0 [8086/0000] ops
826 14:50:25.674101 PCI: 00:00.0 [8086/9a12] enabled
827 14:50:25.674155 PCI: 00:02.0 [8086/0000] bus ops
828 14:50:25.674208 PCI: 00:02.0 [8086/9a40] enabled
829 14:50:25.674262 PCI: 00:04.0 [8086/0000] bus ops
830 14:50:25.674316 PCI: 00:04.0 [8086/9a03] enabled
831 14:50:25.674374 PCI: 00:05.0 [8086/9a19] enabled
832 14:50:25.674430 PCI: 00:07.0 [0000/0000] hidden
833 14:50:25.674533 PCI: 00:08.0 [8086/9a11] enabled
834 14:50:25.674607 PCI: 00:0a.0 [8086/9a0d] disabled
835 14:50:25.674662 PCI: 00:0d.0 [8086/0000] bus ops
836 14:50:25.674744 PCI: 00:0d.0 [8086/9a13] enabled
837 14:50:25.674798 PCI: 00:14.0 [8086/0000] bus ops
838 14:50:25.674852 PCI: 00:14.0 [8086/a0ed] enabled
839 14:50:25.674906 PCI: 00:14.2 [8086/a0ef] enabled
840 14:50:25.674960 PCI: 00:14.3 [8086/0000] bus ops
841 14:50:25.675060 PCI: 00:14.3 [8086/a0f0] enabled
842 14:50:25.675142 PCI: 00:15.0 [8086/0000] bus ops
843 14:50:25.675196 PCI: 00:15.0 [8086/a0e8] enabled
844 14:50:25.675251 PCI: 00:15.1 [8086/0000] bus ops
845 14:50:25.675306 PCI: 00:15.1 [8086/a0e9] enabled
846 14:50:25.675361 PCI: 00:15.2 [8086/0000] bus ops
847 14:50:25.675416 PCI: 00:15.2 [8086/a0ea] enabled
848 14:50:25.675471 PCI: 00:15.3 [8086/0000] bus ops
849 14:50:25.675542 PCI: 00:15.3 [8086/a0eb] enabled
850 14:50:25.675597 PCI: 00:16.0 [8086/0000] ops
851 14:50:25.675653 PCI: 00:16.0 [8086/a0e0] enabled
852 14:50:25.675707 PCI: Static device PCI: 00:17.0 not found, disabling it.
853 14:50:25.675762 PCI: 00:19.0 [8086/0000] bus ops
854 14:50:25.675816 PCI: 00:19.0 [8086/a0c5] disabled
855 14:50:25.675869 PCI: 00:19.1 [8086/0000] bus ops
856 14:50:25.675923 PCI: 00:19.1 [8086/a0c6] enabled
857 14:50:25.675977 PCI: 00:1d.0 [8086/0000] bus ops
858 14:50:25.676048 PCI: 00:1d.0 [8086/a0b0] enabled
859 14:50:25.676111 PCI: 00:1e.0 [8086/0000] ops
860 14:50:25.676182 PCI: 00:1e.0 [8086/a0a8] enabled
861 14:50:25.676236 PCI: 00:1e.2 [8086/0000] bus ops
862 14:50:25.676290 PCI: 00:1e.2 [8086/a0aa] enabled
863 14:50:25.676344 PCI: 00:1e.3 [8086/0000] bus ops
864 14:50:25.676398 PCI: 00:1e.3 [8086/a0ab] enabled
865 14:50:25.676451 PCI: 00:1f.0 [8086/0000] bus ops
866 14:50:25.676507 PCI: 00:1f.0 [8086/a087] enabled
867 14:50:25.676561 RTC Init
868 14:50:25.676619 Set power on after power failure.
869 14:50:25.676676 Disabling Deep S3
870 14:50:25.676730 Disabling Deep S3
871 14:50:25.676785 Disabling Deep S4
872 14:50:25.676838 Disabling Deep S4
873 14:50:25.676893 Disabling Deep S5
874 14:50:25.676947 Disabling Deep S5
875 14:50:25.677001 PCI: 00:1f.2 [0000/0000] hidden
876 14:50:25.677055 PCI: 00:1f.3 [8086/0000] bus ops
877 14:50:25.677109 PCI: 00:1f.3 [8086/a0c8] enabled
878 14:50:25.677166 PCI: 00:1f.5 [8086/0000] bus ops
879 14:50:25.677220 PCI: 00:1f.5 [8086/a0a4] enabled
880 14:50:25.677274 PCI: Leftover static devices:
881 14:50:25.677328 PCI: 00:10.2
882 14:50:25.677381 PCI: 00:10.6
883 14:50:25.677435 PCI: 00:10.7
884 14:50:25.677489 PCI: 00:06.0
885 14:50:25.677542 PCI: 00:07.1
886 14:50:25.677596 PCI: 00:07.2
887 14:50:25.677649 PCI: 00:07.3
888 14:50:25.677742 PCI: 00:09.0
889 14:50:25.677796 PCI: 00:0d.1
890 14:50:25.677851 PCI: 00:0d.2
891 14:50:25.677905 PCI: 00:0d.3
892 14:50:25.677958 PCI: 00:0e.0
893 14:50:25.678012 PCI: 00:12.0
894 14:50:25.678065 PCI: 00:12.6
895 14:50:25.678119 PCI: 00:13.0
896 14:50:25.678173 PCI: 00:14.1
897 14:50:25.678226 PCI: 00:16.1
898 14:50:25.678282 PCI: 00:16.2
899 14:50:25.678335 PCI: 00:16.3
900 14:50:25.678389 PCI: 00:16.4
901 14:50:25.678443 PCI: 00:16.5
902 14:50:25.678496 PCI: 00:17.0
903 14:50:25.678550 PCI: 00:19.2
904 14:50:25.678603 PCI: 00:1e.1
905 14:50:25.678656 PCI: 00:1f.1
906 14:50:25.678709 PCI: 00:1f.4
907 14:50:25.678762 PCI: 00:1f.6
908 14:50:25.678853 PCI: 00:1f.7
909 14:50:25.678910 PCI: Check your devicetree.cb.
910 14:50:25.678965 PCI: 00:02.0 scanning...
911 14:50:25.679020 scan_generic_bus for PCI: 00:02.0
912 14:50:25.679073 scan_generic_bus for PCI: 00:02.0 done
913 14:50:25.679127 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
914 14:50:25.679181 PCI: 00:04.0 scanning...
915 14:50:25.679235 scan_generic_bus for PCI: 00:04.0
916 14:50:25.679289 GENERIC: 0.0 enabled
917 14:50:25.679343 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
918 14:50:25.679430 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
919 14:50:25.679487 PCI: 00:0d.0 scanning...
920 14:50:25.679542 scan_static_bus for PCI: 00:0d.0
921 14:50:25.679595 USB0 port 0 enabled
922 14:50:25.679649 USB0 port 0 scanning...
923 14:50:25.679703 scan_static_bus for USB0 port 0
924 14:50:25.679757 USB3 port 0 enabled
925 14:50:25.679810 USB3 port 1 enabled
926 14:50:25.679863 USB3 port 2 disabled
927 14:50:25.679917 USB3 port 3 disabled
928 14:50:25.679992 USB3 port 0 scanning...
929 14:50:25.680049 scan_static_bus for USB3 port 0
930 14:50:25.680143 scan_static_bus for USB3 port 0 done
931 14:50:25.680206 scan_bus: bus USB3 port 0 finished in 6 msecs
932 14:50:25.680261 USB3 port 1 scanning...
933 14:50:25.680316 scan_static_bus for USB3 port 1
934 14:50:25.680370 scan_static_bus for USB3 port 1 done
935 14:50:25.680424 scan_bus: bus USB3 port 1 finished in 6 msecs
936 14:50:25.680479 scan_static_bus for USB0 port 0 done
937 14:50:25.680552 scan_bus: bus USB0 port 0 finished in 43 msecs
938 14:50:25.680612 scan_static_bus for PCI: 00:0d.0 done
939 14:50:25.680685 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
940 14:50:25.680741 PCI: 00:14.0 scanning...
941 14:50:25.680797 scan_static_bus for PCI: 00:14.0
942 14:50:25.680851 USB0 port 0 enabled
943 14:50:25.680905 USB0 port 0 scanning...
944 14:50:25.680959 scan_static_bus for USB0 port 0
945 14:50:25.681015 USB2 port 0 disabled
946 14:50:25.681098 USB2 port 1 enabled
947 14:50:25.681171 USB2 port 2 enabled
948 14:50:25.681253 USB2 port 3 disabled
949 14:50:25.681339 USB2 port 4 enabled
950 14:50:25.681423 USB2 port 5 disabled
951 14:50:25.681506 USB2 port 6 disabled
952 14:50:25.681589 USB2 port 7 disabled
953 14:50:25.681710 USB2 port 8 disabled
954 14:50:25.681793 USB2 port 9 disabled
955 14:50:25.681876 USB3 port 0 disabled
956 14:50:25.681958 USB3 port 1 enabled
957 14:50:25.682041 USB3 port 2 disabled
958 14:50:25.682124 USB3 port 3 disabled
959 14:50:25.682415 USB2 port 1 scanning...
960 14:50:25.682493 scan_static_bus for USB2 port 1
961 14:50:25.682564 scan_static_bus for USB2 port 1 done
962 14:50:25.682619 scan_bus: bus USB2 port 1 finished in 6 msecs
963 14:50:25.682704 USB2 port 2 scanning...
964 14:50:25.682792 scan_static_bus for USB2 port 2
965 14:50:25.682848 scan_static_bus for USB2 port 2 done
966 14:50:25.682902 scan_bus: bus USB2 port 2 finished in 6 msecs
967 14:50:25.682956 USB2 port 4 scanning...
968 14:50:25.683010 scan_static_bus for USB2 port 4
969 14:50:25.683064 scan_static_bus for USB2 port 4 done
970 14:50:25.683118 scan_bus: bus USB2 port 4 finished in 6 msecs
971 14:50:25.683172 USB3 port 1 scanning...
972 14:50:25.683225 scan_static_bus for USB3 port 1
973 14:50:25.683280 scan_static_bus for USB3 port 1 done
974 14:50:25.683334 scan_bus: bus USB3 port 1 finished in 6 msecs
975 14:50:25.683392 scan_static_bus for USB0 port 0 done
976 14:50:25.683451 scan_bus: bus USB0 port 0 finished in 93 msecs
977 14:50:25.683505 scan_static_bus for PCI: 00:14.0 done
978 14:50:25.683560 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
979 14:50:25.683614 PCI: 00:14.3 scanning...
980 14:50:25.683668 scan_static_bus for PCI: 00:14.3
981 14:50:25.683722 GENERIC: 0.0 enabled
982 14:50:25.683776 scan_static_bus for PCI: 00:14.3 done
983 14:50:25.683830 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
984 14:50:25.683884 PCI: 00:15.0 scanning...
985 14:50:25.683945 scan_static_bus for PCI: 00:15.0
986 14:50:25.684029 I2C: 00:1a enabled
987 14:50:25.684133 I2C: 00:31 enabled
988 14:50:25.684204 I2C: 00:32 enabled
989 14:50:25.684260 scan_static_bus for PCI: 00:15.0 done
990 14:50:25.684314 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
991 14:50:25.684369 PCI: 00:15.1 scanning...
992 14:50:25.684424 scan_static_bus for PCI: 00:15.1
993 14:50:25.684482 I2C: 00:10 enabled
994 14:50:25.684538 scan_static_bus for PCI: 00:15.1 done
995 14:50:25.684593 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
996 14:50:25.684648 PCI: 00:15.2 scanning...
997 14:50:25.684703 scan_static_bus for PCI: 00:15.2
998 14:50:25.684758 scan_static_bus for PCI: 00:15.2 done
999 14:50:25.684812 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1000 14:50:25.684866 PCI: 00:15.3 scanning...
1001 14:50:25.684920 scan_static_bus for PCI: 00:15.3
1002 14:50:25.684973 scan_static_bus for PCI: 00:15.3 done
1003 14:50:25.685030 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1004 14:50:25.685085 PCI: 00:19.1 scanning...
1005 14:50:25.685139 scan_static_bus for PCI: 00:19.1
1006 14:50:25.685193 I2C: 00:15 enabled
1007 14:50:25.685246 scan_static_bus for PCI: 00:19.1 done
1008 14:50:25.685301 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1009 14:50:25.685355 PCI: 00:1d.0 scanning...
1010 14:50:25.685409 do_pci_scan_bridge for PCI: 00:1d.0
1011 14:50:25.685463 PCI: pci_scan_bus for bus 01
1012 14:50:25.685517 PCI: 01:00.0 [1c5c/174a] enabled
1013 14:50:25.685571 GENERIC: 0.0 enabled
1014 14:50:25.685630 Enabling Common Clock Configuration
1015 14:50:25.685687 L1 Sub-State supported from root port 29
1016 14:50:25.685742 L1 Sub-State Support = 0xf
1017 14:50:25.685797 CommonModeRestoreTime = 0x28
1018 14:50:25.685853 Power On Value = 0x16, Power On Scale = 0x0
1019 14:50:25.685908 ASPM: Enabled L1
1020 14:50:25.685963 PCIe: Max_Payload_Size adjusted to 128
1021 14:50:25.686018 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1022 14:50:25.686073 PCI: 00:1e.2 scanning...
1023 14:50:25.686130 scan_generic_bus for PCI: 00:1e.2
1024 14:50:25.686186 SPI: 00 enabled
1025 14:50:25.686246 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1026 14:50:25.686305 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1027 14:50:25.686360 PCI: 00:1e.3 scanning...
1028 14:50:25.686415 scan_generic_bus for PCI: 00:1e.3
1029 14:50:25.686469 SPI: 00 enabled
1030 14:50:25.686522 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1031 14:50:25.686577 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1032 14:50:25.686631 PCI: 00:1f.0 scanning...
1033 14:50:25.686685 scan_static_bus for PCI: 00:1f.0
1034 14:50:25.686741 PNP: 0c09.0 enabled
1035 14:50:25.686797 PNP: 0c09.0 scanning...
1036 14:50:25.686851 scan_static_bus for PNP: 0c09.0
1037 14:50:25.686905 scan_static_bus for PNP: 0c09.0 done
1038 14:50:25.686958 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1039 14:50:25.687011 scan_static_bus for PCI: 00:1f.0 done
1040 14:50:25.687064 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1041 14:50:25.687118 PCI: 00:1f.2 scanning...
1042 14:50:25.687171 scan_static_bus for PCI: 00:1f.2
1043 14:50:25.687226 GENERIC: 0.0 enabled
1044 14:50:25.687280 GENERIC: 0.0 scanning...
1045 14:50:25.687333 scan_static_bus for GENERIC: 0.0
1046 14:50:25.687386 GENERIC: 0.0 enabled
1047 14:50:25.687439 GENERIC: 1.0 enabled
1048 14:50:25.687492 scan_static_bus for GENERIC: 0.0 done
1049 14:50:25.687546 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1050 14:50:25.687599 scan_static_bus for PCI: 00:1f.2 done
1051 14:50:25.687652 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1052 14:50:25.687706 PCI: 00:1f.3 scanning...
1053 14:50:25.687759 scan_static_bus for PCI: 00:1f.3
1054 14:50:25.687817 scan_static_bus for PCI: 00:1f.3 done
1055 14:50:25.687873 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1056 14:50:25.687927 PCI: 00:1f.5 scanning...
1057 14:50:25.687980 scan_generic_bus for PCI: 00:1f.5
1058 14:50:25.688034 scan_generic_bus for PCI: 00:1f.5 done
1059 14:50:25.688087 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1060 14:50:25.688182 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1061 14:50:25.688236 scan_static_bus for Root Device done
1062 14:50:25.688289 scan_bus: bus Root Device finished in 737 msecs
1063 14:50:25.688342 done
1064 14:50:25.688398 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1065 14:50:25.688452 Chrome EC: UHEPI supported
1066 14:50:25.688506 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1067 14:50:25.688561 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1068 14:50:25.688615 SPI flash protection: WPSW=0 SRP0=0
1069 14:50:25.688668 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1070 14:50:25.688722 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1071 14:50:25.688776 found VGA at PCI: 00:02.0
1072 14:50:25.688829 Setting up VGA for PCI: 00:02.0
1073 14:50:25.689078 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1074 14:50:25.689138 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1075 14:50:25.689192 Allocating resources...
1076 14:50:25.689246 Reading resources...
1077 14:50:25.689300 Root Device read_resources bus 0 link: 0
1078 14:50:25.689354 DOMAIN: 0000 read_resources bus 0 link: 0
1079 14:50:25.689408 PCI: 00:04.0 read_resources bus 1 link: 0
1080 14:50:25.689464 PCI: 00:04.0 read_resources bus 1 link: 0 done
1081 14:50:25.689518 PCI: 00:0d.0 read_resources bus 0 link: 0
1082 14:50:25.689572 USB0 port 0 read_resources bus 0 link: 0
1083 14:50:25.689625 USB0 port 0 read_resources bus 0 link: 0 done
1084 14:50:25.689678 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1085 14:50:25.689731 PCI: 00:14.0 read_resources bus 0 link: 0
1086 14:50:25.689785 USB0 port 0 read_resources bus 0 link: 0
1087 14:50:25.689838 USB0 port 0 read_resources bus 0 link: 0 done
1088 14:50:25.689891 PCI: 00:14.0 read_resources bus 0 link: 0 done
1089 14:50:25.689944 PCI: 00:14.3 read_resources bus 0 link: 0
1090 14:50:25.689997 PCI: 00:14.3 read_resources bus 0 link: 0 done
1091 14:50:25.690054 PCI: 00:15.0 read_resources bus 0 link: 0
1092 14:50:25.690111 PCI: 00:15.0 read_resources bus 0 link: 0 done
1093 14:50:25.690165 PCI: 00:15.1 read_resources bus 0 link: 0
1094 14:50:25.690218 PCI: 00:15.1 read_resources bus 0 link: 0 done
1095 14:50:25.690271 PCI: 00:19.1 read_resources bus 0 link: 0
1096 14:50:25.690324 PCI: 00:19.1 read_resources bus 0 link: 0 done
1097 14:50:25.690378 PCI: 00:1d.0 read_resources bus 1 link: 0
1098 14:50:25.690431 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1099 14:50:25.690484 PCI: 00:1e.2 read_resources bus 2 link: 0
1100 14:50:25.690652 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1101 14:50:25.690773 PCI: 00:1e.3 read_resources bus 3 link: 0
1102 14:50:25.690866 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1103 14:50:25.690950 PCI: 00:1f.0 read_resources bus 0 link: 0
1104 14:50:25.691034 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1105 14:50:25.691117 PCI: 00:1f.2 read_resources bus 0 link: 0
1106 14:50:25.691183 GENERIC: 0.0 read_resources bus 0 link: 0
1107 14:50:25.691242 GENERIC: 0.0 read_resources bus 0 link: 0 done
1108 14:50:25.691296 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1109 14:50:25.691350 DOMAIN: 0000 read_resources bus 0 link: 0 done
1110 14:50:25.691404 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1111 14:50:25.691458 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1112 14:50:25.691512 Root Device read_resources bus 0 link: 0 done
1113 14:50:25.691565 Done reading resources.
1114 14:50:25.691618 Show resources in subtree (Root Device)...After reading.
1115 14:50:25.691672 Root Device child on link 0 DOMAIN: 0000
1116 14:50:25.691729 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1117 14:50:25.691785 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1118 14:50:25.691840 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1119 14:50:25.691925 PCI: 00:00.0
1120 14:50:25.692015 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1121 14:50:25.692123 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1122 14:50:25.692204 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1123 14:50:25.692300 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1124 14:50:25.692359 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1125 14:50:25.692421 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1126 14:50:25.692510 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1127 14:50:25.692595 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1128 14:50:25.692680 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1129 14:50:25.692764 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1130 14:50:25.692850 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1131 14:50:25.692935 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1132 14:50:25.693019 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1133 14:50:25.693103 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1134 14:50:25.693188 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1135 14:50:25.693272 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1136 14:50:25.693387 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1137 14:50:25.693474 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1138 14:50:25.693558 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1139 14:50:25.693835 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1140 14:50:25.693922 PCI: 00:02.0
1141 14:50:25.694010 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1142 14:50:25.694095 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1143 14:50:25.694180 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1144 14:50:25.694264 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1145 14:50:25.694348 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1146 14:50:25.694438 GENERIC: 0.0
1147 14:50:25.694497 PCI: 00:05.0
1148 14:50:25.694556 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1149 14:50:25.694611 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1150 14:50:25.694665 GENERIC: 0.0
1151 14:50:25.694719 PCI: 00:08.0
1152 14:50:25.694772 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1153 14:50:25.694827 PCI: 00:0a.0
1154 14:50:25.694880 PCI: 00:0d.0 child on link 0 USB0 port 0
1155 14:50:25.694933 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 14:50:25.695007 USB0 port 0 child on link 0 USB3 port 0
1157 14:50:25.695093 USB3 port 0
1158 14:50:25.695175 USB3 port 1
1159 14:50:25.695257 USB3 port 2
1160 14:50:25.695339 USB3 port 3
1161 14:50:25.695421 PCI: 00:14.0 child on link 0 USB0 port 0
1162 14:50:25.695506 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 14:50:25.695589 USB0 port 0 child on link 0 USB2 port 0
1164 14:50:25.695664 USB2 port 0
1165 14:50:25.695719 USB2 port 1
1166 14:50:25.695772 USB2 port 2
1167 14:50:25.695825 USB2 port 3
1168 14:50:25.695878 USB2 port 4
1169 14:50:25.695931 USB2 port 5
1170 14:50:25.695984 USB2 port 6
1171 14:50:25.696037 USB2 port 7
1172 14:50:25.696090 USB2 port 8
1173 14:50:25.696183 USB2 port 9
1174 14:50:25.696242 USB3 port 0
1175 14:50:25.696295 USB3 port 1
1176 14:50:25.696361 USB3 port 2
1177 14:50:25.696417 USB3 port 3
1178 14:50:25.699030 PCI: 00:14.2
1179 14:50:25.709083 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1180 14:50:25.718887 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1181 14:50:25.722113 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1182 14:50:25.732593 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1183 14:50:25.735871 GENERIC: 0.0
1184 14:50:25.738956 PCI: 00:15.0 child on link 0 I2C: 00:1a
1185 14:50:25.748976 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 14:50:25.752049 I2C: 00:1a
1187 14:50:25.752183 I2C: 00:31
1188 14:50:25.755619 I2C: 00:32
1189 14:50:25.759079 PCI: 00:15.1 child on link 0 I2C: 00:10
1190 14:50:25.768629 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 14:50:25.768794 I2C: 00:10
1192 14:50:25.772289 PCI: 00:15.2
1193 14:50:25.782244 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 14:50:25.782506 PCI: 00:15.3
1195 14:50:25.792029 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 14:50:25.795498 PCI: 00:16.0
1197 14:50:25.805419 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 14:50:25.805840 PCI: 00:19.0
1199 14:50:25.812131 PCI: 00:19.1 child on link 0 I2C: 00:15
1200 14:50:25.822136 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 14:50:25.822594 I2C: 00:15
1202 14:50:25.825702 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1203 14:50:25.835273 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1204 14:50:25.845443 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1205 14:50:25.855568 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1206 14:50:25.856180 GENERIC: 0.0
1207 14:50:25.858741 PCI: 01:00.0
1208 14:50:25.868665 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1209 14:50:25.879064 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1210 14:50:25.885495 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1211 14:50:25.888654 PCI: 00:1e.0
1212 14:50:25.898489 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1213 14:50:25.902012 PCI: 00:1e.2 child on link 0 SPI: 00
1214 14:50:25.912064 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 14:50:25.915381 SPI: 00
1216 14:50:25.918392 PCI: 00:1e.3 child on link 0 SPI: 00
1217 14:50:25.928462 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 14:50:25.928912 SPI: 00
1219 14:50:25.935366 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 14:50:25.941853 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 14:50:25.944928 PNP: 0c09.0
1222 14:50:25.955333 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1223 14:50:25.958193 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1224 14:50:25.968441 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1225 14:50:25.975126 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1226 14:50:25.981790 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1227 14:50:25.982242 GENERIC: 0.0
1228 14:50:25.985133 GENERIC: 1.0
1229 14:50:25.985580 PCI: 00:1f.3
1230 14:50:25.998467 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1231 14:50:26.008342 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1232 14:50:26.008855 PCI: 00:1f.5
1233 14:50:26.018102 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1234 14:50:26.021651 CPU_CLUSTER: 0 child on link 0 APIC: 00
1235 14:50:26.021967 APIC: 00
1236 14:50:26.024409 APIC: 01
1237 14:50:26.024706 APIC: 05
1238 14:50:26.027554 APIC: 06
1239 14:50:26.027793 APIC: 02
1240 14:50:26.028046 APIC: 03
1241 14:50:26.031136 APIC: 04
1242 14:50:26.031367 APIC: 07
1243 14:50:26.040953 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1244 14:50:26.044406 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1245 14:50:26.051339 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1246 14:50:26.058161 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1247 14:50:26.061153 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1248 14:50:26.064587 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1249 14:50:26.071308 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1250 14:50:26.077530 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1251 14:50:26.084594 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1252 14:50:26.091108 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1253 14:50:26.100826 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1254 14:50:26.104148 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1255 14:50:26.114024 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1256 14:50:26.120600 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1257 14:50:26.127184 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1258 14:50:26.130492 DOMAIN: 0000: Resource ranges:
1259 14:50:26.133690 * Base: 1000, Size: 800, Tag: 100
1260 14:50:26.137148 * Base: 1900, Size: e700, Tag: 100
1261 14:50:26.143858 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1262 14:50:26.150692 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1263 14:50:26.157325 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1264 14:50:26.163993 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1265 14:50:26.173563 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1266 14:50:26.180409 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1267 14:50:26.186832 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1268 14:50:26.197019 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1269 14:50:26.203399 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1270 14:50:26.210212 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1271 14:50:26.219872 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1272 14:50:26.226753 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1273 14:50:26.233544 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1274 14:50:26.243671 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1275 14:50:26.250021 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1276 14:50:26.256600 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1277 14:50:26.266355 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1278 14:50:26.273103 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1279 14:50:26.279492 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1280 14:50:26.289578 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1281 14:50:26.296083 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1282 14:50:26.302597 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1283 14:50:26.313025 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1284 14:50:26.319227 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1285 14:50:26.326131 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1286 14:50:26.329152 DOMAIN: 0000: Resource ranges:
1287 14:50:26.336535 * Base: 7fc00000, Size: 40400000, Tag: 200
1288 14:50:26.339338 * Base: d0000000, Size: 28000000, Tag: 200
1289 14:50:26.342815 * Base: fa000000, Size: 1000000, Tag: 200
1290 14:50:26.349270 * Base: fb001000, Size: 2fff000, Tag: 200
1291 14:50:26.352493 * Base: fe010000, Size: 2e000, Tag: 200
1292 14:50:26.356048 * Base: fe03f000, Size: d41000, Tag: 200
1293 14:50:26.359204 * Base: fed88000, Size: 8000, Tag: 200
1294 14:50:26.365877 * Base: fed93000, Size: d000, Tag: 200
1295 14:50:26.369257 * Base: feda2000, Size: 1e000, Tag: 200
1296 14:50:26.372285 * Base: fede0000, Size: 1220000, Tag: 200
1297 14:50:26.379261 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1298 14:50:26.385865 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1299 14:50:26.392555 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1300 14:50:26.399186 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1301 14:50:26.405654 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1302 14:50:26.412431 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1303 14:50:26.419137 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1304 14:50:26.425375 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1305 14:50:26.432353 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1306 14:50:26.438903 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1307 14:50:26.445583 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1308 14:50:26.452171 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1309 14:50:26.458777 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1310 14:50:26.465335 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1311 14:50:26.471587 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1312 14:50:26.478461 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1313 14:50:26.485104 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1314 14:50:26.491729 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1315 14:50:26.498754 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1316 14:50:26.505020 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1317 14:50:26.511832 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1318 14:50:26.518008 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1319 14:50:26.524596 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1320 14:50:26.531705 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1321 14:50:26.537979 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1322 14:50:26.541473 PCI: 00:1d.0: Resource ranges:
1323 14:50:26.548191 * Base: 7fc00000, Size: 100000, Tag: 200
1324 14:50:26.554422 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1325 14:50:26.561412 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1326 14:50:26.568206 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1327 14:50:26.574567 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1328 14:50:26.581146 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1329 14:50:26.587987 Root Device assign_resources, bus 0 link: 0
1330 14:50:26.591120 DOMAIN: 0000 assign_resources, bus 0 link: 0
1331 14:50:26.601180 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1332 14:50:26.607562 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1333 14:50:26.614400 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1334 14:50:26.624235 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1335 14:50:26.627516 PCI: 00:04.0 assign_resources, bus 1 link: 0
1336 14:50:26.634145 PCI: 00:04.0 assign_resources, bus 1 link: 0
1337 14:50:26.641076 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1338 14:50:26.651028 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1339 14:50:26.657452 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1340 14:50:26.663994 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1341 14:50:26.667276 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1342 14:50:26.674217 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1343 14:50:26.680668 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 14:50:26.683990 PCI: 00:14.0 assign_resources, bus 0 link: 0
1345 14:50:26.693685 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1346 14:50:26.700213 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1347 14:50:26.710293 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1348 14:50:26.714008 PCI: 00:14.3 assign_resources, bus 0 link: 0
1349 14:50:26.716839 PCI: 00:14.3 assign_resources, bus 0 link: 0
1350 14:50:26.727328 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1351 14:50:26.730504 PCI: 00:15.0 assign_resources, bus 0 link: 0
1352 14:50:26.737162 PCI: 00:15.0 assign_resources, bus 0 link: 0
1353 14:50:26.743342 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1354 14:50:26.749953 PCI: 00:15.1 assign_resources, bus 0 link: 0
1355 14:50:26.753358 PCI: 00:15.1 assign_resources, bus 0 link: 0
1356 14:50:26.763474 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1357 14:50:26.769980 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1358 14:50:26.779709 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1359 14:50:26.786329 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1360 14:50:26.789837 PCI: 00:19.1 assign_resources, bus 0 link: 0
1361 14:50:26.796482 PCI: 00:19.1 assign_resources, bus 0 link: 0
1362 14:50:26.803117 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1363 14:50:26.812949 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1364 14:50:26.822797 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1365 14:50:26.826380 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1366 14:50:26.836241 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1367 14:50:26.842369 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1368 14:50:26.852562 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1369 14:50:26.855573 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1370 14:50:26.865789 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1371 14:50:26.869375 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1372 14:50:26.872114 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1373 14:50:26.882062 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1374 14:50:26.885216 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1375 14:50:26.892131 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1376 14:50:26.895337 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1377 14:50:26.901789 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1378 14:50:26.905275 LPC: Trying to open IO window from 800 size 1ff
1379 14:50:26.915278 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1380 14:50:26.922119 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1381 14:50:26.928160 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1382 14:50:26.935110 DOMAIN: 0000 assign_resources, bus 0 link: 0
1383 14:50:26.938680 Root Device assign_resources, bus 0 link: 0
1384 14:50:26.941955 Done setting resources.
1385 14:50:26.948495 Show resources in subtree (Root Device)...After assigning values.
1386 14:50:26.952157 Root Device child on link 0 DOMAIN: 0000
1387 14:50:26.958772 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1388 14:50:26.965191 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1389 14:50:26.975218 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1390 14:50:26.978487 PCI: 00:00.0
1391 14:50:26.988656 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1392 14:50:26.998120 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1393 14:50:27.004879 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1394 14:50:27.015010 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1395 14:50:27.024879 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1396 14:50:27.034865 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1397 14:50:27.044596 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1398 14:50:27.054760 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1399 14:50:27.061289 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1400 14:50:27.071537 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1401 14:50:27.081083 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1402 14:50:27.091322 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1403 14:50:27.101090 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1404 14:50:27.107690 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1405 14:50:27.117744 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1406 14:50:27.127373 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1407 14:50:27.137389 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1408 14:50:27.147563 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1409 14:50:27.157376 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1410 14:50:27.167560 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1411 14:50:27.168096 PCI: 00:02.0
1412 14:50:27.177268 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1413 14:50:27.190644 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1414 14:50:27.197298 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1415 14:50:27.203665 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1416 14:50:27.213770 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1417 14:50:27.214313 GENERIC: 0.0
1418 14:50:27.217394 PCI: 00:05.0
1419 14:50:27.227152 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1420 14:50:27.230962 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1421 14:50:27.233491 GENERIC: 0.0
1422 14:50:27.233908 PCI: 00:08.0
1423 14:50:27.247564 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1424 14:50:27.248094 PCI: 00:0a.0
1425 14:50:27.250415 PCI: 00:0d.0 child on link 0 USB0 port 0
1426 14:50:27.263836 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1427 14:50:27.266758 USB0 port 0 child on link 0 USB3 port 0
1428 14:50:27.267185 USB3 port 0
1429 14:50:27.270139 USB3 port 1
1430 14:50:27.270555 USB3 port 2
1431 14:50:27.273574 USB3 port 3
1432 14:50:27.276729 PCI: 00:14.0 child on link 0 USB0 port 0
1433 14:50:27.289749 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1434 14:50:27.293492 USB0 port 0 child on link 0 USB2 port 0
1435 14:50:27.294075 USB2 port 0
1436 14:50:27.297238 USB2 port 1
1437 14:50:27.297759 USB2 port 2
1438 14:50:27.299900 USB2 port 3
1439 14:50:27.303603 USB2 port 4
1440 14:50:27.304026 USB2 port 5
1441 14:50:27.306693 USB2 port 6
1442 14:50:27.307219 USB2 port 7
1443 14:50:27.309764 USB2 port 8
1444 14:50:27.310288 USB2 port 9
1445 14:50:27.313244 USB3 port 0
1446 14:50:27.313664 USB3 port 1
1447 14:50:27.316613 USB3 port 2
1448 14:50:27.317038 USB3 port 3
1449 14:50:27.320017 PCI: 00:14.2
1450 14:50:27.329820 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1451 14:50:27.339652 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1452 14:50:27.343046 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1453 14:50:27.356309 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1454 14:50:27.356867 GENERIC: 0.0
1455 14:50:27.359702 PCI: 00:15.0 child on link 0 I2C: 00:1a
1456 14:50:27.369427 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1457 14:50:27.372923 I2C: 00:1a
1458 14:50:27.373425 I2C: 00:31
1459 14:50:27.375980 I2C: 00:32
1460 14:50:27.379575 PCI: 00:15.1 child on link 0 I2C: 00:10
1461 14:50:27.389200 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1462 14:50:27.392552 I2C: 00:10
1463 14:50:27.393018 PCI: 00:15.2
1464 14:50:27.402876 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1465 14:50:27.406009 PCI: 00:15.3
1466 14:50:27.415854 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1467 14:50:27.419257 PCI: 00:16.0
1468 14:50:27.429078 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1469 14:50:27.429507 PCI: 00:19.0
1470 14:50:27.432889 PCI: 00:19.1 child on link 0 I2C: 00:15
1471 14:50:27.445693 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1472 14:50:27.446122 I2C: 00:15
1473 14:50:27.449306 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1474 14:50:27.458833 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1475 14:50:27.472056 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1476 14:50:27.482373 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1477 14:50:27.482840 GENERIC: 0.0
1478 14:50:27.485379 PCI: 01:00.0
1479 14:50:27.495467 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1480 14:50:27.505541 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1481 14:50:27.515350 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1482 14:50:27.518359 PCI: 00:1e.0
1483 14:50:27.528634 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1484 14:50:27.535441 PCI: 00:1e.2 child on link 0 SPI: 00
1485 14:50:27.544962 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1486 14:50:27.545454 SPI: 00
1487 14:50:27.548663 PCI: 00:1e.3 child on link 0 SPI: 00
1488 14:50:27.558232 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1489 14:50:27.561350 SPI: 00
1490 14:50:27.564842 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1491 14:50:27.574679 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1492 14:50:27.575106 PNP: 0c09.0
1493 14:50:27.584673 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1494 14:50:27.588271 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1495 14:50:27.598486 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1496 14:50:27.608383 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1497 14:50:27.611138 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1498 14:50:27.614827 GENERIC: 0.0
1499 14:50:27.615251 GENERIC: 1.0
1500 14:50:27.617907 PCI: 00:1f.3
1501 14:50:27.627974 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1502 14:50:27.637772 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1503 14:50:27.641373 PCI: 00:1f.5
1504 14:50:27.651125 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1505 14:50:27.654613 CPU_CLUSTER: 0 child on link 0 APIC: 00
1506 14:50:27.655072 APIC: 00
1507 14:50:27.658002 APIC: 01
1508 14:50:27.658479 APIC: 05
1509 14:50:27.660998 APIC: 06
1510 14:50:27.661435 APIC: 02
1511 14:50:27.661786 APIC: 03
1512 14:50:27.664093 APIC: 04
1513 14:50:27.664570 APIC: 07
1514 14:50:27.667497 Done allocating resources.
1515 14:50:27.674683 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1516 14:50:27.681070 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1517 14:50:27.684091 Configure GPIOs for I2S audio on UP4.
1518 14:50:27.690898 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1519 14:50:27.694156 Enabling resources...
1520 14:50:27.697709 PCI: 00:00.0 subsystem <- 8086/9a12
1521 14:50:27.698136 PCI: 00:00.0 cmd <- 06
1522 14:50:27.704159 PCI: 00:02.0 subsystem <- 8086/9a40
1523 14:50:27.704669 PCI: 00:02.0 cmd <- 03
1524 14:50:27.707371 PCI: 00:04.0 subsystem <- 8086/9a03
1525 14:50:27.710895 PCI: 00:04.0 cmd <- 02
1526 14:50:27.713774 PCI: 00:05.0 subsystem <- 8086/9a19
1527 14:50:27.717098 PCI: 00:05.0 cmd <- 02
1528 14:50:27.720616 PCI: 00:08.0 subsystem <- 8086/9a11
1529 14:50:27.723947 PCI: 00:08.0 cmd <- 06
1530 14:50:27.727370 PCI: 00:0d.0 subsystem <- 8086/9a13
1531 14:50:27.730478 PCI: 00:0d.0 cmd <- 02
1532 14:50:27.733777 PCI: 00:14.0 subsystem <- 8086/a0ed
1533 14:50:27.736878 PCI: 00:14.0 cmd <- 02
1534 14:50:27.740523 PCI: 00:14.2 subsystem <- 8086/a0ef
1535 14:50:27.743697 PCI: 00:14.2 cmd <- 02
1536 14:50:27.747122 PCI: 00:14.3 subsystem <- 8086/a0f0
1537 14:50:27.747544 PCI: 00:14.3 cmd <- 02
1538 14:50:27.753961 PCI: 00:15.0 subsystem <- 8086/a0e8
1539 14:50:27.754384 PCI: 00:15.0 cmd <- 02
1540 14:50:27.757147 PCI: 00:15.1 subsystem <- 8086/a0e9
1541 14:50:27.760464 PCI: 00:15.1 cmd <- 02
1542 14:50:27.763688 PCI: 00:15.2 subsystem <- 8086/a0ea
1543 14:50:27.766922 PCI: 00:15.2 cmd <- 02
1544 14:50:27.770187 PCI: 00:15.3 subsystem <- 8086/a0eb
1545 14:50:27.773620 PCI: 00:15.3 cmd <- 02
1546 14:50:27.777036 PCI: 00:16.0 subsystem <- 8086/a0e0
1547 14:50:27.780074 PCI: 00:16.0 cmd <- 02
1548 14:50:27.783860 PCI: 00:19.1 subsystem <- 8086/a0c6
1549 14:50:27.786696 PCI: 00:19.1 cmd <- 02
1550 14:50:27.790169 PCI: 00:1d.0 bridge ctrl <- 0013
1551 14:50:27.793295 PCI: 00:1d.0 subsystem <- 8086/a0b0
1552 14:50:27.796971 PCI: 00:1d.0 cmd <- 06
1553 14:50:27.799830 PCI: 00:1e.0 subsystem <- 8086/a0a8
1554 14:50:27.803448 PCI: 00:1e.0 cmd <- 06
1555 14:50:27.806359 PCI: 00:1e.2 subsystem <- 8086/a0aa
1556 14:50:27.806812 PCI: 00:1e.2 cmd <- 06
1557 14:50:27.812957 PCI: 00:1e.3 subsystem <- 8086/a0ab
1558 14:50:27.813480 PCI: 00:1e.3 cmd <- 02
1559 14:50:27.816174 PCI: 00:1f.0 subsystem <- 8086/a087
1560 14:50:27.819691 PCI: 00:1f.0 cmd <- 407
1561 14:50:27.823041 PCI: 00:1f.3 subsystem <- 8086/a0c8
1562 14:50:27.826152 PCI: 00:1f.3 cmd <- 02
1563 14:50:27.829747 PCI: 00:1f.5 subsystem <- 8086/a0a4
1564 14:50:27.832638 PCI: 00:1f.5 cmd <- 406
1565 14:50:27.837231 PCI: 01:00.0 cmd <- 02
1566 14:50:27.841626 done.
1567 14:50:27.844995 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1568 14:50:27.848323 Initializing devices...
1569 14:50:27.851420 Root Device init
1570 14:50:27.854622 Chrome EC: Set SMI mask to 0x0000000000000000
1571 14:50:27.861495 Chrome EC: clear events_b mask to 0x0000000000000000
1572 14:50:27.868454 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1573 14:50:27.871312 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1574 14:50:27.878406 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1575 14:50:27.884880 Chrome EC: Set WAKE mask to 0x0000000000000000
1576 14:50:27.888146 fw_config match found: DB_USB=USB3_ACTIVE
1577 14:50:27.894907 Configure Right Type-C port orientation for retimer
1578 14:50:27.898013 Root Device init finished in 42 msecs
1579 14:50:27.901369 PCI: 00:00.0 init
1580 14:50:27.905049 CPU TDP = 9 Watts
1581 14:50:27.905469 CPU PL1 = 9 Watts
1582 14:50:27.907938 CPU PL2 = 40 Watts
1583 14:50:27.908377 CPU PL4 = 83 Watts
1584 14:50:27.911723 PCI: 00:00.0 init finished in 8 msecs
1585 14:50:27.914768 PCI: 00:02.0 init
1586 14:50:27.918087 GMA: Found VBT in CBFS
1587 14:50:27.921232 GMA: Found valid VBT in CBFS
1588 14:50:27.924598 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1589 14:50:27.934629 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1590 14:50:27.937661 PCI: 00:02.0 init finished in 18 msecs
1591 14:50:27.941277 PCI: 00:05.0 init
1592 14:50:27.944182 PCI: 00:05.0 init finished in 0 msecs
1593 14:50:27.944604 PCI: 00:08.0 init
1594 14:50:27.951179 PCI: 00:08.0 init finished in 0 msecs
1595 14:50:27.951601 PCI: 00:14.0 init
1596 14:50:27.957935 PCI: 00:14.0 init finished in 0 msecs
1597 14:50:27.958378 PCI: 00:14.2 init
1598 14:50:27.960647 PCI: 00:14.2 init finished in 0 msecs
1599 14:50:27.965118 PCI: 00:15.0 init
1600 14:50:27.968145 I2C bus 0 version 0x3230302a
1601 14:50:27.971549 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1602 14:50:27.974732 PCI: 00:15.0 init finished in 6 msecs
1603 14:50:27.978021 PCI: 00:15.1 init
1604 14:50:27.981066 I2C bus 1 version 0x3230302a
1605 14:50:27.984400 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1606 14:50:27.987859 PCI: 00:15.1 init finished in 6 msecs
1607 14:50:27.991122 PCI: 00:15.2 init
1608 14:50:27.994686 I2C bus 2 version 0x3230302a
1609 14:50:27.997894 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1610 14:50:28.000942 PCI: 00:15.2 init finished in 6 msecs
1611 14:50:28.004366 PCI: 00:15.3 init
1612 14:50:28.004794 I2C bus 3 version 0x3230302a
1613 14:50:28.010903 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1614 14:50:28.014025 PCI: 00:15.3 init finished in 6 msecs
1615 14:50:28.014453 PCI: 00:16.0 init
1616 14:50:28.020733 PCI: 00:16.0 init finished in 0 msecs
1617 14:50:28.021159 PCI: 00:19.1 init
1618 14:50:28.024313 I2C bus 5 version 0x3230302a
1619 14:50:28.027289 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1620 14:50:28.030676 PCI: 00:19.1 init finished in 6 msecs
1621 14:50:28.034193 PCI: 00:1d.0 init
1622 14:50:28.037791 Initializing PCH PCIe bridge.
1623 14:50:28.040787 PCI: 00:1d.0 init finished in 3 msecs
1624 14:50:28.044026 PCI: 00:1f.0 init
1625 14:50:28.047465 IOAPIC: Initializing IOAPIC at 0xfec00000
1626 14:50:28.054058 IOAPIC: Bootstrap Processor Local APIC = 0x00
1627 14:50:28.054481 IOAPIC: ID = 0x02
1628 14:50:28.057334 IOAPIC: Dumping registers
1629 14:50:28.060834 reg 0x0000: 0x02000000
1630 14:50:28.064026 reg 0x0001: 0x00770020
1631 14:50:28.064493 reg 0x0002: 0x00000000
1632 14:50:28.070757 PCI: 00:1f.0 init finished in 21 msecs
1633 14:50:28.071182 PCI: 00:1f.2 init
1634 14:50:28.073961 Disabling ACPI via APMC.
1635 14:50:28.078213 APMC done.
1636 14:50:28.081571 PCI: 00:1f.2 init finished in 6 msecs
1637 14:50:28.093320 PCI: 01:00.0 init
1638 14:50:28.096389 PCI: 01:00.0 init finished in 0 msecs
1639 14:50:28.099984 PNP: 0c09.0 init
1640 14:50:28.103131 Google Chrome EC uptime: 10.176 seconds
1641 14:50:28.109850 Google Chrome AP resets since EC boot: 0
1642 14:50:28.112884 Google Chrome most recent AP reset causes:
1643 14:50:28.119657 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1644 14:50:28.122620 PNP: 0c09.0 init finished in 19 msecs
1645 14:50:28.128167 Devices initialized
1646 14:50:28.131606 Show all devs... After init.
1647 14:50:28.135095 Root Device: enabled 1
1648 14:50:28.135518 DOMAIN: 0000: enabled 1
1649 14:50:28.138393 CPU_CLUSTER: 0: enabled 1
1650 14:50:28.141277 PCI: 00:00.0: enabled 1
1651 14:50:28.144752 PCI: 00:02.0: enabled 1
1652 14:50:28.145193 PCI: 00:04.0: enabled 1
1653 14:50:28.148264 PCI: 00:05.0: enabled 1
1654 14:50:28.151350 PCI: 00:06.0: enabled 0
1655 14:50:28.155062 PCI: 00:07.0: enabled 0
1656 14:50:28.155487 PCI: 00:07.1: enabled 0
1657 14:50:28.158154 PCI: 00:07.2: enabled 0
1658 14:50:28.161471 PCI: 00:07.3: enabled 0
1659 14:50:28.164559 PCI: 00:08.0: enabled 1
1660 14:50:28.164982 PCI: 00:09.0: enabled 0
1661 14:50:28.167902 PCI: 00:0a.0: enabled 0
1662 14:50:28.171393 PCI: 00:0d.0: enabled 1
1663 14:50:28.174362 PCI: 00:0d.1: enabled 0
1664 14:50:28.174786 PCI: 00:0d.2: enabled 0
1665 14:50:28.177618 PCI: 00:0d.3: enabled 0
1666 14:50:28.181069 PCI: 00:0e.0: enabled 0
1667 14:50:28.184204 PCI: 00:10.2: enabled 1
1668 14:50:28.184630 PCI: 00:10.6: enabled 0
1669 14:50:28.187887 PCI: 00:10.7: enabled 0
1670 14:50:28.190941 PCI: 00:12.0: enabled 0
1671 14:50:28.194032 PCI: 00:12.6: enabled 0
1672 14:50:28.194455 PCI: 00:13.0: enabled 0
1673 14:50:28.197554 PCI: 00:14.0: enabled 1
1674 14:50:28.200919 PCI: 00:14.1: enabled 0
1675 14:50:28.204044 PCI: 00:14.2: enabled 1
1676 14:50:28.204500 PCI: 00:14.3: enabled 1
1677 14:50:28.207328 PCI: 00:15.0: enabled 1
1678 14:50:28.210423 PCI: 00:15.1: enabled 1
1679 14:50:28.210863 PCI: 00:15.2: enabled 1
1680 14:50:28.213729 PCI: 00:15.3: enabled 1
1681 14:50:28.217237 PCI: 00:16.0: enabled 1
1682 14:50:28.220711 PCI: 00:16.1: enabled 0
1683 14:50:28.221186 PCI: 00:16.2: enabled 0
1684 14:50:28.223802 PCI: 00:16.3: enabled 0
1685 14:50:28.227414 PCI: 00:16.4: enabled 0
1686 14:50:28.230771 PCI: 00:16.5: enabled 0
1687 14:50:28.231222 PCI: 00:17.0: enabled 0
1688 14:50:28.233959 PCI: 00:19.0: enabled 0
1689 14:50:28.237077 PCI: 00:19.1: enabled 1
1690 14:50:28.240657 PCI: 00:19.2: enabled 0
1691 14:50:28.241209 PCI: 00:1c.0: enabled 1
1692 14:50:28.243799 PCI: 00:1c.1: enabled 0
1693 14:50:28.247133 PCI: 00:1c.2: enabled 0
1694 14:50:28.250285 PCI: 00:1c.3: enabled 0
1695 14:50:28.250744 PCI: 00:1c.4: enabled 0
1696 14:50:28.253913 PCI: 00:1c.5: enabled 0
1697 14:50:28.257063 PCI: 00:1c.6: enabled 1
1698 14:50:28.260525 PCI: 00:1c.7: enabled 0
1699 14:50:28.261028 PCI: 00:1d.0: enabled 1
1700 14:50:28.263506 PCI: 00:1d.1: enabled 0
1701 14:50:28.266997 PCI: 00:1d.2: enabled 1
1702 14:50:28.267497 PCI: 00:1d.3: enabled 0
1703 14:50:28.270283 PCI: 00:1e.0: enabled 1
1704 14:50:28.273324 PCI: 00:1e.1: enabled 0
1705 14:50:28.277043 PCI: 00:1e.2: enabled 1
1706 14:50:28.277522 PCI: 00:1e.3: enabled 1
1707 14:50:28.280214 PCI: 00:1f.0: enabled 1
1708 14:50:28.283701 PCI: 00:1f.1: enabled 0
1709 14:50:28.286905 PCI: 00:1f.2: enabled 1
1710 14:50:28.287350 PCI: 00:1f.3: enabled 1
1711 14:50:28.289987 PCI: 00:1f.4: enabled 0
1712 14:50:28.293464 PCI: 00:1f.5: enabled 1
1713 14:50:28.296595 PCI: 00:1f.6: enabled 0
1714 14:50:28.297026 PCI: 00:1f.7: enabled 0
1715 14:50:28.300205 APIC: 00: enabled 1
1716 14:50:28.303262 GENERIC: 0.0: enabled 1
1717 14:50:28.303681 GENERIC: 0.0: enabled 1
1718 14:50:28.306754 GENERIC: 1.0: enabled 1
1719 14:50:28.310202 GENERIC: 0.0: enabled 1
1720 14:50:28.313601 GENERIC: 1.0: enabled 1
1721 14:50:28.314017 USB0 port 0: enabled 1
1722 14:50:28.316937 GENERIC: 0.0: enabled 1
1723 14:50:28.319774 USB0 port 0: enabled 1
1724 14:50:28.320269 GENERIC: 0.0: enabled 1
1725 14:50:28.323257 I2C: 00:1a: enabled 1
1726 14:50:28.326734 I2C: 00:31: enabled 1
1727 14:50:28.329704 I2C: 00:32: enabled 1
1728 14:50:28.330165 I2C: 00:10: enabled 1
1729 14:50:28.333159 I2C: 00:15: enabled 1
1730 14:50:28.336436 GENERIC: 0.0: enabled 0
1731 14:50:28.336936 GENERIC: 1.0: enabled 0
1732 14:50:28.339649 GENERIC: 0.0: enabled 1
1733 14:50:28.343225 SPI: 00: enabled 1
1734 14:50:28.343712 SPI: 00: enabled 1
1735 14:50:28.346729 PNP: 0c09.0: enabled 1
1736 14:50:28.349855 GENERIC: 0.0: enabled 1
1737 14:50:28.350312 USB3 port 0: enabled 1
1738 14:50:28.353864 USB3 port 1: enabled 1
1739 14:50:28.356456 USB3 port 2: enabled 0
1740 14:50:28.359509 USB3 port 3: enabled 0
1741 14:50:28.360125 USB2 port 0: enabled 0
1742 14:50:28.363135 USB2 port 1: enabled 1
1743 14:50:28.366167 USB2 port 2: enabled 1
1744 14:50:28.366698 USB2 port 3: enabled 0
1745 14:50:28.369482 USB2 port 4: enabled 1
1746 14:50:28.373073 USB2 port 5: enabled 0
1747 14:50:28.373750 USB2 port 6: enabled 0
1748 14:50:28.376580 USB2 port 7: enabled 0
1749 14:50:28.379573 USB2 port 8: enabled 0
1750 14:50:28.382801 USB2 port 9: enabled 0
1751 14:50:28.383293 USB3 port 0: enabled 0
1752 14:50:28.386274 USB3 port 1: enabled 1
1753 14:50:28.389353 USB3 port 2: enabled 0
1754 14:50:28.389960 USB3 port 3: enabled 0
1755 14:50:28.392819 GENERIC: 0.0: enabled 1
1756 14:50:28.395853 GENERIC: 1.0: enabled 1
1757 14:50:28.399603 APIC: 01: enabled 1
1758 14:50:28.400057 APIC: 05: enabled 1
1759 14:50:28.402790 APIC: 06: enabled 1
1760 14:50:28.403201 APIC: 02: enabled 1
1761 14:50:28.406255 APIC: 03: enabled 1
1762 14:50:28.409318 APIC: 04: enabled 1
1763 14:50:28.409780 APIC: 07: enabled 1
1764 14:50:28.412987 PCI: 01:00.0: enabled 1
1765 14:50:28.419249 BS: BS_DEV_INIT run times (exec / console): 30 / 536 ms
1766 14:50:28.422786 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1767 14:50:28.425825 ELOG: NV offset 0xf30000 size 0x1000
1768 14:50:28.433750 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1769 14:50:28.439941 ELOG: Event(17) added with size 13 at 2024-05-28 14:50:28 UTC
1770 14:50:28.446591 ELOG: Event(92) added with size 9 at 2024-05-28 14:50:28 UTC
1771 14:50:28.453326 ELOG: Event(93) added with size 9 at 2024-05-28 14:50:28 UTC
1772 14:50:28.459831 ELOG: Event(9E) added with size 10 at 2024-05-28 14:50:28 UTC
1773 14:50:28.466950 ELOG: Event(9F) added with size 14 at 2024-05-28 14:50:28 UTC
1774 14:50:28.473158 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1775 14:50:28.479731 ELOG: Event(A1) added with size 10 at 2024-05-28 14:50:28 UTC
1776 14:50:28.486268 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1777 14:50:28.492719 ELOG: Event(A0) added with size 9 at 2024-05-28 14:50:28 UTC
1778 14:50:28.495961 elog_add_boot_reason: Logged dev mode boot
1779 14:50:28.502537 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1780 14:50:28.505889 Finalize devices...
1781 14:50:28.506391 Devices finalized
1782 14:50:28.512777 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1783 14:50:28.516038 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1784 14:50:28.522451 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1785 14:50:28.525449 ME: HFSTS1 : 0x80030055
1786 14:50:28.532256 ME: HFSTS2 : 0x30280116
1787 14:50:28.535515 ME: HFSTS3 : 0x00000050
1788 14:50:28.542306 ME: HFSTS4 : 0x00004000
1789 14:50:28.545443 ME: HFSTS5 : 0x00000000
1790 14:50:28.549008 ME: HFSTS6 : 0x00400006
1791 14:50:28.552238 ME: Manufacturing Mode : YES
1792 14:50:28.558578 ME: SPI Protection Mode Enabled : NO
1793 14:50:28.562151 ME: FW Partition Table : OK
1794 14:50:28.565135 ME: Bringup Loader Failure : NO
1795 14:50:28.568756 ME: Firmware Init Complete : NO
1796 14:50:28.571661 ME: Boot Options Present : NO
1797 14:50:28.575400 ME: Update In Progress : NO
1798 14:50:28.578346 ME: D0i3 Support : YES
1799 14:50:28.581783 ME: Low Power State Enabled : NO
1800 14:50:28.588824 ME: CPU Replaced : YES
1801 14:50:28.591735 ME: CPU Replacement Valid : YES
1802 14:50:28.595351 ME: Current Working State : 5
1803 14:50:28.598611 ME: Current Operation State : 1
1804 14:50:28.601692 ME: Current Operation Mode : 3
1805 14:50:28.605152 ME: Error Code : 0
1806 14:50:28.608481 ME: Enhanced Debug Mode : NO
1807 14:50:28.612067 ME: CPU Debug Disabled : YES
1808 14:50:28.614972 ME: TXT Support : NO
1809 14:50:28.621463 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1810 14:50:28.628601 ELOG: Event(91) added with size 10 at 2024-05-28 14:50:28 UTC
1811 14:50:28.635295 Chrome EC: clear events_b mask to 0x0000000020004000
1812 14:50:28.642062 BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms
1813 14:50:28.648437 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1814 14:50:28.651523 CBFS: 'fallback/slic' not found.
1815 14:50:28.658221 ACPI: Writing ACPI tables at 76b01000.
1816 14:50:28.658656 ACPI: * FACS
1817 14:50:28.661662 ACPI: * DSDT
1818 14:50:28.664998 Ramoops buffer: 0x100000@0x76a00000.
1819 14:50:28.668640 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1820 14:50:28.674533 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1821 14:50:28.678154 Google Chrome EC: version:
1822 14:50:28.681387 ro: voema_v2.0.10114-a447f03e46
1823 14:50:28.684554 rw: voema_v2.0.10114-a447f03e46
1824 14:50:28.685006 running image: 1
1825 14:50:28.691386 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1826 14:50:28.695936 ACPI: * FADT
1827 14:50:28.696407 SCI is IRQ9
1828 14:50:28.702061 ACPI: added table 1/32, length now 40
1829 14:50:28.702532 ACPI: * SSDT
1830 14:50:28.705640 Found 1 CPU(s) with 8 core(s) each.
1831 14:50:28.712162 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1832 14:50:28.715518 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1833 14:50:28.718597 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1834 14:50:28.722292 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1835 14:50:28.728544 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1836 14:50:28.735169 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1837 14:50:28.738475 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1838 14:50:28.745194 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1839 14:50:28.751915 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1840 14:50:28.755383 \_SB.PCI0.RP09: Added StorageD3Enable property
1841 14:50:28.761789 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1842 14:50:28.764889 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1843 14:50:28.771836 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1844 14:50:28.774806 PS2K: Passing 80 keymaps to kernel
1845 14:50:28.781589 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1846 14:50:28.788207 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1847 14:50:28.794803 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1848 14:50:28.801106 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1849 14:50:28.807722 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1850 14:50:28.814650 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1851 14:50:28.820802 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1852 14:50:28.828076 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1853 14:50:28.831029 ACPI: added table 2/32, length now 44
1854 14:50:28.833993 ACPI: * MCFG
1855 14:50:28.837641 ACPI: added table 3/32, length now 48
1856 14:50:28.838091 ACPI: * TPM2
1857 14:50:28.840902 TPM2 log created at 0x769f0000
1858 14:50:28.844363 ACPI: added table 4/32, length now 52
1859 14:50:28.847700 ACPI: * MADT
1860 14:50:28.848155 SCI is IRQ9
1861 14:50:28.854431 ACPI: added table 5/32, length now 56
1862 14:50:28.854849 current = 76b09850
1863 14:50:28.857733 ACPI: * DMAR
1864 14:50:28.860516 ACPI: added table 6/32, length now 60
1865 14:50:28.863772 ACPI: added table 7/32, length now 64
1866 14:50:28.864250 ACPI: * HPET
1867 14:50:28.870375 ACPI: added table 8/32, length now 68
1868 14:50:28.870850 ACPI: done.
1869 14:50:28.873800 ACPI tables: 35216 bytes.
1870 14:50:28.876958 smbios_write_tables: 769ef000
1871 14:50:28.880393 EC returned error result code 3
1872 14:50:28.883738 Couldn't obtain OEM name from CBI
1873 14:50:28.886970 Create SMBIOS type 16
1874 14:50:28.890296 Create SMBIOS type 17
1875 14:50:28.890827 GENERIC: 0.0 (WIFI Device)
1876 14:50:28.894062 SMBIOS tables: 1750 bytes.
1877 14:50:28.897189 Writing table forward entry at 0x00000500
1878 14:50:28.903454 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1879 14:50:28.906938 Writing coreboot table at 0x76b25000
1880 14:50:28.913490 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1881 14:50:28.920052 1. 0000000000001000-000000000009ffff: RAM
1882 14:50:28.923255 2. 00000000000a0000-00000000000fffff: RESERVED
1883 14:50:28.926816 3. 0000000000100000-00000000769eefff: RAM
1884 14:50:28.933345 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1885 14:50:28.939615 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1886 14:50:28.943283 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1887 14:50:28.949616 7. 0000000077000000-000000007fbfffff: RESERVED
1888 14:50:28.952892 8. 00000000c0000000-00000000cfffffff: RESERVED
1889 14:50:28.959872 9. 00000000f8000000-00000000f9ffffff: RESERVED
1890 14:50:28.962824 10. 00000000fb000000-00000000fb000fff: RESERVED
1891 14:50:28.969529 11. 00000000fe000000-00000000fe00ffff: RESERVED
1892 14:50:28.973163 12. 00000000fed80000-00000000fed87fff: RESERVED
1893 14:50:28.976195 13. 00000000fed90000-00000000fed92fff: RESERVED
1894 14:50:28.983037 14. 00000000feda0000-00000000feda1fff: RESERVED
1895 14:50:28.986305 15. 00000000fedc0000-00000000feddffff: RESERVED
1896 14:50:28.993041 16. 0000000100000000-00000002803fffff: RAM
1897 14:50:28.996350 Passing 4 GPIOs to payload:
1898 14:50:28.999475 NAME | PORT | POLARITY | VALUE
1899 14:50:29.006173 lid | undefined | high | high
1900 14:50:29.009226 power | undefined | high | low
1901 14:50:29.015793 oprom | undefined | high | low
1902 14:50:29.019123 EC in RW | 0x000000e5 | high | low
1903 14:50:29.025840 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 13ab
1904 14:50:29.029145 coreboot table: 1576 bytes.
1905 14:50:29.032499 IMD ROOT 0. 0x76fff000 0x00001000
1906 14:50:29.039248 IMD SMALL 1. 0x76ffe000 0x00001000
1907 14:50:29.042164 FSP MEMORY 2. 0x76c4e000 0x003b0000
1908 14:50:29.045828 VPD 3. 0x76c4d000 0x00000367
1909 14:50:29.049081 RO MCACHE 4. 0x76c4c000 0x00000fdc
1910 14:50:29.052022 CONSOLE 5. 0x76c2c000 0x00020000
1911 14:50:29.055513 FMAP 6. 0x76c2b000 0x00000578
1912 14:50:29.058755 TIME STAMP 7. 0x76c2a000 0x00000910
1913 14:50:29.061891 VBOOT WORK 8. 0x76c16000 0x00014000
1914 14:50:29.068708 ROMSTG STCK 9. 0x76c15000 0x00001000
1915 14:50:29.071771 AFTER CAR 10. 0x76c0a000 0x0000b000
1916 14:50:29.075371 RAMSTAGE 11. 0x76b97000 0x00073000
1917 14:50:29.078443 REFCODE 12. 0x76b42000 0x00055000
1918 14:50:29.081618 SMM BACKUP 13. 0x76b32000 0x00010000
1919 14:50:29.085348 4f444749 14. 0x76b30000 0x00002000
1920 14:50:29.088593 EXT VBT15. 0x76b2d000 0x0000219f
1921 14:50:29.091782 COREBOOT 16. 0x76b25000 0x00008000
1922 14:50:29.098305 ACPI 17. 0x76b01000 0x00024000
1923 14:50:29.101436 ACPI GNVS 18. 0x76b00000 0x00001000
1924 14:50:29.104558 RAMOOPS 19. 0x76a00000 0x00100000
1925 14:50:29.108132 TPM2 TCGLOG20. 0x769f0000 0x00010000
1926 14:50:29.111181 SMBIOS 21. 0x769ef000 0x00000800
1927 14:50:29.114784 IMD small region:
1928 14:50:29.118164 IMD ROOT 0. 0x76ffec00 0x00000400
1929 14:50:29.120933 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1930 14:50:29.124539 POWER STATE 2. 0x76ffeb80 0x00000044
1931 14:50:29.127916 ROMSTAGE 3. 0x76ffeb60 0x00000004
1932 14:50:29.134508 MEM INFO 4. 0x76ffe980 0x000001e0
1933 14:50:29.137673 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1934 14:50:29.141063 MTRR: Physical address space:
1935 14:50:29.147677 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1936 14:50:29.154305 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1937 14:50:29.160988 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1938 14:50:29.167640 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1939 14:50:29.173950 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1940 14:50:29.180723 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1941 14:50:29.187436 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1942 14:50:29.190579 MTRR: Fixed MSR 0x250 0x0606060606060606
1943 14:50:29.194058 MTRR: Fixed MSR 0x258 0x0606060606060606
1944 14:50:29.197131 MTRR: Fixed MSR 0x259 0x0000000000000000
1945 14:50:29.201056 MTRR: Fixed MSR 0x268 0x0606060606060606
1946 14:50:29.207441 MTRR: Fixed MSR 0x269 0x0606060606060606
1947 14:50:29.210558 MTRR: Fixed MSR 0x26a 0x0606060606060606
1948 14:50:29.213843 MTRR: Fixed MSR 0x26b 0x0606060606060606
1949 14:50:29.216808 MTRR: Fixed MSR 0x26c 0x0606060606060606
1950 14:50:29.223416 MTRR: Fixed MSR 0x26d 0x0606060606060606
1951 14:50:29.226608 MTRR: Fixed MSR 0x26e 0x0606060606060606
1952 14:50:29.230197 MTRR: Fixed MSR 0x26f 0x0606060606060606
1953 14:50:29.233712 call enable_fixed_mtrr()
1954 14:50:29.237280 CPU physical address size: 39 bits
1955 14:50:29.243632 MTRR: default type WB/UC MTRR counts: 6/6.
1956 14:50:29.246886 MTRR: UC selected as default type.
1957 14:50:29.253926 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1958 14:50:29.256920 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1959 14:50:29.264088 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1960 14:50:29.270148 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1961 14:50:29.277093 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1962 14:50:29.283572 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1963 14:50:29.290079 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 14:50:29.293664 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 14:50:29.296581 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 14:50:29.299987 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 14:50:29.306633 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 14:50:29.309640 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 14:50:29.313225 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 14:50:29.316471 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 14:50:29.323357 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 14:50:29.326152 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 14:50:29.329762 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 14:50:29.330223
1975 14:50:29.332794 MTRR check
1976 14:50:29.336207 call enable_fixed_mtrr()
1977 14:50:29.336664 Fixed MTRRs : Enabled
1978 14:50:29.339326 Variable MTRRs: Enabled
1979 14:50:29.339751
1980 14:50:29.342932 CPU physical address size: 39 bits
1981 14:50:29.349879 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
1982 14:50:29.352933 MTRR: Fixed MSR 0x250 0x0606060606060606
1983 14:50:29.359674 MTRR: Fixed MSR 0x250 0x0606060606060606
1984 14:50:29.362747 MTRR: Fixed MSR 0x258 0x0606060606060606
1985 14:50:29.366244 MTRR: Fixed MSR 0x259 0x0000000000000000
1986 14:50:29.370049 MTRR: Fixed MSR 0x268 0x0606060606060606
1987 14:50:29.376347 MTRR: Fixed MSR 0x269 0x0606060606060606
1988 14:50:29.379233 MTRR: Fixed MSR 0x26a 0x0606060606060606
1989 14:50:29.382841 MTRR: Fixed MSR 0x26b 0x0606060606060606
1990 14:50:29.386169 MTRR: Fixed MSR 0x26c 0x0606060606060606
1991 14:50:29.392786 MTRR: Fixed MSR 0x26d 0x0606060606060606
1992 14:50:29.396317 MTRR: Fixed MSR 0x26e 0x0606060606060606
1993 14:50:29.399272 MTRR: Fixed MSR 0x26f 0x0606060606060606
1994 14:50:29.406008 MTRR: Fixed MSR 0x258 0x0606060606060606
1995 14:50:29.409542 MTRR: Fixed MSR 0x259 0x0000000000000000
1996 14:50:29.412656 MTRR: Fixed MSR 0x268 0x0606060606060606
1997 14:50:29.416129 MTRR: Fixed MSR 0x269 0x0606060606060606
1998 14:50:29.422799 MTRR: Fixed MSR 0x26a 0x0606060606060606
1999 14:50:29.425838 MTRR: Fixed MSR 0x26b 0x0606060606060606
2000 14:50:29.429349 MTRR: Fixed MSR 0x26c 0x0606060606060606
2001 14:50:29.432262 MTRR: Fixed MSR 0x26d 0x0606060606060606
2002 14:50:29.438843 MTRR: Fixed MSR 0x26e 0x0606060606060606
2003 14:50:29.442315 MTRR: Fixed MSR 0x26f 0x0606060606060606
2004 14:50:29.445808 call enable_fixed_mtrr()
2005 14:50:29.448931 call enable_fixed_mtrr()
2006 14:50:29.452355 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 14:50:29.455523 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 14:50:29.458833 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 14:50:29.465633 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 14:50:29.468871 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 14:50:29.472220 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 14:50:29.475653 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 14:50:29.481917 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 14:50:29.485408 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 14:50:29.488615 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 14:50:29.491879 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 14:50:29.498370 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 14:50:29.501676 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 14:50:29.505279 call enable_fixed_mtrr()
2020 14:50:29.508353 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 14:50:29.511872 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 14:50:29.518378 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 14:50:29.521830 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 14:50:29.525119 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 14:50:29.528424 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 14:50:29.535079 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 14:50:29.538315 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 14:50:29.541401 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 14:50:29.544640 CPU physical address size: 39 bits
2030 14:50:29.551115 call enable_fixed_mtrr()
2031 14:50:29.554678 CPU physical address size: 39 bits
2032 14:50:29.557648 CPU physical address size: 39 bits
2033 14:50:29.561047 MTRR: Fixed MSR 0x250 0x0606060606060606
2034 14:50:29.564149 MTRR: Fixed MSR 0x250 0x0606060606060606
2035 14:50:29.571018 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 14:50:29.574486 MTRR: Fixed MSR 0x259 0x0000000000000000
2037 14:50:29.577694 MTRR: Fixed MSR 0x268 0x0606060606060606
2038 14:50:29.580866 MTRR: Fixed MSR 0x269 0x0606060606060606
2039 14:50:29.587770 MTRR: Fixed MSR 0x26a 0x0606060606060606
2040 14:50:29.590948 MTRR: Fixed MSR 0x26b 0x0606060606060606
2041 14:50:29.594780 MTRR: Fixed MSR 0x26c 0x0606060606060606
2042 14:50:29.597575 MTRR: Fixed MSR 0x26d 0x0606060606060606
2043 14:50:29.604153 MTRR: Fixed MSR 0x26e 0x0606060606060606
2044 14:50:29.607596 MTRR: Fixed MSR 0x26f 0x0606060606060606
2045 14:50:29.610642 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 14:50:29.614348 call enable_fixed_mtrr()
2047 14:50:29.617217 MTRR: Fixed MSR 0x259 0x0000000000000000
2048 14:50:29.624317 MTRR: Fixed MSR 0x268 0x0606060606060606
2049 14:50:29.627332 MTRR: Fixed MSR 0x269 0x0606060606060606
2050 14:50:29.630883 MTRR: Fixed MSR 0x26a 0x0606060606060606
2051 14:50:29.633849 MTRR: Fixed MSR 0x26b 0x0606060606060606
2052 14:50:29.640677 MTRR: Fixed MSR 0x26c 0x0606060606060606
2053 14:50:29.643800 MTRR: Fixed MSR 0x26d 0x0606060606060606
2054 14:50:29.647252 MTRR: Fixed MSR 0x26e 0x0606060606060606
2055 14:50:29.650268 MTRR: Fixed MSR 0x26f 0x0606060606060606
2056 14:50:29.654538 CPU physical address size: 39 bits
2057 14:50:29.661134 call enable_fixed_mtrr()
2058 14:50:29.667446 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2059 14:50:29.670650 CPU physical address size: 39 bits
2060 14:50:29.674093 CPU physical address size: 39 bits
2061 14:50:29.677259 Checking segment from ROM address 0xffc02b38
2062 14:50:29.684399 Checking segment from ROM address 0xffc02b54
2063 14:50:29.687302 Loading segment from ROM address 0xffc02b38
2064 14:50:29.690583 code (compression=0)
2065 14:50:29.697362 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2066 14:50:29.707005 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2067 14:50:29.710191 it's not compressed!
2068 14:50:29.848242 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2069 14:50:29.854871 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2070 14:50:29.861369 Loading segment from ROM address 0xffc02b54
2071 14:50:29.864911 Entry Point 0x30000000
2072 14:50:29.865331 Loaded segments
2073 14:50:29.871564 BS: BS_PAYLOAD_LOAD run times (exec / console): 452 / 63 ms
2074 14:50:29.914514 Finalizing chipset.
2075 14:50:29.917881 Finalizing SMM.
2076 14:50:29.918434 APMC done.
2077 14:50:29.924033 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2078 14:50:29.927579 mp_park_aps done after 0 msecs.
2079 14:50:29.930847 Jumping to boot code at 0x30000000(0x76b25000)
2080 14:50:29.940604 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2081 14:50:29.941096
2082 14:50:29.944688
2083 14:50:29.945149
2084 14:50:29.947194 Starting depthcharge on Voema...
2085 14:50:29.947766
2086 14:50:29.949044 end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
2087 14:50:29.949589 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
2088 14:50:29.950054 Setting prompt string to ['volteer:']
2089 14:50:29.950657 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
2090 14:50:29.954276 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2091 14:50:29.954793
2092 14:50:29.960448 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2093 14:50:29.960869
2094 14:50:29.967216 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2095 14:50:29.967637
2096 14:50:29.970123 Failed to find eMMC card reader
2097 14:50:29.970546
2098 14:50:29.973799 Wipe memory regions:
2099 14:50:29.974217
2100 14:50:29.976729 [0x00000000001000, 0x000000000a0000)
2101 14:50:29.977153
2102 14:50:29.980202 [0x00000000100000, 0x00000030000000)
2103 14:50:30.005739
2104 14:50:30.009664 [0x00000032662db0, 0x000000769ef000)
2105 14:50:30.045012
2106 14:50:30.048571 [0x00000100000000, 0x00000280400000)
2107 14:50:30.252644
2108 14:50:30.255577 ec_init: CrosEC protocol v3 supported (256, 256)
2109 14:50:30.687229
2110 14:50:30.687713 R8152: Initializing
2111 14:50:30.688051
2112 14:50:30.690505 Version 6 (ocp_data = 5c30)
2113 14:50:30.691043
2114 14:50:30.694113 R8152: Done initializing
2115 14:50:30.694548
2116 14:50:30.697003 Adding net device
2117 14:50:30.998286
2118 14:50:31.001750 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2119 14:50:31.002172
2120 14:50:31.002503
2121 14:50:31.005170 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2123 14:50:31.106546 volteer: tftpboot 192.168.201.1 14064515/tftp-deploy-m1mbs9fx/kernel/bzImage 14064515/tftp-deploy-m1mbs9fx/kernel/cmdline 14064515/tftp-deploy-m1mbs9fx/ramdisk/ramdisk.cpio.gz
2124 14:50:31.107282 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2125 14:50:31.107707 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
2126 14:50:31.111973 tftpboot 192.168.201.1 14064515/tftp-deploy-m1mbs9fx/kernel/bzIploy-m1mbs9fx/kernel/cmdline 14064515/tftp-deploy-m1mbs9fx/ramdisk/ramdisk.cpio.gz
2127 14:50:31.112500
2128 14:50:31.112840 Waiting for link
2129 14:50:31.315749
2130 14:50:31.316275 done.
2131 14:50:31.316611
2132 14:50:31.316916 MAC: 00:24:32:30:77:76
2133 14:50:31.317226
2134 14:50:31.319079 Sending DHCP discover... done.
2135 14:50:31.319525
2136 14:50:31.322333 Waiting for reply... done.
2137 14:50:31.322767
2138 14:50:31.325777 Sending DHCP request... done.
2139 14:50:31.326228
2140 14:50:31.332743 Waiting for reply... done.
2141 14:50:31.333183
2142 14:50:31.333627 My ip is 192.168.201.16
2143 14:50:31.334046
2144 14:50:31.335872 The DHCP server ip is 192.168.201.1
2145 14:50:31.339160
2146 14:50:31.342642 TFTP server IP predefined by user: 192.168.201.1
2147 14:50:31.343092
2148 14:50:31.349139 Bootfile predefined by user: 14064515/tftp-deploy-m1mbs9fx/kernel/bzImage
2149 14:50:31.349566
2150 14:50:31.352507 Sending tftp read request... done.
2151 14:50:31.352928
2152 14:50:31.361539 Waiting for the transfer...
2153 14:50:31.361963
2154 14:50:31.953592 00000000 ################################################################
2155 14:50:31.953759
2156 14:50:32.540510 00080000 ################################################################
2157 14:50:32.540645
2158 14:50:33.132959 00100000 ################################################################
2159 14:50:33.133095
2160 14:50:33.696808 00180000 ################################################################
2161 14:50:33.696955
2162 14:50:34.292918 00200000 ################################################################
2163 14:50:34.293071
2164 14:50:34.846236 00280000 ################################################################
2165 14:50:34.846370
2166 14:50:35.424381 00300000 ################################################################
2167 14:50:35.424517
2168 14:50:36.008505 00380000 ################################################################
2169 14:50:36.008643
2170 14:50:36.602338 00400000 ################################################################
2171 14:50:36.602474
2172 14:50:37.197213 00480000 ################################################################
2173 14:50:37.197350
2174 14:50:37.803154 00500000 ################################################################
2175 14:50:37.803290
2176 14:50:38.382712 00580000 ################################################################
2177 14:50:38.382889
2178 14:50:38.929556 00600000 ################################################################
2179 14:50:38.929692
2180 14:50:39.488411 00680000 ################################################################
2181 14:50:39.488560
2182 14:50:40.037393 00700000 ################################################################
2183 14:50:40.037539
2184 14:50:40.595280 00780000 ################################################################
2185 14:50:40.595466
2186 14:50:41.174354 00800000 ################################################################
2187 14:50:41.174484
2188 14:50:41.737352 00880000 ################################################################
2189 14:50:41.737513
2190 14:50:42.301836 00900000 ################################################################
2191 14:50:42.301996
2192 14:50:42.863187 00980000 ################################################################
2193 14:50:42.863322
2194 14:50:43.437926 00a00000 ################################################################
2195 14:50:43.438085
2196 14:50:43.999799 00a80000 ################################################################
2197 14:50:43.999963
2198 14:50:44.536509 00b00000 ################################################################
2199 14:50:44.536676
2200 14:50:45.095308 00b80000 ################################################################
2201 14:50:45.095467
2202 14:50:45.656745 00c00000 ################################################################
2203 14:50:45.656914
2204 14:50:46.239280 00c80000 ################################################################
2205 14:50:46.239437
2206 14:50:46.798582 00d00000 ################################################################
2207 14:50:46.798768
2208 14:50:47.353317 00d80000 ################################################################
2209 14:50:47.353466
2210 14:50:47.872979 00e00000 ################################################################
2211 14:50:47.873118
2212 14:50:48.411515 00e80000 ################################################################
2213 14:50:48.411656
2214 14:50:48.962697 00f00000 ################################################################
2215 14:50:48.962869
2216 14:50:49.510456 00f80000 ################################################################
2217 14:50:49.510606
2218 14:50:49.894802 01000000 ########################################### done.
2219 14:50:49.894947
2220 14:50:49.898275 The bootfile was 17121280 bytes long.
2221 14:50:49.898358
2222 14:50:49.901677 Sending tftp read request... done.
2223 14:50:49.901760
2224 14:50:49.904939 Waiting for the transfer...
2225 14:50:49.905021
2226 14:50:50.460257 00000000 ################################################################
2227 14:50:50.460499
2228 14:50:51.042094 00080000 ################################################################
2229 14:50:51.042240
2230 14:50:51.645434 00100000 ################################################################
2231 14:50:51.645583
2232 14:50:52.250028 00180000 ################################################################
2233 14:50:52.250675
2234 14:50:52.913462 00200000 ################################################################
2235 14:50:52.914032
2236 14:50:53.573571 00280000 ################################################################
2237 14:50:53.573814
2238 14:50:54.220447 00300000 ################################################################
2239 14:50:54.221078
2240 14:50:54.787630 00380000 ################################################################
2241 14:50:54.787767
2242 14:50:55.341345 00400000 ################################################################
2243 14:50:55.341485
2244 14:50:55.928042 00480000 ################################################################
2245 14:50:55.928229
2246 14:50:56.471803 00500000 ################################################################
2247 14:50:56.471944
2248 14:50:57.033476 00580000 ################################################################
2249 14:50:57.033610
2250 14:50:57.599640 00600000 ################################################################
2251 14:50:57.599898
2252 14:50:58.211389 00680000 ################################################################
2253 14:50:58.211538
2254 14:50:58.789045 00700000 ################################################################
2255 14:50:58.789186
2256 14:50:59.303155 00780000 ################################################################
2257 14:50:59.303334
2258 14:50:59.829665 00800000 ################################################################
2259 14:50:59.829822
2260 14:51:00.384409 00880000 ################################################################
2261 14:51:00.384546
2262 14:51:00.968004 00900000 ################################################################
2263 14:51:00.968194
2264 14:51:01.385511 00980000 ############################################### done.
2265 14:51:01.385649
2266 14:51:01.388671 Sending tftp read request... done.
2267 14:51:01.388749
2268 14:51:01.392096 Waiting for the transfer...
2269 14:51:01.392233
2270 14:51:01.392331 00000000 # done.
2271 14:51:01.392430
2272 14:51:01.402164 Command line loaded dynamically from TFTP file: 14064515/tftp-deploy-m1mbs9fx/kernel/cmdline
2273 14:51:01.402276
2274 14:51:01.418204 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2275 14:51:01.423511
2276 14:51:01.426700 Shutting down all USB controllers.
2277 14:51:01.426782
2278 14:51:01.426847 Removing current net device
2279 14:51:01.426907
2280 14:51:01.430055 Finalizing coreboot
2281 14:51:01.430140
2282 14:51:01.436776 Exiting depthcharge with code 4 at timestamp: 40162789
2283 14:51:01.436859
2284 14:51:01.436923
2285 14:51:01.436983 Starting kernel ...
2286 14:51:01.437050
2287 14:51:01.437109
2288 14:51:01.437512 end: 2.2.4 bootloader-commands (duration 00:00:31) [common]
2289 14:51:01.437605 start: 2.2.5 auto-login-action (timeout 00:04:15) [common]
2290 14:51:01.437679 Setting prompt string to ['Linux version [0-9]']
2291 14:51:01.437743 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2292 14:51:01.437811 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2294 14:55:16.438662 end: 2.2.5 auto-login-action (duration 00:04:15) [common]
2296 14:55:16.439748 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 255 seconds'
2298 14:55:16.440639 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2301 14:55:16.442015 end: 2 depthcharge-action (duration 00:05:00) [common]
2303 14:55:16.443183 Cleaning after the job
2304 14:55:16.444019 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064515/tftp-deploy-m1mbs9fx/ramdisk
2305 14:55:16.450597 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064515/tftp-deploy-m1mbs9fx/kernel
2306 14:55:16.461530 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064515/tftp-deploy-m1mbs9fx/modules
2307 14:55:16.466797 start: 4.1 power-off (timeout 00:00:30) [common]
2308 14:55:16.467647 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-6', '--port=1', '--command=off']
2309 14:55:17.298866 >> Command sent successfully.
2310 14:55:17.310111 Returned 0 in 0 seconds
2311 14:55:17.411635 end: 4.1 power-off (duration 00:00:01) [common]
2313 14:55:17.413280 start: 4.2 read-feedback (timeout 00:09:59) [common]
2314 14:55:17.414752 Listened to connection for namespace 'common' for up to 1s
2316 14:55:17.416096 Listened to connection for namespace 'common' for up to 1s
2317 14:55:18.415198 Finalising connection for namespace 'common'
2318 14:55:18.415891 Disconnecting from shell: Finalise
2319 14:55:18.416383
2320 14:55:18.517487 end: 4.2 read-feedback (duration 00:00:01) [common]
2321 14:55:18.518136 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14064515
2322 14:55:18.572273 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14064515
2323 14:55:18.572520 JobError: Your job cannot terminate cleanly.