Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 14:50:09.011331 lava-dispatcher, installed at version: 2024.03
2 14:50:09.011553 start: 0 validate
3 14:50:09.011698 Start time: 2024-05-28 14:50:09.011690+00:00 (UTC)
4 14:50:09.011832 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:50:09.011970 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 14:50:09.271683 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:50:09.271876 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.312-cip109-160-gd72fa2f84aefe%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:50:09.273016 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:50:09.273137 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.312-cip109-160-gd72fa2f84aefe%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 14:50:14.775401 validate duration: 5.76
12 14:50:14.775718 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:50:14.775859 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:50:14.775984 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:50:14.776166 Not decompressing ramdisk as can be used compressed.
16 14:50:14.776277 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 14:50:14.776380 saving as /var/lib/lava/dispatcher/tmp/14064488/tftp-deploy-8drztobv/ramdisk/rootfs.cpio.gz
18 14:50:14.776450 total size: 8417901 (8 MB)
19 14:50:14.777634 progress 0 % (0 MB)
20 14:50:14.779958 progress 5 % (0 MB)
21 14:50:14.782287 progress 10 % (0 MB)
22 14:50:14.784604 progress 15 % (1 MB)
23 14:50:14.786891 progress 20 % (1 MB)
24 14:50:14.789169 progress 25 % (2 MB)
25 14:50:14.791395 progress 30 % (2 MB)
26 14:50:14.793641 progress 35 % (2 MB)
27 14:50:14.795835 progress 40 % (3 MB)
28 14:50:14.798249 progress 45 % (3 MB)
29 14:50:14.800704 progress 50 % (4 MB)
30 14:50:14.803099 progress 55 % (4 MB)
31 14:50:14.805361 progress 60 % (4 MB)
32 14:50:14.807400 progress 65 % (5 MB)
33 14:50:14.809621 progress 70 % (5 MB)
34 14:50:14.811916 progress 75 % (6 MB)
35 14:50:14.814142 progress 80 % (6 MB)
36 14:50:14.816448 progress 85 % (6 MB)
37 14:50:14.818682 progress 90 % (7 MB)
38 14:50:14.821096 progress 95 % (7 MB)
39 14:50:14.823385 progress 100 % (8 MB)
40 14:50:14.823661 8 MB downloaded in 0.05 s (170.05 MB/s)
41 14:50:14.823848 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:50:14.824131 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:50:14.824251 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:50:14.824374 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:50:14.824609 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.312-cip109-160-gd72fa2f84aefe/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 14:50:14.824711 saving as /var/lib/lava/dispatcher/tmp/14064488/tftp-deploy-8drztobv/kernel/bzImage
48 14:50:14.824811 total size: 17121280 (16 MB)
49 14:50:14.824919 No compression specified
50 14:50:14.826108 progress 0 % (0 MB)
51 14:50:14.830934 progress 5 % (0 MB)
52 14:50:14.836089 progress 10 % (1 MB)
53 14:50:14.840839 progress 15 % (2 MB)
54 14:50:14.845806 progress 20 % (3 MB)
55 14:50:14.850403 progress 25 % (4 MB)
56 14:50:14.855313 progress 30 % (4 MB)
57 14:50:14.860145 progress 35 % (5 MB)
58 14:50:14.865257 progress 40 % (6 MB)
59 14:50:14.870175 progress 45 % (7 MB)
60 14:50:14.874682 progress 50 % (8 MB)
61 14:50:14.879200 progress 55 % (9 MB)
62 14:50:14.883685 progress 60 % (9 MB)
63 14:50:14.888219 progress 65 % (10 MB)
64 14:50:14.892729 progress 70 % (11 MB)
65 14:50:14.897385 progress 75 % (12 MB)
66 14:50:14.902133 progress 80 % (13 MB)
67 14:50:14.907107 progress 85 % (13 MB)
68 14:50:14.911745 progress 90 % (14 MB)
69 14:50:14.916279 progress 95 % (15 MB)
70 14:50:14.920846 progress 100 % (16 MB)
71 14:50:14.921176 16 MB downloaded in 0.10 s (169.45 MB/s)
72 14:50:14.921396 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:50:14.921670 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:50:14.921774 start: 1.3 download-retry (timeout 00:10:00) [common]
76 14:50:14.921877 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 14:50:14.922058 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.312-cip109-160-gd72fa2f84aefe/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 14:50:14.922160 saving as /var/lib/lava/dispatcher/tmp/14064488/tftp-deploy-8drztobv/modules/modules.tar
79 14:50:14.922265 total size: 1253532 (1 MB)
80 14:50:14.922367 Using unxz to decompress xz
81 14:50:14.926905 progress 2 % (0 MB)
82 14:50:14.927525 progress 7 % (0 MB)
83 14:50:14.931267 progress 13 % (0 MB)
84 14:50:14.935531 progress 18 % (0 MB)
85 14:50:14.940689 progress 23 % (0 MB)
86 14:50:14.945454 progress 28 % (0 MB)
87 14:50:14.951002 progress 33 % (0 MB)
88 14:50:14.957336 progress 39 % (0 MB)
89 14:50:14.962853 progress 44 % (0 MB)
90 14:50:14.967512 progress 49 % (0 MB)
91 14:50:14.973778 progress 54 % (0 MB)
92 14:50:14.979175 progress 60 % (0 MB)
93 14:50:14.985427 progress 65 % (0 MB)
94 14:50:14.991041 progress 70 % (0 MB)
95 14:50:14.995780 progress 75 % (0 MB)
96 14:50:15.001536 progress 81 % (0 MB)
97 14:50:15.007917 progress 86 % (1 MB)
98 14:50:15.013305 progress 91 % (1 MB)
99 14:50:15.019314 progress 96 % (1 MB)
100 14:50:15.033411 1 MB downloaded in 0.11 s (10.76 MB/s)
101 14:50:15.033748 end: 1.3.1 http-download (duration 00:00:00) [common]
103 14:50:15.034023 end: 1.3 download-retry (duration 00:00:00) [common]
104 14:50:15.034121 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
105 14:50:15.034239 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
106 14:50:15.034363 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
107 14:50:15.034478 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
108 14:50:15.034720 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k
109 14:50:15.034858 makedir: /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin
110 14:50:15.034966 makedir: /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/tests
111 14:50:15.035065 makedir: /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/results
112 14:50:15.035188 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-add-keys
113 14:50:15.035339 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-add-sources
114 14:50:15.035473 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-background-process-start
115 14:50:15.035603 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-background-process-stop
116 14:50:15.035759 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-common-functions
117 14:50:15.035919 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-echo-ipv4
118 14:50:15.036078 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-install-packages
119 14:50:15.036259 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-installed-packages
120 14:50:15.036429 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-os-build
121 14:50:15.036598 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-probe-channel
122 14:50:15.036758 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-probe-ip
123 14:50:15.036929 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-target-ip
124 14:50:15.037059 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-target-mac
125 14:50:15.037186 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-target-storage
126 14:50:15.037317 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-test-case
127 14:50:15.037449 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-test-event
128 14:50:15.037575 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-test-feedback
129 14:50:15.037702 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-test-raise
130 14:50:15.037826 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-test-reference
131 14:50:15.037960 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-test-runner
132 14:50:15.038087 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-test-set
133 14:50:15.038218 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-test-shell
134 14:50:15.038355 Updating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-install-packages (oe)
135 14:50:15.038561 Updating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/bin/lava-installed-packages (oe)
136 14:50:15.038694 Creating /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/environment
137 14:50:15.038795 LAVA metadata
138 14:50:15.038871 - LAVA_JOB_ID=14064488
139 14:50:15.038940 - LAVA_DISPATCHER_IP=192.168.201.1
140 14:50:15.039051 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
141 14:50:15.039147 skipped lava-vland-overlay
142 14:50:15.039229 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
143 14:50:15.039330 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
144 14:50:15.039427 skipped lava-multinode-overlay
145 14:50:15.039541 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
146 14:50:15.039672 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
147 14:50:15.039806 Loading test definitions
148 14:50:15.039952 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
149 14:50:15.040068 Using /lava-14064488 at stage 0
150 14:50:15.040544 uuid=14064488_1.4.2.3.1 testdef=None
151 14:50:15.040677 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
152 14:50:15.040810 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
153 14:50:15.041614 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
155 14:50:15.041977 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
156 14:50:15.042934 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
158 14:50:15.043324 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
159 14:50:15.044216 runner path: /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/0/tests/0_dmesg test_uuid 14064488_1.4.2.3.1
160 14:50:15.044382 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
162 14:50:15.044724 Creating lava-test-runner.conf files
163 14:50:15.044819 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14064488/lava-overlay-bz2vi95k/lava-14064488/0 for stage 0
164 14:50:15.044946 - 0_dmesg
165 14:50:15.045052 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
166 14:50:15.045147 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
167 14:50:15.055926 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
168 14:50:15.056138 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
169 14:50:15.056283 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
170 14:50:15.056422 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
171 14:50:15.056561 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
172 14:50:15.400446 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
173 14:50:15.401161 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
174 14:50:15.401435 extracting modules file /var/lib/lava/dispatcher/tmp/14064488/tftp-deploy-8drztobv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14064488/extract-overlay-ramdisk-_1vp5cd_/ramdisk
175 14:50:15.478585 end: 1.4.4 extract-modules (duration 00:00:00) [common]
176 14:50:15.478902 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
177 14:50:15.479094 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14064488/compress-overlay-us2l4p93/overlay-1.4.2.4.tar.gz to ramdisk
178 14:50:15.479260 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14064488/compress-overlay-us2l4p93/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14064488/extract-overlay-ramdisk-_1vp5cd_/ramdisk
179 14:50:15.495340 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
180 14:50:15.495651 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
181 14:50:15.495861 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
182 14:50:15.496058 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
183 14:50:15.496237 Building ramdisk /var/lib/lava/dispatcher/tmp/14064488/extract-overlay-ramdisk-_1vp5cd_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14064488/extract-overlay-ramdisk-_1vp5cd_/ramdisk
184 14:50:15.742415 >> 62600 blocks
185 14:50:16.859397 rename /var/lib/lava/dispatcher/tmp/14064488/extract-overlay-ramdisk-_1vp5cd_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14064488/tftp-deploy-8drztobv/ramdisk/ramdisk.cpio.gz
186 14:50:16.859990 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
187 14:50:16.860190 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
188 14:50:16.860363 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
189 14:50:16.860524 No mkimage arch provided, not using FIT.
190 14:50:16.860678 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
191 14:50:16.860827 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
192 14:50:16.861014 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
193 14:50:16.861164 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
194 14:50:16.861300 No LXC device requested
195 14:50:16.861441 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
196 14:50:16.861603 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
197 14:50:16.861745 end: 1.6 deploy-device-env (duration 00:00:00) [common]
198 14:50:16.861874 Checking files for TFTP limit of 4294967296 bytes.
199 14:50:16.862498 end: 1 tftp-deploy (duration 00:00:02) [common]
200 14:50:16.862657 start: 2 depthcharge-action (timeout 00:05:00) [common]
201 14:50:16.862799 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
202 14:50:16.862986 substitutions:
203 14:50:16.863108 - {DTB}: None
204 14:50:16.863222 - {INITRD}: 14064488/tftp-deploy-8drztobv/ramdisk/ramdisk.cpio.gz
205 14:50:16.863338 - {KERNEL}: 14064488/tftp-deploy-8drztobv/kernel/bzImage
206 14:50:16.863463 - {LAVA_MAC}: None
207 14:50:16.863583 - {PRESEED_CONFIG}: None
208 14:50:16.863680 - {PRESEED_LOCAL}: None
209 14:50:16.863783 - {RAMDISK}: 14064488/tftp-deploy-8drztobv/ramdisk/ramdisk.cpio.gz
210 14:50:16.863886 - {ROOT_PART}: None
211 14:50:16.863992 - {ROOT}: None
212 14:50:16.864099 - {SERVER_IP}: 192.168.201.1
213 14:50:16.864201 - {TEE}: None
214 14:50:16.864311 Parsed boot commands:
215 14:50:16.864413 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
216 14:50:16.864688 Parsed boot commands: tftpboot 192.168.201.1 14064488/tftp-deploy-8drztobv/kernel/bzImage 14064488/tftp-deploy-8drztobv/kernel/cmdline 14064488/tftp-deploy-8drztobv/ramdisk/ramdisk.cpio.gz
217 14:50:16.864835 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
218 14:50:16.864982 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
219 14:50:16.865139 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
220 14:50:16.865280 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
221 14:50:16.865401 Not connected, no need to disconnect.
222 14:50:16.865531 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
223 14:50:16.865672 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
224 14:50:16.865799 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-2'
225 14:50:16.870544 Setting prompt string to ['lava-test: # ']
226 14:50:16.871112 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
227 14:50:16.871299 end: 2.2.1 reset-connection (duration 00:00:00) [common]
228 14:50:16.871455 start: 2.2.2 reset-device (timeout 00:05:00) [common]
229 14:50:16.871604 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
230 14:50:16.871903 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'asus-C436FA-Flip-hatch-cbg-2']
231 14:50:25.706049 Returned 0 in 8 seconds
232 14:50:25.806674 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 14:50:25.807117 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 14:50:25.807251 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 14:50:25.807373 Setting prompt string to 'Starting depthcharge on Helios...'
237 14:50:25.807468 Changing prompt to 'Starting depthcharge on Helios...'
238 14:50:25.807567 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 14:50:25.808188 [Enter `^Ec?' for help]
240 14:50:25.808327
241 14:50:25.808449
242 14:50:25.808561 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 14:50:25.808665 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 14:50:25.808758 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 14:50:25.808848 CPU: AES supported, TXT NOT supported, VT supported
246 14:50:25.808957 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 14:50:25.809047 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 14:50:25.809136 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 14:50:25.809223 VBOOT: Loading verstage.
250 14:50:25.809310 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 14:50:25.809397 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 14:50:25.809484 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 14:50:25.809571 CBFS @ c08000 size 3f8000
254 14:50:25.809658 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 14:50:25.809743 CBFS: Locating 'fallback/verstage'
256 14:50:25.809829 CBFS: Found @ offset 10fb80 size 1072c
257 14:50:25.809913
258 14:50:25.809997
259 14:50:25.810084 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 14:50:25.810170 Probing TPM: . done!
261 14:50:25.810255 TPM ready after 0 ms
262 14:50:25.810343 Connected to device vid:did:rid of 1ae0:0028:00
263 14:50:25.810429 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
264 14:50:25.810518 Initialized TPM device CR50 revision 0
265 14:50:25.810603 tlcl_send_startup: Startup return code is 0
266 14:50:25.810688 TPM: setup succeeded
267 14:50:25.810775 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 14:50:25.810860 Chrome EC: UHEPI supported
269 14:50:25.810945 Phase 1
270 14:50:25.811030 FMAP: area GBB found @ c05000 (12288 bytes)
271 14:50:25.811121 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 14:50:25.811187 VB2:vb2_check_recovery() Recovery was requested manually
273 14:50:25.811243 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
274 14:50:25.811299 Recovery requested (1009000e)
275 14:50:25.811378 tlcl_extend: response is 0
276 14:50:25.811439 tlcl_extend: response is 0
277 14:50:25.811512 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
278 14:50:25.811569 CBFS @ c08000 size 3f8000
279 14:50:25.811625 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
280 14:50:25.811680 CBFS: Locating 'fallback/romstage'
281 14:50:25.811754 CBFS: Found @ offset 80 size 145fc
282 14:50:25.811810 Accumulated console time in verstage 102 ms
283 14:50:25.811864
284 14:50:25.811918
285 14:50:25.811972 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
286 14:50:25.812027 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
287 14:50:25.812082 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
288 14:50:25.812136 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
289 14:50:25.812191 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
290 14:50:25.812244 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
291 14:50:25.812298 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
292 14:50:25.812352 TCO_STS: 0000 0000
293 14:50:25.812407 GEN_PMCON: e0015038 00000200
294 14:50:25.812460 GBLRST_CAUSE: 00000000 00000000
295 14:50:25.812514 prev_sleep_state 5
296 14:50:25.812568 Boot Count incremented to 4053
297 14:50:25.812622 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
298 14:50:25.812677 CBFS @ c08000 size 3f8000
299 14:50:25.812731 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
300 14:50:25.812785 CBFS: Locating 'fspm.bin'
301 14:50:25.812839 CBFS: Found @ offset 5ffc0 size 71000
302 14:50:25.812905 Chrome EC: UHEPI supported
303 14:50:25.812961 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
304 14:50:25.813015 Probing TPM: done!
305 14:50:25.813069 Connected to device vid:did:rid of 1ae0:0028:00
306 14:50:25.813124 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
307 14:50:25.813179 Initialized TPM device CR50 revision 0
308 14:50:25.813233 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
309 14:50:25.813288 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
310 14:50:25.813343 MRC cache found, size 1948
311 14:50:25.813397 bootmode is set to: 2
312 14:50:25.813452 PRMRR disabled by config.
313 14:50:25.813506 SPD INDEX = 1
314 14:50:25.813560 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
315 14:50:25.813615 CBFS @ c08000 size 3f8000
316 14:50:25.813669 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
317 14:50:25.813722 CBFS: Locating 'spd.bin'
318 14:50:25.813777 CBFS: Found @ offset 5fb80 size 400
319 14:50:25.813830 SPD: module type is LPDDR3
320 14:50:25.813883 SPD: module part is
321 14:50:25.813937 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
322 14:50:25.813992 SPD: device width 4 bits, bus width 8 bits
323 14:50:25.814045 SPD: module size is 4096 MB (per channel)
324 14:50:25.814100 memory slot: 0 configuration done.
325 14:50:25.814153 memory slot: 2 configuration done.
326 14:50:25.814207 CBMEM:
327 14:50:25.814260 IMD: root @ 99fff000 254 entries.
328 14:50:25.814315 IMD: root @ 99ffec00 62 entries.
329 14:50:25.814368 External stage cache:
330 14:50:25.814422 IMD: root @ 9abff000 254 entries.
331 14:50:25.814495 IMD: root @ 9abfec00 62 entries.
332 14:50:25.814552 Chrome EC: clear events_b mask to 0x0000000020004000
333 14:50:25.814626 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
334 14:50:25.814683 tlcl_write: response is 0
335 14:50:25.814738 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
336 14:50:25.814805 MRC: TPM MRC hash updated successfully.
337 14:50:25.814870 2 DIMMs found
338 14:50:25.814926 SMM Memory Map
339 14:50:25.814981 SMRAM : 0x9a000000 0x1000000
340 14:50:25.815233 Subregion 0: 0x9a000000 0xa00000
341 14:50:25.815294 Subregion 1: 0x9aa00000 0x200000
342 14:50:25.815349 Subregion 2: 0x9ac00000 0x400000
343 14:50:25.815404 top_of_ram = 0x9a000000
344 14:50:25.815459 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
345 14:50:25.815514 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
346 14:50:25.815569 MTRR Range: Start=ff000000 End=0 (Size 1000000)
347 14:50:25.815623 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
348 14:50:25.815678 CBFS @ c08000 size 3f8000
349 14:50:25.815732 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
350 14:50:25.815787 CBFS: Locating 'fallback/postcar'
351 14:50:25.815840 CBFS: Found @ offset 107000 size 4b44
352 14:50:25.815894 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
353 14:50:25.815949 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
354 14:50:25.816004 Processing 180 relocs. Offset value of 0x97c0c000
355 14:50:25.816057 Accumulated console time in romstage 286 ms
356 14:50:25.816111
357 14:50:25.816163
358 14:50:25.816217 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
359 14:50:25.816272 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
360 14:50:25.816326 CBFS @ c08000 size 3f8000
361 14:50:25.816380 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
362 14:50:25.816434 CBFS: Locating 'fallback/ramstage'
363 14:50:25.816487 CBFS: Found @ offset 43380 size 1b9e8
364 14:50:25.816541 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
365 14:50:25.816595 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
366 14:50:25.816649 Processing 3976 relocs. Offset value of 0x98db0000
367 14:50:25.816703 Accumulated console time in postcar 52 ms
368 14:50:25.816757
369 14:50:25.816810
370 14:50:25.816864 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
371 14:50:25.816934 FMAP: area RO_VPD found @ c00000 (16384 bytes)
372 14:50:25.816989 WARNING: RO_VPD is uninitialized or empty.
373 14:50:25.817043 FMAP: area RW_VPD found @ af8000 (8192 bytes)
374 14:50:25.817097 FMAP: area RW_VPD found @ af8000 (8192 bytes)
375 14:50:25.817152 Normal boot.
376 14:50:25.817209 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
377 14:50:25.817263 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 14:50:25.817318 CBFS @ c08000 size 3f8000
379 14:50:25.817373 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 14:50:25.817427 CBFS: Locating 'cpu_microcode_blob.bin'
381 14:50:25.817480 CBFS: Found @ offset 14700 size 2ec00
382 14:50:25.817534 microcode: sig=0x806ec pf=0x4 revision=0xc9
383 14:50:25.817587 Skip microcode update
384 14:50:25.817641 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
385 14:50:25.817695 CBFS @ c08000 size 3f8000
386 14:50:25.817750 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
387 14:50:25.817804 CBFS: Locating 'fsps.bin'
388 14:50:25.817858 CBFS: Found @ offset d1fc0 size 35000
389 14:50:25.817912 Detected 4 core, 8 thread CPU.
390 14:50:25.817975 Setting up SMI for CPU
391 14:50:25.818034 IED base = 0x9ac00000
392 14:50:25.818088 IED size = 0x00400000
393 14:50:25.818155 Will perform SMM setup.
394 14:50:25.818222 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
395 14:50:25.818277 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
396 14:50:25.818332 Processing 16 relocs. Offset value of 0x00030000
397 14:50:25.818386 Attempting to start 7 APs
398 14:50:25.818468 Waiting for 10ms after sending INIT.
399 14:50:25.818526 Waiting for 1st SIPI to complete...done.
400 14:50:25.818581 AP: slot 3 apic_id 6.
401 14:50:25.818636 AP: slot 2 apic_id 7.
402 14:50:25.818690 AP: slot 5 apic_id 3.
403 14:50:25.818744 AP: slot 4 apic_id 2.
404 14:50:25.818798 AP: slot 6 apic_id 5.
405 14:50:25.818852 Waiting for 2nd SIPI to complete...done.
406 14:50:25.818905 AP: slot 1 apic_id 1.
407 14:50:25.818958 AP: slot 7 apic_id 4.
408 14:50:25.819012 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
409 14:50:25.819067 Processing 13 relocs. Offset value of 0x00038000
410 14:50:25.819121 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
411 14:50:25.819175 Installing SMM handler to 0x9a000000
412 14:50:25.819229 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
413 14:50:25.819284 Processing 658 relocs. Offset value of 0x9a010000
414 14:50:25.819337 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
415 14:50:25.819391 Processing 13 relocs. Offset value of 0x9a008000
416 14:50:25.819445 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
417 14:50:25.819499 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
418 14:50:25.819554 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
419 14:50:25.819608 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
420 14:50:25.819662 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
421 14:50:25.819715 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
422 14:50:25.819770 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
423 14:50:25.819824 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
424 14:50:25.819878 Clearing SMI status registers
425 14:50:25.819932 SMI_STS: PM1
426 14:50:25.819985 PM1_STS: PWRBTN
427 14:50:25.820038 TCO_STS: SECOND_TO
428 14:50:25.820093 New SMBASE 0x9a000000
429 14:50:25.820147 In relocation handler: CPU 0
430 14:50:25.820201 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
431 14:50:25.820256 Writing SMRR. base = 0x9a000006, mask=0xff000800
432 14:50:25.820310 Relocation complete.
433 14:50:25.820363 New SMBASE 0x99fffc00
434 14:50:25.820417 In relocation handler: CPU 1
435 14:50:25.820668 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
436 14:50:25.820733 Writing SMRR. base = 0x9a000006, mask=0xff000800
437 14:50:25.820789 Relocation complete.
438 14:50:25.820844 New SMBASE 0x99ffec00
439 14:50:25.820913 In relocation handler: CPU 5
440 14:50:25.820984 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
441 14:50:25.821043 Writing SMRR. base = 0x9a000006, mask=0xff000800
442 14:50:25.821098 Relocation complete.
443 14:50:25.821153 New SMBASE 0x99fff000
444 14:50:25.821208 In relocation handler: CPU 4
445 14:50:25.821262 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
446 14:50:25.821316 Writing SMRR. base = 0x9a000006, mask=0xff000800
447 14:50:25.821370 Relocation complete.
448 14:50:25.821425 New SMBASE 0x99fff800
449 14:50:25.821480 In relocation handler: CPU 2
450 14:50:25.821533 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
451 14:50:25.821588 Writing SMRR. base = 0x9a000006, mask=0xff000800
452 14:50:25.821641 Relocation complete.
453 14:50:25.821695 New SMBASE 0x99fff400
454 14:50:25.821749 In relocation handler: CPU 3
455 14:50:25.821803 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
456 14:50:25.821857 Writing SMRR. base = 0x9a000006, mask=0xff000800
457 14:50:25.821912 Relocation complete.
458 14:50:25.821966 New SMBASE 0x99ffe800
459 14:50:25.822020 In relocation handler: CPU 6
460 14:50:25.822073 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
461 14:50:25.822127 Writing SMRR. base = 0x9a000006, mask=0xff000800
462 14:50:25.822181 Relocation complete.
463 14:50:25.822234 New SMBASE 0x99ffe400
464 14:50:25.822288 In relocation handler: CPU 7
465 14:50:25.822342 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
466 14:50:25.822396 Writing SMRR. base = 0x9a000006, mask=0xff000800
467 14:50:25.822449 Relocation complete.
468 14:50:25.822503 Initializing CPU #0
469 14:50:25.822556 CPU: vendor Intel device 806ec
470 14:50:25.822610 CPU: family 06, model 8e, stepping 0c
471 14:50:25.822664 Clearing out pending MCEs
472 14:50:25.822718 Setting up local APIC...
473 14:50:25.822771 apic_id: 0x00 done.
474 14:50:25.822825 Turbo is available but hidden
475 14:50:25.822879 Turbo is available and visible
476 14:50:25.822933 VMX status: enabled
477 14:50:25.822986 IA32_FEATURE_CONTROL status: locked
478 14:50:25.823040 Skip microcode update
479 14:50:25.823094 CPU #0 initialized
480 14:50:25.823147 Initializing CPU #1
481 14:50:25.823201 Initializing CPU #7
482 14:50:25.823254 Initializing CPU #6
483 14:50:25.823308 CPU: vendor Intel device 806ec
484 14:50:25.823361 CPU: family 06, model 8e, stepping 0c
485 14:50:25.823416 CPU: vendor Intel device 806ec
486 14:50:25.823469 CPU: family 06, model 8e, stepping 0c
487 14:50:25.823524 Clearing out pending MCEs
488 14:50:25.823578 Clearing out pending MCEs
489 14:50:25.823632 CPU: vendor Intel device 806ec
490 14:50:25.823686 CPU: family 06, model 8e, stepping 0c
491 14:50:25.823740 Clearing out pending MCEs
492 14:50:25.823793 Setting up local APIC...
493 14:50:25.823847 Initializing CPU #4
494 14:50:25.823901 Initializing CPU #5
495 14:50:25.823954 CPU: vendor Intel device 806ec
496 14:50:25.824007 CPU: family 06, model 8e, stepping 0c
497 14:50:25.824060 CPU: vendor Intel device 806ec
498 14:50:25.824114 CPU: family 06, model 8e, stepping 0c
499 14:50:25.824168 Clearing out pending MCEs
500 14:50:25.824221 Clearing out pending MCEs
501 14:50:25.824275 Setting up local APIC...
502 14:50:25.824329 Setting up local APIC...
503 14:50:25.824382 Setting up local APIC...
504 14:50:25.824437 apic_id: 0x05 done.
505 14:50:25.824534 Setting up local APIC...
506 14:50:25.824619 apic_id: 0x01 done.
507 14:50:25.824706 Initializing CPU #2
508 14:50:25.824801 Initializing CPU #3
509 14:50:25.824905 CPU: vendor Intel device 806ec
510 14:50:25.824965 CPU: family 06, model 8e, stepping 0c
511 14:50:25.825021 CPU: vendor Intel device 806ec
512 14:50:25.825075 CPU: family 06, model 8e, stepping 0c
513 14:50:25.825130 Clearing out pending MCEs
514 14:50:25.825185 Clearing out pending MCEs
515 14:50:25.825239 apic_id: 0x02 done.
516 14:50:25.825293 apic_id: 0x03 done.
517 14:50:25.825347 VMX status: enabled
518 14:50:25.825401 VMX status: enabled
519 14:50:25.825455 IA32_FEATURE_CONTROL status: locked
520 14:50:25.825509 IA32_FEATURE_CONTROL status: locked
521 14:50:25.825564 Skip microcode update
522 14:50:25.825618 Skip microcode update
523 14:50:25.825671 CPU #4 initialized
524 14:50:25.825724 CPU #5 initialized
525 14:50:25.825791 apic_id: 0x04 done.
526 14:50:25.825847 VMX status: enabled
527 14:50:25.825902 VMX status: enabled
528 14:50:25.825956 IA32_FEATURE_CONTROL status: locked
529 14:50:25.826010 IA32_FEATURE_CONTROL status: locked
530 14:50:25.826065 Skip microcode update
531 14:50:25.826119 Setting up local APIC...
532 14:50:25.826173 Skip microcode update
533 14:50:25.826227 CPU #6 initialized
534 14:50:25.826281 CPU #7 initialized
535 14:50:25.826335 VMX status: enabled
536 14:50:25.826388 Setting up local APIC...
537 14:50:25.826442 IA32_FEATURE_CONTROL status: locked
538 14:50:25.826496 apic_id: 0x06 done.
539 14:50:25.826550 apic_id: 0x07 done.
540 14:50:25.826604 VMX status: enabled
541 14:50:25.826658 VMX status: enabled
542 14:50:25.826712 IA32_FEATURE_CONTROL status: locked
543 14:50:25.826765 IA32_FEATURE_CONTROL status: locked
544 14:50:25.826819 Skip microcode update
545 14:50:25.826904 Skip microcode update
546 14:50:25.826975 CPU #3 initialized
547 14:50:25.827031 CPU #2 initialized
548 14:50:25.827086 Skip microcode update
549 14:50:25.827140 CPU #1 initialized
550 14:50:25.827195 bsp_do_flight_plan done after 457 msecs.
551 14:50:25.827250 CPU: frequency set to 4200 MHz
552 14:50:25.827305 Enabling SMIs.
553 14:50:25.827359 Locking SMM.
554 14:50:25.827414 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
555 14:50:25.827470 CBFS @ c08000 size 3f8000
556 14:50:25.827525 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
557 14:50:25.827579 CBFS: Locating 'vbt.bin'
558 14:50:25.827634 CBFS: Found @ offset 5f5c0 size 499
559 14:50:25.827689 Found a VBT of 4608 bytes after decompression
560 14:50:25.827743 Display FSP Version Info HOB
561 14:50:25.827797 Reference Code - CPU = 9.0.1e.30
562 14:50:25.827852 uCode Version = 0.0.0.ca
563 14:50:25.827906 TXT ACM version = ff.ff.ff.ffff
564 14:50:25.827969 Display FSP Version Info HOB
565 14:50:25.828033 Reference Code - ME = 9.0.1e.30
566 14:50:25.828088 MEBx version = 0.0.0.0
567 14:50:25.828143 ME Firmware Version = Consumer SKU
568 14:50:25.828223 Display FSP Version Info HOB
569 14:50:25.828280 Reference Code - CML PCH = 9.0.1e.30
570 14:50:25.828336 PCH-CRID Status = Disabled
571 14:50:25.828390 PCH-CRID Original Value = ff.ff.ff.ffff
572 14:50:25.828445 PCH-CRID New Value = ff.ff.ff.ffff
573 14:50:25.828713 OPROM - RST - RAID = ff.ff.ff.ffff
574 14:50:25.828776 ChipsetInit Base Version = ff.ff.ff.ffff
575 14:50:25.828833 ChipsetInit Oem Version = ff.ff.ff.ffff
576 14:50:25.828904 Display FSP Version Info HOB
577 14:50:25.828961 Reference Code - SA - System Agent = 9.0.1e.30
578 14:50:25.829017 Reference Code - MRC = 0.7.1.6c
579 14:50:25.829072 SA - PCIe Version = 9.0.1e.30
580 14:50:25.829127 SA-CRID Status = Disabled
581 14:50:25.829181 SA-CRID Original Value = 0.0.0.c
582 14:50:25.829235 SA-CRID New Value = 0.0.0.c
583 14:50:25.829289 OPROM - VBIOS = ff.ff.ff.ffff
584 14:50:25.829344 RTC Init
585 14:50:25.829398 Set power on after power failure.
586 14:50:25.829452 Disabling Deep S3
587 14:50:25.829505 Disabling Deep S3
588 14:50:25.829559 Disabling Deep S4
589 14:50:25.829612 Disabling Deep S4
590 14:50:25.829665 Disabling Deep S5
591 14:50:25.829719 Disabling Deep S5
592 14:50:25.829796 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
593 14:50:25.829854 Enumerating buses...
594 14:50:25.829909 Show all devs... Before device enumeration.
595 14:50:25.829963 Root Device: enabled 1
596 14:50:25.830017 CPU_CLUSTER: 0: enabled 1
597 14:50:25.830070 DOMAIN: 0000: enabled 1
598 14:50:25.830124 APIC: 00: enabled 1
599 14:50:25.830178 PCI: 00:00.0: enabled 1
600 14:50:25.830263 PCI: 00:02.0: enabled 1
601 14:50:25.830334 PCI: 00:04.0: enabled 0
602 14:50:25.830389 PCI: 00:05.0: enabled 0
603 14:50:25.830444 PCI: 00:12.0: enabled 1
604 14:50:25.830497 PCI: 00:12.5: enabled 0
605 14:50:25.830552 PCI: 00:12.6: enabled 0
606 14:50:25.830607 PCI: 00:14.0: enabled 1
607 14:50:25.830660 PCI: 00:14.1: enabled 0
608 14:50:25.830714 PCI: 00:14.3: enabled 1
609 14:50:25.830767 PCI: 00:14.5: enabled 0
610 14:50:25.830821 PCI: 00:15.0: enabled 1
611 14:50:25.830874 PCI: 00:15.1: enabled 1
612 14:50:25.830927 PCI: 00:15.2: enabled 0
613 14:50:25.830981 PCI: 00:15.3: enabled 0
614 14:50:25.831034 PCI: 00:16.0: enabled 1
615 14:50:25.831087 PCI: 00:16.1: enabled 0
616 14:50:25.831141 PCI: 00:16.2: enabled 0
617 14:50:25.831195 PCI: 00:16.3: enabled 0
618 14:50:25.831256 PCI: 00:16.4: enabled 0
619 14:50:25.831321 PCI: 00:16.5: enabled 0
620 14:50:25.831375 PCI: 00:17.0: enabled 1
621 14:50:25.831429 PCI: 00:19.0: enabled 1
622 14:50:25.831488 PCI: 00:19.1: enabled 0
623 14:50:25.831562 PCI: 00:19.2: enabled 0
624 14:50:25.831619 PCI: 00:1a.0: enabled 0
625 14:50:25.831673 PCI: 00:1c.0: enabled 0
626 14:50:25.831727 PCI: 00:1c.1: enabled 0
627 14:50:25.831780 PCI: 00:1c.2: enabled 0
628 14:50:25.831865 PCI: 00:1c.3: enabled 0
629 14:50:25.831948 PCI: 00:1c.4: enabled 0
630 14:50:25.832004 PCI: 00:1c.5: enabled 0
631 14:50:25.832059 PCI: 00:1c.6: enabled 0
632 14:50:25.832114 PCI: 00:1c.7: enabled 0
633 14:50:25.832168 PCI: 00:1d.0: enabled 1
634 14:50:25.832222 PCI: 00:1d.1: enabled 0
635 14:50:25.832277 PCI: 00:1d.2: enabled 0
636 14:50:25.832331 PCI: 00:1d.3: enabled 0
637 14:50:25.832385 PCI: 00:1d.4: enabled 0
638 14:50:25.832439 PCI: 00:1d.5: enabled 1
639 14:50:25.832493 PCI: 00:1e.0: enabled 1
640 14:50:25.832546 PCI: 00:1e.1: enabled 0
641 14:50:25.832601 PCI: 00:1e.2: enabled 1
642 14:50:25.832655 PCI: 00:1e.3: enabled 1
643 14:50:25.832709 PCI: 00:1f.0: enabled 1
644 14:50:25.832762 PCI: 00:1f.1: enabled 1
645 14:50:25.832816 PCI: 00:1f.2: enabled 1
646 14:50:25.832878 PCI: 00:1f.3: enabled 1
647 14:50:25.832935 PCI: 00:1f.4: enabled 1
648 14:50:25.832989 PCI: 00:1f.5: enabled 1
649 14:50:25.833042 PCI: 00:1f.6: enabled 0
650 14:50:25.833096 USB0 port 0: enabled 1
651 14:50:25.833149 I2C: 00:15: enabled 1
652 14:50:25.833204 I2C: 00:5d: enabled 1
653 14:50:25.833257 GENERIC: 0.0: enabled 1
654 14:50:25.833311 I2C: 00:1a: enabled 1
655 14:50:25.833365 I2C: 00:38: enabled 1
656 14:50:25.833419 I2C: 00:39: enabled 1
657 14:50:25.833472 I2C: 00:3a: enabled 1
658 14:50:25.833526 I2C: 00:3b: enabled 1
659 14:50:25.833582 PCI: 00:00.0: enabled 1
660 14:50:25.833673 SPI: 00: enabled 1
661 14:50:25.833732 SPI: 01: enabled 1
662 14:50:25.833787 PNP: 0c09.0: enabled 1
663 14:50:25.833843 USB2 port 0: enabled 1
664 14:50:25.833897 USB2 port 1: enabled 1
665 14:50:25.833951 USB2 port 2: enabled 0
666 14:50:25.834004 USB2 port 3: enabled 0
667 14:50:25.834058 USB2 port 5: enabled 0
668 14:50:25.834112 USB2 port 6: enabled 1
669 14:50:25.834166 USB2 port 9: enabled 1
670 14:50:25.834220 USB3 port 0: enabled 1
671 14:50:25.834273 USB3 port 1: enabled 1
672 14:50:25.834327 USB3 port 2: enabled 1
673 14:50:25.834381 USB3 port 3: enabled 1
674 14:50:25.834435 USB3 port 4: enabled 0
675 14:50:25.834488 APIC: 01: enabled 1
676 14:50:25.834543 APIC: 07: enabled 1
677 14:50:25.834641 APIC: 06: enabled 1
678 14:50:25.834728 APIC: 02: enabled 1
679 14:50:25.834813 APIC: 03: enabled 1
680 14:50:25.834900 APIC: 05: enabled 1
681 14:50:25.834980 APIC: 04: enabled 1
682 14:50:25.835040 Compare with tree...
683 14:50:25.835095 Root Device: enabled 1
684 14:50:25.835150 CPU_CLUSTER: 0: enabled 1
685 14:50:25.835204 APIC: 00: enabled 1
686 14:50:25.835259 APIC: 01: enabled 1
687 14:50:25.835314 APIC: 07: enabled 1
688 14:50:25.835369 APIC: 06: enabled 1
689 14:50:25.835423 APIC: 02: enabled 1
690 14:50:25.835478 APIC: 03: enabled 1
691 14:50:25.835532 APIC: 05: enabled 1
692 14:50:25.835585 APIC: 04: enabled 1
693 14:50:25.835640 DOMAIN: 0000: enabled 1
694 14:50:25.835695 PCI: 00:00.0: enabled 1
695 14:50:25.835749 PCI: 00:02.0: enabled 1
696 14:50:25.835807 PCI: 00:04.0: enabled 0
697 14:50:25.835862 PCI: 00:05.0: enabled 0
698 14:50:25.835916 PCI: 00:12.0: enabled 1
699 14:50:25.835969 PCI: 00:12.5: enabled 0
700 14:50:25.836022 PCI: 00:12.6: enabled 0
701 14:50:25.836076 PCI: 00:14.0: enabled 1
702 14:50:25.836130 USB0 port 0: enabled 1
703 14:50:25.836183 USB2 port 0: enabled 1
704 14:50:25.836237 USB2 port 1: enabled 1
705 14:50:25.836290 USB2 port 2: enabled 0
706 14:50:25.836344 USB2 port 3: enabled 0
707 14:50:25.836398 USB2 port 5: enabled 0
708 14:50:25.836452 USB2 port 6: enabled 1
709 14:50:25.836505 USB2 port 9: enabled 1
710 14:50:25.836559 USB3 port 0: enabled 1
711 14:50:25.836612 USB3 port 1: enabled 1
712 14:50:25.836666 USB3 port 2: enabled 1
713 14:50:25.836719 USB3 port 3: enabled 1
714 14:50:25.836773 USB3 port 4: enabled 0
715 14:50:25.836827 PCI: 00:14.1: enabled 0
716 14:50:25.836933 PCI: 00:14.3: enabled 1
717 14:50:25.837049 PCI: 00:14.5: enabled 0
718 14:50:25.837140 PCI: 00:15.0: enabled 1
719 14:50:25.837217 I2C: 00:15: enabled 1
720 14:50:25.837280 PCI: 00:15.1: enabled 1
721 14:50:25.837340 I2C: 00:5d: enabled 1
722 14:50:25.837400 GENERIC: 0.0: enabled 1
723 14:50:25.837458 PCI: 00:15.2: enabled 0
724 14:50:25.837514 PCI: 00:15.3: enabled 0
725 14:50:25.837570 PCI: 00:16.0: enabled 1
726 14:50:25.837625 PCI: 00:16.1: enabled 0
727 14:50:25.837684 PCI: 00:16.2: enabled 0
728 14:50:25.837762 PCI: 00:16.3: enabled 0
729 14:50:25.837843 PCI: 00:16.4: enabled 0
730 14:50:25.837920 PCI: 00:16.5: enabled 0
731 14:50:25.837995 PCI: 00:17.0: enabled 1
732 14:50:25.838305 PCI: 00:19.0: enabled 1
733 14:50:25.838405 I2C: 00:1a: enabled 1
734 14:50:25.838505 I2C: 00:38: enabled 1
735 14:50:25.838603 I2C: 00:39: enabled 1
736 14:50:25.838701 I2C: 00:3a: enabled 1
737 14:50:25.838798 I2C: 00:3b: enabled 1
738 14:50:25.838894 PCI: 00:19.1: enabled 0
739 14:50:25.838990 PCI: 00:19.2: enabled 0
740 14:50:25.839086 PCI: 00:1a.0: enabled 0
741 14:50:25.839181 PCI: 00:1c.0: enabled 0
742 14:50:25.839276 PCI: 00:1c.1: enabled 0
743 14:50:25.839371 PCI: 00:1c.2: enabled 0
744 14:50:25.839466 PCI: 00:1c.3: enabled 0
745 14:50:25.839561 PCI: 00:1c.4: enabled 0
746 14:50:25.839656 PCI: 00:1c.5: enabled 0
747 14:50:25.839751 PCI: 00:1c.6: enabled 0
748 14:50:25.839845 PCI: 00:1c.7: enabled 0
749 14:50:25.839940 PCI: 00:1d.0: enabled 1
750 14:50:25.840035 PCI: 00:1d.1: enabled 0
751 14:50:25.840129 PCI: 00:1d.2: enabled 0
752 14:50:25.840223 PCI: 00:1d.3: enabled 0
753 14:50:25.840318 PCI: 00:1d.4: enabled 0
754 14:50:25.840411 PCI: 00:1d.5: enabled 1
755 14:50:25.840513 PCI: 00:00.0: enabled 1
756 14:50:25.840612 PCI: 00:1e.0: enabled 1
757 14:50:25.840710 PCI: 00:1e.1: enabled 0
758 14:50:25.840806 PCI: 00:1e.2: enabled 1
759 14:50:25.840917 SPI: 00: enabled 1
760 14:50:25.841014 PCI: 00:1e.3: enabled 1
761 14:50:25.841109 SPI: 01: enabled 1
762 14:50:25.841204 PCI: 00:1f.0: enabled 1
763 14:50:25.841299 PNP: 0c09.0: enabled 1
764 14:50:25.841393 PCI: 00:1f.1: enabled 1
765 14:50:25.841496 PCI: 00:1f.2: enabled 1
766 14:50:25.841594 PCI: 00:1f.3: enabled 1
767 14:50:25.841689 PCI: 00:1f.4: enabled 1
768 14:50:25.841784 PCI: 00:1f.5: enabled 1
769 14:50:25.841879 PCI: 00:1f.6: enabled 0
770 14:50:25.841973 Root Device scanning...
771 14:50:25.842068 scan_static_bus for Root Device
772 14:50:25.842163 CPU_CLUSTER: 0 enabled
773 14:50:25.842257 DOMAIN: 0000 enabled
774 14:50:25.842352 DOMAIN: 0000 scanning...
775 14:50:25.842446 PCI: pci_scan_bus for bus 00
776 14:50:25.842541 PCI: 00:00.0 [8086/0000] ops
777 14:50:25.842635 PCI: 00:00.0 [8086/9b61] enabled
778 14:50:25.842730 PCI: 00:02.0 [8086/0000] bus ops
779 14:50:25.842825 PCI: 00:02.0 [8086/9b41] enabled
780 14:50:25.842920 PCI: 00:04.0 [8086/1903] disabled
781 14:50:25.843015 PCI: 00:08.0 [8086/1911] enabled
782 14:50:25.843109 PCI: 00:12.0 [8086/02f9] enabled
783 14:50:25.843203 PCI: 00:14.0 [8086/0000] bus ops
784 14:50:25.843300 PCI: 00:14.0 [8086/02ed] enabled
785 14:50:25.843394 PCI: 00:14.2 [8086/02ef] enabled
786 14:50:25.843488 PCI: 00:14.3 [8086/02f0] enabled
787 14:50:25.843581 PCI: 00:15.0 [8086/0000] bus ops
788 14:50:25.843675 PCI: 00:15.0 [8086/02e8] enabled
789 14:50:25.843769 PCI: 00:15.1 [8086/0000] bus ops
790 14:50:25.843863 PCI: 00:15.1 [8086/02e9] enabled
791 14:50:25.843957 PCI: 00:16.0 [8086/0000] ops
792 14:50:25.844051 PCI: 00:16.0 [8086/02e0] enabled
793 14:50:25.844145 PCI: 00:17.0 [8086/0000] ops
794 14:50:25.844240 PCI: 00:17.0 [8086/02d3] enabled
795 14:50:25.844334 PCI: 00:19.0 [8086/0000] bus ops
796 14:50:25.844428 PCI: 00:19.0 [8086/02c5] enabled
797 14:50:25.844522 PCI: 00:1d.0 [8086/0000] bus ops
798 14:50:25.844617 PCI: 00:1d.0 [8086/02b0] enabled
799 14:50:25.844711 PCI: Static device PCI: 00:1d.5 not found, disabling it.
800 14:50:25.844809 PCI: 00:1e.0 [8086/0000] ops
801 14:50:25.844914 PCI: 00:1e.0 [8086/02a8] enabled
802 14:50:25.845002 PCI: 00:1e.2 [8086/0000] bus ops
803 14:50:25.845088 PCI: 00:1e.2 [8086/02aa] enabled
804 14:50:25.845174 PCI: 00:1e.3 [8086/0000] bus ops
805 14:50:25.845260 PCI: 00:1e.3 [8086/02ab] enabled
806 14:50:25.845345 PCI: 00:1f.0 [8086/0000] bus ops
807 14:50:25.845431 PCI: 00:1f.0 [8086/0284] enabled
808 14:50:25.845517 PCI: Static device PCI: 00:1f.1 not found, disabling it.
809 14:50:25.845603 PCI: Static device PCI: 00:1f.2 not found, disabling it.
810 14:50:25.845689 PCI: 00:1f.3 [8086/0000] bus ops
811 14:50:25.845774 PCI: 00:1f.3 [8086/02c8] enabled
812 14:50:25.845859 PCI: 00:1f.4 [8086/0000] bus ops
813 14:50:25.845944 PCI: 00:1f.4 [8086/02a3] enabled
814 14:50:25.846034 PCI: 00:1f.5 [8086/0000] bus ops
815 14:50:25.846121 PCI: 00:1f.5 [8086/02a4] enabled
816 14:50:25.846206 PCI: Leftover static devices:
817 14:50:25.846291 PCI: 00:05.0
818 14:50:25.846376 PCI: 00:12.5
819 14:50:25.846461 PCI: 00:12.6
820 14:50:25.846545 PCI: 00:14.1
821 14:50:25.846629 PCI: 00:14.5
822 14:50:25.846713 PCI: 00:15.2
823 14:50:25.846798 PCI: 00:15.3
824 14:50:25.846882 PCI: 00:16.1
825 14:50:25.846966 PCI: 00:16.2
826 14:50:25.847050 PCI: 00:16.3
827 14:50:25.847134 PCI: 00:16.4
828 14:50:25.847219 PCI: 00:16.5
829 14:50:25.847303 PCI: 00:19.1
830 14:50:25.847387 PCI: 00:19.2
831 14:50:25.847471 PCI: 00:1a.0
832 14:50:25.847555 PCI: 00:1c.0
833 14:50:25.847640 PCI: 00:1c.1
834 14:50:25.847724 PCI: 00:1c.2
835 14:50:25.847808 PCI: 00:1c.3
836 14:50:25.847892 PCI: 00:1c.4
837 14:50:25.847976 PCI: 00:1c.5
838 14:50:25.848069 PCI: 00:1c.6
839 14:50:25.848156 PCI: 00:1c.7
840 14:50:25.848241 PCI: 00:1d.1
841 14:50:25.848325 PCI: 00:1d.2
842 14:50:25.848411 PCI: 00:1d.3
843 14:50:25.848469 PCI: 00:1d.4
844 14:50:25.848523 PCI: 00:1d.5
845 14:50:25.848578 PCI: 00:1e.1
846 14:50:25.848632 PCI: 00:1f.1
847 14:50:25.848686 PCI: 00:1f.2
848 14:50:25.848741 PCI: 00:1f.6
849 14:50:25.848795 PCI: Check your devicetree.cb.
850 14:50:25.848850 PCI: 00:02.0 scanning...
851 14:50:25.848918 scan_generic_bus for PCI: 00:02.0
852 14:50:25.848974 scan_generic_bus for PCI: 00:02.0 done
853 14:50:25.849028 scan_bus: scanning of bus PCI: 00:02.0 took 10192 usecs
854 14:50:25.849094 PCI: 00:14.0 scanning...
855 14:50:25.849181 scan_static_bus for PCI: 00:14.0
856 14:50:25.849239 USB0 port 0 enabled
857 14:50:25.849294 USB0 port 0 scanning...
858 14:50:25.849355 scan_static_bus for USB0 port 0
859 14:50:25.849427 USB2 port 0 enabled
860 14:50:25.849483 USB2 port 1 enabled
861 14:50:25.849539 USB2 port 2 disabled
862 14:50:25.849594 USB2 port 3 disabled
863 14:50:25.849664 USB2 port 5 disabled
864 14:50:25.849721 USB2 port 6 enabled
865 14:50:25.849775 USB2 port 9 enabled
866 14:50:25.849830 USB3 port 0 enabled
867 14:50:25.849884 USB3 port 1 enabled
868 14:50:25.849938 USB3 port 2 enabled
869 14:50:25.849992 USB3 port 3 enabled
870 14:50:25.850046 USB3 port 4 disabled
871 14:50:25.850100 USB2 port 0 scanning...
872 14:50:25.850154 scan_static_bus for USB2 port 0
873 14:50:25.850209 scan_static_bus for USB2 port 0 done
874 14:50:25.850264 scan_bus: scanning of bus USB2 port 0 took 9694 usecs
875 14:50:25.850319 USB2 port 1 scanning...
876 14:50:25.850378 scan_static_bus for USB2 port 1
877 14:50:25.850459 scan_static_bus for USB2 port 1 done
878 14:50:25.850537 scan_bus: scanning of bus USB2 port 1 took 9696 usecs
879 14:50:25.850614 USB2 port 6 scanning...
880 14:50:25.850690 scan_static_bus for USB2 port 6
881 14:50:25.850766 scan_static_bus for USB2 port 6 done
882 14:50:25.851058 scan_bus: scanning of bus USB2 port 6 took 9687 usecs
883 14:50:25.851155 USB2 port 9 scanning...
884 14:50:25.851253 scan_static_bus for USB2 port 9
885 14:50:25.851353 scan_static_bus for USB2 port 9 done
886 14:50:25.851448 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
887 14:50:25.851535 USB3 port 0 scanning...
888 14:50:25.851622 scan_static_bus for USB3 port 0
889 14:50:25.851708 scan_static_bus for USB3 port 0 done
890 14:50:25.851795 scan_bus: scanning of bus USB3 port 0 took 9703 usecs
891 14:50:25.851890 USB3 port 1 scanning...
892 14:50:25.851985 scan_static_bus for USB3 port 1
893 14:50:25.852081 scan_static_bus for USB3 port 1 done
894 14:50:25.852175 scan_bus: scanning of bus USB3 port 1 took 9696 usecs
895 14:50:25.852270 USB3 port 2 scanning...
896 14:50:25.852365 scan_static_bus for USB3 port 2
897 14:50:25.852459 scan_static_bus for USB3 port 2 done
898 14:50:25.852554 scan_bus: scanning of bus USB3 port 2 took 9705 usecs
899 14:50:25.852656 USB3 port 3 scanning...
900 14:50:25.852755 scan_static_bus for USB3 port 3
901 14:50:25.852842 scan_static_bus for USB3 port 3 done
902 14:50:25.852945 scan_bus: scanning of bus USB3 port 3 took 9697 usecs
903 14:50:25.853033 scan_static_bus for USB0 port 0 done
904 14:50:25.853119 scan_bus: scanning of bus USB0 port 0 took 155328 usecs
905 14:50:25.853204 scan_static_bus for PCI: 00:14.0 done
906 14:50:25.853290 scan_bus: scanning of bus PCI: 00:14.0 took 172930 usecs
907 14:50:25.853376 PCI: 00:15.0 scanning...
908 14:50:25.853462 scan_generic_bus for PCI: 00:15.0
909 14:50:25.853547 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
910 14:50:25.853632 scan_generic_bus for PCI: 00:15.0 done
911 14:50:25.853718 scan_bus: scanning of bus PCI: 00:15.0 took 14298 usecs
912 14:50:25.853803 PCI: 00:15.1 scanning...
913 14:50:25.853889 scan_generic_bus for PCI: 00:15.1
914 14:50:25.853974 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
915 14:50:25.854060 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
916 14:50:25.854145 scan_generic_bus for PCI: 00:15.1 done
917 14:50:25.854231 scan_bus: scanning of bus PCI: 00:15.1 took 18584 usecs
918 14:50:25.854316 PCI: 00:19.0 scanning...
919 14:50:25.854410 scan_generic_bus for PCI: 00:19.0
920 14:50:25.854507 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
921 14:50:25.854598 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
922 14:50:25.854690 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
923 14:50:25.854763 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
924 14:50:25.854825 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
925 14:50:25.854905 scan_generic_bus for PCI: 00:19.0 done
926 14:50:25.854966 scan_bus: scanning of bus PCI: 00:19.0 took 30700 usecs
927 14:50:25.855022 PCI: 00:1d.0 scanning...
928 14:50:25.855079 do_pci_scan_bridge for PCI: 00:1d.0
929 14:50:25.855134 PCI: pci_scan_bus for bus 01
930 14:50:25.855189 PCI: 01:00.0 [1c5c/1327] enabled
931 14:50:25.855244 Enabling Common Clock Configuration
932 14:50:25.855299 L1 Sub-State supported from root port 29
933 14:50:25.855354 L1 Sub-State Support = 0xf
934 14:50:25.855409 CommonModeRestoreTime = 0x28
935 14:50:25.855463 Power On Value = 0x16, Power On Scale = 0x0
936 14:50:25.855518 ASPM: Enabled L1
937 14:50:25.855573 scan_bus: scanning of bus PCI: 00:1d.0 took 32776 usecs
938 14:50:25.855628 PCI: 00:1e.2 scanning...
939 14:50:25.855682 scan_generic_bus for PCI: 00:1e.2
940 14:50:25.855740 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
941 14:50:25.855821 scan_generic_bus for PCI: 00:1e.2 done
942 14:50:25.855878 scan_bus: scanning of bus PCI: 00:1e.2 took 13995 usecs
943 14:50:25.855934 PCI: 00:1e.3 scanning...
944 14:50:25.855989 scan_generic_bus for PCI: 00:1e.3
945 14:50:25.856043 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
946 14:50:25.856098 scan_generic_bus for PCI: 00:1e.3 done
947 14:50:25.856158 scan_bus: scanning of bus PCI: 00:1e.3 took 13993 usecs
948 14:50:25.856213 PCI: 00:1f.0 scanning...
949 14:50:25.856267 scan_static_bus for PCI: 00:1f.0
950 14:50:25.856337 PNP: 0c09.0 enabled
951 14:50:25.856395 scan_static_bus for PCI: 00:1f.0 done
952 14:50:25.856450 scan_bus: scanning of bus PCI: 00:1f.0 took 12034 usecs
953 14:50:25.856516 PCI: 00:1f.3 scanning...
954 14:50:25.856609 scan_bus: scanning of bus PCI: 00:1f.3 took 2858 usecs
955 14:50:25.856694 PCI: 00:1f.4 scanning...
956 14:50:25.856779 scan_generic_bus for PCI: 00:1f.4
957 14:50:25.856864 scan_generic_bus for PCI: 00:1f.4 done
958 14:50:25.856969 scan_bus: scanning of bus PCI: 00:1f.4 took 10193 usecs
959 14:50:25.857057 PCI: 00:1f.5 scanning...
960 14:50:25.857156 scan_generic_bus for PCI: 00:1f.5
961 14:50:25.857249 scan_generic_bus for PCI: 00:1f.5 done
962 14:50:25.857335 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
963 14:50:25.857421 scan_bus: scanning of bus DOMAIN: 0000 took 604731 usecs
964 14:50:25.857506 scan_static_bus for Root Device done
965 14:50:25.857592 scan_bus: scanning of bus Root Device took 624597 usecs
966 14:50:25.857676 done
967 14:50:25.857760 Chrome EC: UHEPI supported
968 14:50:25.857847 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
969 14:50:25.857937 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
970 14:50:25.858040 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
971 14:50:25.858128 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
972 14:50:25.858236 SPI flash protection: WPSW=0 SRP0=0
973 14:50:25.858329 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
974 14:50:25.858416 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
975 14:50:25.858511 found VGA at PCI: 00:02.0
976 14:50:25.858600 Setting up VGA for PCI: 00:02.0
977 14:50:25.858686 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
978 14:50:25.858771 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
979 14:50:25.858857 Allocating resources...
980 14:50:25.858930 Reading resources...
981 14:50:25.858996 Root Device read_resources bus 0 link: 0
982 14:50:25.859068 CPU_CLUSTER: 0 read_resources bus 0 link: 0
983 14:50:25.859127 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
984 14:50:25.859182 DOMAIN: 0000 read_resources bus 0 link: 0
985 14:50:25.859445 PCI: 00:14.0 read_resources bus 0 link: 0
986 14:50:25.859524 USB0 port 0 read_resources bus 0 link: 0
987 14:50:25.859585 USB0 port 0 read_resources bus 0 link: 0 done
988 14:50:25.859642 PCI: 00:14.0 read_resources bus 0 link: 0 done
989 14:50:25.859698 PCI: 00:15.0 read_resources bus 1 link: 0
990 14:50:25.859768 PCI: 00:15.0 read_resources bus 1 link: 0 done
991 14:50:25.859828 PCI: 00:15.1 read_resources bus 2 link: 0
992 14:50:25.859884 PCI: 00:15.1 read_resources bus 2 link: 0 done
993 14:50:25.859949 PCI: 00:19.0 read_resources bus 3 link: 0
994 14:50:25.860038 PCI: 00:19.0 read_resources bus 3 link: 0 done
995 14:50:25.860097 PCI: 00:1d.0 read_resources bus 1 link: 0
996 14:50:25.860152 PCI: 00:1d.0 read_resources bus 1 link: 0 done
997 14:50:25.860207 PCI: 00:1e.2 read_resources bus 4 link: 0
998 14:50:25.860263 PCI: 00:1e.2 read_resources bus 4 link: 0 done
999 14:50:25.860317 PCI: 00:1e.3 read_resources bus 5 link: 0
1000 14:50:25.860371 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1001 14:50:25.860426 PCI: 00:1f.0 read_resources bus 0 link: 0
1002 14:50:25.860481 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1003 14:50:25.860536 DOMAIN: 0000 read_resources bus 0 link: 0 done
1004 14:50:25.860590 Root Device read_resources bus 0 link: 0 done
1005 14:50:25.860645 Done reading resources.
1006 14:50:25.860700 Show resources in subtree (Root Device)...After reading.
1007 14:50:25.860755 Root Device child on link 0 CPU_CLUSTER: 0
1008 14:50:25.860810 CPU_CLUSTER: 0 child on link 0 APIC: 00
1009 14:50:25.860865 APIC: 00
1010 14:50:25.860936 APIC: 01
1011 14:50:25.860991 APIC: 07
1012 14:50:25.861046 APIC: 06
1013 14:50:25.861101 APIC: 02
1014 14:50:25.861155 APIC: 03
1015 14:50:25.861209 APIC: 05
1016 14:50:25.861263 APIC: 04
1017 14:50:25.861318 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1018 14:50:25.861374 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1019 14:50:25.861431 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1020 14:50:25.861487 PCI: 00:00.0
1021 14:50:25.861542 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1022 14:50:25.861597 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1023 14:50:25.861653 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1024 14:50:25.861709 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1025 14:50:25.861772 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1026 14:50:25.861831 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1027 14:50:25.861887 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1028 14:50:25.861943 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1029 14:50:25.861997 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1030 14:50:25.862052 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1031 14:50:25.862107 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1032 14:50:25.862162 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1033 14:50:25.862216 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1034 14:50:25.862270 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1035 14:50:25.862325 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1036 14:50:25.862380 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1037 14:50:25.862433 PCI: 00:02.0
1038 14:50:25.862487 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1039 14:50:25.862541 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1040 14:50:25.862596 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1041 14:50:25.862650 PCI: 00:04.0
1042 14:50:25.862702 PCI: 00:08.0
1043 14:50:25.862756 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1044 14:50:25.862810 PCI: 00:12.0
1045 14:50:25.862864 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1046 14:50:25.862918 PCI: 00:14.0 child on link 0 USB0 port 0
1047 14:50:25.862972 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1048 14:50:25.863026 USB0 port 0 child on link 0 USB2 port 0
1049 14:50:25.863080 USB2 port 0
1050 14:50:25.863132 USB2 port 1
1051 14:50:25.863185 USB2 port 2
1052 14:50:25.863238 USB2 port 3
1053 14:50:25.863292 USB2 port 5
1054 14:50:25.863345 USB2 port 6
1055 14:50:25.863398 USB2 port 9
1056 14:50:25.863451 USB3 port 0
1057 14:50:25.863504 USB3 port 1
1058 14:50:25.863557 USB3 port 2
1059 14:50:25.863610 USB3 port 3
1060 14:50:25.863664 USB3 port 4
1061 14:50:25.863717 PCI: 00:14.2
1062 14:50:25.863770 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1063 14:50:25.864026 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1064 14:50:25.864089 PCI: 00:14.3
1065 14:50:25.864145 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1066 14:50:25.864200 PCI: 00:15.0 child on link 0 I2C: 01:15
1067 14:50:25.864255 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1068 14:50:25.864310 I2C: 01:15
1069 14:50:25.864364 PCI: 00:15.1 child on link 0 I2C: 02:5d
1070 14:50:25.864417 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1071 14:50:25.864471 I2C: 02:5d
1072 14:50:25.864543 GENERIC: 0.0
1073 14:50:25.864598 PCI: 00:16.0
1074 14:50:25.864652 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1075 14:50:25.864707 PCI: 00:17.0
1076 14:50:25.864761 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1077 14:50:25.864816 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1078 14:50:25.864882 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1079 14:50:25.864941 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1080 14:50:25.864995 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1081 14:50:25.865050 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1082 14:50:25.865104 PCI: 00:19.0 child on link 0 I2C: 03:1a
1083 14:50:25.865159 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1084 14:50:25.865213 I2C: 03:1a
1085 14:50:25.865266 I2C: 03:38
1086 14:50:25.865320 I2C: 03:39
1087 14:50:25.865373 I2C: 03:3a
1088 14:50:25.865427 I2C: 03:3b
1089 14:50:25.865479 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1090 14:50:25.865533 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1091 14:50:25.865587 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1092 14:50:25.865641 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1093 14:50:25.865695 PCI: 01:00.0
1094 14:50:25.865749 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1095 14:50:25.865803 PCI: 00:1e.0
1096 14:50:25.865857 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1097 14:50:25.865911 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1098 14:50:25.865966 PCI: 00:1e.2 child on link 0 SPI: 00
1099 14:50:25.866019 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1100 14:50:25.866074 SPI: 00
1101 14:50:25.866127 PCI: 00:1e.3 child on link 0 SPI: 01
1102 14:50:25.866180 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1103 14:50:25.866235 SPI: 01
1104 14:50:25.866288 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1105 14:50:25.866342 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1106 14:50:25.866397 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1107 14:50:25.866451 PNP: 0c09.0
1108 14:50:25.866530 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1109 14:50:25.866586 PCI: 00:1f.3
1110 14:50:25.866640 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1111 14:50:25.866695 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1112 14:50:25.866750 PCI: 00:1f.4
1113 14:50:25.866804 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1114 14:50:25.866859 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1115 14:50:25.866913 PCI: 00:1f.5
1116 14:50:25.866967 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1117 14:50:25.867022 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1118 14:50:25.867076 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1119 14:50:25.867131 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1120 14:50:25.867185 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1121 14:50:25.867239 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1122 14:50:25.867293 PCI: 00:17.0 18 * [0x60 - 0x67] io
1123 14:50:25.867347 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1124 14:50:25.867400 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1125 14:50:25.867454 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1126 14:50:25.867509 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1127 14:50:25.867563 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1128 14:50:25.867618 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1129 14:50:25.867672 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1130 14:50:25.867927 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1131 14:50:25.867991 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1132 14:50:25.868046 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1133 14:50:25.868101 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1134 14:50:25.868156 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1135 14:50:25.868210 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1136 14:50:25.868265 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1137 14:50:25.868319 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1138 14:50:25.868373 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1139 14:50:25.868426 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1140 14:50:25.868480 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1141 14:50:25.868533 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1142 14:50:25.868587 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1143 14:50:25.868641 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1144 14:50:25.868694 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1145 14:50:25.868748 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1146 14:50:25.868802 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1147 14:50:25.868855 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1148 14:50:25.868951 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1149 14:50:25.869036 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1150 14:50:25.869120 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1151 14:50:25.869204 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1152 14:50:25.869288 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1153 14:50:25.869379 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1154 14:50:25.869438 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1155 14:50:25.869494 avoid_fixed_resources: DOMAIN: 0000
1156 14:50:25.869548 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1157 14:50:25.869602 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1158 14:50:25.869656 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1159 14:50:25.869711 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1160 14:50:25.869765 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1161 14:50:25.869820 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1162 14:50:25.869873 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1163 14:50:25.869928 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1164 14:50:25.869981 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1165 14:50:25.870035 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1166 14:50:25.870089 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1167 14:50:25.870143 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1168 14:50:25.870197 Setting resources...
1169 14:50:25.870251 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1170 14:50:25.870305 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1171 14:50:25.870359 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1172 14:50:25.870413 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1173 14:50:25.870467 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1174 14:50:25.870521 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1175 14:50:25.870575 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1176 14:50:25.870630 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1177 14:50:25.870684 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1178 14:50:25.870739 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1179 14:50:25.870793 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1180 14:50:25.870847 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1181 14:50:25.870900 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1182 14:50:25.870953 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1183 14:50:25.871007 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1184 14:50:25.871061 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1185 14:50:25.871115 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1186 14:50:25.871169 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1187 14:50:25.871223 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1188 14:50:25.871276 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1189 14:50:25.871329 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1190 14:50:25.871382 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1191 14:50:25.871436 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1192 14:50:25.871490 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1193 14:50:25.871543 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1194 14:50:25.871597 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1195 14:50:25.871651 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1196 14:50:25.871705 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1197 14:50:25.871758 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1198 14:50:25.871812 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1199 14:50:25.871866 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1200 14:50:25.871919 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1201 14:50:25.871973 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1202 14:50:25.872028 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1203 14:50:25.872283 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1204 14:50:25.872346 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1205 14:50:25.872402 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1206 14:50:25.872458 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1207 14:50:25.872513 Root Device assign_resources, bus 0 link: 0
1208 14:50:25.872567 DOMAIN: 0000 assign_resources, bus 0 link: 0
1209 14:50:25.872620 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1210 14:50:25.872675 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1211 14:50:25.872729 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1212 14:50:25.872783 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1213 14:50:25.872837 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1214 14:50:25.872907 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1215 14:50:25.872963 PCI: 00:14.0 assign_resources, bus 0 link: 0
1216 14:50:25.873016 PCI: 00:14.0 assign_resources, bus 0 link: 0
1217 14:50:25.873070 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1218 14:50:25.873124 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1219 14:50:25.873179 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1220 14:50:25.873232 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1221 14:50:25.873286 PCI: 00:15.0 assign_resources, bus 1 link: 0
1222 14:50:25.873340 PCI: 00:15.0 assign_resources, bus 1 link: 0
1223 14:50:25.873394 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1224 14:50:25.873448 PCI: 00:15.1 assign_resources, bus 2 link: 0
1225 14:50:25.873501 PCI: 00:15.1 assign_resources, bus 2 link: 0
1226 14:50:25.873555 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1227 14:50:25.873609 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1228 14:50:25.873664 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1229 14:50:25.873718 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1230 14:50:25.873773 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1231 14:50:25.873826 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1232 14:50:25.873880 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1233 14:50:25.873934 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1234 14:50:25.873987 PCI: 00:19.0 assign_resources, bus 3 link: 0
1235 14:50:25.874041 PCI: 00:19.0 assign_resources, bus 3 link: 0
1236 14:50:25.874095 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1237 14:50:25.874149 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1238 14:50:25.874203 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1239 14:50:25.874257 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1240 14:50:25.874310 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1241 14:50:25.874364 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1242 14:50:25.874417 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1243 14:50:25.874470 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1244 14:50:25.874524 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1245 14:50:25.874577 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1246 14:50:25.874631 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1247 14:50:25.874684 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1248 14:50:25.874737 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1249 14:50:25.874789 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1250 14:50:25.874842 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1251 14:50:25.874894 LPC: Trying to open IO window from 800 size 1ff
1252 14:50:25.874947 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1253 14:50:25.875001 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1254 14:50:25.875055 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1255 14:50:25.875108 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1256 14:50:25.875161 DOMAIN: 0000 assign_resources, bus 0 link: 0
1257 14:50:25.875214 Root Device assign_resources, bus 0 link: 0
1258 14:50:25.875267 Done setting resources.
1259 14:50:25.875320 Show resources in subtree (Root Device)...After assigning values.
1260 14:50:25.875374 Root Device child on link 0 CPU_CLUSTER: 0
1261 14:50:25.875427 CPU_CLUSTER: 0 child on link 0 APIC: 00
1262 14:50:25.875482 APIC: 00
1263 14:50:25.875536 APIC: 01
1264 14:50:25.875588 APIC: 07
1265 14:50:25.875640 APIC: 06
1266 14:50:25.875697 APIC: 02
1267 14:50:25.875750 APIC: 03
1268 14:50:25.875802 APIC: 05
1269 14:50:25.875855 APIC: 04
1270 14:50:25.875907 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1271 14:50:25.876161 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1272 14:50:25.876223 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1273 14:50:25.876278 PCI: 00:00.0
1274 14:50:25.876332 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1275 14:50:25.876386 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1276 14:50:25.876440 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1277 14:50:25.876494 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1278 14:50:25.876548 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1279 14:50:25.876601 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1280 14:50:25.876655 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1281 14:50:25.876708 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1282 14:50:25.876761 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1283 14:50:25.876815 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1284 14:50:25.876883 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1285 14:50:25.876941 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1286 14:50:25.876994 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1287 14:50:25.877049 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1288 14:50:25.877102 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1289 14:50:25.877155 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1290 14:50:25.877208 PCI: 00:02.0
1291 14:50:25.877262 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1292 14:50:25.877317 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1293 14:50:25.877371 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1294 14:50:25.877426 PCI: 00:04.0
1295 14:50:25.877479 PCI: 00:08.0
1296 14:50:25.877532 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1297 14:50:25.877586 PCI: 00:12.0
1298 14:50:25.877639 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1299 14:50:25.877692 PCI: 00:14.0 child on link 0 USB0 port 0
1300 14:50:25.877746 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1301 14:50:25.877800 USB0 port 0 child on link 0 USB2 port 0
1302 14:50:25.877853 USB2 port 0
1303 14:50:25.877906 USB2 port 1
1304 14:50:25.877959 USB2 port 2
1305 14:50:25.878012 USB2 port 3
1306 14:50:25.878065 USB2 port 5
1307 14:50:25.878118 USB2 port 6
1308 14:50:25.878171 USB2 port 9
1309 14:50:25.878223 USB3 port 0
1310 14:50:25.878284 USB3 port 1
1311 14:50:25.878340 USB3 port 2
1312 14:50:25.878392 USB3 port 3
1313 14:50:25.878445 USB3 port 4
1314 14:50:25.878497 PCI: 00:14.2
1315 14:50:25.878549 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1316 14:50:25.878604 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1317 14:50:25.878657 PCI: 00:14.3
1318 14:50:25.878709 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1319 14:50:25.878763 PCI: 00:15.0 child on link 0 I2C: 01:15
1320 14:50:25.878816 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1321 14:50:25.878870 I2C: 01:15
1322 14:50:25.878922 PCI: 00:15.1 child on link 0 I2C: 02:5d
1323 14:50:25.878975 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1324 14:50:25.879029 I2C: 02:5d
1325 14:50:25.879082 GENERIC: 0.0
1326 14:50:25.879135 PCI: 00:16.0
1327 14:50:25.879188 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1328 14:50:25.879242 PCI: 00:17.0
1329 14:50:25.879295 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1330 14:50:25.879349 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1331 14:50:25.879402 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1332 14:50:25.879456 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1333 14:50:25.879510 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1334 14:50:25.879777 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1335 14:50:25.879844 PCI: 00:19.0 child on link 0 I2C: 03:1a
1336 14:50:25.879899 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1337 14:50:25.879954 I2C: 03:1a
1338 14:50:25.880007 I2C: 03:38
1339 14:50:25.880060 I2C: 03:39
1340 14:50:25.880112 I2C: 03:3a
1341 14:50:25.880164 I2C: 03:3b
1342 14:50:25.880217 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1343 14:50:25.880271 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1344 14:50:25.880325 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1345 14:50:25.880379 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1346 14:50:25.880434 PCI: 01:00.0
1347 14:50:25.880487 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1348 14:50:25.880541 PCI: 00:1e.0
1349 14:50:25.880594 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1350 14:50:25.880649 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1351 14:50:25.880702 PCI: 00:1e.2 child on link 0 SPI: 00
1352 14:50:25.880755 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1353 14:50:25.880808 SPI: 00
1354 14:50:25.880862 PCI: 00:1e.3 child on link 0 SPI: 01
1355 14:50:25.880928 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1356 14:50:25.880983 SPI: 01
1357 14:50:25.881036 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1358 14:50:25.881089 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1359 14:50:25.881143 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1360 14:50:25.881196 PNP: 0c09.0
1361 14:50:25.881249 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1362 14:50:25.881302 PCI: 00:1f.3
1363 14:50:25.881356 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1364 14:50:25.881409 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1365 14:50:25.881463 PCI: 00:1f.4
1366 14:50:25.881517 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1367 14:50:25.881571 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1368 14:50:25.881625 PCI: 00:1f.5
1369 14:50:25.881678 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1370 14:50:25.881732 Done allocating resources.
1371 14:50:25.881784 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1372 14:50:25.881837 Enabling resources...
1373 14:50:25.881890 PCI: 00:00.0 subsystem <- 8086/9b61
1374 14:50:25.881942 PCI: 00:00.0 cmd <- 06
1375 14:50:25.881996 PCI: 00:02.0 subsystem <- 8086/9b41
1376 14:50:25.882048 PCI: 00:02.0 cmd <- 03
1377 14:50:25.882104 PCI: 00:08.0 cmd <- 06
1378 14:50:25.882157 PCI: 00:12.0 subsystem <- 8086/02f9
1379 14:50:25.882210 PCI: 00:12.0 cmd <- 02
1380 14:50:25.882263 PCI: 00:14.0 subsystem <- 8086/02ed
1381 14:50:25.882316 PCI: 00:14.0 cmd <- 02
1382 14:50:25.882369 PCI: 00:14.2 cmd <- 02
1383 14:50:25.882421 PCI: 00:14.3 subsystem <- 8086/02f0
1384 14:50:25.882517 PCI: 00:14.3 cmd <- 02
1385 14:50:25.882577 PCI: 00:15.0 subsystem <- 8086/02e8
1386 14:50:25.882631 PCI: 00:15.0 cmd <- 02
1387 14:50:25.882684 PCI: 00:15.1 subsystem <- 8086/02e9
1388 14:50:25.882737 PCI: 00:15.1 cmd <- 02
1389 14:50:25.882791 PCI: 00:16.0 subsystem <- 8086/02e0
1390 14:50:25.882844 PCI: 00:16.0 cmd <- 02
1391 14:50:25.882897 PCI: 00:17.0 subsystem <- 8086/02d3
1392 14:50:25.882950 PCI: 00:17.0 cmd <- 03
1393 14:50:25.883003 PCI: 00:19.0 subsystem <- 8086/02c5
1394 14:50:25.883074 PCI: 00:19.0 cmd <- 02
1395 14:50:25.886176 PCI: 00:1d.0 bridge ctrl <- 0013
1396 14:50:25.889256 PCI: 00:1d.0 subsystem <- 8086/02b0
1397 14:50:25.892142 PCI: 00:1d.0 cmd <- 06
1398 14:50:25.895882 PCI: 00:1e.0 subsystem <- 8086/02a8
1399 14:50:25.898856 PCI: 00:1e.0 cmd <- 06
1400 14:50:25.902405 PCI: 00:1e.2 subsystem <- 8086/02aa
1401 14:50:25.902511 PCI: 00:1e.2 cmd <- 06
1402 14:50:25.909013 PCI: 00:1e.3 subsystem <- 8086/02ab
1403 14:50:25.909158 PCI: 00:1e.3 cmd <- 02
1404 14:50:25.915413 PCI: 00:1f.0 subsystem <- 8086/0284
1405 14:50:25.915543 PCI: 00:1f.0 cmd <- 407
1406 14:50:25.918877 PCI: 00:1f.3 subsystem <- 8086/02c8
1407 14:50:25.922365 PCI: 00:1f.3 cmd <- 02
1408 14:50:25.925396 PCI: 00:1f.4 subsystem <- 8086/02a3
1409 14:50:25.928849 PCI: 00:1f.4 cmd <- 03
1410 14:50:25.931454 PCI: 00:1f.5 subsystem <- 8086/02a4
1411 14:50:25.934937 PCI: 00:1f.5 cmd <- 406
1412 14:50:25.944404 PCI: 01:00.0 cmd <- 02
1413 14:50:25.949501 done.
1414 14:50:25.958495 ME: Version: 14.0.39.1367
1415 14:50:25.965322 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1416 14:50:25.968142 Initializing devices...
1417 14:50:25.968342 Root Device init ...
1418 14:50:25.974615 Chrome EC: Set SMI mask to 0x0000000000000000
1419 14:50:25.981595 Chrome EC: clear events_b mask to 0x0000000000000000
1420 14:50:25.984423 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1421 14:50:25.990841 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1422 14:50:25.997837 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1423 14:50:26.000641 Chrome EC: Set WAKE mask to 0x0000000000000000
1424 14:50:26.007106 Root Device init finished in 35191 usecs
1425 14:50:26.010451 CPU_CLUSTER: 0 init ...
1426 14:50:26.013649 CPU_CLUSTER: 0 init finished in 2449 usecs
1427 14:50:26.019262 PCI: 00:00.0 init ...
1428 14:50:26.022271 CPU TDP: 15 Watts
1429 14:50:26.026090 CPU PL2 = 64 Watts
1430 14:50:26.029045 PCI: 00:00.0 init finished in 7075 usecs
1431 14:50:26.032373 PCI: 00:02.0 init ...
1432 14:50:26.035960 PCI: 00:02.0 init finished in 2253 usecs
1433 14:50:26.038731 PCI: 00:08.0 init ...
1434 14:50:26.042096 PCI: 00:08.0 init finished in 2253 usecs
1435 14:50:26.045496 PCI: 00:12.0 init ...
1436 14:50:26.048223 PCI: 00:12.0 init finished in 2252 usecs
1437 14:50:26.051592 PCI: 00:14.0 init ...
1438 14:50:26.054983 PCI: 00:14.0 init finished in 2243 usecs
1439 14:50:26.058585 PCI: 00:14.2 init ...
1440 14:50:26.061427 PCI: 00:14.2 init finished in 2245 usecs
1441 14:50:26.064685 PCI: 00:14.3 init ...
1442 14:50:26.068151 PCI: 00:14.3 init finished in 2268 usecs
1443 14:50:26.071501 PCI: 00:15.0 init ...
1444 14:50:26.075226 DW I2C bus 0 at 0xd121f000 (400 KHz)
1445 14:50:26.081651 PCI: 00:15.0 init finished in 5980 usecs
1446 14:50:26.081803 PCI: 00:15.1 init ...
1447 14:50:26.087831 DW I2C bus 1 at 0xd1220000 (400 KHz)
1448 14:50:26.091367 PCI: 00:15.1 init finished in 5973 usecs
1449 14:50:26.094195 PCI: 00:16.0 init ...
1450 14:50:26.097490 PCI: 00:16.0 init finished in 2253 usecs
1451 14:50:26.100842 PCI: 00:19.0 init ...
1452 14:50:26.104351 DW I2C bus 4 at 0xd1222000 (400 KHz)
1453 14:50:26.107150 PCI: 00:19.0 init finished in 5981 usecs
1454 14:50:26.110629 PCI: 00:1d.0 init ...
1455 14:50:26.113898 Initializing PCH PCIe bridge.
1456 14:50:26.117378 PCI: 00:1d.0 init finished in 5286 usecs
1457 14:50:26.120905 PCI: 00:1f.0 init ...
1458 14:50:26.127718 IOAPIC: Initializing IOAPIC at 0xfec00000
1459 14:50:26.130996 IOAPIC: Bootstrap Processor Local APIC = 0x00
1460 14:50:26.131126 IOAPIC: ID = 0x02
1461 14:50:26.134198 IOAPIC: Dumping registers
1462 14:50:26.137365 reg 0x0000: 0x02000000
1463 14:50:26.140551 reg 0x0001: 0x00770020
1464 14:50:26.143742 reg 0x0002: 0x00000000
1465 14:50:26.147017 PCI: 00:1f.0 init finished in 23541 usecs
1466 14:50:26.150097 PCI: 00:1f.4 init ...
1467 14:50:26.153559 PCI: 00:1f.4 init finished in 2263 usecs
1468 14:50:26.165685 PCI: 01:00.0 init ...
1469 14:50:26.168441 PCI: 01:00.0 init finished in 2251 usecs
1470 14:50:26.173064 PNP: 0c09.0 init ...
1471 14:50:26.176517 Google Chrome EC uptime: 8.150 seconds
1472 14:50:26.182893 Google Chrome AP resets since EC boot: 0
1473 14:50:26.185655 Google Chrome most recent AP reset causes:
1474 14:50:26.192598 Google Chrome EC reset flags at last EC boot: reset-pin | hard | ap-off
1475 14:50:26.195991 PNP: 0c09.0 init finished in 22063 usecs
1476 14:50:26.199591 Devices initialized
1477 14:50:26.202315 Show all devs... After init.
1478 14:50:26.205942 Root Device: enabled 1
1479 14:50:26.209355 CPU_CLUSTER: 0: enabled 1
1480 14:50:26.209464 DOMAIN: 0000: enabled 1
1481 14:50:26.212092 APIC: 00: enabled 1
1482 14:50:26.215555 PCI: 00:00.0: enabled 1
1483 14:50:26.215657 PCI: 00:02.0: enabled 1
1484 14:50:26.218985 PCI: 00:04.0: enabled 0
1485 14:50:26.222327 PCI: 00:05.0: enabled 0
1486 14:50:26.225087 PCI: 00:12.0: enabled 1
1487 14:50:26.225183 PCI: 00:12.5: enabled 0
1488 14:50:26.228591 PCI: 00:12.6: enabled 0
1489 14:50:26.231981 PCI: 00:14.0: enabled 1
1490 14:50:26.235373 PCI: 00:14.1: enabled 0
1491 14:50:26.235504 PCI: 00:14.3: enabled 1
1492 14:50:26.238166 PCI: 00:14.5: enabled 0
1493 14:50:26.241615 PCI: 00:15.0: enabled 1
1494 14:50:26.245236 PCI: 00:15.1: enabled 1
1495 14:50:26.245336 PCI: 00:15.2: enabled 0
1496 14:50:26.247974 PCI: 00:15.3: enabled 0
1497 14:50:26.251345 PCI: 00:16.0: enabled 1
1498 14:50:26.254811 PCI: 00:16.1: enabled 0
1499 14:50:26.254996 PCI: 00:16.2: enabled 0
1500 14:50:26.258153 PCI: 00:16.3: enabled 0
1501 14:50:26.261334 PCI: 00:16.4: enabled 0
1502 14:50:26.264474 PCI: 00:16.5: enabled 0
1503 14:50:26.264585 PCI: 00:17.0: enabled 1
1504 14:50:26.267453 PCI: 00:19.0: enabled 1
1505 14:50:26.270817 PCI: 00:19.1: enabled 0
1506 14:50:26.273856 PCI: 00:19.2: enabled 0
1507 14:50:26.273958 PCI: 00:1a.0: enabled 0
1508 14:50:26.277422 PCI: 00:1c.0: enabled 0
1509 14:50:26.280884 PCI: 00:1c.1: enabled 0
1510 14:50:26.283733 PCI: 00:1c.2: enabled 0
1511 14:50:26.283832 PCI: 00:1c.3: enabled 0
1512 14:50:26.287327 PCI: 00:1c.4: enabled 0
1513 14:50:26.290153 PCI: 00:1c.5: enabled 0
1514 14:50:26.293524 PCI: 00:1c.6: enabled 0
1515 14:50:26.293672 PCI: 00:1c.7: enabled 0
1516 14:50:26.296943 PCI: 00:1d.0: enabled 1
1517 14:50:26.300347 PCI: 00:1d.1: enabled 0
1518 14:50:26.303128 PCI: 00:1d.2: enabled 0
1519 14:50:26.303234 PCI: 00:1d.3: enabled 0
1520 14:50:26.306690 PCI: 00:1d.4: enabled 0
1521 14:50:26.310065 PCI: 00:1d.5: enabled 0
1522 14:50:26.312883 PCI: 00:1e.0: enabled 1
1523 14:50:26.313004 PCI: 00:1e.1: enabled 0
1524 14:50:26.316445 PCI: 00:1e.2: enabled 1
1525 14:50:26.319217 PCI: 00:1e.3: enabled 1
1526 14:50:26.322632 PCI: 00:1f.0: enabled 1
1527 14:50:26.322743 PCI: 00:1f.1: enabled 0
1528 14:50:26.326031 PCI: 00:1f.2: enabled 0
1529 14:50:26.329505 PCI: 00:1f.3: enabled 1
1530 14:50:26.332468 PCI: 00:1f.4: enabled 1
1531 14:50:26.332575 PCI: 00:1f.5: enabled 1
1532 14:50:26.336097 PCI: 00:1f.6: enabled 0
1533 14:50:26.339439 USB0 port 0: enabled 1
1534 14:50:26.342190 I2C: 01:15: enabled 1
1535 14:50:26.342297 I2C: 02:5d: enabled 1
1536 14:50:26.345555 GENERIC: 0.0: enabled 1
1537 14:50:26.349001 I2C: 03:1a: enabled 1
1538 14:50:26.349109 I2C: 03:38: enabled 1
1539 14:50:26.351821 I2C: 03:39: enabled 1
1540 14:50:26.355272 I2C: 03:3a: enabled 1
1541 14:50:26.355369 I2C: 03:3b: enabled 1
1542 14:50:26.358837 PCI: 00:00.0: enabled 1
1543 14:50:26.361928 SPI: 00: enabled 1
1544 14:50:26.362029 SPI: 01: enabled 1
1545 14:50:26.365318 PNP: 0c09.0: enabled 1
1546 14:50:26.368075 USB2 port 0: enabled 1
1547 14:50:26.368170 USB2 port 1: enabled 1
1548 14:50:26.371510 USB2 port 2: enabled 0
1549 14:50:26.374841 USB2 port 3: enabled 0
1550 14:50:26.378114 USB2 port 5: enabled 0
1551 14:50:26.378222 USB2 port 6: enabled 1
1552 14:50:26.381395 USB2 port 9: enabled 1
1553 14:50:26.384595 USB3 port 0: enabled 1
1554 14:50:26.384691 USB3 port 1: enabled 1
1555 14:50:26.387813 USB3 port 2: enabled 1
1556 14:50:26.391410 USB3 port 3: enabled 1
1557 14:50:26.394352 USB3 port 4: enabled 0
1558 14:50:26.394459 APIC: 01: enabled 1
1559 14:50:26.397860 APIC: 07: enabled 1
1560 14:50:26.400896 APIC: 06: enabled 1
1561 14:50:26.401015 APIC: 02: enabled 1
1562 14:50:26.404005 APIC: 03: enabled 1
1563 14:50:26.404097 APIC: 05: enabled 1
1564 14:50:26.407830 APIC: 04: enabled 1
1565 14:50:26.410487 PCI: 00:08.0: enabled 1
1566 14:50:26.413921 PCI: 00:14.2: enabled 1
1567 14:50:26.414051 PCI: 01:00.0: enabled 1
1568 14:50:26.418172 Disabling ACPI via APMC:
1569 14:50:26.421783 done.
1570 14:50:26.425276 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1571 14:50:26.428519 ELOG: NV offset 0xaf0000 size 0x4000
1572 14:50:26.436018 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1573 14:50:26.442854 ELOG: Event(17) added with size 13 at 2024-05-28 14:50:24 UTC
1574 14:50:26.449217 ELOG: Event(92) added with size 9 at 2024-05-28 14:50:24 UTC
1575 14:50:26.455556 ELOG: Event(93) added with size 9 at 2024-05-28 14:50:24 UTC
1576 14:50:26.462420 ELOG: Event(9E) added with size 10 at 2024-05-28 14:50:24 UTC
1577 14:50:26.468696 ELOG: Event(16) added with size 11 at 2024-05-28 14:50:24 UTC
1578 14:50:26.472100 Erasing flash addr af0000 + 4 KiB
1579 14:50:26.552475 ELOG: Event(9F) added with size 14 at 2024-05-28 14:50:24 UTC
1580 14:50:26.558878 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 69
1581 14:50:26.565560 ELOG: Event(A1) added with size 10 at 2024-05-28 14:50:24 UTC
1582 14:50:26.575398 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1583 14:50:26.578304 ELOG: Event(A0) added with size 9 at 2024-05-28 14:50:24 UTC
1584 14:50:26.585107 elog_add_boot_reason: Logged dev mode boot
1585 14:50:26.585198 Finalize devices...
1586 14:50:26.588105 PCI: 00:17.0 final
1587 14:50:26.591547 Devices finalized
1588 14:50:26.594372 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1589 14:50:26.601348 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1590 14:50:26.604182 ME: HFSTS1 : 0x90000245
1591 14:50:26.607549 ME: HFSTS2 : 0x30850126
1592 14:50:26.613886 ME: HFSTS3 : 0x00000020
1593 14:50:26.617475 ME: HFSTS4 : 0x00004800
1594 14:50:26.620796 ME: HFSTS5 : 0x00000000
1595 14:50:26.624261 ME: HFSTS6 : 0x40400006
1596 14:50:26.627419 ME: Manufacturing Mode : NO
1597 14:50:26.630253 ME: FW Partition Table : OK
1598 14:50:26.633662 ME: Bringup Loader Failure : NO
1599 14:50:26.637172 ME: Firmware Init Complete : YES
1600 14:50:26.640331 ME: Boot Options Present : NO
1601 14:50:26.646556 ME: Update In Progress : NO
1602 14:50:26.650185 ME: D0i3 Support : YES
1603 14:50:26.653090 ME: Low Power State Enabled : NO
1604 14:50:26.656433 ME: CPU Replaced : NO
1605 14:50:26.659862 ME: CPU Replacement Valid : YES
1606 14:50:26.663111 ME: Current Working State : 5
1607 14:50:26.665948 ME: Current Operation State : 1
1608 14:50:26.669267 ME: Current Operation Mode : 0
1609 14:50:26.672616 ME: Error Code : 0
1610 14:50:26.676316 ME: CPU Debug Disabled : YES
1611 14:50:26.679108 ME: TXT Support : NO
1612 14:50:26.682633 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1613 14:50:26.689156 ELOG: Event(91) added with size 10 at 2024-05-28 14:50:24 UTC
1614 14:50:26.695375 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1615 14:50:26.698694 CBFS @ c08000 size 3f8000
1616 14:50:26.702265 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1617 14:50:26.708340 CBFS: Locating 'fallback/dsdt.aml'
1618 14:50:26.711305 CBFS: Found @ offset 10bb80 size 3fa5
1619 14:50:26.714826 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1620 14:50:26.718278 CBFS @ c08000 size 3f8000
1621 14:50:26.724800 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1622 14:50:26.727619 CBFS: Locating 'fallback/slic'
1623 14:50:26.735162 CBFS: 'fallback/slic' not found.
1624 14:50:26.737992 ACPI: Writing ACPI tables at 99b3e000.
1625 14:50:26.738110 ACPI: * FACS
1626 14:50:26.741397 ACPI: * DSDT
1627 14:50:26.744349 Ramoops buffer: 0x100000@0x99a3d000.
1628 14:50:26.747862 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1629 14:50:26.754202 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1630 14:50:26.757648 Google Chrome EC: version:
1631 14:50:26.760500 ro: helios_v2.0.2659-56403530b
1632 14:50:26.763588 rw: helios_v2.0.2849-c41de27e7d
1633 14:50:26.763683 running image: 1
1634 14:50:26.768666 ACPI: * FADT
1635 14:50:26.768756 SCI is IRQ9
1636 14:50:26.775696 ACPI: added table 1/32, length now 40
1637 14:50:26.775795 ACPI: * SSDT
1638 14:50:26.778562 Found 1 CPU(s) with 8 core(s) each.
1639 14:50:26.784997 Error: Could not locate 'wifi_sar' in VPD.
1640 14:50:26.788184 Checking CBFS for default SAR values
1641 14:50:26.791426 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1642 14:50:26.794917 CBFS @ c08000 size 3f8000
1643 14:50:26.801566 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1644 14:50:26.804914 CBFS: Locating 'wifi_sar_defaults.hex'
1645 14:50:26.807771 CBFS: Found @ offset 5fac0 size 77
1646 14:50:26.811302 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1647 14:50:26.817626 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1648 14:50:26.821184 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1649 14:50:26.827486 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1650 14:50:26.831033 failed to find key in VPD: dsm_calib_r0_0
1651 14:50:26.840488 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1652 14:50:26.846802 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1653 14:50:26.850195 failed to find key in VPD: dsm_calib_r0_1
1654 14:50:26.859972 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1655 14:50:26.862960 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1656 14:50:26.869930 failed to find key in VPD: dsm_calib_r0_2
1657 14:50:26.876525 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1658 14:50:26.882570 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1659 14:50:26.886005 failed to find key in VPD: dsm_calib_r0_3
1660 14:50:26.895625 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1661 14:50:26.901965 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1662 14:50:26.905588 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1663 14:50:26.909041 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1664 14:50:26.912360 EC returned error result code 1
1665 14:50:26.915259 EC returned error result code 1
1666 14:50:26.922552 EC returned error result code 1
1667 14:50:26.925282 PS2K: Bad resp from EC. Vivaldi disabled!
1668 14:50:26.932233 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1669 14:50:26.935051 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1670 14:50:26.942021 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1671 14:50:26.945445 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1672 14:50:26.951555 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1673 14:50:26.957972 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1674 14:50:26.964967 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1675 14:50:26.971378 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1676 14:50:26.974793 ACPI: added table 2/32, length now 44
1677 14:50:26.974936 ACPI: * MCFG
1678 14:50:26.977521 ACPI: added table 3/32, length now 48
1679 14:50:26.981105 ACPI: * TPM2
1680 14:50:26.984320 TPM2 log created at 99a2d000
1681 14:50:26.987842 ACPI: added table 4/32, length now 52
1682 14:50:26.990655 ACPI: * MADT
1683 14:50:26.990742 SCI is IRQ9
1684 14:50:26.993994 ACPI: added table 5/32, length now 56
1685 14:50:26.997619 current = 99b43ac0
1686 14:50:26.997706 ACPI: * DMAR
1687 14:50:27.000468 ACPI: added table 6/32, length now 60
1688 14:50:27.003991 ACPI: * IGD OpRegion
1689 14:50:27.006915 GMA: Found VBT in CBFS
1690 14:50:27.010274 GMA: Found valid VBT in CBFS
1691 14:50:27.013764 ACPI: added table 7/32, length now 64
1692 14:50:27.013851 ACPI: * HPET
1693 14:50:27.020219 ACPI: added table 8/32, length now 68
1694 14:50:27.020305 ACPI: done.
1695 14:50:27.023514 ACPI tables: 31744 bytes.
1696 14:50:27.026973 smbios_write_tables: 99a2c000
1697 14:50:27.029880 EC returned error result code 3
1698 14:50:27.033154 Couldn't obtain OEM name from CBI
1699 14:50:27.036300 Create SMBIOS type 17
1700 14:50:27.040097 PCI: 00:00.0 (Intel Cannonlake)
1701 14:50:27.043276 PCI: 00:14.3 (Intel WiFi)
1702 14:50:27.043437 SMBIOS tables: 939 bytes.
1703 14:50:27.049823 Writing table forward entry at 0x00000500
1704 14:50:27.053067 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1705 14:50:27.059157 Writing coreboot table at 0x99b62000
1706 14:50:27.062619 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1707 14:50:27.068785 1. 0000000000001000-000000000009ffff: RAM
1708 14:50:27.072418 2. 00000000000a0000-00000000000fffff: RESERVED
1709 14:50:27.078863 3. 0000000000100000-0000000099a2bfff: RAM
1710 14:50:27.082188 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1711 14:50:27.088858 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1712 14:50:27.095153 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1713 14:50:27.098649 7. 000000009a000000-000000009f7fffff: RESERVED
1714 14:50:27.105162 8. 00000000e0000000-00000000efffffff: RESERVED
1715 14:50:27.107944 9. 00000000fc000000-00000000fc000fff: RESERVED
1716 14:50:27.114429 10. 00000000fe000000-00000000fe00ffff: RESERVED
1717 14:50:27.117909 11. 00000000fed10000-00000000fed17fff: RESERVED
1718 14:50:27.121319 12. 00000000fed80000-00000000fed83fff: RESERVED
1719 14:50:27.127561 13. 00000000fed90000-00000000fed91fff: RESERVED
1720 14:50:27.131055 14. 00000000feda0000-00000000feda1fff: RESERVED
1721 14:50:27.137356 15. 0000000100000000-000000045e7fffff: RAM
1722 14:50:27.140521 Graphics framebuffer located at 0xc0000000
1723 14:50:27.143869 Passing 5 GPIOs to payload:
1724 14:50:27.150618 NAME | PORT | POLARITY | VALUE
1725 14:50:27.153382 write protect | undefined | high | low
1726 14:50:27.160274 lid | undefined | high | high
1727 14:50:27.163428 power | undefined | high | low
1728 14:50:27.169863 oprom | undefined | high | low
1729 14:50:27.176048 EC in RW | 0x000000cb | high | low
1730 14:50:27.176216 Board ID: 4
1731 14:50:27.183083 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1732 14:50:27.183190 CBFS @ c08000 size 3f8000
1733 14:50:27.189336 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1734 14:50:27.195424 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f826
1735 14:50:27.199142 coreboot table: 1492 bytes.
1736 14:50:27.201949 IMD ROOT 0. 99fff000 00001000
1737 14:50:27.205546 IMD SMALL 1. 99ffe000 00001000
1738 14:50:27.209125 FSP MEMORY 2. 99c4e000 003b0000
1739 14:50:27.211883 CONSOLE 3. 99c2e000 00020000
1740 14:50:27.215514 FMAP 4. 99c2d000 0000054e
1741 14:50:27.218408 TIME STAMP 5. 99c2c000 00000910
1742 14:50:27.221993 VBOOT WORK 6. 99c18000 00014000
1743 14:50:27.224783 MRC DATA 7. 99c16000 00001958
1744 14:50:27.228227 ROMSTG STCK 8. 99c15000 00001000
1745 14:50:27.231708 AFTER CAR 9. 99c0b000 0000a000
1746 14:50:27.234634 RAMSTAGE 10. 99baf000 0005c000
1747 14:50:27.238205 REFCODE 11. 99b7a000 00035000
1748 14:50:27.241110 SMM BACKUP 12. 99b6a000 00010000
1749 14:50:27.244471 COREBOOT 13. 99b62000 00008000
1750 14:50:27.247891 ACPI 14. 99b3e000 00024000
1751 14:50:27.251400 ACPI GNVS 15. 99b3d000 00001000
1752 14:50:27.254385 RAMOOPS 16. 99a3d000 00100000
1753 14:50:27.257889 TPM2 TCGLOG17. 99a2d000 00010000
1754 14:50:27.260920 SMBIOS 18. 99a2c000 00000800
1755 14:50:27.263907 IMD small region:
1756 14:50:27.267290 IMD ROOT 0. 99ffec00 00000400
1757 14:50:27.270734 FSP RUNTIME 1. 99ffebe0 00000004
1758 14:50:27.274119 EC HOSTEVENT 2. 99ffebc0 00000008
1759 14:50:27.277362 POWER STATE 3. 99ffeb80 00000040
1760 14:50:27.280457 ROMSTAGE 4. 99ffeb60 00000004
1761 14:50:27.283877 MEM INFO 5. 99ffe9a0 000001b9
1762 14:50:27.287176 VPD 6. 99ffe960 00000027
1763 14:50:27.290485 MTRR: Physical address space:
1764 14:50:27.296728 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1765 14:50:27.303540 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1766 14:50:27.309945 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1767 14:50:27.316602 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1768 14:50:27.323300 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1769 14:50:27.329510 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1770 14:50:27.335726 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1771 14:50:27.339249 MTRR: Fixed MSR 0x250 0x0606060606060606
1772 14:50:27.342376 MTRR: Fixed MSR 0x258 0x0606060606060606
1773 14:50:27.349291 MTRR: Fixed MSR 0x259 0x0000000000000000
1774 14:50:27.352384 MTRR: Fixed MSR 0x268 0x0606060606060606
1775 14:50:27.355632 MTRR: Fixed MSR 0x269 0x0606060606060606
1776 14:50:27.358689 MTRR: Fixed MSR 0x26a 0x0606060606060606
1777 14:50:27.365275 MTRR: Fixed MSR 0x26b 0x0606060606060606
1778 14:50:27.368106 MTRR: Fixed MSR 0x26c 0x0606060606060606
1779 14:50:27.371603 MTRR: Fixed MSR 0x26d 0x0606060606060606
1780 14:50:27.375458 MTRR: Fixed MSR 0x26e 0x0606060606060606
1781 14:50:27.381537 MTRR: Fixed MSR 0x26f 0x0606060606060606
1782 14:50:27.385049 call enable_fixed_mtrr()
1783 14:50:27.388439 CPU physical address size: 39 bits
1784 14:50:27.391574 MTRR: default type WB/UC MTRR counts: 6/8.
1785 14:50:27.394452 MTRR: WB selected as default type.
1786 14:50:27.401078 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1787 14:50:27.407645 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1788 14:50:27.414490 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1789 14:50:27.420705 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1790 14:50:27.427206 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1791 14:50:27.433684 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1792 14:50:27.437234 MTRR: Fixed MSR 0x250 0x0606060606060606
1793 14:50:27.439882 MTRR: Fixed MSR 0x258 0x0606060606060606
1794 14:50:27.446464 MTRR: Fixed MSR 0x259 0x0000000000000000
1795 14:50:27.449866 MTRR: Fixed MSR 0x268 0x0606060606060606
1796 14:50:27.453552 MTRR: Fixed MSR 0x269 0x0606060606060606
1797 14:50:27.456347 MTRR: Fixed MSR 0x26a 0x0606060606060606
1798 14:50:27.462662 MTRR: Fixed MSR 0x26b 0x0606060606060606
1799 14:50:27.466144 MTRR: Fixed MSR 0x26c 0x0606060606060606
1800 14:50:27.469487 MTRR: Fixed MSR 0x26d 0x0606060606060606
1801 14:50:27.472836 MTRR: Fixed MSR 0x26e 0x0606060606060606
1802 14:50:27.479154 MTRR: Fixed MSR 0x26f 0x0606060606060606
1803 14:50:27.482022 MTRR: Fixed MSR 0x250 0x0606060606060606
1804 14:50:27.485442 call enable_fixed_mtrr()
1805 14:50:27.489059 MTRR: Fixed MSR 0x258 0x0606060606060606
1806 14:50:27.491927 MTRR: Fixed MSR 0x259 0x0000000000000000
1807 14:50:27.498351 MTRR: Fixed MSR 0x268 0x0606060606060606
1808 14:50:27.501747 MTRR: Fixed MSR 0x269 0x0606060606060606
1809 14:50:27.505201 MTRR: Fixed MSR 0x26a 0x0606060606060606
1810 14:50:27.508170 MTRR: Fixed MSR 0x26b 0x0606060606060606
1811 14:50:27.514985 MTRR: Fixed MSR 0x26c 0x0606060606060606
1812 14:50:27.518293 MTRR: Fixed MSR 0x26d 0x0606060606060606
1813 14:50:27.521563 MTRR: Fixed MSR 0x26e 0x0606060606060606
1814 14:50:27.524659 MTRR: Fixed MSR 0x26f 0x0606060606060606
1815 14:50:27.530907 CPU physical address size: 39 bits
1816 14:50:27.531039 call enable_fixed_mtrr()
1817 14:50:27.537647 MTRR: Fixed MSR 0x250 0x0606060606060606
1818 14:50:27.541154 MTRR: Fixed MSR 0x250 0x0606060606060606
1819 14:50:27.544134 MTRR: Fixed MSR 0x258 0x0606060606060606
1820 14:50:27.547449 MTRR: Fixed MSR 0x259 0x0000000000000000
1821 14:50:27.554261 MTRR: Fixed MSR 0x268 0x0606060606060606
1822 14:50:27.556749 MTRR: Fixed MSR 0x269 0x0606060606060606
1823 14:50:27.560106 MTRR: Fixed MSR 0x26a 0x0606060606060606
1824 14:50:27.567283 MTRR: Fixed MSR 0x26b 0x0606060606060606
1825 14:50:27.569929 MTRR: Fixed MSR 0x26c 0x0606060606060606
1826 14:50:27.573259 MTRR: Fixed MSR 0x26d 0x0606060606060606
1827 14:50:27.576684 MTRR: Fixed MSR 0x26e 0x0606060606060606
1828 14:50:27.582919 MTRR: Fixed MSR 0x26f 0x0606060606060606
1829 14:50:27.586291 MTRR: Fixed MSR 0x258 0x0606060606060606
1830 14:50:27.589653 call enable_fixed_mtrr()
1831 14:50:27.593241 MTRR: Fixed MSR 0x259 0x0000000000000000
1832 14:50:27.596002 MTRR: Fixed MSR 0x268 0x0606060606060606
1833 14:50:27.599529 MTRR: Fixed MSR 0x269 0x0606060606060606
1834 14:50:27.605898 MTRR: Fixed MSR 0x26a 0x0606060606060606
1835 14:50:27.609390 MTRR: Fixed MSR 0x26b 0x0606060606060606
1836 14:50:27.612394 MTRR: Fixed MSR 0x26c 0x0606060606060606
1837 14:50:27.615820 MTRR: Fixed MSR 0x26d 0x0606060606060606
1838 14:50:27.622282 MTRR: Fixed MSR 0x26e 0x0606060606060606
1839 14:50:27.625665 MTRR: Fixed MSR 0x26f 0x0606060606060606
1840 14:50:27.628432 CPU physical address size: 39 bits
1841 14:50:27.632024 call enable_fixed_mtrr()
1842 14:50:27.634909 CPU physical address size: 39 bits
1843 14:50:27.638347 MTRR: Fixed MSR 0x250 0x0606060606060606
1844 14:50:27.638445
1845 14:50:27.641643 MTRR check
1846 14:50:27.645086 Fixed MTRRs : Enabled
1847 14:50:27.645212 Variable MTRRs: Enabled
1848 14:50:27.645312
1849 14:50:27.650977 MTRR: Fixed MSR 0x258 0x0606060606060606
1850 14:50:27.654419 MTRR: Fixed MSR 0x259 0x0000000000000000
1851 14:50:27.657856 MTRR: Fixed MSR 0x268 0x0606060606060606
1852 14:50:27.661428 MTRR: Fixed MSR 0x269 0x0606060606060606
1853 14:50:27.667535 MTRR: Fixed MSR 0x26a 0x0606060606060606
1854 14:50:27.670851 MTRR: Fixed MSR 0x26b 0x0606060606060606
1855 14:50:27.674226 MTRR: Fixed MSR 0x26c 0x0606060606060606
1856 14:50:27.677062 MTRR: Fixed MSR 0x26d 0x0606060606060606
1857 14:50:27.684034 MTRR: Fixed MSR 0x26e 0x0606060606060606
1858 14:50:27.687215 MTRR: Fixed MSR 0x26f 0x0606060606060606
1859 14:50:27.693413 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1860 14:50:27.693517 call enable_fixed_mtrr()
1861 14:50:27.700378 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1862 14:50:27.703317 CPU physical address size: 39 bits
1863 14:50:27.706691 CBFS @ c08000 size 3f8000
1864 14:50:27.712975 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1865 14:50:27.716614 CBFS: Locating 'fallback/payload'
1866 14:50:27.719366 MTRR: Fixed MSR 0x250 0x0606060606060606
1867 14:50:27.722918 MTRR: Fixed MSR 0x250 0x0606060606060606
1868 14:50:27.729363 MTRR: Fixed MSR 0x258 0x0606060606060606
1869 14:50:27.732636 MTRR: Fixed MSR 0x259 0x0000000000000000
1870 14:50:27.736553 MTRR: Fixed MSR 0x268 0x0606060606060606
1871 14:50:27.739436 MTRR: Fixed MSR 0x269 0x0606060606060606
1872 14:50:27.745797 MTRR: Fixed MSR 0x26a 0x0606060606060606
1873 14:50:27.749271 MTRR: Fixed MSR 0x26b 0x0606060606060606
1874 14:50:27.752618 MTRR: Fixed MSR 0x26c 0x0606060606060606
1875 14:50:27.755977 MTRR: Fixed MSR 0x26d 0x0606060606060606
1876 14:50:27.762638 MTRR: Fixed MSR 0x26e 0x0606060606060606
1877 14:50:27.765767 MTRR: Fixed MSR 0x26f 0x0606060606060606
1878 14:50:27.769016 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 14:50:27.772215 call enable_fixed_mtrr()
1880 14:50:27.775510 MTRR: Fixed MSR 0x259 0x0000000000000000
1881 14:50:27.781926 MTRR: Fixed MSR 0x268 0x0606060606060606
1882 14:50:27.784833 MTRR: Fixed MSR 0x269 0x0606060606060606
1883 14:50:27.788312 MTRR: Fixed MSR 0x26a 0x0606060606060606
1884 14:50:27.791879 MTRR: Fixed MSR 0x26b 0x0606060606060606
1885 14:50:27.798498 MTRR: Fixed MSR 0x26c 0x0606060606060606
1886 14:50:27.801218 MTRR: Fixed MSR 0x26d 0x0606060606060606
1887 14:50:27.804858 MTRR: Fixed MSR 0x26e 0x0606060606060606
1888 14:50:27.807706 MTRR: Fixed MSR 0x26f 0x0606060606060606
1889 14:50:27.811252 CPU physical address size: 39 bits
1890 14:50:27.814632 call enable_fixed_mtrr()
1891 14:50:27.817551 CPU physical address size: 39 bits
1892 14:50:27.821228 CPU physical address size: 39 bits
1893 14:50:27.827506 CBFS: Found @ offset 1c96c0 size 3f798
1894 14:50:27.831207 Checking segment from ROM address 0xffdd16f8
1895 14:50:27.833937 Checking segment from ROM address 0xffdd1714
1896 14:50:27.840692 Loading segment from ROM address 0xffdd16f8
1897 14:50:27.841154 code (compression=0)
1898 14:50:27.850514 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1899 14:50:27.860378 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1900 14:50:27.860804 it's not compressed!
1901 14:50:27.953586 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1902 14:50:27.959976 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1903 14:50:27.966115 Loading segment from ROM address 0xffdd1714
1904 14:50:27.966624 Entry Point 0x30000000
1905 14:50:27.969413 Loaded segments
1906 14:50:27.975731 Finalizing chipset.
1907 14:50:27.979225 Finalizing SMM.
1908 14:50:27.981970 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1909 14:50:27.985326 mp_park_aps done after 0 msecs.
1910 14:50:27.991830 Jumping to boot code at 30000000(99b62000)
1911 14:50:27.998728 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1912 14:50:27.999174
1913 14:50:27.999676
1914 14:50:28.000191
1915 14:50:28.001946 Starting depthcharge on Helios...
1916 14:50:28.003249 end: 2.2.3 depthcharge-start (duration 00:00:02) [common]
1917 14:50:28.003919 start: 2.2.4 bootloader-commands (timeout 00:04:49) [common]
1918 14:50:28.004400 Setting prompt string to ['hatch:']
1919 14:50:28.004917 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:49)
1920 14:50:28.005700
1921 14:50:28.011736 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1922 14:50:28.012206
1923 14:50:28.017942 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1924 14:50:28.018392
1925 14:50:28.024260 board_setup: Info: eMMC controller not present; skipping
1926 14:50:28.024972
1927 14:50:28.027606 New NVMe Controller 0x30053ac0 @ 00:1d:00
1928 14:50:28.028062
1929 14:50:28.034059 board_setup: Info: SDHCI controller not present; skipping
1930 14:50:28.034540
1931 14:50:28.041090 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1932 14:50:28.041536
1933 14:50:28.041911 Wipe memory regions:
1934 14:50:28.043811
1935 14:50:28.047220 [0x00000000001000, 0x000000000a0000)
1936 14:50:28.047757
1937 14:50:28.050587 [0x00000000100000, 0x00000030000000)
1938 14:50:28.113014
1939 14:50:28.116458 [0x00000030657430, 0x00000099a2c000)
1940 14:50:28.253206
1941 14:50:28.256821 [0x00000100000000, 0x0000045e800000)
1942 14:50:29.639480
1943 14:50:29.639966 R8152: Initializing
1944 14:50:29.640467
1945 14:50:29.642488 Version 9 (ocp_data = 6010)
1946 14:50:29.646495
1947 14:50:29.646980 R8152: Done initializing
1948 14:50:29.647316
1949 14:50:29.649624 Adding net device
1950 14:50:30.282150
1951 14:50:30.282306 R8152: Initializing
1952 14:50:30.282391
1953 14:50:30.285147 Version 6 (ocp_data = 5c30)
1954 14:50:30.285252
1955 14:50:30.288745 R8152: Done initializing
1956 14:50:30.288929
1957 14:50:30.295391 net_add_device: Attemp to include the same device
1958 14:50:30.295566
1959 14:50:30.301998 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1960 14:50:30.302213
1961 14:50:30.302334
1962 14:50:30.302735 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1964 14:50:30.403489 hatch: tftpboot 192.168.201.1 14064488/tftp-deploy-8drztobv/kernel/bzImage 14064488/tftp-deploy-8drztobv/kernel/cmdline 14064488/tftp-deploy-8drztobv/ramdisk/ramdisk.cpio.gz
1965 14:50:30.403726 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1966 14:50:30.403883 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
1967 14:50:30.408135 tftpboot 192.168.201.1 14064488/tftp-deploy-8drztobv/kernel/bzIloy-8drztobv/kernel/cmdline 14064488/tftp-deploy-8drztobv/ramdisk/ramdisk.cpio.gz
1968 14:50:30.408248
1969 14:50:30.408330 Waiting for link
1970 14:50:30.608810
1971 14:50:30.609480 done.
1972 14:50:30.609998
1973 14:50:30.610516 MAC: 00:24:32:30:7f:7f
1974 14:50:30.610898
1975 14:50:30.612355 Sending DHCP discover... done.
1976 14:50:30.612811
1977 14:50:30.615730 Waiting for reply... done.
1978 14:50:30.616179
1979 14:50:30.618514 Sending DHCP request... done.
1980 14:50:30.618996
1981 14:50:30.621930 Waiting for reply... done.
1982 14:50:30.622355
1983 14:50:30.625495 My ip is 192.168.201.15
1984 14:50:30.625919
1985 14:50:30.629003 The DHCP server ip is 192.168.201.1
1986 14:50:30.629431
1987 14:50:30.631832 TFTP server IP predefined by user: 192.168.201.1
1988 14:50:30.632259
1989 14:50:30.641464 Bootfile predefined by user: 14064488/tftp-deploy-8drztobv/kernel/bzImage
1990 14:50:30.642043
1991 14:50:30.644844 Sending tftp read request... done.
1992 14:50:30.645318
1993 14:50:30.652657 Waiting for the transfer...
1994 14:50:30.653114
1995 14:50:31.319019 00000000 ################################################################
1996 14:50:31.319544
1997 14:50:31.910961 00080000 ################################################################
1998 14:50:31.911141
1999 14:50:32.435687 00100000 ################################################################
2000 14:50:32.435875
2001 14:50:32.952058 00180000 ################################################################
2002 14:50:32.952242
2003 14:50:33.471883 00200000 ################################################################
2004 14:50:33.472042
2005 14:50:33.992530 00280000 ################################################################
2006 14:50:33.992684
2007 14:50:34.518422 00300000 ################################################################
2008 14:50:34.518555
2009 14:50:35.034743 00380000 ################################################################
2010 14:50:35.034879
2011 14:50:35.560313 00400000 ################################################################
2012 14:50:35.560445
2013 14:50:36.097271 00480000 ################################################################
2014 14:50:36.097412
2015 14:50:36.636340 00500000 ################################################################
2016 14:50:36.636514
2017 14:50:37.178304 00580000 ################################################################
2018 14:50:37.178469
2019 14:50:37.709487 00600000 ################################################################
2020 14:50:37.709625
2021 14:50:38.239503 00680000 ################################################################
2022 14:50:38.239667
2023 14:50:38.773295 00700000 ################################################################
2024 14:50:38.773432
2025 14:50:39.321735 00780000 ################################################################
2026 14:50:39.321877
2027 14:50:39.858305 00800000 ################################################################
2028 14:50:39.858455
2029 14:50:40.387697 00880000 ################################################################
2030 14:50:40.387868
2031 14:50:40.916994 00900000 ################################################################
2032 14:50:40.917171
2033 14:50:41.438726 00980000 ################################################################
2034 14:50:41.438902
2035 14:50:41.958480 00a00000 ################################################################
2036 14:50:41.958617
2037 14:50:42.483867 00a80000 ################################################################
2038 14:50:42.484098
2039 14:50:42.993136 00b00000 ################################################################
2040 14:50:42.993292
2041 14:50:43.503693 00b80000 ################################################################
2042 14:50:43.503853
2043 14:50:44.018631 00c00000 ################################################################
2044 14:50:44.018779
2045 14:50:44.524574 00c80000 ################################################################
2046 14:50:44.524764
2047 14:50:45.047955 00d00000 ################################################################
2048 14:50:45.048113
2049 14:50:45.570413 00d80000 ################################################################
2050 14:50:45.570570
2051 14:50:46.084519 00e00000 ################################################################
2052 14:50:46.084685
2053 14:50:46.600774 00e80000 ################################################################
2054 14:50:46.600926
2055 14:50:47.120016 00f00000 ################################################################
2056 14:50:47.120186
2057 14:50:47.640820 00f80000 ################################################################
2058 14:50:47.640981
2059 14:50:47.983270 01000000 ########################################### done.
2060 14:50:47.983405
2061 14:50:47.986441 The bootfile was 17121280 bytes long.
2062 14:50:47.986526
2063 14:50:47.989761 Sending tftp read request... done.
2064 14:50:47.989870
2065 14:50:47.992557 Waiting for the transfer...
2066 14:50:47.992662
2067 14:50:48.509878 00000000 ################################################################
2068 14:50:48.510023
2069 14:50:49.038532 00080000 ################################################################
2070 14:50:49.038670
2071 14:50:49.554403 00100000 ################################################################
2072 14:50:49.554541
2073 14:50:50.080347 00180000 ################################################################
2074 14:50:50.080508
2075 14:50:50.605968 00200000 ################################################################
2076 14:50:50.606105
2077 14:50:51.132283 00280000 ################################################################
2078 14:50:51.132419
2079 14:50:51.668020 00300000 ################################################################
2080 14:50:51.668157
2081 14:50:52.189989 00380000 ################################################################
2082 14:50:52.190154
2083 14:50:52.712397 00400000 ################################################################
2084 14:50:52.712566
2085 14:50:53.238250 00480000 ################################################################
2086 14:50:53.238385
2087 14:50:53.785810 00500000 ################################################################
2088 14:50:53.785968
2089 14:50:54.348706 00580000 ################################################################
2090 14:50:54.348865
2091 14:50:54.903769 00600000 ################################################################
2092 14:50:54.903907
2093 14:50:55.452474 00680000 ################################################################
2094 14:50:55.452608
2095 14:50:55.994586 00700000 ################################################################
2096 14:50:55.994739
2097 14:50:56.552957 00780000 ################################################################
2098 14:50:56.553087
2099 14:50:57.115813 00800000 ################################################################
2100 14:50:57.115949
2101 14:50:57.661989 00880000 ################################################################
2102 14:50:57.662130
2103 14:50:58.189724 00900000 ################################################################
2104 14:50:58.189855
2105 14:50:58.567295 00980000 ############################################## done.
2106 14:50:58.567468
2107 14:50:58.570739 Sending tftp read request... done.
2108 14:50:58.570874
2109 14:50:58.574239 Waiting for the transfer...
2110 14:50:58.574338
2111 14:50:58.574403 00000000 # done.
2112 14:50:58.574466
2113 14:50:58.583710 Command line loaded dynamically from TFTP file: 14064488/tftp-deploy-8drztobv/kernel/cmdline
2114 14:50:58.583797
2115 14:50:58.603390 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2116 14:50:58.603550
2117 14:50:58.609891 ec_init(0): CrosEC protocol v3 supported (256, 256)
2118 14:50:58.615766
2119 14:50:58.618601 Shutting down all USB controllers.
2120 14:50:58.618740
2121 14:50:58.618847 Removing current net device
2122 14:50:58.622804
2123 14:50:58.623026 Finalizing coreboot
2124 14:50:58.623227
2125 14:50:58.628734 Exiting depthcharge with code 4 at timestamp: 38110885
2126 14:50:58.628992
2127 14:50:58.629157
2128 14:50:58.629305 Starting kernel ...
2129 14:50:58.630175 end: 2.2.4 bootloader-commands (duration 00:00:31) [common]
2130 14:50:58.630405 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2131 14:50:58.630583 Setting prompt string to ['Linux version [0-9]']
2132 14:50:58.630760 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2133 14:50:58.630924 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2134 14:50:58.632211
2135 14:50:58.632412
2137 14:55:16.630678 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2139 14:55:16.630986 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2141 14:55:16.631232 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2144 14:55:16.631645 end: 2 depthcharge-action (duration 00:05:00) [common]
2146 14:55:16.632003 Cleaning after the job
2147 14:55:16.632097 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064488/tftp-deploy-8drztobv/ramdisk
2148 14:55:16.633439 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064488/tftp-deploy-8drztobv/kernel
2149 14:55:16.635383 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064488/tftp-deploy-8drztobv/modules
2150 14:55:16.636517 start: 4.1 power-off (timeout 00:00:30) [common]
2151 14:55:16.636795 Calling: ['pduclient', '--daemon=localhost', '--hostname=asus-C436FA-Flip-hatch-cbg-2', '--port=1', '--command=off']
2152 14:55:17.468773 >> Command sent successfully.
2153 14:55:17.479457 Returned 0 in 0 seconds
2154 14:55:17.580960 end: 4.1 power-off (duration 00:00:01) [common]
2156 14:55:17.583459 start: 4.2 read-feedback (timeout 00:09:59) [common]
2157 14:55:17.584761 Listened to connection for namespace 'common' for up to 1s
2159 14:55:17.586606 Listened to connection for namespace 'common' for up to 1s
2160 14:55:17.588191 Listened to connection for namespace 'common' for up to 1s
2161 14:55:17.590538 Listened to connection for namespace 'common' for up to 1s
2162 14:55:17.593335 Listened to connection for namespace 'common' for up to 1s
2163 14:55:17.596368 Listened to connection for namespace 'common' for up to 1s
2164 14:55:17.599466 Listened to connection for namespace 'common' for up to 1s
2165 14:55:17.602872 Listened to connection for namespace 'common' for up to 1s
2166 14:55:17.606254 Listened to connection for namespace 'common' for up to 1s
2167 14:55:17.608879 Listened to connection for namespace 'common' for up to 1s
2168 14:55:17.612209 Listened to connection for namespace 'common' for up to 1s
2169 14:55:17.615421 Listened to connection for namespace 'common' for up to 1s
2170 14:55:17.618766 Listened to connection for namespace 'common' for up to 1s
2171 14:55:17.622062 Listened to connection for namespace 'common' for up to 1s
2172 14:55:17.625271 Listened to connection for namespace 'common' for up to 1s
2173 14:55:17.628475 Listened to connection for namespace 'common' for up to 1s
2174 14:55:17.631560 Listened to connection for namespace 'common' for up to 1s
2175 14:55:17.635399 Listened to connection for namespace 'common' for up to 1s
2176 14:55:17.638740 Listened to connection for namespace 'common' for up to 1s
2177 14:55:17.641562 Listened to connection for namespace 'common' for up to 1s
2178 14:55:17.644792 Listened to connection for namespace 'common' for up to 1s
2179 14:55:17.648065 Listened to connection for namespace 'common' for up to 1s
2180 14:55:17.651447 Listened to connection for namespace 'common' for up to 1s
2181 14:55:17.654840 Listened to connection for namespace 'common' for up to 1s
2182 14:55:17.658041 Listened to connection for namespace 'common' for up to 1s
2183 14:55:17.661092 Listened to connection for namespace 'common' for up to 1s
2184 14:55:17.664171 Listened to connection for namespace 'common' for up to 1s
2185 14:55:17.667525 Listened to connection for namespace 'common' for up to 1s
2186 14:55:17.670737 Listened to connection for namespace 'common' for up to 1s
2187 14:55:17.675468 Listened to connection for namespace 'common' for up to 1s
2188 14:55:17.678972 Listened to connection for namespace 'common' for up to 1s
2189 14:55:17.681753 Listened to connection for namespace 'common' for up to 1s
2190 14:55:17.685353 Listened to connection for namespace 'common' for up to 1s
2191 14:55:17.688714 Listened to connection for namespace 'common' for up to 1s
2192 14:55:17.691861 Listened to connection for namespace 'common' for up to 1s
2193 14:55:17.695098 Listened to connection for namespace 'common' for up to 1s
2194 14:55:17.698554 Listened to connection for namespace 'common' for up to 1s
2195 14:55:17.702002 Listened to connection for namespace 'common' for up to 1s
2196 14:55:17.705239 Listened to connection for namespace 'common' for up to 1s
2197 14:55:17.707888 Listened to connection for namespace 'common' for up to 1s
2198 14:55:17.711211 Listened to connection for namespace 'common' for up to 1s
2199 14:55:17.714545 Listened to connection for namespace 'common' for up to 1s
2200 14:55:17.717920 Listened to connection for namespace 'common' for up to 1s
2201 14:55:17.721073 Listened to connection for namespace 'common' for up to 1s
2202 14:55:17.724259 Listened to connection for namespace 'common' for up to 1s
2203 14:55:17.727863 Listened to connection for namespace 'common' for up to 1s
2204 14:55:17.731315 Listened to connection for namespace 'common' for up to 1s
2205 14:55:17.737304 Listened to connection for namespace 'common' for up to 1s
2206 14:55:17.740714 Listened to connection for namespace 'common' for up to 1s
2207 14:55:18.584940 Finalising connection for namespace 'common'
2208 14:55:18.585149 Disconnecting from shell: Finalise
2209 14:55:18.585261
2210 14:55:18.685825 end: 4.2 read-feedback (duration 00:00:01) [common]
2211 14:55:18.685988 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14064488
2212 14:55:18.706420 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14064488
2213 14:55:18.706636 JobError: Your job cannot terminate cleanly.