Boot log: acer-cp514-2h-1130g7-volteer

    1 14:49:45.695783  lava-dispatcher, installed at version: 2024.03
    2 14:49:45.696007  start: 0 validate
    3 14:49:45.696148  Start time: 2024-05-28 14:49:45.696140+00:00 (UTC)
    4 14:49:45.696274  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:49:45.696403  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
    6 14:49:45.957017  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:49:45.957205  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.312-cip109-160-gd72fa2f84aefe%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:49:46.214180  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:49:46.214350  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 14:50:05.896806  Using caching service: 'http://localhost/cache/?uri=%s'
   11 14:50:05.897043  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.312-cip109-160-gd72fa2f84aefe%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   12 14:50:06.158256  validate duration: 20.46
   14 14:50:06.158524  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 14:50:06.158631  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 14:50:06.158725  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 14:50:06.158857  Not decompressing ramdisk as can be used compressed.
   18 14:50:06.158941  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/amd64/initrd.cpio.gz
   19 14:50:06.159004  saving as /var/lib/lava/dispatcher/tmp/14064447/tftp-deploy-903tncb7/ramdisk/initrd.cpio.gz
   20 14:50:06.159066  total size: 6137767 (5 MB)
   21 14:50:07.192843  progress   0 % (0 MB)
   22 14:50:07.194965  progress   5 % (0 MB)
   23 14:50:07.196646  progress  10 % (0 MB)
   24 14:50:07.198563  progress  15 % (0 MB)
   25 14:50:07.200279  progress  20 % (1 MB)
   26 14:50:07.202145  progress  25 % (1 MB)
   27 14:50:07.203979  progress  30 % (1 MB)
   28 14:50:07.205638  progress  35 % (2 MB)
   29 14:50:07.207310  progress  40 % (2 MB)
   30 14:50:07.209275  progress  45 % (2 MB)
   31 14:50:07.210946  progress  50 % (2 MB)
   32 14:50:07.212680  progress  55 % (3 MB)
   33 14:50:07.214294  progress  60 % (3 MB)
   34 14:50:07.215991  progress  65 % (3 MB)
   35 14:50:07.217813  progress  70 % (4 MB)
   36 14:50:07.219429  progress  75 % (4 MB)
   37 14:50:07.221087  progress  80 % (4 MB)
   38 14:50:07.222883  progress  85 % (5 MB)
   39 14:50:07.224445  progress  90 % (5 MB)
   40 14:50:07.226153  progress  95 % (5 MB)
   41 14:50:07.227907  progress 100 % (5 MB)
   42 14:50:07.228091  5 MB downloaded in 1.07 s (5.48 MB/s)
   43 14:50:07.228278  end: 1.1.1 http-download (duration 00:00:01) [common]
   45 14:50:07.228560  end: 1.1 download-retry (duration 00:00:01) [common]
   46 14:50:07.228677  start: 1.2 download-retry (timeout 00:09:59) [common]
   47 14:50:07.228792  start: 1.2.1 http-download (timeout 00:09:59) [common]
   48 14:50:07.228939  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.312-cip109-160-gd72fa2f84aefe/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   49 14:50:07.229025  saving as /var/lib/lava/dispatcher/tmp/14064447/tftp-deploy-903tncb7/kernel/bzImage
   50 14:50:07.229091  total size: 17121280 (16 MB)
   51 14:50:07.229154  No compression specified
   52 14:50:07.230599  progress   0 % (0 MB)
   53 14:50:07.235325  progress   5 % (0 MB)
   54 14:50:07.240139  progress  10 % (1 MB)
   55 14:50:07.244836  progress  15 % (2 MB)
   56 14:50:07.249550  progress  20 % (3 MB)
   57 14:50:07.254258  progress  25 % (4 MB)
   58 14:50:07.258959  progress  30 % (4 MB)
   59 14:50:07.263581  progress  35 % (5 MB)
   60 14:50:07.268392  progress  40 % (6 MB)
   61 14:50:07.273305  progress  45 % (7 MB)
   62 14:50:07.278160  progress  50 % (8 MB)
   63 14:50:07.282935  progress  55 % (9 MB)
   64 14:50:07.287601  progress  60 % (9 MB)
   65 14:50:07.292355  progress  65 % (10 MB)
   66 14:50:07.297135  progress  70 % (11 MB)
   67 14:50:07.302043  progress  75 % (12 MB)
   68 14:50:07.306727  progress  80 % (13 MB)
   69 14:50:07.311463  progress  85 % (13 MB)
   70 14:50:07.316037  progress  90 % (14 MB)
   71 14:50:07.320560  progress  95 % (15 MB)
   72 14:50:07.325051  progress 100 % (16 MB)
   73 14:50:07.325315  16 MB downloaded in 0.10 s (169.70 MB/s)
   74 14:50:07.325495  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 14:50:07.325859  end: 1.2 download-retry (duration 00:00:00) [common]
   77 14:50:07.325998  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 14:50:07.326103  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 14:50:07.326265  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/amd64/full.rootfs.tar.xz
   80 14:50:07.326365  saving as /var/lib/lava/dispatcher/tmp/14064447/tftp-deploy-903tncb7/nfsrootfs/full.rootfs.tar
   81 14:50:07.326448  total size: 116951716 (111 MB)
   82 14:50:07.326551  Using unxz to decompress xz
   83 14:50:07.331318  progress   0 % (0 MB)
   84 14:50:07.643035  progress   5 % (5 MB)
   85 14:50:08.088178  progress  10 % (11 MB)
   86 14:50:08.473051  progress  15 % (16 MB)
   87 14:50:08.826205  progress  20 % (22 MB)
   88 14:50:09.129498  progress  25 % (27 MB)
   89 14:50:09.463157  progress  30 % (33 MB)
   90 14:50:09.859574  progress  35 % (39 MB)
   91 14:50:10.055650  progress  40 % (44 MB)
   92 14:50:10.344046  progress  45 % (50 MB)
   93 14:50:10.706016  progress  50 % (55 MB)
   94 14:50:11.022571  progress  55 % (61 MB)
   95 14:50:11.430680  progress  60 % (66 MB)
   96 14:50:11.804795  progress  65 % (72 MB)
   97 14:50:12.181084  progress  70 % (78 MB)
   98 14:50:12.562336  progress  75 % (83 MB)
   99 14:50:12.907490  progress  80 % (89 MB)
  100 14:50:13.268513  progress  85 % (94 MB)
  101 14:50:13.632932  progress  90 % (100 MB)
  102 14:50:13.958342  progress  95 % (105 MB)
  103 14:50:14.309802  progress 100 % (111 MB)
  104 14:50:14.314457  111 MB downloaded in 6.99 s (15.96 MB/s)
  105 14:50:14.314702  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 14:50:14.314959  end: 1.3 download-retry (duration 00:00:07) [common]
  108 14:50:14.315050  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 14:50:14.315138  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 14:50:14.315290  downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.312-cip109-160-gd72fa2f84aefe/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
  111 14:50:14.315362  saving as /var/lib/lava/dispatcher/tmp/14064447/tftp-deploy-903tncb7/modules/modules.tar
  112 14:50:14.315423  total size: 1253532 (1 MB)
  113 14:50:14.315486  Using unxz to decompress xz
  114 14:50:14.319672  progress   2 % (0 MB)
  115 14:50:14.320239  progress   7 % (0 MB)
  116 14:50:14.323977  progress  13 % (0 MB)
  117 14:50:14.327907  progress  18 % (0 MB)
  118 14:50:14.332037  progress  23 % (0 MB)
  119 14:50:14.335627  progress  28 % (0 MB)
  120 14:50:14.339458  progress  33 % (0 MB)
  121 14:50:14.343561  progress  39 % (0 MB)
  122 14:50:14.347469  progress  44 % (0 MB)
  123 14:50:14.350708  progress  49 % (0 MB)
  124 14:50:14.354917  progress  54 % (0 MB)
  125 14:50:14.358625  progress  60 % (0 MB)
  126 14:50:14.362881  progress  65 % (0 MB)
  127 14:50:14.366868  progress  70 % (0 MB)
  128 14:50:14.370175  progress  75 % (0 MB)
  129 14:50:14.374129  progress  81 % (0 MB)
  130 14:50:14.378580  progress  86 % (1 MB)
  131 14:50:14.382921  progress  91 % (1 MB)
  132 14:50:14.387558  progress  96 % (1 MB)
  133 14:50:14.398758  1 MB downloaded in 0.08 s (14.35 MB/s)
  134 14:50:14.399166  end: 1.4.1 http-download (duration 00:00:00) [common]
  136 14:50:14.399713  end: 1.4 download-retry (duration 00:00:00) [common]
  137 14:50:14.399868  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  138 14:50:14.400022  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  139 14:50:16.477255  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14064447/extract-nfsrootfs-z1k5s3ar
  140 14:50:16.477461  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  141 14:50:16.477564  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  142 14:50:16.477737  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r
  143 14:50:16.477868  makedir: /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin
  144 14:50:16.478003  makedir: /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/tests
  145 14:50:16.478100  makedir: /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/results
  146 14:50:16.478200  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-add-keys
  147 14:50:16.478342  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-add-sources
  148 14:50:16.478469  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-background-process-start
  149 14:50:16.478594  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-background-process-stop
  150 14:50:16.478717  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-common-functions
  151 14:50:16.478839  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-echo-ipv4
  152 14:50:16.478961  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-install-packages
  153 14:50:16.479083  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-installed-packages
  154 14:50:16.479202  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-os-build
  155 14:50:16.479323  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-probe-channel
  156 14:50:16.479445  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-probe-ip
  157 14:50:16.479565  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-target-ip
  158 14:50:16.479687  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-target-mac
  159 14:50:16.479812  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-target-storage
  160 14:50:16.479935  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-test-case
  161 14:50:16.480056  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-test-event
  162 14:50:16.480174  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-test-feedback
  163 14:50:16.480295  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-test-raise
  164 14:50:16.480415  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-test-reference
  165 14:50:16.480537  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-test-runner
  166 14:50:16.480657  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-test-set
  167 14:50:16.480776  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-test-shell
  168 14:50:16.480899  Updating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-install-packages (oe)
  169 14:50:16.595899  Updating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/bin/lava-installed-packages (oe)
  170 14:50:16.596119  Creating /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/environment
  171 14:50:16.596233  LAVA metadata
  172 14:50:16.596329  - LAVA_JOB_ID=14064447
  173 14:50:16.596413  - LAVA_DISPATCHER_IP=192.168.201.1
  174 14:50:16.596532  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  175 14:50:16.596602  skipped lava-vland-overlay
  176 14:50:16.596679  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  177 14:50:16.596759  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  178 14:50:16.596820  skipped lava-multinode-overlay
  179 14:50:16.596893  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  180 14:50:16.597002  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  181 14:50:16.597099  Loading test definitions
  182 14:50:16.597191  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
  183 14:50:16.597266  Using /lava-14064447 at stage 0
  184 14:50:16.597607  uuid=14064447_1.5.2.3.1 testdef=None
  185 14:50:16.597695  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  186 14:50:16.597780  start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
  187 14:50:16.598313  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  189 14:50:16.598531  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
  190 14:50:16.599161  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  192 14:50:16.599401  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
  193 14:50:16.611437  runner path: /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/0/tests/0_dmesg test_uuid 14064447_1.5.2.3.1
  194 14:50:16.611635  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  196 14:50:16.611843  Creating lava-test-runner.conf files
  197 14:50:16.611906  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14064447/lava-overlay-4m6sdo1r/lava-14064447/0 for stage 0
  198 14:50:16.611998  - 0_dmesg
  199 14:50:16.612095  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  200 14:50:16.612181  start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
  201 14:50:16.618176  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  202 14:50:16.618290  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
  203 14:50:16.618376  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  204 14:50:16.618479  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  205 14:50:16.618564  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
  206 14:50:16.773676  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  207 14:50:16.774051  start: 1.5.4 extract-modules (timeout 00:09:49) [common]
  208 14:50:16.774163  extracting modules file /var/lib/lava/dispatcher/tmp/14064447/tftp-deploy-903tncb7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14064447/extract-nfsrootfs-z1k5s3ar
  209 14:50:16.805811  extracting modules file /var/lib/lava/dispatcher/tmp/14064447/tftp-deploy-903tncb7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14064447/extract-overlay-ramdisk-wbtl22qq/ramdisk
  210 14:50:16.838383  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  211 14:50:16.838556  start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
  212 14:50:16.838653  [common] Applying overlay to NFS
  213 14:50:16.838722  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14064447/compress-overlay-kcjaaivn/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14064447/extract-nfsrootfs-z1k5s3ar
  214 14:50:16.845231  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  215 14:50:16.845347  start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
  216 14:50:16.845435  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  217 14:50:16.845524  start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
  218 14:50:16.845604  Building ramdisk /var/lib/lava/dispatcher/tmp/14064447/extract-overlay-ramdisk-wbtl22qq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14064447/extract-overlay-ramdisk-wbtl22qq/ramdisk
  219 14:50:17.011492  >> 43506 blocks

  220 14:50:17.849022  rename /var/lib/lava/dispatcher/tmp/14064447/extract-overlay-ramdisk-wbtl22qq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14064447/tftp-deploy-903tncb7/ramdisk/ramdisk.cpio.gz
  221 14:50:17.849478  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  222 14:50:17.849604  start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
  223 14:50:17.849704  start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
  224 14:50:17.849795  No mkimage arch provided, not using FIT.
  225 14:50:17.849882  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  226 14:50:17.849968  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  227 14:50:17.850068  end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
  228 14:50:17.850157  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
  229 14:50:17.850238  No LXC device requested
  230 14:50:17.850321  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  231 14:50:17.850412  start: 1.7 deploy-device-env (timeout 00:09:48) [common]
  232 14:50:17.850495  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  233 14:50:17.850572  Checking files for TFTP limit of 4294967296 bytes.
  234 14:50:17.850973  end: 1 tftp-deploy (duration 00:00:12) [common]
  235 14:50:17.851078  start: 2 depthcharge-action (timeout 00:05:00) [common]
  236 14:50:17.851172  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  237 14:50:17.851294  substitutions:
  238 14:50:17.851369  - {DTB}: None
  239 14:50:17.851444  - {INITRD}: 14064447/tftp-deploy-903tncb7/ramdisk/ramdisk.cpio.gz
  240 14:50:17.851505  - {KERNEL}: 14064447/tftp-deploy-903tncb7/kernel/bzImage
  241 14:50:17.851563  - {LAVA_MAC}: None
  242 14:50:17.851619  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14064447/extract-nfsrootfs-z1k5s3ar
  243 14:50:17.851678  - {NFS_SERVER_IP}: 192.168.201.1
  244 14:50:17.851733  - {PRESEED_CONFIG}: None
  245 14:50:17.851789  - {PRESEED_LOCAL}: None
  246 14:50:17.851842  - {RAMDISK}: 14064447/tftp-deploy-903tncb7/ramdisk/ramdisk.cpio.gz
  247 14:50:17.851897  - {ROOT_PART}: None
  248 14:50:17.851992  - {ROOT}: None
  249 14:50:17.852089  - {SERVER_IP}: 192.168.201.1
  250 14:50:17.852177  - {TEE}: None
  251 14:50:17.852303  Parsed boot commands:
  252 14:50:17.852381  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  253 14:50:17.852641  Parsed boot commands: tftpboot 192.168.201.1 14064447/tftp-deploy-903tncb7/kernel/bzImage 14064447/tftp-deploy-903tncb7/kernel/cmdline 14064447/tftp-deploy-903tncb7/ramdisk/ramdisk.cpio.gz
  254 14:50:17.852779  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  255 14:50:17.852898  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  256 14:50:17.853027  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  257 14:50:17.853115  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  258 14:50:17.853221  Not connected, no need to disconnect.
  259 14:50:17.853329  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  260 14:50:17.853446  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  261 14:50:17.853547  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-9'
  262 14:50:17.857425  Setting prompt string to ['lava-test: # ']
  263 14:50:17.857826  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  264 14:50:17.857951  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  265 14:50:17.858081  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  266 14:50:17.858203  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  267 14:50:17.858439  Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-9', '--port=1', '--command=reboot']
  268 14:50:22.998143  >> Command sent successfully.

  269 14:50:23.000722  Returned 0 in 5 seconds
  270 14:50:23.101188  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  272 14:50:23.101535  end: 2.2.2 reset-device (duration 00:00:05) [common]
  273 14:50:23.101640  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  274 14:50:23.101730  Setting prompt string to 'Starting depthcharge on Voema...'
  275 14:50:23.101800  Changing prompt to 'Starting depthcharge on Voema...'
  276 14:50:23.101865  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  277 14:50:23.102252  [Enter `^Ec?' for help]

  278 14:50:24.733606  

  279 14:50:24.733760  

  280 14:50:24.743213  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  281 14:50:24.750254  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  282 14:50:24.753750  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  283 14:50:24.757169  CPU: AES supported, TXT NOT supported, VT supported

  284 14:50:24.763742  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  285 14:50:24.769962  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  286 14:50:24.773792  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  287 14:50:24.776655  VBOOT: Loading verstage.

  288 14:50:24.779947  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  289 14:50:24.786729  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  290 14:50:24.790335  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  291 14:50:24.800561  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  292 14:50:24.807225  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  293 14:50:24.807363  

  294 14:50:24.807428  

  295 14:50:24.820720  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  296 14:50:24.834334  Probing TPM: . done!

  297 14:50:24.837761  TPM ready after 0 ms

  298 14:50:24.840950  Connected to device vid:did:rid of 1ae0:0028:00

  299 14:50:24.852002  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  300 14:50:24.858726  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  301 14:50:24.862113  Initialized TPM device CR50 revision 0

  302 14:50:24.911493  tlcl_send_startup: Startup return code is 0

  303 14:50:24.911638  TPM: setup succeeded

  304 14:50:24.927321  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  305 14:50:24.941224  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  306 14:50:24.954001  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  307 14:50:24.963787  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  308 14:50:24.967974  Chrome EC: UHEPI supported

  309 14:50:24.970798  Phase 1

  310 14:50:24.974235  FMAP: area GBB found @ 1805000 (458752 bytes)

  311 14:50:24.981025  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  312 14:50:24.991250  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  313 14:50:24.997355  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  314 14:50:25.004091  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  315 14:50:25.007481  Recovery requested (1009000e)

  316 14:50:25.010869  TPM: Extending digest for VBOOT: boot mode into PCR 0

  317 14:50:25.022314  tlcl_extend: response is 0

  318 14:50:25.029343  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  319 14:50:25.038848  tlcl_extend: response is 0

  320 14:50:25.045469  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  321 14:50:25.052393  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  322 14:50:25.059095  BS: verstage times (exec / console): total (unknown) / 142 ms

  323 14:50:25.059177  

  324 14:50:25.059246  

  325 14:50:25.072575  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  326 14:50:25.075412  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  327 14:50:25.082909  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  328 14:50:25.086218  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  329 14:50:25.089549  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  330 14:50:25.096446  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  331 14:50:25.099732  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  332 14:50:25.103030  TCO_STS:   0000 0000

  333 14:50:25.106442  GEN_PMCON: d0015038 00002200

  334 14:50:25.109359  GBLRST_CAUSE: 00000000 00000000

  335 14:50:25.109496  HPR_CAUSE0: 00000000

  336 14:50:25.112992  prev_sleep_state 5

  337 14:50:25.116370  Boot Count incremented to 30335

  338 14:50:25.123172  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  339 14:50:25.129348  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  340 14:50:25.136355  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  341 14:50:25.142676  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  342 14:50:25.146698  Chrome EC: UHEPI supported

  343 14:50:25.153291  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  344 14:50:25.165961  Probing TPM:  done!

  345 14:50:25.172855  Connected to device vid:did:rid of 1ae0:0028:00

  346 14:50:25.184130  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  347 14:50:25.190803  Initialized TPM device CR50 revision 0

  348 14:50:25.201633  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  349 14:50:25.208228  MRC: Hash idx 0x100b comparison successful.

  350 14:50:25.211565  MRC cache found, size faa8

  351 14:50:25.211678  bootmode is set to: 2

  352 14:50:25.214928  SPD index = 0

  353 14:50:25.221165  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  354 14:50:25.224661  SPD: module type is LPDDR4X

  355 14:50:25.227821  SPD: module part number is MT53E512M64D4NW-046

  356 14:50:25.234762  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  357 14:50:25.238303  SPD: device width 16 bits, bus width 16 bits

  358 14:50:25.244856  SPD: module size is 1024 MB (per channel)

  359 14:50:25.677782  CBMEM:

  360 14:50:25.681145  IMD: root @ 0x76fff000 254 entries.

  361 14:50:25.684340  IMD: root @ 0x76ffec00 62 entries.

  362 14:50:25.687742  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  363 14:50:25.694034  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  364 14:50:25.697770  External stage cache:

  365 14:50:25.700866  IMD: root @ 0x7b3ff000 254 entries.

  366 14:50:25.704541  IMD: root @ 0x7b3fec00 62 entries.

  367 14:50:25.719420  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  368 14:50:25.726076  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  369 14:50:25.732675  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  370 14:50:25.747052  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  371 14:50:25.753570  cse_lite: Skip switching to RW in the recovery path

  372 14:50:25.754100  8 DIMMs found

  373 14:50:25.754434  SMM Memory Map

  374 14:50:25.757304  SMRAM       : 0x7b000000 0x800000

  375 14:50:25.761370   Subregion 0: 0x7b000000 0x200000

  376 14:50:25.764772   Subregion 1: 0x7b200000 0x200000

  377 14:50:25.768587   Subregion 2: 0x7b400000 0x400000

  378 14:50:25.771362  top_of_ram = 0x77000000

  379 14:50:25.777993  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  380 14:50:25.781594  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  381 14:50:25.787850  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  382 14:50:25.790953  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  383 14:50:25.797826  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  384 14:50:25.804418  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  385 14:50:25.816457  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  386 14:50:25.823016  Processing 211 relocs. Offset value of 0x74c0b000

  387 14:50:25.829851  BS: romstage times (exec / console): total (unknown) / 277 ms

  388 14:50:25.835874  

  389 14:50:25.836252  

  390 14:50:25.845469  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  391 14:50:25.849132  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  392 14:50:25.859092  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  393 14:50:25.865840  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  394 14:50:25.872181  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  395 14:50:25.879065  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  396 14:50:25.925459  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  397 14:50:25.932655  Processing 5008 relocs. Offset value of 0x75d98000

  398 14:50:25.935581  BS: postcar times (exec / console): total (unknown) / 59 ms

  399 14:50:25.939217  

  400 14:50:25.939630  

  401 14:50:25.950147  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  402 14:50:25.950699  Normal boot

  403 14:50:25.952740  FW_CONFIG value is 0x804c02

  404 14:50:25.956308  PCI: 00:07.0 disabled by fw_config

  405 14:50:25.959483  PCI: 00:07.1 disabled by fw_config

  406 14:50:25.962750  PCI: 00:0d.2 disabled by fw_config

  407 14:50:25.966436  PCI: 00:1c.7 disabled by fw_config

  408 14:50:25.972553  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  409 14:50:25.979519  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  410 14:50:25.982526  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  411 14:50:25.986364  GENERIC: 0.0 disabled by fw_config

  412 14:50:25.989705  GENERIC: 1.0 disabled by fw_config

  413 14:50:25.996385  fw_config match found: DB_USB=USB3_ACTIVE

  414 14:50:25.999470  fw_config match found: DB_USB=USB3_ACTIVE

  415 14:50:26.003230  fw_config match found: DB_USB=USB3_ACTIVE

  416 14:50:26.006387  fw_config match found: DB_USB=USB3_ACTIVE

  417 14:50:26.012797  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  418 14:50:26.019169  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  419 14:50:26.025820  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  420 14:50:26.035810  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  421 14:50:26.039174  microcode: sig=0x806c1 pf=0x80 revision=0x86

  422 14:50:26.045775  microcode: Update skipped, already up-to-date

  423 14:50:26.052444  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  424 14:50:26.079080  Detected 4 core, 8 thread CPU.

  425 14:50:26.082682  Setting up SMI for CPU

  426 14:50:26.086553  IED base = 0x7b400000

  427 14:50:26.087078  IED size = 0x00400000

  428 14:50:26.089367  Will perform SMM setup.

  429 14:50:26.096284  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  430 14:50:26.102393  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  431 14:50:26.109065  Processing 16 relocs. Offset value of 0x00030000

  432 14:50:26.112871  Attempting to start 7 APs

  433 14:50:26.115708  Waiting for 10ms after sending INIT.

  434 14:50:26.131588  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  435 14:50:26.132091  done.

  436 14:50:26.134890  AP: slot 3 apic_id 2.

  437 14:50:26.137682  AP: slot 6 apic_id 3.

  438 14:50:26.138124  AP: slot 7 apic_id 5.

  439 14:50:26.141619  AP: slot 4 apic_id 4.

  440 14:50:26.144722  Waiting for 2nd SIPI to complete...done.

  441 14:50:26.147791  AP: slot 5 apic_id 6.

  442 14:50:26.151158  AP: slot 2 apic_id 7.

  443 14:50:26.158116  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  444 14:50:26.164461  Processing 13 relocs. Offset value of 0x00038000

  445 14:50:26.164965  Unable to locate Global NVS

  446 14:50:26.174652  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  447 14:50:26.177608  Installing permanent SMM handler to 0x7b000000

  448 14:50:26.187881  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  449 14:50:26.191094  Processing 794 relocs. Offset value of 0x7b010000

  450 14:50:26.197749  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  451 14:50:26.204495  Processing 13 relocs. Offset value of 0x7b008000

  452 14:50:26.211121  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  453 14:50:26.217963  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  454 14:50:26.221020  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  455 14:50:26.227842  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  456 14:50:26.234742  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  457 14:50:26.241343  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  458 14:50:26.244614  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  459 14:50:26.248020  Unable to locate Global NVS

  460 14:50:26.254409  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  461 14:50:26.259057  Clearing SMI status registers

  462 14:50:26.262540  SMI_STS: PM1 

  463 14:50:26.263047  PM1_STS: PWRBTN 

  464 14:50:26.272332  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  465 14:50:26.272756  In relocation handler: CPU 0

  466 14:50:26.278783  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  467 14:50:26.282656  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  468 14:50:26.286248  Relocation complete.

  469 14:50:26.292328  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  470 14:50:26.296001  In relocation handler: CPU 1

  471 14:50:26.298930  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  472 14:50:26.302650  Relocation complete.

  473 14:50:26.309408  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  474 14:50:26.312484  In relocation handler: CPU 7

  475 14:50:26.315429  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  476 14:50:26.319156  Relocation complete.

  477 14:50:26.325883  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  478 14:50:26.329015  In relocation handler: CPU 4

  479 14:50:26.332825  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  480 14:50:26.335899  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  481 14:50:26.338913  Relocation complete.

  482 14:50:26.346073  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  483 14:50:26.349105  In relocation handler: CPU 5

  484 14:50:26.352729  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  485 14:50:26.359381  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  486 14:50:26.362525  Relocation complete.

  487 14:50:26.368837  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  488 14:50:26.372415  In relocation handler: CPU 2

  489 14:50:26.375751  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  490 14:50:26.376262  Relocation complete.

  491 14:50:26.386016  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  492 14:50:26.386399  In relocation handler: CPU 6

  493 14:50:26.392411  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  494 14:50:26.393005  Relocation complete.

  495 14:50:26.402541  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  496 14:50:26.402986  In relocation handler: CPU 3

  497 14:50:26.409115  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  498 14:50:26.412872  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  499 14:50:26.415906  Relocation complete.

  500 14:50:26.416370  Initializing CPU #0

  501 14:50:26.419559  CPU: vendor Intel device 806c1

  502 14:50:26.423491  CPU: family 06, model 8c, stepping 01

  503 14:50:26.427138  Clearing out pending MCEs

  504 14:50:26.430207  Setting up local APIC...

  505 14:50:26.430611   apic_id: 0x00 done.

  506 14:50:26.433746  Turbo is available but hidden

  507 14:50:26.437045  Turbo is available and visible

  508 14:50:26.443870  microcode: Update skipped, already up-to-date

  509 14:50:26.444321  CPU #0 initialized

  510 14:50:26.447428  Initializing CPU #3

  511 14:50:26.450458  Initializing CPU #6

  512 14:50:26.453695  CPU: vendor Intel device 806c1

  513 14:50:26.457246  CPU: family 06, model 8c, stepping 01

  514 14:50:26.460385  CPU: vendor Intel device 806c1

  515 14:50:26.463930  CPU: family 06, model 8c, stepping 01

  516 14:50:26.467067  Clearing out pending MCEs

  517 14:50:26.467459  Clearing out pending MCEs

  518 14:50:26.470534  Setting up local APIC...

  519 14:50:26.473922  Initializing CPU #2

  520 14:50:26.474309   apic_id: 0x02 done.

  521 14:50:26.476915  Setting up local APIC...

  522 14:50:26.480560  Initializing CPU #4

  523 14:50:26.480951  Initializing CPU #7

  524 14:50:26.483421  CPU: vendor Intel device 806c1

  525 14:50:26.487276  CPU: family 06, model 8c, stepping 01

  526 14:50:26.490271  CPU: vendor Intel device 806c1

  527 14:50:26.497166  CPU: family 06, model 8c, stepping 01

  528 14:50:26.497559  Clearing out pending MCEs

  529 14:50:26.500414  Clearing out pending MCEs

  530 14:50:26.503563  Setting up local APIC...

  531 14:50:26.507152  Setting up local APIC...

  532 14:50:26.510235  microcode: Update skipped, already up-to-date

  533 14:50:26.513785   apic_id: 0x03 done.

  534 14:50:26.514179  CPU #3 initialized

  535 14:50:26.520214  microcode: Update skipped, already up-to-date

  536 14:50:26.523535  CPU: vendor Intel device 806c1

  537 14:50:26.526651  CPU: family 06, model 8c, stepping 01

  538 14:50:26.527026  Initializing CPU #5

  539 14:50:26.530624  Clearing out pending MCEs

  540 14:50:26.533642  CPU: vendor Intel device 806c1

  541 14:50:26.536752  CPU: family 06, model 8c, stepping 01

  542 14:50:26.540457  Setting up local APIC...

  543 14:50:26.543551   apic_id: 0x04 done.

  544 14:50:26.544074   apic_id: 0x05 done.

  545 14:50:26.550194  microcode: Update skipped, already up-to-date

  546 14:50:26.553959  microcode: Update skipped, already up-to-date

  547 14:50:26.556865  CPU #4 initialized

  548 14:50:26.557287  CPU #7 initialized

  549 14:50:26.560045   apic_id: 0x07 done.

  550 14:50:26.560429  Initializing CPU #1

  551 14:50:26.563831  Clearing out pending MCEs

  552 14:50:26.570458  microcode: Update skipped, already up-to-date

  553 14:50:26.571002  Setting up local APIC...

  554 14:50:26.573424  CPU #6 initialized

  555 14:50:26.577326  CPU: vendor Intel device 806c1

  556 14:50:26.580670  CPU: family 06, model 8c, stepping 01

  557 14:50:26.583952  Clearing out pending MCEs

  558 14:50:26.584358   apic_id: 0x06 done.

  559 14:50:26.586769  CPU #2 initialized

  560 14:50:26.590363  microcode: Update skipped, already up-to-date

  561 14:50:26.593854  Setting up local APIC...

  562 14:50:26.596862  CPU #5 initialized

  563 14:50:26.597285   apic_id: 0x01 done.

  564 14:50:26.603793  microcode: Update skipped, already up-to-date

  565 14:50:26.604204  CPU #1 initialized

  566 14:50:26.610316  bsp_do_flight_plan done after 459 msecs.

  567 14:50:26.613975  CPU: frequency set to 4000 MHz

  568 14:50:26.614394  Enabling SMIs.

  569 14:50:26.620333  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  570 14:50:26.636478  SATAXPCIE1 indicates PCIe NVMe is present

  571 14:50:26.639591  Probing TPM:  done!

  572 14:50:26.643289  Connected to device vid:did:rid of 1ae0:0028:00

  573 14:50:26.653870  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  574 14:50:26.657355  Initialized TPM device CR50 revision 0

  575 14:50:26.660474  Enabling S0i3.4

  576 14:50:26.667074  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  577 14:50:26.670838  Found a VBT of 8704 bytes after decompression

  578 14:50:26.677256  cse_lite: CSE RO boot. HybridStorageMode disabled

  579 14:50:26.683470  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  580 14:50:26.758923  FSPS returned 0

  581 14:50:26.762136  Executing Phase 1 of FspMultiPhaseSiInit

  582 14:50:26.771846  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  583 14:50:26.775699  port C0 DISC req: usage 1 usb3 1 usb2 5

  584 14:50:26.778770  Raw Buffer output 0 00000511

  585 14:50:26.782668  Raw Buffer output 1 00000000

  586 14:50:26.786300  pmc_send_ipc_cmd succeeded

  587 14:50:26.792101  port C1 DISC req: usage 1 usb3 2 usb2 3

  588 14:50:26.792516  Raw Buffer output 0 00000321

  589 14:50:26.795805  Raw Buffer output 1 00000000

  590 14:50:26.800328  pmc_send_ipc_cmd succeeded

  591 14:50:26.805141  Detected 4 core, 8 thread CPU.

  592 14:50:26.808743  Detected 4 core, 8 thread CPU.

  593 14:50:27.042786  Display FSP Version Info HOB

  594 14:50:27.045796  Reference Code - CPU = a.0.4c.31

  595 14:50:27.049445  uCode Version = 0.0.0.86

  596 14:50:27.052318  TXT ACM version = ff.ff.ff.ffff

  597 14:50:27.056093  Reference Code - ME = a.0.4c.31

  598 14:50:27.059097  MEBx version = 0.0.0.0

  599 14:50:27.062796  ME Firmware Version = Consumer SKU

  600 14:50:27.066062  Reference Code - PCH = a.0.4c.31

  601 14:50:27.069141  PCH-CRID Status = Disabled

  602 14:50:27.072760  PCH-CRID Original Value = ff.ff.ff.ffff

  603 14:50:27.075875  PCH-CRID New Value = ff.ff.ff.ffff

  604 14:50:27.079603  OPROM - RST - RAID = ff.ff.ff.ffff

  605 14:50:27.082631  PCH Hsio Version = 4.0.0.0

  606 14:50:27.085927  Reference Code - SA - System Agent = a.0.4c.31

  607 14:50:27.089201  Reference Code - MRC = 2.0.0.1

  608 14:50:27.092456  SA - PCIe Version = a.0.4c.31

  609 14:50:27.096210  SA-CRID Status = Disabled

  610 14:50:27.099130  SA-CRID Original Value = 0.0.0.1

  611 14:50:27.102592  SA-CRID New Value = 0.0.0.1

  612 14:50:27.106249  OPROM - VBIOS = ff.ff.ff.ffff

  613 14:50:27.109538  IO Manageability Engine FW Version = 11.1.4.0

  614 14:50:27.112850  PHY Build Version = 0.0.0.e0

  615 14:50:27.115901  Thunderbolt(TM) FW Version = 0.0.0.0

  616 14:50:27.122237  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  617 14:50:27.125671  ITSS IRQ Polarities Before:

  618 14:50:27.126246  IPC0: 0xffffffff

  619 14:50:27.135546  IPC1: 0xffffffff

  620 14:50:27.136010  IPC2: 0xffffffff

  621 14:50:27.136345  IPC3: 0xffffffff

  622 14:50:27.137025  ITSS IRQ Polarities After:

  623 14:50:27.137383  IPC0: 0xffffffff

  624 14:50:27.139160  IPC1: 0xffffffff

  625 14:50:27.139604  IPC2: 0xffffffff

  626 14:50:27.142513  IPC3: 0xffffffff

  627 14:50:27.145756  Found PCIe Root Port #9 at PCI: 00:1d.0.

  628 14:50:27.158979  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  629 14:50:27.169114  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  630 14:50:27.182469  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  631 14:50:27.189054  BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms

  632 14:50:27.189482  Enumerating buses...

  633 14:50:27.195597  Show all devs... Before device enumeration.

  634 14:50:27.196019  Root Device: enabled 1

  635 14:50:27.198995  DOMAIN: 0000: enabled 1

  636 14:50:27.202137  CPU_CLUSTER: 0: enabled 1

  637 14:50:27.205962  PCI: 00:00.0: enabled 1

  638 14:50:27.206449  PCI: 00:02.0: enabled 1

  639 14:50:27.209080  PCI: 00:04.0: enabled 1

  640 14:50:27.212316  PCI: 00:05.0: enabled 1

  641 14:50:27.215925  PCI: 00:06.0: enabled 0

  642 14:50:27.216459  PCI: 00:07.0: enabled 0

  643 14:50:27.219183  PCI: 00:07.1: enabled 0

  644 14:50:27.222853  PCI: 00:07.2: enabled 0

  645 14:50:27.225913  PCI: 00:07.3: enabled 0

  646 14:50:27.226440  PCI: 00:08.0: enabled 1

  647 14:50:27.228794  PCI: 00:09.0: enabled 0

  648 14:50:27.232226  PCI: 00:0a.0: enabled 0

  649 14:50:27.235614  PCI: 00:0d.0: enabled 1

  650 14:50:27.236092  PCI: 00:0d.1: enabled 0

  651 14:50:27.239072  PCI: 00:0d.2: enabled 0

  652 14:50:27.242223  PCI: 00:0d.3: enabled 0

  653 14:50:27.242743  PCI: 00:0e.0: enabled 0

  654 14:50:27.245565  PCI: 00:10.2: enabled 1

  655 14:50:27.248638  PCI: 00:10.6: enabled 0

  656 14:50:27.252479  PCI: 00:10.7: enabled 0

  657 14:50:27.253031  PCI: 00:12.0: enabled 0

  658 14:50:27.255850  PCI: 00:12.6: enabled 0

  659 14:50:27.258976  PCI: 00:13.0: enabled 0

  660 14:50:27.262442  PCI: 00:14.0: enabled 1

  661 14:50:27.262909  PCI: 00:14.1: enabled 0

  662 14:50:27.265824  PCI: 00:14.2: enabled 1

  663 14:50:27.268649  PCI: 00:14.3: enabled 1

  664 14:50:27.272378  PCI: 00:15.0: enabled 1

  665 14:50:27.272824  PCI: 00:15.1: enabled 1

  666 14:50:27.275541  PCI: 00:15.2: enabled 1

  667 14:50:27.279197  PCI: 00:15.3: enabled 1

  668 14:50:27.279663  PCI: 00:16.0: enabled 1

  669 14:50:27.282199  PCI: 00:16.1: enabled 0

  670 14:50:27.285845  PCI: 00:16.2: enabled 0

  671 14:50:27.288692  PCI: 00:16.3: enabled 0

  672 14:50:27.289273  PCI: 00:16.4: enabled 0

  673 14:50:27.292215  PCI: 00:16.5: enabled 0

  674 14:50:27.295347  PCI: 00:17.0: enabled 1

  675 14:50:27.298934  PCI: 00:19.0: enabled 0

  676 14:50:27.299398  PCI: 00:19.1: enabled 1

  677 14:50:27.301871  PCI: 00:19.2: enabled 0

  678 14:50:27.305369  PCI: 00:1c.0: enabled 1

  679 14:50:27.308770  PCI: 00:1c.1: enabled 0

  680 14:50:27.309303  PCI: 00:1c.2: enabled 0

  681 14:50:27.312109  PCI: 00:1c.3: enabled 0

  682 14:50:27.315806  PCI: 00:1c.4: enabled 0

  683 14:50:27.316272  PCI: 00:1c.5: enabled 0

  684 14:50:27.318727  PCI: 00:1c.6: enabled 1

  685 14:50:27.321828  PCI: 00:1c.7: enabled 0

  686 14:50:27.325413  PCI: 00:1d.0: enabled 1

  687 14:50:27.325980  PCI: 00:1d.1: enabled 0

  688 14:50:27.328551  PCI: 00:1d.2: enabled 1

  689 14:50:27.332226  PCI: 00:1d.3: enabled 0

  690 14:50:27.335428  PCI: 00:1e.0: enabled 1

  691 14:50:27.335882  PCI: 00:1e.1: enabled 0

  692 14:50:27.338893  PCI: 00:1e.2: enabled 1

  693 14:50:27.342099  PCI: 00:1e.3: enabled 1

  694 14:50:27.345340  PCI: 00:1f.0: enabled 1

  695 14:50:27.345906  PCI: 00:1f.1: enabled 0

  696 14:50:27.348563  PCI: 00:1f.2: enabled 1

  697 14:50:27.351978  PCI: 00:1f.3: enabled 1

  698 14:50:27.352556  PCI: 00:1f.4: enabled 0

  699 14:50:27.355766  PCI: 00:1f.5: enabled 1

  700 14:50:27.359135  PCI: 00:1f.6: enabled 0

  701 14:50:27.361981  PCI: 00:1f.7: enabled 0

  702 14:50:27.362416  APIC: 00: enabled 1

  703 14:50:27.364888  GENERIC: 0.0: enabled 1

  704 14:50:27.368413  GENERIC: 0.0: enabled 1

  705 14:50:27.372044  GENERIC: 1.0: enabled 1

  706 14:50:27.372593  GENERIC: 0.0: enabled 1

  707 14:50:27.375400  GENERIC: 1.0: enabled 1

  708 14:50:27.378390  USB0 port 0: enabled 1

  709 14:50:27.378989  GENERIC: 0.0: enabled 1

  710 14:50:27.382068  USB0 port 0: enabled 1

  711 14:50:27.385304  GENERIC: 0.0: enabled 1

  712 14:50:27.388594  I2C: 00:1a: enabled 1

  713 14:50:27.389161  I2C: 00:31: enabled 1

  714 14:50:27.391643  I2C: 00:32: enabled 1

  715 14:50:27.395291  I2C: 00:10: enabled 1

  716 14:50:27.395860  I2C: 00:15: enabled 1

  717 14:50:27.398434  GENERIC: 0.0: enabled 0

  718 14:50:27.401827  GENERIC: 1.0: enabled 0

  719 14:50:27.402275  GENERIC: 0.0: enabled 1

  720 14:50:27.404918  SPI: 00: enabled 1

  721 14:50:27.408661  SPI: 00: enabled 1

  722 14:50:27.409153  PNP: 0c09.0: enabled 1

  723 14:50:27.411592  GENERIC: 0.0: enabled 1

  724 14:50:27.415080  USB3 port 0: enabled 1

  725 14:50:27.415535  USB3 port 1: enabled 1

  726 14:50:27.418388  USB3 port 2: enabled 0

  727 14:50:27.421613  USB3 port 3: enabled 0

  728 14:50:27.425556  USB2 port 0: enabled 0

  729 14:50:27.425971  USB2 port 1: enabled 1

  730 14:50:27.428464  USB2 port 2: enabled 1

  731 14:50:27.431545  USB2 port 3: enabled 0

  732 14:50:27.431983  USB2 port 4: enabled 1

  733 14:50:27.435151  USB2 port 5: enabled 0

  734 14:50:27.438254  USB2 port 6: enabled 0

  735 14:50:27.441410  USB2 port 7: enabled 0

  736 14:50:27.441829  USB2 port 8: enabled 0

  737 14:50:27.445090  USB2 port 9: enabled 0

  738 14:50:27.448589  USB3 port 0: enabled 0

  739 14:50:27.449188  USB3 port 1: enabled 1

  740 14:50:27.452025  USB3 port 2: enabled 0

  741 14:50:27.454965  USB3 port 3: enabled 0

  742 14:50:27.458293  GENERIC: 0.0: enabled 1

  743 14:50:27.458744  GENERIC: 1.0: enabled 1

  744 14:50:27.461620  APIC: 01: enabled 1

  745 14:50:27.462062  APIC: 07: enabled 1

  746 14:50:27.464952  APIC: 02: enabled 1

  747 14:50:27.467962  APIC: 04: enabled 1

  748 14:50:27.468407  APIC: 06: enabled 1

  749 14:50:27.471316  APIC: 03: enabled 1

  750 14:50:27.474745  APIC: 05: enabled 1

  751 14:50:27.475297  Compare with tree...

  752 14:50:27.478009  Root Device: enabled 1

  753 14:50:27.481778   DOMAIN: 0000: enabled 1

  754 14:50:27.482297    PCI: 00:00.0: enabled 1

  755 14:50:27.484813    PCI: 00:02.0: enabled 1

  756 14:50:27.488148    PCI: 00:04.0: enabled 1

  757 14:50:27.491350     GENERIC: 0.0: enabled 1

  758 14:50:27.494533    PCI: 00:05.0: enabled 1

  759 14:50:27.494991    PCI: 00:06.0: enabled 0

  760 14:50:27.498281    PCI: 00:07.0: enabled 0

  761 14:50:27.501298     GENERIC: 0.0: enabled 1

  762 14:50:27.505055    PCI: 00:07.1: enabled 0

  763 14:50:27.507991     GENERIC: 1.0: enabled 1

  764 14:50:27.511210    PCI: 00:07.2: enabled 0

  765 14:50:27.511642     GENERIC: 0.0: enabled 1

  766 14:50:27.514905    PCI: 00:07.3: enabled 0

  767 14:50:27.518109     GENERIC: 1.0: enabled 1

  768 14:50:27.521599    PCI: 00:08.0: enabled 1

  769 14:50:27.524478    PCI: 00:09.0: enabled 0

  770 14:50:27.524919    PCI: 00:0a.0: enabled 0

  771 14:50:27.528188    PCI: 00:0d.0: enabled 1

  772 14:50:27.531090     USB0 port 0: enabled 1

  773 14:50:27.534804      USB3 port 0: enabled 1

  774 14:50:27.537997      USB3 port 1: enabled 1

  775 14:50:27.538476      USB3 port 2: enabled 0

  776 14:50:27.541038      USB3 port 3: enabled 0

  777 14:50:27.544771    PCI: 00:0d.1: enabled 0

  778 14:50:27.547917    PCI: 00:0d.2: enabled 0

  779 14:50:27.551564     GENERIC: 0.0: enabled 1

  780 14:50:27.551994    PCI: 00:0d.3: enabled 0

  781 14:50:27.555115    PCI: 00:0e.0: enabled 0

  782 14:50:27.558038    PCI: 00:10.2: enabled 1

  783 14:50:27.561691    PCI: 00:10.6: enabled 0

  784 14:50:27.564674    PCI: 00:10.7: enabled 0

  785 14:50:27.565150    PCI: 00:12.0: enabled 0

  786 14:50:27.568112    PCI: 00:12.6: enabled 0

  787 14:50:27.571413    PCI: 00:13.0: enabled 0

  788 14:50:27.575052    PCI: 00:14.0: enabled 1

  789 14:50:27.575575     USB0 port 0: enabled 1

  790 14:50:27.577917      USB2 port 0: enabled 0

  791 14:50:27.581555      USB2 port 1: enabled 1

  792 14:50:27.584587      USB2 port 2: enabled 1

  793 14:50:27.588201      USB2 port 3: enabled 0

  794 14:50:27.591216      USB2 port 4: enabled 1

  795 14:50:27.591637      USB2 port 5: enabled 0

  796 14:50:27.594729      USB2 port 6: enabled 0

  797 14:50:27.597828      USB2 port 7: enabled 0

  798 14:50:27.601577      USB2 port 8: enabled 0

  799 14:50:27.604744      USB2 port 9: enabled 0

  800 14:50:27.607997      USB3 port 0: enabled 0

  801 14:50:27.608422      USB3 port 1: enabled 1

  802 14:50:27.611280      USB3 port 2: enabled 0

  803 14:50:27.614558      USB3 port 3: enabled 0

  804 14:50:27.618246    PCI: 00:14.1: enabled 0

  805 14:50:27.621409    PCI: 00:14.2: enabled 1

  806 14:50:27.621830    PCI: 00:14.3: enabled 1

  807 14:50:27.624566     GENERIC: 0.0: enabled 1

  808 14:50:27.628171    PCI: 00:15.0: enabled 1

  809 14:50:27.631154     I2C: 00:1a: enabled 1

  810 14:50:27.634419     I2C: 00:31: enabled 1

  811 14:50:27.634843     I2C: 00:32: enabled 1

  812 14:50:27.637763    PCI: 00:15.1: enabled 1

  813 14:50:27.641229     I2C: 00:10: enabled 1

  814 14:50:27.644925    PCI: 00:15.2: enabled 1

  815 14:50:27.645390    PCI: 00:15.3: enabled 1

  816 14:50:27.648014    PCI: 00:16.0: enabled 1

  817 14:50:27.651100    PCI: 00:16.1: enabled 0

  818 14:50:27.654737    PCI: 00:16.2: enabled 0

  819 14:50:27.657658    PCI: 00:16.3: enabled 0

  820 14:50:27.658084    PCI: 00:16.4: enabled 0

  821 14:50:27.661265    PCI: 00:16.5: enabled 0

  822 14:50:27.664926    PCI: 00:17.0: enabled 1

  823 14:50:27.668678    PCI: 00:19.0: enabled 0

  824 14:50:27.669149    PCI: 00:19.1: enabled 1

  825 14:50:27.672313     I2C: 00:15: enabled 1

  826 14:50:27.675809    PCI: 00:19.2: enabled 0

  827 14:50:27.679024    PCI: 00:1d.0: enabled 1

  828 14:50:27.679490     GENERIC: 0.0: enabled 1

  829 14:50:27.682595    PCI: 00:1e.0: enabled 1

  830 14:50:27.686073    PCI: 00:1e.1: enabled 0

  831 14:50:27.689187    PCI: 00:1e.2: enabled 1

  832 14:50:27.689612     SPI: 00: enabled 1

  833 14:50:27.692369    PCI: 00:1e.3: enabled 1

  834 14:50:27.695897     SPI: 00: enabled 1

  835 14:50:27.699079    PCI: 00:1f.0: enabled 1

  836 14:50:27.699500     PNP: 0c09.0: enabled 1

  837 14:50:27.750653    PCI: 00:1f.1: enabled 0

  838 14:50:27.751171    PCI: 00:1f.2: enabled 1

  839 14:50:27.751629     GENERIC: 0.0: enabled 1

  840 14:50:27.751966      GENERIC: 0.0: enabled 1

  841 14:50:27.752619      GENERIC: 1.0: enabled 1

  842 14:50:27.752948    PCI: 00:1f.3: enabled 1

  843 14:50:27.753519    PCI: 00:1f.4: enabled 0

  844 14:50:27.754093    PCI: 00:1f.5: enabled 1

  845 14:50:27.754428    PCI: 00:1f.6: enabled 0

  846 14:50:27.754731    PCI: 00:1f.7: enabled 0

  847 14:50:27.755134   CPU_CLUSTER: 0: enabled 1

  848 14:50:27.755448    APIC: 00: enabled 1

  849 14:50:27.755736    APIC: 01: enabled 1

  850 14:50:27.756023    APIC: 07: enabled 1

  851 14:50:27.756514    APIC: 02: enabled 1

  852 14:50:27.756824    APIC: 04: enabled 1

  853 14:50:27.757152    APIC: 06: enabled 1

  854 14:50:27.757591    APIC: 03: enabled 1

  855 14:50:27.757898    APIC: 05: enabled 1

  856 14:50:27.758299  Root Device scanning...

  857 14:50:27.764536  scan_static_bus for Root Device

  858 14:50:27.765114  DOMAIN: 0000 enabled

  859 14:50:27.765795  CPU_CLUSTER: 0 enabled

  860 14:50:27.766350  DOMAIN: 0000 scanning...

  861 14:50:27.768325  PCI: pci_scan_bus for bus 00

  862 14:50:27.768821  PCI: 00:00.0 [8086/0000] ops

  863 14:50:27.771235  PCI: 00:00.0 [8086/9a12] enabled

  864 14:50:27.775006  PCI: 00:02.0 [8086/0000] bus ops

  865 14:50:27.778587  PCI: 00:02.0 [8086/9a40] enabled

  866 14:50:27.781395  PCI: 00:04.0 [8086/0000] bus ops

  867 14:50:27.785075  PCI: 00:04.0 [8086/9a03] enabled

  868 14:50:27.788446  PCI: 00:05.0 [8086/9a19] enabled

  869 14:50:27.791578  PCI: 00:07.0 [0000/0000] hidden

  870 14:50:27.794965  PCI: 00:08.0 [8086/9a11] enabled

  871 14:50:27.798644  PCI: 00:0a.0 [8086/9a0d] disabled

  872 14:50:27.801729  PCI: 00:0d.0 [8086/0000] bus ops

  873 14:50:27.804761  PCI: 00:0d.0 [8086/9a13] enabled

  874 14:50:27.808148  PCI: 00:14.0 [8086/0000] bus ops

  875 14:50:27.811350  PCI: 00:14.0 [8086/a0ed] enabled

  876 14:50:27.815167  PCI: 00:14.2 [8086/a0ef] enabled

  877 14:50:27.818217  PCI: 00:14.3 [8086/0000] bus ops

  878 14:50:27.821424  PCI: 00:14.3 [8086/a0f0] enabled

  879 14:50:27.824995  PCI: 00:15.0 [8086/0000] bus ops

  880 14:50:27.828143  PCI: 00:15.0 [8086/a0e8] enabled

  881 14:50:27.831428  PCI: 00:15.1 [8086/0000] bus ops

  882 14:50:27.835157  PCI: 00:15.1 [8086/a0e9] enabled

  883 14:50:27.838418  PCI: 00:15.2 [8086/0000] bus ops

  884 14:50:27.841436  PCI: 00:15.2 [8086/a0ea] enabled

  885 14:50:27.845034  PCI: 00:15.3 [8086/0000] bus ops

  886 14:50:27.848188  PCI: 00:15.3 [8086/a0eb] enabled

  887 14:50:27.851403  PCI: 00:16.0 [8086/0000] ops

  888 14:50:27.854716  PCI: 00:16.0 [8086/a0e0] enabled

  889 14:50:27.861390  PCI: Static device PCI: 00:17.0 not found, disabling it.

  890 14:50:27.864800  PCI: 00:19.0 [8086/0000] bus ops

  891 14:50:27.868036  PCI: 00:19.0 [8086/a0c5] disabled

  892 14:50:27.871747  PCI: 00:19.1 [8086/0000] bus ops

  893 14:50:27.874755  PCI: 00:19.1 [8086/a0c6] enabled

  894 14:50:27.878023  PCI: 00:1d.0 [8086/0000] bus ops

  895 14:50:27.881445  PCI: 00:1d.0 [8086/a0b0] enabled

  896 14:50:27.884341  PCI: 00:1e.0 [8086/0000] ops

  897 14:50:27.888233  PCI: 00:1e.0 [8086/a0a8] enabled

  898 14:50:27.891175  PCI: 00:1e.2 [8086/0000] bus ops

  899 14:50:27.894865  PCI: 00:1e.2 [8086/a0aa] enabled

  900 14:50:27.897832  PCI: 00:1e.3 [8086/0000] bus ops

  901 14:50:27.900959  PCI: 00:1e.3 [8086/a0ab] enabled

  902 14:50:27.904406  PCI: 00:1f.0 [8086/0000] bus ops

  903 14:50:27.908258  PCI: 00:1f.0 [8086/a087] enabled

  904 14:50:27.908474  RTC Init

  905 14:50:27.911190  Set power on after power failure.

  906 14:50:27.914199  Disabling Deep S3

  907 14:50:27.914365  Disabling Deep S3

  908 14:50:27.918017  Disabling Deep S4

  909 14:50:27.918196  Disabling Deep S4

  910 14:50:27.920925  Disabling Deep S5

  911 14:50:27.924630  Disabling Deep S5

  912 14:50:27.927889  PCI: 00:1f.2 [0000/0000] hidden

  913 14:50:27.931435  PCI: 00:1f.3 [8086/0000] bus ops

  914 14:50:27.934378  PCI: 00:1f.3 [8086/a0c8] enabled

  915 14:50:27.937937  PCI: 00:1f.5 [8086/0000] bus ops

  916 14:50:27.941373  PCI: 00:1f.5 [8086/a0a4] enabled

  917 14:50:27.941555  PCI: Leftover static devices:

  918 14:50:27.944259  PCI: 00:10.2

  919 14:50:27.944438  PCI: 00:10.6

  920 14:50:27.947883  PCI: 00:10.7

  921 14:50:27.948121  PCI: 00:06.0

  922 14:50:27.951089  PCI: 00:07.1

  923 14:50:27.951452  PCI: 00:07.2

  924 14:50:27.951703  PCI: 00:07.3

  925 14:50:27.954194  PCI: 00:09.0

  926 14:50:27.954464  PCI: 00:0d.1

  927 14:50:27.957708  PCI: 00:0d.2

  928 14:50:27.957888  PCI: 00:0d.3

  929 14:50:27.958029  PCI: 00:0e.0

  930 14:50:27.961078  PCI: 00:12.0

  931 14:50:27.961327  PCI: 00:12.6

  932 14:50:27.964572  PCI: 00:13.0

  933 14:50:27.964768  PCI: 00:14.1

  934 14:50:27.964916  PCI: 00:16.1

  935 14:50:27.967681  PCI: 00:16.2

  936 14:50:27.967862  PCI: 00:16.3

  937 14:50:27.970845  PCI: 00:16.4

  938 14:50:27.971026  PCI: 00:16.5

  939 14:50:27.974611  PCI: 00:17.0

  940 14:50:27.974821  PCI: 00:19.2

  941 14:50:27.974988  PCI: 00:1e.1

  942 14:50:27.977672  PCI: 00:1f.1

  943 14:50:27.977884  PCI: 00:1f.4

  944 14:50:27.981485  PCI: 00:1f.6

  945 14:50:27.981739  PCI: 00:1f.7

  946 14:50:27.984458  PCI: Check your devicetree.cb.

  947 14:50:27.987969  PCI: 00:02.0 scanning...

  948 14:50:27.991565  scan_generic_bus for PCI: 00:02.0

  949 14:50:27.994621  scan_generic_bus for PCI: 00:02.0 done

  950 14:50:27.997514  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  951 14:50:28.001296  PCI: 00:04.0 scanning...

  952 14:50:28.004249  scan_generic_bus for PCI: 00:04.0

  953 14:50:28.007688  GENERIC: 0.0 enabled

  954 14:50:28.014492  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  955 14:50:28.017400  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  956 14:50:28.021281  PCI: 00:0d.0 scanning...

  957 14:50:28.024521  scan_static_bus for PCI: 00:0d.0

  958 14:50:28.027564  USB0 port 0 enabled

  959 14:50:28.028057  USB0 port 0 scanning...

  960 14:50:28.031484  scan_static_bus for USB0 port 0

  961 14:50:28.034515  USB3 port 0 enabled

  962 14:50:28.037626  USB3 port 1 enabled

  963 14:50:28.038066  USB3 port 2 disabled

  964 14:50:28.041086  USB3 port 3 disabled

  965 14:50:28.044511  USB3 port 0 scanning...

  966 14:50:28.048030  scan_static_bus for USB3 port 0

  967 14:50:28.050915  scan_static_bus for USB3 port 0 done

  968 14:50:28.054555  scan_bus: bus USB3 port 0 finished in 6 msecs

  969 14:50:28.057641  USB3 port 1 scanning...

  970 14:50:28.061440  scan_static_bus for USB3 port 1

  971 14:50:28.064447  scan_static_bus for USB3 port 1 done

  972 14:50:28.067955  scan_bus: bus USB3 port 1 finished in 6 msecs

  973 14:50:28.074045  scan_static_bus for USB0 port 0 done

  974 14:50:28.077523  scan_bus: bus USB0 port 0 finished in 43 msecs

  975 14:50:28.080770  scan_static_bus for PCI: 00:0d.0 done

  976 14:50:28.087551  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  977 14:50:28.088166  PCI: 00:14.0 scanning...

  978 14:50:28.091421  scan_static_bus for PCI: 00:14.0

  979 14:50:28.094322  USB0 port 0 enabled

  980 14:50:28.098119  USB0 port 0 scanning...

  981 14:50:28.101219  scan_static_bus for USB0 port 0

  982 14:50:28.101640  USB2 port 0 disabled

  983 14:50:28.104618  USB2 port 1 enabled

  984 14:50:28.107892  USB2 port 2 enabled

  985 14:50:28.108310  USB2 port 3 disabled

  986 14:50:28.111001  USB2 port 4 enabled

  987 14:50:28.114506  USB2 port 5 disabled

  988 14:50:28.114974  USB2 port 6 disabled

  989 14:50:28.117882  USB2 port 7 disabled

  990 14:50:28.118454  USB2 port 8 disabled

  991 14:50:28.121487  USB2 port 9 disabled

  992 14:50:28.124530  USB3 port 0 disabled

  993 14:50:28.125055  USB3 port 1 enabled

  994 14:50:28.127613  USB3 port 2 disabled

  995 14:50:28.131257  USB3 port 3 disabled

  996 14:50:28.131730  USB2 port 1 scanning...

  997 14:50:28.134380  scan_static_bus for USB2 port 1

  998 14:50:28.141152  scan_static_bus for USB2 port 1 done

  999 14:50:28.144157  scan_bus: bus USB2 port 1 finished in 6 msecs

 1000 14:50:28.147843  USB2 port 2 scanning...

 1001 14:50:28.151526  scan_static_bus for USB2 port 2

 1002 14:50:28.154416  scan_static_bus for USB2 port 2 done

 1003 14:50:28.157835  scan_bus: bus USB2 port 2 finished in 6 msecs

 1004 14:50:28.161157  USB2 port 4 scanning...

 1005 14:50:28.164179  scan_static_bus for USB2 port 4

 1006 14:50:28.167882  scan_static_bus for USB2 port 4 done

 1007 14:50:28.170984  scan_bus: bus USB2 port 4 finished in 6 msecs

 1008 14:50:28.174512  USB3 port 1 scanning...

 1009 14:50:28.177450  scan_static_bus for USB3 port 1

 1010 14:50:28.181207  scan_static_bus for USB3 port 1 done

 1011 14:50:28.187842  scan_bus: bus USB3 port 1 finished in 6 msecs

 1012 14:50:28.190971  scan_static_bus for USB0 port 0 done

 1013 14:50:28.194239  scan_bus: bus USB0 port 0 finished in 93 msecs

 1014 14:50:28.197740  scan_static_bus for PCI: 00:14.0 done

 1015 14:50:28.204322  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

 1016 14:50:28.207784  PCI: 00:14.3 scanning...

 1017 14:50:28.211046  scan_static_bus for PCI: 00:14.3

 1018 14:50:28.211639  GENERIC: 0.0 enabled

 1019 14:50:28.214093  scan_static_bus for PCI: 00:14.3 done

 1020 14:50:28.221036  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1021 14:50:28.224667  PCI: 00:15.0 scanning...

 1022 14:50:28.227882  scan_static_bus for PCI: 00:15.0

 1023 14:50:28.228295  I2C: 00:1a enabled

 1024 14:50:28.230760  I2C: 00:31 enabled

 1025 14:50:28.231308  I2C: 00:32 enabled

 1026 14:50:28.237723  scan_static_bus for PCI: 00:15.0 done

 1027 14:50:28.240594  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1028 14:50:28.245070  PCI: 00:15.1 scanning...

 1029 14:50:28.248879  scan_static_bus for PCI: 00:15.1

 1030 14:50:28.249429  I2C: 00:10 enabled

 1031 14:50:28.251796  scan_static_bus for PCI: 00:15.1 done

 1032 14:50:28.258409  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1033 14:50:28.262042  PCI: 00:15.2 scanning...

 1034 14:50:28.265013  scan_static_bus for PCI: 00:15.2

 1035 14:50:28.268346  scan_static_bus for PCI: 00:15.2 done

 1036 14:50:28.272206  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1037 14:50:28.275109  PCI: 00:15.3 scanning...

 1038 14:50:28.278780  scan_static_bus for PCI: 00:15.3

 1039 14:50:28.281937  scan_static_bus for PCI: 00:15.3 done

 1040 14:50:28.288852  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1041 14:50:28.289329  PCI: 00:19.1 scanning...

 1042 14:50:28.292237  scan_static_bus for PCI: 00:19.1

 1043 14:50:28.295201  I2C: 00:15 enabled

 1044 14:50:28.298279  scan_static_bus for PCI: 00:19.1 done

 1045 14:50:28.301983  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1046 14:50:28.305126  PCI: 00:1d.0 scanning...

 1047 14:50:28.308600  do_pci_scan_bridge for PCI: 00:1d.0

 1048 14:50:28.312018  PCI: pci_scan_bus for bus 01

 1049 14:50:28.315406  PCI: 01:00.0 [1c5c/174a] enabled

 1050 14:50:28.318610  GENERIC: 0.0 enabled

 1051 14:50:28.321696  Enabling Common Clock Configuration

 1052 14:50:28.325051  L1 Sub-State supported from root port 29

 1053 14:50:28.328455  L1 Sub-State Support = 0xf

 1054 14:50:28.331594  CommonModeRestoreTime = 0x28

 1055 14:50:28.335222  Power On Value = 0x16, Power On Scale = 0x0

 1056 14:50:28.338227  ASPM: Enabled L1

 1057 14:50:28.341957  PCIe: Max_Payload_Size adjusted to 128

 1058 14:50:28.348605  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1059 14:50:28.349195  PCI: 00:1e.2 scanning...

 1060 14:50:28.351809  scan_generic_bus for PCI: 00:1e.2

 1061 14:50:28.355311  SPI: 00 enabled

 1062 14:50:28.362126  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1063 14:50:28.365317  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1064 14:50:28.368272  PCI: 00:1e.3 scanning...

 1065 14:50:28.371803  scan_generic_bus for PCI: 00:1e.3

 1066 14:50:28.375192  SPI: 00 enabled

 1067 14:50:28.378355  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1068 14:50:28.384947  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1069 14:50:28.388123  PCI: 00:1f.0 scanning...

 1070 14:50:28.391928  scan_static_bus for PCI: 00:1f.0

 1071 14:50:28.392354  PNP: 0c09.0 enabled

 1072 14:50:28.394831  PNP: 0c09.0 scanning...

 1073 14:50:28.398414  scan_static_bus for PNP: 0c09.0

 1074 14:50:28.401396  scan_static_bus for PNP: 0c09.0 done

 1075 14:50:28.408071  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1076 14:50:28.411280  scan_static_bus for PCI: 00:1f.0 done

 1077 14:50:28.414815  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1078 14:50:28.417870  PCI: 00:1f.2 scanning...

 1079 14:50:28.421655  scan_static_bus for PCI: 00:1f.2

 1080 14:50:28.424711  GENERIC: 0.0 enabled

 1081 14:50:28.424931  GENERIC: 0.0 scanning...

 1082 14:50:28.428309  scan_static_bus for GENERIC: 0.0

 1083 14:50:28.431274  GENERIC: 0.0 enabled

 1084 14:50:28.434941  GENERIC: 1.0 enabled

 1085 14:50:28.438246  scan_static_bus for GENERIC: 0.0 done

 1086 14:50:28.441432  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1087 14:50:28.445000  scan_static_bus for PCI: 00:1f.2 done

 1088 14:50:28.451456  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1089 14:50:28.454908  PCI: 00:1f.3 scanning...

 1090 14:50:28.458224  scan_static_bus for PCI: 00:1f.3

 1091 14:50:28.461520  scan_static_bus for PCI: 00:1f.3 done

 1092 14:50:28.465096  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1093 14:50:28.468276  PCI: 00:1f.5 scanning...

 1094 14:50:28.472053  scan_generic_bus for PCI: 00:1f.5

 1095 14:50:28.475003  scan_generic_bus for PCI: 00:1f.5 done

 1096 14:50:28.481497  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1097 14:50:28.485088  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1098 14:50:28.488428  scan_static_bus for Root Device done

 1099 14:50:28.495297  scan_bus: bus Root Device finished in 737 msecs

 1100 14:50:28.495791  done

 1101 14:50:28.501937  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1102 14:50:28.504835  Chrome EC: UHEPI supported

 1103 14:50:28.511639  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1104 14:50:28.518170  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1105 14:50:28.521674  SPI flash protection: WPSW=0 SRP0=0

 1106 14:50:28.524915  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1107 14:50:28.531479  BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms

 1108 14:50:28.534558  found VGA at PCI: 00:02.0

 1109 14:50:28.538134  Setting up VGA for PCI: 00:02.0

 1110 14:50:28.544745  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1111 14:50:28.548452  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1112 14:50:28.551420  Allocating resources...

 1113 14:50:28.551900  Reading resources...

 1114 14:50:28.557865  Root Device read_resources bus 0 link: 0

 1115 14:50:28.561181  DOMAIN: 0000 read_resources bus 0 link: 0

 1116 14:50:28.564498  PCI: 00:04.0 read_resources bus 1 link: 0

 1117 14:50:28.571516  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1118 14:50:28.575274  PCI: 00:0d.0 read_resources bus 0 link: 0

 1119 14:50:28.581667  USB0 port 0 read_resources bus 0 link: 0

 1120 14:50:28.584824  USB0 port 0 read_resources bus 0 link: 0 done

 1121 14:50:28.591442  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1122 14:50:28.595042  PCI: 00:14.0 read_resources bus 0 link: 0

 1123 14:50:28.598376  USB0 port 0 read_resources bus 0 link: 0

 1124 14:50:28.606231  USB0 port 0 read_resources bus 0 link: 0 done

 1125 14:50:28.609233  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1126 14:50:28.616016  PCI: 00:14.3 read_resources bus 0 link: 0

 1127 14:50:28.619609  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1128 14:50:28.626227  PCI: 00:15.0 read_resources bus 0 link: 0

 1129 14:50:28.629256  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1130 14:50:28.635996  PCI: 00:15.1 read_resources bus 0 link: 0

 1131 14:50:28.639690  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1132 14:50:28.646903  PCI: 00:19.1 read_resources bus 0 link: 0

 1133 14:50:28.650180  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1134 14:50:28.656329  PCI: 00:1d.0 read_resources bus 1 link: 0

 1135 14:50:28.660006  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1136 14:50:28.666699  PCI: 00:1e.2 read_resources bus 2 link: 0

 1137 14:50:28.670004  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1138 14:50:28.676602  PCI: 00:1e.3 read_resources bus 3 link: 0

 1139 14:50:28.679827  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1140 14:50:28.686572  PCI: 00:1f.0 read_resources bus 0 link: 0

 1141 14:50:28.689840  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1142 14:50:28.693237  PCI: 00:1f.2 read_resources bus 0 link: 0

 1143 14:50:28.699865  GENERIC: 0.0 read_resources bus 0 link: 0

 1144 14:50:28.703411  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1145 14:50:28.710122  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1146 14:50:28.717034  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1147 14:50:28.720003  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1148 14:50:28.723513  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1149 14:50:28.730158  Root Device read_resources bus 0 link: 0 done

 1150 14:50:28.733108  Done reading resources.

 1151 14:50:28.736732  Show resources in subtree (Root Device)...After reading.

 1152 14:50:28.743397   Root Device child on link 0 DOMAIN: 0000

 1153 14:50:28.746686    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1154 14:50:28.756830    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1155 14:50:28.767054    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1156 14:50:28.767562     PCI: 00:00.0

 1157 14:50:28.776699     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1158 14:50:28.786965     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1159 14:50:28.796844     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1160 14:50:28.806993     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1161 14:50:28.813513     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1162 14:50:28.823033     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1163 14:50:28.833317     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1164 14:50:28.843027     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1165 14:50:28.852790     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1166 14:50:28.862356     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1167 14:50:28.868939     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1168 14:50:28.879382     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1169 14:50:28.889278     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1170 14:50:28.898990     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1171 14:50:28.905958     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1172 14:50:28.916028     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1173 14:50:28.925540     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1174 14:50:28.935488     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1175 14:50:28.945625     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1176 14:50:28.955434     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1177 14:50:28.956063     PCI: 00:02.0

 1178 14:50:28.969226     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1179 14:50:28.978512     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1180 14:50:28.985578     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1181 14:50:28.991838     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1182 14:50:29.002218     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1183 14:50:29.002674      GENERIC: 0.0

 1184 14:50:29.005094     PCI: 00:05.0

 1185 14:50:29.015015     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1186 14:50:29.018758     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1187 14:50:29.022089      GENERIC: 0.0

 1188 14:50:29.022501     PCI: 00:08.0

 1189 14:50:29.031665     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 14:50:29.035292     PCI: 00:0a.0

 1191 14:50:29.038155     PCI: 00:0d.0 child on link 0 USB0 port 0

 1192 14:50:29.048017     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1193 14:50:29.051614      USB0 port 0 child on link 0 USB3 port 0

 1194 14:50:29.055186       USB3 port 0

 1195 14:50:29.055687       USB3 port 1

 1196 14:50:29.058091       USB3 port 2

 1197 14:50:29.058542       USB3 port 3

 1198 14:50:29.065355     PCI: 00:14.0 child on link 0 USB0 port 0

 1199 14:50:29.074906     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1200 14:50:29.078557      USB0 port 0 child on link 0 USB2 port 0

 1201 14:50:29.081499       USB2 port 0

 1202 14:50:29.082137       USB2 port 1

 1203 14:50:29.085113       USB2 port 2

 1204 14:50:29.085525       USB2 port 3

 1205 14:50:29.088534       USB2 port 4

 1206 14:50:29.088941       USB2 port 5

 1207 14:50:29.091589       USB2 port 6

 1208 14:50:29.092276       USB2 port 7

 1209 14:50:29.095061       USB2 port 8

 1210 14:50:29.095471       USB2 port 9

 1211 14:50:29.098113       USB3 port 0

 1212 14:50:29.101739       USB3 port 1

 1213 14:50:29.102147       USB3 port 2

 1214 14:50:29.104604       USB3 port 3

 1215 14:50:29.105054     PCI: 00:14.2

 1216 14:50:29.115161     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1217 14:50:29.124662     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1218 14:50:29.128508     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1219 14:50:29.138062     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1220 14:50:29.141197      GENERIC: 0.0

 1221 14:50:29.144534     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1222 14:50:29.154548     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1223 14:50:29.158042      I2C: 00:1a

 1224 14:50:29.158479      I2C: 00:31

 1225 14:50:29.161290      I2C: 00:32

 1226 14:50:29.164657     PCI: 00:15.1 child on link 0 I2C: 00:10

 1227 14:50:29.174725     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1228 14:50:29.175276      I2C: 00:10

 1229 14:50:29.178396     PCI: 00:15.2

 1230 14:50:29.188085     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1231 14:50:29.188506     PCI: 00:15.3

 1232 14:50:29.197833     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1233 14:50:29.201108     PCI: 00:16.0

 1234 14:50:29.210910     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1235 14:50:29.211329     PCI: 00:19.0

 1236 14:50:29.217948     PCI: 00:19.1 child on link 0 I2C: 00:15

 1237 14:50:29.227967     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1238 14:50:29.228433      I2C: 00:15

 1239 14:50:29.234411     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1240 14:50:29.240834     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1241 14:50:29.251369     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1242 14:50:29.260906     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1243 14:50:29.261372      GENERIC: 0.0

 1244 14:50:29.264345      PCI: 01:00.0

 1245 14:50:29.274343      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1246 14:50:29.284372      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1247 14:50:29.294063      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1248 14:50:29.294621     PCI: 00:1e.0

 1249 14:50:29.303950     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1250 14:50:29.310696     PCI: 00:1e.2 child on link 0 SPI: 00

 1251 14:50:29.321078     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1252 14:50:29.321577      SPI: 00

 1253 14:50:29.324290     PCI: 00:1e.3 child on link 0 SPI: 00

 1254 14:50:29.334460     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1255 14:50:29.337509      SPI: 00

 1256 14:50:29.340586     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1257 14:50:29.347729     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1258 14:50:29.350926      PNP: 0c09.0

 1259 14:50:29.360675      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1260 14:50:29.364137     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1261 14:50:29.374075     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1262 14:50:29.384347     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1263 14:50:29.387221      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1264 14:50:29.387737       GENERIC: 0.0

 1265 14:50:29.390707       GENERIC: 1.0

 1266 14:50:29.393959     PCI: 00:1f.3

 1267 14:50:29.404218     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1268 14:50:29.413960     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1269 14:50:29.414571     PCI: 00:1f.5

 1270 14:50:29.424138     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1271 14:50:29.427224    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1272 14:50:29.430299     APIC: 00

 1273 14:50:29.430776     APIC: 01

 1274 14:50:29.431230     APIC: 07

 1275 14:50:29.434093     APIC: 02

 1276 14:50:29.434557     APIC: 04

 1277 14:50:29.434969     APIC: 06

 1278 14:50:29.437092     APIC: 03

 1279 14:50:29.437544     APIC: 05

 1280 14:50:29.447236  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1281 14:50:29.450792   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1282 14:50:29.456969   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1283 14:50:29.463708   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1284 14:50:29.467377    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1285 14:50:29.470367    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1286 14:50:29.477450    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1287 14:50:29.483700   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1288 14:50:29.490212   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1289 14:50:29.496924   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1290 14:50:29.506763  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1291 14:50:29.510670  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1292 14:50:29.519892   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1293 14:50:29.526760   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1294 14:50:29.533466   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1295 14:50:29.537060   DOMAIN: 0000: Resource ranges:

 1296 14:50:29.539990   * Base: 1000, Size: 800, Tag: 100

 1297 14:50:29.543663   * Base: 1900, Size: e700, Tag: 100

 1298 14:50:29.549905    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1299 14:50:29.556689  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1300 14:50:29.563567  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1301 14:50:29.569796   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1302 14:50:29.579709   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1303 14:50:29.586656   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1304 14:50:29.593095   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1305 14:50:29.602977   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1306 14:50:29.609924   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1307 14:50:29.616641   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1308 14:50:29.626423   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1309 14:50:29.633160   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1310 14:50:29.639515   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1311 14:50:29.649468   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1312 14:50:29.656243   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1313 14:50:29.662828   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1314 14:50:29.673022   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1315 14:50:29.679435   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1316 14:50:29.686255   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1317 14:50:29.695831   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1318 14:50:29.702956   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1319 14:50:29.709667   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1320 14:50:29.719309   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1321 14:50:29.726144   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1322 14:50:29.732617   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1323 14:50:29.736187   DOMAIN: 0000: Resource ranges:

 1324 14:50:29.739243   * Base: 7fc00000, Size: 40400000, Tag: 200

 1325 14:50:29.746155   * Base: d0000000, Size: 28000000, Tag: 200

 1326 14:50:29.749092   * Base: fa000000, Size: 1000000, Tag: 200

 1327 14:50:29.753075   * Base: fb001000, Size: 2fff000, Tag: 200

 1328 14:50:29.759211   * Base: fe010000, Size: 2e000, Tag: 200

 1329 14:50:29.762886   * Base: fe03f000, Size: d41000, Tag: 200

 1330 14:50:29.766147   * Base: fed88000, Size: 8000, Tag: 200

 1331 14:50:29.769446   * Base: fed93000, Size: d000, Tag: 200

 1332 14:50:29.775705   * Base: feda2000, Size: 1e000, Tag: 200

 1333 14:50:29.779342   * Base: fede0000, Size: 1220000, Tag: 200

 1334 14:50:29.782364   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1335 14:50:29.789265    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1336 14:50:29.796024    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1337 14:50:29.802701    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1338 14:50:29.809268    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1339 14:50:29.815784    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1340 14:50:29.822234    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1341 14:50:29.829078    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1342 14:50:29.835751    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1343 14:50:29.842585    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1344 14:50:29.849189    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1345 14:50:29.855681    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1346 14:50:29.862002    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1347 14:50:29.868705    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1348 14:50:29.875615    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1349 14:50:29.882142    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1350 14:50:29.888768    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1351 14:50:29.895471    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1352 14:50:29.902113    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1353 14:50:29.908828    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1354 14:50:29.915432    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1355 14:50:29.921556    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1356 14:50:29.928274    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1357 14:50:29.938281  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1358 14:50:29.944919  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1359 14:50:29.948587   PCI: 00:1d.0: Resource ranges:

 1360 14:50:29.951696   * Base: 7fc00000, Size: 100000, Tag: 200

 1361 14:50:29.958535    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1362 14:50:29.964783    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1363 14:50:29.971704    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1364 14:50:29.981753  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1365 14:50:29.988289  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1366 14:50:29.991520  Root Device assign_resources, bus 0 link: 0

 1367 14:50:29.997964  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1368 14:50:30.004671  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1369 14:50:30.014871  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1370 14:50:30.021414  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1371 14:50:30.031375  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1372 14:50:30.034366  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1373 14:50:30.037893  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1374 14:50:30.047729  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1375 14:50:30.054679  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1376 14:50:30.064348  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1377 14:50:30.067846  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1378 14:50:30.074438  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1379 14:50:30.080876  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1380 14:50:30.084156  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1381 14:50:30.091186  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1382 14:50:30.098163  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1383 14:50:30.107768  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1384 14:50:30.114457  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1385 14:50:30.121235  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1386 14:50:30.124205  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1387 14:50:30.131238  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1388 14:50:30.137564  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1389 14:50:30.141247  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1390 14:50:30.151187  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1391 14:50:30.154502  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1392 14:50:30.157666  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1393 14:50:30.168008  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1394 14:50:30.174554  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1395 14:50:30.184308  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1396 14:50:30.191442  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1397 14:50:30.198167  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1398 14:50:30.201218  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1399 14:50:30.213745  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1400 14:50:30.221108  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1401 14:50:30.227831  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1402 14:50:30.234447  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1403 14:50:30.240891  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1404 14:50:30.247538  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1405 14:50:30.257558  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1406 14:50:30.260848  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1407 14:50:30.270920  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1408 14:50:30.274001  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1409 14:50:30.280540  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1410 14:50:30.287060  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1411 14:50:30.290873  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1412 14:50:30.297566  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1413 14:50:30.300608  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1414 14:50:30.307605  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1415 14:50:30.310810  LPC: Trying to open IO window from 800 size 1ff

 1416 14:50:30.320545  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1417 14:50:30.327286  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1418 14:50:30.334248  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1419 14:50:30.340894  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1420 14:50:30.344371  Root Device assign_resources, bus 0 link: 0

 1421 14:50:30.347877  Done setting resources.

 1422 14:50:30.354135  Show resources in subtree (Root Device)...After assigning values.

 1423 14:50:30.357798   Root Device child on link 0 DOMAIN: 0000

 1424 14:50:30.364321    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1425 14:50:30.370878    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1426 14:50:30.380902    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1427 14:50:30.384395     PCI: 00:00.0

 1428 14:50:30.394593     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1429 14:50:30.404552     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1430 14:50:30.411102     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1431 14:50:30.421246     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1432 14:50:30.431200     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1433 14:50:30.440811     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1434 14:50:30.450691     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1435 14:50:30.457137     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1436 14:50:30.466564     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1437 14:50:30.476683     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1438 14:50:30.486889     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1439 14:50:30.496721     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1440 14:50:30.506675     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1441 14:50:30.513346     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1442 14:50:30.523500     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1443 14:50:30.533140     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1444 14:50:30.542757     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1445 14:50:30.552621     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1446 14:50:30.562808     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1447 14:50:30.572625     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1448 14:50:30.572712     PCI: 00:02.0

 1449 14:50:30.582561     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1450 14:50:30.596006     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1451 14:50:30.602642     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1452 14:50:30.609361     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1453 14:50:30.619803     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1454 14:50:30.620008      GENERIC: 0.0

 1455 14:50:30.622655     PCI: 00:05.0

 1456 14:50:30.633026     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1457 14:50:30.636110     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1458 14:50:30.639685      GENERIC: 0.0

 1459 14:50:30.640215     PCI: 00:08.0

 1460 14:50:30.653130     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1461 14:50:30.653728     PCI: 00:0a.0

 1462 14:50:30.656225     PCI: 00:0d.0 child on link 0 USB0 port 0

 1463 14:50:30.669104     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1464 14:50:30.672486      USB0 port 0 child on link 0 USB3 port 0

 1465 14:50:30.673085       USB3 port 0

 1466 14:50:30.676207       USB3 port 1

 1467 14:50:30.679188       USB3 port 2

 1468 14:50:30.679727       USB3 port 3

 1469 14:50:30.682776     PCI: 00:14.0 child on link 0 USB0 port 0

 1470 14:50:30.695501     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1471 14:50:30.699018      USB0 port 0 child on link 0 USB2 port 0

 1472 14:50:30.699557       USB2 port 0

 1473 14:50:30.702100       USB2 port 1

 1474 14:50:30.702555       USB2 port 2

 1475 14:50:30.705717       USB2 port 3

 1476 14:50:30.709383       USB2 port 4

 1477 14:50:30.709801       USB2 port 5

 1478 14:50:30.712482       USB2 port 6

 1479 14:50:30.713062       USB2 port 7

 1480 14:50:30.715511       USB2 port 8

 1481 14:50:30.715924       USB2 port 9

 1482 14:50:30.719241       USB3 port 0

 1483 14:50:30.719617       USB3 port 1

 1484 14:50:30.722265       USB3 port 2

 1485 14:50:30.722660       USB3 port 3

 1486 14:50:30.725282     PCI: 00:14.2

 1487 14:50:30.735287     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1488 14:50:30.745433     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1489 14:50:30.748875     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1490 14:50:30.761812     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1491 14:50:30.761951      GENERIC: 0.0

 1492 14:50:30.765431     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1493 14:50:30.775223     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1494 14:50:30.778714      I2C: 00:1a

 1495 14:50:30.778808      I2C: 00:31

 1496 14:50:30.781909      I2C: 00:32

 1497 14:50:30.785593     PCI: 00:15.1 child on link 0 I2C: 00:10

 1498 14:50:30.794991     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1499 14:50:30.798663      I2C: 00:10

 1500 14:50:30.798772     PCI: 00:15.2

 1501 14:50:30.808326     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1502 14:50:30.812085     PCI: 00:15.3

 1503 14:50:30.822102     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1504 14:50:30.822201     PCI: 00:16.0

 1505 14:50:30.835225     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1506 14:50:30.835353     PCI: 00:19.0

 1507 14:50:30.838217     PCI: 00:19.1 child on link 0 I2C: 00:15

 1508 14:50:30.848361     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1509 14:50:30.852185      I2C: 00:15

 1510 14:50:30.855260     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1511 14:50:30.865440     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1512 14:50:30.875478     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1513 14:50:30.889270     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1514 14:50:30.889713      GENERIC: 0.0

 1515 14:50:30.892218      PCI: 01:00.0

 1516 14:50:30.901982      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1517 14:50:30.912251      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1518 14:50:30.921955      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1519 14:50:30.925575     PCI: 00:1e.0

 1520 14:50:30.935229     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1521 14:50:30.938681     PCI: 00:1e.2 child on link 0 SPI: 00

 1522 14:50:30.949116     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1523 14:50:30.951886      SPI: 00

 1524 14:50:30.955557     PCI: 00:1e.3 child on link 0 SPI: 00

 1525 14:50:30.965478     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1526 14:50:30.966071      SPI: 00

 1527 14:50:30.971593     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1528 14:50:30.978869     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1529 14:50:30.981603      PNP: 0c09.0

 1530 14:50:30.988495      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1531 14:50:30.994862     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1532 14:50:31.004899     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1533 14:50:31.011293     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1534 14:50:31.018196      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1535 14:50:31.018369       GENERIC: 0.0

 1536 14:50:31.021194       GENERIC: 1.0

 1537 14:50:31.021331     PCI: 00:1f.3

 1538 14:50:31.034981     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1539 14:50:31.044370     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1540 14:50:31.044484     PCI: 00:1f.5

 1541 14:50:31.054559     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1542 14:50:31.061204    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1543 14:50:31.061294     APIC: 00

 1544 14:50:31.061361     APIC: 01

 1545 14:50:31.064765     APIC: 07

 1546 14:50:31.064849     APIC: 02

 1547 14:50:31.067820     APIC: 04

 1548 14:50:31.067945     APIC: 06

 1549 14:50:31.068039     APIC: 03

 1550 14:50:31.071390     APIC: 05

 1551 14:50:31.074481  Done allocating resources.

 1552 14:50:31.077644  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1553 14:50:31.084825  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1554 14:50:31.087713  Configure GPIOs for I2S audio on UP4.

 1555 14:50:31.095170  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1556 14:50:31.098455  Enabling resources...

 1557 14:50:31.101866  PCI: 00:00.0 subsystem <- 8086/9a12

 1558 14:50:31.105351  PCI: 00:00.0 cmd <- 06

 1559 14:50:31.108511  PCI: 00:02.0 subsystem <- 8086/9a40

 1560 14:50:31.111969  PCI: 00:02.0 cmd <- 03

 1561 14:50:31.115411  PCI: 00:04.0 subsystem <- 8086/9a03

 1562 14:50:31.115498  PCI: 00:04.0 cmd <- 02

 1563 14:50:31.122196  PCI: 00:05.0 subsystem <- 8086/9a19

 1564 14:50:31.122325  PCI: 00:05.0 cmd <- 02

 1565 14:50:31.125815  PCI: 00:08.0 subsystem <- 8086/9a11

 1566 14:50:31.128818  PCI: 00:08.0 cmd <- 06

 1567 14:50:31.132491  PCI: 00:0d.0 subsystem <- 8086/9a13

 1568 14:50:31.135695  PCI: 00:0d.0 cmd <- 02

 1569 14:50:31.138629  PCI: 00:14.0 subsystem <- 8086/a0ed

 1570 14:50:31.142233  PCI: 00:14.0 cmd <- 02

 1571 14:50:31.145681  PCI: 00:14.2 subsystem <- 8086/a0ef

 1572 14:50:31.148733  PCI: 00:14.2 cmd <- 02

 1573 14:50:31.152373  PCI: 00:14.3 subsystem <- 8086/a0f0

 1574 14:50:31.155419  PCI: 00:14.3 cmd <- 02

 1575 14:50:31.159119  PCI: 00:15.0 subsystem <- 8086/a0e8

 1576 14:50:31.159227  PCI: 00:15.0 cmd <- 02

 1577 14:50:31.165893  PCI: 00:15.1 subsystem <- 8086/a0e9

 1578 14:50:31.165991  PCI: 00:15.1 cmd <- 02

 1579 14:50:31.168810  PCI: 00:15.2 subsystem <- 8086/a0ea

 1580 14:50:31.172539  PCI: 00:15.2 cmd <- 02

 1581 14:50:31.175492  PCI: 00:15.3 subsystem <- 8086/a0eb

 1582 14:50:31.179125  PCI: 00:15.3 cmd <- 02

 1583 14:50:31.182224  PCI: 00:16.0 subsystem <- 8086/a0e0

 1584 14:50:31.186007  PCI: 00:16.0 cmd <- 02

 1585 14:50:31.188875  PCI: 00:19.1 subsystem <- 8086/a0c6

 1586 14:50:31.192301  PCI: 00:19.1 cmd <- 02

 1587 14:50:31.195649  PCI: 00:1d.0 bridge ctrl <- 0013

 1588 14:50:31.199105  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1589 14:50:31.202463  PCI: 00:1d.0 cmd <- 06

 1590 14:50:31.205751  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1591 14:50:31.205831  PCI: 00:1e.0 cmd <- 06

 1592 14:50:31.212610  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1593 14:50:31.212690  PCI: 00:1e.2 cmd <- 06

 1594 14:50:31.216157  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1595 14:50:31.219097  PCI: 00:1e.3 cmd <- 02

 1596 14:50:31.222462  PCI: 00:1f.0 subsystem <- 8086/a087

 1597 14:50:31.225946  PCI: 00:1f.0 cmd <- 407

 1598 14:50:31.229315  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1599 14:50:31.232394  PCI: 00:1f.3 cmd <- 02

 1600 14:50:31.236226  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1601 14:50:31.239184  PCI: 00:1f.5 cmd <- 406

 1602 14:50:31.242842  PCI: 01:00.0 cmd <- 02

 1603 14:50:31.247612  done.

 1604 14:50:31.250651  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1605 14:50:31.254382  Initializing devices...

 1606 14:50:31.257219  Root Device init

 1607 14:50:31.260843  Chrome EC: Set SMI mask to 0x0000000000000000

 1608 14:50:31.268441  Chrome EC: clear events_b mask to 0x0000000000000000

 1609 14:50:31.274991  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1610 14:50:31.281599  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1611 14:50:31.288262  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1612 14:50:31.291318  Chrome EC: Set WAKE mask to 0x0000000000000000

 1613 14:50:31.299586  fw_config match found: DB_USB=USB3_ACTIVE

 1614 14:50:31.302366  Configure Right Type-C port orientation for retimer

 1615 14:50:31.305692  Root Device init finished in 47 msecs

 1616 14:50:31.310058  PCI: 00:00.0 init

 1617 14:50:31.313553  CPU TDP = 9 Watts

 1618 14:50:31.313819  CPU PL1 = 9 Watts

 1619 14:50:31.316901  CPU PL2 = 40 Watts

 1620 14:50:31.320207  CPU PL4 = 83 Watts

 1621 14:50:31.323597  PCI: 00:00.0 init finished in 8 msecs

 1622 14:50:31.324114  PCI: 00:02.0 init

 1623 14:50:31.327446  GMA: Found VBT in CBFS

 1624 14:50:31.330441  GMA: Found valid VBT in CBFS

 1625 14:50:31.336936  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1626 14:50:31.343788                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1627 14:50:31.346834  PCI: 00:02.0 init finished in 18 msecs

 1628 14:50:31.350666  PCI: 00:05.0 init

 1629 14:50:31.354003  PCI: 00:05.0 init finished in 0 msecs

 1630 14:50:31.357152  PCI: 00:08.0 init

 1631 14:50:31.360074  PCI: 00:08.0 init finished in 0 msecs

 1632 14:50:31.363671  PCI: 00:14.0 init

 1633 14:50:31.367258  PCI: 00:14.0 init finished in 0 msecs

 1634 14:50:31.370250  PCI: 00:14.2 init

 1635 14:50:31.373792  PCI: 00:14.2 init finished in 0 msecs

 1636 14:50:31.374294  PCI: 00:15.0 init

 1637 14:50:31.376783  I2C bus 0 version 0x3230302a

 1638 14:50:31.380549  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1639 14:50:31.386879  PCI: 00:15.0 init finished in 6 msecs

 1640 14:50:31.387202  PCI: 00:15.1 init

 1641 14:50:31.390115  I2C bus 1 version 0x3230302a

 1642 14:50:31.393246  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1643 14:50:31.396748  PCI: 00:15.1 init finished in 6 msecs

 1644 14:50:31.400357  PCI: 00:15.2 init

 1645 14:50:31.403233  I2C bus 2 version 0x3230302a

 1646 14:50:31.406766  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1647 14:50:31.410361  PCI: 00:15.2 init finished in 6 msecs

 1648 14:50:31.413117  PCI: 00:15.3 init

 1649 14:50:31.416416  I2C bus 3 version 0x3230302a

 1650 14:50:31.420054  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1651 14:50:31.423444  PCI: 00:15.3 init finished in 6 msecs

 1652 14:50:31.426406  PCI: 00:16.0 init

 1653 14:50:31.429974  PCI: 00:16.0 init finished in 0 msecs

 1654 14:50:31.433290  PCI: 00:19.1 init

 1655 14:50:31.433372  I2C bus 5 version 0x3230302a

 1656 14:50:31.440216  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1657 14:50:31.443530  PCI: 00:19.1 init finished in 6 msecs

 1658 14:50:31.443635  PCI: 00:1d.0 init

 1659 14:50:31.446765  Initializing PCH PCIe bridge.

 1660 14:50:31.450129  PCI: 00:1d.0 init finished in 3 msecs

 1661 14:50:31.454354  PCI: 00:1f.0 init

 1662 14:50:31.457245  IOAPIC: Initializing IOAPIC at 0xfec00000

 1663 14:50:31.464147  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1664 14:50:31.464232  IOAPIC: ID = 0x02

 1665 14:50:31.467399  IOAPIC: Dumping registers

 1666 14:50:31.471095    reg 0x0000: 0x02000000

 1667 14:50:31.474133    reg 0x0001: 0x00770020

 1668 14:50:31.474225    reg 0x0002: 0x00000000

 1669 14:50:31.480873  PCI: 00:1f.0 init finished in 21 msecs

 1670 14:50:31.481048  PCI: 00:1f.2 init

 1671 14:50:31.484580  Disabling ACPI via APMC.

 1672 14:50:31.487631  APMC done.

 1673 14:50:31.490729  PCI: 00:1f.2 init finished in 5 msecs

 1674 14:50:31.502569  PCI: 01:00.0 init

 1675 14:50:31.505638  PCI: 01:00.0 init finished in 0 msecs

 1676 14:50:31.509404  PNP: 0c09.0 init

 1677 14:50:31.512566  Google Chrome EC uptime: 8.438 seconds

 1678 14:50:31.519290  Google Chrome AP resets since EC boot: 1

 1679 14:50:31.522553  Google Chrome most recent AP reset causes:

 1680 14:50:31.525626  	0.379: 32775 shutdown: entering G3

 1681 14:50:31.532344  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 1682 14:50:31.535958  PNP: 0c09.0 init finished in 22 msecs

 1683 14:50:31.541341  Devices initialized

 1684 14:50:31.544715  Show all devs... After init.

 1685 14:50:31.547961  Root Device: enabled 1

 1686 14:50:31.548084  DOMAIN: 0000: enabled 1

 1687 14:50:31.551596  CPU_CLUSTER: 0: enabled 1

 1688 14:50:31.554890  PCI: 00:00.0: enabled 1

 1689 14:50:31.558045  PCI: 00:02.0: enabled 1

 1690 14:50:31.558143  PCI: 00:04.0: enabled 1

 1691 14:50:31.561245  PCI: 00:05.0: enabled 1

 1692 14:50:31.564887  PCI: 00:06.0: enabled 0

 1693 14:50:31.568169  PCI: 00:07.0: enabled 0

 1694 14:50:31.568252  PCI: 00:07.1: enabled 0

 1695 14:50:31.571255  PCI: 00:07.2: enabled 0

 1696 14:50:31.574875  PCI: 00:07.3: enabled 0

 1697 14:50:31.577892  PCI: 00:08.0: enabled 1

 1698 14:50:31.577973  PCI: 00:09.0: enabled 0

 1699 14:50:31.581862  PCI: 00:0a.0: enabled 0

 1700 14:50:31.585016  PCI: 00:0d.0: enabled 1

 1701 14:50:31.585513  PCI: 00:0d.1: enabled 0

 1702 14:50:31.588667  PCI: 00:0d.2: enabled 0

 1703 14:50:31.591633  PCI: 00:0d.3: enabled 0

 1704 14:50:31.595383  PCI: 00:0e.0: enabled 0

 1705 14:50:31.595803  PCI: 00:10.2: enabled 1

 1706 14:50:31.598399  PCI: 00:10.6: enabled 0

 1707 14:50:31.601400  PCI: 00:10.7: enabled 0

 1708 14:50:31.605197  PCI: 00:12.0: enabled 0

 1709 14:50:31.605765  PCI: 00:12.6: enabled 0

 1710 14:50:31.607958  PCI: 00:13.0: enabled 0

 1711 14:50:31.611374  PCI: 00:14.0: enabled 1

 1712 14:50:31.614939  PCI: 00:14.1: enabled 0

 1713 14:50:31.615387  PCI: 00:14.2: enabled 1

 1714 14:50:31.618052  PCI: 00:14.3: enabled 1

 1715 14:50:31.621652  PCI: 00:15.0: enabled 1

 1716 14:50:31.622055  PCI: 00:15.1: enabled 1

 1717 14:50:31.625378  PCI: 00:15.2: enabled 1

 1718 14:50:31.628342  PCI: 00:15.3: enabled 1

 1719 14:50:31.631841  PCI: 00:16.0: enabled 1

 1720 14:50:31.632404  PCI: 00:16.1: enabled 0

 1721 14:50:31.634836  PCI: 00:16.2: enabled 0

 1722 14:50:31.638313  PCI: 00:16.3: enabled 0

 1723 14:50:31.641856  PCI: 00:16.4: enabled 0

 1724 14:50:31.642274  PCI: 00:16.5: enabled 0

 1725 14:50:31.644776  PCI: 00:17.0: enabled 0

 1726 14:50:31.648581  PCI: 00:19.0: enabled 0

 1727 14:50:31.651648  PCI: 00:19.1: enabled 1

 1728 14:50:31.652175  PCI: 00:19.2: enabled 0

 1729 14:50:31.655103  PCI: 00:1c.0: enabled 1

 1730 14:50:31.658658  PCI: 00:1c.1: enabled 0

 1731 14:50:31.659078  PCI: 00:1c.2: enabled 0

 1732 14:50:31.661972  PCI: 00:1c.3: enabled 0

 1733 14:50:31.665253  PCI: 00:1c.4: enabled 0

 1734 14:50:31.668420  PCI: 00:1c.5: enabled 0

 1735 14:50:31.669121  PCI: 00:1c.6: enabled 1

 1736 14:50:31.671714  PCI: 00:1c.7: enabled 0

 1737 14:50:31.674801  PCI: 00:1d.0: enabled 1

 1738 14:50:31.678059  PCI: 00:1d.1: enabled 0

 1739 14:50:31.678373  PCI: 00:1d.2: enabled 1

 1740 14:50:31.681652  PCI: 00:1d.3: enabled 0

 1741 14:50:31.684935  PCI: 00:1e.0: enabled 1

 1742 14:50:31.685170  PCI: 00:1e.1: enabled 0

 1743 14:50:31.688062  PCI: 00:1e.2: enabled 1

 1744 14:50:31.691184  PCI: 00:1e.3: enabled 1

 1745 14:50:31.694930  PCI: 00:1f.0: enabled 1

 1746 14:50:31.695114  PCI: 00:1f.1: enabled 0

 1747 14:50:31.697883  PCI: 00:1f.2: enabled 1

 1748 14:50:31.701525  PCI: 00:1f.3: enabled 1

 1749 14:50:31.704519  PCI: 00:1f.4: enabled 0

 1750 14:50:31.704645  PCI: 00:1f.5: enabled 1

 1751 14:50:31.707990  PCI: 00:1f.6: enabled 0

 1752 14:50:31.710979  PCI: 00:1f.7: enabled 0

 1753 14:50:31.711102  APIC: 00: enabled 1

 1754 14:50:31.714720  GENERIC: 0.0: enabled 1

 1755 14:50:31.717723  GENERIC: 0.0: enabled 1

 1756 14:50:31.721370  GENERIC: 1.0: enabled 1

 1757 14:50:31.721446  GENERIC: 0.0: enabled 1

 1758 14:50:31.724385  GENERIC: 1.0: enabled 1

 1759 14:50:31.728071  USB0 port 0: enabled 1

 1760 14:50:31.731133  GENERIC: 0.0: enabled 1

 1761 14:50:31.731213  USB0 port 0: enabled 1

 1762 14:50:31.734747  GENERIC: 0.0: enabled 1

 1763 14:50:31.738045  I2C: 00:1a: enabled 1

 1764 14:50:31.738121  I2C: 00:31: enabled 1

 1765 14:50:31.741299  I2C: 00:32: enabled 1

 1766 14:50:31.744288  I2C: 00:10: enabled 1

 1767 14:50:31.744361  I2C: 00:15: enabled 1

 1768 14:50:31.747659  GENERIC: 0.0: enabled 0

 1769 14:50:31.751242  GENERIC: 1.0: enabled 0

 1770 14:50:31.754363  GENERIC: 0.0: enabled 1

 1771 14:50:31.754451  SPI: 00: enabled 1

 1772 14:50:31.758017  SPI: 00: enabled 1

 1773 14:50:31.758115  PNP: 0c09.0: enabled 1

 1774 14:50:31.761488  GENERIC: 0.0: enabled 1

 1775 14:50:31.764377  USB3 port 0: enabled 1

 1776 14:50:31.767826  USB3 port 1: enabled 1

 1777 14:50:31.767904  USB3 port 2: enabled 0

 1778 14:50:31.771313  USB3 port 3: enabled 0

 1779 14:50:31.774757  USB2 port 0: enabled 0

 1780 14:50:31.774847  USB2 port 1: enabled 1

 1781 14:50:31.777783  USB2 port 2: enabled 1

 1782 14:50:31.781251  USB2 port 3: enabled 0

 1783 14:50:31.784719  USB2 port 4: enabled 1

 1784 14:50:31.784802  USB2 port 5: enabled 0

 1785 14:50:31.788152  USB2 port 6: enabled 0

 1786 14:50:31.791337  USB2 port 7: enabled 0

 1787 14:50:31.791418  USB2 port 8: enabled 0

 1788 14:50:31.794725  USB2 port 9: enabled 0

 1789 14:50:31.797578  USB3 port 0: enabled 0

 1790 14:50:31.797654  USB3 port 1: enabled 1

 1791 14:50:31.801243  USB3 port 2: enabled 0

 1792 14:50:31.804375  USB3 port 3: enabled 0

 1793 14:50:31.807996  GENERIC: 0.0: enabled 1

 1794 14:50:31.808072  GENERIC: 1.0: enabled 1

 1795 14:50:31.811040  APIC: 01: enabled 1

 1796 14:50:31.814580  APIC: 07: enabled 1

 1797 14:50:31.814667  APIC: 02: enabled 1

 1798 14:50:31.818138  APIC: 04: enabled 1

 1799 14:50:31.818222  APIC: 06: enabled 1

 1800 14:50:31.821235  APIC: 03: enabled 1

 1801 14:50:31.824211  APIC: 05: enabled 1

 1802 14:50:31.824293  PCI: 01:00.0: enabled 1

 1803 14:50:31.831030  BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms

 1804 14:50:31.834888  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1805 14:50:31.841185  ELOG: NV offset 0xf30000 size 0x1000

 1806 14:50:31.847713  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1807 14:50:31.854109  ELOG: Event(17) added with size 13 at 2024-05-28 14:50:32 UTC

 1808 14:50:31.860943  ELOG: Event(92) added with size 9 at 2024-05-28 14:50:32 UTC

 1809 14:50:31.867390  ELOG: Event(93) added with size 9 at 2024-05-28 14:50:32 UTC

 1810 14:50:31.874323  ELOG: Event(9E) added with size 10 at 2024-05-28 14:50:32 UTC

 1811 14:50:31.881067  ELOG: Event(9F) added with size 14 at 2024-05-28 14:50:32 UTC

 1812 14:50:31.884575  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1813 14:50:31.891006  ELOG: Event(A1) added with size 10 at 2024-05-28 14:50:32 UTC

 1814 14:50:31.898022  elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b

 1815 14:50:31.904239  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1816 14:50:31.904324  Finalize devices...

 1817 14:50:31.907282  Devices finalized

 1818 14:50:31.914103  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1819 14:50:31.917683  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1820 14:50:31.924299  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1821 14:50:31.927266  ME: HFSTS1                      : 0x80030055

 1822 14:50:31.934208  ME: HFSTS2                      : 0x30280116

 1823 14:50:31.937646  ME: HFSTS3                      : 0x00000050

 1824 14:50:31.940729  ME: HFSTS4                      : 0x00004000

 1825 14:50:31.947575  ME: HFSTS5                      : 0x00000000

 1826 14:50:31.950536  ME: HFSTS6                      : 0x00400006

 1827 14:50:31.954023  ME: Manufacturing Mode          : YES

 1828 14:50:31.957591  ME: SPI Protection Mode Enabled : NO

 1829 14:50:31.961191  ME: FW Partition Table          : OK

 1830 14:50:31.964311  ME: Bringup Loader Failure      : NO

 1831 14:50:31.970992  ME: Firmware Init Complete      : NO

 1832 14:50:31.973984  ME: Boot Options Present        : NO

 1833 14:50:31.977286  ME: Update In Progress          : NO

 1834 14:50:31.980560  ME: D0i3 Support                : YES

 1835 14:50:31.984200  ME: Low Power State Enabled     : NO

 1836 14:50:31.987290  ME: CPU Replaced                : YES

 1837 14:50:31.991014  ME: CPU Replacement Valid       : YES

 1838 14:50:31.994378  ME: Current Working State       : 5

 1839 14:50:31.997474  ME: Current Operation State     : 1

 1840 14:50:32.004295  ME: Current Operation Mode      : 3

 1841 14:50:32.007336  ME: Error Code                  : 0

 1842 14:50:32.010688  ME: Enhanced Debug Mode         : NO

 1843 14:50:32.013802  ME: CPU Debug Disabled          : YES

 1844 14:50:32.017328  ME: TXT Support                 : NO

 1845 14:50:32.023908  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1846 14:50:32.030481  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1847 14:50:32.034114  CBFS: 'fallback/slic' not found.

 1848 14:50:32.037222  ACPI: Writing ACPI tables at 76b01000.

 1849 14:50:32.040793  ACPI:    * FACS

 1850 14:50:32.040892  ACPI:    * DSDT

 1851 14:50:32.043859  Ramoops buffer: 0x100000@0x76a00000.

 1852 14:50:32.050401  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1853 14:50:32.054035  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1854 14:50:32.058296  Google Chrome EC: version:

 1855 14:50:32.061718  	ro: voema_v2.0.7540-147f8d37d1

 1856 14:50:32.065413  	rw: voema_v2.0.7540-147f8d37d1

 1857 14:50:32.068380    running image: 2

 1858 14:50:32.075296  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1859 14:50:32.078306  ACPI:    * FADT

 1860 14:50:32.078383  SCI is IRQ9

 1861 14:50:32.081759  ACPI: added table 1/32, length now 40

 1862 14:50:32.084749  ACPI:     * SSDT

 1863 14:50:32.088412  Found 1 CPU(s) with 8 core(s) each.

 1864 14:50:32.092001  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1865 14:50:32.098248  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1866 14:50:32.101827  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1867 14:50:32.105195  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1868 14:50:32.111947  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1869 14:50:32.118465  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1870 14:50:32.121888  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1871 14:50:32.128599  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1872 14:50:32.135026  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1873 14:50:32.138132  \_SB.PCI0.RP09: Added StorageD3Enable property

 1874 14:50:32.141752  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1875 14:50:32.148033  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1876 14:50:32.154657  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1877 14:50:32.158236  PS2K: Passing 80 keymaps to kernel

 1878 14:50:32.164632  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1879 14:50:32.171339  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1880 14:50:32.178183  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1881 14:50:32.181126  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1882 14:50:32.188049  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1883 14:50:32.194554  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1884 14:50:32.201290  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1885 14:50:32.207749  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1886 14:50:32.214576  ACPI: added table 2/32, length now 44

 1887 14:50:32.214669  ACPI:    * MCFG

 1888 14:50:32.217820  ACPI: added table 3/32, length now 48

 1889 14:50:32.220937  ACPI:    * TPM2

 1890 14:50:32.224132  TPM2 log created at 0x769f0000

 1891 14:50:32.227739  ACPI: added table 4/32, length now 52

 1892 14:50:32.227882  ACPI:    * MADT

 1893 14:50:32.231045  SCI is IRQ9

 1894 14:50:32.234577  ACPI: added table 5/32, length now 56

 1895 14:50:32.234726  current = 76b09850

 1896 14:50:32.237550  ACPI:    * DMAR

 1897 14:50:32.240797  ACPI: added table 6/32, length now 60

 1898 14:50:32.244517  ACPI: added table 7/32, length now 64

 1899 14:50:32.247685  ACPI:    * HPET

 1900 14:50:32.251364  ACPI: added table 8/32, length now 68

 1901 14:50:32.251484  ACPI: done.

 1902 14:50:32.254365  ACPI tables: 35216 bytes.

 1903 14:50:32.257897  smbios_write_tables: 769ef000

 1904 14:50:32.260813  EC returned error result code 3

 1905 14:50:32.264351  Couldn't obtain OEM name from CBI

 1906 14:50:32.267833  Create SMBIOS type 16

 1907 14:50:32.270902  Create SMBIOS type 17

 1908 14:50:32.271007  GENERIC: 0.0 (WIFI Device)

 1909 14:50:32.274576  SMBIOS tables: 1750 bytes.

 1910 14:50:32.277663  Writing table forward entry at 0x00000500

 1911 14:50:32.284436  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1912 14:50:32.287440  Writing coreboot table at 0x76b25000

 1913 14:50:32.294210   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1914 14:50:32.301080   1. 0000000000001000-000000000009ffff: RAM

 1915 14:50:32.304321   2. 00000000000a0000-00000000000fffff: RESERVED

 1916 14:50:32.307202   3. 0000000000100000-00000000769eefff: RAM

 1917 14:50:32.314234   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1918 14:50:32.320928   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1919 14:50:32.324385   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1920 14:50:32.330840   7. 0000000077000000-000000007fbfffff: RESERVED

 1921 14:50:32.334364   8. 00000000c0000000-00000000cfffffff: RESERVED

 1922 14:50:32.340557   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1923 14:50:32.343839  10. 00000000fb000000-00000000fb000fff: RESERVED

 1924 14:50:32.350821  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1925 14:50:32.354220  12. 00000000fed80000-00000000fed87fff: RESERVED

 1926 14:50:32.357269  13. 00000000fed90000-00000000fed92fff: RESERVED

 1927 14:50:32.363924  14. 00000000feda0000-00000000feda1fff: RESERVED

 1928 14:50:32.367545  15. 00000000fedc0000-00000000feddffff: RESERVED

 1929 14:50:32.374101  16. 0000000100000000-00000002803fffff: RAM

 1930 14:50:32.374213  Passing 4 GPIOs to payload:

 1931 14:50:32.380993              NAME |       PORT | POLARITY |     VALUE

 1932 14:50:32.387618               lid |  undefined |     high |      high

 1933 14:50:32.390533             power |  undefined |     high |       low

 1934 14:50:32.397355             oprom |  undefined |     high |       low

 1935 14:50:32.400989          EC in RW | 0x000000e5 |     high |      high

 1936 14:50:32.407422  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 96fc

 1937 14:50:32.410589  coreboot table: 1576 bytes.

 1938 14:50:32.414154  IMD ROOT    0. 0x76fff000 0x00001000

 1939 14:50:32.417639  IMD SMALL   1. 0x76ffe000 0x00001000

 1940 14:50:32.420616  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1941 14:50:32.427095  VPD         3. 0x76c4d000 0x00000367

 1942 14:50:32.430786  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1943 14:50:32.433746  CONSOLE     5. 0x76c2c000 0x00020000

 1944 14:50:32.437162  FMAP        6. 0x76c2b000 0x00000578

 1945 14:50:32.440647  TIME STAMP  7. 0x76c2a000 0x00000910

 1946 14:50:32.443786  VBOOT WORK  8. 0x76c16000 0x00014000

 1947 14:50:32.447382  ROMSTG STCK 9. 0x76c15000 0x00001000

 1948 14:50:32.450923  AFTER CAR  10. 0x76c0a000 0x0000b000

 1949 14:50:32.454160  RAMSTAGE   11. 0x76b97000 0x00073000

 1950 14:50:32.460738  REFCODE    12. 0x76b42000 0x00055000

 1951 14:50:32.464184  SMM BACKUP 13. 0x76b32000 0x00010000

 1952 14:50:32.467272  4f444749   14. 0x76b30000 0x00002000

 1953 14:50:32.470770  EXT VBT15. 0x76b2d000 0x0000219f

 1954 14:50:32.473854  COREBOOT   16. 0x76b25000 0x00008000

 1955 14:50:32.477650  ACPI       17. 0x76b01000 0x00024000

 1956 14:50:32.480825  ACPI GNVS  18. 0x76b00000 0x00001000

 1957 14:50:32.484210  RAMOOPS    19. 0x76a00000 0x00100000

 1958 14:50:32.488013  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1959 14:50:32.491024  SMBIOS     21. 0x769ef000 0x00000800

 1960 14:50:32.494713  IMD small region:

 1961 14:50:32.497741    IMD ROOT    0. 0x76ffec00 0x00000400

 1962 14:50:32.500742    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1963 14:50:32.507543    POWER STATE 2. 0x76ffeb80 0x00000044

 1964 14:50:32.511018    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1965 14:50:32.514517    MEM INFO    4. 0x76ffe980 0x000001e0

 1966 14:50:32.521159  BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms

 1967 14:50:32.524043  MTRR: Physical address space:

 1968 14:50:32.527829  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1969 14:50:32.534178  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1970 14:50:32.540740  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1971 14:50:32.547317  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1972 14:50:32.554131  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1973 14:50:32.560619  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1974 14:50:32.567389  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1975 14:50:32.571046  MTRR: Fixed MSR 0x250 0x0606060606060606

 1976 14:50:32.574142  MTRR: Fixed MSR 0x258 0x0606060606060606

 1977 14:50:32.577540  MTRR: Fixed MSR 0x259 0x0000000000000000

 1978 14:50:32.584174  MTRR: Fixed MSR 0x268 0x0606060606060606

 1979 14:50:32.587532  MTRR: Fixed MSR 0x269 0x0606060606060606

 1980 14:50:32.590791  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1981 14:50:32.594084  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1982 14:50:32.600766  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1983 14:50:32.603967  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1984 14:50:32.607588  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1985 14:50:32.610696  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1986 14:50:32.614838  call enable_fixed_mtrr()

 1987 14:50:32.618214  CPU physical address size: 39 bits

 1988 14:50:32.624960  MTRR: default type WB/UC MTRR counts: 6/6.

 1989 14:50:32.627998  MTRR: UC selected as default type.

 1990 14:50:32.635154  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1991 14:50:32.638185  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1992 14:50:32.644853  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1993 14:50:32.651694  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1994 14:50:32.658060  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1995 14:50:32.664821  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1996 14:50:32.664902  

 1997 14:50:32.668446  MTRR check

 1998 14:50:32.668527  Fixed MTRRs   : Enabled

 1999 14:50:32.671362  Variable MTRRs: Enabled

 2000 14:50:32.671441  

 2001 14:50:32.674880  MTRR: Fixed MSR 0x250 0x0606060606060606

 2002 14:50:32.681543  MTRR: Fixed MSR 0x258 0x0606060606060606

 2003 14:50:32.685027  MTRR: Fixed MSR 0x259 0x0000000000000000

 2004 14:50:32.688306  MTRR: Fixed MSR 0x268 0x0606060606060606

 2005 14:50:32.691816  MTRR: Fixed MSR 0x269 0x0606060606060606

 2006 14:50:32.698444  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2007 14:50:32.701632  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2008 14:50:32.705092  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2009 14:50:32.708418  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2010 14:50:32.714556  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2011 14:50:32.718252  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2012 14:50:32.725014  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 2013 14:50:32.727930  call enable_fixed_mtrr()

 2014 14:50:32.732152  Checking cr50 for pending updates

 2015 14:50:32.732262  CPU physical address size: 39 bits

 2016 14:50:32.738679  MTRR: Fixed MSR 0x250 0x0606060606060606

 2017 14:50:32.742257  MTRR: Fixed MSR 0x250 0x0606060606060606

 2018 14:50:32.745955  MTRR: Fixed MSR 0x258 0x0606060606060606

 2019 14:50:32.748919  MTRR: Fixed MSR 0x259 0x0000000000000000

 2020 14:50:32.755771  MTRR: Fixed MSR 0x268 0x0606060606060606

 2021 14:50:32.759250  MTRR: Fixed MSR 0x269 0x0606060606060606

 2022 14:50:32.762437  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2023 14:50:32.765692  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2024 14:50:32.772457  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2025 14:50:32.775521  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2026 14:50:32.779022  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2027 14:50:32.782127  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2028 14:50:32.789531  MTRR: Fixed MSR 0x258 0x0606060606060606

 2029 14:50:32.789612  call enable_fixed_mtrr()

 2030 14:50:32.796173  MTRR: Fixed MSR 0x259 0x0000000000000000

 2031 14:50:32.799085  MTRR: Fixed MSR 0x268 0x0606060606060606

 2032 14:50:32.802486  MTRR: Fixed MSR 0x269 0x0606060606060606

 2033 14:50:32.805998  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2034 14:50:32.812627  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2035 14:50:32.816041  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2036 14:50:32.818855  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2037 14:50:32.822627  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2038 14:50:32.828762  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2039 14:50:32.832298  CPU physical address size: 39 bits

 2040 14:50:32.835626  call enable_fixed_mtrr()

 2041 14:50:32.839139  MTRR: Fixed MSR 0x250 0x0606060606060606

 2042 14:50:32.842192  MTRR: Fixed MSR 0x250 0x0606060606060606

 2043 14:50:32.848850  MTRR: Fixed MSR 0x258 0x0606060606060606

 2044 14:50:32.851995  MTRR: Fixed MSR 0x259 0x0000000000000000

 2045 14:50:32.855517  MTRR: Fixed MSR 0x268 0x0606060606060606

 2046 14:50:32.858591  MTRR: Fixed MSR 0x269 0x0606060606060606

 2047 14:50:32.865252  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2048 14:50:32.868777  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2049 14:50:32.872345  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2050 14:50:32.875119  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2051 14:50:32.881873  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2052 14:50:32.885409  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2053 14:50:32.888479  MTRR: Fixed MSR 0x258 0x0606060606060606

 2054 14:50:32.892264  call enable_fixed_mtrr()

 2055 14:50:32.895230  MTRR: Fixed MSR 0x259 0x0000000000000000

 2056 14:50:32.901789  MTRR: Fixed MSR 0x268 0x0606060606060606

 2057 14:50:32.905177  MTRR: Fixed MSR 0x269 0x0606060606060606

 2058 14:50:32.908908  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2059 14:50:32.911865  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2060 14:50:32.918616  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2061 14:50:32.921956  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2062 14:50:32.925236  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2063 14:50:32.928841  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2064 14:50:32.932517  CPU physical address size: 39 bits

 2065 14:50:32.938631  call enable_fixed_mtrr()

 2066 14:50:32.942020  CPU physical address size: 39 bits

 2067 14:50:32.945648  MTRR: Fixed MSR 0x250 0x0606060606060606

 2068 14:50:32.948601  MTRR: Fixed MSR 0x250 0x0606060606060606

 2069 14:50:32.952313  MTRR: Fixed MSR 0x258 0x0606060606060606

 2070 14:50:32.959085  MTRR: Fixed MSR 0x259 0x0000000000000000

 2071 14:50:32.962090  MTRR: Fixed MSR 0x268 0x0606060606060606

 2072 14:50:32.965926  MTRR: Fixed MSR 0x269 0x0606060606060606

 2073 14:50:32.968875  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2074 14:50:32.971997  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2075 14:50:32.978968  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2076 14:50:32.982039  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2077 14:50:32.985579  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2078 14:50:32.988723  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2079 14:50:32.996464  MTRR: Fixed MSR 0x258 0x0606060606060606

 2080 14:50:32.996573  call enable_fixed_mtrr()

 2081 14:50:33.003111  MTRR: Fixed MSR 0x259 0x0000000000000000

 2082 14:50:33.006550  MTRR: Fixed MSR 0x268 0x0606060606060606

 2083 14:50:33.010038  MTRR: Fixed MSR 0x269 0x0606060606060606

 2084 14:50:33.012944  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2085 14:50:33.019619  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2086 14:50:33.023256  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2087 14:50:33.026067  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2088 14:50:33.029556  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2089 14:50:33.036195  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2090 14:50:33.039792  CPU physical address size: 39 bits

 2091 14:50:33.042873  call enable_fixed_mtrr()

 2092 14:50:33.047127  Reading cr50 TPM mode

 2093 14:50:33.050409  CPU physical address size: 39 bits

 2094 14:50:33.053834  CPU physical address size: 39 bits

 2095 14:50:33.057461  BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms

 2096 14:50:33.067127  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2097 14:50:33.070606  Checking segment from ROM address 0xffc02b38

 2098 14:50:33.074222  Checking segment from ROM address 0xffc02b54

 2099 14:50:33.081094  Loading segment from ROM address 0xffc02b38

 2100 14:50:33.081645    code (compression=0)

 2101 14:50:33.090582    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2102 14:50:33.100312  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2103 14:50:33.100869  it's not compressed!

 2104 14:50:33.240383  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2105 14:50:33.247427  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2106 14:50:33.253759  Loading segment from ROM address 0xffc02b54

 2107 14:50:33.254173    Entry Point 0x30000000

 2108 14:50:33.257324  Loaded segments

 2109 14:50:33.263694  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms

 2110 14:50:33.307121  Finalizing chipset.

 2111 14:50:33.310671  Finalizing SMM.

 2112 14:50:33.311087  APMC done.

 2113 14:50:33.317315  BS: BS_PAYLOAD_LOAD exit times (exec / console): 43 / 5 ms

 2114 14:50:33.320330  mp_park_aps done after 0 msecs.

 2115 14:50:33.323934  Jumping to boot code at 0x30000000(0x76b25000)

 2116 14:50:33.333800  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2117 14:50:33.334220  

 2118 14:50:33.334546  

 2119 14:50:33.334848  

 2120 14:50:33.337254  Starting depthcharge on Voema...

 2121 14:50:33.337667  

 2122 14:50:33.338691  end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
 2123 14:50:33.339163  start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
 2124 14:50:33.339560  Setting prompt string to ['volteer:']
 2125 14:50:33.339955  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
 2126 14:50:33.347175  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2127 14:50:33.347596  

 2128 14:50:33.354057  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2129 14:50:33.354478  

 2130 14:50:33.357123  Looking for NVMe Controller 0x3005f220 @ 00:1d:00

 2131 14:50:33.361414  

 2132 14:50:33.361829  Failed to find eMMC card reader

 2133 14:50:33.362166  

 2134 14:50:33.364422  Wipe memory regions:

 2135 14:50:33.364838  

 2136 14:50:33.367982  	[0x00000000001000, 0x000000000a0000)

 2137 14:50:33.368444  

 2138 14:50:33.371081  	[0x00000000100000, 0x00000030000000)

 2139 14:50:33.399576  

 2140 14:50:33.402549  	[0x00000032662db0, 0x000000769ef000)

 2141 14:50:33.438358  

 2142 14:50:33.441552  	[0x00000100000000, 0x00000280400000)

 2143 14:50:33.643333  

 2144 14:50:33.646422  ec_init: CrosEC protocol v3 supported (256, 256)

 2145 14:50:33.646898  

 2146 14:50:33.653321  update_port_state: port C0 state: usb enable 1 mux conn 0

 2147 14:50:33.653747  

 2148 14:50:33.662817  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2149 14:50:33.666175  

 2150 14:50:33.669369  pmc_check_ipc_sts: STS_BUSY done after 1562 us

 2151 14:50:33.669922  

 2152 14:50:33.672844  send_conn_disc_msg: pmc_send_cmd succeeded

 2153 14:50:34.104176  

 2154 14:50:34.104642  R8152: Initializing

 2155 14:50:34.104970  

 2156 14:50:34.107449  Version 6 (ocp_data = 5c30)

 2157 14:50:34.107943  

 2158 14:50:34.111273  R8152: Done initializing

 2159 14:50:34.111679  

 2160 14:50:34.114256  Adding net device

 2161 14:50:34.416607  

 2162 14:50:34.419667  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2163 14:50:34.420086  

 2164 14:50:34.420629  


 2165 14:50:34.423694  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2167 14:50:34.524786  volteer: tftpboot 192.168.201.1 14064447/tftp-deploy-903tncb7/kernel/bzImage 14064447/tftp-deploy-903tncb7/kernel/cmdline 14064447/tftp-deploy-903tncb7/ramdisk/ramdisk.cpio.gz

 2168 14:50:34.524934  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2169 14:50:34.525087  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2170 14:50:34.529464  tftpboot 192.168.201.1 14064447/tftp-deploy-903tncb7/kernel/bzIploy-903tncb7/kernel/cmdline 14064447/tftp-deploy-903tncb7/ramdisk/ramdisk.cpio.gz

 2171 14:50:34.529546  

 2172 14:50:34.529609  Waiting for link

 2173 14:50:34.732655  

 2174 14:50:34.732817  done.

 2175 14:50:34.732926  

 2176 14:50:34.733046  MAC: 00:24:32:30:7e:47

 2177 14:50:34.733105  

 2178 14:50:34.735899  Sending DHCP discover... done.

 2179 14:50:34.736003  

 2180 14:50:34.738951  Waiting for reply... done.

 2181 14:50:34.739056  

 2182 14:50:34.742537  Sending DHCP request... done.

 2183 14:50:34.742637  

 2184 14:50:34.745591  Waiting for reply... done.

 2185 14:50:34.745687  

 2186 14:50:34.749284  My ip is 192.168.201.19

 2187 14:50:34.749353  

 2188 14:50:34.752235  The DHCP server ip is 192.168.201.1

 2189 14:50:34.752301  

 2190 14:50:34.759025  TFTP server IP predefined by user: 192.168.201.1

 2191 14:50:34.759100  

 2192 14:50:34.765544  Bootfile predefined by user: 14064447/tftp-deploy-903tncb7/kernel/bzImage

 2193 14:50:34.765646  

 2194 14:50:34.768939  Sending tftp read request... done.

 2195 14:50:34.769075  

 2196 14:50:34.772652  Waiting for the transfer... 

 2197 14:50:34.772755  

 2198 14:50:35.292474  00000000 ################################################################

 2199 14:50:35.292611  

 2200 14:50:35.809569  00080000 ################################################################

 2201 14:50:35.809708  

 2202 14:50:36.327995  00100000 ################################################################

 2203 14:50:36.328161  

 2204 14:50:36.845913  00180000 ################################################################

 2205 14:50:36.846050  

 2206 14:50:37.357246  00200000 ################################################################

 2207 14:50:37.357381  

 2208 14:50:37.866957  00280000 ################################################################

 2209 14:50:37.867091  

 2210 14:50:38.385721  00300000 ################################################################

 2211 14:50:38.385891  

 2212 14:50:38.928899  00380000 ################################################################

 2213 14:50:38.929041  

 2214 14:50:39.476085  00400000 ################################################################

 2215 14:50:39.476212  

 2216 14:50:39.993603  00480000 ################################################################

 2217 14:50:39.993737  

 2218 14:50:40.507288  00500000 ################################################################

 2219 14:50:40.507434  

 2220 14:50:41.017568  00580000 ################################################################

 2221 14:50:41.017707  

 2222 14:50:41.524592  00600000 ################################################################

 2223 14:50:41.524742  

 2224 14:50:42.031181  00680000 ################################################################

 2225 14:50:42.031391  

 2226 14:50:42.534396  00700000 ################################################################

 2227 14:50:42.534549  

 2228 14:50:43.054059  00780000 ################################################################

 2229 14:50:43.054225  

 2230 14:50:43.571340  00800000 ################################################################

 2231 14:50:43.571487  

 2232 14:50:44.082935  00880000 ################################################################

 2233 14:50:44.083082  

 2234 14:50:44.595143  00900000 ################################################################

 2235 14:50:44.595329  

 2236 14:50:45.104657  00980000 ################################################################

 2237 14:50:45.104810  

 2238 14:50:45.614968  00a00000 ################################################################

 2239 14:50:45.615117  

 2240 14:50:46.126512  00a80000 ################################################################

 2241 14:50:46.126691  

 2242 14:50:46.638031  00b00000 ################################################################

 2243 14:50:46.638183  

 2244 14:50:47.160793  00b80000 ################################################################

 2245 14:50:47.160965  

 2246 14:50:47.697157  00c00000 ################################################################

 2247 14:50:47.697288  

 2248 14:50:48.227967  00c80000 ################################################################

 2249 14:50:48.228103  

 2250 14:50:48.755925  00d00000 ################################################################

 2251 14:50:48.756062  

 2252 14:50:49.282851  00d80000 ################################################################

 2253 14:50:49.282988  

 2254 14:50:49.819085  00e00000 ################################################################

 2255 14:50:49.819216  

 2256 14:50:50.339632  00e80000 ################################################################

 2257 14:50:50.339773  

 2258 14:50:50.865628  00f00000 ################################################################

 2259 14:50:50.865767  

 2260 14:50:51.405633  00f80000 ################################################################

 2261 14:50:51.405764  

 2262 14:50:51.758086  01000000 ########################################### done.

 2263 14:50:51.758229  

 2264 14:50:51.760939  The bootfile was 17121280 bytes long.

 2265 14:50:51.761034  

 2266 14:50:51.764447  Sending tftp read request... done.

 2267 14:50:51.764533  

 2268 14:50:51.767528  Waiting for the transfer... 

 2269 14:50:51.767611  

 2270 14:50:52.294542  00000000 ################################################################

 2271 14:50:52.294675  

 2272 14:50:52.810760  00080000 ################################################################

 2273 14:50:52.810898  

 2274 14:50:53.328555  00100000 ################################################################

 2275 14:50:53.328709  

 2276 14:50:53.852900  00180000 ################################################################

 2277 14:50:53.853088  

 2278 14:50:54.374245  00200000 ################################################################

 2279 14:50:54.374386  

 2280 14:50:54.891718  00280000 ################################################################

 2281 14:50:54.891862  

 2282 14:50:55.409969  00300000 ################################################################

 2283 14:50:55.410110  

 2284 14:50:55.933581  00380000 ################################################################

 2285 14:50:55.933778  

 2286 14:50:56.459043  00400000 ################################################################

 2287 14:50:56.459177  

 2288 14:50:56.995463  00480000 ################################################################

 2289 14:50:56.995613  

 2290 14:50:57.550510  00500000 ################################################################

 2291 14:50:57.550638  

 2292 14:50:58.095839  00580000 ################################################################

 2293 14:50:58.095984  

 2294 14:50:58.646977  00600000 ################################################################

 2295 14:50:58.647158  

 2296 14:50:59.196053  00680000 ################################################################

 2297 14:50:59.196276  

 2298 14:50:59.748622  00700000 ################################################################

 2299 14:50:59.748769  

 2300 14:50:59.879670  00780000 ############### done.

 2301 14:50:59.879819  

 2302 14:50:59.882703  Sending tftp read request... done.

 2303 14:50:59.882785  

 2304 14:50:59.886117  Waiting for the transfer... 

 2305 14:50:59.886198  

 2306 14:50:59.886262  00000000 # done.

 2307 14:50:59.886323  

 2308 14:50:59.895893  Command line loaded dynamically from TFTP file: 14064447/tftp-deploy-903tncb7/kernel/cmdline

 2309 14:50:59.895974  

 2310 14:50:59.919367  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14064447/extract-nfsrootfs-z1k5s3ar,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1

 2311 14:50:59.926995  

 2312 14:50:59.929960  Shutting down all USB controllers.

 2313 14:50:59.930044  

 2314 14:50:59.930109  Removing current net device

 2315 14:50:59.930171  

 2316 14:50:59.933527  Finalizing coreboot

 2317 14:50:59.933610  

 2318 14:50:59.940213  Exiting depthcharge with code 4 at timestamp: 35248697

 2319 14:50:59.940297  

 2320 14:50:59.940362  

 2321 14:50:59.940422  Starting kernel ...

 2322 14:50:59.940482  

 2323 14:50:59.940539  

 2324 14:50:59.941029  end: 2.2.4 bootloader-commands (duration 00:00:27) [common]
 2325 14:50:59.941132  start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
 2326 14:50:59.941209  Setting prompt string to ['Linux version [0-9]']
 2327 14:50:59.941277  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2328 14:50:59.941343  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2330 14:55:17.941946  end: 2.2.5 auto-login-action (duration 00:04:18) [common]
 2332 14:55:17.942923  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
 2334 14:55:17.943695  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2337 14:55:17.945105  end: 2 depthcharge-action (duration 00:05:00) [common]
 2339 14:55:17.946163  Cleaning after the job
 2340 14:55:17.946391  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064447/tftp-deploy-903tncb7/ramdisk
 2341 14:55:17.947287  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064447/tftp-deploy-903tncb7/kernel
 2342 14:55:17.949162  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064447/tftp-deploy-903tncb7/nfsrootfs
 2343 14:55:18.002935  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064447/tftp-deploy-903tncb7/modules
 2344 14:55:18.004002  start: 4.1 power-off (timeout 00:00:30) [common]
 2345 14:55:18.004187  Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-9', '--port=1', '--command=off']
 2346 14:55:18.082438  >> Command sent successfully.

 2347 14:55:18.086798  Returned 0 in 0 seconds
 2348 14:55:18.187774  end: 4.1 power-off (duration 00:00:00) [common]
 2350 14:55:18.189393  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2351 14:55:18.190570  Listened to connection for namespace 'common' for up to 1s
 2352 14:55:19.190735  Finalising connection for namespace 'common'
 2353 14:55:19.191367  Disconnecting from shell: Finalise
 2354 14:55:19.191723  

 2355 14:55:19.292660  end: 4.2 read-feedback (duration 00:00:01) [common]
 2356 14:55:19.293288  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14064447
 2357 14:55:19.559000  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14064447
 2358 14:55:19.559193  JobError: Your job cannot terminate cleanly.