Boot log: acer-cp514-2h-1130g7-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 14:51:14.908959 lava-dispatcher, installed at version: 2024.03
2 14:51:14.909186 start: 0 validate
3 14:51:14.909384 Start time: 2024-05-28 14:51:14.909376+00:00 (UTC)
4 14:51:14.909513 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:51:14.909701 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-cros-ec%2F20240313.0%2Famd64%2Frootfs.cpio.gz exists
6 14:51:15.184054 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:51:15.184848 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.312-cip109-160-gd72fa2f84aefe%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:51:15.446918 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:51:15.447627 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.312-cip109-160-gd72fa2f84aefe%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 14:51:27.260641 validate duration: 12.35
12 14:51:27.260997 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:51:27.261136 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:51:27.261258 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:51:27.261462 Not decompressing ramdisk as can be used compressed.
16 14:51:27.261549 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-cros-ec/20240313.0/amd64/rootfs.cpio.gz
17 14:51:27.261614 saving as /var/lib/lava/dispatcher/tmp/14064482/tftp-deploy-4anq0lj7/ramdisk/rootfs.cpio.gz
18 14:51:27.261683 total size: 40325651 (38 MB)
19 14:51:28.288558 progress 0 % (0 MB)
20 14:51:28.299269 progress 5 % (1 MB)
21 14:51:28.309304 progress 10 % (3 MB)
22 14:51:28.319265 progress 15 % (5 MB)
23 14:51:28.329317 progress 20 % (7 MB)
24 14:51:28.339208 progress 25 % (9 MB)
25 14:51:28.349365 progress 30 % (11 MB)
26 14:51:28.359304 progress 35 % (13 MB)
27 14:51:28.369459 progress 40 % (15 MB)
28 14:51:28.379348 progress 45 % (17 MB)
29 14:51:28.389458 progress 50 % (19 MB)
30 14:51:28.399635 progress 55 % (21 MB)
31 14:51:28.410937 progress 60 % (23 MB)
32 14:51:28.421180 progress 65 % (25 MB)
33 14:51:28.431307 progress 70 % (26 MB)
34 14:51:28.441239 progress 75 % (28 MB)
35 14:51:28.451514 progress 80 % (30 MB)
36 14:51:28.461717 progress 85 % (32 MB)
37 14:51:28.471637 progress 90 % (34 MB)
38 14:51:28.481546 progress 95 % (36 MB)
39 14:51:28.491347 progress 100 % (38 MB)
40 14:51:28.491545 38 MB downloaded in 1.23 s (31.27 MB/s)
41 14:51:28.491700 end: 1.1.1 http-download (duration 00:00:01) [common]
43 14:51:28.491936 end: 1.1 download-retry (duration 00:00:01) [common]
44 14:51:28.492022 start: 1.2 download-retry (timeout 00:09:59) [common]
45 14:51:28.492106 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 14:51:28.492242 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.312-cip109-160-gd72fa2f84aefe/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 14:51:28.492311 saving as /var/lib/lava/dispatcher/tmp/14064482/tftp-deploy-4anq0lj7/kernel/bzImage
48 14:51:28.492374 total size: 17121280 (16 MB)
49 14:51:28.492451 No compression specified
50 14:51:28.493720 progress 0 % (0 MB)
51 14:51:28.498128 progress 5 % (0 MB)
52 14:51:28.502642 progress 10 % (1 MB)
53 14:51:28.506859 progress 15 % (2 MB)
54 14:51:28.511078 progress 20 % (3 MB)
55 14:51:28.515448 progress 25 % (4 MB)
56 14:51:28.519749 progress 30 % (4 MB)
57 14:51:28.523965 progress 35 % (5 MB)
58 14:51:28.528427 progress 40 % (6 MB)
59 14:51:28.532944 progress 45 % (7 MB)
60 14:51:28.537996 progress 50 % (8 MB)
61 14:51:28.543079 progress 55 % (9 MB)
62 14:51:28.548007 progress 60 % (9 MB)
63 14:51:28.552857 progress 65 % (10 MB)
64 14:51:28.557642 progress 70 % (11 MB)
65 14:51:28.562308 progress 75 % (12 MB)
66 14:51:28.566780 progress 80 % (13 MB)
67 14:51:28.571381 progress 85 % (13 MB)
68 14:51:28.575667 progress 90 % (14 MB)
69 14:51:28.580151 progress 95 % (15 MB)
70 14:51:28.584457 progress 100 % (16 MB)
71 14:51:28.584636 16 MB downloaded in 0.09 s (176.98 MB/s)
72 14:51:28.584783 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:51:28.585020 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:51:28.585108 start: 1.3 download-retry (timeout 00:09:59) [common]
76 14:51:28.585194 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 14:51:28.585365 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.312-cip109-160-gd72fa2f84aefe/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 14:51:28.585437 saving as /var/lib/lava/dispatcher/tmp/14064482/tftp-deploy-4anq0lj7/modules/modules.tar
79 14:51:28.585499 total size: 1253532 (1 MB)
80 14:51:28.585562 Using unxz to decompress xz
81 14:51:28.589128 progress 2 % (0 MB)
82 14:51:28.589720 progress 7 % (0 MB)
83 14:51:28.593200 progress 13 % (0 MB)
84 14:51:28.597310 progress 18 % (0 MB)
85 14:51:28.601678 progress 23 % (0 MB)
86 14:51:28.605286 progress 28 % (0 MB)
87 14:51:28.609380 progress 33 % (0 MB)
88 14:51:28.613652 progress 39 % (0 MB)
89 14:51:28.617503 progress 44 % (0 MB)
90 14:51:28.620677 progress 49 % (0 MB)
91 14:51:28.624973 progress 54 % (0 MB)
92 14:51:28.628740 progress 60 % (0 MB)
93 14:51:28.632981 progress 65 % (0 MB)
94 14:51:28.636859 progress 70 % (0 MB)
95 14:51:28.640201 progress 75 % (0 MB)
96 14:51:28.644208 progress 81 % (0 MB)
97 14:51:28.648544 progress 86 % (1 MB)
98 14:51:28.652294 progress 91 % (1 MB)
99 14:51:28.656522 progress 96 % (1 MB)
100 14:51:28.666480 1 MB downloaded in 0.08 s (14.76 MB/s)
101 14:51:28.666729 end: 1.3.1 http-download (duration 00:00:00) [common]
103 14:51:28.667000 end: 1.3 download-retry (duration 00:00:00) [common]
104 14:51:28.667095 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
105 14:51:28.667194 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
106 14:51:28.667281 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
107 14:51:28.667366 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
108 14:51:28.667568 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z
109 14:51:28.667699 makedir: /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin
110 14:51:28.667801 makedir: /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/tests
111 14:51:28.667897 makedir: /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/results
112 14:51:28.668009 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-add-keys
113 14:51:28.668150 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-add-sources
114 14:51:28.668275 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-background-process-start
115 14:51:28.668399 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-background-process-stop
116 14:51:28.668520 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-common-functions
117 14:51:28.668639 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-echo-ipv4
118 14:51:28.668769 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-install-packages
119 14:51:28.668951 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-installed-packages
120 14:51:28.669155 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-os-build
121 14:51:28.669360 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-probe-channel
122 14:51:28.669558 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-probe-ip
123 14:51:28.669721 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-target-ip
124 14:51:28.669844 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-target-mac
125 14:51:28.670029 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-target-storage
126 14:51:28.670156 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-test-case
127 14:51:28.670278 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-test-event
128 14:51:28.670398 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-test-feedback
129 14:51:28.670522 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-test-raise
130 14:51:28.670640 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-test-reference
131 14:51:28.670763 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-test-runner
132 14:51:28.670882 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-test-set
133 14:51:28.671004 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-test-shell
134 14:51:28.671127 Updating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-install-packages (oe)
135 14:51:28.671274 Updating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/bin/lava-installed-packages (oe)
136 14:51:28.671391 Creating /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/environment
137 14:51:28.671487 LAVA metadata
138 14:51:28.671563 - LAVA_JOB_ID=14064482
139 14:51:28.671631 - LAVA_DISPATCHER_IP=192.168.201.1
140 14:51:28.671732 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
141 14:51:28.671801 skipped lava-vland-overlay
142 14:51:28.671877 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
143 14:51:28.671957 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
144 14:51:28.672024 skipped lava-multinode-overlay
145 14:51:28.672097 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
146 14:51:28.672185 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
147 14:51:28.672260 Loading test definitions
148 14:51:28.672354 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
149 14:51:28.672428 Using /lava-14064482 at stage 0
150 14:51:28.672725 uuid=14064482_1.4.2.3.1 testdef=None
151 14:51:28.672813 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
152 14:51:28.672898 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
153 14:51:28.673439 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
155 14:51:28.673664 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
156 14:51:28.674258 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
158 14:51:28.674488 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
159 14:51:28.675065 runner path: /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/0/tests/0_cros-ec test_uuid 14064482_1.4.2.3.1
160 14:51:28.675218 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
162 14:51:28.675423 Creating lava-test-runner.conf files
163 14:51:28.675486 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14064482/lava-overlay-i67r4g3z/lava-14064482/0 for stage 0
164 14:51:28.675574 - 0_cros-ec
165 14:51:28.675669 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
166 14:51:28.675755 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
167 14:51:28.682791 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
168 14:51:28.682921 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
169 14:51:28.683012 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
170 14:51:28.683119 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
171 14:51:28.683217 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
172 14:51:29.750123 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
173 14:51:29.750494 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
174 14:51:29.750601 extracting modules file /var/lib/lava/dispatcher/tmp/14064482/tftp-deploy-4anq0lj7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14064482/extract-overlay-ramdisk-7kqk5jhh/ramdisk
175 14:51:29.782268 end: 1.4.4 extract-modules (duration 00:00:00) [common]
176 14:51:29.782448 start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
177 14:51:29.782544 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14064482/compress-overlay-zj_57q8l/overlay-1.4.2.4.tar.gz to ramdisk
178 14:51:29.782616 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14064482/compress-overlay-zj_57q8l/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14064482/extract-overlay-ramdisk-7kqk5jhh/ramdisk
179 14:51:29.789110 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
180 14:51:29.789247 start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
181 14:51:29.789358 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
182 14:51:29.789448 start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
183 14:51:29.789528 Building ramdisk /var/lib/lava/dispatcher/tmp/14064482/extract-overlay-ramdisk-7kqk5jhh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14064482/extract-overlay-ramdisk-7kqk5jhh/ramdisk
184 14:51:30.349940 >> 220872 blocks
185 14:51:34.389746 rename /var/lib/lava/dispatcher/tmp/14064482/extract-overlay-ramdisk-7kqk5jhh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14064482/tftp-deploy-4anq0lj7/ramdisk/ramdisk.cpio.gz
186 14:51:34.390209 end: 1.4.7 compress-ramdisk (duration 00:00:05) [common]
187 14:51:34.390378 start: 1.4.8 prepare-kernel (timeout 00:09:53) [common]
188 14:51:34.390521 start: 1.4.8.1 prepare-fit (timeout 00:09:53) [common]
189 14:51:34.390654 No mkimage arch provided, not using FIT.
190 14:51:34.390775 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
191 14:51:34.390890 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
192 14:51:34.391023 end: 1.4 prepare-tftp-overlay (duration 00:00:06) [common]
193 14:51:34.391143 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:53) [common]
194 14:51:34.391249 No LXC device requested
195 14:51:34.391360 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
196 14:51:34.391483 start: 1.6 deploy-device-env (timeout 00:09:53) [common]
197 14:51:34.391592 end: 1.6 deploy-device-env (duration 00:00:00) [common]
198 14:51:34.391693 Checking files for TFTP limit of 4294967296 bytes.
199 14:51:34.392218 end: 1 tftp-deploy (duration 00:00:07) [common]
200 14:51:34.392351 start: 2 depthcharge-action (timeout 00:05:00) [common]
201 14:51:34.392475 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
202 14:51:34.392600 substitutions:
203 14:51:34.392665 - {DTB}: None
204 14:51:34.392733 - {INITRD}: 14064482/tftp-deploy-4anq0lj7/ramdisk/ramdisk.cpio.gz
205 14:51:34.392822 - {KERNEL}: 14064482/tftp-deploy-4anq0lj7/kernel/bzImage
206 14:51:34.392948 - {LAVA_MAC}: None
207 14:51:34.393064 - {PRESEED_CONFIG}: None
208 14:51:34.393149 - {PRESEED_LOCAL}: None
209 14:51:34.393235 - {RAMDISK}: 14064482/tftp-deploy-4anq0lj7/ramdisk/ramdisk.cpio.gz
210 14:51:34.393362 - {ROOT_PART}: None
211 14:51:34.393449 - {ROOT}: None
212 14:51:34.393534 - {SERVER_IP}: 192.168.201.1
213 14:51:34.393617 - {TEE}: None
214 14:51:34.393708 Parsed boot commands:
215 14:51:34.393767 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
216 14:51:34.393939 Parsed boot commands: tftpboot 192.168.201.1 14064482/tftp-deploy-4anq0lj7/kernel/bzImage 14064482/tftp-deploy-4anq0lj7/kernel/cmdline 14064482/tftp-deploy-4anq0lj7/ramdisk/ramdisk.cpio.gz
217 14:51:34.394031 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
218 14:51:34.394115 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
219 14:51:34.394205 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
220 14:51:34.394296 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
221 14:51:34.394366 Not connected, no need to disconnect.
222 14:51:34.394441 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
223 14:51:34.394527 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
224 14:51:34.394593 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-1'
225 14:51:34.397671 Setting prompt string to ['lava-test: # ']
226 14:51:34.398012 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
227 14:51:34.398120 end: 2.2.1 reset-connection (duration 00:00:00) [common]
228 14:51:34.398219 start: 2.2.2 reset-device (timeout 00:05:00) [common]
229 14:51:34.398323 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
230 14:51:34.398506 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cp514-2h-1130g7-volteer-cbg-1']
231 14:51:43.304197 Returned 0 in 8 seconds
232 14:51:43.404782 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 14:51:43.405095 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 14:51:43.405196 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 14:51:43.405282 Setting prompt string to 'Starting depthcharge on Voema...'
237 14:51:43.405391 Changing prompt to 'Starting depthcharge on Voema...'
238 14:51:43.405462 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 14:51:43.405846 [Enter `^Ec?' for help]
240 14:51:43.405964
241 14:51:43.406053
242 14:51:43.406144 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 14:51:43.406219 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 14:51:43.406283 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 14:51:43.406345 CPU: AES supported, TXT NOT supported, VT supported
246 14:51:43.406407 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 14:51:43.406466 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 14:51:43.406523 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 14:51:43.406579 VBOOT: Loading verstage.
250 14:51:43.406635 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 14:51:43.406691 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 14:51:43.406747 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 14:51:43.406802 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 14:51:43.406858 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 14:51:43.406913
256 14:51:43.406968
257 14:51:43.407024 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 14:51:43.407080 Probing TPM: . done!
259 14:51:43.407135 TPM ready after 0 ms
260 14:51:43.407192 Connected to device vid:did:rid of 1ae0:0028:00
261 14:51:43.407247 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
262 14:51:43.407304 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 14:51:43.407360 Initialized TPM device CR50 revision 0
264 14:51:43.407415 tlcl_send_startup: Startup return code is 0
265 14:51:43.407470 TPM: setup succeeded
266 14:51:43.407525 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 14:51:43.407580 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 14:51:43.407635 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 14:51:43.407691 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 14:51:43.407745 Chrome EC: UHEPI supported
271 14:51:43.407800 Phase 1
272 14:51:43.407855 FMAP: area GBB found @ 1805000 (458752 bytes)
273 14:51:43.407910 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 14:51:43.407965 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 14:51:43.408020 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 14:51:43.408076 VB2:vb2_check_recovery() Recovery was requested manually
277 14:51:43.408130 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7
278 14:51:43.408185 Recovery requested (1009000e)
279 14:51:43.408239 TPM: Extending digest for VBOOT: boot mode into PCR 0
280 14:51:43.408295 tlcl_extend: response is 0
281 14:51:43.408349 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
282 14:51:43.408404 tlcl_extend: response is 0
283 14:51:43.408459 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
284 14:51:43.408514 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
285 14:51:43.408569 BS: verstage times (exec / console): total (unknown) / 148 ms
286 14:51:43.408623
287 14:51:43.408678
288 14:51:43.408732 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
289 14:51:43.408787 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
290 14:51:43.408842 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
291 14:51:43.408896 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
292 14:51:43.408951 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
293 14:51:43.409005 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
294 14:51:43.409059 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
295 14:51:43.409114 TCO_STS: 0000 0000
296 14:51:43.409168 GEN_PMCON: d0015038 00002200
297 14:51:43.409222 GBLRST_CAUSE: 00000000 00000000
298 14:51:43.409277 HPR_CAUSE0: 00000000
299 14:51:43.409375 prev_sleep_state 5
300 14:51:43.409430 Boot Count incremented to 31042
301 14:51:43.409485 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
302 14:51:43.409540 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 14:51:43.409596 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 14:51:43.409651 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
305 14:51:43.409706 Chrome EC: UHEPI supported
306 14:51:43.409761 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
307 14:51:43.409815 Probing TPM: done!
308 14:51:43.409869 Connected to device vid:did:rid of 1ae0:0028:00
309 14:51:43.409924 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
310 14:51:43.409979 Initialized TPM device CR50 revision 0
311 14:51:43.410033 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
312 14:51:43.410088 MRC: Hash idx 0x100b comparison successful.
313 14:51:43.410142 MRC cache found, size faa8
314 14:51:43.410196 bootmode is set to: 2
315 14:51:43.410255 SPD index = 0
316 14:51:43.410311 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
317 14:51:43.410366 SPD: module type is LPDDR4X
318 14:51:43.410421 SPD: module part number is MT53E512M64D4NW-046
319 14:51:43.410475 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
320 14:51:43.410530 SPD: device width 16 bits, bus width 16 bits
321 14:51:43.410585 SPD: module size is 1024 MB (per channel)
322 14:51:43.410640 CBMEM:
323 14:51:43.410693 IMD: root @ 0x76fff000 254 entries.
324 14:51:43.410748 IMD: root @ 0x76ffec00 62 entries.
325 14:51:43.410801 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
326 14:51:43.411045 FMAP: area RW_VPD found @ f35000 (8192 bytes)
327 14:51:43.411107 External stage cache:
328 14:51:43.411163 IMD: root @ 0x7b3ff000 254 entries.
329 14:51:43.411219 IMD: root @ 0x7b3fec00 62 entries.
330 14:51:43.411274 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
331 14:51:43.411330 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
332 14:51:43.411385 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
333 14:51:43.411441 MRC: 'RECOVERY_MRC_CACHE' does not need update.
334 14:51:43.411496 cse_lite: Skip switching to RW in the recovery path
335 14:51:43.411551 8 DIMMs found
336 14:51:43.411607 SMM Memory Map
337 14:51:43.411661 SMRAM : 0x7b000000 0x800000
338 14:51:43.411716 Subregion 0: 0x7b000000 0x200000
339 14:51:43.411770 Subregion 1: 0x7b200000 0x200000
340 14:51:43.411825 Subregion 2: 0x7b400000 0x400000
341 14:51:43.411879 top_of_ram = 0x77000000
342 14:51:43.411934 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
343 14:51:43.411988 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
344 14:51:43.412069 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
345 14:51:43.412127 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 14:51:43.412182 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
347 14:51:43.412237 Decompressing stage fallback/postcar @ 0x76c0bfc0 (38208 bytes)
348 14:51:43.412292 Loading module at 0x76c0c000 with entry 0x76c0c000. filesize: 0x5150 memsize: 0x9500
349 14:51:43.412348 Processing 211 relocs. Offset value of 0x74c0c000
350 14:51:43.412404 BS: romstage times (exec / console): total (unknown) / 277 ms
351 14:51:43.412459
352 14:51:43.412513
353 14:51:43.412568 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
354 14:51:43.412624 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
355 14:51:43.412679 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
356 14:51:43.412735 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
357 14:51:43.412790 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4d0ec
358 14:51:43.412846 Decompressing stage fallback/ramstage @ 0x76b98fc0 (463536 bytes)
359 14:51:43.412901 Loading module at 0x76b99000 with entry 0x76b99000. filesize: 0x4d5d8 memsize: 0x71270
360 14:51:43.412956 Processing 5008 relocs. Offset value of 0x75d99000
361 14:51:43.413011 BS: postcar times (exec / console): total (unknown) / 59 ms
362 14:51:43.413067
363 14:51:43.413121
364 14:51:43.413175 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
365 14:51:43.413231 Normal boot
366 14:51:43.413288 FW_CONFIG value is 0x804c02
367 14:51:43.413392 PCI: 00:07.0 disabled by fw_config
368 14:51:43.413448 PCI: 00:07.1 disabled by fw_config
369 14:51:43.413502 PCI: 00:0d.2 disabled by fw_config
370 14:51:43.413557 PCI: 00:1c.7 disabled by fw_config
371 14:51:43.413612 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 14:51:43.413668 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 14:51:43.413723 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
374 14:51:43.413777 GENERIC: 0.0 disabled by fw_config
375 14:51:43.413831 GENERIC: 1.0 disabled by fw_config
376 14:51:43.413886 fw_config match found: DB_USB=USB3_ACTIVE
377 14:51:43.413941 fw_config match found: DB_USB=USB3_ACTIVE
378 14:51:43.413995 fw_config match found: DB_USB=USB3_ACTIVE
379 14:51:43.414058 fw_config match found: DB_USB=USB3_ACTIVE
380 14:51:43.414114 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
381 14:51:43.414169 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
382 14:51:43.414225 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
383 14:51:43.414280 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4d09c
384 14:51:43.414335 microcode: sig=0x806c1 pf=0x80 revision=0x86
385 14:51:43.414389 microcode: Update skipped, already up-to-date
386 14:51:43.414443 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4d30c
387 14:51:43.414498 Detected 4 core, 8 thread CPU.
388 14:51:43.414553 Setting up SMI for CPU
389 14:51:43.414607 IED base = 0x7b400000
390 14:51:43.414661 IED size = 0x00400000
391 14:51:43.414715 Will perform SMM setup.
392 14:51:43.414769 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
393 14:51:43.414824 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
394 14:51:43.414880 Processing 16 relocs. Offset value of 0x00030000
395 14:51:43.414934 Attempting to start 7 APs
396 14:51:43.414988 Waiting for 10ms after sending INIT.
397 14:51:43.415043 Waiting for 1st SIPI to complete...done.
398 14:51:43.415098 AP: slot 1 apic_id 1.
399 14:51:43.415152 Waiting for 2nd SIPI to complete...done.
400 14:51:43.415206 AP: slot 4 apic_id 7.
401 14:51:43.415282 AP: slot 5 apic_id 6.
402 14:51:43.415339 AP: slot 3 apic_id 5.
403 14:51:43.415394 AP: slot 2 apic_id 3.
404 14:51:43.415448 AP: slot 6 apic_id 2.
405 14:51:43.415502 AP: slot 7 apic_id 4.
406 14:51:43.415557 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
407 14:51:43.415612 Processing 13 relocs. Offset value of 0x00038000
408 14:51:43.415667 Unable to locate Global NVS
409 14:51:43.415722 SMM Module: stub loaded at 0x00038000. Will call 0x76bb7318(0x00000000)
410 14:51:43.415777 Installing permanent SMM handler to 0x7b000000
411 14:51:43.415832 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
412 14:51:43.415886 Processing 794 relocs. Offset value of 0x7b010000
413 14:51:43.416126 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
414 14:51:43.416188 Processing 13 relocs. Offset value of 0x7b008000
415 14:51:43.416256 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
416 14:51:43.416316 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
417 14:51:43.416372 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
418 14:51:43.416427 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
419 14:51:43.416482 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
420 14:51:43.416537 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
421 14:51:43.416592 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
422 14:51:43.416646 Unable to locate Global NVS
423 14:51:43.416701 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
424 14:51:43.416756 Clearing SMI status registers
425 14:51:43.416811 SMI_STS: PM1
426 14:51:43.416865 PM1_STS: PWRBTN
427 14:51:43.416919 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
428 14:51:43.416975 In relocation handler: CPU 0
429 14:51:43.417029 New SMBASE=0x7b000000 IEDBASE=0x7b400000
430 14:51:43.417084 Writing SMRR. base = 0x7b000006, mask=0xff800c00
431 14:51:43.417139 Relocation complete.
432 14:51:43.417194 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
433 14:51:43.417248 In relocation handler: CPU 1
434 14:51:43.417313 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
435 14:51:43.417407 Relocation complete.
436 14:51:43.417462 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
437 14:51:43.417517 In relocation handler: CPU 3
438 14:51:43.417571 New SMBASE=0x7afff400 IEDBASE=0x7b400000
439 14:51:43.417627 Relocation complete.
440 14:51:43.417681 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
441 14:51:43.417736 In relocation handler: CPU 7
442 14:51:43.417790 New SMBASE=0x7affe400 IEDBASE=0x7b400000
443 14:51:43.417845 Writing SMRR. base = 0x7b000006, mask=0xff800c00
444 14:51:43.417899 Relocation complete.
445 14:51:43.417953 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
446 14:51:43.418007 In relocation handler: CPU 6
447 14:51:43.418062 New SMBASE=0x7affe800 IEDBASE=0x7b400000
448 14:51:43.418116 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 14:51:43.418171 Relocation complete.
450 14:51:43.418226 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
451 14:51:43.418281 In relocation handler: CPU 2
452 14:51:43.418355 New SMBASE=0x7afff800 IEDBASE=0x7b400000
453 14:51:43.418412 Relocation complete.
454 14:51:43.418467 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
455 14:51:43.418521 In relocation handler: CPU 4
456 14:51:43.418591 New SMBASE=0x7afff000 IEDBASE=0x7b400000
457 14:51:43.418651 Relocation complete.
458 14:51:43.418706 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
459 14:51:43.418760 In relocation handler: CPU 5
460 14:51:43.418815 New SMBASE=0x7affec00 IEDBASE=0x7b400000
461 14:51:43.418871 Writing SMRR. base = 0x7b000006, mask=0xff800c00
462 14:51:43.418925 Relocation complete.
463 14:51:43.418980 Initializing CPU #0
464 14:51:43.419034 CPU: vendor Intel device 806c1
465 14:51:43.419089 CPU: family 06, model 8c, stepping 01
466 14:51:43.419144 Clearing out pending MCEs
467 14:51:43.419198 Setting up local APIC...
468 14:51:43.419252 apic_id: 0x00 done.
469 14:51:43.419306 Turbo is available but hidden
470 14:51:43.419360 Turbo is available and visible
471 14:51:43.419415 microcode: Update skipped, already up-to-date
472 14:51:43.419468 CPU #0 initialized
473 14:51:43.419523 Initializing CPU #7
474 14:51:43.419577 Initializing CPU #3
475 14:51:43.419631 CPU: vendor Intel device 806c1
476 14:51:43.419685 CPU: family 06, model 8c, stepping 01
477 14:51:43.419740 CPU: vendor Intel device 806c1
478 14:51:43.419794 CPU: family 06, model 8c, stepping 01
479 14:51:43.419850 Clearing out pending MCEs
480 14:51:43.419904 Clearing out pending MCEs
481 14:51:43.419958 Setting up local APIC...
482 14:51:43.420012 Initializing CPU #1
483 14:51:43.420067 Setting up local APIC...
484 14:51:43.420121 Initializing CPU #2
485 14:51:43.420175 Initializing CPU #6
486 14:51:43.420229 CPU: vendor Intel device 806c1
487 14:51:43.420283 CPU: family 06, model 8c, stepping 01
488 14:51:43.420337 CPU: vendor Intel device 806c1
489 14:51:43.420392 CPU: family 06, model 8c, stepping 01
490 14:51:43.420446 Clearing out pending MCEs
491 14:51:43.420500 Clearing out pending MCEs
492 14:51:43.420554 Setting up local APIC...
493 14:51:43.420608 apic_id: 0x05 done.
494 14:51:43.420662 apic_id: 0x04 done.
495 14:51:43.420717 microcode: Update skipped, already up-to-date
496 14:51:43.420772 microcode: Update skipped, already up-to-date
497 14:51:43.420826 CPU #3 initialized
498 14:51:43.420881 CPU #7 initialized
499 14:51:43.420935 apic_id: 0x03 done.
500 14:51:43.420989 Setting up local APIC...
501 14:51:43.421042 CPU: vendor Intel device 806c1
502 14:51:43.421096 CPU: family 06, model 8c, stepping 01
503 14:51:43.421150 Initializing CPU #4
504 14:51:43.421205 Initializing CPU #5
505 14:51:43.421259 CPU: vendor Intel device 806c1
506 14:51:43.421321 CPU: family 06, model 8c, stepping 01
507 14:51:43.421377 Clearing out pending MCEs
508 14:51:43.421432 apic_id: 0x02 done.
509 14:51:43.421486 microcode: Update skipped, already up-to-date
510 14:51:43.421540 microcode: Update skipped, already up-to-date
511 14:51:43.421620 CPU #2 initialized
512 14:51:43.421677 CPU #6 initialized
513 14:51:43.421732 Setting up local APIC...
514 14:51:43.421786 Clearing out pending MCEs
515 14:51:43.421840 CPU: vendor Intel device 806c1
516 14:51:43.421895 CPU: family 06, model 8c, stepping 01
517 14:51:43.421949 Setting up local APIC...
518 14:51:43.422004 apic_id: 0x01 done.
519 14:51:43.422059 apic_id: 0x07 done.
520 14:51:43.422113 Clearing out pending MCEs
521 14:51:43.422167 microcode: Update skipped, already up-to-date
522 14:51:43.422221 microcode: Update skipped, already up-to-date
523 14:51:43.422276 Setting up local APIC...
524 14:51:43.422330 CPU #4 initialized
525 14:51:43.422384 apic_id: 0x06 done.
526 14:51:43.422439 CPU #1 initialized
527 14:51:43.422693 microcode: Update skipped, already up-to-date
528 14:51:43.422753 CPU #5 initialized
529 14:51:43.422810 bsp_do_flight_plan done after 468 msecs.
530 14:51:43.422865 CPU: frequency set to 4000 MHz
531 14:51:43.422920 Enabling SMIs.
532 14:51:43.422975 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
533 14:51:43.423030 SATAXPCIE1 indicates PCIe NVMe is present
534 14:51:43.423085 Probing TPM: done!
535 14:51:43.423140 Connected to device vid:did:rid of 1ae0:0028:00
536 14:51:43.423195 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
537 14:51:43.423252 Initialized TPM device CR50 revision 0
538 14:51:43.423307 Enabling S0i3.4
539 14:51:43.423362 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4d1fc
540 14:51:43.423417 Found a VBT of 8704 bytes after decompression
541 14:51:43.423471 cse_lite: CSE RO boot. HybridStorageMode disabled
542 14:51:43.423526 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
543 14:51:43.423581 FSPS returned 0
544 14:51:43.423635 Executing Phase 1 of FspMultiPhaseSiInit
545 14:51:43.423690 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
546 14:51:43.423745 port C0 DISC req: usage 1 usb3 1 usb2 5
547 14:51:43.423799 Raw Buffer output 0 00000511
548 14:51:43.423853 Raw Buffer output 1 00000000
549 14:51:43.423908 pmc_send_ipc_cmd succeeded
550 14:51:43.423961 port C1 DISC req: usage 1 usb3 2 usb2 3
551 14:51:43.424016 Raw Buffer output 0 00000321
552 14:51:43.424070 Raw Buffer output 1 00000000
553 14:51:43.424124 pmc_send_ipc_cmd succeeded
554 14:51:43.424178 Detected 4 core, 8 thread CPU.
555 14:51:43.424232 Detected 4 core, 8 thread CPU.
556 14:51:43.424287 Display FSP Version Info HOB
557 14:51:43.424341 Reference Code - CPU = a.0.4c.31
558 14:51:43.424395 uCode Version = 0.0.0.86
559 14:51:43.424450 TXT ACM version = ff.ff.ff.ffff
560 14:51:43.424505 Reference Code - ME = a.0.4c.31
561 14:51:43.424559 MEBx version = 0.0.0.0
562 14:51:43.424613 ME Firmware Version = Consumer SKU
563 14:51:43.424667 Reference Code - PCH = a.0.4c.31
564 14:51:43.424722 PCH-CRID Status = Disabled
565 14:51:43.424776 PCH-CRID Original Value = ff.ff.ff.ffff
566 14:51:43.424830 PCH-CRID New Value = ff.ff.ff.ffff
567 14:51:43.424884 OPROM - RST - RAID = ff.ff.ff.ffff
568 14:51:43.424938 PCH Hsio Version = 4.0.0.0
569 14:51:43.425001 Reference Code - SA - System Agent = a.0.4c.31
570 14:51:43.425103 Reference Code - MRC = 2.0.0.1
571 14:51:43.425198 SA - PCIe Version = a.0.4c.31
572 14:51:43.425285 SA-CRID Status = Disabled
573 14:51:43.425356 SA-CRID Original Value = 0.0.0.1
574 14:51:43.425413 SA-CRID New Value = 0.0.0.1
575 14:51:43.425468 OPROM - VBIOS = ff.ff.ff.ffff
576 14:51:43.425524 IO Manageability Engine FW Version = 11.1.4.0
577 14:51:43.425580 PHY Build Version = 0.0.0.e0
578 14:51:43.425635 Thunderbolt(TM) FW Version = 0.0.0.0
579 14:51:43.425690 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
580 14:51:43.425746 ITSS IRQ Polarities Before:
581 14:51:43.425801 IPC0: 0xffffffff
582 14:51:43.425855 IPC1: 0xffffffff
583 14:51:43.425910 IPC2: 0xffffffff
584 14:51:43.425964 IPC3: 0xffffffff
585 14:51:43.426019 ITSS IRQ Polarities After:
586 14:51:43.426074 IPC0: 0xffffffff
587 14:51:43.426127 IPC1: 0xffffffff
588 14:51:43.426182 IPC2: 0xffffffff
589 14:51:43.426236 IPC3: 0xffffffff
590 14:51:43.426291 Found PCIe Root Port #9 at PCI: 00:1d.0.
591 14:51:43.426346 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
592 14:51:43.426404 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
593 14:51:43.426461 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
594 14:51:43.426516 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
595 14:51:43.426571 Enumerating buses...
596 14:51:43.426626 Show all devs... Before device enumeration.
597 14:51:43.426681 Root Device: enabled 1
598 14:51:43.426736 DOMAIN: 0000: enabled 1
599 14:51:43.426790 CPU_CLUSTER: 0: enabled 1
600 14:51:43.426844 PCI: 00:00.0: enabled 1
601 14:51:43.426899 PCI: 00:02.0: enabled 1
602 14:51:43.426953 PCI: 00:04.0: enabled 1
603 14:51:43.427007 PCI: 00:05.0: enabled 1
604 14:51:43.427062 PCI: 00:06.0: enabled 0
605 14:51:43.427115 PCI: 00:07.0: enabled 0
606 14:51:43.427170 PCI: 00:07.1: enabled 0
607 14:51:43.427224 PCI: 00:07.2: enabled 0
608 14:51:43.427278 PCI: 00:07.3: enabled 0
609 14:51:43.427332 PCI: 00:08.0: enabled 1
610 14:51:43.427386 PCI: 00:09.0: enabled 0
611 14:51:43.427441 PCI: 00:0a.0: enabled 0
612 14:51:43.427496 PCI: 00:0d.0: enabled 1
613 14:51:43.427550 PCI: 00:0d.1: enabled 0
614 14:51:43.427604 PCI: 00:0d.2: enabled 0
615 14:51:43.427659 PCI: 00:0d.3: enabled 0
616 14:51:43.427714 PCI: 00:0e.0: enabled 0
617 14:51:43.427768 PCI: 00:10.2: enabled 1
618 14:51:43.427822 PCI: 00:10.6: enabled 0
619 14:51:43.427876 PCI: 00:10.7: enabled 0
620 14:51:43.427930 PCI: 00:12.0: enabled 0
621 14:51:43.427985 PCI: 00:12.6: enabled 0
622 14:51:43.428039 PCI: 00:13.0: enabled 0
623 14:51:43.428094 PCI: 00:14.0: enabled 1
624 14:51:43.428148 PCI: 00:14.1: enabled 0
625 14:51:43.428218 PCI: 00:14.2: enabled 1
626 14:51:43.428281 PCI: 00:14.3: enabled 1
627 14:51:43.428336 PCI: 00:15.0: enabled 1
628 14:51:43.428391 PCI: 00:15.1: enabled 1
629 14:51:43.428445 PCI: 00:15.2: enabled 1
630 14:51:43.428500 PCI: 00:15.3: enabled 1
631 14:51:43.428555 PCI: 00:16.0: enabled 1
632 14:51:43.428609 PCI: 00:16.1: enabled 0
633 14:51:43.428664 PCI: 00:16.2: enabled 0
634 14:51:43.428718 PCI: 00:16.3: enabled 0
635 14:51:43.428773 PCI: 00:16.4: enabled 0
636 14:51:43.428827 PCI: 00:16.5: enabled 0
637 14:51:43.428881 PCI: 00:17.0: enabled 1
638 14:51:43.428935 PCI: 00:19.0: enabled 0
639 14:51:43.428989 PCI: 00:19.1: enabled 1
640 14:51:43.429044 PCI: 00:19.2: enabled 0
641 14:51:43.429098 PCI: 00:1c.0: enabled 1
642 14:51:43.429153 PCI: 00:1c.1: enabled 0
643 14:51:43.429207 PCI: 00:1c.2: enabled 0
644 14:51:43.429262 PCI: 00:1c.3: enabled 0
645 14:51:43.429323 PCI: 00:1c.4: enabled 0
646 14:51:43.429379 PCI: 00:1c.5: enabled 0
647 14:51:43.429433 PCI: 00:1c.6: enabled 1
648 14:51:43.429488 PCI: 00:1c.7: enabled 0
649 14:51:43.429542 PCI: 00:1d.0: enabled 1
650 14:51:43.429596 PCI: 00:1d.1: enabled 0
651 14:51:43.429840 PCI: 00:1d.2: enabled 1
652 14:51:43.429900 PCI: 00:1d.3: enabled 0
653 14:51:43.429955 PCI: 00:1e.0: enabled 1
654 14:51:43.430010 PCI: 00:1e.1: enabled 0
655 14:51:43.430064 PCI: 00:1e.2: enabled 1
656 14:51:43.430119 PCI: 00:1e.3: enabled 1
657 14:51:43.430173 PCI: 00:1f.0: enabled 1
658 14:51:43.430228 PCI: 00:1f.1: enabled 0
659 14:51:43.430282 PCI: 00:1f.2: enabled 1
660 14:51:43.430337 PCI: 00:1f.3: enabled 1
661 14:51:43.430391 PCI: 00:1f.4: enabled 0
662 14:51:43.430446 PCI: 00:1f.5: enabled 1
663 14:51:43.430500 PCI: 00:1f.6: enabled 0
664 14:51:43.430554 PCI: 00:1f.7: enabled 0
665 14:51:43.430608 APIC: 00: enabled 1
666 14:51:43.430662 GENERIC: 0.0: enabled 1
667 14:51:43.430716 GENERIC: 0.0: enabled 1
668 14:51:43.430770 GENERIC: 1.0: enabled 1
669 14:51:43.430825 GENERIC: 0.0: enabled 1
670 14:51:43.430879 GENERIC: 1.0: enabled 1
671 14:51:43.430933 USB0 port 0: enabled 1
672 14:51:43.430988 GENERIC: 0.0: enabled 1
673 14:51:43.431042 USB0 port 0: enabled 1
674 14:51:43.431095 GENERIC: 0.0: enabled 1
675 14:51:43.431149 I2C: 00:1a: enabled 1
676 14:51:43.431203 I2C: 00:31: enabled 1
677 14:51:43.431257 I2C: 00:32: enabled 1
678 14:51:43.431312 I2C: 00:10: enabled 1
679 14:51:43.431365 I2C: 00:15: enabled 1
680 14:51:43.431419 GENERIC: 0.0: enabled 0
681 14:51:43.431474 GENERIC: 1.0: enabled 0
682 14:51:43.431528 GENERIC: 0.0: enabled 1
683 14:51:43.431582 SPI: 00: enabled 1
684 14:51:43.431636 SPI: 00: enabled 1
685 14:51:43.431690 PNP: 0c09.0: enabled 1
686 14:51:43.431744 GENERIC: 0.0: enabled 1
687 14:51:43.431798 USB3 port 0: enabled 1
688 14:51:43.431881 USB3 port 1: enabled 1
689 14:51:43.431939 USB3 port 2: enabled 0
690 14:51:43.431993 USB3 port 3: enabled 0
691 14:51:43.432048 USB2 port 0: enabled 0
692 14:51:43.432102 USB2 port 1: enabled 1
693 14:51:43.432157 USB2 port 2: enabled 1
694 14:51:43.432211 USB2 port 3: enabled 0
695 14:51:43.432265 USB2 port 4: enabled 1
696 14:51:43.432320 USB2 port 5: enabled 0
697 14:51:43.432374 USB2 port 6: enabled 0
698 14:51:43.432428 USB2 port 7: enabled 0
699 14:51:43.432482 USB2 port 8: enabled 0
700 14:51:43.432536 USB2 port 9: enabled 0
701 14:51:43.432591 USB3 port 0: enabled 0
702 14:51:43.432645 USB3 port 1: enabled 1
703 14:51:43.432699 USB3 port 2: enabled 0
704 14:51:43.432753 USB3 port 3: enabled 0
705 14:51:43.432807 GENERIC: 0.0: enabled 1
706 14:51:43.432861 GENERIC: 1.0: enabled 1
707 14:51:43.432915 APIC: 01: enabled 1
708 14:51:43.432969 APIC: 03: enabled 1
709 14:51:43.433024 APIC: 05: enabled 1
710 14:51:43.433078 APIC: 07: enabled 1
711 14:51:43.433132 APIC: 06: enabled 1
712 14:51:43.433186 APIC: 02: enabled 1
713 14:51:43.433240 APIC: 04: enabled 1
714 14:51:43.433294 Compare with tree...
715 14:51:43.433392 Root Device: enabled 1
716 14:51:43.433446 DOMAIN: 0000: enabled 1
717 14:51:43.433500 PCI: 00:00.0: enabled 1
718 14:51:43.433555 PCI: 00:02.0: enabled 1
719 14:51:43.433608 PCI: 00:04.0: enabled 1
720 14:51:43.433662 GENERIC: 0.0: enabled 1
721 14:51:43.433717 PCI: 00:05.0: enabled 1
722 14:51:43.433770 PCI: 00:06.0: enabled 0
723 14:51:43.433824 PCI: 00:07.0: enabled 0
724 14:51:43.433878 GENERIC: 0.0: enabled 1
725 14:51:43.433932 PCI: 00:07.1: enabled 0
726 14:51:43.433986 GENERIC: 1.0: enabled 1
727 14:51:43.434040 PCI: 00:07.2: enabled 0
728 14:51:43.434094 GENERIC: 0.0: enabled 1
729 14:51:43.434148 PCI: 00:07.3: enabled 0
730 14:51:43.434202 GENERIC: 1.0: enabled 1
731 14:51:43.434256 PCI: 00:08.0: enabled 1
732 14:51:43.434310 PCI: 00:09.0: enabled 0
733 14:51:43.434365 PCI: 00:0a.0: enabled 0
734 14:51:43.434419 PCI: 00:0d.0: enabled 1
735 14:51:43.434473 USB0 port 0: enabled 1
736 14:51:43.434527 USB3 port 0: enabled 1
737 14:51:43.434581 USB3 port 1: enabled 1
738 14:51:43.434635 USB3 port 2: enabled 0
739 14:51:43.434689 USB3 port 3: enabled 0
740 14:51:43.434743 PCI: 00:0d.1: enabled 0
741 14:51:43.434797 PCI: 00:0d.2: enabled 0
742 14:51:43.434851 GENERIC: 0.0: enabled 1
743 14:51:43.434905 PCI: 00:0d.3: enabled 0
744 14:51:43.434959 PCI: 00:0e.0: enabled 0
745 14:51:43.435013 PCI: 00:10.2: enabled 1
746 14:51:43.435066 PCI: 00:10.6: enabled 0
747 14:51:43.435121 PCI: 00:10.7: enabled 0
748 14:51:43.435202 PCI: 00:12.0: enabled 0
749 14:51:43.435259 PCI: 00:12.6: enabled 0
750 14:51:43.435313 PCI: 00:13.0: enabled 0
751 14:51:43.435368 PCI: 00:14.0: enabled 1
752 14:51:43.435423 USB0 port 0: enabled 1
753 14:51:43.435477 USB2 port 0: enabled 0
754 14:51:43.435531 USB2 port 1: enabled 1
755 14:51:43.435585 USB2 port 2: enabled 1
756 14:51:43.435640 USB2 port 3: enabled 0
757 14:51:43.435694 USB2 port 4: enabled 1
758 14:51:43.435747 USB2 port 5: enabled 0
759 14:51:43.435802 USB2 port 6: enabled 0
760 14:51:43.435856 USB2 port 7: enabled 0
761 14:51:43.435910 USB2 port 8: enabled 0
762 14:51:43.435964 USB2 port 9: enabled 0
763 14:51:43.436019 USB3 port 0: enabled 0
764 14:51:43.436073 USB3 port 1: enabled 1
765 14:51:43.436127 USB3 port 2: enabled 0
766 14:51:43.436181 USB3 port 3: enabled 0
767 14:51:43.436235 PCI: 00:14.1: enabled 0
768 14:51:43.436289 PCI: 00:14.2: enabled 1
769 14:51:43.436342 PCI: 00:14.3: enabled 1
770 14:51:43.436396 GENERIC: 0.0: enabled 1
771 14:51:43.436450 PCI: 00:15.0: enabled 1
772 14:51:43.436504 I2C: 00:1a: enabled 1
773 14:51:43.436557 I2C: 00:31: enabled 1
774 14:51:43.436611 I2C: 00:32: enabled 1
775 14:51:43.436665 PCI: 00:15.1: enabled 1
776 14:51:43.436719 I2C: 00:10: enabled 1
777 14:51:43.436773 PCI: 00:15.2: enabled 1
778 14:51:43.436827 PCI: 00:15.3: enabled 1
779 14:51:43.436881 PCI: 00:16.0: enabled 1
780 14:51:43.436935 PCI: 00:16.1: enabled 0
781 14:51:43.436989 PCI: 00:16.2: enabled 0
782 14:51:43.437043 PCI: 00:16.3: enabled 0
783 14:51:43.437097 PCI: 00:16.4: enabled 0
784 14:51:43.437151 PCI: 00:16.5: enabled 0
785 14:51:43.437204 PCI: 00:17.0: enabled 1
786 14:51:43.437259 PCI: 00:19.0: enabled 0
787 14:51:43.437327 PCI: 00:19.1: enabled 1
788 14:51:43.437384 I2C: 00:15: enabled 1
789 14:51:43.437437 PCI: 00:19.2: enabled 0
790 14:51:43.437494 PCI: 00:1d.0: enabled 1
791 14:51:43.437549 GENERIC: 0.0: enabled 1
792 14:51:43.437603 PCI: 00:1e.0: enabled 1
793 14:51:43.437658 PCI: 00:1e.1: enabled 0
794 14:51:43.437712 PCI: 00:1e.2: enabled 1
795 14:51:43.437766 SPI: 00: enabled 1
796 14:51:43.437821 PCI: 00:1e.3: enabled 1
797 14:51:43.437875 SPI: 00: enabled 1
798 14:51:43.437930 PCI: 00:1f.0: enabled 1
799 14:51:43.437984 PNP: 0c09.0: enabled 1
800 14:51:43.438038 PCI: 00:1f.1: enabled 0
801 14:51:43.438093 PCI: 00:1f.2: enabled 1
802 14:51:43.438147 GENERIC: 0.0: enabled 1
803 14:51:43.438201 GENERIC: 0.0: enabled 1
804 14:51:43.438255 GENERIC: 1.0: enabled 1
805 14:51:43.438308 PCI: 00:1f.3: enabled 1
806 14:51:43.438363 PCI: 00:1f.4: enabled 0
807 14:51:43.438417 PCI: 00:1f.5: enabled 1
808 14:51:43.438471 PCI: 00:1f.6: enabled 0
809 14:51:43.438746 PCI: 00:1f.7: enabled 0
810 14:51:43.438808 CPU_CLUSTER: 0: enabled 1
811 14:51:43.438864 APIC: 00: enabled 1
812 14:51:43.438919 APIC: 01: enabled 1
813 14:51:43.438974 APIC: 03: enabled 1
814 14:51:43.439029 APIC: 05: enabled 1
815 14:51:43.439083 APIC: 07: enabled 1
816 14:51:43.439138 APIC: 06: enabled 1
817 14:51:43.439192 APIC: 02: enabled 1
818 14:51:43.439247 APIC: 04: enabled 1
819 14:51:43.439301 Root Device scanning...
820 14:51:43.439355 scan_static_bus for Root Device
821 14:51:43.439410 DOMAIN: 0000 enabled
822 14:51:43.439464 CPU_CLUSTER: 0 enabled
823 14:51:43.439518 DOMAIN: 0000 scanning...
824 14:51:43.439572 PCI: pci_scan_bus for bus 00
825 14:51:43.439627 PCI: 00:00.0 [8086/0000] ops
826 14:51:43.439681 PCI: 00:00.0 [8086/9a12] enabled
827 14:51:43.439735 PCI: 00:02.0 [8086/0000] bus ops
828 14:51:43.439790 PCI: 00:02.0 [8086/9a40] enabled
829 14:51:43.439845 PCI: 00:04.0 [8086/0000] bus ops
830 14:51:43.439899 PCI: 00:04.0 [8086/9a03] enabled
831 14:51:43.439954 PCI: 00:05.0 [8086/9a19] enabled
832 14:51:43.440008 PCI: 00:07.0 [0000/0000] hidden
833 14:51:43.440062 PCI: 00:08.0 [8086/9a11] enabled
834 14:51:43.440117 PCI: 00:0a.0 [8086/9a0d] disabled
835 14:51:43.440171 PCI: 00:0d.0 [8086/0000] bus ops
836 14:51:43.440226 PCI: 00:0d.0 [8086/9a13] enabled
837 14:51:43.440280 PCI: 00:14.0 [8086/0000] bus ops
838 14:51:43.440335 PCI: 00:14.0 [8086/a0ed] enabled
839 14:51:43.440389 PCI: 00:14.2 [8086/a0ef] enabled
840 14:51:43.440444 PCI: 00:14.3 [8086/0000] bus ops
841 14:51:43.440498 PCI: 00:14.3 [8086/a0f0] enabled
842 14:51:43.440552 PCI: 00:15.0 [8086/0000] bus ops
843 14:51:43.440606 PCI: 00:15.0 [8086/a0e8] enabled
844 14:51:43.440661 PCI: 00:15.1 [8086/0000] bus ops
845 14:51:43.440716 PCI: 00:15.1 [8086/a0e9] enabled
846 14:51:43.440770 PCI: 00:15.2 [8086/0000] bus ops
847 14:51:43.440824 PCI: 00:15.2 [8086/a0ea] enabled
848 14:51:43.440879 PCI: 00:15.3 [8086/0000] bus ops
849 14:51:43.440933 PCI: 00:15.3 [8086/a0eb] enabled
850 14:51:43.440988 PCI: 00:16.0 [8086/0000] ops
851 14:51:43.441042 PCI: 00:16.0 [8086/a0e0] enabled
852 14:51:43.441097 PCI: Static device PCI: 00:17.0 not found, disabling it.
853 14:51:43.441152 PCI: 00:19.0 [8086/0000] bus ops
854 14:51:43.441206 PCI: 00:19.0 [8086/a0c5] disabled
855 14:51:43.441260 PCI: 00:19.1 [8086/0000] bus ops
856 14:51:43.441323 PCI: 00:19.1 [8086/a0c6] enabled
857 14:51:43.441380 PCI: 00:1d.0 [8086/0000] bus ops
858 14:51:43.441434 PCI: 00:1d.0 [8086/a0b0] enabled
859 14:51:43.441488 PCI: 00:1e.0 [8086/0000] ops
860 14:51:43.441543 PCI: 00:1e.0 [8086/a0a8] enabled
861 14:51:43.441597 PCI: 00:1e.2 [8086/0000] bus ops
862 14:51:43.441651 PCI: 00:1e.2 [8086/a0aa] enabled
863 14:51:43.441706 PCI: 00:1e.3 [8086/0000] bus ops
864 14:51:43.441760 PCI: 00:1e.3 [8086/a0ab] enabled
865 14:51:43.441838 PCI: 00:1f.0 [8086/0000] bus ops
866 14:51:43.441897 PCI: 00:1f.0 [8086/a087] enabled
867 14:51:43.441952 RTC Init
868 14:51:43.442007 Set power on after power failure.
869 14:51:43.442062 Disabling Deep S3
870 14:51:43.442116 Disabling Deep S3
871 14:51:43.442171 Disabling Deep S4
872 14:51:43.442225 Disabling Deep S4
873 14:51:43.442279 Disabling Deep S5
874 14:51:43.442333 Disabling Deep S5
875 14:51:43.442387 PCI: 00:1f.2 [0000/0000] hidden
876 14:51:43.442442 PCI: 00:1f.3 [8086/0000] bus ops
877 14:51:43.442496 PCI: 00:1f.3 [8086/a0c8] enabled
878 14:51:43.442550 PCI: 00:1f.5 [8086/0000] bus ops
879 14:51:43.442605 PCI: 00:1f.5 [8086/a0a4] enabled
880 14:51:43.442659 PCI: Leftover static devices:
881 14:51:43.442713 PCI: 00:10.2
882 14:51:43.442767 PCI: 00:10.6
883 14:51:43.442821 PCI: 00:10.7
884 14:51:43.442875 PCI: 00:06.0
885 14:51:43.442929 PCI: 00:07.1
886 14:51:43.442984 PCI: 00:07.2
887 14:51:43.443038 PCI: 00:07.3
888 14:51:43.443092 PCI: 00:09.0
889 14:51:43.443146 PCI: 00:0d.1
890 14:51:43.443199 PCI: 00:0d.2
891 14:51:43.443253 PCI: 00:0d.3
892 14:51:43.443308 PCI: 00:0e.0
893 14:51:43.443361 PCI: 00:12.0
894 14:51:43.443415 PCI: 00:12.6
895 14:51:43.443469 PCI: 00:13.0
896 14:51:43.443523 PCI: 00:14.1
897 14:51:43.443577 PCI: 00:16.1
898 14:51:43.443630 PCI: 00:16.2
899 14:51:43.443685 PCI: 00:16.3
900 14:51:43.443738 PCI: 00:16.4
901 14:51:43.443791 PCI: 00:16.5
902 14:51:43.443845 PCI: 00:17.0
903 14:51:43.443899 PCI: 00:19.2
904 14:51:43.443953 PCI: 00:1e.1
905 14:51:43.444007 PCI: 00:1f.1
906 14:51:43.444061 PCI: 00:1f.4
907 14:51:43.444116 PCI: 00:1f.6
908 14:51:43.444170 PCI: 00:1f.7
909 14:51:43.444224 PCI: Check your devicetree.cb.
910 14:51:43.444279 PCI: 00:02.0 scanning...
911 14:51:43.444333 scan_generic_bus for PCI: 00:02.0
912 14:51:43.444388 scan_generic_bus for PCI: 00:02.0 done
913 14:51:43.444442 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
914 14:51:43.444497 PCI: 00:04.0 scanning...
915 14:51:43.444552 scan_generic_bus for PCI: 00:04.0
916 14:51:43.444606 GENERIC: 0.0 enabled
917 14:51:43.444660 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
918 14:51:43.444715 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
919 14:51:43.444770 PCI: 00:0d.0 scanning...
920 14:51:43.444824 scan_static_bus for PCI: 00:0d.0
921 14:51:43.444878 USB0 port 0 enabled
922 14:51:43.444932 USB0 port 0 scanning...
923 14:51:43.444985 scan_static_bus for USB0 port 0
924 14:51:43.445040 USB3 port 0 enabled
925 14:51:43.445094 USB3 port 1 enabled
926 14:51:43.445148 USB3 port 2 disabled
927 14:51:43.445202 USB3 port 3 disabled
928 14:51:43.445294 USB3 port 0 scanning...
929 14:51:43.445360 scan_static_bus for USB3 port 0
930 14:51:43.445416 scan_static_bus for USB3 port 0 done
931 14:51:43.445471 scan_bus: bus USB3 port 0 finished in 6 msecs
932 14:51:43.445526 USB3 port 1 scanning...
933 14:51:43.445580 scan_static_bus for USB3 port 1
934 14:51:43.445635 scan_static_bus for USB3 port 1 done
935 14:51:43.445689 scan_bus: bus USB3 port 1 finished in 6 msecs
936 14:51:43.445744 scan_static_bus for USB0 port 0 done
937 14:51:43.445798 scan_bus: bus USB0 port 0 finished in 43 msecs
938 14:51:43.445852 scan_static_bus for PCI: 00:0d.0 done
939 14:51:43.445907 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
940 14:51:43.445961 PCI: 00:14.0 scanning...
941 14:51:43.446016 scan_static_bus for PCI: 00:14.0
942 14:51:43.446070 USB0 port 0 enabled
943 14:51:43.446125 USB0 port 0 scanning...
944 14:51:43.446179 scan_static_bus for USB0 port 0
945 14:51:43.446234 USB2 port 0 disabled
946 14:51:43.446289 USB2 port 1 enabled
947 14:51:43.446345 USB2 port 2 enabled
948 14:51:43.446399 USB2 port 3 disabled
949 14:51:43.446453 USB2 port 4 enabled
950 14:51:43.446506 USB2 port 5 disabled
951 14:51:43.446560 USB2 port 6 disabled
952 14:51:43.446614 USB2 port 7 disabled
953 14:51:43.446668 USB2 port 8 disabled
954 14:51:43.446722 USB2 port 9 disabled
955 14:51:43.446776 USB3 port 0 disabled
956 14:51:43.446830 USB3 port 1 enabled
957 14:51:43.446884 USB3 port 2 disabled
958 14:51:43.446938 USB3 port 3 disabled
959 14:51:43.447180 USB2 port 1 scanning...
960 14:51:43.447240 scan_static_bus for USB2 port 1
961 14:51:43.447296 scan_static_bus for USB2 port 1 done
962 14:51:43.447352 scan_bus: bus USB2 port 1 finished in 6 msecs
963 14:51:43.447406 USB2 port 2 scanning...
964 14:51:43.447461 scan_static_bus for USB2 port 2
965 14:51:43.447514 scan_static_bus for USB2 port 2 done
966 14:51:43.447569 scan_bus: bus USB2 port 2 finished in 6 msecs
967 14:51:43.447624 USB2 port 4 scanning...
968 14:51:43.447678 scan_static_bus for USB2 port 4
969 14:51:43.447733 scan_static_bus for USB2 port 4 done
970 14:51:43.447787 scan_bus: bus USB2 port 4 finished in 6 msecs
971 14:51:43.447841 USB3 port 1 scanning...
972 14:51:43.447896 scan_static_bus for USB3 port 1
973 14:51:43.447950 scan_static_bus for USB3 port 1 done
974 14:51:43.448004 scan_bus: bus USB3 port 1 finished in 6 msecs
975 14:51:43.448058 scan_static_bus for USB0 port 0 done
976 14:51:43.448113 scan_bus: bus USB0 port 0 finished in 93 msecs
977 14:51:43.448167 scan_static_bus for PCI: 00:14.0 done
978 14:51:43.448222 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
979 14:51:43.448276 PCI: 00:14.3 scanning...
980 14:51:43.448330 scan_static_bus for PCI: 00:14.3
981 14:51:43.448384 GENERIC: 0.0 enabled
982 14:51:43.448441 scan_static_bus for PCI: 00:14.3 done
983 14:51:43.448521 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
984 14:51:43.448578 PCI: 00:15.0 scanning...
985 14:51:43.448633 scan_static_bus for PCI: 00:15.0
986 14:51:43.448687 I2C: 00:1a enabled
987 14:51:43.448741 I2C: 00:31 enabled
988 14:51:43.448795 I2C: 00:32 enabled
989 14:51:43.448850 scan_static_bus for PCI: 00:15.0 done
990 14:51:43.448904 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
991 14:51:43.448959 PCI: 00:15.1 scanning...
992 14:51:43.449014 scan_static_bus for PCI: 00:15.1
993 14:51:43.449068 I2C: 00:10 enabled
994 14:51:43.449122 scan_static_bus for PCI: 00:15.1 done
995 14:51:43.449177 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
996 14:51:43.449232 PCI: 00:15.2 scanning...
997 14:51:43.449286 scan_static_bus for PCI: 00:15.2
998 14:51:43.449350 scan_static_bus for PCI: 00:15.2 done
999 14:51:43.449405 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1000 14:51:43.449459 PCI: 00:15.3 scanning...
1001 14:51:43.449513 scan_static_bus for PCI: 00:15.3
1002 14:51:43.449567 scan_static_bus for PCI: 00:15.3 done
1003 14:51:43.449621 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1004 14:51:43.449675 PCI: 00:19.1 scanning...
1005 14:51:43.449729 scan_static_bus for PCI: 00:19.1
1006 14:51:43.449783 I2C: 00:15 enabled
1007 14:51:43.449837 scan_static_bus for PCI: 00:19.1 done
1008 14:51:43.449892 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1009 14:51:43.449947 PCI: 00:1d.0 scanning...
1010 14:51:43.450000 do_pci_scan_bridge for PCI: 00:1d.0
1011 14:51:43.450054 PCI: pci_scan_bus for bus 01
1012 14:51:43.450108 PCI: 01:00.0 [1c5c/174a] enabled
1013 14:51:43.450162 GENERIC: 0.0 enabled
1014 14:51:43.450216 Enabling Common Clock Configuration
1015 14:51:43.450270 L1 Sub-State supported from root port 29
1016 14:51:43.450325 L1 Sub-State Support = 0xf
1017 14:51:43.450379 CommonModeRestoreTime = 0x28
1018 14:51:43.450435 Power On Value = 0x16, Power On Scale = 0x0
1019 14:51:43.450489 ASPM: Enabled L1
1020 14:51:43.450543 PCIe: Max_Payload_Size adjusted to 128
1021 14:51:43.450597 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1022 14:51:43.450651 PCI: 00:1e.2 scanning...
1023 14:51:43.450705 scan_generic_bus for PCI: 00:1e.2
1024 14:51:43.450760 SPI: 00 enabled
1025 14:51:43.450821 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1026 14:51:43.450878 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1027 14:51:43.450934 PCI: 00:1e.3 scanning...
1028 14:51:43.450989 scan_generic_bus for PCI: 00:1e.3
1029 14:51:43.451044 SPI: 00 enabled
1030 14:51:43.451099 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1031 14:51:43.451153 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1032 14:51:43.451208 PCI: 00:1f.0 scanning...
1033 14:51:43.451262 scan_static_bus for PCI: 00:1f.0
1034 14:51:43.451316 PNP: 0c09.0 enabled
1035 14:51:43.451370 PNP: 0c09.0 scanning...
1036 14:51:43.451424 scan_static_bus for PNP: 0c09.0
1037 14:51:43.451478 scan_static_bus for PNP: 0c09.0 done
1038 14:51:43.451532 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1039 14:51:43.451586 scan_static_bus for PCI: 00:1f.0 done
1040 14:51:43.451640 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1041 14:51:43.451694 PCI: 00:1f.2 scanning...
1042 14:51:43.451747 scan_static_bus for PCI: 00:1f.2
1043 14:51:43.451816 GENERIC: 0.0 enabled
1044 14:51:43.451878 GENERIC: 0.0 scanning...
1045 14:51:43.451932 scan_static_bus for GENERIC: 0.0
1046 14:51:43.451986 GENERIC: 0.0 enabled
1047 14:51:43.452040 GENERIC: 1.0 enabled
1048 14:51:43.452094 scan_static_bus for GENERIC: 0.0 done
1049 14:51:43.452148 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1050 14:51:43.452202 scan_static_bus for PCI: 00:1f.2 done
1051 14:51:43.452255 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1052 14:51:43.452309 PCI: 00:1f.3 scanning...
1053 14:51:43.452363 scan_static_bus for PCI: 00:1f.3
1054 14:51:43.452417 scan_static_bus for PCI: 00:1f.3 done
1055 14:51:43.452470 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1056 14:51:43.452524 PCI: 00:1f.5 scanning...
1057 14:51:43.452577 scan_generic_bus for PCI: 00:1f.5
1058 14:51:43.452631 scan_generic_bus for PCI: 00:1f.5 done
1059 14:51:43.452684 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1060 14:51:43.452738 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1061 14:51:43.452792 scan_static_bus for Root Device done
1062 14:51:43.452846 scan_bus: bus Root Device finished in 737 msecs
1063 14:51:43.452900 done
1064 14:51:43.452953 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1065 14:51:43.453007 Chrome EC: UHEPI supported
1066 14:51:43.453062 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1067 14:51:43.453116 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1068 14:51:43.453170 SPI flash protection: WPSW=1 SRP0=0
1069 14:51:43.453224 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1070 14:51:43.453278 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1071 14:51:43.453379 found VGA at PCI: 00:02.0
1072 14:51:43.453434 Setting up VGA for PCI: 00:02.0
1073 14:51:43.453679 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1074 14:51:43.453742 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1075 14:51:43.453796 Allocating resources...
1076 14:51:43.453850 Reading resources...
1077 14:51:43.453904 Root Device read_resources bus 0 link: 0
1078 14:51:43.453958 DOMAIN: 0000 read_resources bus 0 link: 0
1079 14:51:43.454012 PCI: 00:04.0 read_resources bus 1 link: 0
1080 14:51:43.454066 PCI: 00:04.0 read_resources bus 1 link: 0 done
1081 14:51:43.454120 PCI: 00:0d.0 read_resources bus 0 link: 0
1082 14:51:43.454174 USB0 port 0 read_resources bus 0 link: 0
1083 14:51:43.454227 USB0 port 0 read_resources bus 0 link: 0 done
1084 14:51:43.454281 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1085 14:51:43.454335 PCI: 00:14.0 read_resources bus 0 link: 0
1086 14:51:43.454389 USB0 port 0 read_resources bus 0 link: 0
1087 14:51:43.454443 USB0 port 0 read_resources bus 0 link: 0 done
1088 14:51:43.454497 PCI: 00:14.0 read_resources bus 0 link: 0 done
1089 14:51:43.454551 PCI: 00:14.3 read_resources bus 0 link: 0
1090 14:51:43.454605 PCI: 00:14.3 read_resources bus 0 link: 0 done
1091 14:51:43.454659 PCI: 00:15.0 read_resources bus 0 link: 0
1092 14:51:43.454712 PCI: 00:15.0 read_resources bus 0 link: 0 done
1093 14:51:43.454766 PCI: 00:15.1 read_resources bus 0 link: 0
1094 14:51:43.454820 PCI: 00:15.1 read_resources bus 0 link: 0 done
1095 14:51:43.454873 PCI: 00:19.1 read_resources bus 0 link: 0
1096 14:51:43.454927 PCI: 00:19.1 read_resources bus 0 link: 0 done
1097 14:51:43.454980 PCI: 00:1d.0 read_resources bus 1 link: 0
1098 14:51:43.455034 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1099 14:51:43.455087 PCI: 00:1e.2 read_resources bus 2 link: 0
1100 14:51:43.455141 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1101 14:51:43.455199 PCI: 00:1e.3 read_resources bus 3 link: 0
1102 14:51:43.455275 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1103 14:51:43.455331 PCI: 00:1f.0 read_resources bus 0 link: 0
1104 14:51:43.455385 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1105 14:51:43.455440 PCI: 00:1f.2 read_resources bus 0 link: 0
1106 14:51:43.455494 GENERIC: 0.0 read_resources bus 0 link: 0
1107 14:51:43.455548 GENERIC: 0.0 read_resources bus 0 link: 0 done
1108 14:51:43.455601 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1109 14:51:43.455655 DOMAIN: 0000 read_resources bus 0 link: 0 done
1110 14:51:43.455709 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1111 14:51:43.455763 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1112 14:51:43.455817 Root Device read_resources bus 0 link: 0 done
1113 14:51:43.455871 Done reading resources.
1114 14:51:43.455925 Show resources in subtree (Root Device)...After reading.
1115 14:51:43.455979 Root Device child on link 0 DOMAIN: 0000
1116 14:51:43.456032 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1117 14:51:43.456087 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1118 14:51:43.456142 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1119 14:51:43.456197 PCI: 00:00.0
1120 14:51:43.456250 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1121 14:51:43.456305 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1122 14:51:43.456359 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1123 14:51:43.456413 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1124 14:51:43.456467 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1125 14:51:43.456522 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1126 14:51:43.456576 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1127 14:51:43.456630 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1128 14:51:43.456685 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1129 14:51:43.456739 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1130 14:51:43.456792 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1131 14:51:43.456847 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1132 14:51:43.456901 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1133 14:51:43.456955 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1134 14:51:43.457010 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1135 14:51:43.457064 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1136 14:51:43.457119 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1137 14:51:43.457174 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1138 14:51:43.457229 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1139 14:51:43.457471 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1140 14:51:43.457533 PCI: 00:02.0
1141 14:51:43.457588 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1142 14:51:43.457643 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1143 14:51:43.457698 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1144 14:51:43.457752 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1145 14:51:43.457807 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1146 14:51:43.457861 GENERIC: 0.0
1147 14:51:43.457915 PCI: 00:05.0
1148 14:51:43.457968 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1149 14:51:43.458022 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1150 14:51:43.458103 GENERIC: 0.0
1151 14:51:43.458161 PCI: 00:08.0
1152 14:51:43.458215 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1153 14:51:43.458271 PCI: 00:0a.0
1154 14:51:43.458325 PCI: 00:0d.0 child on link 0 USB0 port 0
1155 14:51:43.458379 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 14:51:43.458434 USB0 port 0 child on link 0 USB3 port 0
1157 14:51:43.458488 USB3 port 0
1158 14:51:43.458541 USB3 port 1
1159 14:51:43.458594 USB3 port 2
1160 14:51:43.458648 USB3 port 3
1161 14:51:43.458700 PCI: 00:14.0 child on link 0 USB0 port 0
1162 14:51:43.465166 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1163 14:51:43.468512 USB0 port 0 child on link 0 USB2 port 0
1164 14:51:43.471774 USB2 port 0
1165 14:51:43.471856 USB2 port 1
1166 14:51:43.475119 USB2 port 2
1167 14:51:43.475201 USB2 port 3
1168 14:51:43.478513 USB2 port 4
1169 14:51:43.478595 USB2 port 5
1170 14:51:43.481796 USB2 port 6
1171 14:51:43.481904 USB2 port 7
1172 14:51:43.485183 USB2 port 8
1173 14:51:43.485291 USB2 port 9
1174 14:51:43.488551 USB3 port 0
1175 14:51:43.488632 USB3 port 1
1176 14:51:43.491819 USB3 port 2
1177 14:51:43.491901 USB3 port 3
1178 14:51:43.495104 PCI: 00:14.2
1179 14:51:43.504893 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1180 14:51:43.515028 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1181 14:51:43.518151 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1182 14:51:43.528271 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1183 14:51:43.531562 GENERIC: 0.0
1184 14:51:43.534700 PCI: 00:15.0 child on link 0 I2C: 00:1a
1185 14:51:43.544752 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 14:51:43.548079 I2C: 00:1a
1187 14:51:43.548161 I2C: 00:31
1188 14:51:43.551369 I2C: 00:32
1189 14:51:43.554764 PCI: 00:15.1 child on link 0 I2C: 00:10
1190 14:51:43.564793 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 14:51:43.564876 I2C: 00:10
1192 14:51:43.567960 PCI: 00:15.2
1193 14:51:43.578384 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 14:51:43.578467 PCI: 00:15.3
1195 14:51:43.588264 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 14:51:43.591634 PCI: 00:16.0
1197 14:51:43.601393 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 14:51:43.601475 PCI: 00:19.0
1199 14:51:43.608233 PCI: 00:19.1 child on link 0 I2C: 00:15
1200 14:51:43.618201 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 14:51:43.618310 I2C: 00:15
1202 14:51:43.621504 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1203 14:51:43.631388 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1204 14:51:43.641591 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1205 14:51:43.651247 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1206 14:51:43.651331 GENERIC: 0.0
1207 14:51:43.654720 PCI: 01:00.0
1208 14:51:43.664991 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1209 14:51:43.675075 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1210 14:51:43.681775 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1211 14:51:43.684886 PCI: 00:1e.0
1212 14:51:43.694960 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1213 14:51:43.698084 PCI: 00:1e.2 child on link 0 SPI: 00
1214 14:51:43.708143 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1215 14:51:43.711766 SPI: 00
1216 14:51:43.714919 PCI: 00:1e.3 child on link 0 SPI: 00
1217 14:51:43.725019 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 14:51:43.725101 SPI: 00
1219 14:51:43.731235 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1220 14:51:43.738171 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1221 14:51:43.741331 PNP: 0c09.0
1222 14:51:43.747956 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1223 14:51:43.754742 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1224 14:51:43.764389 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1225 14:51:43.771153 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1226 14:51:43.778051 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1227 14:51:43.778131 GENERIC: 0.0
1228 14:51:43.781237 GENERIC: 1.0
1229 14:51:43.781373 PCI: 00:1f.3
1230 14:51:43.791246 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1231 14:51:43.801035 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1232 14:51:43.804248 PCI: 00:1f.5
1233 14:51:43.814431 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1234 14:51:43.817668 CPU_CLUSTER: 0 child on link 0 APIC: 00
1235 14:51:43.817748 APIC: 00
1236 14:51:43.820816 APIC: 01
1237 14:51:43.820895 APIC: 03
1238 14:51:43.820958 APIC: 05
1239 14:51:43.824471 APIC: 07
1240 14:51:43.824597 APIC: 06
1241 14:51:43.827767 APIC: 02
1242 14:51:43.827847 APIC: 04
1243 14:51:43.834098 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1244 14:51:43.840744 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1245 14:51:43.847490 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1246 14:51:43.853781 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1247 14:51:43.857095 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1248 14:51:43.860650 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1249 14:51:43.867283 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1250 14:51:43.873938 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1251 14:51:43.880500 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1252 14:51:43.887075 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1253 14:51:43.893774 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1254 14:51:43.900379 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1255 14:51:43.910662 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1256 14:51:43.916982 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1257 14:51:43.923714 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1258 14:51:43.927301 DOMAIN: 0000: Resource ranges:
1259 14:51:43.930567 * Base: 1000, Size: 800, Tag: 100
1260 14:51:43.933621 * Base: 1900, Size: e700, Tag: 100
1261 14:51:43.940687 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1262 14:51:43.947152 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1263 14:51:43.953665 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1264 14:51:43.960388 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1265 14:51:43.970500 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1266 14:51:43.977054 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1267 14:51:43.983725 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1268 14:51:43.990288 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1269 14:51:44.000708 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1270 14:51:44.006888 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1271 14:51:44.013859 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1272 14:51:44.023718 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1273 14:51:44.030019 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1274 14:51:44.036643 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1275 14:51:44.046870 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1276 14:51:44.053176 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1277 14:51:44.060015 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1278 14:51:44.069981 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1279 14:51:44.076745 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1280 14:51:44.083207 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1281 14:51:44.093306 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1282 14:51:44.099775 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1283 14:51:44.106473 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1284 14:51:44.116826 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1285 14:51:44.123072 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1286 14:51:44.126481 DOMAIN: 0000: Resource ranges:
1287 14:51:44.129798 * Base: 7fc00000, Size: 40400000, Tag: 200
1288 14:51:44.136367 * Base: d0000000, Size: 28000000, Tag: 200
1289 14:51:44.139686 * Base: fa000000, Size: 1000000, Tag: 200
1290 14:51:44.143154 * Base: fb001000, Size: 2fff000, Tag: 200
1291 14:51:44.146342 * Base: fe010000, Size: 2e000, Tag: 200
1292 14:51:44.153434 * Base: fe03f000, Size: d41000, Tag: 200
1293 14:51:44.156538 * Base: fed88000, Size: 8000, Tag: 200
1294 14:51:44.159931 * Base: fed93000, Size: d000, Tag: 200
1295 14:51:44.163049 * Base: feda2000, Size: 1e000, Tag: 200
1296 14:51:44.169662 * Base: fede0000, Size: 1220000, Tag: 200
1297 14:51:44.172983 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1298 14:51:44.180118 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1299 14:51:44.186657 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1300 14:51:44.192913 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1301 14:51:44.199775 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1302 14:51:44.206450 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1303 14:51:44.213091 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1304 14:51:44.219660 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1305 14:51:44.226365 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1306 14:51:44.233071 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1307 14:51:44.239808 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1308 14:51:44.246318 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1309 14:51:44.252880 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1310 14:51:44.259955 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1311 14:51:44.266287 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1312 14:51:44.273143 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1313 14:51:44.279848 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1314 14:51:44.286480 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1315 14:51:44.293186 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1316 14:51:44.299801 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1317 14:51:44.306504 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1318 14:51:44.313131 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1319 14:51:44.319709 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1320 14:51:44.326138 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1321 14:51:44.336126 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1322 14:51:44.339465 PCI: 00:1d.0: Resource ranges:
1323 14:51:44.342695 * Base: 7fc00000, Size: 100000, Tag: 200
1324 14:51:44.349490 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1325 14:51:44.355992 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1326 14:51:44.362613 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1327 14:51:44.369566 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1328 14:51:44.379599 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1329 14:51:44.382916 Root Device assign_resources, bus 0 link: 0
1330 14:51:44.386117 DOMAIN: 0000 assign_resources, bus 0 link: 0
1331 14:51:44.396202 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1332 14:51:44.402775 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1333 14:51:44.412741 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1334 14:51:44.419512 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1335 14:51:44.422897 PCI: 00:04.0 assign_resources, bus 1 link: 0
1336 14:51:44.429730 PCI: 00:04.0 assign_resources, bus 1 link: 0
1337 14:51:44.436577 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1338 14:51:44.446553 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1339 14:51:44.453174 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1340 14:51:44.459689 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1341 14:51:44.463142 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1342 14:51:44.469799 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1343 14:51:44.476435 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 14:51:44.479879 PCI: 00:14.0 assign_resources, bus 0 link: 0
1345 14:51:44.489713 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1346 14:51:44.496377 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1347 14:51:44.506251 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1348 14:51:44.509665 PCI: 00:14.3 assign_resources, bus 0 link: 0
1349 14:51:44.512913 PCI: 00:14.3 assign_resources, bus 0 link: 0
1350 14:51:44.523026 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1351 14:51:44.526366 PCI: 00:15.0 assign_resources, bus 0 link: 0
1352 14:51:44.533212 PCI: 00:15.0 assign_resources, bus 0 link: 0
1353 14:51:44.539878 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1354 14:51:44.543139 PCI: 00:15.1 assign_resources, bus 0 link: 0
1355 14:51:44.549707 PCI: 00:15.1 assign_resources, bus 0 link: 0
1356 14:51:44.556421 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1357 14:51:44.566493 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1358 14:51:44.573113 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1359 14:51:44.583106 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1360 14:51:44.586578 PCI: 00:19.1 assign_resources, bus 0 link: 0
1361 14:51:44.590058 PCI: 00:19.1 assign_resources, bus 0 link: 0
1362 14:51:44.599950 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1363 14:51:44.609798 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1364 14:51:44.620201 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1365 14:51:44.623098 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1366 14:51:44.629746 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1367 14:51:44.640067 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1368 14:51:44.646755 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1369 14:51:44.650058 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1370 14:51:44.660445 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1371 14:51:44.663819 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1372 14:51:44.670478 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1373 14:51:44.677121 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1374 14:51:44.680661 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1375 14:51:44.687265 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1376 14:51:44.690789 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1377 14:51:44.697202 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1378 14:51:44.700510 LPC: Trying to open IO window from 800 size 1ff
1379 14:51:44.710857 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1380 14:51:44.717210 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1381 14:51:44.727278 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1382 14:51:44.730646 DOMAIN: 0000 assign_resources, bus 0 link: 0
1383 14:51:44.733963 Root Device assign_resources, bus 0 link: 0
1384 14:51:44.737210 Done setting resources.
1385 14:51:44.743757 Show resources in subtree (Root Device)...After assigning values.
1386 14:51:44.747152 Root Device child on link 0 DOMAIN: 0000
1387 14:51:44.753815 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1388 14:51:44.760375 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1389 14:51:44.770415 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1390 14:51:44.773842 PCI: 00:00.0
1391 14:51:44.783716 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1392 14:51:44.794017 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1393 14:51:44.800512 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1394 14:51:44.810826 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1395 14:51:44.820487 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1396 14:51:44.830743 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1397 14:51:44.840755 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1398 14:51:44.850491 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1399 14:51:44.857119 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1400 14:51:44.867493 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1401 14:51:44.877579 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1402 14:51:44.887330 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1403 14:51:44.897024 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1404 14:51:44.903951 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1405 14:51:44.913817 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1406 14:51:44.924187 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1407 14:51:44.934128 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1408 14:51:44.943794 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1409 14:51:44.950348 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1410 14:51:44.960654 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1411 14:51:44.963863 PCI: 00:02.0
1412 14:51:44.973897 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1413 14:51:44.983671 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1414 14:51:44.993681 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1415 14:51:44.997287 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1416 14:51:45.010082 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1417 14:51:45.010168 GENERIC: 0.0
1418 14:51:45.013425 PCI: 00:05.0
1419 14:51:45.023561 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1420 14:51:45.027028 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1421 14:51:45.030401 GENERIC: 0.0
1422 14:51:45.030482 PCI: 00:08.0
1423 14:51:45.040344 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1424 14:51:45.043684 PCI: 00:0a.0
1425 14:51:45.047097 PCI: 00:0d.0 child on link 0 USB0 port 0
1426 14:51:45.056721 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1427 14:51:45.063453 USB0 port 0 child on link 0 USB3 port 0
1428 14:51:45.063534 USB3 port 0
1429 14:51:45.066724 USB3 port 1
1430 14:51:45.066805 USB3 port 2
1431 14:51:45.070028 USB3 port 3
1432 14:51:45.073514 PCI: 00:14.0 child on link 0 USB0 port 0
1433 14:51:45.083722 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1434 14:51:45.090113 USB0 port 0 child on link 0 USB2 port 0
1435 14:51:45.090195 USB2 port 0
1436 14:51:45.093492 USB2 port 1
1437 14:51:45.093573 USB2 port 2
1438 14:51:45.096725 USB2 port 3
1439 14:51:45.096805 USB2 port 4
1440 14:51:45.099967 USB2 port 5
1441 14:51:45.100048 USB2 port 6
1442 14:51:45.103248 USB2 port 7
1443 14:51:45.103329 USB2 port 8
1444 14:51:45.106966 USB2 port 9
1445 14:51:45.107047 USB3 port 0
1446 14:51:45.109958 USB3 port 1
1447 14:51:45.110038 USB3 port 2
1448 14:51:45.113252 USB3 port 3
1449 14:51:45.113389 PCI: 00:14.2
1450 14:51:45.126921 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1451 14:51:45.136960 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1452 14:51:45.139895 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1453 14:51:45.149959 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1454 14:51:45.153477 GENERIC: 0.0
1455 14:51:45.156606 PCI: 00:15.0 child on link 0 I2C: 00:1a
1456 14:51:45.166491 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1457 14:51:45.170149 I2C: 00:1a
1458 14:51:45.170231 I2C: 00:31
1459 14:51:45.170298 I2C: 00:32
1460 14:51:45.176758 PCI: 00:15.1 child on link 0 I2C: 00:10
1461 14:51:45.186887 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1462 14:51:45.186971 I2C: 00:10
1463 14:51:45.190088 PCI: 00:15.2
1464 14:51:45.200186 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1465 14:51:45.200270 PCI: 00:15.3
1466 14:51:45.213497 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1467 14:51:45.213581 PCI: 00:16.0
1468 14:51:45.223259 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1469 14:51:45.226869 PCI: 00:19.0
1470 14:51:45.230168 PCI: 00:19.1 child on link 0 I2C: 00:15
1471 14:51:45.239835 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1472 14:51:45.240008 I2C: 00:15
1473 14:51:45.246748 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1474 14:51:45.256464 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1475 14:51:45.266584 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1476 14:51:45.276654 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1477 14:51:45.280062 GENERIC: 0.0
1478 14:51:45.280296 PCI: 01:00.0
1479 14:51:45.290167 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1480 14:51:45.303242 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1481 14:51:45.313681 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1482 14:51:45.313776 PCI: 00:1e.0
1483 14:51:45.326600 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1484 14:51:45.330184 PCI: 00:1e.2 child on link 0 SPI: 00
1485 14:51:45.340152 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1486 14:51:45.340236 SPI: 00
1487 14:51:45.343727 PCI: 00:1e.3 child on link 0 SPI: 00
1488 14:51:45.353739 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1489 14:51:45.357096 SPI: 00
1490 14:51:45.360391 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1491 14:51:45.370031 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1492 14:51:45.370115 PNP: 0c09.0
1493 14:51:45.380143 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1494 14:51:45.383410 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1495 14:51:45.393507 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1496 14:51:45.403568 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1497 14:51:45.406886 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1498 14:51:45.410257 GENERIC: 0.0
1499 14:51:45.410340 GENERIC: 1.0
1500 14:51:45.413473 PCI: 00:1f.3
1501 14:51:45.423594 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1502 14:51:45.433350 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1503 14:51:45.436728 PCI: 00:1f.5
1504 14:51:45.446754 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1505 14:51:45.450107 CPU_CLUSTER: 0 child on link 0 APIC: 00
1506 14:51:45.450190 APIC: 00
1507 14:51:45.453333 APIC: 01
1508 14:51:45.453429 APIC: 03
1509 14:51:45.456843 APIC: 05
1510 14:51:45.456925 APIC: 07
1511 14:51:45.456992 APIC: 06
1512 14:51:45.460281 APIC: 02
1513 14:51:45.460364 APIC: 04
1514 14:51:45.463474 Done allocating resources.
1515 14:51:45.470233 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1516 14:51:45.473512 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1517 14:51:45.480328 Configure GPIOs for I2S audio on UP4.
1518 14:51:45.486675 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1519 14:51:45.486758 Enabling resources...
1520 14:51:45.493931 PCI: 00:00.0 subsystem <- 8086/9a12
1521 14:51:45.494014 PCI: 00:00.0 cmd <- 06
1522 14:51:45.497195 PCI: 00:02.0 subsystem <- 8086/9a40
1523 14:51:45.500530 PCI: 00:02.0 cmd <- 03
1524 14:51:45.503874 PCI: 00:04.0 subsystem <- 8086/9a03
1525 14:51:45.507169 PCI: 00:04.0 cmd <- 02
1526 14:51:45.510567 PCI: 00:05.0 subsystem <- 8086/9a19
1527 14:51:45.513826 PCI: 00:05.0 cmd <- 02
1528 14:51:45.517452 PCI: 00:08.0 subsystem <- 8086/9a11
1529 14:51:45.520792 PCI: 00:08.0 cmd <- 06
1530 14:51:45.524164 PCI: 00:0d.0 subsystem <- 8086/9a13
1531 14:51:45.527529 PCI: 00:0d.0 cmd <- 02
1532 14:51:45.530807 PCI: 00:14.0 subsystem <- 8086/a0ed
1533 14:51:45.530890 PCI: 00:14.0 cmd <- 02
1534 14:51:45.537327 PCI: 00:14.2 subsystem <- 8086/a0ef
1535 14:51:45.537414 PCI: 00:14.2 cmd <- 02
1536 14:51:45.540539 PCI: 00:14.3 subsystem <- 8086/a0f0
1537 14:51:45.544098 PCI: 00:14.3 cmd <- 02
1538 14:51:45.547178 PCI: 00:15.0 subsystem <- 8086/a0e8
1539 14:51:45.550306 PCI: 00:15.0 cmd <- 02
1540 14:51:45.553886 PCI: 00:15.1 subsystem <- 8086/a0e9
1541 14:51:45.557318 PCI: 00:15.1 cmd <- 02
1542 14:51:45.560558 PCI: 00:15.2 subsystem <- 8086/a0ea
1543 14:51:45.563990 PCI: 00:15.2 cmd <- 02
1544 14:51:45.567502 PCI: 00:15.3 subsystem <- 8086/a0eb
1545 14:51:45.570608 PCI: 00:15.3 cmd <- 02
1546 14:51:45.573767 PCI: 00:16.0 subsystem <- 8086/a0e0
1547 14:51:45.573850 PCI: 00:16.0 cmd <- 02
1548 14:51:45.580648 PCI: 00:19.1 subsystem <- 8086/a0c6
1549 14:51:45.580732 PCI: 00:19.1 cmd <- 02
1550 14:51:45.584088 PCI: 00:1d.0 bridge ctrl <- 0013
1551 14:51:45.587439 PCI: 00:1d.0 subsystem <- 8086/a0b0
1552 14:51:45.590821 PCI: 00:1d.0 cmd <- 06
1553 14:51:45.594189 PCI: 00:1e.0 subsystem <- 8086/a0a8
1554 14:51:45.597161 PCI: 00:1e.0 cmd <- 06
1555 14:51:45.600665 PCI: 00:1e.2 subsystem <- 8086/a0aa
1556 14:51:45.603969 PCI: 00:1e.2 cmd <- 06
1557 14:51:45.607262 PCI: 00:1e.3 subsystem <- 8086/a0ab
1558 14:51:45.610771 PCI: 00:1e.3 cmd <- 02
1559 14:51:45.614178 PCI: 00:1f.0 subsystem <- 8086/a087
1560 14:51:45.617633 PCI: 00:1f.0 cmd <- 407
1561 14:51:45.620757 PCI: 00:1f.3 subsystem <- 8086/a0c8
1562 14:51:45.620840 PCI: 00:1f.3 cmd <- 02
1563 14:51:45.627739 PCI: 00:1f.5 subsystem <- 8086/a0a4
1564 14:51:45.627823 PCI: 00:1f.5 cmd <- 406
1565 14:51:45.632894 PCI: 01:00.0 cmd <- 02
1566 14:51:45.637649 done.
1567 14:51:45.640909 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1568 14:51:45.644286 Initializing devices...
1569 14:51:45.647403 Root Device init
1570 14:51:45.650482 Chrome EC: Set SMI mask to 0x0000000000000000
1571 14:51:45.657613 Chrome EC: clear events_b mask to 0x0000000000000000
1572 14:51:45.664083 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1573 14:51:45.667415 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1574 14:51:45.673945 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1575 14:51:45.680483 Chrome EC: Set WAKE mask to 0x0000000000000000
1576 14:51:45.684120 fw_config match found: DB_USB=USB3_ACTIVE
1577 14:51:45.690406 Configure Right Type-C port orientation for retimer
1578 14:51:45.693709 Root Device init finished in 43 msecs
1579 14:51:45.697086 PCI: 00:00.0 init
1580 14:51:45.700374 CPU TDP = 9 Watts
1581 14:51:45.700453 CPU PL1 = 9 Watts
1582 14:51:45.703709 CPU PL2 = 40 Watts
1583 14:51:45.703788 CPU PL4 = 83 Watts
1584 14:51:45.707126 PCI: 00:00.0 init finished in 8 msecs
1585 14:51:45.710948 PCI: 00:02.0 init
1586 14:51:45.714372 GMA: Found VBT in CBFS
1587 14:51:45.717200 GMA: Found valid VBT in CBFS
1588 14:51:45.720674 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1589 14:51:45.730644 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1590 14:51:45.733903 PCI: 00:02.0 init finished in 18 msecs
1591 14:51:45.737290 PCI: 00:05.0 init
1592 14:51:45.740664 PCI: 00:05.0 init finished in 0 msecs
1593 14:51:45.740745 PCI: 00:08.0 init
1594 14:51:45.746920 PCI: 00:08.0 init finished in 0 msecs
1595 14:51:45.747000 PCI: 00:14.0 init
1596 14:51:45.753868 PCI: 00:14.0 init finished in 0 msecs
1597 14:51:45.753948 PCI: 00:14.2 init
1598 14:51:45.756849 PCI: 00:14.2 init finished in 0 msecs
1599 14:51:45.760791 PCI: 00:15.0 init
1600 14:51:45.764454 I2C bus 0 version 0x3230302a
1601 14:51:45.767680 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1602 14:51:45.771024 PCI: 00:15.0 init finished in 6 msecs
1603 14:51:45.774842 PCI: 00:15.1 init
1604 14:51:45.777339 I2C bus 1 version 0x3230302a
1605 14:51:45.780633 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1606 14:51:45.783990 PCI: 00:15.1 init finished in 6 msecs
1607 14:51:45.787667 PCI: 00:15.2 init
1608 14:51:45.791058 I2C bus 2 version 0x3230302a
1609 14:51:45.794421 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1610 14:51:45.797710 PCI: 00:15.2 init finished in 6 msecs
1611 14:51:45.797792 PCI: 00:15.3 init
1612 14:51:45.800599 I2C bus 3 version 0x3230302a
1613 14:51:45.804002 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1614 14:51:45.810626 PCI: 00:15.3 init finished in 6 msecs
1615 14:51:45.810707 PCI: 00:16.0 init
1616 14:51:45.814096 PCI: 00:16.0 init finished in 0 msecs
1617 14:51:45.817561 PCI: 00:19.1 init
1618 14:51:45.820897 I2C bus 5 version 0x3230302a
1619 14:51:45.824218 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1620 14:51:45.827632 PCI: 00:19.1 init finished in 6 msecs
1621 14:51:45.830848 PCI: 00:1d.0 init
1622 14:51:45.834123 Initializing PCH PCIe bridge.
1623 14:51:45.837770 PCI: 00:1d.0 init finished in 3 msecs
1624 14:51:45.841118 PCI: 00:1f.0 init
1625 14:51:45.844359 IOAPIC: Initializing IOAPIC at 0xfec00000
1626 14:51:45.847697 IOAPIC: Bootstrap Processor Local APIC = 0x00
1627 14:51:45.851053 IOAPIC: ID = 0x02
1628 14:51:45.854327 IOAPIC: Dumping registers
1629 14:51:45.857741 reg 0x0000: 0x02000000
1630 14:51:45.857822 reg 0x0001: 0x00770020
1631 14:51:45.860875 reg 0x0002: 0x00000000
1632 14:51:45.864383 PCI: 00:1f.0 init finished in 21 msecs
1633 14:51:45.867383 PCI: 00:1f.2 init
1634 14:51:45.871286 Disabling ACPI via APMC.
1635 14:51:45.874621 APMC done.
1636 14:51:45.877978 PCI: 00:1f.2 init finished in 5 msecs
1637 14:51:45.888855 PCI: 01:00.0 init
1638 14:51:45.891928 PCI: 01:00.0 init finished in 0 msecs
1639 14:51:45.895185 PNP: 0c09.0 init
1640 14:51:45.898476 Google Chrome EC uptime: 10.215 seconds
1641 14:51:45.905509 Google Chrome AP resets since EC boot: 0
1642 14:51:45.908387 Google Chrome most recent AP reset causes:
1643 14:51:45.915175 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1644 14:51:45.918473 PNP: 0c09.0 init finished in 19 msecs
1645 14:51:45.923723 Devices initialized
1646 14:51:45.927187 Show all devs... After init.
1647 14:51:45.930387 Root Device: enabled 1
1648 14:51:45.930468 DOMAIN: 0000: enabled 1
1649 14:51:45.933645 CPU_CLUSTER: 0: enabled 1
1650 14:51:45.936919 PCI: 00:00.0: enabled 1
1651 14:51:45.940220 PCI: 00:02.0: enabled 1
1652 14:51:45.940301 PCI: 00:04.0: enabled 1
1653 14:51:45.943644 PCI: 00:05.0: enabled 1
1654 14:51:45.946911 PCI: 00:06.0: enabled 0
1655 14:51:45.950226 PCI: 00:07.0: enabled 0
1656 14:51:45.950307 PCI: 00:07.1: enabled 0
1657 14:51:45.953771 PCI: 00:07.2: enabled 0
1658 14:51:45.957108 PCI: 00:07.3: enabled 0
1659 14:51:45.960507 PCI: 00:08.0: enabled 1
1660 14:51:45.960590 PCI: 00:09.0: enabled 0
1661 14:51:45.963402 PCI: 00:0a.0: enabled 0
1662 14:51:45.966752 PCI: 00:0d.0: enabled 1
1663 14:51:45.970490 PCI: 00:0d.1: enabled 0
1664 14:51:45.970573 PCI: 00:0d.2: enabled 0
1665 14:51:45.973317 PCI: 00:0d.3: enabled 0
1666 14:51:45.976683 PCI: 00:0e.0: enabled 0
1667 14:51:45.976766 PCI: 00:10.2: enabled 1
1668 14:51:45.980274 PCI: 00:10.6: enabled 0
1669 14:51:45.983359 PCI: 00:10.7: enabled 0
1670 14:51:45.986829 PCI: 00:12.0: enabled 0
1671 14:51:45.986912 PCI: 00:12.6: enabled 0
1672 14:51:45.990231 PCI: 00:13.0: enabled 0
1673 14:51:45.993680 PCI: 00:14.0: enabled 1
1674 14:51:45.997014 PCI: 00:14.1: enabled 0
1675 14:51:45.997096 PCI: 00:14.2: enabled 1
1676 14:51:45.999945 PCI: 00:14.3: enabled 1
1677 14:51:46.003371 PCI: 00:15.0: enabled 1
1678 14:51:46.006680 PCI: 00:15.1: enabled 1
1679 14:51:46.006763 PCI: 00:15.2: enabled 1
1680 14:51:46.009954 PCI: 00:15.3: enabled 1
1681 14:51:46.013270 PCI: 00:16.0: enabled 1
1682 14:51:46.013358 PCI: 00:16.1: enabled 0
1683 14:51:46.016688 PCI: 00:16.2: enabled 0
1684 14:51:46.020121 PCI: 00:16.3: enabled 0
1685 14:51:46.023492 PCI: 00:16.4: enabled 0
1686 14:51:46.023575 PCI: 00:16.5: enabled 0
1687 14:51:46.026706 PCI: 00:17.0: enabled 0
1688 14:51:46.029998 PCI: 00:19.0: enabled 0
1689 14:51:46.033415 PCI: 00:19.1: enabled 1
1690 14:51:46.033497 PCI: 00:19.2: enabled 0
1691 14:51:46.036617 PCI: 00:1c.0: enabled 1
1692 14:51:46.040161 PCI: 00:1c.1: enabled 0
1693 14:51:46.043476 PCI: 00:1c.2: enabled 0
1694 14:51:46.043559 PCI: 00:1c.3: enabled 0
1695 14:51:46.046764 PCI: 00:1c.4: enabled 0
1696 14:51:46.050152 PCI: 00:1c.5: enabled 0
1697 14:51:46.053114 PCI: 00:1c.6: enabled 1
1698 14:51:46.053196 PCI: 00:1c.7: enabled 0
1699 14:51:46.056439 PCI: 00:1d.0: enabled 1
1700 14:51:46.059772 PCI: 00:1d.1: enabled 0
1701 14:51:46.059855 PCI: 00:1d.2: enabled 1
1702 14:51:46.063195 PCI: 00:1d.3: enabled 0
1703 14:51:46.066618 PCI: 00:1e.0: enabled 1
1704 14:51:46.069984 PCI: 00:1e.1: enabled 0
1705 14:51:46.070066 PCI: 00:1e.2: enabled 1
1706 14:51:46.073195 PCI: 00:1e.3: enabled 1
1707 14:51:46.076765 PCI: 00:1f.0: enabled 1
1708 14:51:46.079941 PCI: 00:1f.1: enabled 0
1709 14:51:46.080023 PCI: 00:1f.2: enabled 1
1710 14:51:46.082991 PCI: 00:1f.3: enabled 1
1711 14:51:46.086200 PCI: 00:1f.4: enabled 0
1712 14:51:46.089753 PCI: 00:1f.5: enabled 1
1713 14:51:46.089836 PCI: 00:1f.6: enabled 0
1714 14:51:46.093238 PCI: 00:1f.7: enabled 0
1715 14:51:46.096357 APIC: 00: enabled 1
1716 14:51:46.096439 GENERIC: 0.0: enabled 1
1717 14:51:46.099480 GENERIC: 0.0: enabled 1
1718 14:51:46.103003 GENERIC: 1.0: enabled 1
1719 14:51:46.106149 GENERIC: 0.0: enabled 1
1720 14:51:46.106231 GENERIC: 1.0: enabled 1
1721 14:51:46.109612 USB0 port 0: enabled 1
1722 14:51:46.113317 GENERIC: 0.0: enabled 1
1723 14:51:46.113400 USB0 port 0: enabled 1
1724 14:51:46.116299 GENERIC: 0.0: enabled 1
1725 14:51:46.119525 I2C: 00:1a: enabled 1
1726 14:51:46.122955 I2C: 00:31: enabled 1
1727 14:51:46.123038 I2C: 00:32: enabled 1
1728 14:51:46.126197 I2C: 00:10: enabled 1
1729 14:51:46.129564 I2C: 00:15: enabled 1
1730 14:51:46.129647 GENERIC: 0.0: enabled 0
1731 14:51:46.132927 GENERIC: 1.0: enabled 0
1732 14:51:46.136125 GENERIC: 0.0: enabled 1
1733 14:51:46.136208 SPI: 00: enabled 1
1734 14:51:46.139609 SPI: 00: enabled 1
1735 14:51:46.142791 PNP: 0c09.0: enabled 1
1736 14:51:46.142874 GENERIC: 0.0: enabled 1
1737 14:51:46.146363 USB3 port 0: enabled 1
1738 14:51:46.149691 USB3 port 1: enabled 1
1739 14:51:46.149773 USB3 port 2: enabled 0
1740 14:51:46.153085 USB3 port 3: enabled 0
1741 14:51:46.156378 USB2 port 0: enabled 0
1742 14:51:46.159732 USB2 port 1: enabled 1
1743 14:51:46.159813 USB2 port 2: enabled 1
1744 14:51:46.162979 USB2 port 3: enabled 0
1745 14:51:46.166270 USB2 port 4: enabled 1
1746 14:51:46.166352 USB2 port 5: enabled 0
1747 14:51:46.169621 USB2 port 6: enabled 0
1748 14:51:46.172616 USB2 port 7: enabled 0
1749 14:51:46.175970 USB2 port 8: enabled 0
1750 14:51:46.176052 USB2 port 9: enabled 0
1751 14:51:46.179523 USB3 port 0: enabled 0
1752 14:51:46.182683 USB3 port 1: enabled 1
1753 14:51:46.182764 USB3 port 2: enabled 0
1754 14:51:46.185993 USB3 port 3: enabled 0
1755 14:51:46.189434 GENERIC: 0.0: enabled 1
1756 14:51:46.192768 GENERIC: 1.0: enabled 1
1757 14:51:46.192848 APIC: 01: enabled 1
1758 14:51:46.195898 APIC: 03: enabled 1
1759 14:51:46.196022 APIC: 05: enabled 1
1760 14:51:46.199355 APIC: 07: enabled 1
1761 14:51:46.202853 APIC: 06: enabled 1
1762 14:51:46.202933 APIC: 02: enabled 1
1763 14:51:46.206205 APIC: 04: enabled 1
1764 14:51:46.209568 PCI: 01:00.0: enabled 1
1765 14:51:46.212608 BS: BS_DEV_INIT run times (exec / console): 30 / 536 ms
1766 14:51:46.219349 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1767 14:51:46.222641 ELOG: NV offset 0xf30000 size 0x1000
1768 14:51:46.229359 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1769 14:51:46.236207 ELOG: Event(17) added with size 13 at 2024-05-28 14:50:37 UTC
1770 14:51:46.242512 ELOG: Event(92) added with size 9 at 2024-05-28 14:50:37 UTC
1771 14:51:46.249266 ELOG: Event(93) added with size 9 at 2024-05-28 14:50:37 UTC
1772 14:51:46.255910 ELOG: Event(16) added with size 11 at 2024-05-28 14:50:37 UTC
1773 14:51:46.259239 Erasing flash addr f30000 + 4 KiB
1774 14:51:46.318518 ELOG: Event(9E) added with size 10 at 2024-05-28 14:50:37 UTC
1775 14:51:46.325197 ELOG: Event(9F) added with size 14 at 2024-05-28 14:50:37 UTC
1776 14:51:46.331788 BS: BS_DEV_INIT exit times (exec / console): 32 / 55 ms
1777 14:51:46.338382 ELOG: Event(A1) added with size 10 at 2024-05-28 14:50:37 UTC
1778 14:51:46.345096 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1779 14:51:46.351985 ELOG: Event(A0) added with size 9 at 2024-05-28 14:50:37 UTC
1780 14:51:46.355103 elog_add_boot_reason: Logged dev mode boot
1781 14:51:46.361622 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1782 14:51:46.364940 Finalize devices...
1783 14:51:46.365022 Devices finalized
1784 14:51:46.371681 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1785 14:51:46.375073 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1786 14:51:46.381873 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1787 14:51:46.388371 ME: HFSTS1 : 0x80030055
1788 14:51:46.391758 ME: HFSTS2 : 0x30280116
1789 14:51:46.395097 ME: HFSTS3 : 0x00000050
1790 14:51:46.401635 ME: HFSTS4 : 0x00004000
1791 14:51:46.404930 ME: HFSTS5 : 0x00000000
1792 14:51:46.408339 ME: HFSTS6 : 0x00400006
1793 14:51:46.411541 ME: Manufacturing Mode : YES
1794 14:51:46.418069 ME: SPI Protection Mode Enabled : NO
1795 14:51:46.421596 ME: FW Partition Table : OK
1796 14:51:46.424744 ME: Bringup Loader Failure : NO
1797 14:51:46.428242 ME: Firmware Init Complete : NO
1798 14:51:46.431268 ME: Boot Options Present : NO
1799 14:51:46.434888 ME: Update In Progress : NO
1800 14:51:46.438233 ME: D0i3 Support : YES
1801 14:51:46.441068 ME: Low Power State Enabled : NO
1802 14:51:46.447757 ME: CPU Replaced : YES
1803 14:51:46.451134 ME: CPU Replacement Valid : YES
1804 14:51:46.454339 ME: Current Working State : 5
1805 14:51:46.457906 ME: Current Operation State : 1
1806 14:51:46.461163 ME: Current Operation Mode : 3
1807 14:51:46.464516 ME: Error Code : 0
1808 14:51:46.467882 ME: Enhanced Debug Mode : NO
1809 14:51:46.471182 ME: CPU Debug Disabled : YES
1810 14:51:46.477974 ME: TXT Support : NO
1811 14:51:46.481273 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1812 14:51:46.488025 ELOG: Event(91) added with size 10 at 2024-05-28 14:50:37 UTC
1813 14:51:46.494847 Chrome EC: clear events_b mask to 0x0000000020004000
1814 14:51:46.501064 BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms
1815 14:51:46.508053 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4d1c4
1816 14:51:46.511257 CBFS: 'fallback/slic' not found.
1817 14:51:46.514407 ACPI: Writing ACPI tables at 76b02000.
1818 14:51:46.517654 ACPI: * FACS
1819 14:51:46.517735 ACPI: * DSDT
1820 14:51:46.524334 Ramoops buffer: 0x100000@0x76a01000.
1821 14:51:46.527853 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1822 14:51:46.531031 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1823 14:51:46.534658 Google Chrome EC: version:
1824 14:51:46.538150 ro: voema_v2.0.7540-147f8d37d1
1825 14:51:46.541313 rw: voema_v2.0.7540-147f8d37d1
1826 14:51:46.544694 running image: 1
1827 14:51:46.551247 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1828 14:51:46.554576 ACPI: * FADT
1829 14:51:46.554661 SCI is IRQ9
1830 14:51:46.557882 ACPI: added table 1/32, length now 40
1831 14:51:46.561456 ACPI: * SSDT
1832 14:51:46.564695 Found 1 CPU(s) with 8 core(s) each.
1833 14:51:46.568115 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1834 14:51:46.574759 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1835 14:51:46.578189 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1836 14:51:46.581168 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1837 14:51:46.587866 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1838 14:51:46.594496 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1839 14:51:46.598095 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1840 14:51:46.604573 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1841 14:51:46.611131 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1842 14:51:46.614412 \_SB.PCI0.RP09: Added StorageD3Enable property
1843 14:51:46.617714 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1844 14:51:46.624258 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1845 14:51:46.631071 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1846 14:51:46.634321 PS2K: Passing 80 keymaps to kernel
1847 14:51:46.640819 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1848 14:51:46.647929 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1849 14:51:46.654383 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1850 14:51:46.661118 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1851 14:51:46.667697 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1852 14:51:46.674395 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1853 14:51:46.680664 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1854 14:51:46.687707 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1855 14:51:46.691005 ACPI: added table 2/32, length now 44
1856 14:51:46.691086 ACPI: * MCFG
1857 14:51:46.697605 ACPI: added table 3/32, length now 48
1858 14:51:46.697686 ACPI: * TPM2
1859 14:51:46.700742 TPM2 log created at 0x769f1000
1860 14:51:46.703885 ACPI: added table 4/32, length now 52
1861 14:51:46.707567 ACPI: * MADT
1862 14:51:46.707652 SCI is IRQ9
1863 14:51:46.710847 ACPI: added table 5/32, length now 56
1864 14:51:46.714179 current = 76b0a850
1865 14:51:46.714260 ACPI: * DMAR
1866 14:51:46.717474 ACPI: added table 6/32, length now 60
1867 14:51:46.723927 ACPI: added table 7/32, length now 64
1868 14:51:46.724008 ACPI: * HPET
1869 14:51:46.727338 ACPI: added table 8/32, length now 68
1870 14:51:46.730618 ACPI: done.
1871 14:51:46.730698 ACPI tables: 35216 bytes.
1872 14:51:46.733867 smbios_write_tables: 769f0000
1873 14:51:46.737289 EC returned error result code 3
1874 14:51:46.740510 Couldn't obtain OEM name from CBI
1875 14:51:46.745482 Create SMBIOS type 16
1876 14:51:46.748932 Create SMBIOS type 17
1877 14:51:46.752095 GENERIC: 0.0 (WIFI Device)
1878 14:51:46.752176 SMBIOS tables: 1750 bytes.
1879 14:51:46.758696 Writing table forward entry at 0x00000500
1880 14:51:46.765559 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 292c
1881 14:51:46.768890 Writing coreboot table at 0x76b26000
1882 14:51:46.775422 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1883 14:51:46.778636 1. 0000000000001000-000000000009ffff: RAM
1884 14:51:46.782138 2. 00000000000a0000-00000000000fffff: RESERVED
1885 14:51:46.788489 3. 0000000000100000-00000000769effff: RAM
1886 14:51:46.791871 4. 00000000769f0000-0000000076b98fff: CONFIGURATION TABLES
1887 14:51:46.798518 5. 0000000076b99000-0000000076c0afff: RAMSTAGE
1888 14:51:46.805230 6. 0000000076c0b000-0000000076ffffff: CONFIGURATION TABLES
1889 14:51:46.808563 7. 0000000077000000-000000007fbfffff: RESERVED
1890 14:51:46.811791 8. 00000000c0000000-00000000cfffffff: RESERVED
1891 14:51:46.818654 9. 00000000f8000000-00000000f9ffffff: RESERVED
1892 14:51:46.821833 10. 00000000fb000000-00000000fb000fff: RESERVED
1893 14:51:46.828374 11. 00000000fe000000-00000000fe00ffff: RESERVED
1894 14:51:46.831706 12. 00000000fed80000-00000000fed87fff: RESERVED
1895 14:51:46.838349 13. 00000000fed90000-00000000fed92fff: RESERVED
1896 14:51:46.841987 14. 00000000feda0000-00000000feda1fff: RESERVED
1897 14:51:46.848569 15. 00000000fedc0000-00000000feddffff: RESERVED
1898 14:51:46.851598 16. 0000000100000000-00000002803fffff: RAM
1899 14:51:46.855238 Passing 4 GPIOs to payload:
1900 14:51:46.858370 NAME | PORT | POLARITY | VALUE
1901 14:51:46.864794 lid | undefined | high | high
1902 14:51:46.868348 power | undefined | high | low
1903 14:51:46.874829 oprom | undefined | high | low
1904 14:51:46.881560 EC in RW | 0x000000e5 | high | low
1905 14:51:46.888347 Wrote coreboot table at: 0x76b26000, 0x610 bytes, checksum fe33
1906 14:51:46.888429 coreboot table: 1576 bytes.
1907 14:51:46.895101 IMD ROOT 0. 0x76fff000 0x00001000
1908 14:51:46.898047 IMD SMALL 1. 0x76ffe000 0x00001000
1909 14:51:46.901290 FSP MEMORY 2. 0x76c4e000 0x003b0000
1910 14:51:46.904591 RO MCACHE 3. 0x76c4d000 0x00000fdc
1911 14:51:46.907904 CONSOLE 4. 0x76c2d000 0x00020000
1912 14:51:46.911505 FMAP 5. 0x76c2c000 0x00000578
1913 14:51:46.914508 TIME STAMP 6. 0x76c2b000 0x00000910
1914 14:51:46.917765 VBOOT WORK 7. 0x76c17000 0x00014000
1915 14:51:46.924414 ROMSTG STCK 8. 0x76c16000 0x00001000
1916 14:51:46.928149 AFTER CAR 9. 0x76c0b000 0x0000b000
1917 14:51:46.931334 RAMSTAGE 10. 0x76b98000 0x00073000
1918 14:51:46.934704 REFCODE 11. 0x76b43000 0x00055000
1919 14:51:46.938086 SMM BACKUP 12. 0x76b33000 0x00010000
1920 14:51:46.941276 4f444749 13. 0x76b31000 0x00002000
1921 14:51:46.944556 EXT VBT14. 0x76b2e000 0x0000219f
1922 14:51:46.948133 COREBOOT 15. 0x76b26000 0x00008000
1923 14:51:46.951514 ACPI 16. 0x76b02000 0x00024000
1924 14:51:46.954723 ACPI GNVS 17. 0x76b01000 0x00001000
1925 14:51:46.961210 RAMOOPS 18. 0x76a01000 0x00100000
1926 14:51:46.964691 TPM2 TCGLOG19. 0x769f1000 0x00010000
1927 14:51:46.968157 SMBIOS 20. 0x769f0000 0x00000800
1928 14:51:46.968240 IMD small region:
1929 14:51:46.974631 IMD ROOT 0. 0x76ffec00 0x00000400
1930 14:51:46.978018 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1931 14:51:46.981190 VPD 2. 0x76ffe9a0 0x00000235
1932 14:51:46.984601 POWER STATE 3. 0x76ffe940 0x00000044
1933 14:51:46.987972 ROMSTAGE 4. 0x76ffe920 0x00000004
1934 14:51:46.991351 MEM INFO 5. 0x76ffe740 0x000001e0
1935 14:51:46.998111 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1936 14:51:47.001510 MTRR: Physical address space:
1937 14:51:47.007526 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1938 14:51:47.014293 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1939 14:51:47.021138 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1940 14:51:47.027927 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1941 14:51:47.034375 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1942 14:51:47.037635 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1943 14:51:47.044253 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1944 14:51:47.051112 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 14:51:47.054620 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 14:51:47.057402 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 14:51:47.061140 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 14:51:47.067424 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 14:51:47.070690 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 14:51:47.073970 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 14:51:47.077407 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 14:51:47.080930 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 14:51:47.087458 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 14:51:47.090760 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 14:51:47.094129 call enable_fixed_mtrr()
1956 14:51:47.097490 CPU physical address size: 39 bits
1957 14:51:47.100809 MTRR: default type WB/UC MTRR counts: 6/6.
1958 14:51:47.107406 MTRR: UC selected as default type.
1959 14:51:47.110878 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1960 14:51:47.117106 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1961 14:51:47.123860 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1962 14:51:47.130439 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1963 14:51:47.137130 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1964 14:51:47.144082 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1965 14:51:47.147348 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 14:51:47.153637 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 14:51:47.157078 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 14:51:47.160487 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 14:51:47.163740 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 14:51:47.170702 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 14:51:47.173522 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 14:51:47.177308 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 14:51:47.180520 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 14:51:47.186897 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 14:51:47.190301 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 14:51:47.190418
1977 14:51:47.193950 MTRR check
1978 14:51:47.194031 call enable_fixed_mtrr()
1979 14:51:47.197058 Fixed MTRRs : Enabled
1980 14:51:47.200470 Variable MTRRs: Enabled
1981 14:51:47.200550
1982 14:51:47.203773 CPU physical address size: 39 bits
1983 14:51:47.210428 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
1984 14:51:47.213741 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 14:51:47.217056 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 14:51:47.223811 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 14:51:47.226979 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 14:51:47.230215 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 14:51:47.233606 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 14:51:47.240499 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 14:51:47.243573 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 14:51:47.246930 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 14:51:47.250320 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 14:51:47.256789 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 14:51:47.260074 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 14:51:47.263439 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 14:51:47.266749 call enable_fixed_mtrr()
1998 14:51:47.270040 MTRR: Fixed MSR 0x259 0x0000000000000000
1999 14:51:47.276612 MTRR: Fixed MSR 0x268 0x0606060606060606
2000 14:51:47.279859 MTRR: Fixed MSR 0x269 0x0606060606060606
2001 14:51:47.283530 MTRR: Fixed MSR 0x26a 0x0606060606060606
2002 14:51:47.286610 MTRR: Fixed MSR 0x26b 0x0606060606060606
2003 14:51:47.293279 MTRR: Fixed MSR 0x26c 0x0606060606060606
2004 14:51:47.296842 MTRR: Fixed MSR 0x26d 0x0606060606060606
2005 14:51:47.300022 MTRR: Fixed MSR 0x26e 0x0606060606060606
2006 14:51:47.303374 MTRR: Fixed MSR 0x26f 0x0606060606060606
2007 14:51:47.307174 CPU physical address size: 39 bits
2008 14:51:47.313789 call enable_fixed_mtrr()
2009 14:51:47.317065 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 14:51:47.320374 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 14:51:47.323657 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 14:51:47.330747 MTRR: Fixed MSR 0x259 0x0000000000000000
2013 14:51:47.333633 MTRR: Fixed MSR 0x268 0x0606060606060606
2014 14:51:47.336959 MTRR: Fixed MSR 0x269 0x0606060606060606
2015 14:51:47.340303 MTRR: Fixed MSR 0x26a 0x0606060606060606
2016 14:51:47.343667 MTRR: Fixed MSR 0x26b 0x0606060606060606
2017 14:51:47.350236 MTRR: Fixed MSR 0x26c 0x0606060606060606
2018 14:51:47.353649 MTRR: Fixed MSR 0x26d 0x0606060606060606
2019 14:51:47.356913 MTRR: Fixed MSR 0x26e 0x0606060606060606
2020 14:51:47.360180 MTRR: Fixed MSR 0x26f 0x0606060606060606
2021 14:51:47.367710 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 14:51:47.367794 call enable_fixed_mtrr()
2023 14:51:47.374247 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 14:51:47.377901 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 14:51:47.381112 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 14:51:47.384440 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 14:51:47.391006 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 14:51:47.394279 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 14:51:47.397605 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 14:51:47.400777 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 14:51:47.407705 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 14:51:47.410640 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 14:51:47.414389 MTRR: Fixed MSR 0x250 0x0606060606060606
2034 14:51:47.417652 MTRR: Fixed MSR 0x258 0x0606060606060606
2035 14:51:47.420983 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 14:51:47.427484 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 14:51:47.430783 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 14:51:47.433905 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 14:51:47.437492 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 14:51:47.444091 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 14:51:47.447523 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 14:51:47.450708 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 14:51:47.454027 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 14:51:47.461178 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 14:51:47.461289 call enable_fixed_mtrr()
2046 14:51:47.468154 MTRR: Fixed MSR 0x259 0x0000000000000000
2047 14:51:47.471570 MTRR: Fixed MSR 0x268 0x0606060606060606
2048 14:51:47.474614 MTRR: Fixed MSR 0x269 0x0606060606060606
2049 14:51:47.477912 MTRR: Fixed MSR 0x26a 0x0606060606060606
2050 14:51:47.484682 MTRR: Fixed MSR 0x26b 0x0606060606060606
2051 14:51:47.488028 MTRR: Fixed MSR 0x26c 0x0606060606060606
2052 14:51:47.491338 MTRR: Fixed MSR 0x26d 0x0606060606060606
2053 14:51:47.494622 MTRR: Fixed MSR 0x26e 0x0606060606060606
2054 14:51:47.501265 MTRR: Fixed MSR 0x26f 0x0606060606060606
2055 14:51:47.504587 CPU physical address size: 39 bits
2056 14:51:47.507738 call enable_fixed_mtrr()
2057 14:51:47.514625 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4df60
2058 14:51:47.517625 call enable_fixed_mtrr()
2059 14:51:47.521144 CPU physical address size: 39 bits
2060 14:51:47.524587 CPU physical address size: 39 bits
2061 14:51:47.531172 CPU physical address size: 39 bits
2062 14:51:47.534479 CPU physical address size: 39 bits
2063 14:51:47.537734 Checking segment from ROM address 0xffc02b38
2064 14:51:47.541121 Checking segment from ROM address 0xffc02b54
2065 14:51:47.547792 Loading segment from ROM address 0xffc02b38
2066 14:51:47.547878 code (compression=0)
2067 14:51:47.557626 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2068 14:51:47.567591 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2069 14:51:47.567694 it's not compressed!
2070 14:51:47.707102 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2071 14:51:47.713577 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2072 14:51:47.720571 Loading segment from ROM address 0xffc02b54
2073 14:51:47.720655 Entry Point 0x30000000
2074 14:51:47.723871 Loaded segments
2075 14:51:47.730370 BS: BS_PAYLOAD_LOAD run times (exec / console): 450 / 63 ms
2076 14:51:47.773104 Finalizing chipset.
2077 14:51:47.776724 Finalizing SMM.
2078 14:51:47.776811 APMC done.
2079 14:51:47.783169 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2080 14:51:47.786575 mp_park_aps done after 0 msecs.
2081 14:51:47.789931 Jumping to boot code at 0x30000000(0x76b26000)
2082 14:51:47.799632 CPU0: stack: 0x76bef000 - 0x76bf0000, lowest used address 0x76befa78, stack used: 1416 bytes
2083 14:51:47.799812
2084 14:51:47.799906
2085 14:51:47.799999
2086 14:51:47.803380 Starting depthcharge on Voema...
2087 14:51:47.803463
2088 14:51:47.803796 end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
2089 14:51:47.803901 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
2090 14:51:47.803987 Setting prompt string to ['volteer:']
2091 14:51:47.804065 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
2092 14:51:47.813210 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2093 14:51:47.813317
2094 14:51:47.819637 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2095 14:51:47.819746
2096 14:51:47.822925 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2097 14:51:47.826274
2098 14:51:47.829593 Failed to find eMMC card reader
2099 14:51:47.829677
2100 14:51:47.829742 Wipe memory regions:
2101 14:51:47.829803
2102 14:51:47.836156 [0x00000000001000, 0x000000000a0000)
2103 14:51:47.836249
2104 14:51:47.839396 [0x00000000100000, 0x00000030000000)
2105 14:51:47.864204
2106 14:51:47.867500 [0x00000032662db0, 0x000000769f0000)
2107 14:51:47.903636
2108 14:51:47.906917 [0x00000100000000, 0x00000280400000)
2109 14:51:48.108032
2110 14:51:48.110935 ec_init: CrosEC protocol v3 supported (256, 256)
2111 14:51:48.111028
2112 14:51:48.117958 update_port_state: port C0 state: usb enable 1 mux conn 0
2113 14:51:48.118041
2114 14:51:48.124192 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2115 14:51:48.129248
2116 14:51:48.132464 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2117 14:51:48.132566
2118 14:51:48.135662 send_conn_disc_msg: pmc_send_cmd succeeded
2119 14:51:48.568735
2120 14:51:48.568892 R8152: Initializing
2121 14:51:48.568960
2122 14:51:48.571979 Version 6 (ocp_data = 5c30)
2123 14:51:48.572064
2124 14:51:48.575272 R8152: Done initializing
2125 14:51:48.575380
2126 14:51:48.578721 Adding net device
2127 14:51:48.881135
2128 14:51:48.884460 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2129 14:51:48.884545
2130 14:51:48.884609
2131 14:51:48.887998 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2133 14:51:48.988381 volteer: tftpboot 192.168.201.1 14064482/tftp-deploy-4anq0lj7/kernel/bzImage 14064482/tftp-deploy-4anq0lj7/kernel/cmdline 14064482/tftp-deploy-4anq0lj7/ramdisk/ramdisk.cpio.gz
2134 14:51:48.988547 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2135 14:51:48.988645 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
2136 14:51:48.992952 tftpboot 192.168.201.1 14064482/tftp-deploy-4anq0lj7/kernel/bzIploy-4anq0lj7/kernel/cmdline 14064482/tftp-deploy-4anq0lj7/ramdisk/ramdisk.cpio.gz
2137 14:51:48.993041
2138 14:51:48.993106 Waiting for link
2139 14:51:49.196393
2140 14:51:49.196532 done.
2141 14:51:49.196599
2142 14:51:49.196663 MAC: 00:24:32:30:78:74
2143 14:51:49.196724
2144 14:51:49.199704 Sending DHCP discover... done.
2145 14:51:49.199788
2146 14:51:49.203020 Waiting for reply... done.
2147 14:51:49.203104
2148 14:51:49.206379 Sending DHCP request... done.
2149 14:51:49.206463
2150 14:51:49.213044 Waiting for reply... done.
2151 14:51:49.213127
2152 14:51:49.213195 My ip is 192.168.201.14
2153 14:51:49.213258
2154 14:51:49.216251 The DHCP server ip is 192.168.201.1
2155 14:51:49.219383
2156 14:51:49.222798 TFTP server IP predefined by user: 192.168.201.1
2157 14:51:49.222882
2158 14:51:49.229186 Bootfile predefined by user: 14064482/tftp-deploy-4anq0lj7/kernel/bzImage
2159 14:51:49.229270
2160 14:51:49.232546 Sending tftp read request... done.
2161 14:51:49.232629
2162 14:51:49.235902 Waiting for the transfer...
2163 14:51:49.235986
2164 14:51:49.836262 00000000 ################################################################
2165 14:51:49.836425
2166 14:51:50.407883 00080000 ################################################################
2167 14:51:50.408493
2168 14:51:51.043299 00100000 ################################################################
2169 14:51:51.043479
2170 14:51:51.756375 00180000 ################################################################
2171 14:51:51.756904
2172 14:51:52.467140 00200000 ################################################################
2173 14:51:52.467692
2174 14:51:53.186230 00280000 ################################################################
2175 14:51:53.186840
2176 14:51:53.816994 00300000 ################################################################
2177 14:51:53.817169
2178 14:51:54.363887 00380000 ################################################################
2179 14:51:54.364038
2180 14:51:54.899909 00400000 ################################################################
2181 14:51:54.900095
2182 14:51:55.538372 00480000 ################################################################
2183 14:51:55.538881
2184 14:51:56.235982 00500000 ################################################################
2185 14:51:56.236541
2186 14:51:56.941680 00580000 ################################################################
2187 14:51:56.942354
2188 14:51:57.654640 00600000 ################################################################
2189 14:51:57.655222
2190 14:51:58.317639 00680000 ################################################################
2191 14:51:58.317830
2192 14:51:58.984040 00700000 ################################################################
2193 14:51:58.984539
2194 14:51:59.615275 00780000 ################################################################
2195 14:51:59.615429
2196 14:52:00.247934 00800000 ################################################################
2197 14:52:00.248481
2198 14:52:00.815566 00880000 ################################################################
2199 14:52:00.815712
2200 14:52:01.369929 00900000 ################################################################
2201 14:52:01.370070
2202 14:52:01.931687 00980000 ################################################################
2203 14:52:01.931834
2204 14:52:02.464524 00a00000 ################################################################
2205 14:52:02.464734
2206 14:52:03.002904 00a80000 ################################################################
2207 14:52:03.003052
2208 14:52:03.531822 00b00000 ################################################################
2209 14:52:03.532002
2210 14:52:04.075592 00b80000 ################################################################
2211 14:52:04.075763
2212 14:52:04.610631 00c00000 ################################################################
2213 14:52:04.610806
2214 14:52:05.152896 00c80000 ################################################################
2215 14:52:05.153071
2216 14:52:05.683171 00d00000 ################################################################
2217 14:52:05.683339
2218 14:52:06.215337 00d80000 ################################################################
2219 14:52:06.215471
2220 14:52:06.750767 00e00000 ################################################################
2221 14:52:06.750921
2222 14:52:07.277058 00e80000 ################################################################
2223 14:52:07.277228
2224 14:52:07.811164 00f00000 ################################################################
2225 14:52:07.811344
2226 14:52:08.350806 00f80000 ################################################################
2227 14:52:08.350962
2228 14:52:08.701944 01000000 ########################################### done.
2229 14:52:08.702114
2230 14:52:08.705111 The bootfile was 17121280 bytes long.
2231 14:52:08.705205
2232 14:52:08.708413 Sending tftp read request... done.
2233 14:52:08.708527
2234 14:52:08.711664 Waiting for the transfer...
2235 14:52:08.711743
2236 14:52:09.253620 00000000 ################################################################
2237 14:52:09.253801
2238 14:52:09.783334 00080000 ################################################################
2239 14:52:09.783491
2240 14:52:10.312411 00100000 ################################################################
2241 14:52:10.312551
2242 14:52:10.851425 00180000 ################################################################
2243 14:52:10.851557
2244 14:52:11.381231 00200000 ################################################################
2245 14:52:11.381426
2246 14:52:11.918070 00280000 ################################################################
2247 14:52:11.918242
2248 14:52:12.452436 00300000 ################################################################
2249 14:52:12.452610
2250 14:52:13.003228 00380000 ################################################################
2251 14:52:13.003402
2252 14:52:13.547283 00400000 ################################################################
2253 14:52:13.547458
2254 14:52:14.114643 00480000 ################################################################
2255 14:52:14.114806
2256 14:52:14.685130 00500000 ################################################################
2257 14:52:14.685274
2258 14:52:15.259713 00580000 ################################################################
2259 14:52:15.259898
2260 14:52:15.880611 00600000 ################################################################
2261 14:52:15.880763
2262 14:52:16.575196 00680000 ################################################################
2263 14:52:16.575759
2264 14:52:17.222185 00700000 ################################################################
2265 14:52:17.222364
2266 14:52:17.776311 00780000 ################################################################
2267 14:52:17.776462
2268 14:52:18.326724 00800000 ################################################################
2269 14:52:18.326887
2270 14:52:18.858082 00880000 ################################################################
2271 14:52:18.858260
2272 14:52:19.383317 00900000 ################################################################
2273 14:52:19.383449
2274 14:52:19.910817 00980000 ################################################################
2275 14:52:19.910955
2276 14:52:20.449714 00a00000 ################################################################
2277 14:52:20.449851
2278 14:52:20.991481 00a80000 ################################################################
2279 14:52:20.991615
2280 14:52:21.534350 00b00000 ################################################################
2281 14:52:21.534489
2282 14:52:22.087492 00b80000 ################################################################
2283 14:52:22.087666
2284 14:52:22.633743 00c00000 ################################################################
2285 14:52:22.633890
2286 14:52:23.173360 00c80000 ################################################################
2287 14:52:23.173567
2288 14:52:23.720658 00d00000 ################################################################
2289 14:52:23.720811
2290 14:52:24.280393 00d80000 ################################################################
2291 14:52:24.280546
2292 14:52:24.832117 00e00000 ################################################################
2293 14:52:24.832297
2294 14:52:25.360992 00e80000 ################################################################
2295 14:52:25.361169
2296 14:52:25.912225 00f00000 ################################################################
2297 14:52:25.912378
2298 14:52:26.456869 00f80000 ################################################################
2299 14:52:26.457040
2300 14:52:27.007091 01000000 ################################################################
2301 14:52:27.007238
2302 14:52:27.540192 01080000 ################################################################
2303 14:52:27.540443
2304 14:52:28.071520 01100000 ################################################################
2305 14:52:28.071693
2306 14:52:28.612272 01180000 ################################################################
2307 14:52:28.612422
2308 14:52:29.161031 01200000 ################################################################
2309 14:52:29.161204
2310 14:52:29.704089 01280000 ################################################################
2311 14:52:29.704269
2312 14:52:30.240401 01300000 ################################################################
2313 14:52:30.240544
2314 14:52:30.769454 01380000 ################################################################
2315 14:52:30.769625
2316 14:52:31.374639 01400000 ################################################################
2317 14:52:31.374830
2318 14:52:32.047089 01480000 ################################################################
2319 14:52:32.047244
2320 14:52:32.661453 01500000 ################################################################
2321 14:52:32.661615
2322 14:52:33.196428 01580000 ################################################################
2323 14:52:33.196584
2324 14:52:33.725382 01600000 ################################################################
2325 14:52:33.725534
2326 14:52:34.263433 01680000 ################################################################
2327 14:52:34.263614
2328 14:52:34.819067 01700000 ################################################################
2329 14:52:34.819212
2330 14:52:35.367473 01780000 ################################################################
2331 14:52:35.367605
2332 14:52:35.926815 01800000 ################################################################
2333 14:52:35.926951
2334 14:52:36.472814 01880000 ################################################################
2335 14:52:36.472974
2336 14:52:36.996615 01900000 ################################################################
2337 14:52:36.996777
2338 14:52:37.526545 01980000 ################################################################
2339 14:52:37.526739
2340 14:52:38.060551 01a00000 ################################################################
2341 14:52:38.060703
2342 14:52:38.607256 01a80000 ################################################################
2343 14:52:38.607437
2344 14:52:39.160035 01b00000 ################################################################
2345 14:52:39.160199
2346 14:52:39.708878 01b80000 ################################################################
2347 14:52:39.709026
2348 14:52:40.243624 01c00000 ################################################################
2349 14:52:40.243772
2350 14:52:40.794323 01c80000 ################################################################
2351 14:52:40.794467
2352 14:52:41.350901 01d00000 ################################################################
2353 14:52:41.351050
2354 14:52:41.906509 01d80000 ################################################################
2355 14:52:41.906676
2356 14:52:42.456227 01e00000 ################################################################
2357 14:52:42.456375
2358 14:52:42.987486 01e80000 ################################################################
2359 14:52:42.987632
2360 14:52:43.572595 01f00000 ################################################################
2361 14:52:43.572744
2362 14:52:44.138785 01f80000 ################################################################
2363 14:52:44.138970
2364 14:52:44.663634 02000000 ################################################################
2365 14:52:44.663785
2366 14:52:45.197246 02080000 ################################################################
2367 14:52:45.197453
2368 14:52:45.727449 02100000 ################################################################
2369 14:52:45.727602
2370 14:52:46.268982 02180000 ################################################################
2371 14:52:46.269150
2372 14:52:46.819815 02200000 ################################################################
2373 14:52:46.819952
2374 14:52:47.349490 02280000 ################################################################
2375 14:52:47.349634
2376 14:52:47.884120 02300000 ################################################################
2377 14:52:47.884282
2378 14:52:48.428730 02380000 ################################################################
2379 14:52:48.428923
2380 14:52:48.974851 02400000 ################################################################
2381 14:52:48.975004
2382 14:52:49.518650 02480000 ################################################################
2383 14:52:49.518800
2384 14:52:50.058365 02500000 ################################################################
2385 14:52:50.058546
2386 14:52:50.589001 02580000 ################################################################
2387 14:52:50.589216
2388 14:52:51.106601 02600000 ################################################################
2389 14:52:51.106744
2390 14:52:51.640116 02680000 ################################################################
2391 14:52:51.640267
2392 14:52:52.166918 02700000 ################################################################
2393 14:52:52.167122
2394 14:52:52.691377 02780000 ################################################################
2395 14:52:52.691528
2396 14:52:52.933087 02800000 ############################# done.
2397 14:52:52.933259
2398 14:52:52.936451 Sending tftp read request... done.
2399 14:52:52.936552
2400 14:52:52.939610 Waiting for the transfer...
2401 14:52:52.939710
2402 14:52:52.939805 00000000 # done.
2403 14:52:52.939936
2404 14:52:52.949810 Command line loaded dynamically from TFTP file: 14064482/tftp-deploy-4anq0lj7/kernel/cmdline
2405 14:52:52.949889
2406 14:52:52.966087 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2407 14:52:52.973365
2408 14:52:52.976759 Shutting down all USB controllers.
2409 14:52:52.976873
2410 14:52:52.976979 Removing current net device
2411 14:52:52.977084
2412 14:52:52.980010 Finalizing coreboot
2413 14:52:52.980082
2414 14:52:52.986408 Exiting depthcharge with code 4 at timestamp: 73932362
2415 14:52:52.986484
2416 14:52:52.986555
2417 14:52:52.986616 Starting kernel ...
2418 14:52:52.986676
2419 14:52:52.986733
2420 14:52:52.987590 end: 2.2.4 bootloader-commands (duration 00:01:05) [common]
2421 14:52:52.987720 start: 2.2.5 auto-login-action (timeout 00:03:41) [common]
2422 14:52:52.987825 Setting prompt string to ['Linux version [0-9]']
2423 14:52:52.987924 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2424 14:52:52.988026 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2426 14:56:33.987963 end: 2.2.5 auto-login-action (duration 00:03:41) [common]
2428 14:56:33.988277 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 221 seconds'
2430 14:56:33.988461 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2433 14:56:33.988863 end: 2 depthcharge-action (duration 00:05:00) [common]
2435 14:56:33.989205 Cleaning after the job
2436 14:56:33.989368 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064482/tftp-deploy-4anq0lj7/ramdisk
2437 14:56:33.993807 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064482/tftp-deploy-4anq0lj7/kernel
2438 14:56:33.995710 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064482/tftp-deploy-4anq0lj7/modules
2439 14:56:33.996763 start: 4.1 power-off (timeout 00:00:30) [common]
2440 14:56:33.997045 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-1', '--port=1', '--command=off']
2441 14:56:34.913536 >> Command sent successfully.
2442 14:56:34.915938 Returned 0 in 0 seconds
2443 14:56:35.016325 end: 4.1 power-off (duration 00:00:01) [common]
2445 14:56:35.016783 start: 4.2 read-feedback (timeout 00:09:59) [common]
2446 14:56:35.017090 Listened to connection for namespace 'common' for up to 1s
2448 14:56:35.017566 Listened to connection for namespace 'common' for up to 1s
2449 14:56:36.018002 Finalising connection for namespace 'common'
2450 14:56:36.018205 Disconnecting from shell: Finalise
2451 14:56:36.018320
2452 14:56:36.118648 end: 4.2 read-feedback (duration 00:00:01) [common]
2453 14:56:36.118815 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14064482
2454 14:56:36.184101 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14064482
2455 14:56:36.184304 JobError: Your job cannot terminate cleanly.