Boot log: acer-cp514-2h-1130g7-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 14:50:06.879745 lava-dispatcher, installed at version: 2024.03
2 14:50:06.879980 start: 0 validate
3 14:50:06.880128 Start time: 2024-05-28 14:50:06.880120+00:00 (UTC)
4 14:50:06.880256 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:50:06.880524 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-ltp%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 14:50:07.140705 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:50:07.140890 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.312-cip109-160-gd72fa2f84aefe%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:50:07.141983 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:50:07.142108 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-ltp%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:50:07.399696 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:50:07.399970 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.312-cip109-160-gd72fa2f84aefe%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 14:50:07.402692 validate duration: 0.52
14 14:50:07.403070 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:50:07.403210 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:50:07.403316 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:50:07.403456 Not decompressing ramdisk as can be used compressed.
18 14:50:07.403553 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-ltp/20240313.0/amd64/initrd.cpio.gz
19 14:50:07.403619 saving as /var/lib/lava/dispatcher/tmp/14064524/tftp-deploy-90s2nh3s/ramdisk/initrd.cpio.gz
20 14:50:07.403685 total size: 6464291 (6 MB)
21 14:50:07.404878 progress 0 % (0 MB)
22 14:50:07.407591 progress 5 % (0 MB)
23 14:50:07.410057 progress 10 % (0 MB)
24 14:50:07.413074 progress 15 % (0 MB)
25 14:50:07.415930 progress 20 % (1 MB)
26 14:50:07.418593 progress 25 % (1 MB)
27 14:50:07.421443 progress 30 % (1 MB)
28 14:50:07.424329 progress 35 % (2 MB)
29 14:50:07.426950 progress 40 % (2 MB)
30 14:50:07.429769 progress 45 % (2 MB)
31 14:50:07.432620 progress 50 % (3 MB)
32 14:50:07.435456 progress 55 % (3 MB)
33 14:50:07.438235 progress 60 % (3 MB)
34 14:50:07.440680 progress 65 % (4 MB)
35 14:50:07.442555 progress 70 % (4 MB)
36 14:50:07.444397 progress 75 % (4 MB)
37 14:50:07.446429 progress 80 % (4 MB)
38 14:50:07.448265 progress 85 % (5 MB)
39 14:50:07.450247 progress 90 % (5 MB)
40 14:50:07.452016 progress 95 % (5 MB)
41 14:50:07.453799 progress 100 % (6 MB)
42 14:50:07.453979 6 MB downloaded in 0.05 s (122.58 MB/s)
43 14:50:07.454187 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:50:07.454536 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:50:07.454652 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:50:07.454764 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:50:07.454934 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.312-cip109-160-gd72fa2f84aefe/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 14:50:07.455034 saving as /var/lib/lava/dispatcher/tmp/14064524/tftp-deploy-90s2nh3s/kernel/bzImage
50 14:50:07.455127 total size: 17121280 (16 MB)
51 14:50:07.455217 No compression specified
52 14:50:07.456553 progress 0 % (0 MB)
53 14:50:07.461415 progress 5 % (0 MB)
54 14:50:07.466049 progress 10 % (1 MB)
55 14:50:07.470832 progress 15 % (2 MB)
56 14:50:07.475594 progress 20 % (3 MB)
57 14:50:07.480551 progress 25 % (4 MB)
58 14:50:07.485525 progress 30 % (4 MB)
59 14:50:07.492577 progress 35 % (5 MB)
60 14:50:07.499749 progress 40 % (6 MB)
61 14:50:07.507070 progress 45 % (7 MB)
62 14:50:07.513552 progress 50 % (8 MB)
63 14:50:07.520586 progress 55 % (9 MB)
64 14:50:07.527609 progress 60 % (9 MB)
65 14:50:07.534535 progress 65 % (10 MB)
66 14:50:07.541653 progress 70 % (11 MB)
67 14:50:07.548744 progress 75 % (12 MB)
68 14:50:07.555358 progress 80 % (13 MB)
69 14:50:07.560062 progress 85 % (13 MB)
70 14:50:07.564678 progress 90 % (14 MB)
71 14:50:07.569292 progress 95 % (15 MB)
72 14:50:07.573845 progress 100 % (16 MB)
73 14:50:07.574082 16 MB downloaded in 0.12 s (137.27 MB/s)
74 14:50:07.574253 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:50:07.574490 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:50:07.574577 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:50:07.574662 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:50:07.574800 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-ltp/20240313.0/amd64/full.rootfs.tar.xz
80 14:50:07.574870 saving as /var/lib/lava/dispatcher/tmp/14064524/tftp-deploy-90s2nh3s/nfsrootfs/full.rootfs.tar
81 14:50:07.574936 total size: 100036868 (95 MB)
82 14:50:07.574999 Using unxz to decompress xz
83 14:50:07.579662 progress 0 % (0 MB)
84 14:50:08.104520 progress 5 % (4 MB)
85 14:50:08.619563 progress 10 % (9 MB)
86 14:50:09.067028 progress 15 % (14 MB)
87 14:50:09.479976 progress 20 % (19 MB)
88 14:50:09.955931 progress 25 % (23 MB)
89 14:50:10.291951 progress 30 % (28 MB)
90 14:50:10.642929 progress 35 % (33 MB)
91 14:50:10.965179 progress 40 % (38 MB)
92 14:50:11.221074 progress 45 % (42 MB)
93 14:50:11.530275 progress 50 % (47 MB)
94 14:50:11.718849 progress 55 % (52 MB)
95 14:50:11.906952 progress 60 % (57 MB)
96 14:50:12.247177 progress 65 % (62 MB)
97 14:50:12.555062 progress 70 % (66 MB)
98 14:50:12.846942 progress 75 % (71 MB)
99 14:50:13.137162 progress 80 % (76 MB)
100 14:50:13.432966 progress 85 % (81 MB)
101 14:50:13.696977 progress 90 % (85 MB)
102 14:50:13.988520 progress 95 % (90 MB)
103 14:50:14.296166 progress 100 % (95 MB)
104 14:50:14.302640 95 MB downloaded in 6.73 s (14.18 MB/s)
105 14:50:14.302958 end: 1.3.1 http-download (duration 00:00:07) [common]
107 14:50:14.303370 end: 1.3 download-retry (duration 00:00:07) [common]
108 14:50:14.303493 start: 1.4 download-retry (timeout 00:09:53) [common]
109 14:50:14.303613 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 14:50:14.303802 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.312-cip109-160-gd72fa2f84aefe/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 14:50:14.303906 saving as /var/lib/lava/dispatcher/tmp/14064524/tftp-deploy-90s2nh3s/modules/modules.tar
112 14:50:14.303998 total size: 1253532 (1 MB)
113 14:50:14.304093 Using unxz to decompress xz
114 14:50:14.556117 progress 2 % (0 MB)
115 14:50:14.556737 progress 7 % (0 MB)
116 14:50:14.560419 progress 13 % (0 MB)
117 14:50:14.564505 progress 18 % (0 MB)
118 14:50:14.568675 progress 23 % (0 MB)
119 14:50:14.572378 progress 28 % (0 MB)
120 14:50:14.576437 progress 33 % (0 MB)
121 14:50:14.580825 progress 39 % (0 MB)
122 14:50:14.584815 progress 44 % (0 MB)
123 14:50:14.588205 progress 49 % (0 MB)
124 14:50:14.592654 progress 54 % (0 MB)
125 14:50:14.596650 progress 60 % (0 MB)
126 14:50:14.601220 progress 65 % (0 MB)
127 14:50:14.605436 progress 70 % (0 MB)
128 14:50:14.608941 progress 75 % (0 MB)
129 14:50:14.613126 progress 81 % (0 MB)
130 14:50:14.617773 progress 86 % (1 MB)
131 14:50:14.621728 progress 91 % (1 MB)
132 14:50:14.626066 progress 96 % (1 MB)
133 14:50:14.636582 1 MB downloaded in 0.33 s (3.59 MB/s)
134 14:50:14.636866 end: 1.4.1 http-download (duration 00:00:00) [common]
136 14:50:14.637241 end: 1.4 download-retry (duration 00:00:00) [common]
137 14:50:14.637357 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
138 14:50:14.637466 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
139 14:50:17.815143 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14064524/extract-nfsrootfs-z4i1gwo1
140 14:50:17.815367 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
141 14:50:17.815515 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
142 14:50:17.815760 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re
143 14:50:17.815953 makedir: /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin
144 14:50:17.816103 makedir: /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/tests
145 14:50:17.816259 makedir: /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/results
146 14:50:17.816409 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-add-keys
147 14:50:17.816615 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-add-sources
148 14:50:17.816816 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-background-process-start
149 14:50:17.817005 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-background-process-stop
150 14:50:17.817170 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-common-functions
151 14:50:17.817338 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-echo-ipv4
152 14:50:17.817497 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-install-packages
153 14:50:17.817652 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-installed-packages
154 14:50:17.817777 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-os-build
155 14:50:17.817912 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-probe-channel
156 14:50:17.818039 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-probe-ip
157 14:50:17.818209 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-target-ip
158 14:50:17.818336 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-target-mac
159 14:50:17.818466 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-target-storage
160 14:50:17.818595 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-test-case
161 14:50:17.818717 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-test-event
162 14:50:17.818839 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-test-feedback
163 14:50:17.818968 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-test-raise
164 14:50:17.819089 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-test-reference
165 14:50:17.819212 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-test-runner
166 14:50:17.819339 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-test-set
167 14:50:17.819469 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-test-shell
168 14:50:17.819594 Updating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-install-packages (oe)
169 14:50:17.823638 Updating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/bin/lava-installed-packages (oe)
170 14:50:17.823782 Creating /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/environment
171 14:50:17.823885 LAVA metadata
172 14:50:17.823955 - LAVA_JOB_ID=14064524
173 14:50:17.824020 - LAVA_DISPATCHER_IP=192.168.201.1
174 14:50:17.824146 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
175 14:50:17.824216 skipped lava-vland-overlay
176 14:50:17.824293 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
177 14:50:17.824374 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
178 14:50:17.824437 skipped lava-multinode-overlay
179 14:50:17.824510 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
180 14:50:17.824594 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
181 14:50:17.824677 Loading test definitions
182 14:50:17.824766 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
183 14:50:17.824841 Using /lava-14064524 at stage 0
184 14:50:17.824940 Fetching tests from https://github.com/kernelci/test-definitions
185 14:50:17.825025 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/0/tests/0_ltp-ipc'
186 14:50:20.851253 Running '/usr/bin/git checkout kernelci.org
187 14:50:21.001896 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
188 14:50:21.002756 uuid=14064524_1.5.2.3.1 testdef=None
189 14:50:21.002929 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
191 14:50:21.003186 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
192 14:50:21.003997 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
194 14:50:21.004232 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
195 14:50:21.005260 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
197 14:50:21.005512 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
198 14:50:21.006553 runner path: /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/0/tests/0_ltp-ipc test_uuid 14064524_1.5.2.3.1
199 14:50:21.006647 SKIPFILE='skipfile-lkft.yaml'
200 14:50:21.006714 SKIP_INSTALL='true'
201 14:50:21.006776 TST_CMDFILES='ipc'
202 14:50:21.006926 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
204 14:50:21.007210 Creating lava-test-runner.conf files
205 14:50:21.007282 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14064524/lava-overlay-qlym26re/lava-14064524/0 for stage 0
206 14:50:21.007378 - 0_ltp-ipc
207 14:50:21.007483 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
208 14:50:21.007574 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
209 14:50:28.733232 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
210 14:50:28.733384 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
211 14:50:28.733484 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
212 14:50:28.733585 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
213 14:50:28.733685 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
214 14:50:28.903302 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
215 14:50:28.903750 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
216 14:50:28.903974 extracting modules file /var/lib/lava/dispatcher/tmp/14064524/tftp-deploy-90s2nh3s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14064524/extract-nfsrootfs-z4i1gwo1
217 14:50:28.941076 extracting modules file /var/lib/lava/dispatcher/tmp/14064524/tftp-deploy-90s2nh3s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14064524/extract-overlay-ramdisk-pnynmw4u/ramdisk
218 14:50:28.978180 end: 1.5.4 extract-modules (duration 00:00:00) [common]
219 14:50:28.978356 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
220 14:50:28.978470 [common] Applying overlay to NFS
221 14:50:28.978563 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14064524/compress-overlay-xjowhcl3/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14064524/extract-nfsrootfs-z4i1gwo1
222 14:50:30.049990 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
223 14:50:30.050211 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
224 14:50:30.050339 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
225 14:50:30.050444 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
226 14:50:30.050579 Building ramdisk /var/lib/lava/dispatcher/tmp/14064524/extract-overlay-ramdisk-pnynmw4u/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14064524/extract-overlay-ramdisk-pnynmw4u/ramdisk
227 14:50:30.161305 >> 45058 blocks
228 14:50:31.039084 rename /var/lib/lava/dispatcher/tmp/14064524/extract-overlay-ramdisk-pnynmw4u/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14064524/tftp-deploy-90s2nh3s/ramdisk/ramdisk.cpio.gz
229 14:50:31.039601 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
230 14:50:31.039785 start: 1.5.8 prepare-kernel (timeout 00:09:36) [common]
231 14:50:31.039940 start: 1.5.8.1 prepare-fit (timeout 00:09:36) [common]
232 14:50:31.040094 No mkimage arch provided, not using FIT.
233 14:50:31.040235 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
234 14:50:31.040387 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
235 14:50:31.040570 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
236 14:50:31.040716 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
237 14:50:31.040844 No LXC device requested
238 14:50:31.040965 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
239 14:50:31.041100 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
240 14:50:31.041218 end: 1.7 deploy-device-env (duration 00:00:00) [common]
241 14:50:31.041320 Checking files for TFTP limit of 4294967296 bytes.
242 14:50:31.041774 end: 1 tftp-deploy (duration 00:00:24) [common]
243 14:50:31.041918 start: 2 depthcharge-action (timeout 00:05:00) [common]
244 14:50:31.042053 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
245 14:50:31.042228 substitutions:
246 14:50:31.042299 - {DTB}: None
247 14:50:31.042362 - {INITRD}: 14064524/tftp-deploy-90s2nh3s/ramdisk/ramdisk.cpio.gz
248 14:50:31.042422 - {KERNEL}: 14064524/tftp-deploy-90s2nh3s/kernel/bzImage
249 14:50:31.042486 - {LAVA_MAC}: None
250 14:50:31.042549 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14064524/extract-nfsrootfs-z4i1gwo1
251 14:50:31.042610 - {NFS_SERVER_IP}: 192.168.201.1
252 14:50:31.042672 - {PRESEED_CONFIG}: None
253 14:50:31.042732 - {PRESEED_LOCAL}: None
254 14:50:31.042788 - {RAMDISK}: 14064524/tftp-deploy-90s2nh3s/ramdisk/ramdisk.cpio.gz
255 14:50:31.042842 - {ROOT_PART}: None
256 14:50:31.042896 - {ROOT}: None
257 14:50:31.042950 - {SERVER_IP}: 192.168.201.1
258 14:50:31.043003 - {TEE}: None
259 14:50:31.043063 Parsed boot commands:
260 14:50:31.043124 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
261 14:50:31.043318 Parsed boot commands: tftpboot 192.168.201.1 14064524/tftp-deploy-90s2nh3s/kernel/bzImage 14064524/tftp-deploy-90s2nh3s/kernel/cmdline 14064524/tftp-deploy-90s2nh3s/ramdisk/ramdisk.cpio.gz
262 14:50:31.043412 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
263 14:50:31.043502 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
264 14:50:31.043606 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
265 14:50:31.043702 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
266 14:50:31.043810 Not connected, no need to disconnect.
267 14:50:31.043889 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
268 14:50:31.043982 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
269 14:50:31.044088 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-8'
270 14:50:31.048003 Setting prompt string to ['lava-test: # ']
271 14:50:31.048430 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
272 14:50:31.048576 end: 2.2.1 reset-connection (duration 00:00:00) [common]
273 14:50:31.048712 start: 2.2.2 reset-device (timeout 00:05:00) [common]
274 14:50:31.048846 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
275 14:50:31.049143 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cp514-2h-1130g7-volteer-cbg-8']
276 14:50:39.717221 Returned 0 in 8 seconds
277 14:50:39.817891 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
279 14:50:39.818222 end: 2.2.2 reset-device (duration 00:00:09) [common]
280 14:50:39.818339 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
281 14:50:39.818464 Setting prompt string to 'Starting depthcharge on Voema...'
282 14:50:39.818576 Changing prompt to 'Starting depthcharge on Voema...'
283 14:50:39.818682 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
284 14:50:39.819397 [Enter `^Ec?' for help]
285 14:50:39.819572
286 14:50:39.819716
287 14:50:39.819822 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
288 14:50:39.819930 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
289 14:50:39.820027 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
290 14:50:39.820126 CPU: AES supported, TXT NOT supported, VT supported
291 14:50:39.820219 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
292 14:50:39.820314 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
293 14:50:39.820415 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
294 14:50:39.820505 VBOOT: Loading verstage.
295 14:50:39.820596 FMAP: Found "FLASH" version 1.1 at 0x1804000.
296 14:50:39.820684 FMAP: base = 0x0 size = 0x2000000 #areas = 32
297 14:50:39.820771 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 14:50:39.820864 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
299 14:50:39.820957 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
300 14:50:39.821047
301 14:50:39.821131
302 14:50:39.821218 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
303 14:50:39.821307 Probing TPM: . done!
304 14:50:39.821401 TPM ready after 0 ms
305 14:50:39.821488 Connected to device vid:did:rid of 1ae0:0028:00
306 14:50:39.821578 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
307 14:50:39.821668 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
308 14:50:39.821754 Initialized TPM device CR50 revision 0
309 14:50:39.821846 tlcl_send_startup: Startup return code is 0
310 14:50:39.821938 TPM: setup succeeded
311 14:50:39.822027 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
312 14:50:39.822114 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 14:50:39.822209 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
314 14:50:39.822301 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
315 14:50:39.822392 Chrome EC: UHEPI supported
316 14:50:39.822483 Phase 1
317 14:50:39.822573 FMAP: area GBB found @ 1805000 (458752 bytes)
318 14:50:39.822660 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
319 14:50:39.822747 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
320 14:50:39.822839 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
321 14:50:39.822931 VB2:vb2_check_recovery() Recovery was requested manually
322 14:50:39.823017 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7
323 14:50:39.823106 Recovery requested (1009000e)
324 14:50:39.823192 TPM: Extending digest for VBOOT: boot mode into PCR 0
325 14:50:39.823277 tlcl_extend: response is 0
326 14:50:39.823369 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
327 14:50:39.823461 tlcl_extend: response is 0
328 14:50:39.823550 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
329 14:50:39.823637 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
330 14:50:39.823724 BS: verstage times (exec / console): total (unknown) / 148 ms
331 14:50:39.823811
332 14:50:39.823898
333 14:50:39.823991 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
334 14:50:39.824081 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
335 14:50:39.824167 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
336 14:50:39.824254 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
337 14:50:39.824348 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
338 14:50:39.824435 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
339 14:50:39.824527 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
340 14:50:39.824615 TCO_STS: 0000 0000
341 14:50:39.824701 GEN_PMCON: d0015038 00002200
342 14:50:39.824789 GBLRST_CAUSE: 00000000 00000000
343 14:50:39.824877 HPR_CAUSE0: 00000000
344 14:50:39.824966 prev_sleep_state 5
345 14:50:39.825055 Boot Count incremented to 30323
346 14:50:39.825141 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
347 14:50:39.825228 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
348 14:50:39.825318 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
349 14:50:39.825407 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
350 14:50:39.825500 Chrome EC: UHEPI supported
351 14:50:39.825589 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
352 14:50:39.825674 Probing TPM: done!
353 14:50:39.825760 Connected to device vid:did:rid of 1ae0:0028:00
354 14:50:39.825852 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
355 14:50:39.825939 Initialized TPM device CR50 revision 0
356 14:50:39.826031 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
357 14:50:39.826120 MRC: Hash idx 0x100b comparison successful.
358 14:50:39.826200 MRC cache found, size faa8
359 14:50:39.826257 bootmode is set to: 2
360 14:50:39.826316 SPD index = 0
361 14:50:39.826395 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
362 14:50:39.826489 SPD: module type is LPDDR4X
363 14:50:39.826552 SPD: module part number is MT53E512M64D4NW-046
364 14:50:39.826609 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
365 14:50:39.826666 SPD: device width 16 bits, bus width 16 bits
366 14:50:39.826721 SPD: module size is 1024 MB (per channel)
367 14:50:39.826776 CBMEM:
368 14:50:39.826834 IMD: root @ 0x76fff000 254 entries.
369 14:50:39.826893 IMD: root @ 0x76ffec00 62 entries.
370 14:50:39.826953 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
371 14:50:39.827227 FMAP: area RW_VPD found @ f35000 (8192 bytes)
372 14:50:39.827370 External stage cache:
373 14:50:39.827513 IMD: root @ 0x7b3ff000 254 entries.
374 14:50:39.827650 IMD: root @ 0x7b3fec00 62 entries.
375 14:50:39.827786 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
376 14:50:39.827886 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
377 14:50:39.827949 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
378 14:50:39.828013 MRC: 'RECOVERY_MRC_CACHE' does not need update.
379 14:50:39.828071 cse_lite: Skip switching to RW in the recovery path
380 14:50:39.828129 8 DIMMs found
381 14:50:39.828189 SMM Memory Map
382 14:50:39.828244 SMRAM : 0x7b000000 0x800000
383 14:50:39.828299 Subregion 0: 0x7b000000 0x200000
384 14:50:39.828357 Subregion 1: 0x7b200000 0x200000
385 14:50:39.828415 Subregion 2: 0x7b400000 0x400000
386 14:50:39.828492 top_of_ram = 0x77000000
387 14:50:39.828550 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
388 14:50:39.828605 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
389 14:50:39.828663 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
390 14:50:39.828718 MTRR Range: Start=ff000000 End=0 (Size 1000000)
391 14:50:39.828773 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
392 14:50:39.828828 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
393 14:50:39.828886 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
394 14:50:39.828946 Processing 211 relocs. Offset value of 0x74c0b000
395 14:50:39.829007 BS: romstage times (exec / console): total (unknown) / 277 ms
396 14:50:39.829063
397 14:50:39.829117
398 14:50:39.829174 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
399 14:50:39.829230 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
400 14:50:39.829286 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
401 14:50:39.829341 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
402 14:50:39.829402 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
403 14:50:39.829458 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
404 14:50:39.829520 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
405 14:50:39.829576 Processing 5008 relocs. Offset value of 0x75d98000
406 14:50:39.829634 BS: postcar times (exec / console): total (unknown) / 59 ms
407 14:50:39.829689
408 14:50:39.829743
409 14:50:39.829798 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
410 14:50:39.829856 Normal boot
411 14:50:39.829917 FW_CONFIG value is 0x804c02
412 14:50:39.829972 PCI: 00:07.0 disabled by fw_config
413 14:50:39.830033 PCI: 00:07.1 disabled by fw_config
414 14:50:39.830088 PCI: 00:0d.2 disabled by fw_config
415 14:50:39.830145 PCI: 00:1c.7 disabled by fw_config
416 14:50:39.830212 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
417 14:50:39.830268 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
418 14:50:39.830323 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
419 14:50:39.830382 GENERIC: 0.0 disabled by fw_config
420 14:50:39.830440 GENERIC: 1.0 disabled by fw_config
421 14:50:39.830500 fw_config match found: DB_USB=USB3_ACTIVE
422 14:50:39.830556 fw_config match found: DB_USB=USB3_ACTIVE
423 14:50:39.830610 fw_config match found: DB_USB=USB3_ACTIVE
424 14:50:39.830669 fw_config match found: DB_USB=USB3_ACTIVE
425 14:50:39.830765 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
426 14:50:39.830860 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
427 14:50:39.830952 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
428 14:50:39.831060 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
429 14:50:39.831156 microcode: sig=0x806c1 pf=0x80 revision=0x86
430 14:50:39.831250 microcode: Update skipped, already up-to-date
431 14:50:39.831324 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
432 14:50:39.831388 Detected 4 core, 8 thread CPU.
433 14:50:39.831446 Setting up SMI for CPU
434 14:50:39.831510 IED base = 0x7b400000
435 14:50:39.831573 IED size = 0x00400000
436 14:50:39.831630 Will perform SMM setup.
437 14:50:39.831684 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
438 14:50:39.831740 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
439 14:50:39.831806 Processing 16 relocs. Offset value of 0x00030000
440 14:50:39.831909 Attempting to start 7 APs
441 14:50:39.832002 Waiting for 10ms after sending INIT.
442 14:50:39.832102 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
443 14:50:39.832187 done.
444 14:50:39.832248 AP: slot 5 apic_id 6.
445 14:50:39.832310 AP: slot 4 apic_id 7.
446 14:50:39.832384 AP: slot 3 apic_id 5.
447 14:50:39.832454 AP: slot 7 apic_id 4.
448 14:50:39.832518 AP: slot 2 apic_id 3.
449 14:50:39.832582 Waiting for 2nd SIPI to complete...done.
450 14:50:39.832639 AP: slot 6 apic_id 2.
451 14:50:39.832694 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
452 14:50:39.832750 Processing 13 relocs. Offset value of 0x00038000
453 14:50:39.832808 Unable to locate Global NVS
454 14:50:39.832867 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
455 14:50:39.832923 Installing permanent SMM handler to 0x7b000000
456 14:50:39.832979 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
457 14:50:39.833047 Processing 794 relocs. Offset value of 0x7b010000
458 14:50:39.833338 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
459 14:50:39.833429 Processing 13 relocs. Offset value of 0x7b008000
460 14:50:39.833500 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
461 14:50:39.833564 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
462 14:50:39.833622 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
463 14:50:39.833679 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
464 14:50:39.833736 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
465 14:50:39.833792 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
466 14:50:39.833853 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
467 14:50:39.833909 Unable to locate Global NVS
468 14:50:39.833964 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
469 14:50:39.834027 Clearing SMI status registers
470 14:50:39.834088 SMI_STS: PM1
471 14:50:39.834145 PM1_STS: PWRBTN
472 14:50:39.834250 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
473 14:50:39.834346 In relocation handler: CPU 0
474 14:50:39.834438 New SMBASE=0x7b000000 IEDBASE=0x7b400000
475 14:50:39.834544 Writing SMRR. base = 0x7b000006, mask=0xff800c00
476 14:50:39.834643 Relocation complete.
477 14:50:39.834736 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
478 14:50:39.834809 In relocation handler: CPU 1
479 14:50:39.834913 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
480 14:50:39.835015 Relocation complete.
481 14:50:39.835111 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
482 14:50:39.835177 In relocation handler: CPU 2
483 14:50:39.835236 New SMBASE=0x7afff800 IEDBASE=0x7b400000
484 14:50:39.835294 Relocation complete.
485 14:50:39.835354 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
486 14:50:39.835438 In relocation handler: CPU 7
487 14:50:39.835542 New SMBASE=0x7affe400 IEDBASE=0x7b400000
488 14:50:39.835646 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 14:50:39.835709 Relocation complete.
490 14:50:39.835768 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
491 14:50:39.835828 In relocation handler: CPU 3
492 14:50:39.835889 New SMBASE=0x7afff400 IEDBASE=0x7b400000
493 14:50:39.835946 Relocation complete.
494 14:50:39.836007 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
495 14:50:39.836068 In relocation handler: CPU 6
496 14:50:39.836124 New SMBASE=0x7affe800 IEDBASE=0x7b400000
497 14:50:39.836180 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 14:50:39.836235 Relocation complete.
499 14:50:39.836319 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
500 14:50:39.836412 In relocation handler: CPU 4
501 14:50:39.836474 New SMBASE=0x7afff000 IEDBASE=0x7b400000
502 14:50:39.836543 Relocation complete.
503 14:50:39.836601 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
504 14:50:39.836657 In relocation handler: CPU 5
505 14:50:39.836723 New SMBASE=0x7affec00 IEDBASE=0x7b400000
506 14:50:39.836818 Writing SMRR. base = 0x7b000006, mask=0xff800c00
507 14:50:39.836918 Relocation complete.
508 14:50:39.837013 Initializing CPU #0
509 14:50:39.837108 CPU: vendor Intel device 806c1
510 14:50:39.837195 CPU: family 06, model 8c, stepping 01
511 14:50:39.837259 Clearing out pending MCEs
512 14:50:39.837319 Setting up local APIC...
513 14:50:39.837380 apic_id: 0x00 done.
514 14:50:39.837437 Turbo is available but hidden
515 14:50:39.837493 Turbo is available and visible
516 14:50:39.837560 microcode: Update skipped, already up-to-date
517 14:50:39.837617 CPU #0 initialized
518 14:50:39.837672 Initializing CPU #6
519 14:50:39.837728 Initializing CPU #2
520 14:50:39.837784 CPU: vendor Intel device 806c1
521 14:50:39.837842 CPU: family 06, model 8c, stepping 01
522 14:50:39.837935 CPU: vendor Intel device 806c1
523 14:50:39.838028 CPU: family 06, model 8c, stepping 01
524 14:50:39.838123 Clearing out pending MCEs
525 14:50:39.838228 Initializing CPU #4
526 14:50:39.838319 Initializing CPU #7
527 14:50:39.838415 Initializing CPU #3
528 14:50:39.838478 CPU: vendor Intel device 806c1
529 14:50:39.838543 CPU: family 06, model 8c, stepping 01
530 14:50:39.838601 CPU: vendor Intel device 806c1
531 14:50:39.838660 CPU: family 06, model 8c, stepping 01
532 14:50:39.838743 Clearing out pending MCEs
533 14:50:39.838830 Clearing out pending MCEs
534 14:50:39.838924 Setting up local APIC...
535 14:50:39.839016 CPU: vendor Intel device 806c1
536 14:50:39.839085 CPU: family 06, model 8c, stepping 01
537 14:50:39.839143 Initializing CPU #1
538 14:50:39.839203 Clearing out pending MCEs
539 14:50:39.839259 Setting up local APIC...
540 14:50:39.839315 CPU: vendor Intel device 806c1
541 14:50:39.839370 CPU: family 06, model 8c, stepping 01
542 14:50:39.839429 Setting up local APIC...
543 14:50:39.839486 Initializing CPU #5
544 14:50:39.839547 Clearing out pending MCEs
545 14:50:39.839603 CPU: vendor Intel device 806c1
546 14:50:39.839661 CPU: family 06, model 8c, stepping 01
547 14:50:39.839715 Setting up local APIC...
548 14:50:39.839770 apic_id: 0x02 done.
549 14:50:39.839825 Setting up local APIC...
550 14:50:39.839902 apic_id: 0x07 done.
551 14:50:39.839995 Clearing out pending MCEs
552 14:50:39.840092 microcode: Update skipped, already up-to-date
553 14:50:39.840183 Setting up local APIC...
554 14:50:39.840245 apic_id: 0x05 done.
555 14:50:39.840302 apic_id: 0x04 done.
556 14:50:39.840358 microcode: Update skipped, already up-to-date
557 14:50:39.840418 microcode: Update skipped, already up-to-date
558 14:50:39.840476 CPU #3 initialized
559 14:50:39.840561 CPU #7 initialized
560 14:50:39.840652 microcode: Update skipped, already up-to-date
561 14:50:39.840741 apic_id: 0x03 done.
562 14:50:39.840836 CPU #6 initialized
563 14:50:39.840931 microcode: Update skipped, already up-to-date
564 14:50:39.841025 Clearing out pending MCEs
565 14:50:39.841124 apic_id: 0x06 done.
566 14:50:39.841187 CPU #4 initialized
567 14:50:39.841245 microcode: Update skipped, already up-to-date
568 14:50:39.841302 CPU #2 initialized
569 14:50:39.841362 CPU #5 initialized
570 14:50:39.841418 Setting up local APIC...
571 14:50:39.841476 apic_id: 0x01 done.
572 14:50:39.841758 microcode: Update skipped, already up-to-date
573 14:50:39.841853 CPU #1 initialized
574 14:50:39.841950 bsp_do_flight_plan done after 457 msecs.
575 14:50:39.842050 CPU: frequency set to 4000 MHz
576 14:50:39.842145 Enabling SMIs.
577 14:50:39.842221 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
578 14:50:39.842280 SATAXPCIE1 indicates PCIe NVMe is present
579 14:50:39.842355 Probing TPM: done!
580 14:50:39.842449 Connected to device vid:did:rid of 1ae0:0028:00
581 14:50:39.842552 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
582 14:50:39.842650 Initialized TPM device CR50 revision 0
583 14:50:39.842718 Enabling S0i3.4
584 14:50:39.842777 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
585 14:50:39.842835 Found a VBT of 8704 bytes after decompression
586 14:50:39.842893 cse_lite: CSE RO boot. HybridStorageMode disabled
587 14:50:39.842954 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
588 14:50:39.843013 FSPS returned 0
589 14:50:39.843100 Executing Phase 1 of FspMultiPhaseSiInit
590 14:50:39.843192 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
591 14:50:39.843283 port C0 DISC req: usage 1 usb3 1 usb2 5
592 14:50:39.843372 Raw Buffer output 0 00000511
593 14:50:39.843437 Raw Buffer output 1 00000000
594 14:50:39.843497 pmc_send_ipc_cmd succeeded
595 14:50:39.843555 port C1 DISC req: usage 1 usb3 2 usb2 3
596 14:50:39.843625 Raw Buffer output 0 00000321
597 14:50:39.843720 Raw Buffer output 1 00000000
598 14:50:39.843812 pmc_send_ipc_cmd succeeded
599 14:50:39.843898 Detected 4 core, 8 thread CPU.
600 14:50:39.843974 Detected 4 core, 8 thread CPU.
601 14:50:39.844035 Display FSP Version Info HOB
602 14:50:39.844099 Reference Code - CPU = a.0.4c.31
603 14:50:39.844155 uCode Version = 0.0.0.86
604 14:50:39.844229 TXT ACM version = ff.ff.ff.ffff
605 14:50:39.844314 Reference Code - ME = a.0.4c.31
606 14:50:39.844402 MEBx version = 0.0.0.0
607 14:50:39.844497 ME Firmware Version = Consumer SKU
608 14:50:39.844591 Reference Code - PCH = a.0.4c.31
609 14:50:39.844654 PCH-CRID Status = Disabled
610 14:50:39.844712 PCH-CRID Original Value = ff.ff.ff.ffff
611 14:50:39.844772 PCH-CRID New Value = ff.ff.ff.ffff
612 14:50:39.844828 OPROM - RST - RAID = ff.ff.ff.ffff
613 14:50:39.844884 PCH Hsio Version = 4.0.0.0
614 14:50:39.844974 Reference Code - SA - System Agent = a.0.4c.31
615 14:50:39.845065 Reference Code - MRC = 2.0.0.1
616 14:50:39.845161 SA - PCIe Version = a.0.4c.31
617 14:50:39.845249 SA-CRID Status = Disabled
618 14:50:39.845310 SA-CRID Original Value = 0.0.0.1
619 14:50:39.845369 SA-CRID New Value = 0.0.0.1
620 14:50:39.845426 OPROM - VBIOS = ff.ff.ff.ffff
621 14:50:39.845485 IO Manageability Engine FW Version = 11.1.4.0
622 14:50:39.845544 PHY Build Version = 0.0.0.e0
623 14:50:39.845627 Thunderbolt(TM) FW Version = 0.0.0.0
624 14:50:39.845719 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
625 14:50:39.845819 ITSS IRQ Polarities Before:
626 14:50:39.845914 IPC0: 0xffffffff
627 14:50:39.846006 IPC1: 0xffffffff
628 14:50:39.846110 IPC2: 0xffffffff
629 14:50:39.846214 IPC3: 0xffffffff
630 14:50:39.846307 ITSS IRQ Polarities After:
631 14:50:39.846374 IPC0: 0xffffffff
632 14:50:39.846433 IPC1: 0xffffffff
633 14:50:39.846493 IPC2: 0xffffffff
634 14:50:39.846549 IPC3: 0xffffffff
635 14:50:39.846612 Found PCIe Root Port #9 at PCI: 00:1d.0.
636 14:50:39.846672 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
637 14:50:39.846731 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
638 14:50:39.846787 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
639 14:50:39.846844 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
640 14:50:39.846921 Enumerating buses...
641 14:50:39.847013 Show all devs... Before device enumeration.
642 14:50:39.847111 Root Device: enabled 1
643 14:50:39.847204 DOMAIN: 0000: enabled 1
644 14:50:39.847266 CPU_CLUSTER: 0: enabled 1
645 14:50:39.847323 PCI: 00:00.0: enabled 1
646 14:50:39.847381 PCI: 00:02.0: enabled 1
647 14:50:39.847440 PCI: 00:04.0: enabled 1
648 14:50:39.847497 PCI: 00:05.0: enabled 1
649 14:50:39.847579 PCI: 00:06.0: enabled 0
650 14:50:39.847673 PCI: 00:07.0: enabled 0
651 14:50:39.847761 PCI: 00:07.1: enabled 0
652 14:50:39.847847 PCI: 00:07.2: enabled 0
653 14:50:39.847934 PCI: 00:07.3: enabled 0
654 14:50:39.847993 PCI: 00:08.0: enabled 1
655 14:50:39.848054 PCI: 00:09.0: enabled 0
656 14:50:39.848118 PCI: 00:0a.0: enabled 0
657 14:50:39.848177 PCI: 00:0d.0: enabled 1
658 14:50:39.848232 PCI: 00:0d.1: enabled 0
659 14:50:39.848287 PCI: 00:0d.2: enabled 0
660 14:50:39.848381 PCI: 00:0d.3: enabled 0
661 14:50:39.848469 PCI: 00:0e.0: enabled 0
662 14:50:39.848559 PCI: 00:10.2: enabled 1
663 14:50:39.848661 PCI: 00:10.6: enabled 0
664 14:50:39.848750 PCI: 00:10.7: enabled 0
665 14:50:39.848840 PCI: 00:12.0: enabled 0
666 14:50:39.848926 PCI: 00:12.6: enabled 0
667 14:50:39.849017 PCI: 00:13.0: enabled 0
668 14:50:39.849115 PCI: 00:14.0: enabled 1
669 14:50:39.849203 PCI: 00:14.1: enabled 0
670 14:50:39.849284 PCI: 00:14.2: enabled 1
671 14:50:39.849347 PCI: 00:14.3: enabled 1
672 14:50:39.849404 PCI: 00:15.0: enabled 1
673 14:50:39.849460 PCI: 00:15.1: enabled 1
674 14:50:39.849515 PCI: 00:15.2: enabled 1
675 14:50:39.849572 PCI: 00:15.3: enabled 1
676 14:50:39.849666 PCI: 00:16.0: enabled 1
677 14:50:39.849754 PCI: 00:16.1: enabled 0
678 14:50:39.849842 PCI: 00:16.2: enabled 0
679 14:50:39.849938 PCI: 00:16.3: enabled 0
680 14:50:39.850028 PCI: 00:16.4: enabled 0
681 14:50:39.850129 PCI: 00:16.5: enabled 0
682 14:50:39.850226 PCI: 00:17.0: enabled 1
683 14:50:39.850288 PCI: 00:19.0: enabled 0
684 14:50:39.850348 PCI: 00:19.1: enabled 1
685 14:50:39.850405 PCI: 00:19.2: enabled 0
686 14:50:39.850461 PCI: 00:1c.0: enabled 1
687 14:50:39.850519 PCI: 00:1c.1: enabled 0
688 14:50:39.850578 PCI: 00:1c.2: enabled 0
689 14:50:39.850641 PCI: 00:1c.3: enabled 0
690 14:50:39.850696 PCI: 00:1c.4: enabled 0
691 14:50:39.850750 PCI: 00:1c.5: enabled 0
692 14:50:39.850804 PCI: 00:1c.6: enabled 1
693 14:50:39.850875 PCI: 00:1c.7: enabled 0
694 14:50:39.850934 PCI: 00:1d.0: enabled 1
695 14:50:39.850988 PCI: 00:1d.1: enabled 0
696 14:50:39.851241 PCI: 00:1d.2: enabled 1
697 14:50:39.851303 PCI: 00:1d.3: enabled 0
698 14:50:39.851362 PCI: 00:1e.0: enabled 1
699 14:50:39.851418 PCI: 00:1e.1: enabled 0
700 14:50:39.851473 PCI: 00:1e.2: enabled 1
701 14:50:39.851527 PCI: 00:1e.3: enabled 1
702 14:50:39.851582 PCI: 00:1f.0: enabled 1
703 14:50:39.851678 PCI: 00:1f.1: enabled 0
704 14:50:39.851766 PCI: 00:1f.2: enabled 1
705 14:50:39.851854 PCI: 00:1f.3: enabled 1
706 14:50:39.851951 PCI: 00:1f.4: enabled 0
707 14:50:39.852048 PCI: 00:1f.5: enabled 1
708 14:50:39.852152 PCI: 00:1f.6: enabled 0
709 14:50:39.852249 PCI: 00:1f.7: enabled 0
710 14:50:39.852342 APIC: 00: enabled 1
711 14:50:39.852439 GENERIC: 0.0: enabled 1
712 14:50:39.852533 GENERIC: 0.0: enabled 1
713 14:50:39.852633 GENERIC: 1.0: enabled 1
714 14:50:39.852700 GENERIC: 0.0: enabled 1
715 14:50:39.852760 GENERIC: 1.0: enabled 1
716 14:50:39.852817 USB0 port 0: enabled 1
717 14:50:39.852873 GENERIC: 0.0: enabled 1
718 14:50:39.852931 USB0 port 0: enabled 1
719 14:50:39.852987 GENERIC: 0.0: enabled 1
720 14:50:39.853042 I2C: 00:1a: enabled 1
721 14:50:39.853103 I2C: 00:31: enabled 1
722 14:50:39.853161 I2C: 00:32: enabled 1
723 14:50:39.853219 I2C: 00:10: enabled 1
724 14:50:39.853273 I2C: 00:15: enabled 1
725 14:50:39.853328 GENERIC: 0.0: enabled 0
726 14:50:39.853382 GENERIC: 1.0: enabled 0
727 14:50:39.853440 GENERIC: 0.0: enabled 1
728 14:50:39.853494 SPI: 00: enabled 1
729 14:50:39.853581 SPI: 00: enabled 1
730 14:50:39.853684 PNP: 0c09.0: enabled 1
731 14:50:39.853775 GENERIC: 0.0: enabled 1
732 14:50:39.853854 USB3 port 0: enabled 1
733 14:50:39.853917 USB3 port 1: enabled 1
734 14:50:39.853975 USB3 port 2: enabled 0
735 14:50:39.854031 USB3 port 3: enabled 0
736 14:50:39.854087 USB2 port 0: enabled 0
737 14:50:39.854191 USB2 port 1: enabled 1
738 14:50:39.854254 USB2 port 2: enabled 1
739 14:50:39.854335 USB2 port 3: enabled 0
740 14:50:39.854427 USB2 port 4: enabled 1
741 14:50:39.854514 USB2 port 5: enabled 0
742 14:50:39.854611 USB2 port 6: enabled 0
743 14:50:39.854708 USB2 port 7: enabled 0
744 14:50:39.854800 USB2 port 8: enabled 0
745 14:50:39.854890 USB2 port 9: enabled 0
746 14:50:39.854988 USB3 port 0: enabled 0
747 14:50:39.855079 USB3 port 1: enabled 1
748 14:50:39.855180 USB3 port 2: enabled 0
749 14:50:39.855264 USB3 port 3: enabled 0
750 14:50:39.855324 GENERIC: 0.0: enabled 1
751 14:50:39.855381 GENERIC: 1.0: enabled 1
752 14:50:39.855441 APIC: 01: enabled 1
753 14:50:39.855497 APIC: 03: enabled 1
754 14:50:39.855553 APIC: 05: enabled 1
755 14:50:39.855637 APIC: 07: enabled 1
756 14:50:39.855727 APIC: 06: enabled 1
757 14:50:39.855819 APIC: 02: enabled 1
758 14:50:39.855915 APIC: 04: enabled 1
759 14:50:39.856007 Compare with tree...
760 14:50:39.856099 Root Device: enabled 1
761 14:50:39.856198 DOMAIN: 0000: enabled 1
762 14:50:39.856260 PCI: 00:00.0: enabled 1
763 14:50:39.856321 PCI: 00:02.0: enabled 1
764 14:50:39.856378 PCI: 00:04.0: enabled 1
765 14:50:39.856439 GENERIC: 0.0: enabled 1
766 14:50:39.856496 PCI: 00:05.0: enabled 1
767 14:50:39.856551 PCI: 00:06.0: enabled 0
768 14:50:39.856606 PCI: 00:07.0: enabled 0
769 14:50:39.856671 GENERIC: 0.0: enabled 1
770 14:50:39.856726 PCI: 00:07.1: enabled 0
771 14:50:39.856780 GENERIC: 1.0: enabled 1
772 14:50:39.856837 PCI: 00:07.2: enabled 0
773 14:50:39.856891 GENERIC: 0.0: enabled 1
774 14:50:39.856949 PCI: 00:07.3: enabled 0
775 14:50:39.857026 GENERIC: 1.0: enabled 1
776 14:50:39.857118 PCI: 00:08.0: enabled 1
777 14:50:39.857212 PCI: 00:09.0: enabled 0
778 14:50:39.857299 PCI: 00:0a.0: enabled 0
779 14:50:39.857363 PCI: 00:0d.0: enabled 1
780 14:50:39.857424 USB0 port 0: enabled 1
781 14:50:39.857480 USB3 port 0: enabled 1
782 14:50:39.857556 USB3 port 1: enabled 1
783 14:50:39.857621 USB3 port 2: enabled 0
784 14:50:39.857719 USB3 port 3: enabled 0
785 14:50:39.857810 PCI: 00:0d.1: enabled 0
786 14:50:39.857899 PCI: 00:0d.2: enabled 0
787 14:50:39.857998 GENERIC: 0.0: enabled 1
788 14:50:39.858087 PCI: 00:0d.3: enabled 0
789 14:50:39.858186 PCI: 00:0e.0: enabled 0
790 14:50:39.858268 PCI: 00:10.2: enabled 1
791 14:50:39.858357 PCI: 00:10.6: enabled 0
792 14:50:39.858453 PCI: 00:10.7: enabled 0
793 14:50:39.858541 PCI: 00:12.0: enabled 0
794 14:50:39.858608 PCI: 00:12.6: enabled 0
795 14:50:39.858673 PCI: 00:13.0: enabled 0
796 14:50:39.858730 PCI: 00:14.0: enabled 1
797 14:50:39.858786 USB0 port 0: enabled 1
798 14:50:39.858841 USB2 port 0: enabled 0
799 14:50:39.858923 USB2 port 1: enabled 1
800 14:50:39.859014 USB2 port 2: enabled 1
801 14:50:39.859108 USB2 port 3: enabled 0
802 14:50:39.859198 USB2 port 4: enabled 1
803 14:50:39.859258 USB2 port 5: enabled 0
804 14:50:39.859316 USB2 port 6: enabled 0
805 14:50:39.859371 USB2 port 7: enabled 0
806 14:50:39.859430 USB2 port 8: enabled 0
807 14:50:39.859488 USB2 port 9: enabled 0
808 14:50:39.859543 USB3 port 0: enabled 0
809 14:50:39.859608 USB3 port 1: enabled 1
810 14:50:39.859706 USB3 port 2: enabled 0
811 14:50:39.859803 USB3 port 3: enabled 0
812 14:50:39.859893 PCI: 00:14.1: enabled 0
813 14:50:39.859985 PCI: 00:14.2: enabled 1
814 14:50:39.860070 PCI: 00:14.3: enabled 1
815 14:50:39.860137 GENERIC: 0.0: enabled 1
816 14:50:39.860199 PCI: 00:15.0: enabled 1
817 14:50:39.860256 I2C: 00:1a: enabled 1
818 14:50:39.860310 I2C: 00:31: enabled 1
819 14:50:39.860366 I2C: 00:32: enabled 1
820 14:50:39.860421 PCI: 00:15.1: enabled 1
821 14:50:39.860479 I2C: 00:10: enabled 1
822 14:50:39.860536 PCI: 00:15.2: enabled 1
823 14:50:39.860591 PCI: 00:15.3: enabled 1
824 14:50:39.860651 PCI: 00:16.0: enabled 1
825 14:50:39.860705 PCI: 00:16.1: enabled 0
826 14:50:39.860766 PCI: 00:16.2: enabled 0
827 14:50:39.860858 PCI: 00:16.3: enabled 0
828 14:50:39.860960 PCI: 00:16.4: enabled 0
829 14:50:39.861051 PCI: 00:16.5: enabled 0
830 14:50:39.861155 PCI: 00:17.0: enabled 1
831 14:50:39.861247 PCI: 00:19.0: enabled 0
832 14:50:39.861333 PCI: 00:19.1: enabled 1
833 14:50:39.861419 I2C: 00:15: enabled 1
834 14:50:39.861511 PCI: 00:19.2: enabled 0
835 14:50:39.861601 PCI: 00:1d.0: enabled 1
836 14:50:39.861698 GENERIC: 0.0: enabled 1
837 14:50:39.861787 PCI: 00:1e.0: enabled 1
838 14:50:39.861873 PCI: 00:1e.1: enabled 0
839 14:50:39.861938 PCI: 00:1e.2: enabled 1
840 14:50:39.861995 SPI: 00: enabled 1
841 14:50:39.862054 PCI: 00:1e.3: enabled 1
842 14:50:39.862116 SPI: 00: enabled 1
843 14:50:39.862183 PCI: 00:1f.0: enabled 1
844 14:50:39.862240 PNP: 0c09.0: enabled 1
845 14:50:39.862296 PCI: 00:1f.1: enabled 0
846 14:50:39.862351 PCI: 00:1f.2: enabled 1
847 14:50:39.862405 GENERIC: 0.0: enabled 1
848 14:50:39.862462 GENERIC: 0.0: enabled 1
849 14:50:39.862521 GENERIC: 1.0: enabled 1
850 14:50:39.862576 PCI: 00:1f.3: enabled 1
851 14:50:39.862637 PCI: 00:1f.4: enabled 0
852 14:50:39.862694 PCI: 00:1f.5: enabled 1
853 14:50:39.862762 PCI: 00:1f.6: enabled 0
854 14:50:39.863062 PCI: 00:1f.7: enabled 0
855 14:50:39.863148 CPU_CLUSTER: 0: enabled 1
856 14:50:39.863211 APIC: 00: enabled 1
857 14:50:39.863270 APIC: 01: enabled 1
858 14:50:39.863331 APIC: 03: enabled 1
859 14:50:39.863388 APIC: 05: enabled 1
860 14:50:39.863443 APIC: 07: enabled 1
861 14:50:39.863525 APIC: 06: enabled 1
862 14:50:39.863619 APIC: 02: enabled 1
863 14:50:39.863711 APIC: 04: enabled 1
864 14:50:39.863803 Root Device scanning...
865 14:50:39.863897 scan_static_bus for Root Device
866 14:50:39.863990 DOMAIN: 0000 enabled
867 14:50:39.864089 CPU_CLUSTER: 0 enabled
868 14:50:39.864176 DOMAIN: 0000 scanning...
869 14:50:39.864238 PCI: pci_scan_bus for bus 00
870 14:50:39.864297 PCI: 00:00.0 [8086/0000] ops
871 14:50:39.864354 PCI: 00:00.0 [8086/9a12] enabled
872 14:50:39.864412 PCI: 00:02.0 [8086/0000] bus ops
873 14:50:39.864472 PCI: 00:02.0 [8086/9a40] enabled
874 14:50:39.864531 PCI: 00:04.0 [8086/0000] bus ops
875 14:50:39.864586 PCI: 00:04.0 [8086/9a03] enabled
876 14:50:39.864649 PCI: 00:05.0 [8086/9a19] enabled
877 14:50:39.864708 PCI: 00:07.0 [0000/0000] hidden
878 14:50:39.864763 PCI: 00:08.0 [8086/9a11] enabled
879 14:50:39.864857 PCI: 00:0a.0 [8086/9a0d] disabled
880 14:50:39.864945 PCI: 00:0d.0 [8086/0000] bus ops
881 14:50:39.865042 PCI: 00:0d.0 [8086/9a13] enabled
882 14:50:39.865143 PCI: 00:14.0 [8086/0000] bus ops
883 14:50:39.865236 PCI: 00:14.0 [8086/a0ed] enabled
884 14:50:39.865324 PCI: 00:14.2 [8086/a0ef] enabled
885 14:50:39.865413 PCI: 00:14.3 [8086/0000] bus ops
886 14:50:39.865508 PCI: 00:14.3 [8086/a0f0] enabled
887 14:50:39.865604 PCI: 00:15.0 [8086/0000] bus ops
888 14:50:39.865699 PCI: 00:15.0 [8086/a0e8] enabled
889 14:50:39.865767 PCI: 00:15.1 [8086/0000] bus ops
890 14:50:39.865830 PCI: 00:15.1 [8086/a0e9] enabled
891 14:50:39.865886 PCI: 00:15.2 [8086/0000] bus ops
892 14:50:39.865942 PCI: 00:15.2 [8086/a0ea] enabled
893 14:50:39.865997 PCI: 00:15.3 [8086/0000] bus ops
894 14:50:39.866055 PCI: 00:15.3 [8086/a0eb] enabled
895 14:50:39.866113 PCI: 00:16.0 [8086/0000] ops
896 14:50:39.866183 PCI: 00:16.0 [8086/a0e0] enabled
897 14:50:39.866242 PCI: Static device PCI: 00:17.0 not found, disabling it.
898 14:50:39.866297 PCI: 00:19.0 [8086/0000] bus ops
899 14:50:39.866356 PCI: 00:19.0 [8086/a0c5] disabled
900 14:50:39.866411 PCI: 00:19.1 [8086/0000] bus ops
901 14:50:39.866465 PCI: 00:19.1 [8086/a0c6] enabled
902 14:50:39.866520 PCI: 00:1d.0 [8086/0000] bus ops
903 14:50:39.866577 PCI: 00:1d.0 [8086/a0b0] enabled
904 14:50:39.866634 PCI: 00:1e.0 [8086/0000] ops
905 14:50:39.866689 PCI: 00:1e.0 [8086/a0a8] enabled
906 14:50:39.866771 PCI: 00:1e.2 [8086/0000] bus ops
907 14:50:39.866860 PCI: 00:1e.2 [8086/a0aa] enabled
908 14:50:39.866960 PCI: 00:1e.3 [8086/0000] bus ops
909 14:50:39.867056 PCI: 00:1e.3 [8086/a0ab] enabled
910 14:50:39.867143 PCI: 00:1f.0 [8086/0000] bus ops
911 14:50:39.867218 PCI: 00:1f.0 [8086/a087] enabled
912 14:50:39.867291 RTC Init
913 14:50:39.867358 Set power on after power failure.
914 14:50:39.867443 Disabling Deep S3
915 14:50:39.867537 Disabling Deep S3
916 14:50:39.867626 Disabling Deep S4
917 14:50:39.867717 Disabling Deep S4
918 14:50:39.867785 Disabling Deep S5
919 14:50:39.867844 Disabling Deep S5
920 14:50:39.867902 PCI: 00:1f.2 [0000/0000] hidden
921 14:50:39.867962 PCI: 00:1f.3 [8086/0000] bus ops
922 14:50:39.868018 PCI: 00:1f.3 [8086/a0c8] enabled
923 14:50:39.868108 PCI: 00:1f.5 [8086/0000] bus ops
924 14:50:39.868199 PCI: 00:1f.5 [8086/a0a4] enabled
925 14:50:39.868296 PCI: Leftover static devices:
926 14:50:39.868380 PCI: 00:10.2
927 14:50:39.868440 PCI: 00:10.6
928 14:50:39.868500 PCI: 00:10.7
929 14:50:39.868559 PCI: 00:06.0
930 14:50:39.868614 PCI: 00:07.1
931 14:50:39.868669 PCI: 00:07.2
932 14:50:39.868723 PCI: 00:07.3
933 14:50:39.868784 PCI: 00:09.0
934 14:50:39.868842 PCI: 00:0d.1
935 14:50:39.868897 PCI: 00:0d.2
936 14:50:39.868951 PCI: 00:0d.3
937 14:50:39.869008 PCI: 00:0e.0
938 14:50:39.869066 PCI: 00:12.0
939 14:50:39.869121 PCI: 00:12.6
940 14:50:39.869175 PCI: 00:13.0
941 14:50:39.869236 PCI: 00:14.1
942 14:50:39.869294 PCI: 00:16.1
943 14:50:39.869354 PCI: 00:16.2
944 14:50:39.869444 PCI: 00:16.3
945 14:50:39.869536 PCI: 00:16.4
946 14:50:39.869625 PCI: 00:16.5
947 14:50:39.869702 PCI: 00:17.0
948 14:50:39.869765 PCI: 00:19.2
949 14:50:39.869824 PCI: 00:1e.1
950 14:50:39.869882 PCI: 00:1f.1
951 14:50:39.869949 PCI: 00:1f.4
952 14:50:39.870036 PCI: 00:1f.6
953 14:50:39.870130 PCI: 00:1f.7
954 14:50:39.870238 PCI: Check your devicetree.cb.
955 14:50:39.870339 PCI: 00:02.0 scanning...
956 14:50:39.870437 scan_generic_bus for PCI: 00:02.0
957 14:50:39.870529 scan_generic_bus for PCI: 00:02.0 done
958 14:50:39.870597 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
959 14:50:39.870697 PCI: 00:04.0 scanning...
960 14:50:39.870791 scan_generic_bus for PCI: 00:04.0
961 14:50:39.870886 GENERIC: 0.0 enabled
962 14:50:39.870963 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
963 14:50:39.871023 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
964 14:50:39.871084 PCI: 00:0d.0 scanning...
965 14:50:39.871145 scan_static_bus for PCI: 00:0d.0
966 14:50:39.871202 USB0 port 0 enabled
967 14:50:39.871257 USB0 port 0 scanning...
968 14:50:39.871346 scan_static_bus for USB0 port 0
969 14:50:39.871444 USB3 port 0 enabled
970 14:50:39.871532 USB3 port 1 enabled
971 14:50:39.871615 USB3 port 2 disabled
972 14:50:39.871678 USB3 port 3 disabled
973 14:50:39.871734 USB3 port 0 scanning...
974 14:50:39.871791 scan_static_bus for USB3 port 0
975 14:50:39.871847 scan_static_bus for USB3 port 0 done
976 14:50:39.871941 scan_bus: bus USB3 port 0 finished in 6 msecs
977 14:50:39.872030 USB3 port 1 scanning...
978 14:50:39.872122 scan_static_bus for USB3 port 1
979 14:50:39.872209 scan_static_bus for USB3 port 1 done
980 14:50:39.872269 scan_bus: bus USB3 port 1 finished in 6 msecs
981 14:50:39.872327 scan_static_bus for USB0 port 0 done
982 14:50:39.872385 scan_bus: bus USB0 port 0 finished in 43 msecs
983 14:50:39.872441 scan_static_bus for PCI: 00:0d.0 done
984 14:50:39.872516 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
985 14:50:39.872609 PCI: 00:14.0 scanning...
986 14:50:39.872704 scan_static_bus for PCI: 00:14.0
987 14:50:39.872792 USB0 port 0 enabled
988 14:50:39.872889 USB0 port 0 scanning...
989 14:50:39.872982 scan_static_bus for USB0 port 0
990 14:50:39.873073 USB2 port 0 disabled
991 14:50:39.873162 USB2 port 1 enabled
992 14:50:39.873247 USB2 port 2 enabled
993 14:50:39.873331 USB2 port 3 disabled
994 14:50:39.873421 USB2 port 4 enabled
995 14:50:39.873512 USB2 port 5 disabled
996 14:50:39.873600 USB2 port 6 disabled
997 14:50:39.873688 USB2 port 7 disabled
998 14:50:39.873772 USB2 port 8 disabled
999 14:50:39.873856 USB2 port 9 disabled
1000 14:50:39.873943 USB3 port 0 disabled
1001 14:50:39.874033 USB3 port 1 enabled
1002 14:50:39.874123 USB3 port 2 disabled
1003 14:50:39.874202 USB3 port 3 disabled
1004 14:50:39.874456 USB2 port 1 scanning...
1005 14:50:39.874545 scan_static_bus for USB2 port 1
1006 14:50:39.874648 scan_static_bus for USB2 port 1 done
1007 14:50:39.874740 scan_bus: bus USB2 port 1 finished in 6 msecs
1008 14:50:39.874836 USB2 port 2 scanning...
1009 14:50:39.874929 scan_static_bus for USB2 port 2
1010 14:50:39.874992 scan_static_bus for USB2 port 2 done
1011 14:50:39.875055 scan_bus: bus USB2 port 2 finished in 6 msecs
1012 14:50:39.875117 USB2 port 4 scanning...
1013 14:50:39.875210 scan_static_bus for USB2 port 4
1014 14:50:39.875302 scan_static_bus for USB2 port 4 done
1015 14:50:39.875389 scan_bus: bus USB2 port 4 finished in 6 msecs
1016 14:50:39.875471 USB3 port 1 scanning...
1017 14:50:39.875531 scan_static_bus for USB3 port 1
1018 14:50:39.875599 scan_static_bus for USB3 port 1 done
1019 14:50:39.875659 scan_bus: bus USB3 port 1 finished in 6 msecs
1020 14:50:39.875715 scan_static_bus for USB0 port 0 done
1021 14:50:39.875770 scan_bus: bus USB0 port 0 finished in 93 msecs
1022 14:50:39.875829 scan_static_bus for PCI: 00:14.0 done
1023 14:50:39.875884 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1024 14:50:39.875939 PCI: 00:14.3 scanning...
1025 14:50:39.876000 scan_static_bus for PCI: 00:14.3
1026 14:50:39.876065 GENERIC: 0.0 enabled
1027 14:50:39.876124 scan_static_bus for PCI: 00:14.3 done
1028 14:50:39.876185 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1029 14:50:39.876243 PCI: 00:15.0 scanning...
1030 14:50:39.876297 scan_static_bus for PCI: 00:15.0
1031 14:50:39.876350 I2C: 00:1a enabled
1032 14:50:39.876403 I2C: 00:31 enabled
1033 14:50:39.876477 I2C: 00:32 enabled
1034 14:50:39.876566 scan_static_bus for PCI: 00:15.0 done
1035 14:50:39.876657 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1036 14:50:39.876754 PCI: 00:15.1 scanning...
1037 14:50:39.876816 scan_static_bus for PCI: 00:15.1
1038 14:50:39.876872 I2C: 00:10 enabled
1039 14:50:39.876928 scan_static_bus for PCI: 00:15.1 done
1040 14:50:39.876986 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1041 14:50:39.877040 PCI: 00:15.2 scanning...
1042 14:50:39.877097 scan_static_bus for PCI: 00:15.2
1043 14:50:39.877170 scan_static_bus for PCI: 00:15.2 done
1044 14:50:39.877266 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1045 14:50:39.877355 PCI: 00:15.3 scanning...
1046 14:50:39.877444 scan_static_bus for PCI: 00:15.3
1047 14:50:39.877539 scan_static_bus for PCI: 00:15.3 done
1048 14:50:39.877633 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1049 14:50:39.877729 PCI: 00:19.1 scanning...
1050 14:50:39.877794 scan_static_bus for PCI: 00:19.1
1051 14:50:39.877850 I2C: 00:15 enabled
1052 14:50:39.877906 scan_static_bus for PCI: 00:19.1 done
1053 14:50:39.877964 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1054 14:50:39.878019 PCI: 00:1d.0 scanning...
1055 14:50:39.878073 do_pci_scan_bridge for PCI: 00:1d.0
1056 14:50:39.878130 PCI: pci_scan_bus for bus 01
1057 14:50:39.878203 PCI: 01:00.0 [1c5c/174a] enabled
1058 14:50:39.878262 GENERIC: 0.0 enabled
1059 14:50:39.878317 Enabling Common Clock Configuration
1060 14:50:39.878371 L1 Sub-State supported from root port 29
1061 14:50:39.878457 L1 Sub-State Support = 0xf
1062 14:50:39.878543 CommonModeRestoreTime = 0x28
1063 14:50:39.878635 Power On Value = 0x16, Power On Scale = 0x0
1064 14:50:39.878733 ASPM: Enabled L1
1065 14:50:39.878795 PCIe: Max_Payload_Size adjusted to 128
1066 14:50:39.878851 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1067 14:50:39.878910 PCI: 00:1e.2 scanning...
1068 14:50:39.878966 scan_generic_bus for PCI: 00:1e.2
1069 14:50:39.879025 SPI: 00 enabled
1070 14:50:39.879118 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1071 14:50:39.879217 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1072 14:50:39.879302 PCI: 00:1e.3 scanning...
1073 14:50:39.879373 scan_generic_bus for PCI: 00:1e.3
1074 14:50:39.879434 SPI: 00 enabled
1075 14:50:39.879490 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1076 14:50:39.879545 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1077 14:50:39.879600 PCI: 00:1f.0 scanning...
1078 14:50:39.879657 scan_static_bus for PCI: 00:1f.0
1079 14:50:39.879720 PNP: 0c09.0 enabled
1080 14:50:39.879802 PNP: 0c09.0 scanning...
1081 14:50:39.879887 scan_static_bus for PNP: 0c09.0
1082 14:50:39.879978 scan_static_bus for PNP: 0c09.0 done
1083 14:50:39.880064 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1084 14:50:39.880126 scan_static_bus for PCI: 00:1f.0 done
1085 14:50:39.880190 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1086 14:50:39.880246 PCI: 00:1f.2 scanning...
1087 14:50:39.880302 scan_static_bus for PCI: 00:1f.2
1088 14:50:39.880356 GENERIC: 0.0 enabled
1089 14:50:39.880439 GENERIC: 0.0 scanning...
1090 14:50:39.880531 scan_static_bus for GENERIC: 0.0
1091 14:50:39.880621 GENERIC: 0.0 enabled
1092 14:50:39.880720 GENERIC: 1.0 enabled
1093 14:50:39.880811 scan_static_bus for GENERIC: 0.0 done
1094 14:50:39.880904 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1095 14:50:39.880995 scan_static_bus for PCI: 00:1f.2 done
1096 14:50:39.881084 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1097 14:50:39.881189 PCI: 00:1f.3 scanning...
1098 14:50:39.881283 scan_static_bus for PCI: 00:1f.3
1099 14:50:39.881370 scan_static_bus for PCI: 00:1f.3 done
1100 14:50:39.881466 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1101 14:50:39.881552 PCI: 00:1f.5 scanning...
1102 14:50:39.881641 scan_generic_bus for PCI: 00:1f.5
1103 14:50:39.881740 scan_generic_bus for PCI: 00:1f.5 done
1104 14:50:39.881829 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1105 14:50:39.881922 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1106 14:50:39.882007 scan_static_bus for Root Device done
1107 14:50:39.882102 scan_bus: bus Root Device finished in 737 msecs
1108 14:50:39.882205 done
1109 14:50:39.882293 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1110 14:50:39.882387 Chrome EC: UHEPI supported
1111 14:50:39.882481 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1112 14:50:39.882573 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1113 14:50:39.882666 SPI flash protection: WPSW=0 SRP0=0
1114 14:50:39.882737 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1115 14:50:39.882795 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1116 14:50:39.882852 found VGA at PCI: 00:02.0
1117 14:50:39.882911 Setting up VGA for PCI: 00:02.0
1118 14:50:39.883175 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1119 14:50:39.883282 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1120 14:50:39.883345 Allocating resources...
1121 14:50:39.883406 Reading resources...
1122 14:50:39.883463 Root Device read_resources bus 0 link: 0
1123 14:50:39.883518 DOMAIN: 0000 read_resources bus 0 link: 0
1124 14:50:39.883573 PCI: 00:04.0 read_resources bus 1 link: 0
1125 14:50:39.883631 PCI: 00:04.0 read_resources bus 1 link: 0 done
1126 14:50:39.883692 PCI: 00:0d.0 read_resources bus 0 link: 0
1127 14:50:39.883751 USB0 port 0 read_resources bus 0 link: 0
1128 14:50:39.883805 USB0 port 0 read_resources bus 0 link: 0 done
1129 14:50:39.883861 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1130 14:50:39.883915 PCI: 00:14.0 read_resources bus 0 link: 0
1131 14:50:39.883969 USB0 port 0 read_resources bus 0 link: 0
1132 14:50:39.884022 USB0 port 0 read_resources bus 0 link: 0 done
1133 14:50:39.884077 PCI: 00:14.0 read_resources bus 0 link: 0 done
1134 14:50:39.884134 PCI: 00:14.3 read_resources bus 0 link: 0
1135 14:50:39.884194 PCI: 00:14.3 read_resources bus 0 link: 0 done
1136 14:50:39.884271 PCI: 00:15.0 read_resources bus 0 link: 0
1137 14:50:39.884361 PCI: 00:15.0 read_resources bus 0 link: 0 done
1138 14:50:39.884449 PCI: 00:15.1 read_resources bus 0 link: 0
1139 14:50:39.884537 PCI: 00:15.1 read_resources bus 0 link: 0 done
1140 14:50:39.884601 PCI: 00:19.1 read_resources bus 0 link: 0
1141 14:50:39.884658 PCI: 00:19.1 read_resources bus 0 link: 0 done
1142 14:50:39.884721 PCI: 00:1d.0 read_resources bus 1 link: 0
1143 14:50:39.884779 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1144 14:50:39.884841 PCI: 00:1e.2 read_resources bus 2 link: 0
1145 14:50:39.884932 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1146 14:50:39.885030 PCI: 00:1e.3 read_resources bus 3 link: 0
1147 14:50:39.885123 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1148 14:50:39.885217 PCI: 00:1f.0 read_resources bus 0 link: 0
1149 14:50:39.885300 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1150 14:50:39.885362 PCI: 00:1f.2 read_resources bus 0 link: 0
1151 14:50:39.885419 GENERIC: 0.0 read_resources bus 0 link: 0
1152 14:50:39.885475 GENERIC: 0.0 read_resources bus 0 link: 0 done
1153 14:50:39.885555 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1154 14:50:39.885642 DOMAIN: 0000 read_resources bus 0 link: 0 done
1155 14:50:39.885737 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1156 14:50:39.885828 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1157 14:50:39.885892 Root Device read_resources bus 0 link: 0 done
1158 14:50:39.885948 Done reading resources.
1159 14:50:39.886004 Show resources in subtree (Root Device)...After reading.
1160 14:50:39.886060 Root Device child on link 0 DOMAIN: 0000
1161 14:50:39.886150 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1162 14:50:39.886257 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1163 14:50:39.886349 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1164 14:50:39.886427 PCI: 00:00.0
1165 14:50:39.886486 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1166 14:50:39.886543 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1167 14:50:39.886599 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1168 14:50:39.886655 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1169 14:50:39.886713 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1170 14:50:39.886775 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1171 14:50:39.886840 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1172 14:50:39.886931 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1173 14:50:39.887025 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1174 14:50:39.887110 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1175 14:50:39.887207 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1176 14:50:39.887309 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1177 14:50:39.887400 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1178 14:50:39.887470 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1179 14:50:39.887532 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1180 14:50:39.887588 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1181 14:50:39.887645 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1182 14:50:39.887700 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1183 14:50:39.887762 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1184 14:50:39.888013 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1185 14:50:39.888103 PCI: 00:02.0
1186 14:50:39.888192 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1187 14:50:39.888292 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1188 14:50:39.888377 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1189 14:50:39.888437 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1190 14:50:39.888497 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1191 14:50:39.888553 GENERIC: 0.0
1192 14:50:39.888609 PCI: 00:05.0
1193 14:50:39.888702 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1194 14:50:39.888800 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1195 14:50:39.888889 GENERIC: 0.0
1196 14:50:39.888986 PCI: 00:08.0
1197 14:50:39.889077 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 14:50:39.889168 PCI: 00:0a.0
1199 14:50:39.889258 PCI: 00:0d.0 child on link 0 USB0 port 0
1200 14:50:39.889322 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1201 14:50:39.889380 USB0 port 0 child on link 0 USB3 port 0
1202 14:50:39.889436 USB3 port 0
1203 14:50:39.889494 USB3 port 1
1204 14:50:39.889548 USB3 port 2
1205 14:50:39.889601 USB3 port 3
1206 14:50:39.889654 PCI: 00:14.0 child on link 0 USB0 port 0
1207 14:50:39.889711 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1208 14:50:39.889772 USB0 port 0 child on link 0 USB2 port 0
1209 14:50:39.890024 USB2 port 0
1210 14:50:39.890116 USB2 port 1
1211 14:50:39.893795 USB2 port 2
1212 14:50:39.893913 USB2 port 3
1213 14:50:39.896782 USB2 port 4
1214 14:50:39.896879 USB2 port 5
1215 14:50:39.900111 USB2 port 6
1216 14:50:39.900222 USB2 port 7
1217 14:50:39.903227 USB2 port 8
1218 14:50:39.903341 USB2 port 9
1219 14:50:39.907055 USB3 port 0
1220 14:50:39.907165 USB3 port 1
1221 14:50:39.910365 USB3 port 2
1222 14:50:39.913588 USB3 port 3
1223 14:50:39.913674 PCI: 00:14.2
1224 14:50:39.923252 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 14:50:39.933151 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1226 14:50:39.936920 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1227 14:50:39.946613 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1228 14:50:39.949717 GENERIC: 0.0
1229 14:50:39.952907 PCI: 00:15.0 child on link 0 I2C: 00:1a
1230 14:50:39.962737 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1231 14:50:39.966041 I2C: 00:1a
1232 14:50:39.966150 I2C: 00:31
1233 14:50:39.969318 I2C: 00:32
1234 14:50:39.972517 PCI: 00:15.1 child on link 0 I2C: 00:10
1235 14:50:39.982830 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 14:50:39.982925 I2C: 00:10
1237 14:50:39.986192 PCI: 00:15.2
1238 14:50:39.995834 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 14:50:39.995925 PCI: 00:15.3
1240 14:50:40.006138 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1241 14:50:40.009217 PCI: 00:16.0
1242 14:50:40.019483 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 14:50:40.019572 PCI: 00:19.0
1244 14:50:40.025663 PCI: 00:19.1 child on link 0 I2C: 00:15
1245 14:50:40.035867 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 14:50:40.036001 I2C: 00:15
1247 14:50:40.042325 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1248 14:50:40.048892 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1249 14:50:40.058714 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1250 14:50:40.068750 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1251 14:50:40.068835 GENERIC: 0.0
1252 14:50:40.072039 PCI: 01:00.0
1253 14:50:40.082220 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1254 14:50:40.091965 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1255 14:50:40.101657 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1256 14:50:40.101746 PCI: 00:1e.0
1257 14:50:40.115244 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1258 14:50:40.118543 PCI: 00:1e.2 child on link 0 SPI: 00
1259 14:50:40.128245 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 14:50:40.128337 SPI: 00
1261 14:50:40.131464 PCI: 00:1e.3 child on link 0 SPI: 00
1262 14:50:40.141617 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1263 14:50:40.144889 SPI: 00
1264 14:50:40.148157 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1265 14:50:40.157941 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1266 14:50:40.158038 PNP: 0c09.0
1267 14:50:40.168433 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1268 14:50:40.171496 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1269 14:50:40.181241 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1270 14:50:40.190930 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1271 14:50:40.194187 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1272 14:50:40.197431 GENERIC: 0.0
1273 14:50:40.197518 GENERIC: 1.0
1274 14:50:40.200674 PCI: 00:1f.3
1275 14:50:40.211094 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1276 14:50:40.220808 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1277 14:50:40.224133 PCI: 00:1f.5
1278 14:50:40.230460 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1279 14:50:40.237099 CPU_CLUSTER: 0 child on link 0 APIC: 00
1280 14:50:40.237212 APIC: 00
1281 14:50:40.237311 APIC: 01
1282 14:50:40.241059 APIC: 03
1283 14:50:40.241174 APIC: 05
1284 14:50:40.241275 APIC: 07
1285 14:50:40.244171 APIC: 06
1286 14:50:40.244283 APIC: 02
1287 14:50:40.247167 APIC: 04
1288 14:50:40.253584 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1289 14:50:40.260520 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1290 14:50:40.267305 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1291 14:50:40.270498 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1292 14:50:40.277147 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1293 14:50:40.280418 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1294 14:50:40.283644 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1295 14:50:40.289930 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1296 14:50:40.300344 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1297 14:50:40.306782 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1298 14:50:40.313247 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1299 14:50:40.320115 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1300 14:50:40.326494 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1301 14:50:40.336781 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1302 14:50:40.343331 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1303 14:50:40.346650 DOMAIN: 0000: Resource ranges:
1304 14:50:40.349818 * Base: 1000, Size: 800, Tag: 100
1305 14:50:40.353183 * Base: 1900, Size: e700, Tag: 100
1306 14:50:40.359564 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1307 14:50:40.366126 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1308 14:50:40.373438 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1309 14:50:40.379838 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1310 14:50:40.386344 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1311 14:50:40.396087 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1312 14:50:40.402653 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1313 14:50:40.409130 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1314 14:50:40.419391 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1315 14:50:40.425809 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1316 14:50:40.432427 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1317 14:50:40.442528 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1318 14:50:40.448845 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1319 14:50:40.455728 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1320 14:50:40.465330 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1321 14:50:40.471857 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1322 14:50:40.478847 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1323 14:50:40.488645 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1324 14:50:40.495260 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1325 14:50:40.501563 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1326 14:50:40.511977 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1327 14:50:40.518727 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1328 14:50:40.525193 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1329 14:50:40.534865 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1330 14:50:40.541613 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1331 14:50:40.545048 DOMAIN: 0000: Resource ranges:
1332 14:50:40.547873 * Base: 7fc00000, Size: 40400000, Tag: 200
1333 14:50:40.554765 * Base: d0000000, Size: 28000000, Tag: 200
1334 14:50:40.557954 * Base: fa000000, Size: 1000000, Tag: 200
1335 14:50:40.561203 * Base: fb001000, Size: 2fff000, Tag: 200
1336 14:50:40.564591 * Base: fe010000, Size: 2e000, Tag: 200
1337 14:50:40.571388 * Base: fe03f000, Size: d41000, Tag: 200
1338 14:50:40.574404 * Base: fed88000, Size: 8000, Tag: 200
1339 14:50:40.578207 * Base: fed93000, Size: d000, Tag: 200
1340 14:50:40.581342 * Base: feda2000, Size: 1e000, Tag: 200
1341 14:50:40.587627 * Base: fede0000, Size: 1220000, Tag: 200
1342 14:50:40.590986 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1343 14:50:40.597533 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1344 14:50:40.604623 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1345 14:50:40.610965 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1346 14:50:40.617414 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1347 14:50:40.624029 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1348 14:50:40.630568 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1349 14:50:40.637074 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1350 14:50:40.644065 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1351 14:50:40.650397 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1352 14:50:40.657575 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1353 14:50:40.663831 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1354 14:50:40.670315 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1355 14:50:40.677246 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1356 14:50:40.683594 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1357 14:50:40.690345 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1358 14:50:40.696551 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1359 14:50:40.703226 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1360 14:50:40.710272 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1361 14:50:40.720169 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1362 14:50:40.726651 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1363 14:50:40.733131 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1364 14:50:40.739661 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1365 14:50:40.746228 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1366 14:50:40.752687 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1367 14:50:40.756543 PCI: 00:1d.0: Resource ranges:
1368 14:50:40.759810 * Base: 7fc00000, Size: 100000, Tag: 200
1369 14:50:40.766214 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1370 14:50:40.772683 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1371 14:50:40.779669 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1372 14:50:40.789321 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1373 14:50:40.795657 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1374 14:50:40.799228 Root Device assign_resources, bus 0 link: 0
1375 14:50:40.806254 DOMAIN: 0000 assign_resources, bus 0 link: 0
1376 14:50:40.812453 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1377 14:50:40.822488 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1378 14:50:40.829228 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1379 14:50:40.838808 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1380 14:50:40.842171 PCI: 00:04.0 assign_resources, bus 1 link: 0
1381 14:50:40.848638 PCI: 00:04.0 assign_resources, bus 1 link: 0
1382 14:50:40.855350 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1383 14:50:40.865063 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1384 14:50:40.871992 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1385 14:50:40.875170 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1386 14:50:40.881764 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1387 14:50:40.888318 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1388 14:50:40.895076 PCI: 00:14.0 assign_resources, bus 0 link: 0
1389 14:50:40.898284 PCI: 00:14.0 assign_resources, bus 0 link: 0
1390 14:50:40.907853 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1391 14:50:40.914940 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1392 14:50:40.924557 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1393 14:50:40.927826 PCI: 00:14.3 assign_resources, bus 0 link: 0
1394 14:50:40.931318 PCI: 00:14.3 assign_resources, bus 0 link: 0
1395 14:50:40.941410 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1396 14:50:40.944356 PCI: 00:15.0 assign_resources, bus 0 link: 0
1397 14:50:40.951131 PCI: 00:15.0 assign_resources, bus 0 link: 0
1398 14:50:40.957384 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1399 14:50:40.963827 PCI: 00:15.1 assign_resources, bus 0 link: 0
1400 14:50:40.967101 PCI: 00:15.1 assign_resources, bus 0 link: 0
1401 14:50:40.977382 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1402 14:50:40.983868 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1403 14:50:40.993675 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1404 14:50:41.000186 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1405 14:50:41.003363 PCI: 00:19.1 assign_resources, bus 0 link: 0
1406 14:50:41.010420 PCI: 00:19.1 assign_resources, bus 0 link: 0
1407 14:50:41.016860 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1408 14:50:41.030355 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1409 14:50:41.036950 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1410 14:50:41.040341 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1411 14:50:41.050074 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1412 14:50:41.056783 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1413 14:50:41.066405 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1414 14:50:41.069912 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1415 14:50:41.079383 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1416 14:50:41.082971 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1417 14:50:41.086019 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1418 14:50:41.096479 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1419 14:50:41.099777 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1420 14:50:41.106447 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1421 14:50:41.109629 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1422 14:50:41.116083 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1423 14:50:41.119270 LPC: Trying to open IO window from 800 size 1ff
1424 14:50:41.129303 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1425 14:50:41.136351 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1426 14:50:41.142880 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1427 14:50:41.149838 DOMAIN: 0000 assign_resources, bus 0 link: 0
1428 14:50:41.152987 Root Device assign_resources, bus 0 link: 0
1429 14:50:41.156465 Done setting resources.
1430 14:50:41.162594 Show resources in subtree (Root Device)...After assigning values.
1431 14:50:41.166120 Root Device child on link 0 DOMAIN: 0000
1432 14:50:41.172482 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1433 14:50:41.179411 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1434 14:50:41.189301 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1435 14:50:41.192473 PCI: 00:00.0
1436 14:50:41.202246 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1437 14:50:41.212568 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1438 14:50:41.218878 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1439 14:50:41.229154 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1440 14:50:41.238751 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1441 14:50:41.248518 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1442 14:50:41.259185 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1443 14:50:41.268710 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1444 14:50:41.275170 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1445 14:50:41.284990 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1446 14:50:41.295112 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1447 14:50:41.305294 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1448 14:50:41.315383 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1449 14:50:41.321564 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1450 14:50:41.331856 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1451 14:50:41.341853 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1452 14:50:41.351735 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1453 14:50:41.361514 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1454 14:50:41.371089 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1455 14:50:41.381188 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1456 14:50:41.381267 PCI: 00:02.0
1457 14:50:41.391013 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1458 14:50:41.404559 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1459 14:50:41.411021 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1460 14:50:41.417513 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1461 14:50:41.427393 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1462 14:50:41.427476 GENERIC: 0.0
1463 14:50:41.431369 PCI: 00:05.0
1464 14:50:41.440756 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1465 14:50:41.447105 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1466 14:50:41.447193 GENERIC: 0.0
1467 14:50:41.451002 PCI: 00:08.0
1468 14:50:41.460957 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1469 14:50:41.461038 PCI: 00:0a.0
1470 14:50:41.467550 PCI: 00:0d.0 child on link 0 USB0 port 0
1471 14:50:41.477184 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1472 14:50:41.480435 USB0 port 0 child on link 0 USB3 port 0
1473 14:50:41.483560 USB3 port 0
1474 14:50:41.483638 USB3 port 1
1475 14:50:41.487301 USB3 port 2
1476 14:50:41.487375 USB3 port 3
1477 14:50:41.493542 PCI: 00:14.0 child on link 0 USB0 port 0
1478 14:50:41.503740 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1479 14:50:41.507079 USB0 port 0 child on link 0 USB2 port 0
1480 14:50:41.510339 USB2 port 0
1481 14:50:41.510417 USB2 port 1
1482 14:50:41.513572 USB2 port 2
1483 14:50:41.513643 USB2 port 3
1484 14:50:41.516446 USB2 port 4
1485 14:50:41.516520 USB2 port 5
1486 14:50:41.520125 USB2 port 6
1487 14:50:41.520199 USB2 port 7
1488 14:50:41.523397 USB2 port 8
1489 14:50:41.523469 USB2 port 9
1490 14:50:41.526552 USB3 port 0
1491 14:50:41.526628 USB3 port 1
1492 14:50:41.530269 USB3 port 2
1493 14:50:41.533518 USB3 port 3
1494 14:50:41.533600 PCI: 00:14.2
1495 14:50:41.543130 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1496 14:50:41.553376 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1497 14:50:41.559784 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1498 14:50:41.569653 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1499 14:50:41.569734 GENERIC: 0.0
1500 14:50:41.576281 PCI: 00:15.0 child on link 0 I2C: 00:1a
1501 14:50:41.586424 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1502 14:50:41.586508 I2C: 00:1a
1503 14:50:41.589449 I2C: 00:31
1504 14:50:41.589531 I2C: 00:32
1505 14:50:41.592418 PCI: 00:15.1 child on link 0 I2C: 00:10
1506 14:50:41.605850 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1507 14:50:41.605935 I2C: 00:10
1508 14:50:41.609351 PCI: 00:15.2
1509 14:50:41.619104 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1510 14:50:41.619186 PCI: 00:15.3
1511 14:50:41.629116 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1512 14:50:41.632233 PCI: 00:16.0
1513 14:50:41.642224 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1514 14:50:41.642334 PCI: 00:19.0
1515 14:50:41.648769 PCI: 00:19.1 child on link 0 I2C: 00:15
1516 14:50:41.659044 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1517 14:50:41.659127 I2C: 00:15
1518 14:50:41.665614 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1519 14:50:41.675252 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1520 14:50:41.685185 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1521 14:50:41.695260 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1522 14:50:41.698425 GENERIC: 0.0
1523 14:50:41.698667 PCI: 01:00.0
1524 14:50:41.711454 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1525 14:50:41.721514 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1526 14:50:41.731454 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1527 14:50:41.731537 PCI: 00:1e.0
1528 14:50:41.744791 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1529 14:50:41.748081 PCI: 00:1e.2 child on link 0 SPI: 00
1530 14:50:41.757699 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1531 14:50:41.757787 SPI: 00
1532 14:50:41.764140 PCI: 00:1e.3 child on link 0 SPI: 00
1533 14:50:41.774608 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1534 14:50:41.774697 SPI: 00
1535 14:50:41.777851 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1536 14:50:41.787497 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1537 14:50:41.790919 PNP: 0c09.0
1538 14:50:41.797870 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1539 14:50:41.804421 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1540 14:50:41.810624 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1541 14:50:41.820320 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1542 14:50:41.827476 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1543 14:50:41.827560 GENERIC: 0.0
1544 14:50:41.830470 GENERIC: 1.0
1545 14:50:41.830553 PCI: 00:1f.3
1546 14:50:41.840462 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1547 14:50:41.853637 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1548 14:50:41.853754 PCI: 00:1f.5
1549 14:50:41.863433 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1550 14:50:41.867197 CPU_CLUSTER: 0 child on link 0 APIC: 00
1551 14:50:41.870462 APIC: 00
1552 14:50:41.870539 APIC: 01
1553 14:50:41.873836 APIC: 03
1554 14:50:41.873941 APIC: 05
1555 14:50:41.874033 APIC: 07
1556 14:50:41.877121 APIC: 06
1557 14:50:41.877192 APIC: 02
1558 14:50:41.879772 APIC: 04
1559 14:50:41.879843 Done allocating resources.
1560 14:50:41.886343 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1561 14:50:41.893496 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1562 14:50:41.896288 Configure GPIOs for I2S audio on UP4.
1563 14:50:41.903983 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1564 14:50:41.907135 Enabling resources...
1565 14:50:41.910342 PCI: 00:00.0 subsystem <- 8086/9a12
1566 14:50:41.913584 PCI: 00:00.0 cmd <- 06
1567 14:50:41.916798 PCI: 00:02.0 subsystem <- 8086/9a40
1568 14:50:41.920539 PCI: 00:02.0 cmd <- 03
1569 14:50:41.923679 PCI: 00:04.0 subsystem <- 8086/9a03
1570 14:50:41.926933 PCI: 00:04.0 cmd <- 02
1571 14:50:41.930610 PCI: 00:05.0 subsystem <- 8086/9a19
1572 14:50:41.930692 PCI: 00:05.0 cmd <- 02
1573 14:50:41.936973 PCI: 00:08.0 subsystem <- 8086/9a11
1574 14:50:41.937053 PCI: 00:08.0 cmd <- 06
1575 14:50:41.940092 PCI: 00:0d.0 subsystem <- 8086/9a13
1576 14:50:41.943445 PCI: 00:0d.0 cmd <- 02
1577 14:50:41.947195 PCI: 00:14.0 subsystem <- 8086/a0ed
1578 14:50:41.950171 PCI: 00:14.0 cmd <- 02
1579 14:50:41.953633 PCI: 00:14.2 subsystem <- 8086/a0ef
1580 14:50:41.956626 PCI: 00:14.2 cmd <- 02
1581 14:50:41.959967 PCI: 00:14.3 subsystem <- 8086/a0f0
1582 14:50:41.963698 PCI: 00:14.3 cmd <- 02
1583 14:50:41.966571 PCI: 00:15.0 subsystem <- 8086/a0e8
1584 14:50:41.969670 PCI: 00:15.0 cmd <- 02
1585 14:50:41.973083 PCI: 00:15.1 subsystem <- 8086/a0e9
1586 14:50:41.976538 PCI: 00:15.1 cmd <- 02
1587 14:50:41.979840 PCI: 00:15.2 subsystem <- 8086/a0ea
1588 14:50:41.979933 PCI: 00:15.2 cmd <- 02
1589 14:50:41.986927 PCI: 00:15.3 subsystem <- 8086/a0eb
1590 14:50:41.987008 PCI: 00:15.3 cmd <- 02
1591 14:50:41.990094 PCI: 00:16.0 subsystem <- 8086/a0e0
1592 14:50:41.993570 PCI: 00:16.0 cmd <- 02
1593 14:50:41.996761 PCI: 00:19.1 subsystem <- 8086/a0c6
1594 14:50:41.999435 PCI: 00:19.1 cmd <- 02
1595 14:50:42.003300 PCI: 00:1d.0 bridge ctrl <- 0013
1596 14:50:42.006558 PCI: 00:1d.0 subsystem <- 8086/a0b0
1597 14:50:42.009863 PCI: 00:1d.0 cmd <- 06
1598 14:50:42.012578 PCI: 00:1e.0 subsystem <- 8086/a0a8
1599 14:50:42.015784 PCI: 00:1e.0 cmd <- 06
1600 14:50:42.019118 PCI: 00:1e.2 subsystem <- 8086/a0aa
1601 14:50:42.022898 PCI: 00:1e.2 cmd <- 06
1602 14:50:42.026107 PCI: 00:1e.3 subsystem <- 8086/a0ab
1603 14:50:42.029338 PCI: 00:1e.3 cmd <- 02
1604 14:50:42.032498 PCI: 00:1f.0 subsystem <- 8086/a087
1605 14:50:42.035818 PCI: 00:1f.0 cmd <- 407
1606 14:50:42.039064 PCI: 00:1f.3 subsystem <- 8086/a0c8
1607 14:50:42.039183 PCI: 00:1f.3 cmd <- 02
1608 14:50:42.045725 PCI: 00:1f.5 subsystem <- 8086/a0a4
1609 14:50:42.045838 PCI: 00:1f.5 cmd <- 406
1610 14:50:42.051452 PCI: 01:00.0 cmd <- 02
1611 14:50:42.055937 done.
1612 14:50:42.059137 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1613 14:50:42.062338 Initializing devices...
1614 14:50:42.065886 Root Device init
1615 14:50:42.068696 Chrome EC: Set SMI mask to 0x0000000000000000
1616 14:50:42.075638 Chrome EC: clear events_b mask to 0x0000000000000000
1617 14:50:42.082626 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1618 14:50:42.089124 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1619 14:50:42.095723 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1620 14:50:42.099000 Chrome EC: Set WAKE mask to 0x0000000000000000
1621 14:50:42.106715 fw_config match found: DB_USB=USB3_ACTIVE
1622 14:50:42.110097 Configure Right Type-C port orientation for retimer
1623 14:50:42.116679 Root Device init finished in 46 msecs
1624 14:50:42.116760 PCI: 00:00.0 init
1625 14:50:42.120611 CPU TDP = 9 Watts
1626 14:50:42.123770 CPU PL1 = 9 Watts
1627 14:50:42.123888 CPU PL2 = 40 Watts
1628 14:50:42.126809 CPU PL4 = 83 Watts
1629 14:50:42.130579 PCI: 00:00.0 init finished in 8 msecs
1630 14:50:42.133937 PCI: 00:02.0 init
1631 14:50:42.134047 GMA: Found VBT in CBFS
1632 14:50:42.136722 GMA: Found valid VBT in CBFS
1633 14:50:42.143017 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1634 14:50:42.150100 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1635 14:50:42.153292 PCI: 00:02.0 init finished in 18 msecs
1636 14:50:42.157218 PCI: 00:05.0 init
1637 14:50:42.160268 PCI: 00:05.0 init finished in 0 msecs
1638 14:50:42.163554 PCI: 00:08.0 init
1639 14:50:42.166739 PCI: 00:08.0 init finished in 0 msecs
1640 14:50:42.170076 PCI: 00:14.0 init
1641 14:50:42.173427 PCI: 00:14.0 init finished in 0 msecs
1642 14:50:42.176470 PCI: 00:14.2 init
1643 14:50:42.180119 PCI: 00:14.2 init finished in 0 msecs
1644 14:50:42.183178 PCI: 00:15.0 init
1645 14:50:42.186618 I2C bus 0 version 0x3230302a
1646 14:50:42.189916 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1647 14:50:42.193221 PCI: 00:15.0 init finished in 6 msecs
1648 14:50:42.196246 PCI: 00:15.1 init
1649 14:50:42.196372 I2C bus 1 version 0x3230302a
1650 14:50:42.202651 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1651 14:50:42.206008 PCI: 00:15.1 init finished in 6 msecs
1652 14:50:42.206119 PCI: 00:15.2 init
1653 14:50:42.209187 I2C bus 2 version 0x3230302a
1654 14:50:42.215767 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1655 14:50:42.219021 PCI: 00:15.2 init finished in 6 msecs
1656 14:50:42.219101 PCI: 00:15.3 init
1657 14:50:42.222312 I2C bus 3 version 0x3230302a
1658 14:50:42.225650 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1659 14:50:42.232134 PCI: 00:15.3 init finished in 6 msecs
1660 14:50:42.232220 PCI: 00:16.0 init
1661 14:50:42.235217 PCI: 00:16.0 init finished in 0 msecs
1662 14:50:42.239012 PCI: 00:19.1 init
1663 14:50:42.242223 I2C bus 5 version 0x3230302a
1664 14:50:42.245379 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1665 14:50:42.248657 PCI: 00:19.1 init finished in 6 msecs
1666 14:50:42.252062 PCI: 00:1d.0 init
1667 14:50:42.255901 Initializing PCH PCIe bridge.
1668 14:50:42.258738 PCI: 00:1d.0 init finished in 3 msecs
1669 14:50:42.261955 PCI: 00:1f.0 init
1670 14:50:42.265065 IOAPIC: Initializing IOAPIC at 0xfec00000
1671 14:50:42.271583 IOAPIC: Bootstrap Processor Local APIC = 0x00
1672 14:50:42.271675 IOAPIC: ID = 0x02
1673 14:50:42.274932 IOAPIC: Dumping registers
1674 14:50:42.278115 reg 0x0000: 0x02000000
1675 14:50:42.281451 reg 0x0001: 0x00770020
1676 14:50:42.281528 reg 0x0002: 0x00000000
1677 14:50:42.287959 PCI: 00:1f.0 init finished in 21 msecs
1678 14:50:42.288044 PCI: 00:1f.2 init
1679 14:50:42.291134 Disabling ACPI via APMC.
1680 14:50:42.294782 APMC done.
1681 14:50:42.297748 PCI: 00:1f.2 init finished in 5 msecs
1682 14:50:42.309858 PCI: 01:00.0 init
1683 14:50:42.313230 PCI: 01:00.0 init finished in 0 msecs
1684 14:50:42.316402 PNP: 0c09.0 init
1685 14:50:42.319735 Google Chrome EC uptime: 10.181 seconds
1686 14:50:42.326485 Google Chrome AP resets since EC boot: 0
1687 14:50:42.329865 Google Chrome most recent AP reset causes:
1688 14:50:42.336527 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1689 14:50:42.339789 PNP: 0c09.0 init finished in 19 msecs
1690 14:50:42.345027 Devices initialized
1691 14:50:42.348310 Show all devs... After init.
1692 14:50:42.351708 Root Device: enabled 1
1693 14:50:42.351792 DOMAIN: 0000: enabled 1
1694 14:50:42.354835 CPU_CLUSTER: 0: enabled 1
1695 14:50:42.358073 PCI: 00:00.0: enabled 1
1696 14:50:42.361354 PCI: 00:02.0: enabled 1
1697 14:50:42.361433 PCI: 00:04.0: enabled 1
1698 14:50:42.365126 PCI: 00:05.0: enabled 1
1699 14:50:42.368230 PCI: 00:06.0: enabled 0
1700 14:50:42.371445 PCI: 00:07.0: enabled 0
1701 14:50:42.371520 PCI: 00:07.1: enabled 0
1702 14:50:42.374515 PCI: 00:07.2: enabled 0
1703 14:50:42.378243 PCI: 00:07.3: enabled 0
1704 14:50:42.381078 PCI: 00:08.0: enabled 1
1705 14:50:42.381153 PCI: 00:09.0: enabled 0
1706 14:50:42.384430 PCI: 00:0a.0: enabled 0
1707 14:50:42.387625 PCI: 00:0d.0: enabled 1
1708 14:50:42.390918 PCI: 00:0d.1: enabled 0
1709 14:50:42.390993 PCI: 00:0d.2: enabled 0
1710 14:50:42.394303 PCI: 00:0d.3: enabled 0
1711 14:50:42.397544 PCI: 00:0e.0: enabled 0
1712 14:50:42.401133 PCI: 00:10.2: enabled 1
1713 14:50:42.401208 PCI: 00:10.6: enabled 0
1714 14:50:42.404283 PCI: 00:10.7: enabled 0
1715 14:50:42.407256 PCI: 00:12.0: enabled 0
1716 14:50:42.410953 PCI: 00:12.6: enabled 0
1717 14:50:42.411038 PCI: 00:13.0: enabled 0
1718 14:50:42.413846 PCI: 00:14.0: enabled 1
1719 14:50:42.417430 PCI: 00:14.1: enabled 0
1720 14:50:42.420789 PCI: 00:14.2: enabled 1
1721 14:50:42.420901 PCI: 00:14.3: enabled 1
1722 14:50:42.423998 PCI: 00:15.0: enabled 1
1723 14:50:42.427274 PCI: 00:15.1: enabled 1
1724 14:50:42.430409 PCI: 00:15.2: enabled 1
1725 14:50:42.430509 PCI: 00:15.3: enabled 1
1726 14:50:42.433755 PCI: 00:16.0: enabled 1
1727 14:50:42.436973 PCI: 00:16.1: enabled 0
1728 14:50:42.437085 PCI: 00:16.2: enabled 0
1729 14:50:42.440191 PCI: 00:16.3: enabled 0
1730 14:50:42.443929 PCI: 00:16.4: enabled 0
1731 14:50:42.447071 PCI: 00:16.5: enabled 0
1732 14:50:42.447204 PCI: 00:17.0: enabled 0
1733 14:50:42.450374 PCI: 00:19.0: enabled 0
1734 14:50:42.453689 PCI: 00:19.1: enabled 1
1735 14:50:42.456557 PCI: 00:19.2: enabled 0
1736 14:50:42.456668 PCI: 00:1c.0: enabled 1
1737 14:50:42.460297 PCI: 00:1c.1: enabled 0
1738 14:50:42.463007 PCI: 00:1c.2: enabled 0
1739 14:50:42.466107 PCI: 00:1c.3: enabled 0
1740 14:50:42.469831 PCI: 00:1c.4: enabled 0
1741 14:50:42.469934 PCI: 00:1c.5: enabled 0
1742 14:50:42.472998 PCI: 00:1c.6: enabled 1
1743 14:50:42.476125 PCI: 00:1c.7: enabled 0
1744 14:50:42.476234 PCI: 00:1d.0: enabled 1
1745 14:50:42.479326 PCI: 00:1d.1: enabled 0
1746 14:50:42.483138 PCI: 00:1d.2: enabled 1
1747 14:50:42.486361 PCI: 00:1d.3: enabled 0
1748 14:50:42.486441 PCI: 00:1e.0: enabled 1
1749 14:50:42.489348 PCI: 00:1e.1: enabled 0
1750 14:50:42.492966 PCI: 00:1e.2: enabled 1
1751 14:50:42.496063 PCI: 00:1e.3: enabled 1
1752 14:50:42.496141 PCI: 00:1f.0: enabled 1
1753 14:50:42.499415 PCI: 00:1f.1: enabled 0
1754 14:50:42.502498 PCI: 00:1f.2: enabled 1
1755 14:50:42.506152 PCI: 00:1f.3: enabled 1
1756 14:50:42.506275 PCI: 00:1f.4: enabled 0
1757 14:50:42.508897 PCI: 00:1f.5: enabled 1
1758 14:50:42.512213 PCI: 00:1f.6: enabled 0
1759 14:50:42.515479 PCI: 00:1f.7: enabled 0
1760 14:50:42.515585 APIC: 00: enabled 1
1761 14:50:42.519227 GENERIC: 0.0: enabled 1
1762 14:50:42.522223 GENERIC: 0.0: enabled 1
1763 14:50:42.522307 GENERIC: 1.0: enabled 1
1764 14:50:42.525918 GENERIC: 0.0: enabled 1
1765 14:50:42.528536 GENERIC: 1.0: enabled 1
1766 14:50:42.531816 USB0 port 0: enabled 1
1767 14:50:42.531891 GENERIC: 0.0: enabled 1
1768 14:50:42.535166 USB0 port 0: enabled 1
1769 14:50:42.538437 GENERIC: 0.0: enabled 1
1770 14:50:42.541681 I2C: 00:1a: enabled 1
1771 14:50:42.541762 I2C: 00:31: enabled 1
1772 14:50:42.544868 I2C: 00:32: enabled 1
1773 14:50:42.548688 I2C: 00:10: enabled 1
1774 14:50:42.548789 I2C: 00:15: enabled 1
1775 14:50:42.551740 GENERIC: 0.0: enabled 0
1776 14:50:42.554861 GENERIC: 1.0: enabled 0
1777 14:50:42.558099 GENERIC: 0.0: enabled 1
1778 14:50:42.558220 SPI: 00: enabled 1
1779 14:50:42.561467 SPI: 00: enabled 1
1780 14:50:42.564721 PNP: 0c09.0: enabled 1
1781 14:50:42.564796 GENERIC: 0.0: enabled 1
1782 14:50:42.568110 USB3 port 0: enabled 1
1783 14:50:42.571315 USB3 port 1: enabled 1
1784 14:50:42.571392 USB3 port 2: enabled 0
1785 14:50:42.574538 USB3 port 3: enabled 0
1786 14:50:42.577595 USB2 port 0: enabled 0
1787 14:50:42.581154 USB2 port 1: enabled 1
1788 14:50:42.581259 USB2 port 2: enabled 1
1789 14:50:42.584392 USB2 port 3: enabled 0
1790 14:50:42.588122 USB2 port 4: enabled 1
1791 14:50:42.588203 USB2 port 5: enabled 0
1792 14:50:42.591446 USB2 port 6: enabled 0
1793 14:50:42.594695 USB2 port 7: enabled 0
1794 14:50:42.594767 USB2 port 8: enabled 0
1795 14:50:42.597859 USB2 port 9: enabled 0
1796 14:50:42.600941 USB3 port 0: enabled 0
1797 14:50:42.604060 USB3 port 1: enabled 1
1798 14:50:42.604137 USB3 port 2: enabled 0
1799 14:50:42.607466 USB3 port 3: enabled 0
1800 14:50:42.610656 GENERIC: 0.0: enabled 1
1801 14:50:42.613850 GENERIC: 1.0: enabled 1
1802 14:50:42.613930 APIC: 01: enabled 1
1803 14:50:42.617476 APIC: 03: enabled 1
1804 14:50:42.617554 APIC: 05: enabled 1
1805 14:50:42.620648 APIC: 07: enabled 1
1806 14:50:42.623998 APIC: 06: enabled 1
1807 14:50:42.624075 APIC: 02: enabled 1
1808 14:50:42.627077 APIC: 04: enabled 1
1809 14:50:42.630652 PCI: 01:00.0: enabled 1
1810 14:50:42.633958 BS: BS_DEV_INIT run times (exec / console): 32 / 537 ms
1811 14:50:42.639964 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1812 14:50:42.643200 ELOG: NV offset 0xf30000 size 0x1000
1813 14:50:42.650373 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1814 14:50:42.657332 ELOG: Event(17) added with size 13 at 2024-05-28 14:50:43 UTC
1815 14:50:42.663849 ELOG: Event(92) added with size 9 at 2024-05-28 14:50:43 UTC
1816 14:50:42.670403 ELOG: Event(93) added with size 9 at 2024-05-28 14:50:43 UTC
1817 14:50:42.676936 ELOG: Event(9E) added with size 10 at 2024-05-28 14:50:43 UTC
1818 14:50:42.683522 ELOG: Event(9F) added with size 14 at 2024-05-28 14:50:43 UTC
1819 14:50:42.690637 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
1820 14:50:42.696778 ELOG: Event(A1) added with size 10 at 2024-05-28 14:50:43 UTC
1821 14:50:42.702951 elog_add_boot_reason: Logged recovery mode boot, reason: 0x02
1822 14:50:42.706307 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1823 14:50:42.709449 Finalize devices...
1824 14:50:42.713155 Devices finalized
1825 14:50:42.716143 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1826 14:50:42.722966 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1827 14:50:42.729391 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1828 14:50:42.732651 ME: HFSTS1 : 0x80030055
1829 14:50:42.735808 ME: HFSTS2 : 0x30280116
1830 14:50:42.742584 ME: HFSTS3 : 0x00000050
1831 14:50:42.745890 ME: HFSTS4 : 0x00004000
1832 14:50:42.749120 ME: HFSTS5 : 0x00000000
1833 14:50:42.755569 ME: HFSTS6 : 0x00400006
1834 14:50:42.758793 ME: Manufacturing Mode : YES
1835 14:50:42.761975 ME: SPI Protection Mode Enabled : NO
1836 14:50:42.765166 ME: FW Partition Table : OK
1837 14:50:42.768471 ME: Bringup Loader Failure : NO
1838 14:50:42.771850 ME: Firmware Init Complete : NO
1839 14:50:42.778471 ME: Boot Options Present : NO
1840 14:50:42.781796 ME: Update In Progress : NO
1841 14:50:42.785068 ME: D0i3 Support : YES
1842 14:50:42.788366 ME: Low Power State Enabled : NO
1843 14:50:42.791485 ME: CPU Replaced : YES
1844 14:50:42.795158 ME: CPU Replacement Valid : YES
1845 14:50:42.798188 ME: Current Working State : 5
1846 14:50:42.805065 ME: Current Operation State : 1
1847 14:50:42.808131 ME: Current Operation Mode : 3
1848 14:50:42.811382 ME: Error Code : 0
1849 14:50:42.814689 ME: Enhanced Debug Mode : NO
1850 14:50:42.817987 ME: CPU Debug Disabled : YES
1851 14:50:42.821134 ME: TXT Support : NO
1852 14:50:42.827650 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1853 14:50:42.834684 ELOG: Event(91) added with size 10 at 2024-05-28 14:50:43 UTC
1854 14:50:42.840988 Chrome EC: clear events_b mask to 0x0000000020004000
1855 14:50:42.847821 BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms
1856 14:50:42.854154 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1857 14:50:42.858136 CBFS: 'fallback/slic' not found.
1858 14:50:42.861159 ACPI: Writing ACPI tables at 76b01000.
1859 14:50:42.864414 ACPI: * FACS
1860 14:50:42.864518 ACPI: * DSDT
1861 14:50:42.867657 Ramoops buffer: 0x100000@0x76a00000.
1862 14:50:42.874303 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1863 14:50:42.877533 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1864 14:50:42.880708 Google Chrome EC: version:
1865 14:50:42.884165 ro: voema_v2.0.7540-147f8d37d1
1866 14:50:42.887392 rw: voema_v2.0.7540-147f8d37d1
1867 14:50:42.890599 running image: 1
1868 14:50:42.896865 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1869 14:50:42.900174 ACPI: * FADT
1870 14:50:42.900253 SCI is IRQ9
1871 14:50:42.903981 ACPI: added table 1/32, length now 40
1872 14:50:42.906965 ACPI: * SSDT
1873 14:50:42.910309 Found 1 CPU(s) with 8 core(s) each.
1874 14:50:42.917063 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1875 14:50:42.920257 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1876 14:50:42.923477 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1877 14:50:42.926688 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1878 14:50:42.933060 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1879 14:50:42.940100 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1880 14:50:42.943021 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1881 14:50:42.949485 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1882 14:50:42.956343 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1883 14:50:42.959654 \_SB.PCI0.RP09: Added StorageD3Enable property
1884 14:50:42.966041 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1885 14:50:42.969891 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1886 14:50:42.976228 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1887 14:50:42.979587 PS2K: Passing 80 keymaps to kernel
1888 14:50:42.985950 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1889 14:50:42.992616 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1890 14:50:42.999143 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1891 14:50:43.005801 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1892 14:50:43.012091 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1893 14:50:43.018425 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1894 14:50:43.025441 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1895 14:50:43.031972 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1896 14:50:43.035387 ACPI: added table 2/32, length now 44
1897 14:50:43.038680 ACPI: * MCFG
1898 14:50:43.041885 ACPI: added table 3/32, length now 48
1899 14:50:43.041972 ACPI: * TPM2
1900 14:50:43.045112 TPM2 log created at 0x769f0000
1901 14:50:43.048043 ACPI: added table 4/32, length now 52
1902 14:50:43.051628 ACPI: * MADT
1903 14:50:43.051743 SCI is IRQ9
1904 14:50:43.054661 ACPI: added table 5/32, length now 56
1905 14:50:43.058254 current = 76b09850
1906 14:50:43.061246 ACPI: * DMAR
1907 14:50:43.064709 ACPI: added table 6/32, length now 60
1908 14:50:43.067590 ACPI: added table 7/32, length now 64
1909 14:50:43.067681 ACPI: * HPET
1910 14:50:43.074210 ACPI: added table 8/32, length now 68
1911 14:50:43.074294 ACPI: done.
1912 14:50:43.077900 ACPI tables: 35216 bytes.
1913 14:50:43.081292 smbios_write_tables: 769ef000
1914 14:50:43.084429 EC returned error result code 3
1915 14:50:43.087682 Couldn't obtain OEM name from CBI
1916 14:50:43.091029 Create SMBIOS type 16
1917 14:50:43.094229 Create SMBIOS type 17
1918 14:50:43.097607 GENERIC: 0.0 (WIFI Device)
1919 14:50:43.097710 SMBIOS tables: 1750 bytes.
1920 14:50:43.104036 Writing table forward entry at 0x00000500
1921 14:50:43.110420 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1922 14:50:43.113689 Writing coreboot table at 0x76b25000
1923 14:50:43.116898 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1924 14:50:43.123395 1. 0000000000001000-000000000009ffff: RAM
1925 14:50:43.127241 2. 00000000000a0000-00000000000fffff: RESERVED
1926 14:50:43.133463 3. 0000000000100000-00000000769eefff: RAM
1927 14:50:43.136744 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1928 14:50:43.143393 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1929 14:50:43.149868 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1930 14:50:43.153095 7. 0000000077000000-000000007fbfffff: RESERVED
1931 14:50:43.159680 8. 00000000c0000000-00000000cfffffff: RESERVED
1932 14:50:43.162889 9. 00000000f8000000-00000000f9ffffff: RESERVED
1933 14:50:43.166523 10. 00000000fb000000-00000000fb000fff: RESERVED
1934 14:50:43.172920 11. 00000000fe000000-00000000fe00ffff: RESERVED
1935 14:50:43.176098 12. 00000000fed80000-00000000fed87fff: RESERVED
1936 14:50:43.182842 13. 00000000fed90000-00000000fed92fff: RESERVED
1937 14:50:43.186293 14. 00000000feda0000-00000000feda1fff: RESERVED
1938 14:50:43.192386 15. 00000000fedc0000-00000000feddffff: RESERVED
1939 14:50:43.195633 16. 0000000100000000-00000002803fffff: RAM
1940 14:50:43.199634 Passing 4 GPIOs to payload:
1941 14:50:43.202281 NAME | PORT | POLARITY | VALUE
1942 14:50:43.209298 lid | undefined | high | high
1943 14:50:43.215752 power | undefined | high | low
1944 14:50:43.219003 oprom | undefined | high | low
1945 14:50:43.225406 EC in RW | 0x000000e5 | high | low
1946 14:50:43.231934 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e18
1947 14:50:43.235267 coreboot table: 1576 bytes.
1948 14:50:43.238826 IMD ROOT 0. 0x76fff000 0x00001000
1949 14:50:43.242079 IMD SMALL 1. 0x76ffe000 0x00001000
1950 14:50:43.245485 FSP MEMORY 2. 0x76c4e000 0x003b0000
1951 14:50:43.248746 VPD 3. 0x76c4d000 0x00000367
1952 14:50:43.251987 RO MCACHE 4. 0x76c4c000 0x00000fdc
1953 14:50:43.255112 CONSOLE 5. 0x76c2c000 0x00020000
1954 14:50:43.261641 FMAP 6. 0x76c2b000 0x00000578
1955 14:50:43.264659 TIME STAMP 7. 0x76c2a000 0x00000910
1956 14:50:43.268567 VBOOT WORK 8. 0x76c16000 0x00014000
1957 14:50:43.271733 ROMSTG STCK 9. 0x76c15000 0x00001000
1958 14:50:43.274788 AFTER CAR 10. 0x76c0a000 0x0000b000
1959 14:50:43.278278 RAMSTAGE 11. 0x76b97000 0x00073000
1960 14:50:43.281124 REFCODE 12. 0x76b42000 0x00055000
1961 14:50:43.288151 SMM BACKUP 13. 0x76b32000 0x00010000
1962 14:50:43.291315 4f444749 14. 0x76b30000 0x00002000
1963 14:50:43.294697 EXT VBT15. 0x76b2d000 0x0000219f
1964 14:50:43.297697 COREBOOT 16. 0x76b25000 0x00008000
1965 14:50:43.301056 ACPI 17. 0x76b01000 0x00024000
1966 14:50:43.304311 ACPI GNVS 18. 0x76b00000 0x00001000
1967 14:50:43.307648 RAMOOPS 19. 0x76a00000 0x00100000
1968 14:50:43.310919 TPM2 TCGLOG20. 0x769f0000 0x00010000
1969 14:50:43.317492 SMBIOS 21. 0x769ef000 0x00000800
1970 14:50:43.317580 IMD small region:
1971 14:50:43.320701 IMD ROOT 0. 0x76ffec00 0x00000400
1972 14:50:43.323988 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1973 14:50:43.330497 POWER STATE 2. 0x76ffeb80 0x00000044
1974 14:50:43.333746 ROMSTAGE 3. 0x76ffeb60 0x00000004
1975 14:50:43.337081 MEM INFO 4. 0x76ffe980 0x000001e0
1976 14:50:43.343405 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1977 14:50:43.347133 MTRR: Physical address space:
1978 14:50:43.353609 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1979 14:50:43.360196 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1980 14:50:43.363418 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1981 14:50:43.370464 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1982 14:50:43.376356 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1983 14:50:43.383006 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1984 14:50:43.389453 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1985 14:50:43.393031 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 14:50:43.399545 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 14:50:43.402833 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 14:50:43.405717 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 14:50:43.409519 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 14:50:43.416010 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 14:50:43.419537 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 14:50:43.422506 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 14:50:43.425726 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 14:50:43.432289 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 14:50:43.435584 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 14:50:43.438880 call enable_fixed_mtrr()
1997 14:50:43.442176 CPU physical address size: 39 bits
1998 14:50:43.445447 MTRR: default type WB/UC MTRR counts: 6/6.
1999 14:50:43.448697 MTRR: UC selected as default type.
2000 14:50:43.455420 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2001 14:50:43.461932 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2002 14:50:43.468411 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2003 14:50:43.475002 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2004 14:50:43.481794 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2005 14:50:43.488043 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2006 14:50:43.494535 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 14:50:43.497918 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 14:50:43.501146 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 14:50:43.504389 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 14:50:43.510819 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 14:50:43.514411 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 14:50:43.517389 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 14:50:43.520904 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 14:50:43.527421 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 14:50:43.530673 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 14:50:43.533911 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 14:50:43.533988
2018 14:50:43.537766 MTRR check
2019 14:50:43.540881 Fixed MTRRs : Enabled
2020 14:50:43.540974 Variable MTRRs: Enabled
2021 14:50:43.541054
2022 14:50:43.544222 call enable_fixed_mtrr()
2023 14:50:43.550856 BS: BS_WRITE_TABLES exit times (exec / console): 48 / 151 ms
2024 14:50:43.554064 CPU physical address size: 39 bits
2025 14:50:43.563874 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2026 14:50:43.566778 MTRR: Fixed MSR 0x250 0x0606060606060606
2027 14:50:43.569985 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 14:50:43.573321 MTRR: Fixed MSR 0x258 0x0606060606060606
2029 14:50:43.579946 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 14:50:43.583075 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 14:50:43.586274 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 14:50:43.589876 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 14:50:43.595921 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 14:50:43.599277 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 14:50:43.602781 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 14:50:43.605983 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 14:50:43.612834 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 14:50:43.616047 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 14:50:43.619578 MTRR: Fixed MSR 0x259 0x0000000000000000
2040 14:50:43.625609 MTRR: Fixed MSR 0x268 0x0606060606060606
2041 14:50:43.629279 MTRR: Fixed MSR 0x269 0x0606060606060606
2042 14:50:43.632786 MTRR: Fixed MSR 0x26a 0x0606060606060606
2043 14:50:43.635933 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 14:50:43.642299 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 14:50:43.645578 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 14:50:43.648855 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 14:50:43.652109 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 14:50:43.656747 call enable_fixed_mtrr()
2049 14:50:43.659413 call enable_fixed_mtrr()
2050 14:50:43.663183 Checking segment from ROM address 0xffc02b38
2051 14:50:43.669764 MTRR: Fixed MSR 0x250 0x0606060606060606
2052 14:50:43.672625 MTRR: Fixed MSR 0x250 0x0606060606060606
2053 14:50:43.676330 MTRR: Fixed MSR 0x258 0x0606060606060606
2054 14:50:43.679608 MTRR: Fixed MSR 0x259 0x0000000000000000
2055 14:50:43.686285 MTRR: Fixed MSR 0x268 0x0606060606060606
2056 14:50:43.689617 MTRR: Fixed MSR 0x269 0x0606060606060606
2057 14:50:43.692850 MTRR: Fixed MSR 0x26a 0x0606060606060606
2058 14:50:43.695931 MTRR: Fixed MSR 0x26b 0x0606060606060606
2059 14:50:43.702387 MTRR: Fixed MSR 0x26c 0x0606060606060606
2060 14:50:43.705481 MTRR: Fixed MSR 0x26d 0x0606060606060606
2061 14:50:43.708769 MTRR: Fixed MSR 0x26e 0x0606060606060606
2062 14:50:43.711949 MTRR: Fixed MSR 0x26f 0x0606060606060606
2063 14:50:43.719770 MTRR: Fixed MSR 0x258 0x0606060606060606
2064 14:50:43.719885 call enable_fixed_mtrr()
2065 14:50:43.726079 MTRR: Fixed MSR 0x259 0x0000000000000000
2066 14:50:43.729415 MTRR: Fixed MSR 0x268 0x0606060606060606
2067 14:50:43.732547 MTRR: Fixed MSR 0x269 0x0606060606060606
2068 14:50:43.735497 MTRR: Fixed MSR 0x26a 0x0606060606060606
2069 14:50:43.742052 MTRR: Fixed MSR 0x26b 0x0606060606060606
2070 14:50:43.745748 MTRR: Fixed MSR 0x26c 0x0606060606060606
2071 14:50:43.748887 MTRR: Fixed MSR 0x26d 0x0606060606060606
2072 14:50:43.752433 MTRR: Fixed MSR 0x26e 0x0606060606060606
2073 14:50:43.758960 MTRR: Fixed MSR 0x26f 0x0606060606060606
2074 14:50:43.762216 CPU physical address size: 39 bits
2075 14:50:43.765400 call enable_fixed_mtrr()
2076 14:50:43.768608 CPU physical address size: 39 bits
2077 14:50:43.772594 CPU physical address size: 39 bits
2078 14:50:43.779144 MTRR: Fixed MSR 0x250 0x0606060606060606
2079 14:50:43.782054 MTRR: Fixed MSR 0x250 0x0606060606060606
2080 14:50:43.785868 MTRR: Fixed MSR 0x258 0x0606060606060606
2081 14:50:43.789223 MTRR: Fixed MSR 0x259 0x0000000000000000
2082 14:50:43.795849 MTRR: Fixed MSR 0x268 0x0606060606060606
2083 14:50:43.799159 MTRR: Fixed MSR 0x269 0x0606060606060606
2084 14:50:43.802314 MTRR: Fixed MSR 0x26a 0x0606060606060606
2085 14:50:43.805515 MTRR: Fixed MSR 0x26b 0x0606060606060606
2086 14:50:43.811930 MTRR: Fixed MSR 0x26c 0x0606060606060606
2087 14:50:43.815382 MTRR: Fixed MSR 0x26d 0x0606060606060606
2088 14:50:43.818503 MTRR: Fixed MSR 0x26e 0x0606060606060606
2089 14:50:43.821786 MTRR: Fixed MSR 0x26f 0x0606060606060606
2090 14:50:43.829406 MTRR: Fixed MSR 0x258 0x0606060606060606
2091 14:50:43.829497 call enable_fixed_mtrr()
2092 14:50:43.836405 MTRR: Fixed MSR 0x259 0x0000000000000000
2093 14:50:43.839364 MTRR: Fixed MSR 0x268 0x0606060606060606
2094 14:50:43.842520 MTRR: Fixed MSR 0x269 0x0606060606060606
2095 14:50:43.846411 MTRR: Fixed MSR 0x26a 0x0606060606060606
2096 14:50:43.852502 MTRR: Fixed MSR 0x26b 0x0606060606060606
2097 14:50:43.856049 MTRR: Fixed MSR 0x26c 0x0606060606060606
2098 14:50:43.859251 MTRR: Fixed MSR 0x26d 0x0606060606060606
2099 14:50:43.862522 MTRR: Fixed MSR 0x26e 0x0606060606060606
2100 14:50:43.868946 MTRR: Fixed MSR 0x26f 0x0606060606060606
2101 14:50:43.872254 CPU physical address size: 39 bits
2102 14:50:43.875485 call enable_fixed_mtrr()
2103 14:50:43.878784 CPU physical address size: 39 bits
2104 14:50:43.882089 CPU physical address size: 39 bits
2105 14:50:43.888744 Checking segment from ROM address 0xffc02b54
2106 14:50:43.891803 Loading segment from ROM address 0xffc02b38
2107 14:50:43.894924 code (compression=0)
2108 14:50:43.901626 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2109 14:50:43.911459 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2110 14:50:43.914776 it's not compressed!
2111 14:50:44.052343 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2112 14:50:44.058949 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2113 14:50:44.065886 Loading segment from ROM address 0xffc02b54
2114 14:50:44.066003 Entry Point 0x30000000
2115 14:50:44.069035 Loaded segments
2116 14:50:44.075666 BS: BS_PAYLOAD_LOAD run times (exec / console): 455 / 64 ms
2117 14:50:44.118874 Finalizing chipset.
2118 14:50:44.122125 Finalizing SMM.
2119 14:50:44.122241 APMC done.
2120 14:50:44.128660 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2121 14:50:44.132061 mp_park_aps done after 0 msecs.
2122 14:50:44.135290 Jumping to boot code at 0x30000000(0x76b25000)
2123 14:50:44.144788 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2124 14:50:44.144876
2125 14:50:44.148114
2126 14:50:44.148191
2127 14:50:44.151329 Starting depthcharge on Voema...
2128 14:50:44.151407
2129 14:50:44.151750 end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
2130 14:50:44.151847 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
2131 14:50:44.151932 Setting prompt string to ['volteer:']
2132 14:50:44.152017 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
2133 14:50:44.157781 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2134 14:50:44.157877
2135 14:50:44.164713 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2136 14:50:44.164803
2137 14:50:44.171078 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2138 14:50:44.171156
2139 14:50:44.174473 Failed to find eMMC card reader
2140 14:50:44.174547
2141 14:50:44.177425 Wipe memory regions:
2142 14:50:44.177496
2143 14:50:44.181017 [0x00000000001000, 0x000000000a0000)
2144 14:50:44.181094
2145 14:50:44.184210 [0x00000000100000, 0x00000030000000)
2146 14:50:44.210141
2147 14:50:44.213279 [0x00000032662db0, 0x000000769ef000)
2148 14:50:44.248596
2149 14:50:44.251789 [0x00000100000000, 0x00000280400000)
2150 14:50:44.451369
2151 14:50:44.454566 ec_init: CrosEC protocol v3 supported (256, 256)
2152 14:50:44.454687
2153 14:50:44.461129 update_port_state: port C0 state: usb enable 1 mux conn 0
2154 14:50:44.461214
2155 14:50:44.471332 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2156 14:50:44.474482
2157 14:50:44.477345 pmc_check_ipc_sts: STS_BUSY done after 1632 us
2158 14:50:44.477419
2159 14:50:44.480400 send_conn_disc_msg: pmc_send_cmd succeeded
2160 14:50:44.912247
2161 14:50:44.912378 R8152: Initializing
2162 14:50:44.912446
2163 14:50:44.915445 Version 6 (ocp_data = 5c30)
2164 14:50:44.915527
2165 14:50:44.919195 R8152: Done initializing
2166 14:50:44.919269
2167 14:50:44.922527 Adding net device
2168 14:50:45.223755
2169 14:50:45.226406 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2170 14:50:45.226539
2171 14:50:45.226640
2172 14:50:45.229853 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2174 14:50:45.330228 volteer: tftpboot 192.168.201.1 14064524/tftp-deploy-90s2nh3s/kernel/bzImage 14064524/tftp-deploy-90s2nh3s/kernel/cmdline 14064524/tftp-deploy-90s2nh3s/ramdisk/ramdisk.cpio.gz
2175 14:50:45.330415 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2176 14:50:45.330530 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
2177 14:50:45.334852 tftpboot 192.168.201.1 14064524/tftp-deploy-90s2nh3s/kernel/bzIploy-90s2nh3s/kernel/cmdline 14064524/tftp-deploy-90s2nh3s/ramdisk/ramdisk.cpio.gz
2178 14:50:45.334939
2179 14:50:45.335003 Waiting for link
2180 14:50:45.538178
2181 14:50:45.538344 done.
2182 14:50:45.538427
2183 14:50:45.538487 MAC: 00:24:32:30:79:42
2184 14:50:45.538546
2185 14:50:45.541996 Sending DHCP discover... done.
2186 14:50:45.542095
2187 14:50:45.545079 Waiting for reply... done.
2188 14:50:45.545168
2189 14:50:45.548365 Sending DHCP request... done.
2190 14:50:45.548480
2191 14:50:45.584568 Waiting for reply... done.
2192 14:50:45.584691
2193 14:50:45.584767 My ip is 192.168.201.13
2194 14:50:45.584831
2195 14:50:45.588093 The DHCP server ip is 192.168.201.1
2196 14:50:45.591258
2197 14:50:45.594420 TFTP server IP predefined by user: 192.168.201.1
2198 14:50:45.594538
2199 14:50:45.601070 Bootfile predefined by user: 14064524/tftp-deploy-90s2nh3s/kernel/bzImage
2200 14:50:45.601153
2201 14:50:45.604845 Sending tftp read request... done.
2202 14:50:45.604927
2203 14:50:45.611196 Waiting for the transfer...
2204 14:50:45.611281
2205 14:50:46.133465 00000000 ################################################################
2206 14:50:46.133597
2207 14:50:46.670753 00080000 ################################################################
2208 14:50:46.670893
2209 14:50:47.211245 00100000 ################################################################
2210 14:50:47.211381
2211 14:50:47.756872 00180000 ################################################################
2212 14:50:47.757043
2213 14:50:48.303943 00200000 ################################################################
2214 14:50:48.304086
2215 14:50:48.857945 00280000 ################################################################
2216 14:50:48.858089
2217 14:50:49.399887 00300000 ################################################################
2218 14:50:49.400037
2219 14:50:49.957284 00380000 ################################################################
2220 14:50:49.957443
2221 14:50:50.489808 00400000 ################################################################
2222 14:50:50.489951
2223 14:50:51.022465 00480000 ################################################################
2224 14:50:51.022636
2225 14:50:51.530207 00500000 ################################################################
2226 14:50:51.530366
2227 14:50:52.049174 00580000 ################################################################
2228 14:50:52.049314
2229 14:50:52.584960 00600000 ################################################################
2230 14:50:52.585107
2231 14:50:53.121857 00680000 ################################################################
2232 14:50:53.121995
2233 14:50:53.674449 00700000 ################################################################
2234 14:50:53.674589
2235 14:50:54.229166 00780000 ################################################################
2236 14:50:54.229379
2237 14:50:54.790685 00800000 ################################################################
2238 14:50:54.790851
2239 14:50:55.342727 00880000 ################################################################
2240 14:50:55.342868
2241 14:50:55.921244 00900000 ################################################################
2242 14:50:55.921381
2243 14:50:56.487075 00980000 ################################################################
2244 14:50:56.487211
2245 14:50:57.052136 00a00000 ################################################################
2246 14:50:57.052274
2247 14:50:57.606913 00a80000 ################################################################
2248 14:50:57.607058
2249 14:50:58.163329 00b00000 ################################################################
2250 14:50:58.163470
2251 14:50:58.719873 00b80000 ################################################################
2252 14:50:58.720017
2253 14:50:59.310300 00c00000 ################################################################
2254 14:50:59.310453
2255 14:50:59.887993 00c80000 ################################################################
2256 14:50:59.888159
2257 14:51:00.468270 00d00000 ################################################################
2258 14:51:00.468415
2259 14:51:01.066769 00d80000 ################################################################
2260 14:51:01.066910
2261 14:51:01.636740 00e00000 ################################################################
2262 14:51:01.636899
2263 14:51:02.259476 00e80000 ################################################################
2264 14:51:02.259610
2265 14:51:02.930368 00f00000 ################################################################
2266 14:51:02.930543
2267 14:51:03.574353 00f80000 ################################################################
2268 14:51:03.574508
2269 14:51:03.976736 01000000 ########################################### done.
2270 14:51:03.976889
2271 14:51:03.979676 The bootfile was 17121280 bytes long.
2272 14:51:03.979759
2273 14:51:03.983320 Sending tftp read request... done.
2274 14:51:03.983424
2275 14:51:03.986347 Waiting for the transfer...
2276 14:51:03.986430
2277 14:51:04.559485 00000000 ################################################################
2278 14:51:04.559626
2279 14:51:05.131501 00080000 ################################################################
2280 14:51:05.131644
2281 14:51:05.699461 00100000 ################################################################
2282 14:51:05.699612
2283 14:51:06.293649 00180000 ################################################################
2284 14:51:06.294365
2285 14:51:06.933062 00200000 ################################################################
2286 14:51:06.933214
2287 14:51:07.617874 00280000 ################################################################
2288 14:51:07.618023
2289 14:51:08.278555 00300000 ################################################################
2290 14:51:08.279066
2291 14:51:08.850067 00380000 ################################################################
2292 14:51:08.850259
2293 14:51:09.382353 00400000 ################################################################
2294 14:51:09.382506
2295 14:51:09.969356 00480000 ################################################################
2296 14:51:09.969875
2297 14:51:10.571132 00500000 ################################################################
2298 14:51:10.571314
2299 14:51:11.210858 00580000 ################################################################
2300 14:51:11.211369
2301 14:51:11.848997 00600000 ################################################################
2302 14:51:11.849139
2303 14:51:12.484226 00680000 ################################################################
2304 14:51:12.484734
2305 14:51:13.155877 00700000 ################################################################
2306 14:51:13.156419
2307 14:51:13.676005 00780000 ######################################################## done.
2308 14:51:13.676580
2309 14:51:13.679401 Sending tftp read request... done.
2310 14:51:13.680036
2311 14:51:13.682763 Waiting for the transfer...
2312 14:51:13.683189
2313 14:51:13.685832 00000000 # done.
2314 14:51:13.686306
2315 14:51:13.692849 Command line loaded dynamically from TFTP file: 14064524/tftp-deploy-90s2nh3s/kernel/cmdline
2316 14:51:13.693279
2317 14:51:13.718773 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14064524/extract-nfsrootfs-z4i1gwo1,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
2318 14:51:13.725118
2319 14:51:13.727954 Shutting down all USB controllers.
2320 14:51:13.728422
2321 14:51:13.728784 Removing current net device
2322 14:51:13.729145
2323 14:51:13.731621 Finalizing coreboot
2324 14:51:13.732088
2325 14:51:13.738384 Exiting depthcharge with code 4 at timestamp: 38244008
2326 14:51:13.738805
2327 14:51:13.739138
2328 14:51:13.739449 Starting kernel ...
2329 14:51:13.739752
2330 14:51:13.740042
2331 14:51:13.741369 end: 2.2.4 bootloader-commands (duration 00:00:30) [common]
2332 14:51:13.741839 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2333 14:51:13.742232 Setting prompt string to ['Linux version [0-9]']
2334 14:51:13.742580 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2335 14:51:13.742931 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2337 14:55:30.742369 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2339 14:55:30.742612 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2341 14:55:30.742782 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2344 14:55:30.743042 end: 2 depthcharge-action (duration 00:05:00) [common]
2346 14:55:30.743370 Cleaning after the job
2347 14:55:30.743485 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064524/tftp-deploy-90s2nh3s/ramdisk
2348 14:55:30.744474 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064524/tftp-deploy-90s2nh3s/kernel
2349 14:55:30.746504 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064524/tftp-deploy-90s2nh3s/nfsrootfs
2350 14:55:30.829720 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064524/tftp-deploy-90s2nh3s/modules
2351 14:55:30.830955 start: 4.1 power-off (timeout 00:00:30) [common]
2352 14:55:30.831136 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-8', '--port=1', '--command=off']
2353 14:55:31.738939 >> Command sent successfully.
2354 14:55:31.741183 Returned 0 in 0 seconds
2355 14:55:31.841577 end: 4.1 power-off (duration 00:00:01) [common]
2357 14:55:31.841899 start: 4.2 read-feedback (timeout 00:09:59) [common]
2358 14:55:31.842164 Listened to connection for namespace 'common' for up to 1s
2360 14:55:31.842541 Listened to connection for namespace 'common' for up to 1s
2361 14:55:32.842452 Finalising connection for namespace 'common'
2362 14:55:32.843308 Disconnecting from shell: Finalise
2363 14:55:32.843753
2364 14:55:32.944950 end: 4.2 read-feedback (duration 00:00:01) [common]
2365 14:55:32.945588 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14064524
2366 14:55:33.408191 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14064524
2367 14:55:33.408387 JobError: Your job cannot terminate cleanly.