Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 14:50:05.578548 lava-dispatcher, installed at version: 2024.03
2 14:50:05.578730 start: 0 validate
3 14:50:05.578829 Start time: 2024-05-28 14:50:05.578824+00:00 (UTC)
4 14:50:05.578938 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:50:05.579050 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 14:50:05.832868 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:50:05.833486 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.312-cip109-160-gd72fa2f84aefe%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:50:06.093672 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:50:06.094504 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:50:06.096770 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:50:06.096875 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.19.y-cip-rc%2Fv4.19.312-cip109-160-gd72fa2f84aefe%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 14:50:07.100044 validate duration: 1.52
14 14:50:07.100289 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:50:07.100387 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:50:07.100464 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:50:07.100609 Not decompressing ramdisk as can be used compressed.
18 14:50:07.100690 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/initrd.cpio.gz
19 14:50:07.100750 saving as /var/lib/lava/dispatcher/tmp/14064485/tftp-deploy-xu8uiabu/ramdisk/initrd.cpio.gz
20 14:50:07.100810 total size: 6137763 (5 MB)
21 14:50:07.101658 progress 0 % (0 MB)
22 14:50:07.103046 progress 5 % (0 MB)
23 14:50:07.104129 progress 10 % (0 MB)
24 14:50:07.105379 progress 15 % (0 MB)
25 14:50:07.106430 progress 20 % (1 MB)
26 14:50:07.107494 progress 25 % (1 MB)
27 14:50:07.108655 progress 30 % (1 MB)
28 14:50:07.109718 progress 35 % (2 MB)
29 14:50:07.110754 progress 40 % (2 MB)
30 14:50:07.111939 progress 45 % (2 MB)
31 14:50:07.112995 progress 50 % (2 MB)
32 14:50:07.114145 progress 55 % (3 MB)
33 14:50:07.115171 progress 60 % (3 MB)
34 14:50:07.116222 progress 65 % (3 MB)
35 14:50:07.117479 progress 70 % (4 MB)
36 14:50:07.118520 progress 75 % (4 MB)
37 14:50:07.119557 progress 80 % (4 MB)
38 14:50:07.120688 progress 85 % (5 MB)
39 14:50:07.121750 progress 90 % (5 MB)
40 14:50:07.122835 progress 95 % (5 MB)
41 14:50:07.124010 progress 100 % (5 MB)
42 14:50:07.124123 5 MB downloaded in 0.02 s (251.17 MB/s)
43 14:50:07.124253 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:50:07.124450 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:50:07.124516 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:50:07.124581 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:50:07.124713 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.312-cip109-160-gd72fa2f84aefe/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 14:50:07.124767 saving as /var/lib/lava/dispatcher/tmp/14064485/tftp-deploy-xu8uiabu/kernel/bzImage
50 14:50:07.124812 total size: 17121280 (16 MB)
51 14:50:07.124856 No compression specified
52 14:50:07.125748 progress 0 % (0 MB)
53 14:50:07.128772 progress 5 % (0 MB)
54 14:50:07.131664 progress 10 % (1 MB)
55 14:50:07.134613 progress 15 % (2 MB)
56 14:50:07.137514 progress 20 % (3 MB)
57 14:50:07.140544 progress 25 % (4 MB)
58 14:50:07.143482 progress 30 % (4 MB)
59 14:50:07.146393 progress 35 % (5 MB)
60 14:50:07.149332 progress 40 % (6 MB)
61 14:50:07.152381 progress 45 % (7 MB)
62 14:50:07.155320 progress 50 % (8 MB)
63 14:50:07.158341 progress 55 % (9 MB)
64 14:50:07.161278 progress 60 % (9 MB)
65 14:50:07.164272 progress 65 % (10 MB)
66 14:50:07.167308 progress 70 % (11 MB)
67 14:50:07.170170 progress 75 % (12 MB)
68 14:50:07.173127 progress 80 % (13 MB)
69 14:50:07.176232 progress 85 % (13 MB)
70 14:50:07.179169 progress 90 % (14 MB)
71 14:50:07.182089 progress 95 % (15 MB)
72 14:50:07.184986 progress 100 % (16 MB)
73 14:50:07.185137 16 MB downloaded in 0.06 s (270.69 MB/s)
74 14:50:07.185265 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:50:07.185436 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:50:07.185528 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:50:07.185587 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:50:07.185700 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/full.rootfs.tar.xz
80 14:50:07.185753 saving as /var/lib/lava/dispatcher/tmp/14064485/tftp-deploy-xu8uiabu/nfsrootfs/full.rootfs.tar
81 14:50:07.185801 total size: 58462052 (55 MB)
82 14:50:07.185844 Using unxz to decompress xz
83 14:50:07.187049 progress 0 % (0 MB)
84 14:50:07.317638 progress 5 % (2 MB)
85 14:50:07.455124 progress 10 % (5 MB)
86 14:50:07.592780 progress 15 % (8 MB)
87 14:50:07.710762 progress 20 % (11 MB)
88 14:50:07.845885 progress 25 % (13 MB)
89 14:50:07.979991 progress 30 % (16 MB)
90 14:50:08.088033 progress 35 % (19 MB)
91 14:50:08.146912 progress 40 % (22 MB)
92 14:50:08.275013 progress 45 % (25 MB)
93 14:50:08.412679 progress 50 % (27 MB)
94 14:50:08.541116 progress 55 % (30 MB)
95 14:50:08.678265 progress 60 % (33 MB)
96 14:50:08.818987 progress 65 % (36 MB)
97 14:50:08.955735 progress 70 % (39 MB)
98 14:50:09.104997 progress 75 % (41 MB)
99 14:50:09.229159 progress 80 % (44 MB)
100 14:50:09.356378 progress 85 % (47 MB)
101 14:50:09.500615 progress 90 % (50 MB)
102 14:50:09.646398 progress 95 % (52 MB)
103 14:50:09.791357 progress 100 % (55 MB)
104 14:50:09.795443 55 MB downloaded in 2.61 s (21.36 MB/s)
105 14:50:09.795626 end: 1.3.1 http-download (duration 00:00:03) [common]
107 14:50:09.795827 end: 1.3 download-retry (duration 00:00:03) [common]
108 14:50:09.795895 start: 1.4 download-retry (timeout 00:09:57) [common]
109 14:50:09.795963 start: 1.4.1 http-download (timeout 00:09:57) [common]
110 14:50:09.796079 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.19.y-cip-rc/v4.19.312-cip109-160-gd72fa2f84aefe/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 14:50:09.796132 saving as /var/lib/lava/dispatcher/tmp/14064485/tftp-deploy-xu8uiabu/modules/modules.tar
112 14:50:09.796175 total size: 1253532 (1 MB)
113 14:50:09.796220 Using unxz to decompress xz
114 14:50:09.797376 progress 2 % (0 MB)
115 14:50:09.797677 progress 7 % (0 MB)
116 14:50:09.801101 progress 13 % (0 MB)
117 14:50:09.804547 progress 18 % (0 MB)
118 14:50:09.808047 progress 23 % (0 MB)
119 14:50:09.811166 progress 28 % (0 MB)
120 14:50:09.814659 progress 33 % (0 MB)
121 14:50:09.818530 progress 39 % (0 MB)
122 14:50:09.821902 progress 44 % (0 MB)
123 14:50:09.824833 progress 49 % (0 MB)
124 14:50:09.828409 progress 54 % (0 MB)
125 14:50:09.831660 progress 60 % (0 MB)
126 14:50:09.835314 progress 65 % (0 MB)
127 14:50:09.838702 progress 70 % (0 MB)
128 14:50:09.841668 progress 75 % (0 MB)
129 14:50:09.845018 progress 81 % (0 MB)
130 14:50:09.848806 progress 86 % (1 MB)
131 14:50:09.852105 progress 91 % (1 MB)
132 14:50:09.855667 progress 96 % (1 MB)
133 14:50:09.863976 1 MB downloaded in 0.07 s (17.63 MB/s)
134 14:50:09.864164 end: 1.4.1 http-download (duration 00:00:00) [common]
136 14:50:09.864364 end: 1.4 download-retry (duration 00:00:00) [common]
137 14:50:09.864432 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
138 14:50:09.864497 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
139 14:50:10.650008 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14064485/extract-nfsrootfs-j06keezc
140 14:50:10.650179 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
141 14:50:10.650270 start: 1.5.2 lava-overlay (timeout 00:09:56) [common]
142 14:50:10.650404 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp
143 14:50:10.650509 makedir: /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin
144 14:50:10.650587 makedir: /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/tests
145 14:50:10.650658 makedir: /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/results
146 14:50:10.650728 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-add-keys
147 14:50:10.650830 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-add-sources
148 14:50:10.650929 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-background-process-start
149 14:50:10.651021 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-background-process-stop
150 14:50:10.651120 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-common-functions
151 14:50:10.651218 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-echo-ipv4
152 14:50:10.651308 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-install-packages
153 14:50:10.651395 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-installed-packages
154 14:50:10.651482 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-os-build
155 14:50:10.651568 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-probe-channel
156 14:50:10.651655 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-probe-ip
157 14:50:10.651747 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-target-ip
158 14:50:10.651830 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-target-mac
159 14:50:10.651915 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-target-storage
160 14:50:10.652002 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-test-case
161 14:50:10.652088 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-test-event
162 14:50:10.652173 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-test-feedback
163 14:50:10.652256 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-test-raise
164 14:50:10.652340 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-test-reference
165 14:50:10.652424 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-test-runner
166 14:50:10.652509 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-test-set
167 14:50:10.652624 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-test-shell
168 14:50:10.652721 Updating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-install-packages (oe)
169 14:50:10.652836 Updating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/bin/lava-installed-packages (oe)
170 14:50:10.652921 Creating /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/environment
171 14:50:10.652992 LAVA metadata
172 14:50:10.653047 - LAVA_JOB_ID=14064485
173 14:50:10.653094 - LAVA_DISPATCHER_IP=192.168.201.1
174 14:50:10.653183 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:56) [common]
175 14:50:10.653242 skipped lava-vland-overlay
176 14:50:10.653305 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
177 14:50:10.653366 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:56) [common]
178 14:50:10.653414 skipped lava-multinode-overlay
179 14:50:10.653466 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
180 14:50:10.653520 start: 1.5.2.3 test-definition (timeout 00:09:56) [common]
181 14:50:10.653572 Loading test definitions
182 14:50:10.653633 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:56) [common]
183 14:50:10.653681 Using /lava-14064485 at stage 0
184 14:50:10.653930 uuid=14064485_1.5.2.3.1 testdef=None
185 14:50:10.653995 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
186 14:50:10.654053 start: 1.5.2.3.2 test-overlay (timeout 00:09:56) [common]
187 14:50:10.654410 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
189 14:50:10.654570 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:56) [common]
190 14:50:10.655018 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
192 14:50:10.655191 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:56) [common]
193 14:50:10.655614 runner path: /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/0/tests/0_wifi-basic test_uuid 14064485_1.5.2.3.1
194 14:50:10.655734 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
196 14:50:10.655886 Creating lava-test-runner.conf files
197 14:50:10.655928 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14064485/lava-overlay-yqddgivp/lava-14064485/0 for stage 0
198 14:50:10.655987 - 0_wifi-basic
199 14:50:10.656058 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
200 14:50:10.656120 start: 1.5.2.4 compress-overlay (timeout 00:09:56) [common]
201 14:50:10.660496 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
202 14:50:10.660606 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:56) [common]
203 14:50:10.660673 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
204 14:50:10.660737 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
205 14:50:10.660802 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:56) [common]
206 14:50:10.766119 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
207 14:50:10.766326 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
208 14:50:10.766430 extracting modules file /var/lib/lava/dispatcher/tmp/14064485/tftp-deploy-xu8uiabu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14064485/extract-nfsrootfs-j06keezc
209 14:50:10.800201 extracting modules file /var/lib/lava/dispatcher/tmp/14064485/tftp-deploy-xu8uiabu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14064485/extract-overlay-ramdisk-v8447ofk/ramdisk
210 14:50:10.823053 end: 1.5.4 extract-modules (duration 00:00:00) [common]
211 14:50:10.823201 start: 1.5.5 apply-overlay-tftp (timeout 00:09:56) [common]
212 14:50:10.823285 [common] Applying overlay to NFS
213 14:50:10.823343 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14064485/compress-overlay-kwzbeonq/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14064485/extract-nfsrootfs-j06keezc
214 14:50:10.827618 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
215 14:50:10.827715 start: 1.5.6 configure-preseed-file (timeout 00:09:56) [common]
216 14:50:10.827795 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
217 14:50:10.827869 start: 1.5.7 compress-ramdisk (timeout 00:09:56) [common]
218 14:50:10.827932 Building ramdisk /var/lib/lava/dispatcher/tmp/14064485/extract-overlay-ramdisk-v8447ofk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14064485/extract-overlay-ramdisk-v8447ofk/ramdisk
219 14:50:10.874757 >> 43506 blocks
220 14:50:11.614949 rename /var/lib/lava/dispatcher/tmp/14064485/extract-overlay-ramdisk-v8447ofk/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14064485/tftp-deploy-xu8uiabu/ramdisk/ramdisk.cpio.gz
221 14:50:11.615129 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
222 14:50:11.615239 start: 1.5.8 prepare-kernel (timeout 00:09:55) [common]
223 14:50:11.615317 start: 1.5.8.1 prepare-fit (timeout 00:09:55) [common]
224 14:50:11.615383 No mkimage arch provided, not using FIT.
225 14:50:11.615452 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
226 14:50:11.615524 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
227 14:50:11.615597 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
228 14:50:11.615667 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:55) [common]
229 14:50:11.615721 No LXC device requested
230 14:50:11.615788 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 14:50:11.615867 start: 1.7 deploy-device-env (timeout 00:09:55) [common]
232 14:50:11.615938 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 14:50:11.616013 Checking files for TFTP limit of 4294967296 bytes.
234 14:50:11.616288 end: 1 tftp-deploy (duration 00:00:05) [common]
235 14:50:11.616363 start: 2 depthcharge-action (timeout 00:05:00) [common]
236 14:50:11.616424 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
237 14:50:11.616499 substitutions:
238 14:50:11.616547 - {DTB}: None
239 14:50:11.616590 - {INITRD}: 14064485/tftp-deploy-xu8uiabu/ramdisk/ramdisk.cpio.gz
240 14:50:11.616633 - {KERNEL}: 14064485/tftp-deploy-xu8uiabu/kernel/bzImage
241 14:50:11.616697 - {LAVA_MAC}: None
242 14:50:11.616747 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14064485/extract-nfsrootfs-j06keezc
243 14:50:11.616797 - {NFS_SERVER_IP}: 192.168.201.1
244 14:50:11.616846 - {PRESEED_CONFIG}: None
245 14:50:11.616903 - {PRESEED_LOCAL}: None
246 14:50:11.616953 - {RAMDISK}: 14064485/tftp-deploy-xu8uiabu/ramdisk/ramdisk.cpio.gz
247 14:50:11.617004 - {ROOT_PART}: None
248 14:50:11.617057 - {ROOT}: None
249 14:50:11.617100 - {SERVER_IP}: 192.168.201.1
250 14:50:11.617139 - {TEE}: None
251 14:50:11.617177 Parsed boot commands:
252 14:50:11.617214 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
253 14:50:11.617340 Parsed boot commands: tftpboot 192.168.201.1 14064485/tftp-deploy-xu8uiabu/kernel/bzImage 14064485/tftp-deploy-xu8uiabu/kernel/cmdline 14064485/tftp-deploy-xu8uiabu/ramdisk/ramdisk.cpio.gz
254 14:50:11.617415 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
255 14:50:11.617486 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
256 14:50:11.617556 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
257 14:50:11.617623 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
258 14:50:11.617673 Not connected, no need to disconnect.
259 14:50:11.617737 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
260 14:50:11.617803 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
261 14:50:11.617870 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-3'
262 14:50:11.621198 Setting prompt string to ['lava-test: # ']
263 14:50:11.621449 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
264 14:50:11.621546 end: 2.2.1 reset-connection (duration 00:00:00) [common]
265 14:50:11.621629 start: 2.2.2 reset-device (timeout 00:05:00) [common]
266 14:50:11.621704 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
267 14:50:11.621849 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cbv514-1h-34uz-brya-cbg-3']
268 14:50:25.043305 Returned 0 in 13 seconds
269 14:50:25.143940 end: 2.2.2.1 pdu-reboot (duration 00:00:14) [common]
271 14:50:25.145031 end: 2.2.2 reset-device (duration 00:00:14) [common]
272 14:50:25.145393 start: 2.2.3 depthcharge-start (timeout 00:04:46) [common]
273 14:50:25.145679 Setting prompt string to 'Starting depthcharge on Volmar...'
274 14:50:25.145902 Changing prompt to 'Starting depthcharge on Volmar...'
275 14:50:25.146129 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
276 14:50:25.147269 [Enter `^Ec?' for help]
277 14:50:25.147554
278 14:50:25.147762
279 14:50:25.147953 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
280 14:50:25.148147 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
281 14:50:25.148339 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
282 14:50:25.148536 CPU: AES supported, TXT NOT supported, VT supported
283 14:50:25.148699 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
284 14:50:25.148740 Cache size = 10 MiB
285 14:50:25.148779 MCH: device id 4609 (rev 04) is Alderlake-P
286 14:50:25.148819 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
287 14:50:25.148860 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
288 14:50:25.148899 VBOOT: Loading verstage.
289 14:50:25.148936 FMAP: Found "FLASH" version 1.1 at 0x1804000.
290 14:50:25.148975 FMAP: base = 0x0 size = 0x2000000 #areas = 37
291 14:50:25.149015 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
292 14:50:25.149054 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
293 14:50:25.149093 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
294 14:50:25.149132
295 14:50:25.149174
296 14:50:25.149212 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
297 14:50:25.149251 Probing TPM I2C: I2C bus 1 version 0x3230302a
298 14:50:25.149289 DW I2C bus 1 at 0xfe022000 (400 KHz)
299 14:50:25.149327 done! DID_VID 0x00281ae0
300 14:50:25.149403 TPM ready after 0 ms
301 14:50:25.149446 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
302 14:50:25.149486 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
303 14:50:25.149526 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
304 14:50:25.149565 tlcl_send_startup: Startup return code is 0
305 14:50:25.149605 TPM: setup succeeded
306 14:50:25.149644 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
307 14:50:25.149683 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
308 14:50:25.149721 Chrome EC: UHEPI supported
309 14:50:25.149759 Reading cr50 boot mode
310 14:50:25.149797 Cr50 says boot_mode is VERIFIED_RW(0x00).
311 14:50:25.149834 Phase 1
312 14:50:25.149873 FMAP: area GBB found @ 1805000 (458752 bytes)
313 14:50:25.149912 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
314 14:50:25.149950 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
315 14:50:25.149989 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
316 14:50:25.150027 VB2:vb2_check_recovery() Recovery was requested manually
317 14:50:25.150066 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
318 14:50:25.150105 Recovery requested (1009000e)
319 14:50:25.150144 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
320 14:50:25.150183 tlcl_extend: response is 0
321 14:50:25.150222 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
322 14:50:25.150261 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
323 14:50:25.150300 tlcl_extend: response is 0
324 14:50:25.150338 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
325 14:50:25.150376 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 14:50:25.150415 CBFS: Found 'fallback/romstage' @0x80 size 0x1d810 in mcache @0xfef8562c
327 14:50:25.150455 BS: verstage times (exec / console): total (unknown) / 149 ms
328 14:50:25.150493
329 14:50:25.150532
330 14:50:25.150570 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
331 14:50:25.150610 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 14:50:25.150648 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 14:50:25.150686 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
334 14:50:25.150725 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 14:50:25.150762 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
336 14:50:25.150800 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
337 14:50:25.150840 TCO_STS: 0000 0000
338 14:50:25.150879 GEN_PMCON: d0015038 00002200
339 14:50:25.150917 GBLRST_CAUSE: 00000000 00000000
340 14:50:25.150955 HPR_CAUSE0: 00000000
341 14:50:25.150993 prev_sleep_state 5
342 14:50:25.151031 Abort disabling TXT, as CPU is not TXT capable.
343 14:50:25.151070 cse_lite: Skip switching to RW in the recovery path
344 14:50:25.151108 Boot Count incremented to 2736
345 14:50:25.151146 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
346 14:50:25.151191 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
347 14:50:25.151230 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
348 14:50:25.151270 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef8589c
349 14:50:25.151308 Chrome EC: UHEPI supported
350 14:50:25.151347 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
351 14:50:25.151386 Probing TPM I2C: done! DID_VID 0x00281ae0
352 14:50:25.151424 Locality already claimed
353 14:50:25.151462 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
354 14:50:25.151499 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
355 14:50:25.151537 MRC: Hash idx 0x100b comparison successful.
356 14:50:25.151574 MRC cache found, size f6c8
357 14:50:25.151612 bootmode is set to: 2
358 14:50:25.151649 EC returned error result code 3
359 14:50:25.151687 FW_CONFIG value from CBI is 0x131
360 14:50:25.151726 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
361 14:50:25.151766 SPD index = 0
362 14:50:25.151805 CBFS: Found 'spd.bin' @0x78480 size 0x400 in mcache @0xfef857c8
363 14:50:25.151848 SPD: module type is LPDDR4X
364 14:50:25.151896 SPD: module part number is K4U6E3S4AB-MGCL
365 14:50:25.151937 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
366 14:50:25.151977 SPD: device width 16 bits, bus width 16 bits
367 14:50:25.152203 SPD: module size is 1024 MB (per channel)
368 14:50:25.152253 CBMEM:
369 14:50:25.152294 IMD: root @ 0x76fff000 254 entries.
370 14:50:25.152333 IMD: root @ 0x76ffec00 62 entries.
371 14:50:25.152371 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
372 14:50:25.152410 RO_VPD is uninitialized or empty.
373 14:50:25.152449 FMAP: area RW_VPD found @ f29000 (8192 bytes)
374 14:50:25.152488 External stage cache:
375 14:50:25.152526 IMD: root @ 0x7bbff000 254 entries.
376 14:50:25.152563 IMD: root @ 0x7bbfec00 62 entries.
377 14:50:25.152602 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
378 14:50:25.152641 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
379 14:50:25.152680 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
380 14:50:25.152719 MRC: 'RECOVERY_MRC_CACHE' does not need update.
381 14:50:25.152758 8 DIMMs found
382 14:50:25.152799 SMM Memory Map
383 14:50:25.152838 SMRAM : 0x7b800000 0x800000
384 14:50:25.152878 Subregion 0: 0x7b800000 0x200000
385 14:50:25.152918 Subregion 1: 0x7ba00000 0x200000
386 14:50:25.152956 Subregion 2: 0x7bc00000 0x400000
387 14:50:25.152995 top_of_ram = 0x77000000
388 14:50:25.153033 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
389 14:50:25.153072 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
390 14:50:25.153111 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
391 14:50:25.153149 MTRR Range: Start=ff000000 End=0 (Size 1000000)
392 14:50:25.153187 Normal boot
393 14:50:25.153226 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef85910
394 14:50:25.153265 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x50e8 memsize: 0xa4a0
395 14:50:25.153303 Processing 237 relocs. Offset value of 0x74aba000
396 14:50:25.153340 BS: romstage times (exec / console): total (unknown) / 280 ms
397 14:50:25.153379
398 14:50:25.153417
399 14:50:25.153455 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
400 14:50:25.153493 Normal boot
401 14:50:25.153531 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
402 14:50:25.153569 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
403 14:50:25.153608 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
404 14:50:25.153647 CBFS: Found 'fallback/ramstage' @0x52e00 size 0x24b33 in mcache @0x76add10c
405 14:50:25.153686 Loading module at 0x76a30000 with entry 0x76a30000. filesize: 0x51f70 memsize: 0x880d0
406 14:50:25.153725 Processing 5931 relocs. Offset value of 0x72a30000
407 14:50:25.153764 BS: postcar times (exec / console): total (unknown) / 51 ms
408 14:50:25.153802
409 14:50:25.153839
410 14:50:25.153876 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
411 14:50:25.153915 Reserving BERT start 76a1f000, size 10000
412 14:50:25.153953 Normal boot
413 14:50:25.153991 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
414 14:50:25.154030 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
415 14:50:25.154068 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
416 14:50:25.154106 FMAP: area RW_VPD found @ f29000 (8192 bytes)
417 14:50:25.154145 Google Chrome EC: version:
418 14:50:25.154184 ro: volmar_v2.0.14126-e605144e9c
419 14:50:25.154222 rw: volmar_v0.0.55-22d1557
420 14:50:25.154260 running image: 1
421 14:50:25.154299 ACPI _SWS is PM1 Index 8 GPE Index -1
422 14:50:25.154337 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
423 14:50:25.154376 EC returned error result code 3
424 14:50:25.154414 FW_CONFIG value from CBI is 0x131
425 14:50:25.154452 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
426 14:50:25.154491 PCI: 00:1c.2 disabled by fw_config
427 14:50:25.154529 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
428 14:50:25.154567 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
429 14:50:25.154606 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
430 14:50:25.154645 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
431 14:50:25.154684 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
432 14:50:25.154724 CBFS: Found 'cpu_microcode_blob.bin' @0x1d940 size 0x35400 in mcache @0x76add0ac
433 14:50:25.154762 microcode: sig=0x906a4 pf=0x80 revision=0x423
434 14:50:25.154801 microcode: Update skipped, already up-to-date
435 14:50:25.154839 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add2dc
436 14:50:25.154878 Detected 6 core, 8 thread CPU.
437 14:50:25.154915 Setting up SMI for CPU
438 14:50:25.154952 IED base = 0x7bc00000
439 14:50:25.154990 IED size = 0x00400000
440 14:50:25.155028 Will perform SMM setup.
441 14:50:25.155065 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
442 14:50:25.155103 LAPIC 0x0 in XAPIC mode.
443 14:50:25.155141 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
444 14:50:25.155188 Processing 18 relocs. Offset value of 0x00030000
445 14:50:25.155230 Attempting to start 7 APs
446 14:50:25.155269 Waiting for 10ms after sending INIT.
447 14:50:25.155307 Waiting for SIPI to complete...
448 14:50:25.155345 done.
449 14:50:25.155383 LAPIC 0x10 in XAPIC mode.
450 14:50:25.155422 Waiting for SIPI to complete...
451 14:50:25.155464 done.
452 14:50:25.155504 LAPIC 0x14 in XAPIC mode.
453 14:50:25.155546 LAPIC 0x16 in XAPIC mode.
454 14:50:25.155585 AP: slot 2 apic_id 10, MCU rev: 0x00000423
455 14:50:25.155629 AP: slot 4 apic_id 14, MCU rev: 0x00000423
456 14:50:25.155670 AP: slot 1 apic_id 16, MCU rev: 0x00000423
457 14:50:25.155714 LAPIC 0x12 in XAPIC mode.
458 14:50:25.155754 LAPIC 0x1 in XAPIC mode.
459 14:50:25.155792 AP: slot 3 apic_id 12, MCU rev: 0x00000423
460 14:50:25.155830 LAPIC 0x9 in XAPIC mode.
461 14:50:25.155868 LAPIC 0x8 in XAPIC mode.
462 14:50:25.155905 AP: slot 5 apic_id 9, MCU rev: 0x00000423
463 14:50:25.155944 AP: slot 7 apic_id 8, MCU rev: 0x00000423
464 14:50:25.155982 AP: slot 6 apic_id 1, MCU rev: 0x00000423
465 14:50:25.156199 smm_setup_relocation_handler: enter
466 14:50:25.156247 smm_setup_relocation_handler: exit
467 14:50:25.156288 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
468 14:50:25.156328 Processing 11 relocs. Offset value of 0x00038000
469 14:50:25.156367 smm_module_setup_stub: stack_top = 0x7b804000
470 14:50:25.156406 smm_module_setup_stub: per cpu stack_size = 0x800
471 14:50:25.156445 smm_module_setup_stub: runtime.start32_offset = 0x4c
472 14:50:25.156484 smm_module_setup_stub: runtime.smm_size = 0x10000
473 14:50:25.156523 SMM Module: stub loaded at 38000. Will call 0x76a53094
474 14:50:25.156562 Installing permanent SMM handler to 0x7b800000
475 14:50:25.156600 smm_load_module: total_smm_space_needed e468, available -> 200000
476 14:50:25.156639 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
477 14:50:25.156678 Processing 255 relocs. Offset value of 0x7b9f6000
478 14:50:25.156718 smm_load_module: smram_start: 0x7b800000
479 14:50:25.156757 smm_load_module: smram_end: 7ba00000
480 14:50:25.156795 smm_load_module: handler start 0x7b9f6d5f
481 14:50:25.156832 smm_load_module: handler_size 98d0
482 14:50:25.156873 smm_load_module: fxsave_area 0x7b9ff000
483 14:50:25.156912 smm_load_module: fxsave_size 1000
484 14:50:25.156951 smm_load_module: CONFIG_MSEG_SIZE 0x0
485 14:50:25.156990 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
486 14:50:25.157028 smm_load_module: handler_mod_params.smbase = 0x7b800000
487 14:50:25.157067 smm_load_module: per_cpu_save_state_size = 0x400
488 14:50:25.157104 smm_load_module: num_cpus = 0x8
489 14:50:25.157142 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
490 14:50:25.157180 smm_load_module: total_save_state_size = 0x2000
491 14:50:25.157217 smm_load_module: cpu0 entry: 7b9e6000
492 14:50:25.157255 smm_create_map: cpus allowed in one segment 30
493 14:50:25.157293 smm_create_map: min # of segments needed 1
494 14:50:25.157331 CPU 0x0
495 14:50:25.157369 smbase 7b9e6000 entry 7b9ee000
496 14:50:25.157407 ss_start 7b9f5c00 code_end 7b9ee208
497 14:50:25.157444 CPU 0x1
498 14:50:25.157481 smbase 7b9e5c00 entry 7b9edc00
499 14:50:25.157519 ss_start 7b9f5800 code_end 7b9ede08
500 14:50:25.157556 CPU 0x2
501 14:50:25.157594 smbase 7b9e5800 entry 7b9ed800
502 14:50:25.157631 ss_start 7b9f5400 code_end 7b9eda08
503 14:50:25.157669 CPU 0x3
504 14:50:25.157708 smbase 7b9e5400 entry 7b9ed400
505 14:50:25.157748 ss_start 7b9f5000 code_end 7b9ed608
506 14:50:25.157785 CPU 0x4
507 14:50:25.157823 smbase 7b9e5000 entry 7b9ed000
508 14:50:25.157861 ss_start 7b9f4c00 code_end 7b9ed208
509 14:50:25.157899 CPU 0x5
510 14:50:25.157937 smbase 7b9e4c00 entry 7b9ecc00
511 14:50:25.157979 ss_start 7b9f4800 code_end 7b9ece08
512 14:50:25.158017 CPU 0x6
513 14:50:25.158056 smbase 7b9e4800 entry 7b9ec800
514 14:50:25.158094 ss_start 7b9f4400 code_end 7b9eca08
515 14:50:25.158132 CPU 0x7
516 14:50:25.158170 smbase 7b9e4400 entry 7b9ec400
517 14:50:25.158208 ss_start 7b9f4000 code_end 7b9ec608
518 14:50:25.158247 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
519 14:50:25.158286 Processing 11 relocs. Offset value of 0x7b9ee000
520 14:50:25.158325 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
521 14:50:25.158363 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
522 14:50:25.158402 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
523 14:50:25.158440 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
524 14:50:25.158478 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
525 14:50:25.158516 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
526 14:50:25.158554 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
527 14:50:25.158592 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
528 14:50:25.158630 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
529 14:50:25.158669 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
530 14:50:25.158708 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
531 14:50:25.158747 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
532 14:50:25.158784 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
533 14:50:25.158823 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
534 14:50:25.158861 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
535 14:50:25.158899 smm_module_setup_stub: stack_top = 0x7b804000
536 14:50:25.158937 smm_module_setup_stub: per cpu stack_size = 0x800
537 14:50:25.158974 smm_module_setup_stub: runtime.start32_offset = 0x4c
538 14:50:25.159012 smm_module_setup_stub: runtime.smm_size = 0x200000
539 14:50:25.159049 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
540 14:50:25.159087 Clearing SMI status registers
541 14:50:25.159125 SMI_STS: PM1
542 14:50:25.159162 PM1_STS: PWRBTN
543 14:50:25.159209 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
544 14:50:25.159250 In relocation handler: CPU 0
545 14:50:25.159288 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
546 14:50:25.159327 Writing SMRR. base = 0x7b800006, mask=0xff800c00
547 14:50:25.159366 Relocation complete.
548 14:50:25.159404 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
549 14:50:25.159443 In relocation handler: CPU 6
550 14:50:25.159481 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
551 14:50:25.159519 Relocation complete.
552 14:50:25.159557 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
553 14:50:25.159597 In relocation handler: CPU 1
554 14:50:25.159823 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
555 14:50:25.159871 Writing SMRR. base = 0x7b800006, mask=0xff800c00
556 14:50:25.159911 Relocation complete.
557 14:50:25.159950 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
558 14:50:25.159989 In relocation handler: CPU 2
559 14:50:25.160028 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
560 14:50:25.160066 Writing SMRR. base = 0x7b800006, mask=0xff800c00
561 14:50:25.160104 Relocation complete.
562 14:50:25.160143 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
563 14:50:25.160182 In relocation handler: CPU 3
564 14:50:25.160220 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
565 14:50:25.160258 Writing SMRR. base = 0x7b800006, mask=0xff800c00
566 14:50:25.160297 Relocation complete.
567 14:50:25.160334 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
568 14:50:25.160373 In relocation handler: CPU 4
569 14:50:25.160410 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
570 14:50:25.160449 Writing SMRR. base = 0x7b800006, mask=0xff800c00
571 14:50:25.160486 Relocation complete.
572 14:50:25.160527 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
573 14:50:25.160564 In relocation handler: CPU 5
574 14:50:25.160602 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
575 14:50:25.160640 Relocation complete.
576 14:50:25.160678 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
577 14:50:25.160717 In relocation handler: CPU 7
578 14:50:25.160755 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
579 14:50:25.160794 Writing SMRR. base = 0x7b800006, mask=0xff800c00
580 14:50:25.160832 Relocation complete.
581 14:50:25.160869 Initializing CPU #0
582 14:50:25.160907 CPU: vendor Intel device 906a4
583 14:50:25.160945 CPU: family 06, model 9a, stepping 04
584 14:50:25.160983 Clearing out pending MCEs
585 14:50:25.161022 cpu: energy policy set to 7
586 14:50:25.161059 Turbo is available but hidden
587 14:50:25.161096 Turbo is available and visible
588 14:50:25.161133 microcode: Update skipped, already up-to-date
589 14:50:25.161171 CPU #0 initialized
590 14:50:25.161209 Initializing CPU #6
591 14:50:25.161247 Initializing CPU #1
592 14:50:25.161285 Initializing CPU #2
593 14:50:25.161324 CPU: vendor Intel device 906a4
594 14:50:25.161362 CPU: family 06, model 9a, stepping 04
595 14:50:25.161399 Initializing CPU #5
596 14:50:25.161437 Clearing out pending MCEs
597 14:50:25.161474 CPU: vendor Intel device 906a4
598 14:50:25.161513 CPU: family 06, model 9a, stepping 04
599 14:50:25.161550 Initializing CPU #4
600 14:50:25.161588 Initializing CPU #3
601 14:50:25.161630 cpu: energy policy set to 7
602 14:50:25.161679 CPU: vendor Intel device 906a4
603 14:50:25.161739 CPU: family 06, model 9a, stepping 04
604 14:50:25.161795 CPU: vendor Intel device 906a4
605 14:50:25.161836 CPU: family 06, model 9a, stepping 04
606 14:50:25.161875 Clearing out pending MCEs
607 14:50:25.161914 CPU: vendor Intel device 906a4
608 14:50:25.161951 CPU: family 06, model 9a, stepping 04
609 14:50:25.161989 cpu: energy policy set to 7
610 14:50:25.162027 microcode: Update skipped, already up-to-date
611 14:50:25.162066 CPU #1 initialized
612 14:50:25.162104 microcode: Update skipped, already up-to-date
613 14:50:25.162142 CPU #2 initialized
614 14:50:25.162180 Clearing out pending MCEs
615 14:50:25.162217 Clearing out pending MCEs
616 14:50:25.162255 cpu: energy policy set to 7
617 14:50:25.162293 cpu: energy policy set to 7
618 14:50:25.162331 microcode: Update skipped, already up-to-date
619 14:50:25.162368 CPU #4 initialized
620 14:50:25.162406 microcode: Update skipped, already up-to-date
621 14:50:25.162445 CPU #3 initialized
622 14:50:25.162482 Initializing CPU #7
623 14:50:25.162520 Clearing out pending MCEs
624 14:50:25.162557 CPU: vendor Intel device 906a4
625 14:50:25.162596 CPU: family 06, model 9a, stepping 04
626 14:50:25.162635 CPU: vendor Intel device 906a4
627 14:50:25.162673 CPU: family 06, model 9a, stepping 04
628 14:50:25.162712 cpu: energy policy set to 7
629 14:50:25.162749 Clearing out pending MCEs
630 14:50:25.162787 microcode: Update skipped, already up-to-date
631 14:50:25.162826 CPU #5 initialized
632 14:50:25.162864 Clearing out pending MCEs
633 14:50:25.162901 cpu: energy policy set to 7
634 14:50:25.162941 cpu: energy policy set to 7
635 14:50:25.162978 microcode: Update skipped, already up-to-date
636 14:50:25.163017 CPU #7 initialized
637 14:50:25.163055 microcode: Update skipped, already up-to-date
638 14:50:25.163093 CPU #6 initialized
639 14:50:25.163131 bsp_do_flight_plan done after 733 msecs.
640 14:50:25.163169 CPU: frequency set to 4400 MHz
641 14:50:25.163219 Enabling SMIs.
642 14:50:25.163260 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 379 / 520 ms
643 14:50:25.163298 Probing TPM I2C: done! DID_VID 0x00281ae0
644 14:50:25.163337 Locality already claimed
645 14:50:25.163375 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
646 14:50:25.163413 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
647 14:50:25.163452 Enabling GPIO PM b/c CR50 has long IRQ pulse support
648 14:50:25.163491 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
649 14:50:25.163529 CBFS: Found 'vbt.bin' @0x7d8c0 size 0x4e9 in mcache @0x76add214
650 14:50:25.163567 Found a VBT of 9216 bytes after decompression
651 14:50:25.163606 PCI 1.0, PIN A, using IRQ #16
652 14:50:25.163643 PCI 2.0, PIN A, using IRQ #17
653 14:50:25.163681 PCI 4.0, PIN A, using IRQ #18
654 14:50:25.163719 PCI 5.0, PIN A, using IRQ #16
655 14:50:25.163757 PCI 6.0, PIN A, using IRQ #16
656 14:50:25.163795 PCI 6.2, PIN C, using IRQ #18
657 14:50:25.163833 PCI 7.0, PIN A, using IRQ #19
658 14:50:25.163870 PCI 7.1, PIN B, using IRQ #20
659 14:50:25.163908 PCI 7.2, PIN C, using IRQ #21
660 14:50:25.163946 PCI 7.3, PIN D, using IRQ #22
661 14:50:25.163984 PCI 8.0, PIN A, using IRQ #23
662 14:50:25.164021 PCI D.0, PIN A, using IRQ #17
663 14:50:25.164059 PCI D.1, PIN B, using IRQ #19
664 14:50:25.164097 PCI 10.0, PIN A, using IRQ #24
665 14:50:25.164135 PCI 10.1, PIN B, using IRQ #25
666 14:50:25.164174 PCI 10.6, PIN C, using IRQ #20
667 14:50:25.164211 PCI 10.7, PIN D, using IRQ #21
668 14:50:25.164247 PCI 11.0, PIN A, using IRQ #26
669 14:50:25.164285 PCI 11.1, PIN B, using IRQ #27
670 14:50:25.164506 PCI 11.2, PIN C, using IRQ #28
671 14:50:25.164553 PCI 11.3, PIN D, using IRQ #29
672 14:50:25.164593 PCI 12.0, PIN A, using IRQ #30
673 14:50:25.164632 PCI 12.6, PIN B, using IRQ #31
674 14:50:25.164670 PCI 12.7, PIN C, using IRQ #22
675 14:50:25.164708 PCI 13.0, PIN A, using IRQ #32
676 14:50:25.164746 PCI 13.1, PIN B, using IRQ #33
677 14:50:25.164784 PCI 13.2, PIN C, using IRQ #34
678 14:50:25.164823 PCI 13.3, PIN D, using IRQ #35
679 14:50:25.164861 PCI 14.0, PIN B, using IRQ #23
680 14:50:25.164900 PCI 14.1, PIN A, using IRQ #36
681 14:50:25.164939 PCI 14.3, PIN C, using IRQ #17
682 14:50:25.164977 PCI 15.0, PIN A, using IRQ #37
683 14:50:25.165015 PCI 15.1, PIN B, using IRQ #38
684 14:50:25.165053 PCI 15.2, PIN C, using IRQ #39
685 14:50:25.165091 PCI 15.3, PIN D, using IRQ #40
686 14:50:25.165129 PCI 16.0, PIN A, using IRQ #18
687 14:50:25.165168 PCI 16.1, PIN B, using IRQ #19
688 14:50:25.165208 PCI 16.2, PIN C, using IRQ #20
689 14:50:25.165246 PCI 16.3, PIN D, using IRQ #21
690 14:50:25.165285 PCI 16.4, PIN A, using IRQ #18
691 14:50:25.165322 PCI 16.5, PIN B, using IRQ #19
692 14:50:25.165361 PCI 17.0, PIN A, using IRQ #22
693 14:50:25.165399 PCI 19.0, PIN A, using IRQ #41
694 14:50:25.165437 PCI 19.1, PIN B, using IRQ #42
695 14:50:25.165475 PCI 19.2, PIN C, using IRQ #43
696 14:50:25.165513 PCI 1C.0, PIN A, using IRQ #16
697 14:50:25.165551 PCI 1C.1, PIN B, using IRQ #17
698 14:50:25.165589 PCI 1C.2, PIN C, using IRQ #18
699 14:50:25.165626 PCI 1C.3, PIN D, using IRQ #19
700 14:50:25.165664 PCI 1C.4, PIN A, using IRQ #16
701 14:50:25.165702 PCI 1C.5, PIN B, using IRQ #17
702 14:50:25.165739 PCI 1C.6, PIN C, using IRQ #18
703 14:50:25.165777 PCI 1C.7, PIN D, using IRQ #19
704 14:50:25.165814 PCI 1D.0, PIN A, using IRQ #16
705 14:50:25.165853 PCI 1D.1, PIN B, using IRQ #17
706 14:50:25.165891 PCI 1D.2, PIN C, using IRQ #18
707 14:50:25.165930 PCI 1D.3, PIN D, using IRQ #19
708 14:50:25.165968 PCI 1E.0, PIN A, using IRQ #23
709 14:50:25.166006 PCI 1E.1, PIN B, using IRQ #20
710 14:50:25.166044 PCI 1E.2, PIN C, using IRQ #44
711 14:50:25.166082 PCI 1E.3, PIN D, using IRQ #45
712 14:50:25.166120 PCI 1F.3, PIN B, using IRQ #22
713 14:50:25.166157 PCI 1F.4, PIN C, using IRQ #23
714 14:50:25.166196 PCI 1F.6, PIN D, using IRQ #20
715 14:50:25.166234 PCI 1F.7, PIN A, using IRQ #21
716 14:50:25.166272 IRQ: Using dynamically assigned PCI IO-APIC IRQs
717 14:50:25.166310 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
718 14:50:25.166349 FSPS returned 0
719 14:50:25.166389 Executing Phase 1 of FspMultiPhaseSiInit
720 14:50:25.166428 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
721 14:50:25.166469 port C0 DISC req: usage 1 usb3 1 usb2 1
722 14:50:25.166508 Raw Buffer output 0 00000111
723 14:50:25.166547 Raw Buffer output 1 00000000
724 14:50:25.166584 pmc_send_ipc_cmd succeeded
725 14:50:25.166622 port C1 DISC req: usage 1 usb3 3 usb2 3
726 14:50:25.166661 Raw Buffer output 0 00000331
727 14:50:25.166699 Raw Buffer output 1 00000000
728 14:50:25.166736 pmc_send_ipc_cmd succeeded
729 14:50:25.166775 Detected 6 core, 8 thread CPU.
730 14:50:25.166813 Detected 6 core, 8 thread CPU.
731 14:50:25.166851 Detected 6 core, 8 thread CPU.
732 14:50:25.166888 Detected 6 core, 8 thread CPU.
733 14:50:25.166927 Detected 6 core, 8 thread CPU.
734 14:50:25.166965 Detected 6 core, 8 thread CPU.
735 14:50:25.167003 Detected 6 core, 8 thread CPU.
736 14:50:25.167042 Detected 6 core, 8 thread CPU.
737 14:50:25.167080 Detected 6 core, 8 thread CPU.
738 14:50:25.167118 Detected 6 core, 8 thread CPU.
739 14:50:25.167157 Detected 6 core, 8 thread CPU.
740 14:50:25.167200 Detected 6 core, 8 thread CPU.
741 14:50:25.167239 Detected 6 core, 8 thread CPU.
742 14:50:25.167278 Detected 6 core, 8 thread CPU.
743 14:50:25.167317 Detected 6 core, 8 thread CPU.
744 14:50:25.167355 Detected 6 core, 8 thread CPU.
745 14:50:25.167394 Detected 6 core, 8 thread CPU.
746 14:50:25.167431 Detected 6 core, 8 thread CPU.
747 14:50:25.167469 Detected 6 core, 8 thread CPU.
748 14:50:25.167507 Detected 6 core, 8 thread CPU.
749 14:50:25.167545 Detected 6 core, 8 thread CPU.
750 14:50:25.167582 Detected 6 core, 8 thread CPU.
751 14:50:25.167619 Detected 6 core, 8 thread CPU.
752 14:50:25.167658 Detected 6 core, 8 thread CPU.
753 14:50:25.167695 Detected 6 core, 8 thread CPU.
754 14:50:25.167733 Detected 6 core, 8 thread CPU.
755 14:50:25.167771 Detected 6 core, 8 thread CPU.
756 14:50:25.167809 Detected 6 core, 8 thread CPU.
757 14:50:25.167848 Detected 6 core, 8 thread CPU.
758 14:50:25.167886 Detected 6 core, 8 thread CPU.
759 14:50:25.167924 Detected 6 core, 8 thread CPU.
760 14:50:25.167962 Detected 6 core, 8 thread CPU.
761 14:50:25.167999 Detected 6 core, 8 thread CPU.
762 14:50:25.168038 Detected 6 core, 8 thread CPU.
763 14:50:25.168076 Detected 6 core, 8 thread CPU.
764 14:50:25.168113 Detected 6 core, 8 thread CPU.
765 14:50:25.168151 Detected 6 core, 8 thread CPU.
766 14:50:25.168189 Detected 6 core, 8 thread CPU.
767 14:50:25.168227 Detected 6 core, 8 thread CPU.
768 14:50:25.168265 Detected 6 core, 8 thread CPU.
769 14:50:25.168303 Detected 6 core, 8 thread CPU.
770 14:50:25.168341 Detected 6 core, 8 thread CPU.
771 14:50:25.168379 Display FSP Version Info HOB
772 14:50:25.168419 Reference Code - CPU = c.0.65.70
773 14:50:25.168457 uCode Version = 0.0.4.23
774 14:50:25.168495 TXT ACM version = ff.ff.ff.ffff
775 14:50:25.168534 Reference Code - ME = c.0.65.70
776 14:50:25.168571 MEBx version = 0.0.0.0
777 14:50:25.168609 ME Firmware Version = Consumer SKU
778 14:50:25.168648 Reference Code - PCH = c.0.65.70
779 14:50:25.168687 PCH-CRID Status = Disabled
780 14:50:25.168725 PCH-CRID Original Value = ff.ff.ff.ffff
781 14:50:25.168764 PCH-CRID New Value = ff.ff.ff.ffff
782 14:50:25.168802 OPROM - RST - RAID = ff.ff.ff.ffff
783 14:50:25.168841 PCH Hsio Version = 4.0.0.0
784 14:50:25.168879 Reference Code - SA - System Agent = c.0.65.70
785 14:50:25.168917 Reference Code - MRC = 0.0.3.80
786 14:50:25.168956 SA - PCIe Version = c.0.65.70
787 14:50:25.168995 SA-CRID Status = Disabled
788 14:50:25.169033 SA-CRID Original Value = 0.0.0.4
789 14:50:25.169071 SA-CRID New Value = 0.0.0.4
790 14:50:25.169110 OPROM - VBIOS = ff.ff.ff.ffff
791 14:50:25.169148 IO Manageability Engine FW Version = 24.0.4.0
792 14:50:25.169187 PHY Build Version = 0.0.0.2016
793 14:50:25.169409 Thunderbolt(TM) FW Version = 0.0.0.0
794 14:50:25.169458 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
795 14:50:25.169499 BS: BS_DEV_INIT_CHIPS run times (exec / console): 473 / 507 ms
796 14:50:25.169539 Enumerating buses...
797 14:50:25.169577 Show all devs... Before device enumeration.
798 14:50:25.169615 Root Device: enabled 1
799 14:50:25.169654 CPU_CLUSTER: 0: enabled 1
800 14:50:25.169693 DOMAIN: 0000: enabled 1
801 14:50:25.169731 GPIO: 0: enabled 1
802 14:50:25.169769 PCI: 00:00.0: enabled 1
803 14:50:25.169808 PCI: 00:01.0: enabled 0
804 14:50:25.169846 PCI: 00:01.1: enabled 0
805 14:50:25.169884 PCI: 00:02.0: enabled 1
806 14:50:25.169922 PCI: 00:04.0: enabled 1
807 14:50:25.169961 PCI: 00:05.0: enabled 0
808 14:50:25.169998 PCI: 00:06.0: enabled 1
809 14:50:25.170036 PCI: 00:06.2: enabled 0
810 14:50:25.170076 PCI: 00:07.0: enabled 0
811 14:50:25.170116 PCI: 00:07.1: enabled 0
812 14:50:25.170153 PCI: 00:07.2: enabled 0
813 14:50:25.170191 PCI: 00:07.3: enabled 0
814 14:50:25.170229 PCI: 00:08.0: enabled 0
815 14:50:25.170268 PCI: 00:09.0: enabled 0
816 14:50:25.170306 PCI: 00:0a.0: enabled 1
817 14:50:25.170343 PCI: 00:0d.0: enabled 1
818 14:50:25.170380 PCI: 00:0d.1: enabled 0
819 14:50:25.170417 PCI: 00:0d.2: enabled 0
820 14:50:25.170454 PCI: 00:0d.3: enabled 0
821 14:50:25.170490 PCI: 00:0e.0: enabled 0
822 14:50:25.170527 PCI: 00:10.0: enabled 0
823 14:50:25.170564 PCI: 00:10.1: enabled 0
824 14:50:25.170601 PCI: 00:10.6: enabled 0
825 14:50:25.170638 PCI: 00:10.7: enabled 0
826 14:50:25.170675 PCI: 00:12.0: enabled 0
827 14:50:25.170713 PCI: 00:12.6: enabled 0
828 14:50:25.170750 PCI: 00:12.7: enabled 0
829 14:50:25.170787 PCI: 00:13.0: enabled 0
830 14:50:25.170824 PCI: 00:14.0: enabled 1
831 14:50:25.170861 PCI: 00:14.1: enabled 0
832 14:50:25.170899 PCI: 00:14.2: enabled 1
833 14:50:25.170937 PCI: 00:14.3: enabled 1
834 14:50:25.170974 PCI: 00:15.0: enabled 1
835 14:50:25.171012 PCI: 00:15.1: enabled 1
836 14:50:25.171050 PCI: 00:15.2: enabled 0
837 14:50:25.171087 PCI: 00:15.3: enabled 1
838 14:50:25.171125 PCI: 00:16.0: enabled 1
839 14:50:25.171162 PCI: 00:16.1: enabled 0
840 14:50:25.171206 PCI: 00:16.2: enabled 0
841 14:50:25.171245 PCI: 00:16.3: enabled 0
842 14:50:25.171283 PCI: 00:16.4: enabled 0
843 14:50:25.171320 PCI: 00:16.5: enabled 0
844 14:50:25.171358 PCI: 00:17.0: enabled 1
845 14:50:25.171396 PCI: 00:19.0: enabled 0
846 14:50:25.171433 PCI: 00:19.1: enabled 1
847 14:50:25.171472 PCI: 00:19.2: enabled 0
848 14:50:25.171510 PCI: 00:1a.0: enabled 0
849 14:50:25.171548 PCI: 00:1c.0: enabled 0
850 14:50:25.171586 PCI: 00:1c.1: enabled 0
851 14:50:25.171623 PCI: 00:1c.2: enabled 0
852 14:50:25.171661 PCI: 00:1c.3: enabled 0
853 14:50:25.171698 PCI: 00:1c.4: enabled 0
854 14:50:25.171737 PCI: 00:1c.5: enabled 0
855 14:50:25.171775 PCI: 00:1c.6: enabled 0
856 14:50:25.171814 PCI: 00:1c.7: enabled 0
857 14:50:25.171852 PCI: 00:1d.0: enabled 0
858 14:50:25.171889 PCI: 00:1d.1: enabled 0
859 14:50:25.171927 PCI: 00:1d.2: enabled 0
860 14:50:25.171963 PCI: 00:1d.3: enabled 0
861 14:50:25.172000 PCI: 00:1e.0: enabled 1
862 14:50:25.172038 PCI: 00:1e.1: enabled 0
863 14:50:25.172075 PCI: 00:1e.2: enabled 0
864 14:50:25.172113 PCI: 00:1e.3: enabled 1
865 14:50:25.172151 PCI: 00:1f.0: enabled 1
866 14:50:25.172188 PCI: 00:1f.1: enabled 0
867 14:50:25.172226 PCI: 00:1f.2: enabled 1
868 14:50:25.172264 PCI: 00:1f.3: enabled 1
869 14:50:25.172302 PCI: 00:1f.4: enabled 0
870 14:50:25.172340 PCI: 00:1f.5: enabled 1
871 14:50:25.172378 PCI: 00:1f.6: enabled 0
872 14:50:25.172416 PCI: 00:1f.7: enabled 0
873 14:50:25.172454 GENERIC: 0.0: enabled 1
874 14:50:25.172491 GENERIC: 0.0: enabled 1
875 14:50:25.172528 GENERIC: 1.0: enabled 1
876 14:50:25.172566 GENERIC: 0.0: enabled 1
877 14:50:25.172604 GENERIC: 1.0: enabled 1
878 14:50:25.172641 USB0 port 0: enabled 1
879 14:50:25.172678 USB0 port 0: enabled 1
880 14:50:25.172715 GENERIC: 0.0: enabled 1
881 14:50:25.172753 I2C: 00:1a: enabled 1
882 14:50:25.172790 I2C: 00:31: enabled 1
883 14:50:25.172829 I2C: 00:32: enabled 1
884 14:50:25.172866 I2C: 00:50: enabled 1
885 14:50:25.172904 I2C: 00:10: enabled 1
886 14:50:25.172942 I2C: 00:15: enabled 1
887 14:50:25.172980 I2C: 00:2c: enabled 1
888 14:50:25.173018 GENERIC: 0.0: enabled 1
889 14:50:25.173055 SPI: 00: enabled 1
890 14:50:25.173092 PNP: 0c09.0: enabled 1
891 14:50:25.173129 GENERIC: 0.0: enabled 1
892 14:50:25.173166 USB3 port 0: enabled 1
893 14:50:25.173203 USB3 port 1: enabled 0
894 14:50:25.173239 USB3 port 2: enabled 1
895 14:50:25.173277 USB3 port 3: enabled 0
896 14:50:25.173314 USB2 port 0: enabled 1
897 14:50:25.173352 USB2 port 1: enabled 0
898 14:50:25.173391 USB2 port 2: enabled 1
899 14:50:25.173428 USB2 port 3: enabled 0
900 14:50:25.173465 USB2 port 4: enabled 0
901 14:50:25.173502 USB2 port 5: enabled 1
902 14:50:25.173540 USB2 port 6: enabled 0
903 14:50:25.173577 USB2 port 7: enabled 0
904 14:50:25.173614 USB2 port 8: enabled 1
905 14:50:25.173652 USB2 port 9: enabled 1
906 14:50:25.173689 USB3 port 0: enabled 1
907 14:50:25.173725 USB3 port 1: enabled 0
908 14:50:25.173762 USB3 port 2: enabled 0
909 14:50:25.173799 USB3 port 3: enabled 0
910 14:50:25.173837 GENERIC: 0.0: enabled 1
911 14:50:25.173875 GENERIC: 1.0: enabled 1
912 14:50:25.173912 APIC: 00: enabled 1
913 14:50:25.173948 APIC: 16: enabled 1
914 14:50:25.173986 APIC: 10: enabled 1
915 14:50:25.174022 APIC: 12: enabled 1
916 14:50:25.174059 APIC: 14: enabled 1
917 14:50:25.174095 APIC: 09: enabled 1
918 14:50:25.174133 APIC: 01: enabled 1
919 14:50:25.174171 APIC: 08: enabled 1
920 14:50:25.174208 Compare with tree...
921 14:50:25.174245 Root Device: enabled 1
922 14:50:25.174282 CPU_CLUSTER: 0: enabled 1
923 14:50:25.174319 APIC: 00: enabled 1
924 14:50:25.174357 APIC: 16: enabled 1
925 14:50:25.174395 APIC: 10: enabled 1
926 14:50:25.174433 APIC: 12: enabled 1
927 14:50:25.174471 APIC: 14: enabled 1
928 14:50:25.174508 APIC: 09: enabled 1
929 14:50:25.174547 APIC: 01: enabled 1
930 14:50:25.174584 APIC: 08: enabled 1
931 14:50:25.174622 DOMAIN: 0000: enabled 1
932 14:50:25.174659 GPIO: 0: enabled 1
933 14:50:25.174696 PCI: 00:00.0: enabled 1
934 14:50:25.174735 PCI: 00:01.0: enabled 0
935 14:50:25.174773 PCI: 00:01.1: enabled 0
936 14:50:25.174810 PCI: 00:02.0: enabled 1
937 14:50:25.174847 PCI: 00:04.0: enabled 1
938 14:50:25.174884 GENERIC: 0.0: enabled 1
939 14:50:25.174922 PCI: 00:05.0: enabled 0
940 14:50:25.174959 PCI: 00:06.0: enabled 1
941 14:50:25.174996 PCI: 00:06.2: enabled 0
942 14:50:25.175034 PCI: 00:08.0: enabled 0
943 14:50:25.175072 PCI: 00:09.0: enabled 0
944 14:50:25.175109 PCI: 00:0a.0: enabled 1
945 14:50:25.175146 PCI: 00:0d.0: enabled 1
946 14:50:25.175192 USB0 port 0: enabled 1
947 14:50:25.175232 USB3 port 0: enabled 1
948 14:50:25.175270 USB3 port 1: enabled 0
949 14:50:25.175308 USB3 port 2: enabled 1
950 14:50:25.175345 USB3 port 3: enabled 0
951 14:50:25.175384 PCI: 00:0d.1: enabled 0
952 14:50:25.175420 PCI: 00:0d.2: enabled 0
953 14:50:25.175458 PCI: 00:0d.3: enabled 0
954 14:50:25.175495 PCI: 00:0e.0: enabled 0
955 14:50:25.175721 PCI: 00:10.0: enabled 0
956 14:50:25.175767 PCI: 00:10.1: enabled 0
957 14:50:25.175807 PCI: 00:10.6: enabled 0
958 14:50:25.175845 PCI: 00:10.7: enabled 0
959 14:50:25.175883 PCI: 00:12.0: enabled 0
960 14:50:25.175920 PCI: 00:12.6: enabled 0
961 14:50:25.175958 PCI: 00:12.7: enabled 0
962 14:50:25.175996 PCI: 00:13.0: enabled 0
963 14:50:25.176034 PCI: 00:14.0: enabled 1
964 14:50:25.176073 USB0 port 0: enabled 1
965 14:50:25.176111 USB2 port 0: enabled 1
966 14:50:25.176148 USB2 port 1: enabled 0
967 14:50:25.176187 USB2 port 2: enabled 1
968 14:50:25.176224 USB2 port 3: enabled 0
969 14:50:25.176262 USB2 port 4: enabled 0
970 14:50:25.176300 USB2 port 5: enabled 1
971 14:50:25.176337 USB2 port 6: enabled 0
972 14:50:25.176375 USB2 port 7: enabled 0
973 14:50:25.176413 USB2 port 8: enabled 1
974 14:50:25.176450 USB2 port 9: enabled 1
975 14:50:25.176487 USB3 port 0: enabled 1
976 14:50:25.176525 USB3 port 1: enabled 0
977 14:50:25.176563 USB3 port 2: enabled 0
978 14:50:25.176601 USB3 port 3: enabled 0
979 14:50:25.176638 PCI: 00:14.1: enabled 0
980 14:50:25.176676 PCI: 00:14.2: enabled 1
981 14:50:25.176714 PCI: 00:14.3: enabled 1
982 14:50:25.176751 GENERIC: 0.0: enabled 1
983 14:50:25.176789 PCI: 00:15.0: enabled 1
984 14:50:25.176826 I2C: 00:1a: enabled 1
985 14:50:25.176865 I2C: 00:31: enabled 1
986 14:50:25.176902 I2C: 00:32: enabled 1
987 14:50:25.176940 PCI: 00:15.1: enabled 1
988 14:50:25.176978 I2C: 00:50: enabled 1
989 14:50:25.177015 PCI: 00:15.2: enabled 0
990 14:50:25.177053 PCI: 00:15.3: enabled 1
991 14:50:25.177091 I2C: 00:10: enabled 1
992 14:50:25.177129 PCI: 00:16.0: enabled 1
993 14:50:25.177166 PCI: 00:16.1: enabled 0
994 14:50:25.177202 PCI: 00:16.2: enabled 0
995 14:50:25.177240 PCI: 00:16.3: enabled 0
996 14:50:25.177276 PCI: 00:16.4: enabled 0
997 14:50:25.177314 PCI: 00:16.5: enabled 0
998 14:50:25.177351 PCI: 00:17.0: enabled 1
999 14:50:25.177389 PCI: 00:19.0: enabled 0
1000 14:50:25.177426 PCI: 00:19.1: enabled 1
1001 14:50:25.177463 I2C: 00:15: enabled 1
1002 14:50:25.177502 I2C: 00:2c: enabled 1
1003 14:50:25.177538 PCI: 00:19.2: enabled 0
1004 14:50:25.177576 PCI: 00:1a.0: enabled 0
1005 14:50:25.177613 PCI: 00:1e.0: enabled 1
1006 14:50:25.177651 PCI: 00:1e.1: enabled 0
1007 14:50:25.177688 PCI: 00:1e.2: enabled 0
1008 14:50:25.177725 PCI: 00:1e.3: enabled 1
1009 14:50:25.177763 SPI: 00: enabled 1
1010 14:50:25.177801 PCI: 00:1f.0: enabled 1
1011 14:50:25.177840 PNP: 0c09.0: enabled 1
1012 14:50:25.177878 PCI: 00:1f.1: enabled 0
1013 14:50:25.177915 PCI: 00:1f.2: enabled 1
1014 14:50:25.177953 GENERIC: 0.0: enabled 1
1015 14:50:25.177992 GENERIC: 0.0: enabled 1
1016 14:50:25.178031 GENERIC: 1.0: enabled 1
1017 14:50:25.178069 PCI: 00:1f.3: enabled 1
1018 14:50:25.178107 PCI: 00:1f.4: enabled 0
1019 14:50:25.178145 PCI: 00:1f.5: enabled 1
1020 14:50:25.178182 PCI: 00:1f.6: enabled 0
1021 14:50:25.178220 PCI: 00:1f.7: enabled 0
1022 14:50:25.178259 Root Device scanning...
1023 14:50:25.178298 scan_static_bus for Root Device
1024 14:50:25.178336 CPU_CLUSTER: 0 enabled
1025 14:50:25.178373 DOMAIN: 0000 enabled
1026 14:50:25.178411 DOMAIN: 0000 scanning...
1027 14:50:25.178450 PCI: pci_scan_bus for bus 00
1028 14:50:25.178488 PCI: 00:00.0 [8086/0000] ops
1029 14:50:25.178526 PCI: 00:00.0 [8086/4609] enabled
1030 14:50:25.178564 PCI: 00:02.0 [8086/0000] bus ops
1031 14:50:25.178601 PCI: 00:02.0 [8086/46b3] enabled
1032 14:50:25.178639 PCI: 00:04.0 [8086/0000] bus ops
1033 14:50:25.178677 PCI: 00:04.0 [8086/461d] enabled
1034 14:50:25.178715 PCI: 00:06.0 [8086/0000] bus ops
1035 14:50:25.178752 PCI: 00:06.0 [8086/464d] enabled
1036 14:50:25.178790 PCI: 00:08.0 [8086/464f] disabled
1037 14:50:25.178828 PCI: 00:0a.0 [8086/467d] enabled
1038 14:50:25.178866 PCI: 00:0d.0 [8086/0000] bus ops
1039 14:50:25.178904 PCI: 00:0d.0 [8086/461e] enabled
1040 14:50:25.178941 PCI: 00:14.0 [8086/0000] bus ops
1041 14:50:25.178979 PCI: 00:14.0 [8086/51ed] enabled
1042 14:50:25.179017 PCI: 00:14.2 [8086/51ef] enabled
1043 14:50:25.179054 PCI: 00:14.3 [8086/0000] bus ops
1044 14:50:25.179092 PCI: 00:14.3 [8086/51f0] enabled
1045 14:50:25.179130 PCI: 00:15.0 [8086/0000] bus ops
1046 14:50:25.179169 PCI: 00:15.0 [8086/51e8] enabled
1047 14:50:25.179213 PCI: 00:15.1 [8086/0000] bus ops
1048 14:50:25.179251 PCI: 00:15.1 [8086/51e9] enabled
1049 14:50:25.179288 PCI: 00:15.2 [8086/0000] bus ops
1050 14:50:25.179327 PCI: 00:15.2 [8086/51ea] disabled
1051 14:50:25.179364 PCI: 00:15.3 [8086/0000] bus ops
1052 14:50:25.179402 PCI: 00:15.3 [8086/51eb] enabled
1053 14:50:25.179439 PCI: 00:16.0 [8086/0000] ops
1054 14:50:25.179477 PCI: 00:16.0 [8086/51e0] enabled
1055 14:50:25.179515 PCI: Static device PCI: 00:17.0 not found, disabling it.
1056 14:50:25.179553 PCI: 00:19.0 [8086/0000] bus ops
1057 14:50:25.179591 PCI: 00:19.0 [8086/51c5] disabled
1058 14:50:25.179629 PCI: 00:19.1 [8086/0000] bus ops
1059 14:50:25.179667 PCI: 00:19.1 [8086/51c6] enabled
1060 14:50:25.179706 PCI: 00:1e.0 [8086/0000] ops
1061 14:50:25.179743 PCI: 00:1e.0 [8086/51a8] enabled
1062 14:50:25.179782 PCI: 00:1e.3 [8086/0000] bus ops
1063 14:50:25.179825 PCI: 00:1e.3 [8086/51ab] enabled
1064 14:50:25.179863 PCI: 00:1f.0 [8086/0000] bus ops
1065 14:50:25.179900 PCI: 00:1f.0 [8086/5182] enabled
1066 14:50:25.179938 RTC Init
1067 14:50:25.179975 Set power on after power failure.
1068 14:50:25.180013 Disabling Deep S3
1069 14:50:25.180050 Disabling Deep S3
1070 14:50:25.180087 Disabling Deep S4
1071 14:50:25.180124 Disabling Deep S4
1072 14:50:25.180161 Disabling Deep S5
1073 14:50:25.180196 Disabling Deep S5
1074 14:50:25.180233 PCI: 00:1f.2 [0000/0000] hidden
1075 14:50:25.180269 PCI: 00:1f.3 [8086/0000] bus ops
1076 14:50:25.180307 PCI: 00:1f.3 [8086/51c8] enabled
1077 14:50:25.180344 PCI: 00:1f.5 [8086/0000] bus ops
1078 14:50:25.180382 PCI: 00:1f.5 [8086/51a4] enabled
1079 14:50:25.180419 GPIO: 0 enabled
1080 14:50:25.180457 PCI: Leftover static devices:
1081 14:50:25.180496 PCI: 00:01.0
1082 14:50:25.180533 PCI: 00:01.1
1083 14:50:25.180570 PCI: 00:05.0
1084 14:50:25.180625 PCI: 00:06.2
1085 14:50:25.180667 PCI: 00:09.0
1086 14:50:25.180705 PCI: 00:0d.1
1087 14:50:25.180743 PCI: 00:0d.2
1088 14:50:25.180781 PCI: 00:0d.3
1089 14:50:25.180819 PCI: 00:0e.0
1090 14:50:25.180857 PCI: 00:10.0
1091 14:50:25.180894 PCI: 00:10.1
1092 14:50:25.180932 PCI: 00:10.6
1093 14:50:25.180970 PCI: 00:10.7
1094 14:50:25.181007 PCI: 00:12.0
1095 14:50:25.181045 PCI: 00:12.6
1096 14:50:25.181082 PCI: 00:12.7
1097 14:50:25.181120 PCI: 00:13.0
1098 14:50:25.181158 PCI: 00:14.1
1099 14:50:25.181196 PCI: 00:16.1
1100 14:50:25.181233 PCI: 00:16.2
1101 14:50:25.181271 PCI: 00:16.3
1102 14:50:25.181309 PCI: 00:16.4
1103 14:50:25.181345 PCI: 00:16.5
1104 14:50:25.181384 PCI: 00:17.0
1105 14:50:25.181421 PCI: 00:19.2
1106 14:50:25.181458 PCI: 00:1a.0
1107 14:50:25.181496 PCI: 00:1e.1
1108 14:50:25.181533 PCI: 00:1e.2
1109 14:50:25.181571 PCI: 00:1f.1
1110 14:50:25.181608 PCI: 00:1f.4
1111 14:50:25.181646 PCI: 00:1f.6
1112 14:50:25.181866 PCI: 00:1f.7
1113 14:50:25.181913 PCI: Check your devicetree.cb.
1114 14:50:25.181953 PCI: 00:02.0 scanning...
1115 14:50:25.181991 scan_generic_bus for PCI: 00:02.0
1116 14:50:25.182030 scan_generic_bus for PCI: 00:02.0 done
1117 14:50:25.182068 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1118 14:50:25.182107 PCI: 00:04.0 scanning...
1119 14:50:25.182146 scan_generic_bus for PCI: 00:04.0
1120 14:50:25.182183 GENERIC: 0.0 enabled
1121 14:50:25.182222 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1122 14:50:25.182260 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1123 14:50:25.182298 PCI: 00:06.0 scanning...
1124 14:50:25.182336 do_pci_scan_bridge for PCI: 00:06.0
1125 14:50:25.182375 PCI: pci_scan_bus for bus 01
1126 14:50:25.182413 PCI: 01:00.0 [15b7/5009] enabled
1127 14:50:25.182450 Enabling Common Clock Configuration
1128 14:50:25.182488 L1 Sub-State supported from root port 6
1129 14:50:25.182526 L1 Sub-State Support = 0x5
1130 14:50:25.182564 CommonModeRestoreTime = 0x6e
1131 14:50:25.182601 Power On Value = 0x5, Power On Scale = 0x2
1132 14:50:25.182639 ASPM: Enabled L1
1133 14:50:25.182677 PCIe: Max_Payload_Size adjusted to 256
1134 14:50:25.182715 PCI: 01:00.0: Enabled LTR
1135 14:50:25.182753 PCI: 01:00.0: Programmed LTR max latencies
1136 14:50:25.182791 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1137 14:50:25.182829 PCI: 00:0d.0 scanning...
1138 14:50:25.182868 scan_static_bus for PCI: 00:0d.0
1139 14:50:25.182905 USB0 port 0 enabled
1140 14:50:25.182943 USB0 port 0 scanning...
1141 14:50:25.182980 scan_static_bus for USB0 port 0
1142 14:50:25.183018 USB3 port 0 enabled
1143 14:50:25.183055 USB3 port 1 disabled
1144 14:50:25.183094 USB3 port 2 enabled
1145 14:50:25.183131 USB3 port 3 disabled
1146 14:50:25.183168 USB3 port 0 scanning...
1147 14:50:25.183212 scan_static_bus for USB3 port 0
1148 14:50:25.183250 scan_static_bus for USB3 port 0 done
1149 14:50:25.183288 scan_bus: bus USB3 port 0 finished in 6 msecs
1150 14:50:25.183326 USB3 port 2 scanning...
1151 14:50:25.183364 scan_static_bus for USB3 port 2
1152 14:50:25.183402 scan_static_bus for USB3 port 2 done
1153 14:50:25.183440 scan_bus: bus USB3 port 2 finished in 6 msecs
1154 14:50:25.183477 scan_static_bus for USB0 port 0 done
1155 14:50:25.183515 scan_bus: bus USB0 port 0 finished in 43 msecs
1156 14:50:25.183553 scan_static_bus for PCI: 00:0d.0 done
1157 14:50:25.183591 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1158 14:50:25.183629 PCI: 00:14.0 scanning...
1159 14:50:25.183666 scan_static_bus for PCI: 00:14.0
1160 14:50:25.183704 USB0 port 0 enabled
1161 14:50:25.183742 USB0 port 0 scanning...
1162 14:50:25.183779 scan_static_bus for USB0 port 0
1163 14:50:25.183817 USB2 port 0 enabled
1164 14:50:25.183855 USB2 port 1 disabled
1165 14:50:25.183892 USB2 port 2 enabled
1166 14:50:25.183929 USB2 port 3 disabled
1167 14:50:25.183966 USB2 port 4 disabled
1168 14:50:25.184002 USB2 port 5 enabled
1169 14:50:25.184040 USB2 port 6 disabled
1170 14:50:25.184077 USB2 port 7 disabled
1171 14:50:25.184114 USB2 port 8 enabled
1172 14:50:25.184151 USB2 port 9 enabled
1173 14:50:25.184188 USB3 port 0 enabled
1174 14:50:25.184226 USB3 port 1 disabled
1175 14:50:25.184263 USB3 port 2 disabled
1176 14:50:25.184300 USB3 port 3 disabled
1177 14:50:25.184338 USB2 port 0 scanning...
1178 14:50:25.184376 scan_static_bus for USB2 port 0
1179 14:50:25.184414 scan_static_bus for USB2 port 0 done
1180 14:50:25.184451 scan_bus: bus USB2 port 0 finished in 6 msecs
1181 14:50:25.184488 USB2 port 2 scanning...
1182 14:50:25.184525 scan_static_bus for USB2 port 2
1183 14:50:25.184563 scan_static_bus for USB2 port 2 done
1184 14:50:25.184600 scan_bus: bus USB2 port 2 finished in 6 msecs
1185 14:50:25.184637 USB2 port 5 scanning...
1186 14:50:25.184676 scan_static_bus for USB2 port 5
1187 14:50:25.184714 scan_static_bus for USB2 port 5 done
1188 14:50:25.184752 scan_bus: bus USB2 port 5 finished in 6 msecs
1189 14:50:25.184790 USB2 port 8 scanning...
1190 14:50:25.184828 scan_static_bus for USB2 port 8
1191 14:50:25.184866 scan_static_bus for USB2 port 8 done
1192 14:50:25.184903 scan_bus: bus USB2 port 8 finished in 6 msecs
1193 14:50:25.184942 USB2 port 9 scanning...
1194 14:50:25.184980 scan_static_bus for USB2 port 9
1195 14:50:25.185017 scan_static_bus for USB2 port 9 done
1196 14:50:25.185055 scan_bus: bus USB2 port 9 finished in 6 msecs
1197 14:50:25.185091 USB3 port 0 scanning...
1198 14:50:25.185129 scan_static_bus for USB3 port 0
1199 14:50:25.185167 scan_static_bus for USB3 port 0 done
1200 14:50:25.185205 scan_bus: bus USB3 port 0 finished in 6 msecs
1201 14:50:25.185243 scan_static_bus for USB0 port 0 done
1202 14:50:25.185281 scan_bus: bus USB0 port 0 finished in 120 msecs
1203 14:50:25.185319 scan_static_bus for PCI: 00:14.0 done
1204 14:50:25.185357 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1205 14:50:25.185394 PCI: 00:14.3 scanning...
1206 14:50:25.185432 scan_static_bus for PCI: 00:14.3
1207 14:50:25.185469 GENERIC: 0.0 enabled
1208 14:50:25.185506 scan_static_bus for PCI: 00:14.3 done
1209 14:50:25.185544 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1210 14:50:25.185582 PCI: 00:15.0 scanning...
1211 14:50:25.185620 scan_static_bus for PCI: 00:15.0
1212 14:50:25.185658 I2C: 00:1a enabled
1213 14:50:25.185695 I2C: 00:31 enabled
1214 14:50:25.185732 I2C: 00:32 enabled
1215 14:50:25.185769 scan_static_bus for PCI: 00:15.0 done
1216 14:50:25.185806 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1217 14:50:25.185844 PCI: 00:15.1 scanning...
1218 14:50:25.185882 scan_static_bus for PCI: 00:15.1
1219 14:50:25.185920 I2C: 00:50 enabled
1220 14:50:25.185957 scan_static_bus for PCI: 00:15.1 done
1221 14:50:25.185994 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1222 14:50:25.186032 PCI: 00:15.3 scanning...
1223 14:50:25.186068 scan_static_bus for PCI: 00:15.3
1224 14:50:25.186105 I2C: 00:10 enabled
1225 14:50:25.186143 scan_static_bus for PCI: 00:15.3 done
1226 14:50:25.186181 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1227 14:50:25.186219 PCI: 00:19.1 scanning...
1228 14:50:25.186258 scan_static_bus for PCI: 00:19.1
1229 14:50:25.186295 I2C: 00:15 enabled
1230 14:50:25.186332 I2C: 00:2c enabled
1231 14:50:25.186370 scan_static_bus for PCI: 00:19.1 done
1232 14:50:25.186407 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1233 14:50:25.186445 PCI: 00:1e.3 scanning...
1234 14:50:25.186482 scan_generic_bus for PCI: 00:1e.3
1235 14:50:25.186519 SPI: 00 enabled
1236 14:50:25.186556 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1237 14:50:25.186777 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1238 14:50:25.186823 PCI: 00:1f.0 scanning...
1239 14:50:25.186863 scan_static_bus for PCI: 00:1f.0
1240 14:50:25.186902 PNP: 0c09.0 enabled
1241 14:50:25.186941 PNP: 0c09.0 scanning...
1242 14:50:25.186978 scan_static_bus for PNP: 0c09.0
1243 14:50:25.187015 scan_static_bus for PNP: 0c09.0 done
1244 14:50:25.187054 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1245 14:50:25.187093 scan_static_bus for PCI: 00:1f.0 done
1246 14:50:25.187130 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1247 14:50:25.187168 PCI: 00:1f.2 scanning...
1248 14:50:25.187213 scan_static_bus for PCI: 00:1f.2
1249 14:50:25.187251 GENERIC: 0.0 enabled
1250 14:50:25.187290 GENERIC: 0.0 scanning...
1251 14:50:25.187328 scan_static_bus for GENERIC: 0.0
1252 14:50:25.187366 GENERIC: 0.0 enabled
1253 14:50:25.187402 GENERIC: 1.0 enabled
1254 14:50:25.187441 scan_static_bus for GENERIC: 0.0 done
1255 14:50:25.187482 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1256 14:50:25.187521 scan_static_bus for PCI: 00:1f.2 done
1257 14:50:25.187559 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1258 14:50:25.187598 PCI: 00:1f.3 scanning...
1259 14:50:25.187635 scan_static_bus for PCI: 00:1f.3
1260 14:50:25.187672 scan_static_bus for PCI: 00:1f.3 done
1261 14:50:25.187711 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1262 14:50:25.187750 PCI: 00:1f.5 scanning...
1263 14:50:25.187788 scan_generic_bus for PCI: 00:1f.5
1264 14:50:25.187827 scan_generic_bus for PCI: 00:1f.5 done
1265 14:50:25.187866 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1266 14:50:25.187904 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1267 14:50:25.187942 scan_static_bus for Root Device done
1268 14:50:25.187979 scan_bus: bus Root Device finished in 729 msecs
1269 14:50:25.188017 done
1270 14:50:25.188055 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1271 14:50:25.188092 Chrome EC: UHEPI supported
1272 14:50:25.188131 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1273 14:50:25.188169 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1274 14:50:25.188207 SPI flash protection: WPSW=0 SRP0=0
1275 14:50:25.188245 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1276 14:50:25.188284 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1277 14:50:25.188321 found VGA at PCI: 00:02.0
1278 14:50:25.188359 Setting up VGA for PCI: 00:02.0
1279 14:50:25.188396 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1280 14:50:25.188433 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1281 14:50:25.188472 Allocating resources...
1282 14:50:25.188509 Reading resources...
1283 14:50:25.188552 Root Device read_resources bus 0 link: 0
1284 14:50:25.188599 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1285 14:50:25.188641 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1286 14:50:25.188681 DOMAIN: 0000 read_resources bus 0 link: 0
1287 14:50:25.188718 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1288 14:50:25.188757 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1289 14:50:25.188795 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1290 14:50:25.188834 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1291 14:50:25.188872 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1292 14:50:25.188911 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1293 14:50:25.188949 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1294 14:50:25.188986 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1295 14:50:25.189024 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1296 14:50:25.189062 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1297 14:50:25.189099 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1298 14:50:25.189138 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1299 14:50:25.189175 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1300 14:50:25.189213 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1301 14:50:25.189251 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1302 14:50:25.189290 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1303 14:50:25.189329 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1304 14:50:25.189367 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1305 14:50:25.189405 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1306 14:50:25.189443 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1307 14:50:25.189481 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1308 14:50:25.189519 PCI: 00:04.0 read_resources bus 1 link: 0
1309 14:50:25.189557 PCI: 00:04.0 read_resources bus 1 link: 0 done
1310 14:50:25.189595 PCI: 00:06.0 read_resources bus 1 link: 0
1311 14:50:25.189633 PCI: 00:06.0 read_resources bus 1 link: 0 done
1312 14:50:25.189671 PCI: 00:0d.0 read_resources bus 0 link: 0
1313 14:50:25.189708 USB0 port 0 read_resources bus 0 link: 0
1314 14:50:25.189746 USB0 port 0 read_resources bus 0 link: 0 done
1315 14:50:25.189784 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1316 14:50:25.189820 PCI: 00:14.0 read_resources bus 0 link: 0
1317 14:50:25.189858 USB0 port 0 read_resources bus 0 link: 0
1318 14:50:25.189895 USB0 port 0 read_resources bus 0 link: 0 done
1319 14:50:25.189933 PCI: 00:14.0 read_resources bus 0 link: 0 done
1320 14:50:25.189969 PCI: 00:14.3 read_resources bus 0 link: 0
1321 14:50:25.190007 PCI: 00:14.3 read_resources bus 0 link: 0 done
1322 14:50:25.190046 PCI: 00:15.0 read_resources bus 0 link: 0
1323 14:50:25.190083 PCI: 00:15.0 read_resources bus 0 link: 0 done
1324 14:50:25.190120 PCI: 00:15.1 read_resources bus 0 link: 0
1325 14:50:25.190157 PCI: 00:15.1 read_resources bus 0 link: 0 done
1326 14:50:25.190375 PCI: 00:15.3 read_resources bus 0 link: 0
1327 14:50:25.190421 PCI: 00:15.3 read_resources bus 0 link: 0 done
1328 14:50:25.190460 PCI: 00:19.1 read_resources bus 0 link: 0
1329 14:50:25.190498 PCI: 00:19.1 read_resources bus 0 link: 0 done
1330 14:50:25.190536 PCI: 00:1e.3 read_resources bus 2 link: 0
1331 14:50:25.190575 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1332 14:50:25.190614 PCI: 00:1f.0 read_resources bus 0 link: 0
1333 14:50:25.190651 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1334 14:50:25.190689 PCI: 00:1f.2 read_resources bus 0 link: 0
1335 14:50:25.190727 GENERIC: 0.0 read_resources bus 0 link: 0
1336 14:50:25.190764 GENERIC: 0.0 read_resources bus 0 link: 0 done
1337 14:50:25.190803 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1338 14:50:25.190841 DOMAIN: 0000 read_resources bus 0 link: 0 done
1339 14:50:25.190879 Root Device read_resources bus 0 link: 0 done
1340 14:50:25.190917 Done reading resources.
1341 14:50:25.190956 Show resources in subtree (Root Device)...After reading.
1342 14:50:25.190993 Root Device child on link 0 CPU_CLUSTER: 0
1343 14:50:25.191031 CPU_CLUSTER: 0 child on link 0 APIC: 00
1344 14:50:25.191072 APIC: 00
1345 14:50:25.191110 APIC: 16
1346 14:50:25.191147 APIC: 10
1347 14:50:25.191195 APIC: 12
1348 14:50:25.191235 APIC: 14
1349 14:50:25.191273 APIC: 09
1350 14:50:25.191311 APIC: 01
1351 14:50:25.191348 APIC: 08
1352 14:50:25.191386 DOMAIN: 0000 child on link 0 GPIO: 0
1353 14:50:25.191425 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1354 14:50:25.191464 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1355 14:50:25.191502 GPIO: 0
1356 14:50:25.191540 PCI: 00:00.0
1357 14:50:25.191578 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1358 14:50:25.191618 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1359 14:50:25.191658 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1360 14:50:25.191696 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1361 14:50:25.191735 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1362 14:50:25.191772 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1363 14:50:25.191811 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1364 14:50:25.191850 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1365 14:50:25.191889 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1366 14:50:25.191929 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1367 14:50:25.191968 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1368 14:50:25.192007 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1369 14:50:25.192048 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1370 14:50:25.192087 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1371 14:50:25.192126 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1372 14:50:25.192164 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1373 14:50:25.192202 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1374 14:50:25.192241 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1375 14:50:25.192280 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1376 14:50:25.192318 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1377 14:50:25.192356 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1378 14:50:25.192394 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1379 14:50:25.192434 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1380 14:50:25.192472 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1381 14:50:25.192510 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1382 14:50:25.192549 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1383 14:50:25.192587 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1384 14:50:25.192625 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1385 14:50:25.192674 PCI: 00:02.0
1386 14:50:25.192728 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1387 14:50:25.192972 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1388 14:50:25.193021 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1389 14:50:25.193061 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1390 14:50:25.193101 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1391 14:50:25.193141 GENERIC: 0.0
1392 14:50:25.193180 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1393 14:50:25.193219 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1394 14:50:25.193258 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1395 14:50:25.193297 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1396 14:50:25.193336 PCI: 01:00.0
1397 14:50:25.193373 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1398 14:50:25.193412 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1399 14:50:25.193450 PCI: 00:08.0
1400 14:50:25.193486 PCI: 00:0a.0
1401 14:50:25.193524 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1402 14:50:25.193561 PCI: 00:0d.0 child on link 0 USB0 port 0
1403 14:50:25.193600 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1404 14:50:25.193638 USB0 port 0 child on link 0 USB3 port 0
1405 14:50:25.193679 USB3 port 0
1406 14:50:25.193716 USB3 port 1
1407 14:50:25.193754 USB3 port 2
1408 14:50:25.193791 USB3 port 3
1409 14:50:25.193827 PCI: 00:14.0 child on link 0 USB0 port 0
1410 14:50:25.193866 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1411 14:50:25.193904 USB0 port 0 child on link 0 USB2 port 0
1412 14:50:25.193941 USB2 port 0
1413 14:50:25.193978 USB2 port 1
1414 14:50:25.194015 USB2 port 2
1415 14:50:25.194052 USB2 port 3
1416 14:50:25.194088 USB2 port 4
1417 14:50:25.194125 USB2 port 5
1418 14:50:25.194162 USB2 port 6
1419 14:50:25.194200 USB2 port 7
1420 14:50:25.194236 USB2 port 8
1421 14:50:25.194273 USB2 port 9
1422 14:50:25.194309 USB3 port 0
1423 14:50:25.194346 USB3 port 1
1424 14:50:25.194383 USB3 port 2
1425 14:50:25.194419 USB3 port 3
1426 14:50:25.194456 PCI: 00:14.2
1427 14:50:25.194493 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1428 14:50:25.194531 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1429 14:50:25.194570 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1430 14:50:25.194608 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1431 14:50:25.194647 GENERIC: 0.0
1432 14:50:25.194685 PCI: 00:15.0 child on link 0 I2C: 00:1a
1433 14:50:25.194723 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1434 14:50:25.194762 I2C: 00:1a
1435 14:50:25.194799 I2C: 00:31
1436 14:50:25.194836 I2C: 00:32
1437 14:50:25.194873 PCI: 00:15.1 child on link 0 I2C: 00:50
1438 14:50:25.194911 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1439 14:50:25.194949 I2C: 00:50
1440 14:50:25.194986 PCI: 00:15.2
1441 14:50:25.195023 PCI: 00:15.3 child on link 0 I2C: 00:10
1442 14:50:25.195061 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1443 14:50:25.195099 I2C: 00:10
1444 14:50:25.195136 PCI: 00:16.0
1445 14:50:25.195179 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1446 14:50:25.195219 PCI: 00:19.0
1447 14:50:25.195257 PCI: 00:19.1 child on link 0 I2C: 00:15
1448 14:50:25.195296 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1449 14:50:25.195333 I2C: 00:15
1450 14:50:25.195371 I2C: 00:2c
1451 14:50:25.195408 PCI: 00:1e.0
1452 14:50:25.195446 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1453 14:50:25.195484 PCI: 00:1e.3 child on link 0 SPI: 00
1454 14:50:25.195522 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1455 14:50:25.195560 SPI: 00
1456 14:50:25.195598 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1457 14:50:25.195635 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1458 14:50:25.195674 PNP: 0c09.0
1459 14:50:25.195711 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1460 14:50:25.195749 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1461 14:50:25.195786 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1462 14:50:25.195825 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1463 14:50:25.195864 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1464 14:50:25.195902 GENERIC: 0.0
1465 14:50:25.195941 GENERIC: 1.0
1466 14:50:25.195978 PCI: 00:1f.3
1467 14:50:25.196016 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1468 14:50:25.196054 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1469 14:50:25.196092 PCI: 00:1f.5
1470 14:50:25.196129 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1471 14:50:25.196347 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1472 14:50:25.196396 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1473 14:50:25.196436 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1474 14:50:25.196476 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1475 14:50:25.196515 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1476 14:50:25.196553 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1477 14:50:25.196592 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1478 14:50:25.196631 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1479 14:50:25.196669 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1480 14:50:25.196708 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1481 14:50:25.196746 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1482 14:50:25.196784 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1483 14:50:25.196823 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1484 14:50:25.196860 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1485 14:50:25.196899 DOMAIN: 0000: Resource ranges:
1486 14:50:25.196938 * Base: 1000, Size: 800, Tag: 100
1487 14:50:25.196976 * Base: 1900, Size: e700, Tag: 100
1488 14:50:25.197013 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1489 14:50:25.197050 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1490 14:50:25.197088 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1491 14:50:25.197126 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1492 14:50:25.197164 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1493 14:50:25.197201 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1494 14:50:25.197239 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1495 14:50:25.197277 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1496 14:50:25.197314 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1497 14:50:25.197352 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1498 14:50:25.197389 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1499 14:50:25.197426 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1500 14:50:25.197466 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1501 14:50:25.197504 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1502 14:50:25.197541 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1503 14:50:25.197577 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1504 14:50:25.197615 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1505 14:50:25.197653 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1506 14:50:25.197691 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1507 14:50:25.197729 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1508 14:50:25.197767 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1509 14:50:25.197805 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1510 14:50:25.197842 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1511 14:50:25.197879 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1512 14:50:25.197917 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1513 14:50:25.197956 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1514 14:50:25.197994 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1515 14:50:25.198032 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1516 14:50:25.198070 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1517 14:50:25.198109 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1518 14:50:25.198147 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1519 14:50:25.198186 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1520 14:50:25.198223 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1521 14:50:25.198261 DOMAIN: 0000: Resource ranges:
1522 14:50:25.198301 * Base: 80400000, Size: 3fc00000, Tag: 200
1523 14:50:25.198338 * Base: d0000000, Size: 28000000, Tag: 200
1524 14:50:25.198377 * Base: fa000000, Size: 1000000, Tag: 200
1525 14:50:25.198414 * Base: fb001000, Size: 17ff000, Tag: 200
1526 14:50:25.198452 * Base: fe800000, Size: 300000, Tag: 200
1527 14:50:25.198489 * Base: feb80000, Size: 80000, Tag: 200
1528 14:50:25.198526 * Base: fed00000, Size: 40000, Tag: 200
1529 14:50:25.198563 * Base: fed70000, Size: 10000, Tag: 200
1530 14:50:25.198601 * Base: fed88000, Size: 8000, Tag: 200
1531 14:50:25.198638 * Base: fed93000, Size: d000, Tag: 200
1532 14:50:25.198854 * Base: feda2000, Size: 1e000, Tag: 200
1533 14:50:25.198900 * Base: fede0000, Size: 1220000, Tag: 200
1534 14:50:25.198939 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1535 14:50:25.198977 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1536 14:50:25.199014 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1537 14:50:25.199053 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1538 14:50:25.199091 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1539 14:50:25.199128 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1540 14:50:25.199166 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1541 14:50:25.199212 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1542 14:50:25.199251 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1543 14:50:25.199290 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1544 14:50:25.199328 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1545 14:50:25.199366 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1546 14:50:25.199404 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1547 14:50:25.199442 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1548 14:50:25.199479 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1549 14:50:25.199517 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1550 14:50:25.199558 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1551 14:50:25.199597 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1552 14:50:25.199634 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1553 14:50:25.199672 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1554 14:50:25.199710 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1555 14:50:25.199750 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1556 14:50:25.199788 PCI: 00:06.0: Resource ranges:
1557 14:50:25.199826 * Base: 80400000, Size: 100000, Tag: 200
1558 14:50:25.199863 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1559 14:50:25.199901 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1560 14:50:25.199938 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1561 14:50:25.199977 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1562 14:50:25.200016 Root Device assign_resources, bus 0 link: 0
1563 14:50:25.200055 DOMAIN: 0000 assign_resources, bus 0 link: 0
1564 14:50:25.200093 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1565 14:50:25.200131 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1566 14:50:25.200169 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1567 14:50:25.200206 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1568 14:50:25.200244 PCI: 00:04.0 assign_resources, bus 1 link: 0
1569 14:50:25.200282 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1570 14:50:25.200320 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1571 14:50:25.200358 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1572 14:50:25.200397 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1573 14:50:25.200434 PCI: 00:06.0 assign_resources, bus 1 link: 0
1574 14:50:25.200472 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1575 14:50:25.200509 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1576 14:50:25.200547 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1577 14:50:25.200584 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1578 14:50:25.200620 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1579 14:50:25.200658 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1580 14:50:25.200694 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1581 14:50:25.200731 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1582 14:50:25.200769 PCI: 00:14.0 assign_resources, bus 0 link: 0
1583 14:50:25.200808 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1584 14:50:25.200846 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1585 14:50:25.200885 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1586 14:50:25.200925 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1587 14:50:25.200962 PCI: 00:14.3 assign_resources, bus 0 link: 0
1588 14:50:25.200998 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1589 14:50:25.201035 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1590 14:50:25.201072 PCI: 00:15.0 assign_resources, bus 0 link: 0
1591 14:50:25.201110 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1592 14:50:25.201146 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1593 14:50:25.201183 PCI: 00:15.1 assign_resources, bus 0 link: 0
1594 14:50:25.201399 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1595 14:50:25.201444 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1596 14:50:25.201484 PCI: 00:15.3 assign_resources, bus 0 link: 0
1597 14:50:25.201523 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1598 14:50:25.201561 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1599 14:50:25.201599 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1600 14:50:25.201636 PCI: 00:19.1 assign_resources, bus 0 link: 0
1601 14:50:25.201674 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1602 14:50:25.201713 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1603 14:50:25.201752 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1604 14:50:25.201789 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1605 14:50:25.201827 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1606 14:50:25.201865 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1607 14:50:25.201902 LPC: Trying to open IO window from 800 size 1ff
1608 14:50:25.201942 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1609 14:50:25.201980 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1610 14:50:25.202018 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1611 14:50:25.202058 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1612 14:50:25.202097 Root Device assign_resources, bus 0 link: 0 done
1613 14:50:25.202136 Done setting resources.
1614 14:50:25.202174 Show resources in subtree (Root Device)...After assigning values.
1615 14:50:25.202212 Root Device child on link 0 CPU_CLUSTER: 0
1616 14:50:25.202251 CPU_CLUSTER: 0 child on link 0 APIC: 00
1617 14:50:25.202289 APIC: 00
1618 14:50:25.202326 APIC: 16
1619 14:50:25.202364 APIC: 10
1620 14:50:25.202401 APIC: 12
1621 14:50:25.202439 APIC: 14
1622 14:50:25.202477 APIC: 09
1623 14:50:25.202513 APIC: 01
1624 14:50:25.202550 APIC: 08
1625 14:50:25.202588 DOMAIN: 0000 child on link 0 GPIO: 0
1626 14:50:25.202626 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1627 14:50:25.202666 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1628 14:50:25.202705 GPIO: 0
1629 14:50:25.202742 PCI: 00:00.0
1630 14:50:25.202780 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1631 14:50:25.202818 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1632 14:50:25.202857 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1633 14:50:25.202897 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1634 14:50:25.202935 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1635 14:50:25.202974 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1636 14:50:25.203012 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1637 14:50:25.203050 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1638 14:50:25.203099 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1639 14:50:25.203143 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1640 14:50:25.203191 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1641 14:50:25.203233 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1642 14:50:25.203272 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1643 14:50:25.203311 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1644 14:50:25.203350 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1645 14:50:25.203389 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1646 14:50:25.203428 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1647 14:50:25.203466 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1648 14:50:25.203505 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1649 14:50:25.203543 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1650 14:50:25.203580 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1651 14:50:25.203618 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1652 14:50:25.203656 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1653 14:50:25.203695 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1654 14:50:25.203912 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1655 14:50:25.203959 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1656 14:50:25.203998 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1657 14:50:25.204038 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1658 14:50:25.204076 PCI: 00:02.0
1659 14:50:25.204114 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1660 14:50:25.204153 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1661 14:50:25.204192 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1662 14:50:25.204230 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1663 14:50:25.204268 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1664 14:50:25.204306 GENERIC: 0.0
1665 14:50:25.204344 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1666 14:50:25.204382 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1667 14:50:25.204420 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1668 14:50:25.204460 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1669 14:50:25.204498 PCI: 01:00.0
1670 14:50:25.204535 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1671 14:50:25.204575 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1672 14:50:25.204616 PCI: 00:08.0
1673 14:50:25.204654 PCI: 00:0a.0
1674 14:50:25.204692 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1675 14:50:25.204731 PCI: 00:0d.0 child on link 0 USB0 port 0
1676 14:50:25.204768 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1677 14:50:25.204807 USB0 port 0 child on link 0 USB3 port 0
1678 14:50:25.204844 USB3 port 0
1679 14:50:25.204882 USB3 port 1
1680 14:50:25.204918 USB3 port 2
1681 14:50:25.204956 USB3 port 3
1682 14:50:25.204994 PCI: 00:14.0 child on link 0 USB0 port 0
1683 14:50:25.205031 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1684 14:50:25.205070 USB0 port 0 child on link 0 USB2 port 0
1685 14:50:25.205108 USB2 port 0
1686 14:50:25.205145 USB2 port 1
1687 14:50:25.205182 USB2 port 2
1688 14:50:25.205220 USB2 port 3
1689 14:50:25.205257 USB2 port 4
1690 14:50:25.205295 USB2 port 5
1691 14:50:25.205331 USB2 port 6
1692 14:50:25.205367 USB2 port 7
1693 14:50:25.205405 USB2 port 8
1694 14:50:25.205442 USB2 port 9
1695 14:50:25.205478 USB3 port 0
1696 14:50:25.205516 USB3 port 1
1697 14:50:25.205553 USB3 port 2
1698 14:50:25.205591 USB3 port 3
1699 14:50:25.205629 PCI: 00:14.2
1700 14:50:25.205666 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1701 14:50:25.205704 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1702 14:50:25.205742 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1703 14:50:25.205782 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1704 14:50:25.205819 GENERIC: 0.0
1705 14:50:25.205857 PCI: 00:15.0 child on link 0 I2C: 00:1a
1706 14:50:25.205894 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1707 14:50:25.205934 I2C: 00:1a
1708 14:50:25.205971 I2C: 00:31
1709 14:50:25.206010 I2C: 00:32
1710 14:50:25.206047 PCI: 00:15.1 child on link 0 I2C: 00:50
1711 14:50:25.206085 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1712 14:50:25.206123 I2C: 00:50
1713 14:50:25.206161 PCI: 00:15.2
1714 14:50:25.206199 PCI: 00:15.3 child on link 0 I2C: 00:10
1715 14:50:25.206237 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1716 14:50:25.206276 I2C: 00:10
1717 14:50:25.206313 PCI: 00:16.0
1718 14:50:25.206351 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1719 14:50:25.206389 PCI: 00:19.0
1720 14:50:25.206427 PCI: 00:19.1 child on link 0 I2C: 00:15
1721 14:50:25.206465 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1722 14:50:25.206503 I2C: 00:15
1723 14:50:25.206541 I2C: 00:2c
1724 14:50:25.206578 PCI: 00:1e.0
1725 14:50:25.206615 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1726 14:50:25.206654 PCI: 00:1e.3 child on link 0 SPI: 00
1727 14:50:25.206692 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1728 14:50:25.206730 SPI: 00
1729 14:50:25.206767 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1730 14:50:25.206805 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1731 14:50:25.206843 PNP: 0c09.0
1732 14:50:25.206881 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1733 14:50:25.207097 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1734 14:50:25.207142 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1735 14:50:25.207204 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1736 14:50:25.207248 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1737 14:50:25.207287 GENERIC: 0.0
1738 14:50:25.207325 GENERIC: 1.0
1739 14:50:25.207362 PCI: 00:1f.3
1740 14:50:25.207399 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1741 14:50:25.207438 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1742 14:50:25.207478 PCI: 00:1f.5
1743 14:50:25.207516 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1744 14:50:25.207554 Done allocating resources.
1745 14:50:25.207592 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1746 14:50:25.207631 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1747 14:50:25.207669 Configure audio over I2S with MAX98373 NAU88L25B.
1748 14:50:25.207706 Enabling BT offload
1749 14:50:25.207743 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1750 14:50:25.207783 Enabling resources...
1751 14:50:25.207821 PCI: 00:00.0 subsystem <- 8086/4609
1752 14:50:25.207859 PCI: 00:00.0 cmd <- 06
1753 14:50:25.207896 PCI: 00:02.0 subsystem <- 8086/46b3
1754 14:50:25.207934 PCI: 00:02.0 cmd <- 03
1755 14:50:25.207970 PCI: 00:04.0 subsystem <- 8086/461d
1756 14:50:25.208007 PCI: 00:04.0 cmd <- 02
1757 14:50:25.208044 PCI: 00:06.0 bridge ctrl <- 0013
1758 14:50:25.208081 PCI: 00:06.0 subsystem <- 8086/464d
1759 14:50:25.208118 PCI: 00:06.0 cmd <- 106
1760 14:50:25.208156 PCI: 00:0a.0 subsystem <- 8086/467d
1761 14:50:25.208193 PCI: 00:0a.0 cmd <- 02
1762 14:50:25.208230 PCI: 00:0d.0 subsystem <- 8086/461e
1763 14:50:25.208268 PCI: 00:0d.0 cmd <- 02
1764 14:50:25.208306 PCI: 00:14.0 subsystem <- 8086/51ed
1765 14:50:25.208344 PCI: 00:14.0 cmd <- 02
1766 14:50:25.208383 PCI: 00:14.2 subsystem <- 8086/51ef
1767 14:50:25.208420 PCI: 00:14.2 cmd <- 02
1768 14:50:25.208459 PCI: 00:14.3 subsystem <- 8086/51f0
1769 14:50:25.208496 PCI: 00:14.3 cmd <- 02
1770 14:50:25.208534 PCI: 00:15.0 subsystem <- 8086/51e8
1771 14:50:25.208572 PCI: 00:15.0 cmd <- 02
1772 14:50:25.208608 PCI: 00:15.1 subsystem <- 8086/51e9
1773 14:50:25.208646 PCI: 00:15.1 cmd <- 06
1774 14:50:25.208691 PCI: 00:15.3 subsystem <- 8086/51eb
1775 14:50:25.208732 PCI: 00:15.3 cmd <- 02
1776 14:50:25.208770 PCI: 00:16.0 subsystem <- 8086/51e0
1777 14:50:25.208807 PCI: 00:16.0 cmd <- 02
1778 14:50:28.132056 PCI: 00:19.1 subsystem <- 8086/51c6
1779 14:50:28.132162 PCI: 00:19.1 cmd <- 02
1780 14:50:28.132211 PCI: 00:1e.0 subsystem <- 8086/51a8
1781 14:50:28.132253 PCI: 00:1e.0 cmd <- 06
1782 14:50:28.132292 PCI: 00:1e.3 subsystem <- 8086/51ab
1783 14:50:28.132340 PCI: 00:1e.3 cmd <- 02
1784 14:50:28.132381 PCI: 00:1f.0 subsystem <- 8086/5182
1785 14:50:28.132422 PCI: 00:1f.0 cmd <- 407
1786 14:50:28.132463 PCI: 00:1f.3 subsystem <- 8086/51c8
1787 14:50:28.132506 PCI: 00:1f.3 cmd <- 02
1788 14:50:28.132547 PCI: 00:1f.5 subsystem <- 8086/51a4
1789 14:50:28.132588 PCI: 00:1f.5 cmd <- 406
1790 14:50:28.132628 PCI: 01:00.0 cmd <- 02
1791 14:50:28.132685 done.
1792 14:50:28.132733 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1793 14:50:28.132776 ME: Version: Unavailable
1794 14:50:28.132817 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1795 14:50:28.132859 Initializing devices...
1796 14:50:28.132901 Root Device init
1797 14:50:28.132942 mainboard: EC init
1798 14:50:28.132982 Chrome EC: Set SMI mask to 0x0000000000000000
1799 14:50:28.133023 Chrome EC: clear events_b mask to 0x0000000000000000
1800 14:50:28.133082 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1801 14:50:28.133139 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1802 14:50:28.133204 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1803 14:50:28.133247 Chrome EC: Set WAKE mask to 0x0000000000000000
1804 14:50:28.133286 Root Device init finished in 39 msecs
1805 14:50:28.133324 PCI: 00:00.0 init
1806 14:50:28.133362 CPU TDP = 15 Watts
1807 14:50:28.133402 CPU PL1 = 15 Watts
1808 14:50:28.133440 CPU PL2 = 55 Watts
1809 14:50:28.133477 CPU PL4 = 123 Watts
1810 14:50:28.133515 PCI: 00:00.0 init finished in 8 msecs
1811 14:50:28.133553 PCI: 00:02.0 init
1812 14:50:28.133590 GMA: Found VBT in CBFS
1813 14:50:28.133627 GMA: Found valid VBT in CBFS
1814 14:50:28.133664 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1815 14:50:28.133703 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1816 14:50:28.133760 PCI: 00:02.0 init finished in 18 msecs
1817 14:50:28.133804 PCI: 00:06.0 init
1818 14:50:28.133842 Initializing PCH PCIe bridge.
1819 14:50:28.133881 PCI: 00:06.0 init finished in 3 msecs
1820 14:50:28.133919 PCI: 00:0a.0 init
1821 14:50:28.133957 PCI: 00:0a.0 init finished in 0 msecs
1822 14:50:28.133994 PCI: 00:14.0 init
1823 14:50:28.134032 PCI: 00:14.0 init finished in 0 msecs
1824 14:50:28.134069 PCI: 00:14.2 init
1825 14:50:28.134107 PCI: 00:14.2 init finished in 0 msecs
1826 14:50:28.134144 PCI: 00:15.0 init
1827 14:50:28.134180 I2C bus 0 version 0x3230302a
1828 14:50:28.134217 DW I2C bus 0 at 0x80655000 (400 KHz)
1829 14:50:28.134254 PCI: 00:15.0 init finished in 6 msecs
1830 14:50:28.134291 PCI: 00:15.1 init
1831 14:50:28.134329 I2C bus 1 version 0x3230302a
1832 14:50:28.134367 DW I2C bus 1 at 0x80656000 (400 KHz)
1833 14:50:28.134405 PCI: 00:15.1 init finished in 6 msecs
1834 14:50:28.134442 PCI: 00:15.3 init
1835 14:50:28.134483 I2C bus 3 version 0x3230302a
1836 14:50:28.134521 DW I2C bus 3 at 0x80657000 (400 KHz)
1837 14:50:28.134558 PCI: 00:15.3 init finished in 6 msecs
1838 14:50:28.134596 PCI: 00:16.0 init
1839 14:50:28.134632 PCI: 00:16.0 init finished in 0 msecs
1840 14:50:28.134669 PCI: 00:19.1 init
1841 14:50:28.134708 I2C bus 5 version 0x3230302a
1842 14:50:28.134746 DW I2C bus 5 at 0x80659000 (400 KHz)
1843 14:50:28.134783 PCI: 00:19.1 init finished in 6 msecs
1844 14:50:28.134821 PCI: 00:1f.0 init
1845 14:50:28.134859 IOAPIC: Initializing IOAPIC at 0xfec00000
1846 14:50:28.134897 IOAPIC: ID = 0x02
1847 14:50:28.134934 IOAPIC: Dumping registers
1848 14:50:28.135168 reg 0x0000: 0x02000000
1849 14:50:28.135227 reg 0x0001: 0x00770020
1850 14:50:28.135268 reg 0x0002: 0x00000000
1851 14:50:28.135307 IOAPIC: 120 interrupts
1852 14:50:28.135345 IOAPIC: Clearing IOAPIC at 0xfec00000
1853 14:50:28.135383 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1854 14:50:28.135422 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1855 14:50:28.135461 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1856 14:50:28.135499 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1857 14:50:28.135538 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1858 14:50:28.135576 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1859 14:50:28.135613 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1860 14:50:28.135652 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1861 14:50:28.135690 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1862 14:50:28.135728 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1863 14:50:28.135767 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1864 14:50:28.135810 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1865 14:50:28.135861 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1866 14:50:28.135901 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1867 14:50:28.135940 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1868 14:50:28.135979 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1869 14:50:28.136018 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1870 14:50:28.136057 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1871 14:50:28.136096 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1872 14:50:28.136133 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1873 14:50:28.136171 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1874 14:50:28.136209 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1875 14:50:28.136247 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1876 14:50:28.136285 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1877 14:50:28.136323 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1878 14:50:28.136361 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1879 14:50:28.136401 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1880 14:50:28.136438 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1881 14:50:28.136476 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1882 14:50:28.136514 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1883 14:50:28.136552 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1884 14:50:28.136590 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1885 14:50:28.136634 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1886 14:50:28.136673 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1887 14:50:28.136714 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1888 14:50:28.136753 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1889 14:50:28.136792 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1890 14:50:28.136830 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1891 14:50:28.136869 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1892 14:50:28.136907 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1893 14:50:28.136945 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1894 14:50:28.136983 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1895 14:50:28.137025 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1896 14:50:28.137065 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1897 14:50:28.137110 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1898 14:50:28.137165 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1899 14:50:28.137206 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1900 14:50:28.137246 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1901 14:50:28.137284 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1902 14:50:28.137322 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1903 14:50:28.137361 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1904 14:50:28.137398 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1905 14:50:28.137436 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1906 14:50:28.137474 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1907 14:50:28.137513 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1908 14:50:28.137551 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1909 14:50:28.137590 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1910 14:50:28.137628 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1911 14:50:28.137667 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1912 14:50:28.137704 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1913 14:50:28.137742 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1914 14:50:28.137780 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1915 14:50:28.137819 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1916 14:50:28.137858 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1917 14:50:28.137896 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1918 14:50:28.137934 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1919 14:50:28.137971 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1920 14:50:28.138008 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1921 14:50:28.138046 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1922 14:50:28.138085 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1923 14:50:28.138123 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1924 14:50:28.138162 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1925 14:50:28.138200 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1926 14:50:28.138238 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1927 14:50:28.138277 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1928 14:50:28.138314 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1929 14:50:28.138352 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1930 14:50:28.138391 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1931 14:50:28.138430 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1932 14:50:28.138468 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1933 14:50:28.138693 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1934 14:50:28.138740 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1935 14:50:28.138780 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1936 14:50:28.138819 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1937 14:50:28.138857 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1938 14:50:28.138896 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1939 14:50:28.138934 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1940 14:50:28.138972 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1941 14:50:28.139011 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1942 14:50:28.139050 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1943 14:50:28.139088 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1944 14:50:28.139126 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1945 14:50:28.139164 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1946 14:50:28.139211 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1947 14:50:28.139264 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1948 14:50:28.139308 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1949 14:50:28.139347 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1950 14:50:28.139386 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1951 14:50:28.139425 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1952 14:50:28.139463 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1953 14:50:28.139501 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1954 14:50:28.139538 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1955 14:50:28.139576 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1956 14:50:28.139614 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1957 14:50:28.139652 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1958 14:50:28.139690 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1959 14:50:28.139727 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1960 14:50:28.139766 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1961 14:50:28.139803 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1962 14:50:28.139842 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1963 14:50:28.139879 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1964 14:50:28.139917 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1965 14:50:28.139955 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1966 14:50:28.139994 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1967 14:50:28.140032 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1968 14:50:28.140069 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1969 14:50:28.140108 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1970 14:50:28.140146 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1971 14:50:28.140184 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1972 14:50:28.140223 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1973 14:50:28.140261 IOAPIC: Bootstrap Processor Local APIC = 0x00
1974 14:50:28.140298 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1975 14:50:28.140336 PCI: 00:1f.0 init finished in 607 msecs
1976 14:50:28.140374 PCI: 00:1f.2 init
1977 14:50:28.140414 apm_control: Disabling ACPI.
1978 14:50:28.140452 APMC done.
1979 14:50:28.140491 PCI: 00:1f.2 init finished in 7 msecs
1980 14:50:28.140528 PCI: 00:1f.3 init
1981 14:50:28.140569 PCI: 00:1f.3 init finished in 0 msecs
1982 14:50:28.140620 PCI: 01:00.0 init
1983 14:50:28.140661 PCI: 01:00.0 init finished in 0 msecs
1984 14:50:28.140699 PNP: 0c09.0 init
1985 14:50:28.140738 Google Chrome EC uptime: 10.919 seconds
1986 14:50:28.140777 Google Chrome AP resets since EC boot: 0
1987 14:50:28.140814 Google Chrome most recent AP reset causes:
1988 14:50:28.140852 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1989 14:50:28.140890 PNP: 0c09.0 init finished in 19 msecs
1990 14:50:28.140929 GENERIC: 0.0 init
1991 14:50:28.140967 GENERIC: 0.0 init finished in 0 msecs
1992 14:50:28.141004 GENERIC: 1.0 init
1993 14:50:28.141042 GENERIC: 1.0 init finished in 0 msecs
1994 14:50:28.141079 Devices initialized
1995 14:50:28.141117 Show all devs... After init.
1996 14:50:28.141155 Root Device: enabled 1
1997 14:50:28.141193 CPU_CLUSTER: 0: enabled 1
1998 14:50:28.141231 DOMAIN: 0000: enabled 1
1999 14:50:28.141269 GPIO: 0: enabled 1
2000 14:50:28.141306 PCI: 00:00.0: enabled 1
2001 14:50:28.141344 PCI: 00:01.0: enabled 0
2002 14:50:28.141382 PCI: 00:01.1: enabled 0
2003 14:50:28.141420 PCI: 00:02.0: enabled 1
2004 14:50:28.141457 PCI: 00:04.0: enabled 1
2005 14:50:28.141496 PCI: 00:05.0: enabled 0
2006 14:50:28.141533 PCI: 00:06.0: enabled 1
2007 14:50:28.141571 PCI: 00:06.2: enabled 0
2008 14:50:28.141609 PCI: 00:07.0: enabled 0
2009 14:50:28.141648 PCI: 00:07.1: enabled 0
2010 14:50:28.141685 PCI: 00:07.2: enabled 0
2011 14:50:28.141723 PCI: 00:07.3: enabled 0
2012 14:50:28.141761 PCI: 00:08.0: enabled 0
2013 14:50:28.141799 PCI: 00:09.0: enabled 0
2014 14:50:28.141836 PCI: 00:0a.0: enabled 1
2015 14:50:28.141873 PCI: 00:0d.0: enabled 1
2016 14:50:28.141911 PCI: 00:0d.1: enabled 0
2017 14:50:28.141950 PCI: 00:0d.2: enabled 0
2018 14:50:28.141988 PCI: 00:0d.3: enabled 0
2019 14:50:28.142025 PCI: 00:0e.0: enabled 0
2020 14:50:28.142063 PCI: 00:10.0: enabled 0
2021 14:50:28.142101 PCI: 00:10.1: enabled 0
2022 14:50:28.142139 PCI: 00:10.6: enabled 0
2023 14:50:28.142176 PCI: 00:10.7: enabled 0
2024 14:50:28.142214 PCI: 00:12.0: enabled 0
2025 14:50:28.142251 PCI: 00:12.6: enabled 0
2026 14:50:28.142289 PCI: 00:12.7: enabled 0
2027 14:50:28.142326 PCI: 00:13.0: enabled 0
2028 14:50:28.142364 PCI: 00:14.0: enabled 1
2029 14:50:28.142402 PCI: 00:14.1: enabled 0
2030 14:50:28.142438 PCI: 00:14.2: enabled 1
2031 14:50:28.142476 PCI: 00:14.3: enabled 1
2032 14:50:28.142514 PCI: 00:15.0: enabled 1
2033 14:50:28.142551 PCI: 00:15.1: enabled 1
2034 14:50:28.142589 PCI: 00:15.2: enabled 0
2035 14:50:28.142626 PCI: 00:15.3: enabled 1
2036 14:50:28.142691 PCI: 00:16.0: enabled 1
2037 14:50:28.142732 PCI: 00:16.1: enabled 0
2038 14:50:28.142804 PCI: 00:16.2: enabled 0
2039 14:50:28.142849 PCI: 00:16.3: enabled 0
2040 14:50:28.142888 PCI: 00:16.4: enabled 0
2041 14:50:28.142928 PCI: 00:16.5: enabled 0
2042 14:50:28.142966 PCI: 00:17.0: enabled 0
2043 14:50:28.143005 PCI: 00:19.0: enabled 0
2044 14:50:28.143045 PCI: 00:19.1: enabled 1
2045 14:50:28.143094 PCI: 00:19.2: enabled 0
2046 14:50:28.143136 PCI: 00:1a.0: enabled 0
2047 14:50:28.143201 PCI: 00:1c.0: enabled 0
2048 14:50:28.143244 PCI: 00:1c.1: enabled 0
2049 14:50:28.143283 PCI: 00:1c.2: enabled 0
2050 14:50:28.143321 PCI: 00:1c.3: enabled 0
2051 14:50:28.143360 PCI: 00:1c.4: enabled 0
2052 14:50:28.143580 PCI: 00:1c.5: enabled 0
2053 14:50:28.143631 PCI: 00:1c.6: enabled 0
2054 14:50:28.143671 PCI: 00:1c.7: enabled 0
2055 14:50:28.143711 PCI: 00:1d.0: enabled 0
2056 14:50:28.143749 PCI: 00:1d.1: enabled 0
2057 14:50:28.143787 PCI: 00:1d.2: enabled 0
2058 14:50:28.143826 PCI: 00:1d.3: enabled 0
2059 14:50:28.143865 PCI: 00:1e.0: enabled 1
2060 14:50:28.143903 PCI: 00:1e.1: enabled 0
2061 14:50:28.143941 PCI: 00:1e.2: enabled 0
2062 14:50:28.143979 PCI: 00:1e.3: enabled 1
2063 14:50:28.144017 PCI: 00:1f.0: enabled 1
2064 14:50:28.144056 PCI: 00:1f.1: enabled 0
2065 14:50:28.144095 PCI: 00:1f.2: enabled 1
2066 14:50:28.144134 PCI: 00:1f.3: enabled 1
2067 14:50:28.144172 PCI: 00:1f.4: enabled 0
2068 14:50:28.144209 PCI: 00:1f.5: enabled 1
2069 14:50:28.144246 PCI: 00:1f.6: enabled 0
2070 14:50:28.144284 PCI: 00:1f.7: enabled 0
2071 14:50:28.144321 GENERIC: 0.0: enabled 1
2072 14:50:28.144359 GENERIC: 0.0: enabled 1
2073 14:50:28.144398 GENERIC: 1.0: enabled 1
2074 14:50:28.144435 GENERIC: 0.0: enabled 1
2075 14:50:28.144473 GENERIC: 1.0: enabled 1
2076 14:50:28.144511 USB0 port 0: enabled 1
2077 14:50:28.144549 USB0 port 0: enabled 1
2078 14:50:28.144587 GENERIC: 0.0: enabled 1
2079 14:50:28.144625 I2C: 00:1a: enabled 1
2080 14:50:28.144662 I2C: 00:31: enabled 1
2081 14:50:28.144700 I2C: 00:32: enabled 1
2082 14:50:28.144737 I2C: 00:50: enabled 1
2083 14:50:28.144774 I2C: 00:10: enabled 1
2084 14:50:28.144811 I2C: 00:15: enabled 1
2085 14:50:28.144848 I2C: 00:2c: enabled 1
2086 14:50:28.144884 GENERIC: 0.0: enabled 1
2087 14:50:28.144921 SPI: 00: enabled 1
2088 14:50:28.144958 PNP: 0c09.0: enabled 1
2089 14:50:28.144996 GENERIC: 0.0: enabled 1
2090 14:50:28.145033 USB3 port 0: enabled 1
2091 14:50:28.145070 USB3 port 1: enabled 0
2092 14:50:28.145108 USB3 port 2: enabled 1
2093 14:50:28.145144 USB3 port 3: enabled 0
2094 14:50:28.145182 USB2 port 0: enabled 1
2095 14:50:28.145219 USB2 port 1: enabled 0
2096 14:50:28.145257 USB2 port 2: enabled 1
2097 14:50:28.145294 USB2 port 3: enabled 0
2098 14:50:28.145332 USB2 port 4: enabled 0
2099 14:50:28.145369 USB2 port 5: enabled 1
2100 14:50:28.145407 USB2 port 6: enabled 0
2101 14:50:28.145446 USB2 port 7: enabled 0
2102 14:50:28.145484 USB2 port 8: enabled 1
2103 14:50:28.145522 USB2 port 9: enabled 1
2104 14:50:28.145559 USB3 port 0: enabled 1
2105 14:50:28.145598 USB3 port 1: enabled 0
2106 14:50:28.145650 USB3 port 2: enabled 0
2107 14:50:28.145693 USB3 port 3: enabled 0
2108 14:50:28.145731 GENERIC: 0.0: enabled 1
2109 14:50:28.145769 GENERIC: 1.0: enabled 1
2110 14:50:28.145806 APIC: 00: enabled 1
2111 14:50:28.145844 APIC: 16: enabled 1
2112 14:50:28.145881 APIC: 10: enabled 1
2113 14:50:28.145919 APIC: 12: enabled 1
2114 14:50:28.145957 APIC: 14: enabled 1
2115 14:50:28.145996 APIC: 09: enabled 1
2116 14:50:28.146033 APIC: 01: enabled 1
2117 14:50:28.146071 APIC: 08: enabled 1
2118 14:50:28.146109 PCI: 01:00.0: enabled 1
2119 14:50:28.146146 BS: BS_DEV_INIT run times (exec / console): 13 / 1126 ms
2120 14:50:28.146185 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2121 14:50:28.146224 ELOG: NV offset 0xf20000 size 0x4000
2122 14:50:28.146262 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2123 14:50:28.146300 ELOG: Event(17) added with size 13 at 2024-05-28 14:50:23 UTC
2124 14:50:28.146339 ELOG: Event(92) added with size 9 at 2024-05-28 14:50:23 UTC
2125 14:50:28.146377 ELOG: Event(93) added with size 9 at 2024-05-28 14:50:23 UTC
2126 14:50:28.146415 ELOG: Event(9E) added with size 10 at 2024-05-28 14:50:23 UTC
2127 14:50:28.146452 ELOG: Event(9F) added with size 14 at 2024-05-28 14:50:23 UTC
2128 14:50:28.146491 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
2129 14:50:28.146531 ELOG: Event(A1) added with size 10 at 2024-05-28 14:50:23 UTC
2130 14:50:28.146569 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
2131 14:50:28.146608 ELOG: Event(A0) added with size 9 at 2024-05-28 14:50:23 UTC
2132 14:50:28.146647 elog_add_boot_reason: Logged dev mode boot
2133 14:50:28.146685 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2134 14:50:28.146722 Finalize devices...
2135 14:50:28.146760 PCI: 00:16.0 final
2136 14:50:28.146798 PCI: 00:1f.2 final
2137 14:50:28.146836 GENERIC: 0.0 final
2138 14:50:28.146873 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2139 14:50:28.146927 GENERIC: 1.0 final
2140 14:50:28.146968 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2141 14:50:28.147007 Devices finalized
2142 14:50:28.147046 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2143 14:50:28.147084 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2144 14:50:28.147122 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2145 14:50:28.147161 ME: HFSTS1 : 0x80030045
2146 14:50:28.147215 ME: HFSTS2 : 0x30280116
2147 14:50:28.147255 ME: HFSTS3 : 0x00000050
2148 14:50:28.147294 ME: HFSTS4 : 0x00004000
2149 14:50:28.147333 ME: HFSTS5 : 0x00000000
2150 14:50:28.147371 ME: HFSTS6 : 0x40400006
2151 14:50:28.147409 ME: Manufacturing Mode : YES
2152 14:50:28.147447 ME: SPI Protection Mode Enabled : YES
2153 14:50:28.147485 ME: FPFs Committed : YES
2154 14:50:28.147523 ME: Manufacturing Vars Locked : NO
2155 14:50:28.147562 ME: FW Partition Table : OK
2156 14:50:28.147599 ME: Bringup Loader Failure : NO
2157 14:50:28.147638 ME: Firmware Init Complete : NO
2158 14:50:28.147675 ME: Boot Options Present : NO
2159 14:50:28.147713 ME: Update In Progress : NO
2160 14:50:28.147752 ME: D0i3 Support : YES
2161 14:50:28.147790 ME: Low Power State Enabled : NO
2162 14:50:28.147827 ME: CPU Replaced : YES
2163 14:50:28.147865 ME: CPU Replacement Valid : YES
2164 14:50:28.147904 ME: Current Working State : 5
2165 14:50:28.147942 ME: Current Operation State : 1
2166 14:50:28.147980 ME: Current Operation Mode : 3
2167 14:50:28.148017 ME: Error Code : 0
2168 14:50:28.148055 ME: Enhanced Debug Mode : NO
2169 14:50:28.148093 ME: CPU Debug Disabled : YES
2170 14:50:28.148130 ME: TXT Support : NO
2171 14:50:28.148168 ME: WP for RO is enabled : YES
2172 14:50:28.148206 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2173 14:50:28.148244 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2174 14:50:28.148464 ELOG: Event(91) added with size 10 at 2024-05-28 14:50:24 UTC
2175 14:50:28.148512 Chrome EC: clear events_b mask to 0x0000000020004000
2176 14:50:28.148553 Ramoops buffer: 0x100000@0x7689a000.
2177 14:50:28.148592 BS: BS_WRITE_TABLES entry times (exec / console): 1 / 15 ms
2178 14:50:28.148631 CBFS: Found 'fallback/dsdt.aml' @0x788c0 size 0x4fd1 in mcache @0x76add1e8
2179 14:50:28.148671 CBFS: 'fallback/slic' not found.
2180 14:50:28.148709 ACPI: Writing ACPI tables at 7686e000.
2181 14:50:28.148747 ACPI: * FACS
2182 14:50:28.148786 ACPI: * DSDT
2183 14:50:28.148824 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2184 14:50:28.148863 ACPI: * FADT
2185 14:50:28.148902 SCI is IRQ9
2186 14:50:28.148945 ACPI: added table 1/32, length now 40
2187 14:50:28.148994 ACPI: * SSDT
2188 14:50:28.149036 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2189 14:50:28.149076 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2190 14:50:28.149115 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2191 14:50:28.149154 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2192 14:50:28.149192 CBFS: Found 'wifi_sar_0.hex' @0x3b1c40 size 0xe6 in mcache @0x76addf40
2193 14:50:28.149231 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2194 14:50:28.149270 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2195 14:50:28.149308 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2196 14:50:28.149345 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2197 14:50:28.149384 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2198 14:50:28.149422 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2199 14:50:28.149461 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2200 14:50:28.149499 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2201 14:50:28.149537 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2202 14:50:28.149575 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2203 14:50:28.149615 PS2K: Passing 80 keymaps to kernel
2204 14:50:28.149652 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2205 14:50:28.149691 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2206 14:50:28.149729 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2207 14:50:28.149768 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2208 14:50:28.149807 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2209 14:50:28.149847 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2210 14:50:28.149886 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2211 14:50:28.149924 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2212 14:50:28.149963 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2213 14:50:28.150001 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2214 14:50:28.150039 ACPI: added table 2/32, length now 44
2215 14:50:28.150077 ACPI: * MCFG
2216 14:50:28.150117 ACPI: added table 3/32, length now 48
2217 14:50:28.150154 ACPI: * TPM2
2218 14:50:28.150192 TPM2 log created at 0x7685e000
2219 14:50:28.150231 ACPI: added table 4/32, length now 52
2220 14:50:28.150268 ACPI: * LPIT
2221 14:50:28.150306 ACPI: added table 5/32, length now 56
2222 14:50:28.150345 ACPI: * MADT
2223 14:50:28.150398 SCI is IRQ9
2224 14:50:28.150439 ACPI: added table 6/32, length now 60
2225 14:50:28.150482 cmd_reg from pmc_make_ipc_cmd 1052838
2226 14:50:28.150521 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2227 14:50:28.150561 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2228 14:50:28.150600 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2229 14:50:28.150640 PMC CrashLog size in discovery mode: 0xC00
2230 14:50:28.150680 cpu crashlog bar addr: 0x80640000
2231 14:50:28.150717 cpu discovery table offset: 0x6030
2232 14:50:28.150754 cpu_crashlog_discovery_table buffer count: 0x3
2233 14:50:28.150800 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2234 14:50:28.150849 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2235 14:50:28.150889 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2236 14:50:28.150931 PMC crashLog size in discovery mode : 0xC00
2237 14:50:28.150972 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2238 14:50:28.151013 discover mode PMC crashlog size adjusted to: 0x200
2239 14:50:28.151056 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2240 14:50:28.151097 discover mode PMC crashlog size adjusted to: 0x0
2241 14:50:28.151137 m_cpu_crashLog_size : 0x3480 bytes
2242 14:50:28.151181 CPU crashLog present.
2243 14:50:28.151222 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2244 14:50:28.151262 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2245 14:50:28.151300 current = 76877550
2246 14:50:28.151338 ACPI: * DMAR
2247 14:50:28.151376 ACPI: added table 7/32, length now 64
2248 14:50:28.151414 ACPI: added table 8/32, length now 68
2249 14:50:28.151451 ACPI: * HPET
2250 14:50:28.151489 ACPI: added table 9/32, length now 72
2251 14:50:28.151527 ACPI: done.
2252 14:50:28.151564 ACPI tables: 38528 bytes.
2253 14:50:28.151602 smbios_write_tables: 76858000
2254 14:50:28.151640 EC returned error result code 3
2255 14:50:28.151678 Couldn't obtain OEM name from CBI
2256 14:50:28.151716 Create SMBIOS type 16
2257 14:50:28.151753 Create SMBIOS type 17
2258 14:50:28.151791 Create SMBIOS type 20
2259 14:50:28.151828 GENERIC: 0.0 (WIFI Device)
2260 14:50:28.151865 SMBIOS tables: 2156 bytes.
2261 14:50:28.151903 Writing table forward entry at 0x00000500
2262 14:50:28.151941 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6955
2263 14:50:28.151980 Writing coreboot table at 0x76892000
2264 14:50:28.152019 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2265 14:50:28.152058 1. 0000000000001000-000000000009ffff: RAM
2266 14:50:28.152278 2. 00000000000a0000-00000000000fffff: RESERVED
2267 14:50:28.152325 3. 0000000000100000-0000000076857fff: RAM
2268 14:50:28.152365 4. 0000000076858000-0000000076a2ffff: CONFIGURATION TABLES
2269 14:50:28.152409 5. 0000000076a30000-0000000076ab8fff: RAMSTAGE
2270 14:50:28.152456 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2271 14:50:28.152496 7. 0000000077000000-00000000803fffff: RESERVED
2272 14:50:28.152534 8. 00000000c0000000-00000000cfffffff: RESERVED
2273 14:50:28.152572 9. 00000000f8000000-00000000f9ffffff: RESERVED
2274 14:50:28.152610 10. 00000000fb000000-00000000fb000fff: RESERVED
2275 14:50:28.152650 11. 00000000fc800000-00000000fe7fffff: RESERVED
2276 14:50:28.152689 12. 00000000feb00000-00000000feb7ffff: RESERVED
2277 14:50:28.152727 13. 00000000fec00000-00000000fecfffff: RESERVED
2278 14:50:28.152766 14. 00000000fed40000-00000000fed6ffff: RESERVED
2279 14:50:28.152804 15. 00000000fed80000-00000000fed87fff: RESERVED
2280 14:50:28.152843 16. 00000000fed90000-00000000fed92fff: RESERVED
2281 14:50:28.152882 17. 00000000feda0000-00000000feda1fff: RESERVED
2282 14:50:28.152921 18. 00000000fedc0000-00000000feddffff: RESERVED
2283 14:50:28.152961 19. 0000000100000000-000000027fbfffff: RAM
2284 14:50:28.153000 Passing 4 GPIOs to payload:
2285 14:50:28.153039 NAME | PORT | POLARITY | VALUE
2286 14:50:28.153076 lid | undefined | high | high
2287 14:50:28.153114 power | undefined | high | low
2288 14:50:28.153152 oprom | undefined | high | low
2289 14:50:28.153190 EC in RW | 0x00000151 | high | low
2290 14:50:28.153229 Board ID: 3
2291 14:50:28.153267 FW config: 0x131
2292 14:50:28.153305 Wrote coreboot table at: 0x76892000, 0x6cc bytes, checksum 3291
2293 14:50:28.153343 coreboot table: 1764 bytes.
2294 14:50:28.153381 IMD ROOT 0. 0x76fff000 0x00001000
2295 14:50:28.153419 IMD SMALL 1. 0x76ffe000 0x00001000
2296 14:50:28.153457 FSP MEMORY 2. 0x76afe000 0x00500000
2297 14:50:28.153495 CONSOLE 3. 0x76ade000 0x00020000
2298 14:50:28.153533 RO MCACHE 4. 0x76add000 0x00000fd8
2299 14:50:28.153570 FMAP 5. 0x76adc000 0x0000064a
2300 14:50:28.153608 TIME STAMP 6. 0x76adb000 0x00000910
2301 14:50:28.153646 VBOOT WORK 7. 0x76ac7000 0x00014000
2302 14:50:28.153684 MEM INFO 8. 0x76ac6000 0x000003b8
2303 14:50:28.153734 ROMSTG STCK 9. 0x76ac5000 0x00001000
2304 14:50:28.153776 AFTER CAR 10. 0x76ab9000 0x0000c000
2305 14:50:28.153817 RAMSTAGE 11. 0x76a2f000 0x0008a000
2306 14:50:28.153857 ACPI BERT 12. 0x76a1f000 0x00010000
2307 14:50:28.153895 CHROMEOS NVS13. 0x76a1e000 0x00000f00
2308 14:50:28.153933 REFCODE 14. 0x769af000 0x0006f000
2309 14:50:28.153971 SMM BACKUP 15. 0x7699f000 0x00010000
2310 14:50:28.154009 IGD OPREGION16. 0x7699a000 0x00004203
2311 14:50:28.154048 RAMOOPS 17. 0x7689a000 0x00100000
2312 14:50:28.154086 COREBOOT 18. 0x76892000 0x00008000
2313 14:50:28.154124 ACPI 19. 0x7686e000 0x00024000
2314 14:50:28.154162 TPM2 TCGLOG20. 0x7685e000 0x00010000
2315 14:50:28.154201 PMC CRASHLOG21. 0x7685d000 0x00000c00
2316 14:50:28.154238 CPU CRASHLOG22. 0x76859000 0x00003480
2317 14:50:28.154277 SMBIOS 23. 0x76858000 0x00001000
2318 14:50:28.154314 IMD small region:
2319 14:50:28.154353 IMD ROOT 0. 0x76ffec00 0x00000400
2320 14:50:28.154391 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2321 14:50:28.154429 VPD 2. 0x76ffeb80 0x00000058
2322 14:50:28.154467 POWER STATE 3. 0x76ffeb20 0x00000044
2323 14:50:28.154504 ROMSTAGE 4. 0x76ffeb00 0x00000004
2324 14:50:28.154545 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2325 14:50:28.154585 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2326 14:50:28.154625 BS: BS_WRITE_TABLES run times (exec / console): 8 / 624 ms
2327 14:50:28.154663 MTRR: Physical address space:
2328 14:50:28.154701 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2329 14:50:28.154740 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2330 14:50:28.154780 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2331 14:50:28.154819 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2332 14:50:28.154858 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2333 14:50:28.154900 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2334 14:50:28.154941 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2335 14:50:28.154981 MTRR: Fixed MSR 0x250 0x0606060606060606
2336 14:50:28.155019 MTRR: Fixed MSR 0x258 0x0606060606060606
2337 14:50:28.155060 MTRR: Fixed MSR 0x259 0x0000000000000000
2338 14:50:28.155098 MTRR: Fixed MSR 0x268 0x0606060606060606
2339 14:50:28.155135 MTRR: Fixed MSR 0x269 0x0606060606060606
2340 14:50:28.155182 MTRR: Fixed MSR 0x26a 0x0606060606060606
2341 14:50:28.155225 MTRR: Fixed MSR 0x26b 0x0606060606060606
2342 14:50:28.155265 MTRR: Fixed MSR 0x26c 0x0606060606060606
2343 14:50:28.155303 MTRR: Fixed MSR 0x26d 0x0606060606060606
2344 14:50:28.155342 MTRR: Fixed MSR 0x26e 0x0606060606060606
2345 14:50:28.155378 MTRR: Fixed MSR 0x26f 0x0606060606060606
2346 14:50:28.155416 call enable_fixed_mtrr()
2347 14:50:28.155454 CPU physical address size: 39 bits
2348 14:50:28.155492 MTRR: default type WB/UC MTRR counts: 6/6.
2349 14:50:28.155530 MTRR: UC selected as default type.
2350 14:50:28.155569 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2351 14:50:28.155606 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2352 14:50:28.155644 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2353 14:50:28.155683 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2354 14:50:28.155721 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2355 14:50:28.155758 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2356 14:50:28.155796 MTRR: Fixed MSR 0x250 0x0606060606060606
2357 14:50:28.156019 MTRR: Fixed MSR 0x258 0x0606060606060606
2358 14:50:28.156069 MTRR: Fixed MSR 0x259 0x0000000000000000
2359 14:50:28.156110 MTRR: Fixed MSR 0x268 0x0606060606060606
2360 14:50:28.156149 MTRR: Fixed MSR 0x269 0x0606060606060606
2361 14:50:28.156188 MTRR: Fixed MSR 0x26a 0x0606060606060606
2362 14:50:28.156226 MTRR: Fixed MSR 0x26b 0x0606060606060606
2363 14:50:28.156264 MTRR: Fixed MSR 0x26c 0x0606060606060606
2364 14:50:28.156303 MTRR: Fixed MSR 0x26d 0x0606060606060606
2365 14:50:28.156342 MTRR: Fixed MSR 0x26e 0x0606060606060606
2366 14:50:28.156379 MTRR: Fixed MSR 0x26f 0x0606060606060606
2367 14:50:28.156420 MTRR: Fixed MSR 0x250 0x0606060606060606
2368 14:50:28.156465 MTRR: Fixed MSR 0x250 0x0606060606060606
2369 14:50:28.156525 MTRR: Fixed MSR 0x250 0x0606060606060606
2370 14:50:28.156590 MTRR: Fixed MSR 0x250 0x0606060606060606
2371 14:50:28.156635 MTRR: Fixed MSR 0x258 0x0606060606060606
2372 14:50:28.156674 MTRR: Fixed MSR 0x259 0x0000000000000000
2373 14:50:28.156712 MTRR: Fixed MSR 0x268 0x0606060606060606
2374 14:50:28.156750 MTRR: Fixed MSR 0x269 0x0606060606060606
2375 14:50:28.156790 MTRR: Fixed MSR 0x26a 0x0606060606060606
2376 14:50:28.156828 MTRR: Fixed MSR 0x26b 0x0606060606060606
2377 14:50:28.156866 MTRR: Fixed MSR 0x26c 0x0606060606060606
2378 14:50:28.156903 MTRR: Fixed MSR 0x26d 0x0606060606060606
2379 14:50:28.156941 MTRR: Fixed MSR 0x26e 0x0606060606060606
2380 14:50:28.156979 MTRR: Fixed MSR 0x26f 0x0606060606060606
2381 14:50:28.157017 MTRR: Fixed MSR 0x258 0x0606060606060606
2382 14:50:28.157055 call enable_fixed_mtrr()
2383 14:50:28.157105 MTRR: Fixed MSR 0x258 0x0606060606060606
2384 14:50:28.157163 call enable_fixed_mtrr()
2385 14:50:28.157205 CPU physical address size: 39 bits
2386 14:50:28.157243 MTRR: Fixed MSR 0x250 0x0606060606060606
2387 14:50:28.157281 MTRR: Fixed MSR 0x259 0x0000000000000000
2388 14:50:28.157319 MTRR: Fixed MSR 0x258 0x0606060606060606
2389 14:50:28.157357 MTRR: Fixed MSR 0x268 0x0606060606060606
2390 14:50:28.157394 MTRR: Fixed MSR 0x269 0x0606060606060606
2391 14:50:28.157432 MTRR: Fixed MSR 0x26a 0x0606060606060606
2392 14:50:28.157471 MTRR: Fixed MSR 0x26b 0x0606060606060606
2393 14:50:28.157509 MTRR: Fixed MSR 0x26c 0x0606060606060606
2394 14:50:28.157547 MTRR: Fixed MSR 0x26d 0x0606060606060606
2395 14:50:28.157585 MTRR: Fixed MSR 0x26e 0x0606060606060606
2396 14:50:28.157622 MTRR: Fixed MSR 0x26f 0x0606060606060606
2397 14:50:28.157660 MTRR: Fixed MSR 0x259 0x0000000000000000
2398 14:50:28.157697 call enable_fixed_mtrr()
2399 14:50:28.157735 MTRR: Fixed MSR 0x250 0x0606060606060606
2400 14:50:28.157774 MTRR: Fixed MSR 0x258 0x0606060606060606
2401 14:50:28.157813 MTRR: Fixed MSR 0x259 0x0000000000000000
2402 14:50:28.157850 MTRR: Fixed MSR 0x268 0x0606060606060606
2403 14:50:28.157888 MTRR: Fixed MSR 0x269 0x0606060606060606
2404 14:50:28.157926 MTRR: Fixed MSR 0x26a 0x0606060606060606
2405 14:50:28.157964 MTRR: Fixed MSR 0x26b 0x0606060606060606
2406 14:50:28.158001 MTRR: Fixed MSR 0x26c 0x0606060606060606
2407 14:50:28.158039 MTRR: Fixed MSR 0x26d 0x0606060606060606
2408 14:50:28.158075 MTRR: Fixed MSR 0x26e 0x0606060606060606
2409 14:50:28.158112 MTRR: Fixed MSR 0x26f 0x0606060606060606
2410 14:50:28.158150 MTRR: Fixed MSR 0x268 0x0606060606060606
2411 14:50:28.158187 call enable_fixed_mtrr()
2412 14:50:28.158226 CPU physical address size: 39 bits
2413 14:50:28.158264 MTRR: Fixed MSR 0x269 0x0606060606060606
2414 14:50:28.158301 CPU physical address size: 39 bits
2415 14:50:28.158339 MTRR: Fixed MSR 0x26a 0x0606060606060606
2416 14:50:28.158377 MTRR: Fixed MSR 0x259 0x0000000000000000
2417 14:50:28.158414 CPU physical address size: 39 bits
2418 14:50:28.158451 MTRR: Fixed MSR 0x268 0x0606060606060606
2419 14:50:28.158488 MTRR: Fixed MSR 0x26b 0x0606060606060606
2420 14:50:28.158526 MTRR: Fixed MSR 0x269 0x0606060606060606
2421 14:50:28.158564 MTRR: Fixed MSR 0x26c 0x0606060606060606
2422 14:50:28.158601 MTRR: Fixed MSR 0x26d 0x0606060606060606
2423 14:50:28.158638 MTRR: Fixed MSR 0x26e 0x0606060606060606
2424 14:50:28.158678 MTRR: Fixed MSR 0x26f 0x0606060606060606
2425 14:50:28.158728 MTRR: Fixed MSR 0x258 0x0606060606060606
2426 14:50:28.158768 call enable_fixed_mtrr()
2427 14:50:28.158806 MTRR: Fixed MSR 0x26a 0x0606060606060606
2428 14:50:28.158842 CPU physical address size: 39 bits
2429 14:50:28.158879 MTRR: Fixed MSR 0x26b 0x0606060606060606
2430 14:50:28.158917 MTRR: Fixed MSR 0x259 0x0000000000000000
2431 14:50:28.158979 MTRR: Fixed MSR 0x26c 0x0606060606060606
2432 14:50:28.159021 MTRR: Fixed MSR 0x26d 0x0606060606060606
2433 14:50:28.159086 MTRR: Fixed MSR 0x26e 0x0606060606060606
2434 14:50:28.159135 MTRR: Fixed MSR 0x26f 0x0606060606060606
2435 14:50:28.159183 MTRR: Fixed MSR 0x268 0x0606060606060606
2436 14:50:28.159225 call enable_fixed_mtrr()
2437 14:50:28.159265 MTRR: Fixed MSR 0x269 0x0606060606060606
2438 14:50:28.159303 MTRR: Fixed MSR 0x26a 0x0606060606060606
2439 14:50:28.159342 MTRR: Fixed MSR 0x26b 0x0606060606060606
2440 14:50:28.159381 MTRR: Fixed MSR 0x26c 0x0606060606060606
2441 14:50:28.159419 MTRR: Fixed MSR 0x26d 0x0606060606060606
2442 14:50:28.159457 MTRR: Fixed MSR 0x26e 0x0606060606060606
2443 14:50:28.159505 MTRR: Fixed MSR 0x26f 0x0606060606060606
2444 14:50:28.159556 CPU physical address size: 39 bits
2445 14:50:28.159601 call enable_fixed_mtrr()
2446 14:50:28.159640 CPU physical address size: 39 bits
2447 14:50:28.159678
2448 14:50:28.159717 MTRR check
2449 14:50:28.159755 Fixed MTRRs : Enabled
2450 14:50:28.159795 Variable MTRRs: Enabled
2451 14:50:28.159834
2452 14:50:28.159873 BS: BS_WRITE_TABLES exit times (exec / console): 247 / 150 ms
2453 14:50:28.159913 CBFS: Found 'fallback/payload' @0x3b1d80 size 0x25902 in mcache @0x76addf68
2454 14:50:28.159952 Checking segment from ROM address 0xffc26dac
2455 14:50:28.159989 Checking segment from ROM address 0xffc26dc8
2456 14:50:28.160028 Loading segment from ROM address 0xffc26dac
2457 14:50:28.160065 code (compression=1)
2458 14:50:28.160103 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc26de4 filesize 0x258ca
2459 14:50:28.160327 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2460 14:50:28.160375 using LZMA
2461 14:50:28.160418 [ 0x30000000, 30051214, 0x32668e60) <- ffc26de4
2462 14:50:28.160472 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2463 14:50:28.160513 Loading segment from ROM address 0xffc26dc8
2464 14:50:28.160552 Entry Point 0x30000000
2465 14:50:28.160589 Loaded segments
2466 14:50:28.160626 BS: BS_PAYLOAD_LOAD run times (exec / console): 87 / 62 ms
2467 14:50:28.160664 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2468 14:50:28.160701 Finalizing chipset.
2469 14:50:28.160739 apm_control: Finalizing SMM.
2470 14:50:28.160777 APMC done.
2471 14:50:28.160815 HECI: CSE device 16.0 is hidden
2472 14:50:28.160853 HECI: CSE device 16.1 is disabled
2473 14:50:28.160891 HECI: CSE device 16.2 is disabled
2474 14:50:28.160928 HECI: CSE device 16.3 is disabled
2475 14:50:28.160967 HECI: CSE device 16.4 is disabled
2476 14:50:28.161004 HECI: CSE device 16.5 is disabled
2477 14:50:28.161040 HECI: CSE device 16.0 is hidden
2478 14:50:28.161077 CSE is disabled, cannot send End-of-Post (EOP) message
2479 14:50:28.161116 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 35 ms
2480 14:50:28.161153 mp_park_aps done after 0 msecs.
2481 14:50:28.161190 Jumping to boot code at 0x30000000(0x76892000)
2482 14:50:28.161228 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2483 14:50:28.161267
2484 14:50:28.161304
2485 14:50:28.161343
2486 14:50:28.161381 Starting depthcharge on Volmar...
2487 14:50:28.161419
2488 14:50:28.161457 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2489 14:50:28.161495
2490 14:50:28.161532 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2491 14:50:28.161570
2492 14:50:28.161607 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2493 14:50:28.161644
2494 14:50:28.161681 configure_storage: Failed to remap 1C:2
2495 14:50:28.161717
2496 14:50:28.161754 Wipe memory regions:
2497 14:50:28.161790
2498 14:50:28.161827 [0x00000000001000, 0x000000000a0000)
2499 14:50:28.161864
2500 14:50:28.161900 [0x00000000100000, 0x00000030000000)
2501 14:50:28.161938
2502 14:50:28.161975 [0x00000032668e60, 0x00000076858000)
2503 14:50:28.162012
2504 14:50:28.162049 [0x00000100000000, 0x0000027fc00000)
2505 14:50:28.162086
2506 14:50:28.162123 ec_init: CrosEC protocol v3 supported (256, 256)
2507 14:50:28.162160
2508 14:50:28.162197 R8152: Initializing
2509 14:50:28.162235
2510 14:50:28.162277 Version 9 (ocp_data = 6010)
2511 14:50:28.162324
2512 14:50:28.162362 R8152: Done initializing
2513 14:50:28.162399
2514 14:50:28.162436 Adding net device
2515 14:50:28.162474
2516 14:50:28.162510 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2517 14:50:28.162547
2518 14:50:28.162585
2519 14:50:28.162873 end: 2.2.3 depthcharge-start (duration 00:00:03) [common]
2520 14:50:28.162953 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2521 14:50:28.163012 Setting prompt string to ['brya:']
2522 14:50:28.163067 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:43)
2523 14:50:28.163202 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2525 14:50:28.263541 brya: tftpboot 192.168.201.1 14064485/tftp-deploy-xu8uiabu/kernel/bzImage 14064485/tftp-deploy-xu8uiabu/kernel/cmdline 14064485/tftp-deploy-xu8uiabu/ramdisk/ramdisk.cpio.gz
2526 14:50:28.263730 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2527 14:50:28.263808 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2528 14:50:28.268022 tftpboot 192.168.201.1 14064485/tftp-deploy-xu8uiabu/kernel/bzImploy-xu8uiabu/kernel/cmdline 14064485/tftp-deploy-xu8uiabu/ramdisk/ramdisk.cpio.gz
2529 14:50:28.268098
2530 14:50:28.268147 Waiting for link
2531 14:50:28.470937
2532 14:50:28.471043 done.
2533 14:50:28.471102
2534 14:50:28.471149 MAC: 00:e0:4c:68:02:ef
2535 14:50:28.471208
2536 14:50:28.474719 Sending DHCP discover... done.
2537 14:50:28.474784
2538 14:50:28.477707 Waiting for reply... done.
2539 14:50:28.477771
2540 14:50:28.481042 Sending DHCP request... done.
2541 14:50:28.481100
2542 14:50:28.484912 Waiting for reply... done.
2543 14:50:28.487901
2544 14:50:28.487956 My ip is 192.168.201.16
2545 14:50:28.488010
2546 14:50:28.490802 The DHCP server ip is 192.168.201.1
2547 14:50:28.490855
2548 14:50:28.497529 TFTP server IP predefined by user: 192.168.201.1
2549 14:50:28.497612
2550 14:50:28.504351 Bootfile predefined by user: 14064485/tftp-deploy-xu8uiabu/kernel/bzImage
2551 14:50:28.504420
2552 14:50:28.507711 Sending tftp read request... done.
2553 14:50:28.507767
2554 14:50:28.511064 Waiting for the transfer...
2555 14:50:28.511140
2556 14:50:28.742739 00000000 ################################################################
2557 14:50:28.742844
2558 14:50:28.968547 00080000 ################################################################
2559 14:50:28.968656
2560 14:50:29.196160 00100000 ################################################################
2561 14:50:29.196289
2562 14:50:29.423646 00180000 ################################################################
2563 14:50:29.423748
2564 14:50:29.651230 00200000 ################################################################
2565 14:50:29.651340
2566 14:50:29.878050 00280000 ################################################################
2567 14:50:29.878163
2568 14:50:30.106694 00300000 ################################################################
2569 14:50:30.106799
2570 14:50:30.334092 00380000 ################################################################
2571 14:50:30.334200
2572 14:50:30.561047 00400000 ################################################################
2573 14:50:30.561150
2574 14:50:30.787218 00480000 ################################################################
2575 14:50:30.787326
2576 14:50:31.013078 00500000 ################################################################
2577 14:50:31.013188
2578 14:50:31.239126 00580000 ################################################################
2579 14:50:31.239245
2580 14:50:31.465543 00600000 ################################################################
2581 14:50:31.465659
2582 14:50:31.692424 00680000 ################################################################
2583 14:50:31.692527
2584 14:50:31.919904 00700000 ################################################################
2585 14:50:31.920017
2586 14:50:32.145430 00780000 ################################################################
2587 14:50:32.145529
2588 14:50:32.371379 00800000 ################################################################
2589 14:50:32.371485
2590 14:50:32.597722 00880000 ################################################################
2591 14:50:32.597831
2592 14:50:32.824004 00900000 ################################################################
2593 14:50:32.824110
2594 14:50:33.050200 00980000 ################################################################
2595 14:50:33.050310
2596 14:50:33.276196 00a00000 ################################################################
2597 14:50:33.276303
2598 14:50:33.503335 00a80000 ################################################################
2599 14:50:33.503445
2600 14:50:33.729074 00b00000 ################################################################
2601 14:50:33.729181
2602 14:50:33.955764 00b80000 ################################################################
2603 14:50:33.955876
2604 14:50:34.183158 00c00000 ################################################################
2605 14:50:34.183274
2606 14:50:34.408995 00c80000 ################################################################
2607 14:50:34.409106
2608 14:50:34.634967 00d00000 ################################################################
2609 14:50:34.635075
2610 14:50:34.859832 00d80000 ################################################################
2611 14:50:34.859942
2612 14:50:35.090141 00e00000 ################################################################
2613 14:50:35.090251
2614 14:50:35.319983 00e80000 ################################################################
2615 14:50:35.320098
2616 14:50:35.546989 00f00000 ################################################################
2617 14:50:35.547108
2618 14:50:35.777311 00f80000 ################################################################
2619 14:50:35.777423
2620 14:50:35.924654 01000000 ########################################### done.
2621 14:50:35.924769
2622 14:50:35.927988 The bootfile was 17121280 bytes long.
2623 14:50:35.928051
2624 14:50:35.931357 Sending tftp read request... done.
2625 14:50:35.931419
2626 14:50:35.934571 Waiting for the transfer...
2627 14:50:35.934627
2628 14:50:36.167667 00000000 ################################################################
2629 14:50:36.167779
2630 14:50:36.402761 00080000 ################################################################
2631 14:50:36.402863
2632 14:50:36.632692 00100000 ################################################################
2633 14:50:36.632802
2634 14:50:36.863519 00180000 ################################################################
2635 14:50:36.863632
2636 14:50:37.093092 00200000 ################################################################
2637 14:50:37.093204
2638 14:50:37.321823 00280000 ################################################################
2639 14:50:37.321936
2640 14:50:37.550217 00300000 ################################################################
2641 14:50:37.550329
2642 14:50:37.779842 00380000 ################################################################
2643 14:50:37.779954
2644 14:50:38.009961 00400000 ################################################################
2645 14:50:38.010069
2646 14:50:38.239423 00480000 ################################################################
2647 14:50:38.239531
2648 14:50:38.467992 00500000 ################################################################
2649 14:50:38.468102
2650 14:50:38.701991 00580000 ################################################################
2651 14:50:38.702118
2652 14:50:38.931996 00600000 ################################################################
2653 14:50:38.932101
2654 14:50:39.163624 00680000 ################################################################
2655 14:50:39.163737
2656 14:50:39.395558 00700000 ################################################################
2657 14:50:39.395671
2658 14:50:39.449474 00780000 ################ done.
2659 14:50:39.449564
2660 14:50:39.452634 Sending tftp read request... done.
2661 14:50:39.452708
2662 14:50:39.455934 Waiting for the transfer...
2663 14:50:39.455995
2664 14:50:39.456040 00000000 # done.
2665 14:50:39.456083
2666 14:50:39.466389 Command line loaded dynamically from TFTP file: 14064485/tftp-deploy-xu8uiabu/kernel/cmdline
2667 14:50:39.466449
2668 14:50:39.492708 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14064485/extract-nfsrootfs-j06keezc,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
2669 14:50:39.497810
2670 14:50:39.500950 Shutting down all USB controllers.
2671 14:50:39.501020
2672 14:50:39.501070 Removing current net device
2673 14:50:39.501113
2674 14:50:39.504320 Finalizing coreboot
2675 14:50:39.504379
2676 14:50:39.511042 Exiting depthcharge with code 4 at timestamp: 23903975
2677 14:50:39.511116
2678 14:50:39.511163
2679 14:50:39.511216 Starting kernel ...
2680 14:50:39.511258
2681 14:50:39.511298
2682 14:50:39.511644 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2683 14:50:39.511734 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2684 14:50:39.511792 Setting prompt string to ['Linux version [0-9]']
2685 14:50:39.511843 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2686 14:50:39.511891 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2688 14:55:11.512511 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2690 14:55:11.513266 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2692 14:55:11.513829 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2695 14:55:11.514761 end: 2 depthcharge-action (duration 00:05:00) [common]
2697 14:55:11.515584 Cleaning after the job
2698 14:55:11.515895 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064485/tftp-deploy-xu8uiabu/ramdisk
2699 14:55:11.518260 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064485/tftp-deploy-xu8uiabu/kernel
2700 14:55:11.519906 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064485/tftp-deploy-xu8uiabu/nfsrootfs
2701 14:55:11.543344 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14064485/tftp-deploy-xu8uiabu/modules
2702 14:55:11.544261 start: 4.1 power-off (timeout 00:00:30) [common]
2703 14:55:11.544397 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-3', '--port=1', '--command=off']
2704 14:55:12.464003 >> Command sent successfully.
2705 14:55:12.470648 Returned 0 in 0 seconds
2706 14:55:12.571286 end: 4.1 power-off (duration 00:00:01) [common]
2708 14:55:12.572333 start: 4.2 read-feedback (timeout 00:09:59) [common]
2709 14:55:12.573078 Listened to connection for namespace 'common' for up to 1s
2711 14:55:12.574047 Listened to connection for namespace 'common' for up to 1s
2712 14:55:13.573995 Finalising connection for namespace 'common'
2713 14:55:13.574520 Disconnecting from shell: Finalise
2714 14:55:13.574821
2715 14:55:13.675638 end: 4.2 read-feedback (duration 00:00:01) [common]
2716 14:55:13.676121 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14064485
2717 14:55:13.779956 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14064485
2718 14:55:13.780135 JobError: Your job cannot terminate cleanly.