Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 03:57:34.588587 lava-dispatcher, installed at version: 2022.04
2 03:57:34.588776 start: 0 validate
3 03:57:34.588902 Start time: 2022-07-05 03:57:34.588895+00:00 (UTC)
4 03:57:34.589034 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:57:34.589159 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220624.0%2Fx86%2Frootfs.cpio.gz exists
6 03:57:34.876000 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:57:34.876768 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.4.302-1083-g94e3113365c2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:57:36.384545 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:57:36.385284 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.4.302-1083-g94e3113365c2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 03:57:36.397377 validate duration: 1.81
12 03:57:36.398750 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 03:57:36.399414 start: 1.1 download-retry (timeout 00:10:00) [common]
14 03:57:36.399974 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 03:57:36.400530 Not decompressing ramdisk as can be used compressed.
16 03:57:36.401023 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220624.0/x86/rootfs.cpio.gz
17 03:57:36.401420 saving as /var/lib/lava/dispatcher/tmp/6750502/tftp-deploy-1cwgoexh/ramdisk/rootfs.cpio.gz
18 03:57:36.401778 total size: 8415744 (8MB)
19 03:57:36.407063 progress 0% (0MB)
20 03:57:36.417708 progress 5% (0MB)
21 03:57:36.424278 progress 10% (0MB)
22 03:57:36.429335 progress 15% (1MB)
23 03:57:36.433409 progress 20% (1MB)
24 03:57:36.437037 progress 25% (2MB)
25 03:57:36.440438 progress 30% (2MB)
26 03:57:36.443198 progress 35% (2MB)
27 03:57:36.446049 progress 40% (3MB)
28 03:57:36.448703 progress 45% (3MB)
29 03:57:36.451184 progress 50% (4MB)
30 03:57:36.453526 progress 55% (4MB)
31 03:57:36.455791 progress 60% (4MB)
32 03:57:36.457761 progress 65% (5MB)
33 03:57:36.459905 progress 70% (5MB)
34 03:57:36.461951 progress 75% (6MB)
35 03:57:36.464088 progress 80% (6MB)
36 03:57:36.466136 progress 85% (6MB)
37 03:57:36.468181 progress 90% (7MB)
38 03:57:36.470069 progress 95% (7MB)
39 03:57:36.472144 progress 100% (8MB)
40 03:57:36.472421 8MB downloaded in 0.07s (113.60MB/s)
41 03:57:36.472574 end: 1.1.1 http-download (duration 00:00:00) [common]
43 03:57:36.472827 end: 1.1 download-retry (duration 00:00:00) [common]
44 03:57:36.472920 start: 1.2 download-retry (timeout 00:10:00) [common]
45 03:57:36.473009 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 03:57:36.473117 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.4.302-1083-g94e3113365c2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 03:57:36.473188 saving as /var/lib/lava/dispatcher/tmp/6750502/tftp-deploy-1cwgoexh/kernel/bzImage
48 03:57:36.473251 total size: 6807440 (6MB)
49 03:57:36.473312 No compression specified
50 03:57:36.474388 progress 0% (0MB)
51 03:57:36.476141 progress 5% (0MB)
52 03:57:36.477814 progress 10% (0MB)
53 03:57:36.479600 progress 15% (1MB)
54 03:57:36.481226 progress 20% (1MB)
55 03:57:36.482846 progress 25% (1MB)
56 03:57:36.484633 progress 30% (1MB)
57 03:57:36.486249 progress 35% (2MB)
58 03:57:36.488047 progress 40% (2MB)
59 03:57:36.489644 progress 45% (2MB)
60 03:57:36.491299 progress 50% (3MB)
61 03:57:36.493061 progress 55% (3MB)
62 03:57:36.494660 progress 60% (3MB)
63 03:57:36.496445 progress 65% (4MB)
64 03:57:36.498118 progress 70% (4MB)
65 03:57:36.499804 progress 75% (4MB)
66 03:57:36.501560 progress 80% (5MB)
67 03:57:36.503194 progress 85% (5MB)
68 03:57:36.504795 progress 90% (5MB)
69 03:57:36.506538 progress 95% (6MB)
70 03:57:36.508209 progress 100% (6MB)
71 03:57:36.508471 6MB downloaded in 0.04s (184.35MB/s)
72 03:57:36.508622 end: 1.2.1 http-download (duration 00:00:00) [common]
74 03:57:36.508862 end: 1.2 download-retry (duration 00:00:00) [common]
75 03:57:36.508954 start: 1.3 download-retry (timeout 00:10:00) [common]
76 03:57:36.509043 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 03:57:36.509146 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.4.302-1083-g94e3113365c2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 03:57:36.509216 saving as /var/lib/lava/dispatcher/tmp/6750502/tftp-deploy-1cwgoexh/modules/modules.tar
79 03:57:36.509278 total size: 51972 (0MB)
80 03:57:36.509342 Using unxz to decompress xz
81 03:57:36.512767 progress 63% (0MB)
82 03:57:36.513159 progress 100% (0MB)
83 03:57:36.516494 0MB downloaded in 0.01s (6.88MB/s)
84 03:57:36.516735 end: 1.3.1 http-download (duration 00:00:00) [common]
86 03:57:36.517004 end: 1.3 download-retry (duration 00:00:00) [common]
87 03:57:36.517103 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 03:57:36.517200 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 03:57:36.517286 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 03:57:36.517373 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 03:57:36.517539 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat
92 03:57:36.517650 makedir: /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin
93 03:57:36.517739 makedir: /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/tests
94 03:57:36.517821 makedir: /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/results
95 03:57:36.517930 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-add-keys
96 03:57:36.518062 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-add-sources
97 03:57:36.518178 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-background-process-start
98 03:57:36.518292 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-background-process-stop
99 03:57:36.518404 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-common-functions
100 03:57:36.518513 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-echo-ipv4
101 03:57:36.518626 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-install-packages
102 03:57:36.518739 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-installed-packages
103 03:57:36.518849 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-os-build
104 03:57:36.519008 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-probe-channel
105 03:57:36.519121 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-probe-ip
106 03:57:36.519230 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-target-ip
107 03:57:36.519339 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-target-mac
108 03:57:36.519448 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-target-storage
109 03:57:36.519563 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-test-case
110 03:57:36.519675 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-test-event
111 03:57:36.519786 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-test-feedback
112 03:57:36.519895 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-test-raise
113 03:57:36.520010 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-test-reference
114 03:57:36.520140 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-test-runner
115 03:57:36.520249 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-test-set
116 03:57:36.520358 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-test-shell
117 03:57:36.520471 Updating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-install-packages (oe)
118 03:57:36.520584 Updating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/bin/lava-installed-packages (oe)
119 03:57:36.520685 Creating /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/environment
120 03:57:36.520774 LAVA metadata
121 03:57:36.520847 - LAVA_JOB_ID=6750502
122 03:57:36.520923 - LAVA_DISPATCHER_IP=192.168.201.1
123 03:57:36.521032 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 03:57:36.521101 skipped lava-vland-overlay
125 03:57:36.521180 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 03:57:36.521271 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 03:57:36.521337 skipped lava-multinode-overlay
128 03:57:36.521413 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 03:57:36.521498 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 03:57:36.521576 Loading test definitions
131 03:57:36.521678 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 03:57:36.521761 Using /lava-6750502 at stage 0
133 03:57:36.522029 uuid=6750502_1.4.2.3.1 testdef=None
134 03:57:36.522123 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 03:57:36.522212 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 03:57:36.522714 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 03:57:36.523007 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 03:57:36.523600 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 03:57:36.523849 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 03:57:36.524438 runner path: /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/0/tests/0_dmesg test_uuid 6750502_1.4.2.3.1
143 03:57:36.524589 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 03:57:36.524829 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 03:57:36.524905 Using /lava-6750502 at stage 1
147 03:57:36.525152 uuid=6750502_1.4.2.3.5 testdef=None
148 03:57:36.525244 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 03:57:36.525333 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 03:57:36.525782 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 03:57:36.526014 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 03:57:36.526595 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 03:57:36.526839 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 03:57:36.527442 runner path: /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/1/tests/1_bootrr test_uuid 6750502_1.4.2.3.5
157 03:57:36.527585 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 03:57:36.527799 Creating lava-test-runner.conf files
160 03:57:36.527867 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/0 for stage 0
161 03:57:36.527952 - 0_dmesg
162 03:57:36.528027 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6750502/lava-overlay-qen41tat/lava-6750502/1 for stage 1
163 03:57:36.528110 - 1_bootrr
164 03:57:36.528201 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 03:57:36.528293 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 03:57:36.534336 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 03:57:36.534453 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 03:57:36.534547 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 03:57:36.534635 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 03:57:36.534725 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 03:57:36.721090 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 03:57:36.721436 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 03:57:36.721548 extracting modules file /var/lib/lava/dispatcher/tmp/6750502/tftp-deploy-1cwgoexh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6750502/extract-overlay-ramdisk-k76m5q67/ramdisk
174 03:57:36.725704 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 03:57:36.725829 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 03:57:36.725920 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6750502/compress-overlay-297utaoh/overlay-1.4.2.4.tar.gz to ramdisk
177 03:57:36.725996 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6750502/compress-overlay-297utaoh/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6750502/extract-overlay-ramdisk-k76m5q67/ramdisk
178 03:57:36.729815 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 03:57:36.729927 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 03:57:36.730021 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 03:57:36.730160 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 03:57:36.730247 Building ramdisk /var/lib/lava/dispatcher/tmp/6750502/extract-overlay-ramdisk-k76m5q67/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6750502/extract-overlay-ramdisk-k76m5q67/ramdisk
183 03:57:36.795191 >> 48008 blocks
184 03:57:37.547930 rename /var/lib/lava/dispatcher/tmp/6750502/extract-overlay-ramdisk-k76m5q67/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6750502/tftp-deploy-1cwgoexh/ramdisk/ramdisk.cpio.gz
185 03:57:37.548344 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 03:57:37.548473 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 03:57:37.548579 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 03:57:37.548675 No mkimage arch provided, not using FIT.
189 03:57:37.548765 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 03:57:37.548852 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 03:57:37.548949 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 03:57:37.549045 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 03:57:37.549127 No LXC device requested
194 03:57:37.549216 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 03:57:37.549310 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 03:57:37.549397 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 03:57:37.549468 Checking files for TFTP limit of 4294967296 bytes.
198 03:57:37.549853 end: 1 tftp-deploy (duration 00:00:01) [common]
199 03:57:37.549957 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 03:57:37.550053 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 03:57:37.550186 substitutions:
202 03:57:37.550256 - {DTB}: None
203 03:57:37.550324 - {INITRD}: 6750502/tftp-deploy-1cwgoexh/ramdisk/ramdisk.cpio.gz
204 03:57:37.550387 - {KERNEL}: 6750502/tftp-deploy-1cwgoexh/kernel/bzImage
205 03:57:37.550447 - {LAVA_MAC}: None
206 03:57:37.550506 - {PRESEED_CONFIG}: None
207 03:57:37.550564 - {PRESEED_LOCAL}: None
208 03:57:37.550621 - {RAMDISK}: 6750502/tftp-deploy-1cwgoexh/ramdisk/ramdisk.cpio.gz
209 03:57:37.550678 - {ROOT_PART}: None
210 03:57:37.550734 - {ROOT}: None
211 03:57:37.550789 - {SERVER_IP}: 192.168.201.1
212 03:57:37.550845 - {TEE}: None
213 03:57:37.550924 Parsed boot commands:
214 03:57:37.550995 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 03:57:37.551144 Parsed boot commands: tftpboot 192.168.201.1 6750502/tftp-deploy-1cwgoexh/kernel/bzImage 6750502/tftp-deploy-1cwgoexh/kernel/cmdline 6750502/tftp-deploy-1cwgoexh/ramdisk/ramdisk.cpio.gz
216 03:57:37.551235 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 03:57:37.551326 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 03:57:37.551423 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 03:57:37.551514 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 03:57:37.551585 Not connected, no need to disconnect.
221 03:57:37.551663 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 03:57:37.551750 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 03:57:37.551818 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
224 03:57:37.554601 Setting prompt string to ['lava-test: # ']
225 03:57:37.554937 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 03:57:37.555043 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 03:57:37.555145 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 03:57:37.555237 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 03:57:37.555456 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
230 03:57:37.574796 >> Command sent successfully.
231 03:57:37.576838 Returned 0 in 0 seconds
232 03:57:37.677629 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 03:57:37.678213 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 03:57:37.678315 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 03:57:37.678401 Setting prompt string to 'Starting depthcharge on Helios...'
237 03:57:37.678466 Changing prompt to 'Starting depthcharge on Helios...'
238 03:57:37.678537 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 03:57:37.678805 [Enter `^Ec?' for help]
240 03:57:44.001276
241 03:57:44.001561
242 03:57:44.010913 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 03:57:44.014105 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 03:57:44.020714 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 03:57:44.024263 CPU: AES supported, TXT NOT supported, VT supported
246 03:57:44.030619 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 03:57:44.033808 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 03:57:44.040587 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 03:57:44.043702 VBOOT: Loading verstage.
250 03:57:44.047221 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
251 03:57:44.053888 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 03:57:44.060312 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 03:57:44.060446 CBFS @ c08000 size 3f8000
254 03:57:44.067132 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 03:57:44.070296 CBFS: Locating 'fallback/verstage'
256 03:57:44.073397 CBFS: Found @ offset 10fb80 size 1072c
257 03:57:44.077987
258 03:57:44.078087
259 03:57:44.087805 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 03:57:44.102025 Probing TPM: . done!
261 03:57:44.105371 TPM ready after 0 ms
262 03:57:44.108769 Connected to device vid:did:rid of 1ae0:0028:00
263 03:57:44.118830 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
264 03:57:44.122269 Initialized TPM device CR50 revision 0
265 03:57:44.165965 tlcl_send_startup: Startup return code is 0
266 03:57:44.166111 TPM: setup succeeded
267 03:57:44.178454 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 03:57:44.182588 Chrome EC: UHEPI supported
269 03:57:44.185798 Phase 1
270 03:57:44.188964 FMAP: area GBB found @ c05000 (12288 bytes)
271 03:57:44.195776 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 03:57:44.198838 Phase 2
273 03:57:44.198967 Phase 3
274 03:57:44.202134 FMAP: area GBB found @ c05000 (12288 bytes)
275 03:57:44.208806 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 03:57:44.215309 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
277 03:57:44.218404 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
278 03:57:44.224951 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 03:57:44.241159 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
280 03:57:44.244262 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
281 03:57:44.250877 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 03:57:44.255301 Phase 4
283 03:57:44.258361 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
284 03:57:44.265403 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 03:57:44.444702 VB2:vb2_rsa_verify_digest() Digest check failed!
286 03:57:44.451418 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 03:57:44.451568 Saving nvdata
288 03:57:44.454488 Reboot requested (10020007)
289 03:57:44.458193 board_reset() called!
290 03:57:44.458319 full_reset() called!
291 03:57:48.967769
292 03:57:48.967918
293 03:57:48.977791 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 03:57:48.980821 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 03:57:48.987525 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 03:57:48.991115 CPU: AES supported, TXT NOT supported, VT supported
297 03:57:48.997757 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 03:57:49.000983 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 03:57:49.007251 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 03:57:49.010802 VBOOT: Loading verstage.
301 03:57:49.014043 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
302 03:57:49.020603 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 03:57:49.027185 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 03:57:49.027280 CBFS @ c08000 size 3f8000
305 03:57:49.033516 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 03:57:49.036972 CBFS: Locating 'fallback/verstage'
307 03:57:49.040311 CBFS: Found @ offset 10fb80 size 1072c
308 03:57:49.044612
309 03:57:49.044700
310 03:57:49.054327 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 03:57:49.068823 Probing TPM: . done!
312 03:57:49.072433 TPM ready after 0 ms
313 03:57:49.075734 Connected to device vid:did:rid of 1ae0:0028:00
314 03:57:49.085736 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
315 03:57:49.089089 Initialized TPM device CR50 revision 0
316 03:57:49.132674 tlcl_send_startup: Startup return code is 0
317 03:57:49.132872 TPM: setup succeeded
318 03:57:49.145262 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 03:57:49.149171 Chrome EC: UHEPI supported
320 03:57:49.152349 Phase 1
321 03:57:49.155538 FMAP: area GBB found @ c05000 (12288 bytes)
322 03:57:49.162246 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
323 03:57:49.168795 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
324 03:57:49.171996 Recovery requested (1009000e)
325 03:57:49.178080 Saving nvdata
326 03:57:49.183953 tlcl_extend: response is 0
327 03:57:49.192597 tlcl_extend: response is 0
328 03:57:49.199899 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
329 03:57:49.203246 CBFS @ c08000 size 3f8000
330 03:57:49.209789 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
331 03:57:49.213036 CBFS: Locating 'fallback/romstage'
332 03:57:49.216467 CBFS: Found @ offset 80 size 145fc
333 03:57:49.219374 Accumulated console time in verstage 98 ms
334 03:57:49.219470
335 03:57:49.219541
336 03:57:49.232824 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
337 03:57:49.239200 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 03:57:49.242855 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 03:57:49.245918 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 03:57:49.252321 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
341 03:57:49.255710 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
342 03:57:49.258917 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
343 03:57:49.262300 TCO_STS: 0000 0000
344 03:57:49.265441 GEN_PMCON: e0015238 00000200
345 03:57:49.268976 GBLRST_CAUSE: 00000000 00000000
346 03:57:49.269068 prev_sleep_state 5
347 03:57:49.272425 Boot Count incremented to 24911
348 03:57:49.279418 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
349 03:57:49.282766 CBFS @ c08000 size 3f8000
350 03:57:49.289529 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
351 03:57:49.289621 CBFS: Locating 'fspm.bin'
352 03:57:49.296025 CBFS: Found @ offset 5ffc0 size 71000
353 03:57:49.299228 Chrome EC: UHEPI supported
354 03:57:49.305578 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
355 03:57:49.309083 Probing TPM: done!
356 03:57:49.315691 Connected to device vid:did:rid of 1ae0:0028:00
357 03:57:49.325715 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
358 03:57:49.332289 Initialized TPM device CR50 revision 0
359 03:57:49.342120 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
360 03:57:49.348386 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
361 03:57:49.351734 MRC cache found, size 1948
362 03:57:49.355403 bootmode is set to: 2
363 03:57:49.358506 PRMRR disabled by config.
364 03:57:49.362071 SPD INDEX = 1
365 03:57:49.365112 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 03:57:49.368236 CBFS @ c08000 size 3f8000
367 03:57:49.375094 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 03:57:49.375225 CBFS: Locating 'spd.bin'
369 03:57:49.378331 CBFS: Found @ offset 5fb80 size 400
370 03:57:49.381660 SPD: module type is LPDDR3
371 03:57:49.384751 SPD: module part is
372 03:57:49.391161 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
373 03:57:49.394714 SPD: device width 4 bits, bus width 8 bits
374 03:57:49.397929 SPD: module size is 4096 MB (per channel)
375 03:57:49.401336 memory slot: 0 configuration done.
376 03:57:49.404571 memory slot: 2 configuration done.
377 03:57:49.456352 CBMEM:
378 03:57:49.459778 IMD: root @ 99fff000 254 entries.
379 03:57:49.462720 IMD: root @ 99ffec00 62 entries.
380 03:57:49.466132 External stage cache:
381 03:57:49.469379 IMD: root @ 9abff000 254 entries.
382 03:57:49.472505 IMD: root @ 9abfec00 62 entries.
383 03:57:49.479325 Chrome EC: clear events_b mask to 0x0000000020004000
384 03:57:49.492063 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
385 03:57:49.507158 tlcl_write: response is 0
386 03:57:49.516335 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
387 03:57:49.523211 MRC: TPM MRC hash updated successfully.
388 03:57:49.523307 2 DIMMs found
389 03:57:49.526362 SMM Memory Map
390 03:57:49.529800 SMRAM : 0x9a000000 0x1000000
391 03:57:49.533023 Subregion 0: 0x9a000000 0xa00000
392 03:57:49.536485 Subregion 1: 0x9aa00000 0x200000
393 03:57:49.539991 Subregion 2: 0x9ac00000 0x400000
394 03:57:49.542868 top_of_ram = 0x9a000000
395 03:57:49.545997 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
396 03:57:49.552897 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
397 03:57:49.556191 MTRR Range: Start=ff000000 End=0 (Size 1000000)
398 03:57:49.562646 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 03:57:49.566006 CBFS @ c08000 size 3f8000
400 03:57:49.569184 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 03:57:49.572499 CBFS: Locating 'fallback/postcar'
402 03:57:49.578992 CBFS: Found @ offset 107000 size 4b44
403 03:57:49.582484 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
404 03:57:49.594662 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
405 03:57:49.597842 Processing 180 relocs. Offset value of 0x97c0c000
406 03:57:49.606315 Accumulated console time in romstage 285 ms
407 03:57:49.606425
408 03:57:49.606495
409 03:57:49.616342 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
410 03:57:49.623215 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 03:57:49.626323 CBFS @ c08000 size 3f8000
412 03:57:49.632918 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 03:57:49.635925 CBFS: Locating 'fallback/ramstage'
414 03:57:49.639389 CBFS: Found @ offset 43380 size 1b9e8
415 03:57:49.645842 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
416 03:57:49.677939 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
417 03:57:49.684702 Processing 3976 relocs. Offset value of 0x98db0000
418 03:57:49.687949 Accumulated console time in postcar 52 ms
419 03:57:49.688071
420 03:57:49.688191
421 03:57:49.697930 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
422 03:57:49.704184 FMAP: area RO_VPD found @ c00000 (16384 bytes)
423 03:57:49.707421 WARNING: RO_VPD is uninitialized or empty.
424 03:57:49.711067 FMAP: area RW_VPD found @ af8000 (8192 bytes)
425 03:57:49.717137 WARNING: RW_VPD is uninitialized or empty.
426 03:57:49.717270 Normal boot.
427 03:57:49.723798 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
428 03:57:49.727488 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 03:57:49.730520 CBFS @ c08000 size 3f8000
430 03:57:49.737418 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 03:57:49.740521 CBFS: Locating 'cpu_microcode_blob.bin'
432 03:57:49.743742 CBFS: Found @ offset 14700 size 2ec00
433 03:57:49.747024 microcode: sig=0x806ec pf=0x4 revision=0xc9
434 03:57:49.750165 Skip microcode update
435 03:57:49.756910 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 03:57:49.757002 CBFS @ c08000 size 3f8000
437 03:57:49.763457 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 03:57:49.767001 CBFS: Locating 'fsps.bin'
439 03:57:49.769895 CBFS: Found @ offset d1fc0 size 35000
440 03:57:49.795758 Detected 4 core, 8 thread CPU.
441 03:57:49.799350 Setting up SMI for CPU
442 03:57:49.802318 IED base = 0x9ac00000
443 03:57:49.802407 IED size = 0x00400000
444 03:57:49.805915 Will perform SMM setup.
445 03:57:49.812221 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
446 03:57:49.818760 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
447 03:57:49.822065 Processing 16 relocs. Offset value of 0x00030000
448 03:57:49.826109 Attempting to start 7 APs
449 03:57:49.829052 Waiting for 10ms after sending INIT.
450 03:57:49.845711 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
451 03:57:49.845810 done.
452 03:57:49.848951 AP: slot 7 apic_id 6.
453 03:57:49.852235 AP: slot 2 apic_id 7.
454 03:57:49.852337 AP: slot 4 apic_id 2.
455 03:57:49.855691 AP: slot 1 apic_id 3.
456 03:57:49.858713 AP: slot 5 apic_id 5.
457 03:57:49.858817 AP: slot 6 apic_id 4.
458 03:57:49.865385 Waiting for 2nd SIPI to complete...done.
459 03:57:49.871813 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
460 03:57:49.878681 Processing 13 relocs. Offset value of 0x00038000
461 03:57:49.881855 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
462 03:57:49.888459 Installing SMM handler to 0x9a000000
463 03:57:49.895041 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
464 03:57:49.901797 Processing 658 relocs. Offset value of 0x9a010000
465 03:57:49.908508 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
466 03:57:49.911759 Processing 13 relocs. Offset value of 0x9a008000
467 03:57:49.918173 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
468 03:57:49.924562 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
469 03:57:49.931348 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
470 03:57:49.934729 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
471 03:57:49.941277 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
472 03:57:49.947718 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
473 03:57:49.954708 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
474 03:57:49.957695 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
475 03:57:49.961577 Clearing SMI status registers
476 03:57:49.964719 SMI_STS: PM1
477 03:57:49.964813 PM1_STS: PWRBTN
478 03:57:49.968224 TCO_STS: SECOND_TO
479 03:57:49.971124 New SMBASE 0x9a000000
480 03:57:49.974486 In relocation handler: CPU 0
481 03:57:49.977770 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
482 03:57:49.981075 Writing SMRR. base = 0x9a000006, mask=0xff000800
483 03:57:49.984384 Relocation complete.
484 03:57:49.987546 New SMBASE 0x99fff400
485 03:57:49.991312 In relocation handler: CPU 3
486 03:57:49.994493 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
487 03:57:49.997536 Writing SMRR. base = 0x9a000006, mask=0xff000800
488 03:57:50.001045 Relocation complete.
489 03:57:50.004125 New SMBASE 0x99fff800
490 03:57:50.007412 In relocation handler: CPU 2
491 03:57:50.010782 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
492 03:57:50.013943 Writing SMRR. base = 0x9a000006, mask=0xff000800
493 03:57:50.017225 Relocation complete.
494 03:57:50.020773 New SMBASE 0x99ffe400
495 03:57:50.024092 In relocation handler: CPU 7
496 03:57:50.027138 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
497 03:57:50.030482 Writing SMRR. base = 0x9a000006, mask=0xff000800
498 03:57:50.033642 Relocation complete.
499 03:57:50.037135 New SMBASE 0x99fff000
500 03:57:50.037227 In relocation handler: CPU 4
501 03:57:50.043677 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
502 03:57:50.046989 Writing SMRR. base = 0x9a000006, mask=0xff000800
503 03:57:50.050195 Relocation complete.
504 03:57:50.053741 New SMBASE 0x99fffc00
505 03:57:50.053831 In relocation handler: CPU 1
506 03:57:50.060340 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
507 03:57:50.063434 Writing SMRR. base = 0x9a000006, mask=0xff000800
508 03:57:50.066491 Relocation complete.
509 03:57:50.069923 New SMBASE 0x99ffe800
510 03:57:50.070011 In relocation handler: CPU 6
511 03:57:50.076379 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
512 03:57:50.079442 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 03:57:50.083021 Relocation complete.
514 03:57:50.086377 New SMBASE 0x99ffec00
515 03:57:50.086465 In relocation handler: CPU 5
516 03:57:50.092802 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
517 03:57:50.096489 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 03:57:50.099684 Relocation complete.
519 03:57:50.099774 Initializing CPU #0
520 03:57:50.102842 CPU: vendor Intel device 806ec
521 03:57:50.109644 CPU: family 06, model 8e, stepping 0c
522 03:57:50.109740 Clearing out pending MCEs
523 03:57:50.112719 Setting up local APIC...
524 03:57:50.116031 apic_id: 0x00 done.
525 03:57:50.119451 Turbo is available but hidden
526 03:57:50.122753 Turbo is available and visible
527 03:57:50.122845 VMX status: enabled
528 03:57:50.125865 IA32_FEATURE_CONTROL status: locked
529 03:57:50.129255 Skip microcode update
530 03:57:50.132731 CPU #0 initialized
531 03:57:50.132820 Initializing CPU #3
532 03:57:50.135852 Initializing CPU #5
533 03:57:50.139197 Initializing CPU #6
534 03:57:50.142180 CPU: vendor Intel device 806ec
535 03:57:50.145862 CPU: family 06, model 8e, stepping 0c
536 03:57:50.148878 CPU: vendor Intel device 806ec
537 03:57:50.152116 CPU: family 06, model 8e, stepping 0c
538 03:57:50.155736 Clearing out pending MCEs
539 03:57:50.155839 CPU: vendor Intel device 806ec
540 03:57:50.162259 CPU: family 06, model 8e, stepping 0c
541 03:57:50.162350 Clearing out pending MCEs
542 03:57:50.165454 Initializing CPU #1
543 03:57:50.168786 Initializing CPU #4
544 03:57:50.172156 CPU: vendor Intel device 806ec
545 03:57:50.175193 CPU: family 06, model 8e, stepping 0c
546 03:57:50.178632 CPU: vendor Intel device 806ec
547 03:57:50.181910 CPU: family 06, model 8e, stepping 0c
548 03:57:50.185052 Clearing out pending MCEs
549 03:57:50.185191 Clearing out pending MCEs
550 03:57:50.188735 Setting up local APIC...
551 03:57:50.191626 Initializing CPU #7
552 03:57:50.191752 Initializing CPU #2
553 03:57:50.194886 CPU: vendor Intel device 806ec
554 03:57:50.201775 CPU: family 06, model 8e, stepping 0c
555 03:57:50.204877 CPU: vendor Intel device 806ec
556 03:57:50.208243 CPU: family 06, model 8e, stepping 0c
557 03:57:50.208391 Clearing out pending MCEs
558 03:57:50.211710 Clearing out pending MCEs
559 03:57:50.214870 Setting up local APIC...
560 03:57:50.218217 Setting up local APIC...
561 03:57:50.221415 Setting up local APIC...
562 03:57:50.221563 apic_id: 0x02 done.
563 03:57:50.224668 Setting up local APIC...
564 03:57:50.227966 Clearing out pending MCEs
565 03:57:50.231415 Setting up local APIC...
566 03:57:50.231614 apic_id: 0x06 done.
567 03:57:50.234717 apic_id: 0x07 done.
568 03:57:50.234869 VMX status: enabled
569 03:57:50.238121 VMX status: enabled
570 03:57:50.241198 IA32_FEATURE_CONTROL status: locked
571 03:57:50.244548 IA32_FEATURE_CONTROL status: locked
572 03:57:50.247782 Skip microcode update
573 03:57:50.251225 apic_id: 0x01 done.
574 03:57:50.251394 CPU #7 initialized
575 03:57:50.254328 Skip microcode update
576 03:57:50.254441 VMX status: enabled
577 03:57:50.257774 CPU #2 initialized
578 03:57:50.260941 apic_id: 0x03 done.
579 03:57:50.261053 VMX status: enabled
580 03:57:50.264271 VMX status: enabled
581 03:57:50.267680 IA32_FEATURE_CONTROL status: locked
582 03:57:50.270608 IA32_FEATURE_CONTROL status: locked
583 03:57:50.274124 Skip microcode update
584 03:57:50.277316 Skip microcode update
585 03:57:50.277408 CPU #4 initialized
586 03:57:50.280611 CPU #1 initialized
587 03:57:50.283901 IA32_FEATURE_CONTROL status: locked
588 03:57:50.284006 apic_id: 0x05 done.
589 03:57:50.287167 Setting up local APIC...
590 03:57:50.290582 Skip microcode update
591 03:57:50.293933 VMX status: enabled
592 03:57:50.294024 apic_id: 0x04 done.
593 03:57:50.297242 IA32_FEATURE_CONTROL status: locked
594 03:57:50.300584 VMX status: enabled
595 03:57:50.303792 Skip microcode update
596 03:57:50.307168 IA32_FEATURE_CONTROL status: locked
597 03:57:50.307294 CPU #5 initialized
598 03:57:50.310486 Skip microcode update
599 03:57:50.310587 CPU #3 initialized
600 03:57:50.313721 CPU #6 initialized
601 03:57:50.316928 bsp_do_flight_plan done after 452 msecs.
602 03:57:50.320283 CPU: frequency set to 4200 MHz
603 03:57:50.323377 Enabling SMIs.
604 03:57:50.323526 Locking SMM.
605 03:57:50.339198 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
606 03:57:50.342329 CBFS @ c08000 size 3f8000
607 03:57:50.349074 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
608 03:57:50.349201 CBFS: Locating 'vbt.bin'
609 03:57:50.352233 CBFS: Found @ offset 5f5c0 size 499
610 03:57:50.359190 Found a VBT of 4608 bytes after decompression
611 03:57:50.543217 Display FSP Version Info HOB
612 03:57:50.546794 Reference Code - CPU = 9.0.1e.30
613 03:57:50.549756 uCode Version = 0.0.0.ca
614 03:57:50.553050 TXT ACM version = ff.ff.ff.ffff
615 03:57:50.556161 Display FSP Version Info HOB
616 03:57:50.559561 Reference Code - ME = 9.0.1e.30
617 03:57:50.562979 MEBx version = 0.0.0.0
618 03:57:50.566170 ME Firmware Version = Consumer SKU
619 03:57:50.569332 Display FSP Version Info HOB
620 03:57:50.572560 Reference Code - CML PCH = 9.0.1e.30
621 03:57:50.575803 PCH-CRID Status = Disabled
622 03:57:50.579429 PCH-CRID Original Value = ff.ff.ff.ffff
623 03:57:50.582728 PCH-CRID New Value = ff.ff.ff.ffff
624 03:57:50.585639 OPROM - RST - RAID = ff.ff.ff.ffff
625 03:57:50.588989 ChipsetInit Base Version = ff.ff.ff.ffff
626 03:57:50.595625 ChipsetInit Oem Version = ff.ff.ff.ffff
627 03:57:50.595717 Display FSP Version Info HOB
628 03:57:50.602026 Reference Code - SA - System Agent = 9.0.1e.30
629 03:57:50.605468 Reference Code - MRC = 0.7.1.6c
630 03:57:50.608798 SA - PCIe Version = 9.0.1e.30
631 03:57:50.612135 SA-CRID Status = Disabled
632 03:57:50.615418 SA-CRID Original Value = 0.0.0.c
633 03:57:50.615516 SA-CRID New Value = 0.0.0.c
634 03:57:50.618425 OPROM - VBIOS = ff.ff.ff.ffff
635 03:57:50.622249 RTC Init
636 03:57:50.625343 Set power on after power failure.
637 03:57:50.628705 Disabling Deep S3
638 03:57:50.628791 Disabling Deep S3
639 03:57:50.631931 Disabling Deep S4
640 03:57:50.632025 Disabling Deep S4
641 03:57:50.635114 Disabling Deep S5
642 03:57:50.635195 Disabling Deep S5
643 03:57:50.641380 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
644 03:57:50.644880 Enumerating buses...
645 03:57:50.648026 Show all devs... Before device enumeration.
646 03:57:50.651449 Root Device: enabled 1
647 03:57:50.654646 CPU_CLUSTER: 0: enabled 1
648 03:57:50.654738 DOMAIN: 0000: enabled 1
649 03:57:50.657826 APIC: 00: enabled 1
650 03:57:50.661035 PCI: 00:00.0: enabled 1
651 03:57:50.664567 PCI: 00:02.0: enabled 1
652 03:57:50.664659 PCI: 00:04.0: enabled 0
653 03:57:50.667688 PCI: 00:05.0: enabled 0
654 03:57:50.671304 PCI: 00:12.0: enabled 1
655 03:57:50.671414 PCI: 00:12.5: enabled 0
656 03:57:50.674325 PCI: 00:12.6: enabled 0
657 03:57:50.677484 PCI: 00:14.0: enabled 1
658 03:57:50.680686 PCI: 00:14.1: enabled 0
659 03:57:50.680834 PCI: 00:14.3: enabled 1
660 03:57:50.684068 PCI: 00:14.5: enabled 0
661 03:57:50.687628 PCI: 00:15.0: enabled 1
662 03:57:50.690606 PCI: 00:15.1: enabled 1
663 03:57:50.690725 PCI: 00:15.2: enabled 0
664 03:57:50.693737 PCI: 00:15.3: enabled 0
665 03:57:50.697198 PCI: 00:16.0: enabled 1
666 03:57:50.700479 PCI: 00:16.1: enabled 0
667 03:57:50.700597 PCI: 00:16.2: enabled 0
668 03:57:50.703739 PCI: 00:16.3: enabled 0
669 03:57:50.707035 PCI: 00:16.4: enabled 0
670 03:57:50.710406 PCI: 00:16.5: enabled 0
671 03:57:50.710501 PCI: 00:17.0: enabled 1
672 03:57:50.713632 PCI: 00:19.0: enabled 1
673 03:57:50.717031 PCI: 00:19.1: enabled 0
674 03:57:50.720276 PCI: 00:19.2: enabled 0
675 03:57:50.720405 PCI: 00:1a.0: enabled 0
676 03:57:50.723523 PCI: 00:1c.0: enabled 0
677 03:57:50.726789 PCI: 00:1c.1: enabled 0
678 03:57:50.729816 PCI: 00:1c.2: enabled 0
679 03:57:50.729908 PCI: 00:1c.3: enabled 0
680 03:57:50.733122 PCI: 00:1c.4: enabled 0
681 03:57:50.736346 PCI: 00:1c.5: enabled 0
682 03:57:50.739779 PCI: 00:1c.6: enabled 0
683 03:57:50.739869 PCI: 00:1c.7: enabled 0
684 03:57:50.743211 PCI: 00:1d.0: enabled 1
685 03:57:50.746375 PCI: 00:1d.1: enabled 0
686 03:57:50.746463 PCI: 00:1d.2: enabled 0
687 03:57:50.749925 PCI: 00:1d.3: enabled 0
688 03:57:50.752941 PCI: 00:1d.4: enabled 0
689 03:57:50.756084 PCI: 00:1d.5: enabled 1
690 03:57:50.756172 PCI: 00:1e.0: enabled 1
691 03:57:50.759417 PCI: 00:1e.1: enabled 0
692 03:57:50.762624 PCI: 00:1e.2: enabled 1
693 03:57:50.766041 PCI: 00:1e.3: enabled 1
694 03:57:50.766130 PCI: 00:1f.0: enabled 1
695 03:57:50.769396 PCI: 00:1f.1: enabled 1
696 03:57:50.772771 PCI: 00:1f.2: enabled 1
697 03:57:50.775964 PCI: 00:1f.3: enabled 1
698 03:57:50.776053 PCI: 00:1f.4: enabled 1
699 03:57:50.779386 PCI: 00:1f.5: enabled 1
700 03:57:50.782441 PCI: 00:1f.6: enabled 0
701 03:57:50.785897 USB0 port 0: enabled 1
702 03:57:50.785991 I2C: 00:15: enabled 1
703 03:57:50.789203 I2C: 00:5d: enabled 1
704 03:57:50.792113 GENERIC: 0.0: enabled 1
705 03:57:50.792202 I2C: 00:1a: enabled 1
706 03:57:50.795570 I2C: 00:38: enabled 1
707 03:57:50.798879 I2C: 00:39: enabled 1
708 03:57:50.798975 I2C: 00:3a: enabled 1
709 03:57:50.802190 I2C: 00:3b: enabled 1
710 03:57:50.805842 PCI: 00:00.0: enabled 1
711 03:57:50.805932 SPI: 00: enabled 1
712 03:57:50.808562 SPI: 01: enabled 1
713 03:57:50.812119 PNP: 0c09.0: enabled 1
714 03:57:50.812209 USB2 port 0: enabled 1
715 03:57:50.815188 USB2 port 1: enabled 1
716 03:57:50.818392 USB2 port 2: enabled 0
717 03:57:50.821658 USB2 port 3: enabled 0
718 03:57:50.821756 USB2 port 5: enabled 0
719 03:57:50.825329 USB2 port 6: enabled 1
720 03:57:50.828429 USB2 port 9: enabled 1
721 03:57:50.828515 USB3 port 0: enabled 1
722 03:57:50.831715 USB3 port 1: enabled 1
723 03:57:50.834838 USB3 port 2: enabled 1
724 03:57:50.838197 USB3 port 3: enabled 1
725 03:57:50.838275 USB3 port 4: enabled 0
726 03:57:50.841525 APIC: 03: enabled 1
727 03:57:50.841600 APIC: 07: enabled 1
728 03:57:50.844658 APIC: 01: enabled 1
729 03:57:50.848172 APIC: 02: enabled 1
730 03:57:50.848265 APIC: 05: enabled 1
731 03:57:50.851416 APIC: 04: enabled 1
732 03:57:50.854681 APIC: 06: enabled 1
733 03:57:50.854770 Compare with tree...
734 03:57:50.857894 Root Device: enabled 1
735 03:57:50.861249 CPU_CLUSTER: 0: enabled 1
736 03:57:50.861337 APIC: 00: enabled 1
737 03:57:50.864345 APIC: 03: enabled 1
738 03:57:50.867765 APIC: 07: enabled 1
739 03:57:50.871190 APIC: 01: enabled 1
740 03:57:50.871277 APIC: 02: enabled 1
741 03:57:50.874576 APIC: 05: enabled 1
742 03:57:50.877797 APIC: 04: enabled 1
743 03:57:50.877884 APIC: 06: enabled 1
744 03:57:50.880892 DOMAIN: 0000: enabled 1
745 03:57:50.883831 PCI: 00:00.0: enabled 1
746 03:57:50.887312 PCI: 00:02.0: enabled 1
747 03:57:50.887429 PCI: 00:04.0: enabled 0
748 03:57:50.890886 PCI: 00:05.0: enabled 0
749 03:57:50.893873 PCI: 00:12.0: enabled 1
750 03:57:50.897299 PCI: 00:12.5: enabled 0
751 03:57:50.900551 PCI: 00:12.6: enabled 0
752 03:57:50.900639 PCI: 00:14.0: enabled 1
753 03:57:50.903999 USB0 port 0: enabled 1
754 03:57:50.907139 USB2 port 0: enabled 1
755 03:57:50.910237 USB2 port 1: enabled 1
756 03:57:50.913843 USB2 port 2: enabled 0
757 03:57:50.916832 USB2 port 3: enabled 0
758 03:57:50.916921 USB2 port 5: enabled 0
759 03:57:50.920110 USB2 port 6: enabled 1
760 03:57:50.923267 USB2 port 9: enabled 1
761 03:57:50.926612 USB3 port 0: enabled 1
762 03:57:50.929850 USB3 port 1: enabled 1
763 03:57:50.933063 USB3 port 2: enabled 1
764 03:57:50.933153 USB3 port 3: enabled 1
765 03:57:50.936194 USB3 port 4: enabled 0
766 03:57:50.939588 PCI: 00:14.1: enabled 0
767 03:57:50.942846 PCI: 00:14.3: enabled 1
768 03:57:50.946089 PCI: 00:14.5: enabled 0
769 03:57:50.946200 PCI: 00:15.0: enabled 1
770 03:57:50.949424 I2C: 00:15: enabled 1
771 03:57:50.952667 PCI: 00:15.1: enabled 1
772 03:57:50.956267 I2C: 00:5d: enabled 1
773 03:57:50.959488 GENERIC: 0.0: enabled 1
774 03:57:50.959584 PCI: 00:15.2: enabled 0
775 03:57:50.962758 PCI: 00:15.3: enabled 0
776 03:57:50.965886 PCI: 00:16.0: enabled 1
777 03:57:50.968993 PCI: 00:16.1: enabled 0
778 03:57:50.972337 PCI: 00:16.2: enabled 0
779 03:57:50.972427 PCI: 00:16.3: enabled 0
780 03:57:50.975697 PCI: 00:16.4: enabled 0
781 03:57:50.979013 PCI: 00:16.5: enabled 0
782 03:57:50.982468 PCI: 00:17.0: enabled 1
783 03:57:50.985536 PCI: 00:19.0: enabled 1
784 03:57:50.985626 I2C: 00:1a: enabled 1
785 03:57:50.988779 I2C: 00:38: enabled 1
786 03:57:50.991810 I2C: 00:39: enabled 1
787 03:57:50.995414 I2C: 00:3a: enabled 1
788 03:57:50.998652 I2C: 00:3b: enabled 1
789 03:57:50.998771 PCI: 00:19.1: enabled 0
790 03:57:51.002006 PCI: 00:19.2: enabled 0
791 03:57:51.005124 PCI: 00:1a.0: enabled 0
792 03:57:51.008475 PCI: 00:1c.0: enabled 0
793 03:57:51.011749 PCI: 00:1c.1: enabled 0
794 03:57:51.011837 PCI: 00:1c.2: enabled 0
795 03:57:51.014902 PCI: 00:1c.3: enabled 0
796 03:57:51.018320 PCI: 00:1c.4: enabled 0
797 03:57:51.021828 PCI: 00:1c.5: enabled 0
798 03:57:51.024851 PCI: 00:1c.6: enabled 0
799 03:57:51.024941 PCI: 00:1c.7: enabled 0
800 03:57:51.027846 PCI: 00:1d.0: enabled 1
801 03:57:51.031230 PCI: 00:1d.1: enabled 0
802 03:57:51.034437 PCI: 00:1d.2: enabled 0
803 03:57:51.037871 PCI: 00:1d.3: enabled 0
804 03:57:51.037955 PCI: 00:1d.4: enabled 0
805 03:57:51.041386 PCI: 00:1d.5: enabled 1
806 03:57:51.044426 PCI: 00:00.0: enabled 1
807 03:57:51.047728 PCI: 00:1e.0: enabled 1
808 03:57:51.050851 PCI: 00:1e.1: enabled 0
809 03:57:51.050952 PCI: 00:1e.2: enabled 1
810 03:57:51.054467 SPI: 00: enabled 1
811 03:57:51.057481 PCI: 00:1e.3: enabled 1
812 03:57:51.060881 SPI: 01: enabled 1
813 03:57:51.060968 PCI: 00:1f.0: enabled 1
814 03:57:51.064357 PNP: 0c09.0: enabled 1
815 03:57:51.067589 PCI: 00:1f.1: enabled 1
816 03:57:51.070537 PCI: 00:1f.2: enabled 1
817 03:57:51.074065 PCI: 00:1f.3: enabled 1
818 03:57:51.074155 PCI: 00:1f.4: enabled 1
819 03:57:51.077308 PCI: 00:1f.5: enabled 1
820 03:57:51.080586 PCI: 00:1f.6: enabled 0
821 03:57:51.083901 Root Device scanning...
822 03:57:51.086838 scan_static_bus for Root Device
823 03:57:51.086945 CPU_CLUSTER: 0 enabled
824 03:57:51.090239 DOMAIN: 0000 enabled
825 03:57:51.093583 DOMAIN: 0000 scanning...
826 03:57:51.096862 PCI: pci_scan_bus for bus 00
827 03:57:51.100219 PCI: 00:00.0 [8086/0000] ops
828 03:57:51.103469 PCI: 00:00.0 [8086/9b61] enabled
829 03:57:51.106542 PCI: 00:02.0 [8086/0000] bus ops
830 03:57:51.110046 PCI: 00:02.0 [8086/9b41] enabled
831 03:57:51.113242 PCI: 00:04.0 [8086/1903] disabled
832 03:57:51.116460 PCI: 00:08.0 [8086/1911] enabled
833 03:57:51.119751 PCI: 00:12.0 [8086/02f9] enabled
834 03:57:51.122986 PCI: 00:14.0 [8086/0000] bus ops
835 03:57:51.126140 PCI: 00:14.0 [8086/02ed] enabled
836 03:57:51.129421 PCI: 00:14.2 [8086/02ef] enabled
837 03:57:51.132907 PCI: 00:14.3 [8086/02f0] enabled
838 03:57:51.136077 PCI: 00:15.0 [8086/0000] bus ops
839 03:57:51.139098 PCI: 00:15.0 [8086/02e8] enabled
840 03:57:51.142485 PCI: 00:15.1 [8086/0000] bus ops
841 03:57:51.145880 PCI: 00:15.1 [8086/02e9] enabled
842 03:57:51.149193 PCI: 00:16.0 [8086/0000] ops
843 03:57:51.152387 PCI: 00:16.0 [8086/02e0] enabled
844 03:57:51.155485 PCI: 00:17.0 [8086/0000] ops
845 03:57:51.159062 PCI: 00:17.0 [8086/02d3] enabled
846 03:57:51.162201 PCI: 00:19.0 [8086/0000] bus ops
847 03:57:51.165693 PCI: 00:19.0 [8086/02c5] enabled
848 03:57:51.168954 PCI: 00:1d.0 [8086/0000] bus ops
849 03:57:51.172250 PCI: 00:1d.0 [8086/02b0] enabled
850 03:57:51.178637 PCI: Static device PCI: 00:1d.5 not found, disabling it.
851 03:57:51.181760 PCI: 00:1e.0 [8086/0000] ops
852 03:57:51.185275 PCI: 00:1e.0 [8086/02a8] enabled
853 03:57:51.188156 PCI: 00:1e.2 [8086/0000] bus ops
854 03:57:51.191665 PCI: 00:1e.2 [8086/02aa] enabled
855 03:57:51.194858 PCI: 00:1e.3 [8086/0000] bus ops
856 03:57:51.198311 PCI: 00:1e.3 [8086/02ab] enabled
857 03:57:51.201517 PCI: 00:1f.0 [8086/0000] bus ops
858 03:57:51.204601 PCI: 00:1f.0 [8086/0284] enabled
859 03:57:51.208020 PCI: Static device PCI: 00:1f.1 not found, disabling it.
860 03:57:51.214470 PCI: Static device PCI: 00:1f.2 not found, disabling it.
861 03:57:51.217961 PCI: 00:1f.3 [8086/0000] bus ops
862 03:57:51.221184 PCI: 00:1f.3 [8086/02c8] enabled
863 03:57:51.224256 PCI: 00:1f.4 [8086/0000] bus ops
864 03:57:51.227445 PCI: 00:1f.4 [8086/02a3] enabled
865 03:57:51.231012 PCI: 00:1f.5 [8086/0000] bus ops
866 03:57:51.234264 PCI: 00:1f.5 [8086/02a4] enabled
867 03:57:51.237373 PCI: Leftover static devices:
868 03:57:51.240759 PCI: 00:05.0
869 03:57:51.240865 PCI: 00:12.5
870 03:57:51.240934 PCI: 00:12.6
871 03:57:51.244098 PCI: 00:14.1
872 03:57:51.244184 PCI: 00:14.5
873 03:57:51.247326 PCI: 00:15.2
874 03:57:51.247415 PCI: 00:15.3
875 03:57:51.250464 PCI: 00:16.1
876 03:57:51.250569 PCI: 00:16.2
877 03:57:51.250638 PCI: 00:16.3
878 03:57:51.253771 PCI: 00:16.4
879 03:57:51.253858 PCI: 00:16.5
880 03:57:51.256809 PCI: 00:19.1
881 03:57:51.256893 PCI: 00:19.2
882 03:57:51.256975 PCI: 00:1a.0
883 03:57:51.260088 PCI: 00:1c.0
884 03:57:51.260178 PCI: 00:1c.1
885 03:57:51.263680 PCI: 00:1c.2
886 03:57:51.263810 PCI: 00:1c.3
887 03:57:51.266844 PCI: 00:1c.4
888 03:57:51.266950 PCI: 00:1c.5
889 03:57:51.267019 PCI: 00:1c.6
890 03:57:51.270097 PCI: 00:1c.7
891 03:57:51.270181 PCI: 00:1d.1
892 03:57:51.273290 PCI: 00:1d.2
893 03:57:51.273373 PCI: 00:1d.3
894 03:57:51.273441 PCI: 00:1d.4
895 03:57:51.276572 PCI: 00:1d.5
896 03:57:51.276664 PCI: 00:1e.1
897 03:57:51.279826 PCI: 00:1f.1
898 03:57:51.279926 PCI: 00:1f.2
899 03:57:51.283247 PCI: 00:1f.6
900 03:57:51.286425 PCI: Check your devicetree.cb.
901 03:57:51.286510 PCI: 00:02.0 scanning...
902 03:57:51.289504 scan_generic_bus for PCI: 00:02.0
903 03:57:51.296384 scan_generic_bus for PCI: 00:02.0 done
904 03:57:51.299515 scan_bus: scanning of bus PCI: 00:02.0 took 10168 usecs
905 03:57:51.302514 PCI: 00:14.0 scanning...
906 03:57:51.305705 scan_static_bus for PCI: 00:14.0
907 03:57:51.309194 USB0 port 0 enabled
908 03:57:51.312167 USB0 port 0 scanning...
909 03:57:51.315727 scan_static_bus for USB0 port 0
910 03:57:51.315816 USB2 port 0 enabled
911 03:57:51.318674 USB2 port 1 enabled
912 03:57:51.322365 USB2 port 2 disabled
913 03:57:51.322468 USB2 port 3 disabled
914 03:57:51.325239 USB2 port 5 disabled
915 03:57:51.325325 USB2 port 6 enabled
916 03:57:51.328432 USB2 port 9 enabled
917 03:57:51.331873 USB3 port 0 enabled
918 03:57:51.331975 USB3 port 1 enabled
919 03:57:51.335104 USB3 port 2 enabled
920 03:57:51.338301 USB3 port 3 enabled
921 03:57:51.338405 USB3 port 4 disabled
922 03:57:51.341646 USB2 port 0 scanning...
923 03:57:51.345145 scan_static_bus for USB2 port 0
924 03:57:51.348344 scan_static_bus for USB2 port 0 done
925 03:57:51.354688 scan_bus: scanning of bus USB2 port 0 took 9692 usecs
926 03:57:51.357946 USB2 port 1 scanning...
927 03:57:51.361387 scan_static_bus for USB2 port 1
928 03:57:51.364718 scan_static_bus for USB2 port 1 done
929 03:57:51.367749 scan_bus: scanning of bus USB2 port 1 took 9695 usecs
930 03:57:51.371209 USB2 port 6 scanning...
931 03:57:51.374467 scan_static_bus for USB2 port 6
932 03:57:51.377654 scan_static_bus for USB2 port 6 done
933 03:57:51.384000 scan_bus: scanning of bus USB2 port 6 took 9696 usecs
934 03:57:51.387318 USB2 port 9 scanning...
935 03:57:51.390609 scan_static_bus for USB2 port 9
936 03:57:51.393789 scan_static_bus for USB2 port 9 done
937 03:57:51.400397 scan_bus: scanning of bus USB2 port 9 took 9699 usecs
938 03:57:51.400489 USB3 port 0 scanning...
939 03:57:51.403588 scan_static_bus for USB3 port 0
940 03:57:51.409955 scan_static_bus for USB3 port 0 done
941 03:57:51.413468 scan_bus: scanning of bus USB3 port 0 took 9690 usecs
942 03:57:51.416799 USB3 port 1 scanning...
943 03:57:51.420113 scan_static_bus for USB3 port 1
944 03:57:51.423280 scan_static_bus for USB3 port 1 done
945 03:57:51.429688 scan_bus: scanning of bus USB3 port 1 took 9688 usecs
946 03:57:51.433049 USB3 port 2 scanning...
947 03:57:51.436495 scan_static_bus for USB3 port 2
948 03:57:51.439407 scan_static_bus for USB3 port 2 done
949 03:57:51.442985 scan_bus: scanning of bus USB3 port 2 took 9695 usecs
950 03:57:51.446040 USB3 port 3 scanning...
951 03:57:51.449491 scan_static_bus for USB3 port 3
952 03:57:51.452803 scan_static_bus for USB3 port 3 done
953 03:57:51.459294 scan_bus: scanning of bus USB3 port 3 took 9687 usecs
954 03:57:51.462463 scan_static_bus for USB0 port 0 done
955 03:57:51.469183 scan_bus: scanning of bus USB0 port 0 took 155245 usecs
956 03:57:51.472666 scan_static_bus for PCI: 00:14.0 done
957 03:57:51.479094 scan_bus: scanning of bus PCI: 00:14.0 took 172855 usecs
958 03:57:51.479183 PCI: 00:15.0 scanning...
959 03:57:51.485531 scan_generic_bus for PCI: 00:15.0
960 03:57:51.489182 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
961 03:57:51.492182 scan_generic_bus for PCI: 00:15.0 done
962 03:57:51.498777 scan_bus: scanning of bus PCI: 00:15.0 took 14292 usecs
963 03:57:51.498868 PCI: 00:15.1 scanning...
964 03:57:51.505798 scan_generic_bus for PCI: 00:15.1
965 03:57:51.508650 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
966 03:57:51.511795 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
967 03:57:51.515465 scan_generic_bus for PCI: 00:15.1 done
968 03:57:51.521949 scan_bus: scanning of bus PCI: 00:15.1 took 18571 usecs
969 03:57:51.525111 PCI: 00:19.0 scanning...
970 03:57:51.528154 scan_generic_bus for PCI: 00:19.0
971 03:57:51.531699 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
972 03:57:51.534635 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
973 03:57:51.541540 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
974 03:57:51.544677 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
975 03:57:51.548155 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
976 03:57:51.551204 scan_generic_bus for PCI: 00:19.0 done
977 03:57:51.557921 scan_bus: scanning of bus PCI: 00:19.0 took 30663 usecs
978 03:57:51.561247 PCI: 00:1d.0 scanning...
979 03:57:51.564538 do_pci_scan_bridge for PCI: 00:1d.0
980 03:57:51.567705 PCI: pci_scan_bus for bus 01
981 03:57:51.570934 PCI: 01:00.0 [1c5c/1327] enabled
982 03:57:51.574623 Enabling Common Clock Configuration
983 03:57:51.577729 L1 Sub-State supported from root port 29
984 03:57:51.580940 L1 Sub-State Support = 0xf
985 03:57:51.584161 CommonModeRestoreTime = 0x28
986 03:57:51.587480 Power On Value = 0x16, Power On Scale = 0x0
987 03:57:51.590711 ASPM: Enabled L1
988 03:57:51.597139 scan_bus: scanning of bus PCI: 00:1d.0 took 32741 usecs
989 03:57:51.597227 PCI: 00:1e.2 scanning...
990 03:57:51.603519 scan_generic_bus for PCI: 00:1e.2
991 03:57:51.606776 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
992 03:57:51.610073 scan_generic_bus for PCI: 00:1e.2 done
993 03:57:51.616487 scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs
994 03:57:51.616620 PCI: 00:1e.3 scanning...
995 03:57:51.619983 scan_generic_bus for PCI: 00:1e.3
996 03:57:51.626687 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
997 03:57:51.629656 scan_generic_bus for PCI: 00:1e.3 done
998 03:57:51.632945 scan_bus: scanning of bus PCI: 00:1e.3 took 13985 usecs
999 03:57:51.636383 PCI: 00:1f.0 scanning...
1000 03:57:51.639504 scan_static_bus for PCI: 00:1f.0
1001 03:57:51.642784 PNP: 0c09.0 enabled
1002 03:57:51.646243 scan_static_bus for PCI: 00:1f.0 done
1003 03:57:51.652742 scan_bus: scanning of bus PCI: 00:1f.0 took 12036 usecs
1004 03:57:51.656063 PCI: 00:1f.3 scanning...
1005 03:57:51.659301 scan_bus: scanning of bus PCI: 00:1f.3 took 2858 usecs
1006 03:57:51.662509 PCI: 00:1f.4 scanning...
1007 03:57:51.665774 scan_generic_bus for PCI: 00:1f.4
1008 03:57:51.668977 scan_generic_bus for PCI: 00:1f.4 done
1009 03:57:51.675814 scan_bus: scanning of bus PCI: 00:1f.4 took 10184 usecs
1010 03:57:51.678857 PCI: 00:1f.5 scanning...
1011 03:57:51.682080 scan_generic_bus for PCI: 00:1f.5
1012 03:57:51.685348 scan_generic_bus for PCI: 00:1f.5 done
1013 03:57:51.692197 scan_bus: scanning of bus PCI: 00:1f.5 took 10186 usecs
1014 03:57:51.698290 scan_bus: scanning of bus DOMAIN: 0000 took 604453 usecs
1015 03:57:51.701937 scan_static_bus for Root Device done
1016 03:57:51.708270 scan_bus: scanning of bus Root Device took 624317 usecs
1017 03:57:51.708484 done
1018 03:57:51.711681 Chrome EC: UHEPI supported
1019 03:57:51.718087 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1020 03:57:51.721491 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1021 03:57:51.728114 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1022 03:57:51.734908 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1023 03:57:51.738159 SPI flash protection: WPSW=0 SRP0=0
1024 03:57:51.745006 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1025 03:57:51.747898 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1026 03:57:51.751184 found VGA at PCI: 00:02.0
1027 03:57:51.754621 Setting up VGA for PCI: 00:02.0
1028 03:57:51.761112 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1029 03:57:51.764456 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1030 03:57:51.767634 Allocating resources...
1031 03:57:51.770873 Reading resources...
1032 03:57:51.774056 Root Device read_resources bus 0 link: 0
1033 03:57:51.777649 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1034 03:57:51.784170 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1035 03:57:51.787415 DOMAIN: 0000 read_resources bus 0 link: 0
1036 03:57:51.795171 PCI: 00:14.0 read_resources bus 0 link: 0
1037 03:57:51.798481 USB0 port 0 read_resources bus 0 link: 0
1038 03:57:51.806567 USB0 port 0 read_resources bus 0 link: 0 done
1039 03:57:51.809788 PCI: 00:14.0 read_resources bus 0 link: 0 done
1040 03:57:51.817085 PCI: 00:15.0 read_resources bus 1 link: 0
1041 03:57:51.820356 PCI: 00:15.0 read_resources bus 1 link: 0 done
1042 03:57:51.826799 PCI: 00:15.1 read_resources bus 2 link: 0
1043 03:57:51.830140 PCI: 00:15.1 read_resources bus 2 link: 0 done
1044 03:57:51.837818 PCI: 00:19.0 read_resources bus 3 link: 0
1045 03:57:51.844512 PCI: 00:19.0 read_resources bus 3 link: 0 done
1046 03:57:51.847791 PCI: 00:1d.0 read_resources bus 1 link: 0
1047 03:57:51.853957 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1048 03:57:51.857703 PCI: 00:1e.2 read_resources bus 4 link: 0
1049 03:57:51.863950 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1050 03:57:51.867169 PCI: 00:1e.3 read_resources bus 5 link: 0
1051 03:57:51.873703 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1052 03:57:51.877025 PCI: 00:1f.0 read_resources bus 0 link: 0
1053 03:57:51.883653 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1054 03:57:51.890108 DOMAIN: 0000 read_resources bus 0 link: 0 done
1055 03:57:51.893376 Root Device read_resources bus 0 link: 0 done
1056 03:57:51.896656 Done reading resources.
1057 03:57:51.903219 Show resources in subtree (Root Device)...After reading.
1058 03:57:51.906632 Root Device child on link 0 CPU_CLUSTER: 0
1059 03:57:51.910113 CPU_CLUSTER: 0 child on link 0 APIC: 00
1060 03:57:51.913377 APIC: 00
1061 03:57:51.913469 APIC: 03
1062 03:57:51.916542 APIC: 07
1063 03:57:51.916645 APIC: 01
1064 03:57:51.916716 APIC: 02
1065 03:57:51.919762 APIC: 05
1066 03:57:51.919859 APIC: 04
1067 03:57:51.919962 APIC: 06
1068 03:57:51.972471 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1069 03:57:51.972866 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1070 03:57:51.973342 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1071 03:57:51.973494 PCI: 00:00.0
1072 03:57:51.973813 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1073 03:57:51.973889 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1074 03:57:52.022478 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1075 03:57:52.022637 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1076 03:57:52.022959 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1077 03:57:52.023033 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1078 03:57:52.023479 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1079 03:57:52.023727 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1080 03:57:52.072271 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1081 03:57:52.072464 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1082 03:57:52.072574 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1083 03:57:52.072885 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1084 03:57:52.073215 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1085 03:57:52.079523 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1086 03:57:52.086028 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1087 03:57:52.095785 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1088 03:57:52.099167 PCI: 00:02.0
1089 03:57:52.108681 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1090 03:57:52.118799 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1091 03:57:52.125345 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1092 03:57:52.128622 PCI: 00:04.0
1093 03:57:52.128719 PCI: 00:08.0
1094 03:57:52.138334 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1095 03:57:52.141511 PCI: 00:12.0
1096 03:57:52.151487 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1097 03:57:52.154495 PCI: 00:14.0 child on link 0 USB0 port 0
1098 03:57:52.164545 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1099 03:57:52.171065 USB0 port 0 child on link 0 USB2 port 0
1100 03:57:52.171188 USB2 port 0
1101 03:57:52.174082 USB2 port 1
1102 03:57:52.174169 USB2 port 2
1103 03:57:52.177733 USB2 port 3
1104 03:57:52.177840 USB2 port 5
1105 03:57:52.180701 USB2 port 6
1106 03:57:52.180788 USB2 port 9
1107 03:57:52.184142 USB3 port 0
1108 03:57:52.187185 USB3 port 1
1109 03:57:52.187273 USB3 port 2
1110 03:57:52.190411 USB3 port 3
1111 03:57:52.190499 USB3 port 4
1112 03:57:52.193666 PCI: 00:14.2
1113 03:57:52.203511 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1114 03:57:52.213419 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1115 03:57:52.213528 PCI: 00:14.3
1116 03:57:52.223123 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1117 03:57:52.229672 PCI: 00:15.0 child on link 0 I2C: 01:15
1118 03:57:52.239248 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 03:57:52.239347 I2C: 01:15
1120 03:57:52.242550 PCI: 00:15.1 child on link 0 I2C: 02:5d
1121 03:57:52.252411 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1122 03:57:52.255771 I2C: 02:5d
1123 03:57:52.258780 GENERIC: 0.0
1124 03:57:52.258870 PCI: 00:16.0
1125 03:57:52.268846 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 03:57:52.272226 PCI: 00:17.0
1127 03:57:52.278769 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1128 03:57:52.288448 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1129 03:57:52.298386 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1130 03:57:52.304686 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1131 03:57:52.314588 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1132 03:57:52.320990 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1133 03:57:52.327794 PCI: 00:19.0 child on link 0 I2C: 03:1a
1134 03:57:52.337769 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 03:57:52.337868 I2C: 03:1a
1136 03:57:52.340875 I2C: 03:38
1137 03:57:52.340962 I2C: 03:39
1138 03:57:52.344040 I2C: 03:3a
1139 03:57:52.344127 I2C: 03:3b
1140 03:57:52.350665 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1141 03:57:52.357111 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1142 03:57:52.366790 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1143 03:57:52.376778 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1144 03:57:52.376881 PCI: 01:00.0
1145 03:57:52.386525 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 03:57:52.389770 PCI: 00:1e.0
1147 03:57:52.399893 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1148 03:57:52.409647 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1149 03:57:52.415946 PCI: 00:1e.2 child on link 0 SPI: 00
1150 03:57:52.425860 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 03:57:52.425995 SPI: 00
1152 03:57:52.429248 PCI: 00:1e.3 child on link 0 SPI: 01
1153 03:57:52.438829 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 03:57:52.442192 SPI: 01
1155 03:57:52.445573 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1156 03:57:52.455213 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1157 03:57:52.462135 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1158 03:57:52.465130 PNP: 0c09.0
1159 03:57:52.474908 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1160 03:57:52.475019 PCI: 00:1f.3
1161 03:57:52.484495 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1162 03:57:52.494675 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1163 03:57:52.497812 PCI: 00:1f.4
1164 03:57:52.507448 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1165 03:57:52.514123 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1166 03:57:52.517393 PCI: 00:1f.5
1167 03:57:52.527205 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1168 03:57:52.533929 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1169 03:57:52.540278 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1170 03:57:52.546799 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1171 03:57:52.549906 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1172 03:57:52.553256 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1173 03:57:52.556638 PCI: 00:17.0 18 * [0x60 - 0x67] io
1174 03:57:52.559859 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1175 03:57:52.566548 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1176 03:57:52.573086 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1177 03:57:52.582698 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1178 03:57:52.589441 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1179 03:57:52.595953 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1180 03:57:52.599099 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1181 03:57:52.608820 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1182 03:57:52.612224 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1183 03:57:52.618740 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1184 03:57:52.622064 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1185 03:57:52.628368 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1186 03:57:52.631638 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1187 03:57:52.638189 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1188 03:57:52.641626 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1189 03:57:52.648181 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1190 03:57:52.651383 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1191 03:57:52.657967 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1192 03:57:52.661253 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1193 03:57:52.667753 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1194 03:57:52.671383 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1195 03:57:52.677735 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1196 03:57:52.680968 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1197 03:57:52.687280 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1198 03:57:52.690791 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1199 03:57:52.697184 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1200 03:57:52.700397 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1201 03:57:52.703930 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1202 03:57:52.710526 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1203 03:57:52.714046 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1204 03:57:52.720204 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1205 03:57:52.729821 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1206 03:57:52.733201 avoid_fixed_resources: DOMAIN: 0000
1207 03:57:52.736510 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1208 03:57:52.743034 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1209 03:57:52.752643 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1210 03:57:52.759415 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1211 03:57:52.766030 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1212 03:57:52.775694 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1213 03:57:52.782094 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1214 03:57:52.788893 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1215 03:57:52.798626 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1216 03:57:52.805059 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1217 03:57:52.811742 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1218 03:57:52.818320 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1219 03:57:52.821547 Setting resources...
1220 03:57:52.827874 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1221 03:57:52.831266 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1222 03:57:52.834435 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1223 03:57:52.840789 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1224 03:57:52.844178 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1225 03:57:52.851001 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1226 03:57:52.857494 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1227 03:57:52.863792 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1228 03:57:52.870391 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1229 03:57:52.877071 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1230 03:57:52.880304 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1231 03:57:52.886698 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1232 03:57:52.890070 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1233 03:57:52.896538 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1234 03:57:52.899829 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1235 03:57:52.906226 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1236 03:57:52.909694 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1237 03:57:52.916185 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1238 03:57:52.919251 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1239 03:57:52.922432 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1240 03:57:52.929044 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1241 03:57:52.932387 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1242 03:57:52.938712 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1243 03:57:52.942091 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1244 03:57:52.948686 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1245 03:57:52.951845 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1246 03:57:52.958576 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1247 03:57:52.961644 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1248 03:57:52.968387 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1249 03:57:52.971636 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1250 03:57:52.978037 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1251 03:57:52.981491 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1252 03:57:52.990999 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1253 03:57:52.997693 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1254 03:57:53.004081 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1255 03:57:53.010842 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1256 03:57:53.017091 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1257 03:57:53.023816 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1258 03:57:53.030252 Root Device assign_resources, bus 0 link: 0
1259 03:57:53.033426 DOMAIN: 0000 assign_resources, bus 0 link: 0
1260 03:57:53.043518 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1261 03:57:53.049829 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1262 03:57:53.059479 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1263 03:57:53.066075 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1264 03:57:53.075788 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1265 03:57:53.082253 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1266 03:57:53.088875 PCI: 00:14.0 assign_resources, bus 0 link: 0
1267 03:57:53.092163 PCI: 00:14.0 assign_resources, bus 0 link: 0
1268 03:57:53.101814 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1269 03:57:53.108377 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1270 03:57:53.118079 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1271 03:57:53.124657 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1272 03:57:53.131270 PCI: 00:15.0 assign_resources, bus 1 link: 0
1273 03:57:53.134247 PCI: 00:15.0 assign_resources, bus 1 link: 0
1274 03:57:53.144098 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1275 03:57:53.147591 PCI: 00:15.1 assign_resources, bus 2 link: 0
1276 03:57:53.150617 PCI: 00:15.1 assign_resources, bus 2 link: 0
1277 03:57:53.160375 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1278 03:57:53.166892 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1279 03:57:53.176676 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1280 03:57:53.183378 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1281 03:57:53.189787 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1282 03:57:53.199523 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1283 03:57:53.206236 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1284 03:57:53.216015 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1285 03:57:53.219306 PCI: 00:19.0 assign_resources, bus 3 link: 0
1286 03:57:53.225980 PCI: 00:19.0 assign_resources, bus 3 link: 0
1287 03:57:53.232195 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1288 03:57:53.242155 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1289 03:57:53.251910 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1290 03:57:53.255160 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1291 03:57:53.261735 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1292 03:57:53.268451 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1293 03:57:53.274742 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1294 03:57:53.285031 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1295 03:57:53.288204 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1296 03:57:53.294412 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1297 03:57:53.301300 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1298 03:57:53.307642 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1299 03:57:53.310979 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1300 03:57:53.317491 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1301 03:57:53.320730 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1302 03:57:53.327162 LPC: Trying to open IO window from 800 size 1ff
1303 03:57:53.333717 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1304 03:57:53.343396 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1305 03:57:53.349848 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1306 03:57:53.359585 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1307 03:57:53.362783 DOMAIN: 0000 assign_resources, bus 0 link: 0
1308 03:57:53.369280 Root Device assign_resources, bus 0 link: 0
1309 03:57:53.369372 Done setting resources.
1310 03:57:53.375931 Show resources in subtree (Root Device)...After assigning values.
1311 03:57:53.382323 Root Device child on link 0 CPU_CLUSTER: 0
1312 03:57:53.385762 CPU_CLUSTER: 0 child on link 0 APIC: 00
1313 03:57:53.385880 APIC: 00
1314 03:57:53.389147 APIC: 03
1315 03:57:53.389232 APIC: 07
1316 03:57:53.392166 APIC: 01
1317 03:57:53.392251 APIC: 02
1318 03:57:53.392318 APIC: 05
1319 03:57:53.395388 APIC: 04
1320 03:57:53.395474 APIC: 06
1321 03:57:53.398617 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1322 03:57:53.408324 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1323 03:57:53.421394 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1324 03:57:53.421493 PCI: 00:00.0
1325 03:57:53.431475 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1326 03:57:53.441068 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1327 03:57:53.450630 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1328 03:57:53.460608 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1329 03:57:53.470388 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1330 03:57:53.480124 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1331 03:57:53.486494 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1332 03:57:53.496350 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1333 03:57:53.506155 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1334 03:57:53.516029 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1335 03:57:53.525861 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1336 03:57:53.535448 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1337 03:57:53.545229 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1338 03:57:53.555120 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1339 03:57:53.561680 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1340 03:57:53.571517 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1341 03:57:53.574774 PCI: 00:02.0
1342 03:57:53.584500 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1343 03:57:53.594655 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1344 03:57:53.604470 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1345 03:57:53.607673 PCI: 00:04.0
1346 03:57:53.607763 PCI: 00:08.0
1347 03:57:53.617390 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1348 03:57:53.620801 PCI: 00:12.0
1349 03:57:53.630872 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1350 03:57:53.633625 PCI: 00:14.0 child on link 0 USB0 port 0
1351 03:57:53.643467 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1352 03:57:53.650080 USB0 port 0 child on link 0 USB2 port 0
1353 03:57:53.650204 USB2 port 0
1354 03:57:53.653446 USB2 port 1
1355 03:57:53.653559 USB2 port 2
1356 03:57:53.656677 USB2 port 3
1357 03:57:53.656792 USB2 port 5
1358 03:57:53.660028 USB2 port 6
1359 03:57:53.660141 USB2 port 9
1360 03:57:53.663166 USB3 port 0
1361 03:57:53.666579 USB3 port 1
1362 03:57:53.666694 USB3 port 2
1363 03:57:53.669732 USB3 port 3
1364 03:57:53.669846 USB3 port 4
1365 03:57:53.673112 PCI: 00:14.2
1366 03:57:53.683046 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1367 03:57:53.692898 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1368 03:57:53.693001 PCI: 00:14.3
1369 03:57:53.705759 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1370 03:57:53.709124 PCI: 00:15.0 child on link 0 I2C: 01:15
1371 03:57:53.718693 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1372 03:57:53.722049 I2C: 01:15
1373 03:57:53.725214 PCI: 00:15.1 child on link 0 I2C: 02:5d
1374 03:57:53.735110 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1375 03:57:53.738346 I2C: 02:5d
1376 03:57:53.738433 GENERIC: 0.0
1377 03:57:53.741672 PCI: 00:16.0
1378 03:57:53.751312 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1379 03:57:53.751399 PCI: 00:17.0
1380 03:57:53.761139 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1381 03:57:53.771102 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1382 03:57:53.780763 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1383 03:57:53.790415 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1384 03:57:53.800611 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1385 03:57:53.810386 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1386 03:57:53.813508 PCI: 00:19.0 child on link 0 I2C: 03:1a
1387 03:57:53.823173 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1388 03:57:53.826459 I2C: 03:1a
1389 03:57:53.826553 I2C: 03:38
1390 03:57:53.829630 I2C: 03:39
1391 03:57:53.829717 I2C: 03:3a
1392 03:57:53.832951 I2C: 03:3b
1393 03:57:53.836263 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1394 03:57:53.846035 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1395 03:57:53.855659 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1396 03:57:53.865372 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1397 03:57:53.868670 PCI: 01:00.0
1398 03:57:53.878566 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1399 03:57:53.881920 PCI: 00:1e.0
1400 03:57:53.891693 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1401 03:57:53.901335 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1402 03:57:53.904640 PCI: 00:1e.2 child on link 0 SPI: 00
1403 03:57:53.914656 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1404 03:57:53.917881 SPI: 00
1405 03:57:53.921164 PCI: 00:1e.3 child on link 0 SPI: 01
1406 03:57:53.930824 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1407 03:57:53.934234 SPI: 01
1408 03:57:53.937436 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1409 03:57:53.947109 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1410 03:57:53.953747 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1411 03:57:53.956907 PNP: 0c09.0
1412 03:57:53.966862 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1413 03:57:53.966989 PCI: 00:1f.3
1414 03:57:53.976550 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1415 03:57:53.986651 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1416 03:57:53.989934 PCI: 00:1f.4
1417 03:57:53.999421 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1418 03:57:54.009620 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1419 03:57:54.009712 PCI: 00:1f.5
1420 03:57:54.019201 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1421 03:57:54.022436 Done allocating resources.
1422 03:57:54.028952 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1423 03:57:54.032338 Enabling resources...
1424 03:57:54.035336 PCI: 00:00.0 subsystem <- 8086/9b61
1425 03:57:54.038759 PCI: 00:00.0 cmd <- 06
1426 03:57:54.042145 PCI: 00:02.0 subsystem <- 8086/9b41
1427 03:57:54.045082 PCI: 00:02.0 cmd <- 03
1428 03:57:54.048467 PCI: 00:08.0 cmd <- 06
1429 03:57:54.051888 PCI: 00:12.0 subsystem <- 8086/02f9
1430 03:57:54.055085 PCI: 00:12.0 cmd <- 02
1431 03:57:54.058281 PCI: 00:14.0 subsystem <- 8086/02ed
1432 03:57:54.058405 PCI: 00:14.0 cmd <- 02
1433 03:57:54.062062 PCI: 00:14.2 cmd <- 02
1434 03:57:54.065202 PCI: 00:14.3 subsystem <- 8086/02f0
1435 03:57:54.068445 PCI: 00:14.3 cmd <- 02
1436 03:57:54.071694 PCI: 00:15.0 subsystem <- 8086/02e8
1437 03:57:54.074993 PCI: 00:15.0 cmd <- 02
1438 03:57:54.078350 PCI: 00:15.1 subsystem <- 8086/02e9
1439 03:57:54.081703 PCI: 00:15.1 cmd <- 02
1440 03:57:54.084982 PCI: 00:16.0 subsystem <- 8086/02e0
1441 03:57:54.088163 PCI: 00:16.0 cmd <- 02
1442 03:57:54.091469 PCI: 00:17.0 subsystem <- 8086/02d3
1443 03:57:54.094492 PCI: 00:17.0 cmd <- 03
1444 03:57:54.097824 PCI: 00:19.0 subsystem <- 8086/02c5
1445 03:57:54.101037 PCI: 00:19.0 cmd <- 02
1446 03:57:54.104626 PCI: 00:1d.0 bridge ctrl <- 0013
1447 03:57:54.107832 PCI: 00:1d.0 subsystem <- 8086/02b0
1448 03:57:54.110788 PCI: 00:1d.0 cmd <- 06
1449 03:57:54.114092 PCI: 00:1e.0 subsystem <- 8086/02a8
1450 03:57:54.117344 PCI: 00:1e.0 cmd <- 06
1451 03:57:54.120674 PCI: 00:1e.2 subsystem <- 8086/02aa
1452 03:57:54.120779 PCI: 00:1e.2 cmd <- 06
1453 03:57:54.127176 PCI: 00:1e.3 subsystem <- 8086/02ab
1454 03:57:54.127265 PCI: 00:1e.3 cmd <- 02
1455 03:57:54.133962 PCI: 00:1f.0 subsystem <- 8086/0284
1456 03:57:54.134059 PCI: 00:1f.0 cmd <- 407
1457 03:57:54.137445 PCI: 00:1f.3 subsystem <- 8086/02c8
1458 03:57:54.140456 PCI: 00:1f.3 cmd <- 02
1459 03:57:54.143930 PCI: 00:1f.4 subsystem <- 8086/02a3
1460 03:57:54.146829 PCI: 00:1f.4 cmd <- 03
1461 03:57:54.150416 PCI: 00:1f.5 subsystem <- 8086/02a4
1462 03:57:54.153450 PCI: 00:1f.5 cmd <- 406
1463 03:57:54.162690 PCI: 01:00.0 cmd <- 02
1464 03:57:54.167778 done.
1465 03:57:54.179245 ME: Version: 14.0.39.1367
1466 03:57:54.185694 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1467 03:57:54.188900 Initializing devices...
1468 03:57:54.189000 Root Device init ...
1469 03:57:54.195377 Chrome EC: Set SMI mask to 0x0000000000000000
1470 03:57:54.202140 Chrome EC: clear events_b mask to 0x0000000000000000
1471 03:57:54.205144 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1472 03:57:54.211842 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1473 03:57:54.218249 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1474 03:57:54.221484 Chrome EC: Set WAKE mask to 0x0000000000000000
1475 03:57:54.228066 Root Device init finished in 35166 usecs
1476 03:57:54.231407 CPU_CLUSTER: 0 init ...
1477 03:57:54.234414 CPU_CLUSTER: 0 init finished in 2447 usecs
1478 03:57:54.239775 PCI: 00:00.0 init ...
1479 03:57:54.243070 CPU TDP: 15 Watts
1480 03:57:54.246128 CPU PL2 = 64 Watts
1481 03:57:54.249802 PCI: 00:00.0 init finished in 7079 usecs
1482 03:57:54.252652 PCI: 00:02.0 init ...
1483 03:57:54.256105 PCI: 00:02.0 init finished in 2253 usecs
1484 03:57:54.259157 PCI: 00:08.0 init ...
1485 03:57:54.262359 PCI: 00:08.0 init finished in 2253 usecs
1486 03:57:54.265920 PCI: 00:12.0 init ...
1487 03:57:54.268980 PCI: 00:12.0 init finished in 2244 usecs
1488 03:57:54.272257 PCI: 00:14.0 init ...
1489 03:57:54.275447 PCI: 00:14.0 init finished in 2252 usecs
1490 03:57:54.279134 PCI: 00:14.2 init ...
1491 03:57:54.281890 PCI: 00:14.2 init finished in 2254 usecs
1492 03:57:54.285435 PCI: 00:14.3 init ...
1493 03:57:54.288678 PCI: 00:14.3 init finished in 2269 usecs
1494 03:57:54.292191 PCI: 00:15.0 init ...
1495 03:57:54.295280 DW I2C bus 0 at 0xd121f000 (400 KHz)
1496 03:57:54.301942 PCI: 00:15.0 init finished in 5968 usecs
1497 03:57:54.302032 PCI: 00:15.1 init ...
1498 03:57:54.308407 DW I2C bus 1 at 0xd1220000 (400 KHz)
1499 03:57:54.311579 PCI: 00:15.1 init finished in 5977 usecs
1500 03:57:54.314847 PCI: 00:16.0 init ...
1501 03:57:54.317876 PCI: 00:16.0 init finished in 2252 usecs
1502 03:57:54.321131 PCI: 00:19.0 init ...
1503 03:57:54.324450 DW I2C bus 4 at 0xd1222000 (400 KHz)
1504 03:57:54.327730 PCI: 00:19.0 init finished in 5977 usecs
1505 03:57:54.331014 PCI: 00:1d.0 init ...
1506 03:57:54.334278 Initializing PCH PCIe bridge.
1507 03:57:54.337743 PCI: 00:1d.0 init finished in 5287 usecs
1508 03:57:54.341734 PCI: 00:1f.0 init ...
1509 03:57:54.344713 IOAPIC: Initializing IOAPIC at 0xfec00000
1510 03:57:54.351193 IOAPIC: Bootstrap Processor Local APIC = 0x00
1511 03:57:54.351282 IOAPIC: ID = 0x02
1512 03:57:54.354429 IOAPIC: Dumping registers
1513 03:57:54.358011 reg 0x0000: 0x02000000
1514 03:57:54.361134 reg 0x0001: 0x00770020
1515 03:57:54.364434 reg 0x0002: 0x00000000
1516 03:57:54.367814 PCI: 00:1f.0 init finished in 23543 usecs
1517 03:57:54.370806 PCI: 00:1f.4 init ...
1518 03:57:54.374156 PCI: 00:1f.4 init finished in 2262 usecs
1519 03:57:54.386024 PCI: 01:00.0 init ...
1520 03:57:54.389065 PCI: 01:00.0 init finished in 2252 usecs
1521 03:57:54.393314 PNP: 0c09.0 init ...
1522 03:57:54.399716 Google Chrome EC uptime: 11.143 seconds
1523 03:57:54.403059 Google Chrome AP resets since EC boot: 0
1524 03:57:54.406341 Google Chrome most recent AP reset causes:
1525 03:57:54.412681 Google Chrome EC reset flags at last EC boot: reset-pin
1526 03:57:54.416278 PNP: 0c09.0 init finished in 20604 usecs
1527 03:57:54.419559 Devices initialized
1528 03:57:54.422630 Show all devs... After init.
1529 03:57:54.422744 Root Device: enabled 1
1530 03:57:54.426307 CPU_CLUSTER: 0: enabled 1
1531 03:57:54.429420 DOMAIN: 0000: enabled 1
1532 03:57:54.432484 APIC: 00: enabled 1
1533 03:57:54.432595 PCI: 00:00.0: enabled 1
1534 03:57:54.435815 PCI: 00:02.0: enabled 1
1535 03:57:54.438828 PCI: 00:04.0: enabled 0
1536 03:57:54.442137 PCI: 00:05.0: enabled 0
1537 03:57:54.442249 PCI: 00:12.0: enabled 1
1538 03:57:54.445381 PCI: 00:12.5: enabled 0
1539 03:57:54.448735 PCI: 00:12.6: enabled 0
1540 03:57:54.452006 PCI: 00:14.0: enabled 1
1541 03:57:54.452109 PCI: 00:14.1: enabled 0
1542 03:57:54.455115 PCI: 00:14.3: enabled 1
1543 03:57:54.458921 PCI: 00:14.5: enabled 0
1544 03:57:54.459058 PCI: 00:15.0: enabled 1
1545 03:57:54.461946 PCI: 00:15.1: enabled 1
1546 03:57:54.465183 PCI: 00:15.2: enabled 0
1547 03:57:54.468421 PCI: 00:15.3: enabled 0
1548 03:57:54.468541 PCI: 00:16.0: enabled 1
1549 03:57:54.471463 PCI: 00:16.1: enabled 0
1550 03:57:54.475028 PCI: 00:16.2: enabled 0
1551 03:57:54.478122 PCI: 00:16.3: enabled 0
1552 03:57:54.478209 PCI: 00:16.4: enabled 0
1553 03:57:54.481224 PCI: 00:16.5: enabled 0
1554 03:57:54.484607 PCI: 00:17.0: enabled 1
1555 03:57:54.488125 PCI: 00:19.0: enabled 1
1556 03:57:54.488227 PCI: 00:19.1: enabled 0
1557 03:57:54.491109 PCI: 00:19.2: enabled 0
1558 03:57:54.494477 PCI: 00:1a.0: enabled 0
1559 03:57:54.497686 PCI: 00:1c.0: enabled 0
1560 03:57:54.497773 PCI: 00:1c.1: enabled 0
1561 03:57:54.500850 PCI: 00:1c.2: enabled 0
1562 03:57:54.504096 PCI: 00:1c.3: enabled 0
1563 03:57:54.507487 PCI: 00:1c.4: enabled 0
1564 03:57:54.507575 PCI: 00:1c.5: enabled 0
1565 03:57:54.510790 PCI: 00:1c.6: enabled 0
1566 03:57:54.513972 PCI: 00:1c.7: enabled 0
1567 03:57:54.517378 PCI: 00:1d.0: enabled 1
1568 03:57:54.517465 PCI: 00:1d.1: enabled 0
1569 03:57:54.520689 PCI: 00:1d.2: enabled 0
1570 03:57:54.523676 PCI: 00:1d.3: enabled 0
1571 03:57:54.527231 PCI: 00:1d.4: enabled 0
1572 03:57:54.527324 PCI: 00:1d.5: enabled 0
1573 03:57:54.530248 PCI: 00:1e.0: enabled 1
1574 03:57:54.533327 PCI: 00:1e.1: enabled 0
1575 03:57:54.536662 PCI: 00:1e.2: enabled 1
1576 03:57:54.536757 PCI: 00:1e.3: enabled 1
1577 03:57:54.540085 PCI: 00:1f.0: enabled 1
1578 03:57:54.543393 PCI: 00:1f.1: enabled 0
1579 03:57:54.546672 PCI: 00:1f.2: enabled 0
1580 03:57:54.546759 PCI: 00:1f.3: enabled 1
1581 03:57:54.549898 PCI: 00:1f.4: enabled 1
1582 03:57:54.553052 PCI: 00:1f.5: enabled 1
1583 03:57:54.556443 PCI: 00:1f.6: enabled 0
1584 03:57:54.556531 USB0 port 0: enabled 1
1585 03:57:54.559553 I2C: 01:15: enabled 1
1586 03:57:54.562804 I2C: 02:5d: enabled 1
1587 03:57:54.562899 GENERIC: 0.0: enabled 1
1588 03:57:54.566027 I2C: 03:1a: enabled 1
1589 03:57:54.569623 I2C: 03:38: enabled 1
1590 03:57:54.572557 I2C: 03:39: enabled 1
1591 03:57:54.572644 I2C: 03:3a: enabled 1
1592 03:57:54.575643 I2C: 03:3b: enabled 1
1593 03:57:54.578872 PCI: 00:00.0: enabled 1
1594 03:57:54.578982 SPI: 00: enabled 1
1595 03:57:54.582420 SPI: 01: enabled 1
1596 03:57:54.585622 PNP: 0c09.0: enabled 1
1597 03:57:54.585709 USB2 port 0: enabled 1
1598 03:57:54.588866 USB2 port 1: enabled 1
1599 03:57:54.592225 USB2 port 2: enabled 0
1600 03:57:54.592312 USB2 port 3: enabled 0
1601 03:57:54.595532 USB2 port 5: enabled 0
1602 03:57:54.598785 USB2 port 6: enabled 1
1603 03:57:54.602065 USB2 port 9: enabled 1
1604 03:57:54.602152 USB3 port 0: enabled 1
1605 03:57:54.605027 USB3 port 1: enabled 1
1606 03:57:54.608449 USB3 port 2: enabled 1
1607 03:57:54.608535 USB3 port 3: enabled 1
1608 03:57:54.611632 USB3 port 4: enabled 0
1609 03:57:54.614918 APIC: 03: enabled 1
1610 03:57:54.615055 APIC: 07: enabled 1
1611 03:57:54.618139 APIC: 01: enabled 1
1612 03:57:54.621408 APIC: 02: enabled 1
1613 03:57:54.621533 APIC: 05: enabled 1
1614 03:57:54.624745 APIC: 04: enabled 1
1615 03:57:54.628137 APIC: 06: enabled 1
1616 03:57:54.628263 PCI: 00:08.0: enabled 1
1617 03:57:54.631392 PCI: 00:14.2: enabled 1
1618 03:57:54.634450 PCI: 01:00.0: enabled 1
1619 03:57:54.637942 Disabling ACPI via APMC:
1620 03:57:54.641183 done.
1621 03:57:54.644418 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1622 03:57:54.647817 ELOG: NV offset 0xaf0000 size 0x4000
1623 03:57:54.654786 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1624 03:57:54.661740 ELOG: Event(17) added with size 13 at 2022-07-05 03:55:57 UTC
1625 03:57:54.668070 POST: Unexpected post code in previous boot: 0x73
1626 03:57:54.674801 ELOG: Event(A3) added with size 11 at 2022-07-05 03:55:57 UTC
1627 03:57:54.681292 ELOG: Event(92) added with size 9 at 2022-07-05 03:55:57 UTC
1628 03:57:54.687844 ELOG: Event(93) added with size 9 at 2022-07-05 03:55:57 UTC
1629 03:57:54.694263 ELOG: Event(9A) added with size 9 at 2022-07-05 03:55:57 UTC
1630 03:57:54.700648 ELOG: Event(9E) added with size 10 at 2022-07-05 03:55:57 UTC
1631 03:57:54.706913 ELOG: Event(9F) added with size 14 at 2022-07-05 03:55:57 UTC
1632 03:57:54.710546 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1633 03:57:54.717010 ELOG: Event(A1) added with size 10 at 2022-07-05 03:55:57 UTC
1634 03:57:54.727072 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1635 03:57:54.733203 ELOG: Event(A0) added with size 9 at 2022-07-05 03:55:57 UTC
1636 03:57:54.736622 elog_add_boot_reason: Logged dev mode boot
1637 03:57:54.736710 Finalize devices...
1638 03:57:54.739767 PCI: 00:17.0 final
1639 03:57:54.743309 Devices finalized
1640 03:57:54.746535 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1641 03:57:54.752798 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1642 03:57:54.756269 ME: HFSTS1 : 0x90000245
1643 03:57:54.759231 ME: HFSTS2 : 0x3B850126
1644 03:57:54.765706 ME: HFSTS3 : 0x00000020
1645 03:57:54.769039 ME: HFSTS4 : 0x00004800
1646 03:57:54.772326 ME: HFSTS5 : 0x00000000
1647 03:57:54.775652 ME: HFSTS6 : 0x40400006
1648 03:57:54.778686 ME: Manufacturing Mode : NO
1649 03:57:54.782035 ME: FW Partition Table : OK
1650 03:57:54.788394 ME: Bringup Loader Failure : NO
1651 03:57:54.791727 ME: Firmware Init Complete : YES
1652 03:57:54.795078 ME: Boot Options Present : NO
1653 03:57:54.798384 ME: Update In Progress : NO
1654 03:57:54.801701 ME: D0i3 Support : YES
1655 03:57:54.804901 ME: Low Power State Enabled : NO
1656 03:57:54.808354 ME: CPU Replaced : NO
1657 03:57:54.811286 ME: CPU Replacement Valid : YES
1658 03:57:54.814448 ME: Current Working State : 5
1659 03:57:54.818157 ME: Current Operation State : 1
1660 03:57:54.821010 ME: Current Operation Mode : 0
1661 03:57:54.824284 ME: Error Code : 0
1662 03:57:54.827842 ME: CPU Debug Disabled : YES
1663 03:57:54.831037 ME: TXT Support : NO
1664 03:57:54.834067 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1665 03:57:54.840522 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1666 03:57:54.843965 CBFS @ c08000 size 3f8000
1667 03:57:54.850415 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1668 03:57:54.853576 CBFS: Locating 'fallback/dsdt.aml'
1669 03:57:54.856819 CBFS: Found @ offset 10bb80 size 3fa5
1670 03:57:54.860182 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1671 03:57:54.863628 CBFS @ c08000 size 3f8000
1672 03:57:54.870072 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1673 03:57:54.873160 CBFS: Locating 'fallback/slic'
1674 03:57:54.880230 CBFS: 'fallback/slic' not found.
1675 03:57:54.883811 ACPI: Writing ACPI tables at 99b3e000.
1676 03:57:54.883897 ACPI: * FACS
1677 03:57:54.886679 ACPI: * DSDT
1678 03:57:54.890103 Ramoops buffer: 0x100000@0x99a3d000.
1679 03:57:54.893405 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1680 03:57:54.899832 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1681 03:57:54.903179 Google Chrome EC: version:
1682 03:57:54.906457 ro: helios_v2.0.2659-56403530b
1683 03:57:54.909462 rw: helios_v2.0.2849-c41de27e7d
1684 03:57:54.909549 running image: 1
1685 03:57:54.914426 ACPI: * FADT
1686 03:57:54.914513 SCI is IRQ9
1687 03:57:54.920855 ACPI: added table 1/32, length now 40
1688 03:57:54.920944 ACPI: * SSDT
1689 03:57:54.924204 Found 1 CPU(s) with 8 core(s) each.
1690 03:57:54.930652 Error: Could not locate 'wifi_sar' in VPD.
1691 03:57:54.934123 Checking CBFS for default SAR values
1692 03:57:54.937504 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 03:57:54.940572 CBFS @ c08000 size 3f8000
1694 03:57:54.946891 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 03:57:54.950435 CBFS: Locating 'wifi_sar_defaults.hex'
1696 03:57:54.953674 CBFS: Found @ offset 5fac0 size 77
1697 03:57:54.957069 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1698 03:57:54.963531 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1699 03:57:54.966708 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1700 03:57:54.973159 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1701 03:57:54.976413 failed to find key in VPD: dsm_calib_r0_0
1702 03:57:54.986282 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1703 03:57:54.992837 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1704 03:57:54.996273 failed to find key in VPD: dsm_calib_r0_1
1705 03:57:55.002436 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1706 03:57:55.009244 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1707 03:57:55.012329 failed to find key in VPD: dsm_calib_r0_2
1708 03:57:55.022111 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1709 03:57:55.028515 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1710 03:57:55.031837 failed to find key in VPD: dsm_calib_r0_3
1711 03:57:55.041585 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1712 03:57:55.045067 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1713 03:57:55.051501 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1714 03:57:55.054649 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1715 03:57:55.058495 EC returned error result code 1
1716 03:57:55.061462 EC returned error result code 1
1717 03:57:55.064730 EC returned error result code 1
1718 03:57:55.071440 PS2K: Bad resp from EC. Vivaldi disabled!
1719 03:57:55.077902 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1720 03:57:55.081340 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1721 03:57:55.087899 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1722 03:57:55.091193 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1723 03:57:55.097332 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1724 03:57:55.104054 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1725 03:57:55.110599 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1726 03:57:55.117163 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1727 03:57:55.120315 ACPI: added table 2/32, length now 44
1728 03:57:55.120409 ACPI: * MCFG
1729 03:57:55.123569 ACPI: added table 3/32, length now 48
1730 03:57:55.126755 ACPI: * TPM2
1731 03:57:55.130032 TPM2 log created at 99a2d000
1732 03:57:55.133218 ACPI: added table 4/32, length now 52
1733 03:57:55.133314 ACPI: * MADT
1734 03:57:55.136651 SCI is IRQ9
1735 03:57:55.139802 ACPI: added table 5/32, length now 56
1736 03:57:55.143084 current = 99b43ac0
1737 03:57:55.143216 ACPI: * DMAR
1738 03:57:55.146278 ACPI: added table 6/32, length now 60
1739 03:57:55.149655 ACPI: * IGD OpRegion
1740 03:57:55.152824 GMA: Found VBT in CBFS
1741 03:57:55.156075 GMA: Found valid VBT in CBFS
1742 03:57:55.159213 ACPI: added table 7/32, length now 64
1743 03:57:55.159342 ACPI: * HPET
1744 03:57:55.162557 ACPI: added table 8/32, length now 68
1745 03:57:55.165940 ACPI: done.
1746 03:57:55.170143 ACPI tables: 31744 bytes.
1747 03:57:55.172358 smbios_write_tables: 99a2c000
1748 03:57:55.175785 EC returned error result code 3
1749 03:57:55.178901 Couldn't obtain OEM name from CBI
1750 03:57:55.182372 Create SMBIOS type 17
1751 03:57:55.185479 PCI: 00:00.0 (Intel Cannonlake)
1752 03:57:55.185606 PCI: 00:14.3 (Intel WiFi)
1753 03:57:55.188652 SMBIOS tables: 939 bytes.
1754 03:57:55.195426 Writing table forward entry at 0x00000500
1755 03:57:55.198469 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1756 03:57:55.202130 Writing coreboot table at 0x99b62000
1757 03:57:55.208594 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1758 03:57:55.215043 1. 0000000000001000-000000000009ffff: RAM
1759 03:57:55.218240 2. 00000000000a0000-00000000000fffff: RESERVED
1760 03:57:55.221574 3. 0000000000100000-0000000099a2bfff: RAM
1761 03:57:55.227963 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1762 03:57:55.234550 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1763 03:57:55.237704 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1764 03:57:55.244555 7. 000000009a000000-000000009f7fffff: RESERVED
1765 03:57:55.247529 8. 00000000e0000000-00000000efffffff: RESERVED
1766 03:57:55.254234 9. 00000000fc000000-00000000fc000fff: RESERVED
1767 03:57:55.257598 10. 00000000fe000000-00000000fe00ffff: RESERVED
1768 03:57:55.264082 11. 00000000fed10000-00000000fed17fff: RESERVED
1769 03:57:55.267426 12. 00000000fed80000-00000000fed83fff: RESERVED
1770 03:57:55.274105 13. 00000000fed90000-00000000fed91fff: RESERVED
1771 03:57:55.277009 14. 00000000feda0000-00000000feda1fff: RESERVED
1772 03:57:55.280426 15. 0000000100000000-000000045e7fffff: RAM
1773 03:57:55.287035 Graphics framebuffer located at 0xc0000000
1774 03:57:55.290141 Passing 5 GPIOs to payload:
1775 03:57:55.293447 NAME | PORT | POLARITY | VALUE
1776 03:57:55.300381 write protect | undefined | high | low
1777 03:57:55.303369 lid | undefined | high | high
1778 03:57:55.309791 power | undefined | high | low
1779 03:57:55.316483 oprom | undefined | high | low
1780 03:57:55.319691 EC in RW | 0x000000cb | high | low
1781 03:57:55.322751 Board ID: 4
1782 03:57:55.325986 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1783 03:57:55.329204 CBFS @ c08000 size 3f8000
1784 03:57:55.335903 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1785 03:57:55.342281 Wrote coreboot table at: 99b62000, 0x594 bytes, checksum ef9
1786 03:57:55.345701 coreboot table: 1452 bytes.
1787 03:57:55.349081 IMD ROOT 0. 99fff000 00001000
1788 03:57:55.352403 IMD SMALL 1. 99ffe000 00001000
1789 03:57:55.355388 FSP MEMORY 2. 99c4e000 003b0000
1790 03:57:55.358771 CONSOLE 3. 99c2e000 00020000
1791 03:57:55.362065 FMAP 4. 99c2d000 0000054e
1792 03:57:55.365315 TIME STAMP 5. 99c2c000 00000910
1793 03:57:55.368405 VBOOT WORK 6. 99c18000 00014000
1794 03:57:55.371785 MRC DATA 7. 99c16000 00001958
1795 03:57:55.375155 ROMSTG STCK 8. 99c15000 00001000
1796 03:57:55.378197 AFTER CAR 9. 99c0b000 0000a000
1797 03:57:55.381781 RAMSTAGE 10. 99baf000 0005c000
1798 03:57:55.384903 REFCODE 11. 99b7a000 00035000
1799 03:57:55.388264 SMM BACKUP 12. 99b6a000 00010000
1800 03:57:55.391445 COREBOOT 13. 99b62000 00008000
1801 03:57:55.394524 ACPI 14. 99b3e000 00024000
1802 03:57:55.397765 ACPI GNVS 15. 99b3d000 00001000
1803 03:57:55.400936 RAMOOPS 16. 99a3d000 00100000
1804 03:57:55.404230 TPM2 TCGLOG17. 99a2d000 00010000
1805 03:57:55.407658 SMBIOS 18. 99a2c000 00000800
1806 03:57:55.407766 IMD small region:
1807 03:57:55.414017 IMD ROOT 0. 99ffec00 00000400
1808 03:57:55.417407 FSP RUNTIME 1. 99ffebe0 00000004
1809 03:57:55.420624 EC HOSTEVENT 2. 99ffebc0 00000008
1810 03:57:55.423865 POWER STATE 3. 99ffeb80 00000040
1811 03:57:55.426921 ROMSTAGE 4. 99ffeb60 00000004
1812 03:57:55.430549 MEM INFO 5. 99ffe9a0 000001b9
1813 03:57:55.433790 MTRR: Physical address space:
1814 03:57:55.440161 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1815 03:57:55.446726 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1816 03:57:55.453193 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1817 03:57:55.459885 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1818 03:57:55.463076 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1819 03:57:55.469731 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1820 03:57:55.476131 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1821 03:57:55.482721 MTRR: Fixed MSR 0x250 0x0606060606060606
1822 03:57:55.485891 MTRR: Fixed MSR 0x258 0x0606060606060606
1823 03:57:55.489082 MTRR: Fixed MSR 0x259 0x0000000000000000
1824 03:57:55.492497 MTRR: Fixed MSR 0x268 0x0606060606060606
1825 03:57:55.499070 MTRR: Fixed MSR 0x269 0x0606060606060606
1826 03:57:55.502275 MTRR: Fixed MSR 0x26a 0x0606060606060606
1827 03:57:55.505736 MTRR: Fixed MSR 0x26b 0x0606060606060606
1828 03:57:55.508777 MTRR: Fixed MSR 0x26c 0x0606060606060606
1829 03:57:55.515181 MTRR: Fixed MSR 0x26d 0x0606060606060606
1830 03:57:55.518392 MTRR: Fixed MSR 0x26e 0x0606060606060606
1831 03:57:55.521595 MTRR: Fixed MSR 0x26f 0x0606060606060606
1832 03:57:55.524773 call enable_fixed_mtrr()
1833 03:57:55.528158 CPU physical address size: 39 bits
1834 03:57:55.534590 MTRR: default type WB/UC MTRR counts: 6/8.
1835 03:57:55.537834 MTRR: WB selected as default type.
1836 03:57:55.541356 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1837 03:57:55.547773 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1838 03:57:55.554224 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1839 03:57:55.560754 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1840 03:57:55.567180 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1841 03:57:55.574158 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1842 03:57:55.580298 MTRR: Fixed MSR 0x250 0x0606060606060606
1843 03:57:55.583756 MTRR: Fixed MSR 0x258 0x0606060606060606
1844 03:57:55.586917 MTRR: Fixed MSR 0x259 0x0000000000000000
1845 03:57:55.590284 MTRR: Fixed MSR 0x268 0x0606060606060606
1846 03:57:55.596639 MTRR: Fixed MSR 0x269 0x0606060606060606
1847 03:57:55.600310 MTRR: Fixed MSR 0x26a 0x0606060606060606
1848 03:57:55.603237 MTRR: Fixed MSR 0x26b 0x0606060606060606
1849 03:57:55.606796 MTRR: Fixed MSR 0x26c 0x0606060606060606
1850 03:57:55.612877 MTRR: Fixed MSR 0x26d 0x0606060606060606
1851 03:57:55.616456 MTRR: Fixed MSR 0x26e 0x0606060606060606
1852 03:57:55.619471 MTRR: Fixed MSR 0x26f 0x0606060606060606
1853 03:57:55.619593
1854 03:57:55.622844 MTRR check
1855 03:57:55.622974 Fixed MTRRs : Enabled
1856 03:57:55.625867 Variable MTRRs: Enabled
1857 03:57:55.625966
1858 03:57:55.629245 call enable_fixed_mtrr()
1859 03:57:55.635809 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1860 03:57:55.639074 CPU physical address size: 39 bits
1861 03:57:55.642270 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1862 03:57:55.648648 MTRR: Fixed MSR 0x250 0x0606060606060606
1863 03:57:55.652275 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 03:57:55.655253 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 03:57:55.658723 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 03:57:55.665407 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 03:57:55.668254 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 03:57:55.671876 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 03:57:55.675131 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 03:57:55.681453 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 03:57:55.684626 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 03:57:55.687880 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 03:57:55.691274 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 03:57:55.698230 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 03:57:55.698349 call enable_fixed_mtrr()
1876 03:57:55.704830 MTRR: Fixed MSR 0x259 0x0000000000000000
1877 03:57:55.707830 MTRR: Fixed MSR 0x268 0x0606060606060606
1878 03:57:55.711122 MTRR: Fixed MSR 0x269 0x0606060606060606
1879 03:57:55.714578 MTRR: Fixed MSR 0x26a 0x0606060606060606
1880 03:57:55.721072 MTRR: Fixed MSR 0x26b 0x0606060606060606
1881 03:57:55.724386 MTRR: Fixed MSR 0x26c 0x0606060606060606
1882 03:57:55.727756 MTRR: Fixed MSR 0x26d 0x0606060606060606
1883 03:57:55.731113 MTRR: Fixed MSR 0x26e 0x0606060606060606
1884 03:57:55.737490 MTRR: Fixed MSR 0x26f 0x0606060606060606
1885 03:57:55.741126 CPU physical address size: 39 bits
1886 03:57:55.744307 call enable_fixed_mtrr()
1887 03:57:55.747487 MTRR: Fixed MSR 0x250 0x0606060606060606
1888 03:57:55.750441 MTRR: Fixed MSR 0x250 0x0606060606060606
1889 03:57:55.753753 MTRR: Fixed MSR 0x258 0x0606060606060606
1890 03:57:55.760211 MTRR: Fixed MSR 0x259 0x0000000000000000
1891 03:57:55.763590 MTRR: Fixed MSR 0x268 0x0606060606060606
1892 03:57:55.766803 MTRR: Fixed MSR 0x269 0x0606060606060606
1893 03:57:55.770109 MTRR: Fixed MSR 0x26a 0x0606060606060606
1894 03:57:55.776488 MTRR: Fixed MSR 0x26b 0x0606060606060606
1895 03:57:55.779802 MTRR: Fixed MSR 0x26c 0x0606060606060606
1896 03:57:55.783053 MTRR: Fixed MSR 0x26d 0x0606060606060606
1897 03:57:55.786344 MTRR: Fixed MSR 0x26e 0x0606060606060606
1898 03:57:55.792937 MTRR: Fixed MSR 0x26f 0x0606060606060606
1899 03:57:55.796252 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 03:57:55.799523 call enable_fixed_mtrr()
1901 03:57:55.802723 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 03:57:55.806049 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 03:57:55.812628 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 03:57:55.815956 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 03:57:55.819142 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 03:57:55.822280 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 03:57:55.825826 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 03:57:55.832321 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 03:57:55.835506 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 03:57:55.838798 CPU physical address size: 39 bits
1911 03:57:55.841851 call enable_fixed_mtrr()
1912 03:57:55.845443 CPU physical address size: 39 bits
1913 03:57:55.848767 MTRR: Fixed MSR 0x250 0x0606060606060606
1914 03:57:55.855110 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 03:57:55.858395 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 03:57:55.861683 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 03:57:55.865061 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 03:57:55.871619 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 03:57:55.874383 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 03:57:55.877879 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 03:57:55.881217 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 03:57:55.887777 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 03:57:55.890988 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 03:57:55.894130 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 03:57:55.897465 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 03:57:55.900837 call enable_fixed_mtrr()
1927 03:57:55.907454 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 03:57:55.910493 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 03:57:55.913775 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 03:57:55.917043 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 03:57:55.923318 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 03:57:55.926579 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 03:57:55.930248 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 03:57:55.933425 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 03:57:55.940182 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 03:57:55.942980 CPU physical address size: 39 bits
1937 03:57:55.946493 call enable_fixed_mtrr()
1938 03:57:55.946580 CBFS @ c08000 size 3f8000
1939 03:57:55.952860 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1940 03:57:55.956072 CPU physical address size: 39 bits
1941 03:57:55.959648 CBFS: Locating 'fallback/payload'
1942 03:57:55.962819 CPU physical address size: 39 bits
1943 03:57:55.966137 CBFS: Found @ offset 1c96c0 size 3f798
1944 03:57:55.972445 Checking segment from ROM address 0xffdd16f8
1945 03:57:55.975893 Checking segment from ROM address 0xffdd1714
1946 03:57:55.982517 Loading segment from ROM address 0xffdd16f8
1947 03:57:55.982606 code (compression=0)
1948 03:57:55.992334 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1949 03:57:55.998865 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1950 03:57:56.002027 it's not compressed!
1951 03:57:56.094741 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1952 03:57:56.101429 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1953 03:57:56.104532 Loading segment from ROM address 0xffdd1714
1954 03:57:56.107837 Entry Point 0x30000000
1955 03:57:56.111189 Loaded segments
1956 03:57:56.117301 Finalizing chipset.
1957 03:57:56.120644 Finalizing SMM.
1958 03:57:56.123673 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1959 03:57:56.126877 mp_park_aps done after 0 msecs.
1960 03:57:56.133469 Jumping to boot code at 30000000(99b62000)
1961 03:57:56.140174 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1962 03:57:56.140264
1963 03:57:56.143456 Starting depthcharge on Helios...
1964 03:57:56.143824 end: 2.2.3 depthcharge-start (duration 00:00:18) [common]
1965 03:57:56.143933 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1966 03:57:56.144025 Setting prompt string to ['hatch:']
1967 03:57:56.144115 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1968 03:57:56.153168 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1969 03:57:56.159879 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1970 03:57:56.166166 board_setup: Info: eMMC controller not present; skipping
1971 03:57:56.169413 New NVMe Controller 0x30053ac0 @ 00:1d:00
1972 03:57:56.176080 board_setup: Info: SDHCI controller not present; skipping
1973 03:57:56.182622 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1974 03:57:56.182711 Wipe memory regions:
1975 03:57:56.189186 [0x00000000001000, 0x000000000a0000)
1976 03:57:56.192470 [0x00000000100000, 0x00000030000000)
1977 03:57:56.256448 [0x00000030657430, 0x00000099a2c000)
1978 03:57:56.391538 [0x00000100000000, 0x0000045e800000)
1979 03:57:57.709793 R8152: Initializing
1980 03:57:57.712923 Version 9 (ocp_data = 6010)
1981 03:57:57.717288 R8152: Done initializing
1982 03:57:57.720599 Adding net device
1983 03:57:58.090117 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1984 03:57:58.090273
1985 03:57:58.090560 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
1987 03:57:58.191174 hatch: tftpboot 192.168.201.1 6750502/tftp-deploy-1cwgoexh/kernel/bzImage 6750502/tftp-deploy-1cwgoexh/kernel/cmdline 6750502/tftp-deploy-1cwgoexh/ramdisk/ramdisk.cpio.gz
1988 03:57:58.191351 Setting prompt string to ['Starting kernel']
1989 03:57:58.191428 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
1990 03:57:58.191503 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:39)
1991 03:57:58.195497 tftpboot 192.168.201.1 6750502/tftp-deploy-1cwgoexh/kernel/bzImoy-1cwgoexh/kernel/cmdline 6750502/tftp-deploy-1cwgoexh/ramdisk/ramdisk.cpio.gz
1992 03:57:58.195592 Waiting for link
1993 03:57:58.396568 done.
1994 03:57:58.396726 MAC: f4:f5:e8:50:e7:f3
1995 03:57:58.399510 Sending DHCP discover... done.
1996 03:57:58.402795 Waiting for reply... done.
1997 03:57:58.405967 Sending DHCP request... done.
1998 03:57:58.409194 Waiting for reply... done.
1999 03:57:58.412549 My ip is 192.168.201.16
2000 03:57:58.415738 The DHCP server ip is 192.168.201.1
2001 03:57:58.422497 TFTP server IP predefined by user: 192.168.201.1
2002 03:57:58.428809 Bootfile predefined by user: 6750502/tftp-deploy-1cwgoexh/kernel/bzImage
2003 03:57:58.432268 Sending tftp read request... done.
2004 03:57:58.435556 Waiting for the transfer...
2005 03:57:58.743941 00000000 ################################################################
2006 03:57:59.032007 00080000 ################################################################
2007 03:57:59.320609 00100000 ################################################################
2008 03:57:59.586800 00180000 ################################################################
2009 03:57:59.835256 00200000 ################################################################
2010 03:58:00.104913 00280000 ################################################################
2011 03:58:00.380408 00300000 ################################################################
2012 03:58:00.673688 00380000 ################################################################
2013 03:58:00.967949 00400000 ################################################################
2014 03:58:01.258694 00480000 ################################################################
2015 03:58:01.552113 00500000 ################################################################
2016 03:58:01.822372 00580000 ################################################################
2017 03:58:02.089806 00600000 ############################################################### done.
2018 03:58:02.093186 The bootfile was 6807440 bytes long.
2019 03:58:02.096295 Sending tftp read request... done.
2020 03:58:02.099638 Waiting for the transfer...
2021 03:58:02.344522 00000000 ################################################################
2022 03:58:02.577686 00080000 ################################################################
2023 03:58:02.818872 00100000 ################################################################
2024 03:58:03.082484 00180000 ################################################################
2025 03:58:03.347317 00200000 ################################################################
2026 03:58:03.590710 00280000 ################################################################
2027 03:58:03.827003 00300000 ################################################################
2028 03:58:04.066373 00380000 ################################################################
2029 03:58:04.330465 00400000 ################################################################
2030 03:58:04.564778 00480000 ################################################################
2031 03:58:04.817614 00500000 ################################################################
2032 03:58:05.062500 00580000 ################################################################
2033 03:58:05.307422 00600000 ################################################################
2034 03:58:05.555593 00680000 ################################################################
2035 03:58:05.807866 00700000 ################################################################
2036 03:58:06.073543 00780000 ################################################################
2037 03:58:06.155840 00800000 #################### done.
2038 03:58:06.162492 Sending tftp read request... done.
2039 03:58:06.162600 Waiting for the transfer...
2040 03:58:06.165806 00000000 # done.
2041 03:58:06.175642 Command line loaded dynamically from TFTP file: 6750502/tftp-deploy-1cwgoexh/kernel/cmdline
2042 03:58:06.191916 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2043 03:58:06.198430 ec_init(0): CrosEC protocol v3 supported (256, 256)
2044 03:58:06.205558 Shutting down all USB controllers.
2045 03:58:06.205660 Removing current net device
2046 03:58:06.209707 Finalizing coreboot
2047 03:58:06.216029 Exiting depthcharge with code 4 at timestamp: 17360210
2048 03:58:06.216126
2049 03:58:06.216201 Starting kernel ...
2050 03:58:06.216267
2051 03:58:06.216353
2052 03:58:06.216725 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2053 03:58:06.216876 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2054 03:58:06.216989 Setting prompt string to ['Linux version [0-9]']
2055 03:58:06.217096 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2056 03:58:06.217202 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2058 04:02:37.217949 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2060 04:02:37.219142 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2062 04:02:37.220024 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2065 04:02:37.221498 end: 2 depthcharge-action (duration 00:05:00) [common]
2067 04:02:37.222583 Cleaning after the job
2068 04:02:37.222843 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6750502/tftp-deploy-1cwgoexh/ramdisk
2069 04:02:37.223579 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6750502/tftp-deploy-1cwgoexh/kernel
2070 04:02:37.224091 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6750502/tftp-deploy-1cwgoexh/modules
2071 04:02:37.224283 start: 5.1 power-off (timeout 00:00:30) [common]
2072 04:02:37.224437 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2073 04:02:37.244501 >> Command sent successfully.
2074 04:02:37.246653 Returned 0 in 0 seconds
2075 04:02:37.347425 end: 5.1 power-off (duration 00:00:00) [common]
2077 04:02:37.349002 start: 5.2 read-feedback (timeout 00:10:00) [common]
2078 04:02:37.350352 Listened to connection for namespace 'common' for up to 1s
2079 04:02:38.352371 Finalising connection for namespace 'common'
2080 04:02:38.353118 Disconnecting from shell: Finalise
2081 04:02:38.454726 end: 5.2 read-feedback (duration 00:00:01) [common]
2082 04:02:38.455425 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6750502
2083 04:02:38.463720 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6750502
2084 04:02:38.463844 JobError: Your job cannot terminate cleanly.