Boot log: asus-cx9400-volteer
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 03:57:43.735513 lava-dispatcher, installed at version: 2022.04
2 03:57:43.735713 start: 0 validate
3 03:57:43.735849 Start time: 2022-07-05 03:57:43.735842+00:00 (UTC)
4 03:57:43.735993 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:57:43.736123 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220624.0%2Fx86%2Frootfs.cpio.gz exists
6 03:57:43.738364 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:57:43.738506 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.4.302-1083-g94e3113365c2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:57:43.739491 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:57:43.739610 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.4.302-1083-g94e3113365c2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 03:57:43.741843 validate duration: 0.01
12 03:57:43.742099 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 03:57:43.742208 start: 1.1 download-retry (timeout 00:10:00) [common]
14 03:57:43.742308 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 03:57:43.742411 Not decompressing ramdisk as can be used compressed.
16 03:57:43.742500 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220624.0/x86/rootfs.cpio.gz
17 03:57:43.742570 saving as /var/lib/lava/dispatcher/tmp/6750545/tftp-deploy-z_e6l34v/ramdisk/rootfs.cpio.gz
18 03:57:43.742633 total size: 8415744 (8MB)
19 03:57:43.743748 progress 0% (0MB)
20 03:57:43.745829 progress 5% (0MB)
21 03:57:43.748100 progress 10% (0MB)
22 03:57:43.750217 progress 15% (1MB)
23 03:57:43.752386 progress 20% (1MB)
24 03:57:43.754510 progress 25% (2MB)
25 03:57:43.756656 progress 30% (2MB)
26 03:57:43.758600 progress 35% (2MB)
27 03:57:43.760715 progress 40% (3MB)
28 03:57:43.762811 progress 45% (3MB)
29 03:57:43.764982 progress 50% (4MB)
30 03:57:43.767096 progress 55% (4MB)
31 03:57:43.769231 progress 60% (4MB)
32 03:57:43.771266 progress 65% (5MB)
33 03:57:43.773361 progress 70% (5MB)
34 03:57:43.775616 progress 75% (6MB)
35 03:57:43.777698 progress 80% (6MB)
36 03:57:43.779814 progress 85% (6MB)
37 03:57:43.781921 progress 90% (7MB)
38 03:57:43.783959 progress 95% (7MB)
39 03:57:43.786089 progress 100% (8MB)
40 03:57:43.786400 8MB downloaded in 0.04s (183.40MB/s)
41 03:57:43.786565 end: 1.1.1 http-download (duration 00:00:00) [common]
43 03:57:43.786818 end: 1.1 download-retry (duration 00:00:00) [common]
44 03:57:43.786952 start: 1.2 download-retry (timeout 00:10:00) [common]
45 03:57:43.787043 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 03:57:43.787149 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.4.302-1083-g94e3113365c2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 03:57:43.787220 saving as /var/lib/lava/dispatcher/tmp/6750545/tftp-deploy-z_e6l34v/kernel/bzImage
48 03:57:43.787301 total size: 6807440 (6MB)
49 03:57:43.787395 No compression specified
50 03:57:43.788501 progress 0% (0MB)
51 03:57:43.790283 progress 5% (0MB)
52 03:57:43.792011 progress 10% (0MB)
53 03:57:43.793813 progress 15% (1MB)
54 03:57:43.795520 progress 20% (1MB)
55 03:57:43.797164 progress 25% (1MB)
56 03:57:43.799014 progress 30% (1MB)
57 03:57:43.800636 progress 35% (2MB)
58 03:57:43.802426 progress 40% (2MB)
59 03:57:43.804135 progress 45% (2MB)
60 03:57:43.805751 progress 50% (3MB)
61 03:57:43.807662 progress 55% (3MB)
62 03:57:43.809350 progress 60% (3MB)
63 03:57:43.811360 progress 65% (4MB)
64 03:57:43.813123 progress 70% (4MB)
65 03:57:43.814798 progress 75% (4MB)
66 03:57:43.816581 progress 80% (5MB)
67 03:57:43.818263 progress 85% (5MB)
68 03:57:43.819934 progress 90% (5MB)
69 03:57:43.821743 progress 95% (6MB)
70 03:57:43.823481 progress 100% (6MB)
71 03:57:43.823770 6MB downloaded in 0.04s (178.04MB/s)
72 03:57:43.824001 end: 1.2.1 http-download (duration 00:00:00) [common]
74 03:57:43.824251 end: 1.2 download-retry (duration 00:00:00) [common]
75 03:57:43.824344 start: 1.3 download-retry (timeout 00:10:00) [common]
76 03:57:43.824433 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 03:57:43.824541 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.4.302-1083-g94e3113365c2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 03:57:43.824613 saving as /var/lib/lava/dispatcher/tmp/6750545/tftp-deploy-z_e6l34v/modules/modules.tar
79 03:57:43.824678 total size: 51972 (0MB)
80 03:57:43.824742 Using unxz to decompress xz
81 03:57:43.828296 progress 63% (0MB)
82 03:57:43.828715 progress 100% (0MB)
83 03:57:43.832077 0MB downloaded in 0.01s (6.71MB/s)
84 03:57:43.832382 end: 1.3.1 http-download (duration 00:00:00) [common]
86 03:57:43.832663 end: 1.3 download-retry (duration 00:00:00) [common]
87 03:57:43.832763 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 03:57:43.832862 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 03:57:43.832948 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 03:57:43.833037 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 03:57:43.833216 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1
92 03:57:43.833333 makedir: /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin
93 03:57:43.833422 makedir: /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/tests
94 03:57:43.833509 makedir: /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/results
95 03:57:43.833619 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-add-keys
96 03:57:43.833755 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-add-sources
97 03:57:43.833875 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-background-process-start
98 03:57:43.834000 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-background-process-stop
99 03:57:43.834123 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-common-functions
100 03:57:43.834246 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-echo-ipv4
101 03:57:43.834369 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-install-packages
102 03:57:43.834489 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-installed-packages
103 03:57:43.834604 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-os-build
104 03:57:43.834718 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-probe-channel
105 03:57:43.834834 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-probe-ip
106 03:57:43.834998 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-target-ip
107 03:57:43.835111 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-target-mac
108 03:57:43.835222 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-target-storage
109 03:57:43.835338 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-test-case
110 03:57:43.835449 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-test-event
111 03:57:43.835559 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-test-feedback
112 03:57:43.835670 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-test-raise
113 03:57:43.835786 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-test-reference
114 03:57:43.835897 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-test-runner
115 03:57:43.836009 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-test-set
116 03:57:43.836119 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-test-shell
117 03:57:43.836235 Updating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-install-packages (oe)
118 03:57:43.836354 Updating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/bin/lava-installed-packages (oe)
119 03:57:43.836461 Creating /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/environment
120 03:57:43.836552 LAVA metadata
121 03:57:43.836628 - LAVA_JOB_ID=6750545
122 03:57:43.836696 - LAVA_DISPATCHER_IP=192.168.201.1
123 03:57:43.836811 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 03:57:43.836880 skipped lava-vland-overlay
125 03:57:43.836962 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 03:57:43.837050 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 03:57:43.837116 skipped lava-multinode-overlay
128 03:57:43.837193 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 03:57:43.837277 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 03:57:43.837359 Loading test definitions
131 03:57:43.837464 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 03:57:43.837547 Using /lava-6750545 at stage 0
133 03:57:43.837829 uuid=6750545_1.4.2.3.1 testdef=None
134 03:57:43.837922 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 03:57:43.838015 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 03:57:43.838514 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 03:57:43.838766 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 03:57:43.839379 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 03:57:43.839630 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 03:57:43.840190 runner path: /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/0/tests/0_dmesg test_uuid 6750545_1.4.2.3.1
143 03:57:43.840347 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 03:57:43.840586 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 03:57:43.840662 Using /lava-6750545 at stage 1
147 03:57:43.840920 uuid=6750545_1.4.2.3.5 testdef=None
148 03:57:43.841012 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 03:57:43.841115 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 03:57:43.841566 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 03:57:43.841798 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 03:57:43.842376 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 03:57:43.842621 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 03:57:43.843231 runner path: /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/1/tests/1_bootrr test_uuid 6750545_1.4.2.3.5
157 03:57:43.843378 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 03:57:43.843594 Creating lava-test-runner.conf files
160 03:57:43.843660 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/0 for stage 0
161 03:57:43.843744 - 0_dmesg
162 03:57:43.843822 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6750545/lava-overlay-c93m4bp1/lava-6750545/1 for stage 1
163 03:57:43.843907 - 1_bootrr
164 03:57:43.844001 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 03:57:43.844091 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 03:57:43.850517 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 03:57:43.850684 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 03:57:43.850788 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 03:57:43.850882 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 03:57:43.851054 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 03:57:44.037237 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 03:57:44.037576 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 03:57:44.037699 extracting modules file /var/lib/lava/dispatcher/tmp/6750545/tftp-deploy-z_e6l34v/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6750545/extract-overlay-ramdisk-5xsar9ia/ramdisk
174 03:57:44.041978 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 03:57:44.042115 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 03:57:44.042213 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6750545/compress-overlay-ah6z8m4y/overlay-1.4.2.4.tar.gz to ramdisk
177 03:57:44.042290 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6750545/compress-overlay-ah6z8m4y/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6750545/extract-overlay-ramdisk-5xsar9ia/ramdisk
178 03:57:44.046238 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 03:57:44.046399 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 03:57:44.046507 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 03:57:44.046604 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 03:57:44.046694 Building ramdisk /var/lib/lava/dispatcher/tmp/6750545/extract-overlay-ramdisk-5xsar9ia/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6750545/extract-overlay-ramdisk-5xsar9ia/ramdisk
183 03:57:44.111153 >> 48008 blocks
184 03:57:44.866688 rename /var/lib/lava/dispatcher/tmp/6750545/extract-overlay-ramdisk-5xsar9ia/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6750545/tftp-deploy-z_e6l34v/ramdisk/ramdisk.cpio.gz
185 03:57:44.867280 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 03:57:44.867478 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 03:57:44.867643 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 03:57:44.867792 No mkimage arch provided, not using FIT.
189 03:57:44.867944 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 03:57:44.868093 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 03:57:44.868249 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 03:57:44.868413 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 03:57:44.868544 No LXC device requested
194 03:57:44.868682 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 03:57:44.868839 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 03:57:44.868985 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 03:57:44.869103 Checking files for TFTP limit of 4294967296 bytes.
198 03:57:44.869691 end: 1 tftp-deploy (duration 00:00:01) [common]
199 03:57:44.869857 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 03:57:44.870016 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 03:57:44.870219 substitutions:
202 03:57:44.870340 - {DTB}: None
203 03:57:44.870459 - {INITRD}: 6750545/tftp-deploy-z_e6l34v/ramdisk/ramdisk.cpio.gz
204 03:57:44.870573 - {KERNEL}: 6750545/tftp-deploy-z_e6l34v/kernel/bzImage
205 03:57:44.870688 - {LAVA_MAC}: None
206 03:57:44.870798 - {PRESEED_CONFIG}: None
207 03:57:44.870934 - {PRESEED_LOCAL}: None
208 03:57:44.871061 - {RAMDISK}: 6750545/tftp-deploy-z_e6l34v/ramdisk/ramdisk.cpio.gz
209 03:57:44.871175 - {ROOT_PART}: None
210 03:57:44.871286 - {ROOT}: None
211 03:57:44.871395 - {SERVER_IP}: 192.168.201.1
212 03:57:44.871504 - {TEE}: None
213 03:57:44.871619 Parsed boot commands:
214 03:57:44.871726 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 03:57:44.871965 Parsed boot commands: tftpboot 192.168.201.1 6750545/tftp-deploy-z_e6l34v/kernel/bzImage 6750545/tftp-deploy-z_e6l34v/kernel/cmdline 6750545/tftp-deploy-z_e6l34v/ramdisk/ramdisk.cpio.gz
216 03:57:44.872118 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 03:57:44.872270 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 03:57:44.872439 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 03:57:44.872592 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 03:57:44.872718 Not connected, no need to disconnect.
221 03:57:44.872862 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 03:57:44.873013 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 03:57:44.873134 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-8'
224 03:57:44.876581 Setting prompt string to ['lava-test: # ']
225 03:57:44.876980 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 03:57:44.877146 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 03:57:44.877305 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 03:57:44.877461 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 03:57:44.877749 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
230 03:57:44.897407 >> Command sent successfully.
231 03:57:44.899464 Returned 0 in 0 seconds
232 03:57:45.000316 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 03:57:45.001151 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 03:57:45.001312 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 03:57:45.001446 Setting prompt string to 'Starting depthcharge on Voema...'
237 03:57:45.001560 Changing prompt to 'Starting depthcharge on Voema...'
238 03:57:45.001688 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 03:57:45.002095 [Enter `^Ec?' for help]
240 03:57:52.052338
241 03:57:52.052555
242 03:57:52.062447 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 03:57:52.065750 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 03:57:52.072320 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 03:57:52.075704 CPU: AES supported, TXT NOT supported, VT supported
246 03:57:52.082316 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 03:57:52.088837 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 03:57:52.092167 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 03:57:52.095359 VBOOT: Loading verstage.
250 03:57:52.102029 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
251 03:57:52.105468 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 03:57:52.111749 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 03:57:52.118656 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 03:57:52.125259 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 03:57:52.128429
256 03:57:52.128555
257 03:57:52.138503 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 03:57:52.152935 Probing TPM: . done!
259 03:57:52.156179 TPM ready after 0 ms
260 03:57:52.159790 Connected to device vid:did:rid of 1ae0:0028:00
261 03:57:52.170918 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
262 03:57:52.177652 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 03:57:52.181176 Initialized TPM device CR50 revision 0
264 03:57:52.231397 tlcl_send_startup: Startup return code is 0
265 03:57:52.231570 TPM: setup succeeded
266 03:57:52.246667 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 03:57:52.261119 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 03:57:52.273892 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 03:57:52.283763 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 03:57:52.287269 Chrome EC: UHEPI supported
271 03:57:52.290574 Phase 1
272 03:57:52.293713 FMAP: area GBB found @ 1805000 (458752 bytes)
273 03:57:52.303879 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 03:57:52.310330 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 03:57:52.317065 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 03:57:52.323805 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 03:57:52.327137 Recovery requested (1009000e)
278 03:57:52.336023 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 03:57:52.341995 tlcl_extend: response is 0
280 03:57:52.348817 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 03:57:52.358782 tlcl_extend: response is 0
282 03:57:52.365265 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 03:57:52.371784 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 03:57:52.378500 BS: verstage times (exec / console): total (unknown) / 142 ms
285 03:57:52.378618
286 03:57:52.378716
287 03:57:52.391863 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 03:57:52.398368 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 03:57:52.401690 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 03:57:52.404997 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 03:57:52.411662 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 03:57:52.414731 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 03:57:52.418040 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 03:57:52.421417 TCO_STS: 0000 0000
295 03:57:52.424646 GEN_PMCON: d0015038 00002200
296 03:57:52.428098 GBLRST_CAUSE: 00000000 00000000
297 03:57:52.431383 HPR_CAUSE0: 00000000
298 03:57:52.431497 prev_sleep_state 5
299 03:57:52.434939 Boot Count incremented to 7879
300 03:57:52.441391 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 03:57:52.447999 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 03:57:52.457723 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 03:57:52.464401 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 03:57:52.467627 Chrome EC: UHEPI supported
305 03:57:52.474199 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 03:57:52.485470 Probing TPM: done!
307 03:57:52.493073 Connected to device vid:did:rid of 1ae0:0028:00
308 03:57:52.503480 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
309 03:57:52.510378 Initialized TPM device CR50 revision 0
310 03:57:52.520460 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 03:57:52.527129 MRC: Hash idx 0x100b comparison successful.
312 03:57:52.530341 MRC cache found, size faa8
313 03:57:52.530471 bootmode is set to: 2
314 03:57:52.533928 SPD index = 0
315 03:57:52.540279 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 03:57:52.543712 SPD: module type is LPDDR4X
317 03:57:52.550232 SPD: module part number is MT53E512M64D4NW-046
318 03:57:52.553465 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
319 03:57:52.560186 SPD: device width 16 bits, bus width 16 bits
320 03:57:52.563614 SPD: module size is 1024 MB (per channel)
321 03:57:52.998015 CBMEM:
322 03:57:53.001479 IMD: root @ 0x76fff000 254 entries.
323 03:57:53.004749 IMD: root @ 0x76ffec00 62 entries.
324 03:57:53.008034 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 03:57:53.014550 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 03:57:53.017890 External stage cache:
327 03:57:53.021245 IMD: root @ 0x7b3ff000 254 entries.
328 03:57:53.024448 IMD: root @ 0x7b3fec00 62 entries.
329 03:57:53.039879 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 03:57:53.046543 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 03:57:53.053129 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 03:57:53.067077 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 03:57:53.070662 cse_lite: Skip switching to RW in the recovery path
334 03:57:53.074354 8 DIMMs found
335 03:57:53.074441 SMM Memory Map
336 03:57:53.077710 SMRAM : 0x7b000000 0x800000
337 03:57:53.081172 Subregion 0: 0x7b000000 0x200000
338 03:57:53.084411 Subregion 1: 0x7b200000 0x200000
339 03:57:53.087673 Subregion 2: 0x7b400000 0x400000
340 03:57:53.091119 top_of_ram = 0x77000000
341 03:57:53.097740 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 03:57:53.101046 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 03:57:53.107608 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 03:57:53.114078 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 03:57:53.120642 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 03:57:53.127381 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 03:57:53.137184 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 03:57:53.140506 Processing 211 relocs. Offset value of 0x74c0b000
349 03:57:53.149736 BS: romstage times (exec / console): total (unknown) / 277 ms
350 03:57:53.156123
351 03:57:53.156242
352 03:57:53.165795 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 03:57:53.168977 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 03:57:53.179120 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 03:57:53.185752 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 03:57:53.192304 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 03:57:53.198788 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 03:57:53.246025 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 03:57:53.252449 Processing 5008 relocs. Offset value of 0x75d98000
360 03:57:53.255832 BS: postcar times (exec / console): total (unknown) / 59 ms
361 03:57:53.259123
362 03:57:53.259211
363 03:57:53.269662 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 03:57:53.269778 Normal boot
365 03:57:53.272886 FW_CONFIG value is 0x804c02
366 03:57:53.276115 PCI: 00:07.0 disabled by fw_config
367 03:57:53.279381 PCI: 00:07.1 disabled by fw_config
368 03:57:53.283046 PCI: 00:0d.2 disabled by fw_config
369 03:57:53.286385 PCI: 00:1c.7 disabled by fw_config
370 03:57:53.292895 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 03:57:53.299432 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 03:57:53.302740 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 03:57:53.306306 GENERIC: 0.0 disabled by fw_config
374 03:57:53.309427 GENERIC: 1.0 disabled by fw_config
375 03:57:53.316036 fw_config match found: DB_USB=USB3_ACTIVE
376 03:57:53.319206 fw_config match found: DB_USB=USB3_ACTIVE
377 03:57:53.322775 fw_config match found: DB_USB=USB3_ACTIVE
378 03:57:53.329341 fw_config match found: DB_USB=USB3_ACTIVE
379 03:57:53.332503 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 03:57:53.339348 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 03:57:53.349092 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 03:57:53.355695 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 03:57:53.359157 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 03:57:53.365773 microcode: Update skipped, already up-to-date
385 03:57:53.372079 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 03:57:53.399818 Detected 4 core, 8 thread CPU.
387 03:57:53.403108 Setting up SMI for CPU
388 03:57:53.406199 IED base = 0x7b400000
389 03:57:53.409641 IED size = 0x00400000
390 03:57:53.409745 Will perform SMM setup.
391 03:57:53.416235 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
392 03:57:53.422782 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 03:57:53.429512 Processing 16 relocs. Offset value of 0x00030000
394 03:57:53.432515 Attempting to start 7 APs
395 03:57:53.436034 Waiting for 10ms after sending INIT.
396 03:57:53.451710 Waiting for 1st SIPI to complete...done.
397 03:57:53.451840 AP: slot 1 apic_id 1.
398 03:57:53.458510 Waiting for 2nd SIPI to complete...done.
399 03:57:53.458599 AP: slot 2 apic_id 5.
400 03:57:53.461691 AP: slot 6 apic_id 4.
401 03:57:53.464907 AP: slot 7 apic_id 7.
402 03:57:53.464993 AP: slot 3 apic_id 6.
403 03:57:53.468176 AP: slot 4 apic_id 3.
404 03:57:53.471915 AP: slot 5 apic_id 2.
405 03:57:53.478276 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 03:57:53.484684 Processing 13 relocs. Offset value of 0x00038000
407 03:57:53.487951 Unable to locate Global NVS
408 03:57:53.494812 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 03:57:53.498079 Installing permanent SMM handler to 0x7b000000
410 03:57:53.508002 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 03:57:53.511295 Processing 794 relocs. Offset value of 0x7b010000
412 03:57:53.521042 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 03:57:53.524653 Processing 13 relocs. Offset value of 0x7b008000
414 03:57:53.530994 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 03:57:53.537816 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 03:57:53.541099 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 03:57:53.547780 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 03:57:53.554358 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 03:57:53.560977 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 03:57:53.567435 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 03:57:53.570730 Unable to locate Global NVS
422 03:57:53.577589 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 03:57:53.580827 Clearing SMI status registers
424 03:57:53.584172 SMI_STS: PM1
425 03:57:53.584260 PM1_STS: PWRBTN
426 03:57:53.590641 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 03:57:53.593907 In relocation handler: CPU 0
428 03:57:53.597186 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 03:57:53.603707 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 03:57:53.607222 Relocation complete.
431 03:57:53.613705 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 03:57:53.616995 In relocation handler: CPU 1
433 03:57:53.620648 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 03:57:53.620767 Relocation complete.
435 03:57:53.630681 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
436 03:57:53.633997 In relocation handler: CPU 4
437 03:57:53.636965 New SMBASE=0x7afff000 IEDBASE=0x7b400000
438 03:57:53.637056 Relocation complete.
439 03:57:53.647027 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
440 03:57:53.650503 In relocation handler: CPU 5
441 03:57:53.653687 New SMBASE=0x7affec00 IEDBASE=0x7b400000
442 03:57:53.657085 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 03:57:53.660311 Relocation complete.
444 03:57:53.666890 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
445 03:57:53.670141 In relocation handler: CPU 2
446 03:57:53.673522 New SMBASE=0x7afff800 IEDBASE=0x7b400000
447 03:57:53.676741 Relocation complete.
448 03:57:53.683458 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
449 03:57:53.686846 In relocation handler: CPU 6
450 03:57:53.689982 New SMBASE=0x7affe800 IEDBASE=0x7b400000
451 03:57:53.696837 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 03:57:53.696927 Relocation complete.
453 03:57:53.706468 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
454 03:57:53.706556 In relocation handler: CPU 7
455 03:57:53.712881 New SMBASE=0x7affe400 IEDBASE=0x7b400000
456 03:57:53.712968 Relocation complete.
457 03:57:53.722981 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
458 03:57:53.723124 In relocation handler: CPU 3
459 03:57:53.729613 New SMBASE=0x7afff400 IEDBASE=0x7b400000
460 03:57:53.733240 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 03:57:53.736854 Relocation complete.
462 03:57:53.736961 Initializing CPU #0
463 03:57:53.740549 CPU: vendor Intel device 806c1
464 03:57:53.744014 CPU: family 06, model 8c, stepping 01
465 03:57:53.747089 Clearing out pending MCEs
466 03:57:53.750437 Setting up local APIC...
467 03:57:53.753813 apic_id: 0x00 done.
468 03:57:53.753929 Turbo is available but hidden
469 03:57:53.757132 Turbo is available and visible
470 03:57:53.763945 microcode: Update skipped, already up-to-date
471 03:57:53.764031 CPU #0 initialized
472 03:57:53.767027 Initializing CPU #2
473 03:57:53.770638 Initializing CPU #6
474 03:57:53.773838 CPU: vendor Intel device 806c1
475 03:57:53.777117 CPU: family 06, model 8c, stepping 01
476 03:57:53.780368 CPU: vendor Intel device 806c1
477 03:57:53.783547 CPU: family 06, model 8c, stepping 01
478 03:57:53.787133 Clearing out pending MCEs
479 03:57:53.787228 Clearing out pending MCEs
480 03:57:53.790351 Setting up local APIC...
481 03:57:53.793461 Initializing CPU #7
482 03:57:53.793549 Initializing CPU #3
483 03:57:53.797130 CPU: vendor Intel device 806c1
484 03:57:53.803836 CPU: family 06, model 8c, stepping 01
485 03:57:53.807020 CPU: vendor Intel device 806c1
486 03:57:53.810327 CPU: family 06, model 8c, stepping 01
487 03:57:53.810451 Clearing out pending MCEs
488 03:57:53.813571 Clearing out pending MCEs
489 03:57:53.816989 Setting up local APIC...
490 03:57:53.820205 Initializing CPU #5
491 03:57:53.820291 Initializing CPU #4
492 03:57:53.823653 CPU: vendor Intel device 806c1
493 03:57:53.826772 CPU: family 06, model 8c, stepping 01
494 03:57:53.829912 CPU: vendor Intel device 806c1
495 03:57:53.833324 CPU: family 06, model 8c, stepping 01
496 03:57:53.836675 Clearing out pending MCEs
497 03:57:53.840114 Clearing out pending MCEs
498 03:57:53.843263 Setting up local APIC...
499 03:57:53.846741 Setting up local APIC...
500 03:57:53.846826 apic_id: 0x02 done.
501 03:57:53.850021 Setting up local APIC...
502 03:57:53.853501 Initializing CPU #1
503 03:57:53.853586 apic_id: 0x03 done.
504 03:57:53.859915 microcode: Update skipped, already up-to-date
505 03:57:53.863288 microcode: Update skipped, already up-to-date
506 03:57:53.866435 CPU #5 initialized
507 03:57:53.866520 CPU #4 initialized
508 03:57:53.869848 apic_id: 0x04 done.
509 03:57:53.869934 apic_id: 0x05 done.
510 03:57:53.876363 microcode: Update skipped, already up-to-date
511 03:57:53.879644 microcode: Update skipped, already up-to-date
512 03:57:53.883260 CPU #6 initialized
513 03:57:53.883345 CPU #2 initialized
514 03:57:53.886436 Setting up local APIC...
515 03:57:53.889845 CPU: vendor Intel device 806c1
516 03:57:53.893067 CPU: family 06, model 8c, stepping 01
517 03:57:53.896227 apic_id: 0x06 done.
518 03:57:53.899749 apic_id: 0x07 done.
519 03:57:53.903137 microcode: Update skipped, already up-to-date
520 03:57:53.906384 microcode: Update skipped, already up-to-date
521 03:57:53.909681 CPU #3 initialized
522 03:57:53.913184 CPU #7 initialized
523 03:57:53.913270 Clearing out pending MCEs
524 03:57:53.916373 Setting up local APIC...
525 03:57:53.919653 apic_id: 0x01 done.
526 03:57:53.922877 microcode: Update skipped, already up-to-date
527 03:57:53.926203 CPU #1 initialized
528 03:57:53.929439 bsp_do_flight_plan done after 468 msecs.
529 03:57:53.932699 CPU: frequency set to 4000 MHz
530 03:57:53.935942 Enabling SMIs.
531 03:57:53.942628 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
532 03:57:53.957248 SATAXPCIE1 indicates PCIe NVMe is present
533 03:57:53.960189 Probing TPM: done!
534 03:57:53.963672 Connected to device vid:did:rid of 1ae0:0028:00
535 03:57:53.974269 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
536 03:57:53.977260 Initialized TPM device CR50 revision 0
537 03:57:53.980636 Enabling S0i3.4
538 03:57:53.987313 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 03:57:53.990672 Found a VBT of 8704 bytes after decompression
540 03:57:53.997234 cse_lite: CSE RO boot. HybridStorageMode disabled
541 03:57:54.003687 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 03:57:54.079303 FSPS returned 0
543 03:57:54.082643 Executing Phase 1 of FspMultiPhaseSiInit
544 03:57:54.092629 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 03:57:54.096106 port C0 DISC req: usage 1 usb3 1 usb2 5
546 03:57:54.099524 Raw Buffer output 0 00000511
547 03:57:54.102434 Raw Buffer output 1 00000000
548 03:57:54.106413 pmc_send_ipc_cmd succeeded
549 03:57:54.113041 port C1 DISC req: usage 1 usb3 2 usb2 3
550 03:57:54.113129 Raw Buffer output 0 00000321
551 03:57:54.116259 Raw Buffer output 1 00000000
552 03:57:54.120674 pmc_send_ipc_cmd succeeded
553 03:57:54.125637 Detected 4 core, 8 thread CPU.
554 03:57:54.128983 Detected 4 core, 8 thread CPU.
555 03:57:54.363348 Display FSP Version Info HOB
556 03:57:54.366484 Reference Code - CPU = a.0.4c.31
557 03:57:54.369784 uCode Version = 0.0.0.86
558 03:57:54.373044 TXT ACM version = ff.ff.ff.ffff
559 03:57:54.376330 Reference Code - ME = a.0.4c.31
560 03:57:54.379910 MEBx version = 0.0.0.0
561 03:57:54.382764 ME Firmware Version = Consumer SKU
562 03:57:54.386028 Reference Code - PCH = a.0.4c.31
563 03:57:54.389388 PCH-CRID Status = Disabled
564 03:57:54.392637 PCH-CRID Original Value = ff.ff.ff.ffff
565 03:57:54.396067 PCH-CRID New Value = ff.ff.ff.ffff
566 03:57:54.399277 OPROM - RST - RAID = ff.ff.ff.ffff
567 03:57:54.402805 PCH Hsio Version = 4.0.0.0
568 03:57:54.405973 Reference Code - SA - System Agent = a.0.4c.31
569 03:57:54.409333 Reference Code - MRC = 2.0.0.1
570 03:57:54.412680 SA - PCIe Version = a.0.4c.31
571 03:57:54.415831 SA-CRID Status = Disabled
572 03:57:54.419298 SA-CRID Original Value = 0.0.0.1
573 03:57:54.422548 SA-CRID New Value = 0.0.0.1
574 03:57:54.425718 OPROM - VBIOS = ff.ff.ff.ffff
575 03:57:54.429034 IO Manageability Engine FW Version = 11.1.4.0
576 03:57:54.432622 PHY Build Version = 0.0.0.e0
577 03:57:54.435895 Thunderbolt(TM) FW Version = 0.0.0.0
578 03:57:54.442509 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 03:57:54.445793 ITSS IRQ Polarities Before:
580 03:57:54.445880 IPC0: 0xffffffff
581 03:57:54.449193 IPC1: 0xffffffff
582 03:57:54.449279 IPC2: 0xffffffff
583 03:57:54.452361 IPC3: 0xffffffff
584 03:57:54.455392 ITSS IRQ Polarities After:
585 03:57:54.455480 IPC0: 0xffffffff
586 03:57:54.458738 IPC1: 0xffffffff
587 03:57:54.458823 IPC2: 0xffffffff
588 03:57:54.462327 IPC3: 0xffffffff
589 03:57:54.465438 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 03:57:54.478720 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 03:57:54.488790 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 03:57:54.501917 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 03:57:54.508556 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
594 03:57:54.511811 Enumerating buses...
595 03:57:54.515134 Show all devs... Before device enumeration.
596 03:57:54.518423 Root Device: enabled 1
597 03:57:54.518525 DOMAIN: 0000: enabled 1
598 03:57:54.521676 CPU_CLUSTER: 0: enabled 1
599 03:57:54.525120 PCI: 00:00.0: enabled 1
600 03:57:54.528443 PCI: 00:02.0: enabled 1
601 03:57:54.531808 PCI: 00:04.0: enabled 1
602 03:57:54.531894 PCI: 00:05.0: enabled 1
603 03:57:54.535183 PCI: 00:06.0: enabled 0
604 03:57:54.538363 PCI: 00:07.0: enabled 0
605 03:57:54.538449 PCI: 00:07.1: enabled 0
606 03:57:54.541556 PCI: 00:07.2: enabled 0
607 03:57:54.544847 PCI: 00:07.3: enabled 0
608 03:57:54.548343 PCI: 00:08.0: enabled 1
609 03:57:54.548431 PCI: 00:09.0: enabled 0
610 03:57:54.551643 PCI: 00:0a.0: enabled 0
611 03:57:54.554917 PCI: 00:0d.0: enabled 1
612 03:57:54.558162 PCI: 00:0d.1: enabled 0
613 03:57:54.558250 PCI: 00:0d.2: enabled 0
614 03:57:54.561394 PCI: 00:0d.3: enabled 0
615 03:57:54.564833 PCI: 00:0e.0: enabled 0
616 03:57:54.568243 PCI: 00:10.2: enabled 1
617 03:57:54.568330 PCI: 00:10.6: enabled 0
618 03:57:54.571538 PCI: 00:10.7: enabled 0
619 03:57:54.574648 PCI: 00:12.0: enabled 0
620 03:57:54.577886 PCI: 00:12.6: enabled 0
621 03:57:54.577974 PCI: 00:13.0: enabled 0
622 03:57:54.581458 PCI: 00:14.0: enabled 1
623 03:57:54.584449 PCI: 00:14.1: enabled 0
624 03:57:54.584536 PCI: 00:14.2: enabled 1
625 03:57:54.587826 PCI: 00:14.3: enabled 1
626 03:57:54.591421 PCI: 00:15.0: enabled 1
627 03:57:54.594651 PCI: 00:15.1: enabled 1
628 03:57:54.594737 PCI: 00:15.2: enabled 1
629 03:57:54.598005 PCI: 00:15.3: enabled 1
630 03:57:54.601305 PCI: 00:16.0: enabled 1
631 03:57:54.604503 PCI: 00:16.1: enabled 0
632 03:57:54.604590 PCI: 00:16.2: enabled 0
633 03:57:54.607728 PCI: 00:16.3: enabled 0
634 03:57:54.611210 PCI: 00:16.4: enabled 0
635 03:57:54.614488 PCI: 00:16.5: enabled 0
636 03:57:54.614612 PCI: 00:17.0: enabled 1
637 03:57:54.617740 PCI: 00:19.0: enabled 0
638 03:57:54.620992 PCI: 00:19.1: enabled 1
639 03:57:54.624163 PCI: 00:19.2: enabled 0
640 03:57:54.624251 PCI: 00:1c.0: enabled 1
641 03:57:54.627634 PCI: 00:1c.1: enabled 0
642 03:57:54.631239 PCI: 00:1c.2: enabled 0
643 03:57:54.631344 PCI: 00:1c.3: enabled 0
644 03:57:54.634434 PCI: 00:1c.4: enabled 0
645 03:57:54.637843 PCI: 00:1c.5: enabled 0
646 03:57:54.641262 PCI: 00:1c.6: enabled 1
647 03:57:54.641366 PCI: 00:1c.7: enabled 0
648 03:57:54.644391 PCI: 00:1d.0: enabled 1
649 03:57:54.647725 PCI: 00:1d.1: enabled 0
650 03:57:54.651014 PCI: 00:1d.2: enabled 1
651 03:57:54.651100 PCI: 00:1d.3: enabled 0
652 03:57:54.654173 PCI: 00:1e.0: enabled 1
653 03:57:54.657619 PCI: 00:1e.1: enabled 0
654 03:57:54.660710 PCI: 00:1e.2: enabled 1
655 03:57:54.660797 PCI: 00:1e.3: enabled 1
656 03:57:54.664018 PCI: 00:1f.0: enabled 1
657 03:57:54.667321 PCI: 00:1f.1: enabled 0
658 03:57:54.670597 PCI: 00:1f.2: enabled 1
659 03:57:54.670684 PCI: 00:1f.3: enabled 1
660 03:57:54.673955 PCI: 00:1f.4: enabled 0
661 03:57:54.677370 PCI: 00:1f.5: enabled 1
662 03:57:54.677458 PCI: 00:1f.6: enabled 0
663 03:57:54.680795 PCI: 00:1f.7: enabled 0
664 03:57:54.684142 APIC: 00: enabled 1
665 03:57:54.687167 GENERIC: 0.0: enabled 1
666 03:57:54.687256 GENERIC: 0.0: enabled 1
667 03:57:54.690786 GENERIC: 1.0: enabled 1
668 03:57:54.693908 GENERIC: 0.0: enabled 1
669 03:57:54.697128 GENERIC: 1.0: enabled 1
670 03:57:54.697218 USB0 port 0: enabled 1
671 03:57:54.700557 GENERIC: 0.0: enabled 1
672 03:57:54.703675 USB0 port 0: enabled 1
673 03:57:54.703762 GENERIC: 0.0: enabled 1
674 03:57:54.706900 I2C: 00:1a: enabled 1
675 03:57:54.710495 I2C: 00:31: enabled 1
676 03:57:54.713722 I2C: 00:32: enabled 1
677 03:57:54.713825 I2C: 00:10: enabled 1
678 03:57:54.717071 I2C: 00:15: enabled 1
679 03:57:54.720371 GENERIC: 0.0: enabled 0
680 03:57:54.720517 GENERIC: 1.0: enabled 0
681 03:57:54.723710 GENERIC: 0.0: enabled 1
682 03:57:54.727056 SPI: 00: enabled 1
683 03:57:54.727145 SPI: 00: enabled 1
684 03:57:54.730361 PNP: 0c09.0: enabled 1
685 03:57:54.733631 GENERIC: 0.0: enabled 1
686 03:57:54.733718 USB3 port 0: enabled 1
687 03:57:54.736851 USB3 port 1: enabled 1
688 03:57:54.740102 USB3 port 2: enabled 0
689 03:57:54.743554 USB3 port 3: enabled 0
690 03:57:54.743642 USB2 port 0: enabled 0
691 03:57:54.746730 USB2 port 1: enabled 1
692 03:57:54.750115 USB2 port 2: enabled 1
693 03:57:54.750202 USB2 port 3: enabled 0
694 03:57:54.753528 USB2 port 4: enabled 1
695 03:57:54.756575 USB2 port 5: enabled 0
696 03:57:54.759853 USB2 port 6: enabled 0
697 03:57:54.759942 USB2 port 7: enabled 0
698 03:57:54.763303 USB2 port 8: enabled 0
699 03:57:54.766707 USB2 port 9: enabled 0
700 03:57:54.766809 USB3 port 0: enabled 0
701 03:57:54.769844 USB3 port 1: enabled 1
702 03:57:54.773584 USB3 port 2: enabled 0
703 03:57:54.773671 USB3 port 3: enabled 0
704 03:57:54.776680 GENERIC: 0.0: enabled 1
705 03:57:54.779802 GENERIC: 1.0: enabled 1
706 03:57:54.783109 APIC: 01: enabled 1
707 03:57:54.783196 APIC: 05: enabled 1
708 03:57:54.786607 APIC: 06: enabled 1
709 03:57:54.786713 APIC: 03: enabled 1
710 03:57:54.789871 APIC: 02: enabled 1
711 03:57:54.793219 APIC: 04: enabled 1
712 03:57:54.793317 APIC: 07: enabled 1
713 03:57:54.796215 Compare with tree...
714 03:57:54.799561 Root Device: enabled 1
715 03:57:54.799646 DOMAIN: 0000: enabled 1
716 03:57:54.803086 PCI: 00:00.0: enabled 1
717 03:57:54.806303 PCI: 00:02.0: enabled 1
718 03:57:54.809573 PCI: 00:04.0: enabled 1
719 03:57:54.812720 GENERIC: 0.0: enabled 1
720 03:57:54.812807 PCI: 00:05.0: enabled 1
721 03:57:54.816320 PCI: 00:06.0: enabled 0
722 03:57:54.819504 PCI: 00:07.0: enabled 0
723 03:57:54.822800 GENERIC: 0.0: enabled 1
724 03:57:54.826100 PCI: 00:07.1: enabled 0
725 03:57:54.829383 GENERIC: 1.0: enabled 1
726 03:57:54.829469 PCI: 00:07.2: enabled 0
727 03:57:54.832547 GENERIC: 0.0: enabled 1
728 03:57:54.835954 PCI: 00:07.3: enabled 0
729 03:57:54.839301 GENERIC: 1.0: enabled 1
730 03:57:54.842621 PCI: 00:08.0: enabled 1
731 03:57:54.842706 PCI: 00:09.0: enabled 0
732 03:57:54.845692 PCI: 00:0a.0: enabled 0
733 03:57:54.849159 PCI: 00:0d.0: enabled 1
734 03:57:54.852515 USB0 port 0: enabled 1
735 03:57:54.855835 USB3 port 0: enabled 1
736 03:57:54.855937 USB3 port 1: enabled 1
737 03:57:54.859065 USB3 port 2: enabled 0
738 03:57:54.862401 USB3 port 3: enabled 0
739 03:57:54.865662 PCI: 00:0d.1: enabled 0
740 03:57:54.869231 PCI: 00:0d.2: enabled 0
741 03:57:54.872414 GENERIC: 0.0: enabled 1
742 03:57:54.872500 PCI: 00:0d.3: enabled 0
743 03:57:54.875737 PCI: 00:0e.0: enabled 0
744 03:57:54.879076 PCI: 00:10.2: enabled 1
745 03:57:54.882370 PCI: 00:10.6: enabled 0
746 03:57:54.882457 PCI: 00:10.7: enabled 0
747 03:57:54.885636 PCI: 00:12.0: enabled 0
748 03:57:54.889011 PCI: 00:12.6: enabled 0
749 03:57:54.892188 PCI: 00:13.0: enabled 0
750 03:57:54.895344 PCI: 00:14.0: enabled 1
751 03:57:54.895432 USB0 port 0: enabled 1
752 03:57:54.898642 USB2 port 0: enabled 0
753 03:57:54.901992 USB2 port 1: enabled 1
754 03:57:54.905254 USB2 port 2: enabled 1
755 03:57:54.908629 USB2 port 3: enabled 0
756 03:57:54.911948 USB2 port 4: enabled 1
757 03:57:54.912035 USB2 port 5: enabled 0
758 03:57:54.915358 USB2 port 6: enabled 0
759 03:57:54.918556 USB2 port 7: enabled 0
760 03:57:54.921798 USB2 port 8: enabled 0
761 03:57:54.925276 USB2 port 9: enabled 0
762 03:57:54.928558 USB3 port 0: enabled 0
763 03:57:54.928645 USB3 port 1: enabled 1
764 03:57:54.931665 USB3 port 2: enabled 0
765 03:57:54.935154 USB3 port 3: enabled 0
766 03:57:54.938325 PCI: 00:14.1: enabled 0
767 03:57:54.941598 PCI: 00:14.2: enabled 1
768 03:57:54.941684 PCI: 00:14.3: enabled 1
769 03:57:54.945145 GENERIC: 0.0: enabled 1
770 03:57:54.948277 PCI: 00:15.0: enabled 1
771 03:57:54.951473 I2C: 00:1a: enabled 1
772 03:57:54.954756 I2C: 00:31: enabled 1
773 03:57:54.954843 I2C: 00:32: enabled 1
774 03:57:54.958220 PCI: 00:15.1: enabled 1
775 03:57:54.961498 I2C: 00:10: enabled 1
776 03:57:54.964873 PCI: 00:15.2: enabled 1
777 03:57:54.968331 PCI: 00:15.3: enabled 1
778 03:57:54.968418 PCI: 00:16.0: enabled 1
779 03:57:54.971329 PCI: 00:16.1: enabled 0
780 03:57:54.974864 PCI: 00:16.2: enabled 0
781 03:57:54.978237 PCI: 00:16.3: enabled 0
782 03:57:54.982357 PCI: 00:16.4: enabled 0
783 03:57:54.982447 PCI: 00:16.5: enabled 0
784 03:57:54.985521 PCI: 00:17.0: enabled 1
785 03:57:54.988702 PCI: 00:19.0: enabled 0
786 03:57:54.988792 PCI: 00:19.1: enabled 1
787 03:57:54.992260 I2C: 00:15: enabled 1
788 03:57:54.995499 PCI: 00:19.2: enabled 0
789 03:57:54.998668 PCI: 00:1d.0: enabled 1
790 03:57:55.002020 GENERIC: 0.0: enabled 1
791 03:57:55.002108 PCI: 00:1e.0: enabled 1
792 03:57:55.052056 PCI: 00:1e.1: enabled 0
793 03:57:55.052222 PCI: 00:1e.2: enabled 1
794 03:57:55.052517 SPI: 00: enabled 1
795 03:57:55.052592 PCI: 00:1e.3: enabled 1
796 03:57:55.052673 SPI: 00: enabled 1
797 03:57:55.052753 PCI: 00:1f.0: enabled 1
798 03:57:55.052818 PNP: 0c09.0: enabled 1
799 03:57:55.052879 PCI: 00:1f.1: enabled 0
800 03:57:55.052981 PCI: 00:1f.2: enabled 1
801 03:57:55.053251 GENERIC: 0.0: enabled 1
802 03:57:55.053317 GENERIC: 0.0: enabled 1
803 03:57:55.053377 GENERIC: 1.0: enabled 1
804 03:57:55.053435 PCI: 00:1f.3: enabled 1
805 03:57:55.053492 PCI: 00:1f.4: enabled 0
806 03:57:55.053548 PCI: 00:1f.5: enabled 1
807 03:57:55.053604 PCI: 00:1f.6: enabled 0
808 03:57:55.053659 PCI: 00:1f.7: enabled 0
809 03:57:55.053715 CPU_CLUSTER: 0: enabled 1
810 03:57:55.053770 APIC: 00: enabled 1
811 03:57:55.103962 APIC: 01: enabled 1
812 03:57:55.104149 APIC: 05: enabled 1
813 03:57:55.104237 APIC: 06: enabled 1
814 03:57:55.104597 APIC: 03: enabled 1
815 03:57:55.104682 APIC: 02: enabled 1
816 03:57:55.104744 APIC: 04: enabled 1
817 03:57:55.104804 APIC: 07: enabled 1
818 03:57:55.104862 Root Device scanning...
819 03:57:55.105140 scan_static_bus for Root Device
820 03:57:55.105202 DOMAIN: 0000 enabled
821 03:57:55.105260 CPU_CLUSTER: 0 enabled
822 03:57:55.105316 DOMAIN: 0000 scanning...
823 03:57:55.105418 PCI: pci_scan_bus for bus 00
824 03:57:55.105689 PCI: 00:00.0 [8086/0000] ops
825 03:57:55.105750 PCI: 00:00.0 [8086/9a12] enabled
826 03:57:55.105806 PCI: 00:02.0 [8086/0000] bus ops
827 03:57:55.105860 PCI: 00:02.0 [8086/9a40] enabled
828 03:57:55.105915 PCI: 00:04.0 [8086/0000] bus ops
829 03:57:55.131834 PCI: 00:04.0 [8086/9a03] enabled
830 03:57:55.132034 PCI: 00:05.0 [8086/9a19] enabled
831 03:57:55.132329 PCI: 00:07.0 [0000/0000] hidden
832 03:57:55.132429 PCI: 00:08.0 [8086/9a11] enabled
833 03:57:55.132690 PCI: 00:0a.0 [8086/9a0d] disabled
834 03:57:55.132756 PCI: 00:0d.0 [8086/0000] bus ops
835 03:57:55.132832 PCI: 00:0d.0 [8086/9a13] enabled
836 03:57:55.132891 PCI: 00:14.0 [8086/0000] bus ops
837 03:57:55.135600 PCI: 00:14.0 [8086/a0ed] enabled
838 03:57:55.135690 PCI: 00:14.2 [8086/a0ef] enabled
839 03:57:55.138787 PCI: 00:14.3 [8086/0000] bus ops
840 03:57:55.142083 PCI: 00:14.3 [8086/a0f0] enabled
841 03:57:55.145219 PCI: 00:15.0 [8086/0000] bus ops
842 03:57:55.148848 PCI: 00:15.0 [8086/a0e8] enabled
843 03:57:55.152083 PCI: 00:15.1 [8086/0000] bus ops
844 03:57:55.155299 PCI: 00:15.1 [8086/a0e9] enabled
845 03:57:55.158690 PCI: 00:15.2 [8086/0000] bus ops
846 03:57:55.161782 PCI: 00:15.2 [8086/a0ea] enabled
847 03:57:55.165054 PCI: 00:15.3 [8086/0000] bus ops
848 03:57:55.168640 PCI: 00:15.3 [8086/a0eb] enabled
849 03:57:55.171975 PCI: 00:16.0 [8086/0000] ops
850 03:57:55.175173 PCI: 00:16.0 [8086/a0e0] enabled
851 03:57:55.181726 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 03:57:55.185015 PCI: 00:19.0 [8086/0000] bus ops
853 03:57:55.188287 PCI: 00:19.0 [8086/a0c5] disabled
854 03:57:55.191773 PCI: 00:19.1 [8086/0000] bus ops
855 03:57:55.194943 PCI: 00:19.1 [8086/a0c6] enabled
856 03:57:55.198418 PCI: 00:1d.0 [8086/0000] bus ops
857 03:57:55.201677 PCI: 00:1d.0 [8086/a0b0] enabled
858 03:57:55.204806 PCI: 00:1e.0 [8086/0000] ops
859 03:57:55.208077 PCI: 00:1e.0 [8086/a0a8] enabled
860 03:57:55.211365 PCI: 00:1e.2 [8086/0000] bus ops
861 03:57:55.214577 PCI: 00:1e.2 [8086/a0aa] enabled
862 03:57:55.217806 PCI: 00:1e.3 [8086/0000] bus ops
863 03:57:55.221341 PCI: 00:1e.3 [8086/a0ab] enabled
864 03:57:55.224316 PCI: 00:1f.0 [8086/0000] bus ops
865 03:57:55.227909 PCI: 00:1f.0 [8086/a087] enabled
866 03:57:55.228001 RTC Init
867 03:57:55.231094 Set power on after power failure.
868 03:57:55.234376 Disabling Deep S3
869 03:57:55.237889 Disabling Deep S3
870 03:57:55.237977 Disabling Deep S4
871 03:57:55.241193 Disabling Deep S4
872 03:57:55.241286 Disabling Deep S5
873 03:57:55.244489 Disabling Deep S5
874 03:57:55.247865 PCI: 00:1f.2 [0000/0000] hidden
875 03:57:55.251112 PCI: 00:1f.3 [8086/0000] bus ops
876 03:57:55.254309 PCI: 00:1f.3 [8086/a0c8] enabled
877 03:57:55.257489 PCI: 00:1f.5 [8086/0000] bus ops
878 03:57:55.260828 PCI: 00:1f.5 [8086/a0a4] enabled
879 03:57:55.264125 PCI: Leftover static devices:
880 03:57:55.264212 PCI: 00:10.2
881 03:57:55.267457 PCI: 00:10.6
882 03:57:55.267563 PCI: 00:10.7
883 03:57:55.267663 PCI: 00:06.0
884 03:57:55.270667 PCI: 00:07.1
885 03:57:55.270785 PCI: 00:07.2
886 03:57:55.273967 PCI: 00:07.3
887 03:57:55.274105 PCI: 00:09.0
888 03:57:55.277314 PCI: 00:0d.1
889 03:57:55.277443 PCI: 00:0d.2
890 03:57:55.277530 PCI: 00:0d.3
891 03:57:55.280814 PCI: 00:0e.0
892 03:57:55.280901 PCI: 00:12.0
893 03:57:55.283957 PCI: 00:12.6
894 03:57:55.284047 PCI: 00:13.0
895 03:57:55.284132 PCI: 00:14.1
896 03:57:55.287506 PCI: 00:16.1
897 03:57:55.287593 PCI: 00:16.2
898 03:57:55.290432 PCI: 00:16.3
899 03:57:55.290520 PCI: 00:16.4
900 03:57:55.293723 PCI: 00:16.5
901 03:57:55.293811 PCI: 00:17.0
902 03:57:55.293896 PCI: 00:19.2
903 03:57:55.297068 PCI: 00:1e.1
904 03:57:55.297155 PCI: 00:1f.1
905 03:57:55.300734 PCI: 00:1f.4
906 03:57:55.300827 PCI: 00:1f.6
907 03:57:55.300914 PCI: 00:1f.7
908 03:57:55.303754 PCI: Check your devicetree.cb.
909 03:57:55.307213 PCI: 00:02.0 scanning...
910 03:57:55.310501 scan_generic_bus for PCI: 00:02.0
911 03:57:55.313660 scan_generic_bus for PCI: 00:02.0 done
912 03:57:55.320372 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 03:57:55.323811 PCI: 00:04.0 scanning...
914 03:57:55.327118 scan_generic_bus for PCI: 00:04.0
915 03:57:55.327212 GENERIC: 0.0 enabled
916 03:57:55.333477 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 03:57:55.340114 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 03:57:55.340206 PCI: 00:0d.0 scanning...
919 03:57:55.343429 scan_static_bus for PCI: 00:0d.0
920 03:57:55.346800 USB0 port 0 enabled
921 03:57:55.350132 USB0 port 0 scanning...
922 03:57:55.353528 scan_static_bus for USB0 port 0
923 03:57:55.356754 USB3 port 0 enabled
924 03:57:55.356843 USB3 port 1 enabled
925 03:57:55.360213 USB3 port 2 disabled
926 03:57:55.360299 USB3 port 3 disabled
927 03:57:55.363348 USB3 port 0 scanning...
928 03:57:55.366659 scan_static_bus for USB3 port 0
929 03:57:55.370020 scan_static_bus for USB3 port 0 done
930 03:57:55.376481 scan_bus: bus USB3 port 0 finished in 6 msecs
931 03:57:55.376568 USB3 port 1 scanning...
932 03:57:55.379974 scan_static_bus for USB3 port 1
933 03:57:55.386719 scan_static_bus for USB3 port 1 done
934 03:57:55.390010 scan_bus: bus USB3 port 1 finished in 6 msecs
935 03:57:55.393556 scan_static_bus for USB0 port 0 done
936 03:57:55.399840 scan_bus: bus USB0 port 0 finished in 43 msecs
937 03:57:55.403154 scan_static_bus for PCI: 00:0d.0 done
938 03:57:55.406465 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 03:57:55.409854 PCI: 00:14.0 scanning...
940 03:57:55.413299 scan_static_bus for PCI: 00:14.0
941 03:57:55.416334 USB0 port 0 enabled
942 03:57:55.416432 USB0 port 0 scanning...
943 03:57:55.419854 scan_static_bus for USB0 port 0
944 03:57:55.423141 USB2 port 0 disabled
945 03:57:55.426310 USB2 port 1 enabled
946 03:57:55.426415 USB2 port 2 enabled
947 03:57:55.429495 USB2 port 3 disabled
948 03:57:55.433018 USB2 port 4 enabled
949 03:57:55.433108 USB2 port 5 disabled
950 03:57:55.436302 USB2 port 6 disabled
951 03:57:55.436388 USB2 port 7 disabled
952 03:57:55.439745 USB2 port 8 disabled
953 03:57:55.443026 USB2 port 9 disabled
954 03:57:55.443111 USB3 port 0 disabled
955 03:57:55.446633 USB3 port 1 enabled
956 03:57:55.449533 USB3 port 2 disabled
957 03:57:55.449620 USB3 port 3 disabled
958 03:57:55.452781 USB2 port 1 scanning...
959 03:57:55.456259 scan_static_bus for USB2 port 1
960 03:57:55.459443 scan_static_bus for USB2 port 1 done
961 03:57:55.465921 scan_bus: bus USB2 port 1 finished in 6 msecs
962 03:57:55.466043 USB2 port 2 scanning...
963 03:57:55.469213 scan_static_bus for USB2 port 2
964 03:57:55.476196 scan_static_bus for USB2 port 2 done
965 03:57:55.479170 scan_bus: bus USB2 port 2 finished in 6 msecs
966 03:57:55.482526 USB2 port 4 scanning...
967 03:57:55.485761 scan_static_bus for USB2 port 4
968 03:57:55.489060 scan_static_bus for USB2 port 4 done
969 03:57:55.492513 scan_bus: bus USB2 port 4 finished in 6 msecs
970 03:57:55.495754 USB3 port 1 scanning...
971 03:57:55.498952 scan_static_bus for USB3 port 1
972 03:57:55.502172 scan_static_bus for USB3 port 1 done
973 03:57:55.508787 scan_bus: bus USB3 port 1 finished in 6 msecs
974 03:57:55.512051 scan_static_bus for USB0 port 0 done
975 03:57:55.515521 scan_bus: bus USB0 port 0 finished in 93 msecs
976 03:57:55.518680 scan_static_bus for PCI: 00:14.0 done
977 03:57:55.525483 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
978 03:57:55.525584 PCI: 00:14.3 scanning...
979 03:57:55.529250 scan_static_bus for PCI: 00:14.3
980 03:57:55.532396 GENERIC: 0.0 enabled
981 03:57:55.535708 scan_static_bus for PCI: 00:14.3 done
982 03:57:55.542394 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 03:57:55.542486 PCI: 00:15.0 scanning...
984 03:57:55.545921 scan_static_bus for PCI: 00:15.0
985 03:57:55.549200 I2C: 00:1a enabled
986 03:57:55.552826 I2C: 00:31 enabled
987 03:57:55.552922 I2C: 00:32 enabled
988 03:57:55.556091 scan_static_bus for PCI: 00:15.0 done
989 03:57:55.562761 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 03:57:55.562889 PCI: 00:15.1 scanning...
991 03:57:55.566436 scan_static_bus for PCI: 00:15.1
992 03:57:55.569820 I2C: 00:10 enabled
993 03:57:55.573161 scan_static_bus for PCI: 00:15.1 done
994 03:57:55.579449 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 03:57:55.579563 PCI: 00:15.2 scanning...
996 03:57:55.583009 scan_static_bus for PCI: 00:15.2
997 03:57:55.589355 scan_static_bus for PCI: 00:15.2 done
998 03:57:55.593013 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 03:57:55.596172 PCI: 00:15.3 scanning...
1000 03:57:55.599661 scan_static_bus for PCI: 00:15.3
1001 03:57:55.603237 scan_static_bus for PCI: 00:15.3 done
1002 03:57:55.606162 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 03:57:55.609496 PCI: 00:19.1 scanning...
1004 03:57:55.612877 scan_static_bus for PCI: 00:19.1
1005 03:57:55.615967 I2C: 00:15 enabled
1006 03:57:55.619371 scan_static_bus for PCI: 00:19.1 done
1007 03:57:55.622847 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 03:57:55.625800 PCI: 00:1d.0 scanning...
1009 03:57:55.629240 do_pci_scan_bridge for PCI: 00:1d.0
1010 03:57:55.632556 PCI: pci_scan_bus for bus 01
1011 03:57:55.635842 PCI: 01:00.0 [1c5c/174a] enabled
1012 03:57:55.639436 GENERIC: 0.0 enabled
1013 03:57:55.642764 Enabling Common Clock Configuration
1014 03:57:55.645824 L1 Sub-State supported from root port 29
1015 03:57:55.649305 L1 Sub-State Support = 0xf
1016 03:57:55.652609 CommonModeRestoreTime = 0x28
1017 03:57:55.655593 Power On Value = 0x16, Power On Scale = 0x0
1018 03:57:55.658863 ASPM: Enabled L1
1019 03:57:55.662440 PCIe: Max_Payload_Size adjusted to 128
1020 03:57:55.668989 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 03:57:55.669088 PCI: 00:1e.2 scanning...
1022 03:57:55.672221 scan_generic_bus for PCI: 00:1e.2
1023 03:57:55.675368 SPI: 00 enabled
1024 03:57:55.682127 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 03:57:55.685319 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 03:57:55.688635 PCI: 00:1e.3 scanning...
1027 03:57:55.691982 scan_generic_bus for PCI: 00:1e.3
1028 03:57:55.695186 SPI: 00 enabled
1029 03:57:55.701851 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 03:57:55.704975 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 03:57:55.708574 PCI: 00:1f.0 scanning...
1032 03:57:55.711923 scan_static_bus for PCI: 00:1f.0
1033 03:57:55.712044 PNP: 0c09.0 enabled
1034 03:57:55.715198 PNP: 0c09.0 scanning...
1035 03:57:55.718437 scan_static_bus for PNP: 0c09.0
1036 03:57:55.721744 scan_static_bus for PNP: 0c09.0 done
1037 03:57:55.728493 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 03:57:55.731801 scan_static_bus for PCI: 00:1f.0 done
1039 03:57:55.734997 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 03:57:55.738278 PCI: 00:1f.2 scanning...
1041 03:57:55.741684 scan_static_bus for PCI: 00:1f.2
1042 03:57:55.744937 GENERIC: 0.0 enabled
1043 03:57:55.748061 GENERIC: 0.0 scanning...
1044 03:57:55.751579 scan_static_bus for GENERIC: 0.0
1045 03:57:55.751705 GENERIC: 0.0 enabled
1046 03:57:55.754751 GENERIC: 1.0 enabled
1047 03:57:55.758008 scan_static_bus for GENERIC: 0.0 done
1048 03:57:55.764746 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 03:57:55.767913 scan_static_bus for PCI: 00:1f.2 done
1050 03:57:55.771230 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 03:57:55.774475 PCI: 00:1f.3 scanning...
1052 03:57:55.777953 scan_static_bus for PCI: 00:1f.3
1053 03:57:55.781269 scan_static_bus for PCI: 00:1f.3 done
1054 03:57:55.787641 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 03:57:55.787777 PCI: 00:1f.5 scanning...
1056 03:57:55.791193 scan_generic_bus for PCI: 00:1f.5
1057 03:57:55.797595 scan_generic_bus for PCI: 00:1f.5 done
1058 03:57:55.800861 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 03:57:55.807419 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1060 03:57:55.811104 scan_static_bus for Root Device done
1061 03:57:55.814341 scan_bus: bus Root Device finished in 737 msecs
1062 03:57:55.814428 done
1063 03:57:55.820617 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1064 03:57:55.823861 Chrome EC: UHEPI supported
1065 03:57:55.831492 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 03:57:55.838058 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 03:57:55.841373 SPI flash protection: WPSW=0 SRP0=0
1068 03:57:55.847922 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 03:57:55.851114 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1070 03:57:55.854740 found VGA at PCI: 00:02.0
1071 03:57:55.857948 Setting up VGA for PCI: 00:02.0
1072 03:57:55.864461 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 03:57:55.867603 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 03:57:55.871057 Allocating resources...
1075 03:57:55.874430 Reading resources...
1076 03:57:55.877408 Root Device read_resources bus 0 link: 0
1077 03:57:55.880677 DOMAIN: 0000 read_resources bus 0 link: 0
1078 03:57:55.887597 PCI: 00:04.0 read_resources bus 1 link: 0
1079 03:57:55.891006 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 03:57:55.897871 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 03:57:55.901052 USB0 port 0 read_resources bus 0 link: 0
1082 03:57:55.907584 USB0 port 0 read_resources bus 0 link: 0 done
1083 03:57:55.911175 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 03:57:55.917842 PCI: 00:14.0 read_resources bus 0 link: 0
1085 03:57:55.921138 USB0 port 0 read_resources bus 0 link: 0
1086 03:57:55.927491 USB0 port 0 read_resources bus 0 link: 0 done
1087 03:57:55.930962 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 03:57:55.937382 PCI: 00:14.3 read_resources bus 0 link: 0
1089 03:57:55.940687 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 03:57:55.944008 PCI: 00:15.0 read_resources bus 0 link: 0
1091 03:57:55.951327 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 03:57:55.954961 PCI: 00:15.1 read_resources bus 0 link: 0
1093 03:57:55.961336 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 03:57:55.967843 PCI: 00:19.1 read_resources bus 0 link: 0
1095 03:57:55.971298 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 03:57:55.974292 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 03:57:55.981714 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 03:57:55.984966 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 03:57:55.991942 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 03:57:55.994916 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 03:57:56.001725 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 03:57:56.005231 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 03:57:56.011719 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 03:57:56.014763 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 03:57:56.018063 GENERIC: 0.0 read_resources bus 0 link: 0
1106 03:57:56.025410 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 03:57:56.028838 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 03:57:56.036090 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 03:57:56.039293 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 03:57:56.045843 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 03:57:56.049128 Root Device read_resources bus 0 link: 0 done
1112 03:57:56.052631 Done reading resources.
1113 03:57:56.058886 Show resources in subtree (Root Device)...After reading.
1114 03:57:56.062474 Root Device child on link 0 DOMAIN: 0000
1115 03:57:56.065600 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 03:57:56.075683 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 03:57:56.085496 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 03:57:56.088780 PCI: 00:00.0
1119 03:57:56.098680 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 03:57:56.105243 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 03:57:56.115424 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 03:57:56.125204 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 03:57:56.135397 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 03:57:56.145245 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 03:57:56.155057 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 03:57:56.161756 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 03:57:56.171749 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 03:57:56.181491 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 03:57:56.191638 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 03:57:56.201340 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 03:57:56.211458 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 03:57:56.218100 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 03:57:56.228014 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 03:57:56.237839 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 03:57:56.247665 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 03:57:56.257722 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 03:57:56.267718 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 03:57:56.277800 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 03:57:56.277887 PCI: 00:02.0
1140 03:57:56.287779 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 03:57:56.297645 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 03:57:56.307530 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 03:57:56.310777 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 03:57:56.320868 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 03:57:56.324011 GENERIC: 0.0
1146 03:57:56.324098 PCI: 00:05.0
1147 03:57:56.333965 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 03:57:56.340512 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 03:57:56.340604 GENERIC: 0.0
1150 03:57:56.343716 PCI: 00:08.0
1151 03:57:56.353603 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 03:57:56.353713 PCI: 00:0a.0
1153 03:57:56.360408 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 03:57:56.370621 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 03:57:56.373773 USB0 port 0 child on link 0 USB3 port 0
1156 03:57:56.376917 USB3 port 0
1157 03:57:56.377004 USB3 port 1
1158 03:57:56.380125 USB3 port 2
1159 03:57:56.380212 USB3 port 3
1160 03:57:56.383366 PCI: 00:14.0 child on link 0 USB0 port 0
1161 03:57:56.393390 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 03:57:56.400099 USB0 port 0 child on link 0 USB2 port 0
1163 03:57:56.400187 USB2 port 0
1164 03:57:56.403202 USB2 port 1
1165 03:57:56.403288 USB2 port 2
1166 03:57:56.406702 USB2 port 3
1167 03:57:56.406789 USB2 port 4
1168 03:57:56.410023 USB2 port 5
1169 03:57:56.413321 USB2 port 6
1170 03:57:56.413408 USB2 port 7
1171 03:57:56.416424 USB2 port 8
1172 03:57:56.416511 USB2 port 9
1173 03:57:56.419651 USB3 port 0
1174 03:57:56.419738 USB3 port 1
1175 03:57:56.423189 USB3 port 2
1176 03:57:56.423276 USB3 port 3
1177 03:57:56.426433 PCI: 00:14.2
1178 03:57:56.436466 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 03:57:56.446299 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 03:57:56.449463 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 03:57:56.459357 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 03:57:56.462848 GENERIC: 0.0
1183 03:57:56.466092 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 03:57:56.475950 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 03:57:56.479164 I2C: 00:1a
1186 03:57:56.479251 I2C: 00:31
1187 03:57:56.479320 I2C: 00:32
1188 03:57:56.485818 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 03:57:56.495696 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 03:57:56.495784 I2C: 00:10
1191 03:57:56.499130 PCI: 00:15.2
1192 03:57:56.509157 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 03:57:56.509244 PCI: 00:15.3
1194 03:57:56.518920 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 03:57:56.522417 PCI: 00:16.0
1196 03:57:56.532296 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 03:57:56.532384 PCI: 00:19.0
1198 03:57:56.538586 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 03:57:56.548513 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 03:57:56.548600 I2C: 00:15
1201 03:57:56.551940 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 03:57:56.561749 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 03:57:56.571976 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 03:57:56.581604 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 03:57:56.581691 GENERIC: 0.0
1206 03:57:56.585052 PCI: 01:00.0
1207 03:57:56.594848 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 03:57:56.604742 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1209 03:57:56.615295 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1210 03:57:56.615381 PCI: 00:1e.0
1211 03:57:56.625087 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 03:57:56.631329 PCI: 00:1e.2 child on link 0 SPI: 00
1213 03:57:56.641436 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 03:57:56.641523 SPI: 00
1215 03:57:56.644595 PCI: 00:1e.3 child on link 0 SPI: 00
1216 03:57:56.654283 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 03:57:56.657834 SPI: 00
1218 03:57:56.660967 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 03:57:56.670915 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 03:57:56.671002 PNP: 0c09.0
1221 03:57:56.680721 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1222 03:57:56.684292 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1223 03:57:56.694192 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 03:57:56.703919 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1225 03:57:56.707345 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1226 03:57:56.710692 GENERIC: 0.0
1227 03:57:56.710778 GENERIC: 1.0
1228 03:57:56.713963 PCI: 00:1f.3
1229 03:57:56.723696 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1230 03:57:56.733999 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1231 03:57:56.734090 PCI: 00:1f.5
1232 03:57:56.743629 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1233 03:57:56.746908 CPU_CLUSTER: 0 child on link 0 APIC: 00
1234 03:57:56.750084 APIC: 00
1235 03:57:56.750169 APIC: 01
1236 03:57:56.753632 APIC: 05
1237 03:57:56.753717 APIC: 06
1238 03:57:56.753785 APIC: 03
1239 03:57:56.756737 APIC: 02
1240 03:57:56.756821 APIC: 04
1241 03:57:56.756889 APIC: 07
1242 03:57:56.767173 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1243 03:57:56.770420 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1244 03:57:56.777010 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1245 03:57:56.783573 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1246 03:57:56.786945 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1247 03:57:56.793300 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1248 03:57:56.796595 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1249 03:57:56.803150 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1250 03:57:56.809796 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1251 03:57:56.819614 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1252 03:57:56.826344 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1253 03:57:56.833035 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1254 03:57:56.839601 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1255 03:57:56.846062 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1256 03:57:56.855965 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1257 03:57:56.859393 DOMAIN: 0000: Resource ranges:
1258 03:57:56.862559 * Base: 1000, Size: 800, Tag: 100
1259 03:57:56.865975 * Base: 1900, Size: e700, Tag: 100
1260 03:57:56.869354 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1261 03:57:56.876042 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1262 03:57:56.885771 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1263 03:57:56.892299 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1264 03:57:56.898957 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1265 03:57:56.908796 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1266 03:57:56.915595 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1267 03:57:56.921981 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1268 03:57:56.931882 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1269 03:57:56.938298 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1270 03:57:56.944883 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1271 03:57:56.954768 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1272 03:57:56.961661 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1273 03:57:56.968438 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1274 03:57:56.977776 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1275 03:57:56.984567 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1276 03:57:56.991310 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1277 03:57:57.001020 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1278 03:57:57.007686 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1279 03:57:57.013954 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1280 03:57:57.024002 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1281 03:57:57.030808 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1282 03:57:57.037426 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1283 03:57:57.046991 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1284 03:57:57.053814 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1285 03:57:57.056951 DOMAIN: 0000: Resource ranges:
1286 03:57:57.060438 * Base: 7fc00000, Size: 40400000, Tag: 200
1287 03:57:57.067023 * Base: d0000000, Size: 28000000, Tag: 200
1288 03:57:57.070427 * Base: fa000000, Size: 1000000, Tag: 200
1289 03:57:57.073716 * Base: fb001000, Size: 2fff000, Tag: 200
1290 03:57:57.080064 * Base: fe010000, Size: 2e000, Tag: 200
1291 03:57:57.083325 * Base: fe03f000, Size: d41000, Tag: 200
1292 03:57:57.086844 * Base: fed88000, Size: 8000, Tag: 200
1293 03:57:57.090132 * Base: fed93000, Size: d000, Tag: 200
1294 03:57:57.093240 * Base: feda2000, Size: 1e000, Tag: 200
1295 03:57:57.100234 * Base: fede0000, Size: 1220000, Tag: 200
1296 03:57:57.103497 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1297 03:57:57.109963 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1298 03:57:57.116682 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1299 03:57:57.123217 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1300 03:57:57.129760 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1301 03:57:57.136194 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1302 03:57:57.143107 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1303 03:57:57.149572 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1304 03:57:57.156081 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1305 03:57:57.162994 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1306 03:57:57.169458 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1307 03:57:57.179146 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1308 03:57:57.185785 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1309 03:57:57.192338 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1310 03:57:57.199179 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1311 03:57:57.205479 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1312 03:57:57.212118 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1313 03:57:57.218747 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1314 03:57:57.225272 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1315 03:57:57.231812 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1316 03:57:57.238572 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1317 03:57:57.245018 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1318 03:57:57.251590 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1319 03:57:57.258392 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1320 03:57:57.264955 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1321 03:57:57.268200 PCI: 00:1d.0: Resource ranges:
1322 03:57:57.274647 * Base: 7fc00000, Size: 100000, Tag: 200
1323 03:57:57.281413 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1324 03:57:57.287846 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1325 03:57:57.294553 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1326 03:57:57.301367 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1327 03:57:57.307584 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1328 03:57:57.314482 Root Device assign_resources, bus 0 link: 0
1329 03:57:57.317758 DOMAIN: 0000 assign_resources, bus 0 link: 0
1330 03:57:57.327470 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1331 03:57:57.334015 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1332 03:57:57.340946 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1333 03:57:57.351104 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1334 03:57:57.354466 PCI: 00:04.0 assign_resources, bus 1 link: 0
1335 03:57:57.360814 PCI: 00:04.0 assign_resources, bus 1 link: 0
1336 03:57:57.367461 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1337 03:57:57.377558 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1338 03:57:57.383855 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1339 03:57:57.390567 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1340 03:57:57.393915 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1341 03:57:57.400413 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1342 03:57:57.407206 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 03:57:57.410578 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 03:57:57.420454 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1345 03:57:57.426970 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1346 03:57:57.437058 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1347 03:57:57.440342 PCI: 00:14.3 assign_resources, bus 0 link: 0
1348 03:57:57.443423 PCI: 00:14.3 assign_resources, bus 0 link: 0
1349 03:57:57.453479 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1350 03:57:57.456847 PCI: 00:15.0 assign_resources, bus 0 link: 0
1351 03:57:57.463469 PCI: 00:15.0 assign_resources, bus 0 link: 0
1352 03:57:57.470071 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1353 03:57:57.476799 PCI: 00:15.1 assign_resources, bus 0 link: 0
1354 03:57:57.480050 PCI: 00:15.1 assign_resources, bus 0 link: 0
1355 03:57:57.486674 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1356 03:57:57.496667 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1357 03:57:57.503410 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1358 03:57:57.513302 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1359 03:57:57.516588 PCI: 00:19.1 assign_resources, bus 0 link: 0
1360 03:57:57.523138 PCI: 00:19.1 assign_resources, bus 0 link: 0
1361 03:57:57.529810 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1362 03:57:57.539745 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1363 03:57:57.549577 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1364 03:57:57.553184 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 03:57:57.562875 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1366 03:57:57.569713 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1367 03:57:57.576077 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1368 03:57:57.582906 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1369 03:57:57.589713 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1370 03:57:57.596375 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1371 03:57:57.599629 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1372 03:57:57.609294 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1373 03:57:57.612663 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1374 03:57:57.616035 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1375 03:57:57.622785 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1376 03:57:57.626000 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1377 03:57:57.632694 LPC: Trying to open IO window from 800 size 1ff
1378 03:57:57.639244 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1379 03:57:57.649459 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1380 03:57:57.656069 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1381 03:57:57.662300 DOMAIN: 0000 assign_resources, bus 0 link: 0
1382 03:57:57.665664 Root Device assign_resources, bus 0 link: 0
1383 03:57:57.669216 Done setting resources.
1384 03:57:57.675577 Show resources in subtree (Root Device)...After assigning values.
1385 03:57:57.679157 Root Device child on link 0 DOMAIN: 0000
1386 03:57:57.682399 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1387 03:57:57.692040 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1388 03:57:57.702285 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1389 03:57:57.705284 PCI: 00:00.0
1390 03:57:57.715402 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1391 03:57:57.722036 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1392 03:57:57.732004 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1393 03:57:57.741737 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1394 03:57:57.751812 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1395 03:57:57.761574 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1396 03:57:57.771476 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1397 03:57:57.778286 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1398 03:57:57.788051 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1399 03:57:57.798144 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1400 03:57:57.808123 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1401 03:57:57.817757 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1402 03:57:57.827874 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1403 03:57:57.834222 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1404 03:57:57.844134 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1405 03:57:57.854083 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1406 03:57:57.864226 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1407 03:57:57.873876 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1408 03:57:57.884082 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1409 03:57:57.893997 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1410 03:57:57.894087 PCI: 00:02.0
1411 03:57:57.903856 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1412 03:57:57.916854 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1413 03:57:57.923906 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1414 03:57:57.930210 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1415 03:57:57.940199 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1416 03:57:57.940293 GENERIC: 0.0
1417 03:57:57.943418 PCI: 00:05.0
1418 03:57:57.953374 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1419 03:57:57.959961 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1420 03:57:57.960051 GENERIC: 0.0
1421 03:57:57.963353 PCI: 00:08.0
1422 03:57:57.973121 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1423 03:57:57.973214 PCI: 00:0a.0
1424 03:57:57.979677 PCI: 00:0d.0 child on link 0 USB0 port 0
1425 03:57:57.989461 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1426 03:57:57.992841 USB0 port 0 child on link 0 USB3 port 0
1427 03:57:57.996323 USB3 port 0
1428 03:57:57.996442 USB3 port 1
1429 03:57:57.999431 USB3 port 2
1430 03:57:57.999610 USB3 port 3
1431 03:57:58.006184 PCI: 00:14.0 child on link 0 USB0 port 0
1432 03:57:58.015923 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1433 03:57:58.019596 USB0 port 0 child on link 0 USB2 port 0
1434 03:57:58.022868 USB2 port 0
1435 03:57:58.022979 USB2 port 1
1436 03:57:58.026078 USB2 port 2
1437 03:57:58.026194 USB2 port 3
1438 03:57:58.029389 USB2 port 4
1439 03:57:58.029478 USB2 port 5
1440 03:57:58.032624 USB2 port 6
1441 03:57:58.032712 USB2 port 7
1442 03:57:58.035751 USB2 port 8
1443 03:57:58.035896 USB2 port 9
1444 03:57:58.038935 USB3 port 0
1445 03:57:58.039022 USB3 port 1
1446 03:57:58.042262 USB3 port 2
1447 03:57:58.045593 USB3 port 3
1448 03:57:58.045695 PCI: 00:14.2
1449 03:57:58.055495 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1450 03:57:58.065690 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1451 03:57:58.072089 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1452 03:57:58.081966 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1453 03:57:58.082111 GENERIC: 0.0
1454 03:57:58.088704 PCI: 00:15.0 child on link 0 I2C: 00:1a
1455 03:57:58.098445 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1456 03:57:58.098559 I2C: 00:1a
1457 03:57:58.101932 I2C: 00:31
1458 03:57:58.102031 I2C: 00:32
1459 03:57:58.105301 PCI: 00:15.1 child on link 0 I2C: 00:10
1460 03:57:58.118674 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1461 03:57:58.118777 I2C: 00:10
1462 03:57:58.121770 PCI: 00:15.2
1463 03:57:58.131693 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1464 03:57:58.131811 PCI: 00:15.3
1465 03:57:58.141334 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1466 03:57:58.144689 PCI: 00:16.0
1467 03:57:58.154777 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1468 03:57:58.158060 PCI: 00:19.0
1469 03:57:58.161230 PCI: 00:19.1 child on link 0 I2C: 00:15
1470 03:57:58.171259 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1471 03:57:58.171368 I2C: 00:15
1472 03:57:58.177885 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1473 03:57:58.187569 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1474 03:57:58.197429 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1475 03:57:58.207404 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1476 03:57:58.210727 GENERIC: 0.0
1477 03:57:58.210815 PCI: 01:00.0
1478 03:57:58.220947 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1479 03:57:58.233864 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1480 03:57:58.243569 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1481 03:57:58.243675 PCI: 00:1e.0
1482 03:57:58.256810 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1483 03:57:58.260412 PCI: 00:1e.2 child on link 0 SPI: 00
1484 03:57:58.270185 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1485 03:57:58.270282 SPI: 00
1486 03:57:58.276774 PCI: 00:1e.3 child on link 0 SPI: 00
1487 03:57:58.286700 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1488 03:57:58.286800 SPI: 00
1489 03:57:58.293272 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1490 03:57:58.299971 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1491 03:57:58.303018 PNP: 0c09.0
1492 03:57:58.309711 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1493 03:57:58.316382 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1494 03:57:58.326201 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1495 03:57:58.332913 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1496 03:57:58.339853 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1497 03:57:58.339947 GENERIC: 0.0
1498 03:57:58.342751 GENERIC: 1.0
1499 03:57:58.342838 PCI: 00:1f.3
1500 03:57:58.352731 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1501 03:57:58.366216 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1502 03:57:58.366320 PCI: 00:1f.5
1503 03:57:58.376018 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1504 03:57:58.379425 CPU_CLUSTER: 0 child on link 0 APIC: 00
1505 03:57:58.382609 APIC: 00
1506 03:57:58.382696 APIC: 01
1507 03:57:58.385793 APIC: 05
1508 03:57:58.385954 APIC: 06
1509 03:57:58.386051 APIC: 03
1510 03:57:58.389124 APIC: 02
1511 03:57:58.389234 APIC: 04
1512 03:57:58.392446 APIC: 07
1513 03:57:58.392556 Done allocating resources.
1514 03:57:58.399009 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1515 03:57:58.405619 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1516 03:57:58.408824 Configure GPIOs for I2S audio on UP4.
1517 03:57:58.416532 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1518 03:57:58.419769 Enabling resources...
1519 03:57:58.423066 PCI: 00:00.0 subsystem <- 8086/9a12
1520 03:57:58.426350 PCI: 00:00.0 cmd <- 06
1521 03:57:58.429591 PCI: 00:02.0 subsystem <- 8086/9a40
1522 03:57:58.432965 PCI: 00:02.0 cmd <- 03
1523 03:57:58.436240 PCI: 00:04.0 subsystem <- 8086/9a03
1524 03:57:58.439568 PCI: 00:04.0 cmd <- 02
1525 03:57:58.442689 PCI: 00:05.0 subsystem <- 8086/9a19
1526 03:57:58.442778 PCI: 00:05.0 cmd <- 02
1527 03:57:58.449211 PCI: 00:08.0 subsystem <- 8086/9a11
1528 03:57:58.449302 PCI: 00:08.0 cmd <- 06
1529 03:57:58.452595 PCI: 00:0d.0 subsystem <- 8086/9a13
1530 03:57:58.456149 PCI: 00:0d.0 cmd <- 02
1531 03:57:58.459437 PCI: 00:14.0 subsystem <- 8086/a0ed
1532 03:57:58.462587 PCI: 00:14.0 cmd <- 02
1533 03:57:58.465774 PCI: 00:14.2 subsystem <- 8086/a0ef
1534 03:57:58.469011 PCI: 00:14.2 cmd <- 02
1535 03:57:58.472499 PCI: 00:14.3 subsystem <- 8086/a0f0
1536 03:57:58.475679 PCI: 00:14.3 cmd <- 02
1537 03:57:58.479008 PCI: 00:15.0 subsystem <- 8086/a0e8
1538 03:57:58.482245 PCI: 00:15.0 cmd <- 02
1539 03:57:58.485659 PCI: 00:15.1 subsystem <- 8086/a0e9
1540 03:57:58.488799 PCI: 00:15.1 cmd <- 02
1541 03:57:58.492413 PCI: 00:15.2 subsystem <- 8086/a0ea
1542 03:57:58.492500 PCI: 00:15.2 cmd <- 02
1543 03:57:58.498880 PCI: 00:15.3 subsystem <- 8086/a0eb
1544 03:57:58.498992 PCI: 00:15.3 cmd <- 02
1545 03:57:58.502473 PCI: 00:16.0 subsystem <- 8086/a0e0
1546 03:57:58.505611 PCI: 00:16.0 cmd <- 02
1547 03:57:58.509089 PCI: 00:19.1 subsystem <- 8086/a0c6
1548 03:57:58.512334 PCI: 00:19.1 cmd <- 02
1549 03:57:58.515487 PCI: 00:1d.0 bridge ctrl <- 0013
1550 03:57:58.518702 PCI: 00:1d.0 subsystem <- 8086/a0b0
1551 03:57:58.522145 PCI: 00:1d.0 cmd <- 06
1552 03:57:58.525399 PCI: 00:1e.0 subsystem <- 8086/a0a8
1553 03:57:58.529004 PCI: 00:1e.0 cmd <- 06
1554 03:57:58.532191 PCI: 00:1e.2 subsystem <- 8086/a0aa
1555 03:57:58.535548 PCI: 00:1e.2 cmd <- 06
1556 03:57:58.538855 PCI: 00:1e.3 subsystem <- 8086/a0ab
1557 03:57:58.541914 PCI: 00:1e.3 cmd <- 02
1558 03:57:58.545187 PCI: 00:1f.0 subsystem <- 8086/a087
1559 03:57:58.545274 PCI: 00:1f.0 cmd <- 407
1560 03:57:58.552159 PCI: 00:1f.3 subsystem <- 8086/a0c8
1561 03:57:58.552248 PCI: 00:1f.3 cmd <- 02
1562 03:57:58.555523 PCI: 00:1f.5 subsystem <- 8086/a0a4
1563 03:57:58.558706 PCI: 00:1f.5 cmd <- 406
1564 03:57:58.563777 PCI: 01:00.0 cmd <- 02
1565 03:57:58.568327 done.
1566 03:57:58.571589 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1567 03:57:58.574903 Initializing devices...
1568 03:57:58.578188 Root Device init
1569 03:57:58.581412 Chrome EC: Set SMI mask to 0x0000000000000000
1570 03:57:58.588042 Chrome EC: clear events_b mask to 0x0000000000000000
1571 03:57:58.594691 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1572 03:57:58.597982 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1573 03:57:58.604803 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1574 03:57:58.611339 Chrome EC: Set WAKE mask to 0x0000000000000000
1575 03:57:58.614848 fw_config match found: DB_USB=USB3_ACTIVE
1576 03:57:58.621409 Configure Right Type-C port orientation for retimer
1577 03:57:58.624633 Root Device init finished in 42 msecs
1578 03:57:58.628057 PCI: 00:00.0 init
1579 03:57:58.628143 CPU TDP = 9 Watts
1580 03:57:58.631276 CPU PL1 = 9 Watts
1581 03:57:58.634517 CPU PL2 = 40 Watts
1582 03:57:58.634604 CPU PL4 = 83 Watts
1583 03:57:58.637543 PCI: 00:00.0 init finished in 8 msecs
1584 03:57:58.640974 PCI: 00:02.0 init
1585 03:57:58.644445 GMA: Found VBT in CBFS
1586 03:57:58.647722 GMA: Found valid VBT in CBFS
1587 03:57:58.651126 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1588 03:57:58.660897 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1589 03:57:58.664520 PCI: 00:02.0 init finished in 18 msecs
1590 03:57:58.667450 PCI: 00:05.0 init
1591 03:57:58.670710 PCI: 00:05.0 init finished in 0 msecs
1592 03:57:58.670797 PCI: 00:08.0 init
1593 03:57:58.677340 PCI: 00:08.0 init finished in 0 msecs
1594 03:57:58.677427 PCI: 00:14.0 init
1595 03:57:58.684186 PCI: 00:14.0 init finished in 0 msecs
1596 03:57:58.684273 PCI: 00:14.2 init
1597 03:57:58.687446 PCI: 00:14.2 init finished in 0 msecs
1598 03:57:58.691243 PCI: 00:15.0 init
1599 03:57:58.694495 I2C bus 0 version 0x3230302a
1600 03:57:58.697807 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1601 03:57:58.700941 PCI: 00:15.0 init finished in 6 msecs
1602 03:57:58.704280 PCI: 00:15.1 init
1603 03:57:58.707649 I2C bus 1 version 0x3230302a
1604 03:57:58.710876 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1605 03:57:58.714183 PCI: 00:15.1 init finished in 6 msecs
1606 03:57:58.717369 PCI: 00:15.2 init
1607 03:57:58.720835 I2C bus 2 version 0x3230302a
1608 03:57:58.723984 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1609 03:57:58.727249 PCI: 00:15.2 init finished in 6 msecs
1610 03:57:58.730836 PCI: 00:15.3 init
1611 03:57:58.730972 I2C bus 3 version 0x3230302a
1612 03:57:58.737334 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1613 03:57:58.740722 PCI: 00:15.3 init finished in 6 msecs
1614 03:57:58.740809 PCI: 00:16.0 init
1615 03:57:58.744007 PCI: 00:16.0 init finished in 0 msecs
1616 03:57:58.747997 PCI: 00:19.1 init
1617 03:57:58.751340 I2C bus 5 version 0x3230302a
1618 03:57:58.754660 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1619 03:57:58.757950 PCI: 00:19.1 init finished in 6 msecs
1620 03:57:58.761165 PCI: 00:1d.0 init
1621 03:57:58.764935 Initializing PCH PCIe bridge.
1622 03:57:58.767912 PCI: 00:1d.0 init finished in 3 msecs
1623 03:57:58.771165 PCI: 00:1f.0 init
1624 03:57:58.774494 IOAPIC: Initializing IOAPIC at 0xfec00000
1625 03:57:58.781249 IOAPIC: Bootstrap Processor Local APIC = 0x00
1626 03:57:58.781356 IOAPIC: ID = 0x02
1627 03:57:58.784242 IOAPIC: Dumping registers
1628 03:57:58.787635 reg 0x0000: 0x02000000
1629 03:57:58.787721 reg 0x0001: 0x00770020
1630 03:57:58.790857 reg 0x0002: 0x00000000
1631 03:57:58.794303 PCI: 00:1f.0 init finished in 21 msecs
1632 03:57:58.797949 PCI: 00:1f.2 init
1633 03:57:58.801236 Disabling ACPI via APMC.
1634 03:57:58.805147 APMC done.
1635 03:57:58.808650 PCI: 00:1f.2 init finished in 6 msecs
1636 03:57:58.820566 PCI: 01:00.0 init
1637 03:57:58.823732 PCI: 01:00.0 init finished in 0 msecs
1638 03:57:58.826901 PNP: 0c09.0 init
1639 03:57:58.833645 Google Chrome EC uptime: 8.451 seconds
1640 03:57:58.836830 Google Chrome AP resets since EC boot: 1
1641 03:57:58.840103 Google Chrome most recent AP reset causes:
1642 03:57:58.843503 0.380: 32775 shutdown: entering G3
1643 03:57:58.850343 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1644 03:57:58.853286 PNP: 0c09.0 init finished in 23 msecs
1645 03:57:58.860260 Devices initialized
1646 03:57:58.863387 Show all devs... After init.
1647 03:57:58.866963 Root Device: enabled 1
1648 03:57:58.867047 DOMAIN: 0000: enabled 1
1649 03:57:58.870124 CPU_CLUSTER: 0: enabled 1
1650 03:57:58.873395 PCI: 00:00.0: enabled 1
1651 03:57:58.876681 PCI: 00:02.0: enabled 1
1652 03:57:58.876800 PCI: 00:04.0: enabled 1
1653 03:57:58.880055 PCI: 00:05.0: enabled 1
1654 03:57:58.883482 PCI: 00:06.0: enabled 0
1655 03:57:58.886671 PCI: 00:07.0: enabled 0
1656 03:57:58.886787 PCI: 00:07.1: enabled 0
1657 03:57:58.890209 PCI: 00:07.2: enabled 0
1658 03:57:58.893489 PCI: 00:07.3: enabled 0
1659 03:57:58.896692 PCI: 00:08.0: enabled 1
1660 03:57:58.896810 PCI: 00:09.0: enabled 0
1661 03:57:58.899976 PCI: 00:0a.0: enabled 0
1662 03:57:58.903129 PCI: 00:0d.0: enabled 1
1663 03:57:58.906688 PCI: 00:0d.1: enabled 0
1664 03:57:58.906802 PCI: 00:0d.2: enabled 0
1665 03:57:58.910053 PCI: 00:0d.3: enabled 0
1666 03:57:58.913370 PCI: 00:0e.0: enabled 0
1667 03:57:58.913487 PCI: 00:10.2: enabled 1
1668 03:57:58.916548 PCI: 00:10.6: enabled 0
1669 03:57:58.919771 PCI: 00:10.7: enabled 0
1670 03:57:58.923199 PCI: 00:12.0: enabled 0
1671 03:57:58.923315 PCI: 00:12.6: enabled 0
1672 03:57:58.926234 PCI: 00:13.0: enabled 0
1673 03:57:58.929532 PCI: 00:14.0: enabled 1
1674 03:57:58.932820 PCI: 00:14.1: enabled 0
1675 03:57:58.932941 PCI: 00:14.2: enabled 1
1676 03:57:58.936154 PCI: 00:14.3: enabled 1
1677 03:57:58.939643 PCI: 00:15.0: enabled 1
1678 03:57:58.942917 PCI: 00:15.1: enabled 1
1679 03:57:58.943027 PCI: 00:15.2: enabled 1
1680 03:57:58.946206 PCI: 00:15.3: enabled 1
1681 03:57:58.949559 PCI: 00:16.0: enabled 1
1682 03:57:58.952930 PCI: 00:16.1: enabled 0
1683 03:57:58.953045 PCI: 00:16.2: enabled 0
1684 03:57:58.956069 PCI: 00:16.3: enabled 0
1685 03:57:58.959268 PCI: 00:16.4: enabled 0
1686 03:57:58.962614 PCI: 00:16.5: enabled 0
1687 03:57:58.962731 PCI: 00:17.0: enabled 0
1688 03:57:58.965907 PCI: 00:19.0: enabled 0
1689 03:57:58.969050 PCI: 00:19.1: enabled 1
1690 03:57:58.972271 PCI: 00:19.2: enabled 0
1691 03:57:58.972381 PCI: 00:1c.0: enabled 1
1692 03:57:58.975652 PCI: 00:1c.1: enabled 0
1693 03:57:58.978963 PCI: 00:1c.2: enabled 0
1694 03:57:58.982266 PCI: 00:1c.3: enabled 0
1695 03:57:58.982383 PCI: 00:1c.4: enabled 0
1696 03:57:58.985413 PCI: 00:1c.5: enabled 0
1697 03:57:58.988789 PCI: 00:1c.6: enabled 1
1698 03:57:58.988901 PCI: 00:1c.7: enabled 0
1699 03:57:58.992365 PCI: 00:1d.0: enabled 1
1700 03:57:58.995618 PCI: 00:1d.1: enabled 0
1701 03:57:58.998752 PCI: 00:1d.2: enabled 1
1702 03:57:58.998869 PCI: 00:1d.3: enabled 0
1703 03:57:59.002092 PCI: 00:1e.0: enabled 1
1704 03:57:59.005699 PCI: 00:1e.1: enabled 0
1705 03:57:59.008879 PCI: 00:1e.2: enabled 1
1706 03:57:59.008991 PCI: 00:1e.3: enabled 1
1707 03:57:59.012135 PCI: 00:1f.0: enabled 1
1708 03:57:59.015303 PCI: 00:1f.1: enabled 0
1709 03:57:59.018512 PCI: 00:1f.2: enabled 1
1710 03:57:59.018626 PCI: 00:1f.3: enabled 1
1711 03:57:59.021972 PCI: 00:1f.4: enabled 0
1712 03:57:59.025164 PCI: 00:1f.5: enabled 1
1713 03:57:59.028346 PCI: 00:1f.6: enabled 0
1714 03:57:59.028462 PCI: 00:1f.7: enabled 0
1715 03:57:59.031615 APIC: 00: enabled 1
1716 03:57:59.034874 GENERIC: 0.0: enabled 1
1717 03:57:59.034995 GENERIC: 0.0: enabled 1
1718 03:57:59.038318 GENERIC: 1.0: enabled 1
1719 03:57:59.041563 GENERIC: 0.0: enabled 1
1720 03:57:59.044920 GENERIC: 1.0: enabled 1
1721 03:57:59.045037 USB0 port 0: enabled 1
1722 03:57:59.048178 GENERIC: 0.0: enabled 1
1723 03:57:59.051619 USB0 port 0: enabled 1
1724 03:57:59.054878 GENERIC: 0.0: enabled 1
1725 03:57:59.055000 I2C: 00:1a: enabled 1
1726 03:57:59.057941 I2C: 00:31: enabled 1
1727 03:57:59.061479 I2C: 00:32: enabled 1
1728 03:57:59.061592 I2C: 00:10: enabled 1
1729 03:57:59.064761 I2C: 00:15: enabled 1
1730 03:57:59.068023 GENERIC: 0.0: enabled 0
1731 03:57:59.068138 GENERIC: 1.0: enabled 0
1732 03:57:59.071225 GENERIC: 0.0: enabled 1
1733 03:57:59.074595 SPI: 00: enabled 1
1734 03:57:59.074712 SPI: 00: enabled 1
1735 03:57:59.077855 PNP: 0c09.0: enabled 1
1736 03:57:59.081049 GENERIC: 0.0: enabled 1
1737 03:57:59.084552 USB3 port 0: enabled 1
1738 03:57:59.084664 USB3 port 1: enabled 1
1739 03:57:59.087755 USB3 port 2: enabled 0
1740 03:57:59.090820 USB3 port 3: enabled 0
1741 03:57:59.090937 USB2 port 0: enabled 0
1742 03:57:59.094160 USB2 port 1: enabled 1
1743 03:57:59.097293 USB2 port 2: enabled 1
1744 03:57:59.101046 USB2 port 3: enabled 0
1745 03:57:59.101141 USB2 port 4: enabled 1
1746 03:57:59.104260 USB2 port 5: enabled 0
1747 03:57:59.107458 USB2 port 6: enabled 0
1748 03:57:59.107590 USB2 port 7: enabled 0
1749 03:57:59.110465 USB2 port 8: enabled 0
1750 03:57:59.114041 USB2 port 9: enabled 0
1751 03:57:59.117210 USB3 port 0: enabled 0
1752 03:57:59.117307 USB3 port 1: enabled 1
1753 03:57:59.120393 USB3 port 2: enabled 0
1754 03:57:59.123646 USB3 port 3: enabled 0
1755 03:57:59.123754 GENERIC: 0.0: enabled 1
1756 03:57:59.126856 GENERIC: 1.0: enabled 1
1757 03:57:59.130568 APIC: 01: enabled 1
1758 03:57:59.130661 APIC: 05: enabled 1
1759 03:57:59.133697 APIC: 06: enabled 1
1760 03:57:59.137055 APIC: 03: enabled 1
1761 03:57:59.137144 APIC: 02: enabled 1
1762 03:57:59.140302 APIC: 04: enabled 1
1763 03:57:59.143499 APIC: 07: enabled 1
1764 03:57:59.143583 PCI: 01:00.0: enabled 1
1765 03:57:59.150260 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1766 03:57:59.153621 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1767 03:57:59.156815 ELOG: NV offset 0xf30000 size 0x1000
1768 03:57:59.165504 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1769 03:57:59.171836 ELOG: Event(17) added with size 13 at 2022-07-05 03:56:09 UTC
1770 03:57:59.178485 ELOG: Event(92) added with size 9 at 2022-07-05 03:56:09 UTC
1771 03:57:59.185269 ELOG: Event(93) added with size 9 at 2022-07-05 03:56:09 UTC
1772 03:57:59.191718 ELOG: Event(9E) added with size 10 at 2022-07-05 03:56:09 UTC
1773 03:57:59.198358 ELOG: Event(9F) added with size 14 at 2022-07-05 03:56:09 UTC
1774 03:57:59.205096 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1775 03:57:59.211493 ELOG: Event(A1) added with size 10 at 2022-07-05 03:56:09 UTC
1776 03:57:59.214890 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1777 03:57:59.221473 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1778 03:57:59.224696 Finalize devices...
1779 03:57:59.224785 Devices finalized
1780 03:57:59.231199 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1781 03:57:59.237781 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1782 03:57:59.241332 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1783 03:57:59.247697 ME: HFSTS1 : 0x80030055
1784 03:57:59.250891 ME: HFSTS2 : 0x30280116
1785 03:57:59.257593 ME: HFSTS3 : 0x00000050
1786 03:57:59.261075 ME: HFSTS4 : 0x00004000
1787 03:57:59.264396 ME: HFSTS5 : 0x00000000
1788 03:57:59.270888 ME: HFSTS6 : 0x00400006
1789 03:57:59.274447 ME: Manufacturing Mode : YES
1790 03:57:59.277593 ME: SPI Protection Mode Enabled : NO
1791 03:57:59.280794 ME: FW Partition Table : OK
1792 03:57:59.284068 ME: Bringup Loader Failure : NO
1793 03:57:59.287408 ME: Firmware Init Complete : NO
1794 03:57:59.290859 ME: Boot Options Present : NO
1795 03:57:59.294048 ME: Update In Progress : NO
1796 03:57:59.300971 ME: D0i3 Support : YES
1797 03:57:59.304007 ME: Low Power State Enabled : NO
1798 03:57:59.307406 ME: CPU Replaced : YES
1799 03:57:59.310585 ME: CPU Replacement Valid : YES
1800 03:57:59.314056 ME: Current Working State : 5
1801 03:57:59.317033 ME: Current Operation State : 1
1802 03:57:59.320585 ME: Current Operation Mode : 3
1803 03:57:59.323738 ME: Error Code : 0
1804 03:57:59.330611 ME: Enhanced Debug Mode : NO
1805 03:57:59.333848 ME: CPU Debug Disabled : YES
1806 03:57:59.336994 ME: TXT Support : NO
1807 03:57:59.343769 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1808 03:57:59.350386 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1809 03:57:59.353654 CBFS: 'fallback/slic' not found.
1810 03:57:59.356986 ACPI: Writing ACPI tables at 76b01000.
1811 03:57:59.360055 ACPI: * FACS
1812 03:57:59.360142 ACPI: * DSDT
1813 03:57:59.363656 Ramoops buffer: 0x100000@0x76a00000.
1814 03:57:59.370171 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1815 03:57:59.373356 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1816 03:57:59.376924 Google Chrome EC: version:
1817 03:57:59.380069 ro: voema_v2.0.7540-147f8d37d1
1818 03:57:59.383272 rw: voema_v2.0.7540-147f8d37d1
1819 03:57:59.386815 running image: 2
1820 03:57:59.393456 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1821 03:57:59.396700 ACPI: * FADT
1822 03:57:59.396818 SCI is IRQ9
1823 03:57:59.399986 ACPI: added table 1/32, length now 40
1824 03:57:59.403256 ACPI: * SSDT
1825 03:57:59.406424 Found 1 CPU(s) with 8 core(s) each.
1826 03:57:59.409701 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1827 03:57:59.416357 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1828 03:57:59.419619 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1829 03:57:59.423123 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1830 03:57:59.429660 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1831 03:57:59.436263 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1832 03:57:59.439693 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1833 03:57:59.446248 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1834 03:57:59.452928 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1835 03:57:59.456125 \_SB.PCI0.RP09: Added StorageD3Enable property
1836 03:57:59.459443 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1837 03:57:59.466140 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1838 03:57:59.472628 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1839 03:57:59.475842 PS2K: Passing 80 keymaps to kernel
1840 03:57:59.482284 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1841 03:57:59.489122 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1842 03:57:59.495639 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1843 03:57:59.502227 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1844 03:57:59.508977 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1845 03:57:59.515449 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1846 03:57:59.522239 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1847 03:57:59.528759 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1848 03:57:59.531858 ACPI: added table 2/32, length now 44
1849 03:57:59.531957 ACPI: * MCFG
1850 03:57:59.535462 ACPI: added table 3/32, length now 48
1851 03:57:59.538781 ACPI: * TPM2
1852 03:57:59.542008 TPM2 log created at 0x769f0000
1853 03:57:59.545330 ACPI: added table 4/32, length now 52
1854 03:57:59.545424 ACPI: * MADT
1855 03:57:59.548594 SCI is IRQ9
1856 03:57:59.551759 ACPI: added table 5/32, length now 56
1857 03:57:59.555339 current = 76b09850
1858 03:57:59.555428 ACPI: * DMAR
1859 03:57:59.558422 ACPI: added table 6/32, length now 60
1860 03:57:59.561679 ACPI: added table 7/32, length now 64
1861 03:57:59.565120 ACPI: * HPET
1862 03:57:59.568609 ACPI: added table 8/32, length now 68
1863 03:57:59.568702 ACPI: done.
1864 03:57:59.571706 ACPI tables: 35216 bytes.
1865 03:57:59.574879 smbios_write_tables: 769ef000
1866 03:57:59.578288 EC returned error result code 3
1867 03:57:59.581457 Couldn't obtain OEM name from CBI
1868 03:57:59.585669 Create SMBIOS type 16
1869 03:57:59.588841 Create SMBIOS type 17
1870 03:57:59.592169 GENERIC: 0.0 (WIFI Device)
1871 03:57:59.592266 SMBIOS tables: 1750 bytes.
1872 03:57:59.598687 Writing table forward entry at 0x00000500
1873 03:57:59.605206 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1874 03:57:59.608683 Writing coreboot table at 0x76b25000
1875 03:57:59.615047 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1876 03:57:59.618229 1. 0000000000001000-000000000009ffff: RAM
1877 03:57:59.621824 2. 00000000000a0000-00000000000fffff: RESERVED
1878 03:57:59.628650 3. 0000000000100000-00000000769eefff: RAM
1879 03:57:59.631597 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1880 03:57:59.638328 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1881 03:57:59.644784 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1882 03:57:59.648120 7. 0000000077000000-000000007fbfffff: RESERVED
1883 03:57:59.654712 8. 00000000c0000000-00000000cfffffff: RESERVED
1884 03:57:59.658013 9. 00000000f8000000-00000000f9ffffff: RESERVED
1885 03:57:59.664569 10. 00000000fb000000-00000000fb000fff: RESERVED
1886 03:57:59.667763 11. 00000000fe000000-00000000fe00ffff: RESERVED
1887 03:57:59.671235 12. 00000000fed80000-00000000fed87fff: RESERVED
1888 03:57:59.677692 13. 00000000fed90000-00000000fed92fff: RESERVED
1889 03:57:59.680908 14. 00000000feda0000-00000000feda1fff: RESERVED
1890 03:57:59.687733 15. 00000000fedc0000-00000000feddffff: RESERVED
1891 03:57:59.690830 16. 0000000100000000-00000002803fffff: RAM
1892 03:57:59.694080 Passing 4 GPIOs to payload:
1893 03:57:59.700991 NAME | PORT | POLARITY | VALUE
1894 03:57:59.704168 lid | undefined | high | high
1895 03:57:59.710563 power | undefined | high | low
1896 03:57:59.714071 oprom | undefined | high | low
1897 03:57:59.720689 EC in RW | 0x000000e5 | high | high
1898 03:57:59.727033 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7337
1899 03:57:59.730461 coreboot table: 1576 bytes.
1900 03:57:59.733764 IMD ROOT 0. 0x76fff000 0x00001000
1901 03:57:59.736957 IMD SMALL 1. 0x76ffe000 0x00001000
1902 03:57:59.740183 FSP MEMORY 2. 0x76c4e000 0x003b0000
1903 03:57:59.743630 VPD 3. 0x76c4d000 0x00000367
1904 03:57:59.746918 RO MCACHE 4. 0x76c4c000 0x00000fdc
1905 03:57:59.753280 CONSOLE 5. 0x76c2c000 0x00020000
1906 03:57:59.756925 FMAP 6. 0x76c2b000 0x00000578
1907 03:57:59.760243 TIME STAMP 7. 0x76c2a000 0x00000910
1908 03:57:59.763524 VBOOT WORK 8. 0x76c16000 0x00014000
1909 03:57:59.766738 ROMSTG STCK 9. 0x76c15000 0x00001000
1910 03:57:59.769918 AFTER CAR 10. 0x76c0a000 0x0000b000
1911 03:57:59.773451 RAMSTAGE 11. 0x76b97000 0x00073000
1912 03:57:59.776568 REFCODE 12. 0x76b42000 0x00055000
1913 03:57:59.783001 SMM BACKUP 13. 0x76b32000 0x00010000
1914 03:57:59.786545 4f444749 14. 0x76b30000 0x00002000
1915 03:57:59.789541 EXT VBT15. 0x76b2d000 0x0000219f
1916 03:57:59.793125 COREBOOT 16. 0x76b25000 0x00008000
1917 03:57:59.796353 ACPI 17. 0x76b01000 0x00024000
1918 03:57:59.799753 ACPI GNVS 18. 0x76b00000 0x00001000
1919 03:57:59.803035 RAMOOPS 19. 0x76a00000 0x00100000
1920 03:57:59.806263 TPM2 TCGLOG20. 0x769f0000 0x00010000
1921 03:57:59.809376 SMBIOS 21. 0x769ef000 0x00000800
1922 03:57:59.812646 IMD small region:
1923 03:57:59.815951 IMD ROOT 0. 0x76ffec00 0x00000400
1924 03:57:59.819412 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1925 03:57:59.825832 POWER STATE 2. 0x76ffeb80 0x00000044
1926 03:57:59.829311 ROMSTAGE 3. 0x76ffeb60 0x00000004
1927 03:57:59.832359 MEM INFO 4. 0x76ffe980 0x000001e0
1928 03:57:59.839096 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1929 03:57:59.842287 MTRR: Physical address space:
1930 03:57:59.848868 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1931 03:57:59.855639 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1932 03:57:59.858829 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1933 03:57:59.865509 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1934 03:57:59.872155 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1935 03:57:59.878585 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1936 03:57:59.885466 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1937 03:57:59.888715 MTRR: Fixed MSR 0x250 0x0606060606060606
1938 03:57:59.891935 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 03:57:59.898290 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 03:57:59.901673 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 03:57:59.904928 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 03:57:59.908517 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 03:57:59.914919 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 03:57:59.918168 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 03:57:59.921382 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 03:57:59.924907 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 03:57:59.931331 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 03:57:59.934892 call enable_fixed_mtrr()
1949 03:57:59.937932 CPU physical address size: 39 bits
1950 03:57:59.941421 MTRR: default type WB/UC MTRR counts: 6/6.
1951 03:57:59.944640 MTRR: UC selected as default type.
1952 03:57:59.951375 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1953 03:57:59.957746 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1954 03:57:59.964561 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1955 03:57:59.970965 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1956 03:57:59.977631 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1957 03:57:59.984240 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1958 03:57:59.987590 MTRR: Fixed MSR 0x250 0x0606060606060606
1959 03:57:59.991233 MTRR: Fixed MSR 0x258 0x0606060606060606
1960 03:57:59.997921 MTRR: Fixed MSR 0x259 0x0000000000000000
1961 03:58:00.001072 MTRR: Fixed MSR 0x268 0x0606060606060606
1962 03:58:00.004197 MTRR: Fixed MSR 0x269 0x0606060606060606
1963 03:58:00.007497 MTRR: Fixed MSR 0x26a 0x0606060606060606
1964 03:58:00.014179 MTRR: Fixed MSR 0x26b 0x0606060606060606
1965 03:58:00.017467 MTRR: Fixed MSR 0x26c 0x0606060606060606
1966 03:58:00.020671 MTRR: Fixed MSR 0x26d 0x0606060606060606
1967 03:58:00.024090 MTRR: Fixed MSR 0x26e 0x0606060606060606
1968 03:58:00.030566 MTRR: Fixed MSR 0x26f 0x0606060606060606
1969 03:58:00.030665
1970 03:58:00.030766 MTRR check
1971 03:58:00.034094 call enable_fixed_mtrr()
1972 03:58:00.037466 Fixed MTRRs : Enabled
1973 03:58:00.040441 Variable MTRRs: Enabled
1974 03:58:00.040529
1975 03:58:00.044008 CPU physical address size: 39 bits
1976 03:58:00.050397 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
1977 03:58:00.053737 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 03:58:00.057216 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 03:58:00.063474 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 03:58:00.066785 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 03:58:00.070348 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 03:58:00.073593 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 03:58:00.080357 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 03:58:00.083443 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 03:58:00.086662 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 03:58:00.090138 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 03:58:00.096885 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 03:58:00.100122 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 03:58:00.103440 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 03:58:00.106712 call enable_fixed_mtrr()
1991 03:58:00.109948 MTRR: Fixed MSR 0x259 0x0000000000000000
1992 03:58:00.116608 MTRR: Fixed MSR 0x268 0x0606060606060606
1993 03:58:00.119739 MTRR: Fixed MSR 0x269 0x0606060606060606
1994 03:58:00.123083 MTRR: Fixed MSR 0x26a 0x0606060606060606
1995 03:58:00.126807 MTRR: Fixed MSR 0x26b 0x0606060606060606
1996 03:58:00.132956 MTRR: Fixed MSR 0x26c 0x0606060606060606
1997 03:58:00.136448 MTRR: Fixed MSR 0x26d 0x0606060606060606
1998 03:58:00.139727 MTRR: Fixed MSR 0x26e 0x0606060606060606
1999 03:58:00.142878 MTRR: Fixed MSR 0x26f 0x0606060606060606
2000 03:58:00.146858 CPU physical address size: 39 bits
2001 03:58:00.153647 call enable_fixed_mtrr()
2002 03:58:00.156938 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 03:58:00.160082 CPU physical address size: 39 bits
2004 03:58:00.163223 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 03:58:00.166763 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 03:58:00.173458 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 03:58:00.176868 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 03:58:00.179963 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 03:58:00.183387 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 03:58:00.190026 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 03:58:00.193045 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 03:58:00.196591 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 03:58:00.199718 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 03:58:00.203292 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 03:58:00.209619 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 03:58:00.213110 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 03:58:00.219577 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 03:58:00.223024 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 03:58:00.226368 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 03:58:00.229606 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 03:58:00.232715 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 03:58:00.239289 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 03:58:00.242602 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 03:58:00.245783 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 03:58:00.249573 call enable_fixed_mtrr()
2026 03:58:00.253083 call enable_fixed_mtrr()
2027 03:58:00.256572 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 03:58:00.259838 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 03:58:00.266351 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 03:58:00.269314 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 03:58:00.272668 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 03:58:00.276206 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 03:58:00.282667 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 03:58:00.285977 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 03:58:00.289291 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 03:58:00.292730 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 03:58:00.299075 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 03:58:00.302484 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 03:58:00.305859 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 03:58:00.309090 call enable_fixed_mtrr()
2041 03:58:00.312308 MTRR: Fixed MSR 0x259 0x0000000000000000
2042 03:58:00.318901 MTRR: Fixed MSR 0x268 0x0606060606060606
2043 03:58:00.322014 MTRR: Fixed MSR 0x269 0x0606060606060606
2044 03:58:00.325401 MTRR: Fixed MSR 0x26a 0x0606060606060606
2045 03:58:00.328621 MTRR: Fixed MSR 0x26b 0x0606060606060606
2046 03:58:00.335298 MTRR: Fixed MSR 0x26c 0x0606060606060606
2047 03:58:00.338531 MTRR: Fixed MSR 0x26d 0x0606060606060606
2048 03:58:00.341759 MTRR: Fixed MSR 0x26e 0x0606060606060606
2049 03:58:00.344918 MTRR: Fixed MSR 0x26f 0x0606060606060606
2050 03:58:00.351664 CPU physical address size: 39 bits
2051 03:58:00.354874 call enable_fixed_mtrr()
2052 03:58:00.358393 CPU physical address size: 39 bits
2053 03:58:00.361458 CPU physical address size: 39 bits
2054 03:58:00.365253 Checking cr50 for pending updates
2055 03:58:00.369050 CPU physical address size: 39 bits
2056 03:58:00.373335 Reading cr50 TPM mode
2057 03:58:00.383624 BS: BS_PAYLOAD_LOAD entry times (exec / console): 322 / 6 ms
2058 03:58:00.393613 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2059 03:58:00.396893 Checking segment from ROM address 0xffc02b38
2060 03:58:00.400175 Checking segment from ROM address 0xffc02b54
2061 03:58:00.406630 Loading segment from ROM address 0xffc02b38
2062 03:58:00.406743 code (compression=0)
2063 03:58:00.416731 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2064 03:58:00.426649 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2065 03:58:00.426767 it's not compressed!
2066 03:58:00.566104 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2067 03:58:00.572753 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2068 03:58:00.579241 Loading segment from ROM address 0xffc02b54
2069 03:58:00.582564 Entry Point 0x30000000
2070 03:58:00.582679 Loaded segments
2071 03:58:00.589189 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2072 03:58:00.632445 Finalizing chipset.
2073 03:58:00.635382 Finalizing SMM.
2074 03:58:00.635514 APMC done.
2075 03:58:00.642240 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2076 03:58:00.645579 mp_park_aps done after 0 msecs.
2077 03:58:00.648531 Jumping to boot code at 0x30000000(0x76b25000)
2078 03:58:00.658599 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2079 03:58:00.661697
2080 03:58:00.662155 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2081 03:58:00.662303 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2082 03:58:00.662428 Setting prompt string to ['volteer:']
2083 03:58:00.662543 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2084 03:58:00.665408 Starting depthcharge on Voema...
2085 03:58:00.671754 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2086 03:58:00.678470 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2087 03:58:00.684898 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2088 03:58:00.688256 Failed to find eMMC card reader
2089 03:58:00.691514 Wipe memory regions:
2090 03:58:00.694858 [0x00000000001000, 0x000000000a0000)
2091 03:58:00.697899 [0x00000000100000, 0x00000030000000)
2092 03:58:00.726843 [0x00000032662db0, 0x000000769ef000)
2093 03:58:00.765695 [0x00000100000000, 0x00000280400000)
2094 03:58:00.968601 ec_init: CrosEC protocol v3 supported (256, 256)
2095 03:58:00.975358 update_port_state: port C0 state: usb enable 1 mux conn 0
2096 03:58:00.982016 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2097 03:58:00.988581 pmc_check_ipc_sts: STS_BUSY done after 1566 us
2098 03:58:00.995106 send_conn_disc_msg: pmc_send_cmd succeeded
2099 03:58:01.424524 R8152: Initializing
2100 03:58:01.427605 Version 6 (ocp_data = 5c30)
2101 03:58:01.430977 R8152: Done initializing
2102 03:58:01.434058 Adding net device
2103 03:58:01.738919 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2104 03:58:01.739108
2105 03:58:01.742251 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2107 03:58:01.842917 volteer: tftpboot 192.168.201.1 6750545/tftp-deploy-z_e6l34v/kernel/bzImage 6750545/tftp-deploy-z_e6l34v/kernel/cmdline 6750545/tftp-deploy-z_e6l34v/ramdisk/ramdisk.cpio.gz
2108 03:58:01.843094 Setting prompt string to ['Starting kernel']
2109 03:58:01.843195 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2110 03:58:01.843296 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:43)
2111 03:58:01.847017 tftpboot 192.168.201.1 6750545/tftp-deploy-z_e6l34v/kernel/bzImoy-z_e6l34v/kernel/cmdline 6750545/tftp-deploy-z_e6l34v/ramdisk/ramdisk.cpio.gz
2112 03:58:01.847129 Waiting for link
2113 03:58:02.049877 done.
2114 03:58:02.050055 MAC: 00:24:32:30:79:42
2115 03:58:02.053245 Sending DHCP discover... done.
2116 03:58:02.056527 Waiting for reply... done.
2117 03:58:02.059745 Sending DHCP request... done.
2118 03:58:02.063009 Waiting for reply... done.
2119 03:58:02.066237 My ip is 192.168.201.13
2120 03:58:02.069650 The DHCP server ip is 192.168.201.1
2121 03:58:02.076349 TFTP server IP predefined by user: 192.168.201.1
2122 03:58:02.082787 Bootfile predefined by user: 6750545/tftp-deploy-z_e6l34v/kernel/bzImage
2123 03:58:02.086314 Sending tftp read request... done.
2124 03:58:02.089240 Waiting for the transfer...
2125 03:58:02.641327 00000000 ################################################################
2126 03:58:03.164768 00080000 ################################################################
2127 03:58:03.695345 00100000 ################################################################
2128 03:58:04.244809 00180000 ################################################################
2129 03:58:04.792093 00200000 ################################################################
2130 03:58:05.327359 00280000 ################################################################
2131 03:58:05.869234 00300000 ################################################################
2132 03:58:06.409951 00380000 ################################################################
2133 03:58:06.985939 00400000 ################################################################
2134 03:58:07.572604 00480000 ################################################################
2135 03:58:08.170075 00500000 ################################################################
2136 03:58:08.862088 00580000 ################################################################
2137 03:58:09.545241 00600000 ############################################################### done.
2138 03:58:09.548360 The bootfile was 6807440 bytes long.
2139 03:58:09.551221 Sending tftp read request... done.
2140 03:58:09.554651 Waiting for the transfer...
2141 03:58:10.268361 00000000 ################################################################
2142 03:58:10.988646 00080000 ################################################################
2143 03:58:11.622399 00100000 ################################################################
2144 03:58:12.316294 00180000 ################################################################
2145 03:58:12.946148 00200000 ################################################################
2146 03:58:13.576869 00280000 ################################################################
2147 03:58:14.283583 00300000 ################################################################
2148 03:58:14.929962 00380000 ################################################################
2149 03:58:15.621296 00400000 ################################################################
2150 03:58:16.270121 00480000 ################################################################
2151 03:58:16.955812 00500000 ################################################################
2152 03:58:17.580119 00580000 ################################################################
2153 03:58:18.179464 00600000 ################################################################
2154 03:58:18.721993 00680000 ################################################################
2155 03:58:19.282647 00700000 ################################################################
2156 03:58:19.835457 00780000 ################################################################
2157 03:58:20.008653 00800000 #################### done.
2158 03:58:20.011786 Sending tftp read request... done.
2159 03:58:20.015117 Waiting for the transfer...
2160 03:58:20.015206 00000000 # done.
2161 03:58:20.024960 Command line loaded dynamically from TFTP file: 6750545/tftp-deploy-z_e6l34v/kernel/cmdline
2162 03:58:20.037818 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2163 03:58:20.045400 Shutting down all USB controllers.
2164 03:58:20.045488 Removing current net device
2165 03:58:20.048392 Finalizing coreboot
2166 03:58:20.055094 Exiting depthcharge with code 4 at timestamp: 28041814
2167 03:58:20.055195
2168 03:58:20.055263 Starting kernel ...
2169 03:58:20.055327
2170 03:58:20.055389
2171 03:58:20.055682 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2172 03:58:20.055780 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2173 03:58:20.055855 Setting prompt string to ['Linux version [0-9]']
2174 03:58:20.055925 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2175 03:58:20.055995 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2177 04:02:45.056783 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2179 04:02:45.057995 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2181 04:02:45.058927 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2184 04:02:45.060592 end: 2 depthcharge-action (duration 00:05:00) [common]
2186 04:02:45.061698 Cleaning after the job
2187 04:02:45.062161 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6750545/tftp-deploy-z_e6l34v/ramdisk
2188 04:02:45.065400 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6750545/tftp-deploy-z_e6l34v/kernel
2189 04:02:45.067746 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6750545/tftp-deploy-z_e6l34v/modules
2190 04:02:45.067940 start: 5.1 power-off (timeout 00:00:30) [common]
2191 04:02:45.068092 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2192 04:02:45.086956 >> Command sent successfully.
2193 04:02:45.088758 Returned 0 in 0 seconds
2194 04:02:45.190110 end: 5.1 power-off (duration 00:00:00) [common]
2196 04:02:45.191739 start: 5.2 read-feedback (timeout 00:10:00) [common]
2197 04:02:45.192979 Listened to connection for namespace 'common' for up to 1s
2198 04:02:46.197173 Finalising connection for namespace 'common'
2199 04:02:46.197919 Disconnecting from shell: Finalise
2200 04:02:46.299369 end: 5.2 read-feedback (duration 00:00:01) [common]
2201 04:02:46.300021 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6750545
2202 04:02:46.325984 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6750545
2203 04:02:46.326648 JobError: Your job cannot terminate cleanly.