Boot log: asus-cx9400-volteer
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 03:57:57.315710 lava-dispatcher, installed at version: 2022.04
2 03:57:57.315889 start: 0 validate
3 03:57:57.316015 Start time: 2022-07-05 03:57:57.316008+00:00 (UTC)
4 03:57:57.316134 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:57:57.316257 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20220624.0%2Famd64%2Frootfs.cpio.gz exists
6 03:57:57.608657 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:57:57.608917 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.4.302-1083-g94e3113365c2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:58:00.113845 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:58:00.114544 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.4.302-1083-g94e3113365c2%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 03:58:00.119062 validate duration: 2.80
12 03:58:00.119289 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 03:58:00.119389 start: 1.1 download-retry (timeout 00:10:00) [common]
14 03:58:00.119484 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 03:58:00.119591 Not decompressing ramdisk as can be used compressed.
16 03:58:00.119672 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20220624.0/amd64/rootfs.cpio.gz
17 03:58:00.119737 saving as /var/lib/lava/dispatcher/tmp/6750553/tftp-deploy-jnz2icgk/ramdisk/rootfs.cpio.gz
18 03:58:00.119797 total size: 35717204 (34MB)
19 03:58:00.120764 progress 0% (0MB)
20 03:58:00.129656 progress 5% (1MB)
21 03:58:00.138510 progress 10% (3MB)
22 03:58:00.147203 progress 15% (5MB)
23 03:58:00.155800 progress 20% (6MB)
24 03:58:00.163951 progress 25% (8MB)
25 03:58:00.172263 progress 30% (10MB)
26 03:58:00.180408 progress 35% (11MB)
27 03:58:00.188802 progress 40% (13MB)
28 03:58:00.197087 progress 45% (15MB)
29 03:58:00.205998 progress 50% (17MB)
30 03:58:00.214391 progress 55% (18MB)
31 03:58:00.223041 progress 60% (20MB)
32 03:58:00.231476 progress 65% (22MB)
33 03:58:00.240632 progress 70% (23MB)
34 03:58:00.249231 progress 75% (25MB)
35 03:58:00.258240 progress 80% (27MB)
36 03:58:00.266562 progress 85% (28MB)
37 03:58:00.275028 progress 90% (30MB)
38 03:58:00.283256 progress 95% (32MB)
39 03:58:00.291662 progress 100% (34MB)
40 03:58:00.291914 34MB downloaded in 0.17s (197.91MB/s)
41 03:58:00.292087 end: 1.1.1 http-download (duration 00:00:00) [common]
43 03:58:00.292341 end: 1.1 download-retry (duration 00:00:00) [common]
44 03:58:00.292430 start: 1.2 download-retry (timeout 00:10:00) [common]
45 03:58:00.292518 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 03:58:00.292626 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.4.302-1083-g94e3113365c2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 03:58:00.292695 saving as /var/lib/lava/dispatcher/tmp/6750553/tftp-deploy-jnz2icgk/kernel/bzImage
48 03:58:00.292758 total size: 6807440 (6MB)
49 03:58:00.292819 No compression specified
50 03:58:00.293907 progress 0% (0MB)
51 03:58:00.295642 progress 5% (0MB)
52 03:58:00.297313 progress 10% (0MB)
53 03:58:00.299123 progress 15% (1MB)
54 03:58:00.300744 progress 20% (1MB)
55 03:58:00.302492 progress 25% (1MB)
56 03:58:00.304278 progress 30% (1MB)
57 03:58:00.305936 progress 35% (2MB)
58 03:58:00.307681 progress 40% (2MB)
59 03:58:00.309274 progress 45% (2MB)
60 03:58:00.310904 progress 50% (3MB)
61 03:58:00.312644 progress 55% (3MB)
62 03:58:00.314271 progress 60% (3MB)
63 03:58:00.316005 progress 65% (4MB)
64 03:58:00.317644 progress 70% (4MB)
65 03:58:00.319228 progress 75% (4MB)
66 03:58:00.320962 progress 80% (5MB)
67 03:58:00.322594 progress 85% (5MB)
68 03:58:00.324187 progress 90% (5MB)
69 03:58:00.325965 progress 95% (6MB)
70 03:58:00.327570 progress 100% (6MB)
71 03:58:00.327818 6MB downloaded in 0.04s (185.20MB/s)
72 03:58:00.327973 end: 1.2.1 http-download (duration 00:00:00) [common]
74 03:58:00.328211 end: 1.2 download-retry (duration 00:00:00) [common]
75 03:58:00.328300 start: 1.3 download-retry (timeout 00:10:00) [common]
76 03:58:00.328388 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 03:58:00.328494 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.4.302-1083-g94e3113365c2/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 03:58:00.328562 saving as /var/lib/lava/dispatcher/tmp/6750553/tftp-deploy-jnz2icgk/modules/modules.tar
79 03:58:00.328625 total size: 51972 (0MB)
80 03:58:00.328686 Using unxz to decompress xz
81 03:58:00.331953 progress 63% (0MB)
82 03:58:00.332320 progress 100% (0MB)
83 03:58:00.335580 0MB downloaded in 0.01s (7.13MB/s)
84 03:58:00.335802 end: 1.3.1 http-download (duration 00:00:00) [common]
86 03:58:00.336069 end: 1.3 download-retry (duration 00:00:00) [common]
87 03:58:00.336166 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 03:58:00.336261 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 03:58:00.336345 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 03:58:00.336431 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 03:58:00.336593 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4
92 03:58:00.336699 makedir: /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin
93 03:58:00.336783 makedir: /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/tests
94 03:58:00.336863 makedir: /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/results
95 03:58:00.336965 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-add-keys
96 03:58:00.337090 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-add-sources
97 03:58:00.337205 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-background-process-start
98 03:58:00.337316 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-background-process-stop
99 03:58:00.337426 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-common-functions
100 03:58:00.337533 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-echo-ipv4
101 03:58:00.337682 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-install-packages
102 03:58:00.337792 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-installed-packages
103 03:58:00.337899 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-os-build
104 03:58:00.338007 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-probe-channel
105 03:58:00.338116 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-probe-ip
106 03:58:00.338224 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-target-ip
107 03:58:00.338331 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-target-mac
108 03:58:00.338437 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-target-storage
109 03:58:00.338548 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-test-case
110 03:58:00.338655 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-test-event
111 03:58:00.338763 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-test-feedback
112 03:58:00.338870 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-test-raise
113 03:58:00.338981 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-test-reference
114 03:58:00.339088 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-test-runner
115 03:58:00.339195 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-test-set
116 03:58:00.339301 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-test-shell
117 03:58:00.339410 Updating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-install-packages (oe)
118 03:58:00.339520 Updating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/bin/lava-installed-packages (oe)
119 03:58:00.339618 Creating /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/environment
120 03:58:00.339705 LAVA metadata
121 03:58:00.339774 - LAVA_JOB_ID=6750553
122 03:58:00.339839 - LAVA_DISPATCHER_IP=192.168.201.1
123 03:58:00.339938 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 03:58:00.340005 skipped lava-vland-overlay
125 03:58:00.340082 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 03:58:00.340166 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 03:58:00.340229 skipped lava-multinode-overlay
128 03:58:00.340303 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 03:58:00.340384 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 03:58:00.340460 Loading test definitions
131 03:58:00.340556 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 03:58:00.340632 Using /lava-6750553 at stage 0
133 03:58:00.340888 uuid=6750553_1.4.2.3.1 testdef=None
134 03:58:00.340977 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 03:58:00.341067 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 03:58:00.341535 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 03:58:00.341813 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 03:58:00.342351 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 03:58:00.342596 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 03:58:00.343107 runner path: /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/0/tests/0_cros-ec test_uuid 6750553_1.4.2.3.1
143 03:58:00.343256 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 03:58:00.343467 Creating lava-test-runner.conf files
146 03:58:00.343531 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6750553/lava-overlay-tdc5nej4/lava-6750553/0 for stage 0
147 03:58:00.343611 - 0_cros-ec
148 03:58:00.343704 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 03:58:00.343792 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
150 03:58:00.348818 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 03:58:00.349015 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
152 03:58:00.349105 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 03:58:00.349192 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 03:58:00.349278 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
155 03:58:01.097619 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 03:58:01.097976 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
157 03:58:01.098085 extracting modules file /var/lib/lava/dispatcher/tmp/6750553/tftp-deploy-jnz2icgk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6750553/extract-overlay-ramdisk-v5ebtmoy/ramdisk
158 03:58:01.102176 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 03:58:01.102290 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
160 03:58:01.102380 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6750553/compress-overlay-ryo_r1m5/overlay-1.4.2.4.tar.gz to ramdisk
161 03:58:01.102457 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6750553/compress-overlay-ryo_r1m5/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6750553/extract-overlay-ramdisk-v5ebtmoy/ramdisk
162 03:58:01.105596 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 03:58:01.105706 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
164 03:58:01.105801 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 03:58:01.105898 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
166 03:58:01.105978 Building ramdisk /var/lib/lava/dispatcher/tmp/6750553/extract-overlay-ramdisk-v5ebtmoy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6750553/extract-overlay-ramdisk-v5ebtmoy/ramdisk
167 03:58:01.350947 >> 182230 blocks
168 03:58:04.577622 rename /var/lib/lava/dispatcher/tmp/6750553/extract-overlay-ramdisk-v5ebtmoy/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6750553/tftp-deploy-jnz2icgk/ramdisk/ramdisk.cpio.gz
169 03:58:04.578053 end: 1.4.7 compress-ramdisk (duration 00:00:03) [common]
170 03:58:04.578179 start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
171 03:58:04.578284 start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
172 03:58:04.578381 No mkimage arch provided, not using FIT.
173 03:58:04.578472 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 03:58:04.578560 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 03:58:04.578662 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
176 03:58:04.578755 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
177 03:58:04.578833 No LXC device requested
178 03:58:04.578913 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 03:58:04.579005 start: 1.6 deploy-device-env (timeout 00:09:56) [common]
180 03:58:04.579085 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 03:58:04.579152 Checking files for TFTP limit of 4294967296 bytes.
182 03:58:04.579525 end: 1 tftp-deploy (duration 00:00:04) [common]
183 03:58:04.579629 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 03:58:04.579727 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 03:58:04.579854 substitutions:
186 03:58:04.579923 - {DTB}: None
187 03:58:04.579988 - {INITRD}: 6750553/tftp-deploy-jnz2icgk/ramdisk/ramdisk.cpio.gz
188 03:58:04.580048 - {KERNEL}: 6750553/tftp-deploy-jnz2icgk/kernel/bzImage
189 03:58:04.580105 - {LAVA_MAC}: None
190 03:58:04.580163 - {PRESEED_CONFIG}: None
191 03:58:04.580220 - {PRESEED_LOCAL}: None
192 03:58:04.580276 - {RAMDISK}: 6750553/tftp-deploy-jnz2icgk/ramdisk/ramdisk.cpio.gz
193 03:58:04.580332 - {ROOT_PART}: None
194 03:58:04.580387 - {ROOT}: None
195 03:58:04.580441 - {SERVER_IP}: 192.168.201.1
196 03:58:04.580496 - {TEE}: None
197 03:58:04.580552 Parsed boot commands:
198 03:58:04.580606 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 03:58:04.580757 Parsed boot commands: tftpboot 192.168.201.1 6750553/tftp-deploy-jnz2icgk/kernel/bzImage 6750553/tftp-deploy-jnz2icgk/kernel/cmdline 6750553/tftp-deploy-jnz2icgk/ramdisk/ramdisk.cpio.gz
200 03:58:04.580848 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 03:58:04.580947 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 03:58:04.581053 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 03:58:04.581142 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 03:58:04.581215 Not connected, no need to disconnect.
205 03:58:04.581293 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 03:58:04.581377 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 03:58:04.581446 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-3'
208 03:58:04.584234 Setting prompt string to ['lava-test: # ']
209 03:58:04.584516 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 03:58:04.584625 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 03:58:04.584724 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 03:58:04.584817 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 03:58:04.584996 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
214 03:58:04.603673 >> Command sent successfully.
215 03:58:04.605602 Returned 0 in 0 seconds
216 03:58:04.706399 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
218 03:58:04.706728 end: 2.2.2 reset-device (duration 00:00:00) [common]
219 03:58:04.706830 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
220 03:58:04.706918 Setting prompt string to 'Starting depthcharge on Voema...'
221 03:58:04.706982 Changing prompt to 'Starting depthcharge on Voema...'
222 03:58:04.707052 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 03:58:04.707326 [Enter `^Ec?' for help]
224 03:58:12.171620
225 03:58:12.172518
226 03:58:12.181350 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 03:58:12.184702 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
228 03:58:12.191405 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
229 03:58:12.194844 CPU: AES supported, TXT NOT supported, VT supported
230 03:58:12.201699 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
231 03:58:12.208245 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
232 03:58:12.211609 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
233 03:58:12.214780 VBOOT: Loading verstage.
234 03:58:12.218057 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
235 03:58:12.224870 FMAP: base = 0x0 size = 0x2000000 #areas = 32
236 03:58:12.228382 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
237 03:58:12.238438 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
238 03:58:12.245683 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
239 03:58:12.246226
240 03:58:12.246576
241 03:58:12.258366 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
242 03:58:12.271797 Probing TPM: . done!
243 03:58:12.275858 TPM ready after 0 ms
244 03:58:12.279091 Connected to device vid:did:rid of 1ae0:0028:00
245 03:58:12.290006 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
246 03:58:12.296682 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
247 03:58:12.299927 Initialized TPM device CR50 revision 0
248 03:58:12.349294 tlcl_send_startup: Startup return code is 0
249 03:58:12.349912 TPM: setup succeeded
250 03:58:12.365059 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
251 03:58:12.378804 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
252 03:58:12.391493 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
253 03:58:12.401769 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
254 03:58:12.405322 Chrome EC: UHEPI supported
255 03:58:12.408872 Phase 1
256 03:58:12.412065 FMAP: area GBB found @ 1805000 (458752 bytes)
257 03:58:12.421966 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
258 03:58:12.428459 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
259 03:58:12.435143 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
260 03:58:12.442019 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
261 03:58:12.444863 Recovery requested (1009000e)
262 03:58:12.448211 TPM: Extending digest for VBOOT: boot mode into PCR 0
263 03:58:12.459569 tlcl_extend: response is 0
264 03:58:12.466524 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
265 03:58:12.475961 tlcl_extend: response is 0
266 03:58:12.482771 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
267 03:58:12.489291 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
268 03:58:12.495941 BS: verstage times (exec / console): total (unknown) / 142 ms
269 03:58:12.496520
270 03:58:12.496905
271 03:58:12.509216 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
272 03:58:12.516043 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
273 03:58:12.519869 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
274 03:58:12.523165 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
275 03:58:12.529449 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
276 03:58:12.532494 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
277 03:58:12.535783 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
278 03:58:12.538990 TCO_STS: 0000 0000
279 03:58:12.542628 GEN_PMCON: d0015038 00002200
280 03:58:12.546121 GBLRST_CAUSE: 00000000 00000000
281 03:58:12.546699 HPR_CAUSE0: 00000000
282 03:58:12.549426 prev_sleep_state 5
283 03:58:12.552678 Boot Count incremented to 8003
284 03:58:12.559184 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 03:58:12.565934 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
286 03:58:12.572927 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
287 03:58:12.578847 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
288 03:58:12.583853 Chrome EC: UHEPI supported
289 03:58:12.590894 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
290 03:58:12.604200 Probing TPM: done!
291 03:58:12.610772 Connected to device vid:did:rid of 1ae0:0028:00
292 03:58:12.621108 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
293 03:58:12.624695 Initialized TPM device CR50 revision 0
294 03:58:12.638907 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
295 03:58:12.645422 MRC: Hash idx 0x100b comparison successful.
296 03:58:12.648939 MRC cache found, size faa8
297 03:58:12.649524 bootmode is set to: 2
298 03:58:12.652085 SPD index = 0
299 03:58:12.658699 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
300 03:58:12.662317 SPD: module type is LPDDR4X
301 03:58:12.665264 SPD: module part number is MT53E512M64D4NW-046
302 03:58:12.671991 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
303 03:58:12.675455 SPD: device width 16 bits, bus width 16 bits
304 03:58:12.681918 SPD: module size is 1024 MB (per channel)
305 03:58:13.113390 CBMEM:
306 03:58:13.117135 IMD: root @ 0x76fff000 254 entries.
307 03:58:13.120413 IMD: root @ 0x76ffec00 62 entries.
308 03:58:13.123654 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
309 03:58:13.130391 FMAP: area RW_VPD found @ f35000 (8192 bytes)
310 03:58:13.133276 External stage cache:
311 03:58:13.136683 IMD: root @ 0x7b3ff000 254 entries.
312 03:58:13.139822 IMD: root @ 0x7b3fec00 62 entries.
313 03:58:13.155466 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
314 03:58:13.161905 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
315 03:58:13.168157 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
316 03:58:13.182455 MRC: 'RECOVERY_MRC_CACHE' does not need update.
317 03:58:13.189882 cse_lite: Skip switching to RW in the recovery path
318 03:58:13.190461 8 DIMMs found
319 03:58:13.190847 SMM Memory Map
320 03:58:13.193384 SMRAM : 0x7b000000 0x800000
321 03:58:13.197089 Subregion 0: 0x7b000000 0x200000
322 03:58:13.200514 Subregion 1: 0x7b200000 0x200000
323 03:58:13.203629 Subregion 2: 0x7b400000 0x400000
324 03:58:13.207111 top_of_ram = 0x77000000
325 03:58:13.213667 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
326 03:58:13.217198 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
327 03:58:13.224244 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
328 03:58:13.227337 MTRR Range: Start=ff000000 End=0 (Size 1000000)
329 03:58:13.237241 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
330 03:58:13.240652 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
331 03:58:13.252391 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
332 03:58:13.259099 Processing 211 relocs. Offset value of 0x74c0b000
333 03:58:13.265890 BS: romstage times (exec / console): total (unknown) / 277 ms
334 03:58:13.271476
335 03:58:13.272058
336 03:58:13.281838 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
337 03:58:13.285152 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 03:58:13.294867 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 03:58:13.301874 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 03:58:13.308164 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
341 03:58:13.314285 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
342 03:58:13.361750 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
343 03:58:13.368000 Processing 5008 relocs. Offset value of 0x75d98000
344 03:58:13.371544 BS: postcar times (exec / console): total (unknown) / 59 ms
345 03:58:13.374572
346 03:58:13.375186
347 03:58:13.384747 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
348 03:58:13.385335 Normal boot
349 03:58:13.387987 FW_CONFIG value is 0x804c02
350 03:58:13.391353 PCI: 00:07.0 disabled by fw_config
351 03:58:13.394423 PCI: 00:07.1 disabled by fw_config
352 03:58:13.397886 PCI: 00:0d.2 disabled by fw_config
353 03:58:13.404611 PCI: 00:1c.7 disabled by fw_config
354 03:58:13.407627 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
355 03:58:13.414454 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
356 03:58:13.417740 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
357 03:58:13.424562 GENERIC: 0.0 disabled by fw_config
358 03:58:13.427686 GENERIC: 1.0 disabled by fw_config
359 03:58:13.431374 fw_config match found: DB_USB=USB3_ACTIVE
360 03:58:13.434474 fw_config match found: DB_USB=USB3_ACTIVE
361 03:58:13.437818 fw_config match found: DB_USB=USB3_ACTIVE
362 03:58:13.444095 fw_config match found: DB_USB=USB3_ACTIVE
363 03:58:13.447301 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
364 03:58:13.457228 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
365 03:58:13.464731 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
366 03:58:13.470862 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
367 03:58:13.474114 microcode: sig=0x806c1 pf=0x80 revision=0x86
368 03:58:13.480236 microcode: Update skipped, already up-to-date
369 03:58:13.487284 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
370 03:58:13.514889 Detected 4 core, 8 thread CPU.
371 03:58:13.518513 Setting up SMI for CPU
372 03:58:13.521767 IED base = 0x7b400000
373 03:58:13.522352 IED size = 0x00400000
374 03:58:13.525184 Will perform SMM setup.
375 03:58:13.531785 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
376 03:58:13.538669 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
377 03:58:13.545048 Processing 16 relocs. Offset value of 0x00030000
378 03:58:13.547887 Attempting to start 7 APs
379 03:58:13.551886 Waiting for 10ms after sending INIT.
380 03:58:13.567025 Waiting for 1st SIPI to complete...done.
381 03:58:13.567604 AP: slot 1 apic_id 1.
382 03:58:13.573310 Waiting for 2nd SIPI to complete...done.
383 03:58:13.573848 AP: slot 3 apic_id 5.
384 03:58:13.576479 AP: slot 7 apic_id 4.
385 03:58:13.579849 AP: slot 6 apic_id 2.
386 03:58:13.580324 AP: slot 2 apic_id 3.
387 03:58:13.584078 AP: slot 5 apic_id 6.
388 03:58:13.586731 AP: slot 4 apic_id 7.
389 03:58:13.593620 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
390 03:58:13.599995 Processing 13 relocs. Offset value of 0x00038000
391 03:58:13.603144 Unable to locate Global NVS
392 03:58:13.610163 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
393 03:58:13.613051 Installing permanent SMM handler to 0x7b000000
394 03:58:13.623615 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
395 03:58:13.626719 Processing 794 relocs. Offset value of 0x7b010000
396 03:58:13.636174 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
397 03:58:13.639810 Processing 13 relocs. Offset value of 0x7b008000
398 03:58:13.646767 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
399 03:58:13.653674 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
400 03:58:13.659540 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
401 03:58:13.662798 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
402 03:58:13.669254 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
403 03:58:13.676399 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
404 03:58:13.683084 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
405 03:58:13.685943 Unable to locate Global NVS
406 03:58:13.692387 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
407 03:58:13.695818 Clearing SMI status registers
408 03:58:13.699350 SMI_STS: PM1
409 03:58:13.699930 PM1_STS: PWRBTN
410 03:58:13.705663 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
411 03:58:13.708989 In relocation handler: CPU 0
412 03:58:13.715424 New SMBASE=0x7b000000 IEDBASE=0x7b400000
413 03:58:13.719298 Writing SMRR. base = 0x7b000006, mask=0xff800c00
414 03:58:13.722107 Relocation complete.
415 03:58:13.729000 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
416 03:58:13.732341 In relocation handler: CPU 1
417 03:58:13.736517 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
418 03:58:13.738797 Relocation complete.
419 03:58:13.745277 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
420 03:58:13.748920 In relocation handler: CPU 3
421 03:58:13.752326 New SMBASE=0x7afff400 IEDBASE=0x7b400000
422 03:58:13.755020 Relocation complete.
423 03:58:13.762114 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
424 03:58:13.765299 In relocation handler: CPU 7
425 03:58:13.769270 New SMBASE=0x7affe400 IEDBASE=0x7b400000
426 03:58:13.771880 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 03:58:13.775221 Relocation complete.
428 03:58:13.781984 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
429 03:58:13.785670 In relocation handler: CPU 2
430 03:58:13.788539 New SMBASE=0x7afff800 IEDBASE=0x7b400000
431 03:58:13.791944 Relocation complete.
432 03:58:13.798798 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
433 03:58:13.801961 In relocation handler: CPU 6
434 03:58:13.805359 New SMBASE=0x7affe800 IEDBASE=0x7b400000
435 03:58:13.811855 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 03:58:13.812438 Relocation complete.
437 03:58:13.821921 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
438 03:58:13.822504 In relocation handler: CPU 4
439 03:58:13.828141 New SMBASE=0x7afff000 IEDBASE=0x7b400000
440 03:58:13.828727 Relocation complete.
441 03:58:13.838083 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
442 03:58:13.838651 In relocation handler: CPU 5
443 03:58:13.845092 New SMBASE=0x7affec00 IEDBASE=0x7b400000
444 03:58:13.848617 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 03:58:13.851197 Relocation complete.
446 03:58:13.851682 Initializing CPU #0
447 03:58:13.855786 CPU: vendor Intel device 806c1
448 03:58:13.858980 CPU: family 06, model 8c, stepping 01
449 03:58:13.862518 Clearing out pending MCEs
450 03:58:13.865562 Setting up local APIC...
451 03:58:13.869067 apic_id: 0x00 done.
452 03:58:13.869552 Turbo is available but hidden
453 03:58:13.872785 Turbo is available and visible
454 03:58:13.879203 microcode: Update skipped, already up-to-date
455 03:58:13.879788 CPU #0 initialized
456 03:58:13.882298 Initializing CPU #1
457 03:58:13.885656 Initializing CPU #5
458 03:58:13.886234 Initializing CPU #7
459 03:58:13.889132 Initializing CPU #3
460 03:58:13.892724 CPU: vendor Intel device 806c1
461 03:58:13.895590 CPU: family 06, model 8c, stepping 01
462 03:58:13.899263 CPU: vendor Intel device 806c1
463 03:58:13.902076 CPU: family 06, model 8c, stepping 01
464 03:58:13.905483 Clearing out pending MCEs
465 03:58:13.909223 Clearing out pending MCEs
466 03:58:13.912252 Setting up local APIC...
467 03:58:13.912822 CPU: vendor Intel device 806c1
468 03:58:13.915470 Initializing CPU #4
469 03:58:13.918574 CPU: family 06, model 8c, stepping 01
470 03:58:13.922115 Initializing CPU #6
471 03:58:13.922593 Initializing CPU #2
472 03:58:13.925434 CPU: vendor Intel device 806c1
473 03:58:13.931729 CPU: family 06, model 8c, stepping 01
474 03:58:13.935109 CPU: vendor Intel device 806c1
475 03:58:13.938592 CPU: family 06, model 8c, stepping 01
476 03:58:13.939172 Clearing out pending MCEs
477 03:58:13.942242 Clearing out pending MCEs
478 03:58:13.945016 Setting up local APIC...
479 03:58:13.948523 apic_id: 0x04 done.
480 03:58:13.949095 Setting up local APIC...
481 03:58:13.951923 Setting up local APIC...
482 03:58:13.955610 CPU: vendor Intel device 806c1
483 03:58:13.958348 CPU: family 06, model 8c, stepping 01
484 03:58:13.961688 Clearing out pending MCEs
485 03:58:13.965406 Clearing out pending MCEs
486 03:58:13.968889 Setting up local APIC...
487 03:58:13.969462 Setting up local APIC...
488 03:58:13.971641 apic_id: 0x02 done.
489 03:58:13.974861 apic_id: 0x03 done.
490 03:58:13.978673 microcode: Update skipped, already up-to-date
491 03:58:13.985192 microcode: Update skipped, already up-to-date
492 03:58:13.985792 CPU #6 initialized
493 03:58:13.988020 CPU #2 initialized
494 03:58:13.991593 microcode: Update skipped, already up-to-date
495 03:58:13.994710 apic_id: 0x05 done.
496 03:58:13.995450 CPU #7 initialized
497 03:58:14.001534 microcode: Update skipped, already up-to-date
498 03:58:14.004522 CPU: vendor Intel device 806c1
499 03:58:14.007709 CPU: family 06, model 8c, stepping 01
500 03:58:14.008193 CPU #3 initialized
501 03:58:14.011090 apic_id: 0x06 done.
502 03:58:14.014456 apic_id: 0x07 done.
503 03:58:14.017912 microcode: Update skipped, already up-to-date
504 03:58:14.021417 microcode: Update skipped, already up-to-date
505 03:58:14.024669 CPU #5 initialized
506 03:58:14.028010 CPU #4 initialized
507 03:58:14.028589 Clearing out pending MCEs
508 03:58:14.030801 Setting up local APIC...
509 03:58:14.034347 apic_id: 0x01 done.
510 03:58:14.037602 microcode: Update skipped, already up-to-date
511 03:58:14.041017 CPU #1 initialized
512 03:58:14.044144 bsp_do_flight_plan done after 468 msecs.
513 03:58:14.047498 CPU: frequency set to 4000 MHz
514 03:58:14.051144 Enabling SMIs.
515 03:58:14.057525 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
516 03:58:14.072275 SATAXPCIE1 indicates PCIe NVMe is present
517 03:58:14.075470 Probing TPM: done!
518 03:58:14.079072 Connected to device vid:did:rid of 1ae0:0028:00
519 03:58:14.090093 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
520 03:58:14.092886 Initialized TPM device CR50 revision 0
521 03:58:14.096390 Enabling S0i3.4
522 03:58:14.102834 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
523 03:58:14.106204 Found a VBT of 8704 bytes after decompression
524 03:58:14.112579 cse_lite: CSE RO boot. HybridStorageMode disabled
525 03:58:14.119249 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
526 03:58:14.195615 FSPS returned 0
527 03:58:14.199123 Executing Phase 1 of FspMultiPhaseSiInit
528 03:58:14.208746 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
529 03:58:14.212597 port C0 DISC req: usage 1 usb3 1 usb2 5
530 03:58:14.216238 Raw Buffer output 0 00000511
531 03:58:14.219128 Raw Buffer output 1 00000000
532 03:58:14.222634 pmc_send_ipc_cmd succeeded
533 03:58:14.229239 port C1 DISC req: usage 1 usb3 2 usb2 3
534 03:58:14.229836 Raw Buffer output 0 00000321
535 03:58:14.232991 Raw Buffer output 1 00000000
536 03:58:14.236824 pmc_send_ipc_cmd succeeded
537 03:58:14.241893 Detected 4 core, 8 thread CPU.
538 03:58:14.245047 Detected 4 core, 8 thread CPU.
539 03:58:14.478819 Display FSP Version Info HOB
540 03:58:14.481846 Reference Code - CPU = a.0.4c.31
541 03:58:14.485296 uCode Version = 0.0.0.86
542 03:58:14.488832 TXT ACM version = ff.ff.ff.ffff
543 03:58:14.491771 Reference Code - ME = a.0.4c.31
544 03:58:14.495009 MEBx version = 0.0.0.0
545 03:58:14.498539 ME Firmware Version = Consumer SKU
546 03:58:14.501607 Reference Code - PCH = a.0.4c.31
547 03:58:14.505211 PCH-CRID Status = Disabled
548 03:58:14.508503 PCH-CRID Original Value = ff.ff.ff.ffff
549 03:58:14.512046 PCH-CRID New Value = ff.ff.ff.ffff
550 03:58:14.515340 OPROM - RST - RAID = ff.ff.ff.ffff
551 03:58:14.519084 PCH Hsio Version = 4.0.0.0
552 03:58:14.522043 Reference Code - SA - System Agent = a.0.4c.31
553 03:58:14.525435 Reference Code - MRC = 2.0.0.1
554 03:58:14.529028 SA - PCIe Version = a.0.4c.31
555 03:58:14.532251 SA-CRID Status = Disabled
556 03:58:14.535336 SA-CRID Original Value = 0.0.0.1
557 03:58:14.538935 SA-CRID New Value = 0.0.0.1
558 03:58:14.541947 OPROM - VBIOS = ff.ff.ff.ffff
559 03:58:14.545450 IO Manageability Engine FW Version = 11.1.4.0
560 03:58:14.549131 PHY Build Version = 0.0.0.e0
561 03:58:14.552406 Thunderbolt(TM) FW Version = 0.0.0.0
562 03:58:14.558553 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
563 03:58:14.562046 ITSS IRQ Polarities Before:
564 03:58:14.562525 IPC0: 0xffffffff
565 03:58:14.565166 IPC1: 0xffffffff
566 03:58:14.565672 IPC2: 0xffffffff
567 03:58:14.569257 IPC3: 0xffffffff
568 03:58:14.572406 ITSS IRQ Polarities After:
569 03:58:14.572959 IPC0: 0xffffffff
570 03:58:14.575048 IPC1: 0xffffffff
571 03:58:14.575595 IPC2: 0xffffffff
572 03:58:14.578952 IPC3: 0xffffffff
573 03:58:14.582323 Found PCIe Root Port #9 at PCI: 00:1d.0.
574 03:58:14.595678 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
575 03:58:14.605084 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
576 03:58:14.618548 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
577 03:58:14.625686 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
578 03:58:14.626260 Enumerating buses...
579 03:58:14.631802 Show all devs... Before device enumeration.
580 03:58:14.635431 Root Device: enabled 1
581 03:58:14.636006 DOMAIN: 0000: enabled 1
582 03:58:14.638257 CPU_CLUSTER: 0: enabled 1
583 03:58:14.641930 PCI: 00:00.0: enabled 1
584 03:58:14.645014 PCI: 00:02.0: enabled 1
585 03:58:14.645853 PCI: 00:04.0: enabled 1
586 03:58:14.648109 PCI: 00:05.0: enabled 1
587 03:58:14.651484 PCI: 00:06.0: enabled 0
588 03:58:14.651961 PCI: 00:07.0: enabled 0
589 03:58:14.655191 PCI: 00:07.1: enabled 0
590 03:58:14.658382 PCI: 00:07.2: enabled 0
591 03:58:14.662026 PCI: 00:07.3: enabled 0
592 03:58:14.662502 PCI: 00:08.0: enabled 1
593 03:58:14.665643 PCI: 00:09.0: enabled 0
594 03:58:14.668359 PCI: 00:0a.0: enabled 0
595 03:58:14.672023 PCI: 00:0d.0: enabled 1
596 03:58:14.672594 PCI: 00:0d.1: enabled 0
597 03:58:14.675348 PCI: 00:0d.2: enabled 0
598 03:58:14.677857 PCI: 00:0d.3: enabled 0
599 03:58:14.681499 PCI: 00:0e.0: enabled 0
600 03:58:14.682015 PCI: 00:10.2: enabled 1
601 03:58:14.685261 PCI: 00:10.6: enabled 0
602 03:58:14.688296 PCI: 00:10.7: enabled 0
603 03:58:14.688772 PCI: 00:12.0: enabled 0
604 03:58:14.691787 PCI: 00:12.6: enabled 0
605 03:58:14.695291 PCI: 00:13.0: enabled 0
606 03:58:14.698290 PCI: 00:14.0: enabled 1
607 03:58:14.698868 PCI: 00:14.1: enabled 0
608 03:58:14.701508 PCI: 00:14.2: enabled 1
609 03:58:14.705077 PCI: 00:14.3: enabled 1
610 03:58:14.708298 PCI: 00:15.0: enabled 1
611 03:58:14.708874 PCI: 00:15.1: enabled 1
612 03:58:14.712042 PCI: 00:15.2: enabled 1
613 03:58:14.714837 PCI: 00:15.3: enabled 1
614 03:58:14.718222 PCI: 00:16.0: enabled 1
615 03:58:14.718801 PCI: 00:16.1: enabled 0
616 03:58:14.721724 PCI: 00:16.2: enabled 0
617 03:58:14.724859 PCI: 00:16.3: enabled 0
618 03:58:14.728147 PCI: 00:16.4: enabled 0
619 03:58:14.728616 PCI: 00:16.5: enabled 0
620 03:58:14.731406 PCI: 00:17.0: enabled 1
621 03:58:14.734853 PCI: 00:19.0: enabled 0
622 03:58:14.735321 PCI: 00:19.1: enabled 1
623 03:58:14.737901 PCI: 00:19.2: enabled 0
624 03:58:14.741231 PCI: 00:1c.0: enabled 1
625 03:58:14.745218 PCI: 00:1c.1: enabled 0
626 03:58:14.746033 PCI: 00:1c.2: enabled 0
627 03:58:14.747884 PCI: 00:1c.3: enabled 0
628 03:58:14.751382 PCI: 00:1c.4: enabled 0
629 03:58:14.754623 PCI: 00:1c.5: enabled 0
630 03:58:14.755088 PCI: 00:1c.6: enabled 1
631 03:58:14.757986 PCI: 00:1c.7: enabled 0
632 03:58:14.761257 PCI: 00:1d.0: enabled 1
633 03:58:14.764813 PCI: 00:1d.1: enabled 0
634 03:58:14.765374 PCI: 00:1d.2: enabled 1
635 03:58:14.768295 PCI: 00:1d.3: enabled 0
636 03:58:14.771447 PCI: 00:1e.0: enabled 1
637 03:58:14.772009 PCI: 00:1e.1: enabled 0
638 03:58:14.774917 PCI: 00:1e.2: enabled 1
639 03:58:14.777649 PCI: 00:1e.3: enabled 1
640 03:58:14.781314 PCI: 00:1f.0: enabled 1
641 03:58:14.781917 PCI: 00:1f.1: enabled 0
642 03:58:14.784945 PCI: 00:1f.2: enabled 1
643 03:58:14.787989 PCI: 00:1f.3: enabled 1
644 03:58:14.791689 PCI: 00:1f.4: enabled 0
645 03:58:14.792258 PCI: 00:1f.5: enabled 1
646 03:58:14.794902 PCI: 00:1f.6: enabled 0
647 03:58:14.797928 PCI: 00:1f.7: enabled 0
648 03:58:14.798495 APIC: 00: enabled 1
649 03:58:14.801871 GENERIC: 0.0: enabled 1
650 03:58:14.804446 GENERIC: 0.0: enabled 1
651 03:58:14.808012 GENERIC: 1.0: enabled 1
652 03:58:14.808495 GENERIC: 0.0: enabled 1
653 03:58:14.811147 GENERIC: 1.0: enabled 1
654 03:58:14.814547 USB0 port 0: enabled 1
655 03:58:14.818278 GENERIC: 0.0: enabled 1
656 03:58:14.818859 USB0 port 0: enabled 1
657 03:58:14.821161 GENERIC: 0.0: enabled 1
658 03:58:14.824491 I2C: 00:1a: enabled 1
659 03:58:14.825074 I2C: 00:31: enabled 1
660 03:58:14.827788 I2C: 00:32: enabled 1
661 03:58:14.831484 I2C: 00:10: enabled 1
662 03:58:14.832095 I2C: 00:15: enabled 1
663 03:58:14.834131 GENERIC: 0.0: enabled 0
664 03:58:14.838151 GENERIC: 1.0: enabled 0
665 03:58:14.841516 GENERIC: 0.0: enabled 1
666 03:58:14.842127 SPI: 00: enabled 1
667 03:58:14.844726 SPI: 00: enabled 1
668 03:58:14.845304 PNP: 0c09.0: enabled 1
669 03:58:14.847857 GENERIC: 0.0: enabled 1
670 03:58:14.851185 USB3 port 0: enabled 1
671 03:58:14.854100 USB3 port 1: enabled 1
672 03:58:14.854582 USB3 port 2: enabled 0
673 03:58:14.857590 USB3 port 3: enabled 0
674 03:58:14.861374 USB2 port 0: enabled 0
675 03:58:14.861986 USB2 port 1: enabled 1
676 03:58:14.864309 USB2 port 2: enabled 1
677 03:58:14.867824 USB2 port 3: enabled 0
678 03:58:14.871170 USB2 port 4: enabled 1
679 03:58:14.871746 USB2 port 5: enabled 0
680 03:58:14.874457 USB2 port 6: enabled 0
681 03:58:14.877703 USB2 port 7: enabled 0
682 03:58:14.878275 USB2 port 8: enabled 0
683 03:58:14.881173 USB2 port 9: enabled 0
684 03:58:14.884496 USB3 port 0: enabled 0
685 03:58:14.887590 USB3 port 1: enabled 1
686 03:58:14.888191 USB3 port 2: enabled 0
687 03:58:14.891871 USB3 port 3: enabled 0
688 03:58:14.894444 GENERIC: 0.0: enabled 1
689 03:58:14.895023 GENERIC: 1.0: enabled 1
690 03:58:14.897271 APIC: 01: enabled 1
691 03:58:14.900793 APIC: 03: enabled 1
692 03:58:14.901268 APIC: 05: enabled 1
693 03:58:14.904180 APIC: 07: enabled 1
694 03:58:14.904760 APIC: 06: enabled 1
695 03:58:14.907912 APIC: 02: enabled 1
696 03:58:14.910780 APIC: 04: enabled 1
697 03:58:14.911257 Compare with tree...
698 03:58:14.914368 Root Device: enabled 1
699 03:58:14.917683 DOMAIN: 0000: enabled 1
700 03:58:14.920598 PCI: 00:00.0: enabled 1
701 03:58:14.921074 PCI: 00:02.0: enabled 1
702 03:58:14.924057 PCI: 00:04.0: enabled 1
703 03:58:14.927750 GENERIC: 0.0: enabled 1
704 03:58:14.930646 PCI: 00:05.0: enabled 1
705 03:58:14.934270 PCI: 00:06.0: enabled 0
706 03:58:14.934749 PCI: 00:07.0: enabled 0
707 03:58:14.937407 GENERIC: 0.0: enabled 1
708 03:58:14.940920 PCI: 00:07.1: enabled 0
709 03:58:14.944673 GENERIC: 1.0: enabled 1
710 03:58:14.947448 PCI: 00:07.2: enabled 0
711 03:58:14.947953 GENERIC: 0.0: enabled 1
712 03:58:14.950657 PCI: 00:07.3: enabled 0
713 03:58:14.953996 GENERIC: 1.0: enabled 1
714 03:58:14.957199 PCI: 00:08.0: enabled 1
715 03:58:14.960468 PCI: 00:09.0: enabled 0
716 03:58:14.960947 PCI: 00:0a.0: enabled 0
717 03:58:14.964040 PCI: 00:0d.0: enabled 1
718 03:58:14.967423 USB0 port 0: enabled 1
719 03:58:14.971180 USB3 port 0: enabled 1
720 03:58:14.974128 USB3 port 1: enabled 1
721 03:58:14.977507 USB3 port 2: enabled 0
722 03:58:14.978255 USB3 port 3: enabled 0
723 03:58:14.980693 PCI: 00:0d.1: enabled 0
724 03:58:14.984293 PCI: 00:0d.2: enabled 0
725 03:58:14.987465 GENERIC: 0.0: enabled 1
726 03:58:14.991039 PCI: 00:0d.3: enabled 0
727 03:58:14.991620 PCI: 00:0e.0: enabled 0
728 03:58:14.993943 PCI: 00:10.2: enabled 1
729 03:58:14.997549 PCI: 00:10.6: enabled 0
730 03:58:15.000826 PCI: 00:10.7: enabled 0
731 03:58:15.004210 PCI: 00:12.0: enabled 0
732 03:58:15.004794 PCI: 00:12.6: enabled 0
733 03:58:15.007297 PCI: 00:13.0: enabled 0
734 03:58:15.010598 PCI: 00:14.0: enabled 1
735 03:58:15.014009 USB0 port 0: enabled 1
736 03:58:15.017080 USB2 port 0: enabled 0
737 03:58:15.017646 USB2 port 1: enabled 1
738 03:58:15.020326 USB2 port 2: enabled 1
739 03:58:15.024093 USB2 port 3: enabled 0
740 03:58:15.026831 USB2 port 4: enabled 1
741 03:58:15.030448 USB2 port 5: enabled 0
742 03:58:15.030921 USB2 port 6: enabled 0
743 03:58:15.033752 USB2 port 7: enabled 0
744 03:58:15.036829 USB2 port 8: enabled 0
745 03:58:15.040637 USB2 port 9: enabled 0
746 03:58:15.044057 USB3 port 0: enabled 0
747 03:58:15.046986 USB3 port 1: enabled 1
748 03:58:15.047615 USB3 port 2: enabled 0
749 03:58:15.050036 USB3 port 3: enabled 0
750 03:58:15.053853 PCI: 00:14.1: enabled 0
751 03:58:15.057003 PCI: 00:14.2: enabled 1
752 03:58:15.060037 PCI: 00:14.3: enabled 1
753 03:58:15.060511 GENERIC: 0.0: enabled 1
754 03:58:15.063646 PCI: 00:15.0: enabled 1
755 03:58:15.067064 I2C: 00:1a: enabled 1
756 03:58:15.070080 I2C: 00:31: enabled 1
757 03:58:15.073755 I2C: 00:32: enabled 1
758 03:58:15.074184 PCI: 00:15.1: enabled 1
759 03:58:15.076622 I2C: 00:10: enabled 1
760 03:58:15.080308 PCI: 00:15.2: enabled 1
761 03:58:15.083681 PCI: 00:15.3: enabled 1
762 03:58:15.084144 PCI: 00:16.0: enabled 1
763 03:58:15.086823 PCI: 00:16.1: enabled 0
764 03:58:15.090056 PCI: 00:16.2: enabled 0
765 03:58:15.093334 PCI: 00:16.3: enabled 0
766 03:58:15.097119 PCI: 00:16.4: enabled 0
767 03:58:15.097674 PCI: 00:16.5: enabled 0
768 03:58:15.100451 PCI: 00:17.0: enabled 1
769 03:58:15.104652 PCI: 00:19.0: enabled 0
770 03:58:15.108329 PCI: 00:19.1: enabled 1
771 03:58:15.108884 I2C: 00:15: enabled 1
772 03:58:15.111270 PCI: 00:19.2: enabled 0
773 03:58:15.114939 PCI: 00:1d.0: enabled 1
774 03:58:15.117944 GENERIC: 0.0: enabled 1
775 03:58:15.118379 PCI: 00:1e.0: enabled 1
776 03:58:15.121547 PCI: 00:1e.1: enabled 0
777 03:58:15.124705 PCI: 00:1e.2: enabled 1
778 03:58:15.127791 SPI: 00: enabled 1
779 03:58:15.128227 PCI: 00:1e.3: enabled 1
780 03:58:15.131143 SPI: 00: enabled 1
781 03:58:15.134788 PCI: 00:1f.0: enabled 1
782 03:58:15.186138 PNP: 0c09.0: enabled 1
783 03:58:15.186722 PCI: 00:1f.1: enabled 0
784 03:58:15.187111 PCI: 00:1f.2: enabled 1
785 03:58:15.187875 GENERIC: 0.0: enabled 1
786 03:58:15.188273 GENERIC: 0.0: enabled 1
787 03:58:15.188620 GENERIC: 1.0: enabled 1
788 03:58:15.188957 PCI: 00:1f.3: enabled 1
789 03:58:15.189282 PCI: 00:1f.4: enabled 0
790 03:58:15.189629 PCI: 00:1f.5: enabled 1
791 03:58:15.189951 PCI: 00:1f.6: enabled 0
792 03:58:15.190266 PCI: 00:1f.7: enabled 0
793 03:58:15.190580 CPU_CLUSTER: 0: enabled 1
794 03:58:15.191256 APIC: 00: enabled 1
795 03:58:15.191635 APIC: 01: enabled 1
796 03:58:15.191959 APIC: 03: enabled 1
797 03:58:15.192273 APIC: 05: enabled 1
798 03:58:15.192587 APIC: 07: enabled 1
799 03:58:15.192892 APIC: 06: enabled 1
800 03:58:15.193200 APIC: 02: enabled 1
801 03:58:15.193508 APIC: 04: enabled 1
802 03:58:15.237103 Root Device scanning...
803 03:58:15.237766 scan_static_bus for Root Device
804 03:58:15.238164 DOMAIN: 0000 enabled
805 03:58:15.238521 CPU_CLUSTER: 0 enabled
806 03:58:15.238863 DOMAIN: 0000 scanning...
807 03:58:15.239705 PCI: pci_scan_bus for bus 00
808 03:58:15.240117 PCI: 00:00.0 [8086/0000] ops
809 03:58:15.240468 PCI: 00:00.0 [8086/9a12] enabled
810 03:58:15.240804 PCI: 00:02.0 [8086/0000] bus ops
811 03:58:15.241131 PCI: 00:02.0 [8086/9a40] enabled
812 03:58:15.241456 PCI: 00:04.0 [8086/0000] bus ops
813 03:58:15.241813 PCI: 00:04.0 [8086/9a03] enabled
814 03:58:15.242132 PCI: 00:05.0 [8086/9a19] enabled
815 03:58:15.242448 PCI: 00:07.0 [0000/0000] hidden
816 03:58:15.242761 PCI: 00:08.0 [8086/9a11] enabled
817 03:58:15.243072 PCI: 00:0a.0 [8086/9a0d] disabled
818 03:58:15.287430 PCI: 00:0d.0 [8086/0000] bus ops
819 03:58:15.288021 PCI: 00:0d.0 [8086/9a13] enabled
820 03:58:15.288407 PCI: 00:14.0 [8086/0000] bus ops
821 03:58:15.288764 PCI: 00:14.0 [8086/a0ed] enabled
822 03:58:15.289490 PCI: 00:14.2 [8086/a0ef] enabled
823 03:58:15.289909 PCI: 00:14.3 [8086/0000] bus ops
824 03:58:15.290251 PCI: 00:14.3 [8086/a0f0] enabled
825 03:58:15.290579 PCI: 00:15.0 [8086/0000] bus ops
826 03:58:15.290898 PCI: 00:15.0 [8086/a0e8] enabled
827 03:58:15.291217 PCI: 00:15.1 [8086/0000] bus ops
828 03:58:15.291534 PCI: 00:15.1 [8086/a0e9] enabled
829 03:58:15.291846 PCI: 00:15.2 [8086/0000] bus ops
830 03:58:15.292157 PCI: 00:15.2 [8086/a0ea] enabled
831 03:58:15.292467 PCI: 00:15.3 [8086/0000] bus ops
832 03:58:15.292776 PCI: 00:15.3 [8086/a0eb] enabled
833 03:58:15.293084 PCI: 00:16.0 [8086/0000] ops
834 03:58:15.297472 PCI: 00:16.0 [8086/a0e0] enabled
835 03:58:15.300665 PCI: Static device PCI: 00:17.0 not found, disabling it.
836 03:58:15.301237 PCI: 00:19.0 [8086/0000] bus ops
837 03:58:15.304166 PCI: 00:19.0 [8086/a0c5] disabled
838 03:58:15.307413 PCI: 00:19.1 [8086/0000] bus ops
839 03:58:15.310960 PCI: 00:19.1 [8086/a0c6] enabled
840 03:58:15.313722 PCI: 00:1d.0 [8086/0000] bus ops
841 03:58:15.317212 PCI: 00:1d.0 [8086/a0b0] enabled
842 03:58:15.320740 PCI: 00:1e.0 [8086/0000] ops
843 03:58:15.324060 PCI: 00:1e.0 [8086/a0a8] enabled
844 03:58:15.327139 PCI: 00:1e.2 [8086/0000] bus ops
845 03:58:15.330259 PCI: 00:1e.2 [8086/a0aa] enabled
846 03:58:15.333923 PCI: 00:1e.3 [8086/0000] bus ops
847 03:58:15.337266 PCI: 00:1e.3 [8086/a0ab] enabled
848 03:58:15.340440 PCI: 00:1f.0 [8086/0000] bus ops
849 03:58:15.343477 PCI: 00:1f.0 [8086/a087] enabled
850 03:58:15.343961 RTC Init
851 03:58:15.346993 Set power on after power failure.
852 03:58:15.350616 Disabling Deep S3
853 03:58:15.353909 Disabling Deep S3
854 03:58:15.354390 Disabling Deep S4
855 03:58:15.356936 Disabling Deep S4
856 03:58:15.357419 Disabling Deep S5
857 03:58:15.360661 Disabling Deep S5
858 03:58:15.363688 PCI: 00:1f.2 [0000/0000] hidden
859 03:58:15.367065 PCI: 00:1f.3 [8086/0000] bus ops
860 03:58:15.370236 PCI: 00:1f.3 [8086/a0c8] enabled
861 03:58:15.374060 PCI: 00:1f.5 [8086/0000] bus ops
862 03:58:15.377306 PCI: 00:1f.5 [8086/a0a4] enabled
863 03:58:15.380215 PCI: Leftover static devices:
864 03:58:15.380695 PCI: 00:10.2
865 03:58:15.381128 PCI: 00:10.6
866 03:58:15.383870 PCI: 00:10.7
867 03:58:15.384257 PCI: 00:06.0
868 03:58:15.387115 PCI: 00:07.1
869 03:58:15.387692 PCI: 00:07.2
870 03:58:15.390502 PCI: 00:07.3
871 03:58:15.391078 PCI: 00:09.0
872 03:58:15.391463 PCI: 00:0d.1
873 03:58:15.394075 PCI: 00:0d.2
874 03:58:15.394558 PCI: 00:0d.3
875 03:58:15.397210 PCI: 00:0e.0
876 03:58:15.397834 PCI: 00:12.0
877 03:58:15.398221 PCI: 00:12.6
878 03:58:15.400627 PCI: 00:13.0
879 03:58:15.401206 PCI: 00:14.1
880 03:58:15.404082 PCI: 00:16.1
881 03:58:15.404651 PCI: 00:16.2
882 03:58:15.407202 PCI: 00:16.3
883 03:58:15.407792 PCI: 00:16.4
884 03:58:15.408175 PCI: 00:16.5
885 03:58:15.410287 PCI: 00:17.0
886 03:58:15.410883 PCI: 00:19.2
887 03:58:15.413377 PCI: 00:1e.1
888 03:58:15.413880 PCI: 00:1f.1
889 03:58:15.414250 PCI: 00:1f.4
890 03:58:15.417089 PCI: 00:1f.6
891 03:58:15.417708 PCI: 00:1f.7
892 03:58:15.420248 PCI: Check your devicetree.cb.
893 03:58:15.423247 PCI: 00:02.0 scanning...
894 03:58:15.427203 scan_generic_bus for PCI: 00:02.0
895 03:58:15.430277 scan_generic_bus for PCI: 00:02.0 done
896 03:58:15.436740 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
897 03:58:15.437241 PCI: 00:04.0 scanning...
898 03:58:15.443351 scan_generic_bus for PCI: 00:04.0
899 03:58:15.443931 GENERIC: 0.0 enabled
900 03:58:15.449875 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
901 03:58:15.453417 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
902 03:58:15.456407 PCI: 00:0d.0 scanning...
903 03:58:15.460031 scan_static_bus for PCI: 00:0d.0
904 03:58:15.463281 USB0 port 0 enabled
905 03:58:15.466590 USB0 port 0 scanning...
906 03:58:15.470283 scan_static_bus for USB0 port 0
907 03:58:15.470854 USB3 port 0 enabled
908 03:58:15.473387 USB3 port 1 enabled
909 03:58:15.477011 USB3 port 2 disabled
910 03:58:15.477634 USB3 port 3 disabled
911 03:58:15.480207 USB3 port 0 scanning...
912 03:58:15.483468 scan_static_bus for USB3 port 0
913 03:58:15.486991 scan_static_bus for USB3 port 0 done
914 03:58:15.489985 scan_bus: bus USB3 port 0 finished in 6 msecs
915 03:58:15.493153 USB3 port 1 scanning...
916 03:58:15.496698 scan_static_bus for USB3 port 1
917 03:58:15.499984 scan_static_bus for USB3 port 1 done
918 03:58:15.506525 scan_bus: bus USB3 port 1 finished in 6 msecs
919 03:58:15.509966 scan_static_bus for USB0 port 0 done
920 03:58:15.512987 scan_bus: bus USB0 port 0 finished in 43 msecs
921 03:58:15.516975 scan_static_bus for PCI: 00:0d.0 done
922 03:58:15.523072 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
923 03:58:15.526143 PCI: 00:14.0 scanning...
924 03:58:15.529700 scan_static_bus for PCI: 00:14.0
925 03:58:15.530296 USB0 port 0 enabled
926 03:58:15.533279 USB0 port 0 scanning...
927 03:58:15.535991 scan_static_bus for USB0 port 0
928 03:58:15.539363 USB2 port 0 disabled
929 03:58:15.539845 USB2 port 1 enabled
930 03:58:15.543076 USB2 port 2 enabled
931 03:58:15.545907 USB2 port 3 disabled
932 03:58:15.546393 USB2 port 4 enabled
933 03:58:15.549559 USB2 port 5 disabled
934 03:58:15.553191 USB2 port 6 disabled
935 03:58:15.553710 USB2 port 7 disabled
936 03:58:15.556130 USB2 port 8 disabled
937 03:58:15.559522 USB2 port 9 disabled
938 03:58:15.560095 USB3 port 0 disabled
939 03:58:15.562468 USB3 port 1 enabled
940 03:58:15.562950 USB3 port 2 disabled
941 03:58:15.566304 USB3 port 3 disabled
942 03:58:15.569087 USB2 port 1 scanning...
943 03:58:15.572368 scan_static_bus for USB2 port 1
944 03:58:15.575671 scan_static_bus for USB2 port 1 done
945 03:58:15.579365 scan_bus: bus USB2 port 1 finished in 6 msecs
946 03:58:15.582293 USB2 port 2 scanning...
947 03:58:15.585697 scan_static_bus for USB2 port 2
948 03:58:15.589423 scan_static_bus for USB2 port 2 done
949 03:58:15.595943 scan_bus: bus USB2 port 2 finished in 6 msecs
950 03:58:15.596558 USB2 port 4 scanning...
951 03:58:15.599624 scan_static_bus for USB2 port 4
952 03:58:15.606479 scan_static_bus for USB2 port 4 done
953 03:58:15.610020 scan_bus: bus USB2 port 4 finished in 6 msecs
954 03:58:15.612801 USB3 port 1 scanning...
955 03:58:15.616082 scan_static_bus for USB3 port 1
956 03:58:15.619069 scan_static_bus for USB3 port 1 done
957 03:58:15.622658 scan_bus: bus USB3 port 1 finished in 6 msecs
958 03:58:15.625739 scan_static_bus for USB0 port 0 done
959 03:58:15.632142 scan_bus: bus USB0 port 0 finished in 93 msecs
960 03:58:15.635368 scan_static_bus for PCI: 00:14.0 done
961 03:58:15.639307 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
962 03:58:15.642496 PCI: 00:14.3 scanning...
963 03:58:15.645566 scan_static_bus for PCI: 00:14.3
964 03:58:15.648915 GENERIC: 0.0 enabled
965 03:58:15.651956 scan_static_bus for PCI: 00:14.3 done
966 03:58:15.655235 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
967 03:58:15.658945 PCI: 00:15.0 scanning...
968 03:58:15.662199 scan_static_bus for PCI: 00:15.0
969 03:58:15.665479 I2C: 00:1a enabled
970 03:58:15.666124 I2C: 00:31 enabled
971 03:58:15.669030 I2C: 00:32 enabled
972 03:58:15.672405 scan_static_bus for PCI: 00:15.0 done
973 03:58:15.679073 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
974 03:58:15.679650 PCI: 00:15.1 scanning...
975 03:58:15.682384 scan_static_bus for PCI: 00:15.1
976 03:58:15.686183 I2C: 00:10 enabled
977 03:58:15.689251 scan_static_bus for PCI: 00:15.1 done
978 03:58:15.693012 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
979 03:58:15.696179 PCI: 00:15.2 scanning...
980 03:58:15.699448 scan_static_bus for PCI: 00:15.2
981 03:58:15.702516 scan_static_bus for PCI: 00:15.2 done
982 03:58:15.708995 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
983 03:58:15.712364 PCI: 00:15.3 scanning...
984 03:58:15.715711 scan_static_bus for PCI: 00:15.3
985 03:58:15.719263 scan_static_bus for PCI: 00:15.3 done
986 03:58:15.722303 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
987 03:58:15.725555 PCI: 00:19.1 scanning...
988 03:58:15.729044 scan_static_bus for PCI: 00:19.1
989 03:58:15.732546 I2C: 00:15 enabled
990 03:58:15.735622 scan_static_bus for PCI: 00:19.1 done
991 03:58:15.738948 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
992 03:58:15.742042 PCI: 00:1d.0 scanning...
993 03:58:15.745793 do_pci_scan_bridge for PCI: 00:1d.0
994 03:58:15.748873 PCI: pci_scan_bus for bus 01
995 03:58:15.752114 PCI: 01:00.0 [1c5c/174a] enabled
996 03:58:15.755737 GENERIC: 0.0 enabled
997 03:58:15.758839 Enabling Common Clock Configuration
998 03:58:15.762019 L1 Sub-State supported from root port 29
999 03:58:15.765538 L1 Sub-State Support = 0xf
1000 03:58:15.768697 CommonModeRestoreTime = 0x28
1001 03:58:15.772475 Power On Value = 0x16, Power On Scale = 0x0
1002 03:58:15.775468 ASPM: Enabled L1
1003 03:58:15.778674 PCIe: Max_Payload_Size adjusted to 128
1004 03:58:15.782095 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1005 03:58:15.785557 PCI: 00:1e.2 scanning...
1006 03:58:15.788787 scan_generic_bus for PCI: 00:1e.2
1007 03:58:15.792219 SPI: 00 enabled
1008 03:58:15.798778 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1009 03:58:15.801940 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1010 03:58:15.805394 PCI: 00:1e.3 scanning...
1011 03:58:15.809485 scan_generic_bus for PCI: 00:1e.3
1012 03:58:15.810112 SPI: 00 enabled
1013 03:58:15.815025 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1014 03:58:15.822043 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1015 03:58:15.822634 PCI: 00:1f.0 scanning...
1016 03:58:15.825470 scan_static_bus for PCI: 00:1f.0
1017 03:58:15.828720 PNP: 0c09.0 enabled
1018 03:58:15.832510 PNP: 0c09.0 scanning...
1019 03:58:15.835356 scan_static_bus for PNP: 0c09.0
1020 03:58:15.838715 scan_static_bus for PNP: 0c09.0 done
1021 03:58:15.842122 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1022 03:58:15.848717 scan_static_bus for PCI: 00:1f.0 done
1023 03:58:15.851749 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1024 03:58:15.854961 PCI: 00:1f.2 scanning...
1025 03:58:15.858302 scan_static_bus for PCI: 00:1f.2
1026 03:58:15.858784 GENERIC: 0.0 enabled
1027 03:58:15.861628 GENERIC: 0.0 scanning...
1028 03:58:15.865399 scan_static_bus for GENERIC: 0.0
1029 03:58:15.868191 GENERIC: 0.0 enabled
1030 03:58:15.871846 GENERIC: 1.0 enabled
1031 03:58:15.875565 scan_static_bus for GENERIC: 0.0 done
1032 03:58:15.878530 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1033 03:58:15.881848 scan_static_bus for PCI: 00:1f.2 done
1034 03:58:15.888517 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1035 03:58:15.891840 PCI: 00:1f.3 scanning...
1036 03:58:15.895569 scan_static_bus for PCI: 00:1f.3
1037 03:58:15.898315 scan_static_bus for PCI: 00:1f.3 done
1038 03:58:15.902098 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1039 03:58:15.904686 PCI: 00:1f.5 scanning...
1040 03:58:15.908275 scan_generic_bus for PCI: 00:1f.5
1041 03:58:15.911700 scan_generic_bus for PCI: 00:1f.5 done
1042 03:58:15.918487 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1043 03:58:15.921314 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1044 03:58:15.924800 scan_static_bus for Root Device done
1045 03:58:15.931408 scan_bus: bus Root Device finished in 737 msecs
1046 03:58:15.931981 done
1047 03:58:15.938179 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1048 03:58:15.941363 Chrome EC: UHEPI supported
1049 03:58:15.947900 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1050 03:58:15.951334 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1051 03:58:15.958442 SPI flash protection: WPSW=0 SRP0=0
1052 03:58:15.961022 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1053 03:58:15.967791 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1054 03:58:15.971045 found VGA at PCI: 00:02.0
1055 03:58:15.974800 Setting up VGA for PCI: 00:02.0
1056 03:58:15.977786 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1057 03:58:15.984292 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1058 03:58:15.984776 Allocating resources...
1059 03:58:15.987778 Reading resources...
1060 03:58:15.991250 Root Device read_resources bus 0 link: 0
1061 03:58:15.997628 DOMAIN: 0000 read_resources bus 0 link: 0
1062 03:58:16.001032 PCI: 00:04.0 read_resources bus 1 link: 0
1063 03:58:16.007585 PCI: 00:04.0 read_resources bus 1 link: 0 done
1064 03:58:16.011243 PCI: 00:0d.0 read_resources bus 0 link: 0
1065 03:58:16.013990 USB0 port 0 read_resources bus 0 link: 0
1066 03:58:16.021428 USB0 port 0 read_resources bus 0 link: 0 done
1067 03:58:16.024855 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1068 03:58:16.031459 PCI: 00:14.0 read_resources bus 0 link: 0
1069 03:58:16.034999 USB0 port 0 read_resources bus 0 link: 0
1070 03:58:16.041368 USB0 port 0 read_resources bus 0 link: 0 done
1071 03:58:16.044693 PCI: 00:14.0 read_resources bus 0 link: 0 done
1072 03:58:16.051060 PCI: 00:14.3 read_resources bus 0 link: 0
1073 03:58:16.054260 PCI: 00:14.3 read_resources bus 0 link: 0 done
1074 03:58:16.060755 PCI: 00:15.0 read_resources bus 0 link: 0
1075 03:58:16.063859 PCI: 00:15.0 read_resources bus 0 link: 0 done
1076 03:58:16.070735 PCI: 00:15.1 read_resources bus 0 link: 0
1077 03:58:16.074298 PCI: 00:15.1 read_resources bus 0 link: 0 done
1078 03:58:16.081273 PCI: 00:19.1 read_resources bus 0 link: 0
1079 03:58:16.085066 PCI: 00:19.1 read_resources bus 0 link: 0 done
1080 03:58:16.091753 PCI: 00:1d.0 read_resources bus 1 link: 0
1081 03:58:16.095118 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1082 03:58:16.101862 PCI: 00:1e.2 read_resources bus 2 link: 0
1083 03:58:16.104925 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1084 03:58:16.111751 PCI: 00:1e.3 read_resources bus 3 link: 0
1085 03:58:16.115193 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1086 03:58:16.121633 PCI: 00:1f.0 read_resources bus 0 link: 0
1087 03:58:16.124934 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1088 03:58:16.128004 PCI: 00:1f.2 read_resources bus 0 link: 0
1089 03:58:16.135353 GENERIC: 0.0 read_resources bus 0 link: 0
1090 03:58:16.138688 GENERIC: 0.0 read_resources bus 0 link: 0 done
1091 03:58:16.144867 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1092 03:58:16.151145 DOMAIN: 0000 read_resources bus 0 link: 0 done
1093 03:58:16.155012 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1094 03:58:16.161397 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1095 03:58:16.164383 Root Device read_resources bus 0 link: 0 done
1096 03:58:16.168145 Done reading resources.
1097 03:58:16.170962 Show resources in subtree (Root Device)...After reading.
1098 03:58:16.177858 Root Device child on link 0 DOMAIN: 0000
1099 03:58:16.181218 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1100 03:58:16.191246 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1101 03:58:16.201070 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1102 03:58:16.201649 PCI: 00:00.0
1103 03:58:16.211056 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1104 03:58:16.221249 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1105 03:58:16.230991 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1106 03:58:16.240563 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1107 03:58:16.251282 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1108 03:58:16.257299 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1109 03:58:16.267424 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1110 03:58:16.277674 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1111 03:58:16.287134 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1112 03:58:16.296983 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1113 03:58:16.307226 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1114 03:58:16.313439 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1115 03:58:16.323457 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1116 03:58:16.333815 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1117 03:58:16.343956 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1118 03:58:16.353364 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1119 03:58:16.363491 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1120 03:58:16.370217 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1121 03:58:16.380381 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1122 03:58:16.390240 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1123 03:58:16.393207 PCI: 00:02.0
1124 03:58:16.403146 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 03:58:16.413424 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 03:58:16.419901 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 03:58:16.426526 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1128 03:58:16.436612 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1129 03:58:16.437187 GENERIC: 0.0
1130 03:58:16.439546 PCI: 00:05.0
1131 03:58:16.449729 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 03:58:16.453015 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1133 03:58:16.456070 GENERIC: 0.0
1134 03:58:16.456554 PCI: 00:08.0
1135 03:58:16.465977 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1136 03:58:16.470079 PCI: 00:0a.0
1137 03:58:16.472783 PCI: 00:0d.0 child on link 0 USB0 port 0
1138 03:58:16.482593 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1139 03:58:16.486100 USB0 port 0 child on link 0 USB3 port 0
1140 03:58:16.489500 USB3 port 0
1141 03:58:16.492676 USB3 port 1
1142 03:58:16.493177 USB3 port 2
1143 03:58:16.496723 USB3 port 3
1144 03:58:16.499453 PCI: 00:14.0 child on link 0 USB0 port 0
1145 03:58:16.510109 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1146 03:58:16.513064 USB0 port 0 child on link 0 USB2 port 0
1147 03:58:16.516333 USB2 port 0
1148 03:58:16.516774 USB2 port 1
1149 03:58:16.520036 USB2 port 2
1150 03:58:16.520468 USB2 port 3
1151 03:58:16.522703 USB2 port 4
1152 03:58:16.523034 USB2 port 5
1153 03:58:16.526007 USB2 port 6
1154 03:58:16.529776 USB2 port 7
1155 03:58:16.530233 USB2 port 8
1156 03:58:16.532897 USB2 port 9
1157 03:58:16.533434 USB3 port 0
1158 03:58:16.536142 USB3 port 1
1159 03:58:16.536697 USB3 port 2
1160 03:58:16.539700 USB3 port 3
1161 03:58:16.540280 PCI: 00:14.2
1162 03:58:16.549590 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1163 03:58:16.559123 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1164 03:58:16.566092 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1165 03:58:16.576176 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1166 03:58:16.576768 GENERIC: 0.0
1167 03:58:16.580088 PCI: 00:15.0 child on link 0 I2C: 00:1a
1168 03:58:16.589091 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 03:58:16.592588 I2C: 00:1a
1170 03:58:16.593082 I2C: 00:31
1171 03:58:16.595898 I2C: 00:32
1172 03:58:16.599028 PCI: 00:15.1 child on link 0 I2C: 00:10
1173 03:58:16.609241 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1174 03:58:16.612667 I2C: 00:10
1175 03:58:16.613244 PCI: 00:15.2
1176 03:58:16.622802 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 03:58:16.625957 PCI: 00:15.3
1178 03:58:16.635704 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 03:58:16.636292 PCI: 00:16.0
1180 03:58:16.645731 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 03:58:16.649256 PCI: 00:19.0
1182 03:58:16.652291 PCI: 00:19.1 child on link 0 I2C: 00:15
1183 03:58:16.662377 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 03:58:16.662904 I2C: 00:15
1185 03:58:16.668742 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1186 03:58:16.675263 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1187 03:58:16.685699 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1188 03:58:16.695551 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1189 03:58:16.698826 GENERIC: 0.0
1190 03:58:16.699310 PCI: 01:00.0
1191 03:58:16.708754 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 03:58:16.718861 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1193 03:58:16.728950 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1194 03:58:16.729536 PCI: 00:1e.0
1195 03:58:16.742210 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1196 03:58:16.745449 PCI: 00:1e.2 child on link 0 SPI: 00
1197 03:58:16.755157 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 03:58:16.755786 SPI: 00
1199 03:58:16.758375 PCI: 00:1e.3 child on link 0 SPI: 00
1200 03:58:16.768287 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 03:58:16.771665 SPI: 00
1202 03:58:16.775129 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1203 03:58:16.784933 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1204 03:58:16.785694 PNP: 0c09.0
1205 03:58:16.794952 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1206 03:58:16.798481 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1207 03:58:16.808202 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1208 03:58:16.818456 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1209 03:58:16.822167 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1210 03:58:16.824972 GENERIC: 0.0
1211 03:58:16.825548 GENERIC: 1.0
1212 03:58:16.829153 PCI: 00:1f.3
1213 03:58:16.838198 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 03:58:16.848349 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1215 03:58:16.848929 PCI: 00:1f.5
1216 03:58:16.858138 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1217 03:58:16.861081 CPU_CLUSTER: 0 child on link 0 APIC: 00
1218 03:58:16.864516 APIC: 00
1219 03:58:16.865121 APIC: 01
1220 03:58:16.868309 APIC: 03
1221 03:58:16.868887 APIC: 05
1222 03:58:16.869269 APIC: 07
1223 03:58:16.871427 APIC: 06
1224 03:58:16.872058 APIC: 02
1225 03:58:16.872446 APIC: 04
1226 03:58:16.881922 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1227 03:58:16.884627 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1228 03:58:16.892376 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1229 03:58:16.898210 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1230 03:58:16.901526 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 03:58:16.907862 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1232 03:58:16.911108 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1233 03:58:16.917808 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1234 03:58:16.924848 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 03:58:16.934464 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 03:58:16.941743 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1237 03:58:16.947982 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1238 03:58:16.954621 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1239 03:58:16.961142 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1240 03:58:16.970906 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1241 03:58:16.974134 DOMAIN: 0000: Resource ranges:
1242 03:58:16.977536 * Base: 1000, Size: 800, Tag: 100
1243 03:58:16.980954 * Base: 1900, Size: e700, Tag: 100
1244 03:58:16.984527 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1245 03:58:16.990656 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1246 03:58:16.997265 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1247 03:58:17.008196 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1248 03:58:17.014116 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1249 03:58:17.020537 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1250 03:58:17.031000 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1251 03:58:17.037566 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1252 03:58:17.044019 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1253 03:58:17.054410 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1254 03:58:17.060308 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1255 03:58:17.067032 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1256 03:58:17.076844 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1257 03:58:17.084040 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1258 03:58:17.089991 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1259 03:58:17.100241 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1260 03:58:17.106871 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1261 03:58:17.113352 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1262 03:58:17.123206 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1263 03:58:17.130087 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1264 03:58:17.137333 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1265 03:58:17.146898 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1266 03:58:17.153424 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1267 03:58:17.159835 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1268 03:58:17.169671 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1269 03:58:17.170162 DOMAIN: 0000: Resource ranges:
1270 03:58:17.177009 * Base: 7fc00000, Size: 40400000, Tag: 200
1271 03:58:17.179881 * Base: d0000000, Size: 28000000, Tag: 200
1272 03:58:17.183249 * Base: fa000000, Size: 1000000, Tag: 200
1273 03:58:17.189809 * Base: fb001000, Size: 2fff000, Tag: 200
1274 03:58:17.192984 * Base: fe010000, Size: 2e000, Tag: 200
1275 03:58:17.196136 * Base: fe03f000, Size: d41000, Tag: 200
1276 03:58:17.199951 * Base: fed88000, Size: 8000, Tag: 200
1277 03:58:17.206818 * Base: fed93000, Size: d000, Tag: 200
1278 03:58:17.209601 * Base: feda2000, Size: 1e000, Tag: 200
1279 03:58:17.213408 * Base: fede0000, Size: 1220000, Tag: 200
1280 03:58:17.219321 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1281 03:58:17.226247 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1282 03:58:17.233044 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1283 03:58:17.239692 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1284 03:58:17.246130 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1285 03:58:17.252886 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1286 03:58:17.259844 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1287 03:58:17.265982 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1288 03:58:17.272803 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1289 03:58:17.279418 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1290 03:58:17.285665 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1291 03:58:17.292379 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1292 03:58:17.299411 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1293 03:58:17.305687 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1294 03:58:17.312385 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1295 03:58:17.318897 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1296 03:58:17.325934 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1297 03:58:17.332551 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1298 03:58:17.339205 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1299 03:58:17.345620 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1300 03:58:17.352702 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1301 03:58:17.359106 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1302 03:58:17.365991 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1303 03:58:17.372579 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1304 03:58:17.378564 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1305 03:58:17.382208 PCI: 00:1d.0: Resource ranges:
1306 03:58:17.388815 * Base: 7fc00000, Size: 100000, Tag: 200
1307 03:58:17.395383 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1308 03:58:17.401937 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1309 03:58:17.408676 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1310 03:58:17.415255 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1311 03:58:17.421813 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1312 03:58:17.428952 Root Device assign_resources, bus 0 link: 0
1313 03:58:17.432374 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 03:58:17.442560 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1315 03:58:17.448462 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1316 03:58:17.458340 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1317 03:58:17.465259 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1318 03:58:17.468235 PCI: 00:04.0 assign_resources, bus 1 link: 0
1319 03:58:17.474718 PCI: 00:04.0 assign_resources, bus 1 link: 0
1320 03:58:17.481218 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1321 03:58:17.491172 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1322 03:58:17.498067 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1323 03:58:17.504688 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1324 03:58:17.508010 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1325 03:58:17.518114 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1326 03:58:17.521363 PCI: 00:14.0 assign_resources, bus 0 link: 0
1327 03:58:17.524626 PCI: 00:14.0 assign_resources, bus 0 link: 0
1328 03:58:17.534858 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1329 03:58:17.541402 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1330 03:58:17.551071 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1331 03:58:17.554041 PCI: 00:14.3 assign_resources, bus 0 link: 0
1332 03:58:17.560690 PCI: 00:14.3 assign_resources, bus 0 link: 0
1333 03:58:17.567635 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1334 03:58:17.570690 PCI: 00:15.0 assign_resources, bus 0 link: 0
1335 03:58:17.577235 PCI: 00:15.0 assign_resources, bus 0 link: 0
1336 03:58:17.584064 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1337 03:58:17.590887 PCI: 00:15.1 assign_resources, bus 0 link: 0
1338 03:58:17.593948 PCI: 00:15.1 assign_resources, bus 0 link: 0
1339 03:58:17.603778 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1340 03:58:17.610498 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1341 03:58:17.621098 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1342 03:58:17.626900 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1343 03:58:17.630560 PCI: 00:19.1 assign_resources, bus 0 link: 0
1344 03:58:17.636804 PCI: 00:19.1 assign_resources, bus 0 link: 0
1345 03:58:17.643667 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1346 03:58:17.653953 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1347 03:58:17.663461 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1348 03:58:17.666811 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1349 03:58:17.677038 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1350 03:58:17.683427 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1351 03:58:17.693220 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1352 03:58:17.697193 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1353 03:58:17.706854 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1354 03:58:17.710069 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1355 03:58:17.713337 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1356 03:58:17.723206 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1357 03:58:17.726251 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1358 03:58:17.733235 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1359 03:58:17.736403 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1360 03:58:17.743032 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1361 03:58:17.746381 LPC: Trying to open IO window from 800 size 1ff
1362 03:58:17.756670 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1363 03:58:17.763199 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1364 03:58:17.769423 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1365 03:58:17.776316 DOMAIN: 0000 assign_resources, bus 0 link: 0
1366 03:58:17.779904 Root Device assign_resources, bus 0 link: 0
1367 03:58:17.782769 Done setting resources.
1368 03:58:17.789344 Show resources in subtree (Root Device)...After assigning values.
1369 03:58:17.792900 Root Device child on link 0 DOMAIN: 0000
1370 03:58:17.799551 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1371 03:58:17.805802 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1372 03:58:17.815743 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1373 03:58:17.819465 PCI: 00:00.0
1374 03:58:17.829147 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1375 03:58:17.839914 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1376 03:58:17.845666 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1377 03:58:17.856148 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1378 03:58:17.865813 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1379 03:58:17.875898 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1380 03:58:17.885466 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1381 03:58:17.895941 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1382 03:58:17.901938 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1383 03:58:17.912253 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1384 03:58:17.922270 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1385 03:58:17.932158 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1386 03:58:17.941876 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1387 03:58:17.948781 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1388 03:58:17.958711 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1389 03:58:17.968292 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1390 03:58:17.978280 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1391 03:58:17.988211 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1392 03:58:17.998833 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1393 03:58:18.008052 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1394 03:58:18.008607 PCI: 00:02.0
1395 03:58:18.018113 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1396 03:58:18.031327 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1397 03:58:18.038124 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1398 03:58:18.045006 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1399 03:58:18.054911 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1400 03:58:18.055460 GENERIC: 0.0
1401 03:58:18.058028 PCI: 00:05.0
1402 03:58:18.067850 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1403 03:58:18.071177 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1404 03:58:18.074650 GENERIC: 0.0
1405 03:58:18.075128 PCI: 00:08.0
1406 03:58:18.087784 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1407 03:58:18.088332 PCI: 00:0a.0
1408 03:58:18.091009 PCI: 00:0d.0 child on link 0 USB0 port 0
1409 03:58:18.104136 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1410 03:58:18.107461 USB0 port 0 child on link 0 USB3 port 0
1411 03:58:18.107946 USB3 port 0
1412 03:58:18.111876 USB3 port 1
1413 03:58:18.112464 USB3 port 2
1414 03:58:18.114257 USB3 port 3
1415 03:58:18.117919 PCI: 00:14.0 child on link 0 USB0 port 0
1416 03:58:18.130761 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1417 03:58:18.134259 USB0 port 0 child on link 0 USB2 port 0
1418 03:58:18.134735 USB2 port 0
1419 03:58:18.137561 USB2 port 1
1420 03:58:18.138099 USB2 port 2
1421 03:58:18.141040 USB2 port 3
1422 03:58:18.141663 USB2 port 4
1423 03:58:18.144017 USB2 port 5
1424 03:58:18.147940 USB2 port 6
1425 03:58:18.148518 USB2 port 7
1426 03:58:18.150648 USB2 port 8
1427 03:58:18.151121 USB2 port 9
1428 03:58:18.153905 USB3 port 0
1429 03:58:18.154382 USB3 port 1
1430 03:58:18.157398 USB3 port 2
1431 03:58:18.157923 USB3 port 3
1432 03:58:18.160944 PCI: 00:14.2
1433 03:58:18.170861 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1434 03:58:18.180601 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1435 03:58:18.184329 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1436 03:58:18.194324 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1437 03:58:18.197519 GENERIC: 0.0
1438 03:58:18.200724 PCI: 00:15.0 child on link 0 I2C: 00:1a
1439 03:58:18.210502 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1440 03:58:18.213634 I2C: 00:1a
1441 03:58:18.214204 I2C: 00:31
1442 03:58:18.216922 I2C: 00:32
1443 03:58:18.220678 PCI: 00:15.1 child on link 0 I2C: 00:10
1444 03:58:18.230073 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1445 03:58:18.233474 I2C: 00:10
1446 03:58:18.234118 PCI: 00:15.2
1447 03:58:18.243961 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1448 03:58:18.246955 PCI: 00:15.3
1449 03:58:18.256676 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1450 03:58:18.257225 PCI: 00:16.0
1451 03:58:18.270057 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1452 03:58:18.270618 PCI: 00:19.0
1453 03:58:18.273286 PCI: 00:19.1 child on link 0 I2C: 00:15
1454 03:58:18.286550 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1455 03:58:18.287118 I2C: 00:15
1456 03:58:18.290631 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1457 03:58:18.300201 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1458 03:58:18.313788 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1459 03:58:18.323632 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1460 03:58:18.324215 GENERIC: 0.0
1461 03:58:18.326304 PCI: 01:00.0
1462 03:58:18.336733 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1463 03:58:18.346467 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1464 03:58:18.356627 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1465 03:58:18.360033 PCI: 00:1e.0
1466 03:58:18.369429 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1467 03:58:18.373001 PCI: 00:1e.2 child on link 0 SPI: 00
1468 03:58:18.383882 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1469 03:58:18.386113 SPI: 00
1470 03:58:18.389491 PCI: 00:1e.3 child on link 0 SPI: 00
1471 03:58:18.399816 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1472 03:58:18.402826 SPI: 00
1473 03:58:18.406130 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1474 03:58:18.416462 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1475 03:58:18.417138 PNP: 0c09.0
1476 03:58:18.426049 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 03:58:18.429775 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1478 03:58:18.439468 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1479 03:58:18.449257 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1480 03:58:18.453040 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1481 03:58:18.456714 GENERIC: 0.0
1482 03:58:18.457400 GENERIC: 1.0
1483 03:58:18.459361 PCI: 00:1f.3
1484 03:58:18.469233 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1485 03:58:18.479625 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1486 03:58:18.480296 PCI: 00:1f.5
1487 03:58:18.492789 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1488 03:58:18.495766 CPU_CLUSTER: 0 child on link 0 APIC: 00
1489 03:58:18.496318 APIC: 00
1490 03:58:18.499046 APIC: 01
1491 03:58:18.499735 APIC: 03
1492 03:58:18.500202 APIC: 05
1493 03:58:18.502422 APIC: 07
1494 03:58:18.502985 APIC: 06
1495 03:58:18.505481 APIC: 02
1496 03:58:18.506076 APIC: 04
1497 03:58:18.509271 Done allocating resources.
1498 03:58:18.516016 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1499 03:58:18.519178 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1500 03:58:18.525706 Configure GPIOs for I2S audio on UP4.
1501 03:58:18.532262 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1502 03:58:18.532834 Enabling resources...
1503 03:58:18.539135 PCI: 00:00.0 subsystem <- 8086/9a12
1504 03:58:18.539845 PCI: 00:00.0 cmd <- 06
1505 03:58:18.542015 PCI: 00:02.0 subsystem <- 8086/9a40
1506 03:58:18.545297 PCI: 00:02.0 cmd <- 03
1507 03:58:18.549085 PCI: 00:04.0 subsystem <- 8086/9a03
1508 03:58:18.551722 PCI: 00:04.0 cmd <- 02
1509 03:58:18.555030 PCI: 00:05.0 subsystem <- 8086/9a19
1510 03:58:18.559095 PCI: 00:05.0 cmd <- 02
1511 03:58:18.561713 PCI: 00:08.0 subsystem <- 8086/9a11
1512 03:58:18.564926 PCI: 00:08.0 cmd <- 06
1513 03:58:18.568242 PCI: 00:0d.0 subsystem <- 8086/9a13
1514 03:58:18.571922 PCI: 00:0d.0 cmd <- 02
1515 03:58:18.574979 PCI: 00:14.0 subsystem <- 8086/a0ed
1516 03:58:18.578351 PCI: 00:14.0 cmd <- 02
1517 03:58:18.581346 PCI: 00:14.2 subsystem <- 8086/a0ef
1518 03:58:18.581918 PCI: 00:14.2 cmd <- 02
1519 03:58:18.588379 PCI: 00:14.3 subsystem <- 8086/a0f0
1520 03:58:18.588904 PCI: 00:14.3 cmd <- 02
1521 03:58:18.591673 PCI: 00:15.0 subsystem <- 8086/a0e8
1522 03:58:18.594746 PCI: 00:15.0 cmd <- 02
1523 03:58:18.598174 PCI: 00:15.1 subsystem <- 8086/a0e9
1524 03:58:18.602005 PCI: 00:15.1 cmd <- 02
1525 03:58:18.604831 PCI: 00:15.2 subsystem <- 8086/a0ea
1526 03:58:18.608061 PCI: 00:15.2 cmd <- 02
1527 03:58:18.611492 PCI: 00:15.3 subsystem <- 8086/a0eb
1528 03:58:18.614833 PCI: 00:15.3 cmd <- 02
1529 03:58:18.618117 PCI: 00:16.0 subsystem <- 8086/a0e0
1530 03:58:18.621513 PCI: 00:16.0 cmd <- 02
1531 03:58:18.624803 PCI: 00:19.1 subsystem <- 8086/a0c6
1532 03:58:18.627925 PCI: 00:19.1 cmd <- 02
1533 03:58:18.631027 PCI: 00:1d.0 bridge ctrl <- 0013
1534 03:58:18.634479 PCI: 00:1d.0 subsystem <- 8086/a0b0
1535 03:58:18.635005 PCI: 00:1d.0 cmd <- 06
1536 03:58:18.641381 PCI: 00:1e.0 subsystem <- 8086/a0a8
1537 03:58:18.642016 PCI: 00:1e.0 cmd <- 06
1538 03:58:18.644728 PCI: 00:1e.2 subsystem <- 8086/a0aa
1539 03:58:18.648317 PCI: 00:1e.2 cmd <- 06
1540 03:58:18.651256 PCI: 00:1e.3 subsystem <- 8086/a0ab
1541 03:58:18.654289 PCI: 00:1e.3 cmd <- 02
1542 03:58:18.657840 PCI: 00:1f.0 subsystem <- 8086/a087
1543 03:58:18.661094 PCI: 00:1f.0 cmd <- 407
1544 03:58:18.664668 PCI: 00:1f.3 subsystem <- 8086/a0c8
1545 03:58:18.667526 PCI: 00:1f.3 cmd <- 02
1546 03:58:18.671375 PCI: 00:1f.5 subsystem <- 8086/a0a4
1547 03:58:18.674709 PCI: 00:1f.5 cmd <- 406
1548 03:58:18.678251 PCI: 01:00.0 cmd <- 02
1549 03:58:18.682566 done.
1550 03:58:18.685315 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1551 03:58:18.688587 Initializing devices...
1552 03:58:18.692095 Root Device init
1553 03:58:18.695466 Chrome EC: Set SMI mask to 0x0000000000000000
1554 03:58:18.703491 Chrome EC: clear events_b mask to 0x0000000000000000
1555 03:58:18.709895 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1556 03:58:18.716469 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1557 03:58:18.723271 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1558 03:58:18.726469 Chrome EC: Set WAKE mask to 0x0000000000000000
1559 03:58:18.734560 fw_config match found: DB_USB=USB3_ACTIVE
1560 03:58:18.737633 Configure Right Type-C port orientation for retimer
1561 03:58:18.744363 Root Device init finished in 47 msecs
1562 03:58:18.745134 PCI: 00:00.0 init
1563 03:58:18.748210 CPU TDP = 9 Watts
1564 03:58:18.751581 CPU PL1 = 9 Watts
1565 03:58:18.752184 CPU PL2 = 40 Watts
1566 03:58:18.754667 CPU PL4 = 83 Watts
1567 03:58:18.758226 PCI: 00:00.0 init finished in 8 msecs
1568 03:58:18.761519 PCI: 00:02.0 init
1569 03:58:18.762021 GMA: Found VBT in CBFS
1570 03:58:18.764956 GMA: Found valid VBT in CBFS
1571 03:58:18.771618 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1572 03:58:18.778071 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1573 03:58:18.781098 PCI: 00:02.0 init finished in 18 msecs
1574 03:58:18.785126 PCI: 00:05.0 init
1575 03:58:18.787971 PCI: 00:05.0 init finished in 0 msecs
1576 03:58:18.790989 PCI: 00:08.0 init
1577 03:58:18.794452 PCI: 00:08.0 init finished in 0 msecs
1578 03:58:18.798212 PCI: 00:14.0 init
1579 03:58:18.801648 PCI: 00:14.0 init finished in 0 msecs
1580 03:58:18.804855 PCI: 00:14.2 init
1581 03:58:18.807993 PCI: 00:14.2 init finished in 0 msecs
1582 03:58:18.811411 PCI: 00:15.0 init
1583 03:58:18.814267 I2C bus 0 version 0x3230302a
1584 03:58:18.817904 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1585 03:58:18.820824 PCI: 00:15.0 init finished in 6 msecs
1586 03:58:18.824324 PCI: 00:15.1 init
1587 03:58:18.824913 I2C bus 1 version 0x3230302a
1588 03:58:18.830838 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1589 03:58:18.834227 PCI: 00:15.1 init finished in 6 msecs
1590 03:58:18.834710 PCI: 00:15.2 init
1591 03:58:18.837561 I2C bus 2 version 0x3230302a
1592 03:58:18.841235 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1593 03:58:18.844383 PCI: 00:15.2 init finished in 6 msecs
1594 03:58:18.847638 PCI: 00:15.3 init
1595 03:58:18.851335 I2C bus 3 version 0x3230302a
1596 03:58:18.854585 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1597 03:58:18.857478 PCI: 00:15.3 init finished in 6 msecs
1598 03:58:18.860943 PCI: 00:16.0 init
1599 03:58:18.864449 PCI: 00:16.0 init finished in 0 msecs
1600 03:58:18.867552 PCI: 00:19.1 init
1601 03:58:18.871033 I2C bus 5 version 0x3230302a
1602 03:58:18.874323 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1603 03:58:18.877896 PCI: 00:19.1 init finished in 6 msecs
1604 03:58:18.880982 PCI: 00:1d.0 init
1605 03:58:18.881562 Initializing PCH PCIe bridge.
1606 03:58:18.887426 PCI: 00:1d.0 init finished in 3 msecs
1607 03:58:18.890899 PCI: 00:1f.0 init
1608 03:58:18.894074 IOAPIC: Initializing IOAPIC at 0xfec00000
1609 03:58:18.897344 IOAPIC: Bootstrap Processor Local APIC = 0x00
1610 03:58:18.900806 IOAPIC: ID = 0x02
1611 03:58:18.904111 IOAPIC: Dumping registers
1612 03:58:18.904687 reg 0x0000: 0x02000000
1613 03:58:18.907569 reg 0x0001: 0x00770020
1614 03:58:18.910546 reg 0x0002: 0x00000000
1615 03:58:18.914229 PCI: 00:1f.0 init finished in 21 msecs
1616 03:58:18.917240 PCI: 00:1f.2 init
1617 03:58:18.920838 Disabling ACPI via APMC.
1618 03:58:18.921312 APMC done.
1619 03:58:18.924117 PCI: 00:1f.2 init finished in 5 msecs
1620 03:58:18.937617 PCI: 01:00.0 init
1621 03:58:18.940887 PCI: 01:00.0 init finished in 0 msecs
1622 03:58:18.944055 PNP: 0c09.0 init
1623 03:58:18.947503 Google Chrome EC uptime: 8.442 seconds
1624 03:58:18.954136 Google Chrome AP resets since EC boot: 1
1625 03:58:18.957618 Google Chrome most recent AP reset causes:
1626 03:58:18.960613 0.379: 32775 shutdown: entering G3
1627 03:58:18.968187 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1628 03:58:18.970541 PNP: 0c09.0 init finished in 22 msecs
1629 03:58:18.976829 Devices initialized
1630 03:58:18.980191 Show all devs... After init.
1631 03:58:18.983330 Root Device: enabled 1
1632 03:58:18.983796 DOMAIN: 0000: enabled 1
1633 03:58:18.986080 CPU_CLUSTER: 0: enabled 1
1634 03:58:18.989634 PCI: 00:00.0: enabled 1
1635 03:58:18.992920 PCI: 00:02.0: enabled 1
1636 03:58:18.993438 PCI: 00:04.0: enabled 1
1637 03:58:18.996605 PCI: 00:05.0: enabled 1
1638 03:58:18.999901 PCI: 00:06.0: enabled 0
1639 03:58:19.003476 PCI: 00:07.0: enabled 0
1640 03:58:19.004041 PCI: 00:07.1: enabled 0
1641 03:58:19.006061 PCI: 00:07.2: enabled 0
1642 03:58:19.009911 PCI: 00:07.3: enabled 0
1643 03:58:19.012815 PCI: 00:08.0: enabled 1
1644 03:58:19.013280 PCI: 00:09.0: enabled 0
1645 03:58:19.016097 PCI: 00:0a.0: enabled 0
1646 03:58:19.019499 PCI: 00:0d.0: enabled 1
1647 03:58:19.022599 PCI: 00:0d.1: enabled 0
1648 03:58:19.023132 PCI: 00:0d.2: enabled 0
1649 03:58:19.026564 PCI: 00:0d.3: enabled 0
1650 03:58:19.029452 PCI: 00:0e.0: enabled 0
1651 03:58:19.029993 PCI: 00:10.2: enabled 1
1652 03:58:19.032783 PCI: 00:10.6: enabled 0
1653 03:58:19.036263 PCI: 00:10.7: enabled 0
1654 03:58:19.039339 PCI: 00:12.0: enabled 0
1655 03:58:19.039806 PCI: 00:12.6: enabled 0
1656 03:58:19.042738 PCI: 00:13.0: enabled 0
1657 03:58:19.045815 PCI: 00:14.0: enabled 1
1658 03:58:19.049463 PCI: 00:14.1: enabled 0
1659 03:58:19.050080 PCI: 00:14.2: enabled 1
1660 03:58:19.052605 PCI: 00:14.3: enabled 1
1661 03:58:19.055967 PCI: 00:15.0: enabled 1
1662 03:58:19.059582 PCI: 00:15.1: enabled 1
1663 03:58:19.060045 PCI: 00:15.2: enabled 1
1664 03:58:19.062493 PCI: 00:15.3: enabled 1
1665 03:58:19.066209 PCI: 00:16.0: enabled 1
1666 03:58:19.069123 PCI: 00:16.1: enabled 0
1667 03:58:19.069620 PCI: 00:16.2: enabled 0
1668 03:58:19.072675 PCI: 00:16.3: enabled 0
1669 03:58:19.075652 PCI: 00:16.4: enabled 0
1670 03:58:19.076128 PCI: 00:16.5: enabled 0
1671 03:58:19.079047 PCI: 00:17.0: enabled 0
1672 03:58:19.082303 PCI: 00:19.0: enabled 0
1673 03:58:19.085961 PCI: 00:19.1: enabled 1
1674 03:58:19.086491 PCI: 00:19.2: enabled 0
1675 03:58:19.089295 PCI: 00:1c.0: enabled 1
1676 03:58:19.092256 PCI: 00:1c.1: enabled 0
1677 03:58:19.095994 PCI: 00:1c.2: enabled 0
1678 03:58:19.096587 PCI: 00:1c.3: enabled 0
1679 03:58:19.099355 PCI: 00:1c.4: enabled 0
1680 03:58:19.102520 PCI: 00:1c.5: enabled 0
1681 03:58:19.105935 PCI: 00:1c.6: enabled 1
1682 03:58:19.106510 PCI: 00:1c.7: enabled 0
1683 03:58:19.109074 PCI: 00:1d.0: enabled 1
1684 03:58:19.112365 PCI: 00:1d.1: enabled 0
1685 03:58:19.116027 PCI: 00:1d.2: enabled 1
1686 03:58:19.116601 PCI: 00:1d.3: enabled 0
1687 03:58:19.118886 PCI: 00:1e.0: enabled 1
1688 03:58:19.122110 PCI: 00:1e.1: enabled 0
1689 03:58:19.122598 PCI: 00:1e.2: enabled 1
1690 03:58:19.125615 PCI: 00:1e.3: enabled 1
1691 03:58:19.128786 PCI: 00:1f.0: enabled 1
1692 03:58:19.132066 PCI: 00:1f.1: enabled 0
1693 03:58:19.132552 PCI: 00:1f.2: enabled 1
1694 03:58:19.135283 PCI: 00:1f.3: enabled 1
1695 03:58:19.138413 PCI: 00:1f.4: enabled 0
1696 03:58:19.141743 PCI: 00:1f.5: enabled 1
1697 03:58:19.142233 PCI: 00:1f.6: enabled 0
1698 03:58:19.145260 PCI: 00:1f.7: enabled 0
1699 03:58:19.148748 APIC: 00: enabled 1
1700 03:58:19.151787 GENERIC: 0.0: enabled 1
1701 03:58:19.152296 GENERIC: 0.0: enabled 1
1702 03:58:19.155186 GENERIC: 1.0: enabled 1
1703 03:58:19.158450 GENERIC: 0.0: enabled 1
1704 03:58:19.158931 GENERIC: 1.0: enabled 1
1705 03:58:19.161640 USB0 port 0: enabled 1
1706 03:58:19.165001 GENERIC: 0.0: enabled 1
1707 03:58:19.168469 USB0 port 0: enabled 1
1708 03:58:19.168946 GENERIC: 0.0: enabled 1
1709 03:58:19.171610 I2C: 00:1a: enabled 1
1710 03:58:19.175111 I2C: 00:31: enabled 1
1711 03:58:19.175598 I2C: 00:32: enabled 1
1712 03:58:19.178221 I2C: 00:10: enabled 1
1713 03:58:19.181955 I2C: 00:15: enabled 1
1714 03:58:19.182512 GENERIC: 0.0: enabled 0
1715 03:58:19.184973 GENERIC: 1.0: enabled 0
1716 03:58:19.188311 GENERIC: 0.0: enabled 1
1717 03:58:19.191446 SPI: 00: enabled 1
1718 03:58:19.191883 SPI: 00: enabled 1
1719 03:58:19.195123 PNP: 0c09.0: enabled 1
1720 03:58:19.198393 GENERIC: 0.0: enabled 1
1721 03:58:19.198877 USB3 port 0: enabled 1
1722 03:58:19.202020 USB3 port 1: enabled 1
1723 03:58:19.204865 USB3 port 2: enabled 0
1724 03:58:19.205350 USB3 port 3: enabled 0
1725 03:58:19.208334 USB2 port 0: enabled 0
1726 03:58:19.211395 USB2 port 1: enabled 1
1727 03:58:19.214956 USB2 port 2: enabled 1
1728 03:58:19.215542 USB2 port 3: enabled 0
1729 03:58:19.218092 USB2 port 4: enabled 1
1730 03:58:19.222035 USB2 port 5: enabled 0
1731 03:58:19.222623 USB2 port 6: enabled 0
1732 03:58:19.224843 USB2 port 7: enabled 0
1733 03:58:19.228492 USB2 port 8: enabled 0
1734 03:58:19.229078 USB2 port 9: enabled 0
1735 03:58:19.231836 USB3 port 0: enabled 0
1736 03:58:19.234771 USB3 port 1: enabled 1
1737 03:58:19.237848 USB3 port 2: enabled 0
1738 03:58:19.238338 USB3 port 3: enabled 0
1739 03:58:19.241535 GENERIC: 0.0: enabled 1
1740 03:58:19.244590 GENERIC: 1.0: enabled 1
1741 03:58:19.245077 APIC: 01: enabled 1
1742 03:58:19.247931 APIC: 03: enabled 1
1743 03:58:19.251115 APIC: 05: enabled 1
1744 03:58:19.251603 APIC: 07: enabled 1
1745 03:58:19.254616 APIC: 06: enabled 1
1746 03:58:19.255172 APIC: 02: enabled 1
1747 03:58:19.257963 APIC: 04: enabled 1
1748 03:58:19.261246 PCI: 01:00.0: enabled 1
1749 03:58:19.267575 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1750 03:58:19.270975 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1751 03:58:19.274783 ELOG: NV offset 0xf30000 size 0x1000
1752 03:58:19.281773 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1753 03:58:19.288186 ELOG: Event(17) added with size 13 at 2022-07-05 02:51:33 UTC
1754 03:58:19.294981 ELOG: Event(92) added with size 9 at 2022-07-05 02:51:33 UTC
1755 03:58:19.301531 ELOG: Event(93) added with size 9 at 2022-07-05 02:51:33 UTC
1756 03:58:19.308186 ELOG: Event(9E) added with size 10 at 2022-07-05 02:51:33 UTC
1757 03:58:19.314623 ELOG: Event(9F) added with size 14 at 2022-07-05 02:51:33 UTC
1758 03:58:19.321289 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1759 03:58:19.327989 ELOG: Event(A1) added with size 10 at 2022-07-05 02:51:33 UTC
1760 03:58:19.331208 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1761 03:58:19.337639 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1762 03:58:19.340996 Finalize devices...
1763 03:58:19.341482 Devices finalized
1764 03:58:19.347450 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1765 03:58:19.354447 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1766 03:58:19.357461 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1767 03:58:19.364450 ME: HFSTS1 : 0x80030055
1768 03:58:19.367459 ME: HFSTS2 : 0x30280116
1769 03:58:19.371094 ME: HFSTS3 : 0x00000050
1770 03:58:19.377279 ME: HFSTS4 : 0x00004000
1771 03:58:19.380944 ME: HFSTS5 : 0x00000000
1772 03:58:19.387263 ME: HFSTS6 : 0x00400006
1773 03:58:19.390562 ME: Manufacturing Mode : YES
1774 03:58:19.393880 ME: SPI Protection Mode Enabled : NO
1775 03:58:19.397370 ME: FW Partition Table : OK
1776 03:58:19.400826 ME: Bringup Loader Failure : NO
1777 03:58:19.403766 ME: Firmware Init Complete : NO
1778 03:58:19.407320 ME: Boot Options Present : NO
1779 03:58:19.411346 ME: Update In Progress : NO
1780 03:58:19.417288 ME: D0i3 Support : YES
1781 03:58:19.420368 ME: Low Power State Enabled : NO
1782 03:58:19.424014 ME: CPU Replaced : YES
1783 03:58:19.427198 ME: CPU Replacement Valid : YES
1784 03:58:19.430431 ME: Current Working State : 5
1785 03:58:19.433680 ME: Current Operation State : 1
1786 03:58:19.436898 ME: Current Operation Mode : 3
1787 03:58:19.440283 ME: Error Code : 0
1788 03:58:19.443897 ME: Enhanced Debug Mode : NO
1789 03:58:19.450122 ME: CPU Debug Disabled : YES
1790 03:58:19.453466 ME: TXT Support : NO
1791 03:58:19.460261 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1792 03:58:19.466844 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1793 03:58:19.470101 CBFS: 'fallback/slic' not found.
1794 03:58:19.473509 ACPI: Writing ACPI tables at 76b01000.
1795 03:58:19.476573 ACPI: * FACS
1796 03:58:19.477015 ACPI: * DSDT
1797 03:58:19.480017 Ramoops buffer: 0x100000@0x76a00000.
1798 03:58:19.486761 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1799 03:58:19.490017 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1800 03:58:19.493382 Google Chrome EC: version:
1801 03:58:19.496663 ro: voema_v2.0.7540-147f8d37d1
1802 03:58:19.499829 rw: voema_v2.0.7540-147f8d37d1
1803 03:58:19.503681 running image: 2
1804 03:58:19.509762 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1805 03:58:19.514097 ACPI: * FADT
1806 03:58:19.514680 SCI is IRQ9
1807 03:58:19.516578 ACPI: added table 1/32, length now 40
1808 03:58:19.519745 ACPI: * SSDT
1809 03:58:19.523467 Found 1 CPU(s) with 8 core(s) each.
1810 03:58:19.526419 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1811 03:58:19.533053 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1812 03:58:19.536610 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1813 03:58:19.539629 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1814 03:58:19.546708 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1815 03:58:19.553047 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1816 03:58:19.556383 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1817 03:58:19.562905 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1818 03:58:19.569806 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1819 03:58:19.573121 \_SB.PCI0.RP09: Added StorageD3Enable property
1820 03:58:19.576143 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1821 03:58:19.582707 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1822 03:58:19.586435 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1823 03:58:19.592965 PS2K: Passing 80 keymaps to kernel
1824 03:58:19.599668 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1825 03:58:19.602753 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1826 03:58:19.609299 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1827 03:58:19.616062 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1828 03:58:19.622548 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1829 03:58:19.629806 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1830 03:58:19.635754 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1831 03:58:19.642489 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1832 03:58:19.645551 ACPI: added table 2/32, length now 44
1833 03:58:19.649228 ACPI: * MCFG
1834 03:58:19.652686 ACPI: added table 3/32, length now 48
1835 03:58:19.655791 ACPI: * TPM2
1836 03:58:19.659012 TPM2 log created at 0x769f0000
1837 03:58:19.662672 ACPI: added table 4/32, length now 52
1838 03:58:19.663150 ACPI: * MADT
1839 03:58:19.665675 SCI is IRQ9
1840 03:58:19.669405 ACPI: added table 5/32, length now 56
1841 03:58:19.670104 current = 76b09850
1842 03:58:19.672383 ACPI: * DMAR
1843 03:58:19.676076 ACPI: added table 6/32, length now 60
1844 03:58:19.678852 ACPI: added table 7/32, length now 64
1845 03:58:19.682169 ACPI: * HPET
1846 03:58:19.685494 ACPI: added table 8/32, length now 68
1847 03:58:19.686078 ACPI: done.
1848 03:58:19.688973 ACPI tables: 35216 bytes.
1849 03:58:19.692518 smbios_write_tables: 769ef000
1850 03:58:19.695905 EC returned error result code 3
1851 03:58:19.699121 Couldn't obtain OEM name from CBI
1852 03:58:19.702240 Create SMBIOS type 16
1853 03:58:19.702727 Create SMBIOS type 17
1854 03:58:19.705548 GENERIC: 0.0 (WIFI Device)
1855 03:58:19.708941 SMBIOS tables: 1750 bytes.
1856 03:58:19.712283 Writing table forward entry at 0x00000500
1857 03:58:19.718811 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1858 03:58:19.722407 Writing coreboot table at 0x76b25000
1859 03:58:19.728957 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1860 03:58:19.732404 1. 0000000000001000-000000000009ffff: RAM
1861 03:58:19.738641 2. 00000000000a0000-00000000000fffff: RESERVED
1862 03:58:19.741962 3. 0000000000100000-00000000769eefff: RAM
1863 03:58:19.748653 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1864 03:58:19.752203 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1865 03:58:19.758640 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1866 03:58:19.765156 7. 0000000077000000-000000007fbfffff: RESERVED
1867 03:58:19.768349 8. 00000000c0000000-00000000cfffffff: RESERVED
1868 03:58:19.775082 9. 00000000f8000000-00000000f9ffffff: RESERVED
1869 03:58:19.778746 10. 00000000fb000000-00000000fb000fff: RESERVED
1870 03:58:19.781690 11. 00000000fe000000-00000000fe00ffff: RESERVED
1871 03:58:19.788268 12. 00000000fed80000-00000000fed87fff: RESERVED
1872 03:58:19.791862 13. 00000000fed90000-00000000fed92fff: RESERVED
1873 03:58:19.798566 14. 00000000feda0000-00000000feda1fff: RESERVED
1874 03:58:19.801766 15. 00000000fedc0000-00000000feddffff: RESERVED
1875 03:58:19.808622 16. 0000000100000000-00000002803fffff: RAM
1876 03:58:19.809134 Passing 4 GPIOs to payload:
1877 03:58:19.815163 NAME | PORT | POLARITY | VALUE
1878 03:58:19.821598 lid | undefined | high | high
1879 03:58:19.825052 power | undefined | high | low
1880 03:58:19.832046 oprom | undefined | high | low
1881 03:58:19.835277 EC in RW | 0x000000e5 | high | high
1882 03:58:19.841773 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 871
1883 03:58:19.845241 coreboot table: 1576 bytes.
1884 03:58:19.848687 IMD ROOT 0. 0x76fff000 0x00001000
1885 03:58:19.852297 IMD SMALL 1. 0x76ffe000 0x00001000
1886 03:58:19.855157 FSP MEMORY 2. 0x76c4e000 0x003b0000
1887 03:58:19.858249 VPD 3. 0x76c4d000 0x00000367
1888 03:58:19.865140 RO MCACHE 4. 0x76c4c000 0x00000fdc
1889 03:58:19.868655 CONSOLE 5. 0x76c2c000 0x00020000
1890 03:58:19.872143 FMAP 6. 0x76c2b000 0x00000578
1891 03:58:19.875019 TIME STAMP 7. 0x76c2a000 0x00000910
1892 03:58:19.878339 VBOOT WORK 8. 0x76c16000 0x00014000
1893 03:58:19.881443 ROMSTG STCK 9. 0x76c15000 0x00001000
1894 03:58:19.885306 AFTER CAR 10. 0x76c0a000 0x0000b000
1895 03:58:19.888137 RAMSTAGE 11. 0x76b97000 0x00073000
1896 03:58:19.894860 REFCODE 12. 0x76b42000 0x00055000
1897 03:58:19.898787 SMM BACKUP 13. 0x76b32000 0x00010000
1898 03:58:19.901946 4f444749 14. 0x76b30000 0x00002000
1899 03:58:19.905316 EXT VBT15. 0x76b2d000 0x0000219f
1900 03:58:19.908303 COREBOOT 16. 0x76b25000 0x00008000
1901 03:58:19.911691 ACPI 17. 0x76b01000 0x00024000
1902 03:58:19.915003 ACPI GNVS 18. 0x76b00000 0x00001000
1903 03:58:19.918567 RAMOOPS 19. 0x76a00000 0x00100000
1904 03:58:19.921978 TPM2 TCGLOG20. 0x769f0000 0x00010000
1905 03:58:19.929104 SMBIOS 21. 0x769ef000 0x00000800
1906 03:58:19.929762 IMD small region:
1907 03:58:19.932253 IMD ROOT 0. 0x76ffec00 0x00000400
1908 03:58:19.935069 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1909 03:58:19.941560 POWER STATE 2. 0x76ffeb80 0x00000044
1910 03:58:19.945298 ROMSTAGE 3. 0x76ffeb60 0x00000004
1911 03:58:19.948604 MEM INFO 4. 0x76ffe980 0x000001e0
1912 03:58:19.954867 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1913 03:58:19.958749 MTRR: Physical address space:
1914 03:58:19.965164 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1915 03:58:19.968684 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1916 03:58:19.975118 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1917 03:58:19.981401 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1918 03:58:19.988011 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1919 03:58:19.994734 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1920 03:58:20.002068 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1921 03:58:20.005250 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 03:58:20.008166 MTRR: Fixed MSR 0x258 0x0606060606060606
1923 03:58:20.014673 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 03:58:20.017932 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 03:58:20.021439 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 03:58:20.024686 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 03:58:20.028821 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 03:58:20.035173 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 03:58:20.037945 MTRR: Fixed MSR 0x26d 0x0606060606060606
1930 03:58:20.041210 MTRR: Fixed MSR 0x26e 0x0606060606060606
1931 03:58:20.045149 MTRR: Fixed MSR 0x26f 0x0606060606060606
1932 03:58:20.048835 call enable_fixed_mtrr()
1933 03:58:20.052383 CPU physical address size: 39 bits
1934 03:58:20.058810 MTRR: default type WB/UC MTRR counts: 6/6.
1935 03:58:20.062367 MTRR: UC selected as default type.
1936 03:58:20.068938 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1937 03:58:20.072071 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1938 03:58:20.079094 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1939 03:58:20.085529 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1940 03:58:20.092530 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1941 03:58:20.098529 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1942 03:58:20.099095
1943 03:58:20.101955 MTRR check
1944 03:58:20.105368 Fixed MTRRs : Enabled
1945 03:58:20.105896 Variable MTRRs: Enabled
1946 03:58:20.106278
1947 03:58:20.111880 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 03:58:20.115893 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 03:58:20.118727 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 03:58:20.121764 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 03:58:20.128554 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 03:58:20.131927 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 03:58:20.135405 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 03:58:20.138438 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 03:58:20.141617 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 03:58:20.148479 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 03:58:20.151573 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 03:58:20.158425 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1959 03:58:20.161599 call enable_fixed_mtrr()
1960 03:58:20.164960 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 03:58:20.168009 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 03:58:20.174963 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 03:58:20.177869 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 03:58:20.181335 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 03:58:20.184582 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 03:58:20.188004 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 03:58:20.194632 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 03:58:20.198126 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 03:58:20.201205 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 03:58:20.204635 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 03:58:20.211516 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 03:58:20.214543 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 03:58:20.218282 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 03:58:20.225020 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 03:58:20.228194 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 03:58:20.231422 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 03:58:20.234431 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 03:58:20.241361 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 03:58:20.244390 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 03:58:20.248074 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 03:58:20.251425 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 03:58:20.255162 call enable_fixed_mtrr()
1983 03:58:20.258317 call enable_fixed_mtrr()
1984 03:58:20.261629 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 03:58:20.264995 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 03:58:20.271399 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 03:58:20.274864 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 03:58:20.278110 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 03:58:20.281480 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 03:58:20.288713 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 03:58:20.291425 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 03:58:20.295270 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 03:58:20.298243 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 03:58:20.304924 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 03:58:20.307988 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 03:58:20.311478 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 03:58:20.314975 call enable_fixed_mtrr()
1998 03:58:20.317839 MTRR: Fixed MSR 0x259 0x0000000000000000
1999 03:58:20.324923 MTRR: Fixed MSR 0x268 0x0606060606060606
2000 03:58:20.328401 MTRR: Fixed MSR 0x269 0x0606060606060606
2001 03:58:20.331867 MTRR: Fixed MSR 0x26a 0x0606060606060606
2002 03:58:20.334687 MTRR: Fixed MSR 0x26b 0x0606060606060606
2003 03:58:20.341522 MTRR: Fixed MSR 0x26c 0x0606060606060606
2004 03:58:20.345073 MTRR: Fixed MSR 0x26d 0x0606060606060606
2005 03:58:20.347916 MTRR: Fixed MSR 0x26e 0x0606060606060606
2006 03:58:20.351251 MTRR: Fixed MSR 0x26f 0x0606060606060606
2007 03:58:20.355510 CPU physical address size: 39 bits
2008 03:58:20.361757 call enable_fixed_mtrr()
2009 03:58:20.365209 CPU physical address size: 39 bits
2010 03:58:20.368639 CPU physical address size: 39 bits
2011 03:58:20.371759 Checking cr50 for pending updates
2012 03:58:20.375536 CPU physical address size: 39 bits
2013 03:58:20.379548 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 03:58:20.382635 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 03:58:20.389406 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 03:58:20.392085 MTRR: Fixed MSR 0x259 0x0000000000000000
2017 03:58:20.395878 MTRR: Fixed MSR 0x268 0x0606060606060606
2018 03:58:20.399113 MTRR: Fixed MSR 0x269 0x0606060606060606
2019 03:58:20.402151 MTRR: Fixed MSR 0x26a 0x0606060606060606
2020 03:58:20.409194 MTRR: Fixed MSR 0x26b 0x0606060606060606
2021 03:58:20.412389 MTRR: Fixed MSR 0x26c 0x0606060606060606
2022 03:58:20.415896 MTRR: Fixed MSR 0x26d 0x0606060606060606
2023 03:58:20.418972 MTRR: Fixed MSR 0x26e 0x0606060606060606
2024 03:58:20.425660 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 03:58:20.428903 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 03:58:20.432266 call enable_fixed_mtrr()
2027 03:58:20.435637 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 03:58:20.438350 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 03:58:20.445755 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 03:58:20.448815 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 03:58:20.452060 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 03:58:20.455423 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 03:58:20.462193 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 03:58:20.465379 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 03:58:20.468831 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 03:58:20.471528 CPU physical address size: 39 bits
2037 03:58:20.478384 call enable_fixed_mtrr()
2038 03:58:20.482689 CPU physical address size: 39 bits
2039 03:58:20.483163 Reading cr50 TPM mode
2040 03:58:20.485757 CPU physical address size: 39 bits
2041 03:58:20.492896 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2042 03:58:20.503034 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2043 03:58:20.506925 Checking segment from ROM address 0xffc02b38
2044 03:58:20.509506 Checking segment from ROM address 0xffc02b54
2045 03:58:20.516030 Loading segment from ROM address 0xffc02b38
2046 03:58:20.516610 code (compression=0)
2047 03:58:20.526312 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2048 03:58:20.536652 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2049 03:58:20.537278 it's not compressed!
2050 03:58:20.675555 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2051 03:58:20.682277 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2052 03:58:20.689038 Loading segment from ROM address 0xffc02b54
2053 03:58:20.689542 Entry Point 0x30000000
2054 03:58:20.692307 Loaded segments
2055 03:58:20.698759 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2056 03:58:20.742197 Finalizing chipset.
2057 03:58:20.745329 Finalizing SMM.
2058 03:58:20.745959 APMC done.
2059 03:58:20.752015 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2060 03:58:20.755426 mp_park_aps done after 0 msecs.
2061 03:58:20.758902 Jumping to boot code at 0x30000000(0x76b25000)
2062 03:58:20.768658 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2063 03:58:20.769305
2064 03:58:20.771509 Starting depthcharge on Voema...
2065 03:58:20.772865 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2066 03:58:20.773452 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2067 03:58:20.773962 Setting prompt string to ['volteer:']
2068 03:58:20.774451 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2069 03:58:20.781688 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2070 03:58:20.788077 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2071 03:58:20.794848 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2072 03:58:20.798248 Failed to find eMMC card reader
2073 03:58:20.798843 Wipe memory regions:
2074 03:58:20.804697 [0x00000000001000, 0x000000000a0000)
2075 03:58:20.808090 [0x00000000100000, 0x00000030000000)
2076 03:58:20.837136 [0x00000032662db0, 0x000000769ef000)
2077 03:58:20.875425 [0x00000100000000, 0x00000280400000)
2078 03:58:21.080286 ec_init: CrosEC protocol v3 supported (256, 256)
2079 03:58:21.086680 update_port_state: port C0 state: usb enable 1 mux conn 0
2080 03:58:21.096347 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2081 03:58:21.103523 pmc_check_ipc_sts: STS_BUSY done after 1511 us
2082 03:58:21.106391 send_conn_disc_msg: pmc_send_cmd succeeded
2083 03:58:21.539555 R8152: Initializing
2084 03:58:21.543114 Version 6 (ocp_data = 5c30)
2085 03:58:21.546084 R8152: Done initializing
2086 03:58:21.549270 Adding net device
2087 03:58:21.854716 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2088 03:58:21.855292
2089 03:58:21.858236 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2091 03:58:21.960266 volteer: tftpboot 192.168.201.1 6750553/tftp-deploy-jnz2icgk/kernel/bzImage 6750553/tftp-deploy-jnz2icgk/kernel/cmdline 6750553/tftp-deploy-jnz2icgk/ramdisk/ramdisk.cpio.gz
2092 03:58:21.960972 Setting prompt string to ['Starting kernel']
2093 03:58:21.961426 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2094 03:58:21.961879 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:43)
2095 03:58:21.965852 tftpboot 192.168.201.1 6750553/tftp-deploy-jnz2icgk/kernel/bzImaoy-jnz2icgk/kernel/cmdline 6750553/tftp-deploy-jnz2icgk/ramdisk/ramdisk.cpio.gz
2096 03:58:21.966344 Waiting for link
2097 03:58:22.170281 done.
2098 03:58:22.170826 MAC: 00:24:32:30:7c:e4
2099 03:58:22.173461 Sending DHCP discover... done.
2100 03:58:22.177360 Waiting for reply... done.
2101 03:58:22.180073 Sending DHCP request... done.
2102 03:58:22.187821 Waiting for reply... done.
2103 03:58:22.188292 My ip is 192.168.201.12
2104 03:58:22.190766 The DHCP server ip is 192.168.201.1
2105 03:58:22.197460 TFTP server IP predefined by user: 192.168.201.1
2106 03:58:22.204399 Bootfile predefined by user: 6750553/tftp-deploy-jnz2icgk/kernel/bzImage
2107 03:58:22.207654 Sending tftp read request... done.
2108 03:58:22.214555 Waiting for the transfer...
2109 03:58:22.893089 00000000 ################################################################
2110 03:58:23.497898 00080000 ################################################################
2111 03:58:24.101219 00100000 ################################################################
2112 03:58:24.669678 00180000 ################################################################
2113 03:58:25.268164 00200000 ################################################################
2114 03:58:25.947895 00280000 ################################################################
2115 03:58:26.635118 00300000 ################################################################
2116 03:58:27.228737 00380000 ################################################################
2117 03:58:27.803660 00400000 ################################################################
2118 03:58:28.378507 00480000 ################################################################
2119 03:58:28.975787 00500000 ################################################################
2120 03:58:29.586037 00580000 ################################################################
2121 03:58:30.166522 00600000 ############################################################### done.
2122 03:58:30.169896 The bootfile was 6807440 bytes long.
2123 03:58:30.173143 Sending tftp read request... done.
2124 03:58:30.176690 Waiting for the transfer...
2125 03:58:30.844131 00000000 ################################################################
2126 03:58:31.515697 00080000 ################################################################
2127 03:58:32.183347 00100000 ################################################################
2128 03:58:32.848870 00180000 ################################################################
2129 03:58:33.410685 00200000 ################################################################
2130 03:58:33.974592 00280000 ################################################################
2131 03:58:34.521296 00300000 ################################################################
2132 03:58:35.110423 00380000 ################################################################
2133 03:58:35.695120 00400000 ################################################################
2134 03:58:36.288535 00480000 ################################################################
2135 03:58:36.883056 00500000 ################################################################
2136 03:58:37.466318 00580000 ################################################################
2137 03:58:38.065121 00600000 ################################################################
2138 03:58:38.657094 00680000 ################################################################
2139 03:58:39.204932 00700000 ################################################################
2140 03:58:39.778632 00780000 ################################################################
2141 03:58:40.361526 00800000 ################################################################
2142 03:58:40.980459 00880000 ################################################################
2143 03:58:41.623634 00900000 ################################################################
2144 03:58:42.273832 00980000 ################################################################
2145 03:58:42.908329 00a00000 ################################################################
2146 03:58:43.585952 00a80000 ################################################################
2147 03:58:44.278687 00b00000 ################################################################
2148 03:58:44.968367 00b80000 ################################################################
2149 03:58:45.656504 00c00000 ################################################################
2150 03:58:46.350817 00c80000 ################################################################
2151 03:58:47.031612 00d00000 ################################################################
2152 03:58:47.713830 00d80000 ################################################################
2153 03:58:48.405363 00e00000 ################################################################
2154 03:58:49.102855 00e80000 ################################################################
2155 03:58:49.778020 00f00000 ################################################################
2156 03:58:50.447777 00f80000 ################################################################
2157 03:58:51.120605 01000000 ################################################################
2158 03:58:51.807036 01080000 ################################################################
2159 03:58:52.471625 01100000 ################################################################
2160 03:58:53.004140 01180000 ################################################################
2161 03:58:53.577967 01200000 ################################################################
2162 03:58:54.188925 01280000 ################################################################
2163 03:58:54.796498 01300000 ################################################################
2164 03:58:55.366184 01380000 ################################################################
2165 03:58:55.933943 01400000 ################################################################
2166 03:58:56.482216 01480000 ################################################################
2167 03:58:57.001478 01500000 ################################################################
2168 03:58:57.518201 01580000 ################################################################
2169 03:58:58.054792 01600000 ################################################################
2170 03:58:58.676902 01680000 ################################################################
2171 03:58:59.327559 01700000 ################################################################
2172 03:58:59.997260 01780000 ################################################################
2173 03:59:00.666482 01800000 ################################################################
2174 03:59:01.268682 01880000 ################################################################
2175 03:59:01.857474 01900000 ################################################################
2176 03:59:02.453379 01980000 ################################################################
2177 03:59:03.031644 01a00000 ################################################################
2178 03:59:03.638930 01a80000 ################################################################
2179 03:59:04.264426 01b00000 ################################################################
2180 03:59:04.888836 01b80000 ################################################################
2181 03:59:05.576467 01c00000 ################################################################
2182 03:59:06.273025 01c80000 ################################################################
2183 03:59:06.965765 01d00000 ################################################################
2184 03:59:07.655777 01d80000 ################################################################
2185 03:59:08.353997 01e00000 ################################################################
2186 03:59:09.054431 01e80000 ################################################################
2187 03:59:09.755089 01f00000 ################################################################
2188 03:59:10.443991 01f80000 ################################################################
2189 03:59:11.123026 02000000 ################################################################
2190 03:59:11.815769 02080000 ################################################################
2191 03:59:12.505180 02100000 ################################################################
2192 03:59:13.180976 02180000 ################################################################
2193 03:59:13.351293 02200000 ################ done.
2194 03:59:13.354495 Sending tftp read request... done.
2195 03:59:13.357847 Waiting for the transfer...
2196 03:59:13.358280 00000000 # done.
2197 03:59:13.367911 Command line loaded dynamically from TFTP file: 6750553/tftp-deploy-jnz2icgk/kernel/cmdline
2198 03:59:13.381016 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2199 03:59:13.390855 Shutting down all USB controllers.
2200 03:59:13.391430 Removing current net device
2201 03:59:13.394496 Finalizing coreboot
2202 03:59:13.400848 Exiting depthcharge with code 4 at timestamp: 61282224
2203 03:59:13.401428
2204 03:59:13.401858 Starting kernel ...
2205 03:59:13.402217
2206 03:59:13.402555
2207 03:59:13.403572 end: 2.2.4 bootloader-commands (duration 00:00:53) [common]
2208 03:59:13.404107 start: 2.2.5 auto-login-action (timeout 00:03:51) [common]
2209 03:59:13.404530 Setting prompt string to ['Linux version [0-9]']
2210 03:59:13.404920 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2211 03:59:13.405318 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2213 04:03:04.405143 end: 2.2.5 auto-login-action (duration 00:03:51) [common]
2215 04:03:04.407643 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 231 seconds'
2217 04:03:04.408803 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2220 04:03:04.409208 end: 2 depthcharge-action (duration 00:05:00) [common]
2222 04:03:04.409413 Cleaning after the job
2223 04:03:04.409500 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6750553/tftp-deploy-jnz2icgk/ramdisk
2224 04:03:04.411907 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6750553/tftp-deploy-jnz2icgk/kernel
2225 04:03:04.412450 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6750553/tftp-deploy-jnz2icgk/modules
2226 04:03:04.412696 start: 4.1 power-off (timeout 00:00:30) [common]
2227 04:03:04.412846 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
2228 04:03:04.433105 >> Command sent successfully.
2229 04:03:04.434952 Returned 0 in 0 seconds
2230 04:03:04.536102 end: 4.1 power-off (duration 00:00:00) [common]
2232 04:03:04.537508 start: 4.2 read-feedback (timeout 00:10:00) [common]
2233 04:03:04.538623 Listened to connection for namespace 'common' for up to 1s
2234 04:03:05.543483 Finalising connection for namespace 'common'
2235 04:03:05.544197 Disconnecting from shell: Finalise
2236 04:03:05.645796 end: 4.2 read-feedback (duration 00:00:01) [common]
2237 04:03:05.646439 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6750553
2238 04:03:05.673595 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6750553
2239 04:03:05.673753 JobError: Your job cannot terminate cleanly.