Boot log: asus-cx9400-volteer
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 01:57:22.223430 lava-dispatcher, installed at version: 2022.04
2 01:57:22.223619 start: 0 validate
3 01:57:22.223762 Start time: 2022-07-07 01:57:22.223754+00:00 (UTC)
4 01:57:22.223893 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:57:22.224024 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220624.0%2Fx86%2Frootfs.cpio.gz exists
6 01:57:22.519819 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:57:22.519997 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.9.196-8580-gf266375ffc61%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 01:57:22.804915 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:57:22.805151 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.9.196-8580-gf266375ffc61%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 01:57:23.101857 validate duration: 0.88
12 01:57:23.102136 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 01:57:23.102248 start: 1.1 download-retry (timeout 00:10:00) [common]
14 01:57:23.102348 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 01:57:23.102461 Not decompressing ramdisk as can be used compressed.
16 01:57:23.102546 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220624.0/x86/rootfs.cpio.gz
17 01:57:23.102615 saving as /var/lib/lava/dispatcher/tmp/6770226/tftp-deploy-lufwbhxc/ramdisk/rootfs.cpio.gz
18 01:57:23.102678 total size: 8415744 (8MB)
19 01:57:23.103874 progress 0% (0MB)
20 01:57:23.106169 progress 5% (0MB)
21 01:57:23.108435 progress 10% (0MB)
22 01:57:23.110609 progress 15% (1MB)
23 01:57:23.112797 progress 20% (1MB)
24 01:57:23.114924 progress 25% (2MB)
25 01:57:23.117073 progress 30% (2MB)
26 01:57:23.119097 progress 35% (2MB)
27 01:57:23.121229 progress 40% (3MB)
28 01:57:23.123430 progress 45% (3MB)
29 01:57:23.125606 progress 50% (4MB)
30 01:57:23.127709 progress 55% (4MB)
31 01:57:23.129930 progress 60% (4MB)
32 01:57:23.131962 progress 65% (5MB)
33 01:57:23.134237 progress 70% (5MB)
34 01:57:23.136453 progress 75% (6MB)
35 01:57:23.138820 progress 80% (6MB)
36 01:57:23.141024 progress 85% (6MB)
37 01:57:23.143126 progress 90% (7MB)
38 01:57:23.145168 progress 95% (7MB)
39 01:57:23.147273 progress 100% (8MB)
40 01:57:23.147568 8MB downloaded in 0.04s (178.81MB/s)
41 01:57:23.147758 end: 1.1.1 http-download (duration 00:00:00) [common]
43 01:57:23.148023 end: 1.1 download-retry (duration 00:00:00) [common]
44 01:57:23.148130 start: 1.2 download-retry (timeout 00:10:00) [common]
45 01:57:23.148260 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 01:57:23.148388 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.9.196-8580-gf266375ffc61/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 01:57:23.148457 saving as /var/lib/lava/dispatcher/tmp/6770226/tftp-deploy-lufwbhxc/kernel/bzImage
48 01:57:23.148519 total size: 7176128 (6MB)
49 01:57:23.148581 No compression specified
50 01:57:23.149732 progress 0% (0MB)
51 01:57:23.151580 progress 5% (0MB)
52 01:57:23.153510 progress 10% (0MB)
53 01:57:23.155459 progress 15% (1MB)
54 01:57:23.157362 progress 20% (1MB)
55 01:57:23.159252 progress 25% (1MB)
56 01:57:23.161136 progress 30% (2MB)
57 01:57:23.163006 progress 35% (2MB)
58 01:57:23.164828 progress 40% (2MB)
59 01:57:23.166607 progress 45% (3MB)
60 01:57:23.168418 progress 50% (3MB)
61 01:57:23.170248 progress 55% (3MB)
62 01:57:23.172063 progress 60% (4MB)
63 01:57:23.173856 progress 65% (4MB)
64 01:57:23.175629 progress 70% (4MB)
65 01:57:23.177476 progress 75% (5MB)
66 01:57:23.179299 progress 80% (5MB)
67 01:57:23.181116 progress 85% (5MB)
68 01:57:23.182929 progress 90% (6MB)
69 01:57:23.184752 progress 95% (6MB)
70 01:57:23.186448 progress 100% (6MB)
71 01:57:23.186783 6MB downloaded in 0.04s (178.88MB/s)
72 01:57:23.186974 end: 1.2.1 http-download (duration 00:00:00) [common]
74 01:57:23.187236 end: 1.2 download-retry (duration 00:00:00) [common]
75 01:57:23.187325 start: 1.3 download-retry (timeout 00:10:00) [common]
76 01:57:23.187414 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 01:57:23.187520 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.9.196-8580-gf266375ffc61/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 01:57:23.187589 saving as /var/lib/lava/dispatcher/tmp/6770226/tftp-deploy-lufwbhxc/modules/modules.tar
79 01:57:23.187651 total size: 54512 (0MB)
80 01:57:23.187745 Using unxz to decompress xz
81 01:57:23.191402 progress 60% (0MB)
82 01:57:23.191848 progress 100% (0MB)
83 01:57:23.195608 0MB downloaded in 0.01s (6.54MB/s)
84 01:57:23.195913 end: 1.3.1 http-download (duration 00:00:00) [common]
86 01:57:23.196185 end: 1.3 download-retry (duration 00:00:00) [common]
87 01:57:23.196321 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 01:57:23.196421 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 01:57:23.196560 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 01:57:23.196651 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 01:57:23.196835 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3
92 01:57:23.196976 makedir: /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin
93 01:57:23.197080 makedir: /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/tests
94 01:57:23.197168 makedir: /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/results
95 01:57:23.197295 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-add-keys
96 01:57:23.197521 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-add-sources
97 01:57:23.197716 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-background-process-start
98 01:57:23.197896 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-background-process-stop
99 01:57:23.198016 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-common-functions
100 01:57:23.198132 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-echo-ipv4
101 01:57:23.198249 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-install-packages
102 01:57:23.198365 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-installed-packages
103 01:57:23.198478 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-os-build
104 01:57:23.198593 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-probe-channel
105 01:57:23.198724 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-probe-ip
106 01:57:23.198854 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-target-ip
107 01:57:23.198995 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-target-mac
108 01:57:23.199107 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-target-storage
109 01:57:23.199225 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-test-case
110 01:57:23.199338 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-test-event
111 01:57:23.199465 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-test-feedback
112 01:57:23.199574 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-test-raise
113 01:57:23.199687 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-test-reference
114 01:57:23.199816 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-test-runner
115 01:57:23.199956 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-test-set
116 01:57:23.200097 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-test-shell
117 01:57:23.200224 Updating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-install-packages (oe)
118 01:57:23.200339 Updating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/bin/lava-installed-packages (oe)
119 01:57:23.200456 Creating /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/environment
120 01:57:23.200561 LAVA metadata
121 01:57:23.200650 - LAVA_JOB_ID=6770226
122 01:57:23.200731 - LAVA_DISPATCHER_IP=192.168.201.1
123 01:57:23.200840 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 01:57:23.200907 skipped lava-vland-overlay
125 01:57:23.201022 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 01:57:23.201130 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 01:57:23.201210 skipped lava-multinode-overlay
128 01:57:23.201318 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 01:57:23.201417 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 01:57:23.201497 Loading test definitions
131 01:57:23.201599 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 01:57:23.201693 Using /lava-6770226 at stage 0
133 01:57:23.201969 uuid=6770226_1.4.2.3.1 testdef=None
134 01:57:23.202061 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 01:57:23.202151 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 01:57:23.202664 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 01:57:23.202915 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 01:57:23.203499 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 01:57:23.203774 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 01:57:23.204349 runner path: /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/0/tests/0_dmesg test_uuid 6770226_1.4.2.3.1
143 01:57:23.204499 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 01:57:23.204779 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 01:57:23.204854 Using /lava-6770226 at stage 1
147 01:57:23.205151 uuid=6770226_1.4.2.3.5 testdef=None
148 01:57:23.205241 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 01:57:23.205330 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 01:57:23.205773 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 01:57:23.206080 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 01:57:23.206768 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 01:57:23.207041 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 01:57:23.207656 runner path: /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/1/tests/1_bootrr test_uuid 6770226_1.4.2.3.5
157 01:57:23.207839 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 01:57:23.208080 Creating lava-test-runner.conf files
160 01:57:23.208161 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/0 for stage 0
161 01:57:23.208259 - 0_dmesg
162 01:57:23.208337 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6770226/lava-overlay-avuxx4h3/lava-6770226/1 for stage 1
163 01:57:23.208420 - 1_bootrr
164 01:57:23.208566 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 01:57:23.208656 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 01:57:23.215642 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 01:57:23.215756 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 01:57:23.215847 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 01:57:23.215952 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 01:57:23.216043 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 01:57:23.402202 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 01:57:23.402543 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 01:57:23.402668 extracting modules file /var/lib/lava/dispatcher/tmp/6770226/tftp-deploy-lufwbhxc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6770226/extract-overlay-ramdisk-r9r_nfz9/ramdisk
174 01:57:23.407073 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 01:57:23.407194 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 01:57:23.407284 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6770226/compress-overlay-02125p25/overlay-1.4.2.4.tar.gz to ramdisk
177 01:57:23.407361 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6770226/compress-overlay-02125p25/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6770226/extract-overlay-ramdisk-r9r_nfz9/ramdisk
178 01:57:23.411387 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 01:57:23.411508 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 01:57:23.411603 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 01:57:23.411699 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 01:57:23.411782 Building ramdisk /var/lib/lava/dispatcher/tmp/6770226/extract-overlay-ramdisk-r9r_nfz9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6770226/extract-overlay-ramdisk-r9r_nfz9/ramdisk
183 01:57:23.476251 >> 48032 blocks
184 01:57:24.252652 rename /var/lib/lava/dispatcher/tmp/6770226/extract-overlay-ramdisk-r9r_nfz9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6770226/tftp-deploy-lufwbhxc/ramdisk/ramdisk.cpio.gz
185 01:57:24.253081 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 01:57:24.253230 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 01:57:24.253339 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 01:57:24.253447 No mkimage arch provided, not using FIT.
189 01:57:24.253549 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 01:57:24.253641 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 01:57:24.253753 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 01:57:24.253859 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 01:57:24.253944 No LXC device requested
194 01:57:24.254041 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 01:57:24.254140 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 01:57:24.254226 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 01:57:24.254311 Checking files for TFTP limit of 4294967296 bytes.
198 01:57:24.254743 end: 1 tftp-deploy (duration 00:00:01) [common]
199 01:57:24.254870 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 01:57:24.254990 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 01:57:24.255131 substitutions:
202 01:57:24.255205 - {DTB}: None
203 01:57:24.255277 - {INITRD}: 6770226/tftp-deploy-lufwbhxc/ramdisk/ramdisk.cpio.gz
204 01:57:24.255352 - {KERNEL}: 6770226/tftp-deploy-lufwbhxc/kernel/bzImage
205 01:57:24.255419 - {LAVA_MAC}: None
206 01:57:24.255482 - {PRESEED_CONFIG}: None
207 01:57:24.255542 - {PRESEED_LOCAL}: None
208 01:57:24.255608 - {RAMDISK}: 6770226/tftp-deploy-lufwbhxc/ramdisk/ramdisk.cpio.gz
209 01:57:24.255676 - {ROOT_PART}: None
210 01:57:24.255737 - {ROOT}: None
211 01:57:24.255795 - {SERVER_IP}: 192.168.201.1
212 01:57:24.255855 - {TEE}: None
213 01:57:24.255926 Parsed boot commands:
214 01:57:24.255986 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 01:57:24.256155 Parsed boot commands: tftpboot 192.168.201.1 6770226/tftp-deploy-lufwbhxc/kernel/bzImage 6770226/tftp-deploy-lufwbhxc/kernel/cmdline 6770226/tftp-deploy-lufwbhxc/ramdisk/ramdisk.cpio.gz
216 01:57:24.256262 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 01:57:24.256398 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 01:57:24.256542 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 01:57:24.256654 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 01:57:24.256734 Not connected, no need to disconnect.
221 01:57:24.256819 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 01:57:24.256923 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 01:57:24.257006 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-10'
224 01:57:24.259684 Setting prompt string to ['lava-test: # ']
225 01:57:24.259991 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 01:57:24.260107 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 01:57:24.260213 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 01:57:24.260325 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 01:57:24.260531 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
230 01:57:24.279752 >> Command sent successfully.
231 01:57:24.281620 Returned 0 in 0 seconds
232 01:57:24.382374 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 01:57:24.382968 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 01:57:24.383078 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 01:57:24.383172 Setting prompt string to 'Starting depthcharge on Voema...'
237 01:57:24.383247 Changing prompt to 'Starting depthcharge on Voema...'
238 01:57:24.383323 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 01:57:24.383594 [Enter `^Ec?' for help]
240 01:57:32.101347
241 01:57:32.101540
242 01:57:32.111025 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 01:57:32.117620 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
244 01:57:32.121636 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 01:57:32.124629 CPU: AES supported, TXT NOT supported, VT supported
246 01:57:32.131480 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 01:57:32.134838 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 01:57:32.141434 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 01:57:32.144859 VBOOT: Loading verstage.
250 01:57:32.148399 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
251 01:57:32.155176 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 01:57:32.158025 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 01:57:32.168593 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 01:57:32.174772 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 01:57:32.174856
256 01:57:32.174924
257 01:57:32.185375 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 01:57:32.201913 Probing TPM: . done!
259 01:57:32.205540 TPM ready after 0 ms
260 01:57:32.208865 Connected to device vid:did:rid of 1ae0:0028:00
261 01:57:32.220111 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
262 01:57:32.226607 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 01:57:32.229976 Initialized TPM device CR50 revision 0
264 01:57:32.287268 tlcl_send_startup: Startup return code is 0
265 01:57:32.287407 TPM: setup succeeded
266 01:57:32.302713 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 01:57:32.317028 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 01:57:32.330059 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 01:57:32.339560 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 01:57:32.343262 Chrome EC: UHEPI supported
271 01:57:32.346812 Phase 1
272 01:57:32.349633 FMAP: area GBB found @ 1805000 (458752 bytes)
273 01:57:32.359673 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 01:57:32.366485 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 01:57:32.373103 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 01:57:32.379842 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 01:57:32.383227 Recovery requested (1009000e)
278 01:57:32.386405 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 01:57:32.397910 tlcl_extend: response is 0
280 01:57:32.404540 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 01:57:32.414382 tlcl_extend: response is 0
282 01:57:32.421675 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 01:57:32.427720 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 01:57:32.434290 BS: verstage times (exec / console): total (unknown) / 142 ms
285 01:57:32.434375
286 01:57:32.434443
287 01:57:32.447589 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 01:57:32.454169 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 01:57:32.457554 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 01:57:32.460701 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 01:57:32.467420 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 01:57:32.470877 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 01:57:32.474201 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 01:57:32.477457 TCO_STS: 0000 0000
295 01:57:32.480778 GEN_PMCON: d0015038 00002200
296 01:57:32.484208 GBLRST_CAUSE: 00000000 00000000
297 01:57:32.487604 HPR_CAUSE0: 00000000
298 01:57:32.487681 prev_sleep_state 5
299 01:57:32.490773 Boot Count incremented to 5738
300 01:57:32.497186 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 01:57:32.503698 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 01:57:32.513797 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 01:57:32.520405 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 01:57:32.523725 Chrome EC: UHEPI supported
305 01:57:32.530519 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 01:57:32.541609 Probing TPM: done!
307 01:57:32.548091 Connected to device vid:did:rid of 1ae0:0028:00
308 01:57:32.558234 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
309 01:57:32.561455 Initialized TPM device CR50 revision 0
310 01:57:32.576108 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 01:57:32.582679 MRC: Hash idx 0x100b comparison successful.
312 01:57:32.585808 MRC cache found, size faa8
313 01:57:32.585895 bootmode is set to: 2
314 01:57:32.589148 SPD index = 2
315 01:57:32.595797 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 01:57:32.599068 SPD: module type is LPDDR4X
317 01:57:32.602419 SPD: module part number is MT53D1G64D4NW-046
318 01:57:32.609079 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
319 01:57:32.612399 SPD: device width 16 bits, bus width 16 bits
320 01:57:32.619272 SPD: module size is 2048 MB (per channel)
321 01:57:33.049638 CBMEM:
322 01:57:33.052765 IMD: root @ 0x76fff000 254 entries.
323 01:57:33.056191 IMD: root @ 0x76ffec00 62 entries.
324 01:57:33.059554 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 01:57:33.066170 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 01:57:33.069322 External stage cache:
327 01:57:33.072709 IMD: root @ 0x7b3ff000 254 entries.
328 01:57:33.075606 IMD: root @ 0x7b3fec00 62 entries.
329 01:57:33.091266 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 01:57:33.097386 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 01:57:33.104093 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 01:57:33.117913 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 01:57:33.124480 cse_lite: Skip switching to RW in the recovery path
334 01:57:33.124564 8 DIMMs found
335 01:57:33.127731 SMM Memory Map
336 01:57:33.131055 SMRAM : 0x7b000000 0x800000
337 01:57:33.134309 Subregion 0: 0x7b000000 0x200000
338 01:57:33.137605 Subregion 1: 0x7b200000 0x200000
339 01:57:33.140898 Subregion 2: 0x7b400000 0x400000
340 01:57:33.141019 top_of_ram = 0x77000000
341 01:57:33.147513 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 01:57:33.154294 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 01:57:33.157613 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 01:57:33.164202 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 01:57:33.170967 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 01:57:33.177027 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 01:57:33.187604 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 01:57:33.194332 Processing 211 relocs. Offset value of 0x74c0b000
349 01:57:33.201020 BS: romstage times (exec / console): total (unknown) / 276 ms
350 01:57:33.206570
351 01:57:33.206670
352 01:57:33.216746 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 01:57:33.220124 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 01:57:33.230153 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 01:57:33.236693 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 01:57:33.243401 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 01:57:33.249922 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 01:57:33.293218 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 01:57:33.299884 Processing 5008 relocs. Offset value of 0x75d98000
360 01:57:33.303149 BS: postcar times (exec / console): total (unknown) / 59 ms
361 01:57:33.306687
362 01:57:33.306780
363 01:57:33.316423 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 01:57:33.316531 Normal boot
365 01:57:33.319770 FW_CONFIG value is 0x804c02
366 01:57:33.323083 PCI: 00:07.0 disabled by fw_config
367 01:57:33.326339 PCI: 00:07.1 disabled by fw_config
368 01:57:33.332860 PCI: 00:0d.2 disabled by fw_config
369 01:57:33.336208 PCI: 00:1c.7 disabled by fw_config
370 01:57:33.339622 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 01:57:33.346253 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 01:57:33.352881 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 01:57:33.356196 GENERIC: 0.0 disabled by fw_config
374 01:57:33.359588 GENERIC: 1.0 disabled by fw_config
375 01:57:33.362579 fw_config match found: DB_USB=USB3_ACTIVE
376 01:57:33.365887 fw_config match found: DB_USB=USB3_ACTIVE
377 01:57:33.373018 fw_config match found: DB_USB=USB3_ACTIVE
378 01:57:33.375823 fw_config match found: DB_USB=USB3_ACTIVE
379 01:57:33.379324 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 01:57:33.389513 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 01:57:33.396119 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 01:57:33.402681 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 01:57:33.409188 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 01:57:33.412454 microcode: Update skipped, already up-to-date
385 01:57:33.418967 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 01:57:33.447200 Detected 4 core, 8 thread CPU.
387 01:57:33.450580 Setting up SMI for CPU
388 01:57:33.453969 IED base = 0x7b400000
389 01:57:33.457064 IED size = 0x00400000
390 01:57:33.457293 Will perform SMM setup.
391 01:57:33.463605 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
392 01:57:33.470330 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 01:57:33.476862 Processing 16 relocs. Offset value of 0x00030000
394 01:57:33.480283 Attempting to start 7 APs
395 01:57:33.483718 Waiting for 10ms after sending INIT.
396 01:57:33.499516 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
397 01:57:33.499751 done.
398 01:57:33.502805 AP: slot 4 apic_id 7.
399 01:57:33.506124 AP: slot 5 apic_id 6.
400 01:57:33.506357 AP: slot 2 apic_id 2.
401 01:57:33.509317 AP: slot 6 apic_id 3.
402 01:57:33.512805 AP: slot 3 apic_id 5.
403 01:57:33.515595 Waiting for 2nd SIPI to complete...done.
404 01:57:33.518975 AP: slot 7 apic_id 4.
405 01:57:33.526022 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 01:57:33.532501 Processing 13 relocs. Offset value of 0x00038000
407 01:57:33.535723 Unable to locate Global NVS
408 01:57:33.542414 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 01:57:33.545705 Installing permanent SMM handler to 0x7b000000
410 01:57:33.555728 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 01:57:33.558913 Processing 794 relocs. Offset value of 0x7b010000
412 01:57:33.568849 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 01:57:33.572209 Processing 13 relocs. Offset value of 0x7b008000
414 01:57:33.578491 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 01:57:33.585012 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 01:57:33.588506 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 01:57:33.595340 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 01:57:33.602162 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 01:57:33.608808 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 01:57:33.615375 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 01:57:33.618257 Unable to locate Global NVS
422 01:57:33.625004 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 01:57:33.628306 Clearing SMI status registers
424 01:57:33.628525 SMI_STS: PM1
425 01:57:33.631755 PM1_STS: PWRBTN
426 01:57:33.637831 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 01:57:33.641295 In relocation handler: CPU 0
428 01:57:33.644674 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 01:57:33.651485 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 01:57:33.654815 Relocation complete.
431 01:57:33.661287 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 01:57:33.664170 In relocation handler: CPU 1
433 01:57:33.668017 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 01:57:33.668095 Relocation complete.
435 01:57:33.677646 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
436 01:57:33.680857 In relocation handler: CPU 2
437 01:57:33.684418 New SMBASE=0x7afff800 IEDBASE=0x7b400000
438 01:57:33.687645 Writing SMRR. base = 0x7b000006, mask=0xff800c00
439 01:57:33.691032 Relocation complete.
440 01:57:33.697649 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
441 01:57:33.701092 In relocation handler: CPU 6
442 01:57:33.704445 New SMBASE=0x7affe800 IEDBASE=0x7b400000
443 01:57:33.707847 Relocation complete.
444 01:57:33.714011 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
445 01:57:33.717294 In relocation handler: CPU 7
446 01:57:33.720869 New SMBASE=0x7affe400 IEDBASE=0x7b400000
447 01:57:33.727614 Writing SMRR. base = 0x7b000006, mask=0xff800c00
448 01:57:33.727786 Relocation complete.
449 01:57:33.737411 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
450 01:57:33.737574 In relocation handler: CPU 3
451 01:57:33.743994 New SMBASE=0x7afff400 IEDBASE=0x7b400000
452 01:57:33.744161 Relocation complete.
453 01:57:33.753521 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
454 01:57:33.753693 In relocation handler: CPU 5
455 01:57:33.760443 New SMBASE=0x7affec00 IEDBASE=0x7b400000
456 01:57:33.763944 Writing SMRR. base = 0x7b000006, mask=0xff800c00
457 01:57:33.767122 Relocation complete.
458 01:57:33.773705 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
459 01:57:33.777022 In relocation handler: CPU 4
460 01:57:33.779953 New SMBASE=0x7afff000 IEDBASE=0x7b400000
461 01:57:33.783183 Relocation complete.
462 01:57:33.783364 Initializing CPU #0
463 01:57:33.786776 CPU: vendor Intel device 806c1
464 01:57:33.793271 CPU: family 06, model 8c, stepping 01
465 01:57:33.793457 Clearing out pending MCEs
466 01:57:33.796675 Setting up local APIC...
467 01:57:33.800044 apic_id: 0x00 done.
468 01:57:33.803441 Turbo is available but hidden
469 01:57:33.806895 Turbo is available and visible
470 01:57:33.809742 microcode: Update skipped, already up-to-date
471 01:57:33.812927 CPU #0 initialized
472 01:57:33.813118 Initializing CPU #2
473 01:57:33.816990 Initializing CPU #6
474 01:57:33.819784 CPU: vendor Intel device 806c1
475 01:57:33.823036 CPU: family 06, model 8c, stepping 01
476 01:57:33.826655 CPU: vendor Intel device 806c1
477 01:57:33.830087 CPU: family 06, model 8c, stepping 01
478 01:57:33.833313 Clearing out pending MCEs
479 01:57:33.836473 Clearing out pending MCEs
480 01:57:33.839784 Setting up local APIC...
481 01:57:33.839965 Initializing CPU #5
482 01:57:33.843055 Initializing CPU #4
483 01:57:33.846409 CPU: vendor Intel device 806c1
484 01:57:33.849650 CPU: family 06, model 8c, stepping 01
485 01:57:33.852884 CPU: vendor Intel device 806c1
486 01:57:33.856325 CPU: family 06, model 8c, stepping 01
487 01:57:33.859754 Clearing out pending MCEs
488 01:57:33.862742 Clearing out pending MCEs
489 01:57:33.862910 Setting up local APIC...
490 01:57:33.866647 Initializing CPU #7
491 01:57:33.869737 Initializing CPU #3
492 01:57:33.869924 CPU: vendor Intel device 806c1
493 01:57:33.873658 CPU: family 06, model 8c, stepping 01
494 01:57:33.877537 CPU: vendor Intel device 806c1
495 01:57:33.880362 CPU: family 06, model 8c, stepping 01
496 01:57:33.883823 Clearing out pending MCEs
497 01:57:33.887214 Clearing out pending MCEs
498 01:57:33.890613 Setting up local APIC...
499 01:57:33.893716 Setting up local APIC...
500 01:57:33.893879 apic_id: 0x02 done.
501 01:57:33.897044 Setting up local APIC...
502 01:57:33.900750 Setting up local APIC...
503 01:57:33.900913 apic_id: 0x06 done.
504 01:57:33.904083 apic_id: 0x07 done.
505 01:57:33.907411 microcode: Update skipped, already up-to-date
506 01:57:33.913907 microcode: Update skipped, already up-to-date
507 01:57:33.914069 CPU #5 initialized
508 01:57:33.917295 CPU #4 initialized
509 01:57:33.920770 apic_id: 0x05 done.
510 01:57:33.920921 apic_id: 0x04 done.
511 01:57:33.927485 microcode: Update skipped, already up-to-date
512 01:57:33.930648 microcode: Update skipped, already up-to-date
513 01:57:33.933938 CPU #3 initialized
514 01:57:33.934095 CPU #7 initialized
515 01:57:33.937385 Initializing CPU #1
516 01:57:33.937545 apic_id: 0x03 done.
517 01:57:33.943396 microcode: Update skipped, already up-to-date
518 01:57:33.946858 microcode: Update skipped, already up-to-date
519 01:57:33.950207 CPU #2 initialized
520 01:57:33.950394 CPU #6 initialized
521 01:57:33.953590 CPU: vendor Intel device 806c1
522 01:57:33.956863 CPU: family 06, model 8c, stepping 01
523 01:57:33.960170 Clearing out pending MCEs
524 01:57:33.963534 Setting up local APIC...
525 01:57:33.966801 apic_id: 0x01 done.
526 01:57:33.970022 microcode: Update skipped, already up-to-date
527 01:57:33.973393 CPU #1 initialized
528 01:57:33.977048 bsp_do_flight_plan done after 457 msecs.
529 01:57:33.980047 CPU: frequency set to 4400 MHz
530 01:57:33.980282 Enabling SMIs.
531 01:57:33.986834 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
532 01:57:34.003930 SATAXPCIE1 indicates PCIe NVMe is present
533 01:57:34.007339 Probing TPM: done!
534 01:57:34.010564 Connected to device vid:did:rid of 1ae0:0028:00
535 01:57:34.020881 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
536 01:57:34.024284 Initialized TPM device CR50 revision 0
537 01:57:34.027602 Enabling S0i3.4
538 01:57:34.034348 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 01:57:34.037611 Found a VBT of 8704 bytes after decompression
540 01:57:34.044415 cse_lite: CSE RO boot. HybridStorageMode disabled
541 01:57:34.050976 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 01:57:34.126411 FSPS returned 0
543 01:57:34.129814 Executing Phase 1 of FspMultiPhaseSiInit
544 01:57:34.139896 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 01:57:34.143268 port C0 DISC req: usage 1 usb3 1 usb2 5
546 01:57:34.146529 Raw Buffer output 0 00000511
547 01:57:34.149926 Raw Buffer output 1 00000000
548 01:57:34.153757 pmc_send_ipc_cmd succeeded
549 01:57:34.159926 port C1 DISC req: usage 1 usb3 2 usb2 3
550 01:57:34.160121 Raw Buffer output 0 00000321
551 01:57:34.163113 Raw Buffer output 1 00000000
552 01:57:34.167665 pmc_send_ipc_cmd succeeded
553 01:57:34.172790 Detected 4 core, 8 thread CPU.
554 01:57:34.175842 Detected 4 core, 8 thread CPU.
555 01:57:34.376350 Display FSP Version Info HOB
556 01:57:34.379171 Reference Code - CPU = a.0.4c.31
557 01:57:34.382680 uCode Version = 0.0.0.86
558 01:57:34.385737 TXT ACM version = ff.ff.ff.ffff
559 01:57:34.389196 Reference Code - ME = a.0.4c.31
560 01:57:34.392513 MEBx version = 0.0.0.0
561 01:57:34.395879 ME Firmware Version = Consumer SKU
562 01:57:34.399375 Reference Code - PCH = a.0.4c.31
563 01:57:34.402497 PCH-CRID Status = Disabled
564 01:57:34.405802 PCH-CRID Original Value = ff.ff.ff.ffff
565 01:57:34.409191 PCH-CRID New Value = ff.ff.ff.ffff
566 01:57:34.412631 OPROM - RST - RAID = ff.ff.ff.ffff
567 01:57:34.415349 PCH Hsio Version = 4.0.0.0
568 01:57:34.418785 Reference Code - SA - System Agent = a.0.4c.31
569 01:57:34.422214 Reference Code - MRC = 2.0.0.1
570 01:57:34.425716 SA - PCIe Version = a.0.4c.31
571 01:57:34.428607 SA-CRID Status = Disabled
572 01:57:34.431980 SA-CRID Original Value = 0.0.0.1
573 01:57:34.435365 SA-CRID New Value = 0.0.0.1
574 01:57:34.438728 OPROM - VBIOS = ff.ff.ff.ffff
575 01:57:34.442065 IO Manageability Engine FW Version = 11.1.4.0
576 01:57:34.445534 PHY Build Version = 0.0.0.e0
577 01:57:34.448854 Thunderbolt(TM) FW Version = 0.0.0.0
578 01:57:34.455808 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 01:57:34.459077 ITSS IRQ Polarities Before:
580 01:57:34.459204 IPC0: 0xffffffff
581 01:57:34.462565 IPC1: 0xffffffff
582 01:57:34.462694 IPC2: 0xffffffff
583 01:57:34.465816 IPC3: 0xffffffff
584 01:57:34.469162 ITSS IRQ Polarities After:
585 01:57:34.469293 IPC0: 0xffffffff
586 01:57:34.472610 IPC1: 0xffffffff
587 01:57:34.472749 IPC2: 0xffffffff
588 01:57:34.476057 IPC3: 0xffffffff
589 01:57:34.479366 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 01:57:34.492198 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 01:57:34.502178 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 01:57:34.515471 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 01:57:34.522430 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
594 01:57:34.522546 Enumerating buses...
595 01:57:34.528747 Show all devs... Before device enumeration.
596 01:57:34.532045 Root Device: enabled 1
597 01:57:34.532159 DOMAIN: 0000: enabled 1
598 01:57:34.535282 CPU_CLUSTER: 0: enabled 1
599 01:57:34.538381 PCI: 00:00.0: enabled 1
600 01:57:34.541826 PCI: 00:02.0: enabled 1
601 01:57:34.541940 PCI: 00:04.0: enabled 1
602 01:57:34.545312 PCI: 00:05.0: enabled 1
603 01:57:34.548483 PCI: 00:06.0: enabled 0
604 01:57:34.548597 PCI: 00:07.0: enabled 0
605 01:57:34.551931 PCI: 00:07.1: enabled 0
606 01:57:34.555367 PCI: 00:07.2: enabled 0
607 01:57:34.558585 PCI: 00:07.3: enabled 0
608 01:57:34.558700 PCI: 00:08.0: enabled 1
609 01:57:34.561851 PCI: 00:09.0: enabled 0
610 01:57:34.565318 PCI: 00:0a.0: enabled 0
611 01:57:34.568562 PCI: 00:0d.0: enabled 1
612 01:57:34.568677 PCI: 00:0d.1: enabled 0
613 01:57:34.572017 PCI: 00:0d.2: enabled 0
614 01:57:34.574964 PCI: 00:0d.3: enabled 0
615 01:57:34.578192 PCI: 00:0e.0: enabled 0
616 01:57:34.578315 PCI: 00:10.2: enabled 1
617 01:57:34.581537 PCI: 00:10.6: enabled 0
618 01:57:34.584669 PCI: 00:10.7: enabled 0
619 01:57:34.588197 PCI: 00:12.0: enabled 0
620 01:57:34.588312 PCI: 00:12.6: enabled 0
621 01:57:34.591506 PCI: 00:13.0: enabled 0
622 01:57:34.595039 PCI: 00:14.0: enabled 1
623 01:57:34.595154 PCI: 00:14.1: enabled 0
624 01:57:34.598284 PCI: 00:14.2: enabled 1
625 01:57:34.601551 PCI: 00:14.3: enabled 1
626 01:57:34.604826 PCI: 00:15.0: enabled 1
627 01:57:34.604940 PCI: 00:15.1: enabled 1
628 01:57:34.608088 PCI: 00:15.2: enabled 1
629 01:57:34.611482 PCI: 00:15.3: enabled 1
630 01:57:34.614891 PCI: 00:16.0: enabled 1
631 01:57:34.615005 PCI: 00:16.1: enabled 0
632 01:57:34.618161 PCI: 00:16.2: enabled 0
633 01:57:34.621617 PCI: 00:16.3: enabled 0
634 01:57:34.624972 PCI: 00:16.4: enabled 0
635 01:57:34.625086 PCI: 00:16.5: enabled 0
636 01:57:34.628367 PCI: 00:17.0: enabled 1
637 01:57:34.631469 PCI: 00:19.0: enabled 0
638 01:57:34.634606 PCI: 00:19.1: enabled 1
639 01:57:34.634720 PCI: 00:19.2: enabled 0
640 01:57:34.637867 PCI: 00:1c.0: enabled 1
641 01:57:34.641443 PCI: 00:1c.1: enabled 0
642 01:57:34.641558 PCI: 00:1c.2: enabled 0
643 01:57:34.644698 PCI: 00:1c.3: enabled 0
644 01:57:34.647949 PCI: 00:1c.4: enabled 0
645 01:57:34.651529 PCI: 00:1c.5: enabled 0
646 01:57:34.651632 PCI: 00:1c.6: enabled 1
647 01:57:34.654828 PCI: 00:1c.7: enabled 0
648 01:57:34.657888 PCI: 00:1d.0: enabled 1
649 01:57:34.661436 PCI: 00:1d.1: enabled 0
650 01:57:34.661539 PCI: 00:1d.2: enabled 1
651 01:57:34.664516 PCI: 00:1d.3: enabled 0
652 01:57:34.668059 PCI: 00:1e.0: enabled 1
653 01:57:34.671415 PCI: 00:1e.1: enabled 0
654 01:57:34.671518 PCI: 00:1e.2: enabled 1
655 01:57:34.674775 PCI: 00:1e.3: enabled 1
656 01:57:34.678243 PCI: 00:1f.0: enabled 1
657 01:57:34.678343 PCI: 00:1f.1: enabled 0
658 01:57:34.681513 PCI: 00:1f.2: enabled 1
659 01:57:34.684865 PCI: 00:1f.3: enabled 1
660 01:57:34.687876 PCI: 00:1f.4: enabled 0
661 01:57:34.687981 PCI: 00:1f.5: enabled 1
662 01:57:34.691090 PCI: 00:1f.6: enabled 0
663 01:57:34.694543 PCI: 00:1f.7: enabled 0
664 01:57:34.698081 APIC: 00: enabled 1
665 01:57:34.698186 GENERIC: 0.0: enabled 1
666 01:57:34.700888 GENERIC: 0.0: enabled 1
667 01:57:34.704240 GENERIC: 1.0: enabled 1
668 01:57:34.704355 GENERIC: 0.0: enabled 1
669 01:57:34.707657 GENERIC: 1.0: enabled 1
670 01:57:34.710879 USB0 port 0: enabled 1
671 01:57:34.714259 GENERIC: 0.0: enabled 1
672 01:57:34.714344 USB0 port 0: enabled 1
673 01:57:34.717843 GENERIC: 0.0: enabled 1
674 01:57:34.720813 I2C: 00:1a: enabled 1
675 01:57:34.720899 I2C: 00:31: enabled 1
676 01:57:34.724091 I2C: 00:32: enabled 1
677 01:57:34.727454 I2C: 00:10: enabled 1
678 01:57:34.730893 I2C: 00:15: enabled 1
679 01:57:34.730977 GENERIC: 0.0: enabled 0
680 01:57:34.733831 GENERIC: 1.0: enabled 0
681 01:57:34.737713 GENERIC: 0.0: enabled 1
682 01:57:34.737798 SPI: 00: enabled 1
683 01:57:34.740657 SPI: 00: enabled 1
684 01:57:34.743985 PNP: 0c09.0: enabled 1
685 01:57:34.744070 GENERIC: 0.0: enabled 1
686 01:57:34.747440 USB3 port 0: enabled 1
687 01:57:34.750903 USB3 port 1: enabled 1
688 01:57:34.750987 USB3 port 2: enabled 0
689 01:57:34.754247 USB3 port 3: enabled 0
690 01:57:34.757090 USB2 port 0: enabled 0
691 01:57:34.760611 USB2 port 1: enabled 1
692 01:57:34.760696 USB2 port 2: enabled 1
693 01:57:34.764007 USB2 port 3: enabled 0
694 01:57:34.767124 USB2 port 4: enabled 1
695 01:57:34.767210 USB2 port 5: enabled 0
696 01:57:34.770554 USB2 port 6: enabled 0
697 01:57:34.773847 USB2 port 7: enabled 0
698 01:57:34.777322 USB2 port 8: enabled 0
699 01:57:34.777407 USB2 port 9: enabled 0
700 01:57:34.780174 USB3 port 0: enabled 0
701 01:57:34.783480 USB3 port 1: enabled 1
702 01:57:34.783567 USB3 port 2: enabled 0
703 01:57:34.786860 USB3 port 3: enabled 0
704 01:57:34.790443 GENERIC: 0.0: enabled 1
705 01:57:34.793635 GENERIC: 1.0: enabled 1
706 01:57:34.793722 APIC: 01: enabled 1
707 01:57:34.797110 APIC: 02: enabled 1
708 01:57:34.797196 APIC: 05: enabled 1
709 01:57:34.800720 APIC: 07: enabled 1
710 01:57:34.803393 APIC: 06: enabled 1
711 01:57:34.803477 APIC: 03: enabled 1
712 01:57:34.806746 APIC: 04: enabled 1
713 01:57:34.810288 Compare with tree...
714 01:57:34.810373 Root Device: enabled 1
715 01:57:34.813577 DOMAIN: 0000: enabled 1
716 01:57:34.816894 PCI: 00:00.0: enabled 1
717 01:57:34.819855 PCI: 00:02.0: enabled 1
718 01:57:34.819937 PCI: 00:04.0: enabled 1
719 01:57:34.823115 GENERIC: 0.0: enabled 1
720 01:57:34.826409 PCI: 00:05.0: enabled 1
721 01:57:34.829876 PCI: 00:06.0: enabled 0
722 01:57:34.833407 PCI: 00:07.0: enabled 0
723 01:57:34.836593 GENERIC: 0.0: enabled 1
724 01:57:34.836676 PCI: 00:07.1: enabled 0
725 01:57:34.839939 GENERIC: 1.0: enabled 1
726 01:57:34.843239 PCI: 00:07.2: enabled 0
727 01:57:34.846599 GENERIC: 0.0: enabled 1
728 01:57:34.849968 PCI: 00:07.3: enabled 0
729 01:57:34.850059 GENERIC: 1.0: enabled 1
730 01:57:34.853372 PCI: 00:08.0: enabled 1
731 01:57:34.856513 PCI: 00:09.0: enabled 0
732 01:57:34.859990 PCI: 00:0a.0: enabled 0
733 01:57:34.862836 PCI: 00:0d.0: enabled 1
734 01:57:34.862924 USB0 port 0: enabled 1
735 01:57:34.866172 USB3 port 0: enabled 1
736 01:57:34.869465 USB3 port 1: enabled 1
737 01:57:34.872850 USB3 port 2: enabled 0
738 01:57:34.876241 USB3 port 3: enabled 0
739 01:57:34.879747 PCI: 00:0d.1: enabled 0
740 01:57:34.879833 PCI: 00:0d.2: enabled 0
741 01:57:34.882590 GENERIC: 0.0: enabled 1
742 01:57:34.885953 PCI: 00:0d.3: enabled 0
743 01:57:34.889445 PCI: 00:0e.0: enabled 0
744 01:57:34.892778 PCI: 00:10.2: enabled 1
745 01:57:34.892866 PCI: 00:10.6: enabled 0
746 01:57:34.896398 PCI: 00:10.7: enabled 0
747 01:57:34.899233 PCI: 00:12.0: enabled 0
748 01:57:34.902583 PCI: 00:12.6: enabled 0
749 01:57:34.902676 PCI: 00:13.0: enabled 0
750 01:57:34.906008 PCI: 00:14.0: enabled 1
751 01:57:34.909504 USB0 port 0: enabled 1
752 01:57:34.912732 USB2 port 0: enabled 0
753 01:57:34.915625 USB2 port 1: enabled 1
754 01:57:34.919442 USB2 port 2: enabled 1
755 01:57:34.919548 USB2 port 3: enabled 0
756 01:57:34.922452 USB2 port 4: enabled 1
757 01:57:34.925832 USB2 port 5: enabled 0
758 01:57:34.929331 USB2 port 6: enabled 0
759 01:57:34.932137 USB2 port 7: enabled 0
760 01:57:34.935682 USB2 port 8: enabled 0
761 01:57:34.935767 USB2 port 9: enabled 0
762 01:57:34.939071 USB3 port 0: enabled 0
763 01:57:34.941996 USB3 port 1: enabled 1
764 01:57:34.945930 USB3 port 2: enabled 0
765 01:57:34.949138 USB3 port 3: enabled 0
766 01:57:34.949248 PCI: 00:14.1: enabled 0
767 01:57:34.952415 PCI: 00:14.2: enabled 1
768 01:57:34.955347 PCI: 00:14.3: enabled 1
769 01:57:34.958640 GENERIC: 0.0: enabled 1
770 01:57:34.962453 PCI: 00:15.0: enabled 1
771 01:57:34.962558 I2C: 00:1a: enabled 1
772 01:57:34.965332 I2C: 00:31: enabled 1
773 01:57:34.968729 I2C: 00:32: enabled 1
774 01:57:34.972034 PCI: 00:15.1: enabled 1
775 01:57:34.975316 I2C: 00:10: enabled 1
776 01:57:34.975410 PCI: 00:15.2: enabled 1
777 01:57:34.978858 PCI: 00:15.3: enabled 1
778 01:57:34.982340 PCI: 00:16.0: enabled 1
779 01:57:34.985497 PCI: 00:16.1: enabled 0
780 01:57:34.988923 PCI: 00:16.2: enabled 0
781 01:57:34.989067 PCI: 00:16.3: enabled 0
782 01:57:34.991816 PCI: 00:16.4: enabled 0
783 01:57:34.995268 PCI: 00:16.5: enabled 0
784 01:57:34.998937 PCI: 00:17.0: enabled 1
785 01:57:34.999047 PCI: 00:19.0: enabled 0
786 01:57:35.001992 PCI: 00:19.1: enabled 1
787 01:57:35.005374 I2C: 00:15: enabled 1
788 01:57:35.008798 PCI: 00:19.2: enabled 0
789 01:57:35.012243 PCI: 00:1d.0: enabled 1
790 01:57:35.012327 GENERIC: 0.0: enabled 1
791 01:57:35.015437 PCI: 00:1e.0: enabled 1
792 01:57:35.018676 PCI: 00:1e.1: enabled 0
793 01:57:35.021622 PCI: 00:1e.2: enabled 1
794 01:57:35.024917 SPI: 00: enabled 1
795 01:57:35.025000 PCI: 00:1e.3: enabled 1
796 01:57:35.028383 SPI: 00: enabled 1
797 01:57:35.031775 PCI: 00:1f.0: enabled 1
798 01:57:35.035072 PNP: 0c09.0: enabled 1
799 01:57:35.035155 PCI: 00:1f.1: enabled 0
800 01:57:35.038301 PCI: 00:1f.2: enabled 1
801 01:57:35.041551 GENERIC: 0.0: enabled 1
802 01:57:35.044765 GENERIC: 0.0: enabled 1
803 01:57:35.048253 GENERIC: 1.0: enabled 1
804 01:57:35.051610 PCI: 00:1f.3: enabled 1
805 01:57:35.051692 PCI: 00:1f.4: enabled 0
806 01:57:35.102797 PCI: 00:1f.5: enabled 1
807 01:57:35.102899 PCI: 00:1f.6: enabled 0
808 01:57:35.103607 PCI: 00:1f.7: enabled 0
809 01:57:35.103680 CPU_CLUSTER: 0: enabled 1
810 01:57:35.103748 APIC: 00: enabled 1
811 01:57:35.103811 APIC: 01: enabled 1
812 01:57:35.103879 APIC: 02: enabled 1
813 01:57:35.104206 APIC: 05: enabled 1
814 01:57:35.104279 APIC: 07: enabled 1
815 01:57:35.104345 APIC: 06: enabled 1
816 01:57:35.104431 APIC: 03: enabled 1
817 01:57:35.104519 APIC: 04: enabled 1
818 01:57:35.104588 Root Device scanning...
819 01:57:35.104661 scan_static_bus for Root Device
820 01:57:35.104718 DOMAIN: 0000 enabled
821 01:57:35.104988 CPU_CLUSTER: 0 enabled
822 01:57:35.105052 DOMAIN: 0000 scanning...
823 01:57:35.105108 PCI: pci_scan_bus for bus 00
824 01:57:35.105163 PCI: 00:00.0 [8086/0000] ops
825 01:57:35.133395 PCI: 00:00.0 [8086/9a12] enabled
826 01:57:35.133512 PCI: 00:02.0 [8086/0000] bus ops
827 01:57:35.133577 PCI: 00:02.0 [8086/9a40] enabled
828 01:57:35.133646 PCI: 00:04.0 [8086/0000] bus ops
829 01:57:35.133901 PCI: 00:04.0 [8086/9a03] enabled
830 01:57:35.133973 PCI: 00:05.0 [8086/9a19] enabled
831 01:57:35.134056 PCI: 00:07.0 [0000/0000] hidden
832 01:57:35.134129 PCI: 00:08.0 [8086/9a11] enabled
833 01:57:35.136730 PCI: 00:0a.0 [8086/9a0d] disabled
834 01:57:35.136815 PCI: 00:0d.0 [8086/0000] bus ops
835 01:57:35.140068 PCI: 00:0d.0 [8086/9a13] enabled
836 01:57:35.143479 PCI: 00:14.0 [8086/0000] bus ops
837 01:57:35.147050 PCI: 00:14.0 [8086/a0ed] enabled
838 01:57:35.150177 PCI: 00:14.2 [8086/a0ef] enabled
839 01:57:35.153537 PCI: 00:14.3 [8086/0000] bus ops
840 01:57:35.156328 PCI: 00:14.3 [8086/a0f0] enabled
841 01:57:35.159635 PCI: 00:15.0 [8086/0000] bus ops
842 01:57:35.162915 PCI: 00:15.0 [8086/a0e8] enabled
843 01:57:35.166305 PCI: 00:15.1 [8086/0000] bus ops
844 01:57:35.169657 PCI: 00:15.1 [8086/a0e9] enabled
845 01:57:35.173224 PCI: 00:15.2 [8086/0000] bus ops
846 01:57:35.176594 PCI: 00:15.2 [8086/a0ea] enabled
847 01:57:35.179960 PCI: 00:15.3 [8086/0000] bus ops
848 01:57:35.183415 PCI: 00:15.3 [8086/a0eb] enabled
849 01:57:35.186186 PCI: 00:16.0 [8086/0000] ops
850 01:57:35.189573 PCI: 00:16.0 [8086/a0e0] enabled
851 01:57:35.192850 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 01:57:35.196232 PCI: 00:19.0 [8086/0000] bus ops
853 01:57:35.199564 PCI: 00:19.0 [8086/a0c5] disabled
854 01:57:35.202905 PCI: 00:19.1 [8086/0000] bus ops
855 01:57:35.206232 PCI: 00:19.1 [8086/a0c6] enabled
856 01:57:35.209642 PCI: 00:1d.0 [8086/0000] bus ops
857 01:57:35.212871 PCI: 00:1d.0 [8086/a0b0] enabled
858 01:57:35.216302 PCI: 00:1e.0 [8086/0000] ops
859 01:57:35.219628 PCI: 00:1e.0 [8086/a0a8] enabled
860 01:57:35.222389 PCI: 00:1e.2 [8086/0000] bus ops
861 01:57:35.225840 PCI: 00:1e.2 [8086/a0aa] enabled
862 01:57:35.229352 PCI: 00:1e.3 [8086/0000] bus ops
863 01:57:35.232589 PCI: 00:1e.3 [8086/a0ab] enabled
864 01:57:35.235609 PCI: 00:1f.0 [8086/0000] bus ops
865 01:57:35.238802 PCI: 00:1f.0 [8086/a087] enabled
866 01:57:35.242159 RTC Init
867 01:57:35.245672 Set power on after power failure.
868 01:57:35.245755 Disabling Deep S3
869 01:57:35.248929 Disabling Deep S3
870 01:57:35.249049 Disabling Deep S4
871 01:57:35.252403 Disabling Deep S4
872 01:57:35.255778 Disabling Deep S5
873 01:57:35.255861 Disabling Deep S5
874 01:57:35.258632 PCI: 00:1f.2 [0000/0000] hidden
875 01:57:35.262011 PCI: 00:1f.3 [8086/0000] bus ops
876 01:57:35.265290 PCI: 00:1f.3 [8086/a0c8] enabled
877 01:57:35.268683 PCI: 00:1f.5 [8086/0000] bus ops
878 01:57:35.272063 PCI: 00:1f.5 [8086/a0a4] enabled
879 01:57:35.275546 PCI: Leftover static devices:
880 01:57:35.278867 PCI: 00:10.2
881 01:57:35.278950 PCI: 00:10.6
882 01:57:35.279017 PCI: 00:10.7
883 01:57:35.282235 PCI: 00:06.0
884 01:57:35.282320 PCI: 00:07.1
885 01:57:35.284984 PCI: 00:07.2
886 01:57:35.285068 PCI: 00:07.3
887 01:57:35.285135 PCI: 00:09.0
888 01:57:35.288778 PCI: 00:0d.1
889 01:57:35.288861 PCI: 00:0d.2
890 01:57:35.292066 PCI: 00:0d.3
891 01:57:35.292150 PCI: 00:0e.0
892 01:57:35.292216 PCI: 00:12.0
893 01:57:35.297598 PCI: 00:12.6
894 01:57:35.297682 PCI: 00:13.0
895 01:57:35.298603 PCI: 00:14.1
896 01:57:35.298686 PCI: 00:16.1
897 01:57:35.301592 PCI: 00:16.2
898 01:57:35.301675 PCI: 00:16.3
899 01:57:35.301741 PCI: 00:16.4
900 01:57:35.304957 PCI: 00:16.5
901 01:57:35.305054 PCI: 00:17.0
902 01:57:35.308562 PCI: 00:19.2
903 01:57:35.308646 PCI: 00:1e.1
904 01:57:35.308711 PCI: 00:1f.1
905 01:57:35.311886 PCI: 00:1f.4
906 01:57:35.311970 PCI: 00:1f.6
907 01:57:35.314891 PCI: 00:1f.7
908 01:57:35.318183 PCI: Check your devicetree.cb.
909 01:57:35.318268 PCI: 00:02.0 scanning...
910 01:57:35.324870 scan_generic_bus for PCI: 00:02.0
911 01:57:35.328293 scan_generic_bus for PCI: 00:02.0 done
912 01:57:35.331683 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 01:57:35.334453 PCI: 00:04.0 scanning...
914 01:57:35.337814 scan_generic_bus for PCI: 00:04.0
915 01:57:35.341304 GENERIC: 0.0 enabled
916 01:57:35.347922 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 01:57:35.351253 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 01:57:35.354847 PCI: 00:0d.0 scanning...
919 01:57:35.358032 scan_static_bus for PCI: 00:0d.0
920 01:57:35.358115 USB0 port 0 enabled
921 01:57:35.360932 USB0 port 0 scanning...
922 01:57:35.364382 scan_static_bus for USB0 port 0
923 01:57:35.367627 USB3 port 0 enabled
924 01:57:35.367711 USB3 port 1 enabled
925 01:57:35.370953 USB3 port 2 disabled
926 01:57:35.374314 USB3 port 3 disabled
927 01:57:35.377674 USB3 port 0 scanning...
928 01:57:35.381168 scan_static_bus for USB3 port 0
929 01:57:35.384577 scan_static_bus for USB3 port 0 done
930 01:57:35.387494 scan_bus: bus USB3 port 0 finished in 6 msecs
931 01:57:35.390831 USB3 port 1 scanning...
932 01:57:35.394476 scan_static_bus for USB3 port 1
933 01:57:35.397679 scan_static_bus for USB3 port 1 done
934 01:57:35.400498 scan_bus: bus USB3 port 1 finished in 6 msecs
935 01:57:35.407571 scan_static_bus for USB0 port 0 done
936 01:57:35.410406 scan_bus: bus USB0 port 0 finished in 43 msecs
937 01:57:35.413733 scan_static_bus for PCI: 00:0d.0 done
938 01:57:35.420391 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 01:57:35.420480 PCI: 00:14.0 scanning...
940 01:57:35.424083 scan_static_bus for PCI: 00:14.0
941 01:57:35.427472 USB0 port 0 enabled
942 01:57:35.430362 USB0 port 0 scanning...
943 01:57:35.433642 scan_static_bus for USB0 port 0
944 01:57:35.433726 USB2 port 0 disabled
945 01:57:35.437092 USB2 port 1 enabled
946 01:57:35.440426 USB2 port 2 enabled
947 01:57:35.440510 USB2 port 3 disabled
948 01:57:35.443803 USB2 port 4 enabled
949 01:57:35.447178 USB2 port 5 disabled
950 01:57:35.447262 USB2 port 6 disabled
951 01:57:35.450419 USB2 port 7 disabled
952 01:57:35.453875 USB2 port 8 disabled
953 01:57:35.453960 USB2 port 9 disabled
954 01:57:35.457064 USB3 port 0 disabled
955 01:57:35.457148 USB3 port 1 enabled
956 01:57:35.460085 USB3 port 2 disabled
957 01:57:35.463407 USB3 port 3 disabled
958 01:57:35.466764 USB2 port 1 scanning...
959 01:57:35.469999 scan_static_bus for USB2 port 1
960 01:57:35.472888 scan_static_bus for USB2 port 1 done
961 01:57:35.476396 scan_bus: bus USB2 port 1 finished in 6 msecs
962 01:57:35.479750 USB2 port 2 scanning...
963 01:57:35.483092 scan_static_bus for USB2 port 2
964 01:57:35.486476 scan_static_bus for USB2 port 2 done
965 01:57:35.489891 scan_bus: bus USB2 port 2 finished in 6 msecs
966 01:57:35.492707 USB2 port 4 scanning...
967 01:57:35.496029 scan_static_bus for USB2 port 4
968 01:57:35.499376 scan_static_bus for USB2 port 4 done
969 01:57:35.506078 scan_bus: bus USB2 port 4 finished in 6 msecs
970 01:57:35.506158 USB3 port 1 scanning...
971 01:57:35.509894 scan_static_bus for USB3 port 1
972 01:57:35.516418 scan_static_bus for USB3 port 1 done
973 01:57:35.519735 scan_bus: bus USB3 port 1 finished in 6 msecs
974 01:57:35.523033 scan_static_bus for USB0 port 0 done
975 01:57:35.526259 scan_bus: bus USB0 port 0 finished in 93 msecs
976 01:57:35.532917 scan_static_bus for PCI: 00:14.0 done
977 01:57:35.536295 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
978 01:57:35.539617 PCI: 00:14.3 scanning...
979 01:57:35.542397 scan_static_bus for PCI: 00:14.3
980 01:57:35.545798 GENERIC: 0.0 enabled
981 01:57:35.548958 scan_static_bus for PCI: 00:14.3 done
982 01:57:35.552260 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 01:57:35.555656 PCI: 00:15.0 scanning...
984 01:57:35.559044 scan_static_bus for PCI: 00:15.0
985 01:57:35.562275 I2C: 00:1a enabled
986 01:57:35.562359 I2C: 00:31 enabled
987 01:57:35.565568 I2C: 00:32 enabled
988 01:57:35.568898 scan_static_bus for PCI: 00:15.0 done
989 01:57:35.572129 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 01:57:35.575614 PCI: 00:15.1 scanning...
991 01:57:35.579026 scan_static_bus for PCI: 00:15.1
992 01:57:35.582433 I2C: 00:10 enabled
993 01:57:35.585692 scan_static_bus for PCI: 00:15.1 done
994 01:57:35.589050 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 01:57:35.591867 PCI: 00:15.2 scanning...
996 01:57:35.595500 scan_static_bus for PCI: 00:15.2
997 01:57:35.598619 scan_static_bus for PCI: 00:15.2 done
998 01:57:35.605487 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 01:57:35.608615 PCI: 00:15.3 scanning...
1000 01:57:35.611845 scan_static_bus for PCI: 00:15.3
1001 01:57:35.615480 scan_static_bus for PCI: 00:15.3 done
1002 01:57:35.618289 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 01:57:35.621810 PCI: 00:19.1 scanning...
1004 01:57:35.624932 scan_static_bus for PCI: 00:19.1
1005 01:57:35.628402 I2C: 00:15 enabled
1006 01:57:35.631640 scan_static_bus for PCI: 00:19.1 done
1007 01:57:35.635035 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 01:57:35.638433 PCI: 00:1d.0 scanning...
1009 01:57:35.642067 do_pci_scan_bridge for PCI: 00:1d.0
1010 01:57:35.644703 PCI: pci_scan_bus for bus 01
1011 01:57:35.647964 PCI: 01:00.0 [15b7/5009] enabled
1012 01:57:35.651449 GENERIC: 0.0 enabled
1013 01:57:35.654789 Enabling Common Clock Configuration
1014 01:57:35.658078 L1 Sub-State supported from root port 29
1015 01:57:35.661401 L1 Sub-State Support = 0x5
1016 01:57:35.664857 CommonModeRestoreTime = 0x28
1017 01:57:35.668178 Power On Value = 0x16, Power On Scale = 0x0
1018 01:57:35.671104 ASPM: Enabled L1
1019 01:57:35.674256 PCIe: Max_Payload_Size adjusted to 128
1020 01:57:35.677694 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 01:57:35.680934 PCI: 00:1e.2 scanning...
1022 01:57:35.684350 scan_generic_bus for PCI: 00:1e.2
1023 01:57:35.687729 SPI: 00 enabled
1024 01:57:35.694445 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 01:57:35.697962 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 01:57:35.701795 PCI: 00:1e.3 scanning...
1027 01:57:35.704649 scan_generic_bus for PCI: 00:1e.3
1028 01:57:35.704755 SPI: 00 enabled
1029 01:57:35.711422 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 01:57:35.718135 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 01:57:35.718218 PCI: 00:1f.0 scanning...
1032 01:57:35.721453 scan_static_bus for PCI: 00:1f.0
1033 01:57:35.724880 PNP: 0c09.0 enabled
1034 01:57:35.727677 PNP: 0c09.0 scanning...
1035 01:57:35.731217 scan_static_bus for PNP: 0c09.0
1036 01:57:35.734527 scan_static_bus for PNP: 0c09.0 done
1037 01:57:35.737867 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 01:57:35.744305 scan_static_bus for PCI: 00:1f.0 done
1039 01:57:35.748082 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 01:57:35.750855 PCI: 00:1f.2 scanning...
1041 01:57:35.754294 scan_static_bus for PCI: 00:1f.2
1042 01:57:35.754378 GENERIC: 0.0 enabled
1043 01:57:35.757637 GENERIC: 0.0 scanning...
1044 01:57:35.761048 scan_static_bus for GENERIC: 0.0
1045 01:57:35.764308 GENERIC: 0.0 enabled
1046 01:57:35.767757 GENERIC: 1.0 enabled
1047 01:57:35.771148 scan_static_bus for GENERIC: 0.0 done
1048 01:57:35.774023 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 01:57:35.777487 scan_static_bus for PCI: 00:1f.2 done
1050 01:57:35.783987 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 01:57:35.787360 PCI: 00:1f.3 scanning...
1052 01:57:35.790803 scan_static_bus for PCI: 00:1f.3
1053 01:57:35.794083 scan_static_bus for PCI: 00:1f.3 done
1054 01:57:35.797487 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 01:57:35.800893 PCI: 00:1f.5 scanning...
1056 01:57:35.803845 scan_generic_bus for PCI: 00:1f.5
1057 01:57:35.807350 scan_generic_bus for PCI: 00:1f.5 done
1058 01:57:35.813706 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 01:57:35.817098 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1060 01:57:35.820651 scan_static_bus for Root Device done
1061 01:57:35.826858 scan_bus: bus Root Device finished in 736 msecs
1062 01:57:35.826938 done
1063 01:57:35.833995 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1064 01:57:35.836804 Chrome EC: UHEPI supported
1065 01:57:35.843673 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 01:57:35.850447 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 01:57:35.853708 SPI flash protection: WPSW=0 SRP0=1
1068 01:57:35.857213 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 01:57:35.863635 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1070 01:57:35.866904 found VGA at PCI: 00:02.0
1071 01:57:35.870350 Setting up VGA for PCI: 00:02.0
1072 01:57:35.873245 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 01:57:35.879855 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 01:57:35.883310 Allocating resources...
1075 01:57:35.883396 Reading resources...
1076 01:57:35.886838 Root Device read_resources bus 0 link: 0
1077 01:57:35.893541 DOMAIN: 0000 read_resources bus 0 link: 0
1078 01:57:35.896770 PCI: 00:04.0 read_resources bus 1 link: 0
1079 01:57:35.902967 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 01:57:35.906286 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 01:57:35.912778 USB0 port 0 read_resources bus 0 link: 0
1082 01:57:35.916140 USB0 port 0 read_resources bus 0 link: 0 done
1083 01:57:35.923057 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 01:57:35.926458 PCI: 00:14.0 read_resources bus 0 link: 0
1085 01:57:35.929195 USB0 port 0 read_resources bus 0 link: 0
1086 01:57:35.937262 USB0 port 0 read_resources bus 0 link: 0 done
1087 01:57:35.940429 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 01:57:35.947215 PCI: 00:14.3 read_resources bus 0 link: 0
1089 01:57:35.950562 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 01:57:35.957281 PCI: 00:15.0 read_resources bus 0 link: 0
1091 01:57:35.960596 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 01:57:35.966764 PCI: 00:15.1 read_resources bus 0 link: 0
1093 01:57:35.970310 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 01:57:35.977616 PCI: 00:19.1 read_resources bus 0 link: 0
1095 01:57:35.980877 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 01:57:35.987643 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 01:57:35.990528 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 01:57:35.997377 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 01:57:36.000624 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 01:57:36.007617 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 01:57:36.010697 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 01:57:36.017307 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 01:57:36.020516 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 01:57:36.027240 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 01:57:36.030685 GENERIC: 0.0 read_resources bus 0 link: 0
1106 01:57:36.036879 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 01:57:36.040218 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 01:57:36.046947 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 01:57:36.050383 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 01:57:36.056516 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 01:57:36.059737 Root Device read_resources bus 0 link: 0 done
1112 01:57:36.063129 Done reading resources.
1113 01:57:36.069802 Show resources in subtree (Root Device)...After reading.
1114 01:57:36.073254 Root Device child on link 0 DOMAIN: 0000
1115 01:57:36.076615 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 01:57:36.086212 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 01:57:36.096317 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 01:57:36.099794 PCI: 00:00.0
1119 01:57:36.106215 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 01:57:36.116120 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 01:57:36.126081 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 01:57:36.136032 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 01:57:36.146109 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 01:57:36.156259 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 01:57:36.162333 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 01:57:36.172775 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 01:57:36.182314 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 01:57:36.192452 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 01:57:36.202389 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 01:57:36.212554 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 01:57:36.219176 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 01:57:36.228832 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 01:57:36.238899 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 01:57:36.248758 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 01:57:36.258468 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 01:57:36.268440 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 01:57:36.275075 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 01:57:36.285195 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 01:57:36.288557 PCI: 00:02.0
1140 01:57:36.298621 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 01:57:36.308313 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 01:57:36.318182 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 01:57:36.321503 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 01:57:36.331498 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 01:57:36.334812 GENERIC: 0.0
1146 01:57:36.334895 PCI: 00:05.0
1147 01:57:36.344541 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 01:57:36.348311 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 01:57:36.351354 GENERIC: 0.0
1150 01:57:36.354679 PCI: 00:08.0
1151 01:57:36.364284 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 01:57:36.364370 PCI: 00:0a.0
1153 01:57:36.367727 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 01:57:36.377700 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 01:57:36.384249 USB0 port 0 child on link 0 USB3 port 0
1156 01:57:36.384341 USB3 port 0
1157 01:57:36.387597 USB3 port 1
1158 01:57:36.387676 USB3 port 2
1159 01:57:36.391012 USB3 port 3
1160 01:57:36.394464 PCI: 00:14.0 child on link 0 USB0 port 0
1161 01:57:36.404211 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 01:57:36.410791 USB0 port 0 child on link 0 USB2 port 0
1163 01:57:36.410876 USB2 port 0
1164 01:57:36.414129 USB2 port 1
1165 01:57:36.414213 USB2 port 2
1166 01:57:36.417279 USB2 port 3
1167 01:57:36.417363 USB2 port 4
1168 01:57:36.420506 USB2 port 5
1169 01:57:36.420589 USB2 port 6
1170 01:57:36.423988 USB2 port 7
1171 01:57:36.424087 USB2 port 8
1172 01:57:36.427120 USB2 port 9
1173 01:57:36.430574 USB3 port 0
1174 01:57:36.430716 USB3 port 1
1175 01:57:36.433773 USB3 port 2
1176 01:57:36.433857 USB3 port 3
1177 01:57:36.437208 PCI: 00:14.2
1178 01:57:36.447330 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 01:57:36.456867 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 01:57:36.460350 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 01:57:36.470588 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 01:57:36.470673 GENERIC: 0.0
1183 01:57:36.477169 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 01:57:36.486742 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 01:57:36.486827 I2C: 00:1a
1186 01:57:36.490072 I2C: 00:31
1187 01:57:36.490155 I2C: 00:32
1188 01:57:36.496829 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 01:57:36.507184 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 01:57:36.507270 I2C: 00:10
1191 01:57:36.507358 PCI: 00:15.2
1192 01:57:36.519882 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 01:57:36.519982 PCI: 00:15.3
1194 01:57:36.529714 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 01:57:36.533554 PCI: 00:16.0
1196 01:57:36.543029 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 01:57:36.543114 PCI: 00:19.0
1198 01:57:36.546506 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 01:57:36.556526 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 01:57:36.559386 I2C: 00:15
1201 01:57:36.562824 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 01:57:36.572869 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 01:57:36.582639 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 01:57:36.592854 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 01:57:36.592967 GENERIC: 0.0
1206 01:57:36.596176 PCI: 01:00.0
1207 01:57:36.605679 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 01:57:36.615454 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1209 01:57:36.615543 PCI: 00:1e.0
1210 01:57:36.628963 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1211 01:57:36.632323 PCI: 00:1e.2 child on link 0 SPI: 00
1212 01:57:36.642142 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 01:57:36.642231 SPI: 00
1214 01:57:36.645758 PCI: 00:1e.3 child on link 0 SPI: 00
1215 01:57:36.655196 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 01:57:36.658617 SPI: 00
1217 01:57:36.662040 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1218 01:57:36.671912 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1219 01:57:36.671998 PNP: 0c09.0
1220 01:57:36.681721 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1221 01:57:36.685092 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1222 01:57:36.694585 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1223 01:57:36.704612 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1224 01:57:36.707960 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1225 01:57:36.711292 GENERIC: 0.0
1226 01:57:36.711375 GENERIC: 1.0
1227 01:57:36.714606 PCI: 00:1f.3
1228 01:57:36.724261 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 01:57:36.734280 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1230 01:57:36.737659 PCI: 00:1f.5
1231 01:57:36.744275 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 01:57:36.750900 CPU_CLUSTER: 0 child on link 0 APIC: 00
1233 01:57:36.750996 APIC: 00
1234 01:57:36.751064 APIC: 01
1235 01:57:36.754228 APIC: 02
1236 01:57:36.754308 APIC: 05
1237 01:57:36.757634 APIC: 07
1238 01:57:36.757713 APIC: 06
1239 01:57:36.757776 APIC: 03
1240 01:57:36.760616 APIC: 04
1241 01:57:36.767381 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1242 01:57:36.774081 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1243 01:57:36.780297 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1244 01:57:36.784186 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1245 01:57:36.790759 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1246 01:57:36.793708 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1247 01:57:36.800839 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1248 01:57:36.807064 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1249 01:57:36.816696 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1250 01:57:36.823432 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1251 01:57:36.830025 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1252 01:57:36.836677 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1253 01:57:36.843369 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1254 01:57:36.852889 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1255 01:57:36.856325 DOMAIN: 0000: Resource ranges:
1256 01:57:36.859636 * Base: 1000, Size: 800, Tag: 100
1257 01:57:36.863013 * Base: 1900, Size: e700, Tag: 100
1258 01:57:36.866346 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1259 01:57:36.873146 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1260 01:57:36.879803 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1261 01:57:36.889208 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1262 01:57:36.896114 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1263 01:57:36.902729 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1264 01:57:36.912868 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1265 01:57:36.919072 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1266 01:57:36.926043 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1267 01:57:36.935886 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1268 01:57:36.942456 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1269 01:57:36.949219 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1270 01:57:36.958820 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1271 01:57:36.965595 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1272 01:57:36.972181 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1273 01:57:36.981938 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1274 01:57:36.988486 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1275 01:57:36.994958 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1276 01:57:37.005073 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1277 01:57:37.011717 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1278 01:57:37.021700 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1279 01:57:37.028393 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1280 01:57:37.035186 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1281 01:57:37.041632 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1282 01:57:37.051374 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1283 01:57:37.054934 DOMAIN: 0000: Resource ranges:
1284 01:57:37.057748 * Base: 7fc00000, Size: 40400000, Tag: 200
1285 01:57:37.061105 * Base: d0000000, Size: 28000000, Tag: 200
1286 01:57:37.067946 * Base: fa000000, Size: 1000000, Tag: 200
1287 01:57:37.071549 * Base: fb001000, Size: 2fff000, Tag: 200
1288 01:57:37.074261 * Base: fe010000, Size: 2e000, Tag: 200
1289 01:57:37.080862 * Base: fe03f000, Size: d41000, Tag: 200
1290 01:57:37.084214 * Base: fed88000, Size: 8000, Tag: 200
1291 01:57:37.087629 * Base: fed93000, Size: d000, Tag: 200
1292 01:57:37.090866 * Base: feda2000, Size: 1e000, Tag: 200
1293 01:57:37.097263 * Base: fede0000, Size: 1220000, Tag: 200
1294 01:57:37.100720 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1295 01:57:37.107528 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1296 01:57:37.114006 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1297 01:57:37.120841 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1298 01:57:37.127523 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1299 01:57:37.133856 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1300 01:57:37.140540 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1301 01:57:37.147207 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1302 01:57:37.153871 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1303 01:57:37.160147 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1304 01:57:37.166960 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1305 01:57:37.173579 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1306 01:57:37.180043 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1307 01:57:37.187038 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1308 01:57:37.193560 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1309 01:57:37.200114 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1310 01:57:37.206786 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1311 01:57:37.212851 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1312 01:57:37.219555 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1313 01:57:37.226180 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1314 01:57:37.232853 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1315 01:57:37.239508 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1316 01:57:37.246026 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1317 01:57:37.256236 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1318 01:57:37.262745 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1319 01:57:37.266106 PCI: 00:1d.0: Resource ranges:
1320 01:57:37.269465 * Base: 7fc00000, Size: 100000, Tag: 200
1321 01:57:37.276217 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1322 01:57:37.282821 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1323 01:57:37.293058 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1324 01:57:37.299439 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1325 01:57:37.302841 Root Device assign_resources, bus 0 link: 0
1326 01:57:37.309380 DOMAIN: 0000 assign_resources, bus 0 link: 0
1327 01:57:37.315800 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1328 01:57:37.326101 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1329 01:57:37.332725 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1330 01:57:37.342487 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1331 01:57:37.345278 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 01:57:37.349037 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 01:57:37.359076 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1334 01:57:37.365294 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1335 01:57:37.375178 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1336 01:57:37.378587 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 01:57:37.384725 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 01:57:37.391258 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1339 01:57:37.398326 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 01:57:37.401502 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 01:57:37.407622 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1342 01:57:37.417543 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1343 01:57:37.424323 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1344 01:57:37.430948 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 01:57:37.434472 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 01:57:37.444406 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1347 01:57:37.447606 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 01:57:37.450834 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 01:57:37.460608 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1350 01:57:37.464310 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 01:57:37.471026 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 01:57:37.476913 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1353 01:57:37.486862 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1354 01:57:37.493697 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1355 01:57:37.503499 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1356 01:57:37.506842 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 01:57:37.513637 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 01:57:37.520227 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1359 01:57:37.530050 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1360 01:57:37.540250 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1361 01:57:37.543307 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 01:57:37.553265 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1363 01:57:37.559562 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1364 01:57:37.562818 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 01:57:37.573153 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1366 01:57:37.576407 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1367 01:57:37.583131 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 01:57:37.589901 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1369 01:57:37.596023 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1370 01:57:37.599524 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 01:57:37.602869 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1372 01:57:37.609536 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 01:57:37.612869 LPC: Trying to open IO window from 800 size 1ff
1374 01:57:37.623317 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1375 01:57:37.629347 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1376 01:57:37.639280 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1377 01:57:37.642739 DOMAIN: 0000 assign_resources, bus 0 link: 0
1378 01:57:37.649041 Root Device assign_resources, bus 0 link: 0
1379 01:57:37.649147 Done setting resources.
1380 01:57:37.655963 Show resources in subtree (Root Device)...After assigning values.
1381 01:57:37.662368 Root Device child on link 0 DOMAIN: 0000
1382 01:57:37.665584 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1383 01:57:37.675703 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1384 01:57:37.685435 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1385 01:57:37.685535 PCI: 00:00.0
1386 01:57:37.695562 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1387 01:57:37.704924 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1388 01:57:37.715004 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1389 01:57:37.725440 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1390 01:57:37.734870 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1391 01:57:37.741713 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1392 01:57:37.751773 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1393 01:57:37.761889 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1394 01:57:37.771704 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1395 01:57:37.781372 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1396 01:57:37.791435 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1397 01:57:37.798131 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1398 01:57:37.807953 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1399 01:57:37.818141 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1400 01:57:37.827381 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1401 01:57:37.837479 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1402 01:57:37.847341 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1403 01:57:37.853891 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1404 01:57:37.864216 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1405 01:57:37.874239 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1406 01:57:37.877441 PCI: 00:02.0
1407 01:57:37.887036 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1408 01:57:37.896887 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1409 01:57:37.906930 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1410 01:57:37.910394 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1411 01:57:37.920317 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1412 01:57:37.923703 GENERIC: 0.0
1413 01:57:37.923790 PCI: 00:05.0
1414 01:57:37.936653 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1415 01:57:37.939912 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1416 01:57:37.943282 GENERIC: 0.0
1417 01:57:37.943369 PCI: 00:08.0
1418 01:57:37.953229 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1419 01:57:37.956543 PCI: 00:0a.0
1420 01:57:37.959863 PCI: 00:0d.0 child on link 0 USB0 port 0
1421 01:57:37.969791 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1422 01:57:37.976267 USB0 port 0 child on link 0 USB3 port 0
1423 01:57:37.976378 USB3 port 0
1424 01:57:37.979481 USB3 port 1
1425 01:57:37.979572 USB3 port 2
1426 01:57:37.982921 USB3 port 3
1427 01:57:37.986310 PCI: 00:14.0 child on link 0 USB0 port 0
1428 01:57:37.996385 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1429 01:57:37.999633 USB0 port 0 child on link 0 USB2 port 0
1430 01:57:38.002918 USB2 port 0
1431 01:57:38.006412 USB2 port 1
1432 01:57:38.006497 USB2 port 2
1433 01:57:38.009771 USB2 port 3
1434 01:57:38.009871 USB2 port 4
1435 01:57:38.012627 USB2 port 5
1436 01:57:38.012708 USB2 port 6
1437 01:57:38.016312 USB2 port 7
1438 01:57:38.016399 USB2 port 8
1439 01:57:38.019764 USB2 port 9
1440 01:57:38.019857 USB3 port 0
1441 01:57:38.022885 USB3 port 1
1442 01:57:38.022977 USB3 port 2
1443 01:57:38.025879 USB3 port 3
1444 01:57:38.025978 PCI: 00:14.2
1445 01:57:38.039139 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1446 01:57:38.049205 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1447 01:57:38.052468 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1448 01:57:38.062655 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1449 01:57:38.066005 GENERIC: 0.0
1450 01:57:38.069253 PCI: 00:15.0 child on link 0 I2C: 00:1a
1451 01:57:38.079510 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1452 01:57:38.082390 I2C: 00:1a
1453 01:57:38.082649 I2C: 00:31
1454 01:57:38.085799 I2C: 00:32
1455 01:57:38.089031 PCI: 00:15.1 child on link 0 I2C: 00:10
1456 01:57:38.098552 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1457 01:57:38.098860 I2C: 00:10
1458 01:57:38.102325 PCI: 00:15.2
1459 01:57:38.112390 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1460 01:57:38.115770 PCI: 00:15.3
1461 01:57:38.124976 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1462 01:57:38.125158 PCI: 00:16.0
1463 01:57:38.135008 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1464 01:57:38.138841 PCI: 00:19.0
1465 01:57:38.141767 PCI: 00:19.1 child on link 0 I2C: 00:15
1466 01:57:38.151646 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1467 01:57:38.154859 I2C: 00:15
1468 01:57:38.158167 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1469 01:57:38.168122 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1470 01:57:38.177991 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1471 01:57:38.191429 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1472 01:57:38.191515 GENERIC: 0.0
1473 01:57:38.194544 PCI: 01:00.0
1474 01:57:38.204598 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1475 01:57:38.214113 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1476 01:57:38.214206 PCI: 00:1e.0
1477 01:57:38.227306 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1478 01:57:38.230662 PCI: 00:1e.2 child on link 0 SPI: 00
1479 01:57:38.240548 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1480 01:57:38.244037 SPI: 00
1481 01:57:38.247180 PCI: 00:1e.3 child on link 0 SPI: 00
1482 01:57:38.257205 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1483 01:57:38.257298 SPI: 00
1484 01:57:38.263637 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1485 01:57:38.270416 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1486 01:57:38.273722 PNP: 0c09.0
1487 01:57:38.280737 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1488 01:57:38.287449 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1489 01:57:38.296901 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1490 01:57:38.303604 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1491 01:57:38.310175 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1492 01:57:38.310268 GENERIC: 0.0
1493 01:57:38.313647 GENERIC: 1.0
1494 01:57:38.313757 PCI: 00:1f.3
1495 01:57:38.326903 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1496 01:57:38.336384 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1497 01:57:38.336489 PCI: 00:1f.5
1498 01:57:38.346265 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1499 01:57:38.353138 CPU_CLUSTER: 0 child on link 0 APIC: 00
1500 01:57:38.353227 APIC: 00
1501 01:57:38.353296 APIC: 01
1502 01:57:38.356504 APIC: 02
1503 01:57:38.356602 APIC: 05
1504 01:57:38.359813 APIC: 07
1505 01:57:38.359902 APIC: 06
1506 01:57:38.359967 APIC: 03
1507 01:57:38.362641 APIC: 04
1508 01:57:38.366342 Done allocating resources.
1509 01:57:38.369559 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1510 01:57:38.376651 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1511 01:57:38.379806 Configure GPIOs for I2S audio on UP4.
1512 01:57:38.387319 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1513 01:57:38.390610 Enabling resources...
1514 01:57:38.394122 PCI: 00:00.0 subsystem <- 8086/9a12
1515 01:57:38.397328 PCI: 00:00.0 cmd <- 06
1516 01:57:38.400114 PCI: 00:02.0 subsystem <- 8086/9a40
1517 01:57:38.403496 PCI: 00:02.0 cmd <- 03
1518 01:57:38.406878 PCI: 00:04.0 subsystem <- 8086/9a03
1519 01:57:38.410028 PCI: 00:04.0 cmd <- 02
1520 01:57:38.413330 PCI: 00:05.0 subsystem <- 8086/9a19
1521 01:57:38.413411 PCI: 00:05.0 cmd <- 02
1522 01:57:38.420169 PCI: 00:08.0 subsystem <- 8086/9a11
1523 01:57:38.420253 PCI: 00:08.0 cmd <- 06
1524 01:57:38.423416 PCI: 00:0d.0 subsystem <- 8086/9a13
1525 01:57:38.426727 PCI: 00:0d.0 cmd <- 02
1526 01:57:38.429971 PCI: 00:14.0 subsystem <- 8086/a0ed
1527 01:57:38.433344 PCI: 00:14.0 cmd <- 02
1528 01:57:38.436688 PCI: 00:14.2 subsystem <- 8086/a0ef
1529 01:57:38.440072 PCI: 00:14.2 cmd <- 02
1530 01:57:38.442981 PCI: 00:14.3 subsystem <- 8086/a0f0
1531 01:57:38.446811 PCI: 00:14.3 cmd <- 02
1532 01:57:38.449920 PCI: 00:15.0 subsystem <- 8086/a0e8
1533 01:57:38.453332 PCI: 00:15.0 cmd <- 02
1534 01:57:38.456191 PCI: 00:15.1 subsystem <- 8086/a0e9
1535 01:57:38.460071 PCI: 00:15.1 cmd <- 02
1536 01:57:38.463173 PCI: 00:15.2 subsystem <- 8086/a0ea
1537 01:57:38.463258 PCI: 00:15.2 cmd <- 02
1538 01:57:38.469972 PCI: 00:15.3 subsystem <- 8086/a0eb
1539 01:57:38.470058 PCI: 00:15.3 cmd <- 02
1540 01:57:38.473302 PCI: 00:16.0 subsystem <- 8086/a0e0
1541 01:57:38.476680 PCI: 00:16.0 cmd <- 02
1542 01:57:38.480005 PCI: 00:19.1 subsystem <- 8086/a0c6
1543 01:57:38.482761 PCI: 00:19.1 cmd <- 02
1544 01:57:38.486419 PCI: 00:1d.0 bridge ctrl <- 0013
1545 01:57:38.489469 PCI: 00:1d.0 subsystem <- 8086/a0b0
1546 01:57:38.492874 PCI: 00:1d.0 cmd <- 06
1547 01:57:38.496297 PCI: 00:1e.0 subsystem <- 8086/a0a8
1548 01:57:38.499611 PCI: 00:1e.0 cmd <- 06
1549 01:57:38.503061 PCI: 00:1e.2 subsystem <- 8086/a0aa
1550 01:57:38.506362 PCI: 00:1e.2 cmd <- 06
1551 01:57:38.509209 PCI: 00:1e.3 subsystem <- 8086/a0ab
1552 01:57:38.512471 PCI: 00:1e.3 cmd <- 02
1553 01:57:38.515813 PCI: 00:1f.0 subsystem <- 8086/a087
1554 01:57:38.515915 PCI: 00:1f.0 cmd <- 407
1555 01:57:38.523060 PCI: 00:1f.3 subsystem <- 8086/a0c8
1556 01:57:38.523146 PCI: 00:1f.3 cmd <- 02
1557 01:57:38.526402 PCI: 00:1f.5 subsystem <- 8086/a0a4
1558 01:57:38.529769 PCI: 00:1f.5 cmd <- 406
1559 01:57:38.534080 PCI: 01:00.0 cmd <- 02
1560 01:57:38.539181 done.
1561 01:57:38.541979 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1562 01:57:38.545310 Initializing devices...
1563 01:57:38.548469 Root Device init
1564 01:57:38.551699 Chrome EC: Set SMI mask to 0x0000000000000000
1565 01:57:38.559733 Chrome EC: clear events_b mask to 0x0000000000000000
1566 01:57:38.566101 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1567 01:57:38.572537 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1568 01:57:38.579405 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1569 01:57:38.582326 Chrome EC: Set WAKE mask to 0x0000000000000000
1570 01:57:38.590136 fw_config match found: DB_USB=USB3_ACTIVE
1571 01:57:38.593289 Configure Right Type-C port orientation for retimer
1572 01:57:38.596764 Root Device init finished in 46 msecs
1573 01:57:38.601082 PCI: 00:00.0 init
1574 01:57:38.603976 CPU TDP = 9 Watts
1575 01:57:38.604058 CPU PL1 = 9 Watts
1576 01:57:38.607180 CPU PL2 = 40 Watts
1577 01:57:38.611048 CPU PL4 = 83 Watts
1578 01:57:38.613914 PCI: 00:00.0 init finished in 8 msecs
1579 01:57:38.613997 PCI: 00:02.0 init
1580 01:57:38.617365 GMA: Found VBT in CBFS
1581 01:57:38.620802 GMA: Found valid VBT in CBFS
1582 01:57:38.627390 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1583 01:57:38.634191 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1584 01:57:38.637479 PCI: 00:02.0 init finished in 18 msecs
1585 01:57:38.640748 PCI: 00:05.0 init
1586 01:57:38.644002 PCI: 00:05.0 init finished in 0 msecs
1587 01:57:38.646844 PCI: 00:08.0 init
1588 01:57:38.650302 PCI: 00:08.0 init finished in 0 msecs
1589 01:57:38.653543 PCI: 00:14.0 init
1590 01:57:38.656924 PCI: 00:14.0 init finished in 0 msecs
1591 01:57:38.660442 PCI: 00:14.2 init
1592 01:57:38.663886 PCI: 00:14.2 init finished in 0 msecs
1593 01:57:38.666994 PCI: 00:15.0 init
1594 01:57:38.669812 I2C bus 0 version 0x3230302a
1595 01:57:38.673574 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1596 01:57:38.676951 PCI: 00:15.0 init finished in 6 msecs
1597 01:57:38.677066 PCI: 00:15.1 init
1598 01:57:38.680233 I2C bus 1 version 0x3230302a
1599 01:57:38.683174 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1600 01:57:38.689897 PCI: 00:15.1 init finished in 6 msecs
1601 01:57:38.689994 PCI: 00:15.2 init
1602 01:57:38.693327 I2C bus 2 version 0x3230302a
1603 01:57:38.696567 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1604 01:57:38.699959 PCI: 00:15.2 init finished in 6 msecs
1605 01:57:38.703399 PCI: 00:15.3 init
1606 01:57:38.706805 I2C bus 3 version 0x3230302a
1607 01:57:38.709955 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1608 01:57:38.713153 PCI: 00:15.3 init finished in 6 msecs
1609 01:57:38.716493 PCI: 00:16.0 init
1610 01:57:38.719996 PCI: 00:16.0 init finished in 0 msecs
1611 01:57:38.723197 PCI: 00:19.1 init
1612 01:57:38.726401 I2C bus 5 version 0x3230302a
1613 01:57:38.729760 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1614 01:57:38.733082 PCI: 00:19.1 init finished in 6 msecs
1615 01:57:38.736418 PCI: 00:1d.0 init
1616 01:57:38.739705 Initializing PCH PCIe bridge.
1617 01:57:38.742949 PCI: 00:1d.0 init finished in 3 msecs
1618 01:57:38.746354 PCI: 00:1f.0 init
1619 01:57:38.749693 IOAPIC: Initializing IOAPIC at 0xfec00000
1620 01:57:38.753166 IOAPIC: Bootstrap Processor Local APIC = 0x00
1621 01:57:38.755967 IOAPIC: ID = 0x02
1622 01:57:38.759282 IOAPIC: Dumping registers
1623 01:57:38.759366 reg 0x0000: 0x02000000
1624 01:57:38.762796 reg 0x0001: 0x00770020
1625 01:57:38.766248 reg 0x0002: 0x00000000
1626 01:57:38.769458 PCI: 00:1f.0 init finished in 21 msecs
1627 01:57:38.772886 PCI: 00:1f.2 init
1628 01:57:38.776047 Disabling ACPI via APMC.
1629 01:57:38.779585 APMC done.
1630 01:57:38.782763 PCI: 00:1f.2 init finished in 6 msecs
1631 01:57:38.794651 PCI: 01:00.0 init
1632 01:57:38.797552 PCI: 01:00.0 init finished in 0 msecs
1633 01:57:38.800744 PNP: 0c09.0 init
1634 01:57:38.804612 Google Chrome EC uptime: 8.274 seconds
1635 01:57:38.811373 Google Chrome AP resets since EC boot: 1
1636 01:57:38.814090 Google Chrome most recent AP reset causes:
1637 01:57:38.817480 0.452: 32775 shutdown: entering G3
1638 01:57:38.824160 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1639 01:57:38.827655 PNP: 0c09.0 init finished in 22 msecs
1640 01:57:38.833182 Devices initialized
1641 01:57:38.836570 Show all devs... After init.
1642 01:57:38.839919 Root Device: enabled 1
1643 01:57:38.840004 DOMAIN: 0000: enabled 1
1644 01:57:38.843201 CPU_CLUSTER: 0: enabled 1
1645 01:57:38.846544 PCI: 00:00.0: enabled 1
1646 01:57:38.849765 PCI: 00:02.0: enabled 1
1647 01:57:38.849849 PCI: 00:04.0: enabled 1
1648 01:57:38.853305 PCI: 00:05.0: enabled 1
1649 01:57:38.856118 PCI: 00:06.0: enabled 0
1650 01:57:38.859371 PCI: 00:07.0: enabled 0
1651 01:57:38.859474 PCI: 00:07.1: enabled 0
1652 01:57:38.862745 PCI: 00:07.2: enabled 0
1653 01:57:38.866122 PCI: 00:07.3: enabled 0
1654 01:57:38.869432 PCI: 00:08.0: enabled 1
1655 01:57:38.869517 PCI: 00:09.0: enabled 0
1656 01:57:38.872699 PCI: 00:0a.0: enabled 0
1657 01:57:38.876023 PCI: 00:0d.0: enabled 1
1658 01:57:38.879474 PCI: 00:0d.1: enabled 0
1659 01:57:38.879574 PCI: 00:0d.2: enabled 0
1660 01:57:38.882521 PCI: 00:0d.3: enabled 0
1661 01:57:38.886012 PCI: 00:0e.0: enabled 0
1662 01:57:38.889338 PCI: 00:10.2: enabled 1
1663 01:57:38.889421 PCI: 00:10.6: enabled 0
1664 01:57:38.892808 PCI: 00:10.7: enabled 0
1665 01:57:38.895979 PCI: 00:12.0: enabled 0
1666 01:57:38.899276 PCI: 00:12.6: enabled 0
1667 01:57:38.899377 PCI: 00:13.0: enabled 0
1668 01:57:38.902598 PCI: 00:14.0: enabled 1
1669 01:57:38.905924 PCI: 00:14.1: enabled 0
1670 01:57:38.909275 PCI: 00:14.2: enabled 1
1671 01:57:38.909360 PCI: 00:14.3: enabled 1
1672 01:57:38.912120 PCI: 00:15.0: enabled 1
1673 01:57:38.915890 PCI: 00:15.1: enabled 1
1674 01:57:38.915982 PCI: 00:15.2: enabled 1
1675 01:57:38.918831 PCI: 00:15.3: enabled 1
1676 01:57:38.922270 PCI: 00:16.0: enabled 1
1677 01:57:38.925582 PCI: 00:16.1: enabled 0
1678 01:57:38.925666 PCI: 00:16.2: enabled 0
1679 01:57:38.928913 PCI: 00:16.3: enabled 0
1680 01:57:38.932428 PCI: 00:16.4: enabled 0
1681 01:57:38.935269 PCI: 00:16.5: enabled 0
1682 01:57:38.935352 PCI: 00:17.0: enabled 0
1683 01:57:38.938715 PCI: 00:19.0: enabled 0
1684 01:57:38.942248 PCI: 00:19.1: enabled 1
1685 01:57:38.945700 PCI: 00:19.2: enabled 0
1686 01:57:38.945784 PCI: 00:1c.0: enabled 1
1687 01:57:38.948563 PCI: 00:1c.1: enabled 0
1688 01:57:38.951875 PCI: 00:1c.2: enabled 0
1689 01:57:38.955195 PCI: 00:1c.3: enabled 0
1690 01:57:38.955295 PCI: 00:1c.4: enabled 0
1691 01:57:38.958502 PCI: 00:1c.5: enabled 0
1692 01:57:38.961693 PCI: 00:1c.6: enabled 1
1693 01:57:38.965123 PCI: 00:1c.7: enabled 0
1694 01:57:38.965206 PCI: 00:1d.0: enabled 1
1695 01:57:38.968668 PCI: 00:1d.1: enabled 0
1696 01:57:38.971904 PCI: 00:1d.2: enabled 1
1697 01:57:38.972033 PCI: 00:1d.3: enabled 0
1698 01:57:38.974865 PCI: 00:1e.0: enabled 1
1699 01:57:38.978254 PCI: 00:1e.1: enabled 0
1700 01:57:38.981469 PCI: 00:1e.2: enabled 1
1701 01:57:38.981556 PCI: 00:1e.3: enabled 1
1702 01:57:38.984682 PCI: 00:1f.0: enabled 1
1703 01:57:38.988053 PCI: 00:1f.1: enabled 0
1704 01:57:38.991453 PCI: 00:1f.2: enabled 1
1705 01:57:38.991532 PCI: 00:1f.3: enabled 1
1706 01:57:38.994862 PCI: 00:1f.4: enabled 0
1707 01:57:38.998175 PCI: 00:1f.5: enabled 1
1708 01:57:39.001582 PCI: 00:1f.6: enabled 0
1709 01:57:39.001667 PCI: 00:1f.7: enabled 0
1710 01:57:39.004827 APIC: 00: enabled 1
1711 01:57:39.008370 GENERIC: 0.0: enabled 1
1712 01:57:39.008454 GENERIC: 0.0: enabled 1
1713 01:57:39.011315 GENERIC: 1.0: enabled 1
1714 01:57:39.014496 GENERIC: 0.0: enabled 1
1715 01:57:39.018321 GENERIC: 1.0: enabled 1
1716 01:57:39.018406 USB0 port 0: enabled 1
1717 01:57:39.020926 GENERIC: 0.0: enabled 1
1718 01:57:39.024534 USB0 port 0: enabled 1
1719 01:57:39.027809 GENERIC: 0.0: enabled 1
1720 01:57:39.027905 I2C: 00:1a: enabled 1
1721 01:57:39.031089 I2C: 00:31: enabled 1
1722 01:57:39.034417 I2C: 00:32: enabled 1
1723 01:57:39.034508 I2C: 00:10: enabled 1
1724 01:57:39.037605 I2C: 00:15: enabled 1
1725 01:57:39.041457 GENERIC: 0.0: enabled 0
1726 01:57:39.041543 GENERIC: 1.0: enabled 0
1727 01:57:39.044452 GENERIC: 0.0: enabled 1
1728 01:57:39.047785 SPI: 00: enabled 1
1729 01:57:39.047874 SPI: 00: enabled 1
1730 01:57:39.051299 PNP: 0c09.0: enabled 1
1731 01:57:39.054415 GENERIC: 0.0: enabled 1
1732 01:57:39.057606 USB3 port 0: enabled 1
1733 01:57:39.057680 USB3 port 1: enabled 1
1734 01:57:39.061339 USB3 port 2: enabled 0
1735 01:57:39.064543 USB3 port 3: enabled 0
1736 01:57:39.064627 USB2 port 0: enabled 0
1737 01:57:39.067310 USB2 port 1: enabled 1
1738 01:57:39.070798 USB2 port 2: enabled 1
1739 01:57:39.070883 USB2 port 3: enabled 0
1740 01:57:39.074167 USB2 port 4: enabled 1
1741 01:57:39.077547 USB2 port 5: enabled 0
1742 01:57:39.080887 USB2 port 6: enabled 0
1743 01:57:39.081018 USB2 port 7: enabled 0
1744 01:57:39.084188 USB2 port 8: enabled 0
1745 01:57:39.087453 USB2 port 9: enabled 0
1746 01:57:39.087537 USB3 port 0: enabled 0
1747 01:57:39.090874 USB3 port 1: enabled 1
1748 01:57:39.094095 USB3 port 2: enabled 0
1749 01:57:39.097064 USB3 port 3: enabled 0
1750 01:57:39.097149 GENERIC: 0.0: enabled 1
1751 01:57:39.100321 GENERIC: 1.0: enabled 1
1752 01:57:39.103599 APIC: 01: enabled 1
1753 01:57:39.103687 APIC: 02: enabled 1
1754 01:57:39.106908 APIC: 05: enabled 1
1755 01:57:39.110783 APIC: 07: enabled 1
1756 01:57:39.110867 APIC: 06: enabled 1
1757 01:57:39.114319 APIC: 03: enabled 1
1758 01:57:39.114403 APIC: 04: enabled 1
1759 01:57:39.117105 PCI: 01:00.0: enabled 1
1760 01:57:39.123724 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1761 01:57:39.127079 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1762 01:57:39.129843 ELOG: NV offset 0xf30000 size 0x1000
1763 01:57:39.138622 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1764 01:57:39.144933 ELOG: Event(17) added with size 13 at 2022-07-07 01:50:20 UTC
1765 01:57:39.151663 ELOG: Event(92) added with size 9 at 2022-07-07 01:50:20 UTC
1766 01:57:39.158628 ELOG: Event(93) added with size 9 at 2022-07-07 01:50:20 UTC
1767 01:57:39.164741 ELOG: Event(9E) added with size 10 at 2022-07-07 01:50:20 UTC
1768 01:57:39.171556 ELOG: Event(9F) added with size 14 at 2022-07-07 01:50:20 UTC
1769 01:57:39.178167 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1770 01:57:39.185027 ELOG: Event(A1) added with size 10 at 2022-07-07 01:50:20 UTC
1771 01:57:39.191461 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1772 01:57:39.197688 ELOG: Event(A0) added with size 9 at 2022-07-07 01:50:20 UTC
1773 01:57:39.201113 elog_add_boot_reason: Logged dev mode boot
1774 01:57:39.207687 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1775 01:57:39.207786 Finalize devices...
1776 01:57:39.210951 Devices finalized
1777 01:57:39.217904 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1778 01:57:39.221080 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1779 01:57:39.227569 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1780 01:57:39.230705 ME: HFSTS1 : 0x80030055
1781 01:57:39.237554 ME: HFSTS2 : 0x30280116
1782 01:57:39.240729 ME: HFSTS3 : 0x00000050
1783 01:57:39.244018 ME: HFSTS4 : 0x00004000
1784 01:57:39.250725 ME: HFSTS5 : 0x00000000
1785 01:57:39.253992 ME: HFSTS6 : 0x40400006
1786 01:57:39.257371 ME: Manufacturing Mode : YES
1787 01:57:39.260647 ME: SPI Protection Mode Enabled : NO
1788 01:57:39.267169 ME: FW Partition Table : OK
1789 01:57:39.270508 ME: Bringup Loader Failure : NO
1790 01:57:39.274024 ME: Firmware Init Complete : NO
1791 01:57:39.277414 ME: Boot Options Present : NO
1792 01:57:39.280430 ME: Update In Progress : NO
1793 01:57:39.283764 ME: D0i3 Support : YES
1794 01:57:39.287177 ME: Low Power State Enabled : NO
1795 01:57:39.290298 ME: CPU Replaced : YES
1796 01:57:39.297090 ME: CPU Replacement Valid : YES
1797 01:57:39.300451 ME: Current Working State : 5
1798 01:57:39.303736 ME: Current Operation State : 1
1799 01:57:39.307007 ME: Current Operation Mode : 3
1800 01:57:39.310297 ME: Error Code : 0
1801 01:57:39.313696 ME: Enhanced Debug Mode : NO
1802 01:57:39.316924 ME: CPU Debug Disabled : YES
1803 01:57:39.320469 ME: TXT Support : NO
1804 01:57:39.326916 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1805 01:57:39.337082 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1806 01:57:39.340439 CBFS: 'fallback/slic' not found.
1807 01:57:39.343705 ACPI: Writing ACPI tables at 76b01000.
1808 01:57:39.343789 ACPI: * FACS
1809 01:57:39.346560 ACPI: * DSDT
1810 01:57:39.349816 Ramoops buffer: 0x100000@0x76a00000.
1811 01:57:39.353128 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1812 01:57:39.359689 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1813 01:57:39.363005 Google Chrome EC: version:
1814 01:57:39.366372 ro: voema_v2.0.10114-a447f03e46
1815 01:57:39.369873 rw: voema_v2.0.10114-a447f03e46
1816 01:57:39.369957 running image: 2
1817 01:57:39.376580 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1818 01:57:39.381103 ACPI: * FADT
1819 01:57:39.381185 SCI is IRQ9
1820 01:57:39.387827 ACPI: added table 1/32, length now 40
1821 01:57:39.387908 ACPI: * SSDT
1822 01:57:39.391480 Found 1 CPU(s) with 8 core(s) each.
1823 01:57:39.397545 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1824 01:57:39.401003 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1825 01:57:39.404431 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1826 01:57:39.407755 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1827 01:57:39.414397 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1828 01:57:39.421155 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1829 01:57:39.424006 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1830 01:57:39.431005 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1831 01:57:39.437220 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1832 01:57:39.440701 \_SB.PCI0.RP09: Added StorageD3Enable property
1833 01:57:39.447839 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1834 01:57:39.450487 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1835 01:57:39.457334 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1836 01:57:39.460521 PS2K: Passing 80 keymaps to kernel
1837 01:57:39.467198 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1838 01:57:39.474022 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1839 01:57:39.480425 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1840 01:57:39.486829 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1841 01:57:39.493827 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1842 01:57:39.500488 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1843 01:57:39.507160 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1844 01:57:39.513621 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1845 01:57:39.516913 ACPI: added table 2/32, length now 44
1846 01:57:39.517016 ACPI: * MCFG
1847 01:57:39.520443 ACPI: added table 3/32, length now 48
1848 01:57:39.523262 ACPI: * TPM2
1849 01:57:39.526627 TPM2 log created at 0x769f0000
1850 01:57:39.529905 ACPI: added table 4/32, length now 52
1851 01:57:39.533267 ACPI: * MADT
1852 01:57:39.533346 SCI is IRQ9
1853 01:57:39.536744 ACPI: added table 5/32, length now 56
1854 01:57:39.539969 current = 76b09850
1855 01:57:39.540056 ACPI: * DMAR
1856 01:57:39.543326 ACPI: added table 6/32, length now 60
1857 01:57:39.550005 ACPI: added table 7/32, length now 64
1858 01:57:39.550089 ACPI: * HPET
1859 01:57:39.553350 ACPI: added table 8/32, length now 68
1860 01:57:39.556761 ACPI: done.
1861 01:57:39.556851 ACPI tables: 35216 bytes.
1862 01:57:39.560037 smbios_write_tables: 769ef000
1863 01:57:39.563360 EC returned error result code 3
1864 01:57:39.566659 Couldn't obtain OEM name from CBI
1865 01:57:39.569952 Create SMBIOS type 16
1866 01:57:39.573322 Create SMBIOS type 17
1867 01:57:39.576555 GENERIC: 0.0 (WIFI Device)
1868 01:57:39.579916 SMBIOS tables: 1734 bytes.
1869 01:57:39.583108 Writing table forward entry at 0x00000500
1870 01:57:39.589776 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1871 01:57:39.592929 Writing coreboot table at 0x76b25000
1872 01:57:39.599581 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1873 01:57:39.603057 1. 0000000000001000-000000000009ffff: RAM
1874 01:57:39.606153 2. 00000000000a0000-00000000000fffff: RESERVED
1875 01:57:39.612752 3. 0000000000100000-00000000769eefff: RAM
1876 01:57:39.615971 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1877 01:57:39.622711 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1878 01:57:39.629482 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1879 01:57:39.632751 7. 0000000077000000-000000007fbfffff: RESERVED
1880 01:57:39.639676 8. 00000000c0000000-00000000cfffffff: RESERVED
1881 01:57:39.642884 9. 00000000f8000000-00000000f9ffffff: RESERVED
1882 01:57:39.646174 10. 00000000fb000000-00000000fb000fff: RESERVED
1883 01:57:39.652560 11. 00000000fe000000-00000000fe00ffff: RESERVED
1884 01:57:39.656303 12. 00000000fed80000-00000000fed87fff: RESERVED
1885 01:57:39.662781 13. 00000000fed90000-00000000fed92fff: RESERVED
1886 01:57:39.666080 14. 00000000feda0000-00000000feda1fff: RESERVED
1887 01:57:39.672314 15. 00000000fedc0000-00000000feddffff: RESERVED
1888 01:57:39.675480 16. 0000000100000000-00000004803fffff: RAM
1889 01:57:39.678933 Passing 4 GPIOs to payload:
1890 01:57:39.682372 NAME | PORT | POLARITY | VALUE
1891 01:57:39.688883 lid | undefined | high | high
1892 01:57:39.695596 power | undefined | high | low
1893 01:57:39.698841 oprom | undefined | high | low
1894 01:57:39.705496 EC in RW | 0x000000e5 | high | high
1895 01:57:39.711945 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1896 01:57:39.715295 coreboot table: 1576 bytes.
1897 01:57:39.718487 IMD ROOT 0. 0x76fff000 0x00001000
1898 01:57:39.722075 IMD SMALL 1. 0x76ffe000 0x00001000
1899 01:57:39.725458 FSP MEMORY 2. 0x76c4e000 0x003b0000
1900 01:57:39.728789 VPD 3. 0x76c4d000 0x00000367
1901 01:57:39.731890 RO MCACHE 4. 0x76c4c000 0x00000fdc
1902 01:57:39.735292 CONSOLE 5. 0x76c2c000 0x00020000
1903 01:57:39.742005 FMAP 6. 0x76c2b000 0x00000578
1904 01:57:39.744875 TIME STAMP 7. 0x76c2a000 0x00000910
1905 01:57:39.748704 VBOOT WORK 8. 0x76c16000 0x00014000
1906 01:57:39.751993 ROMSTG STCK 9. 0x76c15000 0x00001000
1907 01:57:39.754752 AFTER CAR 10. 0x76c0a000 0x0000b000
1908 01:57:39.758060 RAMSTAGE 11. 0x76b97000 0x00073000
1909 01:57:39.761471 REFCODE 12. 0x76b42000 0x00055000
1910 01:57:39.764870 SMM BACKUP 13. 0x76b32000 0x00010000
1911 01:57:39.771383 4f444749 14. 0x76b30000 0x00002000
1912 01:57:39.774606 EXT VBT15. 0x76b2d000 0x0000219f
1913 01:57:39.778003 COREBOOT 16. 0x76b25000 0x00008000
1914 01:57:39.781296 ACPI 17. 0x76b01000 0x00024000
1915 01:57:39.784685 ACPI GNVS 18. 0x76b00000 0x00001000
1916 01:57:39.788044 RAMOOPS 19. 0x76a00000 0x00100000
1917 01:57:39.791232 TPM2 TCGLOG20. 0x769f0000 0x00010000
1918 01:57:39.794478 SMBIOS 21. 0x769ef000 0x00000800
1919 01:57:39.797722 IMD small region:
1920 01:57:39.800923 IMD ROOT 0. 0x76ffec00 0x00000400
1921 01:57:39.804278 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1922 01:57:39.807710 POWER STATE 2. 0x76ffeb80 0x00000044
1923 01:57:39.814336 ROMSTAGE 3. 0x76ffeb60 0x00000004
1924 01:57:39.817518 MEM INFO 4. 0x76ffe980 0x000001e0
1925 01:57:39.824252 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1926 01:57:39.827594 MTRR: Physical address space:
1927 01:57:39.831071 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1928 01:57:39.837612 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1929 01:57:39.844075 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1930 01:57:39.850432 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1931 01:57:39.857555 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1932 01:57:39.864052 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1933 01:57:39.870658 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1934 01:57:39.873918 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 01:57:39.877321 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 01:57:39.880473 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 01:57:39.887146 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 01:57:39.890127 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 01:57:39.893680 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 01:57:39.897246 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 01:57:39.903783 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 01:57:39.906897 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 01:57:39.909971 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 01:57:39.913271 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 01:57:39.919074 call enable_fixed_mtrr()
1946 01:57:39.922186 CPU physical address size: 39 bits
1947 01:57:39.928803 MTRR: default type WB/UC MTRR counts: 6/7.
1948 01:57:39.932270 MTRR: WB selected as default type.
1949 01:57:39.938919 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1950 01:57:39.942206 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1951 01:57:39.948310 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1952 01:57:39.955459 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1953 01:57:39.961561 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1954 01:57:39.968573 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1955 01:57:39.975471 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 01:57:39.978901 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 01:57:39.982113 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 01:57:39.985437 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 01:57:39.992272 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 01:57:39.995265 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 01:57:39.998809 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 01:57:40.002337 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 01:57:40.008545 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 01:57:40.011782 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 01:57:40.015124 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 01:57:40.015209
1967 01:57:40.019686 MTRR check
1968 01:57:40.022395 call enable_fixed_mtrr()
1969 01:57:40.022480 Fixed MTRRs : Enabled
1970 01:57:40.025890 Variable MTRRs: Enabled
1971 01:57:40.025975
1972 01:57:40.029095 CPU physical address size: 39 bits
1973 01:57:40.037256 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 152 ms
1974 01:57:40.040650 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 01:57:40.046829 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 01:57:40.050664 MTRR: Fixed MSR 0x258 0x0606060606060606
1977 01:57:40.053829 MTRR: Fixed MSR 0x259 0x0000000000000000
1978 01:57:40.057075 MTRR: Fixed MSR 0x268 0x0606060606060606
1979 01:57:40.063661 MTRR: Fixed MSR 0x269 0x0606060606060606
1980 01:57:40.067087 MTRR: Fixed MSR 0x26a 0x0606060606060606
1981 01:57:40.070515 MTRR: Fixed MSR 0x26b 0x0606060606060606
1982 01:57:40.073373 MTRR: Fixed MSR 0x26c 0x0606060606060606
1983 01:57:40.079969 MTRR: Fixed MSR 0x26d 0x0606060606060606
1984 01:57:40.083820 MTRR: Fixed MSR 0x26e 0x0606060606060606
1985 01:57:40.086575 MTRR: Fixed MSR 0x26f 0x0606060606060606
1986 01:57:40.094310 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 01:57:40.094390 call enable_fixed_mtrr()
1988 01:57:40.100808 MTRR: Fixed MSR 0x259 0x0000000000000000
1989 01:57:40.104171 MTRR: Fixed MSR 0x268 0x0606060606060606
1990 01:57:40.107455 MTRR: Fixed MSR 0x269 0x0606060606060606
1991 01:57:40.110782 MTRR: Fixed MSR 0x26a 0x0606060606060606
1992 01:57:40.117388 MTRR: Fixed MSR 0x26b 0x0606060606060606
1993 01:57:40.120725 MTRR: Fixed MSR 0x26c 0x0606060606060606
1994 01:57:40.123850 MTRR: Fixed MSR 0x26d 0x0606060606060606
1995 01:57:40.127305 MTRR: Fixed MSR 0x26e 0x0606060606060606
1996 01:57:40.133658 MTRR: Fixed MSR 0x26f 0x0606060606060606
1997 01:57:40.136955 CPU physical address size: 39 bits
1998 01:57:40.141527 call enable_fixed_mtrr()
1999 01:57:40.144782 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 01:57:40.151505 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 01:57:40.154685 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 01:57:40.158069 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 01:57:40.161461 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 01:57:40.167949 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 01:57:40.170897 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 01:57:40.174742 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 01:57:40.178151 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 01:57:40.184777 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 01:57:40.187966 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 01:57:40.191300 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 01:57:40.198564 MTRR: Fixed MSR 0x258 0x0606060606060606
2012 01:57:40.198651 call enable_fixed_mtrr()
2013 01:57:40.205024 MTRR: Fixed MSR 0x259 0x0000000000000000
2014 01:57:40.208261 MTRR: Fixed MSR 0x268 0x0606060606060606
2015 01:57:40.211491 MTRR: Fixed MSR 0x269 0x0606060606060606
2016 01:57:40.214911 MTRR: Fixed MSR 0x26a 0x0606060606060606
2017 01:57:40.221498 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 01:57:40.225031 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 01:57:40.228396 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 01:57:40.231570 MTRR: Fixed MSR 0x26e 0x0606060606060606
2021 01:57:40.238360 MTRR: Fixed MSR 0x26f 0x0606060606060606
2022 01:57:40.241537 CPU physical address size: 39 bits
2023 01:57:40.245647 call enable_fixed_mtrr()
2024 01:57:40.248909 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 01:57:40.256120 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 01:57:40.259330 MTRR: Fixed MSR 0x258 0x0606060606060606
2027 01:57:40.262683 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 01:57:40.265840 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 01:57:40.272634 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 01:57:40.275438 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 01:57:40.278718 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 01:57:40.282101 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 01:57:40.288801 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 01:57:40.291990 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 01:57:40.295360 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 01:57:40.302694 MTRR: Fixed MSR 0x258 0x0606060606060606
2037 01:57:40.305922 MTRR: Fixed MSR 0x259 0x0000000000000000
2038 01:57:40.309205 MTRR: Fixed MSR 0x268 0x0606060606060606
2039 01:57:40.312729 MTRR: Fixed MSR 0x269 0x0606060606060606
2040 01:57:40.319341 MTRR: Fixed MSR 0x26a 0x0606060606060606
2041 01:57:40.322274 MTRR: Fixed MSR 0x26b 0x0606060606060606
2042 01:57:40.325596 MTRR: Fixed MSR 0x26c 0x0606060606060606
2043 01:57:40.328967 MTRR: Fixed MSR 0x26d 0x0606060606060606
2044 01:57:40.335460 MTRR: Fixed MSR 0x26e 0x0606060606060606
2045 01:57:40.338824 MTRR: Fixed MSR 0x26f 0x0606060606060606
2046 01:57:40.342163 call enable_fixed_mtrr()
2047 01:57:40.345611 call enable_fixed_mtrr()
2048 01:57:40.348888 CPU physical address size: 39 bits
2049 01:57:40.352375 Checking cr50 for pending updates
2050 01:57:40.356316 CPU physical address size: 39 bits
2051 01:57:40.359468 CPU physical address size: 39 bits
2052 01:57:40.363743 Reading cr50 TPM mode
2053 01:57:40.367067 CPU physical address size: 39 bits
2054 01:57:40.373589 BS: BS_PAYLOAD_LOAD entry times (exec / console): 324 / 6 ms
2055 01:57:40.383718 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2056 01:57:40.387211 Checking segment from ROM address 0xffc02b38
2057 01:57:40.390026 Checking segment from ROM address 0xffc02b54
2058 01:57:40.396630 Loading segment from ROM address 0xffc02b38
2059 01:57:40.396715 code (compression=0)
2060 01:57:40.406673 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2061 01:57:40.416439 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2062 01:57:40.416525 it's not compressed!
2063 01:57:40.557407 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2064 01:57:40.564405 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2065 01:57:40.570966 Loading segment from ROM address 0xffc02b54
2066 01:57:40.574223 Entry Point 0x30000000
2067 01:57:40.574326 Loaded segments
2068 01:57:40.580791 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2069 01:57:40.626092 Finalizing chipset.
2070 01:57:40.629355 Finalizing SMM.
2071 01:57:40.629441 APMC done.
2072 01:57:40.635958 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2073 01:57:40.638809 mp_park_aps done after 0 msecs.
2074 01:57:40.642097 Jumping to boot code at 0x30000000(0x76b25000)
2075 01:57:40.652057 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2076 01:57:40.652142
2077 01:57:40.655383 Starting depthcharge on Voema...
2078 01:57:40.655765 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2079 01:57:40.655870 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2080 01:57:40.655954 Setting prompt string to ['volteer:']
2081 01:57:40.656040 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2082 01:57:40.665406 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2083 01:57:40.672037 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2084 01:57:40.678475 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2085 01:57:40.681971 Failed to find eMMC card reader
2086 01:57:40.685226 Wipe memory regions:
2087 01:57:40.688494 [0x00000000001000, 0x000000000a0000)
2088 01:57:40.691790 [0x00000000100000, 0x00000030000000)
2089 01:57:40.730953 [0x00000032662db0, 0x000000769ef000)
2090 01:57:40.783928 [0x00000100000000, 0x00000480400000)
2091 01:57:41.418482 ec_init: CrosEC protocol v3 supported (256, 256)
2092 01:57:41.850645 R8152: Initializing
2093 01:57:41.853880 Version 6 (ocp_data = 5c30)
2094 01:57:41.857233 R8152: Done initializing
2095 01:57:41.859977 Adding net device
2096 01:57:42.165570 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2097 01:57:42.165768
2098 01:57:42.169129 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2100 01:57:42.269810 volteer: tftpboot 192.168.201.1 6770226/tftp-deploy-lufwbhxc/kernel/bzImage 6770226/tftp-deploy-lufwbhxc/kernel/cmdline 6770226/tftp-deploy-lufwbhxc/ramdisk/ramdisk.cpio.gz
2101 01:57:42.269980 Setting prompt string to ['Starting kernel']
2102 01:57:42.270096 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2103 01:57:42.270180 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:42)
2104 01:57:42.274514 tftpboot 192.168.201.1 6770226/tftp-deploy-lufwbhxc/kernel/bzImoy-lufwbhxc/kernel/cmdline 6770226/tftp-deploy-lufwbhxc/ramdisk/ramdisk.cpio.gz
2105 01:57:42.274602 Waiting for link
2106 01:57:42.477691 done.
2107 01:57:42.477828 MAC: 00:24:32:30:7a:04
2108 01:57:42.480436 Sending DHCP discover... done.
2109 01:57:42.483740 Waiting for reply... done.
2110 01:57:42.487199 Sending DHCP request... done.
2111 01:57:42.490633 Waiting for reply... done.
2112 01:57:42.493947 My ip is 192.168.201.21
2113 01:57:42.496810 The DHCP server ip is 192.168.201.1
2114 01:57:42.500079 TFTP server IP predefined by user: 192.168.201.1
2115 01:57:42.506888 Bootfile predefined by user: 6770226/tftp-deploy-lufwbhxc/kernel/bzImage
2116 01:57:42.513719 Sending tftp read request... done.
2117 01:57:42.517475 Waiting for the transfer...
2118 01:57:43.066066 00000000 ################################################################
2119 01:57:43.608597 00080000 ################################################################
2120 01:57:44.229800 00100000 ################################################################
2121 01:57:44.908257 00180000 ################################################################
2122 01:57:45.506740 00200000 ################################################################
2123 01:57:46.039232 00280000 ################################################################
2124 01:57:46.579263 00300000 ################################################################
2125 01:57:47.110302 00380000 ################################################################
2126 01:57:47.649291 00400000 ################################################################
2127 01:57:48.189770 00480000 ################################################################
2128 01:57:48.725394 00500000 ################################################################
2129 01:57:49.268173 00580000 ################################################################
2130 01:57:49.801066 00600000 ################################################################
2131 01:57:50.165397 00680000 ############################################ done.
2132 01:57:50.168739 The bootfile was 7176128 bytes long.
2133 01:57:50.172437 Sending tftp read request... done.
2134 01:57:50.175195 Waiting for the transfer...
2135 01:57:50.729779 00000000 ################################################################
2136 01:57:51.274790 00080000 ################################################################
2137 01:57:51.809711 00100000 ################################################################
2138 01:57:52.332399 00180000 ################################################################
2139 01:57:52.854512 00200000 ################################################################
2140 01:57:53.397583 00280000 ################################################################
2141 01:57:53.979562 00300000 ################################################################
2142 01:57:54.548339 00380000 ################################################################
2143 01:57:55.109900 00400000 ################################################################
2144 01:57:55.824764 00480000 ################################################################
2145 01:57:56.547658 00500000 ################################################################
2146 01:57:57.220338 00580000 ################################################################
2147 01:57:57.797181 00600000 ################################################################
2148 01:57:58.349832 00680000 ################################################################
2149 01:57:58.919108 00700000 ################################################################
2150 01:57:59.491002 00780000 ################################################################
2151 01:57:59.676076 00800000 #################### done.
2152 01:57:59.679480 Sending tftp read request... done.
2153 01:57:59.682586 Waiting for the transfer...
2154 01:57:59.682671 00000000 # done.
2155 01:57:59.692499 Command line loaded dynamically from TFTP file: 6770226/tftp-deploy-lufwbhxc/kernel/cmdline
2156 01:57:59.705667 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2157 01:57:59.713114 Shutting down all USB controllers.
2158 01:57:59.713204 Removing current net device
2159 01:57:59.716474 Finalizing coreboot
2160 01:57:59.722870 Exiting depthcharge with code 4 at timestamp: 27648236
2161 01:57:59.722954
2162 01:57:59.723022 Starting kernel ...
2163 01:57:59.723083
2164 01:57:59.723143
2165 01:57:59.723433 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2166 01:57:59.723530 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2167 01:57:59.723606 Setting prompt string to ['Linux version [0-9]']
2168 01:57:59.723673 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2169 01:57:59.723742 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2171 02:02:24.724566 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2173 02:02:24.726111 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2175 02:02:24.727284 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2178 02:02:24.729183 end: 2 depthcharge-action (duration 00:05:00) [common]
2180 02:02:24.730736 Cleaning after the job
2181 02:02:24.731346 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770226/tftp-deploy-lufwbhxc/ramdisk
2182 02:02:24.735382 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770226/tftp-deploy-lufwbhxc/kernel
2183 02:02:24.736365 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770226/tftp-deploy-lufwbhxc/modules
2184 02:02:24.736566 start: 5.1 power-off (timeout 00:00:30) [common]
2185 02:02:24.736720 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2186 02:02:24.755953 >> Command sent successfully.
2187 02:02:24.757897 Returned 0 in 0 seconds
2188 02:02:24.858682 end: 5.1 power-off (duration 00:00:00) [common]
2190 02:02:24.859013 start: 5.2 read-feedback (timeout 00:10:00) [common]
2191 02:02:24.859254 Listened to connection for namespace 'common' for up to 1s
2192 02:02:25.864219 Finalising connection for namespace 'common'
2193 02:02:25.864418 Disconnecting from shell: Finalise
2194 02:02:25.965133 end: 5.2 read-feedback (duration 00:00:01) [common]
2195 02:02:25.965372 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6770226
2196 02:02:25.973590 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6770226
2197 02:02:25.973798 JobError: Your job cannot terminate cleanly.