Boot log: asus-cx9400-volteer
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 01:56:45.326944 lava-dispatcher, installed at version: 2022.04
2 01:56:45.327142 start: 0 validate
3 01:56:45.327284 Start time: 2022-07-07 01:56:45.327277+00:00 (UTC)
4 01:56:45.327417 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:56:45.327546 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220624.0%2Famd64%2Finitrd.cpio.gz exists
6 01:56:45.615722 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:56:45.615901 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.9.196-8580-gf266375ffc61%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 01:56:45.900725 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:56:45.900903 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220624.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 01:56:46.180999 Using caching service: 'http://localhost/cache/?uri=%s'
11 01:56:46.181176 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.9.196-8580-gf266375ffc61%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 01:56:46.469721 validate duration: 1.14
14 01:56:46.470182 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 01:56:46.470372 start: 1.1 download-retry (timeout 00:10:00) [common]
16 01:56:46.470527 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 01:56:46.470701 Not decompressing ramdisk as can be used compressed.
18 01:56:46.470868 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220624.0/amd64/initrd.cpio.gz
19 01:56:46.470978 saving as /var/lib/lava/dispatcher/tmp/6770191/tftp-deploy-39dxtqss/ramdisk/initrd.cpio.gz
20 01:56:46.471094 total size: 5411011 (5MB)
21 01:56:46.472720 progress 0% (0MB)
22 01:56:46.475207 progress 5% (0MB)
23 01:56:46.477569 progress 10% (0MB)
24 01:56:46.479873 progress 15% (0MB)
25 01:56:46.482237 progress 20% (1MB)
26 01:56:46.484313 progress 25% (1MB)
27 01:56:46.486417 progress 30% (1MB)
28 01:56:46.488558 progress 35% (1MB)
29 01:56:46.490226 progress 40% (2MB)
30 01:56:46.491565 progress 45% (2MB)
31 01:56:46.492895 progress 50% (2MB)
32 01:56:46.494233 progress 55% (2MB)
33 01:56:46.495714 progress 60% (3MB)
34 01:56:46.497049 progress 65% (3MB)
35 01:56:46.498383 progress 70% (3MB)
36 01:56:46.499679 progress 75% (3MB)
37 01:56:46.501213 progress 80% (4MB)
38 01:56:46.502510 progress 85% (4MB)
39 01:56:46.503809 progress 90% (4MB)
40 01:56:46.505179 progress 95% (4MB)
41 01:56:46.506640 progress 100% (5MB)
42 01:56:46.506827 5MB downloaded in 0.04s (144.43MB/s)
43 01:56:46.506982 end: 1.1.1 http-download (duration 00:00:00) [common]
45 01:56:46.507226 end: 1.1 download-retry (duration 00:00:00) [common]
46 01:56:46.507315 start: 1.2 download-retry (timeout 00:10:00) [common]
47 01:56:46.507403 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 01:56:46.507504 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.9.196-8580-gf266375ffc61/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 01:56:46.507572 saving as /var/lib/lava/dispatcher/tmp/6770191/tftp-deploy-39dxtqss/kernel/bzImage
50 01:56:46.507634 total size: 7176128 (6MB)
51 01:56:46.507695 No compression specified
52 01:56:49.006908 progress 0% (0MB)
53 01:56:49.008737 progress 5% (0MB)
54 01:56:49.010631 progress 10% (0MB)
55 01:56:49.012427 progress 15% (1MB)
56 01:56:49.014259 progress 20% (1MB)
57 01:56:49.016076 progress 25% (1MB)
58 01:56:49.017910 progress 30% (2MB)
59 01:56:49.019700 progress 35% (2MB)
60 01:56:49.021513 progress 40% (2MB)
61 01:56:49.023284 progress 45% (3MB)
62 01:56:49.025110 progress 50% (3MB)
63 01:56:49.026874 progress 55% (3MB)
64 01:56:49.028691 progress 60% (4MB)
65 01:56:49.030458 progress 65% (4MB)
66 01:56:49.032217 progress 70% (4MB)
67 01:56:49.033983 progress 75% (5MB)
68 01:56:49.035737 progress 80% (5MB)
69 01:56:49.037550 progress 85% (5MB)
70 01:56:49.039307 progress 90% (6MB)
71 01:56:49.041079 progress 95% (6MB)
72 01:56:49.042766 progress 100% (6MB)
73 01:56:49.043069 6MB downloaded in 2.54s (2.70MB/s)
74 01:56:49.043235 end: 1.2.1 http-download (duration 00:00:03) [common]
76 01:56:49.043501 end: 1.2 download-retry (duration 00:00:03) [common]
77 01:56:49.043605 start: 1.3 download-retry (timeout 00:09:57) [common]
78 01:56:49.043706 start: 1.3.1 http-download (timeout 00:09:57) [common]
79 01:56:49.043822 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220624.0/amd64/full.rootfs.tar.xz
80 01:56:49.043894 saving as /var/lib/lava/dispatcher/tmp/6770191/tftp-deploy-39dxtqss/nfsrootfs/full.rootfs.tar
81 01:56:49.043975 total size: 132948292 (126MB)
82 01:56:49.044053 Using unxz to decompress xz
83 01:56:49.047480 progress 0% (0MB)
84 01:56:49.387595 progress 5% (6MB)
85 01:56:49.754978 progress 10% (12MB)
86 01:56:50.030867 progress 15% (19MB)
87 01:56:50.240757 progress 20% (25MB)
88 01:56:50.502933 progress 25% (31MB)
89 01:56:50.848482 progress 30% (38MB)
90 01:56:51.201852 progress 35% (44MB)
91 01:56:51.602222 progress 40% (50MB)
92 01:56:51.985958 progress 45% (57MB)
93 01:56:52.346621 progress 50% (63MB)
94 01:56:52.731735 progress 55% (69MB)
95 01:56:53.107203 progress 60% (76MB)
96 01:56:53.466901 progress 65% (82MB)
97 01:56:53.829986 progress 70% (88MB)
98 01:56:54.210594 progress 75% (95MB)
99 01:56:54.655821 progress 80% (101MB)
100 01:56:55.087115 progress 85% (107MB)
101 01:56:55.360799 progress 90% (114MB)
102 01:56:55.701969 progress 95% (120MB)
103 01:56:56.092701 progress 100% (126MB)
104 01:56:56.097918 126MB downloaded in 7.05s (17.97MB/s)
105 01:56:56.098187 end: 1.3.1 http-download (duration 00:00:07) [common]
107 01:56:56.098452 end: 1.3 download-retry (duration 00:00:07) [common]
108 01:56:56.098546 start: 1.4 download-retry (timeout 00:09:50) [common]
109 01:56:56.098634 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 01:56:56.098750 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.9.196-8580-gf266375ffc61/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 01:56:56.098823 saving as /var/lib/lava/dispatcher/tmp/6770191/tftp-deploy-39dxtqss/modules/modules.tar
112 01:56:56.098885 total size: 54512 (0MB)
113 01:56:56.098949 Using unxz to decompress xz
114 01:56:56.102107 progress 60% (0MB)
115 01:56:56.102477 progress 100% (0MB)
116 01:56:56.105951 0MB downloaded in 0.01s (7.37MB/s)
117 01:56:56.106174 end: 1.4.1 http-download (duration 00:00:00) [common]
119 01:56:56.106428 end: 1.4 download-retry (duration 00:00:00) [common]
120 01:56:56.106523 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
121 01:56:56.106621 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
122 01:56:57.353300 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6770191/extract-nfsrootfs-tcfc5ypa
123 01:56:57.353500 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 01:56:57.353602 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 01:56:57.353740 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d
126 01:56:57.353844 makedir: /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin
127 01:56:57.353930 makedir: /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/tests
128 01:56:57.354013 makedir: /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/results
129 01:56:57.354111 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-add-keys
130 01:56:57.354241 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-add-sources
131 01:56:57.354356 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-background-process-start
132 01:56:57.354470 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-background-process-stop
133 01:56:57.354582 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-common-functions
134 01:56:57.354692 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-echo-ipv4
135 01:56:57.354806 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-install-packages
136 01:56:57.354917 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-installed-packages
137 01:56:57.355027 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-os-build
138 01:56:57.355137 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-probe-channel
139 01:56:57.355246 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-probe-ip
140 01:56:57.355355 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-target-ip
141 01:56:57.355464 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-target-mac
142 01:56:57.355572 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-target-storage
143 01:56:57.355685 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-test-case
144 01:56:57.355796 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-test-event
145 01:56:57.355905 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-test-feedback
146 01:56:57.356013 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-test-raise
147 01:56:57.356122 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-test-reference
148 01:56:57.356230 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-test-runner
149 01:56:57.356338 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-test-set
150 01:56:57.356447 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-test-shell
151 01:56:57.356556 Updating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-install-packages (oe)
152 01:56:57.356670 Updating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/bin/lava-installed-packages (oe)
153 01:56:57.356767 Creating /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/environment
154 01:56:57.356855 LAVA metadata
155 01:56:57.356922 - LAVA_JOB_ID=6770191
156 01:56:57.357024 - LAVA_DISPATCHER_IP=192.168.201.1
157 01:56:57.357123 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
158 01:56:57.357190 skipped lava-vland-overlay
159 01:56:57.357266 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 01:56:57.357347 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
161 01:56:57.357409 skipped lava-multinode-overlay
162 01:56:57.357483 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 01:56:57.357565 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
164 01:56:57.357637 Loading test definitions
165 01:56:57.357727 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
166 01:56:57.357803 Using /lava-6770191 at stage 0
167 01:56:57.358055 uuid=6770191_1.5.2.3.1 testdef=None
168 01:56:57.358146 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 01:56:57.358232 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
170 01:56:57.358700 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 01:56:57.358932 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
173 01:56:57.359496 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 01:56:57.359735 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
176 01:56:57.360262 runner path: /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/0/tests/0_dmesg test_uuid 6770191_1.5.2.3.1
177 01:56:57.360411 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 01:56:57.360643 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
180 01:56:57.360716 Using /lava-6770191 at stage 1
181 01:56:57.361007 uuid=6770191_1.5.2.3.5 testdef=None
182 01:56:57.361100 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 01:56:57.361188 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
184 01:56:57.361621 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 01:56:57.361847 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
187 01:56:57.362413 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 01:56:57.362651 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
190 01:56:57.363193 runner path: /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/1/tests/1_bootrr test_uuid 6770191_1.5.2.3.5
191 01:56:57.363336 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 01:56:57.363564 Creating lava-test-runner.conf files
194 01:56:57.363643 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/0 for stage 0
195 01:56:57.363724 - 0_dmesg
196 01:56:57.363799 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6770191/lava-overlay-z0jfco4d/lava-6770191/1 for stage 1
197 01:56:57.363881 - 1_bootrr
198 01:56:57.363972 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 01:56:57.364056 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
200 01:56:57.369556 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 01:56:57.369663 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
202 01:56:57.369775 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 01:56:57.369863 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 01:56:57.369950 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
205 01:56:57.472498 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 01:56:57.472844 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
207 01:56:57.472980 extracting modules file /var/lib/lava/dispatcher/tmp/6770191/tftp-deploy-39dxtqss/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6770191/extract-nfsrootfs-tcfc5ypa
208 01:56:57.477040 extracting modules file /var/lib/lava/dispatcher/tmp/6770191/tftp-deploy-39dxtqss/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6770191/extract-overlay-ramdisk-sg6fhssy/ramdisk
209 01:56:57.480768 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 01:56:57.480880 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
211 01:56:57.480988 [common] Applying overlay to NFS
212 01:56:57.481074 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6770191/compress-overlay-tss71mok/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6770191/extract-nfsrootfs-tcfc5ypa
213 01:56:57.484802 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 01:56:57.484912 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
215 01:56:57.485013 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 01:56:57.485108 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
217 01:56:57.485185 Building ramdisk /var/lib/lava/dispatcher/tmp/6770191/extract-overlay-ramdisk-sg6fhssy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6770191/extract-overlay-ramdisk-sg6fhssy/ramdisk
218 01:56:57.518554 >> 24458 blocks
219 01:56:57.985757 rename /var/lib/lava/dispatcher/tmp/6770191/extract-overlay-ramdisk-sg6fhssy/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6770191/tftp-deploy-39dxtqss/ramdisk/ramdisk.cpio.gz
220 01:56:57.986168 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 01:56:57.986289 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
222 01:56:57.986391 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
223 01:56:57.986488 No mkimage arch provided, not using FIT.
224 01:56:57.986578 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 01:56:57.986665 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 01:56:57.986763 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 01:56:57.986880 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
228 01:56:57.986973 No LXC device requested
229 01:56:57.987054 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 01:56:57.987146 start: 1.7 deploy-device-env (timeout 00:09:48) [common]
231 01:56:57.987227 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 01:56:57.987298 Checking files for TFTP limit of 4294967296 bytes.
233 01:56:57.987669 end: 1 tftp-deploy (duration 00:00:12) [common]
234 01:56:57.987773 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 01:56:57.987865 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 01:56:57.987994 substitutions:
237 01:56:57.988062 - {DTB}: None
238 01:56:57.988125 - {INITRD}: 6770191/tftp-deploy-39dxtqss/ramdisk/ramdisk.cpio.gz
239 01:56:57.988185 - {KERNEL}: 6770191/tftp-deploy-39dxtqss/kernel/bzImage
240 01:56:57.988245 - {LAVA_MAC}: None
241 01:56:57.988303 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6770191/extract-nfsrootfs-tcfc5ypa
242 01:56:57.988361 - {NFS_SERVER_IP}: 192.168.201.1
243 01:56:57.988443 - {PRESEED_CONFIG}: None
244 01:56:57.988511 - {PRESEED_LOCAL}: None
245 01:56:57.988567 - {RAMDISK}: 6770191/tftp-deploy-39dxtqss/ramdisk/ramdisk.cpio.gz
246 01:56:57.988623 - {ROOT_PART}: None
247 01:56:57.988679 - {ROOT}: None
248 01:56:57.988734 - {SERVER_IP}: 192.168.201.1
249 01:56:57.988790 - {TEE}: None
250 01:56:57.988845 Parsed boot commands:
251 01:56:57.988917 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 01:56:57.989096 Parsed boot commands: tftpboot 192.168.201.1 6770191/tftp-deploy-39dxtqss/kernel/bzImage 6770191/tftp-deploy-39dxtqss/kernel/cmdline 6770191/tftp-deploy-39dxtqss/ramdisk/ramdisk.cpio.gz
253 01:56:57.989190 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 01:56:57.989282 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 01:56:57.989383 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 01:56:57.989474 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 01:56:57.989546 Not connected, no need to disconnect.
258 01:56:57.989623 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 01:56:57.989708 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 01:56:57.989785 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-0'
261 01:56:57.992527 Setting prompt string to ['lava-test: # ']
262 01:56:57.992821 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 01:56:57.992938 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 01:56:57.993053 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 01:56:57.993146 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 01:56:57.993371 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
267 01:56:58.012491 >> Command sent successfully.
268 01:56:58.014432 Returned 0 in 0 seconds
269 01:56:58.114811 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 01:56:58.115131 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 01:56:58.115229 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 01:56:58.115317 Setting prompt string to 'Starting depthcharge on Voema...'
274 01:56:58.115383 Changing prompt to 'Starting depthcharge on Voema...'
275 01:56:58.115453 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 01:56:58.115717 [Enter `^Ec?' for help]
277 01:57:06.069960
278 01:57:06.070135
279 01:57:06.079766 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 01:57:06.083154 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 01:57:06.089983 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 01:57:06.092913 CPU: AES supported, TXT NOT supported, VT supported
283 01:57:06.099892 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 01:57:06.106384 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 01:57:06.109333 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 01:57:06.112686 VBOOT: Loading verstage.
287 01:57:06.119590 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
288 01:57:06.122548 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 01:57:06.129427 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 01:57:06.135800 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 01:57:06.142248 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 01:57:06.145904
293 01:57:06.145986
294 01:57:06.155700 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 01:57:06.170790 Probing TPM: . done!
296 01:57:06.173513 TPM ready after 0 ms
297 01:57:06.177024 Connected to device vid:did:rid of 1ae0:0028:00
298 01:57:06.188473 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
299 01:57:06.195471 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 01:57:06.198242 Initialized TPM device CR50 revision 0
301 01:57:06.244932 tlcl_send_startup: Startup return code is 0
302 01:57:06.245115 TPM: setup succeeded
303 01:57:06.259751 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 01:57:06.273536 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 01:57:06.286198 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 01:57:06.296009 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 01:57:06.300219 Chrome EC: UHEPI supported
308 01:57:06.303162 Phase 1
309 01:57:06.306639 FMAP: area GBB found @ 1805000 (458752 bytes)
310 01:57:06.316124 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 01:57:06.322919 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 01:57:06.329589 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 01:57:06.336235 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 01:57:06.339402 Recovery requested (1009000e)
315 01:57:06.342763 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 01:57:06.354694 tlcl_extend: response is 0
317 01:57:06.361343 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 01:57:06.371179 tlcl_extend: response is 0
319 01:57:06.377458 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 01:57:06.383873 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 01:57:06.390534 BS: verstage times (exec / console): total (unknown) / 142 ms
322 01:57:06.390626
323 01:57:06.390696
324 01:57:06.404028 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 01:57:06.410449 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 01:57:06.413653 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 01:57:06.417316 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 01:57:06.423715 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 01:57:06.427266 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 01:57:06.430494 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
331 01:57:06.433662 TCO_STS: 0000 0000
332 01:57:06.436664 GEN_PMCON: d0015038 00002200
333 01:57:06.440420 GBLRST_CAUSE: 00000000 00000000
334 01:57:06.443458 HPR_CAUSE0: 00000000
335 01:57:06.443545 prev_sleep_state 5
336 01:57:06.446928 Boot Count incremented to 8366
337 01:57:06.453593 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 01:57:06.459888 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 01:57:06.469631 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 01:57:06.476357 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 01:57:06.479456 Chrome EC: UHEPI supported
342 01:57:06.486148 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 01:57:06.497725 Probing TPM: done!
344 01:57:06.504256 Connected to device vid:did:rid of 1ae0:0028:00
345 01:57:06.515760 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
346 01:57:06.521825 Initialized TPM device CR50 revision 0
347 01:57:06.531345 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 01:57:06.538228 MRC: Hash idx 0x100b comparison successful.
349 01:57:06.541470 MRC cache found, size faa8
350 01:57:06.541599 bootmode is set to: 2
351 01:57:06.544675 SPD index = 0
352 01:57:06.551281 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 01:57:06.554975 SPD: module type is LPDDR4X
354 01:57:06.561156 SPD: module part number is MT53E512M64D4NW-046
355 01:57:06.568153 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
356 01:57:06.571168 SPD: device width 16 bits, bus width 16 bits
357 01:57:06.574360 SPD: module size is 1024 MB (per channel)
358 01:57:07.014771 CBMEM:
359 01:57:07.017933 IMD: root @ 0x76fff000 254 entries.
360 01:57:07.021295 IMD: root @ 0x76ffec00 62 entries.
361 01:57:07.024403 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 01:57:07.031370 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 01:57:07.034451 External stage cache:
364 01:57:07.038075 IMD: root @ 0x7b3ff000 254 entries.
365 01:57:07.041184 IMD: root @ 0x7b3fec00 62 entries.
366 01:57:07.056555 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 01:57:07.062793 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 01:57:07.069207 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 01:57:07.083873 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 01:57:07.087128 cse_lite: Skip switching to RW in the recovery path
371 01:57:07.091163 8 DIMMs found
372 01:57:07.091256 SMM Memory Map
373 01:57:07.094391 SMRAM : 0x7b000000 0x800000
374 01:57:07.098021 Subregion 0: 0x7b000000 0x200000
375 01:57:07.101303 Subregion 1: 0x7b200000 0x200000
376 01:57:07.104334 Subregion 2: 0x7b400000 0x400000
377 01:57:07.108053 top_of_ram = 0x77000000
378 01:57:07.114358 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
379 01:57:07.118029 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
380 01:57:07.124785 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
381 01:57:07.127849 MTRR Range: Start=ff000000 End=0 (Size 1000000)
382 01:57:07.137584 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
383 01:57:07.144413 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
384 01:57:07.154051 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
385 01:57:07.157188 Processing 211 relocs. Offset value of 0x74c0b000
386 01:57:07.166684 BS: romstage times (exec / console): total (unknown) / 277 ms
387 01:57:07.172638
388 01:57:07.172729
389 01:57:07.182287 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
390 01:57:07.185554 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
391 01:57:07.195854 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
392 01:57:07.202094 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
393 01:57:07.209155 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
394 01:57:07.215437 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
395 01:57:07.262507 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
396 01:57:07.268907 Processing 5008 relocs. Offset value of 0x75d98000
397 01:57:07.272281 BS: postcar times (exec / console): total (unknown) / 59 ms
398 01:57:07.275763
399 01:57:07.275855
400 01:57:07.285797 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
401 01:57:07.285895 Normal boot
402 01:57:07.289024 FW_CONFIG value is 0x804c02
403 01:57:07.292120 PCI: 00:07.0 disabled by fw_config
404 01:57:07.295975 PCI: 00:07.1 disabled by fw_config
405 01:57:07.298944 PCI: 00:0d.2 disabled by fw_config
406 01:57:07.302063 PCI: 00:1c.7 disabled by fw_config
407 01:57:07.308918 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 01:57:07.315701 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
409 01:57:07.318951 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 01:57:07.325350 GENERIC: 0.0 disabled by fw_config
411 01:57:07.328685 GENERIC: 1.0 disabled by fw_config
412 01:57:07.332171 fw_config match found: DB_USB=USB3_ACTIVE
413 01:57:07.335507 fw_config match found: DB_USB=USB3_ACTIVE
414 01:57:07.338676 fw_config match found: DB_USB=USB3_ACTIVE
415 01:57:07.345225 fw_config match found: DB_USB=USB3_ACTIVE
416 01:57:07.348836 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
417 01:57:07.355509 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
418 01:57:07.365419 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
419 01:57:07.371912 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
420 01:57:07.375007 microcode: sig=0x806c1 pf=0x80 revision=0x86
421 01:57:07.381847 microcode: Update skipped, already up-to-date
422 01:57:07.388314 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
423 01:57:07.416060 Detected 4 core, 8 thread CPU.
424 01:57:07.419183 Setting up SMI for CPU
425 01:57:07.422742 IED base = 0x7b400000
426 01:57:07.422831 IED size = 0x00400000
427 01:57:07.426106 Will perform SMM setup.
428 01:57:07.432671 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
429 01:57:07.439174 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
430 01:57:07.445758 Processing 16 relocs. Offset value of 0x00030000
431 01:57:07.449439 Attempting to start 7 APs
432 01:57:07.452439 Waiting for 10ms after sending INIT.
433 01:57:07.467895 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
434 01:57:07.467992 done.
435 01:57:07.471484 AP: slot 5 apic_id 4.
436 01:57:07.474710 AP: slot 4 apic_id 5.
437 01:57:07.474795 AP: slot 6 apic_id 2.
438 01:57:07.477718 AP: slot 2 apic_id 3.
439 01:57:07.481240 AP: slot 7 apic_id 6.
440 01:57:07.481325 AP: slot 3 apic_id 7.
441 01:57:07.487831 Waiting for 2nd SIPI to complete...done.
442 01:57:07.494596 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
443 01:57:07.501216 Processing 13 relocs. Offset value of 0x00038000
444 01:57:07.504338 Unable to locate Global NVS
445 01:57:07.511368 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
446 01:57:07.514511 Installing permanent SMM handler to 0x7b000000
447 01:57:07.524383 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
448 01:57:07.527650 Processing 794 relocs. Offset value of 0x7b010000
449 01:57:07.537737 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
450 01:57:07.540817 Processing 13 relocs. Offset value of 0x7b008000
451 01:57:07.547755 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
452 01:57:07.554348 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
453 01:57:07.557446 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
454 01:57:07.564244 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
455 01:57:07.570880 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
456 01:57:07.577527 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
457 01:57:07.583970 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
458 01:57:07.584078 Unable to locate Global NVS
459 01:57:07.593770 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
460 01:57:07.597412 Clearing SMI status registers
461 01:57:07.597498 SMI_STS: PM1
462 01:57:07.600536 PM1_STS: PWRBTN
463 01:57:07.607421 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
464 01:57:07.610665 In relocation handler: CPU 0
465 01:57:07.613567 New SMBASE=0x7b000000 IEDBASE=0x7b400000
466 01:57:07.620299 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 01:57:07.620386 Relocation complete.
468 01:57:07.630240 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
469 01:57:07.633813 In relocation handler: CPU 1
470 01:57:07.636826 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
471 01:57:07.636912 Relocation complete.
472 01:57:07.647235 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
473 01:57:07.647325 In relocation handler: CPU 4
474 01:57:07.653817 New SMBASE=0x7afff000 IEDBASE=0x7b400000
475 01:57:07.653903 Relocation complete.
476 01:57:07.663519 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
477 01:57:07.663605 In relocation handler: CPU 5
478 01:57:07.670170 New SMBASE=0x7affec00 IEDBASE=0x7b400000
479 01:57:07.673786 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 01:57:07.676883 Relocation complete.
481 01:57:07.683988 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
482 01:57:07.686904 In relocation handler: CPU 3
483 01:57:07.690449 New SMBASE=0x7afff400 IEDBASE=0x7b400000
484 01:57:07.693704 Relocation complete.
485 01:57:07.700434 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
486 01:57:07.703910 In relocation handler: CPU 2
487 01:57:07.706837 New SMBASE=0x7afff800 IEDBASE=0x7b400000
488 01:57:07.710026 Relocation complete.
489 01:57:07.716634 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
490 01:57:07.719838 In relocation handler: CPU 6
491 01:57:07.723651 New SMBASE=0x7affe800 IEDBASE=0x7b400000
492 01:57:07.730006 Writing SMRR. base = 0x7b000006, mask=0xff800c00
493 01:57:07.730120 Relocation complete.
494 01:57:07.736528 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
495 01:57:07.739903 In relocation handler: CPU 7
496 01:57:07.746674 New SMBASE=0x7affe400 IEDBASE=0x7b400000
497 01:57:07.750174 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 01:57:07.753248 Relocation complete.
499 01:57:07.753336 Initializing CPU #0
500 01:57:07.756892 CPU: vendor Intel device 806c1
501 01:57:07.760179 CPU: family 06, model 8c, stepping 01
502 01:57:07.763775 Clearing out pending MCEs
503 01:57:07.766988 Setting up local APIC...
504 01:57:07.770243 apic_id: 0x00 done.
505 01:57:07.770328 Turbo is available but hidden
506 01:57:07.773606 Turbo is available and visible
507 01:57:07.780206 microcode: Update skipped, already up-to-date
508 01:57:07.780292 CPU #0 initialized
509 01:57:07.783256 Initializing CPU #5
510 01:57:07.786901 Initializing CPU #6
511 01:57:07.786987 Initializing CPU #2
512 01:57:07.789958 CPU: vendor Intel device 806c1
513 01:57:07.793452 CPU: family 06, model 8c, stepping 01
514 01:57:07.796608 CPU: vendor Intel device 806c1
515 01:57:07.803384 CPU: family 06, model 8c, stepping 01
516 01:57:07.803476 Clearing out pending MCEs
517 01:57:07.806597 Clearing out pending MCEs
518 01:57:07.810284 Setting up local APIC...
519 01:57:07.810370 Initializing CPU #3
520 01:57:07.813373 Initializing CPU #7
521 01:57:07.816892 CPU: vendor Intel device 806c1
522 01:57:07.819788 CPU: family 06, model 8c, stepping 01
523 01:57:07.823223 CPU: vendor Intel device 806c1
524 01:57:07.826314 CPU: family 06, model 8c, stepping 01
525 01:57:07.829894 Clearing out pending MCEs
526 01:57:07.832924 Clearing out pending MCEs
527 01:57:07.836417 Setting up local APIC...
528 01:57:07.836505 Initializing CPU #4
529 01:57:07.839697 CPU: vendor Intel device 806c1
530 01:57:07.843244 CPU: family 06, model 8c, stepping 01
531 01:57:07.846429 CPU: vendor Intel device 806c1
532 01:57:07.849837 CPU: family 06, model 8c, stepping 01
533 01:57:07.853332 Clearing out pending MCEs
534 01:57:07.856305 Clearing out pending MCEs
535 01:57:07.859956 Setting up local APIC...
536 01:57:07.860042 Initializing CPU #1
537 01:57:07.863073 apic_id: 0x02 done.
538 01:57:07.866237 apic_id: 0x03 done.
539 01:57:07.869891 microcode: Update skipped, already up-to-date
540 01:57:07.872976 microcode: Update skipped, already up-to-date
541 01:57:07.876369 CPU #6 initialized
542 01:57:07.879529 CPU #2 initialized
543 01:57:07.879613 Setting up local APIC...
544 01:57:07.882772 Setting up local APIC...
545 01:57:07.886213 CPU: vendor Intel device 806c1
546 01:57:07.889738 CPU: family 06, model 8c, stepping 01
547 01:57:07.892708 apic_id: 0x05 done.
548 01:57:07.896136 apic_id: 0x04 done.
549 01:57:07.899380 microcode: Update skipped, already up-to-date
550 01:57:07.902979 microcode: Update skipped, already up-to-date
551 01:57:07.906154 Setting up local APIC...
552 01:57:07.909276 CPU #5 initialized
553 01:57:07.909360 CPU #4 initialized
554 01:57:07.912605 apic_id: 0x06 done.
555 01:57:07.916116 apic_id: 0x07 done.
556 01:57:07.919255 microcode: Update skipped, already up-to-date
557 01:57:07.922416 Clearing out pending MCEs
558 01:57:07.922501 CPU #7 initialized
559 01:57:07.929161 microcode: Update skipped, already up-to-date
560 01:57:07.932380 Setting up local APIC...
561 01:57:07.932468 CPU #3 initialized
562 01:57:07.935661 apic_id: 0x01 done.
563 01:57:07.938972 microcode: Update skipped, already up-to-date
564 01:57:07.942630 CPU #1 initialized
565 01:57:07.945508 bsp_do_flight_plan done after 455 msecs.
566 01:57:07.949060 CPU: frequency set to 4000 MHz
567 01:57:07.949146 Enabling SMIs.
568 01:57:07.955684 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
569 01:57:07.973045 SATAXPCIE1 indicates PCIe NVMe is present
570 01:57:07.976263 Probing TPM: done!
571 01:57:07.979697 Connected to device vid:did:rid of 1ae0:0028:00
572 01:57:07.990335 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
573 01:57:07.993708 Initialized TPM device CR50 revision 0
574 01:57:07.996881 Enabling S0i3.4
575 01:57:08.003634 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
576 01:57:08.006866 Found a VBT of 8704 bytes after decompression
577 01:57:08.013709 cse_lite: CSE RO boot. HybridStorageMode disabled
578 01:57:08.020149 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
579 01:57:08.096267 FSPS returned 0
580 01:57:08.099622 Executing Phase 1 of FspMultiPhaseSiInit
581 01:57:08.109514 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
582 01:57:08.113050 port C0 DISC req: usage 1 usb3 1 usb2 5
583 01:57:08.116208 Raw Buffer output 0 00000511
584 01:57:08.119955 Raw Buffer output 1 00000000
585 01:57:08.123289 pmc_send_ipc_cmd succeeded
586 01:57:08.129689 port C1 DISC req: usage 1 usb3 2 usb2 3
587 01:57:08.129776 Raw Buffer output 0 00000321
588 01:57:08.132845 Raw Buffer output 1 00000000
589 01:57:08.137407 pmc_send_ipc_cmd succeeded
590 01:57:08.142542 Detected 4 core, 8 thread CPU.
591 01:57:08.145920 Detected 4 core, 8 thread CPU.
592 01:57:08.380440 Display FSP Version Info HOB
593 01:57:08.383440 Reference Code - CPU = a.0.4c.31
594 01:57:08.386544 uCode Version = 0.0.0.86
595 01:57:08.389952 TXT ACM version = ff.ff.ff.ffff
596 01:57:08.393522 Reference Code - ME = a.0.4c.31
597 01:57:08.396624 MEBx version = 0.0.0.0
598 01:57:08.399731 ME Firmware Version = Consumer SKU
599 01:57:08.403292 Reference Code - PCH = a.0.4c.31
600 01:57:08.406646 PCH-CRID Status = Disabled
601 01:57:08.409807 PCH-CRID Original Value = ff.ff.ff.ffff
602 01:57:08.412836 PCH-CRID New Value = ff.ff.ff.ffff
603 01:57:08.416552 OPROM - RST - RAID = ff.ff.ff.ffff
604 01:57:08.419705 PCH Hsio Version = 4.0.0.0
605 01:57:08.423363 Reference Code - SA - System Agent = a.0.4c.31
606 01:57:08.426489 Reference Code - MRC = 2.0.0.1
607 01:57:08.429445 SA - PCIe Version = a.0.4c.31
608 01:57:08.433214 SA-CRID Status = Disabled
609 01:57:08.436299 SA-CRID Original Value = 0.0.0.1
610 01:57:08.439662 SA-CRID New Value = 0.0.0.1
611 01:57:08.442946 OPROM - VBIOS = ff.ff.ff.ffff
612 01:57:08.446059 IO Manageability Engine FW Version = 11.1.4.0
613 01:57:08.449353 PHY Build Version = 0.0.0.e0
614 01:57:08.452790 Thunderbolt(TM) FW Version = 0.0.0.0
615 01:57:08.459620 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
616 01:57:08.462548 ITSS IRQ Polarities Before:
617 01:57:08.462667 IPC0: 0xffffffff
618 01:57:08.466203 IPC1: 0xffffffff
619 01:57:08.466316 IPC2: 0xffffffff
620 01:57:08.469271 IPC3: 0xffffffff
621 01:57:08.472841 ITSS IRQ Polarities After:
622 01:57:08.472971 IPC0: 0xffffffff
623 01:57:08.475477 IPC1: 0xffffffff
624 01:57:08.475588 IPC2: 0xffffffff
625 01:57:08.478660 IPC3: 0xffffffff
626 01:57:08.482376 Found PCIe Root Port #9 at PCI: 00:1d.0.
627 01:57:08.495742 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
628 01:57:08.505702 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
629 01:57:08.518227 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
630 01:57:08.525242 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
631 01:57:08.528557 Enumerating buses...
632 01:57:08.531516 Show all devs... Before device enumeration.
633 01:57:08.535325 Root Device: enabled 1
634 01:57:08.538312 DOMAIN: 0000: enabled 1
635 01:57:08.538425 CPU_CLUSTER: 0: enabled 1
636 01:57:08.541461 PCI: 00:00.0: enabled 1
637 01:57:08.545103 PCI: 00:02.0: enabled 1
638 01:57:08.548065 PCI: 00:04.0: enabled 1
639 01:57:08.548180 PCI: 00:05.0: enabled 1
640 01:57:08.551405 PCI: 00:06.0: enabled 0
641 01:57:08.554892 PCI: 00:07.0: enabled 0
642 01:57:08.557992 PCI: 00:07.1: enabled 0
643 01:57:08.558107 PCI: 00:07.2: enabled 0
644 01:57:08.561570 PCI: 00:07.3: enabled 0
645 01:57:08.564535 PCI: 00:08.0: enabled 1
646 01:57:08.568112 PCI: 00:09.0: enabled 0
647 01:57:08.568226 PCI: 00:0a.0: enabled 0
648 01:57:08.571224 PCI: 00:0d.0: enabled 1
649 01:57:08.574842 PCI: 00:0d.1: enabled 0
650 01:57:08.578001 PCI: 00:0d.2: enabled 0
651 01:57:08.578113 PCI: 00:0d.3: enabled 0
652 01:57:08.581129 PCI: 00:0e.0: enabled 0
653 01:57:08.584612 PCI: 00:10.2: enabled 1
654 01:57:08.584723 PCI: 00:10.6: enabled 0
655 01:57:08.587854 PCI: 00:10.7: enabled 0
656 01:57:08.590968 PCI: 00:12.0: enabled 0
657 01:57:08.594520 PCI: 00:12.6: enabled 0
658 01:57:08.594610 PCI: 00:13.0: enabled 0
659 01:57:08.597626 PCI: 00:14.0: enabled 1
660 01:57:08.601361 PCI: 00:14.1: enabled 0
661 01:57:08.604866 PCI: 00:14.2: enabled 1
662 01:57:08.604977 PCI: 00:14.3: enabled 1
663 01:57:08.607897 PCI: 00:15.0: enabled 1
664 01:57:08.610663 PCI: 00:15.1: enabled 1
665 01:57:08.614124 PCI: 00:15.2: enabled 1
666 01:57:08.614209 PCI: 00:15.3: enabled 1
667 01:57:08.618022 PCI: 00:16.0: enabled 1
668 01:57:08.620884 PCI: 00:16.1: enabled 0
669 01:57:08.624164 PCI: 00:16.2: enabled 0
670 01:57:08.624297 PCI: 00:16.3: enabled 0
671 01:57:08.627510 PCI: 00:16.4: enabled 0
672 01:57:08.630605 PCI: 00:16.5: enabled 0
673 01:57:08.634214 PCI: 00:17.0: enabled 1
674 01:57:08.634304 PCI: 00:19.0: enabled 0
675 01:57:08.637313 PCI: 00:19.1: enabled 1
676 01:57:08.640507 PCI: 00:19.2: enabled 0
677 01:57:08.644173 PCI: 00:1c.0: enabled 1
678 01:57:08.644259 PCI: 00:1c.1: enabled 0
679 01:57:08.647165 PCI: 00:1c.2: enabled 0
680 01:57:08.650759 PCI: 00:1c.3: enabled 0
681 01:57:08.650846 PCI: 00:1c.4: enabled 0
682 01:57:08.653723 PCI: 00:1c.5: enabled 0
683 01:57:08.657339 PCI: 00:1c.6: enabled 1
684 01:57:08.660578 PCI: 00:1c.7: enabled 0
685 01:57:08.660663 PCI: 00:1d.0: enabled 1
686 01:57:08.663588 PCI: 00:1d.1: enabled 0
687 01:57:08.666962 PCI: 00:1d.2: enabled 1
688 01:57:08.670610 PCI: 00:1d.3: enabled 0
689 01:57:08.670697 PCI: 00:1e.0: enabled 1
690 01:57:08.673792 PCI: 00:1e.1: enabled 0
691 01:57:08.677015 PCI: 00:1e.2: enabled 1
692 01:57:08.680180 PCI: 00:1e.3: enabled 1
693 01:57:08.680267 PCI: 00:1f.0: enabled 1
694 01:57:08.683826 PCI: 00:1f.1: enabled 0
695 01:57:08.686981 PCI: 00:1f.2: enabled 1
696 01:57:08.690542 PCI: 00:1f.3: enabled 1
697 01:57:08.690631 PCI: 00:1f.4: enabled 0
698 01:57:08.693647 PCI: 00:1f.5: enabled 1
699 01:57:08.696874 PCI: 00:1f.6: enabled 0
700 01:57:08.696979 PCI: 00:1f.7: enabled 0
701 01:57:08.700369 APIC: 00: enabled 1
702 01:57:08.703351 GENERIC: 0.0: enabled 1
703 01:57:08.706546 GENERIC: 0.0: enabled 1
704 01:57:08.706633 GENERIC: 1.0: enabled 1
705 01:57:08.710137 GENERIC: 0.0: enabled 1
706 01:57:08.713656 GENERIC: 1.0: enabled 1
707 01:57:08.716889 USB0 port 0: enabled 1
708 01:57:08.717010 GENERIC: 0.0: enabled 1
709 01:57:08.719906 USB0 port 0: enabled 1
710 01:57:08.723436 GENERIC: 0.0: enabled 1
711 01:57:08.723520 I2C: 00:1a: enabled 1
712 01:57:08.726639 I2C: 00:31: enabled 1
713 01:57:08.730134 I2C: 00:32: enabled 1
714 01:57:08.730224 I2C: 00:10: enabled 1
715 01:57:08.733528 I2C: 00:15: enabled 1
716 01:57:08.736650 GENERIC: 0.0: enabled 0
717 01:57:08.739560 GENERIC: 1.0: enabled 0
718 01:57:08.739644 GENERIC: 0.0: enabled 1
719 01:57:08.743276 SPI: 00: enabled 1
720 01:57:08.746487 SPI: 00: enabled 1
721 01:57:08.746592 PNP: 0c09.0: enabled 1
722 01:57:08.749587 GENERIC: 0.0: enabled 1
723 01:57:08.753089 USB3 port 0: enabled 1
724 01:57:08.753204 USB3 port 1: enabled 1
725 01:57:08.756226 USB3 port 2: enabled 0
726 01:57:08.759694 USB3 port 3: enabled 0
727 01:57:08.759809 USB2 port 0: enabled 0
728 01:57:08.762913 USB2 port 1: enabled 1
729 01:57:08.766357 USB2 port 2: enabled 1
730 01:57:08.769584 USB2 port 3: enabled 0
731 01:57:08.769671 USB2 port 4: enabled 1
732 01:57:08.772528 USB2 port 5: enabled 0
733 01:57:08.776235 USB2 port 6: enabled 0
734 01:57:08.776327 USB2 port 7: enabled 0
735 01:57:08.779178 USB2 port 8: enabled 0
736 01:57:08.782826 USB2 port 9: enabled 0
737 01:57:08.786054 USB3 port 0: enabled 0
738 01:57:08.786166 USB3 port 1: enabled 1
739 01:57:08.789272 USB3 port 2: enabled 0
740 01:57:08.792868 USB3 port 3: enabled 0
741 01:57:08.793012 GENERIC: 0.0: enabled 1
742 01:57:08.795833 GENERIC: 1.0: enabled 1
743 01:57:08.799572 APIC: 01: enabled 1
744 01:57:08.799690 APIC: 03: enabled 1
745 01:57:08.802663 APIC: 07: enabled 1
746 01:57:08.805924 APIC: 05: enabled 1
747 01:57:08.806011 APIC: 04: enabled 1
748 01:57:08.808821 APIC: 02: enabled 1
749 01:57:08.812458 APIC: 06: enabled 1
750 01:57:08.812545 Compare with tree...
751 01:57:08.815918 Root Device: enabled 1
752 01:57:08.819051 DOMAIN: 0000: enabled 1
753 01:57:08.819137 PCI: 00:00.0: enabled 1
754 01:57:08.822145 PCI: 00:02.0: enabled 1
755 01:57:08.825784 PCI: 00:04.0: enabled 1
756 01:57:08.828918 GENERIC: 0.0: enabled 1
757 01:57:08.832391 PCI: 00:05.0: enabled 1
758 01:57:08.832478 PCI: 00:06.0: enabled 0
759 01:57:08.835792 PCI: 00:07.0: enabled 0
760 01:57:08.838903 GENERIC: 0.0: enabled 1
761 01:57:08.842553 PCI: 00:07.1: enabled 0
762 01:57:08.845605 GENERIC: 1.0: enabled 1
763 01:57:08.848801 PCI: 00:07.2: enabled 0
764 01:57:08.848887 GENERIC: 0.0: enabled 1
765 01:57:08.851938 PCI: 00:07.3: enabled 0
766 01:57:08.855381 GENERIC: 1.0: enabled 1
767 01:57:08.858747 PCI: 00:08.0: enabled 1
768 01:57:08.861893 PCI: 00:09.0: enabled 0
769 01:57:08.861992 PCI: 00:0a.0: enabled 0
770 01:57:08.865165 PCI: 00:0d.0: enabled 1
771 01:57:08.868591 USB0 port 0: enabled 1
772 01:57:08.872107 USB3 port 0: enabled 1
773 01:57:08.875180 USB3 port 1: enabled 1
774 01:57:08.875274 USB3 port 2: enabled 0
775 01:57:08.878824 USB3 port 3: enabled 0
776 01:57:08.881853 PCI: 00:0d.1: enabled 0
777 01:57:08.885389 PCI: 00:0d.2: enabled 0
778 01:57:08.888633 GENERIC: 0.0: enabled 1
779 01:57:08.888732 PCI: 00:0d.3: enabled 0
780 01:57:08.891658 PCI: 00:0e.0: enabled 0
781 01:57:08.895489 PCI: 00:10.2: enabled 1
782 01:57:08.898489 PCI: 00:10.6: enabled 0
783 01:57:08.901952 PCI: 00:10.7: enabled 0
784 01:57:08.902082 PCI: 00:12.0: enabled 0
785 01:57:08.904940 PCI: 00:12.6: enabled 0
786 01:57:08.908673 PCI: 00:13.0: enabled 0
787 01:57:08.911720 PCI: 00:14.0: enabled 1
788 01:57:08.915192 USB0 port 0: enabled 1
789 01:57:08.915290 USB2 port 0: enabled 0
790 01:57:08.918264 USB2 port 1: enabled 1
791 01:57:08.921972 USB2 port 2: enabled 1
792 01:57:08.925182 USB2 port 3: enabled 0
793 01:57:08.928160 USB2 port 4: enabled 1
794 01:57:08.931832 USB2 port 5: enabled 0
795 01:57:08.931935 USB2 port 6: enabled 0
796 01:57:08.934954 USB2 port 7: enabled 0
797 01:57:08.938193 USB2 port 8: enabled 0
798 01:57:08.941714 USB2 port 9: enabled 0
799 01:57:08.944867 USB3 port 0: enabled 0
800 01:57:08.948068 USB3 port 1: enabled 1
801 01:57:08.948167 USB3 port 2: enabled 0
802 01:57:08.951480 USB3 port 3: enabled 0
803 01:57:08.954929 PCI: 00:14.1: enabled 0
804 01:57:08.958490 PCI: 00:14.2: enabled 1
805 01:57:08.961356 PCI: 00:14.3: enabled 1
806 01:57:08.961455 GENERIC: 0.0: enabled 1
807 01:57:08.964847 PCI: 00:15.0: enabled 1
808 01:57:08.968022 I2C: 00:1a: enabled 1
809 01:57:08.971331 I2C: 00:31: enabled 1
810 01:57:08.971430 I2C: 00:32: enabled 1
811 01:57:08.974724 PCI: 00:15.1: enabled 1
812 01:57:08.978288 I2C: 00:10: enabled 1
813 01:57:08.981561 PCI: 00:15.2: enabled 1
814 01:57:08.985054 PCI: 00:15.3: enabled 1
815 01:57:08.985159 PCI: 00:16.0: enabled 1
816 01:57:08.988059 PCI: 00:16.1: enabled 0
817 01:57:08.991362 PCI: 00:16.2: enabled 0
818 01:57:08.995734 PCI: 00:16.3: enabled 0
819 01:57:08.995843 PCI: 00:16.4: enabled 0
820 01:57:08.998699 PCI: 00:16.5: enabled 0
821 01:57:09.002256 PCI: 00:17.0: enabled 1
822 01:57:09.005849 PCI: 00:19.0: enabled 0
823 01:57:09.005959 PCI: 00:19.1: enabled 1
824 01:57:09.008993 I2C: 00:15: enabled 1
825 01:57:09.012575 PCI: 00:19.2: enabled 0
826 01:57:09.015718 PCI: 00:1d.0: enabled 1
827 01:57:09.019060 GENERIC: 0.0: enabled 1
828 01:57:09.019163 PCI: 00:1e.0: enabled 1
829 01:57:09.069188 PCI: 00:1e.1: enabled 0
830 01:57:09.069348 PCI: 00:1e.2: enabled 1
831 01:57:09.069652 SPI: 00: enabled 1
832 01:57:09.069722 PCI: 00:1e.3: enabled 1
833 01:57:09.069786 SPI: 00: enabled 1
834 01:57:09.070038 PCI: 00:1f.0: enabled 1
835 01:57:09.070107 PNP: 0c09.0: enabled 1
836 01:57:09.070168 PCI: 00:1f.1: enabled 0
837 01:57:09.070226 PCI: 00:1f.2: enabled 1
838 01:57:09.070471 GENERIC: 0.0: enabled 1
839 01:57:09.070537 GENERIC: 0.0: enabled 1
840 01:57:09.070595 GENERIC: 1.0: enabled 1
841 01:57:09.070840 PCI: 00:1f.3: enabled 1
842 01:57:09.070903 PCI: 00:1f.4: enabled 0
843 01:57:09.070961 PCI: 00:1f.5: enabled 1
844 01:57:09.071017 PCI: 00:1f.6: enabled 0
845 01:57:09.071260 PCI: 00:1f.7: enabled 0
846 01:57:09.071324 CPU_CLUSTER: 0: enabled 1
847 01:57:09.071383 APIC: 00: enabled 1
848 01:57:09.120868 APIC: 01: enabled 1
849 01:57:09.121073 APIC: 03: enabled 1
850 01:57:09.121142 APIC: 07: enabled 1
851 01:57:09.121405 APIC: 05: enabled 1
852 01:57:09.121473 APIC: 04: enabled 1
853 01:57:09.121767 APIC: 02: enabled 1
854 01:57:09.121852 APIC: 06: enabled 1
855 01:57:09.121920 Root Device scanning...
856 01:57:09.122355 scan_static_bus for Root Device
857 01:57:09.122443 DOMAIN: 0000 enabled
858 01:57:09.122699 CPU_CLUSTER: 0 enabled
859 01:57:09.122768 DOMAIN: 0000 scanning...
860 01:57:09.122831 PCI: pci_scan_bus for bus 00
861 01:57:09.122892 PCI: 00:00.0 [8086/0000] ops
862 01:57:09.122951 PCI: 00:00.0 [8086/9a12] enabled
863 01:57:09.123198 PCI: 00:02.0 [8086/0000] bus ops
864 01:57:09.123265 PCI: 00:02.0 [8086/9a40] enabled
865 01:57:09.123324 PCI: 00:04.0 [8086/0000] bus ops
866 01:57:09.149497 PCI: 00:04.0 [8086/9a03] enabled
867 01:57:09.149657 PCI: 00:05.0 [8086/9a19] enabled
868 01:57:09.149937 PCI: 00:07.0 [0000/0000] hidden
869 01:57:09.150011 PCI: 00:08.0 [8086/9a11] enabled
870 01:57:09.150073 PCI: 00:0a.0 [8086/9a0d] disabled
871 01:57:09.150134 PCI: 00:0d.0 [8086/0000] bus ops
872 01:57:09.150192 PCI: 00:0d.0 [8086/9a13] enabled
873 01:57:09.150250 PCI: 00:14.0 [8086/0000] bus ops
874 01:57:09.153110 PCI: 00:14.0 [8086/a0ed] enabled
875 01:57:09.153199 PCI: 00:14.2 [8086/a0ef] enabled
876 01:57:09.156724 PCI: 00:14.3 [8086/0000] bus ops
877 01:57:09.159869 PCI: 00:14.3 [8086/a0f0] enabled
878 01:57:09.163161 PCI: 00:15.0 [8086/0000] bus ops
879 01:57:09.166178 PCI: 00:15.0 [8086/a0e8] enabled
880 01:57:09.169441 PCI: 00:15.1 [8086/0000] bus ops
881 01:57:09.172967 PCI: 00:15.1 [8086/a0e9] enabled
882 01:57:09.176493 PCI: 00:15.2 [8086/0000] bus ops
883 01:57:09.179473 PCI: 00:15.2 [8086/a0ea] enabled
884 01:57:09.182551 PCI: 00:15.3 [8086/0000] bus ops
885 01:57:09.186108 PCI: 00:15.3 [8086/a0eb] enabled
886 01:57:09.189249 PCI: 00:16.0 [8086/0000] ops
887 01:57:09.192929 PCI: 00:16.0 [8086/a0e0] enabled
888 01:57:09.199230 PCI: Static device PCI: 00:17.0 not found, disabling it.
889 01:57:09.202963 PCI: 00:19.0 [8086/0000] bus ops
890 01:57:09.206051 PCI: 00:19.0 [8086/a0c5] disabled
891 01:57:09.209612 PCI: 00:19.1 [8086/0000] bus ops
892 01:57:09.212746 PCI: 00:19.1 [8086/a0c6] enabled
893 01:57:09.216182 PCI: 00:1d.0 [8086/0000] bus ops
894 01:57:09.219208 PCI: 00:1d.0 [8086/a0b0] enabled
895 01:57:09.222607 PCI: 00:1e.0 [8086/0000] ops
896 01:57:09.225923 PCI: 00:1e.0 [8086/a0a8] enabled
897 01:57:09.229463 PCI: 00:1e.2 [8086/0000] bus ops
898 01:57:09.232718 PCI: 00:1e.2 [8086/a0aa] enabled
899 01:57:09.235760 PCI: 00:1e.3 [8086/0000] bus ops
900 01:57:09.239284 PCI: 00:1e.3 [8086/a0ab] enabled
901 01:57:09.242385 PCI: 00:1f.0 [8086/0000] bus ops
902 01:57:09.245525 PCI: 00:1f.0 [8086/a087] enabled
903 01:57:09.245635 RTC Init
904 01:57:09.249172 Set power on after power failure.
905 01:57:09.252315 Disabling Deep S3
906 01:57:09.252410 Disabling Deep S3
907 01:57:09.255720 Disabling Deep S4
908 01:57:09.255827 Disabling Deep S4
909 01:57:09.259171 Disabling Deep S5
910 01:57:09.262183 Disabling Deep S5
911 01:57:09.262276 PCI: 00:1f.2 [0000/0000] hidden
912 01:57:09.265576 PCI: 00:1f.3 [8086/0000] bus ops
913 01:57:09.268753 PCI: 00:1f.3 [8086/a0c8] enabled
914 01:57:09.272282 PCI: 00:1f.5 [8086/0000] bus ops
915 01:57:09.275994 PCI: 00:1f.5 [8086/a0a4] enabled
916 01:57:09.278971 PCI: Leftover static devices:
917 01:57:09.282377 PCI: 00:10.2
918 01:57:09.282489 PCI: 00:10.6
919 01:57:09.285597 PCI: 00:10.7
920 01:57:09.285713 PCI: 00:06.0
921 01:57:09.285814 PCI: 00:07.1
922 01:57:09.288849 PCI: 00:07.2
923 01:57:09.288964 PCI: 00:07.3
924 01:57:09.292380 PCI: 00:09.0
925 01:57:09.292527 PCI: 00:0d.1
926 01:57:09.295459 PCI: 00:0d.2
927 01:57:09.295560 PCI: 00:0d.3
928 01:57:09.295665 PCI: 00:0e.0
929 01:57:09.298732 PCI: 00:12.0
930 01:57:09.298831 PCI: 00:12.6
931 01:57:09.302177 PCI: 00:13.0
932 01:57:09.302276 PCI: 00:14.1
933 01:57:09.302345 PCI: 00:16.1
934 01:57:09.305583 PCI: 00:16.2
935 01:57:09.305676 PCI: 00:16.3
936 01:57:09.308959 PCI: 00:16.4
937 01:57:09.309119 PCI: 00:16.5
938 01:57:09.311940 PCI: 00:17.0
939 01:57:09.312040 PCI: 00:19.2
940 01:57:09.312109 PCI: 00:1e.1
941 01:57:09.315415 PCI: 00:1f.1
942 01:57:09.315502 PCI: 00:1f.4
943 01:57:09.318565 PCI: 00:1f.6
944 01:57:09.318654 PCI: 00:1f.7
945 01:57:09.322172 PCI: Check your devicetree.cb.
946 01:57:09.325287 PCI: 00:02.0 scanning...
947 01:57:09.328889 scan_generic_bus for PCI: 00:02.0
948 01:57:09.332124 scan_generic_bus for PCI: 00:02.0 done
949 01:57:09.335234 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
950 01:57:09.339019 PCI: 00:04.0 scanning...
951 01:57:09.341812 scan_generic_bus for PCI: 00:04.0
952 01:57:09.344877 GENERIC: 0.0 enabled
953 01:57:09.351904 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
954 01:57:09.355119 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
955 01:57:09.358306 PCI: 00:0d.0 scanning...
956 01:57:09.361830 scan_static_bus for PCI: 00:0d.0
957 01:57:09.364928 USB0 port 0 enabled
958 01:57:09.365058 USB0 port 0 scanning...
959 01:57:09.368348 scan_static_bus for USB0 port 0
960 01:57:09.371505 USB3 port 0 enabled
961 01:57:09.375077 USB3 port 1 enabled
962 01:57:09.375186 USB3 port 2 disabled
963 01:57:09.378096 USB3 port 3 disabled
964 01:57:09.381737 USB3 port 0 scanning...
965 01:57:09.384958 scan_static_bus for USB3 port 0
966 01:57:09.388516 scan_static_bus for USB3 port 0 done
967 01:57:09.391699 scan_bus: bus USB3 port 0 finished in 6 msecs
968 01:57:09.394782 USB3 port 1 scanning...
969 01:57:09.397903 scan_static_bus for USB3 port 1
970 01:57:09.401621 scan_static_bus for USB3 port 1 done
971 01:57:09.407905 scan_bus: bus USB3 port 1 finished in 6 msecs
972 01:57:09.411458 scan_static_bus for USB0 port 0 done
973 01:57:09.414551 scan_bus: bus USB0 port 0 finished in 43 msecs
974 01:57:09.418256 scan_static_bus for PCI: 00:0d.0 done
975 01:57:09.424847 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
976 01:57:09.424950 PCI: 00:14.0 scanning...
977 01:57:09.428040 scan_static_bus for PCI: 00:14.0
978 01:57:09.431632 USB0 port 0 enabled
979 01:57:09.434750 USB0 port 0 scanning...
980 01:57:09.438292 scan_static_bus for USB0 port 0
981 01:57:09.441392 USB2 port 0 disabled
982 01:57:09.441477 USB2 port 1 enabled
983 01:57:09.444839 USB2 port 2 enabled
984 01:57:09.444924 USB2 port 3 disabled
985 01:57:09.447880 USB2 port 4 enabled
986 01:57:09.451614 USB2 port 5 disabled
987 01:57:09.451700 USB2 port 6 disabled
988 01:57:09.454861 USB2 port 7 disabled
989 01:57:09.457781 USB2 port 8 disabled
990 01:57:09.457866 USB2 port 9 disabled
991 01:57:09.461367 USB3 port 0 disabled
992 01:57:09.464531 USB3 port 1 enabled
993 01:57:09.464617 USB3 port 2 disabled
994 01:57:09.468012 USB3 port 3 disabled
995 01:57:09.471105 USB2 port 1 scanning...
996 01:57:09.474475 scan_static_bus for USB2 port 1
997 01:57:09.477658 scan_static_bus for USB2 port 1 done
998 01:57:09.481243 scan_bus: bus USB2 port 1 finished in 6 msecs
999 01:57:09.484339 USB2 port 2 scanning...
1000 01:57:09.487501 scan_static_bus for USB2 port 2
1001 01:57:09.491133 scan_static_bus for USB2 port 2 done
1002 01:57:09.494265 scan_bus: bus USB2 port 2 finished in 6 msecs
1003 01:57:09.497388 USB2 port 4 scanning...
1004 01:57:09.500657 scan_static_bus for USB2 port 4
1005 01:57:09.504258 scan_static_bus for USB2 port 4 done
1006 01:57:09.510698 scan_bus: bus USB2 port 4 finished in 6 msecs
1007 01:57:09.513876 USB3 port 1 scanning...
1008 01:57:09.517645 scan_static_bus for USB3 port 1
1009 01:57:09.520599 scan_static_bus for USB3 port 1 done
1010 01:57:09.523712 scan_bus: bus USB3 port 1 finished in 6 msecs
1011 01:57:09.527262 scan_static_bus for USB0 port 0 done
1012 01:57:09.533568 scan_bus: bus USB0 port 0 finished in 93 msecs
1013 01:57:09.537213 scan_static_bus for PCI: 00:14.0 done
1014 01:57:09.540266 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1015 01:57:09.544062 PCI: 00:14.3 scanning...
1016 01:57:09.546685 scan_static_bus for PCI: 00:14.3
1017 01:57:09.550012 GENERIC: 0.0 enabled
1018 01:57:09.553680 scan_static_bus for PCI: 00:14.3 done
1019 01:57:09.557021 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1020 01:57:09.559915 PCI: 00:15.0 scanning...
1021 01:57:09.563378 scan_static_bus for PCI: 00:15.0
1022 01:57:09.566724 I2C: 00:1a enabled
1023 01:57:09.566810 I2C: 00:31 enabled
1024 01:57:09.570245 I2C: 00:32 enabled
1025 01:57:09.573550 scan_static_bus for PCI: 00:15.0 done
1026 01:57:09.577185 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1027 01:57:09.580330 PCI: 00:15.1 scanning...
1028 01:57:09.584104 scan_static_bus for PCI: 00:15.1
1029 01:57:09.587325 I2C: 00:10 enabled
1030 01:57:09.590302 scan_static_bus for PCI: 00:15.1 done
1031 01:57:09.593964 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1032 01:57:09.596990 PCI: 00:15.2 scanning...
1033 01:57:09.600103 scan_static_bus for PCI: 00:15.2
1034 01:57:09.603801 scan_static_bus for PCI: 00:15.2 done
1035 01:57:09.610456 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1036 01:57:09.613566 PCI: 00:15.3 scanning...
1037 01:57:09.616994 scan_static_bus for PCI: 00:15.3
1038 01:57:09.620130 scan_static_bus for PCI: 00:15.3 done
1039 01:57:09.623787 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1040 01:57:09.626686 PCI: 00:19.1 scanning...
1041 01:57:09.629903 scan_static_bus for PCI: 00:19.1
1042 01:57:09.633565 I2C: 00:15 enabled
1043 01:57:09.636814 scan_static_bus for PCI: 00:19.1 done
1044 01:57:09.640059 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1045 01:57:09.643241 PCI: 00:1d.0 scanning...
1046 01:57:09.646576 do_pci_scan_bridge for PCI: 00:1d.0
1047 01:57:09.649934 PCI: pci_scan_bus for bus 01
1048 01:57:09.653406 PCI: 01:00.0 [1c5c/174a] enabled
1049 01:57:09.656546 GENERIC: 0.0 enabled
1050 01:57:09.660119 Enabling Common Clock Configuration
1051 01:57:09.663303 L1 Sub-State supported from root port 29
1052 01:57:09.666437 L1 Sub-State Support = 0xf
1053 01:57:09.670050 CommonModeRestoreTime = 0x28
1054 01:57:09.673408 Power On Value = 0x16, Power On Scale = 0x0
1055 01:57:09.676677 ASPM: Enabled L1
1056 01:57:09.680106 PCIe: Max_Payload_Size adjusted to 128
1057 01:57:09.683121 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1058 01:57:09.686669 PCI: 00:1e.2 scanning...
1059 01:57:09.689609 scan_generic_bus for PCI: 00:1e.2
1060 01:57:09.693053 SPI: 00 enabled
1061 01:57:09.699808 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1062 01:57:09.702705 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1063 01:57:09.706310 PCI: 00:1e.3 scanning...
1064 01:57:09.709361 scan_generic_bus for PCI: 00:1e.3
1065 01:57:09.709453 SPI: 00 enabled
1066 01:57:09.715955 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1067 01:57:09.722595 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1068 01:57:09.726491 PCI: 00:1f.0 scanning...
1069 01:57:09.729419 scan_static_bus for PCI: 00:1f.0
1070 01:57:09.729559 PNP: 0c09.0 enabled
1071 01:57:09.732354 PNP: 0c09.0 scanning...
1072 01:57:09.736302 scan_static_bus for PNP: 0c09.0
1073 01:57:09.739325 scan_static_bus for PNP: 0c09.0 done
1074 01:57:09.745912 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1075 01:57:09.749218 scan_static_bus for PCI: 00:1f.0 done
1076 01:57:09.752547 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1077 01:57:09.755617 PCI: 00:1f.2 scanning...
1078 01:57:09.759399 scan_static_bus for PCI: 00:1f.2
1079 01:57:09.762503 GENERIC: 0.0 enabled
1080 01:57:09.762637 GENERIC: 0.0 scanning...
1081 01:57:09.765619 scan_static_bus for GENERIC: 0.0
1082 01:57:09.768806 GENERIC: 0.0 enabled
1083 01:57:09.772292 GENERIC: 1.0 enabled
1084 01:57:09.775746 scan_static_bus for GENERIC: 0.0 done
1085 01:57:09.778798 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1086 01:57:09.782431 scan_static_bus for PCI: 00:1f.2 done
1087 01:57:09.788705 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1088 01:57:09.792268 PCI: 00:1f.3 scanning...
1089 01:57:09.795522 scan_static_bus for PCI: 00:1f.3
1090 01:57:09.798891 scan_static_bus for PCI: 00:1f.3 done
1091 01:57:09.802102 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1092 01:57:09.805684 PCI: 00:1f.5 scanning...
1093 01:57:09.808855 scan_generic_bus for PCI: 00:1f.5
1094 01:57:09.811883 scan_generic_bus for PCI: 00:1f.5 done
1095 01:57:09.818591 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1096 01:57:09.821766 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1097 01:57:09.825283 scan_static_bus for Root Device done
1098 01:57:09.831738 scan_bus: bus Root Device finished in 736 msecs
1099 01:57:09.831847 done
1100 01:57:09.838293 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1101 01:57:09.841540 Chrome EC: UHEPI supported
1102 01:57:09.848198 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1103 01:57:09.855088 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1104 01:57:09.858198 SPI flash protection: WPSW=0 SRP0=0
1105 01:57:09.861759 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1106 01:57:09.868023 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1107 01:57:09.871501 found VGA at PCI: 00:02.0
1108 01:57:09.875013 Setting up VGA for PCI: 00:02.0
1109 01:57:09.878226 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1110 01:57:09.884910 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1111 01:57:09.885033 Allocating resources...
1112 01:57:09.887909 Reading resources...
1113 01:57:09.891323 Root Device read_resources bus 0 link: 0
1114 01:57:09.898013 DOMAIN: 0000 read_resources bus 0 link: 0
1115 01:57:09.901685 PCI: 00:04.0 read_resources bus 1 link: 0
1116 01:57:09.907831 PCI: 00:04.0 read_resources bus 1 link: 0 done
1117 01:57:09.911527 PCI: 00:0d.0 read_resources bus 0 link: 0
1118 01:57:09.917723 USB0 port 0 read_resources bus 0 link: 0
1119 01:57:09.921225 USB0 port 0 read_resources bus 0 link: 0 done
1120 01:57:09.927520 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1121 01:57:09.930980 PCI: 00:14.0 read_resources bus 0 link: 0
1122 01:57:09.934306 USB0 port 0 read_resources bus 0 link: 0
1123 01:57:09.941999 USB0 port 0 read_resources bus 0 link: 0 done
1124 01:57:09.945145 PCI: 00:14.0 read_resources bus 0 link: 0 done
1125 01:57:09.952191 PCI: 00:14.3 read_resources bus 0 link: 0
1126 01:57:09.955441 PCI: 00:14.3 read_resources bus 0 link: 0 done
1127 01:57:09.962411 PCI: 00:15.0 read_resources bus 0 link: 0
1128 01:57:09.965656 PCI: 00:15.0 read_resources bus 0 link: 0 done
1129 01:57:09.971986 PCI: 00:15.1 read_resources bus 0 link: 0
1130 01:57:09.975148 PCI: 00:15.1 read_resources bus 0 link: 0 done
1131 01:57:09.982817 PCI: 00:19.1 read_resources bus 0 link: 0
1132 01:57:09.985711 PCI: 00:19.1 read_resources bus 0 link: 0 done
1133 01:57:09.992540 PCI: 00:1d.0 read_resources bus 1 link: 0
1134 01:57:09.995706 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1135 01:57:10.002522 PCI: 00:1e.2 read_resources bus 2 link: 0
1136 01:57:10.006174 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1137 01:57:10.012782 PCI: 00:1e.3 read_resources bus 3 link: 0
1138 01:57:10.015899 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1139 01:57:10.022247 PCI: 00:1f.0 read_resources bus 0 link: 0
1140 01:57:10.025940 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1141 01:57:10.032309 PCI: 00:1f.2 read_resources bus 0 link: 0
1142 01:57:10.035699 GENERIC: 0.0 read_resources bus 0 link: 0
1143 01:57:10.041951 GENERIC: 0.0 read_resources bus 0 link: 0 done
1144 01:57:10.045416 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1145 01:57:10.052260 DOMAIN: 0000 read_resources bus 0 link: 0 done
1146 01:57:10.055396 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1147 01:57:10.062102 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1148 01:57:10.065325 Root Device read_resources bus 0 link: 0 done
1149 01:57:10.068544 Done reading resources.
1150 01:57:10.075251 Show resources in subtree (Root Device)...After reading.
1151 01:57:10.078329 Root Device child on link 0 DOMAIN: 0000
1152 01:57:10.081852 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1153 01:57:10.091728 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1154 01:57:10.101625 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1155 01:57:10.101772 PCI: 00:00.0
1156 01:57:10.111500 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1157 01:57:10.121389 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1158 01:57:10.131709 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1159 01:57:10.141341 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1160 01:57:10.151640 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1161 01:57:10.161224 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1162 01:57:10.167998 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1163 01:57:10.177706 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1164 01:57:10.187933 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1165 01:57:10.197569 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1166 01:57:10.207723 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1167 01:57:10.217851 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1168 01:57:10.224562 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1169 01:57:10.234158 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1170 01:57:10.244258 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1171 01:57:10.254214 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1172 01:57:10.264196 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1173 01:57:10.273899 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1174 01:57:10.280704 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1175 01:57:10.290460 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1176 01:57:10.293790 PCI: 00:02.0
1177 01:57:10.303896 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1178 01:57:10.313670 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1179 01:57:10.323814 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1180 01:57:10.326886 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1181 01:57:10.336937 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1182 01:57:10.340081 GENERIC: 0.0
1183 01:57:10.340174 PCI: 00:05.0
1184 01:57:10.350315 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1185 01:57:10.353314 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1186 01:57:10.357058 GENERIC: 0.0
1187 01:57:10.360173 PCI: 00:08.0
1188 01:57:10.370250 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 01:57:10.370408 PCI: 00:0a.0
1190 01:57:10.373427 PCI: 00:0d.0 child on link 0 USB0 port 0
1191 01:57:10.383235 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1192 01:57:10.389908 USB0 port 0 child on link 0 USB3 port 0
1193 01:57:10.390011 USB3 port 0
1194 01:57:10.393022 USB3 port 1
1195 01:57:10.393119 USB3 port 2
1196 01:57:10.396389 USB3 port 3
1197 01:57:10.399995 PCI: 00:14.0 child on link 0 USB0 port 0
1198 01:57:10.409788 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1199 01:57:10.416659 USB0 port 0 child on link 0 USB2 port 0
1200 01:57:10.416766 USB2 port 0
1201 01:57:10.419514 USB2 port 1
1202 01:57:10.419601 USB2 port 2
1203 01:57:10.423216 USB2 port 3
1204 01:57:10.423304 USB2 port 4
1205 01:57:10.426389 USB2 port 5
1206 01:57:10.426476 USB2 port 6
1207 01:57:10.429538 USB2 port 7
1208 01:57:10.429651 USB2 port 8
1209 01:57:10.433035 USB2 port 9
1210 01:57:10.433142 USB3 port 0
1211 01:57:10.436190 USB3 port 1
1212 01:57:10.436300 USB3 port 2
1213 01:57:10.439793 USB3 port 3
1214 01:57:10.442853 PCI: 00:14.2
1215 01:57:10.452672 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 01:57:10.462642 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1217 01:57:10.466225 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 01:57:10.475804 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 01:57:10.475895 GENERIC: 0.0
1220 01:57:10.482526 PCI: 00:15.0 child on link 0 I2C: 00:1a
1221 01:57:10.492689 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 01:57:10.492780 I2C: 00:1a
1223 01:57:10.495994 I2C: 00:31
1224 01:57:10.496079 I2C: 00:32
1225 01:57:10.499389 PCI: 00:15.1 child on link 0 I2C: 00:10
1226 01:57:10.508833 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 01:57:10.512353 I2C: 00:10
1228 01:57:10.512439 PCI: 00:15.2
1229 01:57:10.522029 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 01:57:10.525631 PCI: 00:15.3
1231 01:57:10.535360 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 01:57:10.535510 PCI: 00:16.0
1233 01:57:10.545247 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 01:57:10.548427 PCI: 00:19.0
1235 01:57:10.551955 PCI: 00:19.1 child on link 0 I2C: 00:15
1236 01:57:10.561754 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 01:57:10.564951 I2C: 00:15
1238 01:57:10.568358 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1239 01:57:10.578403 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1240 01:57:10.588157 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1241 01:57:10.594944 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1242 01:57:10.598244 GENERIC: 0.0
1243 01:57:10.601586 PCI: 01:00.0
1244 01:57:10.611351 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 01:57:10.617942 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1246 01:57:10.628281 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1247 01:57:10.631430 PCI: 00:1e.0
1248 01:57:10.641308 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 01:57:10.644808 PCI: 00:1e.2 child on link 0 SPI: 00
1250 01:57:10.654535 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 01:57:10.657622 SPI: 00
1252 01:57:10.660639 PCI: 00:1e.3 child on link 0 SPI: 00
1253 01:57:10.671058 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 01:57:10.671144 SPI: 00
1255 01:57:10.677333 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1256 01:57:10.683898 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1257 01:57:10.687585 PNP: 0c09.0
1258 01:57:10.694098 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1259 01:57:10.700763 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1260 01:57:10.710863 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1261 01:57:10.717281 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1262 01:57:10.724050 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1263 01:57:10.724163 GENERIC: 0.0
1264 01:57:10.727205 GENERIC: 1.0
1265 01:57:10.727291 PCI: 00:1f.3
1266 01:57:10.736929 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1267 01:57:10.746919 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1268 01:57:10.749978 PCI: 00:1f.5
1269 01:57:10.760252 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1270 01:57:10.763545 CPU_CLUSTER: 0 child on link 0 APIC: 00
1271 01:57:10.763632 APIC: 00
1272 01:57:10.766636 APIC: 01
1273 01:57:10.766722 APIC: 03
1274 01:57:10.769820 APIC: 07
1275 01:57:10.769905 APIC: 05
1276 01:57:10.769973 APIC: 04
1277 01:57:10.773309 APIC: 02
1278 01:57:10.773394 APIC: 06
1279 01:57:10.779736 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1280 01:57:10.786399 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1281 01:57:10.793199 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1282 01:57:10.799825 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1283 01:57:10.803070 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1284 01:57:10.806525 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1285 01:57:10.812869 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1286 01:57:10.819863 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1287 01:57:10.826164 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1288 01:57:10.832851 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1289 01:57:10.842684 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1290 01:57:10.846265 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1291 01:57:10.856041 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1292 01:57:10.862588 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1293 01:57:10.869356 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1294 01:57:10.872519 DOMAIN: 0000: Resource ranges:
1295 01:57:10.876007 * Base: 1000, Size: 800, Tag: 100
1296 01:57:10.879216 * Base: 1900, Size: e700, Tag: 100
1297 01:57:10.885949 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1298 01:57:10.892239 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1299 01:57:10.899144 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1300 01:57:10.905948 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1301 01:57:10.915785 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1302 01:57:10.922356 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1303 01:57:10.928807 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1304 01:57:10.938774 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1305 01:57:10.945564 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1306 01:57:10.952050 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1307 01:57:10.961697 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1308 01:57:10.968365 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1309 01:57:10.975042 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1310 01:57:10.985196 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1311 01:57:10.991838 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1312 01:57:10.998380 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1313 01:57:11.008568 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1314 01:57:11.015140 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1315 01:57:11.021667 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1316 01:57:11.031452 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1317 01:57:11.037996 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1318 01:57:11.044613 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1319 01:57:11.054344 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1320 01:57:11.060973 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1321 01:57:11.067756 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1322 01:57:11.070938 DOMAIN: 0000: Resource ranges:
1323 01:57:11.077515 * Base: 7fc00000, Size: 40400000, Tag: 200
1324 01:57:11.080756 * Base: d0000000, Size: 28000000, Tag: 200
1325 01:57:11.084588 * Base: fa000000, Size: 1000000, Tag: 200
1326 01:57:11.090869 * Base: fb001000, Size: 2fff000, Tag: 200
1327 01:57:11.094446 * Base: fe010000, Size: 2e000, Tag: 200
1328 01:57:11.097789 * Base: fe03f000, Size: d41000, Tag: 200
1329 01:57:11.100890 * Base: fed88000, Size: 8000, Tag: 200
1330 01:57:11.107525 * Base: fed93000, Size: d000, Tag: 200
1331 01:57:11.110678 * Base: feda2000, Size: 1e000, Tag: 200
1332 01:57:11.114303 * Base: fede0000, Size: 1220000, Tag: 200
1333 01:57:11.120861 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1334 01:57:11.127672 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1335 01:57:11.133994 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1336 01:57:11.140268 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1337 01:57:11.146966 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1338 01:57:11.153631 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1339 01:57:11.160437 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1340 01:57:11.167004 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1341 01:57:11.173644 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1342 01:57:11.180219 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1343 01:57:11.186736 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1344 01:57:11.193445 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1345 01:57:11.199724 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1346 01:57:11.206436 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1347 01:57:11.213254 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1348 01:57:11.219941 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1349 01:57:11.226416 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1350 01:57:11.233084 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1351 01:57:11.240173 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1352 01:57:11.246587 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1353 01:57:11.252865 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1354 01:57:11.259845 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1355 01:57:11.266550 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1356 01:57:11.272665 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1357 01:57:11.283049 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1358 01:57:11.283260 PCI: 00:1d.0: Resource ranges:
1359 01:57:11.289374 * Base: 7fc00000, Size: 100000, Tag: 200
1360 01:57:11.296192 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1361 01:57:11.303089 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1362 01:57:11.309373 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1363 01:57:11.315792 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1364 01:57:11.322825 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1365 01:57:11.329091 Root Device assign_resources, bus 0 link: 0
1366 01:57:11.332514 DOMAIN: 0000 assign_resources, bus 0 link: 0
1367 01:57:11.342844 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1368 01:57:11.349162 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1369 01:57:11.359184 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1370 01:57:11.365788 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1371 01:57:11.372353 PCI: 00:04.0 assign_resources, bus 1 link: 0
1372 01:57:11.375651 PCI: 00:04.0 assign_resources, bus 1 link: 0
1373 01:57:11.382000 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1374 01:57:11.392274 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1375 01:57:11.399100 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1376 01:57:11.405564 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1377 01:57:11.408836 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1378 01:57:11.418415 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1379 01:57:11.422029 PCI: 00:14.0 assign_resources, bus 0 link: 0
1380 01:57:11.428719 PCI: 00:14.0 assign_resources, bus 0 link: 0
1381 01:57:11.435089 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1382 01:57:11.441397 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1383 01:57:11.451589 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1384 01:57:11.455376 PCI: 00:14.3 assign_resources, bus 0 link: 0
1385 01:57:11.461137 PCI: 00:14.3 assign_resources, bus 0 link: 0
1386 01:57:11.468079 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1387 01:57:11.475206 PCI: 00:15.0 assign_resources, bus 0 link: 0
1388 01:57:11.478091 PCI: 00:15.0 assign_resources, bus 0 link: 0
1389 01:57:11.488260 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1390 01:57:11.491550 PCI: 00:15.1 assign_resources, bus 0 link: 0
1391 01:57:11.494418 PCI: 00:15.1 assign_resources, bus 0 link: 0
1392 01:57:11.504791 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1393 01:57:11.510908 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1394 01:57:11.521141 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1395 01:57:11.527402 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1396 01:57:11.534090 PCI: 00:19.1 assign_resources, bus 0 link: 0
1397 01:57:11.537417 PCI: 00:19.1 assign_resources, bus 0 link: 0
1398 01:57:11.547334 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1399 01:57:11.557428 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1400 01:57:11.563690 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1401 01:57:11.570293 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1402 01:57:11.577029 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1403 01:57:11.587271 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1404 01:57:11.593786 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1405 01:57:11.596439 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1406 01:57:11.607108 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1407 01:57:11.610130 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1408 01:57:11.616598 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1409 01:57:11.623638 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1410 01:57:11.629762 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1411 01:57:11.633004 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1412 01:57:11.636575 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1413 01:57:11.643171 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1414 01:57:11.646772 LPC: Trying to open IO window from 800 size 1ff
1415 01:57:11.656526 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1416 01:57:11.663219 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1417 01:57:11.672669 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1418 01:57:11.676453 DOMAIN: 0000 assign_resources, bus 0 link: 0
1419 01:57:11.683113 Root Device assign_resources, bus 0 link: 0
1420 01:57:11.683643 Done setting resources.
1421 01:57:11.689377 Show resources in subtree (Root Device)...After assigning values.
1422 01:57:11.696011 Root Device child on link 0 DOMAIN: 0000
1423 01:57:11.699317 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1424 01:57:11.709115 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1425 01:57:11.719122 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1426 01:57:11.719557 PCI: 00:00.0
1427 01:57:11.729204 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1428 01:57:11.739184 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1429 01:57:11.749083 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1430 01:57:11.759159 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1431 01:57:11.769270 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1432 01:57:11.775277 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1433 01:57:11.785392 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1434 01:57:11.795078 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1435 01:57:11.805226 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1436 01:57:11.815170 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1437 01:57:11.824741 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1438 01:57:11.831547 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1439 01:57:11.841488 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1440 01:57:11.851092 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1441 01:57:11.861080 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1442 01:57:11.871016 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1443 01:57:11.881067 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1444 01:57:11.891104 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1445 01:57:11.897923 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1446 01:57:11.907797 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1447 01:57:11.911128 PCI: 00:02.0
1448 01:57:11.920502 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1449 01:57:11.930807 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1450 01:57:11.940605 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1451 01:57:11.943820 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1452 01:57:11.953535 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1453 01:57:11.957374 GENERIC: 0.0
1454 01:57:11.960475 PCI: 00:05.0
1455 01:57:11.970578 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1456 01:57:11.973892 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1457 01:57:11.976971 GENERIC: 0.0
1458 01:57:11.977391 PCI: 00:08.0
1459 01:57:11.987343 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1460 01:57:11.990444 PCI: 00:0a.0
1461 01:57:11.993707 PCI: 00:0d.0 child on link 0 USB0 port 0
1462 01:57:12.003770 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1463 01:57:12.010373 USB0 port 0 child on link 0 USB3 port 0
1464 01:57:12.010774 USB3 port 0
1465 01:57:12.013376 USB3 port 1
1466 01:57:12.013772 USB3 port 2
1467 01:57:12.016685 USB3 port 3
1468 01:57:12.019968 PCI: 00:14.0 child on link 0 USB0 port 0
1469 01:57:12.030127 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1470 01:57:12.033348 USB0 port 0 child on link 0 USB2 port 0
1471 01:57:12.037042 USB2 port 0
1472 01:57:12.040098 USB2 port 1
1473 01:57:12.040509 USB2 port 2
1474 01:57:12.043131 USB2 port 3
1475 01:57:12.043531 USB2 port 4
1476 01:57:12.046794 USB2 port 5
1477 01:57:12.047192 USB2 port 6
1478 01:57:12.049848 USB2 port 7
1479 01:57:12.050281 USB2 port 8
1480 01:57:12.053469 USB2 port 9
1481 01:57:12.053976 USB3 port 0
1482 01:57:12.056852 USB3 port 1
1483 01:57:12.057297 USB3 port 2
1484 01:57:12.059934 USB3 port 3
1485 01:57:12.060327 PCI: 00:14.2
1486 01:57:12.072973 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1487 01:57:12.083377 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1488 01:57:12.086397 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1489 01:57:12.096501 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1490 01:57:12.099630 GENERIC: 0.0
1491 01:57:12.103534 PCI: 00:15.0 child on link 0 I2C: 00:1a
1492 01:57:12.112685 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1493 01:57:12.115873 I2C: 00:1a
1494 01:57:12.116171 I2C: 00:31
1495 01:57:12.119670 I2C: 00:32
1496 01:57:12.123011 PCI: 00:15.1 child on link 0 I2C: 00:10
1497 01:57:12.133185 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1498 01:57:12.133654 I2C: 00:10
1499 01:57:12.136086 PCI: 00:15.2
1500 01:57:12.146472 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1501 01:57:12.149651 PCI: 00:15.3
1502 01:57:12.159419 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1503 01:57:12.159730 PCI: 00:16.0
1504 01:57:12.169598 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1505 01:57:12.172999 PCI: 00:19.0
1506 01:57:12.176019 PCI: 00:19.1 child on link 0 I2C: 00:15
1507 01:57:12.186047 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1508 01:57:12.189115 I2C: 00:15
1509 01:57:12.192843 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1510 01:57:12.202378 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1511 01:57:12.212471 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1512 01:57:12.222450 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1513 01:57:12.225663 GENERIC: 0.0
1514 01:57:12.228842 PCI: 01:00.0
1515 01:57:12.239113 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1516 01:57:12.249014 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1517 01:57:12.258638 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1518 01:57:12.258995 PCI: 00:1e.0
1519 01:57:12.271808 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1520 01:57:12.275042 PCI: 00:1e.2 child on link 0 SPI: 00
1521 01:57:12.284979 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1522 01:57:12.288321 SPI: 00
1523 01:57:12.291863 PCI: 00:1e.3 child on link 0 SPI: 00
1524 01:57:12.301749 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1525 01:57:12.301867 SPI: 00
1526 01:57:12.308156 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1527 01:57:12.314903 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1528 01:57:12.318076 PNP: 0c09.0
1529 01:57:12.324942 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1530 01:57:12.331409 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1531 01:57:12.341354 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1532 01:57:12.347939 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1533 01:57:12.354705 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1534 01:57:12.354838 GENERIC: 0.0
1535 01:57:12.357897 GENERIC: 1.0
1536 01:57:12.357984 PCI: 00:1f.3
1537 01:57:12.367879 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1538 01:57:12.381096 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1539 01:57:12.381195 PCI: 00:1f.5
1540 01:57:12.391071 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1541 01:57:12.397711 CPU_CLUSTER: 0 child on link 0 APIC: 00
1542 01:57:12.397796 APIC: 00
1543 01:57:12.397875 APIC: 01
1544 01:57:12.401056 APIC: 03
1545 01:57:12.401140 APIC: 07
1546 01:57:12.404310 APIC: 05
1547 01:57:12.404399 APIC: 04
1548 01:57:12.404470 APIC: 02
1549 01:57:12.407670 APIC: 06
1550 01:57:12.407768 Done allocating resources.
1551 01:57:12.414013 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1552 01:57:12.421075 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1553 01:57:12.424123 Configure GPIOs for I2S audio on UP4.
1554 01:57:12.431841 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1555 01:57:12.434752 Enabling resources...
1556 01:57:12.438255 PCI: 00:00.0 subsystem <- 8086/9a12
1557 01:57:12.441234 PCI: 00:00.0 cmd <- 06
1558 01:57:12.444964 PCI: 00:02.0 subsystem <- 8086/9a40
1559 01:57:12.448123 PCI: 00:02.0 cmd <- 03
1560 01:57:12.451285 PCI: 00:04.0 subsystem <- 8086/9a03
1561 01:57:12.454755 PCI: 00:04.0 cmd <- 02
1562 01:57:12.458128 PCI: 00:05.0 subsystem <- 8086/9a19
1563 01:57:12.458280 PCI: 00:05.0 cmd <- 02
1564 01:57:12.464822 PCI: 00:08.0 subsystem <- 8086/9a11
1565 01:57:12.465014 PCI: 00:08.0 cmd <- 06
1566 01:57:12.468084 PCI: 00:0d.0 subsystem <- 8086/9a13
1567 01:57:12.471298 PCI: 00:0d.0 cmd <- 02
1568 01:57:12.474513 PCI: 00:14.0 subsystem <- 8086/a0ed
1569 01:57:12.478171 PCI: 00:14.0 cmd <- 02
1570 01:57:12.481612 PCI: 00:14.2 subsystem <- 8086/a0ef
1571 01:57:12.484762 PCI: 00:14.2 cmd <- 02
1572 01:57:12.488192 PCI: 00:14.3 subsystem <- 8086/a0f0
1573 01:57:12.491394 PCI: 00:14.3 cmd <- 02
1574 01:57:12.494936 PCI: 00:15.0 subsystem <- 8086/a0e8
1575 01:57:12.497929 PCI: 00:15.0 cmd <- 02
1576 01:57:12.501334 PCI: 00:15.1 subsystem <- 8086/a0e9
1577 01:57:12.504932 PCI: 00:15.1 cmd <- 02
1578 01:57:12.508054 PCI: 00:15.2 subsystem <- 8086/a0ea
1579 01:57:12.508487 PCI: 00:15.2 cmd <- 02
1580 01:57:12.515151 PCI: 00:15.3 subsystem <- 8086/a0eb
1581 01:57:12.515582 PCI: 00:15.3 cmd <- 02
1582 01:57:12.518242 PCI: 00:16.0 subsystem <- 8086/a0e0
1583 01:57:12.521671 PCI: 00:16.0 cmd <- 02
1584 01:57:12.524672 PCI: 00:19.1 subsystem <- 8086/a0c6
1585 01:57:12.527937 PCI: 00:19.1 cmd <- 02
1586 01:57:12.531080 PCI: 00:1d.0 bridge ctrl <- 0013
1587 01:57:12.534362 PCI: 00:1d.0 subsystem <- 8086/a0b0
1588 01:57:12.537587 PCI: 00:1d.0 cmd <- 06
1589 01:57:12.541307 PCI: 00:1e.0 subsystem <- 8086/a0a8
1590 01:57:12.544448 PCI: 00:1e.0 cmd <- 06
1591 01:57:12.547698 PCI: 00:1e.2 subsystem <- 8086/a0aa
1592 01:57:12.550971 PCI: 00:1e.2 cmd <- 06
1593 01:57:12.554297 PCI: 00:1e.3 subsystem <- 8086/a0ab
1594 01:57:12.557432 PCI: 00:1e.3 cmd <- 02
1595 01:57:12.560848 PCI: 00:1f.0 subsystem <- 8086/a087
1596 01:57:12.561311 PCI: 00:1f.0 cmd <- 407
1597 01:57:12.567456 PCI: 00:1f.3 subsystem <- 8086/a0c8
1598 01:57:12.567755 PCI: 00:1f.3 cmd <- 02
1599 01:57:12.571069 PCI: 00:1f.5 subsystem <- 8086/a0a4
1600 01:57:12.574283 PCI: 00:1f.5 cmd <- 406
1601 01:57:12.579036 PCI: 01:00.0 cmd <- 02
1602 01:57:12.583743 done.
1603 01:57:12.587023 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1604 01:57:12.590093 Initializing devices...
1605 01:57:12.593821 Root Device init
1606 01:57:12.596892 Chrome EC: Set SMI mask to 0x0000000000000000
1607 01:57:12.603656 Chrome EC: clear events_b mask to 0x0000000000000000
1608 01:57:12.610705 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1609 01:57:12.617136 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1610 01:57:12.624061 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1611 01:57:12.627187 Chrome EC: Set WAKE mask to 0x0000000000000000
1612 01:57:12.635222 fw_config match found: DB_USB=USB3_ACTIVE
1613 01:57:12.638413 Configure Right Type-C port orientation for retimer
1614 01:57:12.641503 Root Device init finished in 46 msecs
1615 01:57:12.646034 PCI: 00:00.0 init
1616 01:57:12.649173 CPU TDP = 9 Watts
1617 01:57:12.652266 CPU PL1 = 9 Watts
1618 01:57:12.652681 CPU PL2 = 40 Watts
1619 01:57:12.655348 CPU PL4 = 83 Watts
1620 01:57:12.658852 PCI: 00:00.0 init finished in 8 msecs
1621 01:57:12.662371 PCI: 00:02.0 init
1622 01:57:12.662676 GMA: Found VBT in CBFS
1623 01:57:12.665704 GMA: Found valid VBT in CBFS
1624 01:57:12.671981 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1625 01:57:12.679113 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1626 01:57:12.682019 PCI: 00:02.0 init finished in 18 msecs
1627 01:57:12.685271 PCI: 00:05.0 init
1628 01:57:12.688363 PCI: 00:05.0 init finished in 0 msecs
1629 01:57:12.692151 PCI: 00:08.0 init
1630 01:57:12.695393 PCI: 00:08.0 init finished in 0 msecs
1631 01:57:12.698381 PCI: 00:14.0 init
1632 01:57:12.702073 PCI: 00:14.0 init finished in 0 msecs
1633 01:57:12.705115 PCI: 00:14.2 init
1634 01:57:12.708452 PCI: 00:14.2 init finished in 0 msecs
1635 01:57:12.711714 PCI: 00:15.0 init
1636 01:57:12.715516 I2C bus 0 version 0x3230302a
1637 01:57:12.718575 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1638 01:57:12.721800 PCI: 00:15.0 init finished in 6 msecs
1639 01:57:12.725000 PCI: 00:15.1 init
1640 01:57:12.725306 I2C bus 1 version 0x3230302a
1641 01:57:12.731949 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1642 01:57:12.735108 PCI: 00:15.1 init finished in 6 msecs
1643 01:57:12.735437 PCI: 00:15.2 init
1644 01:57:12.738371 I2C bus 2 version 0x3230302a
1645 01:57:12.741344 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1646 01:57:12.745061 PCI: 00:15.2 init finished in 6 msecs
1647 01:57:12.748967 PCI: 00:15.3 init
1648 01:57:12.752109 I2C bus 3 version 0x3230302a
1649 01:57:12.755205 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1650 01:57:12.758411 PCI: 00:15.3 init finished in 6 msecs
1651 01:57:12.761997 PCI: 00:16.0 init
1652 01:57:12.765034 PCI: 00:16.0 init finished in 0 msecs
1653 01:57:12.768529 PCI: 00:19.1 init
1654 01:57:12.771661 I2C bus 5 version 0x3230302a
1655 01:57:12.775145 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1656 01:57:12.779038 PCI: 00:19.1 init finished in 6 msecs
1657 01:57:12.781886 PCI: 00:1d.0 init
1658 01:57:12.782333 Initializing PCH PCIe bridge.
1659 01:57:12.788692 PCI: 00:1d.0 init finished in 3 msecs
1660 01:57:12.791914 PCI: 00:1f.0 init
1661 01:57:12.794925 IOAPIC: Initializing IOAPIC at 0xfec00000
1662 01:57:12.798324 IOAPIC: Bootstrap Processor Local APIC = 0x00
1663 01:57:12.801912 IOAPIC: ID = 0x02
1664 01:57:12.804815 IOAPIC: Dumping registers
1665 01:57:12.805292 reg 0x0000: 0x02000000
1666 01:57:12.808276 reg 0x0001: 0x00770020
1667 01:57:12.811559 reg 0x0002: 0x00000000
1668 01:57:12.814848 PCI: 00:1f.0 init finished in 21 msecs
1669 01:57:12.817900 PCI: 00:1f.2 init
1670 01:57:12.821479 Disabling ACPI via APMC.
1671 01:57:12.821783 APMC done.
1672 01:57:12.824742 PCI: 00:1f.2 init finished in 5 msecs
1673 01:57:12.838117 PCI: 01:00.0 init
1674 01:57:12.841557 PCI: 01:00.0 init finished in 0 msecs
1675 01:57:12.845209 PNP: 0c09.0 init
1676 01:57:12.848520 Google Chrome EC uptime: 8.446 seconds
1677 01:57:12.855251 Google Chrome AP resets since EC boot: 1
1678 01:57:12.858284 Google Chrome most recent AP reset causes:
1679 01:57:12.861809 0.379: 32775 shutdown: entering G3
1680 01:57:12.868123 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1681 01:57:12.871631 PNP: 0c09.0 init finished in 22 msecs
1682 01:57:12.877500 Devices initialized
1683 01:57:12.880762 Show all devs... After init.
1684 01:57:12.883851 Root Device: enabled 1
1685 01:57:12.884361 DOMAIN: 0000: enabled 1
1686 01:57:12.887050 CPU_CLUSTER: 0: enabled 1
1687 01:57:12.890806 PCI: 00:00.0: enabled 1
1688 01:57:12.893690 PCI: 00:02.0: enabled 1
1689 01:57:12.894199 PCI: 00:04.0: enabled 1
1690 01:57:12.897767 PCI: 00:05.0: enabled 1
1691 01:57:12.900759 PCI: 00:06.0: enabled 0
1692 01:57:12.904144 PCI: 00:07.0: enabled 0
1693 01:57:12.904674 PCI: 00:07.1: enabled 0
1694 01:57:12.907204 PCI: 00:07.2: enabled 0
1695 01:57:12.910802 PCI: 00:07.3: enabled 0
1696 01:57:12.913794 PCI: 00:08.0: enabled 1
1697 01:57:12.914304 PCI: 00:09.0: enabled 0
1698 01:57:12.917283 PCI: 00:0a.0: enabled 0
1699 01:57:12.920444 PCI: 00:0d.0: enabled 1
1700 01:57:12.923741 PCI: 00:0d.1: enabled 0
1701 01:57:12.924143 PCI: 00:0d.2: enabled 0
1702 01:57:12.927174 PCI: 00:0d.3: enabled 0
1703 01:57:12.930854 PCI: 00:0e.0: enabled 0
1704 01:57:12.931304 PCI: 00:10.2: enabled 1
1705 01:57:12.934261 PCI: 00:10.6: enabled 0
1706 01:57:12.937050 PCI: 00:10.7: enabled 0
1707 01:57:12.940472 PCI: 00:12.0: enabled 0
1708 01:57:12.940875 PCI: 00:12.6: enabled 0
1709 01:57:12.943593 PCI: 00:13.0: enabled 0
1710 01:57:12.946782 PCI: 00:14.0: enabled 1
1711 01:57:12.950503 PCI: 00:14.1: enabled 0
1712 01:57:12.950920 PCI: 00:14.2: enabled 1
1713 01:57:12.953625 PCI: 00:14.3: enabled 1
1714 01:57:12.956892 PCI: 00:15.0: enabled 1
1715 01:57:12.960603 PCI: 00:15.1: enabled 1
1716 01:57:12.961158 PCI: 00:15.2: enabled 1
1717 01:57:12.964070 PCI: 00:15.3: enabled 1
1718 01:57:12.966963 PCI: 00:16.0: enabled 1
1719 01:57:12.967380 PCI: 00:16.1: enabled 0
1720 01:57:12.970540 PCI: 00:16.2: enabled 0
1721 01:57:12.973550 PCI: 00:16.3: enabled 0
1722 01:57:12.976786 PCI: 00:16.4: enabled 0
1723 01:57:12.977309 PCI: 00:16.5: enabled 0
1724 01:57:12.980380 PCI: 00:17.0: enabled 0
1725 01:57:12.983819 PCI: 00:19.0: enabled 0
1726 01:57:12.987035 PCI: 00:19.1: enabled 1
1727 01:57:12.987438 PCI: 00:19.2: enabled 0
1728 01:57:12.990208 PCI: 00:1c.0: enabled 1
1729 01:57:12.993829 PCI: 00:1c.1: enabled 0
1730 01:57:12.997089 PCI: 00:1c.2: enabled 0
1731 01:57:12.997483 PCI: 00:1c.3: enabled 0
1732 01:57:13.000295 PCI: 00:1c.4: enabled 0
1733 01:57:13.003346 PCI: 00:1c.5: enabled 0
1734 01:57:13.006721 PCI: 00:1c.6: enabled 1
1735 01:57:13.007138 PCI: 00:1c.7: enabled 0
1736 01:57:13.010050 PCI: 00:1d.0: enabled 1
1737 01:57:13.013601 PCI: 00:1d.1: enabled 0
1738 01:57:13.014011 PCI: 00:1d.2: enabled 1
1739 01:57:13.016701 PCI: 00:1d.3: enabled 0
1740 01:57:13.020185 PCI: 00:1e.0: enabled 1
1741 01:57:13.023541 PCI: 00:1e.1: enabled 0
1742 01:57:13.023966 PCI: 00:1e.2: enabled 1
1743 01:57:13.026695 PCI: 00:1e.3: enabled 1
1744 01:57:13.029934 PCI: 00:1f.0: enabled 1
1745 01:57:13.033643 PCI: 00:1f.1: enabled 0
1746 01:57:13.034050 PCI: 00:1f.2: enabled 1
1747 01:57:13.036613 PCI: 00:1f.3: enabled 1
1748 01:57:13.039871 PCI: 00:1f.4: enabled 0
1749 01:57:13.043602 PCI: 00:1f.5: enabled 1
1750 01:57:13.044028 PCI: 00:1f.6: enabled 0
1751 01:57:13.046720 PCI: 00:1f.7: enabled 0
1752 01:57:13.050053 APIC: 00: enabled 1
1753 01:57:13.050521 GENERIC: 0.0: enabled 1
1754 01:57:13.053217 GENERIC: 0.0: enabled 1
1755 01:57:13.056579 GENERIC: 1.0: enabled 1
1756 01:57:13.059669 GENERIC: 0.0: enabled 1
1757 01:57:13.060113 GENERIC: 1.0: enabled 1
1758 01:57:13.063058 USB0 port 0: enabled 1
1759 01:57:13.066675 GENERIC: 0.0: enabled 1
1760 01:57:13.067156 USB0 port 0: enabled 1
1761 01:57:13.070560 GENERIC: 0.0: enabled 1
1762 01:57:13.073064 I2C: 00:1a: enabled 1
1763 01:57:13.076642 I2C: 00:31: enabled 1
1764 01:57:13.077155 I2C: 00:32: enabled 1
1765 01:57:13.080033 I2C: 00:10: enabled 1
1766 01:57:13.083167 I2C: 00:15: enabled 1
1767 01:57:13.083625 GENERIC: 0.0: enabled 0
1768 01:57:13.086441 GENERIC: 1.0: enabled 0
1769 01:57:13.089487 GENERIC: 0.0: enabled 1
1770 01:57:13.089912 SPI: 00: enabled 1
1771 01:57:13.093259 SPI: 00: enabled 1
1772 01:57:13.096405 PNP: 0c09.0: enabled 1
1773 01:57:13.096877 GENERIC: 0.0: enabled 1
1774 01:57:13.099417 USB3 port 0: enabled 1
1775 01:57:13.103258 USB3 port 1: enabled 1
1776 01:57:13.106199 USB3 port 2: enabled 0
1777 01:57:13.106652 USB3 port 3: enabled 0
1778 01:57:13.109863 USB2 port 0: enabled 0
1779 01:57:13.112967 USB2 port 1: enabled 1
1780 01:57:13.113403 USB2 port 2: enabled 1
1781 01:57:13.116548 USB2 port 3: enabled 0
1782 01:57:13.119621 USB2 port 4: enabled 1
1783 01:57:13.120050 USB2 port 5: enabled 0
1784 01:57:13.122977 USB2 port 6: enabled 0
1785 01:57:13.126234 USB2 port 7: enabled 0
1786 01:57:13.129809 USB2 port 8: enabled 0
1787 01:57:13.130253 USB2 port 9: enabled 0
1788 01:57:13.132919 USB3 port 0: enabled 0
1789 01:57:13.136212 USB3 port 1: enabled 1
1790 01:57:13.136868 USB3 port 2: enabled 0
1791 01:57:13.139843 USB3 port 3: enabled 0
1792 01:57:13.143153 GENERIC: 0.0: enabled 1
1793 01:57:13.146404 GENERIC: 1.0: enabled 1
1794 01:57:13.146879 APIC: 01: enabled 1
1795 01:57:13.149554 APIC: 03: enabled 1
1796 01:57:13.150025 APIC: 07: enabled 1
1797 01:57:13.152729 APIC: 05: enabled 1
1798 01:57:13.156118 APIC: 04: enabled 1
1799 01:57:13.156586 APIC: 02: enabled 1
1800 01:57:13.159214 APIC: 06: enabled 1
1801 01:57:13.162385 PCI: 01:00.0: enabled 1
1802 01:57:13.166200 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1803 01:57:13.172990 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1804 01:57:13.175704 ELOG: NV offset 0xf30000 size 0x1000
1805 01:57:13.182501 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1806 01:57:13.189226 ELOG: Event(17) added with size 13 at 2022-07-07 01:51:34 UTC
1807 01:57:13.195933 ELOG: Event(92) added with size 9 at 2022-07-07 01:51:34 UTC
1808 01:57:13.202304 ELOG: Event(93) added with size 9 at 2022-07-07 01:51:34 UTC
1809 01:57:13.209350 ELOG: Event(9E) added with size 10 at 2022-07-07 01:51:34 UTC
1810 01:57:13.216152 ELOG: Event(9F) added with size 14 at 2022-07-07 01:51:34 UTC
1811 01:57:13.222370 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1812 01:57:13.228651 ELOG: Event(A1) added with size 10 at 2022-07-07 01:51:34 UTC
1813 01:57:13.232281 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1814 01:57:13.238610 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1815 01:57:13.241855 Finalize devices...
1816 01:57:13.242287 Devices finalized
1817 01:57:13.248847 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1818 01:57:13.255186 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1819 01:57:13.258754 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1820 01:57:13.265183 ME: HFSTS1 : 0x80030055
1821 01:57:13.268343 ME: HFSTS2 : 0x30280116
1822 01:57:13.271958 ME: HFSTS3 : 0x00000050
1823 01:57:13.278524 ME: HFSTS4 : 0x00004000
1824 01:57:13.281778 ME: HFSTS5 : 0x00000000
1825 01:57:13.288570 ME: HFSTS6 : 0x00400006
1826 01:57:13.291791 ME: Manufacturing Mode : YES
1827 01:57:13.294863 ME: SPI Protection Mode Enabled : NO
1828 01:57:13.298143 ME: FW Partition Table : OK
1829 01:57:13.301759 ME: Bringup Loader Failure : NO
1830 01:57:13.305016 ME: Firmware Init Complete : NO
1831 01:57:13.308369 ME: Boot Options Present : NO
1832 01:57:13.311418 ME: Update In Progress : NO
1833 01:57:13.318100 ME: D0i3 Support : YES
1834 01:57:13.321220 ME: Low Power State Enabled : NO
1835 01:57:13.324411 ME: CPU Replaced : YES
1836 01:57:13.328061 ME: CPU Replacement Valid : YES
1837 01:57:13.331332 ME: Current Working State : 5
1838 01:57:13.334680 ME: Current Operation State : 1
1839 01:57:13.337817 ME: Current Operation Mode : 3
1840 01:57:13.340964 ME: Error Code : 0
1841 01:57:13.347469 ME: Enhanced Debug Mode : NO
1842 01:57:13.350567 ME: CPU Debug Disabled : YES
1843 01:57:13.354035 ME: TXT Support : NO
1844 01:57:13.360844 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1845 01:57:13.367546 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1846 01:57:13.370697 CBFS: 'fallback/slic' not found.
1847 01:57:13.373718 ACPI: Writing ACPI tables at 76b01000.
1848 01:57:13.376994 ACPI: * FACS
1849 01:57:13.377314 ACPI: * DSDT
1850 01:57:13.380316 Ramoops buffer: 0x100000@0x76a00000.
1851 01:57:13.386845 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1852 01:57:13.390365 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1853 01:57:13.394132 Google Chrome EC: version:
1854 01:57:13.397146 ro: voema_v2.0.7540-147f8d37d1
1855 01:57:13.400537 rw: voema_v2.0.7540-147f8d37d1
1856 01:57:13.403543 running image: 2
1857 01:57:13.409844 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1858 01:57:13.413552 ACPI: * FADT
1859 01:57:13.413989 SCI is IRQ9
1860 01:57:13.416898 ACPI: added table 1/32, length now 40
1861 01:57:13.420367 ACPI: * SSDT
1862 01:57:13.423574 Found 1 CPU(s) with 8 core(s) each.
1863 01:57:13.429981 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1864 01:57:13.433682 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1865 01:57:13.437006 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1866 01:57:13.440323 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1867 01:57:13.446358 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1868 01:57:13.453329 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1869 01:57:13.456505 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1870 01:57:13.463064 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1871 01:57:13.469513 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1872 01:57:13.472887 \_SB.PCI0.RP09: Added StorageD3Enable property
1873 01:57:13.479470 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1874 01:57:13.482986 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1875 01:57:13.489648 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1876 01:57:13.492803 PS2K: Passing 80 keymaps to kernel
1877 01:57:13.499913 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1878 01:57:13.505946 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1879 01:57:13.512575 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1880 01:57:13.519272 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1881 01:57:13.525784 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1882 01:57:13.532690 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1883 01:57:13.538948 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1884 01:57:13.545481 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1885 01:57:13.549103 ACPI: added table 2/32, length now 44
1886 01:57:13.552246 ACPI: * MCFG
1887 01:57:13.555531 ACPI: added table 3/32, length now 48
1888 01:57:13.555963 ACPI: * TPM2
1889 01:57:13.558815 TPM2 log created at 0x769f0000
1890 01:57:13.562510 ACPI: added table 4/32, length now 52
1891 01:57:13.565570 ACPI: * MADT
1892 01:57:13.566004 SCI is IRQ9
1893 01:57:13.568690 ACPI: added table 5/32, length now 56
1894 01:57:13.572543 current = 76b09850
1895 01:57:13.575765 ACPI: * DMAR
1896 01:57:13.578979 ACPI: added table 6/32, length now 60
1897 01:57:13.581938 ACPI: added table 7/32, length now 64
1898 01:57:13.582387 ACPI: * HPET
1899 01:57:13.585589 ACPI: added table 8/32, length now 68
1900 01:57:13.588813 ACPI: done.
1901 01:57:13.591932 ACPI tables: 35216 bytes.
1902 01:57:13.595530 smbios_write_tables: 769ef000
1903 01:57:13.598647 EC returned error result code 3
1904 01:57:13.601805 Couldn't obtain OEM name from CBI
1905 01:57:13.602262 Create SMBIOS type 16
1906 01:57:13.604908 Create SMBIOS type 17
1907 01:57:13.608658 GENERIC: 0.0 (WIFI Device)
1908 01:57:13.611774 SMBIOS tables: 1750 bytes.
1909 01:57:13.614905 Writing table forward entry at 0x00000500
1910 01:57:13.621837 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1911 01:57:13.624832 Writing coreboot table at 0x76b25000
1912 01:57:13.631643 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1913 01:57:13.635053 1. 0000000000001000-000000000009ffff: RAM
1914 01:57:13.641707 2. 00000000000a0000-00000000000fffff: RESERVED
1915 01:57:13.645007 3. 0000000000100000-00000000769eefff: RAM
1916 01:57:13.651303 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1917 01:57:13.654655 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1918 01:57:13.661418 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1919 01:57:13.664787 7. 0000000077000000-000000007fbfffff: RESERVED
1920 01:57:13.671679 8. 00000000c0000000-00000000cfffffff: RESERVED
1921 01:57:13.675160 9. 00000000f8000000-00000000f9ffffff: RESERVED
1922 01:57:13.681297 10. 00000000fb000000-00000000fb000fff: RESERVED
1923 01:57:13.684347 11. 00000000fe000000-00000000fe00ffff: RESERVED
1924 01:57:13.691492 12. 00000000fed80000-00000000fed87fff: RESERVED
1925 01:57:13.694615 13. 00000000fed90000-00000000fed92fff: RESERVED
1926 01:57:13.701281 14. 00000000feda0000-00000000feda1fff: RESERVED
1927 01:57:13.704552 15. 00000000fedc0000-00000000feddffff: RESERVED
1928 01:57:13.707763 16. 0000000100000000-00000002803fffff: RAM
1929 01:57:13.711367 Passing 4 GPIOs to payload:
1930 01:57:13.717856 NAME | PORT | POLARITY | VALUE
1931 01:57:13.720839 lid | undefined | high | high
1932 01:57:13.727713 power | undefined | high | low
1933 01:57:13.734494 oprom | undefined | high | low
1934 01:57:13.737668 EC in RW | 0x000000e5 | high | high
1935 01:57:13.744184 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e9a9
1936 01:57:13.747520 coreboot table: 1576 bytes.
1937 01:57:13.751051 IMD ROOT 0. 0x76fff000 0x00001000
1938 01:57:13.753870 IMD SMALL 1. 0x76ffe000 0x00001000
1939 01:57:13.757533 FSP MEMORY 2. 0x76c4e000 0x003b0000
1940 01:57:13.760855 VPD 3. 0x76c4d000 0x00000367
1941 01:57:13.767300 RO MCACHE 4. 0x76c4c000 0x00000fdc
1942 01:57:13.770470 CONSOLE 5. 0x76c2c000 0x00020000
1943 01:57:13.774232 FMAP 6. 0x76c2b000 0x00000578
1944 01:57:13.777352 TIME STAMP 7. 0x76c2a000 0x00000910
1945 01:57:13.780638 VBOOT WORK 8. 0x76c16000 0x00014000
1946 01:57:13.784174 ROMSTG STCK 9. 0x76c15000 0x00001000
1947 01:57:13.787350 AFTER CAR 10. 0x76c0a000 0x0000b000
1948 01:57:13.790607 RAMSTAGE 11. 0x76b97000 0x00073000
1949 01:57:13.797084 REFCODE 12. 0x76b42000 0x00055000
1950 01:57:13.800608 SMM BACKUP 13. 0x76b32000 0x00010000
1951 01:57:13.803810 4f444749 14. 0x76b30000 0x00002000
1952 01:57:13.806936 EXT VBT15. 0x76b2d000 0x0000219f
1953 01:57:13.810631 COREBOOT 16. 0x76b25000 0x00008000
1954 01:57:13.813802 ACPI 17. 0x76b01000 0x00024000
1955 01:57:13.817098 ACPI GNVS 18. 0x76b00000 0x00001000
1956 01:57:13.820312 RAMOOPS 19. 0x76a00000 0x00100000
1957 01:57:13.823398 TPM2 TCGLOG20. 0x769f0000 0x00010000
1958 01:57:13.830265 SMBIOS 21. 0x769ef000 0x00000800
1959 01:57:13.830697 IMD small region:
1960 01:57:13.833501 IMD ROOT 0. 0x76ffec00 0x00000400
1961 01:57:13.836555 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1962 01:57:13.843481 POWER STATE 2. 0x76ffeb80 0x00000044
1963 01:57:13.846586 ROMSTAGE 3. 0x76ffeb60 0x00000004
1964 01:57:13.849960 MEM INFO 4. 0x76ffe980 0x000001e0
1965 01:57:13.857209 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1966 01:57:13.859850 MTRR: Physical address space:
1967 01:57:13.866497 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1968 01:57:13.873748 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1969 01:57:13.876876 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1970 01:57:13.883086 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1971 01:57:13.889857 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1972 01:57:13.896128 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1973 01:57:13.902904 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1974 01:57:13.906149 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 01:57:13.909855 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 01:57:13.916293 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 01:57:13.919486 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 01:57:13.922755 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 01:57:13.926265 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 01:57:13.933005 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 01:57:13.936309 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 01:57:13.939282 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 01:57:13.942514 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 01:57:13.949642 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 01:57:13.952878 call enable_fixed_mtrr()
1986 01:57:13.955894 CPU physical address size: 39 bits
1987 01:57:13.959275 MTRR: default type WB/UC MTRR counts: 6/6.
1988 01:57:13.962492 MTRR: UC selected as default type.
1989 01:57:13.969374 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1990 01:57:13.975961 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1991 01:57:13.982395 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1992 01:57:13.989089 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1993 01:57:13.995983 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1994 01:57:13.998856 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1995 01:57:14.003438
1996 01:57:14.003752 MTRR check
1997 01:57:14.007030 Fixed MTRRs : Enabled
1998 01:57:14.007395 Variable MTRRs: Enabled
1999 01:57:14.007714
2000 01:57:14.013322 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 01:57:14.016608 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 01:57:14.020284 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 01:57:14.023500 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 01:57:14.030122 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 01:57:14.033190 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 01:57:14.036720 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 01:57:14.039833 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 01:57:14.046118 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 01:57:14.050038 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 01:57:14.053118 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 01:57:14.059788 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2012 01:57:14.062978 call enable_fixed_mtrr()
2013 01:57:14.066881 Checking cr50 for pending updates
2014 01:57:14.070621 CPU physical address size: 39 bits
2015 01:57:14.074217 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 01:57:14.077593 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 01:57:14.081072 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 01:57:14.086972 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 01:57:14.090807 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 01:57:14.093891 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 01:57:14.097187 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 01:57:14.104059 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 01:57:14.107091 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 01:57:14.110803 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 01:57:14.113913 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 01:57:14.120270 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 01:57:14.123494 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 01:57:14.127254 call enable_fixed_mtrr()
2029 01:57:14.130652 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 01:57:14.133484 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 01:57:14.140656 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 01:57:14.143967 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 01:57:14.147089 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 01:57:14.150261 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 01:57:14.156687 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 01:57:14.160368 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 01:57:14.163592 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 01:57:14.166819 CPU physical address size: 39 bits
2039 01:57:14.171182 call enable_fixed_mtrr()
2040 01:57:14.174303 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 01:57:14.181465 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 01:57:14.184463 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 01:57:14.187749 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 01:57:14.190898 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 01:57:14.197821 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 01:57:14.200985 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 01:57:14.204198 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 01:57:14.207778 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 01:57:14.214399 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 01:57:14.217527 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 01:57:14.220651 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 01:57:14.227601 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 01:57:14.227921 call enable_fixed_mtrr()
2054 01:57:14.233967 MTRR: Fixed MSR 0x259 0x0000000000000000
2055 01:57:14.237729 MTRR: Fixed MSR 0x268 0x0606060606060606
2056 01:57:14.240596 MTRR: Fixed MSR 0x269 0x0606060606060606
2057 01:57:14.244454 MTRR: Fixed MSR 0x26a 0x0606060606060606
2058 01:57:14.250646 MTRR: Fixed MSR 0x26b 0x0606060606060606
2059 01:57:14.254099 MTRR: Fixed MSR 0x26c 0x0606060606060606
2060 01:57:14.257115 MTRR: Fixed MSR 0x26d 0x0606060606060606
2061 01:57:14.260979 MTRR: Fixed MSR 0x26e 0x0606060606060606
2062 01:57:14.264410 MTRR: Fixed MSR 0x26f 0x0606060606060606
2063 01:57:14.270599 CPU physical address size: 39 bits
2064 01:57:14.273868 call enable_fixed_mtrr()
2065 01:57:14.277389 MTRR: Fixed MSR 0x250 0x0606060606060606
2066 01:57:14.280750 MTRR: Fixed MSR 0x250 0x0606060606060606
2067 01:57:14.287383 MTRR: Fixed MSR 0x258 0x0606060606060606
2068 01:57:14.290709 MTRR: Fixed MSR 0x259 0x0000000000000000
2069 01:57:14.293447 MTRR: Fixed MSR 0x268 0x0606060606060606
2070 01:57:14.297043 MTRR: Fixed MSR 0x269 0x0606060606060606
2071 01:57:14.303442 MTRR: Fixed MSR 0x26a 0x0606060606060606
2072 01:57:14.306927 MTRR: Fixed MSR 0x26b 0x0606060606060606
2073 01:57:14.310033 MTRR: Fixed MSR 0x26c 0x0606060606060606
2074 01:57:14.313996 MTRR: Fixed MSR 0x26d 0x0606060606060606
2075 01:57:14.320037 MTRR: Fixed MSR 0x26e 0x0606060606060606
2076 01:57:14.323803 MTRR: Fixed MSR 0x26f 0x0606060606060606
2077 01:57:14.326535 MTRR: Fixed MSR 0x258 0x0606060606060606
2078 01:57:14.333397 MTRR: Fixed MSR 0x259 0x0000000000000000
2079 01:57:14.336681 MTRR: Fixed MSR 0x268 0x0606060606060606
2080 01:57:14.339819 MTRR: Fixed MSR 0x269 0x0606060606060606
2081 01:57:14.343261 MTRR: Fixed MSR 0x26a 0x0606060606060606
2082 01:57:14.349860 MTRR: Fixed MSR 0x26b 0x0606060606060606
2083 01:57:14.352999 MTRR: Fixed MSR 0x26c 0x0606060606060606
2084 01:57:14.356541 MTRR: Fixed MSR 0x26d 0x0606060606060606
2085 01:57:14.360161 MTRR: Fixed MSR 0x26e 0x0606060606060606
2086 01:57:14.366460 MTRR: Fixed MSR 0x26f 0x0606060606060606
2087 01:57:14.369962 call enable_fixed_mtrr()
2088 01:57:14.370411 call enable_fixed_mtrr()
2089 01:57:14.373584 Reading cr50 TPM mode
2090 01:57:14.377269 CPU physical address size: 39 bits
2091 01:57:14.380616 CPU physical address size: 39 bits
2092 01:57:14.387129 BS: BS_PAYLOAD_LOAD entry times (exec / console): 312 / 6 ms
2093 01:57:14.390620 CPU physical address size: 39 bits
2094 01:57:14.393890 CPU physical address size: 39 bits
2095 01:57:14.403661 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2096 01:57:14.406894 Checking segment from ROM address 0xffc02b38
2097 01:57:14.410313 Checking segment from ROM address 0xffc02b54
2098 01:57:14.416988 Loading segment from ROM address 0xffc02b38
2099 01:57:14.417430 code (compression=0)
2100 01:57:14.426669 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2101 01:57:14.436307 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2102 01:57:14.436750 it's not compressed!
2103 01:57:14.575867 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2104 01:57:14.582948 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2105 01:57:14.589258 Loading segment from ROM address 0xffc02b54
2106 01:57:14.589698 Entry Point 0x30000000
2107 01:57:14.592419 Loaded segments
2108 01:57:14.598887 BS: BS_PAYLOAD_LOAD run times (exec / console): 143 / 63 ms
2109 01:57:14.641763 Finalizing chipset.
2110 01:57:14.645048 Finalizing SMM.
2111 01:57:14.645238 APMC done.
2112 01:57:14.651506 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2113 01:57:14.654860 mp_park_aps done after 0 msecs.
2114 01:57:14.658691 Jumping to boot code at 0x30000000(0x76b25000)
2115 01:57:14.668292 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2116 01:57:14.668518
2117 01:57:14.671578 Starting depthcharge on Voema...
2118 01:57:14.672305 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2119 01:57:14.672643 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2120 01:57:14.672934 Setting prompt string to ['volteer:']
2121 01:57:14.673275 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2122 01:57:14.681745 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2123 01:57:14.688193 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2124 01:57:14.694749 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2125 01:57:14.698149 Failed to find eMMC card reader
2126 01:57:14.698590 Wipe memory regions:
2127 01:57:14.705054 [0x00000000001000, 0x000000000a0000)
2128 01:57:14.707924 [0x00000000100000, 0x00000030000000)
2129 01:57:14.736734 [0x00000032662db0, 0x000000769ef000)
2130 01:57:14.775142 [0x00000100000000, 0x00000280400000)
2131 01:57:14.978484 ec_init: CrosEC protocol v3 supported (256, 256)
2132 01:57:14.985502 update_port_state: port C0 state: usb enable 1 mux conn 0
2133 01:57:14.992175 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2134 01:57:14.998249 pmc_check_ipc_sts: STS_BUSY done after 1512 us
2135 01:57:15.004874 send_conn_disc_msg: pmc_send_cmd succeeded
2136 01:57:15.434316 R8152: Initializing
2137 01:57:15.438143 Version 6 (ocp_data = 5c30)
2138 01:57:15.441284 R8152: Done initializing
2139 01:57:15.444417 Adding net device
2140 01:57:15.749011 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2141 01:57:15.749425
2142 01:57:15.752872 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2144 01:57:15.854023 volteer: tftpboot 192.168.201.1 6770191/tftp-deploy-39dxtqss/kernel/bzImage 6770191/tftp-deploy-39dxtqss/kernel/cmdline 6770191/tftp-deploy-39dxtqss/ramdisk/ramdisk.cpio.gz
2145 01:57:15.854239 Setting prompt string to ['Starting kernel']
2146 01:57:15.854351 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2147 01:57:15.854463 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:42)
2148 01:57:15.858154 tftpboot 192.168.201.1 6770191/tftp-deploy-39dxtqss/kernel/bzImoy-39dxtqss/kernel/cmdline 6770191/tftp-deploy-39dxtqss/ramdisk/ramdisk.cpio.gz
2149 01:57:15.858282 Waiting for link
2150 01:57:16.061392 done.
2151 01:57:16.061537 MAC: 00:24:32:30:7b:ec
2152 01:57:16.064415 Sending DHCP discover... done.
2153 01:57:16.067688 Waiting for reply... done.
2154 01:57:16.071433 Sending DHCP request... done.
2155 01:57:16.074513 Waiting for reply... done.
2156 01:57:16.077696 My ip is 192.168.201.13
2157 01:57:16.080832 The DHCP server ip is 192.168.201.1
2158 01:57:16.087285 TFTP server IP predefined by user: 192.168.201.1
2159 01:57:16.094439 Bootfile predefined by user: 6770191/tftp-deploy-39dxtqss/kernel/bzImage
2160 01:57:16.097698 Sending tftp read request... done.
2161 01:57:16.100906 Waiting for the transfer...
2162 01:57:16.672830 00000000 ################################################################
2163 01:57:17.251249 00080000 ################################################################
2164 01:57:17.803408 00100000 ################################################################
2165 01:57:18.369955 00180000 ################################################################
2166 01:57:18.934948 00200000 ################################################################
2167 01:57:19.518842 00280000 ################################################################
2168 01:57:20.097524 00300000 ################################################################
2169 01:57:20.642135 00380000 ################################################################
2170 01:57:21.184467 00400000 ################################################################
2171 01:57:21.716316 00480000 ################################################################
2172 01:57:22.248906 00500000 ################################################################
2173 01:57:22.775538 00580000 ################################################################
2174 01:57:23.308575 00600000 ################################################################
2175 01:57:23.669453 00680000 ############################################ done.
2176 01:57:23.672595 The bootfile was 7176128 bytes long.
2177 01:57:23.675938 Sending tftp read request... done.
2178 01:57:23.679178 Waiting for the transfer...
2179 01:57:24.203226 00000000 ################################################################
2180 01:57:24.730682 00080000 ################################################################
2181 01:57:25.275938 00100000 ################################################################
2182 01:57:25.809579 00180000 ################################################################
2183 01:57:26.335629 00200000 ################################################################
2184 01:57:26.879540 00280000 ################################################################
2185 01:57:27.420882 00300000 ################################################################
2186 01:57:27.955520 00380000 ################################################################
2187 01:57:28.494417 00400000 ################################################################
2188 01:57:29.029721 00480000 ################################################################
2189 01:57:29.265667 00500000 ############################## done.
2190 01:57:29.268933 Sending tftp read request... done.
2191 01:57:29.272392 Waiting for the transfer...
2192 01:57:29.275610 00000000 # done.
2193 01:57:29.285328 Command line loaded dynamically from TFTP file: 6770191/tftp-deploy-39dxtqss/kernel/cmdline
2194 01:57:29.301879 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6770191/extract-nfsrootfs-tcfc5ypa,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2195 01:57:29.310132 Shutting down all USB controllers.
2196 01:57:29.310216 Removing current net device
2197 01:57:29.313382 Finalizing coreboot
2198 01:57:29.320024 Exiting depthcharge with code 4 at timestamp: 23287657
2199 01:57:29.320106
2200 01:57:29.320237 Starting kernel ...
2201 01:57:29.320351
2202 01:57:29.320417
2203 01:57:29.320731 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2204 01:57:29.320837 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2205 01:57:29.320918 Setting prompt string to ['Linux version [0-9]']
2206 01:57:29.321033 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2207 01:57:29.321107 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2209 02:01:58.321169 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2211 02:01:58.321376 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2213 02:01:58.321532 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2216 02:01:58.321794 end: 2 depthcharge-action (duration 00:05:00) [common]
2218 02:01:58.321988 Cleaning after the job
2219 02:01:58.322082 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770191/tftp-deploy-39dxtqss/ramdisk
2220 02:01:58.322549 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770191/tftp-deploy-39dxtqss/kernel
2221 02:01:58.323133 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770191/tftp-deploy-39dxtqss/nfsrootfs
2222 02:01:58.355851 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770191/tftp-deploy-39dxtqss/modules
2223 02:01:58.356171 start: 5.1 power-off (timeout 00:00:30) [common]
2224 02:01:58.356341 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2225 02:01:58.377762 >> Command sent successfully.
2226 02:01:58.379828 Returned 0 in 0 seconds
2227 02:01:58.481061 end: 5.1 power-off (duration 00:00:00) [common]
2229 02:01:58.482597 start: 5.2 read-feedback (timeout 00:10:00) [common]
2230 02:01:58.483795 Listened to connection for namespace 'common' for up to 1s
2231 02:01:59.485060 Finalising connection for namespace 'common'
2232 02:01:59.485269 Disconnecting from shell: Finalise
2233 02:01:59.586042 end: 5.2 read-feedback (duration 00:00:01) [common]
2234 02:01:59.586203 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6770191
2235 02:01:59.680467 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6770191
2236 02:01:59.680671 JobError: Your job cannot terminate cleanly.