Boot log: asus-cx9400-volteer
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 01:56:46.457894 lava-dispatcher, installed at version: 2022.04
2 01:56:46.458076 start: 0 validate
3 01:56:46.458206 Start time: 2022-07-07 01:56:46.458200+00:00 (UTC)
4 01:56:46.458338 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:56:46.458469 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220624.0%2Famd64%2Finitrd.cpio.gz exists
6 01:56:46.754766 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:56:46.754944 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.9.196-8580-gf266375ffc61%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 01:56:47.048968 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:56:47.049133 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220624.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 01:56:47.336042 Using caching service: 'http://localhost/cache/?uri=%s'
11 01:56:47.336206 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.9.196-8580-gf266375ffc61%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 01:56:47.631453 validate duration: 1.17
14 01:56:47.631736 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 01:56:47.631844 start: 1.1 download-retry (timeout 00:10:00) [common]
16 01:56:47.631946 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 01:56:47.632041 Not decompressing ramdisk as can be used compressed.
18 01:56:47.632129 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220624.0/amd64/initrd.cpio.gz
19 01:56:47.632198 saving as /var/lib/lava/dispatcher/tmp/6770206/tftp-deploy-tld1xsp3/ramdisk/initrd.cpio.gz
20 01:56:47.632260 total size: 5411042 (5MB)
21 01:56:47.633361 progress 0% (0MB)
22 01:56:47.634815 progress 5% (0MB)
23 01:56:47.636165 progress 10% (0MB)
24 01:56:47.637585 progress 15% (0MB)
25 01:56:47.639065 progress 20% (1MB)
26 01:56:47.640386 progress 25% (1MB)
27 01:56:47.641737 progress 30% (1MB)
28 01:56:47.643052 progress 35% (1MB)
29 01:56:47.644513 progress 40% (2MB)
30 01:56:47.645875 progress 45% (2MB)
31 01:56:47.647188 progress 50% (2MB)
32 01:56:47.648498 progress 55% (2MB)
33 01:56:47.649967 progress 60% (3MB)
34 01:56:47.651275 progress 65% (3MB)
35 01:56:47.652583 progress 70% (3MB)
36 01:56:47.653931 progress 75% (3MB)
37 01:56:47.655398 progress 80% (4MB)
38 01:56:47.656704 progress 85% (4MB)
39 01:56:47.658055 progress 90% (4MB)
40 01:56:47.659369 progress 95% (4MB)
41 01:56:47.660838 progress 100% (5MB)
42 01:56:47.661017 5MB downloaded in 0.03s (179.47MB/s)
43 01:56:47.661171 end: 1.1.1 http-download (duration 00:00:00) [common]
45 01:56:47.661456 end: 1.1 download-retry (duration 00:00:00) [common]
46 01:56:47.661553 start: 1.2 download-retry (timeout 00:10:00) [common]
47 01:56:47.661640 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 01:56:47.661753 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.9.196-8580-gf266375ffc61/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 01:56:47.661822 saving as /var/lib/lava/dispatcher/tmp/6770206/tftp-deploy-tld1xsp3/kernel/bzImage
50 01:56:47.661890 total size: 7176128 (6MB)
51 01:56:47.661952 No compression specified
52 01:56:52.162681 progress 0% (0MB)
53 01:56:52.165494 progress 5% (0MB)
54 01:56:52.167479 progress 10% (0MB)
55 01:56:52.169336 progress 15% (1MB)
56 01:56:52.171157 progress 20% (1MB)
57 01:56:52.172923 progress 25% (1MB)
58 01:56:52.174718 progress 30% (2MB)
59 01:56:52.176462 progress 35% (2MB)
60 01:56:52.178230 progress 40% (2MB)
61 01:56:52.180013 progress 45% (3MB)
62 01:56:52.181780 progress 50% (3MB)
63 01:56:52.183548 progress 55% (3MB)
64 01:56:52.185292 progress 60% (4MB)
65 01:56:52.187031 progress 65% (4MB)
66 01:56:52.188789 progress 70% (4MB)
67 01:56:52.190556 progress 75% (5MB)
68 01:56:52.192304 progress 80% (5MB)
69 01:56:52.194098 progress 85% (5MB)
70 01:56:52.195821 progress 90% (6MB)
71 01:56:52.197610 progress 95% (6MB)
72 01:56:52.199243 progress 100% (6MB)
73 01:56:52.199530 6MB downloaded in 4.54s (1.51MB/s)
74 01:56:52.199680 end: 1.2.1 http-download (duration 00:00:05) [common]
76 01:56:52.199917 end: 1.2 download-retry (duration 00:00:05) [common]
77 01:56:52.200006 start: 1.3 download-retry (timeout 00:09:55) [common]
78 01:56:52.200091 start: 1.3.1 http-download (timeout 00:09:55) [common]
79 01:56:52.200196 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220624.0/amd64/full.rootfs.tar.xz
80 01:56:52.200266 saving as /var/lib/lava/dispatcher/tmp/6770206/tftp-deploy-tld1xsp3/nfsrootfs/full.rootfs.tar
81 01:56:52.200327 total size: 207053672 (197MB)
82 01:56:52.200386 Using unxz to decompress xz
83 01:56:52.203628 progress 0% (0MB)
84 01:56:52.773638 progress 5% (9MB)
85 01:56:53.324247 progress 10% (19MB)
86 01:56:53.933143 progress 15% (29MB)
87 01:56:54.314055 progress 20% (39MB)
88 01:56:54.688808 progress 25% (49MB)
89 01:56:55.289610 progress 30% (59MB)
90 01:56:55.849447 progress 35% (69MB)
91 01:56:56.452941 progress 40% (79MB)
92 01:56:57.018687 progress 45% (88MB)
93 01:56:57.610630 progress 50% (98MB)
94 01:56:58.238119 progress 55% (108MB)
95 01:56:58.932024 progress 60% (118MB)
96 01:56:59.085919 progress 65% (128MB)
97 01:56:59.251409 progress 70% (138MB)
98 01:56:59.349741 progress 75% (148MB)
99 01:56:59.426987 progress 80% (158MB)
100 01:56:59.501919 progress 85% (167MB)
101 01:56:59.608309 progress 90% (177MB)
102 01:56:59.880382 progress 95% (187MB)
103 01:57:00.479935 progress 100% (197MB)
104 01:57:00.486052 197MB downloaded in 8.29s (23.83MB/s)
105 01:57:00.486320 end: 1.3.1 http-download (duration 00:00:08) [common]
107 01:57:00.486611 end: 1.3 download-retry (duration 00:00:08) [common]
108 01:57:00.486711 start: 1.4 download-retry (timeout 00:09:47) [common]
109 01:57:00.486811 start: 1.4.1 http-download (timeout 00:09:47) [common]
110 01:57:00.486931 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.9.196-8580-gf266375ffc61/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 01:57:00.487013 saving as /var/lib/lava/dispatcher/tmp/6770206/tftp-deploy-tld1xsp3/modules/modules.tar
112 01:57:00.487078 total size: 54512 (0MB)
113 01:57:00.487141 Using unxz to decompress xz
114 01:57:00.774864 progress 60% (0MB)
115 01:57:00.775342 progress 100% (0MB)
116 01:57:00.778918 0MB downloaded in 0.29s (0.18MB/s)
117 01:57:00.779210 end: 1.4.1 http-download (duration 00:00:00) [common]
119 01:57:00.779512 end: 1.4 download-retry (duration 00:00:00) [common]
120 01:57:00.779639 start: 1.5 prepare-tftp-overlay (timeout 00:09:47) [common]
121 01:57:00.779820 start: 1.5.1 extract-nfsrootfs (timeout 00:09:47) [common]
122 01:57:02.758196 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6770206/extract-nfsrootfs-cygg38p_
123 01:57:02.758407 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 01:57:02.758509 start: 1.5.2 lava-overlay (timeout 00:09:45) [common]
125 01:57:02.758646 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p
126 01:57:02.758745 makedir: /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin
127 01:57:02.758827 makedir: /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/tests
128 01:57:02.758906 makedir: /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/results
129 01:57:02.759002 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-add-keys
130 01:57:02.759131 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-add-sources
131 01:57:02.759245 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-background-process-start
132 01:57:02.759357 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-background-process-stop
133 01:57:02.759465 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-common-functions
134 01:57:02.759574 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-echo-ipv4
135 01:57:02.759683 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-install-packages
136 01:57:02.759790 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-installed-packages
137 01:57:02.759895 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-os-build
138 01:57:02.760001 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-probe-channel
139 01:57:02.760106 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-probe-ip
140 01:57:02.760210 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-target-ip
141 01:57:02.760315 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-target-mac
142 01:57:02.760419 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-target-storage
143 01:57:02.760526 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-test-case
144 01:57:02.760633 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-test-event
145 01:57:02.760738 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-test-feedback
146 01:57:02.760844 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-test-raise
147 01:57:02.760948 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-test-reference
148 01:57:02.761053 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-test-runner
149 01:57:02.761175 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-test-set
150 01:57:02.761287 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-test-shell
151 01:57:02.761396 Updating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-add-keys (debian)
152 01:57:02.761506 Updating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-add-sources (debian)
153 01:57:02.761613 Updating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-install-packages (debian)
154 01:57:02.761720 Updating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-installed-packages (debian)
155 01:57:02.761826 Updating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/bin/lava-os-build (debian)
156 01:57:02.761919 Creating /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/environment
157 01:57:02.762001 LAVA metadata
158 01:57:02.762064 - LAVA_JOB_ID=6770206
159 01:57:02.762126 - LAVA_DISPATCHER_IP=192.168.201.1
160 01:57:02.762222 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:45) [common]
161 01:57:02.762285 skipped lava-vland-overlay
162 01:57:02.762358 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 01:57:02.762437 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:45) [common]
164 01:57:02.762499 skipped lava-multinode-overlay
165 01:57:02.762570 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 01:57:02.762650 start: 1.5.2.3 test-definition (timeout 00:09:45) [common]
167 01:57:02.762721 Loading test definitions
168 01:57:02.762808 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:45) [common]
169 01:57:02.762877 Using /lava-6770206 at stage 0
170 01:57:02.763107 uuid=6770206_1.5.2.3.1 testdef=None
171 01:57:02.763210 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 01:57:02.763295 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
173 01:57:02.763715 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 01:57:02.763942 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
176 01:57:02.764419 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 01:57:02.764661 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
179 01:57:02.765116 runner path: /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/0/tests/0_timesync-off test_uuid 6770206_1.5.2.3.1
180 01:57:02.765268 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 01:57:02.765556 start: 1.5.2.3.5 git-repo-action (timeout 00:09:45) [common]
183 01:57:02.765631 Using /lava-6770206 at stage 0
184 01:57:02.765727 Fetching tests from https://github.com/kernelci/test-definitions.git
185 01:57:02.765808 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/0/tests/1_kselftest-alsa'
186 01:57:10.381784 Running '/usr/bin/git checkout kernelci.org
187 01:57:10.517511 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
188 01:57:10.518255 uuid=6770206_1.5.2.3.5 testdef=None
189 01:57:10.518433 end: 1.5.2.3.5 git-repo-action (duration 00:00:08) [common]
191 01:57:10.518715 start: 1.5.2.3.6 test-overlay (timeout 00:09:37) [common]
192 01:57:10.519480 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 01:57:10.519757 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:37) [common]
195 01:57:10.520711 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 01:57:10.520987 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:37) [common]
198 01:57:10.522004 runner path: /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/0/tests/1_kselftest-alsa test_uuid 6770206_1.5.2.3.5
199 01:57:10.522113 BOARD='asus-cx9400-volteer'
200 01:57:10.522179 BRANCH='cip-gitlab'
201 01:57:10.522259 SKIPFILE='skipfile-lkft.yaml'
202 01:57:10.522320 TESTPROG_URL='None'
203 01:57:10.522378 TST_CASENAME=''
204 01:57:10.522454 TST_CMDFILES='alsa'
205 01:57:10.522588 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 01:57:10.522848 Creating lava-test-runner.conf files
208 01:57:10.522917 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6770206/lava-overlay-b0lkgm9p/lava-6770206/0 for stage 0
209 01:57:10.523013 - 0_timesync-off
210 01:57:10.523086 - 1_kselftest-alsa
211 01:57:10.523185 end: 1.5.2.3 test-definition (duration 00:00:08) [common]
212 01:57:10.523288 start: 1.5.2.4 compress-overlay (timeout 00:09:37) [common]
213 01:57:17.826608 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
214 01:57:17.826782 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:30) [common]
215 01:57:17.826883 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 01:57:17.826989 end: 1.5.2 lava-overlay (duration 00:00:15) [common]
217 01:57:17.827084 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
218 01:57:17.929887 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 01:57:17.930245 start: 1.5.4 extract-modules (timeout 00:09:30) [common]
220 01:57:17.930363 extracting modules file /var/lib/lava/dispatcher/tmp/6770206/tftp-deploy-tld1xsp3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6770206/extract-nfsrootfs-cygg38p_
221 01:57:17.934736 extracting modules file /var/lib/lava/dispatcher/tmp/6770206/tftp-deploy-tld1xsp3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6770206/extract-overlay-ramdisk-8p7vg_20/ramdisk
222 01:57:17.938812 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 01:57:17.938925 start: 1.5.5 apply-overlay-tftp (timeout 00:09:30) [common]
224 01:57:17.939062 [common] Applying overlay to NFS
225 01:57:17.939136 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6770206/compress-overlay-xg3tgtnb/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6770206/extract-nfsrootfs-cygg38p_
226 01:57:18.406994 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 01:57:18.407166 start: 1.5.6 configure-preseed-file (timeout 00:09:29) [common]
228 01:57:18.407263 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 01:57:18.407357 start: 1.5.7 compress-ramdisk (timeout 00:09:29) [common]
230 01:57:18.407438 Building ramdisk /var/lib/lava/dispatcher/tmp/6770206/extract-overlay-ramdisk-8p7vg_20/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6770206/extract-overlay-ramdisk-8p7vg_20/ramdisk
231 01:57:18.440478 >> 24458 blocks
232 01:57:18.935875 rename /var/lib/lava/dispatcher/tmp/6770206/extract-overlay-ramdisk-8p7vg_20/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6770206/tftp-deploy-tld1xsp3/ramdisk/ramdisk.cpio.gz
233 01:57:18.936315 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 01:57:18.936451 start: 1.5.8 prepare-kernel (timeout 00:09:29) [common]
235 01:57:18.936560 start: 1.5.8.1 prepare-fit (timeout 00:09:29) [common]
236 01:57:18.936659 No mkimage arch provided, not using FIT.
237 01:57:18.936760 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 01:57:18.936847 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 01:57:18.936956 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
240 01:57:18.937046 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:29) [common]
241 01:57:18.937135 No LXC device requested
242 01:57:18.937228 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 01:57:18.937345 start: 1.7 deploy-device-env (timeout 00:09:29) [common]
244 01:57:18.937434 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 01:57:18.937517 Checking files for TFTP limit of 4294967296 bytes.
246 01:57:18.937914 end: 1 tftp-deploy (duration 00:00:31) [common]
247 01:57:18.938024 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 01:57:18.938145 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 01:57:18.938283 substitutions:
250 01:57:18.938354 - {DTB}: None
251 01:57:18.938419 - {INITRD}: 6770206/tftp-deploy-tld1xsp3/ramdisk/ramdisk.cpio.gz
252 01:57:18.938489 - {KERNEL}: 6770206/tftp-deploy-tld1xsp3/kernel/bzImage
253 01:57:18.938549 - {LAVA_MAC}: None
254 01:57:18.938611 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6770206/extract-nfsrootfs-cygg38p_
255 01:57:18.938680 - {NFS_SERVER_IP}: 192.168.201.1
256 01:57:18.938738 - {PRESEED_CONFIG}: None
257 01:57:18.938795 - {PRESEED_LOCAL}: None
258 01:57:18.938865 - {RAMDISK}: 6770206/tftp-deploy-tld1xsp3/ramdisk/ramdisk.cpio.gz
259 01:57:18.938922 - {ROOT_PART}: None
260 01:57:18.938995 - {ROOT}: None
261 01:57:18.939057 - {SERVER_IP}: 192.168.201.1
262 01:57:18.939113 - {TEE}: None
263 01:57:18.939168 Parsed boot commands:
264 01:57:18.939234 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 01:57:18.939388 Parsed boot commands: tftpboot 192.168.201.1 6770206/tftp-deploy-tld1xsp3/kernel/bzImage 6770206/tftp-deploy-tld1xsp3/kernel/cmdline 6770206/tftp-deploy-tld1xsp3/ramdisk/ramdisk.cpio.gz
266 01:57:18.939495 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 01:57:18.939597 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 01:57:18.939693 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 01:57:18.939792 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 01:57:18.939866 Not connected, no need to disconnect.
271 01:57:18.939942 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 01:57:18.940048 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 01:57:18.940118 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-14'
274 01:57:18.942831 Setting prompt string to ['lava-test: # ']
275 01:57:18.943145 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 01:57:18.943264 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 01:57:18.943368 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 01:57:18.943473 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 01:57:18.943670 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=reboot'
280 01:57:18.962805 >> Command sent successfully.
281 01:57:18.964686 Returned 0 in 0 seconds
282 01:57:19.065383 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 01:57:19.065736 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 01:57:19.065836 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 01:57:19.065934 Setting prompt string to 'Starting depthcharge on Voema...'
287 01:57:19.066005 Changing prompt to 'Starting depthcharge on Voema...'
288 01:57:19.066096 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
289 01:57:19.066389 [Enter `^Ec?' for help]
290 01:57:26.166095
291 01:57:26.166260
292 01:57:26.175842 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
293 01:57:26.182567 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
294 01:57:26.185909 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
295 01:57:26.189422 CPU: AES supported, TXT NOT supported, VT supported
296 01:57:26.196301 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
297 01:57:26.202464 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
298 01:57:26.205888 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
299 01:57:26.209057 VBOOT: Loading verstage.
300 01:57:26.215678 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
301 01:57:26.218961 FMAP: base = 0x0 size = 0x2000000 #areas = 32
302 01:57:26.222391 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 01:57:26.232825 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
304 01:57:26.239547 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
305 01:57:26.239633
306 01:57:26.239701
307 01:57:26.253546 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
308 01:57:26.266976 Probing TPM: . done!
309 01:57:26.269949 TPM ready after 0 ms
310 01:57:26.273354 Connected to device vid:did:rid of 1ae0:0028:00
311 01:57:26.284557 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
312 01:57:26.291039 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
313 01:57:26.294146 Initialized TPM device CR50 revision 0
314 01:57:26.347322 tlcl_send_startup: Startup return code is 0
315 01:57:26.347433 TPM: setup succeeded
316 01:57:26.361489 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
317 01:57:26.375760 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 01:57:26.388441 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
319 01:57:26.398467 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
320 01:57:26.402058 Chrome EC: UHEPI supported
321 01:57:26.405557 Phase 1
322 01:57:26.408625 FMAP: area GBB found @ 1805000 (458752 bytes)
323 01:57:26.418426 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
324 01:57:26.424909 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
325 01:57:26.431437 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
326 01:57:26.438027 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
327 01:57:26.441440 Recovery requested (1009000e)
328 01:57:26.450364 TPM: Extending digest for VBOOT: boot mode into PCR 0
329 01:57:26.456762 tlcl_extend: response is 0
330 01:57:26.463379 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
331 01:57:26.473186 tlcl_extend: response is 0
332 01:57:26.479872 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
333 01:57:26.486405 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
334 01:57:26.492833 BS: verstage times (exec / console): total (unknown) / 142 ms
335 01:57:26.492921
336 01:57:26.492990
337 01:57:26.506073 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
338 01:57:26.512691 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 01:57:26.515829 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 01:57:26.519234 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
341 01:57:26.526106 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
342 01:57:26.529103 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
343 01:57:26.532688 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
344 01:57:26.535822 TCO_STS: 0000 0000
345 01:57:26.539203 GEN_PMCON: d0015038 00002200
346 01:57:26.542388 GBLRST_CAUSE: 00000000 00000000
347 01:57:26.545762 HPR_CAUSE0: 00000000
348 01:57:26.545840 prev_sleep_state 5
349 01:57:26.548788 Boot Count incremented to 5807
350 01:57:26.555404 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 01:57:26.561968 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 01:57:26.571818 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 01:57:26.578705 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
354 01:57:26.581766 Chrome EC: UHEPI supported
355 01:57:26.588430 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
356 01:57:26.600031 Probing TPM: done!
357 01:57:26.606551 Connected to device vid:did:rid of 1ae0:0028:00
358 01:57:26.616563 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
359 01:57:26.619820 Initialized TPM device CR50 revision 0
360 01:57:26.637776 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
361 01:57:26.641172 MRC: Hash idx 0x100b comparison successful.
362 01:57:26.644588 MRC cache found, size faa8
363 01:57:26.644669 bootmode is set to: 2
364 01:57:26.647994 SPD index = 2
365 01:57:26.654586 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
366 01:57:26.657925 SPD: module type is LPDDR4X
367 01:57:26.661038 SPD: module part number is MT53D1G64D4NW-046
368 01:57:26.667537 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
369 01:57:26.674471 SPD: device width 16 bits, bus width 16 bits
370 01:57:26.677552 SPD: module size is 2048 MB (per channel)
371 01:57:27.107225 CBMEM:
372 01:57:27.110291 IMD: root @ 0x76fff000 254 entries.
373 01:57:27.113824 IMD: root @ 0x76ffec00 62 entries.
374 01:57:27.116991 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
375 01:57:27.123487 FMAP: area RW_VPD found @ f35000 (8192 bytes)
376 01:57:27.127013 External stage cache:
377 01:57:27.130245 IMD: root @ 0x7b3ff000 254 entries.
378 01:57:27.133314 IMD: root @ 0x7b3fec00 62 entries.
379 01:57:27.148533 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
380 01:57:27.155104 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
381 01:57:27.161365 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
382 01:57:27.175247 MRC: 'RECOVERY_MRC_CACHE' does not need update.
383 01:57:27.181936 cse_lite: Skip switching to RW in the recovery path
384 01:57:27.182025 8 DIMMs found
385 01:57:27.185420 SMM Memory Map
386 01:57:27.188457 SMRAM : 0x7b000000 0x800000
387 01:57:27.191893 Subregion 0: 0x7b000000 0x200000
388 01:57:27.195186 Subregion 1: 0x7b200000 0x200000
389 01:57:27.198601 Subregion 2: 0x7b400000 0x400000
390 01:57:27.198681 top_of_ram = 0x77000000
391 01:57:27.204818 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
392 01:57:27.211451 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
393 01:57:27.214935 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
394 01:57:27.221556 MTRR Range: Start=ff000000 End=0 (Size 1000000)
395 01:57:27.228043 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
396 01:57:27.234567 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
397 01:57:27.245014 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
398 01:57:27.251362 Processing 211 relocs. Offset value of 0x74c0b000
399 01:57:27.258638 BS: romstage times (exec / console): total (unknown) / 276 ms
400 01:57:27.263952
401 01:57:27.264037
402 01:57:27.273956 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
403 01:57:27.277039 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
404 01:57:27.287035 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
405 01:57:27.293380 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
406 01:57:27.299815 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
407 01:57:27.306337 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
408 01:57:27.350647 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
409 01:57:27.357385 Processing 5008 relocs. Offset value of 0x75d98000
410 01:57:27.363672 BS: postcar times (exec / console): total (unknown) / 59 ms
411 01:57:27.363752
412 01:57:27.363838
413 01:57:27.373593 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
414 01:57:27.373674 Normal boot
415 01:57:27.376731 FW_CONFIG value is 0x804c02
416 01:57:27.380124 PCI: 00:07.0 disabled by fw_config
417 01:57:27.383523 PCI: 00:07.1 disabled by fw_config
418 01:57:27.389931 PCI: 00:0d.2 disabled by fw_config
419 01:57:27.393451 PCI: 00:1c.7 disabled by fw_config
420 01:57:27.396562 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 01:57:27.403066 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 01:57:27.409875 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
423 01:57:27.412999 GENERIC: 0.0 disabled by fw_config
424 01:57:27.416470 GENERIC: 1.0 disabled by fw_config
425 01:57:27.419651 fw_config match found: DB_USB=USB3_ACTIVE
426 01:57:27.422785 fw_config match found: DB_USB=USB3_ACTIVE
427 01:57:27.429818 fw_config match found: DB_USB=USB3_ACTIVE
428 01:57:27.432957 fw_config match found: DB_USB=USB3_ACTIVE
429 01:57:27.436398 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
430 01:57:27.446016 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 01:57:27.452704 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 01:57:27.459229 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
433 01:57:27.465744 microcode: sig=0x806c1 pf=0x80 revision=0x86
434 01:57:27.469199 microcode: Update skipped, already up-to-date
435 01:57:27.475810 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
436 01:57:27.504313 Detected 4 core, 8 thread CPU.
437 01:57:27.507467 Setting up SMI for CPU
438 01:57:27.510939 IED base = 0x7b400000
439 01:57:27.514066 IED size = 0x00400000
440 01:57:27.514149 Will perform SMM setup.
441 01:57:27.520677 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
442 01:57:27.527191 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
443 01:57:27.533670 Processing 16 relocs. Offset value of 0x00030000
444 01:57:27.537177 Attempting to start 7 APs
445 01:57:27.540202 Waiting for 10ms after sending INIT.
446 01:57:27.556313 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
447 01:57:27.556397 done.
448 01:57:27.559474 AP: slot 3 apic_id 7.
449 01:57:27.562502 AP: slot 5 apic_id 4.
450 01:57:27.565929 AP: slot 4 apic_id 2.
451 01:57:27.566011 AP: slot 7 apic_id 3.
452 01:57:27.569386 Waiting for 2nd SIPI to complete...done.
453 01:57:27.572507 AP: slot 6 apic_id 6.
454 01:57:27.576032 AP: slot 2 apic_id 5.
455 01:57:27.582269 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
456 01:57:27.588731 Processing 13 relocs. Offset value of 0x00038000
457 01:57:27.592183 Unable to locate Global NVS
458 01:57:27.598500 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
459 01:57:27.601750 Installing permanent SMM handler to 0x7b000000
460 01:57:27.611573 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
461 01:57:27.615140 Processing 794 relocs. Offset value of 0x7b010000
462 01:57:27.624848 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
463 01:57:27.627948 Processing 13 relocs. Offset value of 0x7b008000
464 01:57:27.634757 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
465 01:57:27.641067 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
466 01:57:27.648024 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
467 01:57:27.654534 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
468 01:57:27.657557 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
469 01:57:27.664404 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
470 01:57:27.670902 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
471 01:57:27.674003 Unable to locate Global NVS
472 01:57:27.680449 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
473 01:57:27.684172 Clearing SMI status registers
474 01:57:27.687172 SMI_STS: PM1
475 01:57:27.687249 PM1_STS: PWRBTN
476 01:57:27.696884 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
477 01:57:27.700411 In relocation handler: CPU 0
478 01:57:27.703484 New SMBASE=0x7b000000 IEDBASE=0x7b400000
479 01:57:27.706624 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 01:57:27.710191 Relocation complete.
481 01:57:27.716747 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
482 01:57:27.719822 In relocation handler: CPU 1
483 01:57:27.723412 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
484 01:57:27.726684 Relocation complete.
485 01:57:27.733199 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
486 01:57:27.736362 In relocation handler: CPU 7
487 01:57:27.739794 New SMBASE=0x7affe400 IEDBASE=0x7b400000
488 01:57:27.742816 Relocation complete.
489 01:57:27.749408 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
490 01:57:27.752410 In relocation handler: CPU 4
491 01:57:27.755848 New SMBASE=0x7afff000 IEDBASE=0x7b400000
492 01:57:27.762257 Writing SMRR. base = 0x7b000006, mask=0xff800c00
493 01:57:27.765657 Relocation complete.
494 01:57:27.772347 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
495 01:57:27.775705 In relocation handler: CPU 5
496 01:57:27.778815 New SMBASE=0x7affec00 IEDBASE=0x7b400000
497 01:57:27.782185 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 01:57:27.785214 Relocation complete.
499 01:57:27.792182 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
500 01:57:27.795195 In relocation handler: CPU 2
501 01:57:27.798791 New SMBASE=0x7afff800 IEDBASE=0x7b400000
502 01:57:27.801795 Relocation complete.
503 01:57:27.808388 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
504 01:57:27.811526 In relocation handler: CPU 3
505 01:57:27.815042 New SMBASE=0x7afff400 IEDBASE=0x7b400000
506 01:57:27.818168 Relocation complete.
507 01:57:27.824722 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
508 01:57:27.828238 In relocation handler: CPU 6
509 01:57:27.831694 New SMBASE=0x7affe800 IEDBASE=0x7b400000
510 01:57:27.838125 Writing SMRR. base = 0x7b000006, mask=0xff800c00
511 01:57:27.841229 Relocation complete.
512 01:57:27.841329 Initializing CPU #0
513 01:57:27.844752 CPU: vendor Intel device 806c1
514 01:57:27.847952 CPU: family 06, model 8c, stepping 01
515 01:57:27.850937 Clearing out pending MCEs
516 01:57:27.854408 Setting up local APIC...
517 01:57:27.857816 apic_id: 0x00 done.
518 01:57:27.860942 Turbo is available but hidden
519 01:57:27.864022 Turbo is available and visible
520 01:57:27.867552 microcode: Update skipped, already up-to-date
521 01:57:27.870607 CPU #0 initialized
522 01:57:27.870680 Initializing CPU #5
523 01:57:27.874123 Initializing CPU #2
524 01:57:27.877581 CPU: vendor Intel device 806c1
525 01:57:27.880682 CPU: family 06, model 8c, stepping 01
526 01:57:27.884119 CPU: vendor Intel device 806c1
527 01:57:27.887386 CPU: family 06, model 8c, stepping 01
528 01:57:27.890358 Clearing out pending MCEs
529 01:57:27.893772 Clearing out pending MCEs
530 01:57:27.893849 Setting up local APIC...
531 01:57:27.897151 Initializing CPU #6
532 01:57:27.900386 Initializing CPU #3
533 01:57:27.903915 CPU: vendor Intel device 806c1
534 01:57:27.907053 CPU: family 06, model 8c, stepping 01
535 01:57:27.910122 CPU: vendor Intel device 806c1
536 01:57:27.913620 CPU: family 06, model 8c, stepping 01
537 01:57:27.916737 Clearing out pending MCEs
538 01:57:27.920654 Clearing out pending MCEs
539 01:57:27.920737 Setting up local APIC...
540 01:57:27.924479 Initializing CPU #1
541 01:57:27.924555 Initializing CPU #7
542 01:57:27.927655 Initializing CPU #4
543 01:57:27.931100 CPU: vendor Intel device 806c1
544 01:57:27.934192 CPU: family 06, model 8c, stepping 01
545 01:57:27.937672 CPU: vendor Intel device 806c1
546 01:57:27.940825 CPU: family 06, model 8c, stepping 01
547 01:57:27.944257 apic_id: 0x06 done.
548 01:57:27.947299 Clearing out pending MCEs
549 01:57:27.947371 Clearing out pending MCEs
550 01:57:27.950681 CPU: vendor Intel device 806c1
551 01:57:27.953986 CPU: family 06, model 8c, stepping 01
552 01:57:27.957440 Setting up local APIC...
553 01:57:27.960621 apic_id: 0x04 done.
554 01:57:27.963715 Setting up local APIC...
555 01:57:27.963791 Setting up local APIC...
556 01:57:27.967139 Clearing out pending MCEs
557 01:57:27.973777 microcode: Update skipped, already up-to-date
558 01:57:27.973858 Setting up local APIC...
559 01:57:27.976903 apic_id: 0x01 done.
560 01:57:27.980502 microcode: Update skipped, already up-to-date
561 01:57:27.983708 apic_id: 0x05 done.
562 01:57:27.986839 CPU #5 initialized
563 01:57:27.989973 microcode: Update skipped, already up-to-date
564 01:57:27.993415 CPU #6 initialized
565 01:57:27.993491 apic_id: 0x07 done.
566 01:57:27.996610 Setting up local APIC...
567 01:57:28.000042 apic_id: 0x03 done.
568 01:57:28.000121 apic_id: 0x02 done.
569 01:57:28.006543 microcode: Update skipped, already up-to-date
570 01:57:28.009920 microcode: Update skipped, already up-to-date
571 01:57:28.013338 CPU #7 initialized
572 01:57:28.013416 CPU #4 initialized
573 01:57:28.019939 microcode: Update skipped, already up-to-date
574 01:57:28.022991 microcode: Update skipped, already up-to-date
575 01:57:28.026023 CPU #1 initialized
576 01:57:28.026099 CPU #3 initialized
577 01:57:28.029582 CPU #2 initialized
578 01:57:28.032830 bsp_do_flight_plan done after 458 msecs.
579 01:57:28.036010 CPU: frequency set to 4400 MHz
580 01:57:28.039417 Enabling SMIs.
581 01:57:28.045690 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
582 01:57:28.060567 SATAXPCIE1 indicates PCIe NVMe is present
583 01:57:28.063920 Probing TPM: done!
584 01:57:28.067305 Connected to device vid:did:rid of 1ae0:0028:00
585 01:57:28.077927 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
586 01:57:28.081038 Initialized TPM device CR50 revision 0
587 01:57:28.084356 Enabling S0i3.4
588 01:57:28.091139 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
589 01:57:28.094509 Found a VBT of 8704 bytes after decompression
590 01:57:28.100979 cse_lite: CSE RO boot. HybridStorageMode disabled
591 01:57:28.107478 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
592 01:57:28.182804 FSPS returned 0
593 01:57:28.185773 Executing Phase 1 of FspMultiPhaseSiInit
594 01:57:28.195855 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
595 01:57:28.199236 port C0 DISC req: usage 1 usb3 1 usb2 5
596 01:57:28.202630 Raw Buffer output 0 00000511
597 01:57:28.205593 Raw Buffer output 1 00000000
598 01:57:28.209382 pmc_send_ipc_cmd succeeded
599 01:57:28.216181 port C1 DISC req: usage 1 usb3 2 usb2 3
600 01:57:28.216298 Raw Buffer output 0 00000321
601 01:57:28.219644 Raw Buffer output 1 00000000
602 01:57:28.223513 pmc_send_ipc_cmd succeeded
603 01:57:28.228797 Detected 4 core, 8 thread CPU.
604 01:57:28.231935 Detected 4 core, 8 thread CPU.
605 01:57:28.432609 Display FSP Version Info HOB
606 01:57:28.435611 Reference Code - CPU = a.0.4c.31
607 01:57:28.438858 uCode Version = 0.0.0.86
608 01:57:28.442216 TXT ACM version = ff.ff.ff.ffff
609 01:57:28.445649 Reference Code - ME = a.0.4c.31
610 01:57:28.448701 MEBx version = 0.0.0.0
611 01:57:28.452308 ME Firmware Version = Consumer SKU
612 01:57:28.455386 Reference Code - PCH = a.0.4c.31
613 01:57:28.458498 PCH-CRID Status = Disabled
614 01:57:28.461966 PCH-CRID Original Value = ff.ff.ff.ffff
615 01:57:28.465235 PCH-CRID New Value = ff.ff.ff.ffff
616 01:57:28.468481 OPROM - RST - RAID = ff.ff.ff.ffff
617 01:57:28.471913 PCH Hsio Version = 4.0.0.0
618 01:57:28.474993 Reference Code - SA - System Agent = a.0.4c.31
619 01:57:28.478510 Reference Code - MRC = 2.0.0.1
620 01:57:28.481533 SA - PCIe Version = a.0.4c.31
621 01:57:28.485018 SA-CRID Status = Disabled
622 01:57:28.488073 SA-CRID Original Value = 0.0.0.1
623 01:57:28.491585 SA-CRID New Value = 0.0.0.1
624 01:57:28.494875 OPROM - VBIOS = ff.ff.ff.ffff
625 01:57:28.498621 IO Manageability Engine FW Version = 11.1.4.0
626 01:57:28.502398 PHY Build Version = 0.0.0.e0
627 01:57:28.505790 Thunderbolt(TM) FW Version = 0.0.0.0
628 01:57:28.512187 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 01:57:28.515559 ITSS IRQ Polarities Before:
630 01:57:28.515645 IPC0: 0xffffffff
631 01:57:28.518766 IPC1: 0xffffffff
632 01:57:28.518851 IPC2: 0xffffffff
633 01:57:28.522064 IPC3: 0xffffffff
634 01:57:28.525165 ITSS IRQ Polarities After:
635 01:57:28.525255 IPC0: 0xffffffff
636 01:57:28.528720 IPC1: 0xffffffff
637 01:57:28.528795 IPC2: 0xffffffff
638 01:57:28.531882 IPC3: 0xffffffff
639 01:57:28.535372 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 01:57:28.548484 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 01:57:28.558356 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 01:57:28.571598 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 01:57:28.578093 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
644 01:57:28.581198 Enumerating buses...
645 01:57:28.584681 Show all devs... Before device enumeration.
646 01:57:28.587807 Root Device: enabled 1
647 01:57:28.587892 DOMAIN: 0000: enabled 1
648 01:57:28.590999 CPU_CLUSTER: 0: enabled 1
649 01:57:28.594511 PCI: 00:00.0: enabled 1
650 01:57:28.597891 PCI: 00:02.0: enabled 1
651 01:57:28.597975 PCI: 00:04.0: enabled 1
652 01:57:28.600987 PCI: 00:05.0: enabled 1
653 01:57:28.604562 PCI: 00:06.0: enabled 0
654 01:57:28.607528 PCI: 00:07.0: enabled 0
655 01:57:28.607613 PCI: 00:07.1: enabled 0
656 01:57:28.610782 PCI: 00:07.2: enabled 0
657 01:57:28.614207 PCI: 00:07.3: enabled 0
658 01:57:28.617667 PCI: 00:08.0: enabled 1
659 01:57:28.617751 PCI: 00:09.0: enabled 0
660 01:57:28.620601 PCI: 00:0a.0: enabled 0
661 01:57:28.624004 PCI: 00:0d.0: enabled 1
662 01:57:28.627177 PCI: 00:0d.1: enabled 0
663 01:57:28.627261 PCI: 00:0d.2: enabled 0
664 01:57:28.630503 PCI: 00:0d.3: enabled 0
665 01:57:28.633873 PCI: 00:0e.0: enabled 0
666 01:57:28.637445 PCI: 00:10.2: enabled 1
667 01:57:28.637529 PCI: 00:10.6: enabled 0
668 01:57:28.640494 PCI: 00:10.7: enabled 0
669 01:57:28.643892 PCI: 00:12.0: enabled 0
670 01:57:28.646866 PCI: 00:12.6: enabled 0
671 01:57:28.646950 PCI: 00:13.0: enabled 0
672 01:57:28.650370 PCI: 00:14.0: enabled 1
673 01:57:28.653491 PCI: 00:14.1: enabled 0
674 01:57:28.657080 PCI: 00:14.2: enabled 1
675 01:57:28.657164 PCI: 00:14.3: enabled 1
676 01:57:28.660093 PCI: 00:15.0: enabled 1
677 01:57:28.663665 PCI: 00:15.1: enabled 1
678 01:57:28.663749 PCI: 00:15.2: enabled 1
679 01:57:28.666693 PCI: 00:15.3: enabled 1
680 01:57:28.670147 PCI: 00:16.0: enabled 1
681 01:57:28.673143 PCI: 00:16.1: enabled 0
682 01:57:28.673243 PCI: 00:16.2: enabled 0
683 01:57:28.676785 PCI: 00:16.3: enabled 0
684 01:57:28.679791 PCI: 00:16.4: enabled 0
685 01:57:28.683304 PCI: 00:16.5: enabled 0
686 01:57:28.683389 PCI: 00:17.0: enabled 1
687 01:57:28.686604 PCI: 00:19.0: enabled 0
688 01:57:28.689823 PCI: 00:19.1: enabled 1
689 01:57:28.693170 PCI: 00:19.2: enabled 0
690 01:57:28.693256 PCI: 00:1c.0: enabled 1
691 01:57:28.696161 PCI: 00:1c.1: enabled 0
692 01:57:28.699497 PCI: 00:1c.2: enabled 0
693 01:57:28.703024 PCI: 00:1c.3: enabled 0
694 01:57:28.703108 PCI: 00:1c.4: enabled 0
695 01:57:28.706002 PCI: 00:1c.5: enabled 0
696 01:57:28.709491 PCI: 00:1c.6: enabled 1
697 01:57:28.712665 PCI: 00:1c.7: enabled 0
698 01:57:28.712749 PCI: 00:1d.0: enabled 1
699 01:57:28.715886 PCI: 00:1d.1: enabled 0
700 01:57:28.719476 PCI: 00:1d.2: enabled 1
701 01:57:28.722583 PCI: 00:1d.3: enabled 0
702 01:57:28.722668 PCI: 00:1e.0: enabled 1
703 01:57:28.725857 PCI: 00:1e.1: enabled 0
704 01:57:28.729430 PCI: 00:1e.2: enabled 1
705 01:57:28.732442 PCI: 00:1e.3: enabled 1
706 01:57:28.732525 PCI: 00:1f.0: enabled 1
707 01:57:28.735697 PCI: 00:1f.1: enabled 0
708 01:57:28.739128 PCI: 00:1f.2: enabled 1
709 01:57:28.742175 PCI: 00:1f.3: enabled 1
710 01:57:28.742260 PCI: 00:1f.4: enabled 0
711 01:57:28.745631 PCI: 00:1f.5: enabled 1
712 01:57:28.749045 PCI: 00:1f.6: enabled 0
713 01:57:28.749130 PCI: 00:1f.7: enabled 0
714 01:57:28.752420 APIC: 00: enabled 1
715 01:57:28.755424 GENERIC: 0.0: enabled 1
716 01:57:28.758823 GENERIC: 0.0: enabled 1
717 01:57:28.758907 GENERIC: 1.0: enabled 1
718 01:57:28.761960 GENERIC: 0.0: enabled 1
719 01:57:28.765452 GENERIC: 1.0: enabled 1
720 01:57:28.768593 USB0 port 0: enabled 1
721 01:57:28.768677 GENERIC: 0.0: enabled 1
722 01:57:28.771981 USB0 port 0: enabled 1
723 01:57:28.775137 GENERIC: 0.0: enabled 1
724 01:57:28.775222 I2C: 00:1a: enabled 1
725 01:57:28.778639 I2C: 00:31: enabled 1
726 01:57:28.781724 I2C: 00:32: enabled 1
727 01:57:28.781807 I2C: 00:10: enabled 1
728 01:57:28.785201 I2C: 00:15: enabled 1
729 01:57:28.788258 GENERIC: 0.0: enabled 0
730 01:57:28.791674 GENERIC: 1.0: enabled 0
731 01:57:28.791758 GENERIC: 0.0: enabled 1
732 01:57:28.795173 SPI: 00: enabled 1
733 01:57:28.798381 SPI: 00: enabled 1
734 01:57:28.798479 PNP: 0c09.0: enabled 1
735 01:57:28.801619 GENERIC: 0.0: enabled 1
736 01:57:28.804714 USB3 port 0: enabled 1
737 01:57:28.804798 USB3 port 1: enabled 1
738 01:57:28.807900 USB3 port 2: enabled 0
739 01:57:28.811407 USB3 port 3: enabled 0
740 01:57:28.814809 USB2 port 0: enabled 0
741 01:57:28.814894 USB2 port 1: enabled 1
742 01:57:28.817768 USB2 port 2: enabled 1
743 01:57:28.820936 USB2 port 3: enabled 0
744 01:57:28.821022 USB2 port 4: enabled 1
745 01:57:28.824367 USB2 port 5: enabled 0
746 01:57:28.827807 USB2 port 6: enabled 0
747 01:57:28.830914 USB2 port 7: enabled 0
748 01:57:28.831017 USB2 port 8: enabled 0
749 01:57:28.834090 USB2 port 9: enabled 0
750 01:57:28.837481 USB3 port 0: enabled 0
751 01:57:28.837567 USB3 port 1: enabled 1
752 01:57:28.840912 USB3 port 2: enabled 0
753 01:57:28.844119 USB3 port 3: enabled 0
754 01:57:28.847462 GENERIC: 0.0: enabled 1
755 01:57:28.847565 GENERIC: 1.0: enabled 1
756 01:57:28.850658 APIC: 01: enabled 1
757 01:57:28.853730 APIC: 05: enabled 1
758 01:57:28.853815 APIC: 07: enabled 1
759 01:57:28.857242 APIC: 02: enabled 1
760 01:57:28.860374 APIC: 04: enabled 1
761 01:57:28.860459 APIC: 06: enabled 1
762 01:57:28.863803 APIC: 03: enabled 1
763 01:57:28.863888 Compare with tree...
764 01:57:28.866929 Root Device: enabled 1
765 01:57:28.870403 DOMAIN: 0000: enabled 1
766 01:57:28.873752 PCI: 00:00.0: enabled 1
767 01:57:28.873854 PCI: 00:02.0: enabled 1
768 01:57:28.876838 PCI: 00:04.0: enabled 1
769 01:57:28.880281 GENERIC: 0.0: enabled 1
770 01:57:28.883619 PCI: 00:05.0: enabled 1
771 01:57:28.886718 PCI: 00:06.0: enabled 0
772 01:57:28.890058 PCI: 00:07.0: enabled 0
773 01:57:28.890142 GENERIC: 0.0: enabled 1
774 01:57:28.893370 PCI: 00:07.1: enabled 0
775 01:57:28.896871 GENERIC: 1.0: enabled 1
776 01:57:28.900041 PCI: 00:07.2: enabled 0
777 01:57:28.903473 GENERIC: 0.0: enabled 1
778 01:57:28.903557 PCI: 00:07.3: enabled 0
779 01:57:28.906606 GENERIC: 1.0: enabled 1
780 01:57:28.910129 PCI: 00:08.0: enabled 1
781 01:57:28.913496 PCI: 00:09.0: enabled 0
782 01:57:28.916639 PCI: 00:0a.0: enabled 0
783 01:57:28.916732 PCI: 00:0d.0: enabled 1
784 01:57:28.919778 USB0 port 0: enabled 1
785 01:57:28.923242 USB3 port 0: enabled 1
786 01:57:28.926554 USB3 port 1: enabled 1
787 01:57:28.930004 USB3 port 2: enabled 0
788 01:57:28.933126 USB3 port 3: enabled 0
789 01:57:28.933205 PCI: 00:0d.1: enabled 0
790 01:57:28.936367 PCI: 00:0d.2: enabled 0
791 01:57:28.939761 GENERIC: 0.0: enabled 1
792 01:57:28.942938 PCI: 00:0d.3: enabled 0
793 01:57:28.946012 PCI: 00:0e.0: enabled 0
794 01:57:28.946107 PCI: 00:10.2: enabled 1
795 01:57:28.949235 PCI: 00:10.6: enabled 0
796 01:57:28.952729 PCI: 00:10.7: enabled 0
797 01:57:28.955828 PCI: 00:12.0: enabled 0
798 01:57:28.959317 PCI: 00:12.6: enabled 0
799 01:57:28.959391 PCI: 00:13.0: enabled 0
800 01:57:28.962320 PCI: 00:14.0: enabled 1
801 01:57:28.965781 USB0 port 0: enabled 1
802 01:57:28.968963 USB2 port 0: enabled 0
803 01:57:28.972423 USB2 port 1: enabled 1
804 01:57:28.975682 USB2 port 2: enabled 1
805 01:57:28.975757 USB2 port 3: enabled 0
806 01:57:28.978713 USB2 port 4: enabled 1
807 01:57:28.982125 USB2 port 5: enabled 0
808 01:57:28.985623 USB2 port 6: enabled 0
809 01:57:28.988643 USB2 port 7: enabled 0
810 01:57:28.992052 USB2 port 8: enabled 0
811 01:57:28.992126 USB2 port 9: enabled 0
812 01:57:28.995443 USB3 port 0: enabled 0
813 01:57:28.998747 USB3 port 1: enabled 1
814 01:57:29.001886 USB3 port 2: enabled 0
815 01:57:29.005288 USB3 port 3: enabled 0
816 01:57:29.005362 PCI: 00:14.1: enabled 0
817 01:57:29.008476 PCI: 00:14.2: enabled 1
818 01:57:29.012011 PCI: 00:14.3: enabled 1
819 01:57:29.015072 GENERIC: 0.0: enabled 1
820 01:57:29.018459 PCI: 00:15.0: enabled 1
821 01:57:29.018536 I2C: 00:1a: enabled 1
822 01:57:29.021770 I2C: 00:31: enabled 1
823 01:57:29.024843 I2C: 00:32: enabled 1
824 01:57:29.028462 PCI: 00:15.1: enabled 1
825 01:57:29.031510 I2C: 00:10: enabled 1
826 01:57:29.031586 PCI: 00:15.2: enabled 1
827 01:57:29.034755 PCI: 00:15.3: enabled 1
828 01:57:29.038265 PCI: 00:16.0: enabled 1
829 01:57:29.041655 PCI: 00:16.1: enabled 0
830 01:57:29.044730 PCI: 00:16.2: enabled 0
831 01:57:29.044810 PCI: 00:16.3: enabled 0
832 01:57:29.048129 PCI: 00:16.4: enabled 0
833 01:57:29.051223 PCI: 00:16.5: enabled 0
834 01:57:29.054732 PCI: 00:17.0: enabled 1
835 01:57:29.057951 PCI: 00:19.0: enabled 0
836 01:57:29.058033 PCI: 00:19.1: enabled 1
837 01:57:29.061510 I2C: 00:15: enabled 1
838 01:57:29.064461 PCI: 00:19.2: enabled 0
839 01:57:29.067878 PCI: 00:1d.0: enabled 1
840 01:57:29.071297 GENERIC: 0.0: enabled 1
841 01:57:29.071372 PCI: 00:1e.0: enabled 1
842 01:57:29.074331 PCI: 00:1e.1: enabled 0
843 01:57:29.077599 PCI: 00:1e.2: enabled 1
844 01:57:29.081133 SPI: 00: enabled 1
845 01:57:29.081208 PCI: 00:1e.3: enabled 1
846 01:57:29.084283 SPI: 00: enabled 1
847 01:57:29.087758 PCI: 00:1f.0: enabled 1
848 01:57:29.090754 PNP: 0c09.0: enabled 1
849 01:57:29.094118 PCI: 00:1f.1: enabled 0
850 01:57:29.094193 PCI: 00:1f.2: enabled 1
851 01:57:29.097557 GENERIC: 0.0: enabled 1
852 01:57:29.100678 GENERIC: 0.0: enabled 1
853 01:57:29.104103 GENERIC: 1.0: enabled 1
854 01:57:29.155816 PCI: 00:1f.3: enabled 1
855 01:57:29.155919 PCI: 00:1f.4: enabled 0
856 01:57:29.155988 PCI: 00:1f.5: enabled 1
857 01:57:29.156343 PCI: 00:1f.6: enabled 0
858 01:57:29.156415 PCI: 00:1f.7: enabled 0
859 01:57:29.156703 CPU_CLUSTER: 0: enabled 1
860 01:57:29.156770 APIC: 00: enabled 1
861 01:57:29.156831 APIC: 01: enabled 1
862 01:57:29.156897 APIC: 05: enabled 1
863 01:57:29.156955 APIC: 07: enabled 1
864 01:57:29.157011 APIC: 02: enabled 1
865 01:57:29.157111 APIC: 04: enabled 1
866 01:57:29.157167 APIC: 06: enabled 1
867 01:57:29.157424 APIC: 03: enabled 1
868 01:57:29.157495 Root Device scanning...
869 01:57:29.157554 scan_static_bus for Root Device
870 01:57:29.157610 DOMAIN: 0000 enabled
871 01:57:29.157692 CPU_CLUSTER: 0 enabled
872 01:57:29.157762 DOMAIN: 0000 scanning...
873 01:57:29.157817 PCI: pci_scan_bus for bus 00
874 01:57:29.206009 PCI: 00:00.0 [8086/0000] ops
875 01:57:29.206108 PCI: 00:00.0 [8086/9a12] enabled
876 01:57:29.206371 PCI: 00:02.0 [8086/0000] bus ops
877 01:57:29.206445 PCI: 00:02.0 [8086/9a40] enabled
878 01:57:29.206545 PCI: 00:04.0 [8086/0000] bus ops
879 01:57:29.206622 PCI: 00:04.0 [8086/9a03] enabled
880 01:57:29.206915 PCI: 00:05.0 [8086/9a19] enabled
881 01:57:29.206995 PCI: 00:07.0 [0000/0000] hidden
882 01:57:29.207075 PCI: 00:08.0 [8086/9a11] enabled
883 01:57:29.207148 PCI: 00:0a.0 [8086/9a0d] disabled
884 01:57:29.207205 PCI: 00:0d.0 [8086/0000] bus ops
885 01:57:29.207290 PCI: 00:0d.0 [8086/9a13] enabled
886 01:57:29.207362 PCI: 00:14.0 [8086/0000] bus ops
887 01:57:29.207417 PCI: 00:14.0 [8086/a0ed] enabled
888 01:57:29.207498 PCI: 00:14.2 [8086/a0ef] enabled
889 01:57:29.239013 PCI: 00:14.3 [8086/0000] bus ops
890 01:57:29.239104 PCI: 00:14.3 [8086/a0f0] enabled
891 01:57:29.239185 PCI: 00:15.0 [8086/0000] bus ops
892 01:57:29.239249 PCI: 00:15.0 [8086/a0e8] enabled
893 01:57:29.239518 PCI: 00:15.1 [8086/0000] bus ops
894 01:57:29.239586 PCI: 00:15.1 [8086/a0e9] enabled
895 01:57:29.239647 PCI: 00:15.2 [8086/0000] bus ops
896 01:57:29.239717 PCI: 00:15.2 [8086/a0ea] enabled
897 01:57:29.240002 PCI: 00:15.3 [8086/0000] bus ops
898 01:57:29.240067 PCI: 00:15.3 [8086/a0eb] enabled
899 01:57:29.242467 PCI: 00:16.0 [8086/0000] ops
900 01:57:29.245550 PCI: 00:16.0 [8086/a0e0] enabled
901 01:57:29.249130 PCI: Static device PCI: 00:17.0 not found, disabling it.
902 01:57:29.252119 PCI: 00:19.0 [8086/0000] bus ops
903 01:57:29.255537 PCI: 00:19.0 [8086/a0c5] disabled
904 01:57:29.259024 PCI: 00:19.1 [8086/0000] bus ops
905 01:57:29.262166 PCI: 00:19.1 [8086/a0c6] enabled
906 01:57:29.265535 PCI: 00:1d.0 [8086/0000] bus ops
907 01:57:29.268697 PCI: 00:1d.0 [8086/a0b0] enabled
908 01:57:29.272040 PCI: 00:1e.0 [8086/0000] ops
909 01:57:29.275533 PCI: 00:1e.0 [8086/a0a8] enabled
910 01:57:29.278619 PCI: 00:1e.2 [8086/0000] bus ops
911 01:57:29.282025 PCI: 00:1e.2 [8086/a0aa] enabled
912 01:57:29.285181 PCI: 00:1e.3 [8086/0000] bus ops
913 01:57:29.288553 PCI: 00:1e.3 [8086/a0ab] enabled
914 01:57:29.291930 PCI: 00:1f.0 [8086/0000] bus ops
915 01:57:29.294937 PCI: 00:1f.0 [8086/a087] enabled
916 01:57:29.298153 RTC Init
917 01:57:29.301595 Set power on after power failure.
918 01:57:29.301680 Disabling Deep S3
919 01:57:29.304717 Disabling Deep S3
920 01:57:29.308319 Disabling Deep S4
921 01:57:29.308405 Disabling Deep S4
922 01:57:29.311330 Disabling Deep S5
923 01:57:29.311404 Disabling Deep S5
924 01:57:29.314545 PCI: 00:1f.2 [0000/0000] hidden
925 01:57:29.318082 PCI: 00:1f.3 [8086/0000] bus ops
926 01:57:29.321178 PCI: 00:1f.3 [8086/a0c8] enabled
927 01:57:29.324704 PCI: 00:1f.5 [8086/0000] bus ops
928 01:57:29.327987 PCI: 00:1f.5 [8086/a0a4] enabled
929 01:57:29.331143 PCI: Leftover static devices:
930 01:57:29.334543 PCI: 00:10.2
931 01:57:29.334615 PCI: 00:10.6
932 01:57:29.337551 PCI: 00:10.7
933 01:57:29.337625 PCI: 00:06.0
934 01:57:29.337687 PCI: 00:07.1
935 01:57:29.340891 PCI: 00:07.2
936 01:57:29.340959 PCI: 00:07.3
937 01:57:29.344275 PCI: 00:09.0
938 01:57:29.344344 PCI: 00:0d.1
939 01:57:29.344404 PCI: 00:0d.2
940 01:57:29.347417 PCI: 00:0d.3
941 01:57:29.347488 PCI: 00:0e.0
942 01:57:29.350898 PCI: 00:12.0
943 01:57:29.350966 PCI: 00:12.6
944 01:57:29.353943 PCI: 00:13.0
945 01:57:29.354010 PCI: 00:14.1
946 01:57:29.354076 PCI: 00:16.1
947 01:57:29.357485 PCI: 00:16.2
948 01:57:29.357560 PCI: 00:16.3
949 01:57:29.360504 PCI: 00:16.4
950 01:57:29.360571 PCI: 00:16.5
951 01:57:29.360640 PCI: 00:17.0
952 01:57:29.364088 PCI: 00:19.2
953 01:57:29.364188 PCI: 00:1e.1
954 01:57:29.367186 PCI: 00:1f.1
955 01:57:29.367255 PCI: 00:1f.4
956 01:57:29.367320 PCI: 00:1f.6
957 01:57:29.370736 PCI: 00:1f.7
958 01:57:29.373880 PCI: Check your devicetree.cb.
959 01:57:29.377006 PCI: 00:02.0 scanning...
960 01:57:29.380461 scan_generic_bus for PCI: 00:02.0
961 01:57:29.383731 scan_generic_bus for PCI: 00:02.0 done
962 01:57:29.387173 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
963 01:57:29.390241 PCI: 00:04.0 scanning...
964 01:57:29.393689 scan_generic_bus for PCI: 00:04.0
965 01:57:29.396934 GENERIC: 0.0 enabled
966 01:57:29.403447 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
967 01:57:29.406543 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
968 01:57:29.409966 PCI: 00:0d.0 scanning...
969 01:57:29.413201 scan_static_bus for PCI: 00:0d.0
970 01:57:29.416317 USB0 port 0 enabled
971 01:57:29.416396 USB0 port 0 scanning...
972 01:57:29.419895 scan_static_bus for USB0 port 0
973 01:57:29.423373 USB3 port 0 enabled
974 01:57:29.426487 USB3 port 1 enabled
975 01:57:29.426566 USB3 port 2 disabled
976 01:57:29.429744 USB3 port 3 disabled
977 01:57:29.433147 USB3 port 0 scanning...
978 01:57:29.437052 scan_static_bus for USB3 port 0
979 01:57:29.439775 scan_static_bus for USB3 port 0 done
980 01:57:29.443190 scan_bus: bus USB3 port 0 finished in 6 msecs
981 01:57:29.446322 USB3 port 1 scanning...
982 01:57:29.449396 scan_static_bus for USB3 port 1
983 01:57:29.452778 scan_static_bus for USB3 port 1 done
984 01:57:29.459312 scan_bus: bus USB3 port 1 finished in 6 msecs
985 01:57:29.462526 scan_static_bus for USB0 port 0 done
986 01:57:29.466114 scan_bus: bus USB0 port 0 finished in 43 msecs
987 01:57:29.469199 scan_static_bus for PCI: 00:0d.0 done
988 01:57:29.475866 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
989 01:57:29.478994 PCI: 00:14.0 scanning...
990 01:57:29.482486 scan_static_bus for PCI: 00:14.0
991 01:57:29.482601 USB0 port 0 enabled
992 01:57:29.485537 USB0 port 0 scanning...
993 01:57:29.489057 scan_static_bus for USB0 port 0
994 01:57:29.492358 USB2 port 0 disabled
995 01:57:29.492442 USB2 port 1 enabled
996 01:57:29.495436 USB2 port 2 enabled
997 01:57:29.498852 USB2 port 3 disabled
998 01:57:29.498936 USB2 port 4 enabled
999 01:57:29.502145 USB2 port 5 disabled
1000 01:57:29.505651 USB2 port 6 disabled
1001 01:57:29.505735 USB2 port 7 disabled
1002 01:57:29.508776 USB2 port 8 disabled
1003 01:57:29.511875 USB2 port 9 disabled
1004 01:57:29.511958 USB3 port 0 disabled
1005 01:57:29.515354 USB3 port 1 enabled
1006 01:57:29.515438 USB3 port 2 disabled
1007 01:57:29.518893 USB3 port 3 disabled
1008 01:57:29.522075 USB2 port 1 scanning...
1009 01:57:29.525134 scan_static_bus for USB2 port 1
1010 01:57:29.528592 scan_static_bus for USB2 port 1 done
1011 01:57:29.531990 scan_bus: bus USB2 port 1 finished in 6 msecs
1012 01:57:29.534961 USB2 port 2 scanning...
1013 01:57:29.538402 scan_static_bus for USB2 port 2
1014 01:57:29.541773 scan_static_bus for USB2 port 2 done
1015 01:57:29.548297 scan_bus: bus USB2 port 2 finished in 6 msecs
1016 01:57:29.548382 USB2 port 4 scanning...
1017 01:57:29.551667 scan_static_bus for USB2 port 4
1018 01:57:29.558268 scan_static_bus for USB2 port 4 done
1019 01:57:29.561732 scan_bus: bus USB2 port 4 finished in 6 msecs
1020 01:57:29.564815 USB3 port 1 scanning...
1021 01:57:29.568436 scan_static_bus for USB3 port 1
1022 01:57:29.571389 scan_static_bus for USB3 port 1 done
1023 01:57:29.574516 scan_bus: bus USB3 port 1 finished in 6 msecs
1024 01:57:29.578000 scan_static_bus for USB0 port 0 done
1025 01:57:29.584697 scan_bus: bus USB0 port 0 finished in 93 msecs
1026 01:57:29.587705 scan_static_bus for PCI: 00:14.0 done
1027 01:57:29.591215 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1028 01:57:29.594702 PCI: 00:14.3 scanning...
1029 01:57:29.597730 scan_static_bus for PCI: 00:14.3
1030 01:57:29.601109 GENERIC: 0.0 enabled
1031 01:57:29.604194 scan_static_bus for PCI: 00:14.3 done
1032 01:57:29.610909 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1033 01:57:29.610995 PCI: 00:15.0 scanning...
1034 01:57:29.613971 scan_static_bus for PCI: 00:15.0
1035 01:57:29.617268 I2C: 00:1a enabled
1036 01:57:29.620655 I2C: 00:31 enabled
1037 01:57:29.620740 I2C: 00:32 enabled
1038 01:57:29.624006 scan_static_bus for PCI: 00:15.0 done
1039 01:57:29.630381 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1040 01:57:29.633752 PCI: 00:15.1 scanning...
1041 01:57:29.637023 scan_static_bus for PCI: 00:15.1
1042 01:57:29.637112 I2C: 00:10 enabled
1043 01:57:29.640515 scan_static_bus for PCI: 00:15.1 done
1044 01:57:29.646942 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1045 01:57:29.650257 PCI: 00:15.2 scanning...
1046 01:57:29.653164 scan_static_bus for PCI: 00:15.2
1047 01:57:29.656618 scan_static_bus for PCI: 00:15.2 done
1048 01:57:29.659725 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1049 01:57:29.663325 PCI: 00:15.3 scanning...
1050 01:57:29.666524 scan_static_bus for PCI: 00:15.3
1051 01:57:29.669624 scan_static_bus for PCI: 00:15.3 done
1052 01:57:29.676191 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1053 01:57:29.679802 PCI: 00:19.1 scanning...
1054 01:57:29.682973 scan_static_bus for PCI: 00:19.1
1055 01:57:29.683049 I2C: 00:15 enabled
1056 01:57:29.685946 scan_static_bus for PCI: 00:19.1 done
1057 01:57:29.692691 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1058 01:57:29.695823 PCI: 00:1d.0 scanning...
1059 01:57:29.699233 do_pci_scan_bridge for PCI: 00:1d.0
1060 01:57:29.702364 PCI: pci_scan_bus for bus 01
1061 01:57:29.705536 PCI: 01:00.0 [15b7/5009] enabled
1062 01:57:29.705620 GENERIC: 0.0 enabled
1063 01:57:29.712364 Enabling Common Clock Configuration
1064 01:57:29.715751 L1 Sub-State supported from root port 29
1065 01:57:29.718807 L1 Sub-State Support = 0x5
1066 01:57:29.722347 CommonModeRestoreTime = 0x28
1067 01:57:29.725537 Power On Value = 0x16, Power On Scale = 0x0
1068 01:57:29.725636 ASPM: Enabled L1
1069 01:57:29.732013 PCIe: Max_Payload_Size adjusted to 128
1070 01:57:29.735224 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1071 01:57:29.739024 PCI: 00:1e.2 scanning...
1072 01:57:29.742506 scan_generic_bus for PCI: 00:1e.2
1073 01:57:29.742587 SPI: 00 enabled
1074 01:57:29.749118 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1075 01:57:29.755780 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1076 01:57:29.755858 PCI: 00:1e.3 scanning...
1077 01:57:29.759220 scan_generic_bus for PCI: 00:1e.3
1078 01:57:29.762338 SPI: 00 enabled
1079 01:57:29.768878 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1080 01:57:29.772073 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1081 01:57:29.775438 PCI: 00:1f.0 scanning...
1082 01:57:29.778562 scan_static_bus for PCI: 00:1f.0
1083 01:57:29.782053 PNP: 0c09.0 enabled
1084 01:57:29.785149 PNP: 0c09.0 scanning...
1085 01:57:29.788704 scan_static_bus for PNP: 0c09.0
1086 01:57:29.792098 scan_static_bus for PNP: 0c09.0 done
1087 01:57:29.795000 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1088 01:57:29.798221 scan_static_bus for PCI: 00:1f.0 done
1089 01:57:29.805069 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1090 01:57:29.805140 PCI: 00:1f.2 scanning...
1091 01:57:29.811912 scan_static_bus for PCI: 00:1f.2
1092 01:57:29.811985 GENERIC: 0.0 enabled
1093 01:57:29.815009 GENERIC: 0.0 scanning...
1094 01:57:29.818179 scan_static_bus for GENERIC: 0.0
1095 01:57:29.821636 GENERIC: 0.0 enabled
1096 01:57:29.821717 GENERIC: 1.0 enabled
1097 01:57:29.824824 scan_static_bus for GENERIC: 0.0 done
1098 01:57:29.831168 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1099 01:57:29.834804 scan_static_bus for PCI: 00:1f.2 done
1100 01:57:29.841042 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1101 01:57:29.841122 PCI: 00:1f.3 scanning...
1102 01:57:29.844725 scan_static_bus for PCI: 00:1f.3
1103 01:57:29.850865 scan_static_bus for PCI: 00:1f.3 done
1104 01:57:29.854278 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1105 01:57:29.857669 PCI: 00:1f.5 scanning...
1106 01:57:29.860812 scan_generic_bus for PCI: 00:1f.5
1107 01:57:29.863996 scan_generic_bus for PCI: 00:1f.5 done
1108 01:57:29.870597 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1109 01:57:29.874036 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1110 01:57:29.877105 scan_static_bus for Root Device done
1111 01:57:29.883849 scan_bus: bus Root Device finished in 735 msecs
1112 01:57:29.883934 done
1113 01:57:29.890641 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1114 01:57:29.893739 Chrome EC: UHEPI supported
1115 01:57:29.900254 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1116 01:57:29.903450 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1117 01:57:29.910095 SPI flash protection: WPSW=0 SRP0=1
1118 01:57:29.913567 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1119 01:57:29.920017 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1120 01:57:29.923127 found VGA at PCI: 00:02.0
1121 01:57:29.926523 Setting up VGA for PCI: 00:02.0
1122 01:57:29.929592 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1123 01:57:29.936397 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1124 01:57:29.936477 Allocating resources...
1125 01:57:29.939725 Reading resources...
1126 01:57:29.942978 Root Device read_resources bus 0 link: 0
1127 01:57:29.949620 DOMAIN: 0000 read_resources bus 0 link: 0
1128 01:57:29.952746 PCI: 00:04.0 read_resources bus 1 link: 0
1129 01:57:29.959419 PCI: 00:04.0 read_resources bus 1 link: 0 done
1130 01:57:29.962694 PCI: 00:0d.0 read_resources bus 0 link: 0
1131 01:57:29.968934 USB0 port 0 read_resources bus 0 link: 0
1132 01:57:29.972486 USB0 port 0 read_resources bus 0 link: 0 done
1133 01:57:29.978961 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1134 01:57:29.982030 PCI: 00:14.0 read_resources bus 0 link: 0
1135 01:57:29.985212 USB0 port 0 read_resources bus 0 link: 0
1136 01:57:29.992883 USB0 port 0 read_resources bus 0 link: 0 done
1137 01:57:29.995954 PCI: 00:14.0 read_resources bus 0 link: 0 done
1138 01:57:30.002935 PCI: 00:14.3 read_resources bus 0 link: 0
1139 01:57:30.006098 PCI: 00:14.3 read_resources bus 0 link: 0 done
1140 01:57:30.012904 PCI: 00:15.0 read_resources bus 0 link: 0
1141 01:57:30.015951 PCI: 00:15.0 read_resources bus 0 link: 0 done
1142 01:57:30.022775 PCI: 00:15.1 read_resources bus 0 link: 0
1143 01:57:30.026119 PCI: 00:15.1 read_resources bus 0 link: 0 done
1144 01:57:30.033011 PCI: 00:19.1 read_resources bus 0 link: 0
1145 01:57:30.036597 PCI: 00:19.1 read_resources bus 0 link: 0 done
1146 01:57:30.043044 PCI: 00:1d.0 read_resources bus 1 link: 0
1147 01:57:30.046458 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1148 01:57:30.053378 PCI: 00:1e.2 read_resources bus 2 link: 0
1149 01:57:30.056371 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1150 01:57:30.062848 PCI: 00:1e.3 read_resources bus 3 link: 0
1151 01:57:30.066353 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1152 01:57:30.072871 PCI: 00:1f.0 read_resources bus 0 link: 0
1153 01:57:30.075907 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1154 01:57:30.082564 PCI: 00:1f.2 read_resources bus 0 link: 0
1155 01:57:30.086088 GENERIC: 0.0 read_resources bus 0 link: 0
1156 01:57:30.092568 GENERIC: 0.0 read_resources bus 0 link: 0 done
1157 01:57:30.095578 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1158 01:57:30.102274 DOMAIN: 0000 read_resources bus 0 link: 0 done
1159 01:57:30.105387 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1160 01:57:30.112344 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1161 01:57:30.115301 Root Device read_resources bus 0 link: 0 done
1162 01:57:30.118610 Done reading resources.
1163 01:57:30.125227 Show resources in subtree (Root Device)...After reading.
1164 01:57:30.128642 Root Device child on link 0 DOMAIN: 0000
1165 01:57:30.131610 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 01:57:30.141759 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 01:57:30.151622 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 01:57:30.154850 PCI: 00:00.0
1169 01:57:30.164794 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 01:57:30.171263 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 01:57:30.180978 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 01:57:30.190962 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 01:57:30.200854 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 01:57:30.210535 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 01:57:30.220305 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 01:57:30.230267 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 01:57:30.236809 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 01:57:30.246417 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 01:57:30.256460 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 01:57:30.266461 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 01:57:30.276135 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 01:57:30.286278 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 01:57:30.292958 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 01:57:30.302399 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 01:57:30.312346 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 01:57:30.322282 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 01:57:30.332121 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 01:57:30.341914 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1189 01:57:30.342002 PCI: 00:02.0
1190 01:57:30.355069 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 01:57:30.365088 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1192 01:57:30.371658 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1193 01:57:30.378169 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 01:57:30.387853 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1195 01:57:30.387938 GENERIC: 0.0
1196 01:57:30.391390 PCI: 00:05.0
1197 01:57:30.401025 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 01:57:30.404432 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1199 01:57:30.407792 GENERIC: 0.0
1200 01:57:30.407865 PCI: 00:08.0
1201 01:57:30.417807 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 01:57:30.421009 PCI: 00:0a.0
1203 01:57:30.424425 PCI: 00:0d.0 child on link 0 USB0 port 0
1204 01:57:30.434130 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 01:57:30.440602 USB0 port 0 child on link 0 USB3 port 0
1206 01:57:30.440683 USB3 port 0
1207 01:57:30.443965 USB3 port 1
1208 01:57:30.444039 USB3 port 2
1209 01:57:30.447595 USB3 port 3
1210 01:57:30.450876 PCI: 00:14.0 child on link 0 USB0 port 0
1211 01:57:30.460407 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 01:57:30.463789 USB0 port 0 child on link 0 USB2 port 0
1213 01:57:30.467081 USB2 port 0
1214 01:57:30.470481 USB2 port 1
1215 01:57:30.470553 USB2 port 2
1216 01:57:30.473658 USB2 port 3
1217 01:57:30.473731 USB2 port 4
1218 01:57:30.476774 USB2 port 5
1219 01:57:30.476846 USB2 port 6
1220 01:57:30.480023 USB2 port 7
1221 01:57:30.480096 USB2 port 8
1222 01:57:30.483614 USB2 port 9
1223 01:57:30.483686 USB3 port 0
1224 01:57:30.486736 USB3 port 1
1225 01:57:30.486808 USB3 port 2
1226 01:57:30.489907 USB3 port 3
1227 01:57:30.489979 PCI: 00:14.2
1228 01:57:30.499817 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 01:57:30.509618 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1230 01:57:30.516214 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1231 01:57:30.525951 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1232 01:57:30.526036 GENERIC: 0.0
1233 01:57:30.532821 PCI: 00:15.0 child on link 0 I2C: 00:1a
1234 01:57:30.542705 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 01:57:30.542786 I2C: 00:1a
1236 01:57:30.546060 I2C: 00:31
1237 01:57:30.546135 I2C: 00:32
1238 01:57:30.549452 PCI: 00:15.1 child on link 0 I2C: 00:10
1239 01:57:30.562304 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 01:57:30.562390 I2C: 00:10
1241 01:57:30.565612 PCI: 00:15.2
1242 01:57:30.575294 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 01:57:30.575377 PCI: 00:15.3
1244 01:57:30.585127 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 01:57:30.588603 PCI: 00:16.0
1246 01:57:30.598521 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 01:57:30.598610 PCI: 00:19.0
1248 01:57:30.601679 PCI: 00:19.1 child on link 0 I2C: 00:15
1249 01:57:30.611434 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 01:57:30.614941 I2C: 00:15
1251 01:57:30.618082 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1252 01:57:30.627806 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1253 01:57:30.637826 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1254 01:57:30.647730 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1255 01:57:30.647812 GENERIC: 0.0
1256 01:57:30.650894 PCI: 01:00.0
1257 01:57:30.660839 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1258 01:57:30.670547 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1259 01:57:30.670628 PCI: 00:1e.0
1260 01:57:30.684012 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1261 01:57:30.687042 PCI: 00:1e.2 child on link 0 SPI: 00
1262 01:57:30.696934 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1263 01:57:30.697018 SPI: 00
1264 01:57:30.703424 PCI: 00:1e.3 child on link 0 SPI: 00
1265 01:57:30.713373 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1266 01:57:30.713459 SPI: 00
1267 01:57:30.716717 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1268 01:57:30.726412 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1269 01:57:30.726500 PNP: 0c09.0
1270 01:57:30.736322 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1271 01:57:30.743140 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1272 01:57:30.749580 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1273 01:57:30.759209 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1274 01:57:30.766029 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1275 01:57:30.766115 GENERIC: 0.0
1276 01:57:30.769414 GENERIC: 1.0
1277 01:57:30.769531 PCI: 00:1f.3
1278 01:57:30.778983 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1279 01:57:30.788794 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1280 01:57:30.792316 PCI: 00:1f.5
1281 01:57:30.801819 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1282 01:57:30.805466 CPU_CLUSTER: 0 child on link 0 APIC: 00
1283 01:57:30.805550 APIC: 00
1284 01:57:30.808516 APIC: 01
1285 01:57:30.808600 APIC: 05
1286 01:57:30.811867 APIC: 07
1287 01:57:30.811951 APIC: 02
1288 01:57:30.812017 APIC: 04
1289 01:57:30.815410 APIC: 06
1290 01:57:30.815494 APIC: 03
1291 01:57:30.821876 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1292 01:57:30.828428 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1293 01:57:30.834964 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1294 01:57:30.841448 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1295 01:57:30.844885 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1296 01:57:30.848015 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1297 01:57:30.857918 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1298 01:57:30.864578 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1299 01:57:30.871147 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1300 01:57:30.877493 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1301 01:57:30.884380 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1302 01:57:30.894056 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1303 01:57:30.900654 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1304 01:57:30.907245 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1305 01:57:30.910499 DOMAIN: 0000: Resource ranges:
1306 01:57:30.913818 * Base: 1000, Size: 800, Tag: 100
1307 01:57:30.917140 * Base: 1900, Size: e700, Tag: 100
1308 01:57:30.923625 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1309 01:57:30.930329 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1310 01:57:30.936803 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1311 01:57:30.943293 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1312 01:57:30.953283 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1313 01:57:30.959612 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1314 01:57:30.966352 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1315 01:57:30.976422 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1316 01:57:30.982969 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1317 01:57:30.989408 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1318 01:57:30.999087 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1319 01:57:31.005713 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1320 01:57:31.012277 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1321 01:57:31.022113 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1322 01:57:31.028665 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1323 01:57:31.035329 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1324 01:57:31.045311 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1325 01:57:31.051761 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1326 01:57:31.058558 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1327 01:57:31.068583 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1328 01:57:31.074831 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1329 01:57:31.084589 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1330 01:57:31.091435 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1331 01:57:31.097741 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1332 01:57:31.107902 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1333 01:57:31.111012 DOMAIN: 0000: Resource ranges:
1334 01:57:31.114448 * Base: 7fc00000, Size: 40400000, Tag: 200
1335 01:57:31.117710 * Base: d0000000, Size: 28000000, Tag: 200
1336 01:57:31.124466 * Base: fa000000, Size: 1000000, Tag: 200
1337 01:57:31.127525 * Base: fb001000, Size: 2fff000, Tag: 200
1338 01:57:31.130844 * Base: fe010000, Size: 2e000, Tag: 200
1339 01:57:31.134334 * Base: fe03f000, Size: d41000, Tag: 200
1340 01:57:31.140799 * Base: fed88000, Size: 8000, Tag: 200
1341 01:57:31.143848 * Base: fed93000, Size: d000, Tag: 200
1342 01:57:31.147687 * Base: feda2000, Size: 1e000, Tag: 200
1343 01:57:31.150480 * Base: fede0000, Size: 1220000, Tag: 200
1344 01:57:31.157068 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1345 01:57:31.163521 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1346 01:57:31.170481 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1347 01:57:31.176922 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1348 01:57:31.183502 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1349 01:57:31.190050 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1350 01:57:31.196566 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1351 01:57:31.203116 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1352 01:57:31.209871 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1353 01:57:31.216389 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1354 01:57:31.222856 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1355 01:57:31.229368 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1356 01:57:31.236064 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1357 01:57:31.242682 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1358 01:57:31.249221 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1359 01:57:31.255573 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1360 01:57:31.262515 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1361 01:57:31.268766 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1362 01:57:31.275508 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1363 01:57:31.282254 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1364 01:57:31.288724 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1365 01:57:31.295519 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1366 01:57:31.301942 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1367 01:57:31.311500 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1368 01:57:31.318049 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1369 01:57:31.321412 PCI: 00:1d.0: Resource ranges:
1370 01:57:31.324762 * Base: 7fc00000, Size: 100000, Tag: 200
1371 01:57:31.331290 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1372 01:57:31.337786 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1373 01:57:31.347661 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1374 01:57:31.354246 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1375 01:57:31.357409 Root Device assign_resources, bus 0 link: 0
1376 01:57:31.364068 DOMAIN: 0000 assign_resources, bus 0 link: 0
1377 01:57:31.370711 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1378 01:57:31.380350 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1379 01:57:31.386805 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1380 01:57:31.396890 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1381 01:57:31.399981 PCI: 00:04.0 assign_resources, bus 1 link: 0
1382 01:57:31.406756 PCI: 00:04.0 assign_resources, bus 1 link: 0
1383 01:57:31.413138 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1384 01:57:31.423123 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1385 01:57:31.429982 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1386 01:57:31.433003 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1387 01:57:31.439563 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1388 01:57:31.446259 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1389 01:57:31.452826 PCI: 00:14.0 assign_resources, bus 0 link: 0
1390 01:57:31.455931 PCI: 00:14.0 assign_resources, bus 0 link: 0
1391 01:57:31.465954 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1392 01:57:31.472561 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1393 01:57:31.482245 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1394 01:57:31.485674 PCI: 00:14.3 assign_resources, bus 0 link: 0
1395 01:57:31.488739 PCI: 00:14.3 assign_resources, bus 0 link: 0
1396 01:57:31.498699 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1397 01:57:31.502089 PCI: 00:15.0 assign_resources, bus 0 link: 0
1398 01:57:31.508547 PCI: 00:15.0 assign_resources, bus 0 link: 0
1399 01:57:31.515379 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1400 01:57:31.521619 PCI: 00:15.1 assign_resources, bus 0 link: 0
1401 01:57:31.525106 PCI: 00:15.1 assign_resources, bus 0 link: 0
1402 01:57:31.534974 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1403 01:57:31.541487 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1404 01:57:31.551461 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1405 01:57:31.557959 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1406 01:57:31.561181 PCI: 00:19.1 assign_resources, bus 0 link: 0
1407 01:57:31.567627 PCI: 00:19.1 assign_resources, bus 0 link: 0
1408 01:57:31.574490 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1409 01:57:31.587490 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1410 01:57:31.593945 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1411 01:57:31.597337 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 01:57:31.607345 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1413 01:57:31.613720 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1414 01:57:31.620287 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1415 01:57:31.626738 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1416 01:57:31.633490 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1417 01:57:31.636952 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1418 01:57:31.646648 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1419 01:57:31.650039 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1420 01:57:31.656679 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1421 01:57:31.659792 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1422 01:57:31.663293 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1423 01:57:31.669465 LPC: Trying to open IO window from 800 size 1ff
1424 01:57:31.679518 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1425 01:57:31.686080 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1426 01:57:31.692743 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1427 01:57:31.699095 DOMAIN: 0000 assign_resources, bus 0 link: 0
1428 01:57:31.702544 Root Device assign_resources, bus 0 link: 0
1429 01:57:31.705649 Done setting resources.
1430 01:57:31.712359 Show resources in subtree (Root Device)...After assigning values.
1431 01:57:31.715650 Root Device child on link 0 DOMAIN: 0000
1432 01:57:31.722468 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1433 01:57:31.729026 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1434 01:57:31.738639 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1435 01:57:31.741964 PCI: 00:00.0
1436 01:57:31.751766 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1437 01:57:31.761856 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1438 01:57:31.771395 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1439 01:57:31.778167 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1440 01:57:31.788034 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1441 01:57:31.797998 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1442 01:57:31.807799 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1443 01:57:31.817280 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1444 01:57:31.827586 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1445 01:57:31.837427 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1446 01:57:31.843705 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1447 01:57:31.853541 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1448 01:57:31.863648 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1449 01:57:31.873635 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1450 01:57:31.883502 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1451 01:57:31.893068 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1452 01:57:31.903152 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1453 01:57:31.909709 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1454 01:57:31.919387 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1455 01:57:31.929598 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1456 01:57:31.932740 PCI: 00:02.0
1457 01:57:31.942576 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1458 01:57:31.952487 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1459 01:57:31.962408 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1460 01:57:31.965808 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1461 01:57:31.978577 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1462 01:57:31.978664 GENERIC: 0.0
1463 01:57:31.981996 PCI: 00:05.0
1464 01:57:31.991937 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1465 01:57:31.995433 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1466 01:57:31.998395 GENERIC: 0.0
1467 01:57:31.998480 PCI: 00:08.0
1468 01:57:32.008427 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1469 01:57:32.011456 PCI: 00:0a.0
1470 01:57:32.014992 PCI: 00:0d.0 child on link 0 USB0 port 0
1471 01:57:32.024676 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1472 01:57:32.031333 USB0 port 0 child on link 0 USB3 port 0
1473 01:57:32.031418 USB3 port 0
1474 01:57:32.034835 USB3 port 1
1475 01:57:32.034914 USB3 port 2
1476 01:57:32.037792 USB3 port 3
1477 01:57:32.041102 PCI: 00:14.0 child on link 0 USB0 port 0
1478 01:57:32.051315 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1479 01:57:32.058061 USB0 port 0 child on link 0 USB2 port 0
1480 01:57:32.058145 USB2 port 0
1481 01:57:32.061007 USB2 port 1
1482 01:57:32.061079 USB2 port 2
1483 01:57:32.064059 USB2 port 3
1484 01:57:32.064135 USB2 port 4
1485 01:57:32.067471 USB2 port 5
1486 01:57:32.067549 USB2 port 6
1487 01:57:32.070581 USB2 port 7
1488 01:57:32.073849 USB2 port 8
1489 01:57:32.073926 USB2 port 9
1490 01:57:32.077248 USB3 port 0
1491 01:57:32.077345 USB3 port 1
1492 01:57:32.080625 USB3 port 2
1493 01:57:32.080707 USB3 port 3
1494 01:57:32.084130 PCI: 00:14.2
1495 01:57:32.093592 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1496 01:57:32.103634 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1497 01:57:32.106728 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1498 01:57:32.120027 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1499 01:57:32.120145 GENERIC: 0.0
1500 01:57:32.123385 PCI: 00:15.0 child on link 0 I2C: 00:1a
1501 01:57:32.136493 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1502 01:57:32.136574 I2C: 00:1a
1503 01:57:32.136654 I2C: 00:31
1504 01:57:32.139884 I2C: 00:32
1505 01:57:32.143185 PCI: 00:15.1 child on link 0 I2C: 00:10
1506 01:57:32.153085 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1507 01:57:32.156135 I2C: 00:10
1508 01:57:32.156220 PCI: 00:15.2
1509 01:57:32.169328 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1510 01:57:32.169408 PCI: 00:15.3
1511 01:57:32.179295 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1512 01:57:32.182373 PCI: 00:16.0
1513 01:57:32.192582 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1514 01:57:32.192668 PCI: 00:19.0
1515 01:57:32.198968 PCI: 00:19.1 child on link 0 I2C: 00:15
1516 01:57:32.208766 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1517 01:57:32.208860 I2C: 00:15
1518 01:57:32.215353 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1519 01:57:32.221963 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1520 01:57:32.234997 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1521 01:57:32.244883 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1522 01:57:32.248310 GENERIC: 0.0
1523 01:57:32.248396 PCI: 01:00.0
1524 01:57:32.257952 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1525 01:57:32.271179 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1526 01:57:32.271297 PCI: 00:1e.0
1527 01:57:32.280930 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1528 01:57:32.287489 PCI: 00:1e.2 child on link 0 SPI: 00
1529 01:57:32.297382 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1530 01:57:32.297468 SPI: 00
1531 01:57:32.300709 PCI: 00:1e.3 child on link 0 SPI: 00
1532 01:57:32.313735 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1533 01:57:32.313821 SPI: 00
1534 01:57:32.316990 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1535 01:57:32.327073 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1536 01:57:32.327162 PNP: 0c09.0
1537 01:57:32.336944 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1538 01:57:32.343504 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1539 01:57:32.349670 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1540 01:57:32.359703 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1541 01:57:32.366375 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1542 01:57:32.366461 GENERIC: 0.0
1543 01:57:32.369491 GENERIC: 1.0
1544 01:57:32.369583 PCI: 00:1f.3
1545 01:57:32.379508 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1546 01:57:32.392562 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1547 01:57:32.392653 PCI: 00:1f.5
1548 01:57:32.402629 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1549 01:57:32.409041 CPU_CLUSTER: 0 child on link 0 APIC: 00
1550 01:57:32.409123 APIC: 00
1551 01:57:32.409190 APIC: 01
1552 01:57:32.412196 APIC: 05
1553 01:57:32.412269 APIC: 07
1554 01:57:32.412331 APIC: 02
1555 01:57:32.415768 APIC: 04
1556 01:57:32.415843 APIC: 06
1557 01:57:32.419138 APIC: 03
1558 01:57:32.419226 Done allocating resources.
1559 01:57:32.425590 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1560 01:57:32.431981 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1561 01:57:32.435237 Configure GPIOs for I2S audio on UP4.
1562 01:57:32.442660 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1563 01:57:32.445818 Enabling resources...
1564 01:57:32.449372 PCI: 00:00.0 subsystem <- 8086/9a12
1565 01:57:32.452425 PCI: 00:00.0 cmd <- 06
1566 01:57:32.455575 PCI: 00:02.0 subsystem <- 8086/9a40
1567 01:57:32.459132 PCI: 00:02.0 cmd <- 03
1568 01:57:32.462247 PCI: 00:04.0 subsystem <- 8086/9a03
1569 01:57:32.465531 PCI: 00:04.0 cmd <- 02
1570 01:57:32.469031 PCI: 00:05.0 subsystem <- 8086/9a19
1571 01:57:32.469116 PCI: 00:05.0 cmd <- 02
1572 01:57:32.475656 PCI: 00:08.0 subsystem <- 8086/9a11
1573 01:57:32.475740 PCI: 00:08.0 cmd <- 06
1574 01:57:32.479026 PCI: 00:0d.0 subsystem <- 8086/9a13
1575 01:57:32.482245 PCI: 00:0d.0 cmd <- 02
1576 01:57:32.485663 PCI: 00:14.0 subsystem <- 8086/a0ed
1577 01:57:32.488772 PCI: 00:14.0 cmd <- 02
1578 01:57:32.491957 PCI: 00:14.2 subsystem <- 8086/a0ef
1579 01:57:32.495323 PCI: 00:14.2 cmd <- 02
1580 01:57:32.498529 PCI: 00:14.3 subsystem <- 8086/a0f0
1581 01:57:32.502090 PCI: 00:14.3 cmd <- 02
1582 01:57:32.504985 PCI: 00:15.0 subsystem <- 8086/a0e8
1583 01:57:32.508394 PCI: 00:15.0 cmd <- 02
1584 01:57:32.511858 PCI: 00:15.1 subsystem <- 8086/a0e9
1585 01:57:32.514961 PCI: 00:15.1 cmd <- 02
1586 01:57:32.518445 PCI: 00:15.2 subsystem <- 8086/a0ea
1587 01:57:32.521413 PCI: 00:15.2 cmd <- 02
1588 01:57:32.524896 PCI: 00:15.3 subsystem <- 8086/a0eb
1589 01:57:32.524984 PCI: 00:15.3 cmd <- 02
1590 01:57:32.531486 PCI: 00:16.0 subsystem <- 8086/a0e0
1591 01:57:32.531573 PCI: 00:16.0 cmd <- 02
1592 01:57:32.534536 PCI: 00:19.1 subsystem <- 8086/a0c6
1593 01:57:32.537921 PCI: 00:19.1 cmd <- 02
1594 01:57:32.541050 PCI: 00:1d.0 bridge ctrl <- 0013
1595 01:57:32.544595 PCI: 00:1d.0 subsystem <- 8086/a0b0
1596 01:57:32.547588 PCI: 00:1d.0 cmd <- 06
1597 01:57:32.550940 PCI: 00:1e.0 subsystem <- 8086/a0a8
1598 01:57:32.554581 PCI: 00:1e.0 cmd <- 06
1599 01:57:32.557580 PCI: 00:1e.2 subsystem <- 8086/a0aa
1600 01:57:32.561067 PCI: 00:1e.2 cmd <- 06
1601 01:57:32.564109 PCI: 00:1e.3 subsystem <- 8086/a0ab
1602 01:57:32.567393 PCI: 00:1e.3 cmd <- 02
1603 01:57:32.570494 PCI: 00:1f.0 subsystem <- 8086/a087
1604 01:57:32.574046 PCI: 00:1f.0 cmd <- 407
1605 01:57:32.577281 PCI: 00:1f.3 subsystem <- 8086/a0c8
1606 01:57:32.580322 PCI: 00:1f.3 cmd <- 02
1607 01:57:32.583713 PCI: 00:1f.5 subsystem <- 8086/a0a4
1608 01:57:32.587123 PCI: 00:1f.5 cmd <- 406
1609 01:57:32.590178 PCI: 01:00.0 cmd <- 02
1610 01:57:32.594060 done.
1611 01:57:32.597326 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1612 01:57:32.600612 Initializing devices...
1613 01:57:32.604331 Root Device init
1614 01:57:32.607531 Chrome EC: Set SMI mask to 0x0000000000000000
1615 01:57:32.613989 Chrome EC: clear events_b mask to 0x0000000000000000
1616 01:57:32.620661 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1617 01:57:32.627329 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1618 01:57:32.630723 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1619 01:57:32.637966 Chrome EC: Set WAKE mask to 0x0000000000000000
1620 01:57:32.644587 fw_config match found: DB_USB=USB3_ACTIVE
1621 01:57:32.647653 Configure Right Type-C port orientation for retimer
1622 01:57:32.650907 Root Device init finished in 45 msecs
1623 01:57:32.655134 PCI: 00:00.0 init
1624 01:57:32.658177 CPU TDP = 9 Watts
1625 01:57:32.658254 CPU PL1 = 9 Watts
1626 01:57:32.661609 CPU PL2 = 40 Watts
1627 01:57:32.664751 CPU PL4 = 83 Watts
1628 01:57:32.668426 PCI: 00:00.0 init finished in 8 msecs
1629 01:57:32.671731 PCI: 00:02.0 init
1630 01:57:32.671803 GMA: Found VBT in CBFS
1631 01:57:32.674771 GMA: Found valid VBT in CBFS
1632 01:57:32.681550 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1633 01:57:32.687988 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1634 01:57:32.690925 PCI: 00:02.0 init finished in 18 msecs
1635 01:57:32.694464 PCI: 00:05.0 init
1636 01:57:32.697834 PCI: 00:05.0 init finished in 0 msecs
1637 01:57:32.701234 PCI: 00:08.0 init
1638 01:57:32.704705 PCI: 00:08.0 init finished in 0 msecs
1639 01:57:32.707596 PCI: 00:14.0 init
1640 01:57:32.710829 PCI: 00:14.0 init finished in 0 msecs
1641 01:57:32.714282 PCI: 00:14.2 init
1642 01:57:32.717426 PCI: 00:14.2 init finished in 0 msecs
1643 01:57:32.720667 PCI: 00:15.0 init
1644 01:57:32.724045 I2C bus 0 version 0x3230302a
1645 01:57:32.727296 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1646 01:57:32.730671 PCI: 00:15.0 init finished in 6 msecs
1647 01:57:32.734101 PCI: 00:15.1 init
1648 01:57:32.734176 I2C bus 1 version 0x3230302a
1649 01:57:32.740386 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1650 01:57:32.743579 PCI: 00:15.1 init finished in 6 msecs
1651 01:57:32.743658 PCI: 00:15.2 init
1652 01:57:32.747085 I2C bus 2 version 0x3230302a
1653 01:57:32.750167 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1654 01:57:32.756958 PCI: 00:15.2 init finished in 6 msecs
1655 01:57:32.757039 PCI: 00:15.3 init
1656 01:57:32.759945 I2C bus 3 version 0x3230302a
1657 01:57:32.763143 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1658 01:57:32.766501 PCI: 00:15.3 init finished in 6 msecs
1659 01:57:32.770328 PCI: 00:16.0 init
1660 01:57:32.773475 PCI: 00:16.0 init finished in 0 msecs
1661 01:57:32.776743 PCI: 00:19.1 init
1662 01:57:32.780201 I2C bus 5 version 0x3230302a
1663 01:57:32.783262 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1664 01:57:32.786706 PCI: 00:19.1 init finished in 6 msecs
1665 01:57:32.789900 PCI: 00:1d.0 init
1666 01:57:32.793466 Initializing PCH PCIe bridge.
1667 01:57:32.796668 PCI: 00:1d.0 init finished in 3 msecs
1668 01:57:32.799734 PCI: 00:1f.0 init
1669 01:57:32.803172 IOAPIC: Initializing IOAPIC at 0xfec00000
1670 01:57:32.806412 IOAPIC: Bootstrap Processor Local APIC = 0x00
1671 01:57:32.809588 IOAPIC: ID = 0x02
1672 01:57:32.813037 IOAPIC: Dumping registers
1673 01:57:32.816409 reg 0x0000: 0x02000000
1674 01:57:32.816506 reg 0x0001: 0x00770020
1675 01:57:32.819332 reg 0x0002: 0x00000000
1676 01:57:32.822854 PCI: 00:1f.0 init finished in 21 msecs
1677 01:57:32.826470 PCI: 00:1f.2 init
1678 01:57:32.829512 Disabling ACPI via APMC.
1679 01:57:32.833278 APMC done.
1680 01:57:32.836528 PCI: 00:1f.2 init finished in 6 msecs
1681 01:57:32.848515 PCI: 01:00.0 init
1682 01:57:32.851509 PCI: 01:00.0 init finished in 0 msecs
1683 01:57:32.854925 PNP: 0c09.0 init
1684 01:57:32.858300 Google Chrome EC uptime: 8.293 seconds
1685 01:57:32.864991 Google Chrome AP resets since EC boot: 1
1686 01:57:32.868013 Google Chrome most recent AP reset causes:
1687 01:57:32.871461 0.453: 32775 shutdown: entering G3
1688 01:57:32.877957 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1689 01:57:32.881154 PNP: 0c09.0 init finished in 22 msecs
1690 01:57:32.887294 Devices initialized
1691 01:57:32.890435 Show all devs... After init.
1692 01:57:32.893801 Root Device: enabled 1
1693 01:57:32.893884 DOMAIN: 0000: enabled 1
1694 01:57:32.896911 CPU_CLUSTER: 0: enabled 1
1695 01:57:32.900299 PCI: 00:00.0: enabled 1
1696 01:57:32.903687 PCI: 00:02.0: enabled 1
1697 01:57:32.903773 PCI: 00:04.0: enabled 1
1698 01:57:32.906679 PCI: 00:05.0: enabled 1
1699 01:57:32.910138 PCI: 00:06.0: enabled 0
1700 01:57:32.913389 PCI: 00:07.0: enabled 0
1701 01:57:32.913473 PCI: 00:07.1: enabled 0
1702 01:57:32.916517 PCI: 00:07.2: enabled 0
1703 01:57:32.919846 PCI: 00:07.3: enabled 0
1704 01:57:32.923294 PCI: 00:08.0: enabled 1
1705 01:57:32.923392 PCI: 00:09.0: enabled 0
1706 01:57:32.926552 PCI: 00:0a.0: enabled 0
1707 01:57:32.929669 PCI: 00:0d.0: enabled 1
1708 01:57:32.933122 PCI: 00:0d.1: enabled 0
1709 01:57:32.933206 PCI: 00:0d.2: enabled 0
1710 01:57:32.936123 PCI: 00:0d.3: enabled 0
1711 01:57:32.939768 PCI: 00:0e.0: enabled 0
1712 01:57:32.942964 PCI: 00:10.2: enabled 1
1713 01:57:32.943048 PCI: 00:10.6: enabled 0
1714 01:57:32.946249 PCI: 00:10.7: enabled 0
1715 01:57:32.949390 PCI: 00:12.0: enabled 0
1716 01:57:32.952931 PCI: 00:12.6: enabled 0
1717 01:57:32.953014 PCI: 00:13.0: enabled 0
1718 01:57:32.956313 PCI: 00:14.0: enabled 1
1719 01:57:32.959471 PCI: 00:14.1: enabled 0
1720 01:57:32.962558 PCI: 00:14.2: enabled 1
1721 01:57:32.962643 PCI: 00:14.3: enabled 1
1722 01:57:32.965973 PCI: 00:15.0: enabled 1
1723 01:57:32.969388 PCI: 00:15.1: enabled 1
1724 01:57:32.972529 PCI: 00:15.2: enabled 1
1725 01:57:32.972613 PCI: 00:15.3: enabled 1
1726 01:57:32.975900 PCI: 00:16.0: enabled 1
1727 01:57:32.979351 PCI: 00:16.1: enabled 0
1728 01:57:32.979434 PCI: 00:16.2: enabled 0
1729 01:57:32.982434 PCI: 00:16.3: enabled 0
1730 01:57:32.985905 PCI: 00:16.4: enabled 0
1731 01:57:32.989022 PCI: 00:16.5: enabled 0
1732 01:57:32.989107 PCI: 00:17.0: enabled 0
1733 01:57:32.992563 PCI: 00:19.0: enabled 0
1734 01:57:32.995515 PCI: 00:19.1: enabled 1
1735 01:57:32.998911 PCI: 00:19.2: enabled 0
1736 01:57:32.999015 PCI: 00:1c.0: enabled 1
1737 01:57:33.002172 PCI: 00:1c.1: enabled 0
1738 01:57:33.005647 PCI: 00:1c.2: enabled 0
1739 01:57:33.008954 PCI: 00:1c.3: enabled 0
1740 01:57:33.009037 PCI: 00:1c.4: enabled 0
1741 01:57:33.012277 PCI: 00:1c.5: enabled 0
1742 01:57:33.015265 PCI: 00:1c.6: enabled 1
1743 01:57:33.018708 PCI: 00:1c.7: enabled 0
1744 01:57:33.018810 PCI: 00:1d.0: enabled 1
1745 01:57:33.022062 PCI: 00:1d.1: enabled 0
1746 01:57:33.025472 PCI: 00:1d.2: enabled 1
1747 01:57:33.028500 PCI: 00:1d.3: enabled 0
1748 01:57:33.028584 PCI: 00:1e.0: enabled 1
1749 01:57:33.031623 PCI: 00:1e.1: enabled 0
1750 01:57:33.035102 PCI: 00:1e.2: enabled 1
1751 01:57:33.038586 PCI: 00:1e.3: enabled 1
1752 01:57:33.038701 PCI: 00:1f.0: enabled 1
1753 01:57:33.041599 PCI: 00:1f.1: enabled 0
1754 01:57:33.045123 PCI: 00:1f.2: enabled 1
1755 01:57:33.048362 PCI: 00:1f.3: enabled 1
1756 01:57:33.048445 PCI: 00:1f.4: enabled 0
1757 01:57:33.051536 PCI: 00:1f.5: enabled 1
1758 01:57:33.054964 PCI: 00:1f.6: enabled 0
1759 01:57:33.055047 PCI: 00:1f.7: enabled 0
1760 01:57:33.058099 APIC: 00: enabled 1
1761 01:57:33.061502 GENERIC: 0.0: enabled 1
1762 01:57:33.064806 GENERIC: 0.0: enabled 1
1763 01:57:33.064890 GENERIC: 1.0: enabled 1
1764 01:57:33.067861 GENERIC: 0.0: enabled 1
1765 01:57:33.071299 GENERIC: 1.0: enabled 1
1766 01:57:33.074657 USB0 port 0: enabled 1
1767 01:57:33.074741 GENERIC: 0.0: enabled 1
1768 01:57:33.077934 USB0 port 0: enabled 1
1769 01:57:33.081128 GENERIC: 0.0: enabled 1
1770 01:57:33.081211 I2C: 00:1a: enabled 1
1771 01:57:33.084673 I2C: 00:31: enabled 1
1772 01:57:33.087773 I2C: 00:32: enabled 1
1773 01:57:33.087856 I2C: 00:10: enabled 1
1774 01:57:33.091193 I2C: 00:15: enabled 1
1775 01:57:33.094194 GENERIC: 0.0: enabled 0
1776 01:57:33.097737 GENERIC: 1.0: enabled 0
1777 01:57:33.097821 GENERIC: 0.0: enabled 1
1778 01:57:33.100896 SPI: 00: enabled 1
1779 01:57:33.104022 SPI: 00: enabled 1
1780 01:57:33.104106 PNP: 0c09.0: enabled 1
1781 01:57:33.107304 GENERIC: 0.0: enabled 1
1782 01:57:33.110794 USB3 port 0: enabled 1
1783 01:57:33.110877 USB3 port 1: enabled 1
1784 01:57:33.113949 USB3 port 2: enabled 0
1785 01:57:33.117412 USB3 port 3: enabled 0
1786 01:57:33.120557 USB2 port 0: enabled 0
1787 01:57:33.120656 USB2 port 1: enabled 1
1788 01:57:33.123888 USB2 port 2: enabled 1
1789 01:57:33.127103 USB2 port 3: enabled 0
1790 01:57:33.127201 USB2 port 4: enabled 1
1791 01:57:33.130687 USB2 port 5: enabled 0
1792 01:57:33.133837 USB2 port 6: enabled 0
1793 01:57:33.136982 USB2 port 7: enabled 0
1794 01:57:33.137065 USB2 port 8: enabled 0
1795 01:57:33.140359 USB2 port 9: enabled 0
1796 01:57:33.143827 USB3 port 0: enabled 0
1797 01:57:33.143911 USB3 port 1: enabled 1
1798 01:57:33.146868 USB3 port 2: enabled 0
1799 01:57:33.150346 USB3 port 3: enabled 0
1800 01:57:33.153490 GENERIC: 0.0: enabled 1
1801 01:57:33.153574 GENERIC: 1.0: enabled 1
1802 01:57:33.156698 APIC: 01: enabled 1
1803 01:57:33.160168 APIC: 05: enabled 1
1804 01:57:33.160251 APIC: 07: enabled 1
1805 01:57:33.163486 APIC: 02: enabled 1
1806 01:57:33.163570 APIC: 04: enabled 1
1807 01:57:33.166554 APIC: 06: enabled 1
1808 01:57:33.169947 APIC: 03: enabled 1
1809 01:57:33.170030 PCI: 01:00.0: enabled 1
1810 01:57:33.176621 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1811 01:57:33.183013 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1812 01:57:33.186203 ELOG: NV offset 0xf30000 size 0x1000
1813 01:57:33.192880 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1814 01:57:33.199502 ELOG: Event(17) added with size 13 at 2022-07-07 01:54:25 UTC
1815 01:57:33.206048 ELOG: Event(92) added with size 9 at 2022-07-07 01:54:25 UTC
1816 01:57:33.212655 ELOG: Event(93) added with size 9 at 2022-07-07 01:54:25 UTC
1817 01:57:33.219292 ELOG: Event(9E) added with size 10 at 2022-07-07 01:54:25 UTC
1818 01:57:33.226026 ELOG: Event(9F) added with size 14 at 2022-07-07 01:54:25 UTC
1819 01:57:33.229100 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1820 01:57:33.235645 ELOG: Event(A1) added with size 10 at 2022-07-07 01:54:25 UTC
1821 01:57:33.245643 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1822 01:57:33.252339 ELOG: Event(A0) added with size 9 at 2022-07-07 01:54:25 UTC
1823 01:57:33.255296 elog_add_boot_reason: Logged dev mode boot
1824 01:57:33.261939 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1825 01:57:33.262031 Finalize devices...
1826 01:57:33.265397 Devices finalized
1827 01:57:33.271909 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1828 01:57:33.275070 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1829 01:57:33.281700 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1830 01:57:33.285064 ME: HFSTS1 : 0x80030055
1831 01:57:33.291744 ME: HFSTS2 : 0x30280116
1832 01:57:33.294761 ME: HFSTS3 : 0x00000050
1833 01:57:33.298256 ME: HFSTS4 : 0x00004000
1834 01:57:33.304752 ME: HFSTS5 : 0x00000000
1835 01:57:33.307874 ME: HFSTS6 : 0x40400006
1836 01:57:33.311149 ME: Manufacturing Mode : YES
1837 01:57:33.314560 ME: SPI Protection Mode Enabled : NO
1838 01:57:33.320982 ME: FW Partition Table : OK
1839 01:57:33.324493 ME: Bringup Loader Failure : NO
1840 01:57:33.327759 ME: Firmware Init Complete : NO
1841 01:57:33.330865 ME: Boot Options Present : NO
1842 01:57:33.334472 ME: Update In Progress : NO
1843 01:57:33.337413 ME: D0i3 Support : YES
1844 01:57:33.340867 ME: Low Power State Enabled : NO
1845 01:57:33.347325 ME: CPU Replaced : YES
1846 01:57:33.350474 ME: CPU Replacement Valid : YES
1847 01:57:33.354093 ME: Current Working State : 5
1848 01:57:33.357151 ME: Current Operation State : 1
1849 01:57:33.360695 ME: Current Operation Mode : 3
1850 01:57:33.363782 ME: Error Code : 0
1851 01:57:33.367149 ME: Enhanced Debug Mode : NO
1852 01:57:33.370310 ME: CPU Debug Disabled : YES
1853 01:57:33.377190 ME: TXT Support : NO
1854 01:57:33.380257 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1855 01:57:33.389994 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1856 01:57:33.393520 CBFS: 'fallback/slic' not found.
1857 01:57:33.396666 ACPI: Writing ACPI tables at 76b01000.
1858 01:57:33.396788 ACPI: * FACS
1859 01:57:33.399843 ACPI: * DSDT
1860 01:57:33.403393 Ramoops buffer: 0x100000@0x76a00000.
1861 01:57:33.409747 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1862 01:57:33.413219 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1863 01:57:33.416529 Google Chrome EC: version:
1864 01:57:33.420074 ro: voema_v2.0.10114-a447f03e46
1865 01:57:33.422980 rw: voema_v2.0.10114-a447f03e46
1866 01:57:33.426608 running image: 2
1867 01:57:33.433216 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1868 01:57:33.436345 ACPI: * FADT
1869 01:57:33.436718 SCI is IRQ9
1870 01:57:33.439886 ACPI: added table 1/32, length now 40
1871 01:57:33.442944 ACPI: * SSDT
1872 01:57:33.446429 Found 1 CPU(s) with 8 core(s) each.
1873 01:57:33.452820 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1874 01:57:33.455989 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1875 01:57:33.459178 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1876 01:57:33.462684 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1877 01:57:33.469152 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1878 01:57:33.475476 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1879 01:57:33.479064 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1880 01:57:33.485600 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1881 01:57:33.492005 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1882 01:57:33.495562 \_SB.PCI0.RP09: Added StorageD3Enable property
1883 01:57:33.501791 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1884 01:57:33.505353 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1885 01:57:33.512565 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1886 01:57:33.515792 PS2K: Passing 80 keymaps to kernel
1887 01:57:33.522356 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1888 01:57:33.529080 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1889 01:57:33.535490 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1890 01:57:33.541961 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1891 01:57:33.548593 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1892 01:57:33.555251 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1893 01:57:33.561836 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1894 01:57:33.568427 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1895 01:57:33.571888 ACPI: added table 2/32, length now 44
1896 01:57:33.575209 ACPI: * MCFG
1897 01:57:33.578374 ACPI: added table 3/32, length now 48
1898 01:57:33.578851 ACPI: * TPM2
1899 01:57:33.581819 TPM2 log created at 0x769f0000
1900 01:57:33.584988 ACPI: added table 4/32, length now 52
1901 01:57:33.588518 ACPI: * MADT
1902 01:57:33.588967 SCI is IRQ9
1903 01:57:33.594715 ACPI: added table 5/32, length now 56
1904 01:57:33.594801 current = 76b09850
1905 01:57:33.598046 ACPI: * DMAR
1906 01:57:33.601103 ACPI: added table 6/32, length now 60
1907 01:57:33.604530 ACPI: added table 7/32, length now 64
1908 01:57:33.604607 ACPI: * HPET
1909 01:57:33.611239 ACPI: added table 8/32, length now 68
1910 01:57:33.611317 ACPI: done.
1911 01:57:33.614350 ACPI tables: 35216 bytes.
1912 01:57:33.617788 smbios_write_tables: 769ef000
1913 01:57:33.620826 EC returned error result code 3
1914 01:57:33.624194 Couldn't obtain OEM name from CBI
1915 01:57:33.627606 Create SMBIOS type 16
1916 01:57:33.630719 Create SMBIOS type 17
1917 01:57:33.634209 GENERIC: 0.0 (WIFI Device)
1918 01:57:33.634289 SMBIOS tables: 1734 bytes.
1919 01:57:33.640862 Writing table forward entry at 0x00000500
1920 01:57:33.647179 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1921 01:57:33.650630 Writing coreboot table at 0x76b25000
1922 01:57:33.657005 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1923 01:57:33.660420 1. 0000000000001000-000000000009ffff: RAM
1924 01:57:33.663866 2. 00000000000a0000-00000000000fffff: RESERVED
1925 01:57:33.670345 3. 0000000000100000-00000000769eefff: RAM
1926 01:57:33.673744 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1927 01:57:33.680235 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1928 01:57:33.686763 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1929 01:57:33.690335 7. 0000000077000000-000000007fbfffff: RESERVED
1930 01:57:33.696834 8. 00000000c0000000-00000000cfffffff: RESERVED
1931 01:57:33.699930 9. 00000000f8000000-00000000f9ffffff: RESERVED
1932 01:57:33.703383 10. 00000000fb000000-00000000fb000fff: RESERVED
1933 01:57:33.709994 11. 00000000fe000000-00000000fe00ffff: RESERVED
1934 01:57:33.712923 12. 00000000fed80000-00000000fed87fff: RESERVED
1935 01:57:33.719701 13. 00000000fed90000-00000000fed92fff: RESERVED
1936 01:57:33.723067 14. 00000000feda0000-00000000feda1fff: RESERVED
1937 01:57:33.729643 15. 00000000fedc0000-00000000feddffff: RESERVED
1938 01:57:33.732700 16. 0000000100000000-00000004803fffff: RAM
1939 01:57:33.735949 Passing 4 GPIOs to payload:
1940 01:57:33.739410 NAME | PORT | POLARITY | VALUE
1941 01:57:33.745998 lid | undefined | high | high
1942 01:57:33.752349 power | undefined | high | low
1943 01:57:33.755951 oprom | undefined | high | low
1944 01:57:33.762291 EC in RW | 0x000000e5 | high | high
1945 01:57:33.768957 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f73
1946 01:57:33.772236 coreboot table: 1576 bytes.
1947 01:57:33.775526 IMD ROOT 0. 0x76fff000 0x00001000
1948 01:57:33.779069 IMD SMALL 1. 0x76ffe000 0x00001000
1949 01:57:33.782100 FSP MEMORY 2. 0x76c4e000 0x003b0000
1950 01:57:33.785582 VPD 3. 0x76c4d000 0x00000367
1951 01:57:33.788659 RO MCACHE 4. 0x76c4c000 0x00000fdc
1952 01:57:33.792186 CONSOLE 5. 0x76c2c000 0x00020000
1953 01:57:33.798464 FMAP 6. 0x76c2b000 0x00000578
1954 01:57:33.801887 TIME STAMP 7. 0x76c2a000 0x00000910
1955 01:57:33.804947 VBOOT WORK 8. 0x76c16000 0x00014000
1956 01:57:33.808386 ROMSTG STCK 9. 0x76c15000 0x00001000
1957 01:57:33.811824 AFTER CAR 10. 0x76c0a000 0x0000b000
1958 01:57:33.815199 RAMSTAGE 11. 0x76b97000 0x00073000
1959 01:57:33.818290 REFCODE 12. 0x76b42000 0x00055000
1960 01:57:33.824617 SMM BACKUP 13. 0x76b32000 0x00010000
1961 01:57:33.828239 4f444749 14. 0x76b30000 0x00002000
1962 01:57:33.831281 EXT VBT15. 0x76b2d000 0x0000219f
1963 01:57:33.834862 COREBOOT 16. 0x76b25000 0x00008000
1964 01:57:33.837869 ACPI 17. 0x76b01000 0x00024000
1965 01:57:33.841128 ACPI GNVS 18. 0x76b00000 0x00001000
1966 01:57:33.844334 RAMOOPS 19. 0x76a00000 0x00100000
1967 01:57:33.847877 TPM2 TCGLOG20. 0x769f0000 0x00010000
1968 01:57:33.854364 SMBIOS 21. 0x769ef000 0x00000800
1969 01:57:33.854448 IMD small region:
1970 01:57:33.857724 IMD ROOT 0. 0x76ffec00 0x00000400
1971 01:57:33.860916 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1972 01:57:33.867420 POWER STATE 2. 0x76ffeb80 0x00000044
1973 01:57:33.871011 ROMSTAGE 3. 0x76ffeb60 0x00000004
1974 01:57:33.874014 MEM INFO 4. 0x76ffe980 0x000001e0
1975 01:57:33.880500 BS: BS_WRITE_TABLES run times (exec / console): 9 / 484 ms
1976 01:57:33.884177 MTRR: Physical address space:
1977 01:57:33.890574 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1978 01:57:33.897067 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1979 01:57:33.900194 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1980 01:57:33.906786 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1981 01:57:33.913663 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1982 01:57:33.920117 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1983 01:57:33.926634 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1984 01:57:33.930006 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 01:57:33.936469 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 01:57:33.939682 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 01:57:33.943165 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 01:57:33.946246 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 01:57:33.953103 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 01:57:33.956539 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 01:57:33.959588 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 01:57:33.963062 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 01:57:33.969713 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 01:57:33.972837 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 01:57:33.976425 call enable_fixed_mtrr()
1996 01:57:33.979439 CPU physical address size: 39 bits
1997 01:57:33.986110 MTRR: default type WB/UC MTRR counts: 6/7.
1998 01:57:33.989474 MTRR: WB selected as default type.
1999 01:57:33.996013 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2000 01:57:33.999199 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2001 01:57:34.005817 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2002 01:57:34.012424 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2003 01:57:34.018708 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2004 01:57:34.025299 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2005 01:57:34.032570 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 01:57:34.035765 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 01:57:34.038996 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 01:57:34.042448 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 01:57:34.049097 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 01:57:34.052019 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 01:57:34.055637 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 01:57:34.058860 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 01:57:34.065178 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 01:57:34.068631 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 01:57:34.072098 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 01:57:34.072257
2017 01:57:34.076413 MTRR check
2018 01:57:34.079679 call enable_fixed_mtrr()
2019 01:57:34.079864 Fixed MTRRs : Enabled
2020 01:57:34.082662 Variable MTRRs: Enabled
2021 01:57:34.082735
2022 01:57:34.086194 CPU physical address size: 39 bits
2023 01:57:34.089210 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 01:57:34.096082 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 01:57:34.099102 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 01:57:34.102527 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 01:57:34.105699 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 01:57:34.112134 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 01:57:34.115721 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 01:57:34.118767 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 01:57:34.122140 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 01:57:34.128689 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 01:57:34.132113 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 01:57:34.135162 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 01:57:34.142628 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 01:57:34.142706 call enable_fixed_mtrr()
2037 01:57:34.149583 MTRR: Fixed MSR 0x259 0x0000000000000000
2038 01:57:34.152663 MTRR: Fixed MSR 0x268 0x0606060606060606
2039 01:57:34.155839 MTRR: Fixed MSR 0x269 0x0606060606060606
2040 01:57:34.159127 MTRR: Fixed MSR 0x26a 0x0606060606060606
2041 01:57:34.165928 MTRR: Fixed MSR 0x26b 0x0606060606060606
2042 01:57:34.169096 MTRR: Fixed MSR 0x26c 0x0606060606060606
2043 01:57:34.172277 MTRR: Fixed MSR 0x26d 0x0606060606060606
2044 01:57:34.175711 MTRR: Fixed MSR 0x26e 0x0606060606060606
2045 01:57:34.182230 MTRR: Fixed MSR 0x26f 0x0606060606060606
2046 01:57:34.185275 CPU physical address size: 39 bits
2047 01:57:34.190350 call enable_fixed_mtrr()
2048 01:57:34.196486 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
2049 01:57:34.199958 MTRR: Fixed MSR 0x250 0x0606060606060606
2050 01:57:34.206588 MTRR: Fixed MSR 0x250 0x0606060606060606
2051 01:57:34.209681 MTRR: Fixed MSR 0x258 0x0606060606060606
2052 01:57:34.212961 MTRR: Fixed MSR 0x259 0x0000000000000000
2053 01:57:34.216489 MTRR: Fixed MSR 0x268 0x0606060606060606
2054 01:57:34.222936 MTRR: Fixed MSR 0x269 0x0606060606060606
2055 01:57:34.226293 MTRR: Fixed MSR 0x26a 0x0606060606060606
2056 01:57:34.229403 MTRR: Fixed MSR 0x26b 0x0606060606060606
2057 01:57:34.232640 MTRR: Fixed MSR 0x26c 0x0606060606060606
2058 01:57:34.239592 MTRR: Fixed MSR 0x26d 0x0606060606060606
2059 01:57:34.242571 MTRR: Fixed MSR 0x26e 0x0606060606060606
2060 01:57:34.245960 MTRR: Fixed MSR 0x26f 0x0606060606060606
2061 01:57:34.253255 MTRR: Fixed MSR 0x258 0x0606060606060606
2062 01:57:34.256491 MTRR: Fixed MSR 0x259 0x0000000000000000
2063 01:57:34.259537 MTRR: Fixed MSR 0x268 0x0606060606060606
2064 01:57:34.262925 MTRR: Fixed MSR 0x269 0x0606060606060606
2065 01:57:34.269459 MTRR: Fixed MSR 0x26a 0x0606060606060606
2066 01:57:34.272903 MTRR: Fixed MSR 0x26b 0x0606060606060606
2067 01:57:34.276055 MTRR: Fixed MSR 0x26c 0x0606060606060606
2068 01:57:34.279583 MTRR: Fixed MSR 0x26d 0x0606060606060606
2069 01:57:34.285832 MTRR: Fixed MSR 0x26e 0x0606060606060606
2070 01:57:34.289406 MTRR: Fixed MSR 0x26f 0x0606060606060606
2071 01:57:34.292655 call enable_fixed_mtrr()
2072 01:57:34.295671 call enable_fixed_mtrr()
2073 01:57:34.298822 CPU physical address size: 39 bits
2074 01:57:34.303077 Checking cr50 for pending updates
2075 01:57:34.306183 CPU physical address size: 39 bits
2076 01:57:34.313648 CPU physical address size: 39 bits
2077 01:57:34.313730 Reading cr50 TPM mode
2078 01:57:34.317544 MTRR: Fixed MSR 0x250 0x0606060606060606
2079 01:57:34.321109 MTRR: Fixed MSR 0x250 0x0606060606060606
2080 01:57:34.327643 MTRR: Fixed MSR 0x258 0x0606060606060606
2081 01:57:34.331082 MTRR: Fixed MSR 0x259 0x0000000000000000
2082 01:57:34.334074 MTRR: Fixed MSR 0x268 0x0606060606060606
2083 01:57:34.337481 MTRR: Fixed MSR 0x269 0x0606060606060606
2084 01:57:34.343963 MTRR: Fixed MSR 0x26a 0x0606060606060606
2085 01:57:34.347329 MTRR: Fixed MSR 0x26b 0x0606060606060606
2086 01:57:34.350539 MTRR: Fixed MSR 0x26c 0x0606060606060606
2087 01:57:34.353911 MTRR: Fixed MSR 0x26d 0x0606060606060606
2088 01:57:34.360587 MTRR: Fixed MSR 0x26e 0x0606060606060606
2089 01:57:34.363643 MTRR: Fixed MSR 0x26f 0x0606060606060606
2090 01:57:34.370240 MTRR: Fixed MSR 0x258 0x0606060606060606
2091 01:57:34.373420 MTRR: Fixed MSR 0x259 0x0000000000000000
2092 01:57:34.376921 MTRR: Fixed MSR 0x268 0x0606060606060606
2093 01:57:34.380144 MTRR: Fixed MSR 0x269 0x0606060606060606
2094 01:57:34.386703 MTRR: Fixed MSR 0x26a 0x0606060606060606
2095 01:57:34.390088 MTRR: Fixed MSR 0x26b 0x0606060606060606
2096 01:57:34.393108 MTRR: Fixed MSR 0x26c 0x0606060606060606
2097 01:57:34.396681 MTRR: Fixed MSR 0x26d 0x0606060606060606
2098 01:57:34.402985 MTRR: Fixed MSR 0x26e 0x0606060606060606
2099 01:57:34.406401 MTRR: Fixed MSR 0x26f 0x0606060606060606
2100 01:57:34.409437 call enable_fixed_mtrr()
2101 01:57:34.412881 call enable_fixed_mtrr()
2102 01:57:34.419481 BS: BS_PAYLOAD_LOAD entry times (exec / console): 116 / 6 ms
2103 01:57:34.422481 CPU physical address size: 39 bits
2104 01:57:34.426076 CPU physical address size: 39 bits
2105 01:57:34.435932 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2106 01:57:34.439388 Checking segment from ROM address 0xffc02b38
2107 01:57:34.445827 Checking segment from ROM address 0xffc02b54
2108 01:57:34.449304 Loading segment from ROM address 0xffc02b38
2109 01:57:34.452476 code (compression=0)
2110 01:57:34.458836 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2111 01:57:34.468926 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2112 01:57:34.469023 it's not compressed!
2113 01:57:34.610280 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2114 01:57:34.616885 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2115 01:57:34.623589 Loading segment from ROM address 0xffc02b54
2116 01:57:34.627026 Entry Point 0x30000000
2117 01:57:34.627112 Loaded segments
2118 01:57:34.633258 BS: BS_PAYLOAD_LOAD run times (exec / console): 146 / 63 ms
2119 01:57:34.678704 Finalizing chipset.
2120 01:57:34.682272 Finalizing SMM.
2121 01:57:34.682361 APMC done.
2122 01:57:34.688868 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2123 01:57:34.692057 mp_park_aps done after 0 msecs.
2124 01:57:34.695354 Jumping to boot code at 0x30000000(0x76b25000)
2125 01:57:34.705058 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2126 01:57:34.708506
2127 01:57:34.711502 Starting depthcharge on Voema...
2128 01:57:34.711852 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2129 01:57:34.711964 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2130 01:57:34.712048 Setting prompt string to ['volteer:']
2131 01:57:34.712129 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2132 01:57:34.718322 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2133 01:57:34.724822 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2134 01:57:34.731360 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2135 01:57:34.734816 Failed to find eMMC card reader
2136 01:57:34.737908 Wipe memory regions:
2137 01:57:34.741517 [0x00000000001000, 0x000000000a0000)
2138 01:57:34.744420 [0x00000000100000, 0x00000030000000)
2139 01:57:34.782415 [0x00000032662db0, 0x000000769ef000)
2140 01:57:34.833307 [0x00000100000000, 0x00000480400000)
2141 01:57:35.445942 ec_init: CrosEC protocol v3 supported (256, 256)
2142 01:57:35.877181 R8152: Initializing
2143 01:57:35.880199 Version 6 (ocp_data = 5c30)
2144 01:57:35.883473 R8152: Done initializing
2145 01:57:35.886773 Adding net device
2146 01:57:36.191336 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2147 01:57:36.191479
2148 01:57:36.194887 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2150 01:57:36.295660 volteer: tftpboot 192.168.201.1 6770206/tftp-deploy-tld1xsp3/kernel/bzImage 6770206/tftp-deploy-tld1xsp3/kernel/cmdline 6770206/tftp-deploy-tld1xsp3/ramdisk/ramdisk.cpio.gz
2151 01:57:36.295816 Setting prompt string to ['Starting kernel']
2152 01:57:36.295895 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2153 01:57:36.295970 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:43)
2154 01:57:36.300291 tftpboot 192.168.201.1 6770206/tftp-deploy-tld1xsp3/kernel/bzImoy-tld1xsp3/kernel/cmdline 6770206/tftp-deploy-tld1xsp3/ramdisk/ramdisk.cpio.gz
2155 01:57:36.300380 Waiting for link
2156 01:57:36.503072 done.
2157 01:57:36.503205 MAC: 00:24:32:30:7e:22
2158 01:57:36.506198 Sending DHCP discover... done.
2159 01:57:36.509527 Waiting for reply... done.
2160 01:57:36.512640 Sending DHCP request... done.
2161 01:57:36.516199 Waiting for reply... done.
2162 01:57:36.519365 My ip is 192.168.201.18
2163 01:57:36.522531 The DHCP server ip is 192.168.201.1
2164 01:57:36.525860 TFTP server IP predefined by user: 192.168.201.1
2165 01:57:36.532438 Bootfile predefined by user: 6770206/tftp-deploy-tld1xsp3/kernel/bzImage
2166 01:57:36.539011 Sending tftp read request... done.
2167 01:57:36.542394 Waiting for the transfer...
2168 01:57:37.066675 00000000 ################################################################
2169 01:57:37.587737 00080000 ################################################################
2170 01:57:38.113731 00100000 ################################################################
2171 01:57:38.637481 00180000 ################################################################
2172 01:57:39.161160 00200000 ################################################################
2173 01:57:39.684361 00280000 ################################################################
2174 01:57:40.206150 00300000 ################################################################
2175 01:57:40.730455 00380000 ################################################################
2176 01:57:41.250298 00400000 ################################################################
2177 01:57:41.769248 00480000 ################################################################
2178 01:57:42.293840 00500000 ################################################################
2179 01:57:42.815771 00580000 ################################################################
2180 01:57:43.342745 00600000 ################################################################
2181 01:57:43.868296 00680000 ############################################ done.
2182 01:57:43.871559 The bootfile was 7176128 bytes long.
2183 01:57:43.875369 Sending tftp read request... done.
2184 01:57:43.878125 Waiting for the transfer...
2185 01:57:44.639866 00000000 ################################################################
2186 01:57:45.340455 00080000 ################################################################
2187 01:57:46.032506 00100000 ################################################################
2188 01:57:46.655799 00180000 ################################################################
2189 01:57:47.398827 00200000 ################################################################
2190 01:57:48.111509 00280000 ################################################################
2191 01:57:48.845417 00300000 ################################################################
2192 01:57:49.605036 00380000 ################################################################
2193 01:57:50.356811 00400000 ################################################################
2194 01:57:51.090030 00480000 ################################################################
2195 01:57:51.399824 00500000 ############################## done.
2196 01:57:51.403245 Sending tftp read request... done.
2197 01:57:51.403392 Waiting for the transfer...
2198 01:57:51.406431 00000000 # done.
2199 01:57:51.416435 Command line loaded dynamically from TFTP file: 6770206/tftp-deploy-tld1xsp3/kernel/cmdline
2200 01:57:51.438972 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6770206/extract-nfsrootfs-cygg38p_,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2201 01:57:51.446268 Shutting down all USB controllers.
2202 01:57:51.446473 Removing current net device
2203 01:57:51.449181 Finalizing coreboot
2204 01:57:51.455957 Exiting depthcharge with code 4 at timestamp: 25316605
2205 01:57:51.456100
2206 01:57:51.456212 Starting kernel ...
2207 01:57:51.456317
2208 01:57:51.456417
2209 01:57:51.456784 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2210 01:57:51.456944 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2211 01:57:51.457070 Setting prompt string to ['Linux version [0-9]']
2212 01:57:51.457189 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2213 01:57:51.457314 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2215 02:02:18.457826 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2217 02:02:18.458881 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2219 02:02:18.459658 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2222 02:02:18.460994 end: 2 depthcharge-action (duration 00:05:00) [common]
2224 02:02:18.462030 Cleaning after the job
2225 02:02:18.462441 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770206/tftp-deploy-tld1xsp3/ramdisk
2226 02:02:18.464505 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770206/tftp-deploy-tld1xsp3/kernel
2227 02:02:18.466900 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770206/tftp-deploy-tld1xsp3/nfsrootfs
2228 02:02:18.535063 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770206/tftp-deploy-tld1xsp3/modules
2229 02:02:18.535359 start: 4.1 power-off (timeout 00:00:30) [common]
2230 02:02:18.535520 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=off'
2231 02:02:18.554787 >> Command sent successfully.
2232 02:02:18.556703 Returned 0 in 0 seconds
2233 02:02:18.657922 end: 4.1 power-off (duration 00:00:00) [common]
2235 02:02:18.659363 start: 4.2 read-feedback (timeout 00:10:00) [common]
2236 02:02:18.660439 Listened to connection for namespace 'common' for up to 1s
2237 02:02:19.661800 Finalising connection for namespace 'common'
2238 02:02:19.662451 Disconnecting from shell: Finalise
2239 02:02:19.763850 end: 4.2 read-feedback (duration 00:00:01) [common]
2240 02:02:19.764437 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6770206
2241 02:02:19.935202 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6770206
2242 02:02:19.935400 JobError: Your job cannot terminate cleanly.