Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 03:27:06.237122 lava-dispatcher, installed at version: 2022.04
2 03:27:06.237311 start: 0 validate
3 03:27:06.237450 Start time: 2022-07-07 03:27:06.237443+00:00 (UTC)
4 03:27:06.237584 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:27:06.237714 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220624.0%2Famd64%2Finitrd.cpio.gz exists
6 03:27:06.527468 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:27:06.528226 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.9.196-8580-gf266375ffc61%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:27:06.820278 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:27:06.821124 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220624.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 03:27:07.110657 Using caching service: 'http://localhost/cache/?uri=%s'
11 03:27:07.111410 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.9.196-8580-gf266375ffc61%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 03:27:07.411219 validate duration: 1.17
14 03:27:07.411497 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 03:27:07.411605 start: 1.1 download-retry (timeout 00:10:00) [common]
16 03:27:07.411697 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 03:27:07.411797 Not decompressing ramdisk as can be used compressed.
18 03:27:07.411879 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220624.0/amd64/initrd.cpio.gz
19 03:27:07.411944 saving as /var/lib/lava/dispatcher/tmp/6770200/tftp-deploy-sy7wv33r/ramdisk/initrd.cpio.gz
20 03:27:07.412004 total size: 5411042 (5MB)
21 03:27:07.413075 progress 0% (0MB)
22 03:27:07.414540 progress 5% (0MB)
23 03:27:07.415837 progress 10% (0MB)
24 03:27:07.417235 progress 15% (0MB)
25 03:27:07.418651 progress 20% (1MB)
26 03:27:07.419909 progress 25% (1MB)
27 03:27:07.421229 progress 30% (1MB)
28 03:27:07.422484 progress 35% (1MB)
29 03:27:07.423881 progress 40% (2MB)
30 03:27:07.425190 progress 45% (2MB)
31 03:27:07.426440 progress 50% (2MB)
32 03:27:07.427691 progress 55% (2MB)
33 03:27:07.429127 progress 60% (3MB)
34 03:27:07.430381 progress 65% (3MB)
35 03:27:07.431639 progress 70% (3MB)
36 03:27:07.432901 progress 75% (3MB)
37 03:27:07.434357 progress 80% (4MB)
38 03:27:07.435612 progress 85% (4MB)
39 03:27:07.436860 progress 90% (4MB)
40 03:27:07.438151 progress 95% (4MB)
41 03:27:07.439560 progress 100% (5MB)
42 03:27:07.439719 5MB downloaded in 0.03s (186.22MB/s)
43 03:27:07.439864 end: 1.1.1 http-download (duration 00:00:00) [common]
45 03:27:07.440103 end: 1.1 download-retry (duration 00:00:00) [common]
46 03:27:07.440190 start: 1.2 download-retry (timeout 00:10:00) [common]
47 03:27:07.440275 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 03:27:07.440375 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.9.196-8580-gf266375ffc61/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 03:27:07.440442 saving as /var/lib/lava/dispatcher/tmp/6770200/tftp-deploy-sy7wv33r/kernel/bzImage
50 03:27:07.440503 total size: 7176128 (6MB)
51 03:27:07.440563 No compression specified
52 03:27:07.441562 progress 0% (0MB)
53 03:27:07.443293 progress 5% (0MB)
54 03:27:07.445087 progress 10% (0MB)
55 03:27:07.446860 progress 15% (1MB)
56 03:27:07.448597 progress 20% (1MB)
57 03:27:07.450384 progress 25% (1MB)
58 03:27:07.452122 progress 30% (2MB)
59 03:27:07.453888 progress 35% (2MB)
60 03:27:07.455608 progress 40% (2MB)
61 03:27:07.457358 progress 45% (3MB)
62 03:27:07.459064 progress 50% (3MB)
63 03:27:07.460769 progress 55% (3MB)
64 03:27:07.462547 progress 60% (4MB)
65 03:27:07.464261 progress 65% (4MB)
66 03:27:07.466015 progress 70% (4MB)
67 03:27:07.467716 progress 75% (5MB)
68 03:27:07.469465 progress 80% (5MB)
69 03:27:07.471165 progress 85% (5MB)
70 03:27:07.472867 progress 90% (6MB)
71 03:27:07.474605 progress 95% (6MB)
72 03:27:07.476174 progress 100% (6MB)
73 03:27:07.476445 6MB downloaded in 0.04s (190.44MB/s)
74 03:27:07.476589 end: 1.2.1 http-download (duration 00:00:00) [common]
76 03:27:07.476830 end: 1.2 download-retry (duration 00:00:00) [common]
77 03:27:07.476920 start: 1.3 download-retry (timeout 00:10:00) [common]
78 03:27:07.477012 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 03:27:07.477116 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220624.0/amd64/full.rootfs.tar.xz
80 03:27:07.477183 saving as /var/lib/lava/dispatcher/tmp/6770200/tftp-deploy-sy7wv33r/nfsrootfs/full.rootfs.tar
81 03:27:07.477245 total size: 207053672 (197MB)
82 03:27:07.477306 Using unxz to decompress xz
83 03:27:07.480545 progress 0% (0MB)
84 03:27:08.033077 progress 5% (9MB)
85 03:27:08.565648 progress 10% (19MB)
86 03:27:09.159457 progress 15% (29MB)
87 03:27:09.530019 progress 20% (39MB)
88 03:27:09.887083 progress 25% (49MB)
89 03:27:10.477537 progress 30% (59MB)
90 03:27:11.035080 progress 35% (69MB)
91 03:27:11.655475 progress 40% (79MB)
92 03:27:12.239569 progress 45% (88MB)
93 03:27:12.836345 progress 50% (98MB)
94 03:27:13.458923 progress 55% (108MB)
95 03:27:14.145729 progress 60% (118MB)
96 03:27:14.287331 progress 65% (128MB)
97 03:27:14.435909 progress 70% (138MB)
98 03:27:14.532428 progress 75% (148MB)
99 03:27:14.605272 progress 80% (158MB)
100 03:27:14.675716 progress 85% (167MB)
101 03:27:14.777917 progress 90% (177MB)
102 03:27:15.044950 progress 95% (187MB)
103 03:27:15.632594 progress 100% (197MB)
104 03:27:15.638795 197MB downloaded in 8.16s (24.19MB/s)
105 03:27:15.639059 end: 1.3.1 http-download (duration 00:00:08) [common]
107 03:27:15.639327 end: 1.3 download-retry (duration 00:00:08) [common]
108 03:27:15.639426 start: 1.4 download-retry (timeout 00:09:52) [common]
109 03:27:15.639519 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 03:27:15.639636 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.9.196-8580-gf266375ffc61/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 03:27:15.639711 saving as /var/lib/lava/dispatcher/tmp/6770200/tftp-deploy-sy7wv33r/modules/modules.tar
112 03:27:15.639774 total size: 54512 (0MB)
113 03:27:15.639838 Using unxz to decompress xz
114 03:27:15.643089 progress 60% (0MB)
115 03:27:15.643458 progress 100% (0MB)
116 03:27:15.646936 0MB downloaded in 0.01s (7.26MB/s)
117 03:27:15.647159 end: 1.4.1 http-download (duration 00:00:00) [common]
119 03:27:15.647421 end: 1.4 download-retry (duration 00:00:00) [common]
120 03:27:15.647517 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 03:27:15.647617 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 03:27:17.667348 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6770200/extract-nfsrootfs-ayzhyno9
123 03:27:17.667563 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 03:27:17.667670 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 03:27:17.667805 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9
126 03:27:17.667905 makedir: /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin
127 03:27:17.667989 makedir: /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/tests
128 03:27:17.668071 makedir: /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/results
129 03:27:17.668168 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-add-keys
130 03:27:17.668297 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-add-sources
131 03:27:17.668414 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-background-process-start
132 03:27:17.668527 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-background-process-stop
133 03:27:17.668637 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-common-functions
134 03:27:17.668748 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-echo-ipv4
135 03:27:17.668858 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-install-packages
136 03:27:17.668975 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-installed-packages
137 03:27:17.669127 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-os-build
138 03:27:17.669236 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-probe-channel
139 03:27:17.669344 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-probe-ip
140 03:27:17.669452 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-target-ip
141 03:27:17.669559 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-target-mac
142 03:27:17.669667 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-target-storage
143 03:27:17.669777 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-test-case
144 03:27:17.669888 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-test-event
145 03:27:17.669995 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-test-feedback
146 03:27:17.670102 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-test-raise
147 03:27:17.670210 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-test-reference
148 03:27:17.670316 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-test-runner
149 03:27:17.670426 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-test-set
150 03:27:17.670532 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-test-shell
151 03:27:17.670641 Updating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-add-keys (debian)
152 03:27:17.670755 Updating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-add-sources (debian)
153 03:27:17.670867 Updating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-install-packages (debian)
154 03:27:17.670977 Updating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-installed-packages (debian)
155 03:27:17.671087 Updating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/bin/lava-os-build (debian)
156 03:27:17.671182 Creating /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/environment
157 03:27:17.671267 LAVA metadata
158 03:27:17.671333 - LAVA_JOB_ID=6770200
159 03:27:17.671396 - LAVA_DISPATCHER_IP=192.168.201.1
160 03:27:17.671492 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
161 03:27:17.671557 skipped lava-vland-overlay
162 03:27:17.671632 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
163 03:27:17.671713 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
164 03:27:17.671775 skipped lava-multinode-overlay
165 03:27:17.671848 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
166 03:27:17.671927 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
167 03:27:17.671998 Loading test definitions
168 03:27:17.672086 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
169 03:27:17.672159 Using /lava-6770200 at stage 0
170 03:27:17.672388 uuid=6770200_1.5.2.3.1 testdef=None
171 03:27:17.672477 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
172 03:27:17.672563 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
173 03:27:17.673020 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
175 03:27:17.673249 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
176 03:27:17.673727 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
178 03:27:17.673969 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
179 03:27:17.674420 runner path: /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/0/tests/0_timesync-off test_uuid 6770200_1.5.2.3.1
180 03:27:17.674565 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
182 03:27:17.674796 start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
183 03:27:17.674871 Using /lava-6770200 at stage 0
184 03:27:17.674966 Fetching tests from https://github.com/kernelci/test-definitions.git
185 03:27:17.675046 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/0/tests/1_kselftest-filesystems'
186 03:27:26.024213 Running '/usr/bin/git checkout kernelci.org
187 03:27:26.067197 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
188 03:27:26.067863 uuid=6770200_1.5.2.3.5 testdef=None
189 03:27:26.068025 end: 1.5.2.3.5 git-repo-action (duration 00:00:08) [common]
191 03:27:26.068280 start: 1.5.2.3.6 test-overlay (timeout 00:09:41) [common]
192 03:27:26.068961 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
194 03:27:26.069239 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:41) [common]
195 03:27:26.070128 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
197 03:27:26.070379 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:41) [common]
198 03:27:26.071313 runner path: /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/0/tests/1_kselftest-filesystems test_uuid 6770200_1.5.2.3.5
199 03:27:26.071409 BOARD='asus-C436FA-Flip-hatch'
200 03:27:26.071478 BRANCH='cip-gitlab'
201 03:27:26.071542 SKIPFILE='skipfile-lkft.yaml'
202 03:27:26.071605 TESTPROG_URL='None'
203 03:27:26.071666 TST_CASENAME=''
204 03:27:26.071725 TST_CMDFILES='filesystems'
205 03:27:26.071858 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 03:27:26.072089 Creating lava-test-runner.conf files
208 03:27:26.072164 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6770200/lava-overlay-b9dtlr_9/lava-6770200/0 for stage 0
209 03:27:26.072254 - 0_timesync-off
210 03:27:26.072324 - 1_kselftest-filesystems
211 03:27:26.072418 end: 1.5.2.3 test-definition (duration 00:00:08) [common]
212 03:27:26.072507 start: 1.5.2.4 compress-overlay (timeout 00:09:41) [common]
213 03:27:33.359404 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
214 03:27:33.359578 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
215 03:27:33.359679 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 03:27:33.359788 end: 1.5.2 lava-overlay (duration 00:00:16) [common]
217 03:27:33.359883 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
218 03:27:33.463071 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 03:27:33.463437 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
220 03:27:33.463553 extracting modules file /var/lib/lava/dispatcher/tmp/6770200/tftp-deploy-sy7wv33r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6770200/extract-nfsrootfs-ayzhyno9
221 03:27:33.467623 extracting modules file /var/lib/lava/dispatcher/tmp/6770200/tftp-deploy-sy7wv33r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6770200/extract-overlay-ramdisk-0jov1y88/ramdisk
222 03:27:33.471403 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 03:27:33.471519 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
224 03:27:33.471610 [common] Applying overlay to NFS
225 03:27:33.471687 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6770200/compress-overlay-mea50g53/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6770200/extract-nfsrootfs-ayzhyno9
226 03:27:33.914915 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 03:27:33.915091 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
228 03:27:33.915189 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 03:27:33.915283 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
230 03:27:33.915368 Building ramdisk /var/lib/lava/dispatcher/tmp/6770200/extract-overlay-ramdisk-0jov1y88/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6770200/extract-overlay-ramdisk-0jov1y88/ramdisk
231 03:27:33.949265 >> 24458 blocks
232 03:27:34.420045 rename /var/lib/lava/dispatcher/tmp/6770200/extract-overlay-ramdisk-0jov1y88/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6770200/tftp-deploy-sy7wv33r/ramdisk/ramdisk.cpio.gz
233 03:27:34.420466 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 03:27:34.420588 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
235 03:27:34.420692 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
236 03:27:34.420787 No mkimage arch provided, not using FIT.
237 03:27:34.420879 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 03:27:34.421023 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 03:27:34.421128 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
240 03:27:34.421223 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
241 03:27:34.421300 No LXC device requested
242 03:27:34.421384 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 03:27:34.421477 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
244 03:27:34.421559 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 03:27:34.421632 Checking files for TFTP limit of 4294967296 bytes.
246 03:27:34.422013 end: 1 tftp-deploy (duration 00:00:27) [common]
247 03:27:34.422118 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 03:27:34.422211 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 03:27:34.422340 substitutions:
250 03:27:34.422412 - {DTB}: None
251 03:27:34.422476 - {INITRD}: 6770200/tftp-deploy-sy7wv33r/ramdisk/ramdisk.cpio.gz
252 03:27:34.422538 - {KERNEL}: 6770200/tftp-deploy-sy7wv33r/kernel/bzImage
253 03:27:34.422599 - {LAVA_MAC}: None
254 03:27:34.422657 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6770200/extract-nfsrootfs-ayzhyno9
255 03:27:34.422716 - {NFS_SERVER_IP}: 192.168.201.1
256 03:27:34.422773 - {PRESEED_CONFIG}: None
257 03:27:34.422832 - {PRESEED_LOCAL}: None
258 03:27:34.422888 - {RAMDISK}: 6770200/tftp-deploy-sy7wv33r/ramdisk/ramdisk.cpio.gz
259 03:27:34.422944 - {ROOT_PART}: None
260 03:27:34.423009 - {ROOT}: None
261 03:27:34.423067 - {SERVER_IP}: 192.168.201.1
262 03:27:34.423123 - {TEE}: None
263 03:27:34.423179 Parsed boot commands:
264 03:27:34.423234 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 03:27:34.423388 Parsed boot commands: tftpboot 192.168.201.1 6770200/tftp-deploy-sy7wv33r/kernel/bzImage 6770200/tftp-deploy-sy7wv33r/kernel/cmdline 6770200/tftp-deploy-sy7wv33r/ramdisk/ramdisk.cpio.gz
266 03:27:34.423482 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 03:27:34.423572 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 03:27:34.423668 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 03:27:34.423759 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 03:27:34.423831 Not connected, no need to disconnect.
271 03:27:34.423908 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 03:27:34.423991 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 03:27:34.424061 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
274 03:27:34.426873 Setting prompt string to ['lava-test: # ']
275 03:27:34.427171 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 03:27:34.427278 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 03:27:34.427376 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 03:27:34.427470 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 03:27:34.427653 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
280 03:27:34.446710 >> Command sent successfully.
281 03:27:34.448591 Returned 0 in 0 seconds
282 03:27:34.549082 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
284 03:27:34.549405 end: 2.2.2 reset-device (duration 00:00:00) [common]
285 03:27:34.549506 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
286 03:27:34.549595 Setting prompt string to 'Starting depthcharge on Helios...'
287 03:27:34.549664 Changing prompt to 'Starting depthcharge on Helios...'
288 03:27:34.549733 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
289 03:27:34.550003 [Enter `^Ec?' for help]
290 03:27:41.133427
291 03:27:41.133586
292 03:27:41.142958 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
293 03:27:41.146275 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
294 03:27:41.152951 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
295 03:27:41.156320 CPU: AES supported, TXT NOT supported, VT supported
296 03:27:41.163123 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
297 03:27:41.166714 PCH: device id 0284 (rev 00) is Cometlake-U Premium
298 03:27:41.172835 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
299 03:27:41.176553 VBOOT: Loading verstage.
300 03:27:41.179747 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
301 03:27:41.186019 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
302 03:27:41.193116 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 03:27:41.193205 CBFS @ c08000 size 3f8000
304 03:27:41.199555 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
305 03:27:41.203068 CBFS: Locating 'fallback/verstage'
306 03:27:41.206295 CBFS: Found @ offset 10fb80 size 1072c
307 03:27:41.210151
308 03:27:41.210235
309 03:27:41.219900 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
310 03:27:41.234523 Probing TPM: . done!
311 03:27:41.237818 TPM ready after 0 ms
312 03:27:41.241300 Connected to device vid:did:rid of 1ae0:0028:00
313 03:27:41.251603 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
314 03:27:41.254969 Initialized TPM device CR50 revision 0
315 03:27:41.290120 tlcl_send_startup: Startup return code is 0
316 03:27:41.290224 TPM: setup succeeded
317 03:27:41.303390 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
318 03:27:41.306706 Chrome EC: UHEPI supported
319 03:27:41.310404 Phase 1
320 03:27:41.313344 FMAP: area GBB found @ c05000 (12288 bytes)
321 03:27:41.320022 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
322 03:27:41.323843 Phase 2
323 03:27:41.323928 Phase 3
324 03:27:41.326471 FMAP: area GBB found @ c05000 (12288 bytes)
325 03:27:41.332950 VB2:vb2_report_dev_firmware() This is developer signed firmware
326 03:27:41.339594 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
327 03:27:41.343387 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
328 03:27:41.349906 VB2:vb2_verify_keyblock() Checking keyblock signature...
329 03:27:41.365439 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
330 03:27:41.368942 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
331 03:27:41.375608 VB2:vb2_verify_fw_preamble() Verifying preamble.
332 03:27:41.379786 Phase 4
333 03:27:41.383068 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
334 03:27:41.390132 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
335 03:27:41.569489 VB2:vb2_rsa_verify_digest() Digest check failed!
336 03:27:41.575925 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
337 03:27:41.576023 Saving nvdata
338 03:27:41.579003 Reboot requested (10020007)
339 03:27:41.582399 board_reset() called!
340 03:27:41.582484 full_reset() called!
341 03:27:46.100928
342 03:27:46.101103
343 03:27:46.110145 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
344 03:27:46.113826 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
345 03:27:46.120140 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
346 03:27:46.123600 CPU: AES supported, TXT NOT supported, VT supported
347 03:27:46.130215 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
348 03:27:46.134020 PCH: device id 0284 (rev 00) is Cometlake-U Premium
349 03:27:46.140276 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
350 03:27:46.144289 VBOOT: Loading verstage.
351 03:27:46.146808 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
352 03:27:46.153404 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
353 03:27:46.160037 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
354 03:27:46.160129 CBFS @ c08000 size 3f8000
355 03:27:46.166625 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
356 03:27:46.170254 CBFS: Locating 'fallback/verstage'
357 03:27:46.173229 CBFS: Found @ offset 10fb80 size 1072c
358 03:27:46.177841
359 03:27:46.177943
360 03:27:46.187944 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
361 03:27:46.201922 Probing TPM: . done!
362 03:27:46.205137 TPM ready after 0 ms
363 03:27:46.208520 Connected to device vid:did:rid of 1ae0:0028:00
364 03:27:46.218501 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
365 03:27:46.222077 Initialized TPM device CR50 revision 0
366 03:27:46.257397 tlcl_send_startup: Startup return code is 0
367 03:27:46.257533 TPM: setup succeeded
368 03:27:46.269902 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
369 03:27:46.273665 Chrome EC: UHEPI supported
370 03:27:46.277417 Phase 1
371 03:27:46.280426 FMAP: area GBB found @ c05000 (12288 bytes)
372 03:27:46.287386 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
373 03:27:46.293927 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
374 03:27:46.297744 Recovery requested (1009000e)
375 03:27:46.302871 Saving nvdata
376 03:27:46.309104 tlcl_extend: response is 0
377 03:27:46.317545 tlcl_extend: response is 0
378 03:27:46.324603 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 03:27:46.327829 CBFS @ c08000 size 3f8000
380 03:27:46.334312 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 03:27:46.337897 CBFS: Locating 'fallback/romstage'
382 03:27:46.341410 CBFS: Found @ offset 80 size 145fc
383 03:27:46.344749 Accumulated console time in verstage 99 ms
384 03:27:46.344837
385 03:27:46.344905
386 03:27:46.358327 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
387 03:27:46.364360 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
388 03:27:46.367510 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
389 03:27:46.370915 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
390 03:27:46.377649 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
391 03:27:46.381211 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
392 03:27:46.384230 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
393 03:27:46.387646 TCO_STS: 0000 0000
394 03:27:46.391420 GEN_PMCON: e0015238 00000200
395 03:27:46.393965 GBLRST_CAUSE: 00000000 00000000
396 03:27:46.394050 prev_sleep_state 5
397 03:27:46.397929 Boot Count incremented to 31581
398 03:27:46.404536 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 03:27:46.408408 CBFS @ c08000 size 3f8000
400 03:27:46.414327 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 03:27:46.414414 CBFS: Locating 'fspm.bin'
402 03:27:46.421149 CBFS: Found @ offset 5ffc0 size 71000
403 03:27:46.424227 Chrome EC: UHEPI supported
404 03:27:46.430763 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
405 03:27:46.434386 Probing TPM: done!
406 03:27:46.440863 Connected to device vid:did:rid of 1ae0:0028:00
407 03:27:46.451130 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
408 03:27:46.457052 Initialized TPM device CR50 revision 0
409 03:27:46.466112 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
410 03:27:46.472911 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
411 03:27:46.476189 MRC cache found, size 1948
412 03:27:46.479529 bootmode is set to: 2
413 03:27:46.482635 PRMRR disabled by config.
414 03:27:46.485648 SPD INDEX = 1
415 03:27:46.488951 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
416 03:27:46.492266 CBFS @ c08000 size 3f8000
417 03:27:46.499705 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
418 03:27:46.499792 CBFS: Locating 'spd.bin'
419 03:27:46.502552 CBFS: Found @ offset 5fb80 size 400
420 03:27:46.506023 SPD: module type is LPDDR3
421 03:27:46.510026 SPD: module part is
422 03:27:46.515962 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
423 03:27:46.519042 SPD: device width 4 bits, bus width 8 bits
424 03:27:46.522630 SPD: module size is 4096 MB (per channel)
425 03:27:46.525295 memory slot: 0 configuration done.
426 03:27:46.528905 memory slot: 2 configuration done.
427 03:27:46.580848 CBMEM:
428 03:27:46.584082 IMD: root @ 99fff000 254 entries.
429 03:27:46.587219 IMD: root @ 99ffec00 62 entries.
430 03:27:46.590568 External stage cache:
431 03:27:46.593775 IMD: root @ 9abff000 254 entries.
432 03:27:46.597364 IMD: root @ 9abfec00 62 entries.
433 03:27:46.600574 Chrome EC: clear events_b mask to 0x0000000020004000
434 03:27:46.616891 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
435 03:27:46.630179 tlcl_write: response is 0
436 03:27:46.638908 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
437 03:27:46.645623 MRC: TPM MRC hash updated successfully.
438 03:27:46.645714 2 DIMMs found
439 03:27:46.648938 SMM Memory Map
440 03:27:46.652362 SMRAM : 0x9a000000 0x1000000
441 03:27:46.655778 Subregion 0: 0x9a000000 0xa00000
442 03:27:46.659133 Subregion 1: 0x9aa00000 0x200000
443 03:27:46.661976 Subregion 2: 0x9ac00000 0x400000
444 03:27:46.665625 top_of_ram = 0x9a000000
445 03:27:46.669386 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
446 03:27:46.675174 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
447 03:27:46.678804 MTRR Range: Start=ff000000 End=0 (Size 1000000)
448 03:27:46.685220 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
449 03:27:46.688545 CBFS @ c08000 size 3f8000
450 03:27:46.691906 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
451 03:27:46.695174 CBFS: Locating 'fallback/postcar'
452 03:27:46.701500 CBFS: Found @ offset 107000 size 4b44
453 03:27:46.708771 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
454 03:27:46.718049 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
455 03:27:46.721282 Processing 180 relocs. Offset value of 0x97c0c000
456 03:27:46.729866 Accumulated console time in romstage 286 ms
457 03:27:46.729957
458 03:27:46.730028
459 03:27:46.739612 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
460 03:27:46.746315 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
461 03:27:46.749585 CBFS @ c08000 size 3f8000
462 03:27:46.752854 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
463 03:27:46.759483 CBFS: Locating 'fallback/ramstage'
464 03:27:46.763651 CBFS: Found @ offset 43380 size 1b9e8
465 03:27:46.769481 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
466 03:27:46.801264 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
467 03:27:46.804837 Processing 3976 relocs. Offset value of 0x98db0000
468 03:27:46.811647 Accumulated console time in postcar 52 ms
469 03:27:46.811743
470 03:27:46.811831
471 03:27:46.821675 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
472 03:27:46.827912 FMAP: area RO_VPD found @ c00000 (16384 bytes)
473 03:27:46.831401 WARNING: RO_VPD is uninitialized or empty.
474 03:27:46.834612 FMAP: area RW_VPD found @ af8000 (8192 bytes)
475 03:27:46.841253 WARNING: RW_VPD is uninitialized or empty.
476 03:27:46.841359 Normal boot.
477 03:27:46.848589 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
478 03:27:46.851162 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 03:27:46.854545 CBFS @ c08000 size 3f8000
480 03:27:46.861279 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 03:27:46.864914 CBFS: Locating 'cpu_microcode_blob.bin'
482 03:27:46.868463 CBFS: Found @ offset 14700 size 2ec00
483 03:27:46.871008 microcode: sig=0x806ec pf=0x4 revision=0xc9
484 03:27:46.874548 Skip microcode update
485 03:27:46.877871 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 03:27:46.880910 CBFS @ c08000 size 3f8000
487 03:27:46.887821 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 03:27:46.891056 CBFS: Locating 'fsps.bin'
489 03:27:46.894450 CBFS: Found @ offset d1fc0 size 35000
490 03:27:46.919785 Detected 4 core, 8 thread CPU.
491 03:27:46.922805 Setting up SMI for CPU
492 03:27:46.925989 IED base = 0x9ac00000
493 03:27:46.926070 IED size = 0x00400000
494 03:27:46.930256 Will perform SMM setup.
495 03:27:46.936192 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
496 03:27:46.942468 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
497 03:27:46.948763 Processing 16 relocs. Offset value of 0x00030000
498 03:27:46.948852 Attempting to start 7 APs
499 03:27:46.955251 Waiting for 10ms after sending INIT.
500 03:27:46.968886 Waiting for 1st SIPI to complete...done.
501 03:27:46.969011 AP: slot 3 apic_id 1.
502 03:27:46.975733 Waiting for 2nd SIPI to complete...done.
503 03:27:46.975823 AP: slot 7 apic_id 6.
504 03:27:46.979255 AP: slot 6 apic_id 7.
505 03:27:46.982371 AP: slot 1 apic_id 2.
506 03:27:46.982458 AP: slot 2 apic_id 3.
507 03:27:46.985595 AP: slot 5 apic_id 5.
508 03:27:46.988838 AP: slot 4 apic_id 4.
509 03:27:46.996053 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
510 03:27:47.002913 Processing 13 relocs. Offset value of 0x00038000
511 03:27:47.006157 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
512 03:27:47.012250 Installing SMM handler to 0x9a000000
513 03:27:47.019286 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
514 03:27:47.025690 Processing 658 relocs. Offset value of 0x9a010000
515 03:27:47.032051 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
516 03:27:47.035271 Processing 13 relocs. Offset value of 0x9a008000
517 03:27:47.042319 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
518 03:27:47.048717 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
519 03:27:47.055575 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
520 03:27:47.058693 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
521 03:27:47.065508 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
522 03:27:47.071858 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
523 03:27:47.078421 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
524 03:27:47.081674 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
525 03:27:47.085794 Clearing SMI status registers
526 03:27:47.089232 SMI_STS: PM1
527 03:27:47.089318 PM1_STS: PWRBTN
528 03:27:47.092378 TCO_STS: SECOND_TO
529 03:27:47.095625 New SMBASE 0x9a000000
530 03:27:47.098829 In relocation handler: CPU 0
531 03:27:47.102191 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
532 03:27:47.105388 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 03:27:47.108777 Relocation complete.
534 03:27:47.111852 New SMBASE 0x99fff400
535 03:27:47.111938 In relocation handler: CPU 3
536 03:27:47.118898 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
537 03:27:47.122151 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 03:27:47.125794 Relocation complete.
539 03:27:47.129124 New SMBASE 0x99fffc00
540 03:27:47.129210 In relocation handler: CPU 1
541 03:27:47.135980 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
542 03:27:47.139125 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 03:27:47.142221 Relocation complete.
544 03:27:47.142306 New SMBASE 0x99fff800
545 03:27:47.145138 In relocation handler: CPU 2
546 03:27:47.151972 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
547 03:27:47.155792 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 03:27:47.158798 Relocation complete.
549 03:27:47.158882 New SMBASE 0x99ffe800
550 03:27:47.162489 In relocation handler: CPU 6
551 03:27:47.165442 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
552 03:27:47.172759 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 03:27:47.174995 Relocation complete.
554 03:27:47.175073 New SMBASE 0x99ffe400
555 03:27:47.178972 In relocation handler: CPU 7
556 03:27:47.182059 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
557 03:27:47.188310 Writing SMRR. base = 0x9a000006, mask=0xff000800
558 03:27:47.191658 Relocation complete.
559 03:27:47.191748 New SMBASE 0x99fff000
560 03:27:47.195035 In relocation handler: CPU 4
561 03:27:47.198463 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
562 03:27:47.204911 Writing SMRR. base = 0x9a000006, mask=0xff000800
563 03:27:47.205035 Relocation complete.
564 03:27:47.208753 New SMBASE 0x99ffec00
565 03:27:47.212230 In relocation handler: CPU 5
566 03:27:47.215298 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
567 03:27:47.221637 Writing SMRR. base = 0x9a000006, mask=0xff000800
568 03:27:47.221722 Relocation complete.
569 03:27:47.225453 Initializing CPU #0
570 03:27:47.228080 CPU: vendor Intel device 806ec
571 03:27:47.232073 CPU: family 06, model 8e, stepping 0c
572 03:27:47.234777 Clearing out pending MCEs
573 03:27:47.238304 Setting up local APIC...
574 03:27:47.238390 apic_id: 0x00 done.
575 03:27:47.241876 Turbo is available but hidden
576 03:27:47.245367 Turbo is available and visible
577 03:27:47.248112 VMX status: enabled
578 03:27:47.251708 IA32_FEATURE_CONTROL status: locked
579 03:27:47.254874 Skip microcode update
580 03:27:47.254992 CPU #0 initialized
581 03:27:47.258305 Initializing CPU #3
582 03:27:47.258404 Initializing CPU #6
583 03:27:47.261599 Initializing CPU #7
584 03:27:47.265324 CPU: vendor Intel device 806ec
585 03:27:47.268752 CPU: family 06, model 8e, stepping 0c
586 03:27:47.271354 CPU: vendor Intel device 806ec
587 03:27:47.274910 CPU: family 06, model 8e, stepping 0c
588 03:27:47.278539 Clearing out pending MCEs
589 03:27:47.281530 Clearing out pending MCEs
590 03:27:47.284745 Setting up local APIC...
591 03:27:47.288171 CPU: vendor Intel device 806ec
592 03:27:47.291106 CPU: family 06, model 8e, stepping 0c
593 03:27:47.294967 Clearing out pending MCEs
594 03:27:47.295114 Initializing CPU #4
595 03:27:47.298214 Initializing CPU #5
596 03:27:47.301200 CPU: vendor Intel device 806ec
597 03:27:47.304553 CPU: family 06, model 8e, stepping 0c
598 03:27:47.307941 CPU: vendor Intel device 806ec
599 03:27:47.311316 CPU: family 06, model 8e, stepping 0c
600 03:27:47.314505 Clearing out pending MCEs
601 03:27:47.318126 Clearing out pending MCEs
602 03:27:47.318217 Setting up local APIC...
603 03:27:47.320925 Initializing CPU #1
604 03:27:47.324240 Initializing CPU #2
605 03:27:47.324342 CPU: vendor Intel device 806ec
606 03:27:47.331536 CPU: family 06, model 8e, stepping 0c
607 03:27:47.334566 CPU: vendor Intel device 806ec
608 03:27:47.337618 CPU: family 06, model 8e, stepping 0c
609 03:27:47.337705 Clearing out pending MCEs
610 03:27:47.341101 Clearing out pending MCEs
611 03:27:47.344162 Setting up local APIC...
612 03:27:47.347741 Setting up local APIC...
613 03:27:47.347827 apic_id: 0x04 done.
614 03:27:47.350934 Setting up local APIC...
615 03:27:47.354807 Setting up local APIC...
616 03:27:47.357587 apic_id: 0x05 done.
617 03:27:47.357672 VMX status: enabled
618 03:27:47.360910 VMX status: enabled
619 03:27:47.364099 apic_id: 0x02 done.
620 03:27:47.364184 apic_id: 0x03 done.
621 03:27:47.367335 VMX status: enabled
622 03:27:47.367419 VMX status: enabled
623 03:27:47.371088 IA32_FEATURE_CONTROL status: locked
624 03:27:47.377526 IA32_FEATURE_CONTROL status: locked
625 03:27:47.377633 Skip microcode update
626 03:27:47.381159 Skip microcode update
627 03:27:47.383991 CPU #1 initialized
628 03:27:47.384076 CPU #2 initialized
629 03:27:47.387200 Setting up local APIC...
630 03:27:47.390758 IA32_FEATURE_CONTROL status: locked
631 03:27:47.394421 IA32_FEATURE_CONTROL status: locked
632 03:27:47.397261 Skip microcode update
633 03:27:47.397363 Skip microcode update
634 03:27:47.400629 CPU #5 initialized
635 03:27:47.404112 CPU #4 initialized
636 03:27:47.404194 apic_id: 0x07 done.
637 03:27:47.406992 apic_id: 0x06 done.
638 03:27:47.407100 VMX status: enabled
639 03:27:47.410544 VMX status: enabled
640 03:27:47.414249 IA32_FEATURE_CONTROL status: locked
641 03:27:47.417181 IA32_FEATURE_CONTROL status: locked
642 03:27:47.420157 Skip microcode update
643 03:27:47.423816 Skip microcode update
644 03:27:47.423951 CPU #6 initialized
645 03:27:47.427342 CPU #7 initialized
646 03:27:47.427428 apic_id: 0x01 done.
647 03:27:47.430373 VMX status: enabled
648 03:27:47.434277 IA32_FEATURE_CONTROL status: locked
649 03:27:47.437426 Skip microcode update
650 03:27:47.437515 CPU #3 initialized
651 03:27:47.444096 bsp_do_flight_plan done after 466 msecs.
652 03:27:47.447657 CPU: frequency set to 4200 MHz
653 03:27:47.447758 Enabling SMIs.
654 03:27:47.450342 Locking SMM.
655 03:27:47.463470 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
656 03:27:47.466804 CBFS @ c08000 size 3f8000
657 03:27:47.473801 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
658 03:27:47.473897 CBFS: Locating 'vbt.bin'
659 03:27:47.477043 CBFS: Found @ offset 5f5c0 size 499
660 03:27:47.483769 Found a VBT of 4608 bytes after decompression
661 03:27:47.667925 Display FSP Version Info HOB
662 03:27:47.671003 Reference Code - CPU = 9.0.1e.30
663 03:27:47.674408 uCode Version = 0.0.0.ca
664 03:27:47.678071 TXT ACM version = ff.ff.ff.ffff
665 03:27:47.681656 Display FSP Version Info HOB
666 03:27:47.684355 Reference Code - ME = 9.0.1e.30
667 03:27:47.687562 MEBx version = 0.0.0.0
668 03:27:47.691064 ME Firmware Version = Consumer SKU
669 03:27:47.694230 Display FSP Version Info HOB
670 03:27:47.697437 Reference Code - CML PCH = 9.0.1e.30
671 03:27:47.700820 PCH-CRID Status = Disabled
672 03:27:47.704343 PCH-CRID Original Value = ff.ff.ff.ffff
673 03:27:47.707565 PCH-CRID New Value = ff.ff.ff.ffff
674 03:27:47.711119 OPROM - RST - RAID = ff.ff.ff.ffff
675 03:27:47.714815 ChipsetInit Base Version = ff.ff.ff.ffff
676 03:27:47.717891 ChipsetInit Oem Version = ff.ff.ff.ffff
677 03:27:47.720997 Display FSP Version Info HOB
678 03:27:47.727308 Reference Code - SA - System Agent = 9.0.1e.30
679 03:27:47.730702 Reference Code - MRC = 0.7.1.6c
680 03:27:47.730798 SA - PCIe Version = 9.0.1e.30
681 03:27:47.734570 SA-CRID Status = Disabled
682 03:27:47.737342 SA-CRID Original Value = 0.0.0.c
683 03:27:47.741049 SA-CRID New Value = 0.0.0.c
684 03:27:47.744129 OPROM - VBIOS = ff.ff.ff.ffff
685 03:27:47.747608 RTC Init
686 03:27:47.750812 Set power on after power failure.
687 03:27:47.750943 Disabling Deep S3
688 03:27:47.753988 Disabling Deep S3
689 03:27:47.754109 Disabling Deep S4
690 03:27:47.756890 Disabling Deep S4
691 03:27:47.760796 Disabling Deep S5
692 03:27:47.760893 Disabling Deep S5
693 03:27:47.767149 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
694 03:27:47.767264 Enumerating buses...
695 03:27:47.773756 Show all devs... Before device enumeration.
696 03:27:47.777196 Root Device: enabled 1
697 03:27:47.777303 CPU_CLUSTER: 0: enabled 1
698 03:27:47.780202 DOMAIN: 0000: enabled 1
699 03:27:47.783659 APIC: 00: enabled 1
700 03:27:47.783763 PCI: 00:00.0: enabled 1
701 03:27:47.787355 PCI: 00:02.0: enabled 1
702 03:27:47.790162 PCI: 00:04.0: enabled 0
703 03:27:47.793464 PCI: 00:05.0: enabled 0
704 03:27:47.793588 PCI: 00:12.0: enabled 1
705 03:27:47.796918 PCI: 00:12.5: enabled 0
706 03:27:47.800354 PCI: 00:12.6: enabled 0
707 03:27:47.803883 PCI: 00:14.0: enabled 1
708 03:27:47.803980 PCI: 00:14.1: enabled 0
709 03:27:47.807248 PCI: 00:14.3: enabled 1
710 03:27:47.810232 PCI: 00:14.5: enabled 0
711 03:27:47.810327 PCI: 00:15.0: enabled 1
712 03:27:47.813396 PCI: 00:15.1: enabled 1
713 03:27:47.816899 PCI: 00:15.2: enabled 0
714 03:27:47.820286 PCI: 00:15.3: enabled 0
715 03:27:47.820377 PCI: 00:16.0: enabled 1
716 03:27:47.823558 PCI: 00:16.1: enabled 0
717 03:27:47.826864 PCI: 00:16.2: enabled 0
718 03:27:47.830238 PCI: 00:16.3: enabled 0
719 03:27:47.830330 PCI: 00:16.4: enabled 0
720 03:27:47.833646 PCI: 00:16.5: enabled 0
721 03:27:47.836466 PCI: 00:17.0: enabled 1
722 03:27:47.840386 PCI: 00:19.0: enabled 1
723 03:27:47.840477 PCI: 00:19.1: enabled 0
724 03:27:47.843214 PCI: 00:19.2: enabled 0
725 03:27:47.846448 PCI: 00:1a.0: enabled 0
726 03:27:47.846543 PCI: 00:1c.0: enabled 0
727 03:27:47.849830 PCI: 00:1c.1: enabled 0
728 03:27:47.853603 PCI: 00:1c.2: enabled 0
729 03:27:47.856525 PCI: 00:1c.3: enabled 0
730 03:27:47.856625 PCI: 00:1c.4: enabled 0
731 03:27:47.859902 PCI: 00:1c.5: enabled 0
732 03:27:47.863539 PCI: 00:1c.6: enabled 0
733 03:27:47.866588 PCI: 00:1c.7: enabled 0
734 03:27:47.866688 PCI: 00:1d.0: enabled 1
735 03:27:47.869944 PCI: 00:1d.1: enabled 0
736 03:27:47.872933 PCI: 00:1d.2: enabled 0
737 03:27:47.877546 PCI: 00:1d.3: enabled 0
738 03:27:47.877667 PCI: 00:1d.4: enabled 0
739 03:27:47.879589 PCI: 00:1d.5: enabled 1
740 03:27:47.883295 PCI: 00:1e.0: enabled 1
741 03:27:47.886567 PCI: 00:1e.1: enabled 0
742 03:27:47.886674 PCI: 00:1e.2: enabled 1
743 03:27:47.890013 PCI: 00:1e.3: enabled 1
744 03:27:47.892902 PCI: 00:1f.0: enabled 1
745 03:27:47.893050 PCI: 00:1f.1: enabled 1
746 03:27:47.896489 PCI: 00:1f.2: enabled 1
747 03:27:47.899893 PCI: 00:1f.3: enabled 1
748 03:27:47.903503 PCI: 00:1f.4: enabled 1
749 03:27:47.903592 PCI: 00:1f.5: enabled 1
750 03:27:47.906793 PCI: 00:1f.6: enabled 0
751 03:27:47.909763 USB0 port 0: enabled 1
752 03:27:47.912934 I2C: 00:15: enabled 1
753 03:27:47.913062 I2C: 00:5d: enabled 1
754 03:27:47.916058 GENERIC: 0.0: enabled 1
755 03:27:47.919868 I2C: 00:1a: enabled 1
756 03:27:47.919958 I2C: 00:38: enabled 1
757 03:27:47.922714 I2C: 00:39: enabled 1
758 03:27:47.926343 I2C: 00:3a: enabled 1
759 03:27:47.926433 I2C: 00:3b: enabled 1
760 03:27:47.929306 PCI: 00:00.0: enabled 1
761 03:27:47.932814 SPI: 00: enabled 1
762 03:27:47.932907 SPI: 01: enabled 1
763 03:27:47.935956 PNP: 0c09.0: enabled 1
764 03:27:47.939266 USB2 port 0: enabled 1
765 03:27:47.939395 USB2 port 1: enabled 1
766 03:27:47.942724 USB2 port 2: enabled 0
767 03:27:47.946424 USB2 port 3: enabled 0
768 03:27:47.946517 USB2 port 5: enabled 0
769 03:27:47.949427 USB2 port 6: enabled 1
770 03:27:47.952853 USB2 port 9: enabled 1
771 03:27:47.956448 USB3 port 0: enabled 1
772 03:27:47.956551 USB3 port 1: enabled 1
773 03:27:47.959501 USB3 port 2: enabled 1
774 03:27:47.963091 USB3 port 3: enabled 1
775 03:27:47.963185 USB3 port 4: enabled 0
776 03:27:47.965915 APIC: 02: enabled 1
777 03:27:47.969016 APIC: 03: enabled 1
778 03:27:47.969111 APIC: 01: enabled 1
779 03:27:47.972748 APIC: 04: enabled 1
780 03:27:47.972843 APIC: 05: enabled 1
781 03:27:47.975848 APIC: 07: enabled 1
782 03:27:47.979040 APIC: 06: enabled 1
783 03:27:47.979155 Compare with tree...
784 03:27:47.982384 Root Device: enabled 1
785 03:27:47.985755 CPU_CLUSTER: 0: enabled 1
786 03:27:47.989088 APIC: 00: enabled 1
787 03:27:47.989190 APIC: 02: enabled 1
788 03:27:47.992673 APIC: 03: enabled 1
789 03:27:47.995861 APIC: 01: enabled 1
790 03:27:47.995981 APIC: 04: enabled 1
791 03:27:47.999104 APIC: 05: enabled 1
792 03:27:48.002195 APIC: 07: enabled 1
793 03:27:48.002284 APIC: 06: enabled 1
794 03:27:48.005640 DOMAIN: 0000: enabled 1
795 03:27:48.008862 PCI: 00:00.0: enabled 1
796 03:27:48.012145 PCI: 00:02.0: enabled 1
797 03:27:48.012237 PCI: 00:04.0: enabled 0
798 03:27:48.015578 PCI: 00:05.0: enabled 0
799 03:27:48.018600 PCI: 00:12.0: enabled 1
800 03:27:48.022041 PCI: 00:12.5: enabled 0
801 03:27:48.025569 PCI: 00:12.6: enabled 0
802 03:27:48.025659 PCI: 00:14.0: enabled 1
803 03:27:48.029065 USB0 port 0: enabled 1
804 03:27:48.031959 USB2 port 0: enabled 1
805 03:27:48.035117 USB2 port 1: enabled 1
806 03:27:48.038507 USB2 port 2: enabled 0
807 03:27:48.042136 USB2 port 3: enabled 0
808 03:27:48.042226 USB2 port 5: enabled 0
809 03:27:48.045157 USB2 port 6: enabled 1
810 03:27:48.049463 USB2 port 9: enabled 1
811 03:27:48.052299 USB3 port 0: enabled 1
812 03:27:48.055597 USB3 port 1: enabled 1
813 03:27:48.055686 USB3 port 2: enabled 1
814 03:27:48.058876 USB3 port 3: enabled 1
815 03:27:48.062266 USB3 port 4: enabled 0
816 03:27:48.065371 PCI: 00:14.1: enabled 0
817 03:27:48.068284 PCI: 00:14.3: enabled 1
818 03:27:48.068379 PCI: 00:14.5: enabled 0
819 03:27:48.072199 PCI: 00:15.0: enabled 1
820 03:27:48.075102 I2C: 00:15: enabled 1
821 03:27:48.078629 PCI: 00:15.1: enabled 1
822 03:27:48.082177 I2C: 00:5d: enabled 1
823 03:27:48.082278 GENERIC: 0.0: enabled 1
824 03:27:48.084820 PCI: 00:15.2: enabled 0
825 03:27:48.088659 PCI: 00:15.3: enabled 0
826 03:27:48.091468 PCI: 00:16.0: enabled 1
827 03:27:48.094956 PCI: 00:16.1: enabled 0
828 03:27:48.095070 PCI: 00:16.2: enabled 0
829 03:27:48.098375 PCI: 00:16.3: enabled 0
830 03:27:48.101337 PCI: 00:16.4: enabled 0
831 03:27:48.104666 PCI: 00:16.5: enabled 0
832 03:27:48.108078 PCI: 00:17.0: enabled 1
833 03:27:48.108172 PCI: 00:19.0: enabled 1
834 03:27:48.111817 I2C: 00:1a: enabled 1
835 03:27:48.114796 I2C: 00:38: enabled 1
836 03:27:48.118027 I2C: 00:39: enabled 1
837 03:27:48.118125 I2C: 00:3a: enabled 1
838 03:27:48.121315 I2C: 00:3b: enabled 1
839 03:27:48.124669 PCI: 00:19.1: enabled 0
840 03:27:48.127790 PCI: 00:19.2: enabled 0
841 03:27:48.131332 PCI: 00:1a.0: enabled 0
842 03:27:48.131436 PCI: 00:1c.0: enabled 0
843 03:27:48.134929 PCI: 00:1c.1: enabled 0
844 03:27:48.138881 PCI: 00:1c.2: enabled 0
845 03:27:48.141794 PCI: 00:1c.3: enabled 0
846 03:27:48.145182 PCI: 00:1c.4: enabled 0
847 03:27:48.145282 PCI: 00:1c.5: enabled 0
848 03:27:48.147995 PCI: 00:1c.6: enabled 0
849 03:27:48.150967 PCI: 00:1c.7: enabled 0
850 03:27:48.154754 PCI: 00:1d.0: enabled 1
851 03:27:48.157782 PCI: 00:1d.1: enabled 0
852 03:27:48.157873 PCI: 00:1d.2: enabled 0
853 03:27:48.161713 PCI: 00:1d.3: enabled 0
854 03:27:48.164688 PCI: 00:1d.4: enabled 0
855 03:27:48.167636 PCI: 00:1d.5: enabled 1
856 03:27:48.171429 PCI: 00:00.0: enabled 1
857 03:27:48.171520 PCI: 00:1e.0: enabled 1
858 03:27:48.175289 PCI: 00:1e.1: enabled 0
859 03:27:48.178122 PCI: 00:1e.2: enabled 1
860 03:27:48.180825 SPI: 00: enabled 1
861 03:27:48.180915 PCI: 00:1e.3: enabled 1
862 03:27:48.184266 SPI: 01: enabled 1
863 03:27:48.187588 PCI: 00:1f.0: enabled 1
864 03:27:48.191386 PNP: 0c09.0: enabled 1
865 03:27:48.191473 PCI: 00:1f.1: enabled 1
866 03:27:48.194367 PCI: 00:1f.2: enabled 1
867 03:27:48.197490 PCI: 00:1f.3: enabled 1
868 03:27:48.200661 PCI: 00:1f.4: enabled 1
869 03:27:48.204526 PCI: 00:1f.5: enabled 1
870 03:27:48.204613 PCI: 00:1f.6: enabled 0
871 03:27:48.207468 Root Device scanning...
872 03:27:48.210725 scan_static_bus for Root Device
873 03:27:48.214181 CPU_CLUSTER: 0 enabled
874 03:27:48.217305 DOMAIN: 0000 enabled
875 03:27:48.217393 DOMAIN: 0000 scanning...
876 03:27:48.220925 PCI: pci_scan_bus for bus 00
877 03:27:48.224336 PCI: 00:00.0 [8086/0000] ops
878 03:27:48.227313 PCI: 00:00.0 [8086/9b61] enabled
879 03:27:48.231013 PCI: 00:02.0 [8086/0000] bus ops
880 03:27:48.234138 PCI: 00:02.0 [8086/9b41] enabled
881 03:27:48.237194 PCI: 00:04.0 [8086/1903] disabled
882 03:27:48.240911 PCI: 00:08.0 [8086/1911] enabled
883 03:27:48.243919 PCI: 00:12.0 [8086/02f9] enabled
884 03:27:48.247025 PCI: 00:14.0 [8086/0000] bus ops
885 03:27:48.250376 PCI: 00:14.0 [8086/02ed] enabled
886 03:27:48.253677 PCI: 00:14.2 [8086/02ef] enabled
887 03:27:48.256970 PCI: 00:14.3 [8086/02f0] enabled
888 03:27:48.260419 PCI: 00:15.0 [8086/0000] bus ops
889 03:27:48.263615 PCI: 00:15.0 [8086/02e8] enabled
890 03:27:48.267032 PCI: 00:15.1 [8086/0000] bus ops
891 03:27:48.271144 PCI: 00:15.1 [8086/02e9] enabled
892 03:27:48.273648 PCI: 00:16.0 [8086/0000] ops
893 03:27:48.277075 PCI: 00:16.0 [8086/02e0] enabled
894 03:27:48.280386 PCI: 00:17.0 [8086/0000] ops
895 03:27:48.283513 PCI: 00:17.0 [8086/02d3] enabled
896 03:27:48.286802 PCI: 00:19.0 [8086/0000] bus ops
897 03:27:48.290389 PCI: 00:19.0 [8086/02c5] enabled
898 03:27:48.294766 PCI: 00:1d.0 [8086/0000] bus ops
899 03:27:48.296788 PCI: 00:1d.0 [8086/02b0] enabled
900 03:27:48.303533 PCI: Static device PCI: 00:1d.5 not found, disabling it.
901 03:27:48.307133 PCI: 00:1e.0 [8086/0000] ops
902 03:27:48.310771 PCI: 00:1e.0 [8086/02a8] enabled
903 03:27:48.313377 PCI: 00:1e.2 [8086/0000] bus ops
904 03:27:48.316925 PCI: 00:1e.2 [8086/02aa] enabled
905 03:27:48.320222 PCI: 00:1e.3 [8086/0000] bus ops
906 03:27:48.323349 PCI: 00:1e.3 [8086/02ab] enabled
907 03:27:48.327029 PCI: 00:1f.0 [8086/0000] bus ops
908 03:27:48.329885 PCI: 00:1f.0 [8086/0284] enabled
909 03:27:48.333516 PCI: Static device PCI: 00:1f.1 not found, disabling it.
910 03:27:48.339983 PCI: Static device PCI: 00:1f.2 not found, disabling it.
911 03:27:48.343373 PCI: 00:1f.3 [8086/0000] bus ops
912 03:27:48.346397 PCI: 00:1f.3 [8086/02c8] enabled
913 03:27:48.350506 PCI: 00:1f.4 [8086/0000] bus ops
914 03:27:48.354207 PCI: 00:1f.4 [8086/02a3] enabled
915 03:27:48.356400 PCI: 00:1f.5 [8086/0000] bus ops
916 03:27:48.359808 PCI: 00:1f.5 [8086/02a4] enabled
917 03:27:48.363025 PCI: Leftover static devices:
918 03:27:48.363107 PCI: 00:05.0
919 03:27:48.366466 PCI: 00:12.5
920 03:27:48.366549 PCI: 00:12.6
921 03:27:48.369609 PCI: 00:14.1
922 03:27:48.369725 PCI: 00:14.5
923 03:27:48.372954 PCI: 00:15.2
924 03:27:48.373046 PCI: 00:15.3
925 03:27:48.373163 PCI: 00:16.1
926 03:27:48.376562 PCI: 00:16.2
927 03:27:48.376678 PCI: 00:16.3
928 03:27:48.379557 PCI: 00:16.4
929 03:27:48.379646 PCI: 00:16.5
930 03:27:48.379715 PCI: 00:19.1
931 03:27:48.383433 PCI: 00:19.2
932 03:27:48.383566 PCI: 00:1a.0
933 03:27:48.386452 PCI: 00:1c.0
934 03:27:48.386538 PCI: 00:1c.1
935 03:27:48.386608 PCI: 00:1c.2
936 03:27:48.389907 PCI: 00:1c.3
937 03:27:48.389994 PCI: 00:1c.4
938 03:27:48.392892 PCI: 00:1c.5
939 03:27:48.393002 PCI: 00:1c.6
940 03:27:48.396819 PCI: 00:1c.7
941 03:27:48.396909 PCI: 00:1d.1
942 03:27:48.397003 PCI: 00:1d.2
943 03:27:48.400783 PCI: 00:1d.3
944 03:27:48.400870 PCI: 00:1d.4
945 03:27:48.402865 PCI: 00:1d.5
946 03:27:48.403007 PCI: 00:1e.1
947 03:27:48.403091 PCI: 00:1f.1
948 03:27:48.406203 PCI: 00:1f.2
949 03:27:48.406289 PCI: 00:1f.6
950 03:27:48.409634 PCI: Check your devicetree.cb.
951 03:27:48.412816 PCI: 00:02.0 scanning...
952 03:27:48.416109 scan_generic_bus for PCI: 00:02.0
953 03:27:48.419663 scan_generic_bus for PCI: 00:02.0 done
954 03:27:48.426050 scan_bus: scanning of bus PCI: 00:02.0 took 10202 usecs
955 03:27:48.429815 PCI: 00:14.0 scanning...
956 03:27:48.432861 scan_static_bus for PCI: 00:14.0
957 03:27:48.432953 USB0 port 0 enabled
958 03:27:48.436204 USB0 port 0 scanning...
959 03:27:48.439843 scan_static_bus for USB0 port 0
960 03:27:48.442803 USB2 port 0 enabled
961 03:27:48.442891 USB2 port 1 enabled
962 03:27:48.445974 USB2 port 2 disabled
963 03:27:48.449319 USB2 port 3 disabled
964 03:27:48.449406 USB2 port 5 disabled
965 03:27:48.452628 USB2 port 6 enabled
966 03:27:48.456309 USB2 port 9 enabled
967 03:27:48.456412 USB3 port 0 enabled
968 03:27:48.458926 USB3 port 1 enabled
969 03:27:48.459026 USB3 port 2 enabled
970 03:27:48.462652 USB3 port 3 enabled
971 03:27:48.466153 USB3 port 4 disabled
972 03:27:48.466285 USB2 port 0 scanning...
973 03:27:48.469749 scan_static_bus for USB2 port 0
974 03:27:48.475931 scan_static_bus for USB2 port 0 done
975 03:27:48.479276 scan_bus: scanning of bus USB2 port 0 took 9704 usecs
976 03:27:48.482669 USB2 port 1 scanning...
977 03:27:48.486487 scan_static_bus for USB2 port 1
978 03:27:48.489540 scan_static_bus for USB2 port 1 done
979 03:27:48.495481 scan_bus: scanning of bus USB2 port 1 took 9715 usecs
980 03:27:48.499060 USB2 port 6 scanning...
981 03:27:48.502749 scan_static_bus for USB2 port 6
982 03:27:48.505879 scan_static_bus for USB2 port 6 done
983 03:27:48.509200 scan_bus: scanning of bus USB2 port 6 took 9719 usecs
984 03:27:48.512642 USB2 port 9 scanning...
985 03:27:48.515713 scan_static_bus for USB2 port 9
986 03:27:48.518615 scan_static_bus for USB2 port 9 done
987 03:27:48.525479 scan_bus: scanning of bus USB2 port 9 took 9706 usecs
988 03:27:48.528911 USB3 port 0 scanning...
989 03:27:48.532280 scan_static_bus for USB3 port 0
990 03:27:48.535365 scan_static_bus for USB3 port 0 done
991 03:27:48.538618 scan_bus: scanning of bus USB3 port 0 took 9695 usecs
992 03:27:48.541874 USB3 port 1 scanning...
993 03:27:48.546047 scan_static_bus for USB3 port 1
994 03:27:48.548420 scan_static_bus for USB3 port 1 done
995 03:27:48.554989 scan_bus: scanning of bus USB3 port 1 took 9715 usecs
996 03:27:48.558848 USB3 port 2 scanning...
997 03:27:48.562034 scan_static_bus for USB3 port 2
998 03:27:48.565491 scan_static_bus for USB3 port 2 done
999 03:27:48.568323 scan_bus: scanning of bus USB3 port 2 took 9714 usecs
1000 03:27:48.571628 USB3 port 3 scanning...
1001 03:27:48.575151 scan_static_bus for USB3 port 3
1002 03:27:48.578664 scan_static_bus for USB3 port 3 done
1003 03:27:48.584957 scan_bus: scanning of bus USB3 port 3 took 9716 usecs
1004 03:27:48.588540 scan_static_bus for USB0 port 0 done
1005 03:27:48.595523 scan_bus: scanning of bus USB0 port 0 took 155512 usecs
1006 03:27:48.598463 scan_static_bus for PCI: 00:14.0 done
1007 03:27:48.604730 scan_bus: scanning of bus PCI: 00:14.0 took 173145 usecs
1008 03:27:48.604821 PCI: 00:15.0 scanning...
1009 03:27:48.611433 scan_generic_bus for PCI: 00:15.0
1010 03:27:48.615053 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1011 03:27:48.618096 scan_generic_bus for PCI: 00:15.0 done
1012 03:27:48.624747 scan_bus: scanning of bus PCI: 00:15.0 took 14318 usecs
1013 03:27:48.624837 PCI: 00:15.1 scanning...
1014 03:27:48.631719 scan_generic_bus for PCI: 00:15.1
1015 03:27:48.634978 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1016 03:27:48.637996 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1017 03:27:48.641220 scan_generic_bus for PCI: 00:15.1 done
1018 03:27:48.648306 scan_bus: scanning of bus PCI: 00:15.1 took 18669 usecs
1019 03:27:48.651110 PCI: 00:19.0 scanning...
1020 03:27:48.654537 scan_generic_bus for PCI: 00:19.0
1021 03:27:48.657880 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1022 03:27:48.661632 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1023 03:27:48.664719 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1024 03:27:48.671809 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1025 03:27:48.674845 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1026 03:27:48.677807 scan_generic_bus for PCI: 00:19.0 done
1027 03:27:48.684774 scan_bus: scanning of bus PCI: 00:19.0 took 30757 usecs
1028 03:27:48.688125 PCI: 00:1d.0 scanning...
1029 03:27:48.690912 do_pci_scan_bridge for PCI: 00:1d.0
1030 03:27:48.694277 PCI: pci_scan_bus for bus 01
1031 03:27:48.697383 PCI: 01:00.0 [1c5c/1327] enabled
1032 03:27:48.701044 Enabling Common Clock Configuration
1033 03:27:48.704523 L1 Sub-State supported from root port 29
1034 03:27:48.707949 L1 Sub-State Support = 0xf
1035 03:27:48.711446 CommonModeRestoreTime = 0x28
1036 03:27:48.714260 Power On Value = 0x16, Power On Scale = 0x0
1037 03:27:48.717250 ASPM: Enabled L1
1038 03:27:48.720847 scan_bus: scanning of bus PCI: 00:1d.0 took 32800 usecs
1039 03:27:48.724640 PCI: 00:1e.2 scanning...
1040 03:27:48.727628 scan_generic_bus for PCI: 00:1e.2
1041 03:27:48.731094 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1042 03:27:48.737231 scan_generic_bus for PCI: 00:1e.2 done
1043 03:27:48.740683 scan_bus: scanning of bus PCI: 00:1e.2 took 14008 usecs
1044 03:27:48.743857 PCI: 00:1e.3 scanning...
1045 03:27:48.747372 scan_generic_bus for PCI: 00:1e.3
1046 03:27:48.750461 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1047 03:27:48.754146 scan_generic_bus for PCI: 00:1e.3 done
1048 03:27:48.760533 scan_bus: scanning of bus PCI: 00:1e.3 took 14003 usecs
1049 03:27:48.763908 PCI: 00:1f.0 scanning...
1050 03:27:48.767036 scan_static_bus for PCI: 00:1f.0
1051 03:27:48.770367 PNP: 0c09.0 enabled
1052 03:27:48.773750 scan_static_bus for PCI: 00:1f.0 done
1053 03:27:48.777182 scan_bus: scanning of bus PCI: 00:1f.0 took 12057 usecs
1054 03:27:48.780453 PCI: 00:1f.3 scanning...
1055 03:27:48.787322 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1056 03:27:48.790150 PCI: 00:1f.4 scanning...
1057 03:27:48.793894 scan_generic_bus for PCI: 00:1f.4
1058 03:27:48.797127 scan_generic_bus for PCI: 00:1f.4 done
1059 03:27:48.803735 scan_bus: scanning of bus PCI: 00:1f.4 took 10202 usecs
1060 03:27:48.803824 PCI: 00:1f.5 scanning...
1061 03:27:48.810482 scan_generic_bus for PCI: 00:1f.5
1062 03:27:48.813469 scan_generic_bus for PCI: 00:1f.5 done
1063 03:27:48.817061 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
1064 03:27:48.823637 scan_bus: scanning of bus DOMAIN: 0000 took 605506 usecs
1065 03:27:48.826871 scan_static_bus for Root Device done
1066 03:27:48.833530 scan_bus: scanning of bus Root Device took 625374 usecs
1067 03:27:48.833619 done
1068 03:27:48.837030 Chrome EC: UHEPI supported
1069 03:27:48.843005 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1070 03:27:48.849981 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1071 03:27:48.856928 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1072 03:27:48.863049 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1073 03:27:48.866606 SPI flash protection: WPSW=0 SRP0=0
1074 03:27:48.870491 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 03:27:48.876366 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1076 03:27:48.879874 found VGA at PCI: 00:02.0
1077 03:27:48.883196 Setting up VGA for PCI: 00:02.0
1078 03:27:48.886416 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 03:27:48.893234 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 03:27:48.893329 Allocating resources...
1081 03:27:48.896680 Reading resources...
1082 03:27:48.899603 Root Device read_resources bus 0 link: 0
1083 03:27:48.906407 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1084 03:27:48.909938 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1085 03:27:48.916053 DOMAIN: 0000 read_resources bus 0 link: 0
1086 03:27:48.919506 PCI: 00:14.0 read_resources bus 0 link: 0
1087 03:27:48.926251 USB0 port 0 read_resources bus 0 link: 0
1088 03:27:48.933413 USB0 port 0 read_resources bus 0 link: 0 done
1089 03:27:48.936668 PCI: 00:14.0 read_resources bus 0 link: 0 done
1090 03:27:48.944052 PCI: 00:15.0 read_resources bus 1 link: 0
1091 03:27:48.947607 PCI: 00:15.0 read_resources bus 1 link: 0 done
1092 03:27:48.954089 PCI: 00:15.1 read_resources bus 2 link: 0
1093 03:27:48.957514 PCI: 00:15.1 read_resources bus 2 link: 0 done
1094 03:27:48.964659 PCI: 00:19.0 read_resources bus 3 link: 0
1095 03:27:48.971970 PCI: 00:19.0 read_resources bus 3 link: 0 done
1096 03:27:48.974546 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 03:27:48.981475 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 03:27:48.985225 PCI: 00:1e.2 read_resources bus 4 link: 0
1099 03:27:48.991598 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1100 03:27:48.995033 PCI: 00:1e.3 read_resources bus 5 link: 0
1101 03:27:49.001128 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1102 03:27:49.004500 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 03:27:49.010961 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 03:27:49.018028 DOMAIN: 0000 read_resources bus 0 link: 0 done
1105 03:27:49.021096 Root Device read_resources bus 0 link: 0 done
1106 03:27:49.024714 Done reading resources.
1107 03:27:49.027989 Show resources in subtree (Root Device)...After reading.
1108 03:27:49.034454 Root Device child on link 0 CPU_CLUSTER: 0
1109 03:27:49.037637 CPU_CLUSTER: 0 child on link 0 APIC: 00
1110 03:27:49.037739 APIC: 00
1111 03:27:49.040958 APIC: 02
1112 03:27:49.041060 APIC: 03
1113 03:27:49.044515 APIC: 01
1114 03:27:49.044607 APIC: 04
1115 03:27:49.044686 APIC: 05
1116 03:27:49.047699 APIC: 07
1117 03:27:49.047794 APIC: 06
1118 03:27:49.051290 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1119 03:27:49.061184 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1120 03:27:49.114209 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1121 03:27:49.114540 PCI: 00:00.0
1122 03:27:49.114681 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1123 03:27:49.114981 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1124 03:27:49.115054 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1125 03:27:49.115944 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1126 03:27:49.163901 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1127 03:27:49.165573 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1128 03:27:49.166219 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1129 03:27:49.166670 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1130 03:27:49.166944 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1131 03:27:49.213818 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1132 03:27:49.214539 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1133 03:27:49.215226 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1134 03:27:49.215787 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1135 03:27:49.216271 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1136 03:27:49.216692 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1137 03:27:49.228572 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1138 03:27:49.228659 PCI: 00:02.0
1139 03:27:49.234565 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1140 03:27:49.244220 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1141 03:27:49.254234 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1142 03:27:49.254322 PCI: 00:04.0
1143 03:27:49.257957 PCI: 00:08.0
1144 03:27:49.267700 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1145 03:27:49.267790 PCI: 00:12.0
1146 03:27:49.277285 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 03:27:49.284174 PCI: 00:14.0 child on link 0 USB0 port 0
1148 03:27:49.294054 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1149 03:27:49.297260 USB0 port 0 child on link 0 USB2 port 0
1150 03:27:49.300912 USB2 port 0
1151 03:27:49.301031 USB2 port 1
1152 03:27:49.304090 USB2 port 2
1153 03:27:49.304175 USB2 port 3
1154 03:27:49.307395 USB2 port 5
1155 03:27:49.307480 USB2 port 6
1156 03:27:49.311137 USB2 port 9
1157 03:27:49.311230 USB3 port 0
1158 03:27:49.313740 USB3 port 1
1159 03:27:49.313825 USB3 port 2
1160 03:27:49.317541 USB3 port 3
1161 03:27:49.317625 USB3 port 4
1162 03:27:49.320882 PCI: 00:14.2
1163 03:27:49.330553 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1164 03:27:49.340341 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1165 03:27:49.340427 PCI: 00:14.3
1166 03:27:49.350119 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1167 03:27:49.356733 PCI: 00:15.0 child on link 0 I2C: 01:15
1168 03:27:49.366885 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 03:27:49.366973 I2C: 01:15
1170 03:27:49.370902 PCI: 00:15.1 child on link 0 I2C: 02:5d
1171 03:27:49.380064 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 03:27:49.383803 I2C: 02:5d
1173 03:27:49.383888 GENERIC: 0.0
1174 03:27:49.386461 PCI: 00:16.0
1175 03:27:49.396425 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 03:27:49.396511 PCI: 00:17.0
1177 03:27:49.406769 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1178 03:27:49.416658 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1179 03:27:49.423188 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1180 03:27:49.432761 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1181 03:27:49.439583 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1182 03:27:49.449529 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1183 03:27:49.456149 PCI: 00:19.0 child on link 0 I2C: 03:1a
1184 03:27:49.466633 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 03:27:49.466722 I2C: 03:1a
1186 03:27:49.466790 I2C: 03:38
1187 03:27:49.469343 I2C: 03:39
1188 03:27:49.469432 I2C: 03:3a
1189 03:27:49.472731 I2C: 03:3b
1190 03:27:49.476468 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1191 03:27:49.485981 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1192 03:27:49.495710 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1193 03:27:49.505677 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1194 03:27:49.505765 PCI: 01:00.0
1195 03:27:49.515649 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1196 03:27:49.519136 PCI: 00:1e.0
1197 03:27:49.528964 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1198 03:27:49.538952 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1199 03:27:49.542084 PCI: 00:1e.2 child on link 0 SPI: 00
1200 03:27:49.552117 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 03:27:49.555407 SPI: 00
1202 03:27:49.558747 PCI: 00:1e.3 child on link 0 SPI: 01
1203 03:27:49.568581 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 03:27:49.568667 SPI: 01
1205 03:27:49.571902 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1206 03:27:49.582211 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1207 03:27:49.592018 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1208 03:27:49.592107 PNP: 0c09.0
1209 03:27:49.601905 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1210 03:27:49.601996 PCI: 00:1f.3
1211 03:27:49.611578 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1212 03:27:49.621939 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1213 03:27:49.624917 PCI: 00:1f.4
1214 03:27:49.634930 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1215 03:27:49.645177 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1216 03:27:49.645272 PCI: 00:1f.5
1217 03:27:49.654907 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1218 03:27:49.661479 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1219 03:27:49.668127 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1220 03:27:49.674979 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1221 03:27:49.678712 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1222 03:27:49.681249 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1223 03:27:49.684665 PCI: 00:17.0 18 * [0x60 - 0x67] io
1224 03:27:49.687979 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1225 03:27:49.694488 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1226 03:27:49.701354 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1227 03:27:49.711286 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1228 03:27:49.717725 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1229 03:27:49.725164 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1230 03:27:49.727965 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 03:27:49.737417 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1232 03:27:49.741598 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1233 03:27:49.747776 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1234 03:27:49.750796 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1235 03:27:49.757219 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1236 03:27:49.760966 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1237 03:27:49.767517 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1238 03:27:49.770503 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1239 03:27:49.773857 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1240 03:27:49.780688 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1241 03:27:49.784070 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1242 03:27:49.790493 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1243 03:27:49.793977 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1244 03:27:49.800397 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1245 03:27:49.803388 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1246 03:27:49.810498 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1247 03:27:49.814048 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1248 03:27:49.820058 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1249 03:27:49.824022 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1250 03:27:49.829907 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1251 03:27:49.833723 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1252 03:27:49.840268 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1253 03:27:49.843401 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1254 03:27:49.849717 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1255 03:27:49.856892 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1256 03:27:49.860371 avoid_fixed_resources: DOMAIN: 0000
1257 03:27:49.866733 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1258 03:27:49.872935 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1259 03:27:49.879746 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1260 03:27:49.886526 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1261 03:27:49.896009 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1262 03:27:49.902889 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1263 03:27:49.909858 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1264 03:27:49.919907 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1265 03:27:49.926459 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1266 03:27:49.932423 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1267 03:27:49.942598 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1268 03:27:49.948829 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1269 03:27:49.948918 Setting resources...
1270 03:27:49.955807 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1271 03:27:49.962586 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1272 03:27:49.965784 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1273 03:27:49.968897 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1274 03:27:49.972158 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1275 03:27:49.979064 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1276 03:27:49.986099 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1277 03:27:49.991920 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1278 03:27:49.998563 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1279 03:27:50.005169 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1280 03:27:50.008815 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1281 03:27:50.015715 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1282 03:27:50.018368 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1283 03:27:50.025212 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1284 03:27:50.028714 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1285 03:27:50.035730 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1286 03:27:50.038503 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1287 03:27:50.042273 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1288 03:27:50.048992 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1289 03:27:50.051695 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1290 03:27:50.058141 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1291 03:27:50.061603 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1292 03:27:50.068273 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1293 03:27:50.071926 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1294 03:27:50.078415 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1295 03:27:50.081961 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1296 03:27:50.088180 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1297 03:27:50.091689 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1298 03:27:50.098285 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1299 03:27:50.101233 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1300 03:27:50.108034 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1301 03:27:50.111424 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1302 03:27:50.118468 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1303 03:27:50.127793 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1304 03:27:50.134319 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1305 03:27:50.141593 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1306 03:27:50.145152 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1307 03:27:50.154494 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1308 03:27:50.157354 Root Device assign_resources, bus 0 link: 0
1309 03:27:50.160833 DOMAIN: 0000 assign_resources, bus 0 link: 0
1310 03:27:50.171573 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1311 03:27:50.177791 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1312 03:27:50.187768 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1313 03:27:50.194585 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1314 03:27:50.204218 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1315 03:27:50.211052 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1316 03:27:50.217473 PCI: 00:14.0 assign_resources, bus 0 link: 0
1317 03:27:50.220962 PCI: 00:14.0 assign_resources, bus 0 link: 0
1318 03:27:50.231344 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1319 03:27:50.237514 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1320 03:27:50.247479 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1321 03:27:50.253976 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1322 03:27:50.256931 PCI: 00:15.0 assign_resources, bus 1 link: 0
1323 03:27:50.264040 PCI: 00:15.0 assign_resources, bus 1 link: 0
1324 03:27:50.270890 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1325 03:27:50.277250 PCI: 00:15.1 assign_resources, bus 2 link: 0
1326 03:27:50.280279 PCI: 00:15.1 assign_resources, bus 2 link: 0
1327 03:27:50.290246 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1328 03:27:50.297001 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1329 03:27:50.303770 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1330 03:27:50.314009 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1331 03:27:50.319831 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1332 03:27:50.326448 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1333 03:27:50.336643 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1334 03:27:50.343479 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1335 03:27:50.350096 PCI: 00:19.0 assign_resources, bus 3 link: 0
1336 03:27:50.352830 PCI: 00:19.0 assign_resources, bus 3 link: 0
1337 03:27:50.363061 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1338 03:27:50.369490 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1339 03:27:50.379315 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1340 03:27:50.383037 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1341 03:27:50.392654 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1342 03:27:50.396432 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1343 03:27:50.406043 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1344 03:27:50.412511 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1345 03:27:50.419141 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1346 03:27:50.422089 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1347 03:27:50.431933 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1348 03:27:50.435575 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1349 03:27:50.438607 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1350 03:27:50.446221 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1351 03:27:50.449421 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1352 03:27:50.455707 LPC: Trying to open IO window from 800 size 1ff
1353 03:27:50.462668 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1354 03:27:50.473146 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1355 03:27:50.478950 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1356 03:27:50.488865 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1357 03:27:50.492490 DOMAIN: 0000 assign_resources, bus 0 link: 0
1358 03:27:50.498808 Root Device assign_resources, bus 0 link: 0
1359 03:27:50.498894 Done setting resources.
1360 03:27:50.505624 Show resources in subtree (Root Device)...After assigning values.
1361 03:27:50.511510 Root Device child on link 0 CPU_CLUSTER: 0
1362 03:27:50.515128 CPU_CLUSTER: 0 child on link 0 APIC: 00
1363 03:27:50.515213 APIC: 00
1364 03:27:50.518549 APIC: 02
1365 03:27:50.518635 APIC: 03
1366 03:27:50.518701 APIC: 01
1367 03:27:50.522041 APIC: 04
1368 03:27:50.522172 APIC: 05
1369 03:27:50.525209 APIC: 07
1370 03:27:50.525311 APIC: 06
1371 03:27:50.528799 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1372 03:27:50.538225 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1373 03:27:50.551274 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1374 03:27:50.551364 PCI: 00:00.0
1375 03:27:50.561237 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1376 03:27:50.571298 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1377 03:27:50.581552 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1378 03:27:50.588199 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1379 03:27:50.598132 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1380 03:27:50.607493 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1381 03:27:50.617405 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1382 03:27:50.627497 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1383 03:27:50.637865 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1384 03:27:50.644376 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1385 03:27:50.654204 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1386 03:27:50.663835 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1387 03:27:50.673974 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1388 03:27:50.683667 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1389 03:27:50.693415 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1390 03:27:50.703398 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1391 03:27:50.703484 PCI: 00:02.0
1392 03:27:50.713388 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1393 03:27:50.723358 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1394 03:27:50.733315 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1395 03:27:50.736705 PCI: 00:04.0
1396 03:27:50.736791 PCI: 00:08.0
1397 03:27:50.746623 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1398 03:27:50.749455 PCI: 00:12.0
1399 03:27:50.759421 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1400 03:27:50.762652 PCI: 00:14.0 child on link 0 USB0 port 0
1401 03:27:50.776151 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1402 03:27:50.778846 USB0 port 0 child on link 0 USB2 port 0
1403 03:27:50.778931 USB2 port 0
1404 03:27:50.782543 USB2 port 1
1405 03:27:50.785982 USB2 port 2
1406 03:27:50.786067 USB2 port 3
1407 03:27:50.788905 USB2 port 5
1408 03:27:50.789028 USB2 port 6
1409 03:27:50.792180 USB2 port 9
1410 03:27:50.792265 USB3 port 0
1411 03:27:50.795446 USB3 port 1
1412 03:27:50.795531 USB3 port 2
1413 03:27:50.798688 USB3 port 3
1414 03:27:50.798773 USB3 port 4
1415 03:27:50.802116 PCI: 00:14.2
1416 03:27:50.811802 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1417 03:27:50.821917 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1418 03:27:50.824885 PCI: 00:14.3
1419 03:27:50.835341 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1420 03:27:50.838353 PCI: 00:15.0 child on link 0 I2C: 01:15
1421 03:27:50.848122 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1422 03:27:50.851320 I2C: 01:15
1423 03:27:50.855487 PCI: 00:15.1 child on link 0 I2C: 02:5d
1424 03:27:50.864609 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1425 03:27:50.864697 I2C: 02:5d
1426 03:27:50.867924 GENERIC: 0.0
1427 03:27:50.871497 PCI: 00:16.0
1428 03:27:50.880990 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1429 03:27:50.881080 PCI: 00:17.0
1430 03:27:50.891208 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1431 03:27:50.900931 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1432 03:27:50.911145 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1433 03:27:50.920640 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1434 03:27:50.930816 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1435 03:27:50.940556 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1436 03:27:50.943959 PCI: 00:19.0 child on link 0 I2C: 03:1a
1437 03:27:50.954062 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1438 03:27:50.957248 I2C: 03:1a
1439 03:27:50.957335 I2C: 03:38
1440 03:27:50.960438 I2C: 03:39
1441 03:27:50.960524 I2C: 03:3a
1442 03:27:50.960594 I2C: 03:3b
1443 03:27:50.967102 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1444 03:27:50.976900 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1445 03:27:50.986818 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1446 03:27:50.996641 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1447 03:27:50.996731 PCI: 01:00.0
1448 03:27:51.009932 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1449 03:27:51.010021 PCI: 00:1e.0
1450 03:27:51.019693 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1451 03:27:51.032920 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1452 03:27:51.036527 PCI: 00:1e.2 child on link 0 SPI: 00
1453 03:27:51.046627 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1454 03:27:51.046720 SPI: 00
1455 03:27:51.049687 PCI: 00:1e.3 child on link 0 SPI: 01
1456 03:27:51.062909 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1457 03:27:51.062997 SPI: 01
1458 03:27:51.066254 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1459 03:27:51.075889 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1460 03:27:51.085968 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1461 03:27:51.086060 PNP: 0c09.0
1462 03:27:51.095813 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1463 03:27:51.095901 PCI: 00:1f.3
1464 03:27:51.106023 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1465 03:27:51.118859 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1466 03:27:51.118950 PCI: 00:1f.4
1467 03:27:51.129225 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1468 03:27:51.139195 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1469 03:27:51.139276 PCI: 00:1f.5
1470 03:27:51.152175 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1471 03:27:51.152256 Done allocating resources.
1472 03:27:51.158978 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1473 03:27:51.161980 Enabling resources...
1474 03:27:51.165038 PCI: 00:00.0 subsystem <- 8086/9b61
1475 03:27:51.169276 PCI: 00:00.0 cmd <- 06
1476 03:27:51.172050 PCI: 00:02.0 subsystem <- 8086/9b41
1477 03:27:51.175058 PCI: 00:02.0 cmd <- 03
1478 03:27:51.178276 PCI: 00:08.0 cmd <- 06
1479 03:27:51.182050 PCI: 00:12.0 subsystem <- 8086/02f9
1480 03:27:51.184861 PCI: 00:12.0 cmd <- 02
1481 03:27:51.188554 PCI: 00:14.0 subsystem <- 8086/02ed
1482 03:27:51.188638 PCI: 00:14.0 cmd <- 02
1483 03:27:51.191708 PCI: 00:14.2 cmd <- 02
1484 03:27:51.194818 PCI: 00:14.3 subsystem <- 8086/02f0
1485 03:27:51.198265 PCI: 00:14.3 cmd <- 02
1486 03:27:51.201570 PCI: 00:15.0 subsystem <- 8086/02e8
1487 03:27:51.204705 PCI: 00:15.0 cmd <- 02
1488 03:27:51.208033 PCI: 00:15.1 subsystem <- 8086/02e9
1489 03:27:51.211506 PCI: 00:15.1 cmd <- 02
1490 03:27:51.214836 PCI: 00:16.0 subsystem <- 8086/02e0
1491 03:27:51.218203 PCI: 00:16.0 cmd <- 02
1492 03:27:51.221782 PCI: 00:17.0 subsystem <- 8086/02d3
1493 03:27:51.224552 PCI: 00:17.0 cmd <- 03
1494 03:27:51.228049 PCI: 00:19.0 subsystem <- 8086/02c5
1495 03:27:51.231028 PCI: 00:19.0 cmd <- 02
1496 03:27:51.234659 PCI: 00:1d.0 bridge ctrl <- 0013
1497 03:27:51.238193 PCI: 00:1d.0 subsystem <- 8086/02b0
1498 03:27:51.240905 PCI: 00:1d.0 cmd <- 06
1499 03:27:51.243926 PCI: 00:1e.0 subsystem <- 8086/02a8
1500 03:27:51.244011 PCI: 00:1e.0 cmd <- 06
1501 03:27:51.251173 PCI: 00:1e.2 subsystem <- 8086/02aa
1502 03:27:51.251262 PCI: 00:1e.2 cmd <- 06
1503 03:27:51.254215 PCI: 00:1e.3 subsystem <- 8086/02ab
1504 03:27:51.257661 PCI: 00:1e.3 cmd <- 02
1505 03:27:51.261217 PCI: 00:1f.0 subsystem <- 8086/0284
1506 03:27:51.264208 PCI: 00:1f.0 cmd <- 407
1507 03:27:51.267852 PCI: 00:1f.3 subsystem <- 8086/02c8
1508 03:27:51.270976 PCI: 00:1f.3 cmd <- 02
1509 03:27:51.274135 PCI: 00:1f.4 subsystem <- 8086/02a3
1510 03:27:51.277203 PCI: 00:1f.4 cmd <- 03
1511 03:27:51.280914 PCI: 00:1f.5 subsystem <- 8086/02a4
1512 03:27:51.283945 PCI: 00:1f.5 cmd <- 406
1513 03:27:51.292078 PCI: 01:00.0 cmd <- 02
1514 03:27:51.297609 done.
1515 03:27:51.307712 ME: Version: 14.0.39.1367
1516 03:27:51.314627 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 9
1517 03:27:51.317625 Initializing devices...
1518 03:27:51.317711 Root Device init ...
1519 03:27:51.324665 Chrome EC: Set SMI mask to 0x0000000000000000
1520 03:27:51.327501 Chrome EC: clear events_b mask to 0x0000000000000000
1521 03:27:51.334071 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1522 03:27:51.341099 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1523 03:27:51.347070 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1524 03:27:51.350460 Chrome EC: Set WAKE mask to 0x0000000000000000
1525 03:27:51.356734 Root Device init finished in 35213 usecs
1526 03:27:51.356820 CPU_CLUSTER: 0 init ...
1527 03:27:51.363412 CPU_CLUSTER: 0 init finished in 2448 usecs
1528 03:27:51.368690 PCI: 00:00.0 init ...
1529 03:27:51.371653 CPU TDP: 15 Watts
1530 03:27:51.374920 CPU PL2 = 64 Watts
1531 03:27:51.378379 PCI: 00:00.0 init finished in 7084 usecs
1532 03:27:51.381595 PCI: 00:02.0 init ...
1533 03:27:51.384816 PCI: 00:02.0 init finished in 2246 usecs
1534 03:27:51.387969 PCI: 00:08.0 init ...
1535 03:27:51.391467 PCI: 00:08.0 init finished in 2253 usecs
1536 03:27:51.394482 PCI: 00:12.0 init ...
1537 03:27:51.397757 PCI: 00:12.0 init finished in 2252 usecs
1538 03:27:51.401346 PCI: 00:14.0 init ...
1539 03:27:51.404778 PCI: 00:14.0 init finished in 2252 usecs
1540 03:27:51.407737 PCI: 00:14.2 init ...
1541 03:27:51.411545 PCI: 00:14.2 init finished in 2252 usecs
1542 03:27:51.414700 PCI: 00:14.3 init ...
1543 03:27:51.417504 PCI: 00:14.3 init finished in 2270 usecs
1544 03:27:51.420854 PCI: 00:15.0 init ...
1545 03:27:51.424229 DW I2C bus 0 at 0xd121f000 (400 KHz)
1546 03:27:51.427736 PCI: 00:15.0 init finished in 5980 usecs
1547 03:27:51.431074 PCI: 00:15.1 init ...
1548 03:27:51.434341 DW I2C bus 1 at 0xd1220000 (400 KHz)
1549 03:27:51.440860 PCI: 00:15.1 init finished in 5978 usecs
1550 03:27:51.440968 PCI: 00:16.0 init ...
1551 03:27:51.447711 PCI: 00:16.0 init finished in 2254 usecs
1552 03:27:51.451087 PCI: 00:19.0 init ...
1553 03:27:51.454268 DW I2C bus 4 at 0xd1222000 (400 KHz)
1554 03:27:51.457529 PCI: 00:19.0 init finished in 5981 usecs
1555 03:27:51.460797 PCI: 00:1d.0 init ...
1556 03:27:51.464025 Initializing PCH PCIe bridge.
1557 03:27:51.467694 PCI: 00:1d.0 init finished in 5287 usecs
1558 03:27:51.470769 PCI: 00:1f.0 init ...
1559 03:27:51.474077 IOAPIC: Initializing IOAPIC at 0xfec00000
1560 03:27:51.480511 IOAPIC: Bootstrap Processor Local APIC = 0x00
1561 03:27:51.480597 IOAPIC: ID = 0x02
1562 03:27:51.484449 IOAPIC: Dumping registers
1563 03:27:51.487429 reg 0x0000: 0x02000000
1564 03:27:51.491004 reg 0x0001: 0x00770020
1565 03:27:51.491089 reg 0x0002: 0x00000000
1566 03:27:51.497279 PCI: 00:1f.0 init finished in 23538 usecs
1567 03:27:51.500304 PCI: 00:1f.4 init ...
1568 03:27:51.503754 PCI: 00:1f.4 init finished in 2263 usecs
1569 03:27:51.514538 PCI: 01:00.0 init ...
1570 03:27:51.517672 PCI: 01:00.0 init finished in 2253 usecs
1571 03:27:51.522200 PNP: 0c09.0 init ...
1572 03:27:51.525088 Google Chrome EC uptime: 11.090 seconds
1573 03:27:51.532496 Google Chrome AP resets since EC boot: 0
1574 03:27:51.535619 Google Chrome most recent AP reset causes:
1575 03:27:51.541733 Google Chrome EC reset flags at last EC boot: reset-pin
1576 03:27:51.545607 PNP: 0c09.0 init finished in 20574 usecs
1577 03:27:51.548114 Devices initialized
1578 03:27:51.552220 Show all devs... After init.
1579 03:27:51.552306 Root Device: enabled 1
1580 03:27:51.554846 CPU_CLUSTER: 0: enabled 1
1581 03:27:51.558003 DOMAIN: 0000: enabled 1
1582 03:27:51.558088 APIC: 00: enabled 1
1583 03:27:51.561497 PCI: 00:00.0: enabled 1
1584 03:27:51.564861 PCI: 00:02.0: enabled 1
1585 03:27:51.568023 PCI: 00:04.0: enabled 0
1586 03:27:51.568109 PCI: 00:05.0: enabled 0
1587 03:27:51.571622 PCI: 00:12.0: enabled 1
1588 03:27:51.574599 PCI: 00:12.5: enabled 0
1589 03:27:51.577784 PCI: 00:12.6: enabled 0
1590 03:27:51.577880 PCI: 00:14.0: enabled 1
1591 03:27:51.581515 PCI: 00:14.1: enabled 0
1592 03:27:51.584304 PCI: 00:14.3: enabled 1
1593 03:27:51.588288 PCI: 00:14.5: enabled 0
1594 03:27:51.588375 PCI: 00:15.0: enabled 1
1595 03:27:51.591051 PCI: 00:15.1: enabled 1
1596 03:27:51.594480 PCI: 00:15.2: enabled 0
1597 03:27:51.597539 PCI: 00:15.3: enabled 0
1598 03:27:51.597629 PCI: 00:16.0: enabled 1
1599 03:27:51.600886 PCI: 00:16.1: enabled 0
1600 03:27:51.604403 PCI: 00:16.2: enabled 0
1601 03:27:51.604489 PCI: 00:16.3: enabled 0
1602 03:27:51.607913 PCI: 00:16.4: enabled 0
1603 03:27:51.611101 PCI: 00:16.5: enabled 0
1604 03:27:51.613970 PCI: 00:17.0: enabled 1
1605 03:27:51.614057 PCI: 00:19.0: enabled 1
1606 03:27:51.617887 PCI: 00:19.1: enabled 0
1607 03:27:51.620784 PCI: 00:19.2: enabled 0
1608 03:27:51.624143 PCI: 00:1a.0: enabled 0
1609 03:27:51.624229 PCI: 00:1c.0: enabled 0
1610 03:27:51.627361 PCI: 00:1c.1: enabled 0
1611 03:27:51.630725 PCI: 00:1c.2: enabled 0
1612 03:27:51.633774 PCI: 00:1c.3: enabled 0
1613 03:27:51.633860 PCI: 00:1c.4: enabled 0
1614 03:27:51.637917 PCI: 00:1c.5: enabled 0
1615 03:27:51.640931 PCI: 00:1c.6: enabled 0
1616 03:27:51.643899 PCI: 00:1c.7: enabled 0
1617 03:27:51.643985 PCI: 00:1d.0: enabled 1
1618 03:27:51.647508 PCI: 00:1d.1: enabled 0
1619 03:27:51.650374 PCI: 00:1d.2: enabled 0
1620 03:27:51.650460 PCI: 00:1d.3: enabled 0
1621 03:27:51.653895 PCI: 00:1d.4: enabled 0
1622 03:27:51.657281 PCI: 00:1d.5: enabled 0
1623 03:27:51.660220 PCI: 00:1e.0: enabled 1
1624 03:27:51.660305 PCI: 00:1e.1: enabled 0
1625 03:27:51.663702 PCI: 00:1e.2: enabled 1
1626 03:27:51.667300 PCI: 00:1e.3: enabled 1
1627 03:27:51.670063 PCI: 00:1f.0: enabled 1
1628 03:27:51.670149 PCI: 00:1f.1: enabled 0
1629 03:27:51.673797 PCI: 00:1f.2: enabled 0
1630 03:27:51.676882 PCI: 00:1f.3: enabled 1
1631 03:27:51.680994 PCI: 00:1f.4: enabled 1
1632 03:27:51.681081 PCI: 00:1f.5: enabled 1
1633 03:27:51.683277 PCI: 00:1f.6: enabled 0
1634 03:27:51.686636 USB0 port 0: enabled 1
1635 03:27:51.686722 I2C: 01:15: enabled 1
1636 03:27:51.690063 I2C: 02:5d: enabled 1
1637 03:27:51.693125 GENERIC: 0.0: enabled 1
1638 03:27:51.696529 I2C: 03:1a: enabled 1
1639 03:27:51.696615 I2C: 03:38: enabled 1
1640 03:27:51.700147 I2C: 03:39: enabled 1
1641 03:27:51.703398 I2C: 03:3a: enabled 1
1642 03:27:51.703483 I2C: 03:3b: enabled 1
1643 03:27:51.706628 PCI: 00:00.0: enabled 1
1644 03:27:51.710273 SPI: 00: enabled 1
1645 03:27:51.710401 SPI: 01: enabled 1
1646 03:27:51.712825 PNP: 0c09.0: enabled 1
1647 03:27:51.716297 USB2 port 0: enabled 1
1648 03:27:51.716383 USB2 port 1: enabled 1
1649 03:27:51.719915 USB2 port 2: enabled 0
1650 03:27:51.722927 USB2 port 3: enabled 0
1651 03:27:51.723012 USB2 port 5: enabled 0
1652 03:27:51.726513 USB2 port 6: enabled 1
1653 03:27:51.729503 USB2 port 9: enabled 1
1654 03:27:51.733069 USB3 port 0: enabled 1
1655 03:27:51.733145 USB3 port 1: enabled 1
1656 03:27:51.736615 USB3 port 2: enabled 1
1657 03:27:51.739601 USB3 port 3: enabled 1
1658 03:27:51.739679 USB3 port 4: enabled 0
1659 03:27:51.742894 APIC: 02: enabled 1
1660 03:27:51.746029 APIC: 03: enabled 1
1661 03:27:51.746114 APIC: 01: enabled 1
1662 03:27:51.749318 APIC: 04: enabled 1
1663 03:27:51.752840 APIC: 05: enabled 1
1664 03:27:51.752918 APIC: 07: enabled 1
1665 03:27:51.756133 APIC: 06: enabled 1
1666 03:27:51.756210 PCI: 00:08.0: enabled 1
1667 03:27:51.759027 PCI: 00:14.2: enabled 1
1668 03:27:51.762488 PCI: 01:00.0: enabled 1
1669 03:27:51.766352 Disabling ACPI via APMC:
1670 03:27:51.770280 done.
1671 03:27:51.772426 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1672 03:27:51.776141 ELOG: NV offset 0xaf0000 size 0x4000
1673 03:27:51.783328 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1674 03:27:51.790435 ELOG: Event(17) added with size 13 at 2022-07-07 03:24:51 UTC
1675 03:27:51.796713 ELOG: Event(92) added with size 9 at 2022-07-07 03:24:51 UTC
1676 03:27:51.803514 ELOG: Event(16) added with size 11 at 2022-07-07 03:24:51 UTC
1677 03:27:51.806698 Erasing flash addr af0000 + 4 KiB
1678 03:27:51.876957 ELOG: Event(93) added with size 9 at 2022-07-07 03:24:51 UTC
1679 03:27:51.883619 ELOG: Event(9A) added with size 9 at 2022-07-07 03:24:51 UTC
1680 03:27:51.890591 ELOG: Event(9E) added with size 10 at 2022-07-07 03:24:51 UTC
1681 03:27:51.897122 ELOG: Event(9F) added with size 14 at 2022-07-07 03:24:51 UTC
1682 03:27:51.903410 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 61
1683 03:27:51.909782 ELOG: Event(A1) added with size 10 at 2022-07-07 03:24:51 UTC
1684 03:27:51.916690 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1685 03:27:51.923578 ELOG: Event(A0) added with size 9 at 2022-07-07 03:24:51 UTC
1686 03:27:51.926382 elog_add_boot_reason: Logged dev mode boot
1687 03:27:51.929507 Finalize devices...
1688 03:27:51.932891 PCI: 00:17.0 final
1689 03:27:51.932998 Devices finalized
1690 03:27:51.940002 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1691 03:27:51.942916 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1692 03:27:51.949769 ME: HFSTS1 : 0x90000245
1693 03:27:51.953465 ME: HFSTS2 : 0x3B850126
1694 03:27:51.956244 ME: HFSTS3 : 0x00000020
1695 03:27:51.959496 ME: HFSTS4 : 0x00004800
1696 03:27:51.963082 ME: HFSTS5 : 0x00000000
1697 03:27:51.969848 ME: HFSTS6 : 0x40400006
1698 03:27:51.973183 ME: Manufacturing Mode : NO
1699 03:27:51.976245 ME: FW Partition Table : OK
1700 03:27:51.979705 ME: Bringup Loader Failure : NO
1701 03:27:51.982789 ME: Firmware Init Complete : YES
1702 03:27:51.985943 ME: Boot Options Present : NO
1703 03:27:51.990120 ME: Update In Progress : NO
1704 03:27:51.993061 ME: D0i3 Support : YES
1705 03:27:51.995979 ME: Low Power State Enabled : NO
1706 03:27:51.999260 ME: CPU Replaced : NO
1707 03:27:52.002372 ME: CPU Replacement Valid : YES
1708 03:27:52.006038 ME: Current Working State : 5
1709 03:27:52.009342 ME: Current Operation State : 1
1710 03:27:52.012824 ME: Current Operation Mode : 0
1711 03:27:52.016073 ME: Error Code : 0
1712 03:27:52.019390 ME: CPU Debug Disabled : YES
1713 03:27:52.022235 ME: TXT Support : NO
1714 03:27:52.025605 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1715 03:27:52.032816 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1716 03:27:52.035517 CBFS @ c08000 size 3f8000
1717 03:27:52.041937 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1718 03:27:52.045692 CBFS: Locating 'fallback/dsdt.aml'
1719 03:27:52.048821 CBFS: Found @ offset 10bb80 size 3fa5
1720 03:27:52.052248 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 03:27:52.055407 CBFS @ c08000 size 3f8000
1722 03:27:52.062273 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 03:27:52.065240 CBFS: Locating 'fallback/slic'
1724 03:27:52.068508 CBFS: 'fallback/slic' not found.
1725 03:27:52.076226 ACPI: Writing ACPI tables at 99b3e000.
1726 03:27:52.076315 ACPI: * FACS
1727 03:27:52.078873 ACPI: * DSDT
1728 03:27:52.082154 Ramoops buffer: 0x100000@0x99a3d000.
1729 03:27:52.085798 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1730 03:27:52.092061 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1731 03:27:52.094985 Google Chrome EC: version:
1732 03:27:52.098967 ro: helios_v2.0.2659-56403530b
1733 03:27:52.101645 rw: helios_v2.0.2849-c41de27e7d
1734 03:27:52.101732 running image: 1
1735 03:27:52.106241 ACPI: * FADT
1736 03:27:52.106328 SCI is IRQ9
1737 03:27:52.112625 ACPI: added table 1/32, length now 40
1738 03:27:52.112712 ACPI: * SSDT
1739 03:27:52.115815 Found 1 CPU(s) with 8 core(s) each.
1740 03:27:52.119711 Error: Could not locate 'wifi_sar' in VPD.
1741 03:27:52.126155 Checking CBFS for default SAR values
1742 03:27:52.129308 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1743 03:27:52.132323 CBFS @ c08000 size 3f8000
1744 03:27:52.138962 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1745 03:27:52.142214 CBFS: Locating 'wifi_sar_defaults.hex'
1746 03:27:52.145889 CBFS: Found @ offset 5fac0 size 77
1747 03:27:52.149214 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1748 03:27:52.155551 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1749 03:27:52.158994 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1750 03:27:52.165863 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1751 03:27:52.168572 failed to find key in VPD: dsm_calib_r0_0
1752 03:27:52.178907 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1753 03:27:52.181866 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1754 03:27:52.188789 failed to find key in VPD: dsm_calib_r0_1
1755 03:27:52.195031 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1756 03:27:52.202099 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1757 03:27:52.205638 failed to find key in VPD: dsm_calib_r0_2
1758 03:27:52.215015 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1759 03:27:52.218805 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1760 03:27:52.225365 failed to find key in VPD: dsm_calib_r0_3
1761 03:27:52.231722 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1762 03:27:52.238276 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1763 03:27:52.241270 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1764 03:27:52.248239 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1765 03:27:52.251397 EC returned error result code 1
1766 03:27:52.255366 EC returned error result code 1
1767 03:27:52.258458 EC returned error result code 1
1768 03:27:52.261753 PS2K: Bad resp from EC. Vivaldi disabled!
1769 03:27:52.268828 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1770 03:27:52.275383 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1771 03:27:52.278412 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1772 03:27:52.285412 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1773 03:27:52.288358 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1774 03:27:52.295218 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1775 03:27:52.301219 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1776 03:27:52.308622 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1777 03:27:52.311787 ACPI: added table 2/32, length now 44
1778 03:27:52.311871 ACPI: * MCFG
1779 03:27:52.318246 ACPI: added table 3/32, length now 48
1780 03:27:52.318334 ACPI: * TPM2
1781 03:27:52.321465 TPM2 log created at 99a2d000
1782 03:27:52.324493 ACPI: added table 4/32, length now 52
1783 03:27:52.327933 ACPI: * MADT
1784 03:27:52.328020 SCI is IRQ9
1785 03:27:52.331244 ACPI: added table 5/32, length now 56
1786 03:27:52.334279 current = 99b43ac0
1787 03:27:52.334366 ACPI: * DMAR
1788 03:27:52.337696 ACPI: added table 6/32, length now 60
1789 03:27:52.341298 ACPI: * IGD OpRegion
1790 03:27:52.344410 GMA: Found VBT in CBFS
1791 03:27:52.348150 GMA: Found valid VBT in CBFS
1792 03:27:52.351377 ACPI: added table 7/32, length now 64
1793 03:27:52.351464 ACPI: * HPET
1794 03:27:52.357419 ACPI: added table 8/32, length now 68
1795 03:27:52.357507 ACPI: done.
1796 03:27:52.361054 ACPI tables: 31744 bytes.
1797 03:27:52.363980 smbios_write_tables: 99a2c000
1798 03:27:52.367911 EC returned error result code 3
1799 03:27:52.370652 Couldn't obtain OEM name from CBI
1800 03:27:52.374676 Create SMBIOS type 17
1801 03:27:52.377612 PCI: 00:00.0 (Intel Cannonlake)
1802 03:27:52.377700 PCI: 00:14.3 (Intel WiFi)
1803 03:27:52.380426 SMBIOS tables: 939 bytes.
1804 03:27:52.384580 Writing table forward entry at 0x00000500
1805 03:27:52.390543 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1806 03:27:52.393781 Writing coreboot table at 0x99b62000
1807 03:27:52.400608 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1808 03:27:52.407005 1. 0000000000001000-000000000009ffff: RAM
1809 03:27:52.410330 2. 00000000000a0000-00000000000fffff: RESERVED
1810 03:27:52.413617 3. 0000000000100000-0000000099a2bfff: RAM
1811 03:27:52.420371 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1812 03:27:52.423524 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1813 03:27:52.430480 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1814 03:27:52.436835 7. 000000009a000000-000000009f7fffff: RESERVED
1815 03:27:52.440002 8. 00000000e0000000-00000000efffffff: RESERVED
1816 03:27:52.447184 9. 00000000fc000000-00000000fc000fff: RESERVED
1817 03:27:52.450321 10. 00000000fe000000-00000000fe00ffff: RESERVED
1818 03:27:52.453629 11. 00000000fed10000-00000000fed17fff: RESERVED
1819 03:27:52.460332 12. 00000000fed80000-00000000fed83fff: RESERVED
1820 03:27:52.463332 13. 00000000fed90000-00000000fed91fff: RESERVED
1821 03:27:52.470673 14. 00000000feda0000-00000000feda1fff: RESERVED
1822 03:27:52.473504 15. 0000000100000000-000000045e7fffff: RAM
1823 03:27:52.476540 Graphics framebuffer located at 0xc0000000
1824 03:27:52.480255 Passing 5 GPIOs to payload:
1825 03:27:52.486656 NAME | PORT | POLARITY | VALUE
1826 03:27:52.489751 write protect | undefined | high | low
1827 03:27:52.496497 lid | undefined | high | high
1828 03:27:52.503396 power | undefined | high | low
1829 03:27:52.506605 oprom | undefined | high | low
1830 03:27:52.513235 EC in RW | 0x000000cb | high | low
1831 03:27:52.513321 Board ID: 4
1832 03:27:52.519555 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1833 03:27:52.522979 CBFS @ c08000 size 3f8000
1834 03:27:52.526036 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1835 03:27:52.532759 Wrote coreboot table at: 99b62000, 0x594 bytes, checksum d4d
1836 03:27:52.535843 coreboot table: 1452 bytes.
1837 03:27:52.539784 IMD ROOT 0. 99fff000 00001000
1838 03:27:52.542696 IMD SMALL 1. 99ffe000 00001000
1839 03:27:52.546001 FSP MEMORY 2. 99c4e000 003b0000
1840 03:27:52.549398 CONSOLE 3. 99c2e000 00020000
1841 03:27:52.552826 FMAP 4. 99c2d000 0000054e
1842 03:27:52.556279 TIME STAMP 5. 99c2c000 00000910
1843 03:27:52.559213 VBOOT WORK 6. 99c18000 00014000
1844 03:27:52.562586 MRC DATA 7. 99c16000 00001958
1845 03:27:52.565491 ROMSTG STCK 8. 99c15000 00001000
1846 03:27:52.569001 AFTER CAR 9. 99c0b000 0000a000
1847 03:27:52.572232 RAMSTAGE 10. 99baf000 0005c000
1848 03:27:52.576599 REFCODE 11. 99b7a000 00035000
1849 03:27:52.579065 SMM BACKUP 12. 99b6a000 00010000
1850 03:27:52.582107 COREBOOT 13. 99b62000 00008000
1851 03:27:52.586129 ACPI 14. 99b3e000 00024000
1852 03:27:52.589373 ACPI GNVS 15. 99b3d000 00001000
1853 03:27:52.592326 RAMOOPS 16. 99a3d000 00100000
1854 03:27:52.595648 TPM2 TCGLOG17. 99a2d000 00010000
1855 03:27:52.598925 SMBIOS 18. 99a2c000 00000800
1856 03:27:52.602177 IMD small region:
1857 03:27:52.606121 IMD ROOT 0. 99ffec00 00000400
1858 03:27:52.609101 FSP RUNTIME 1. 99ffebe0 00000004
1859 03:27:52.611969 EC HOSTEVENT 2. 99ffebc0 00000008
1860 03:27:52.615194 POWER STATE 3. 99ffeb80 00000040
1861 03:27:52.618800 ROMSTAGE 4. 99ffeb60 00000004
1862 03:27:52.622358 MEM INFO 5. 99ffe9a0 000001b9
1863 03:27:52.625844 MTRR: Physical address space:
1864 03:27:52.632125 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1865 03:27:52.638378 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1866 03:27:52.645637 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1867 03:27:52.652475 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1868 03:27:52.655428 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1869 03:27:52.662131 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1870 03:27:52.668492 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1871 03:27:52.672100 MTRR: Fixed MSR 0x250 0x0606060606060606
1872 03:27:52.678008 MTRR: Fixed MSR 0x258 0x0606060606060606
1873 03:27:52.681480 MTRR: Fixed MSR 0x259 0x0000000000000000
1874 03:27:52.685048 MTRR: Fixed MSR 0x268 0x0606060606060606
1875 03:27:52.688234 MTRR: Fixed MSR 0x269 0x0606060606060606
1876 03:27:52.694776 MTRR: Fixed MSR 0x26a 0x0606060606060606
1877 03:27:52.697929 MTRR: Fixed MSR 0x26b 0x0606060606060606
1878 03:27:52.701203 MTRR: Fixed MSR 0x26c 0x0606060606060606
1879 03:27:52.704538 MTRR: Fixed MSR 0x26d 0x0606060606060606
1880 03:27:52.711403 MTRR: Fixed MSR 0x26e 0x0606060606060606
1881 03:27:52.714444 MTRR: Fixed MSR 0x26f 0x0606060606060606
1882 03:27:52.717642 call enable_fixed_mtrr()
1883 03:27:52.721233 CPU physical address size: 39 bits
1884 03:27:52.724473 MTRR: default type WB/UC MTRR counts: 6/8.
1885 03:27:52.727600 MTRR: WB selected as default type.
1886 03:27:52.734460 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1887 03:27:52.741217 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1888 03:27:52.747741 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1889 03:27:52.754440 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1890 03:27:52.761250 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1891 03:27:52.767271 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1892 03:27:52.770837 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 03:27:52.774389 MTRR: Fixed MSR 0x258 0x0606060606060606
1894 03:27:52.780366 MTRR: Fixed MSR 0x259 0x0000000000000000
1895 03:27:52.783902 MTRR: Fixed MSR 0x268 0x0606060606060606
1896 03:27:52.787053 MTRR: Fixed MSR 0x269 0x0606060606060606
1897 03:27:52.790723 MTRR: Fixed MSR 0x26a 0x0606060606060606
1898 03:27:52.797322 MTRR: Fixed MSR 0x26b 0x0606060606060606
1899 03:27:52.800256 MTRR: Fixed MSR 0x26c 0x0606060606060606
1900 03:27:52.803660 MTRR: Fixed MSR 0x26d 0x0606060606060606
1901 03:27:52.806764 MTRR: Fixed MSR 0x26e 0x0606060606060606
1902 03:27:52.810938 MTRR: Fixed MSR 0x26f 0x0606060606060606
1903 03:27:52.817172 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 03:27:52.820969 call enable_fixed_mtrr()
1905 03:27:52.823658 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 03:27:52.826610 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 03:27:52.830935 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 03:27:52.836892 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 03:27:52.839870 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 03:27:52.843235 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 03:27:52.847337 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 03:27:52.850200 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 03:27:52.857108 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 03:27:52.860023 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 03:27:52.863423 CPU physical address size: 39 bits
1916 03:27:52.866580 call enable_fixed_mtrr()
1917 03:27:52.869508 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 03:27:52.872772 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 03:27:52.879384 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 03:27:52.882711 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 03:27:52.886061 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 03:27:52.889910 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 03:27:52.896346 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 03:27:52.899754 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 03:27:52.903198 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 03:27:52.905943 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 03:27:52.913003 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 03:27:52.916196 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 03:27:52.919355 call enable_fixed_mtrr()
1930 03:27:52.922680 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 03:27:52.925851 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 03:27:52.929452 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 03:27:52.935847 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 03:27:52.938881 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 03:27:52.942486 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 03:27:52.946926 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 03:27:52.952254 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 03:27:52.955881 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 03:27:52.959799 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 03:27:52.963106 CPU physical address size: 39 bits
1941 03:27:52.966094 call enable_fixed_mtrr()
1942 03:27:52.966179
1943 03:27:52.966247 MTRR check
1944 03:27:52.968884 Fixed MTRRs : Enabled
1945 03:27:52.972636 Variable MTRRs: Enabled
1946 03:27:52.972721
1947 03:27:52.975493 MTRR: Fixed MSR 0x250 0x0606060606060606
1948 03:27:52.978922 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 03:27:52.985976 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 03:27:52.988596 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 03:27:52.992125 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 03:27:52.995682 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 03:27:53.002476 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 03:27:53.005887 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 03:27:53.008431 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 03:27:53.013205 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 03:27:53.018712 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 03:27:53.021968 MTRR: Fixed MSR 0x250 0x0606060606060606
1959 03:27:53.025469 call enable_fixed_mtrr()
1960 03:27:53.028415 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 03:27:53.032549 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 03:27:53.035051 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 03:27:53.041502 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 03:27:53.044805 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 03:27:53.048422 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 03:27:53.051914 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 03:27:53.058111 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 03:27:53.061802 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 03:27:53.064882 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 03:27:53.068485 CPU physical address size: 39 bits
1971 03:27:53.071351 call enable_fixed_mtrr()
1972 03:27:53.074608 CPU physical address size: 39 bits
1973 03:27:53.078769 CPU physical address size: 39 bits
1974 03:27:53.085163 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1975 03:27:53.088601 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 03:27:53.094520 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1977 03:27:53.097712 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 03:27:53.101670 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 03:27:53.104983 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 03:27:53.111178 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 03:27:53.114347 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 03:27:53.117669 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 03:27:53.121157 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 03:27:53.124374 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 03:27:53.130818 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 03:27:53.134300 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 03:27:53.137907 CBFS @ c08000 size 3f8000
1988 03:27:53.144725 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1989 03:27:53.144813 call enable_fixed_mtrr()
1990 03:27:53.147559 CBFS: Locating 'fallback/payload'
1991 03:27:53.150627 CPU physical address size: 39 bits
1992 03:27:53.157295 CBFS: Found @ offset 1c96c0 size 3f798
1993 03:27:53.160877 CPU physical address size: 39 bits
1994 03:27:53.164258 Checking segment from ROM address 0xffdd16f8
1995 03:27:53.171092 Checking segment from ROM address 0xffdd1714
1996 03:27:53.173782 Loading segment from ROM address 0xffdd16f8
1997 03:27:53.177092 code (compression=0)
1998 03:27:53.183916 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1999 03:27:53.194531 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2000 03:27:53.194620 it's not compressed!
2001 03:27:53.287240 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2002 03:27:53.293572 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2003 03:27:53.297427 Loading segment from ROM address 0xffdd1714
2004 03:27:53.300036 Entry Point 0x30000000
2005 03:27:53.303990 Loaded segments
2006 03:27:53.309396 Finalizing chipset.
2007 03:27:53.312838 Finalizing SMM.
2008 03:27:53.315837 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2009 03:27:53.319102 mp_park_aps done after 0 msecs.
2010 03:27:53.326473 Jumping to boot code at 30000000(99b62000)
2011 03:27:53.332244 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2012 03:27:53.332331
2013 03:27:53.335824 Starting depthcharge on Helios...
2014 03:27:53.336183 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2015 03:27:53.336294 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2016 03:27:53.336380 Setting prompt string to ['hatch:']
2017 03:27:53.336460 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2018 03:27:53.345524 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2019 03:27:53.352176 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2020 03:27:53.358776 board_setup: Info: eMMC controller not present; skipping
2021 03:27:53.362119 New NVMe Controller 0x30053ac0 @ 00:1d:00
2022 03:27:53.368493 board_setup: Info: SDHCI controller not present; skipping
2023 03:27:53.375446 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 03:27:53.375531 Wipe memory regions:
2025 03:27:53.378560 [0x00000000001000, 0x000000000a0000)
2026 03:27:53.381903 [0x00000000100000, 0x00000030000000)
2027 03:27:53.451771 [0x00000030657430, 0x00000099a2c000)
2028 03:27:53.599449 [0x00000100000000, 0x0000045e800000)
2029 03:27:54.986715 R8152: Initializing
2030 03:27:54.990008 Version 9 (ocp_data = 6010)
2031 03:27:54.995050 R8152: Done initializing
2032 03:27:54.997429 Adding net device
2033 03:27:55.495041 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2034 03:27:55.495176
2035 03:27:55.495458 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2037 03:27:55.596226 hatch: tftpboot 192.168.201.1 6770200/tftp-deploy-sy7wv33r/kernel/bzImage 6770200/tftp-deploy-sy7wv33r/kernel/cmdline 6770200/tftp-deploy-sy7wv33r/ramdisk/ramdisk.cpio.gz
2038 03:27:55.596387 Setting prompt string to ['Starting kernel']
2039 03:27:55.596465 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2040 03:27:55.596579 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:39)
2041 03:27:55.601000 tftpboot 192.168.201.1 6770200/tftp-deploy-sy7wv33r/kernel/bzImoy-sy7wv33r/kernel/cmdline 6770200/tftp-deploy-sy7wv33r/ramdisk/ramdisk.cpio.gz
2042 03:27:55.601128 Waiting for link
2043 03:27:55.801841 done.
2044 03:27:55.801991 MAC: f4:f5:e8:50:dc:f7
2045 03:27:55.805129 Sending DHCP discover... done.
2046 03:27:55.808505 Waiting for reply... done.
2047 03:27:55.811712 Sending DHCP request... done.
2048 03:27:55.815266 Waiting for reply... done.
2049 03:27:55.818581 My ip is 192.168.201.10
2050 03:27:55.821333 The DHCP server ip is 192.168.201.1
2051 03:27:55.827886 TFTP server IP predefined by user: 192.168.201.1
2052 03:27:55.834412 Bootfile predefined by user: 6770200/tftp-deploy-sy7wv33r/kernel/bzImage
2053 03:27:55.837920 Sending tftp read request... done.
2054 03:27:55.840928 Waiting for the transfer...
2055 03:27:56.081551 00000000 ################################################################
2056 03:27:56.319001 00080000 ################################################################
2057 03:27:56.565067 00100000 ################################################################
2058 03:27:56.797256 00180000 ################################################################
2059 03:27:57.029869 00200000 ################################################################
2060 03:27:57.260529 00280000 ################################################################
2061 03:27:57.505936 00300000 ################################################################
2062 03:27:57.751464 00380000 ################################################################
2063 03:27:57.993267 00400000 ################################################################
2064 03:27:58.225420 00480000 ################################################################
2065 03:27:58.468461 00500000 ################################################################
2066 03:27:58.712023 00580000 ################################################################
2067 03:27:58.961371 00600000 ################################################################
2068 03:27:59.123050 00680000 ############################################ done.
2069 03:27:59.125632 The bootfile was 7176128 bytes long.
2070 03:27:59.129230 Sending tftp read request... done.
2071 03:27:59.132666 Waiting for the transfer...
2072 03:27:59.361237 00000000 ################################################################
2073 03:27:59.588598 00080000 ################################################################
2074 03:27:59.828507 00100000 ################################################################
2075 03:28:00.074333 00180000 ################################################################
2076 03:28:00.306804 00200000 ################################################################
2077 03:28:00.551642 00280000 ################################################################
2078 03:28:00.790067 00300000 ################################################################
2079 03:28:01.025099 00380000 ################################################################
2080 03:28:01.264079 00400000 ################################################################
2081 03:28:01.499034 00480000 ################################################################
2082 03:28:01.606674 00500000 ############################## done.
2083 03:28:01.609943 Sending tftp read request... done.
2084 03:28:01.613096 Waiting for the transfer...
2085 03:28:01.613190 00000000 # done.
2086 03:28:01.622975 Command line loaded dynamically from TFTP file: 6770200/tftp-deploy-sy7wv33r/kernel/cmdline
2087 03:28:01.649423 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6770200/extract-nfsrootfs-ayzhyno9,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2088 03:28:01.655892 ec_init(0): CrosEC protocol v3 supported (256, 256)
2089 03:28:01.663184 Shutting down all USB controllers.
2090 03:28:01.663275 Removing current net device
2091 03:28:01.667087 Finalizing coreboot
2092 03:28:01.673940 Exiting depthcharge with code 4 at timestamp: 15675681
2093 03:28:01.674028
2094 03:28:01.674099 Starting kernel ...
2095 03:28:01.674166
2096 03:28:01.674485 end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
2097 03:28:01.674589 start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
2098 03:28:01.674677 Setting prompt string to ['Linux version [0-9]']
2099 03:28:01.674752 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2100 03:28:01.674826 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2101 03:28:01.677230
2103 03:32:34.674812 end: 2.2.5 auto-login-action (duration 00:04:33) [common]
2105 03:32:34.675037 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
2107 03:32:34.675207 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2110 03:32:34.675560 end: 2 depthcharge-action (duration 00:05:00) [common]
2112 03:32:34.675767 Cleaning after the job
2113 03:32:34.675868 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770200/tftp-deploy-sy7wv33r/ramdisk
2114 03:32:34.676355 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770200/tftp-deploy-sy7wv33r/kernel
2115 03:32:34.676900 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770200/tftp-deploy-sy7wv33r/nfsrootfs
2116 03:32:34.716657 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770200/tftp-deploy-sy7wv33r/modules
2117 03:32:34.716984 start: 4.1 power-off (timeout 00:00:30) [common]
2118 03:32:34.717173 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2119 03:32:34.736785 >> Command sent successfully.
2120 03:32:34.738768 Returned 0 in 0 seconds
2121 03:32:34.839558 end: 4.1 power-off (duration 00:00:00) [common]
2123 03:32:34.839895 start: 4.2 read-feedback (timeout 00:10:00) [common]
2124 03:32:34.840142 Listened to connection for namespace 'common' for up to 1s
2125 03:32:35.845073 Finalising connection for namespace 'common'
2126 03:32:35.845251 Disconnecting from shell: Finalise
2127 03:32:35.945979 end: 4.2 read-feedback (duration 00:00:01) [common]
2128 03:32:35.946149 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6770200
2129 03:32:36.123714 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6770200
2130 03:32:36.123903 JobError: Your job cannot terminate cleanly.