Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 03:26:24.762835 lava-dispatcher, installed at version: 2022.04
2 03:26:24.763057 start: 0 validate
3 03:26:24.763191 Start time: 2022-07-07 03:26:24.763184+00:00 (UTC)
4 03:26:24.763328 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:26:24.763462 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220610.0%2Famd64%2Finitrd.cpio.gz exists
6 03:26:25.053008 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:26:25.053403 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.9.196-8580-gf266375ffc61%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:26:25.339474 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:26:25.339645 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220610.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 03:26:25.629854 Using caching service: 'http://localhost/cache/?uri=%s'
11 03:26:25.630021 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.9.196-8580-gf266375ffc61%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 03:26:25.916207 validate duration: 1.15
14 03:26:25.916510 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 03:26:25.916611 start: 1.1 download-retry (timeout 00:10:00) [common]
16 03:26:25.916712 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 03:26:25.916812 Not decompressing ramdisk as can be used compressed.
18 03:26:25.916907 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220610.0/amd64/initrd.cpio.gz
19 03:26:25.916975 saving as /var/lib/lava/dispatcher/tmp/6770194/tftp-deploy-4wtpbis9/ramdisk/initrd.cpio.gz
20 03:26:25.917045 total size: 5411079 (5MB)
21 03:26:25.918152 progress 0% (0MB)
22 03:26:25.919761 progress 5% (0MB)
23 03:26:25.921137 progress 10% (0MB)
24 03:26:25.922563 progress 15% (0MB)
25 03:26:25.924128 progress 20% (1MB)
26 03:26:25.925476 progress 25% (1MB)
27 03:26:25.926827 progress 30% (1MB)
28 03:26:25.928215 progress 35% (1MB)
29 03:26:25.929713 progress 40% (2MB)
30 03:26:25.931099 progress 45% (2MB)
31 03:26:25.932445 progress 50% (2MB)
32 03:26:25.933787 progress 55% (2MB)
33 03:26:25.935311 progress 60% (3MB)
34 03:26:25.936663 progress 65% (3MB)
35 03:26:25.938013 progress 70% (3MB)
36 03:26:25.939400 progress 75% (3MB)
37 03:26:25.940902 progress 80% (4MB)
38 03:26:25.942252 progress 85% (4MB)
39 03:26:25.943669 progress 90% (4MB)
40 03:26:25.945018 progress 95% (4MB)
41 03:26:25.946533 progress 100% (5MB)
42 03:26:25.946725 5MB downloaded in 0.03s (173.90MB/s)
43 03:26:25.946880 end: 1.1.1 http-download (duration 00:00:00) [common]
45 03:26:25.947143 end: 1.1 download-retry (duration 00:00:00) [common]
46 03:26:25.947240 start: 1.2 download-retry (timeout 00:10:00) [common]
47 03:26:25.947327 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 03:26:25.947440 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.9.196-8580-gf266375ffc61/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 03:26:25.947508 saving as /var/lib/lava/dispatcher/tmp/6770194/tftp-deploy-4wtpbis9/kernel/bzImage
50 03:26:25.947579 total size: 7176128 (6MB)
51 03:26:25.947641 No compression specified
52 03:26:25.948709 progress 0% (0MB)
53 03:26:25.950510 progress 5% (0MB)
54 03:26:25.952420 progress 10% (0MB)
55 03:26:25.954314 progress 15% (1MB)
56 03:26:25.956165 progress 20% (1MB)
57 03:26:25.958020 progress 25% (1MB)
58 03:26:25.959880 progress 30% (2MB)
59 03:26:25.961718 progress 35% (2MB)
60 03:26:25.963564 progress 40% (2MB)
61 03:26:25.965401 progress 45% (3MB)
62 03:26:25.967293 progress 50% (3MB)
63 03:26:25.969116 progress 55% (3MB)
64 03:26:25.970983 progress 60% (4MB)
65 03:26:25.972801 progress 65% (4MB)
66 03:26:25.974618 progress 70% (4MB)
67 03:26:25.976476 progress 75% (5MB)
68 03:26:25.978309 progress 80% (5MB)
69 03:26:25.980153 progress 85% (5MB)
70 03:26:25.981974 progress 90% (6MB)
71 03:26:25.983833 progress 95% (6MB)
72 03:26:25.985512 progress 100% (6MB)
73 03:26:25.985816 6MB downloaded in 0.04s (179.01MB/s)
74 03:26:25.985978 end: 1.2.1 http-download (duration 00:00:00) [common]
76 03:26:25.986228 end: 1.2 download-retry (duration 00:00:00) [common]
77 03:26:25.986317 start: 1.3 download-retry (timeout 00:10:00) [common]
78 03:26:25.986432 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 03:26:25.986549 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220610.0/amd64/full.rootfs.tar.xz
80 03:26:25.986619 saving as /var/lib/lava/dispatcher/tmp/6770194/tftp-deploy-4wtpbis9/nfsrootfs/full.rootfs.tar
81 03:26:25.986681 total size: 122466332 (116MB)
82 03:26:25.986753 Using unxz to decompress xz
83 03:26:25.990117 progress 0% (0MB)
84 03:26:26.420556 progress 5% (5MB)
85 03:26:26.862726 progress 10% (11MB)
86 03:26:27.307748 progress 15% (17MB)
87 03:26:27.763119 progress 20% (23MB)
88 03:26:28.080325 progress 25% (29MB)
89 03:26:28.417726 progress 30% (35MB)
90 03:26:28.655335 progress 35% (40MB)
91 03:26:28.856423 progress 40% (46MB)
92 03:26:29.199825 progress 45% (52MB)
93 03:26:29.551768 progress 50% (58MB)
94 03:26:29.883321 progress 55% (64MB)
95 03:26:30.230452 progress 60% (70MB)
96 03:26:30.560458 progress 65% (75MB)
97 03:26:30.931693 progress 70% (81MB)
98 03:26:31.327327 progress 75% (87MB)
99 03:26:31.726577 progress 80% (93MB)
100 03:26:31.837229 progress 85% (99MB)
101 03:26:32.002488 progress 90% (105MB)
102 03:26:32.325676 progress 95% (110MB)
103 03:26:32.690643 progress 100% (116MB)
104 03:26:32.696147 116MB downloaded in 6.71s (17.41MB/s)
105 03:26:32.696437 end: 1.3.1 http-download (duration 00:00:07) [common]
107 03:26:32.696735 end: 1.3 download-retry (duration 00:00:07) [common]
108 03:26:32.696828 start: 1.4 download-retry (timeout 00:09:53) [common]
109 03:26:32.696918 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 03:26:32.697036 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.9.196-8580-gf266375ffc61/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 03:26:32.697110 saving as /var/lib/lava/dispatcher/tmp/6770194/tftp-deploy-4wtpbis9/modules/modules.tar
112 03:26:32.697173 total size: 54512 (0MB)
113 03:26:32.697236 Using unxz to decompress xz
114 03:26:32.700605 progress 60% (0MB)
115 03:26:32.700991 progress 100% (0MB)
116 03:26:32.704398 0MB downloaded in 0.01s (7.20MB/s)
117 03:26:32.704630 end: 1.4.1 http-download (duration 00:00:00) [common]
119 03:26:32.704894 end: 1.4 download-retry (duration 00:00:00) [common]
120 03:26:32.704990 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 03:26:32.705086 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 03:26:34.351402 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6770194/extract-nfsrootfs-t2_u0xy4
123 03:26:34.351621 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 03:26:34.351727 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 03:26:34.351871 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku
126 03:26:34.351972 makedir: /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin
127 03:26:34.352057 makedir: /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/tests
128 03:26:34.352139 makedir: /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/results
129 03:26:34.352255 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-add-keys
130 03:26:34.352420 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-add-sources
131 03:26:34.352538 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-background-process-start
132 03:26:34.352651 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-background-process-stop
133 03:26:34.352761 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-common-functions
134 03:26:34.352870 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-echo-ipv4
135 03:26:34.352980 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-install-packages
136 03:26:34.353089 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-installed-packages
137 03:26:34.353196 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-os-build
138 03:26:34.353303 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-probe-channel
139 03:26:34.353412 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-probe-ip
140 03:26:34.353520 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-target-ip
141 03:26:34.353626 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-target-mac
142 03:26:34.353736 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-target-storage
143 03:26:34.353847 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-test-case
144 03:26:34.353958 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-test-event
145 03:26:34.354066 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-test-feedback
146 03:26:34.354173 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-test-raise
147 03:26:34.354279 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-test-reference
148 03:26:34.354402 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-test-runner
149 03:26:34.354556 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-test-set
150 03:26:34.354663 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-test-shell
151 03:26:34.354773 Updating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-install-packages (oe)
152 03:26:34.354886 Updating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/bin/lava-installed-packages (oe)
153 03:26:34.355197 Creating /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/environment
154 03:26:34.355284 LAVA metadata
155 03:26:34.355352 - LAVA_JOB_ID=6770194
156 03:26:34.355416 - LAVA_DISPATCHER_IP=192.168.201.1
157 03:26:34.355518 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 03:26:34.355584 skipped lava-vland-overlay
159 03:26:34.355661 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 03:26:34.355743 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 03:26:34.355806 skipped lava-multinode-overlay
162 03:26:34.355881 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 03:26:34.355963 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 03:26:34.356036 Loading test definitions
165 03:26:34.356129 start: 1.5.2.3.1 git-repo-action (timeout 00:09:52) [common]
166 03:26:34.356215 Using /lava-6770194 at stage 0
167 03:26:34.356315 Fetching tests from https://github.com/kernelci/test-definitions
168 03:26:34.356415 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/0/tests/0_ltp-ipc'
169 03:26:41.015012 Running '/usr/bin/git checkout kernelci.org
170 03:26:41.049220 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 03:26:41.049984 uuid=6770194_1.5.2.3.1 testdef=None
172 03:26:41.050164 end: 1.5.2.3.1 git-repo-action (duration 00:00:07) [common]
174 03:26:41.050436 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
175 03:26:41.051283 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 03:26:41.051561 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
178 03:26:41.052532 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 03:26:41.052812 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
181 03:26:41.053744 runner path: /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/0/tests/0_ltp-ipc test_uuid 6770194_1.5.2.3.1
182 03:26:41.053845 SKIPFILE='skipfile-lkft.yaml'
183 03:26:41.053924 SKIP_INSTALL='true'
184 03:26:41.054004 TST_CMDFILES='ipc'
185 03:26:41.054169 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 03:26:41.054413 Creating lava-test-runner.conf files
188 03:26:41.054495 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6770194/lava-overlay-3_l001ku/lava-6770194/0 for stage 0
189 03:26:41.054600 - 0_ltp-ipc
190 03:26:41.054713 end: 1.5.2.3 test-definition (duration 00:00:07) [common]
191 03:26:41.054817 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
192 03:26:48.232801 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 03:26:48.232971 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
194 03:26:48.233076 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 03:26:48.233178 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
196 03:26:48.233273 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
197 03:26:48.335613 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 03:26:48.335963 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
199 03:26:48.336105 extracting modules file /var/lib/lava/dispatcher/tmp/6770194/tftp-deploy-4wtpbis9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6770194/extract-nfsrootfs-t2_u0xy4
200 03:26:48.340037 extracting modules file /var/lib/lava/dispatcher/tmp/6770194/tftp-deploy-4wtpbis9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6770194/extract-overlay-ramdisk-mwr83lut/ramdisk
201 03:26:48.343711 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 03:26:48.343820 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
203 03:26:48.343906 [common] Applying overlay to NFS
204 03:26:48.343983 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6770194/compress-overlay-6etr5rb8/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6770194/extract-nfsrootfs-t2_u0xy4
205 03:26:48.780843 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 03:26:48.781012 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
207 03:26:48.781108 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 03:26:48.781195 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
209 03:26:48.781314 Building ramdisk /var/lib/lava/dispatcher/tmp/6770194/extract-overlay-ramdisk-mwr83lut/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6770194/extract-overlay-ramdisk-mwr83lut/ramdisk
210 03:26:48.815176 >> 24458 blocks
211 03:26:49.282363 rename /var/lib/lava/dispatcher/tmp/6770194/extract-overlay-ramdisk-mwr83lut/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6770194/tftp-deploy-4wtpbis9/ramdisk/ramdisk.cpio.gz
212 03:26:49.282770 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 03:26:49.282913 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
214 03:26:49.283029 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
215 03:26:49.283154 No mkimage arch provided, not using FIT.
216 03:26:49.283259 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 03:26:49.283351 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 03:26:49.283467 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
219 03:26:49.283579 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
220 03:26:49.283674 No LXC device requested
221 03:26:49.283759 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 03:26:49.283859 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
223 03:26:49.283947 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 03:26:49.284023 Checking files for TFTP limit of 4294967296 bytes.
225 03:26:49.284437 end: 1 tftp-deploy (duration 00:00:23) [common]
226 03:26:49.284542 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 03:26:49.284646 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 03:26:49.284777 substitutions:
229 03:26:49.284863 - {DTB}: None
230 03:26:49.284929 - {INITRD}: 6770194/tftp-deploy-4wtpbis9/ramdisk/ramdisk.cpio.gz
231 03:26:49.285004 - {KERNEL}: 6770194/tftp-deploy-4wtpbis9/kernel/bzImage
232 03:26:49.285066 - {LAVA_MAC}: None
233 03:26:49.285130 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6770194/extract-nfsrootfs-t2_u0xy4
234 03:26:49.285220 - {NFS_SERVER_IP}: 192.168.201.1
235 03:26:49.285280 - {PRESEED_CONFIG}: None
236 03:26:49.285359 - {PRESEED_LOCAL}: None
237 03:26:49.285432 - {RAMDISK}: 6770194/tftp-deploy-4wtpbis9/ramdisk/ramdisk.cpio.gz
238 03:26:49.285491 - {ROOT_PART}: None
239 03:26:49.285556 - {ROOT}: None
240 03:26:49.285617 - {SERVER_IP}: 192.168.201.1
241 03:26:49.285674 - {TEE}: None
242 03:26:49.285731 Parsed boot commands:
243 03:26:49.285801 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 03:26:49.285962 Parsed boot commands: tftpboot 192.168.201.1 6770194/tftp-deploy-4wtpbis9/kernel/bzImage 6770194/tftp-deploy-4wtpbis9/kernel/cmdline 6770194/tftp-deploy-4wtpbis9/ramdisk/ramdisk.cpio.gz
245 03:26:49.286059 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 03:26:49.286158 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 03:26:49.286257 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 03:26:49.286367 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 03:26:49.286444 Not connected, no need to disconnect.
250 03:26:49.286529 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 03:26:49.286622 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 03:26:49.286693 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
253 03:26:49.289630 Setting prompt string to ['lava-test: # ']
254 03:26:49.289966 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 03:26:49.290077 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 03:26:49.290188 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 03:26:49.290283 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 03:26:49.290472 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
259 03:26:49.310180 >> Command sent successfully.
260 03:26:49.312175 Returned 0 in 0 seconds
261 03:26:49.412943 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 03:26:49.413303 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 03:26:49.413404 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 03:26:49.413492 Setting prompt string to 'Starting depthcharge on Helios...'
266 03:26:49.413562 Changing prompt to 'Starting depthcharge on Helios...'
267 03:26:49.413630 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 03:26:49.413900 [Enter `^Ec?' for help]
269 03:26:55.964066
270 03:26:55.964264
271 03:26:55.973901 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 03:26:55.977298 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 03:26:55.983777 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 03:26:55.987053 CPU: AES supported, TXT NOT supported, VT supported
275 03:26:55.993801 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 03:26:56.000303 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 03:26:56.003480 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 03:26:56.006871 VBOOT: Loading verstage.
279 03:26:56.013597 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
280 03:26:56.016616 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 03:26:56.023666 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 03:26:56.026700 CBFS @ c08000 size 3f8000
283 03:26:56.030072 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 03:26:56.033189 CBFS: Locating 'fallback/verstage'
285 03:26:56.039934 CBFS: Found @ offset 10fb80 size 1072c
286 03:26:56.040389
287 03:26:56.040771
288 03:26:56.049768 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 03:26:56.065604 Probing TPM: . done!
290 03:26:56.069013 TPM ready after 0 ms
291 03:26:56.072063 Connected to device vid:did:rid of 1ae0:0028:00
292 03:26:56.082270 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
293 03:26:56.085845 Initialized TPM device CR50 revision 0
294 03:26:56.129963 tlcl_send_startup: Startup return code is 0
295 03:26:56.130085 TPM: setup succeeded
296 03:26:56.142755 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 03:26:56.146578 Chrome EC: UHEPI supported
298 03:26:56.149821 Phase 1
299 03:26:56.152855 FMAP: area GBB found @ c05000 (12288 bytes)
300 03:26:56.159687 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 03:26:56.162800 Phase 2
302 03:26:56.162888 Phase 3
303 03:26:56.165871 FMAP: area GBB found @ c05000 (12288 bytes)
304 03:26:56.172700 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 03:26:56.179462 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
306 03:26:56.182317 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 03:26:56.188921 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 03:26:56.205302 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
309 03:26:56.208364 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 03:26:56.214798 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 03:26:56.219161 Phase 4
312 03:26:56.222538 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
313 03:26:56.232178 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 03:26:56.408484 VB2:vb2_rsa_verify_digest() Digest check failed!
315 03:26:56.415157 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 03:26:56.415260 Saving nvdata
317 03:26:56.418251 Reboot requested (10020007)
318 03:26:56.421834 board_reset() called!
319 03:26:56.421916 full_reset() called!
320 03:27:00.930785
321 03:27:00.930953
322 03:27:00.940655 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 03:27:00.944001 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 03:27:00.950406 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 03:27:00.953667 CPU: AES supported, TXT NOT supported, VT supported
326 03:27:00.960217 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 03:27:00.966800 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 03:27:00.970290 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 03:27:00.973179 VBOOT: Loading verstage.
330 03:27:00.979941 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
331 03:27:00.983353 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 03:27:00.990037 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 03:27:00.992982 CBFS @ c08000 size 3f8000
334 03:27:00.996497 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 03:27:00.999947 CBFS: Locating 'fallback/verstage'
336 03:27:01.006128 CBFS: Found @ offset 10fb80 size 1072c
337 03:27:01.006685
338 03:27:01.007139
339 03:27:01.015971 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 03:27:01.032354 Probing TPM: . done!
341 03:27:01.035385 TPM ready after 0 ms
342 03:27:01.038860 Connected to device vid:did:rid of 1ae0:0028:00
343 03:27:01.049067 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
344 03:27:01.052732 Initialized TPM device CR50 revision 0
345 03:27:01.097504 tlcl_send_startup: Startup return code is 0
346 03:27:01.098001 TPM: setup succeeded
347 03:27:01.109697 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 03:27:01.113647 Chrome EC: UHEPI supported
349 03:27:01.116900 Phase 1
350 03:27:01.120052 FMAP: area GBB found @ c05000 (12288 bytes)
351 03:27:01.126653 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 03:27:01.133143 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 03:27:01.136537 Recovery requested (1009000e)
354 03:27:01.142635 Saving nvdata
355 03:27:01.148652 tlcl_extend: response is 0
356 03:27:01.157295 tlcl_extend: response is 0
357 03:27:01.164376 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 03:27:01.167636 CBFS @ c08000 size 3f8000
359 03:27:01.174163 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 03:27:01.177371 CBFS: Locating 'fallback/romstage'
361 03:27:01.180495 CBFS: Found @ offset 80 size 145fc
362 03:27:01.183594 Accumulated console time in verstage 98 ms
363 03:27:01.183682
364 03:27:01.187127
365 03:27:01.196952 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 03:27:01.203538 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 03:27:01.206561 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 03:27:01.210035 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 03:27:01.216703 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 03:27:01.219963 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 03:27:01.223320 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
372 03:27:01.226388 TCO_STS: 0000 0000
373 03:27:01.229675 GEN_PMCON: e0015238 00000200
374 03:27:01.233310 GBLRST_CAUSE: 00000000 00000000
375 03:27:01.233397 prev_sleep_state 5
376 03:27:01.237052 Boot Count incremented to 25244
377 03:27:01.243531 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 03:27:01.246910 CBFS @ c08000 size 3f8000
379 03:27:01.253535 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 03:27:01.253629 CBFS: Locating 'fspm.bin'
381 03:27:01.260090 CBFS: Found @ offset 5ffc0 size 71000
382 03:27:01.263589 Chrome EC: UHEPI supported
383 03:27:01.270043 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 03:27:01.273541 Probing TPM: done!
385 03:27:01.280266 Connected to device vid:did:rid of 1ae0:0028:00
386 03:27:01.290021 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
387 03:27:01.296783 Initialized TPM device CR50 revision 0
388 03:27:01.306523 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 03:27:01.316089 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 03:27:01.316178 MRC cache found, size 1948
391 03:27:01.319491 bootmode is set to: 2
392 03:27:01.322857 PRMRR disabled by config.
393 03:27:01.325823 SPD INDEX = 1
394 03:27:01.329281 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 03:27:01.332635 CBFS @ c08000 size 3f8000
396 03:27:01.339171 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 03:27:01.339254 CBFS: Locating 'spd.bin'
398 03:27:01.342286 CBFS: Found @ offset 5fb80 size 400
399 03:27:01.346010 SPD: module type is LPDDR3
400 03:27:01.349115 SPD: module part is
401 03:27:01.355643 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 03:27:01.358990 SPD: device width 4 bits, bus width 8 bits
403 03:27:01.362438 SPD: module size is 4096 MB (per channel)
404 03:27:01.365281 memory slot: 0 configuration done.
405 03:27:01.371846 memory slot: 2 configuration done.
406 03:27:01.420565 CBMEM:
407 03:27:01.423602 IMD: root @ 99fff000 254 entries.
408 03:27:01.427033 IMD: root @ 99ffec00 62 entries.
409 03:27:01.430275 External stage cache:
410 03:27:01.433433 IMD: root @ 9abff000 254 entries.
411 03:27:01.436772 IMD: root @ 9abfec00 62 entries.
412 03:27:01.443167 Chrome EC: clear events_b mask to 0x0000000020004000
413 03:27:01.457581 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 03:27:01.468859 tlcl_write: response is 0
415 03:27:01.481992 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 03:27:01.488453 MRC: TPM MRC hash updated successfully.
417 03:27:01.488537 2 DIMMs found
418 03:27:01.491744 SMM Memory Map
419 03:27:01.494999 SMRAM : 0x9a000000 0x1000000
420 03:27:01.498396 Subregion 0: 0x9a000000 0xa00000
421 03:27:01.501731 Subregion 1: 0x9aa00000 0x200000
422 03:27:01.505030 Subregion 2: 0x9ac00000 0x400000
423 03:27:01.508240 top_of_ram = 0x9a000000
424 03:27:01.511281 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 03:27:01.517914 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 03:27:01.521116 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 03:27:01.527672 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 03:27:01.531162 CBFS @ c08000 size 3f8000
429 03:27:01.537773 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 03:27:01.541067 CBFS: Locating 'fallback/postcar'
431 03:27:01.544002 CBFS: Found @ offset 107000 size 4b44
432 03:27:01.550756 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 03:27:01.561062 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 03:27:01.564453 Processing 180 relocs. Offset value of 0x97c0c000
435 03:27:01.572755 Accumulated console time in romstage 286 ms
436 03:27:01.572841
437 03:27:01.572908
438 03:27:01.582850 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 03:27:01.589506 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 03:27:01.592797 CBFS @ c08000 size 3f8000
441 03:27:01.599267 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 03:27:01.602639 CBFS: Locating 'fallback/ramstage'
443 03:27:01.605609 CBFS: Found @ offset 43380 size 1b9e8
444 03:27:01.612361 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 03:27:01.644466 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 03:27:01.650855 Processing 3976 relocs. Offset value of 0x98db0000
447 03:27:01.654343 Accumulated console time in postcar 52 ms
448 03:27:01.654429
449 03:27:01.654498
450 03:27:01.663905 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 03:27:01.670424 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 03:27:01.673723 WARNING: RO_VPD is uninitialized or empty.
453 03:27:01.677306 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 03:27:01.683657 WARNING: RW_VPD is uninitialized or empty.
455 03:27:01.683736 Normal boot.
456 03:27:01.690286 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 03:27:01.693481 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 03:27:01.696923 CBFS @ c08000 size 3f8000
459 03:27:01.703266 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 03:27:01.706684 CBFS: Locating 'cpu_microcode_blob.bin'
461 03:27:01.710209 CBFS: Found @ offset 14700 size 2ec00
462 03:27:01.713316 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 03:27:01.716826 Skip microcode update
464 03:27:01.723314 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 03:27:01.723421 CBFS @ c08000 size 3f8000
466 03:27:01.729741 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 03:27:01.733329 CBFS: Locating 'fsps.bin'
468 03:27:01.736602 CBFS: Found @ offset d1fc0 size 35000
469 03:27:01.762542 Detected 4 core, 8 thread CPU.
470 03:27:01.765788 Setting up SMI for CPU
471 03:27:01.768878 IED base = 0x9ac00000
472 03:27:01.772359 IED size = 0x00400000
473 03:27:01.772445 Will perform SMM setup.
474 03:27:01.778740 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 03:27:01.785415 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 03:27:01.792027 Processing 16 relocs. Offset value of 0x00030000
477 03:27:01.792114 Attempting to start 7 APs
478 03:27:01.798391 Waiting for 10ms after sending INIT.
479 03:27:01.812066 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
480 03:27:01.812155 done.
481 03:27:01.815493 AP: slot 6 apic_id 3.
482 03:27:01.818591 AP: slot 5 apic_id 2.
483 03:27:01.822081 Waiting for 2nd SIPI to complete...done.
484 03:27:01.825410 AP: slot 3 apic_id 5.
485 03:27:01.825496 AP: slot 1 apic_id 4.
486 03:27:01.828813 AP: slot 7 apic_id 6.
487 03:27:01.832063 AP: slot 4 apic_id 7.
488 03:27:01.838761 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 03:27:01.844959 Processing 13 relocs. Offset value of 0x00038000
490 03:27:01.851703 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 03:27:01.855162 Installing SMM handler to 0x9a000000
492 03:27:01.861601 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 03:27:01.868159 Processing 658 relocs. Offset value of 0x9a010000
494 03:27:01.874785 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 03:27:01.878244 Processing 13 relocs. Offset value of 0x9a008000
496 03:27:01.884630 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 03:27:01.891336 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 03:27:01.897720 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 03:27:01.900907 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 03:27:01.907547 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 03:27:01.914077 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 03:27:01.920882 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 03:27:01.927180 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 03:27:01.930674 Clearing SMI status registers
505 03:27:01.930762 SMI_STS: PM1
506 03:27:01.933984 PM1_STS: PWRBTN
507 03:27:01.934069 TCO_STS: SECOND_TO
508 03:27:01.937299 New SMBASE 0x9a000000
509 03:27:01.940303 In relocation handler: CPU 0
510 03:27:01.943816 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 03:27:01.950069 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 03:27:01.950155 Relocation complete.
513 03:27:01.953537 New SMBASE 0x99fff800
514 03:27:01.956943 In relocation handler: CPU 2
515 03:27:01.960030 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
516 03:27:01.966537 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 03:27:01.966623 Relocation complete.
518 03:27:01.970121 New SMBASE 0x99fff000
519 03:27:01.973392 In relocation handler: CPU 4
520 03:27:01.976628 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
521 03:27:01.983204 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 03:27:01.983291 Relocation complete.
523 03:27:01.986498 New SMBASE 0x99ffe400
524 03:27:01.989782 In relocation handler: CPU 7
525 03:27:01.993078 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
526 03:27:01.999449 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 03:27:01.999535 Relocation complete.
528 03:27:02.002880 New SMBASE 0x99ffec00
529 03:27:02.005842 In relocation handler: CPU 5
530 03:27:02.009430 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
531 03:27:02.015757 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 03:27:02.015863 Relocation complete.
533 03:27:02.019203 New SMBASE 0x99ffe800
534 03:27:02.022264 In relocation handler: CPU 6
535 03:27:02.025857 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
536 03:27:02.032138 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 03:27:02.032281 Relocation complete.
538 03:27:02.035381 New SMBASE 0x99fffc00
539 03:27:02.038870 In relocation handler: CPU 1
540 03:27:02.042081 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
541 03:27:02.048867 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 03:27:02.049221 Relocation complete.
543 03:27:02.052052 New SMBASE 0x99fff400
544 03:27:02.055493 In relocation handler: CPU 3
545 03:27:02.058937 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
546 03:27:02.065316 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 03:27:02.065755 Relocation complete.
548 03:27:02.068631 Initializing CPU #0
549 03:27:02.071991 CPU: vendor Intel device 806ec
550 03:27:02.075152 CPU: family 06, model 8e, stepping 0c
551 03:27:02.078243 Clearing out pending MCEs
552 03:27:02.081574 Setting up local APIC...
553 03:27:02.081660 apic_id: 0x00 done.
554 03:27:02.084586 Turbo is available but hidden
555 03:27:02.088329 Turbo is available and visible
556 03:27:02.091553 VMX status: enabled
557 03:27:02.094790 IA32_FEATURE_CONTROL status: locked
558 03:27:02.094875 Skip microcode update
559 03:27:02.097968 CPU #0 initialized
560 03:27:02.101282 Initializing CPU #2
561 03:27:02.101368 Initializing CPU #4
562 03:27:02.104632 Initializing CPU #6
563 03:27:02.108113 Initializing CPU #3
564 03:27:02.108198 Initializing CPU #1
565 03:27:02.111439 CPU: vendor Intel device 806ec
566 03:27:02.114396 CPU: family 06, model 8e, stepping 0c
567 03:27:02.117801 CPU: vendor Intel device 806ec
568 03:27:02.120940 CPU: family 06, model 8e, stepping 0c
569 03:27:02.124580 Clearing out pending MCEs
570 03:27:02.127526 Clearing out pending MCEs
571 03:27:02.131046 Setting up local APIC...
572 03:27:02.134265 CPU: vendor Intel device 806ec
573 03:27:02.137765 CPU: family 06, model 8e, stepping 0c
574 03:27:02.140607 CPU: vendor Intel device 806ec
575 03:27:02.143885 CPU: family 06, model 8e, stepping 0c
576 03:27:02.147278 Clearing out pending MCEs
577 03:27:02.150868 Clearing out pending MCEs
578 03:27:02.150990 Initializing CPU #7
579 03:27:02.153953 Setting up local APIC...
580 03:27:02.157256 Initializing CPU #5
581 03:27:02.157341 CPU: vendor Intel device 806ec
582 03:27:02.163888 CPU: family 06, model 8e, stepping 0c
583 03:27:02.167113 CPU: vendor Intel device 806ec
584 03:27:02.170405 CPU: family 06, model 8e, stepping 0c
585 03:27:02.173874 Clearing out pending MCEs
586 03:27:02.173960 Clearing out pending MCEs
587 03:27:02.177067 Setting up local APIC...
588 03:27:02.180460 Setting up local APIC...
589 03:27:02.183671 Setting up local APIC...
590 03:27:02.186949 CPU: vendor Intel device 806ec
591 03:27:02.190107 CPU: family 06, model 8e, stepping 0c
592 03:27:02.193593 Clearing out pending MCEs
593 03:27:02.193679 apic_id: 0x07 done.
594 03:27:02.196787 Setting up local APIC...
595 03:27:02.200060 apic_id: 0x01 done.
596 03:27:02.200140 apic_id: 0x02 done.
597 03:27:02.203552 apic_id: 0x03 done.
598 03:27:02.206749 VMX status: enabled
599 03:27:02.206841 VMX status: enabled
600 03:27:02.209835 IA32_FEATURE_CONTROL status: locked
601 03:27:02.213236 IA32_FEATURE_CONTROL status: locked
602 03:27:02.216683 Skip microcode update
603 03:27:02.219688 Skip microcode update
604 03:27:02.219774 CPU #5 initialized
605 03:27:02.223188 CPU #6 initialized
606 03:27:02.226188 VMX status: enabled
607 03:27:02.226303 VMX status: enabled
608 03:27:02.229496 apic_id: 0x06 done.
609 03:27:02.233090 IA32_FEATURE_CONTROL status: locked
610 03:27:02.236271 apic_id: 0x05 done.
611 03:27:02.236356 Setting up local APIC...
612 03:27:02.239509 VMX status: enabled
613 03:27:02.242823 Skip microcode update
614 03:27:02.242931 apic_id: 0x04 done.
615 03:27:02.246097 IA32_FEATURE_CONTROL status: locked
616 03:27:02.249083 IA32_FEATURE_CONTROL status: locked
617 03:27:02.252598 CPU #4 initialized
618 03:27:02.255790 Skip microcode update
619 03:27:02.255881 Skip microcode update
620 03:27:02.259332 VMX status: enabled
621 03:27:02.262379 VMX status: enabled
622 03:27:02.265851 IA32_FEATURE_CONTROL status: locked
623 03:27:02.268879 IA32_FEATURE_CONTROL status: locked
624 03:27:02.272494 Skip microcode update
625 03:27:02.272580 Skip microcode update
626 03:27:02.275367 CPU #2 initialized
627 03:27:02.275452 CPU #7 initialized
628 03:27:02.278768 CPU #3 initialized
629 03:27:02.281829 CPU #1 initialized
630 03:27:02.285264 bsp_do_flight_plan done after 461 msecs.
631 03:27:02.288398 CPU: frequency set to 4200 MHz
632 03:27:02.288485 Enabling SMIs.
633 03:27:02.291610 Locking SMM.
634 03:27:02.305781 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 03:27:02.309205 CBFS @ c08000 size 3f8000
636 03:27:02.315706 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 03:27:02.315793 CBFS: Locating 'vbt.bin'
638 03:27:02.319007 CBFS: Found @ offset 5f5c0 size 499
639 03:27:02.326023 Found a VBT of 4608 bytes after decompression
640 03:27:02.509323 Display FSP Version Info HOB
641 03:27:02.512660 Reference Code - CPU = 9.0.1e.30
642 03:27:02.515727 uCode Version = 0.0.0.ca
643 03:27:02.519006 TXT ACM version = ff.ff.ff.ffff
644 03:27:02.522390 Display FSP Version Info HOB
645 03:27:02.525394 Reference Code - ME = 9.0.1e.30
646 03:27:02.528624 MEBx version = 0.0.0.0
647 03:27:02.532179 ME Firmware Version = Consumer SKU
648 03:27:02.535318 Display FSP Version Info HOB
649 03:27:02.538658 Reference Code - CML PCH = 9.0.1e.30
650 03:27:02.541753 PCH-CRID Status = Disabled
651 03:27:02.545151 PCH-CRID Original Value = ff.ff.ff.ffff
652 03:27:02.548335 PCH-CRID New Value = ff.ff.ff.ffff
653 03:27:02.551583 OPROM - RST - RAID = ff.ff.ff.ffff
654 03:27:02.554955 ChipsetInit Base Version = ff.ff.ff.ffff
655 03:27:02.561542 ChipsetInit Oem Version = ff.ff.ff.ffff
656 03:27:02.561629 Display FSP Version Info HOB
657 03:27:02.567755 Reference Code - SA - System Agent = 9.0.1e.30
658 03:27:02.571178 Reference Code - MRC = 0.7.1.6c
659 03:27:02.574503 SA - PCIe Version = 9.0.1e.30
660 03:27:02.577911 SA-CRID Status = Disabled
661 03:27:02.581052 SA-CRID Original Value = 0.0.0.c
662 03:27:02.581138 SA-CRID New Value = 0.0.0.c
663 03:27:02.584381 OPROM - VBIOS = ff.ff.ff.ffff
664 03:27:02.587880 RTC Init
665 03:27:02.591061 Set power on after power failure.
666 03:27:02.591146 Disabling Deep S3
667 03:27:02.594548 Disabling Deep S3
668 03:27:02.597715 Disabling Deep S4
669 03:27:02.597799 Disabling Deep S4
670 03:27:02.601134 Disabling Deep S5
671 03:27:02.601220 Disabling Deep S5
672 03:27:02.607526 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
673 03:27:02.610723 Enumerating buses...
674 03:27:02.614073 Show all devs... Before device enumeration.
675 03:27:02.617465 Root Device: enabled 1
676 03:27:02.620717 CPU_CLUSTER: 0: enabled 1
677 03:27:02.620803 DOMAIN: 0000: enabled 1
678 03:27:02.623572 APIC: 00: enabled 1
679 03:27:02.627027 PCI: 00:00.0: enabled 1
680 03:27:02.630429 PCI: 00:02.0: enabled 1
681 03:27:02.630514 PCI: 00:04.0: enabled 0
682 03:27:02.633721 PCI: 00:05.0: enabled 0
683 03:27:02.636679 PCI: 00:12.0: enabled 1
684 03:27:02.640172 PCI: 00:12.5: enabled 0
685 03:27:02.640257 PCI: 00:12.6: enabled 0
686 03:27:02.643249 PCI: 00:14.0: enabled 1
687 03:27:02.646621 PCI: 00:14.1: enabled 0
688 03:27:02.646705 PCI: 00:14.3: enabled 1
689 03:27:02.650103 PCI: 00:14.5: enabled 0
690 03:27:02.653310 PCI: 00:15.0: enabled 1
691 03:27:02.656415 PCI: 00:15.1: enabled 1
692 03:27:02.656501 PCI: 00:15.2: enabled 0
693 03:27:02.659720 PCI: 00:15.3: enabled 0
694 03:27:02.662865 PCI: 00:16.0: enabled 1
695 03:27:02.666448 PCI: 00:16.1: enabled 0
696 03:27:02.666549 PCI: 00:16.2: enabled 0
697 03:27:02.669385 PCI: 00:16.3: enabled 0
698 03:27:02.672776 PCI: 00:16.4: enabled 0
699 03:27:02.675979 PCI: 00:16.5: enabled 0
700 03:27:02.676067 PCI: 00:17.0: enabled 1
701 03:27:02.679245 PCI: 00:19.0: enabled 1
702 03:27:02.682601 PCI: 00:19.1: enabled 0
703 03:27:02.685895 PCI: 00:19.2: enabled 0
704 03:27:02.685980 PCI: 00:1a.0: enabled 0
705 03:27:02.689030 PCI: 00:1c.0: enabled 0
706 03:27:02.692171 PCI: 00:1c.1: enabled 0
707 03:27:02.695529 PCI: 00:1c.2: enabled 0
708 03:27:02.695615 PCI: 00:1c.3: enabled 0
709 03:27:02.698800 PCI: 00:1c.4: enabled 0
710 03:27:02.702093 PCI: 00:1c.5: enabled 0
711 03:27:02.705175 PCI: 00:1c.6: enabled 0
712 03:27:02.705261 PCI: 00:1c.7: enabled 0
713 03:27:02.708359 PCI: 00:1d.0: enabled 1
714 03:27:02.711840 PCI: 00:1d.1: enabled 0
715 03:27:02.715121 PCI: 00:1d.2: enabled 0
716 03:27:02.715228 PCI: 00:1d.3: enabled 0
717 03:27:02.718143 PCI: 00:1d.4: enabled 0
718 03:27:02.721536 PCI: 00:1d.5: enabled 1
719 03:27:02.724728 PCI: 00:1e.0: enabled 1
720 03:27:02.724807 PCI: 00:1e.1: enabled 0
721 03:27:02.728214 PCI: 00:1e.2: enabled 1
722 03:27:02.731479 PCI: 00:1e.3: enabled 1
723 03:27:02.734763 PCI: 00:1f.0: enabled 1
724 03:27:02.734850 PCI: 00:1f.1: enabled 1
725 03:27:02.737798 PCI: 00:1f.2: enabled 1
726 03:27:02.740906 PCI: 00:1f.3: enabled 1
727 03:27:02.744459 PCI: 00:1f.4: enabled 1
728 03:27:02.744535 PCI: 00:1f.5: enabled 1
729 03:27:02.747809 PCI: 00:1f.6: enabled 0
730 03:27:02.750787 USB0 port 0: enabled 1
731 03:27:02.754360 I2C: 00:15: enabled 1
732 03:27:02.754445 I2C: 00:5d: enabled 1
733 03:27:02.757374 GENERIC: 0.0: enabled 1
734 03:27:02.760848 I2C: 00:1a: enabled 1
735 03:27:02.760933 I2C: 00:38: enabled 1
736 03:27:02.763870 I2C: 00:39: enabled 1
737 03:27:02.767012 I2C: 00:3a: enabled 1
738 03:27:02.767093 I2C: 00:3b: enabled 1
739 03:27:02.770316 PCI: 00:00.0: enabled 1
740 03:27:02.773532 SPI: 00: enabled 1
741 03:27:02.773613 SPI: 01: enabled 1
742 03:27:02.776982 PNP: 0c09.0: enabled 1
743 03:27:02.780479 USB2 port 0: enabled 1
744 03:27:02.780554 USB2 port 1: enabled 1
745 03:27:02.783389 USB2 port 2: enabled 0
746 03:27:02.786787 USB2 port 3: enabled 0
747 03:27:02.790135 USB2 port 5: enabled 0
748 03:27:02.790211 USB2 port 6: enabled 1
749 03:27:02.793200 USB2 port 9: enabled 1
750 03:27:02.796451 USB3 port 0: enabled 1
751 03:27:02.796530 USB3 port 1: enabled 1
752 03:27:02.799942 USB3 port 2: enabled 1
753 03:27:02.803102 USB3 port 3: enabled 1
754 03:27:02.806222 USB3 port 4: enabled 0
755 03:27:02.806307 APIC: 04: enabled 1
756 03:27:02.809698 APIC: 01: enabled 1
757 03:27:02.809783 APIC: 05: enabled 1
758 03:27:02.812953 APIC: 07: enabled 1
759 03:27:02.816253 APIC: 02: enabled 1
760 03:27:02.816340 APIC: 03: enabled 1
761 03:27:02.819248 APIC: 06: enabled 1
762 03:27:02.822535 Compare with tree...
763 03:27:02.822620 Root Device: enabled 1
764 03:27:02.825893 CPU_CLUSTER: 0: enabled 1
765 03:27:02.828944 APIC: 00: enabled 1
766 03:27:02.832591 APIC: 04: enabled 1
767 03:27:02.832677 APIC: 01: enabled 1
768 03:27:02.835674 APIC: 05: enabled 1
769 03:27:02.839156 APIC: 07: enabled 1
770 03:27:02.839243 APIC: 02: enabled 1
771 03:27:02.842247 APIC: 03: enabled 1
772 03:27:02.845374 APIC: 06: enabled 1
773 03:27:02.845459 DOMAIN: 0000: enabled 1
774 03:27:02.848458 PCI: 00:00.0: enabled 1
775 03:27:02.851851 PCI: 00:02.0: enabled 1
776 03:27:02.855495 PCI: 00:04.0: enabled 0
777 03:27:02.858713 PCI: 00:05.0: enabled 0
778 03:27:02.858805 PCI: 00:12.0: enabled 1
779 03:27:02.861873 PCI: 00:12.5: enabled 0
780 03:27:02.864815 PCI: 00:12.6: enabled 0
781 03:27:02.868289 PCI: 00:14.0: enabled 1
782 03:27:02.871548 USB0 port 0: enabled 1
783 03:27:02.874935 USB2 port 0: enabled 1
784 03:27:02.875020 USB2 port 1: enabled 1
785 03:27:02.878014 USB2 port 2: enabled 0
786 03:27:02.881170 USB2 port 3: enabled 0
787 03:27:02.884484 USB2 port 5: enabled 0
788 03:27:02.887896 USB2 port 6: enabled 1
789 03:27:02.891180 USB2 port 9: enabled 1
790 03:27:02.891266 USB3 port 0: enabled 1
791 03:27:02.894230 USB3 port 1: enabled 1
792 03:27:02.897651 USB3 port 2: enabled 1
793 03:27:02.900782 USB3 port 3: enabled 1
794 03:27:02.904260 USB3 port 4: enabled 0
795 03:27:02.907404 PCI: 00:14.1: enabled 0
796 03:27:02.907491 PCI: 00:14.3: enabled 1
797 03:27:02.910742 PCI: 00:14.5: enabled 0
798 03:27:02.913923 PCI: 00:15.0: enabled 1
799 03:27:02.917456 I2C: 00:15: enabled 1
800 03:27:02.920418 PCI: 00:15.1: enabled 1
801 03:27:02.920503 I2C: 00:5d: enabled 1
802 03:27:02.923812 GENERIC: 0.0: enabled 1
803 03:27:02.926882 PCI: 00:15.2: enabled 0
804 03:27:02.930345 PCI: 00:15.3: enabled 0
805 03:27:02.933380 PCI: 00:16.0: enabled 1
806 03:27:02.933455 PCI: 00:16.1: enabled 0
807 03:27:02.936942 PCI: 00:16.2: enabled 0
808 03:27:02.940100 PCI: 00:16.3: enabled 0
809 03:27:02.943422 PCI: 00:16.4: enabled 0
810 03:27:02.946460 PCI: 00:16.5: enabled 0
811 03:27:02.946546 PCI: 00:17.0: enabled 1
812 03:27:02.949828 PCI: 00:19.0: enabled 1
813 03:27:02.953035 I2C: 00:1a: enabled 1
814 03:27:02.956092 I2C: 00:38: enabled 1
815 03:27:02.959702 I2C: 00:39: enabled 1
816 03:27:02.959790 I2C: 00:3a: enabled 1
817 03:27:02.962792 I2C: 00:3b: enabled 1
818 03:27:02.965948 PCI: 00:19.1: enabled 0
819 03:27:02.969543 PCI: 00:19.2: enabled 0
820 03:27:02.969629 PCI: 00:1a.0: enabled 0
821 03:27:02.972524 PCI: 00:1c.0: enabled 0
822 03:27:02.975656 PCI: 00:1c.1: enabled 0
823 03:27:02.979079 PCI: 00:1c.2: enabled 0
824 03:27:02.982248 PCI: 00:1c.3: enabled 0
825 03:27:02.985546 PCI: 00:1c.4: enabled 0
826 03:27:02.985631 PCI: 00:1c.5: enabled 0
827 03:27:02.988889 PCI: 00:1c.6: enabled 0
828 03:27:02.992320 PCI: 00:1c.7: enabled 0
829 03:27:02.995270 PCI: 00:1d.0: enabled 1
830 03:27:02.998723 PCI: 00:1d.1: enabled 0
831 03:27:02.998808 PCI: 00:1d.2: enabled 0
832 03:27:03.002058 PCI: 00:1d.3: enabled 0
833 03:27:03.005155 PCI: 00:1d.4: enabled 0
834 03:27:03.008249 PCI: 00:1d.5: enabled 1
835 03:27:03.011745 PCI: 00:00.0: enabled 1
836 03:27:03.011830 PCI: 00:1e.0: enabled 1
837 03:27:03.014931 PCI: 00:1e.1: enabled 0
838 03:27:03.018045 PCI: 00:1e.2: enabled 1
839 03:27:03.021423 SPI: 00: enabled 1
840 03:27:03.024512 PCI: 00:1e.3: enabled 1
841 03:27:03.024598 SPI: 01: enabled 1
842 03:27:03.027900 PCI: 00:1f.0: enabled 1
843 03:27:03.031239 PNP: 0c09.0: enabled 1
844 03:27:03.034667 PCI: 00:1f.1: enabled 1
845 03:27:03.034754 PCI: 00:1f.2: enabled 1
846 03:27:03.037647 PCI: 00:1f.3: enabled 1
847 03:27:03.041135 PCI: 00:1f.4: enabled 1
848 03:27:03.044499 PCI: 00:1f.5: enabled 1
849 03:27:03.047653 PCI: 00:1f.6: enabled 0
850 03:27:03.047739 Root Device scanning...
851 03:27:03.050656 scan_static_bus for Root Device
852 03:27:03.054205 CPU_CLUSTER: 0 enabled
853 03:27:03.057428 DOMAIN: 0000 enabled
854 03:27:03.060525 DOMAIN: 0000 scanning...
855 03:27:03.063737 PCI: pci_scan_bus for bus 00
856 03:27:03.067107 PCI: 00:00.0 [8086/0000] ops
857 03:27:03.070349 PCI: 00:00.0 [8086/9b61] enabled
858 03:27:03.073633 PCI: 00:02.0 [8086/0000] bus ops
859 03:27:03.077055 PCI: 00:02.0 [8086/9b41] enabled
860 03:27:03.079972 PCI: 00:04.0 [8086/1903] disabled
861 03:27:03.083277 PCI: 00:08.0 [8086/1911] enabled
862 03:27:03.086602 PCI: 00:12.0 [8086/02f9] enabled
863 03:27:03.089674 PCI: 00:14.0 [8086/0000] bus ops
864 03:27:03.092928 PCI: 00:14.0 [8086/02ed] enabled
865 03:27:03.096411 PCI: 00:14.2 [8086/02ef] enabled
866 03:27:03.099661 PCI: 00:14.3 [8086/02f0] enabled
867 03:27:03.102873 PCI: 00:15.0 [8086/0000] bus ops
868 03:27:03.106045 PCI: 00:15.0 [8086/02e8] enabled
869 03:27:03.109527 PCI: 00:15.1 [8086/0000] bus ops
870 03:27:03.112557 PCI: 00:15.1 [8086/02e9] enabled
871 03:27:03.115822 PCI: 00:16.0 [8086/0000] ops
872 03:27:03.119217 PCI: 00:16.0 [8086/02e0] enabled
873 03:27:03.122225 PCI: 00:17.0 [8086/0000] ops
874 03:27:03.125864 PCI: 00:17.0 [8086/02d3] enabled
875 03:27:03.129127 PCI: 00:19.0 [8086/0000] bus ops
876 03:27:03.132345 PCI: 00:19.0 [8086/02c5] enabled
877 03:27:03.135866 PCI: 00:1d.0 [8086/0000] bus ops
878 03:27:03.138809 PCI: 00:1d.0 [8086/02b0] enabled
879 03:27:03.145064 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 03:27:03.145149 PCI: 00:1e.0 [8086/0000] ops
881 03:27:03.148419 PCI: 00:1e.0 [8086/02a8] enabled
882 03:27:03.151559 PCI: 00:1e.2 [8086/0000] bus ops
883 03:27:03.155019 PCI: 00:1e.2 [8086/02aa] enabled
884 03:27:03.158237 PCI: 00:1e.3 [8086/0000] bus ops
885 03:27:03.164682 PCI: 00:1e.3 [8086/02ab] enabled
886 03:27:03.168317 PCI: 00:1f.0 [8086/0000] bus ops
887 03:27:03.171399 PCI: 00:1f.0 [8086/0284] enabled
888 03:27:03.174726 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 03:27:03.181067 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 03:27:03.184426 PCI: 00:1f.3 [8086/0000] bus ops
891 03:27:03.187562 PCI: 00:1f.3 [8086/02c8] enabled
892 03:27:03.190990 PCI: 00:1f.4 [8086/0000] bus ops
893 03:27:03.194097 PCI: 00:1f.4 [8086/02a3] enabled
894 03:27:03.197444 PCI: 00:1f.5 [8086/0000] bus ops
895 03:27:03.200867 PCI: 00:1f.5 [8086/02a4] enabled
896 03:27:03.203981 PCI: Leftover static devices:
897 03:27:03.204071 PCI: 00:05.0
898 03:27:03.207191 PCI: 00:12.5
899 03:27:03.207275 PCI: 00:12.6
900 03:27:03.210650 PCI: 00:14.1
901 03:27:03.210735 PCI: 00:14.5
902 03:27:03.213625 PCI: 00:15.2
903 03:27:03.213726 PCI: 00:15.3
904 03:27:03.213794 PCI: 00:16.1
905 03:27:03.217189 PCI: 00:16.2
906 03:27:03.217273 PCI: 00:16.3
907 03:27:03.220453 PCI: 00:16.4
908 03:27:03.220537 PCI: 00:16.5
909 03:27:03.223552 PCI: 00:19.1
910 03:27:03.223641 PCI: 00:19.2
911 03:27:03.223712 PCI: 00:1a.0
912 03:27:03.226791 PCI: 00:1c.0
913 03:27:03.226871 PCI: 00:1c.1
914 03:27:03.229936 PCI: 00:1c.2
915 03:27:03.230024 PCI: 00:1c.3
916 03:27:03.230093 PCI: 00:1c.4
917 03:27:03.233214 PCI: 00:1c.5
918 03:27:03.233300 PCI: 00:1c.6
919 03:27:03.236664 PCI: 00:1c.7
920 03:27:03.236750 PCI: 00:1d.1
921 03:27:03.239974 PCI: 00:1d.2
922 03:27:03.240060 PCI: 00:1d.3
923 03:27:03.240129 PCI: 00:1d.4
924 03:27:03.242933 PCI: 00:1d.5
925 03:27:03.243019 PCI: 00:1e.1
926 03:27:03.246094 PCI: 00:1f.1
927 03:27:03.246181 PCI: 00:1f.2
928 03:27:03.246250 PCI: 00:1f.6
929 03:27:03.249520 PCI: Check your devicetree.cb.
930 03:27:03.252676 PCI: 00:02.0 scanning...
931 03:27:03.255748 scan_generic_bus for PCI: 00:02.0
932 03:27:03.262512 scan_generic_bus for PCI: 00:02.0 done
933 03:27:03.266139 scan_bus: scanning of bus PCI: 00:02.0 took 10182 usecs
934 03:27:03.268987 PCI: 00:14.0 scanning...
935 03:27:03.272412 scan_static_bus for PCI: 00:14.0
936 03:27:03.275754 USB0 port 0 enabled
937 03:27:03.275840 USB0 port 0 scanning...
938 03:27:03.279107 scan_static_bus for USB0 port 0
939 03:27:03.282294 USB2 port 0 enabled
940 03:27:03.285509 USB2 port 1 enabled
941 03:27:03.285594 USB2 port 2 disabled
942 03:27:03.288955 USB2 port 3 disabled
943 03:27:03.292280 USB2 port 5 disabled
944 03:27:03.292365 USB2 port 6 enabled
945 03:27:03.295414 USB2 port 9 enabled
946 03:27:03.298887 USB3 port 0 enabled
947 03:27:03.299010 USB3 port 1 enabled
948 03:27:03.301916 USB3 port 2 enabled
949 03:27:03.302001 USB3 port 3 enabled
950 03:27:03.305326 USB3 port 4 disabled
951 03:27:03.308346 USB2 port 0 scanning...
952 03:27:03.311627 scan_static_bus for USB2 port 0
953 03:27:03.315100 scan_static_bus for USB2 port 0 done
954 03:27:03.321372 scan_bus: scanning of bus USB2 port 0 took 9693 usecs
955 03:27:03.321459 USB2 port 1 scanning...
956 03:27:03.324931 scan_static_bus for USB2 port 1
957 03:27:03.331698 scan_static_bus for USB2 port 1 done
958 03:27:03.334694 scan_bus: scanning of bus USB2 port 1 took 9702 usecs
959 03:27:03.337951 USB2 port 6 scanning...
960 03:27:03.341254 scan_static_bus for USB2 port 6
961 03:27:03.344745 scan_static_bus for USB2 port 6 done
962 03:27:03.351172 scan_bus: scanning of bus USB2 port 6 took 9690 usecs
963 03:27:03.354301 USB2 port 9 scanning...
964 03:27:03.357584 scan_static_bus for USB2 port 9
965 03:27:03.360953 scan_static_bus for USB2 port 9 done
966 03:27:03.364346 scan_bus: scanning of bus USB2 port 9 took 9691 usecs
967 03:27:03.367445 USB3 port 0 scanning...
968 03:27:03.371051 scan_static_bus for USB3 port 0
969 03:27:03.374174 scan_static_bus for USB3 port 0 done
970 03:27:03.380607 scan_bus: scanning of bus USB3 port 0 took 9691 usecs
971 03:27:03.383780 USB3 port 1 scanning...
972 03:27:03.387200 scan_static_bus for USB3 port 1
973 03:27:03.390325 scan_static_bus for USB3 port 1 done
974 03:27:03.396826 scan_bus: scanning of bus USB3 port 1 took 9692 usecs
975 03:27:03.396906 USB3 port 2 scanning...
976 03:27:03.400088 scan_static_bus for USB3 port 2
977 03:27:03.406728 scan_static_bus for USB3 port 2 done
978 03:27:03.409898 scan_bus: scanning of bus USB3 port 2 took 9691 usecs
979 03:27:03.412945 USB3 port 3 scanning...
980 03:27:03.416524 scan_static_bus for USB3 port 3
981 03:27:03.419621 scan_static_bus for USB3 port 3 done
982 03:27:03.426090 scan_bus: scanning of bus USB3 port 3 took 9685 usecs
983 03:27:03.429365 scan_static_bus for USB0 port 0 done
984 03:27:03.435937 scan_bus: scanning of bus USB0 port 0 took 155212 usecs
985 03:27:03.438925 scan_static_bus for PCI: 00:14.0 done
986 03:27:03.445734 scan_bus: scanning of bus PCI: 00:14.0 took 172819 usecs
987 03:27:03.445815 PCI: 00:15.0 scanning...
988 03:27:03.448994 scan_generic_bus for PCI: 00:15.0
989 03:27:03.455300 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 03:27:03.458690 scan_generic_bus for PCI: 00:15.0 done
991 03:27:03.465238 scan_bus: scanning of bus PCI: 00:15.0 took 14291 usecs
992 03:27:03.465323 PCI: 00:15.1 scanning...
993 03:27:03.468429 scan_generic_bus for PCI: 00:15.1
994 03:27:03.475101 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 03:27:03.478479 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 03:27:03.481334 scan_generic_bus for PCI: 00:15.1 done
997 03:27:03.487939 scan_bus: scanning of bus PCI: 00:15.1 took 18587 usecs
998 03:27:03.491447 PCI: 00:19.0 scanning...
999 03:27:03.494509 scan_generic_bus for PCI: 00:19.0
1000 03:27:03.497850 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 03:27:03.500995 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 03:27:03.507640 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 03:27:03.510833 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 03:27:03.514060 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 03:27:03.517533 scan_generic_bus for PCI: 00:19.0 done
1006 03:27:03.523950 scan_bus: scanning of bus PCI: 00:19.0 took 30702 usecs
1007 03:27:03.527346 PCI: 00:1d.0 scanning...
1008 03:27:03.530404 do_pci_scan_bridge for PCI: 00:1d.0
1009 03:27:03.533756 PCI: pci_scan_bus for bus 01
1010 03:27:03.536914 PCI: 01:00.0 [1c5c/1327] enabled
1011 03:27:03.540464 Enabling Common Clock Configuration
1012 03:27:03.543507 L1 Sub-State supported from root port 29
1013 03:27:03.546865 L1 Sub-State Support = 0xf
1014 03:27:03.550084 CommonModeRestoreTime = 0x28
1015 03:27:03.553368 Power On Value = 0x16, Power On Scale = 0x0
1016 03:27:03.556786 ASPM: Enabled L1
1017 03:27:03.563123 scan_bus: scanning of bus PCI: 00:1d.0 took 32765 usecs
1018 03:27:03.563209 PCI: 00:1e.2 scanning...
1019 03:27:03.569891 scan_generic_bus for PCI: 00:1e.2
1020 03:27:03.573037 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 03:27:03.576416 scan_generic_bus for PCI: 00:1e.2 done
1022 03:27:03.583197 scan_bus: scanning of bus PCI: 00:1e.2 took 13995 usecs
1023 03:27:03.583282 PCI: 00:1e.3 scanning...
1024 03:27:03.586250 scan_generic_bus for PCI: 00:1e.3
1025 03:27:03.592957 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 03:27:03.596006 scan_generic_bus for PCI: 00:1e.3 done
1027 03:27:03.602810 scan_bus: scanning of bus PCI: 00:1e.3 took 13992 usecs
1028 03:27:03.602920 PCI: 00:1f.0 scanning...
1029 03:27:03.606105 scan_static_bus for PCI: 00:1f.0
1030 03:27:03.609075 PNP: 0c09.0 enabled
1031 03:27:03.612258 scan_static_bus for PCI: 00:1f.0 done
1032 03:27:03.619083 scan_bus: scanning of bus PCI: 00:1f.0 took 12046 usecs
1033 03:27:03.622032 PCI: 00:1f.3 scanning...
1034 03:27:03.625481 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1035 03:27:03.628606 PCI: 00:1f.4 scanning...
1036 03:27:03.631944 scan_generic_bus for PCI: 00:1f.4
1037 03:27:03.638384 scan_generic_bus for PCI: 00:1f.4 done
1038 03:27:03.641661 scan_bus: scanning of bus PCI: 00:1f.4 took 10187 usecs
1039 03:27:03.645013 PCI: 00:1f.5 scanning...
1040 03:27:03.648434 scan_generic_bus for PCI: 00:1f.5
1041 03:27:03.651595 scan_generic_bus for PCI: 00:1f.5 done
1042 03:27:03.657924 scan_bus: scanning of bus PCI: 00:1f.5 took 10188 usecs
1043 03:27:03.665069 scan_bus: scanning of bus DOMAIN: 0000 took 604634 usecs
1044 03:27:03.667853 scan_static_bus for Root Device done
1045 03:27:03.674301 scan_bus: scanning of bus Root Device took 624498 usecs
1046 03:27:03.674387 done
1047 03:27:03.677750 Chrome EC: UHEPI supported
1048 03:27:03.684026 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 03:27:03.687263 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 03:27:03.693723 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 03:27:03.701251 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 03:27:03.704637 SPI flash protection: WPSW=0 SRP0=0
1053 03:27:03.710949 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 03:27:03.714321 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1055 03:27:03.717683 found VGA at PCI: 00:02.0
1056 03:27:03.721317 Setting up VGA for PCI: 00:02.0
1057 03:27:03.727402 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 03:27:03.730871 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 03:27:03.734165 Allocating resources...
1060 03:27:03.737311 Reading resources...
1061 03:27:03.740768 Root Device read_resources bus 0 link: 0
1062 03:27:03.743840 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 03:27:03.750355 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 03:27:03.753555 DOMAIN: 0000 read_resources bus 0 link: 0
1065 03:27:03.761742 PCI: 00:14.0 read_resources bus 0 link: 0
1066 03:27:03.764800 USB0 port 0 read_resources bus 0 link: 0
1067 03:27:03.772925 USB0 port 0 read_resources bus 0 link: 0 done
1068 03:27:03.776374 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 03:27:03.783865 PCI: 00:15.0 read_resources bus 1 link: 0
1070 03:27:03.786823 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 03:27:03.793564 PCI: 00:15.1 read_resources bus 2 link: 0
1072 03:27:03.796896 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 03:27:03.804105 PCI: 00:19.0 read_resources bus 3 link: 0
1074 03:27:03.810880 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 03:27:03.813941 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 03:27:03.820561 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 03:27:03.823984 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 03:27:03.830293 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 03:27:03.833576 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 03:27:03.840229 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 03:27:03.843576 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 03:27:03.850391 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 03:27:03.856545 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 03:27:03.859761 Root Device read_resources bus 0 link: 0 done
1085 03:27:03.863143 Done reading resources.
1086 03:27:03.869557 Show resources in subtree (Root Device)...After reading.
1087 03:27:03.873158 Root Device child on link 0 CPU_CLUSTER: 0
1088 03:27:03.876174 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 03:27:03.879402 APIC: 00
1090 03:27:03.879489 APIC: 04
1091 03:27:03.929434 APIC: 01
1092 03:27:03.929545 APIC: 05
1093 03:27:03.929673 APIC: 07
1094 03:27:03.929737 APIC: 02
1095 03:27:03.929816 APIC: 03
1096 03:27:03.930075 APIC: 06
1097 03:27:03.930145 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 03:27:03.930403 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 03:27:03.930776 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 03:27:03.931177 PCI: 00:00.0
1101 03:27:03.931456 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 03:27:03.964193 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 03:27:03.964495 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 03:27:03.964811 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 03:27:03.965232 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 03:27:03.971179 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 03:27:03.977601 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 03:27:03.987364 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 03:27:03.997048 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 03:27:04.006967 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 03:27:04.016679 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 03:27:04.022976 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 03:27:04.032770 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 03:27:04.042658 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 03:27:04.052627 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 03:27:04.062437 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 03:27:04.065524 PCI: 00:02.0
1118 03:27:04.075295 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 03:27:04.084787 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 03:27:04.091428 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 03:27:04.094841 PCI: 00:04.0
1122 03:27:04.094972 PCI: 00:08.0
1123 03:27:04.107733 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 03:27:04.107822 PCI: 00:12.0
1125 03:27:04.117533 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 03:27:04.120753 PCI: 00:14.0 child on link 0 USB0 port 0
1127 03:27:04.130735 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 03:27:04.137001 USB0 port 0 child on link 0 USB2 port 0
1129 03:27:04.137088 USB2 port 0
1130 03:27:04.140499 USB2 port 1
1131 03:27:04.140584 USB2 port 2
1132 03:27:04.143835 USB2 port 3
1133 03:27:04.146931 USB2 port 5
1134 03:27:04.147017 USB2 port 6
1135 03:27:04.149972 USB2 port 9
1136 03:27:04.150058 USB3 port 0
1137 03:27:04.153408 USB3 port 1
1138 03:27:04.153494 USB3 port 2
1139 03:27:04.156738 USB3 port 3
1140 03:27:04.156824 USB3 port 4
1141 03:27:04.159825 PCI: 00:14.2
1142 03:27:04.169895 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 03:27:04.179386 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 03:27:04.179472 PCI: 00:14.3
1145 03:27:04.189023 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 03:27:04.195533 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 03:27:04.205429 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 03:27:04.205516 I2C: 01:15
1149 03:27:04.211756 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 03:27:04.221633 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 03:27:04.221720 I2C: 02:5d
1152 03:27:04.225039 GENERIC: 0.0
1153 03:27:04.225167 PCI: 00:16.0
1154 03:27:04.234793 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 03:27:04.237901 PCI: 00:17.0
1156 03:27:04.247950 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 03:27:04.254465 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 03:27:04.264291 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 03:27:04.270495 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 03:27:04.280441 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 03:27:04.290409 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 03:27:04.293576 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 03:27:04.303358 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 03:27:04.306272 I2C: 03:1a
1165 03:27:04.306359 I2C: 03:38
1166 03:27:04.306427 I2C: 03:39
1167 03:27:04.309733 I2C: 03:3a
1168 03:27:04.309819 I2C: 03:3b
1169 03:27:04.316392 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 03:27:04.322811 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 03:27:04.332739 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 03:27:04.342406 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 03:27:04.345565 PCI: 01:00.0
1174 03:27:04.355476 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 03:27:04.355564 PCI: 00:1e.0
1176 03:27:04.368484 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 03:27:04.378009 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 03:27:04.381564 PCI: 00:1e.2 child on link 0 SPI: 00
1179 03:27:04.391111 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 03:27:04.391200 SPI: 00
1181 03:27:04.397646 PCI: 00:1e.3 child on link 0 SPI: 01
1182 03:27:04.407193 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 03:27:04.407289 SPI: 01
1184 03:27:04.413748 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 03:27:04.420216 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 03:27:04.429957 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 03:27:04.430052 PNP: 0c09.0
1188 03:27:04.439800 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 03:27:04.443281 PCI: 00:1f.3
1190 03:27:04.453106 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 03:27:04.462607 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 03:27:04.462695 PCI: 00:1f.4
1193 03:27:04.472456 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 03:27:04.482368 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 03:27:04.482458 PCI: 00:1f.5
1196 03:27:04.492139 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 03:27:04.498535 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 03:27:04.505059 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 03:27:04.511491 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 03:27:04.514889 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 03:27:04.518194 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 03:27:04.524583 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 03:27:04.527938 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 03:27:04.534368 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 03:27:04.540640 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 03:27:04.547385 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 03:27:04.556985 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 03:27:04.563656 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 03:27:04.566734 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 03:27:04.576726 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 03:27:04.579984 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 03:27:04.583098 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 03:27:04.589609 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 03:27:04.593093 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 03:27:04.599648 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 03:27:04.602722 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 03:27:04.609331 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 03:27:04.612294 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 03:27:04.619150 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 03:27:04.622467 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 03:27:04.628862 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 03:27:04.632039 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 03:27:04.638775 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 03:27:04.641962 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 03:27:04.648522 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 03:27:04.651590 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 03:27:04.658317 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 03:27:04.661413 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 03:27:04.667933 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 03:27:04.671242 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 03:27:04.677792 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 03:27:04.680985 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 03:27:04.687585 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 03:27:04.694391 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 03:27:04.697618 avoid_fixed_resources: DOMAIN: 0000
1236 03:27:04.703875 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 03:27:04.710258 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 03:27:04.716869 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 03:27:04.726758 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 03:27:04.733491 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 03:27:04.739977 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 03:27:04.749545 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 03:27:04.756138 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 03:27:04.762701 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 03:27:04.772789 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 03:27:04.779007 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 03:27:04.785496 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 03:27:04.788880 Setting resources...
1249 03:27:04.795380 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 03:27:04.798391 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 03:27:04.801705 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 03:27:04.808372 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 03:27:04.811501 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 03:27:04.817871 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 03:27:04.824527 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 03:27:04.831239 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 03:27:04.837489 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 03:27:04.840808 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 03:27:04.847492 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 03:27:04.850582 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 03:27:04.857095 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 03:27:04.860408 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 03:27:04.866847 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 03:27:04.870325 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 03:27:04.876769 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 03:27:04.879911 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 03:27:04.886648 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 03:27:04.889809 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 03:27:04.896144 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 03:27:04.899845 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 03:27:04.906314 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 03:27:04.909531 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 03:27:04.915603 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 03:27:04.919029 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 03:27:04.925361 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 03:27:04.928908 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 03:27:04.935312 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 03:27:04.938793 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 03:27:04.945367 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 03:27:04.948477 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 03:27:04.958277 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 03:27:04.964606 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 03:27:04.971028 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 03:27:04.977616 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 03:27:04.984256 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 03:27:04.990708 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 03:27:04.993975 Root Device assign_resources, bus 0 link: 0
1288 03:27:05.000555 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 03:27:05.007182 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 03:27:05.017127 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 03:27:05.023681 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 03:27:05.033469 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 03:27:05.039854 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 03:27:05.050131 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 03:27:05.053174 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 03:27:05.059787 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 03:27:05.066191 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 03:27:05.076078 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 03:27:05.082427 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 03:27:05.092284 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 03:27:05.095763 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 03:27:05.102256 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 03:27:05.108793 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 03:27:05.115567 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 03:27:05.118545 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 03:27:05.128449 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 03:27:05.134607 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 03:27:05.141170 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 03:27:05.151218 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 03:27:05.157680 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 03:27:05.167338 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 03:27:05.173744 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 03:27:05.180354 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 03:27:05.186838 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 03:27:05.190309 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 03:27:05.200161 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 03:27:05.209932 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 03:27:05.216433 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 03:27:05.222736 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 03:27:05.229146 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 03:27:05.235719 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 03:27:05.242435 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 03:27:05.251943 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 03:27:05.255428 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 03:27:05.261860 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 03:27:05.268457 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 03:27:05.271777 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 03:27:05.278224 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 03:27:05.281713 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 03:27:05.288256 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 03:27:05.291372 LPC: Trying to open IO window from 800 size 1ff
1332 03:27:05.301145 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 03:27:05.307757 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 03:27:05.317702 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 03:27:05.324153 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 03:27:05.330526 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 03:27:05.333985 Root Device assign_resources, bus 0 link: 0
1338 03:27:05.337427 Done setting resources.
1339 03:27:05.343652 Show resources in subtree (Root Device)...After assigning values.
1340 03:27:05.347150 Root Device child on link 0 CPU_CLUSTER: 0
1341 03:27:05.353388 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 03:27:05.353466 APIC: 00
1343 03:27:05.353543 APIC: 04
1344 03:27:05.356866 APIC: 01
1345 03:27:05.356939 APIC: 05
1346 03:27:05.359993 APIC: 07
1347 03:27:05.360069 APIC: 02
1348 03:27:05.360148 APIC: 03
1349 03:27:05.363414 APIC: 06
1350 03:27:05.366633 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 03:27:05.376350 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 03:27:05.386069 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 03:27:05.389213 PCI: 00:00.0
1354 03:27:05.399096 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 03:27:05.408766 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 03:27:05.418461 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 03:27:05.428324 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 03:27:05.434826 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 03:27:05.444695 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 03:27:05.454439 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 03:27:05.464337 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 03:27:05.473960 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 03:27:05.483805 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 03:27:05.490353 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 03:27:05.499923 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 03:27:05.509859 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 03:27:05.519744 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 03:27:05.529428 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 03:27:05.539267 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 03:27:05.542208 PCI: 00:02.0
1371 03:27:05.551981 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 03:27:05.561983 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 03:27:05.571508 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 03:27:05.571598 PCI: 00:04.0
1375 03:27:05.574941 PCI: 00:08.0
1376 03:27:05.584515 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 03:27:05.587893 PCI: 00:12.0
1378 03:27:05.597528 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 03:27:05.600891 PCI: 00:14.0 child on link 0 USB0 port 0
1380 03:27:05.610583 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 03:27:05.617329 USB0 port 0 child on link 0 USB2 port 0
1382 03:27:05.617416 USB2 port 0
1383 03:27:05.620550 USB2 port 1
1384 03:27:05.620637 USB2 port 2
1385 03:27:05.623685 USB2 port 3
1386 03:27:05.623770 USB2 port 5
1387 03:27:05.626910 USB2 port 6
1388 03:27:05.627011 USB2 port 9
1389 03:27:05.630510 USB3 port 0
1390 03:27:05.630601 USB3 port 1
1391 03:27:05.633426 USB3 port 2
1392 03:27:05.636838 USB3 port 3
1393 03:27:05.636924 USB3 port 4
1394 03:27:05.640079 PCI: 00:14.2
1395 03:27:05.650051 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 03:27:05.659544 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 03:27:05.659632 PCI: 00:14.3
1398 03:27:05.672755 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 03:27:05.675823 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 03:27:05.685659 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 03:27:05.685756 I2C: 01:15
1402 03:27:05.692245 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 03:27:05.701905 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 03:27:05.701993 I2C: 02:5d
1405 03:27:05.705101 GENERIC: 0.0
1406 03:27:05.708614 PCI: 00:16.0
1407 03:27:05.718372 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 03:27:05.718460 PCI: 00:17.0
1409 03:27:05.727937 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 03:27:05.737837 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 03:27:05.747496 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 03:27:05.757522 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 03:27:05.767254 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 03:27:05.776755 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 03:27:05.780042 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 03:27:05.789778 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 03:27:05.793051 I2C: 03:1a
1418 03:27:05.793137 I2C: 03:38
1419 03:27:05.796497 I2C: 03:39
1420 03:27:05.796582 I2C: 03:3a
1421 03:27:05.799917 I2C: 03:3b
1422 03:27:05.802873 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 03:27:05.812763 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 03:27:05.822560 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 03:27:05.832224 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 03:27:05.835414 PCI: 01:00.0
1427 03:27:05.845516 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 03:27:05.845627 PCI: 00:1e.0
1429 03:27:05.858346 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 03:27:05.867986 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 03:27:05.871469 PCI: 00:1e.2 child on link 0 SPI: 00
1432 03:27:05.881011 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 03:27:05.884213 SPI: 00
1434 03:27:05.887594 PCI: 00:1e.3 child on link 0 SPI: 01
1435 03:27:05.897364 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 03:27:05.900540 SPI: 01
1437 03:27:05.903826 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 03:27:05.913642 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 03:27:05.920031 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 03:27:05.923544 PNP: 0c09.0
1441 03:27:05.933516 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 03:27:05.933606 PCI: 00:1f.3
1443 03:27:05.943023 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 03:27:05.952757 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 03:27:05.955952 PCI: 00:1f.4
1446 03:27:05.965547 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 03:27:05.975508 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 03:27:05.975598 PCI: 00:1f.5
1449 03:27:05.988122 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 03:27:05.988231 Done allocating resources.
1451 03:27:05.995121 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 03:27:05.998120 Enabling resources...
1453 03:27:06.001391 PCI: 00:00.0 subsystem <- 8086/9b61
1454 03:27:06.004672 PCI: 00:00.0 cmd <- 06
1455 03:27:06.007760 PCI: 00:02.0 subsystem <- 8086/9b41
1456 03:27:06.011110 PCI: 00:02.0 cmd <- 03
1457 03:27:06.014182 PCI: 00:08.0 cmd <- 06
1458 03:27:06.017594 PCI: 00:12.0 subsystem <- 8086/02f9
1459 03:27:06.021059 PCI: 00:12.0 cmd <- 02
1460 03:27:06.024251 PCI: 00:14.0 subsystem <- 8086/02ed
1461 03:27:06.027384 PCI: 00:14.0 cmd <- 02
1462 03:27:06.027474 PCI: 00:14.2 cmd <- 02
1463 03:27:06.034221 PCI: 00:14.3 subsystem <- 8086/02f0
1464 03:27:06.034307 PCI: 00:14.3 cmd <- 02
1465 03:27:06.040841 PCI: 00:15.0 subsystem <- 8086/02e8
1466 03:27:06.040924 PCI: 00:15.0 cmd <- 02
1467 03:27:06.043802 PCI: 00:15.1 subsystem <- 8086/02e9
1468 03:27:06.047241 PCI: 00:15.1 cmd <- 02
1469 03:27:06.050496 PCI: 00:16.0 subsystem <- 8086/02e0
1470 03:27:06.053679 PCI: 00:16.0 cmd <- 02
1471 03:27:06.056951 PCI: 00:17.0 subsystem <- 8086/02d3
1472 03:27:06.060279 PCI: 00:17.0 cmd <- 03
1473 03:27:06.063321 PCI: 00:19.0 subsystem <- 8086/02c5
1474 03:27:06.066757 PCI: 00:19.0 cmd <- 02
1475 03:27:06.069920 PCI: 00:1d.0 bridge ctrl <- 0013
1476 03:27:06.073060 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 03:27:06.076584 PCI: 00:1d.0 cmd <- 06
1478 03:27:06.079680 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 03:27:06.082999 PCI: 00:1e.0 cmd <- 06
1480 03:27:06.086168 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 03:27:06.089492 PCI: 00:1e.2 cmd <- 06
1482 03:27:06.092853 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 03:27:06.095939 PCI: 00:1e.3 cmd <- 02
1484 03:27:06.099378 PCI: 00:1f.0 subsystem <- 8086/0284
1485 03:27:06.102475 PCI: 00:1f.0 cmd <- 407
1486 03:27:06.105947 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 03:27:06.106025 PCI: 00:1f.3 cmd <- 02
1488 03:27:06.112462 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 03:27:06.112545 PCI: 00:1f.4 cmd <- 03
1490 03:27:06.119011 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 03:27:06.119092 PCI: 00:1f.5 cmd <- 406
1492 03:27:06.129065 PCI: 01:00.0 cmd <- 02
1493 03:27:06.134394 done.
1494 03:27:06.147849 ME: Version: 14.0.39.1367
1495 03:27:06.154217 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1496 03:27:06.157515 Initializing devices...
1497 03:27:06.157592 Root Device init ...
1498 03:27:06.163872 Chrome EC: Set SMI mask to 0x0000000000000000
1499 03:27:06.170635 Chrome EC: clear events_b mask to 0x0000000000000000
1500 03:27:06.173918 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 03:27:06.180221 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 03:27:06.186729 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 03:27:06.189926 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 03:27:06.196620 Root Device init finished in 35150 usecs
1505 03:27:06.199665 CPU_CLUSTER: 0 init ...
1506 03:27:06.203157 CPU_CLUSTER: 0 init finished in 2439 usecs
1507 03:27:06.208294 PCI: 00:00.0 init ...
1508 03:27:06.211563 CPU TDP: 15 Watts
1509 03:27:06.214674 CPU PL2 = 64 Watts
1510 03:27:06.218113 PCI: 00:00.0 init finished in 7082 usecs
1511 03:27:06.221444 PCI: 00:02.0 init ...
1512 03:27:06.224443 PCI: 00:02.0 init finished in 2254 usecs
1513 03:27:06.227682 PCI: 00:08.0 init ...
1514 03:27:06.231360 PCI: 00:08.0 init finished in 2253 usecs
1515 03:27:06.234496 PCI: 00:12.0 init ...
1516 03:27:06.237795 PCI: 00:12.0 init finished in 2253 usecs
1517 03:27:06.240989 PCI: 00:14.0 init ...
1518 03:27:06.244229 PCI: 00:14.0 init finished in 2253 usecs
1519 03:27:06.247501 PCI: 00:14.2 init ...
1520 03:27:06.250659 PCI: 00:14.2 init finished in 2252 usecs
1521 03:27:06.253984 PCI: 00:14.3 init ...
1522 03:27:06.257260 PCI: 00:14.3 init finished in 2271 usecs
1523 03:27:06.260941 PCI: 00:15.0 init ...
1524 03:27:06.263973 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 03:27:06.270526 PCI: 00:15.0 init finished in 5979 usecs
1526 03:27:06.270608 PCI: 00:15.1 init ...
1527 03:27:06.277020 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 03:27:06.280435 PCI: 00:15.1 init finished in 5978 usecs
1529 03:27:06.283629 PCI: 00:16.0 init ...
1530 03:27:06.287062 PCI: 00:16.0 init finished in 2243 usecs
1531 03:27:06.290056 PCI: 00:19.0 init ...
1532 03:27:06.293444 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 03:27:06.296453 PCI: 00:19.0 init finished in 5978 usecs
1534 03:27:06.299990 PCI: 00:1d.0 init ...
1535 03:27:06.303060 Initializing PCH PCIe bridge.
1536 03:27:06.306224 PCI: 00:1d.0 init finished in 5286 usecs
1537 03:27:06.310067 PCI: 00:1f.0 init ...
1538 03:27:06.313447 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 03:27:06.319969 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 03:27:06.320050 IOAPIC: ID = 0x02
1541 03:27:06.323246 IOAPIC: Dumping registers
1542 03:27:06.326259 reg 0x0000: 0x02000000
1543 03:27:06.329868 reg 0x0001: 0x00770020
1544 03:27:06.332873 reg 0x0002: 0x00000000
1545 03:27:06.336319 PCI: 00:1f.0 init finished in 23543 usecs
1546 03:27:06.339311 PCI: 00:1f.4 init ...
1547 03:27:06.342729 PCI: 00:1f.4 init finished in 2262 usecs
1548 03:27:06.354322 PCI: 01:00.0 init ...
1549 03:27:06.357518 PCI: 01:00.0 init finished in 2253 usecs
1550 03:27:06.361981 PNP: 0c09.0 init ...
1551 03:27:06.368601 Google Chrome EC uptime: 11.154 seconds
1552 03:27:06.371949 Google Chrome AP resets since EC boot: 0
1553 03:27:06.374972 Google Chrome most recent AP reset causes:
1554 03:27:06.381795 Google Chrome EC reset flags at last EC boot: reset-pin
1555 03:27:06.384769 PNP: 0c09.0 init finished in 20642 usecs
1556 03:27:06.388029 Devices initialized
1557 03:27:06.391360 Show all devs... After init.
1558 03:27:06.391437 Root Device: enabled 1
1559 03:27:06.394403 CPU_CLUSTER: 0: enabled 1
1560 03:27:06.397718 DOMAIN: 0000: enabled 1
1561 03:27:06.401153 APIC: 00: enabled 1
1562 03:27:06.401231 PCI: 00:00.0: enabled 1
1563 03:27:06.404208 PCI: 00:02.0: enabled 1
1564 03:27:06.407684 PCI: 00:04.0: enabled 0
1565 03:27:06.410825 PCI: 00:05.0: enabled 0
1566 03:27:06.410910 PCI: 00:12.0: enabled 1
1567 03:27:06.414235 PCI: 00:12.5: enabled 0
1568 03:27:06.417052 PCI: 00:12.6: enabled 0
1569 03:27:06.420649 PCI: 00:14.0: enabled 1
1570 03:27:06.420733 PCI: 00:14.1: enabled 0
1571 03:27:06.423668 PCI: 00:14.3: enabled 1
1572 03:27:06.426904 PCI: 00:14.5: enabled 0
1573 03:27:06.430103 PCI: 00:15.0: enabled 1
1574 03:27:06.430189 PCI: 00:15.1: enabled 1
1575 03:27:06.433468 PCI: 00:15.2: enabled 0
1576 03:27:06.436719 PCI: 00:15.3: enabled 0
1577 03:27:06.440211 PCI: 00:16.0: enabled 1
1578 03:27:06.440297 PCI: 00:16.1: enabled 0
1579 03:27:06.443131 PCI: 00:16.2: enabled 0
1580 03:27:06.446568 PCI: 00:16.3: enabled 0
1581 03:27:06.449647 PCI: 00:16.4: enabled 0
1582 03:27:06.449740 PCI: 00:16.5: enabled 0
1583 03:27:06.453178 PCI: 00:17.0: enabled 1
1584 03:27:06.456030 PCI: 00:19.0: enabled 1
1585 03:27:06.459470 PCI: 00:19.1: enabled 0
1586 03:27:06.459555 PCI: 00:19.2: enabled 0
1587 03:27:06.462952 PCI: 00:1a.0: enabled 0
1588 03:27:06.466251 PCI: 00:1c.0: enabled 0
1589 03:27:06.469208 PCI: 00:1c.1: enabled 0
1590 03:27:06.469287 PCI: 00:1c.2: enabled 0
1591 03:27:06.472581 PCI: 00:1c.3: enabled 0
1592 03:27:06.475841 PCI: 00:1c.4: enabled 0
1593 03:27:06.479021 PCI: 00:1c.5: enabled 0
1594 03:27:06.479096 PCI: 00:1c.6: enabled 0
1595 03:27:06.482553 PCI: 00:1c.7: enabled 0
1596 03:27:06.485617 PCI: 00:1d.0: enabled 1
1597 03:27:06.488720 PCI: 00:1d.1: enabled 0
1598 03:27:06.488795 PCI: 00:1d.2: enabled 0
1599 03:27:06.492227 PCI: 00:1d.3: enabled 0
1600 03:27:06.495239 PCI: 00:1d.4: enabled 0
1601 03:27:06.495320 PCI: 00:1d.5: enabled 0
1602 03:27:06.498664 PCI: 00:1e.0: enabled 1
1603 03:27:06.501856 PCI: 00:1e.1: enabled 0
1604 03:27:06.505145 PCI: 00:1e.2: enabled 1
1605 03:27:06.505235 PCI: 00:1e.3: enabled 1
1606 03:27:06.508214 PCI: 00:1f.0: enabled 1
1607 03:27:06.511684 PCI: 00:1f.1: enabled 0
1608 03:27:06.514776 PCI: 00:1f.2: enabled 0
1609 03:27:06.514861 PCI: 00:1f.3: enabled 1
1610 03:27:06.518221 PCI: 00:1f.4: enabled 1
1611 03:27:06.521356 PCI: 00:1f.5: enabled 1
1612 03:27:06.524933 PCI: 00:1f.6: enabled 0
1613 03:27:06.525018 USB0 port 0: enabled 1
1614 03:27:06.527862 I2C: 01:15: enabled 1
1615 03:27:06.531226 I2C: 02:5d: enabled 1
1616 03:27:06.534335 GENERIC: 0.0: enabled 1
1617 03:27:06.534421 I2C: 03:1a: enabled 1
1618 03:27:06.537845 I2C: 03:38: enabled 1
1619 03:27:06.541040 I2C: 03:39: enabled 1
1620 03:27:06.541129 I2C: 03:3a: enabled 1
1621 03:27:06.544538 I2C: 03:3b: enabled 1
1622 03:27:06.547877 PCI: 00:00.0: enabled 1
1623 03:27:06.547963 SPI: 00: enabled 1
1624 03:27:06.550943 SPI: 01: enabled 1
1625 03:27:06.553969 PNP: 0c09.0: enabled 1
1626 03:27:06.554055 USB2 port 0: enabled 1
1627 03:27:06.557499 USB2 port 1: enabled 1
1628 03:27:06.560918 USB2 port 2: enabled 0
1629 03:27:06.561003 USB2 port 3: enabled 0
1630 03:27:06.563969 USB2 port 5: enabled 0
1631 03:27:06.567179 USB2 port 6: enabled 1
1632 03:27:06.570216 USB2 port 9: enabled 1
1633 03:27:06.570302 USB3 port 0: enabled 1
1634 03:27:06.573590 USB3 port 1: enabled 1
1635 03:27:06.576703 USB3 port 2: enabled 1
1636 03:27:06.580192 USB3 port 3: enabled 1
1637 03:27:06.580283 USB3 port 4: enabled 0
1638 03:27:06.583219 APIC: 04: enabled 1
1639 03:27:06.583305 APIC: 01: enabled 1
1640 03:27:06.586772 APIC: 05: enabled 1
1641 03:27:06.589994 APIC: 07: enabled 1
1642 03:27:06.590079 APIC: 02: enabled 1
1643 03:27:06.593187 APIC: 03: enabled 1
1644 03:27:06.596444 APIC: 06: enabled 1
1645 03:27:06.596530 PCI: 00:08.0: enabled 1
1646 03:27:06.599629 PCI: 00:14.2: enabled 1
1647 03:27:06.602804 PCI: 01:00.0: enabled 1
1648 03:27:06.605790 Disabling ACPI via APMC:
1649 03:27:06.609793 done.
1650 03:27:06.612853 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 03:27:06.615987 ELOG: NV offset 0xaf0000 size 0x4000
1652 03:27:06.623558 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 03:27:06.630401 ELOG: Event(17) added with size 13 at 2022-07-07 03:24:42 UTC
1654 03:27:06.636623 POST: Unexpected post code in previous boot: 0x73
1655 03:27:06.643318 ELOG: Event(A3) added with size 11 at 2022-07-07 03:24:42 UTC
1656 03:27:06.649976 ELOG: Event(92) added with size 9 at 2022-07-07 03:24:42 UTC
1657 03:27:06.656296 ELOG: Event(93) added with size 9 at 2022-07-07 03:24:42 UTC
1658 03:27:06.662834 ELOG: Event(9A) added with size 9 at 2022-07-07 03:24:42 UTC
1659 03:27:06.669216 ELOG: Event(9E) added with size 10 at 2022-07-07 03:24:42 UTC
1660 03:27:06.675797 ELOG: Event(9F) added with size 14 at 2022-07-07 03:24:42 UTC
1661 03:27:06.679311 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1662 03:27:06.685809 ELOG: Event(A1) added with size 10 at 2022-07-07 03:24:42 UTC
1663 03:27:06.695187 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1664 03:27:06.701863 ELOG: Event(A0) added with size 9 at 2022-07-07 03:24:43 UTC
1665 03:27:06.705301 elog_add_boot_reason: Logged dev mode boot
1666 03:27:06.708548 Finalize devices...
1667 03:27:06.708634 PCI: 00:17.0 final
1668 03:27:06.711526 Devices finalized
1669 03:27:06.715025 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1670 03:27:06.721441 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1671 03:27:06.724794 ME: HFSTS1 : 0x90000245
1672 03:27:06.731435 ME: HFSTS2 : 0x3B850126
1673 03:27:06.734426 ME: HFSTS3 : 0x00000020
1674 03:27:06.737812 ME: HFSTS4 : 0x00004800
1675 03:27:06.740980 ME: HFSTS5 : 0x00000000
1676 03:27:06.747370 ME: HFSTS6 : 0x40400006
1677 03:27:06.750499 ME: Manufacturing Mode : NO
1678 03:27:06.753964 ME: FW Partition Table : OK
1679 03:27:06.757227 ME: Bringup Loader Failure : NO
1680 03:27:06.760265 ME: Firmware Init Complete : YES
1681 03:27:06.763607 ME: Boot Options Present : NO
1682 03:27:06.767106 ME: Update In Progress : NO
1683 03:27:06.770378 ME: D0i3 Support : YES
1684 03:27:06.773363 ME: Low Power State Enabled : NO
1685 03:27:06.776736 ME: CPU Replaced : NO
1686 03:27:06.779870 ME: CPU Replacement Valid : YES
1687 03:27:06.783460 ME: Current Working State : 5
1688 03:27:06.786465 ME: Current Operation State : 1
1689 03:27:06.789922 ME: Current Operation Mode : 0
1690 03:27:06.793026 ME: Error Code : 0
1691 03:27:06.796345 ME: CPU Debug Disabled : YES
1692 03:27:06.799602 ME: TXT Support : NO
1693 03:27:06.802965 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1694 03:27:06.809622 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1695 03:27:06.812908 CBFS @ c08000 size 3f8000
1696 03:27:06.819353 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1697 03:27:06.822585 CBFS: Locating 'fallback/dsdt.aml'
1698 03:27:06.826072 CBFS: Found @ offset 10bb80 size 3fa5
1699 03:27:06.832226 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1700 03:27:06.832327 CBFS @ c08000 size 3f8000
1701 03:27:06.838638 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1702 03:27:06.841841 CBFS: Locating 'fallback/slic'
1703 03:27:06.849270 CBFS: 'fallback/slic' not found.
1704 03:27:06.852425 ACPI: Writing ACPI tables at 99b3e000.
1705 03:27:06.852510 ACPI: * FACS
1706 03:27:06.855530 ACPI: * DSDT
1707 03:27:06.858841 Ramoops buffer: 0x100000@0x99a3d000.
1708 03:27:06.862253 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1709 03:27:06.868796 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1710 03:27:06.871761 Google Chrome EC: version:
1711 03:27:06.875156 ro: helios_v2.0.2659-56403530b
1712 03:27:06.878452 rw: helios_v2.0.2849-c41de27e7d
1713 03:27:06.878535 running image: 1
1714 03:27:06.882940 ACPI: * FADT
1715 03:27:06.883016 SCI is IRQ9
1716 03:27:06.889550 ACPI: added table 1/32, length now 40
1717 03:27:06.889637 ACPI: * SSDT
1718 03:27:06.892981 Found 1 CPU(s) with 8 core(s) each.
1719 03:27:06.899290 Error: Could not locate 'wifi_sar' in VPD.
1720 03:27:06.902523 Checking CBFS for default SAR values
1721 03:27:06.905959 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1722 03:27:06.909180 CBFS @ c08000 size 3f8000
1723 03:27:06.915614 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1724 03:27:06.918697 CBFS: Locating 'wifi_sar_defaults.hex'
1725 03:27:06.922057 CBFS: Found @ offset 5fac0 size 77
1726 03:27:06.925427 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1727 03:27:06.931670 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1728 03:27:06.935293 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1729 03:27:06.941644 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1730 03:27:06.945055 failed to find key in VPD: dsm_calib_r0_0
1731 03:27:06.954757 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1732 03:27:06.961183 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1733 03:27:06.964601 failed to find key in VPD: dsm_calib_r0_1
1734 03:27:06.974458 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1735 03:27:06.977621 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1736 03:27:06.980859 failed to find key in VPD: dsm_calib_r0_2
1737 03:27:06.990801 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1738 03:27:06.997332 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1739 03:27:07.000491 failed to find key in VPD: dsm_calib_r0_3
1740 03:27:07.010082 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1741 03:27:07.013359 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1742 03:27:07.019936 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1743 03:27:07.023551 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1744 03:27:07.027033 EC returned error result code 1
1745 03:27:07.030050 EC returned error result code 1
1746 03:27:07.036875 EC returned error result code 1
1747 03:27:07.039841 PS2K: Bad resp from EC. Vivaldi disabled!
1748 03:27:07.046428 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1749 03:27:07.049836 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1750 03:27:07.056168 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1751 03:27:07.059692 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1752 03:27:07.066188 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1753 03:27:07.072316 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1754 03:27:07.078899 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1755 03:27:07.085446 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1756 03:27:07.088869 ACPI: added table 2/32, length now 44
1757 03:27:07.088954 ACPI: * MCFG
1758 03:27:07.092187 ACPI: added table 3/32, length now 48
1759 03:27:07.095567 ACPI: * TPM2
1760 03:27:07.098620 TPM2 log created at 99a2d000
1761 03:27:07.101825 ACPI: added table 4/32, length now 52
1762 03:27:07.105016 ACPI: * MADT
1763 03:27:07.105101 SCI is IRQ9
1764 03:27:07.108512 ACPI: added table 5/32, length now 56
1765 03:27:07.111862 current = 99b43ac0
1766 03:27:07.111946 ACPI: * DMAR
1767 03:27:07.115063 ACPI: added table 6/32, length now 60
1768 03:27:07.118003 ACPI: * IGD OpRegion
1769 03:27:07.121278 GMA: Found VBT in CBFS
1770 03:27:07.124815 GMA: Found valid VBT in CBFS
1771 03:27:07.127946 ACPI: added table 7/32, length now 64
1772 03:27:07.128030 ACPI: * HPET
1773 03:27:07.134387 ACPI: added table 8/32, length now 68
1774 03:27:07.134472 ACPI: done.
1775 03:27:07.137646 ACPI tables: 31744 bytes.
1776 03:27:07.140984 smbios_write_tables: 99a2c000
1777 03:27:07.144461 EC returned error result code 3
1778 03:27:07.147639 Couldn't obtain OEM name from CBI
1779 03:27:07.150755 Create SMBIOS type 17
1780 03:27:07.154198 PCI: 00:00.0 (Intel Cannonlake)
1781 03:27:07.157509 PCI: 00:14.3 (Intel WiFi)
1782 03:27:07.157593 SMBIOS tables: 939 bytes.
1783 03:27:07.163839 Writing table forward entry at 0x00000500
1784 03:27:07.166982 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1785 03:27:07.173533 Writing coreboot table at 0x99b62000
1786 03:27:07.176849 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1787 03:27:07.183096 1. 0000000000001000-000000000009ffff: RAM
1788 03:27:07.186601 2. 00000000000a0000-00000000000fffff: RESERVED
1789 03:27:07.192998 3. 0000000000100000-0000000099a2bfff: RAM
1790 03:27:07.196131 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1791 03:27:07.202828 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1792 03:27:07.209194 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1793 03:27:07.212645 7. 000000009a000000-000000009f7fffff: RESERVED
1794 03:27:07.218841 8. 00000000e0000000-00000000efffffff: RESERVED
1795 03:27:07.222144 9. 00000000fc000000-00000000fc000fff: RESERVED
1796 03:27:07.228473 10. 00000000fe000000-00000000fe00ffff: RESERVED
1797 03:27:07.231887 11. 00000000fed10000-00000000fed17fff: RESERVED
1798 03:27:07.238542 12. 00000000fed80000-00000000fed83fff: RESERVED
1799 03:27:07.241907 13. 00000000fed90000-00000000fed91fff: RESERVED
1800 03:27:07.244926 14. 00000000feda0000-00000000feda1fff: RESERVED
1801 03:27:07.251468 15. 0000000100000000-000000045e7fffff: RAM
1802 03:27:07.255144 Graphics framebuffer located at 0xc0000000
1803 03:27:07.258046 Passing 5 GPIOs to payload:
1804 03:27:07.264245 NAME | PORT | POLARITY | VALUE
1805 03:27:07.267875 write protect | undefined | high | low
1806 03:27:07.274158 lid | undefined | high | high
1807 03:27:07.277629 power | undefined | high | low
1808 03:27:07.284387 oprom | undefined | high | low
1809 03:27:07.290510 EC in RW | 0x000000cb | high | low
1810 03:27:07.290596 Board ID: 4
1811 03:27:07.297263 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1812 03:27:07.297349 CBFS @ c08000 size 3f8000
1813 03:27:07.303558 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1814 03:27:07.310038 Wrote coreboot table at: 99b62000, 0x594 bytes, checksum ef9
1815 03:27:07.313456 coreboot table: 1452 bytes.
1816 03:27:07.316597 IMD ROOT 0. 99fff000 00001000
1817 03:27:07.319938 IMD SMALL 1. 99ffe000 00001000
1818 03:27:07.323233 FSP MEMORY 2. 99c4e000 003b0000
1819 03:27:07.326323 CONSOLE 3. 99c2e000 00020000
1820 03:27:07.329751 FMAP 4. 99c2d000 0000054e
1821 03:27:07.332849 TIME STAMP 5. 99c2c000 00000910
1822 03:27:07.336273 VBOOT WORK 6. 99c18000 00014000
1823 03:27:07.339455 MRC DATA 7. 99c16000 00001958
1824 03:27:07.342710 ROMSTG STCK 8. 99c15000 00001000
1825 03:27:07.346290 AFTER CAR 9. 99c0b000 0000a000
1826 03:27:07.349393 RAMSTAGE 10. 99baf000 0005c000
1827 03:27:07.352469 REFCODE 11. 99b7a000 00035000
1828 03:27:07.355767 SMM BACKUP 12. 99b6a000 00010000
1829 03:27:07.358839 COREBOOT 13. 99b62000 00008000
1830 03:27:07.362297 ACPI 14. 99b3e000 00024000
1831 03:27:07.365459 ACPI GNVS 15. 99b3d000 00001000
1832 03:27:07.368986 RAMOOPS 16. 99a3d000 00100000
1833 03:27:07.371888 TPM2 TCGLOG17. 99a2d000 00010000
1834 03:27:07.375479 SMBIOS 18. 99a2c000 00000800
1835 03:27:07.378481 IMD small region:
1836 03:27:07.381814 IMD ROOT 0. 99ffec00 00000400
1837 03:27:07.385126 FSP RUNTIME 1. 99ffebe0 00000004
1838 03:27:07.388279 EC HOSTEVENT 2. 99ffebc0 00000008
1839 03:27:07.391726 POWER STATE 3. 99ffeb80 00000040
1840 03:27:07.394856 ROMSTAGE 4. 99ffeb60 00000004
1841 03:27:07.398154 MEM INFO 5. 99ffe9a0 000001b9
1842 03:27:07.401498 MTRR: Physical address space:
1843 03:27:07.407969 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1844 03:27:07.414459 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1845 03:27:07.420795 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1846 03:27:07.427271 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1847 03:27:07.433687 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1848 03:27:07.440557 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1849 03:27:07.446822 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1850 03:27:07.450041 MTRR: Fixed MSR 0x250 0x0606060606060606
1851 03:27:07.453625 MTRR: Fixed MSR 0x258 0x0606060606060606
1852 03:27:07.456767 MTRR: Fixed MSR 0x259 0x0000000000000000
1853 03:27:07.463261 MTRR: Fixed MSR 0x268 0x0606060606060606
1854 03:27:07.466272 MTRR: Fixed MSR 0x269 0x0606060606060606
1855 03:27:07.469771 MTRR: Fixed MSR 0x26a 0x0606060606060606
1856 03:27:07.473027 MTRR: Fixed MSR 0x26b 0x0606060606060606
1857 03:27:07.479272 MTRR: Fixed MSR 0x26c 0x0606060606060606
1858 03:27:07.482772 MTRR: Fixed MSR 0x26d 0x0606060606060606
1859 03:27:07.486103 MTRR: Fixed MSR 0x26e 0x0606060606060606
1860 03:27:07.489023 MTRR: Fixed MSR 0x26f 0x0606060606060606
1861 03:27:07.493472 call enable_fixed_mtrr()
1862 03:27:07.496691 CPU physical address size: 39 bits
1863 03:27:07.503091 MTRR: default type WB/UC MTRR counts: 6/8.
1864 03:27:07.506529 MTRR: WB selected as default type.
1865 03:27:07.512977 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1866 03:27:07.519524 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1867 03:27:07.522623 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1868 03:27:07.529215 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1869 03:27:07.535852 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1870 03:27:07.542474 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1871 03:27:07.548819 MTRR: Fixed MSR 0x250 0x0606060606060606
1872 03:27:07.552115 MTRR: Fixed MSR 0x258 0x0606060606060606
1873 03:27:07.555187 MTRR: Fixed MSR 0x259 0x0000000000000000
1874 03:27:07.561984 MTRR: Fixed MSR 0x268 0x0606060606060606
1875 03:27:07.565528 MTRR: Fixed MSR 0x269 0x0606060606060606
1876 03:27:07.568334 MTRR: Fixed MSR 0x26a 0x0606060606060606
1877 03:27:07.571454 MTRR: Fixed MSR 0x26b 0x0606060606060606
1878 03:27:07.578123 MTRR: Fixed MSR 0x26c 0x0606060606060606
1879 03:27:07.581546 MTRR: Fixed MSR 0x26d 0x0606060606060606
1880 03:27:07.584625 MTRR: Fixed MSR 0x26e 0x0606060606060606
1881 03:27:07.587768 MTRR: Fixed MSR 0x26f 0x0606060606060606
1882 03:27:07.587852
1883 03:27:07.591573 MTRR check
1884 03:27:07.594620 Fixed MTRRs : Enabled
1885 03:27:07.594699 Variable MTRRs: Enabled
1886 03:27:07.594766
1887 03:27:07.597952 call enable_fixed_mtrr()
1888 03:27:07.604597 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1889 03:27:07.607784 CPU physical address size: 39 bits
1890 03:27:07.610833 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1891 03:27:07.617432 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 03:27:07.620709 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 03:27:07.623782 MTRR: Fixed MSR 0x258 0x0606060606060606
1894 03:27:07.627220 MTRR: Fixed MSR 0x259 0x0000000000000000
1895 03:27:07.633913 MTRR: Fixed MSR 0x268 0x0606060606060606
1896 03:27:07.636941 MTRR: Fixed MSR 0x269 0x0606060606060606
1897 03:27:07.640306 MTRR: Fixed MSR 0x26a 0x0606060606060606
1898 03:27:07.646836 MTRR: Fixed MSR 0x26b 0x0606060606060606
1899 03:27:07.649851 MTRR: Fixed MSR 0x26c 0x0606060606060606
1900 03:27:07.653097 MTRR: Fixed MSR 0x26d 0x0606060606060606
1901 03:27:07.656676 MTRR: Fixed MSR 0x26e 0x0606060606060606
1902 03:27:07.662763 MTRR: Fixed MSR 0x26f 0x0606060606060606
1903 03:27:07.666116 MTRR: Fixed MSR 0x258 0x0606060606060606
1904 03:27:07.669628 call enable_fixed_mtrr()
1905 03:27:07.672778 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 03:27:07.676222 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 03:27:07.679285 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 03:27:07.685595 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 03:27:07.688963 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 03:27:07.692053 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 03:27:07.695448 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 03:27:07.702118 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 03:27:07.705284 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 03:27:07.708518 CPU physical address size: 39 bits
1915 03:27:07.711929 call enable_fixed_mtrr()
1916 03:27:07.715221 MTRR: Fixed MSR 0x250 0x0606060606060606
1917 03:27:07.721646 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 03:27:07.725032 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 03:27:07.728174 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 03:27:07.731535 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 03:27:07.737807 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 03:27:07.741338 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 03:27:07.744461 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 03:27:07.747648 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 03:27:07.754374 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 03:27:07.757616 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 03:27:07.760651 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 03:27:07.764117 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 03:27:07.770685 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 03:27:07.773866 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 03:27:07.777086 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 03:27:07.780634 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 03:27:07.786790 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 03:27:07.790217 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 03:27:07.793335 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 03:27:07.796661 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 03:27:07.803319 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 03:27:07.806544 call enable_fixed_mtrr()
1939 03:27:07.806638 call enable_fixed_mtrr()
1940 03:27:07.809888 CPU physical address size: 39 bits
1941 03:27:07.816050 CPU physical address size: 39 bits
1942 03:27:07.819442 MTRR: Fixed MSR 0x250 0x0606060606060606
1943 03:27:07.822517 MTRR: Fixed MSR 0x258 0x0606060606060606
1944 03:27:07.825868 MTRR: Fixed MSR 0x259 0x0000000000000000
1945 03:27:07.832254 MTRR: Fixed MSR 0x268 0x0606060606060606
1946 03:27:07.835815 MTRR: Fixed MSR 0x269 0x0606060606060606
1947 03:27:07.838939 MTRR: Fixed MSR 0x26a 0x0606060606060606
1948 03:27:07.842365 MTRR: Fixed MSR 0x26b 0x0606060606060606
1949 03:27:07.848981 MTRR: Fixed MSR 0x26c 0x0606060606060606
1950 03:27:07.852379 MTRR: Fixed MSR 0x26d 0x0606060606060606
1951 03:27:07.855601 MTRR: Fixed MSR 0x26e 0x0606060606060606
1952 03:27:07.858648 MTRR: Fixed MSR 0x26f 0x0606060606060606
1953 03:27:07.864901 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 03:27:07.865027 call enable_fixed_mtrr()
1955 03:27:07.871573 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 03:27:07.874825 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 03:27:07.877999 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 03:27:07.884637 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 03:27:07.887902 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 03:27:07.891112 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 03:27:07.894550 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 03:27:07.900946 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 03:27:07.904042 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 03:27:07.907589 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 03:27:07.910783 CPU physical address size: 39 bits
1966 03:27:07.913929 call enable_fixed_mtrr()
1967 03:27:07.917208 CBFS @ c08000 size 3f8000
1968 03:27:07.924036 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1969 03:27:07.927103 CPU physical address size: 39 bits
1970 03:27:07.930068 CPU physical address size: 39 bits
1971 03:27:07.933495 CBFS: Locating 'fallback/payload'
1972 03:27:07.937068 CBFS: Found @ offset 1c96c0 size 3f798
1973 03:27:07.943317 Checking segment from ROM address 0xffdd16f8
1974 03:27:07.946571 Checking segment from ROM address 0xffdd1714
1975 03:27:07.949779 Loading segment from ROM address 0xffdd16f8
1976 03:27:07.953160 code (compression=0)
1977 03:27:07.962680 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1978 03:27:07.969292 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1979 03:27:07.972712 it's not compressed!
1980 03:27:08.064898 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1981 03:27:08.071496 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1982 03:27:08.078260 Loading segment from ROM address 0xffdd1714
1983 03:27:08.078347 Entry Point 0x30000000
1984 03:27:08.081344 Loaded segments
1985 03:27:08.086944 Finalizing chipset.
1986 03:27:08.090097 Finalizing SMM.
1987 03:27:08.093550 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
1988 03:27:08.096792 mp_park_aps done after 0 msecs.
1989 03:27:08.103128 Jumping to boot code at 30000000(99b62000)
1990 03:27:08.109698 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1991 03:27:08.109778
1992 03:27:08.112789 Starting depthcharge on Helios...
1993 03:27:08.113128 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1994 03:27:08.113241 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1995 03:27:08.113330 Setting prompt string to ['hatch:']
1996 03:27:08.113415 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1997 03:27:08.123093 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1998 03:27:08.129185 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1999 03:27:08.135604 board_setup: Info: eMMC controller not present; skipping
2000 03:27:08.139203 New NVMe Controller 0x30053ac0 @ 00:1d:00
2001 03:27:08.145509 board_setup: Info: SDHCI controller not present; skipping
2002 03:27:08.152151 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2003 03:27:08.155494 Wipe memory regions:
2004 03:27:08.158456 [0x00000000001000, 0x000000000a0000)
2005 03:27:08.161806 [0x00000000100000, 0x00000030000000)
2006 03:27:08.226290 [0x00000030657430, 0x00000099a2c000)
2007 03:27:08.365000 [0x00000100000000, 0x0000045e800000)
2008 03:27:09.710527 R8152: Initializing
2009 03:27:09.713648 Version 9 (ocp_data = 6010)
2010 03:27:09.717798 R8152: Done initializing
2011 03:27:09.721249 Adding net device
2012 03:27:10.091307 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2013 03:27:10.091444
2014 03:27:10.091729 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2016 03:27:10.192455 hatch: tftpboot 192.168.201.1 6770194/tftp-deploy-4wtpbis9/kernel/bzImage 6770194/tftp-deploy-4wtpbis9/kernel/cmdline 6770194/tftp-deploy-4wtpbis9/ramdisk/ramdisk.cpio.gz
2017 03:27:10.192617 Setting prompt string to ['Starting kernel']
2018 03:27:10.192697 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2019 03:27:10.192777 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:39)
2020 03:27:10.196650 tftpboot 192.168.201.1 6770194/tftp-deploy-4wtpbis9/kernel/bzImoy-4wtpbis9/kernel/cmdline 6770194/tftp-deploy-4wtpbis9/ramdisk/ramdisk.cpio.gz
2021 03:27:10.196737 Waiting for link
2022 03:27:10.397735 done.
2023 03:27:10.397876 MAC: f4:f5:e8:50:e7:f3
2024 03:27:10.400935 Sending DHCP discover... done.
2025 03:27:10.404055 Waiting for reply... done.
2026 03:27:10.407468 Sending DHCP request... done.
2027 03:27:10.410769 Waiting for reply... done.
2028 03:27:10.413823 My ip is 192.168.201.16
2029 03:27:10.416957 The DHCP server ip is 192.168.201.1
2030 03:27:10.420436 TFTP server IP predefined by user: 192.168.201.1
2031 03:27:10.426978 Bootfile predefined by user: 6770194/tftp-deploy-4wtpbis9/kernel/bzImage
2032 03:27:10.433529 Sending tftp read request... done.
2033 03:27:10.436818 Waiting for the transfer...
2034 03:27:10.667930 00000000 ################################################################
2035 03:27:10.894281 00080000 ################################################################
2036 03:27:11.121608 00100000 ################################################################
2037 03:27:11.347522 00180000 ################################################################
2038 03:27:11.574239 00200000 ################################################################
2039 03:27:11.808571 00280000 ################################################################
2040 03:27:12.038627 00300000 ################################################################
2041 03:27:12.264592 00380000 ################################################################
2042 03:27:12.489008 00400000 ################################################################
2043 03:27:12.716592 00480000 ################################################################
2044 03:27:12.942539 00500000 ################################################################
2045 03:27:13.171885 00580000 ################################################################
2046 03:27:13.397094 00600000 ################################################################
2047 03:27:13.551206 00680000 ############################################ done.
2048 03:27:13.554250 The bootfile was 7176128 bytes long.
2049 03:27:13.557581 Sending tftp read request... done.
2050 03:27:13.561047 Waiting for the transfer...
2051 03:27:13.793527 00000000 ################################################################
2052 03:27:14.023470 00080000 ################################################################
2053 03:27:14.271525 00100000 ################################################################
2054 03:27:14.516537 00180000 ################################################################
2055 03:27:14.769348 00200000 ################################################################
2056 03:27:15.007019 00280000 ################################################################
2057 03:27:15.245021 00300000 ################################################################
2058 03:27:15.479276 00380000 ################################################################
2059 03:27:15.719790 00400000 ################################################################
2060 03:27:15.959311 00480000 ################################################################
2061 03:27:16.075834 00500000 ############################## done.
2062 03:27:16.078847 Sending tftp read request... done.
2063 03:27:16.082280 Waiting for the transfer...
2064 03:27:16.082376 00000000 # done.
2065 03:27:16.091921 Command line loaded dynamically from TFTP file: 6770194/tftp-deploy-4wtpbis9/kernel/cmdline
2066 03:27:16.118053 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6770194/extract-nfsrootfs-t2_u0xy4,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2067 03:27:16.124461 ec_init(0): CrosEC protocol v3 supported (256, 256)
2068 03:27:16.132787 Shutting down all USB controllers.
2069 03:27:16.132875 Removing current net device
2070 03:27:16.136638 Finalizing coreboot
2071 03:27:16.143248 Exiting depthcharge with code 4 at timestamp: 15312663
2072 03:27:16.143336
2073 03:27:16.143424 Starting kernel ...
2074 03:27:16.143504
2075 03:27:16.143605
2076 03:27:16.143913 end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
2077 03:27:16.144014 start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
2078 03:27:16.144107 Setting prompt string to ['Linux version [0-9]']
2079 03:27:16.144182 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2080 03:27:16.144267 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2082 03:31:49.144991 end: 2.2.5 auto-login-action (duration 00:04:33) [common]
2084 03:31:49.146208 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
2086 03:31:49.147140 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2089 03:31:49.148868 end: 2 depthcharge-action (duration 00:05:00) [common]
2091 03:31:49.149998 Cleaning after the job
2092 03:31:49.150452 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770194/tftp-deploy-4wtpbis9/ramdisk
2093 03:31:49.152776 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770194/tftp-deploy-4wtpbis9/kernel
2094 03:31:49.155457 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770194/tftp-deploy-4wtpbis9/nfsrootfs
2095 03:31:49.231296 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770194/tftp-deploy-4wtpbis9/modules
2096 03:31:49.231612 start: 4.1 power-off (timeout 00:00:30) [common]
2097 03:31:49.231782 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2098 03:31:49.251011 >> Command sent successfully.
2099 03:31:49.252889 Returned 0 in 0 seconds
2100 03:31:49.354192 end: 4.1 power-off (duration 00:00:00) [common]
2102 03:31:49.356661 start: 4.2 read-feedback (timeout 00:10:00) [common]
2103 03:31:49.357821 Listened to connection for namespace 'common' for up to 1s
2104 03:31:50.361101 Finalising connection for namespace 'common'
2105 03:31:50.361287 Disconnecting from shell: Finalise
2106 03:31:50.461995 end: 4.2 read-feedback (duration 00:00:01) [common]
2107 03:31:50.462136 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6770194
2108 03:31:50.617724 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6770194
2109 03:31:50.617903 JobError: Your job cannot terminate cleanly.