Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 03:24:03.852083 lava-dispatcher, installed at version: 2022.04
2 03:24:03.852287 start: 0 validate
3 03:24:03.852418 Start time: 2022-07-07 03:24:03.852409+00:00 (UTC)
4 03:24:03.852554 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:24:03.852687 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220610.0%2Famd64%2Finitrd.cpio.gz exists
6 03:24:04.159040 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:24:04.159225 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.9.196-8580-gf266375ffc61%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:24:04.451723 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:24:04.451924 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220610.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 03:24:04.738583 Using caching service: 'http://localhost/cache/?uri=%s'
11 03:24:04.738746 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-4.4.y-cip-rc%2Fv4.9.196-8580-gf266375ffc61%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 03:24:05.033375 validate duration: 1.18
14 03:24:05.033689 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 03:24:05.033788 start: 1.1 download-retry (timeout 00:10:00) [common]
16 03:24:05.033898 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 03:24:05.034008 Not decompressing ramdisk as can be used compressed.
18 03:24:05.034091 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220610.0/amd64/initrd.cpio.gz
19 03:24:05.034158 saving as /var/lib/lava/dispatcher/tmp/6770189/tftp-deploy-rnwv4cu3/ramdisk/initrd.cpio.gz
20 03:24:05.034218 total size: 5411079 (5MB)
21 03:24:05.035381 progress 0% (0MB)
22 03:24:05.036789 progress 5% (0MB)
23 03:24:05.038107 progress 10% (0MB)
24 03:24:05.039522 progress 15% (0MB)
25 03:24:05.040955 progress 20% (1MB)
26 03:24:05.042259 progress 25% (1MB)
27 03:24:05.043580 progress 30% (1MB)
28 03:24:05.044849 progress 35% (1MB)
29 03:24:05.046427 progress 40% (2MB)
30 03:24:05.047836 progress 45% (2MB)
31 03:24:05.049207 progress 50% (2MB)
32 03:24:05.050502 progress 55% (2MB)
33 03:24:05.052039 progress 60% (3MB)
34 03:24:05.053336 progress 65% (3MB)
35 03:24:05.054721 progress 70% (3MB)
36 03:24:05.056065 progress 75% (3MB)
37 03:24:05.057511 progress 80% (4MB)
38 03:24:05.058770 progress 85% (4MB)
39 03:24:05.060108 progress 90% (4MB)
40 03:24:05.061481 progress 95% (4MB)
41 03:24:05.062967 progress 100% (5MB)
42 03:24:05.063230 5MB downloaded in 0.03s (177.90MB/s)
43 03:24:05.063433 end: 1.1.1 http-download (duration 00:00:00) [common]
45 03:24:05.063678 end: 1.1 download-retry (duration 00:00:00) [common]
46 03:24:05.063788 start: 1.2 download-retry (timeout 00:10:00) [common]
47 03:24:05.063887 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 03:24:05.063990 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.9.196-8580-gf266375ffc61/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 03:24:05.064056 saving as /var/lib/lava/dispatcher/tmp/6770189/tftp-deploy-rnwv4cu3/kernel/bzImage
50 03:24:05.064116 total size: 7176128 (6MB)
51 03:24:05.064175 No compression specified
52 03:24:05.065323 progress 0% (0MB)
53 03:24:05.067236 progress 5% (0MB)
54 03:24:05.069031 progress 10% (0MB)
55 03:24:05.070801 progress 15% (1MB)
56 03:24:05.072624 progress 20% (1MB)
57 03:24:05.074367 progress 25% (1MB)
58 03:24:05.076174 progress 30% (2MB)
59 03:24:05.077992 progress 35% (2MB)
60 03:24:05.079805 progress 40% (2MB)
61 03:24:05.081589 progress 45% (3MB)
62 03:24:05.083507 progress 50% (3MB)
63 03:24:05.085219 progress 55% (3MB)
64 03:24:05.086985 progress 60% (4MB)
65 03:24:05.088820 progress 65% (4MB)
66 03:24:05.090538 progress 70% (4MB)
67 03:24:05.092297 progress 75% (5MB)
68 03:24:05.094009 progress 80% (5MB)
69 03:24:05.095773 progress 85% (5MB)
70 03:24:05.097480 progress 90% (6MB)
71 03:24:05.099250 progress 95% (6MB)
72 03:24:05.100896 progress 100% (6MB)
73 03:24:05.101204 6MB downloaded in 0.04s (184.62MB/s)
74 03:24:05.101381 end: 1.2.1 http-download (duration 00:00:00) [common]
76 03:24:05.101616 end: 1.2 download-retry (duration 00:00:00) [common]
77 03:24:05.101704 start: 1.3 download-retry (timeout 00:10:00) [common]
78 03:24:05.101813 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 03:24:05.101932 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220610.0/amd64/full.rootfs.tar.xz
80 03:24:05.101998 saving as /var/lib/lava/dispatcher/tmp/6770189/tftp-deploy-rnwv4cu3/nfsrootfs/full.rootfs.tar
81 03:24:05.102058 total size: 122466332 (116MB)
82 03:24:05.102117 Using unxz to decompress xz
83 03:24:05.105582 progress 0% (0MB)
84 03:24:05.535039 progress 5% (5MB)
85 03:24:05.977275 progress 10% (11MB)
86 03:24:06.420466 progress 15% (17MB)
87 03:24:06.870964 progress 20% (23MB)
88 03:24:07.183272 progress 25% (29MB)
89 03:24:07.519592 progress 30% (35MB)
90 03:24:07.757271 progress 35% (40MB)
91 03:24:07.957266 progress 40% (46MB)
92 03:24:08.294599 progress 45% (52MB)
93 03:24:08.641807 progress 50% (58MB)
94 03:24:08.965999 progress 55% (64MB)
95 03:24:09.306111 progress 60% (70MB)
96 03:24:09.628945 progress 65% (75MB)
97 03:24:09.995438 progress 70% (81MB)
98 03:24:10.391193 progress 75% (87MB)
99 03:24:10.788814 progress 80% (93MB)
100 03:24:10.898431 progress 85% (99MB)
101 03:24:11.060942 progress 90% (105MB)
102 03:24:11.377368 progress 95% (110MB)
103 03:24:11.734418 progress 100% (116MB)
104 03:24:11.739856 116MB downloaded in 6.64s (17.60MB/s)
105 03:24:11.740169 end: 1.3.1 http-download (duration 00:00:07) [common]
107 03:24:11.740447 end: 1.3 download-retry (duration 00:00:07) [common]
108 03:24:11.740540 start: 1.4 download-retry (timeout 00:09:53) [common]
109 03:24:11.740630 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 03:24:11.740746 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-4.4.y-cip-rc/v4.9.196-8580-gf266375ffc61/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 03:24:11.740821 saving as /var/lib/lava/dispatcher/tmp/6770189/tftp-deploy-rnwv4cu3/modules/modules.tar
112 03:24:11.740884 total size: 54512 (0MB)
113 03:24:11.740947 Using unxz to decompress xz
114 03:24:11.744168 progress 60% (0MB)
115 03:24:11.744556 progress 100% (0MB)
116 03:24:11.747952 0MB downloaded in 0.01s (7.36MB/s)
117 03:24:11.748165 end: 1.4.1 http-download (duration 00:00:00) [common]
119 03:24:11.748424 end: 1.4 download-retry (duration 00:00:00) [common]
120 03:24:11.748518 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 03:24:11.748613 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 03:24:13.389479 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6770189/extract-nfsrootfs-s2mf9kul
123 03:24:13.389687 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 03:24:13.389794 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 03:24:13.389932 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe
126 03:24:13.390032 makedir: /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin
127 03:24:13.390117 makedir: /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/tests
128 03:24:13.390198 makedir: /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/results
129 03:24:13.390297 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-add-keys
130 03:24:13.390425 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-add-sources
131 03:24:13.390541 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-background-process-start
132 03:24:13.390654 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-background-process-stop
133 03:24:13.390767 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-common-functions
134 03:24:13.390877 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-echo-ipv4
135 03:24:13.390988 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-install-packages
136 03:24:13.391185 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-installed-packages
137 03:24:13.391294 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-os-build
138 03:24:13.391404 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-probe-channel
139 03:24:13.391514 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-probe-ip
140 03:24:13.391622 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-target-ip
141 03:24:13.391730 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-target-mac
142 03:24:13.391838 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-target-storage
143 03:24:13.391947 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-test-case
144 03:24:13.392058 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-test-event
145 03:24:13.392166 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-test-feedback
146 03:24:13.392274 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-test-raise
147 03:24:13.392418 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-test-reference
148 03:24:13.392525 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-test-runner
149 03:24:13.392633 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-test-set
150 03:24:13.392748 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-test-shell
151 03:24:13.392888 Updating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-install-packages (oe)
152 03:24:13.393001 Updating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/bin/lava-installed-packages (oe)
153 03:24:13.393120 Creating /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/environment
154 03:24:13.393228 LAVA metadata
155 03:24:13.393294 - LAVA_JOB_ID=6770189
156 03:24:13.393372 - LAVA_DISPATCHER_IP=192.168.201.1
157 03:24:13.393472 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 03:24:13.393538 skipped lava-vland-overlay
159 03:24:13.393614 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 03:24:13.393695 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 03:24:13.393757 skipped lava-multinode-overlay
162 03:24:13.393832 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 03:24:13.393913 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 03:24:13.393984 Loading test definitions
165 03:24:13.394076 start: 1.5.2.3.1 git-repo-action (timeout 00:09:52) [common]
166 03:24:13.394177 Using /lava-6770189 at stage 0
167 03:24:13.394273 Fetching tests from https://github.com/kernelci/test-definitions
168 03:24:13.394352 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/0/tests/0_ltp-timers'
169 03:24:18.763772 Running '/usr/bin/git checkout kernelci.org
170 03:24:18.897686 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 03:24:18.898375 uuid=6770189_1.5.2.3.1 testdef=None
172 03:24:18.898553 end: 1.5.2.3.1 git-repo-action (duration 00:00:06) [common]
174 03:24:18.898872 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
175 03:24:18.899609 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 03:24:18.899857 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
178 03:24:18.900699 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 03:24:18.900949 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
181 03:24:18.901719 runner path: /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/0/tests/0_ltp-timers test_uuid 6770189_1.5.2.3.1
182 03:24:18.901811 GRP_TEST='TMR'
183 03:24:18.901878 SKIPFILE='skipfile-lkft.yaml'
184 03:24:18.901940 SKIP_INSTALL='true'
185 03:24:18.902001 TST_CMDFILES=''
186 03:24:18.902138 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 03:24:18.902356 Creating lava-test-runner.conf files
189 03:24:18.902423 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6770189/lava-overlay-vgwfwpbe/lava-6770189/0 for stage 0
190 03:24:18.902526 - 0_ltp-timers
191 03:24:18.902632 end: 1.5.2.3 test-definition (duration 00:00:06) [common]
192 03:24:18.902725 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
193 03:24:26.046651 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
194 03:24:26.046834 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
195 03:24:26.046954 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 03:24:26.047110 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
197 03:24:26.047203 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
198 03:24:26.149753 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 03:24:26.150093 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
200 03:24:26.150207 extracting modules file /var/lib/lava/dispatcher/tmp/6770189/tftp-deploy-rnwv4cu3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6770189/extract-nfsrootfs-s2mf9kul
201 03:24:26.154188 extracting modules file /var/lib/lava/dispatcher/tmp/6770189/tftp-deploy-rnwv4cu3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6770189/extract-overlay-ramdisk-5nfchwdr/ramdisk
202 03:24:26.157964 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 03:24:26.158078 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
204 03:24:26.158166 [common] Applying overlay to NFS
205 03:24:26.158238 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6770189/compress-overlay-x0ey59p1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6770189/extract-nfsrootfs-s2mf9kul
206 03:24:26.602133 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 03:24:26.602313 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
208 03:24:26.602414 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 03:24:26.602508 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
210 03:24:26.602591 Building ramdisk /var/lib/lava/dispatcher/tmp/6770189/extract-overlay-ramdisk-5nfchwdr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6770189/extract-overlay-ramdisk-5nfchwdr/ramdisk
211 03:24:26.635958 >> 24458 blocks
212 03:24:27.112746 rename /var/lib/lava/dispatcher/tmp/6770189/extract-overlay-ramdisk-5nfchwdr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6770189/tftp-deploy-rnwv4cu3/ramdisk/ramdisk.cpio.gz
213 03:24:27.113131 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
214 03:24:27.113252 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
215 03:24:27.113357 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
216 03:24:27.113452 No mkimage arch provided, not using FIT.
217 03:24:27.113541 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 03:24:27.113624 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 03:24:27.113725 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
220 03:24:27.113819 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
221 03:24:27.113896 No LXC device requested
222 03:24:27.113979 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 03:24:27.114068 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
224 03:24:27.114149 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 03:24:27.114218 Checking files for TFTP limit of 4294967296 bytes.
226 03:24:27.114592 end: 1 tftp-deploy (duration 00:00:22) [common]
227 03:24:27.114693 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 03:24:27.114788 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 03:24:27.114923 substitutions:
230 03:24:27.114995 - {DTB}: None
231 03:24:27.115098 - {INITRD}: 6770189/tftp-deploy-rnwv4cu3/ramdisk/ramdisk.cpio.gz
232 03:24:27.115159 - {KERNEL}: 6770189/tftp-deploy-rnwv4cu3/kernel/bzImage
233 03:24:27.115218 - {LAVA_MAC}: None
234 03:24:27.115276 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6770189/extract-nfsrootfs-s2mf9kul
235 03:24:27.115335 - {NFS_SERVER_IP}: 192.168.201.1
236 03:24:27.115392 - {PRESEED_CONFIG}: None
237 03:24:27.115449 - {PRESEED_LOCAL}: None
238 03:24:27.115505 - {RAMDISK}: 6770189/tftp-deploy-rnwv4cu3/ramdisk/ramdisk.cpio.gz
239 03:24:27.115562 - {ROOT_PART}: None
240 03:24:27.115617 - {ROOT}: None
241 03:24:27.115673 - {SERVER_IP}: 192.168.201.1
242 03:24:27.115728 - {TEE}: None
243 03:24:27.115784 Parsed boot commands:
244 03:24:27.115840 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 03:24:27.115993 Parsed boot commands: tftpboot 192.168.201.1 6770189/tftp-deploy-rnwv4cu3/kernel/bzImage 6770189/tftp-deploy-rnwv4cu3/kernel/cmdline 6770189/tftp-deploy-rnwv4cu3/ramdisk/ramdisk.cpio.gz
246 03:24:27.116085 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 03:24:27.116171 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 03:24:27.116262 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 03:24:27.116347 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 03:24:27.116418 Not connected, no need to disconnect.
251 03:24:27.116497 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 03:24:27.116582 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 03:24:27.116651 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
254 03:24:27.119525 Setting prompt string to ['lava-test: # ']
255 03:24:27.119814 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 03:24:27.119924 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 03:24:27.120026 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 03:24:27.120118 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 03:24:27.120296 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
260 03:24:27.139838 >> Command sent successfully.
261 03:24:27.141967 Returned 0 in 0 seconds
262 03:24:27.242782 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
264 03:24:27.243112 end: 2.2.2 reset-device (duration 00:00:00) [common]
265 03:24:27.243211 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
266 03:24:27.243298 Setting prompt string to 'Starting depthcharge on Helios...'
267 03:24:27.243366 Changing prompt to 'Starting depthcharge on Helios...'
268 03:24:27.243437 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 03:24:27.243719 [Enter `^Ec?' for help]
270 03:24:34.538316
271 03:24:34.538474
272 03:24:34.548198 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 03:24:34.551348 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 03:24:34.557732 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 03:24:34.564379 CPU: AES supported, TXT NOT supported, VT supported
276 03:24:34.567614 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 03:24:34.574211 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 03:24:34.577285 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 03:24:34.580622 VBOOT: Loading verstage.
280 03:24:34.587155 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
281 03:24:34.590362 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 03:24:34.597068 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 03:24:34.600386 CBFS @ c08000 size 3f8000
284 03:24:34.603594 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 03:24:34.606809 CBFS: Locating 'fallback/verstage'
286 03:24:34.613305 CBFS: Found @ offset 10fb80 size 1072c
287 03:24:34.613391
288 03:24:34.613458
289 03:24:34.623115 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 03:24:34.639460 Probing TPM: . done!
291 03:24:34.642684 TPM ready after 0 ms
292 03:24:34.645974 Connected to device vid:did:rid of 1ae0:0028:00
293 03:24:34.656209 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
294 03:24:34.659543 Initialized TPM device CR50 revision 0
295 03:24:34.705331 tlcl_send_startup: Startup return code is 0
296 03:24:34.705422 TPM: setup succeeded
297 03:24:34.718217 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 03:24:34.722137 Chrome EC: UHEPI supported
299 03:24:34.725243 Phase 1
300 03:24:34.728657 FMAP: area GBB found @ c05000 (12288 bytes)
301 03:24:34.735211 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 03:24:34.738463 Phase 2
303 03:24:34.738549 Phase 3
304 03:24:34.741651 FMAP: area GBB found @ c05000 (12288 bytes)
305 03:24:34.748189 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 03:24:34.754773 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 03:24:34.757850 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
308 03:24:34.764636 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 03:24:34.780769 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 03:24:34.783923 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
311 03:24:34.790552 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 03:24:34.794894 Phase 4
313 03:24:34.798127 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
314 03:24:34.804802 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 03:24:34.984459 VB2:vb2_rsa_verify_digest() Digest check failed!
316 03:24:34.991057 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 03:24:34.991146 Saving nvdata
318 03:24:34.994132 Reboot requested (10020007)
319 03:24:34.997209 board_reset() called!
320 03:24:34.997294 full_reset() called!
321 03:24:39.505768
322 03:24:39.505983
323 03:24:39.515185 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
324 03:24:39.518510 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
325 03:24:39.524863 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
326 03:24:39.528093 CPU: AES supported, TXT NOT supported, VT supported
327 03:24:39.534614 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
328 03:24:39.541285 PCH: device id 0284 (rev 00) is Cometlake-U Premium
329 03:24:39.544652 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
330 03:24:39.548022 VBOOT: Loading verstage.
331 03:24:39.554345 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
332 03:24:39.557947 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
333 03:24:39.564498 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
334 03:24:39.567698 CBFS @ c08000 size 3f8000
335 03:24:39.571076 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
336 03:24:39.574169 CBFS: Locating 'fallback/verstage'
337 03:24:39.580920 CBFS: Found @ offset 10fb80 size 1072c
338 03:24:39.581413
339 03:24:39.581835
340 03:24:39.590728 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
341 03:24:39.606765 Probing TPM: . done!
342 03:24:39.610122 TPM ready after 0 ms
343 03:24:39.613604 Connected to device vid:did:rid of 1ae0:0028:00
344 03:24:39.623506 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
345 03:24:39.627081 Initialized TPM device CR50 revision 0
346 03:24:39.672749 tlcl_send_startup: Startup return code is 0
347 03:24:39.673266 TPM: setup succeeded
348 03:24:39.686657 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
349 03:24:39.690432 Chrome EC: UHEPI supported
350 03:24:39.693706 Phase 1
351 03:24:39.696987 FMAP: area GBB found @ c05000 (12288 bytes)
352 03:24:39.703399 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
353 03:24:39.709913 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
354 03:24:39.713434 Recovery requested (1009000e)
355 03:24:39.719174 Saving nvdata
356 03:24:39.725428 tlcl_extend: response is 0
357 03:24:39.734064 tlcl_extend: response is 0
358 03:24:39.741125 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 03:24:39.744439 CBFS @ c08000 size 3f8000
360 03:24:39.750874 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
361 03:24:39.754218 CBFS: Locating 'fallback/romstage'
362 03:24:39.757491 CBFS: Found @ offset 80 size 145fc
363 03:24:39.760800 Accumulated console time in verstage 98 ms
364 03:24:39.761199
365 03:24:39.763870
366 03:24:39.773877 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
367 03:24:39.780382 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
368 03:24:39.783758 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
369 03:24:39.786859 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
370 03:24:39.793547 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
371 03:24:39.796776 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
372 03:24:39.800101 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
373 03:24:39.803254 TCO_STS: 0000 0000
374 03:24:39.806741 GEN_PMCON: e0015238 00000200
375 03:24:39.809788 GBLRST_CAUSE: 00000000 00000000
376 03:24:39.813197 prev_sleep_state 5
377 03:24:39.816633 Boot Count incremented to 27463
378 03:24:39.819947 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 03:24:39.823146 CBFS @ c08000 size 3f8000
380 03:24:39.829617 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 03:24:39.832890 CBFS: Locating 'fspm.bin'
382 03:24:39.836264 CBFS: Found @ offset 5ffc0 size 71000
383 03:24:39.839675 Chrome EC: UHEPI supported
384 03:24:39.846045 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
385 03:24:39.850851 Probing TPM: done!
386 03:24:39.857472 Connected to device vid:did:rid of 1ae0:0028:00
387 03:24:39.867440 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
388 03:24:39.874291 Initialized TPM device CR50 revision 0
389 03:24:39.883313 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 03:24:39.893258 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
391 03:24:39.893758 MRC cache found, size 1948
392 03:24:39.896406 bootmode is set to: 2
393 03:24:39.899741 PRMRR disabled by config.
394 03:24:39.902909 SPD INDEX = 1
395 03:24:39.906246 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
396 03:24:39.909574 CBFS @ c08000 size 3f8000
397 03:24:39.916211 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
398 03:24:39.916640 CBFS: Locating 'spd.bin'
399 03:24:39.922320 CBFS: Found @ offset 5fb80 size 400
400 03:24:39.922395 SPD: module type is LPDDR3
401 03:24:39.925465 SPD: module part is
402 03:24:39.932211 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
403 03:24:39.935444 SPD: device width 4 bits, bus width 8 bits
404 03:24:39.938614 SPD: module size is 4096 MB (per channel)
405 03:24:39.945282 memory slot: 0 configuration done.
406 03:24:39.948436 memory slot: 2 configuration done.
407 03:24:39.997887 CBMEM:
408 03:24:40.001085 IMD: root @ 99fff000 254 entries.
409 03:24:40.004603 IMD: root @ 99ffec00 62 entries.
410 03:24:40.007922 External stage cache:
411 03:24:40.011120 IMD: root @ 9abff000 254 entries.
412 03:24:40.014451 IMD: root @ 9abfec00 62 entries.
413 03:24:40.021138 Chrome EC: clear events_b mask to 0x0000000020004000
414 03:24:40.034754 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
415 03:24:40.046284 tlcl_write: response is 0
416 03:24:40.059573 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 03:24:40.066082 MRC: TPM MRC hash updated successfully.
418 03:24:40.066160 2 DIMMs found
419 03:24:40.069465 SMM Memory Map
420 03:24:40.072590 SMRAM : 0x9a000000 0x1000000
421 03:24:40.076001 Subregion 0: 0x9a000000 0xa00000
422 03:24:40.079129 Subregion 1: 0x9aa00000 0x200000
423 03:24:40.082379 Subregion 2: 0x9ac00000 0x400000
424 03:24:40.085795 top_of_ram = 0x9a000000
425 03:24:40.089035 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
426 03:24:40.095634 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
427 03:24:40.098820 MTRR Range: Start=ff000000 End=0 (Size 1000000)
428 03:24:40.105359 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 03:24:40.108543 CBFS @ c08000 size 3f8000
430 03:24:40.115108 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 03:24:40.118346 CBFS: Locating 'fallback/postcar'
432 03:24:40.121751 CBFS: Found @ offset 107000 size 4b44
433 03:24:40.128267 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
434 03:24:40.138073 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
435 03:24:40.141258 Processing 180 relocs. Offset value of 0x97c0c000
436 03:24:40.150018 Accumulated console time in romstage 286 ms
437 03:24:40.150102
438 03:24:40.150169
439 03:24:40.159664 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
440 03:24:40.166313 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 03:24:40.169613 CBFS @ c08000 size 3f8000
442 03:24:40.176233 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 03:24:40.179321 CBFS: Locating 'fallback/ramstage'
444 03:24:40.182603 CBFS: Found @ offset 43380 size 1b9e8
445 03:24:40.189236 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
446 03:24:40.221707 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
447 03:24:40.224899 Processing 3976 relocs. Offset value of 0x98db0000
448 03:24:40.231479 Accumulated console time in postcar 52 ms
449 03:24:40.231564
450 03:24:40.231632
451 03:24:40.241411 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
452 03:24:40.248071 FMAP: area RO_VPD found @ c00000 (16384 bytes)
453 03:24:40.251007 WARNING: RO_VPD is uninitialized or empty.
454 03:24:40.254371 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 03:24:40.260995 WARNING: RW_VPD is uninitialized or empty.
456 03:24:40.261079 Normal boot.
457 03:24:40.267474 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
458 03:24:40.270833 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
459 03:24:40.274104 CBFS @ c08000 size 3f8000
460 03:24:40.280629 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
461 03:24:40.283982 CBFS: Locating 'cpu_microcode_blob.bin'
462 03:24:40.287280 CBFS: Found @ offset 14700 size 2ec00
463 03:24:40.290422 microcode: sig=0x806ec pf=0x4 revision=0xc9
464 03:24:40.293859 Skip microcode update
465 03:24:40.300383 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 03:24:40.300467 CBFS @ c08000 size 3f8000
467 03:24:40.306865 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 03:24:40.310288 CBFS: Locating 'fsps.bin'
469 03:24:40.313544 CBFS: Found @ offset d1fc0 size 35000
470 03:24:40.339427 Detected 4 core, 8 thread CPU.
471 03:24:40.342858 Setting up SMI for CPU
472 03:24:40.345988 IED base = 0x9ac00000
473 03:24:40.349389 IED size = 0x00400000
474 03:24:40.349475 Will perform SMM setup.
475 03:24:40.355721 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
476 03:24:40.362432 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
477 03:24:40.368850 Processing 16 relocs. Offset value of 0x00030000
478 03:24:40.372261 Attempting to start 7 APs
479 03:24:40.375425 Waiting for 10ms after sending INIT.
480 03:24:40.389354 Waiting for 1st SIPI to complete...done.
481 03:24:40.389440 AP: slot 1 apic_id 1.
482 03:24:40.395751 Waiting for 2nd SIPI to complete...done.
483 03:24:40.395837 AP: slot 2 apic_id 7.
484 03:24:40.399204 AP: slot 3 apic_id 6.
485 03:24:40.402404 AP: slot 6 apic_id 5.
486 03:24:40.402491 AP: slot 7 apic_id 4.
487 03:24:40.405795 AP: slot 5 apic_id 2.
488 03:24:40.408875 AP: slot 4 apic_id 3.
489 03:24:40.415597 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
490 03:24:40.422198 Processing 13 relocs. Offset value of 0x00038000
491 03:24:40.428611 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
492 03:24:40.431965 Installing SMM handler to 0x9a000000
493 03:24:40.438401 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
494 03:24:40.445150 Processing 658 relocs. Offset value of 0x9a010000
495 03:24:40.451653 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
496 03:24:40.458290 Processing 13 relocs. Offset value of 0x9a008000
497 03:24:40.461565 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
498 03:24:40.468072 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
499 03:24:40.474468 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
500 03:24:40.481022 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
501 03:24:40.484254 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
502 03:24:40.490893 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
503 03:24:40.497631 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
504 03:24:40.504052 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
505 03:24:40.507394 Clearing SMI status registers
506 03:24:40.507480 SMI_STS: PM1
507 03:24:40.510511 PM1_STS: PWRBTN
508 03:24:40.510597 TCO_STS: SECOND_TO
509 03:24:40.513752 New SMBASE 0x9a000000
510 03:24:40.517207 In relocation handler: CPU 0
511 03:24:40.520509 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
512 03:24:40.527089 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 03:24:40.527173 Relocation complete.
514 03:24:40.530212 New SMBASE 0x99fffc00
515 03:24:40.533495 In relocation handler: CPU 1
516 03:24:40.536789 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
517 03:24:40.543333 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 03:24:40.543416 Relocation complete.
519 03:24:40.546590 New SMBASE 0x99fff000
520 03:24:40.549784 In relocation handler: CPU 4
521 03:24:40.553302 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
522 03:24:40.559631 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 03:24:40.559715 Relocation complete.
524 03:24:40.562953 New SMBASE 0x99ffec00
525 03:24:40.566337 In relocation handler: CPU 5
526 03:24:40.569589 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
527 03:24:40.576254 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 03:24:40.576338 Relocation complete.
529 03:24:40.579182 New SMBASE 0x99fff400
530 03:24:40.582632 In relocation handler: CPU 3
531 03:24:40.585837 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
532 03:24:40.592411 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 03:24:40.592495 Relocation complete.
534 03:24:40.595748 New SMBASE 0x99fff800
535 03:24:40.598921 In relocation handler: CPU 2
536 03:24:40.602404 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
537 03:24:40.608699 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 03:24:40.608783 Relocation complete.
539 03:24:40.612105 New SMBASE 0x99ffe400
540 03:24:40.615270 In relocation handler: CPU 7
541 03:24:40.618532 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
542 03:24:40.625155 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 03:24:40.628235 Relocation complete.
544 03:24:40.628320 New SMBASE 0x99ffe800
545 03:24:40.631520 In relocation handler: CPU 6
546 03:24:40.634784 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
547 03:24:40.641402 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 03:24:40.644705 Relocation complete.
549 03:24:40.644789 Initializing CPU #0
550 03:24:40.648044 CPU: vendor Intel device 806ec
551 03:24:40.651300 CPU: family 06, model 8e, stepping 0c
552 03:24:40.654666 Clearing out pending MCEs
553 03:24:40.657891 Setting up local APIC...
554 03:24:40.660973 apic_id: 0x00 done.
555 03:24:40.661057 Turbo is available but hidden
556 03:24:40.664451 Turbo is available and visible
557 03:24:40.667786 VMX status: enabled
558 03:24:40.670995 IA32_FEATURE_CONTROL status: locked
559 03:24:40.674284 Skip microcode update
560 03:24:40.674368 CPU #0 initialized
561 03:24:40.677663 Initializing CPU #1
562 03:24:40.680880 Initializing CPU #7
563 03:24:40.680964 Initializing CPU #6
564 03:24:40.684210 CPU: vendor Intel device 806ec
565 03:24:40.687329 CPU: family 06, model 8e, stepping 0c
566 03:24:40.690554 CPU: vendor Intel device 806ec
567 03:24:40.697321 CPU: family 06, model 8e, stepping 0c
568 03:24:40.697405 Clearing out pending MCEs
569 03:24:40.700541 Clearing out pending MCEs
570 03:24:40.703882 Setting up local APIC...
571 03:24:40.707265 Initializing CPU #2
572 03:24:40.707349 Initializing CPU #3
573 03:24:40.710426 CPU: vendor Intel device 806ec
574 03:24:40.713597 CPU: family 06, model 8e, stepping 0c
575 03:24:40.716869 CPU: vendor Intel device 806ec
576 03:24:40.720147 CPU: family 06, model 8e, stepping 0c
577 03:24:40.723591 apic_id: 0x04 done.
578 03:24:40.726859 Setting up local APIC...
579 03:24:40.726943 Initializing CPU #4
580 03:24:40.730129 Initializing CPU #5
581 03:24:40.733355 CPU: vendor Intel device 806ec
582 03:24:40.736679 CPU: family 06, model 8e, stepping 0c
583 03:24:40.739877 CPU: vendor Intel device 806ec
584 03:24:40.743231 CPU: family 06, model 8e, stepping 0c
585 03:24:40.746429 Clearing out pending MCEs
586 03:24:40.749840 Clearing out pending MCEs
587 03:24:40.753000 Setting up local APIC...
588 03:24:40.756448 CPU: vendor Intel device 806ec
589 03:24:40.759737 CPU: family 06, model 8e, stepping 0c
590 03:24:40.762960 Clearing out pending MCEs
591 03:24:40.763078 Setting up local APIC...
592 03:24:40.766194 Setting up local APIC...
593 03:24:40.769496 apic_id: 0x02 done.
594 03:24:40.769581 apic_id: 0x03 done.
595 03:24:40.772638 VMX status: enabled
596 03:24:40.775898 VMX status: enabled
597 03:24:40.779267 IA32_FEATURE_CONTROL status: locked
598 03:24:40.782373 IA32_FEATURE_CONTROL status: locked
599 03:24:40.785856 Skip microcode update
600 03:24:40.785940 Skip microcode update
601 03:24:40.788972 CPU #5 initialized
602 03:24:40.789057 CPU #4 initialized
603 03:24:40.792232 VMX status: enabled
604 03:24:40.795608 apic_id: 0x05 done.
605 03:24:40.798846 IA32_FEATURE_CONTROL status: locked
606 03:24:40.798930 VMX status: enabled
607 03:24:40.801970 Skip microcode update
608 03:24:40.805512 apic_id: 0x01 done.
609 03:24:40.808602 Clearing out pending MCEs
610 03:24:40.808687 Clearing out pending MCEs
611 03:24:40.811787 Setting up local APIC...
612 03:24:40.815175 VMX status: enabled
613 03:24:40.815260 CPU #7 initialized
614 03:24:40.818429 IA32_FEATURE_CONTROL status: locked
615 03:24:40.821725 apic_id: 0x06 done.
616 03:24:40.825005 Setting up local APIC...
617 03:24:40.828524 IA32_FEATURE_CONTROL status: locked
618 03:24:40.831514 Skip microcode update
619 03:24:40.831599 apic_id: 0x07 done.
620 03:24:40.834776 VMX status: enabled
621 03:24:40.838158 VMX status: enabled
622 03:24:40.841251 IA32_FEATURE_CONTROL status: locked
623 03:24:40.844594 IA32_FEATURE_CONTROL status: locked
624 03:24:40.844679 Skip microcode update
625 03:24:40.847849 Skip microcode update
626 03:24:40.851301 CPU #3 initialized
627 03:24:40.851386 CPU #2 initialized
628 03:24:40.854408 Skip microcode update
629 03:24:40.857862 CPU #6 initialized
630 03:24:40.857946 CPU #1 initialized
631 03:24:40.861053 bsp_do_flight_plan done after 466 msecs.
632 03:24:40.864304 CPU: frequency set to 4200 MHz
633 03:24:40.867594 Enabling SMIs.
634 03:24:40.867680 Locking SMM.
635 03:24:40.883683 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
636 03:24:40.886765 CBFS @ c08000 size 3f8000
637 03:24:40.893353 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
638 03:24:40.893438 CBFS: Locating 'vbt.bin'
639 03:24:40.899986 CBFS: Found @ offset 5f5c0 size 499
640 03:24:40.903267 Found a VBT of 4608 bytes after decompression
641 03:24:41.087859 Display FSP Version Info HOB
642 03:24:41.090934 Reference Code - CPU = 9.0.1e.30
643 03:24:41.094305 uCode Version = 0.0.0.ca
644 03:24:41.097615 TXT ACM version = ff.ff.ff.ffff
645 03:24:41.100850 Display FSP Version Info HOB
646 03:24:41.103982 Reference Code - ME = 9.0.1e.30
647 03:24:41.107238 MEBx version = 0.0.0.0
648 03:24:41.110499 ME Firmware Version = Consumer SKU
649 03:24:41.113827 Display FSP Version Info HOB
650 03:24:41.117003 Reference Code - CML PCH = 9.0.1e.30
651 03:24:41.120292 PCH-CRID Status = Disabled
652 03:24:41.123625 PCH-CRID Original Value = ff.ff.ff.ffff
653 03:24:41.126968 PCH-CRID New Value = ff.ff.ff.ffff
654 03:24:41.130323 OPROM - RST - RAID = ff.ff.ff.ffff
655 03:24:41.133440 ChipsetInit Base Version = ff.ff.ff.ffff
656 03:24:41.140019 ChipsetInit Oem Version = ff.ff.ff.ffff
657 03:24:41.140098 Display FSP Version Info HOB
658 03:24:41.146447 Reference Code - SA - System Agent = 9.0.1e.30
659 03:24:41.149850 Reference Code - MRC = 0.7.1.6c
660 03:24:41.152957 SA - PCIe Version = 9.0.1e.30
661 03:24:41.156155 SA-CRID Status = Disabled
662 03:24:41.159477 SA-CRID Original Value = 0.0.0.c
663 03:24:41.159566 SA-CRID New Value = 0.0.0.c
664 03:24:41.162760 OPROM - VBIOS = ff.ff.ff.ffff
665 03:24:41.166436 RTC Init
666 03:24:41.169724 Set power on after power failure.
667 03:24:41.169798 Disabling Deep S3
668 03:24:41.172998 Disabling Deep S3
669 03:24:41.176404 Disabling Deep S4
670 03:24:41.176474 Disabling Deep S4
671 03:24:41.179574 Disabling Deep S5
672 03:24:41.179652 Disabling Deep S5
673 03:24:41.186038 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
674 03:24:41.189374 Enumerating buses...
675 03:24:41.192818 Show all devs... Before device enumeration.
676 03:24:41.196154 Root Device: enabled 1
677 03:24:41.199181 CPU_CLUSTER: 0: enabled 1
678 03:24:41.199252 DOMAIN: 0000: enabled 1
679 03:24:41.202652 APIC: 00: enabled 1
680 03:24:41.205823 PCI: 00:00.0: enabled 1
681 03:24:41.205896 PCI: 00:02.0: enabled 1
682 03:24:41.209173 PCI: 00:04.0: enabled 0
683 03:24:41.212244 PCI: 00:05.0: enabled 0
684 03:24:41.215449 PCI: 00:12.0: enabled 1
685 03:24:41.215531 PCI: 00:12.5: enabled 0
686 03:24:41.218727 PCI: 00:12.6: enabled 0
687 03:24:41.221947 PCI: 00:14.0: enabled 1
688 03:24:41.225305 PCI: 00:14.1: enabled 0
689 03:24:41.225392 PCI: 00:14.3: enabled 1
690 03:24:41.228379 PCI: 00:14.5: enabled 0
691 03:24:41.231820 PCI: 00:15.0: enabled 1
692 03:24:41.235136 PCI: 00:15.1: enabled 1
693 03:24:41.235207 PCI: 00:15.2: enabled 0
694 03:24:41.238332 PCI: 00:15.3: enabled 0
695 03:24:41.241471 PCI: 00:16.0: enabled 1
696 03:24:41.244939 PCI: 00:16.1: enabled 0
697 03:24:41.245019 PCI: 00:16.2: enabled 0
698 03:24:41.247947 PCI: 00:16.3: enabled 0
699 03:24:41.251269 PCI: 00:16.4: enabled 0
700 03:24:41.254684 PCI: 00:16.5: enabled 0
701 03:24:41.254757 PCI: 00:17.0: enabled 1
702 03:24:41.257921 PCI: 00:19.0: enabled 1
703 03:24:41.261210 PCI: 00:19.1: enabled 0
704 03:24:41.264227 PCI: 00:19.2: enabled 0
705 03:24:41.264304 PCI: 00:1a.0: enabled 0
706 03:24:41.267722 PCI: 00:1c.0: enabled 0
707 03:24:41.270943 PCI: 00:1c.1: enabled 0
708 03:24:41.274121 PCI: 00:1c.2: enabled 0
709 03:24:41.274193 PCI: 00:1c.3: enabled 0
710 03:24:41.277321 PCI: 00:1c.4: enabled 0
711 03:24:41.280777 PCI: 00:1c.5: enabled 0
712 03:24:41.283797 PCI: 00:1c.6: enabled 0
713 03:24:41.283866 PCI: 00:1c.7: enabled 0
714 03:24:41.287157 PCI: 00:1d.0: enabled 1
715 03:24:41.290436 PCI: 00:1d.1: enabled 0
716 03:24:41.293641 PCI: 00:1d.2: enabled 0
717 03:24:41.293710 PCI: 00:1d.3: enabled 0
718 03:24:41.296921 PCI: 00:1d.4: enabled 0
719 03:24:41.300103 PCI: 00:1d.5: enabled 1
720 03:24:41.303293 PCI: 00:1e.0: enabled 1
721 03:24:41.303362 PCI: 00:1e.1: enabled 0
722 03:24:41.306724 PCI: 00:1e.2: enabled 1
723 03:24:41.309853 PCI: 00:1e.3: enabled 1
724 03:24:41.313324 PCI: 00:1f.0: enabled 1
725 03:24:41.313401 PCI: 00:1f.1: enabled 1
726 03:24:41.316300 PCI: 00:1f.2: enabled 1
727 03:24:41.319815 PCI: 00:1f.3: enabled 1
728 03:24:41.322937 PCI: 00:1f.4: enabled 1
729 03:24:41.323045 PCI: 00:1f.5: enabled 1
730 03:24:41.326271 PCI: 00:1f.6: enabled 0
731 03:24:41.329540 USB0 port 0: enabled 1
732 03:24:41.329613 I2C: 00:15: enabled 1
733 03:24:41.332883 I2C: 00:5d: enabled 1
734 03:24:41.336153 GENERIC: 0.0: enabled 1
735 03:24:41.339385 I2C: 00:1a: enabled 1
736 03:24:41.339456 I2C: 00:38: enabled 1
737 03:24:41.342663 I2C: 00:39: enabled 1
738 03:24:41.345709 I2C: 00:3a: enabled 1
739 03:24:41.345778 I2C: 00:3b: enabled 1
740 03:24:41.349034 PCI: 00:00.0: enabled 1
741 03:24:41.352366 SPI: 00: enabled 1
742 03:24:41.352436 SPI: 01: enabled 1
743 03:24:41.355720 PNP: 0c09.0: enabled 1
744 03:24:41.358904 USB2 port 0: enabled 1
745 03:24:41.358993 USB2 port 1: enabled 1
746 03:24:41.362084 USB2 port 2: enabled 0
747 03:24:41.365288 USB2 port 3: enabled 0
748 03:24:41.368503 USB2 port 5: enabled 0
749 03:24:41.368575 USB2 port 6: enabled 1
750 03:24:41.371911 USB2 port 9: enabled 1
751 03:24:41.375203 USB3 port 0: enabled 1
752 03:24:41.375275 USB3 port 1: enabled 1
753 03:24:41.378427 USB3 port 2: enabled 1
754 03:24:41.381490 USB3 port 3: enabled 1
755 03:24:41.384781 USB3 port 4: enabled 0
756 03:24:41.384851 APIC: 01: enabled 1
757 03:24:41.388093 APIC: 07: enabled 1
758 03:24:41.391354 APIC: 06: enabled 1
759 03:24:41.391425 APIC: 03: enabled 1
760 03:24:41.394450 APIC: 02: enabled 1
761 03:24:41.394520 APIC: 05: enabled 1
762 03:24:41.397724 APIC: 04: enabled 1
763 03:24:41.401087 Compare with tree...
764 03:24:41.401190 Root Device: enabled 1
765 03:24:41.404548 CPU_CLUSTER: 0: enabled 1
766 03:24:41.407646 APIC: 00: enabled 1
767 03:24:41.410890 APIC: 01: enabled 1
768 03:24:41.410987 APIC: 07: enabled 1
769 03:24:41.414348 APIC: 06: enabled 1
770 03:24:41.417630 APIC: 03: enabled 1
771 03:24:41.417743 APIC: 02: enabled 1
772 03:24:41.420744 APIC: 05: enabled 1
773 03:24:41.424104 APIC: 04: enabled 1
774 03:24:41.427266 DOMAIN: 0000: enabled 1
775 03:24:41.427406 PCI: 00:00.0: enabled 1
776 03:24:41.430660 PCI: 00:02.0: enabled 1
777 03:24:41.433977 PCI: 00:04.0: enabled 0
778 03:24:41.437095 PCI: 00:05.0: enabled 0
779 03:24:41.440350 PCI: 00:12.0: enabled 1
780 03:24:41.440536 PCI: 00:12.5: enabled 0
781 03:24:41.443627 PCI: 00:12.6: enabled 0
782 03:24:41.446972 PCI: 00:14.0: enabled 1
783 03:24:41.450152 USB0 port 0: enabled 1
784 03:24:41.453662 USB2 port 0: enabled 1
785 03:24:41.454055 USB2 port 1: enabled 1
786 03:24:41.456788 USB2 port 2: enabled 0
787 03:24:41.460025 USB2 port 3: enabled 0
788 03:24:41.463486 USB2 port 5: enabled 0
789 03:24:41.466679 USB2 port 6: enabled 1
790 03:24:41.470075 USB2 port 9: enabled 1
791 03:24:41.470556 USB3 port 0: enabled 1
792 03:24:41.473222 USB3 port 1: enabled 1
793 03:24:41.476883 USB3 port 2: enabled 1
794 03:24:41.479607 USB3 port 3: enabled 1
795 03:24:41.483249 USB3 port 4: enabled 0
796 03:24:41.486317 PCI: 00:14.1: enabled 0
797 03:24:41.486885 PCI: 00:14.3: enabled 1
798 03:24:41.489407 PCI: 00:14.5: enabled 0
799 03:24:41.492878 PCI: 00:15.0: enabled 1
800 03:24:41.496248 I2C: 00:15: enabled 1
801 03:24:41.499256 PCI: 00:15.1: enabled 1
802 03:24:41.499735 I2C: 00:5d: enabled 1
803 03:24:41.502783 GENERIC: 0.0: enabled 1
804 03:24:41.505872 PCI: 00:15.2: enabled 0
805 03:24:41.509093 PCI: 00:15.3: enabled 0
806 03:24:41.512535 PCI: 00:16.0: enabled 1
807 03:24:41.513105 PCI: 00:16.1: enabled 0
808 03:24:41.515394 PCI: 00:16.2: enabled 0
809 03:24:41.518785 PCI: 00:16.3: enabled 0
810 03:24:41.522199 PCI: 00:16.4: enabled 0
811 03:24:41.525560 PCI: 00:16.5: enabled 0
812 03:24:41.528498 PCI: 00:17.0: enabled 1
813 03:24:41.529030 PCI: 00:19.0: enabled 1
814 03:24:41.531716 I2C: 00:1a: enabled 1
815 03:24:41.535103 I2C: 00:38: enabled 1
816 03:24:41.538703 I2C: 00:39: enabled 1
817 03:24:41.539311 I2C: 00:3a: enabled 1
818 03:24:41.541789 I2C: 00:3b: enabled 1
819 03:24:41.544929 PCI: 00:19.1: enabled 0
820 03:24:41.548418 PCI: 00:19.2: enabled 0
821 03:24:41.551639 PCI: 00:1a.0: enabled 0
822 03:24:41.552223 PCI: 00:1c.0: enabled 0
823 03:24:41.554709 PCI: 00:1c.1: enabled 0
824 03:24:41.558273 PCI: 00:1c.2: enabled 0
825 03:24:41.561235 PCI: 00:1c.3: enabled 0
826 03:24:41.564384 PCI: 00:1c.4: enabled 0
827 03:24:41.564866 PCI: 00:1c.5: enabled 0
828 03:24:41.567874 PCI: 00:1c.6: enabled 0
829 03:24:41.571257 PCI: 00:1c.7: enabled 0
830 03:24:41.574567 PCI: 00:1d.0: enabled 1
831 03:24:41.577686 PCI: 00:1d.1: enabled 0
832 03:24:41.578257 PCI: 00:1d.2: enabled 0
833 03:24:41.580879 PCI: 00:1d.3: enabled 0
834 03:24:41.584173 PCI: 00:1d.4: enabled 0
835 03:24:41.587332 PCI: 00:1d.5: enabled 1
836 03:24:41.590687 PCI: 00:00.0: enabled 1
837 03:24:41.594204 PCI: 00:1e.0: enabled 1
838 03:24:41.594773 PCI: 00:1e.1: enabled 0
839 03:24:41.597118 PCI: 00:1e.2: enabled 1
840 03:24:41.600196 SPI: 00: enabled 1
841 03:24:41.603652 PCI: 00:1e.3: enabled 1
842 03:24:41.604228 SPI: 01: enabled 1
843 03:24:41.606726 PCI: 00:1f.0: enabled 1
844 03:24:41.610252 PNP: 0c09.0: enabled 1
845 03:24:41.613782 PCI: 00:1f.1: enabled 1
846 03:24:41.616856 PCI: 00:1f.2: enabled 1
847 03:24:41.617424 PCI: 00:1f.3: enabled 1
848 03:24:41.619944 PCI: 00:1f.4: enabled 1
849 03:24:41.623270 PCI: 00:1f.5: enabled 1
850 03:24:41.626609 PCI: 00:1f.6: enabled 0
851 03:24:41.629521 Root Device scanning...
852 03:24:41.632817 scan_static_bus for Root Device
853 03:24:41.633296 CPU_CLUSTER: 0 enabled
854 03:24:41.636173 DOMAIN: 0000 enabled
855 03:24:41.639589 DOMAIN: 0000 scanning...
856 03:24:41.642937 PCI: pci_scan_bus for bus 00
857 03:24:41.646211 PCI: 00:00.0 [8086/0000] ops
858 03:24:41.649560 PCI: 00:00.0 [8086/9b61] enabled
859 03:24:41.652449 PCI: 00:02.0 [8086/0000] bus ops
860 03:24:41.655646 PCI: 00:02.0 [8086/9b41] enabled
861 03:24:41.658989 PCI: 00:04.0 [8086/1903] disabled
862 03:24:41.662589 PCI: 00:08.0 [8086/1911] enabled
863 03:24:41.665484 PCI: 00:12.0 [8086/02f9] enabled
864 03:24:41.668892 PCI: 00:14.0 [8086/0000] bus ops
865 03:24:41.672276 PCI: 00:14.0 [8086/02ed] enabled
866 03:24:41.675220 PCI: 00:14.2 [8086/02ef] enabled
867 03:24:41.678870 PCI: 00:14.3 [8086/02f0] enabled
868 03:24:41.682152 PCI: 00:15.0 [8086/0000] bus ops
869 03:24:41.685300 PCI: 00:15.0 [8086/02e8] enabled
870 03:24:41.688535 PCI: 00:15.1 [8086/0000] bus ops
871 03:24:41.691850 PCI: 00:15.1 [8086/02e9] enabled
872 03:24:41.694997 PCI: 00:16.0 [8086/0000] ops
873 03:24:41.698268 PCI: 00:16.0 [8086/02e0] enabled
874 03:24:41.701657 PCI: 00:17.0 [8086/0000] ops
875 03:24:41.704568 PCI: 00:17.0 [8086/02d3] enabled
876 03:24:41.707809 PCI: 00:19.0 [8086/0000] bus ops
877 03:24:41.711270 PCI: 00:19.0 [8086/02c5] enabled
878 03:24:41.714556 PCI: 00:1d.0 [8086/0000] bus ops
879 03:24:41.717893 PCI: 00:1d.0 [8086/02b0] enabled
880 03:24:41.724136 PCI: Static device PCI: 00:1d.5 not found, disabling it.
881 03:24:41.727228 PCI: 00:1e.0 [8086/0000] ops
882 03:24:41.730528 PCI: 00:1e.0 [8086/02a8] enabled
883 03:24:41.734107 PCI: 00:1e.2 [8086/0000] bus ops
884 03:24:41.737258 PCI: 00:1e.2 [8086/02aa] enabled
885 03:24:41.740637 PCI: 00:1e.3 [8086/0000] bus ops
886 03:24:41.743551 PCI: 00:1e.3 [8086/02ab] enabled
887 03:24:41.747043 PCI: 00:1f.0 [8086/0000] bus ops
888 03:24:41.750475 PCI: 00:1f.0 [8086/0284] enabled
889 03:24:41.753600 PCI: Static device PCI: 00:1f.1 not found, disabling it.
890 03:24:41.760099 PCI: Static device PCI: 00:1f.2 not found, disabling it.
891 03:24:41.763457 PCI: 00:1f.3 [8086/0000] bus ops
892 03:24:41.766873 PCI: 00:1f.3 [8086/02c8] enabled
893 03:24:41.769988 PCI: 00:1f.4 [8086/0000] bus ops
894 03:24:41.773406 PCI: 00:1f.4 [8086/02a3] enabled
895 03:24:41.776401 PCI: 00:1f.5 [8086/0000] bus ops
896 03:24:41.779660 PCI: 00:1f.5 [8086/02a4] enabled
897 03:24:41.782939 PCI: Leftover static devices:
898 03:24:41.786183 PCI: 00:05.0
899 03:24:41.786751 PCI: 00:12.5
900 03:24:41.789680 PCI: 00:12.6
901 03:24:41.790261 PCI: 00:14.1
902 03:24:41.790643 PCI: 00:14.5
903 03:24:41.792986 PCI: 00:15.2
904 03:24:41.793462 PCI: 00:15.3
905 03:24:41.795810 PCI: 00:16.1
906 03:24:41.796289 PCI: 00:16.2
907 03:24:41.796671 PCI: 00:16.3
908 03:24:41.799046 PCI: 00:16.4
909 03:24:41.799534 PCI: 00:16.5
910 03:24:41.802634 PCI: 00:19.1
911 03:24:41.803232 PCI: 00:19.2
912 03:24:41.805729 PCI: 00:1a.0
913 03:24:41.806300 PCI: 00:1c.0
914 03:24:41.806683 PCI: 00:1c.1
915 03:24:41.808878 PCI: 00:1c.2
916 03:24:41.809356 PCI: 00:1c.3
917 03:24:41.811986 PCI: 00:1c.4
918 03:24:41.812473 PCI: 00:1c.5
919 03:24:41.812861 PCI: 00:1c.6
920 03:24:41.815369 PCI: 00:1c.7
921 03:24:41.815847 PCI: 00:1d.1
922 03:24:41.818670 PCI: 00:1d.2
923 03:24:41.819172 PCI: 00:1d.3
924 03:24:41.822148 PCI: 00:1d.4
925 03:24:41.822724 PCI: 00:1d.5
926 03:24:41.823159 PCI: 00:1e.1
927 03:24:41.825425 PCI: 00:1f.1
928 03:24:41.825998 PCI: 00:1f.2
929 03:24:41.828395 PCI: 00:1f.6
930 03:24:41.831736 PCI: Check your devicetree.cb.
931 03:24:41.832241 PCI: 00:02.0 scanning...
932 03:24:41.838125 scan_generic_bus for PCI: 00:02.0
933 03:24:41.841516 scan_generic_bus for PCI: 00:02.0 done
934 03:24:41.844737 scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
935 03:24:41.847962 PCI: 00:14.0 scanning...
936 03:24:41.851147 scan_static_bus for PCI: 00:14.0
937 03:24:41.854534 USB0 port 0 enabled
938 03:24:41.857572 USB0 port 0 scanning...
939 03:24:41.860798 scan_static_bus for USB0 port 0
940 03:24:41.861344 USB2 port 0 enabled
941 03:24:41.864046 USB2 port 1 enabled
942 03:24:41.867215 USB2 port 2 disabled
943 03:24:41.867691 USB2 port 3 disabled
944 03:24:41.870674 USB2 port 5 disabled
945 03:24:41.873761 USB2 port 6 enabled
946 03:24:41.874252 USB2 port 9 enabled
947 03:24:41.877093 USB3 port 0 enabled
948 03:24:41.880711 USB3 port 1 enabled
949 03:24:41.881287 USB3 port 2 enabled
950 03:24:41.883923 USB3 port 3 enabled
951 03:24:41.884398 USB3 port 4 disabled
952 03:24:41.887165 USB2 port 0 scanning...
953 03:24:41.890539 scan_static_bus for USB2 port 0
954 03:24:41.893478 scan_static_bus for USB2 port 0 done
955 03:24:41.900241 scan_bus: scanning of bus USB2 port 0 took 9703 usecs
956 03:24:41.903375 USB2 port 1 scanning...
957 03:24:41.906380 scan_static_bus for USB2 port 1
958 03:24:41.910085 scan_static_bus for USB2 port 1 done
959 03:24:41.916249 scan_bus: scanning of bus USB2 port 1 took 9710 usecs
960 03:24:41.916837 USB2 port 6 scanning...
961 03:24:41.919878 scan_static_bus for USB2 port 6
962 03:24:41.926231 scan_static_bus for USB2 port 6 done
963 03:24:41.929444 scan_bus: scanning of bus USB2 port 6 took 9709 usecs
964 03:24:41.932717 USB2 port 9 scanning...
965 03:24:41.935771 scan_static_bus for USB2 port 9
966 03:24:41.939146 scan_static_bus for USB2 port 9 done
967 03:24:41.945618 scan_bus: scanning of bus USB2 port 9 took 9702 usecs
968 03:24:41.949147 USB3 port 0 scanning...
969 03:24:41.952113 scan_static_bus for USB3 port 0
970 03:24:41.955455 scan_static_bus for USB3 port 0 done
971 03:24:41.958574 scan_bus: scanning of bus USB3 port 0 took 9701 usecs
972 03:24:41.961811 USB3 port 1 scanning...
973 03:24:41.965179 scan_static_bus for USB3 port 1
974 03:24:41.968367 scan_static_bus for USB3 port 1 done
975 03:24:41.974801 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
976 03:24:41.978527 USB3 port 2 scanning...
977 03:24:41.981537 scan_static_bus for USB3 port 2
978 03:24:41.984876 scan_static_bus for USB3 port 2 done
979 03:24:41.991137 scan_bus: scanning of bus USB3 port 2 took 9701 usecs
980 03:24:41.991707 USB3 port 3 scanning...
981 03:24:41.994615 scan_static_bus for USB3 port 3
982 03:24:42.001000 scan_static_bus for USB3 port 3 done
983 03:24:42.004474 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
984 03:24:42.007909 scan_static_bus for USB0 port 0 done
985 03:24:42.014361 scan_bus: scanning of bus USB0 port 0 took 155407 usecs
986 03:24:42.017739 scan_static_bus for PCI: 00:14.0 done
987 03:24:42.023978 scan_bus: scanning of bus PCI: 00:14.0 took 173044 usecs
988 03:24:42.027294 PCI: 00:15.0 scanning...
989 03:24:42.030289 scan_generic_bus for PCI: 00:15.0
990 03:24:42.033845 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
991 03:24:42.036879 scan_generic_bus for PCI: 00:15.0 done
992 03:24:42.043430 scan_bus: scanning of bus PCI: 00:15.0 took 14314 usecs
993 03:24:42.046690 PCI: 00:15.1 scanning...
994 03:24:42.050458 scan_generic_bus for PCI: 00:15.1
995 03:24:42.053266 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
996 03:24:42.060152 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
997 03:24:42.063204 scan_generic_bus for PCI: 00:15.1 done
998 03:24:42.066352 scan_bus: scanning of bus PCI: 00:15.1 took 18625 usecs
999 03:24:42.069564 PCI: 00:19.0 scanning...
1000 03:24:42.073055 scan_generic_bus for PCI: 00:19.0
1001 03:24:42.079685 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1002 03:24:42.082850 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1003 03:24:42.085943 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1004 03:24:42.089108 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1005 03:24:42.095782 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1006 03:24:42.099174 scan_generic_bus for PCI: 00:19.0 done
1007 03:24:42.102658 scan_bus: scanning of bus PCI: 00:19.0 took 30745 usecs
1008 03:24:42.105443 PCI: 00:1d.0 scanning...
1009 03:24:42.108956 do_pci_scan_bridge for PCI: 00:1d.0
1010 03:24:42.112088 PCI: pci_scan_bus for bus 01
1011 03:24:42.115503 PCI: 01:00.0 [1c5c/1327] enabled
1012 03:24:42.121916 Enabling Common Clock Configuration
1013 03:24:42.125272 L1 Sub-State supported from root port 29
1014 03:24:42.128451 L1 Sub-State Support = 0xf
1015 03:24:42.131567 CommonModeRestoreTime = 0x28
1016 03:24:42.134705 Power On Value = 0x16, Power On Scale = 0x0
1017 03:24:42.138068 ASPM: Enabled L1
1018 03:24:42.141354 scan_bus: scanning of bus PCI: 00:1d.0 took 32801 usecs
1019 03:24:42.144770 PCI: 00:1e.2 scanning...
1020 03:24:42.147642 scan_generic_bus for PCI: 00:1e.2
1021 03:24:42.151250 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1022 03:24:42.157717 scan_generic_bus for PCI: 00:1e.2 done
1023 03:24:42.160857 scan_bus: scanning of bus PCI: 00:1e.2 took 14010 usecs
1024 03:24:42.163989 PCI: 00:1e.3 scanning...
1025 03:24:42.167314 scan_generic_bus for PCI: 00:1e.3
1026 03:24:42.170737 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1027 03:24:42.174264 scan_generic_bus for PCI: 00:1e.3 done
1028 03:24:42.180454 scan_bus: scanning of bus PCI: 00:1e.3 took 14019 usecs
1029 03:24:42.183902 PCI: 00:1f.0 scanning...
1030 03:24:42.186902 scan_static_bus for PCI: 00:1f.0
1031 03:24:42.190279 PNP: 0c09.0 enabled
1032 03:24:42.193354 scan_static_bus for PCI: 00:1f.0 done
1033 03:24:42.200171 scan_bus: scanning of bus PCI: 00:1f.0 took 12058 usecs
1034 03:24:42.200750 PCI: 00:1f.3 scanning...
1035 03:24:42.206784 scan_bus: scanning of bus PCI: 00:1f.3 took 2853 usecs
1036 03:24:42.210119 PCI: 00:1f.4 scanning...
1037 03:24:42.213096 scan_generic_bus for PCI: 00:1f.4
1038 03:24:42.216376 scan_generic_bus for PCI: 00:1f.4 done
1039 03:24:42.223134 scan_bus: scanning of bus PCI: 00:1f.4 took 10189 usecs
1040 03:24:42.226395 PCI: 00:1f.5 scanning...
1041 03:24:42.229406 scan_generic_bus for PCI: 00:1f.5
1042 03:24:42.232809 scan_generic_bus for PCI: 00:1f.5 done
1043 03:24:42.239243 scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs
1044 03:24:42.242466 scan_bus: scanning of bus DOMAIN: 0000 took 605273 usecs
1045 03:24:42.249076 scan_static_bus for Root Device done
1046 03:24:42.252197 scan_bus: scanning of bus Root Device took 625145 usecs
1047 03:24:42.255597 done
1048 03:24:42.256077 Chrome EC: UHEPI supported
1049 03:24:42.262213 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1050 03:24:42.268593 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1051 03:24:42.275111 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1052 03:24:42.281893 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1053 03:24:42.285061 SPI flash protection: WPSW=0 SRP0=0
1054 03:24:42.291538 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1055 03:24:42.294781 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1056 03:24:42.297883 found VGA at PCI: 00:02.0
1057 03:24:42.301349 Setting up VGA for PCI: 00:02.0
1058 03:24:42.308038 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1059 03:24:42.311119 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1060 03:24:42.314383 Allocating resources...
1061 03:24:42.317632 Reading resources...
1062 03:24:42.320821 Root Device read_resources bus 0 link: 0
1063 03:24:42.324407 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1064 03:24:42.330631 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1065 03:24:42.333824 DOMAIN: 0000 read_resources bus 0 link: 0
1066 03:24:42.341660 PCI: 00:14.0 read_resources bus 0 link: 0
1067 03:24:42.344833 USB0 port 0 read_resources bus 0 link: 0
1068 03:24:42.352874 USB0 port 0 read_resources bus 0 link: 0 done
1069 03:24:42.356262 PCI: 00:14.0 read_resources bus 0 link: 0 done
1070 03:24:42.363625 PCI: 00:15.0 read_resources bus 1 link: 0
1071 03:24:42.366895 PCI: 00:15.0 read_resources bus 1 link: 0 done
1072 03:24:42.373821 PCI: 00:15.1 read_resources bus 2 link: 0
1073 03:24:42.376763 PCI: 00:15.1 read_resources bus 2 link: 0 done
1074 03:24:42.384499 PCI: 00:19.0 read_resources bus 3 link: 0
1075 03:24:42.391238 PCI: 00:19.0 read_resources bus 3 link: 0 done
1076 03:24:42.394448 PCI: 00:1d.0 read_resources bus 1 link: 0
1077 03:24:42.400654 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1078 03:24:42.403723 PCI: 00:1e.2 read_resources bus 4 link: 0
1079 03:24:42.410868 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1080 03:24:42.414046 PCI: 00:1e.3 read_resources bus 5 link: 0
1081 03:24:42.420620 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1082 03:24:42.423680 PCI: 00:1f.0 read_resources bus 0 link: 0
1083 03:24:42.430303 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1084 03:24:42.436783 DOMAIN: 0000 read_resources bus 0 link: 0 done
1085 03:24:42.440028 Root Device read_resources bus 0 link: 0 done
1086 03:24:42.443384 Done reading resources.
1087 03:24:42.450297 Show resources in subtree (Root Device)...After reading.
1088 03:24:42.453328 Root Device child on link 0 CPU_CLUSTER: 0
1089 03:24:42.456281 CPU_CLUSTER: 0 child on link 0 APIC: 00
1090 03:24:42.506247 APIC: 00
1091 03:24:42.506809 APIC: 01
1092 03:24:42.507241 APIC: 07
1093 03:24:42.507609 APIC: 06
1094 03:24:42.507954 APIC: 03
1095 03:24:42.508289 APIC: 02
1096 03:24:42.508621 APIC: 05
1097 03:24:42.508948 APIC: 04
1098 03:24:42.509269 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1099 03:24:42.509594 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1100 03:24:42.510353 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1101 03:24:42.510739 PCI: 00:00.0
1102 03:24:42.511105 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1103 03:24:42.556087 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1104 03:24:42.557163 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1105 03:24:42.557656 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1106 03:24:42.558043 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1107 03:24:42.558402 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1108 03:24:42.592932 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1109 03:24:42.593530 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1110 03:24:42.594327 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1111 03:24:42.594722 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1112 03:24:42.599804 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1113 03:24:42.606255 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1114 03:24:42.615737 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1115 03:24:42.625850 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1116 03:24:42.632346 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1117 03:24:42.641737 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1118 03:24:42.645505 PCI: 00:02.0
1119 03:24:42.655132 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1120 03:24:42.664584 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1121 03:24:42.674823 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1122 03:24:42.675456 PCI: 00:04.0
1123 03:24:42.677718 PCI: 00:08.0
1124 03:24:42.687773 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 03:24:42.688394 PCI: 00:12.0
1126 03:24:42.697300 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 03:24:42.703919 PCI: 00:14.0 child on link 0 USB0 port 0
1128 03:24:42.713709 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1129 03:24:42.716791 USB0 port 0 child on link 0 USB2 port 0
1130 03:24:42.720361 USB2 port 0
1131 03:24:42.720941 USB2 port 1
1132 03:24:42.723381 USB2 port 2
1133 03:24:42.723864 USB2 port 3
1134 03:24:42.726497 USB2 port 5
1135 03:24:42.726979 USB2 port 6
1136 03:24:42.729864 USB2 port 9
1137 03:24:42.730349 USB3 port 0
1138 03:24:42.733139 USB3 port 1
1139 03:24:42.733756 USB3 port 2
1140 03:24:42.736317 USB3 port 3
1141 03:24:42.739449 USB3 port 4
1142 03:24:42.739932 PCI: 00:14.2
1143 03:24:42.749213 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1144 03:24:42.759106 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1145 03:24:42.762402 PCI: 00:14.3
1146 03:24:42.772148 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1147 03:24:42.775255 PCI: 00:15.0 child on link 0 I2C: 01:15
1148 03:24:42.784963 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 03:24:42.788402 I2C: 01:15
1150 03:24:42.791616 PCI: 00:15.1 child on link 0 I2C: 02:5d
1151 03:24:42.801456 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 03:24:42.801977 I2C: 02:5d
1153 03:24:42.804631 GENERIC: 0.0
1154 03:24:42.805118 PCI: 00:16.0
1155 03:24:42.817736 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 03:24:42.818187 PCI: 00:17.0
1157 03:24:42.827346 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1158 03:24:42.837163 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1159 03:24:42.843740 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1160 03:24:42.853519 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1161 03:24:42.860068 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1162 03:24:42.869795 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1163 03:24:42.873035 PCI: 00:19.0 child on link 0 I2C: 03:1a
1164 03:24:42.882711 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 03:24:42.886101 I2C: 03:1a
1166 03:24:42.886577 I2C: 03:38
1167 03:24:42.889234 I2C: 03:39
1168 03:24:42.889714 I2C: 03:3a
1169 03:24:42.892493 I2C: 03:3b
1170 03:24:42.895897 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1171 03:24:42.905680 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1172 03:24:42.915270 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1173 03:24:42.925308 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1174 03:24:42.925905 PCI: 01:00.0
1175 03:24:42.934914 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 03:24:42.938022 PCI: 00:1e.0
1177 03:24:42.947880 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1178 03:24:42.957884 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 03:24:42.960978 PCI: 00:1e.2 child on link 0 SPI: 00
1180 03:24:42.970747 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 03:24:42.973930 SPI: 00
1182 03:24:42.977073 PCI: 00:1e.3 child on link 0 SPI: 01
1183 03:24:42.987164 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 03:24:42.990328 SPI: 01
1185 03:24:42.993117 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1186 03:24:43.003097 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1187 03:24:43.009331 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1188 03:24:43.012746 PNP: 0c09.0
1189 03:24:43.022574 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1190 03:24:43.023323 PCI: 00:1f.3
1191 03:24:43.032341 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 03:24:43.042156 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1193 03:24:43.045448 PCI: 00:1f.4
1194 03:24:43.051807 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1195 03:24:43.061733 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1196 03:24:43.064777 PCI: 00:1f.5
1197 03:24:43.074492 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1198 03:24:43.081150 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1199 03:24:43.087482 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1200 03:24:43.094268 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1201 03:24:43.097388 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1202 03:24:43.100753 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1203 03:24:43.104006 PCI: 00:17.0 18 * [0x60 - 0x67] io
1204 03:24:43.107284 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1205 03:24:43.113722 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1206 03:24:43.120435 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1207 03:24:43.130107 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1208 03:24:43.136394 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1209 03:24:43.143123 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1210 03:24:43.149448 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1211 03:24:43.156128 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1212 03:24:43.159384 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1213 03:24:43.165699 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1214 03:24:43.169127 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1215 03:24:43.176188 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1216 03:24:43.178898 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1217 03:24:43.185374 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1218 03:24:43.188321 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1219 03:24:43.195096 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1220 03:24:43.198149 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1221 03:24:43.204671 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1222 03:24:43.207961 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1223 03:24:43.214380 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1224 03:24:43.217711 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1225 03:24:43.224289 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1226 03:24:43.227598 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1227 03:24:43.234038 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1228 03:24:43.237161 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1229 03:24:43.243995 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1230 03:24:43.247134 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1231 03:24:43.253771 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1232 03:24:43.256704 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1233 03:24:43.263379 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1234 03:24:43.266816 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1235 03:24:43.276267 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1236 03:24:43.279530 avoid_fixed_resources: DOMAIN: 0000
1237 03:24:43.286327 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1238 03:24:43.292631 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1239 03:24:43.299075 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1240 03:24:43.305828 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1241 03:24:43.315438 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1242 03:24:43.321791 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1243 03:24:43.331489 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1244 03:24:43.338102 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 03:24:43.344598 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1246 03:24:43.354542 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1247 03:24:43.360990 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1248 03:24:43.367613 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1249 03:24:43.370582 Setting resources...
1250 03:24:43.377234 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1251 03:24:43.380349 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1252 03:24:43.383653 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1253 03:24:43.386924 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1254 03:24:43.393647 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1255 03:24:43.396699 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1256 03:24:43.403124 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1257 03:24:43.409710 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1258 03:24:43.419526 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1259 03:24:43.422699 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1260 03:24:43.429238 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1261 03:24:43.432550 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1262 03:24:43.438985 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1263 03:24:43.442234 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1264 03:24:43.448656 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1265 03:24:43.451871 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1266 03:24:43.458340 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1267 03:24:43.461555 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1268 03:24:43.468121 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1269 03:24:43.471452 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1270 03:24:43.477958 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1271 03:24:43.481352 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1272 03:24:43.487896 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1273 03:24:43.491113 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1274 03:24:43.497643 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1275 03:24:43.500710 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1276 03:24:43.507190 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1277 03:24:43.510621 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1278 03:24:43.516969 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1279 03:24:43.520408 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1280 03:24:43.526767 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1281 03:24:43.530108 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1282 03:24:43.536569 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1283 03:24:43.546385 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1284 03:24:43.552800 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1285 03:24:43.559563 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1286 03:24:43.565943 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1287 03:24:43.572463 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1288 03:24:43.575630 Root Device assign_resources, bus 0 link: 0
1289 03:24:43.582191 DOMAIN: 0000 assign_resources, bus 0 link: 0
1290 03:24:43.588681 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1291 03:24:43.598423 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1292 03:24:43.604854 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1293 03:24:43.614634 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1294 03:24:43.621212 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1295 03:24:43.631288 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1296 03:24:43.634663 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 03:24:43.640933 PCI: 00:14.0 assign_resources, bus 0 link: 0
1298 03:24:43.647723 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1299 03:24:43.657183 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1300 03:24:43.663791 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1301 03:24:43.673445 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1302 03:24:43.676829 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 03:24:43.683361 PCI: 00:15.0 assign_resources, bus 1 link: 0
1304 03:24:43.689855 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1305 03:24:43.696310 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 03:24:43.699738 PCI: 00:15.1 assign_resources, bus 2 link: 0
1307 03:24:43.709274 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1308 03:24:43.715862 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1309 03:24:43.725750 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1310 03:24:43.732279 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1311 03:24:43.738809 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1312 03:24:43.748413 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1313 03:24:43.754799 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1314 03:24:43.764843 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1315 03:24:43.767814 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 03:24:43.770989 PCI: 00:19.0 assign_resources, bus 3 link: 0
1317 03:24:43.781003 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1318 03:24:43.790800 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1319 03:24:43.797272 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1320 03:24:43.803792 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 03:24:43.810416 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1322 03:24:43.816836 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1323 03:24:43.823289 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1324 03:24:43.833199 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1325 03:24:43.836225 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 03:24:43.842973 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1327 03:24:43.849420 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1328 03:24:43.855852 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 03:24:43.859015 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1330 03:24:43.865422 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 03:24:43.868540 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1332 03:24:43.875227 LPC: Trying to open IO window from 800 size 1ff
1333 03:24:43.881795 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1334 03:24:43.891440 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1335 03:24:43.898006 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1336 03:24:43.907608 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1337 03:24:43.911013 DOMAIN: 0000 assign_resources, bus 0 link: 0
1338 03:24:43.917534 Root Device assign_resources, bus 0 link: 0
1339 03:24:43.917893 Done setting resources.
1340 03:24:43.923840 Show resources in subtree (Root Device)...After assigning values.
1341 03:24:43.930271 Root Device child on link 0 CPU_CLUSTER: 0
1342 03:24:43.933735 CPU_CLUSTER: 0 child on link 0 APIC: 00
1343 03:24:43.933960 APIC: 00
1344 03:24:43.937095 APIC: 01
1345 03:24:43.937324 APIC: 07
1346 03:24:43.940489 APIC: 06
1347 03:24:43.940737 APIC: 03
1348 03:24:43.940916 APIC: 02
1349 03:24:43.943501 APIC: 05
1350 03:24:43.943729 APIC: 04
1351 03:24:43.946743 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1352 03:24:43.956663 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1353 03:24:43.969530 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1354 03:24:43.969767 PCI: 00:00.0
1355 03:24:43.979331 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1356 03:24:43.989318 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1357 03:24:43.998957 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1358 03:24:44.008489 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1359 03:24:44.018369 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1360 03:24:44.028075 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1361 03:24:44.034702 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1362 03:24:44.044408 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1363 03:24:44.054147 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1364 03:24:44.064096 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1365 03:24:44.073796 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1366 03:24:44.083665 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1367 03:24:44.093370 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1368 03:24:44.103056 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1369 03:24:44.112830 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1370 03:24:44.119358 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1371 03:24:44.122632 PCI: 00:02.0
1372 03:24:44.132414 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1373 03:24:44.142144 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1374 03:24:44.151767 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1375 03:24:44.155175 PCI: 00:04.0
1376 03:24:44.155411 PCI: 00:08.0
1377 03:24:44.164743 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1378 03:24:44.168070 PCI: 00:12.0
1379 03:24:44.177624 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1380 03:24:44.181004 PCI: 00:14.0 child on link 0 USB0 port 0
1381 03:24:44.194246 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1382 03:24:44.197416 USB0 port 0 child on link 0 USB2 port 0
1383 03:24:44.200663 USB2 port 0
1384 03:24:44.200935 USB2 port 1
1385 03:24:44.203784 USB2 port 2
1386 03:24:44.204015 USB2 port 3
1387 03:24:44.207084 USB2 port 5
1388 03:24:44.207321 USB2 port 6
1389 03:24:44.210488 USB2 port 9
1390 03:24:44.210736 USB3 port 0
1391 03:24:44.213926 USB3 port 1
1392 03:24:44.214188 USB3 port 2
1393 03:24:44.216971 USB3 port 3
1394 03:24:44.217205 USB3 port 4
1395 03:24:44.220242 PCI: 00:14.2
1396 03:24:44.230282 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1397 03:24:44.239871 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1398 03:24:44.242969 PCI: 00:14.3
1399 03:24:44.252819 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1400 03:24:44.255987 PCI: 00:15.0 child on link 0 I2C: 01:15
1401 03:24:44.265626 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1402 03:24:44.269085 I2C: 01:15
1403 03:24:44.272386 PCI: 00:15.1 child on link 0 I2C: 02:5d
1404 03:24:44.282159 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1405 03:24:44.285338 I2C: 02:5d
1406 03:24:44.285623 GENERIC: 0.0
1407 03:24:44.288648 PCI: 00:16.0
1408 03:24:44.298482 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1409 03:24:44.301551 PCI: 00:17.0
1410 03:24:44.311467 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1411 03:24:44.321062 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1412 03:24:44.330894 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1413 03:24:44.337414 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1414 03:24:44.347265 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1415 03:24:44.356817 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1416 03:24:44.363476 PCI: 00:19.0 child on link 0 I2C: 03:1a
1417 03:24:44.373228 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1418 03:24:44.373470 I2C: 03:1a
1419 03:24:44.376343 I2C: 03:38
1420 03:24:44.376553 I2C: 03:39
1421 03:24:44.379506 I2C: 03:3a
1422 03:24:44.379723 I2C: 03:3b
1423 03:24:44.386204 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1424 03:24:44.395889 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1425 03:24:44.405832 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1426 03:24:44.415418 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1427 03:24:44.415639 PCI: 01:00.0
1428 03:24:44.428387 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1429 03:24:44.428618 PCI: 00:1e.0
1430 03:24:44.438101 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1431 03:24:44.451271 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1432 03:24:44.454386 PCI: 00:1e.2 child on link 0 SPI: 00
1433 03:24:44.464622 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1434 03:24:44.465005 SPI: 00
1435 03:24:44.470928 PCI: 00:1e.3 child on link 0 SPI: 01
1436 03:24:44.480575 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1437 03:24:44.480867 SPI: 01
1438 03:24:44.487060 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1439 03:24:44.493747 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1440 03:24:44.503436 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1441 03:24:44.503748 PNP: 0c09.0
1442 03:24:44.513038 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1443 03:24:44.516655 PCI: 00:1f.3
1444 03:24:44.526099 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1445 03:24:44.536109 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1446 03:24:44.539374 PCI: 00:1f.4
1447 03:24:44.545738 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1448 03:24:44.555439 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1449 03:24:44.558637 PCI: 00:1f.5
1450 03:24:44.568454 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1451 03:24:44.571869 Done allocating resources.
1452 03:24:44.578096 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1453 03:24:44.581440 Enabling resources...
1454 03:24:44.584829 PCI: 00:00.0 subsystem <- 8086/9b61
1455 03:24:44.587839 PCI: 00:00.0 cmd <- 06
1456 03:24:44.590988 PCI: 00:02.0 subsystem <- 8086/9b41
1457 03:24:44.594300 PCI: 00:02.0 cmd <- 03
1458 03:24:44.594565 PCI: 00:08.0 cmd <- 06
1459 03:24:44.600836 PCI: 00:12.0 subsystem <- 8086/02f9
1460 03:24:44.601102 PCI: 00:12.0 cmd <- 02
1461 03:24:44.607220 PCI: 00:14.0 subsystem <- 8086/02ed
1462 03:24:44.607429 PCI: 00:14.0 cmd <- 02
1463 03:24:44.610447 PCI: 00:14.2 cmd <- 02
1464 03:24:44.613953 PCI: 00:14.3 subsystem <- 8086/02f0
1465 03:24:44.617294 PCI: 00:14.3 cmd <- 02
1466 03:24:44.620521 PCI: 00:15.0 subsystem <- 8086/02e8
1467 03:24:44.623650 PCI: 00:15.0 cmd <- 02
1468 03:24:44.626777 PCI: 00:15.1 subsystem <- 8086/02e9
1469 03:24:44.630006 PCI: 00:15.1 cmd <- 02
1470 03:24:44.633317 PCI: 00:16.0 subsystem <- 8086/02e0
1471 03:24:44.636590 PCI: 00:16.0 cmd <- 02
1472 03:24:44.639992 PCI: 00:17.0 subsystem <- 8086/02d3
1473 03:24:44.643093 PCI: 00:17.0 cmd <- 03
1474 03:24:44.646306 PCI: 00:19.0 subsystem <- 8086/02c5
1475 03:24:44.649755 PCI: 00:19.0 cmd <- 02
1476 03:24:44.652998 PCI: 00:1d.0 bridge ctrl <- 0013
1477 03:24:44.656291 PCI: 00:1d.0 subsystem <- 8086/02b0
1478 03:24:44.659431 PCI: 00:1d.0 cmd <- 06
1479 03:24:44.662688 PCI: 00:1e.0 subsystem <- 8086/02a8
1480 03:24:44.662903 PCI: 00:1e.0 cmd <- 06
1481 03:24:44.669310 PCI: 00:1e.2 subsystem <- 8086/02aa
1482 03:24:44.669534 PCI: 00:1e.2 cmd <- 06
1483 03:24:44.675763 PCI: 00:1e.3 subsystem <- 8086/02ab
1484 03:24:44.676010 PCI: 00:1e.3 cmd <- 02
1485 03:24:44.679053 PCI: 00:1f.0 subsystem <- 8086/0284
1486 03:24:44.682570 PCI: 00:1f.0 cmd <- 407
1487 03:24:44.685640 PCI: 00:1f.3 subsystem <- 8086/02c8
1488 03:24:44.688960 PCI: 00:1f.3 cmd <- 02
1489 03:24:44.692259 PCI: 00:1f.4 subsystem <- 8086/02a3
1490 03:24:44.695533 PCI: 00:1f.4 cmd <- 03
1491 03:24:44.698815 PCI: 00:1f.5 subsystem <- 8086/02a4
1492 03:24:44.701845 PCI: 00:1f.5 cmd <- 406
1493 03:24:44.710903 PCI: 01:00.0 cmd <- 02
1494 03:24:44.715885 done.
1495 03:24:44.727326 ME: Version: 14.0.39.1367
1496 03:24:44.733804 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1497 03:24:44.737017 Initializing devices...
1498 03:24:44.737197 Root Device init ...
1499 03:24:44.743281 Chrome EC: Set SMI mask to 0x0000000000000000
1500 03:24:44.749857 Chrome EC: clear events_b mask to 0x0000000000000000
1501 03:24:44.753264 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1502 03:24:44.759644 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1503 03:24:44.766071 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1504 03:24:44.769528 Chrome EC: Set WAKE mask to 0x0000000000000000
1505 03:24:44.775947 Root Device init finished in 35170 usecs
1506 03:24:44.779224 CPU_CLUSTER: 0 init ...
1507 03:24:44.782551 CPU_CLUSTER: 0 init finished in 2447 usecs
1508 03:24:44.787797 PCI: 00:00.0 init ...
1509 03:24:44.791242 CPU TDP: 15 Watts
1510 03:24:44.794446 CPU PL2 = 64 Watts
1511 03:24:44.797558 PCI: 00:00.0 init finished in 7072 usecs
1512 03:24:44.800866 PCI: 00:02.0 init ...
1513 03:24:44.804052 PCI: 00:02.0 init finished in 2245 usecs
1514 03:24:44.807260 PCI: 00:08.0 init ...
1515 03:24:44.810710 PCI: 00:08.0 init finished in 2253 usecs
1516 03:24:44.813852 PCI: 00:12.0 init ...
1517 03:24:44.817045 PCI: 00:12.0 init finished in 2252 usecs
1518 03:24:44.820470 PCI: 00:14.0 init ...
1519 03:24:44.823631 PCI: 00:14.0 init finished in 2253 usecs
1520 03:24:44.826973 PCI: 00:14.2 init ...
1521 03:24:44.830131 PCI: 00:14.2 init finished in 2244 usecs
1522 03:24:44.833569 PCI: 00:14.3 init ...
1523 03:24:44.836598 PCI: 00:14.3 init finished in 2267 usecs
1524 03:24:44.840183 PCI: 00:15.0 init ...
1525 03:24:44.843427 DW I2C bus 0 at 0xd121f000 (400 KHz)
1526 03:24:44.849940 PCI: 00:15.0 init finished in 5960 usecs
1527 03:24:44.850123 PCI: 00:15.1 init ...
1528 03:24:44.856381 DW I2C bus 1 at 0xd1220000 (400 KHz)
1529 03:24:44.859746 PCI: 00:15.1 init finished in 5977 usecs
1530 03:24:44.863219 PCI: 00:16.0 init ...
1531 03:24:44.866456 PCI: 00:16.0 init finished in 2253 usecs
1532 03:24:44.869678 PCI: 00:19.0 init ...
1533 03:24:44.872755 DW I2C bus 4 at 0xd1222000 (400 KHz)
1534 03:24:44.876223 PCI: 00:19.0 init finished in 5978 usecs
1535 03:24:44.879416 PCI: 00:1d.0 init ...
1536 03:24:44.882636 Initializing PCH PCIe bridge.
1537 03:24:44.885915 PCI: 00:1d.0 init finished in 5282 usecs
1538 03:24:44.889608 PCI: 00:1f.0 init ...
1539 03:24:44.892966 IOAPIC: Initializing IOAPIC at 0xfec00000
1540 03:24:44.899494 IOAPIC: Bootstrap Processor Local APIC = 0x00
1541 03:24:44.899807 IOAPIC: ID = 0x02
1542 03:24:44.902746 IOAPIC: Dumping registers
1543 03:24:44.906042 reg 0x0000: 0x02000000
1544 03:24:44.908990 reg 0x0001: 0x00770020
1545 03:24:44.912375 reg 0x0002: 0x00000000
1546 03:24:44.915638 PCI: 00:1f.0 init finished in 23530 usecs
1547 03:24:44.918933 PCI: 00:1f.4 init ...
1548 03:24:44.922260 PCI: 00:1f.4 init finished in 2262 usecs
1549 03:24:44.933687 PCI: 01:00.0 init ...
1550 03:24:44.937105 PCI: 01:00.0 init finished in 2252 usecs
1551 03:24:44.941279 PNP: 0c09.0 init ...
1552 03:24:44.947859 Google Chrome EC uptime: 11.046 seconds
1553 03:24:44.951158 Google Chrome AP resets since EC boot: 0
1554 03:24:44.954396 Google Chrome most recent AP reset causes:
1555 03:24:44.960994 Google Chrome EC reset flags at last EC boot: reset-pin
1556 03:24:44.964054 PNP: 0c09.0 init finished in 20571 usecs
1557 03:24:44.967320 Devices initialized
1558 03:24:44.970746 Show all devs... After init.
1559 03:24:44.970933 Root Device: enabled 1
1560 03:24:44.974042 CPU_CLUSTER: 0: enabled 1
1561 03:24:44.977363 DOMAIN: 0000: enabled 1
1562 03:24:44.980461 APIC: 00: enabled 1
1563 03:24:44.980667 PCI: 00:00.0: enabled 1
1564 03:24:44.984089 PCI: 00:02.0: enabled 1
1565 03:24:44.987180 PCI: 00:04.0: enabled 0
1566 03:24:44.990174 PCI: 00:05.0: enabled 0
1567 03:24:44.990378 PCI: 00:12.0: enabled 1
1568 03:24:44.993450 PCI: 00:12.5: enabled 0
1569 03:24:44.996799 PCI: 00:12.6: enabled 0
1570 03:24:45.000187 PCI: 00:14.0: enabled 1
1571 03:24:45.000393 PCI: 00:14.1: enabled 0
1572 03:24:45.003491 PCI: 00:14.3: enabled 1
1573 03:24:45.006503 PCI: 00:14.5: enabled 0
1574 03:24:45.006703 PCI: 00:15.0: enabled 1
1575 03:24:45.010106 PCI: 00:15.1: enabled 1
1576 03:24:45.013074 PCI: 00:15.2: enabled 0
1577 03:24:45.016475 PCI: 00:15.3: enabled 0
1578 03:24:45.016662 PCI: 00:16.0: enabled 1
1579 03:24:45.019778 PCI: 00:16.1: enabled 0
1580 03:24:45.022975 PCI: 00:16.2: enabled 0
1581 03:24:45.026269 PCI: 00:16.3: enabled 0
1582 03:24:45.026454 PCI: 00:16.4: enabled 0
1583 03:24:45.029474 PCI: 00:16.5: enabled 0
1584 03:24:45.032615 PCI: 00:17.0: enabled 1
1585 03:24:45.035838 PCI: 00:19.0: enabled 1
1586 03:24:45.036024 PCI: 00:19.1: enabled 0
1587 03:24:45.039082 PCI: 00:19.2: enabled 0
1588 03:24:45.042433 PCI: 00:1a.0: enabled 0
1589 03:24:45.045751 PCI: 00:1c.0: enabled 0
1590 03:24:45.045938 PCI: 00:1c.1: enabled 0
1591 03:24:45.049076 PCI: 00:1c.2: enabled 0
1592 03:24:45.052081 PCI: 00:1c.3: enabled 0
1593 03:24:45.055571 PCI: 00:1c.4: enabled 0
1594 03:24:45.055755 PCI: 00:1c.5: enabled 0
1595 03:24:45.058818 PCI: 00:1c.6: enabled 0
1596 03:24:45.062216 PCI: 00:1c.7: enabled 0
1597 03:24:45.065297 PCI: 00:1d.0: enabled 1
1598 03:24:45.065484 PCI: 00:1d.1: enabled 0
1599 03:24:45.068638 PCI: 00:1d.2: enabled 0
1600 03:24:45.071784 PCI: 00:1d.3: enabled 0
1601 03:24:45.075069 PCI: 00:1d.4: enabled 0
1602 03:24:45.075286 PCI: 00:1d.5: enabled 0
1603 03:24:45.078286 PCI: 00:1e.0: enabled 1
1604 03:24:45.081581 PCI: 00:1e.1: enabled 0
1605 03:24:45.084847 PCI: 00:1e.2: enabled 1
1606 03:24:45.085180 PCI: 00:1e.3: enabled 1
1607 03:24:45.088217 PCI: 00:1f.0: enabled 1
1608 03:24:45.091556 PCI: 00:1f.1: enabled 0
1609 03:24:45.094714 PCI: 00:1f.2: enabled 0
1610 03:24:45.095068 PCI: 00:1f.3: enabled 1
1611 03:24:45.097901 PCI: 00:1f.4: enabled 1
1612 03:24:45.101300 PCI: 00:1f.5: enabled 1
1613 03:24:45.104310 PCI: 00:1f.6: enabled 0
1614 03:24:45.104644 USB0 port 0: enabled 1
1615 03:24:45.107613 I2C: 01:15: enabled 1
1616 03:24:45.110841 I2C: 02:5d: enabled 1
1617 03:24:45.111185 GENERIC: 0.0: enabled 1
1618 03:24:45.114096 I2C: 03:1a: enabled 1
1619 03:24:45.117295 I2C: 03:38: enabled 1
1620 03:24:45.120445 I2C: 03:39: enabled 1
1621 03:24:45.120644 I2C: 03:3a: enabled 1
1622 03:24:45.123629 I2C: 03:3b: enabled 1
1623 03:24:45.126899 PCI: 00:00.0: enabled 1
1624 03:24:45.127109 SPI: 00: enabled 1
1625 03:24:45.130160 SPI: 01: enabled 1
1626 03:24:45.133703 PNP: 0c09.0: enabled 1
1627 03:24:45.133902 USB2 port 0: enabled 1
1628 03:24:45.136660 USB2 port 1: enabled 1
1629 03:24:45.140058 USB2 port 2: enabled 0
1630 03:24:45.140258 USB2 port 3: enabled 0
1631 03:24:45.143228 USB2 port 5: enabled 0
1632 03:24:45.146500 USB2 port 6: enabled 1
1633 03:24:45.149886 USB2 port 9: enabled 1
1634 03:24:45.150084 USB3 port 0: enabled 1
1635 03:24:45.153209 USB3 port 1: enabled 1
1636 03:24:45.156503 USB3 port 2: enabled 1
1637 03:24:45.156723 USB3 port 3: enabled 1
1638 03:24:45.159728 USB3 port 4: enabled 0
1639 03:24:45.162775 APIC: 01: enabled 1
1640 03:24:45.162974 APIC: 07: enabled 1
1641 03:24:45.166193 APIC: 06: enabled 1
1642 03:24:45.169286 APIC: 03: enabled 1
1643 03:24:45.169486 APIC: 02: enabled 1
1644 03:24:45.172695 APIC: 05: enabled 1
1645 03:24:45.175951 APIC: 04: enabled 1
1646 03:24:45.176236 PCI: 00:08.0: enabled 1
1647 03:24:45.179188 PCI: 00:14.2: enabled 1
1648 03:24:45.182687 PCI: 01:00.0: enabled 1
1649 03:24:45.185730 Disabling ACPI via APMC:
1650 03:24:45.188823 done.
1651 03:24:45.192134 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1652 03:24:45.195512 ELOG: NV offset 0xaf0000 size 0x4000
1653 03:24:45.202758 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1654 03:24:45.209370 ELOG: Event(17) added with size 13 at 2022-07-07 02:37:47 UTC
1655 03:24:45.215979 ELOG: Event(92) added with size 9 at 2022-07-07 02:37:47 UTC
1656 03:24:45.222435 ELOG: Event(93) added with size 9 at 2022-07-07 02:37:47 UTC
1657 03:24:45.229044 ELOG: Event(9A) added with size 9 at 2022-07-07 02:37:47 UTC
1658 03:24:45.235453 ELOG: Event(9E) added with size 10 at 2022-07-07 02:37:47 UTC
1659 03:24:45.242130 ELOG: Event(9F) added with size 14 at 2022-07-07 02:37:47 UTC
1660 03:24:45.248503 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1661 03:24:45.254897 ELOG: Event(A1) added with size 10 at 2022-07-07 02:37:47 UTC
1662 03:24:45.261423 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1663 03:24:45.267830 ELOG: Event(A0) added with size 9 at 2022-07-07 02:37:47 UTC
1664 03:24:45.271276 elog_add_boot_reason: Logged dev mode boot
1665 03:24:45.274480 Finalize devices...
1666 03:24:45.277656 PCI: 00:17.0 final
1667 03:24:45.277797 Devices finalized
1668 03:24:45.284062 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1669 03:24:45.287521 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1670 03:24:45.294251 ME: HFSTS1 : 0x90000245
1671 03:24:45.297376 ME: HFSTS2 : 0x3B850126
1672 03:24:45.300718 ME: HFSTS3 : 0x00000020
1673 03:24:45.303947 ME: HFSTS4 : 0x00004800
1674 03:24:45.310344 ME: HFSTS5 : 0x00000000
1675 03:24:45.313627 ME: HFSTS6 : 0x40400006
1676 03:24:45.316936 ME: Manufacturing Mode : NO
1677 03:24:45.320245 ME: FW Partition Table : OK
1678 03:24:45.323360 ME: Bringup Loader Failure : NO
1679 03:24:45.326820 ME: Firmware Init Complete : YES
1680 03:24:45.329994 ME: Boot Options Present : NO
1681 03:24:45.333151 ME: Update In Progress : NO
1682 03:24:45.336481 ME: D0i3 Support : YES
1683 03:24:45.339675 ME: Low Power State Enabled : NO
1684 03:24:45.342971 ME: CPU Replaced : NO
1685 03:24:45.346381 ME: CPU Replacement Valid : YES
1686 03:24:45.349611 ME: Current Working State : 5
1687 03:24:45.352884 ME: Current Operation State : 1
1688 03:24:45.355938 ME: Current Operation Mode : 0
1689 03:24:45.359289 ME: Error Code : 0
1690 03:24:45.362572 ME: CPU Debug Disabled : YES
1691 03:24:45.365917 ME: TXT Support : NO
1692 03:24:45.372268 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1693 03:24:45.378842 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1694 03:24:45.379074 CBFS @ c08000 size 3f8000
1695 03:24:45.385290 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1696 03:24:45.388639 CBFS: Locating 'fallback/dsdt.aml'
1697 03:24:45.391771 CBFS: Found @ offset 10bb80 size 3fa5
1698 03:24:45.398515 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 03:24:45.401707 CBFS @ c08000 size 3f8000
1700 03:24:45.407954 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 03:24:45.411383 CBFS: Locating 'fallback/slic'
1702 03:24:45.414689 CBFS: 'fallback/slic' not found.
1703 03:24:45.417870 ACPI: Writing ACPI tables at 99b3e000.
1704 03:24:45.421316 ACPI: * FACS
1705 03:24:45.421567 ACPI: * DSDT
1706 03:24:45.427689 Ramoops buffer: 0x100000@0x99a3d000.
1707 03:24:45.430912 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1708 03:24:45.434430 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1709 03:24:45.438222 Google Chrome EC: version:
1710 03:24:45.441315 ro: helios_v2.0.2659-56403530b
1711 03:24:45.444549 rw: helios_v2.0.2849-c41de27e7d
1712 03:24:45.447784 running image: 1
1713 03:24:45.451175 ACPI: * FADT
1714 03:24:45.451426 SCI is IRQ9
1715 03:24:45.457637 ACPI: added table 1/32, length now 40
1716 03:24:45.457904 ACPI: * SSDT
1717 03:24:45.461001 Found 1 CPU(s) with 8 core(s) each.
1718 03:24:45.467564 Error: Could not locate 'wifi_sar' in VPD.
1719 03:24:45.470763 Checking CBFS for default SAR values
1720 03:24:45.473853 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 03:24:45.477145 CBFS @ c08000 size 3f8000
1722 03:24:45.483653 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 03:24:45.486874 CBFS: Locating 'wifi_sar_defaults.hex'
1724 03:24:45.490192 CBFS: Found @ offset 5fac0 size 77
1725 03:24:45.493404 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1726 03:24:45.500049 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1727 03:24:45.503260 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1728 03:24:45.509808 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1729 03:24:45.512905 failed to find key in VPD: dsm_calib_r0_0
1730 03:24:45.522824 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1731 03:24:45.529461 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1732 03:24:45.532491 failed to find key in VPD: dsm_calib_r0_1
1733 03:24:45.542421 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1734 03:24:45.545460 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1735 03:24:45.552162 failed to find key in VPD: dsm_calib_r0_2
1736 03:24:45.558608 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1737 03:24:45.565149 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1738 03:24:45.568287 failed to find key in VPD: dsm_calib_r0_3
1739 03:24:45.578097 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1740 03:24:45.584748 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1741 03:24:45.587884 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1742 03:24:45.591414 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1743 03:24:45.594454 EC returned error result code 1
1744 03:24:45.598193 EC returned error result code 1
1745 03:24:45.601662 EC returned error result code 1
1746 03:24:45.608115 PS2K: Bad resp from EC. Vivaldi disabled!
1747 03:24:45.615066 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1748 03:24:45.618211 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1749 03:24:45.624975 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1750 03:24:45.628116 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1751 03:24:45.634551 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1752 03:24:45.641151 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1753 03:24:45.647547 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1754 03:24:45.654186 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1755 03:24:45.657127 ACPI: added table 2/32, length now 44
1756 03:24:45.657614 ACPI: * MCFG
1757 03:24:45.660652 ACPI: added table 3/32, length now 48
1758 03:24:45.663841 ACPI: * TPM2
1759 03:24:45.667058 TPM2 log created at 99a2d000
1760 03:24:45.670395 ACPI: added table 4/32, length now 52
1761 03:24:45.673812 ACPI: * MADT
1762 03:24:45.674297 SCI is IRQ9
1763 03:24:45.676780 ACPI: added table 5/32, length now 56
1764 03:24:45.680148 current = 99b43ac0
1765 03:24:45.680630 ACPI: * DMAR
1766 03:24:45.683628 ACPI: added table 6/32, length now 60
1767 03:24:45.686560 ACPI: * IGD OpRegion
1768 03:24:45.689759 GMA: Found VBT in CBFS
1769 03:24:45.693280 GMA: Found valid VBT in CBFS
1770 03:24:45.696286 ACPI: added table 7/32, length now 64
1771 03:24:45.696767 ACPI: * HPET
1772 03:24:45.702744 ACPI: added table 8/32, length now 68
1773 03:24:45.703250 ACPI: done.
1774 03:24:45.706122 ACPI tables: 31744 bytes.
1775 03:24:45.709642 smbios_write_tables: 99a2c000
1776 03:24:45.712848 EC returned error result code 3
1777 03:24:45.715959 Couldn't obtain OEM name from CBI
1778 03:24:45.719428 Create SMBIOS type 17
1779 03:24:45.722687 PCI: 00:00.0 (Intel Cannonlake)
1780 03:24:45.723196 PCI: 00:14.3 (Intel WiFi)
1781 03:24:45.725772 SMBIOS tables: 939 bytes.
1782 03:24:45.732386 Writing table forward entry at 0x00000500
1783 03:24:45.735622 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1784 03:24:45.742051 Writing coreboot table at 0x99b62000
1785 03:24:45.745296 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1786 03:24:45.751677 1. 0000000000001000-000000000009ffff: RAM
1787 03:24:45.755160 2. 00000000000a0000-00000000000fffff: RESERVED
1788 03:24:45.758470 3. 0000000000100000-0000000099a2bfff: RAM
1789 03:24:45.764810 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1790 03:24:45.771469 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1791 03:24:45.777777 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1792 03:24:45.781065 7. 000000009a000000-000000009f7fffff: RESERVED
1793 03:24:45.784319 8. 00000000e0000000-00000000efffffff: RESERVED
1794 03:24:45.790841 9. 00000000fc000000-00000000fc000fff: RESERVED
1795 03:24:45.794161 10. 00000000fe000000-00000000fe00ffff: RESERVED
1796 03:24:45.800688 11. 00000000fed10000-00000000fed17fff: RESERVED
1797 03:24:45.803814 12. 00000000fed80000-00000000fed83fff: RESERVED
1798 03:24:45.810256 13. 00000000fed90000-00000000fed91fff: RESERVED
1799 03:24:45.813589 14. 00000000feda0000-00000000feda1fff: RESERVED
1800 03:24:45.819901 15. 0000000100000000-000000045e7fffff: RAM
1801 03:24:45.823268 Graphics framebuffer located at 0xc0000000
1802 03:24:45.826404 Passing 5 GPIOs to payload:
1803 03:24:45.829595 NAME | PORT | POLARITY | VALUE
1804 03:24:45.836159 write protect | undefined | high | low
1805 03:24:45.842636 lid | undefined | high | high
1806 03:24:45.845907 power | undefined | high | low
1807 03:24:45.852451 oprom | undefined | high | low
1808 03:24:45.855762 EC in RW | 0x000000cb | high | low
1809 03:24:45.858898 Board ID: 4
1810 03:24:45.862122 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1811 03:24:45.865568 CBFS @ c08000 size 3f8000
1812 03:24:45.871981 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1813 03:24:45.878429 Wrote coreboot table at: 99b62000, 0x594 bytes, checksum 9a04
1814 03:24:45.881712 coreboot table: 1452 bytes.
1815 03:24:45.884840 IMD ROOT 0. 99fff000 00001000
1816 03:24:45.888387 IMD SMALL 1. 99ffe000 00001000
1817 03:24:45.891315 FSP MEMORY 2. 99c4e000 003b0000
1818 03:24:45.894785 CONSOLE 3. 99c2e000 00020000
1819 03:24:45.898049 FMAP 4. 99c2d000 0000054e
1820 03:24:45.901062 TIME STAMP 5. 99c2c000 00000910
1821 03:24:45.904422 VBOOT WORK 6. 99c18000 00014000
1822 03:24:45.907693 MRC DATA 7. 99c16000 00001958
1823 03:24:45.911063 ROMSTG STCK 8. 99c15000 00001000
1824 03:24:45.914329 AFTER CAR 9. 99c0b000 0000a000
1825 03:24:45.917511 RAMSTAGE 10. 99baf000 0005c000
1826 03:24:45.920773 REFCODE 11. 99b7a000 00035000
1827 03:24:45.923891 SMM BACKUP 12. 99b6a000 00010000
1828 03:24:45.927328 COREBOOT 13. 99b62000 00008000
1829 03:24:45.930648 ACPI 14. 99b3e000 00024000
1830 03:24:45.933856 ACPI GNVS 15. 99b3d000 00001000
1831 03:24:45.937075 RAMOOPS 16. 99a3d000 00100000
1832 03:24:45.940303 TPM2 TCGLOG17. 99a2d000 00010000
1833 03:24:45.943471 SMBIOS 18. 99a2c000 00000800
1834 03:24:45.946807 IMD small region:
1835 03:24:45.949965 IMD ROOT 0. 99ffec00 00000400
1836 03:24:45.953239 FSP RUNTIME 1. 99ffebe0 00000004
1837 03:24:45.956637 EC HOSTEVENT 2. 99ffebc0 00000008
1838 03:24:45.959951 POWER STATE 3. 99ffeb80 00000040
1839 03:24:45.962952 ROMSTAGE 4. 99ffeb60 00000004
1840 03:24:45.966441 MEM INFO 5. 99ffe9a0 000001b9
1841 03:24:45.969722 MTRR: Physical address space:
1842 03:24:45.976005 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1843 03:24:45.982591 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1844 03:24:45.989310 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1845 03:24:45.995829 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1846 03:24:46.002106 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1847 03:24:46.008931 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1848 03:24:46.015285 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1849 03:24:46.018524 MTRR: Fixed MSR 0x250 0x0606060606060606
1850 03:24:46.022011 MTRR: Fixed MSR 0x258 0x0606060606060606
1851 03:24:46.025196 MTRR: Fixed MSR 0x259 0x0000000000000000
1852 03:24:46.031799 MTRR: Fixed MSR 0x268 0x0606060606060606
1853 03:24:46.035209 MTRR: Fixed MSR 0x269 0x0606060606060606
1854 03:24:46.038549 MTRR: Fixed MSR 0x26a 0x0606060606060606
1855 03:24:46.041719 MTRR: Fixed MSR 0x26b 0x0606060606060606
1856 03:24:46.048173 MTRR: Fixed MSR 0x26c 0x0606060606060606
1857 03:24:46.051186 MTRR: Fixed MSR 0x26d 0x0606060606060606
1858 03:24:46.054595 MTRR: Fixed MSR 0x26e 0x0606060606060606
1859 03:24:46.057758 MTRR: Fixed MSR 0x26f 0x0606060606060606
1860 03:24:46.061607 call enable_fixed_mtrr()
1861 03:24:46.064741 CPU physical address size: 39 bits
1862 03:24:46.071553 MTRR: default type WB/UC MTRR counts: 6/8.
1863 03:24:46.074609 MTRR: WB selected as default type.
1864 03:24:46.081198 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1865 03:24:46.087806 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1866 03:24:46.090873 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1867 03:24:46.097318 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1868 03:24:46.104094 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1869 03:24:46.110468 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1870 03:24:46.117021 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 03:24:46.120211 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 03:24:46.123755 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 03:24:46.127262 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 03:24:46.133407 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 03:24:46.136951 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 03:24:46.139812 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 03:24:46.143069 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 03:24:46.149725 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 03:24:46.153043 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 03:24:46.156113 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 03:24:46.156610
1882 03:24:46.159549 MTRR check
1883 03:24:46.162730 Fixed MTRRs : Enabled
1884 03:24:46.163272 Variable MTRRs: Enabled
1885 03:24:46.163761
1886 03:24:46.166073 call enable_fixed_mtrr()
1887 03:24:46.172563 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1888 03:24:46.175651 CPU physical address size: 39 bits
1889 03:24:46.179139 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1890 03:24:46.185459 MTRR: Fixed MSR 0x250 0x0606060606060606
1891 03:24:46.188737 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 03:24:46.192085 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 03:24:46.198639 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 03:24:46.201953 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 03:24:46.205086 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 03:24:46.208254 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 03:24:46.214852 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 03:24:46.217918 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 03:24:46.221501 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 03:24:46.224580 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 03:24:46.231085 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 03:24:46.234271 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 03:24:46.237736 call enable_fixed_mtrr()
1904 03:24:46.240744 MTRR: Fixed MSR 0x259 0x0000000000000000
1905 03:24:46.244096 MTRR: Fixed MSR 0x268 0x0606060606060606
1906 03:24:46.247247 MTRR: Fixed MSR 0x269 0x0606060606060606
1907 03:24:46.253819 MTRR: Fixed MSR 0x26a 0x0606060606060606
1908 03:24:46.257099 MTRR: Fixed MSR 0x26b 0x0606060606060606
1909 03:24:46.260330 MTRR: Fixed MSR 0x26c 0x0606060606060606
1910 03:24:46.263693 MTRR: Fixed MSR 0x26d 0x0606060606060606
1911 03:24:46.270210 MTRR: Fixed MSR 0x26e 0x0606060606060606
1912 03:24:46.273595 MTRR: Fixed MSR 0x26f 0x0606060606060606
1913 03:24:46.276580 CPU physical address size: 39 bits
1914 03:24:46.280123 call enable_fixed_mtrr()
1915 03:24:46.283246 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 03:24:46.289771 MTRR: Fixed MSR 0x250 0x0606060606060606
1917 03:24:46.293045 MTRR: Fixed MSR 0x258 0x0606060606060606
1918 03:24:46.296222 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 03:24:46.299581 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 03:24:46.306035 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 03:24:46.309025 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 03:24:46.312321 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 03:24:46.315792 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 03:24:46.322044 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 03:24:46.325355 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 03:24:46.328558 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 03:24:46.332055 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 03:24:46.335319 call enable_fixed_mtrr()
1929 03:24:46.338554 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 03:24:46.344904 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 03:24:46.348153 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 03:24:46.351481 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 03:24:46.358326 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 03:24:46.361271 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 03:24:46.364616 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 03:24:46.367659 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 03:24:46.374083 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 03:24:46.377390 CPU physical address size: 39 bits
1939 03:24:46.380677 call enable_fixed_mtrr()
1940 03:24:46.383879 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 03:24:46.387259 MTRR: Fixed MSR 0x250 0x0606060606060606
1942 03:24:46.390298 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 03:24:46.396961 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 03:24:46.400443 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 03:24:46.403549 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 03:24:46.406806 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 03:24:46.413482 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 03:24:46.416694 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 03:24:46.419944 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 03:24:46.423054 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 03:24:46.429728 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 03:24:46.432852 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 03:24:46.436056 call enable_fixed_mtrr()
1954 03:24:46.439218 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 03:24:46.442497 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 03:24:46.449010 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 03:24:46.452329 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 03:24:46.455722 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 03:24:46.459044 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 03:24:46.465311 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 03:24:46.468743 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 03:24:46.471792 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 03:24:46.475205 CPU physical address size: 39 bits
1964 03:24:46.478500 call enable_fixed_mtrr()
1965 03:24:46.481656 CPU physical address size: 39 bits
1966 03:24:46.485072 CBFS @ c08000 size 3f8000
1967 03:24:46.491644 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1968 03:24:46.495056 CBFS: Locating 'fallback/payload'
1969 03:24:46.498138 CPU physical address size: 39 bits
1970 03:24:46.501238 CPU physical address size: 39 bits
1971 03:24:46.504594 CBFS: Found @ offset 1c96c0 size 3f798
1972 03:24:46.510919 Checking segment from ROM address 0xffdd16f8
1973 03:24:46.514409 Checking segment from ROM address 0xffdd1714
1974 03:24:46.517546 Loading segment from ROM address 0xffdd16f8
1975 03:24:46.521005 code (compression=0)
1976 03:24:46.530678 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1977 03:24:46.537146 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1978 03:24:46.540283 it's not compressed!
1979 03:24:46.632015 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1980 03:24:46.638633 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1981 03:24:46.645092 Loading segment from ROM address 0xffdd1714
1982 03:24:46.645578 Entry Point 0x30000000
1983 03:24:46.648268 Loaded segments
1984 03:24:46.654141 Finalizing chipset.
1985 03:24:46.657361 Finalizing SMM.
1986 03:24:46.660739 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1987 03:24:46.663986 mp_park_aps done after 0 msecs.
1988 03:24:46.670356 Jumping to boot code at 30000000(99b62000)
1989 03:24:46.676818 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1990 03:24:46.677308
1991 03:24:46.680093 Starting depthcharge on Helios...
1992 03:24:46.681244 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1993 03:24:46.681844 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
1994 03:24:46.682310 Setting prompt string to ['hatch:']
1995 03:24:46.682763 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
1996 03:24:46.690881 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1997 03:24:46.696578 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1998 03:24:46.702974 board_setup: Info: eMMC controller not present; skipping
1999 03:24:46.706255 New NVMe Controller 0x30053ac0 @ 00:1d:00
2000 03:24:46.712709 board_setup: Info: SDHCI controller not present; skipping
2001 03:24:46.719426 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2002 03:24:46.719984 Wipe memory regions:
2003 03:24:46.725758 [0x00000000001000, 0x000000000a0000)
2004 03:24:46.728868 [0x00000000100000, 0x00000030000000)
2005 03:24:46.794822 [0x00000030657430, 0x00000099a2c000)
2006 03:24:46.935228 [0x00000100000000, 0x0000045e800000)
2007 03:24:48.317457 R8152: Initializing
2008 03:24:48.320536 Version 9 (ocp_data = 6010)
2009 03:24:48.324824 R8152: Done initializing
2010 03:24:48.328007 Adding net device
2011 03:24:48.824457 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2012 03:24:48.825018
2013 03:24:48.826112 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2015 03:24:48.928355 hatch: tftpboot 192.168.201.1 6770189/tftp-deploy-rnwv4cu3/kernel/bzImage 6770189/tftp-deploy-rnwv4cu3/kernel/cmdline 6770189/tftp-deploy-rnwv4cu3/ramdisk/ramdisk.cpio.gz
2016 03:24:48.929023 Setting prompt string to ['Starting kernel']
2017 03:24:48.929504 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2018 03:24:48.929926 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:38)
2019 03:24:48.933803 tftpboot 192.168.201.1 6770189/tftp-deploy-rnwv4cu3/kernel/bzImy-rnwv4cu3/kernel/cmdline 6770189/tftp-deploy-rnwv4cu3/ramdisk/ramdisk.cpio.gz
2020 03:24:48.934384 Waiting for link
2021 03:24:49.134596 done.
2022 03:24:49.135207 MAC: 88:54:1f:0f:6e:7d
2023 03:24:49.137850 Sending DHCP discover... done.
2024 03:24:49.141392 Waiting for reply... done.
2025 03:24:49.144518 Sending DHCP request... done.
2026 03:24:49.151206 Waiting for reply... done.
2027 03:24:49.151792 My ip is 192.168.201.104
2028 03:24:49.157842 The DHCP server ip is 192.168.201.1
2029 03:24:49.160960 TFTP server IP predefined by user: 192.168.201.1
2030 03:24:49.167419 Bootfile predefined by user: 6770189/tftp-deploy-rnwv4cu3/kernel/bzImage
2031 03:24:49.170770 Sending tftp read request... done.
2032 03:24:49.177921 Waiting for the transfer...
2033 03:24:49.491542 00000000 ################################################################
2034 03:24:49.739480 00080000 ################################################################
2035 03:24:49.978261 00100000 ################################################################
2036 03:24:50.212110 00180000 ################################################################
2037 03:24:50.444787 00200000 ################################################################
2038 03:24:50.675038 00280000 ################################################################
2039 03:24:50.914464 00300000 ################################################################
2040 03:24:51.179431 00380000 ################################################################
2041 03:24:51.443381 00400000 ################################################################
2042 03:24:51.697249 00480000 ################################################################
2043 03:24:51.958625 00500000 ################################################################
2044 03:24:52.206667 00580000 ################################################################
2045 03:24:52.463466 00600000 ################################################################
2046 03:24:52.627467 00680000 ############################################ done.
2047 03:24:52.630713 The bootfile was 7176128 bytes long.
2048 03:24:52.634162 Sending tftp read request... done.
2049 03:24:52.637257 Waiting for the transfer...
2050 03:24:52.873416 00000000 ################################################################
2051 03:24:53.121506 00080000 ################################################################
2052 03:24:53.361586 00100000 ################################################################
2053 03:24:53.592375 00180000 ################################################################
2054 03:24:53.824477 00200000 ################################################################
2055 03:24:54.054497 00280000 ################################################################
2056 03:24:54.296726 00300000 ################################################################
2057 03:24:54.529721 00380000 ################################################################
2058 03:24:54.763546 00400000 ################################################################
2059 03:24:54.990260 00480000 ################################################################
2060 03:24:55.093795 00500000 ############################## done.
2061 03:24:55.096951 Sending tftp read request... done.
2062 03:24:55.100354 Waiting for the transfer...
2063 03:24:55.100440 00000000 # done.
2064 03:24:55.110085 Command line loaded dynamically from TFTP file: 6770189/tftp-deploy-rnwv4cu3/kernel/cmdline
2065 03:24:55.135952 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6770189/extract-nfsrootfs-s2mf9kul,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2066 03:24:55.142391 ec_init(0): CrosEC protocol v3 supported (256, 256)
2067 03:24:55.150424 Shutting down all USB controllers.
2068 03:24:55.150508 Removing current net device
2069 03:24:55.158570 Finalizing coreboot
2070 03:24:55.165164 Exiting depthcharge with code 4 at timestamp: 15762693
2071 03:24:55.165249
2072 03:24:55.165318 Starting kernel ...
2073 03:24:55.165379
2074 03:24:55.165439
2075 03:24:55.165727 end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
2076 03:24:55.165827 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2077 03:24:55.165902 Setting prompt string to ['Linux version [0-9]']
2078 03:24:55.165972 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2079 03:24:55.166042 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2081 03:29:27.166911 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2083 03:29:27.168120 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2085 03:29:27.169024 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2088 03:29:27.170575 end: 2 depthcharge-action (duration 00:05:00) [common]
2090 03:29:27.171107 Cleaning after the job
2091 03:29:27.171218 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770189/tftp-deploy-rnwv4cu3/ramdisk
2092 03:29:27.171675 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770189/tftp-deploy-rnwv4cu3/kernel
2093 03:29:27.172202 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770189/tftp-deploy-rnwv4cu3/nfsrootfs
2094 03:29:27.219461 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6770189/tftp-deploy-rnwv4cu3/modules
2095 03:29:27.219807 start: 4.1 power-off (timeout 00:00:30) [common]
2096 03:29:27.219972 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2097 03:29:27.239230 >> Command sent successfully.
2098 03:29:27.241048 Returned 0 in 0 seconds
2099 03:29:27.342247 end: 4.1 power-off (duration 00:00:00) [common]
2101 03:29:27.344602 start: 4.2 read-feedback (timeout 00:10:00) [common]
2102 03:29:27.345789 Listened to connection for namespace 'common' for up to 1s
2103 03:29:28.347731 Finalising connection for namespace 'common'
2104 03:29:28.347916 Disconnecting from shell: Finalise
2105 03:29:28.448723 end: 4.2 read-feedback (duration 00:00:01) [common]
2106 03:29:28.448979 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6770189
2107 03:29:28.604088 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6770189
2108 03:29:28.604275 JobError: Your job cannot terminate cleanly.