Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
1 15:44:14.832368 lava-dispatcher, installed at version: 2022.04
2 15:44:14.832575 start: 0 validate
3 15:44:14.832719 Start time: 2022-06-24 15:44:14.832712+00:00 (UTC)
4 15:44:14.832861 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:44:14.833003 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220610.0%2Famd64%2Finitrd.cpio.gz exists
6 15:44:15.124931 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:44:15.125141 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.121-cip9-272-g3fb28d4c623b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:44:15.413782 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:44:15.413979 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220610.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 15:44:15.707691 Using caching service: 'http://localhost/cache/?uri=%s'
11 15:44:15.707865 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-iwamatsu-linux-5.10.y-cip-rc%2Fv5.10.121-cip9-272-g3fb28d4c623b%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 15:44:16.004913 validate duration: 1.17
14 15:44:16.005234 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 15:44:16.005354 start: 1.1 download-retry (timeout 00:10:00) [common]
16 15:44:16.005454 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 15:44:16.005566 Not decompressing ramdisk as can be used compressed.
18 15:44:16.005659 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220610.0/amd64/initrd.cpio.gz
19 15:44:16.005730 saving as /var/lib/lava/dispatcher/tmp/6677466/tftp-deploy-vwa2xkij/ramdisk/initrd.cpio.gz
20 15:44:16.005798 total size: 5411022 (5MB)
21 15:44:16.007010 progress 0% (0MB)
22 15:44:16.008724 progress 5% (0MB)
23 15:44:16.010327 progress 10% (0MB)
24 15:44:16.012026 progress 15% (0MB)
25 15:44:16.013795 progress 20% (1MB)
26 15:44:16.015365 progress 25% (1MB)
27 15:44:16.016915 progress 30% (1MB)
28 15:44:16.018477 progress 35% (1MB)
29 15:44:16.020223 progress 40% (2MB)
30 15:44:16.021839 progress 45% (2MB)
31 15:44:16.023399 progress 50% (2MB)
32 15:44:16.024950 progress 55% (2MB)
33 15:44:16.026705 progress 60% (3MB)
34 15:44:16.028261 progress 65% (3MB)
35 15:44:16.029819 progress 70% (3MB)
36 15:44:16.031370 progress 75% (3MB)
37 15:44:16.033056 progress 80% (4MB)
38 15:44:16.034498 progress 85% (4MB)
39 15:44:16.035949 progress 90% (4MB)
40 15:44:16.037435 progress 95% (4MB)
41 15:44:16.039073 progress 100% (5MB)
42 15:44:16.039263 5MB downloaded in 0.03s (154.22MB/s)
43 15:44:16.039443 end: 1.1.1 http-download (duration 00:00:00) [common]
45 15:44:16.039717 end: 1.1 download-retry (duration 00:00:00) [common]
46 15:44:16.039821 start: 1.2 download-retry (timeout 00:10:00) [common]
47 15:44:16.039925 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 15:44:16.040082 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.121-cip9-272-g3fb28d4c623b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 15:44:16.040174 saving as /var/lib/lava/dispatcher/tmp/6677466/tftp-deploy-vwa2xkij/kernel/bzImage
50 15:44:16.040253 total size: 10297184 (9MB)
51 15:44:16.040321 No compression specified
52 15:44:16.041491 progress 0% (0MB)
53 15:44:16.044289 progress 5% (0MB)
54 15:44:16.047186 progress 10% (1MB)
55 15:44:16.050023 progress 15% (1MB)
56 15:44:16.052698 progress 20% (1MB)
57 15:44:16.055552 progress 25% (2MB)
58 15:44:16.058447 progress 30% (2MB)
59 15:44:16.061120 progress 35% (3MB)
60 15:44:16.063961 progress 40% (3MB)
61 15:44:16.066786 progress 45% (4MB)
62 15:44:16.069605 progress 50% (4MB)
63 15:44:16.072250 progress 55% (5MB)
64 15:44:16.075052 progress 60% (5MB)
65 15:44:16.077842 progress 65% (6MB)
66 15:44:16.080449 progress 70% (6MB)
67 15:44:16.083239 progress 75% (7MB)
68 15:44:16.086014 progress 80% (7MB)
69 15:44:16.088783 progress 85% (8MB)
70 15:44:16.091391 progress 90% (8MB)
71 15:44:16.094164 progress 95% (9MB)
72 15:44:16.096955 progress 100% (9MB)
73 15:44:16.097155 9MB downloaded in 0.06s (172.59MB/s)
74 15:44:16.097317 end: 1.2.1 http-download (duration 00:00:00) [common]
76 15:44:16.097580 end: 1.2 download-retry (duration 00:00:00) [common]
77 15:44:16.097680 start: 1.3 download-retry (timeout 00:10:00) [common]
78 15:44:16.097777 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 15:44:16.097892 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220610.0/amd64/full.rootfs.tar.xz
80 15:44:16.097967 saving as /var/lib/lava/dispatcher/tmp/6677466/tftp-deploy-vwa2xkij/nfsrootfs/full.rootfs.tar
81 15:44:16.098036 total size: 132926508 (126MB)
82 15:44:16.098104 Using unxz to decompress xz
83 15:44:16.101621 progress 0% (0MB)
84 15:44:16.473381 progress 5% (6MB)
85 15:44:16.872284 progress 10% (12MB)
86 15:44:17.170717 progress 15% (19MB)
87 15:44:17.400592 progress 20% (25MB)
88 15:44:17.688088 progress 25% (31MB)
89 15:44:18.065303 progress 30% (38MB)
90 15:44:18.451024 progress 35% (44MB)
91 15:44:18.888769 progress 40% (50MB)
92 15:44:19.312255 progress 45% (57MB)
93 15:44:19.707663 progress 50% (63MB)
94 15:44:20.116652 progress 55% (69MB)
95 15:44:20.517941 progress 60% (76MB)
96 15:44:20.913685 progress 65% (82MB)
97 15:44:21.315279 progress 70% (88MB)
98 15:44:21.721101 progress 75% (95MB)
99 15:44:22.212356 progress 80% (101MB)
100 15:44:22.709693 progress 85% (107MB)
101 15:44:23.011935 progress 90% (114MB)
102 15:44:23.392050 progress 95% (120MB)
103 15:44:23.826157 progress 100% (126MB)
104 15:44:23.832586 126MB downloaded in 7.73s (16.39MB/s)
105 15:44:23.832873 end: 1.3.1 http-download (duration 00:00:08) [common]
107 15:44:23.833179 end: 1.3 download-retry (duration 00:00:08) [common]
108 15:44:23.833287 start: 1.4 download-retry (timeout 00:09:52) [common]
109 15:44:23.833390 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 15:44:23.833521 downloading http://storage.kernelci.org/cip-gitlab/ci-iwamatsu-linux-5.10.y-cip-rc/v5.10.121-cip9-272-g3fb28d4c623b/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 15:44:23.833602 saving as /var/lib/lava/dispatcher/tmp/6677466/tftp-deploy-vwa2xkij/modules/modules.tar
112 15:44:23.833672 total size: 111156 (0MB)
113 15:44:23.833743 Using unxz to decompress xz
114 15:44:23.837128 progress 29% (0MB)
115 15:44:23.837528 progress 58% (0MB)
116 15:44:23.837790 progress 88% (0MB)
117 15:44:23.839157 progress 100% (0MB)
118 15:44:23.845051 0MB downloaded in 0.01s (9.32MB/s)
119 15:44:23.845296 end: 1.4.1 http-download (duration 00:00:00) [common]
121 15:44:23.845593 end: 1.4 download-retry (duration 00:00:00) [common]
122 15:44:23.845702 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
123 15:44:23.845813 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
124 15:44:25.229660 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6677466/extract-nfsrootfs-iz1iz35y
125 15:44:25.229876 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
126 15:44:25.229993 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
127 15:44:25.230144 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem
128 15:44:25.230259 makedir: /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin
129 15:44:25.230354 makedir: /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/tests
130 15:44:25.230445 makedir: /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/results
131 15:44:25.230553 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-add-keys
132 15:44:25.230698 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-add-sources
133 15:44:25.230828 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-background-process-start
134 15:44:25.230955 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-background-process-stop
135 15:44:25.231077 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-common-functions
136 15:44:25.231199 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-echo-ipv4
137 15:44:25.231322 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-install-packages
138 15:44:25.231461 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-installed-packages
139 15:44:25.231586 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-os-build
140 15:44:25.231706 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-probe-channel
141 15:44:25.231833 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-probe-ip
142 15:44:25.231956 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-target-ip
143 15:44:25.232077 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-target-mac
144 15:44:25.232197 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-target-storage
145 15:44:25.232322 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-test-case
146 15:44:25.232445 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-test-event
147 15:44:25.232565 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-test-feedback
148 15:44:25.232685 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-test-raise
149 15:44:25.232804 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-test-reference
150 15:44:25.232923 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-test-runner
151 15:44:25.233045 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-test-set
152 15:44:25.233411 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-test-shell
153 15:44:25.233538 Updating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-install-packages (oe)
154 15:44:25.233667 Updating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/bin/lava-installed-packages (oe)
155 15:44:25.233775 Creating /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/environment
156 15:44:25.233873 LAVA metadata
157 15:44:25.233947 - LAVA_JOB_ID=6677466
158 15:44:25.234017 - LAVA_DISPATCHER_IP=192.168.201.1
159 15:44:25.234125 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
160 15:44:25.234199 skipped lava-vland-overlay
161 15:44:25.234284 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
162 15:44:25.234374 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
163 15:44:25.234444 skipped lava-multinode-overlay
164 15:44:25.234525 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
165 15:44:25.234615 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
166 15:44:25.234695 Loading test definitions
167 15:44:25.234797 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
168 15:44:25.234878 Using /lava-6677466 at stage 0
169 15:44:25.235165 uuid=6677466_1.5.2.3.1 testdef=None
170 15:44:25.235265 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
171 15:44:25.235362 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
172 15:44:25.235891 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
174 15:44:25.236142 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
175 15:44:25.236774 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
177 15:44:25.237040 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
178 15:44:25.237659 runner path: /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/0/tests/0_dmesg test_uuid 6677466_1.5.2.3.1
179 15:44:25.237829 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
181 15:44:25.238088 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
182 15:44:25.238170 Using /lava-6677466 at stage 1
183 15:44:25.238437 uuid=6677466_1.5.2.3.5 testdef=None
184 15:44:25.238536 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
185 15:44:25.238631 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
186 15:44:25.239122 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
188 15:44:25.239369 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
189 15:44:25.240020 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
191 15:44:25.240287 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
192 15:44:25.240901 runner path: /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/1/tests/1_bootrr test_uuid 6677466_1.5.2.3.5
193 15:44:25.241066 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
195 15:44:25.241317 Creating lava-test-runner.conf files
196 15:44:25.241389 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/0 for stage 0
197 15:44:25.241480 - 0_dmesg
198 15:44:25.241563 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6677466/lava-overlay-36knbcem/lava-6677466/1 for stage 1
199 15:44:25.241653 - 1_bootrr
200 15:44:25.241753 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
201 15:44:25.241849 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
202 15:44:25.248019 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
203 15:44:25.248136 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
204 15:44:25.248234 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
205 15:44:25.248331 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
206 15:44:25.248427 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
207 15:44:25.361595 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
208 15:44:25.361972 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
209 15:44:25.362104 extracting modules file /var/lib/lava/dispatcher/tmp/6677466/tftp-deploy-vwa2xkij/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6677466/extract-nfsrootfs-iz1iz35y
210 15:44:25.367827 extracting modules file /var/lib/lava/dispatcher/tmp/6677466/tftp-deploy-vwa2xkij/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6677466/extract-overlay-ramdisk-gq9aqstg/ramdisk
211 15:44:25.373266 end: 1.5.4 extract-modules (duration 00:00:00) [common]
212 15:44:25.373395 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
213 15:44:25.373490 [common] Applying overlay to NFS
214 15:44:25.373583 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6677466/compress-overlay-h8mk0nmp/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6677466/extract-nfsrootfs-iz1iz35y
215 15:44:25.377879 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
216 15:44:25.378000 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
217 15:44:25.378106 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
218 15:44:25.378214 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
219 15:44:25.378315 Building ramdisk /var/lib/lava/dispatcher/tmp/6677466/extract-overlay-ramdisk-gq9aqstg/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6677466/extract-overlay-ramdisk-gq9aqstg/ramdisk
220 15:44:25.415734 >> 25152 blocks
221 15:44:25.946290 rename /var/lib/lava/dispatcher/tmp/6677466/extract-overlay-ramdisk-gq9aqstg/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6677466/tftp-deploy-vwa2xkij/ramdisk/ramdisk.cpio.gz
222 15:44:25.946718 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
223 15:44:25.946852 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
224 15:44:25.946972 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
225 15:44:25.947079 No mkimage arch provided, not using FIT.
226 15:44:25.947182 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
227 15:44:25.947279 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
228 15:44:25.947390 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
229 15:44:25.947525 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
230 15:44:25.947611 No LXC device requested
231 15:44:25.947702 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
232 15:44:25.947803 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
233 15:44:25.947893 end: 1.7 deploy-device-env (duration 00:00:00) [common]
234 15:44:25.947971 Checking files for TFTP limit of 4294967296 bytes.
235 15:44:25.948381 end: 1 tftp-deploy (duration 00:00:10) [common]
236 15:44:25.948499 start: 2 depthcharge-action (timeout 00:05:00) [common]
237 15:44:25.948603 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
238 15:44:25.948744 substitutions:
239 15:44:25.948819 - {DTB}: None
240 15:44:25.948888 - {INITRD}: 6677466/tftp-deploy-vwa2xkij/ramdisk/ramdisk.cpio.gz
241 15:44:25.948954 - {KERNEL}: 6677466/tftp-deploy-vwa2xkij/kernel/bzImage
242 15:44:25.949019 - {LAVA_MAC}: None
243 15:44:25.949112 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6677466/extract-nfsrootfs-iz1iz35y
244 15:44:25.949193 - {NFS_SERVER_IP}: 192.168.201.1
245 15:44:25.949259 - {PRESEED_CONFIG}: None
246 15:44:25.949321 - {PRESEED_LOCAL}: None
247 15:44:25.949383 - {RAMDISK}: 6677466/tftp-deploy-vwa2xkij/ramdisk/ramdisk.cpio.gz
248 15:44:25.949496 - {ROOT_PART}: None
249 15:44:25.949572 - {ROOT}: None
250 15:44:25.949691 - {SERVER_IP}: 192.168.201.1
251 15:44:25.949752 - {TEE}: None
252 15:44:25.949812 Parsed boot commands:
253 15:44:25.949872 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
254 15:44:25.950035 Parsed boot commands: tftpboot 192.168.201.1 6677466/tftp-deploy-vwa2xkij/kernel/bzImage 6677466/tftp-deploy-vwa2xkij/kernel/cmdline 6677466/tftp-deploy-vwa2xkij/ramdisk/ramdisk.cpio.gz
255 15:44:25.950137 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
256 15:44:25.950234 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
257 15:44:25.950337 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
258 15:44:25.950432 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
259 15:44:25.950508 Not connected, no need to disconnect.
260 15:44:25.950593 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
261 15:44:25.950685 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
262 15:44:25.950762 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
263 15:44:25.953781 Setting prompt string to ['lava-test: # ']
264 15:44:25.954095 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
265 15:44:25.954289 end: 2.2.1 reset-connection (duration 00:00:00) [common]
266 15:44:25.954403 start: 2.2.2 reset-device (timeout 00:05:00) [common]
267 15:44:25.954508 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
268 15:44:25.954704 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
269 15:44:25.975951 >> Command sent successfully.
270 15:44:25.977956 Returned 0 in 0 seconds
271 15:44:26.079034 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
273 15:44:26.080233 end: 2.2.2 reset-device (duration 00:00:00) [common]
274 15:44:26.080662 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
275 15:44:26.081047 Setting prompt string to 'Starting depthcharge on Helios...'
276 15:44:26.081367 Changing prompt to 'Starting depthcharge on Helios...'
277 15:44:26.081650 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
278 15:44:26.082640 [Enter `^Ec?' for help]
279 15:44:32.265925
280 15:44:32.266631
281 15:44:32.275136 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
282 15:44:32.278879 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
283 15:44:32.285588 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
284 15:44:32.288764 CPU: AES supported, TXT NOT supported, VT supported
285 15:44:32.295443 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
286 15:44:32.298465 PCH: device id 0284 (rev 00) is Cometlake-U Premium
287 15:44:32.305175 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
288 15:44:32.308661 VBOOT: Loading verstage.
289 15:44:32.311706 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
290 15:44:32.318405 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
291 15:44:32.325412 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
292 15:44:32.325983 CBFS @ c08000 size 3f8000
293 15:44:32.331939 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
294 15:44:32.334928 CBFS: Locating 'fallback/verstage'
295 15:44:32.337916 CBFS: Found @ offset 10fb80 size 1072c
296 15:44:32.342513
297 15:44:32.343093
298 15:44:32.352424 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
299 15:44:32.366561 Probing TPM: . done!
300 15:44:32.369923 TPM ready after 0 ms
301 15:44:32.373058 Connected to device vid:did:rid of 1ae0:0028:00
302 15:44:32.383395 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
303 15:44:32.387014 Initialized TPM device CR50 revision 0
304 15:44:32.433941 tlcl_send_startup: Startup return code is 0
305 15:44:32.434334 TPM: setup succeeded
306 15:44:32.448007 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
307 15:44:32.452238 Chrome EC: UHEPI supported
308 15:44:32.455097 Phase 1
309 15:44:32.458099 FMAP: area GBB found @ c05000 (12288 bytes)
310 15:44:32.464524 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
311 15:44:32.468061 Phase 2
312 15:44:32.468630 Phase 3
313 15:44:32.471175 FMAP: area GBB found @ c05000 (12288 bytes)
314 15:44:32.477696 VB2:vb2_report_dev_firmware() This is developer signed firmware
315 15:44:32.484369 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
316 15:44:32.487685 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
317 15:44:32.494525 VB2:vb2_verify_keyblock() Checking keyblock signature...
318 15:44:32.510287 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
319 15:44:32.513769 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
320 15:44:32.520254 VB2:vb2_verify_fw_preamble() Verifying preamble.
321 15:44:32.524170 Phase 4
322 15:44:32.527409 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
323 15:44:32.537449 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
324 15:44:32.713736 VB2:vb2_rsa_verify_digest() Digest check failed!
325 15:44:32.720277 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
326 15:44:32.720881 Saving nvdata
327 15:44:32.724173 Reboot requested (10020007)
328 15:44:32.727101 board_reset() called!
329 15:44:32.727629 full_reset() called!
330 15:44:37.233608
331 15:44:37.234185
332 15:44:37.243324 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
333 15:44:37.246564 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
334 15:44:37.253338 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
335 15:44:37.256369 CPU: AES supported, TXT NOT supported, VT supported
336 15:44:37.263106 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
337 15:44:37.266542 PCH: device id 0284 (rev 00) is Cometlake-U Premium
338 15:44:37.273259 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
339 15:44:37.276559 VBOOT: Loading verstage.
340 15:44:37.280107 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
341 15:44:37.286551 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
342 15:44:37.292705 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
343 15:44:37.293160 CBFS @ c08000 size 3f8000
344 15:44:37.299611 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
345 15:44:37.302749 CBFS: Locating 'fallback/verstage'
346 15:44:37.305848 CBFS: Found @ offset 10fb80 size 1072c
347 15:44:37.310392
348 15:44:37.311018
349 15:44:37.320528 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
350 15:44:37.334654 Probing TPM: . done!
351 15:44:37.337886 TPM ready after 0 ms
352 15:44:37.341297 Connected to device vid:did:rid of 1ae0:0028:00
353 15:44:37.351567 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
354 15:44:37.355191 Initialized TPM device CR50 revision 0
355 15:44:37.401992 tlcl_send_startup: Startup return code is 0
356 15:44:37.402594 TPM: setup succeeded
357 15:44:37.414816 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
358 15:44:37.418300 Chrome EC: UHEPI supported
359 15:44:37.421885 Phase 1
360 15:44:37.425455 FMAP: area GBB found @ c05000 (12288 bytes)
361 15:44:37.431725 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
362 15:44:37.439053 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
363 15:44:37.441918 Recovery requested (1009000e)
364 15:44:37.447922 Saving nvdata
365 15:44:37.453979 tlcl_extend: response is 0
366 15:44:37.462592 tlcl_extend: response is 0
367 15:44:37.469168 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 15:44:37.472522 CBFS @ c08000 size 3f8000
369 15:44:37.479653 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 15:44:37.482576 CBFS: Locating 'fallback/romstage'
371 15:44:37.486314 CBFS: Found @ offset 80 size 145fc
372 15:44:37.488890 Accumulated console time in verstage 98 ms
373 15:44:37.489443
374 15:44:37.489827
375 15:44:37.502236 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
376 15:44:37.508976 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
377 15:44:37.512183 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
378 15:44:37.515499 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
379 15:44:37.522018 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
380 15:44:37.525274 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
381 15:44:37.528969 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
382 15:44:37.532213 TCO_STS: 0000 0000
383 15:44:37.535788 GEN_PMCON: e0015238 00000200
384 15:44:37.538774 GBLRST_CAUSE: 00000000 00000000
385 15:44:37.539360 prev_sleep_state 5
386 15:44:37.542182 Boot Count incremented to 20682
387 15:44:37.548900 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
388 15:44:37.552099 CBFS @ c08000 size 3f8000
389 15:44:37.558853 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
390 15:44:37.559421 CBFS: Locating 'fspm.bin'
391 15:44:37.565716 CBFS: Found @ offset 5ffc0 size 71000
392 15:44:37.568965 Chrome EC: UHEPI supported
393 15:44:37.575117 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
394 15:44:37.579339 Probing TPM: done!
395 15:44:37.585513 Connected to device vid:did:rid of 1ae0:0028:00
396 15:44:37.596177 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
397 15:44:37.602605 Initialized TPM device CR50 revision 0
398 15:44:37.611870 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
399 15:44:37.618314 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
400 15:44:37.621753 MRC cache found, size 1948
401 15:44:37.624628 bootmode is set to: 2
402 15:44:37.628374 PRMRR disabled by config.
403 15:44:37.631644 SPD INDEX = 1
404 15:44:37.635019 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
405 15:44:37.638069 CBFS @ c08000 size 3f8000
406 15:44:37.644840 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
407 15:44:37.645464 CBFS: Locating 'spd.bin'
408 15:44:37.647982 CBFS: Found @ offset 5fb80 size 400
409 15:44:37.650994 SPD: module type is LPDDR3
410 15:44:37.654671 SPD: module part is
411 15:44:37.661540 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
412 15:44:37.664797 SPD: device width 4 bits, bus width 8 bits
413 15:44:37.668004 SPD: module size is 4096 MB (per channel)
414 15:44:37.671104 memory slot: 0 configuration done.
415 15:44:37.674195 memory slot: 2 configuration done.
416 15:44:37.725953 CBMEM:
417 15:44:37.729139 IMD: root @ 99fff000 254 entries.
418 15:44:37.732735 IMD: root @ 99ffec00 62 entries.
419 15:44:37.735772 External stage cache:
420 15:44:37.739150 IMD: root @ 9abff000 254 entries.
421 15:44:37.742601 IMD: root @ 9abfec00 62 entries.
422 15:44:37.745981 Chrome EC: clear events_b mask to 0x0000000020004000
423 15:44:37.763351 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 15:44:37.777859 tlcl_write: response is 0
425 15:44:37.787586 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
426 15:44:37.794368 MRC: TPM MRC hash updated successfully.
427 15:44:37.794941 2 DIMMs found
428 15:44:37.797534 SMM Memory Map
429 15:44:37.800825 SMRAM : 0x9a000000 0x1000000
430 15:44:37.804167 Subregion 0: 0x9a000000 0xa00000
431 15:44:37.807280 Subregion 1: 0x9aa00000 0x200000
432 15:44:37.810414 Subregion 2: 0x9ac00000 0x400000
433 15:44:37.814009 top_of_ram = 0x9a000000
434 15:44:37.817531 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
435 15:44:37.823578 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
436 15:44:37.827103 MTRR Range: Start=ff000000 End=0 (Size 1000000)
437 15:44:37.833989 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
438 15:44:37.837239 CBFS @ c08000 size 3f8000
439 15:44:37.840273 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
440 15:44:37.843742 CBFS: Locating 'fallback/postcar'
441 15:44:37.850314 CBFS: Found @ offset 107000 size 4b44
442 15:44:37.853536 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
443 15:44:37.865959 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
444 15:44:37.869376 Processing 180 relocs. Offset value of 0x97c0c000
445 15:44:37.877725 Accumulated console time in romstage 286 ms
446 15:44:37.878299
447 15:44:37.878804
448 15:44:37.888022 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
449 15:44:37.894750 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
450 15:44:37.897618 CBFS @ c08000 size 3f8000
451 15:44:37.901159 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
452 15:44:37.907879 CBFS: Locating 'fallback/ramstage'
453 15:44:37.910993 CBFS: Found @ offset 43380 size 1b9e8
454 15:44:37.917838 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
455 15:44:37.949768 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
456 15:44:37.952927 Processing 3976 relocs. Offset value of 0x98db0000
457 15:44:37.959287 Accumulated console time in postcar 52 ms
458 15:44:37.959766
459 15:44:37.960165
460 15:44:37.969406 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
461 15:44:37.976392 FMAP: area RO_VPD found @ c00000 (16384 bytes)
462 15:44:37.979450 WARNING: RO_VPD is uninitialized or empty.
463 15:44:37.982875 FMAP: area RW_VPD found @ af8000 (8192 bytes)
464 15:44:37.989445 WARNING: RW_VPD is uninitialized or empty.
465 15:44:37.990093 Normal boot.
466 15:44:37.996572 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
467 15:44:37.999161 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 15:44:38.002670 CBFS @ c08000 size 3f8000
469 15:44:38.009321 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 15:44:38.012629 CBFS: Locating 'cpu_microcode_blob.bin'
471 15:44:38.016150 CBFS: Found @ offset 14700 size 2ec00
472 15:44:38.018976 microcode: sig=0x806ec pf=0x4 revision=0xc9
473 15:44:38.022285 Skip microcode update
474 15:44:38.025718 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
475 15:44:38.029508 CBFS @ c08000 size 3f8000
476 15:44:38.035557 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
477 15:44:38.038888 CBFS: Locating 'fsps.bin'
478 15:44:38.042311 CBFS: Found @ offset d1fc0 size 35000
479 15:44:38.067577 Detected 4 core, 8 thread CPU.
480 15:44:38.070885 Setting up SMI for CPU
481 15:44:38.073938 IED base = 0x9ac00000
482 15:44:38.074625 IED size = 0x00400000
483 15:44:38.077329 Will perform SMM setup.
484 15:44:38.083822 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
485 15:44:38.090369 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
486 15:44:38.094051 Processing 16 relocs. Offset value of 0x00030000
487 15:44:38.097838 Attempting to start 7 APs
488 15:44:38.101249 Waiting for 10ms after sending INIT.
489 15:44:38.117236 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
490 15:44:38.117824 done.
491 15:44:38.120564 AP: slot 1 apic_id 2.
492 15:44:38.123578 AP: slot 6 apic_id 3.
493 15:44:38.124057 AP: slot 7 apic_id 4.
494 15:44:38.127617 AP: slot 5 apic_id 5.
495 15:44:38.130189 Waiting for 2nd SIPI to complete...done.
496 15:44:38.133950 AP: slot 4 apic_id 7.
497 15:44:38.136981 AP: slot 3 apic_id 6.
498 15:44:38.143897 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
499 15:44:38.147005 Processing 13 relocs. Offset value of 0x00038000
500 15:44:38.153538 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
501 15:44:38.160297 Installing SMM handler to 0x9a000000
502 15:44:38.167010 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
503 15:44:38.170247 Processing 658 relocs. Offset value of 0x9a010000
504 15:44:38.180398 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
505 15:44:38.184093 Processing 13 relocs. Offset value of 0x9a008000
506 15:44:38.190007 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
507 15:44:38.197191 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
508 15:44:38.199879 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
509 15:44:38.206531 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
510 15:44:38.213669 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
511 15:44:38.220249 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
512 15:44:38.222942 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
513 15:44:38.230179 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
514 15:44:38.233719 Clearing SMI status registers
515 15:44:38.236679 SMI_STS: PM1
516 15:44:38.237184 PM1_STS: PWRBTN
517 15:44:38.239710 TCO_STS: SECOND_TO
518 15:44:38.242936 New SMBASE 0x9a000000
519 15:44:38.246906 In relocation handler: CPU 0
520 15:44:38.249541 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
521 15:44:38.253279 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 15:44:38.256409 Relocation complete.
523 15:44:38.259581 New SMBASE 0x99fff800
524 15:44:38.260063 In relocation handler: CPU 2
525 15:44:38.266588 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
526 15:44:38.269743 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 15:44:38.273170 Relocation complete.
528 15:44:38.276660 New SMBASE 0x99fffc00
529 15:44:38.277264 In relocation handler: CPU 1
530 15:44:38.283163 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
531 15:44:38.286439 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 15:44:38.289457 Relocation complete.
533 15:44:38.290031 New SMBASE 0x99ffe800
534 15:44:38.292744 In relocation handler: CPU 6
535 15:44:38.299481 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
536 15:44:38.303130 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 15:44:38.305950 Relocation complete.
538 15:44:38.306428 New SMBASE 0x99fff400
539 15:44:38.309355 In relocation handler: CPU 3
540 15:44:38.316176 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
541 15:44:38.319474 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 15:44:38.322700 Relocation complete.
543 15:44:38.323326 New SMBASE 0x99fff000
544 15:44:38.325919 In relocation handler: CPU 4
545 15:44:38.329377 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
546 15:44:38.336163 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 15:44:38.339095 Relocation complete.
548 15:44:38.339676 New SMBASE 0x99ffec00
549 15:44:38.342565 In relocation handler: CPU 5
550 15:44:38.346586 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
551 15:44:38.352253 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 15:44:38.355458 Relocation complete.
553 15:44:38.355935 New SMBASE 0x99ffe400
554 15:44:38.358924 In relocation handler: CPU 7
555 15:44:38.362584 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
556 15:44:38.369356 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 15:44:38.369933 Relocation complete.
558 15:44:38.372377 Initializing CPU #0
559 15:44:38.375807 CPU: vendor Intel device 806ec
560 15:44:38.379204 CPU: family 06, model 8e, stepping 0c
561 15:44:38.382488 Clearing out pending MCEs
562 15:44:38.385870 Setting up local APIC...
563 15:44:38.386346 apic_id: 0x00 done.
564 15:44:38.389165 Turbo is available but hidden
565 15:44:38.392242 Turbo is available and visible
566 15:44:38.395690 VMX status: enabled
567 15:44:38.398984 IA32_FEATURE_CONTROL status: locked
568 15:44:38.402248 Skip microcode update
569 15:44:38.402787 CPU #0 initialized
570 15:44:38.405532 Initializing CPU #2
571 15:44:38.408721 Initializing CPU #3
572 15:44:38.409180 Initializing CPU #4
573 15:44:38.412258 CPU: vendor Intel device 806ec
574 15:44:38.415280 CPU: family 06, model 8e, stepping 0c
575 15:44:38.418765 CPU: vendor Intel device 806ec
576 15:44:38.422125 CPU: family 06, model 8e, stepping 0c
577 15:44:38.425582 Clearing out pending MCEs
578 15:44:38.428989 Clearing out pending MCEs
579 15:44:38.432048 Setting up local APIC...
580 15:44:38.432523 Initializing CPU #1
581 15:44:38.435522 Initializing CPU #6
582 15:44:38.438951 CPU: vendor Intel device 806ec
583 15:44:38.442159 CPU: family 06, model 8e, stepping 0c
584 15:44:38.445483 CPU: vendor Intel device 806ec
585 15:44:38.448349 CPU: family 06, model 8e, stepping 0c
586 15:44:38.452210 Clearing out pending MCEs
587 15:44:38.455309 Clearing out pending MCEs
588 15:44:38.455782 Setting up local APIC...
589 15:44:38.458227 Initializing CPU #7
590 15:44:38.461682 Initializing CPU #5
591 15:44:38.464979 CPU: vendor Intel device 806ec
592 15:44:38.468522 CPU: family 06, model 8e, stepping 0c
593 15:44:38.471937 CPU: vendor Intel device 806ec
594 15:44:38.475101 CPU: family 06, model 8e, stepping 0c
595 15:44:38.478581 Clearing out pending MCEs
596 15:44:38.479153 Setting up local APIC...
597 15:44:38.482039 Clearing out pending MCEs
598 15:44:38.485333 apic_id: 0x03 done.
599 15:44:38.488680 apic_id: 0x02 done.
600 15:44:38.489287 VMX status: enabled
601 15:44:38.491929 VMX status: enabled
602 15:44:38.494997 IA32_FEATURE_CONTROL status: locked
603 15:44:38.498356 IA32_FEATURE_CONTROL status: locked
604 15:44:38.501989 Skip microcode update
605 15:44:38.502472 Skip microcode update
606 15:44:38.505608 CPU #6 initialized
607 15:44:38.506188 CPU #1 initialized
608 15:44:38.508628 apic_id: 0x06 done.
609 15:44:38.512093 Setting up local APIC...
610 15:44:38.515034 CPU: vendor Intel device 806ec
611 15:44:38.518155 CPU: family 06, model 8e, stepping 0c
612 15:44:38.522084 Clearing out pending MCEs
613 15:44:38.522667 Setting up local APIC...
614 15:44:38.524903 VMX status: enabled
615 15:44:38.528145 apic_id: 0x07 done.
616 15:44:38.531649 IA32_FEATURE_CONTROL status: locked
617 15:44:38.532232 VMX status: enabled
618 15:44:38.534800 Skip microcode update
619 15:44:38.538143 IA32_FEATURE_CONTROL status: locked
620 15:44:38.541359 apic_id: 0x05 done.
621 15:44:38.544901 Setting up local APIC...
622 15:44:38.545428 Skip microcode update
623 15:44:38.548267 CPU #3 initialized
624 15:44:38.548746 CPU #4 initialized
625 15:44:38.551541 Setting up local APIC...
626 15:44:38.554772 VMX status: enabled
627 15:44:38.557875 apic_id: 0x04 done.
628 15:44:38.561637 IA32_FEATURE_CONTROL status: locked
629 15:44:38.562120 VMX status: enabled
630 15:44:38.564353 Skip microcode update
631 15:44:38.567828 IA32_FEATURE_CONTROL status: locked
632 15:44:38.571096 CPU #5 initialized
633 15:44:38.571535 Skip microcode update
634 15:44:38.574628 apic_id: 0x01 done.
635 15:44:38.575067 CPU #7 initialized
636 15:44:38.577745 VMX status: enabled
637 15:44:38.580836 IA32_FEATURE_CONTROL status: locked
638 15:44:38.584380 Skip microcode update
639 15:44:38.588160 CPU #2 initialized
640 15:44:38.591618 bsp_do_flight_plan done after 457 msecs.
641 15:44:38.593975 CPU: frequency set to 4200 MHz
642 15:44:38.594418 Enabling SMIs.
643 15:44:38.597746 Locking SMM.
644 15:44:38.611161 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
645 15:44:38.614776 CBFS @ c08000 size 3f8000
646 15:44:38.621730 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
647 15:44:38.622277 CBFS: Locating 'vbt.bin'
648 15:44:38.624460 CBFS: Found @ offset 5f5c0 size 499
649 15:44:38.631821 Found a VBT of 4608 bytes after decompression
650 15:44:38.814965 Display FSP Version Info HOB
651 15:44:38.818042 Reference Code - CPU = 9.0.1e.30
652 15:44:38.821869 uCode Version = 0.0.0.ca
653 15:44:38.825238 TXT ACM version = ff.ff.ff.ffff
654 15:44:38.828446 Display FSP Version Info HOB
655 15:44:38.831587 Reference Code - ME = 9.0.1e.30
656 15:44:38.835080 MEBx version = 0.0.0.0
657 15:44:38.837659 ME Firmware Version = Consumer SKU
658 15:44:38.841278 Display FSP Version Info HOB
659 15:44:38.844409 Reference Code - CML PCH = 9.0.1e.30
660 15:44:38.848110 PCH-CRID Status = Disabled
661 15:44:38.850931 PCH-CRID Original Value = ff.ff.ff.ffff
662 15:44:38.854115 PCH-CRID New Value = ff.ff.ff.ffff
663 15:44:38.857920 OPROM - RST - RAID = ff.ff.ff.ffff
664 15:44:38.861233 ChipsetInit Base Version = ff.ff.ff.ffff
665 15:44:38.864735 ChipsetInit Oem Version = ff.ff.ff.ffff
666 15:44:38.868048 Display FSP Version Info HOB
667 15:44:38.874555 Reference Code - SA - System Agent = 9.0.1e.30
668 15:44:38.877575 Reference Code - MRC = 0.7.1.6c
669 15:44:38.878056 SA - PCIe Version = 9.0.1e.30
670 15:44:38.880968 SA-CRID Status = Disabled
671 15:44:38.884470 SA-CRID Original Value = 0.0.0.c
672 15:44:38.888014 SA-CRID New Value = 0.0.0.c
673 15:44:38.890894 OPROM - VBIOS = ff.ff.ff.ffff
674 15:44:38.894349 RTC Init
675 15:44:38.897330 Set power on after power failure.
676 15:44:38.897830 Disabling Deep S3
677 15:44:38.901336 Disabling Deep S3
678 15:44:38.901923 Disabling Deep S4
679 15:44:38.904176 Disabling Deep S4
680 15:44:38.907574 Disabling Deep S5
681 15:44:38.908147 Disabling Deep S5
682 15:44:38.914244 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
683 15:44:38.914821 Enumerating buses...
684 15:44:38.920685 Show all devs... Before device enumeration.
685 15:44:38.924318 Root Device: enabled 1
686 15:44:38.924902 CPU_CLUSTER: 0: enabled 1
687 15:44:38.927787 DOMAIN: 0000: enabled 1
688 15:44:38.930975 APIC: 00: enabled 1
689 15:44:38.931607 PCI: 00:00.0: enabled 1
690 15:44:38.933691 PCI: 00:02.0: enabled 1
691 15:44:38.937854 PCI: 00:04.0: enabled 0
692 15:44:38.940395 PCI: 00:05.0: enabled 0
693 15:44:38.940971 PCI: 00:12.0: enabled 1
694 15:44:38.943870 PCI: 00:12.5: enabled 0
695 15:44:38.947957 PCI: 00:12.6: enabled 0
696 15:44:38.950344 PCI: 00:14.0: enabled 1
697 15:44:38.950846 PCI: 00:14.1: enabled 0
698 15:44:38.953697 PCI: 00:14.3: enabled 1
699 15:44:38.956872 PCI: 00:14.5: enabled 0
700 15:44:38.957386 PCI: 00:15.0: enabled 1
701 15:44:38.960236 PCI: 00:15.1: enabled 1
702 15:44:38.964427 PCI: 00:15.2: enabled 0
703 15:44:38.967214 PCI: 00:15.3: enabled 0
704 15:44:38.967687 PCI: 00:16.0: enabled 1
705 15:44:38.970978 PCI: 00:16.1: enabled 0
706 15:44:38.973636 PCI: 00:16.2: enabled 0
707 15:44:38.977241 PCI: 00:16.3: enabled 0
708 15:44:38.977899 PCI: 00:16.4: enabled 0
709 15:44:38.980104 PCI: 00:16.5: enabled 0
710 15:44:38.983801 PCI: 00:17.0: enabled 1
711 15:44:38.987143 PCI: 00:19.0: enabled 1
712 15:44:38.987720 PCI: 00:19.1: enabled 0
713 15:44:38.990316 PCI: 00:19.2: enabled 0
714 15:44:38.993631 PCI: 00:1a.0: enabled 0
715 15:44:38.994202 PCI: 00:1c.0: enabled 0
716 15:44:38.996817 PCI: 00:1c.1: enabled 0
717 15:44:38.999980 PCI: 00:1c.2: enabled 0
718 15:44:39.003272 PCI: 00:1c.3: enabled 0
719 15:44:39.003749 PCI: 00:1c.4: enabled 0
720 15:44:39.007021 PCI: 00:1c.5: enabled 0
721 15:44:39.010161 PCI: 00:1c.6: enabled 0
722 15:44:39.013551 PCI: 00:1c.7: enabled 0
723 15:44:39.014132 PCI: 00:1d.0: enabled 1
724 15:44:39.017142 PCI: 00:1d.1: enabled 0
725 15:44:39.020030 PCI: 00:1d.2: enabled 0
726 15:44:39.023567 PCI: 00:1d.3: enabled 0
727 15:44:39.024047 PCI: 00:1d.4: enabled 0
728 15:44:39.026613 PCI: 00:1d.5: enabled 1
729 15:44:39.030373 PCI: 00:1e.0: enabled 1
730 15:44:39.030906 PCI: 00:1e.1: enabled 0
731 15:44:39.033787 PCI: 00:1e.2: enabled 1
732 15:44:39.036569 PCI: 00:1e.3: enabled 1
733 15:44:39.040602 PCI: 00:1f.0: enabled 1
734 15:44:39.041219 PCI: 00:1f.1: enabled 1
735 15:44:39.043079 PCI: 00:1f.2: enabled 1
736 15:44:39.046686 PCI: 00:1f.3: enabled 1
737 15:44:39.050063 PCI: 00:1f.4: enabled 1
738 15:44:39.050704 PCI: 00:1f.5: enabled 1
739 15:44:39.053019 PCI: 00:1f.6: enabled 0
740 15:44:39.056703 USB0 port 0: enabled 1
741 15:44:39.057214 I2C: 00:15: enabled 1
742 15:44:39.059901 I2C: 00:5d: enabled 1
743 15:44:39.063213 GENERIC: 0.0: enabled 1
744 15:44:39.066715 I2C: 00:1a: enabled 1
745 15:44:39.067261 I2C: 00:38: enabled 1
746 15:44:39.069786 I2C: 00:39: enabled 1
747 15:44:39.073144 I2C: 00:3a: enabled 1
748 15:44:39.073578 I2C: 00:3b: enabled 1
749 15:44:39.076121 PCI: 00:00.0: enabled 1
750 15:44:39.079618 SPI: 00: enabled 1
751 15:44:39.080051 SPI: 01: enabled 1
752 15:44:39.083013 PNP: 0c09.0: enabled 1
753 15:44:39.086613 USB2 port 0: enabled 1
754 15:44:39.087194 USB2 port 1: enabled 1
755 15:44:39.089810 USB2 port 2: enabled 0
756 15:44:39.093345 USB2 port 3: enabled 0
757 15:44:39.093942 USB2 port 5: enabled 0
758 15:44:39.096316 USB2 port 6: enabled 1
759 15:44:39.100028 USB2 port 9: enabled 1
760 15:44:39.100541 USB3 port 0: enabled 1
761 15:44:39.103149 USB3 port 1: enabled 1
762 15:44:39.106306 USB3 port 2: enabled 1
763 15:44:39.109712 USB3 port 3: enabled 1
764 15:44:39.110281 USB3 port 4: enabled 0
765 15:44:39.112688 APIC: 02: enabled 1
766 15:44:39.116053 APIC: 01: enabled 1
767 15:44:39.116488 APIC: 06: enabled 1
768 15:44:39.119845 APIC: 07: enabled 1
769 15:44:39.120281 APIC: 05: enabled 1
770 15:44:39.123490 APIC: 03: enabled 1
771 15:44:39.126471 APIC: 04: enabled 1
772 15:44:39.127017 Compare with tree...
773 15:44:39.129961 Root Device: enabled 1
774 15:44:39.132711 CPU_CLUSTER: 0: enabled 1
775 15:44:39.133288 APIC: 00: enabled 1
776 15:44:39.136411 APIC: 02: enabled 1
777 15:44:39.139885 APIC: 01: enabled 1
778 15:44:39.140444 APIC: 06: enabled 1
779 15:44:39.142943 APIC: 07: enabled 1
780 15:44:39.146134 APIC: 05: enabled 1
781 15:44:39.149683 APIC: 03: enabled 1
782 15:44:39.150224 APIC: 04: enabled 1
783 15:44:39.152676 DOMAIN: 0000: enabled 1
784 15:44:39.155945 PCI: 00:00.0: enabled 1
785 15:44:39.159030 PCI: 00:02.0: enabled 1
786 15:44:39.159469 PCI: 00:04.0: enabled 0
787 15:44:39.163134 PCI: 00:05.0: enabled 0
788 15:44:39.165607 PCI: 00:12.0: enabled 1
789 15:44:39.169538 PCI: 00:12.5: enabled 0
790 15:44:39.172697 PCI: 00:12.6: enabled 0
791 15:44:39.173331 PCI: 00:14.0: enabled 1
792 15:44:39.176343 USB0 port 0: enabled 1
793 15:44:39.179172 USB2 port 0: enabled 1
794 15:44:39.182784 USB2 port 1: enabled 1
795 15:44:39.185882 USB2 port 2: enabled 0
796 15:44:39.186369 USB2 port 3: enabled 0
797 15:44:39.189646 USB2 port 5: enabled 0
798 15:44:39.192531 USB2 port 6: enabled 1
799 15:44:39.195622 USB2 port 9: enabled 1
800 15:44:39.199232 USB3 port 0: enabled 1
801 15:44:39.199742 USB3 port 1: enabled 1
802 15:44:39.202336 USB3 port 2: enabled 1
803 15:44:39.206190 USB3 port 3: enabled 1
804 15:44:39.209314 USB3 port 4: enabled 0
805 15:44:39.212181 PCI: 00:14.1: enabled 0
806 15:44:39.215663 PCI: 00:14.3: enabled 1
807 15:44:39.216240 PCI: 00:14.5: enabled 0
808 15:44:39.218916 PCI: 00:15.0: enabled 1
809 15:44:39.222566 I2C: 00:15: enabled 1
810 15:44:39.225855 PCI: 00:15.1: enabled 1
811 15:44:39.226430 I2C: 00:5d: enabled 1
812 15:44:39.228752 GENERIC: 0.0: enabled 1
813 15:44:39.232182 PCI: 00:15.2: enabled 0
814 15:44:39.235561 PCI: 00:15.3: enabled 0
815 15:44:39.239219 PCI: 00:16.0: enabled 1
816 15:44:39.239799 PCI: 00:16.1: enabled 0
817 15:44:39.241872 PCI: 00:16.2: enabled 0
818 15:44:39.245707 PCI: 00:16.3: enabled 0
819 15:44:39.248785 PCI: 00:16.4: enabled 0
820 15:44:39.251784 PCI: 00:16.5: enabled 0
821 15:44:39.252266 PCI: 00:17.0: enabled 1
822 15:44:39.255736 PCI: 00:19.0: enabled 1
823 15:44:39.258947 I2C: 00:1a: enabled 1
824 15:44:39.261733 I2C: 00:38: enabled 1
825 15:44:39.262213 I2C: 00:39: enabled 1
826 15:44:39.265535 I2C: 00:3a: enabled 1
827 15:44:39.268781 I2C: 00:3b: enabled 1
828 15:44:39.271987 PCI: 00:19.1: enabled 0
829 15:44:39.275395 PCI: 00:19.2: enabled 0
830 15:44:39.275973 PCI: 00:1a.0: enabled 0
831 15:44:39.278595 PCI: 00:1c.0: enabled 0
832 15:44:39.281733 PCI: 00:1c.1: enabled 0
833 15:44:39.285616 PCI: 00:1c.2: enabled 0
834 15:44:39.288965 PCI: 00:1c.3: enabled 0
835 15:44:39.289591 PCI: 00:1c.4: enabled 0
836 15:44:39.291998 PCI: 00:1c.5: enabled 0
837 15:44:39.295138 PCI: 00:1c.6: enabled 0
838 15:44:39.298527 PCI: 00:1c.7: enabled 0
839 15:44:39.301763 PCI: 00:1d.0: enabled 1
840 15:44:39.302252 PCI: 00:1d.1: enabled 0
841 15:44:39.305209 PCI: 00:1d.2: enabled 0
842 15:44:39.308811 PCI: 00:1d.3: enabled 0
843 15:44:39.311719 PCI: 00:1d.4: enabled 0
844 15:44:39.312261 PCI: 00:1d.5: enabled 1
845 15:44:39.315251 PCI: 00:00.0: enabled 1
846 15:44:39.318257 PCI: 00:1e.0: enabled 1
847 15:44:39.321629 PCI: 00:1e.1: enabled 0
848 15:44:39.325302 PCI: 00:1e.2: enabled 1
849 15:44:39.325828 SPI: 00: enabled 1
850 15:44:39.328374 PCI: 00:1e.3: enabled 1
851 15:44:39.331717 SPI: 01: enabled 1
852 15:44:39.335435 PCI: 00:1f.0: enabled 1
853 15:44:39.335965 PNP: 0c09.0: enabled 1
854 15:44:39.338111 PCI: 00:1f.1: enabled 1
855 15:44:39.341557 PCI: 00:1f.2: enabled 1
856 15:44:39.344957 PCI: 00:1f.3: enabled 1
857 15:44:39.348152 PCI: 00:1f.4: enabled 1
858 15:44:39.348725 PCI: 00:1f.5: enabled 1
859 15:44:39.351439 PCI: 00:1f.6: enabled 0
860 15:44:39.355271 Root Device scanning...
861 15:44:39.357875 scan_static_bus for Root Device
862 15:44:39.361108 CPU_CLUSTER: 0 enabled
863 15:44:39.361705 DOMAIN: 0000 enabled
864 15:44:39.364715 DOMAIN: 0000 scanning...
865 15:44:39.368024 PCI: pci_scan_bus for bus 00
866 15:44:39.371361 PCI: 00:00.0 [8086/0000] ops
867 15:44:39.374407 PCI: 00:00.0 [8086/9b61] enabled
868 15:44:39.377919 PCI: 00:02.0 [8086/0000] bus ops
869 15:44:39.381476 PCI: 00:02.0 [8086/9b41] enabled
870 15:44:39.384962 PCI: 00:04.0 [8086/1903] disabled
871 15:44:39.387852 PCI: 00:08.0 [8086/1911] enabled
872 15:44:39.391202 PCI: 00:12.0 [8086/02f9] enabled
873 15:44:39.394688 PCI: 00:14.0 [8086/0000] bus ops
874 15:44:39.397976 PCI: 00:14.0 [8086/02ed] enabled
875 15:44:39.401351 PCI: 00:14.2 [8086/02ef] enabled
876 15:44:39.404286 PCI: 00:14.3 [8086/02f0] enabled
877 15:44:39.408299 PCI: 00:15.0 [8086/0000] bus ops
878 15:44:39.411241 PCI: 00:15.0 [8086/02e8] enabled
879 15:44:39.414346 PCI: 00:15.1 [8086/0000] bus ops
880 15:44:39.417916 PCI: 00:15.1 [8086/02e9] enabled
881 15:44:39.421120 PCI: 00:16.0 [8086/0000] ops
882 15:44:39.424274 PCI: 00:16.0 [8086/02e0] enabled
883 15:44:39.427461 PCI: 00:17.0 [8086/0000] ops
884 15:44:39.431139 PCI: 00:17.0 [8086/02d3] enabled
885 15:44:39.434509 PCI: 00:19.0 [8086/0000] bus ops
886 15:44:39.438280 PCI: 00:19.0 [8086/02c5] enabled
887 15:44:39.441741 PCI: 00:1d.0 [8086/0000] bus ops
888 15:44:39.444598 PCI: 00:1d.0 [8086/02b0] enabled
889 15:44:39.447980 PCI: Static device PCI: 00:1d.5 not found, disabling it.
890 15:44:39.451466 PCI: 00:1e.0 [8086/0000] ops
891 15:44:39.454750 PCI: 00:1e.0 [8086/02a8] enabled
892 15:44:39.457870 PCI: 00:1e.2 [8086/0000] bus ops
893 15:44:39.460868 PCI: 00:1e.2 [8086/02aa] enabled
894 15:44:39.464396 PCI: 00:1e.3 [8086/0000] bus ops
895 15:44:39.467474 PCI: 00:1e.3 [8086/02ab] enabled
896 15:44:39.471383 PCI: 00:1f.0 [8086/0000] bus ops
897 15:44:39.474229 PCI: 00:1f.0 [8086/0284] enabled
898 15:44:39.480997 PCI: Static device PCI: 00:1f.1 not found, disabling it.
899 15:44:39.487543 PCI: Static device PCI: 00:1f.2 not found, disabling it.
900 15:44:39.491101 PCI: 00:1f.3 [8086/0000] bus ops
901 15:44:39.494208 PCI: 00:1f.3 [8086/02c8] enabled
902 15:44:39.497613 PCI: 00:1f.4 [8086/0000] bus ops
903 15:44:39.500714 PCI: 00:1f.4 [8086/02a3] enabled
904 15:44:39.504195 PCI: 00:1f.5 [8086/0000] bus ops
905 15:44:39.507841 PCI: 00:1f.5 [8086/02a4] enabled
906 15:44:39.511125 PCI: Leftover static devices:
907 15:44:39.511704 PCI: 00:05.0
908 15:44:39.514135 PCI: 00:12.5
909 15:44:39.514616 PCI: 00:12.6
910 15:44:39.514995 PCI: 00:14.1
911 15:44:39.517444 PCI: 00:14.5
912 15:44:39.517987 PCI: 00:15.2
913 15:44:39.520875 PCI: 00:15.3
914 15:44:39.521473 PCI: 00:16.1
915 15:44:39.521859 PCI: 00:16.2
916 15:44:39.524093 PCI: 00:16.3
917 15:44:39.524571 PCI: 00:16.4
918 15:44:39.527437 PCI: 00:16.5
919 15:44:39.528011 PCI: 00:19.1
920 15:44:39.528390 PCI: 00:19.2
921 15:44:39.530441 PCI: 00:1a.0
922 15:44:39.530924 PCI: 00:1c.0
923 15:44:39.533895 PCI: 00:1c.1
924 15:44:39.534388 PCI: 00:1c.2
925 15:44:39.537757 PCI: 00:1c.3
926 15:44:39.538291 PCI: 00:1c.4
927 15:44:39.538636 PCI: 00:1c.5
928 15:44:39.540751 PCI: 00:1c.6
929 15:44:39.541315 PCI: 00:1c.7
930 15:44:39.544206 PCI: 00:1d.1
931 15:44:39.544741 PCI: 00:1d.2
932 15:44:39.545118 PCI: 00:1d.3
933 15:44:39.547453 PCI: 00:1d.4
934 15:44:39.547987 PCI: 00:1d.5
935 15:44:39.550379 PCI: 00:1e.1
936 15:44:39.550812 PCI: 00:1f.1
937 15:44:39.551150 PCI: 00:1f.2
938 15:44:39.553891 PCI: 00:1f.6
939 15:44:39.557550 PCI: Check your devicetree.cb.
940 15:44:39.560531 PCI: 00:02.0 scanning...
941 15:44:39.563679 scan_generic_bus for PCI: 00:02.0
942 15:44:39.567349 scan_generic_bus for PCI: 00:02.0 done
943 15:44:39.573811 scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs
944 15:44:39.574404 PCI: 00:14.0 scanning...
945 15:44:39.577166 scan_static_bus for PCI: 00:14.0
946 15:44:39.580150 USB0 port 0 enabled
947 15:44:39.583615 USB0 port 0 scanning...
948 15:44:39.586886 scan_static_bus for USB0 port 0
949 15:44:39.587365 USB2 port 0 enabled
950 15:44:39.590126 USB2 port 1 enabled
951 15:44:39.593912 USB2 port 2 disabled
952 15:44:39.594491 USB2 port 3 disabled
953 15:44:39.596947 USB2 port 5 disabled
954 15:44:39.600094 USB2 port 6 enabled
955 15:44:39.600570 USB2 port 9 enabled
956 15:44:39.603681 USB3 port 0 enabled
957 15:44:39.604256 USB3 port 1 enabled
958 15:44:39.606898 USB3 port 2 enabled
959 15:44:39.610348 USB3 port 3 enabled
960 15:44:39.610822 USB3 port 4 disabled
961 15:44:39.613487 USB2 port 0 scanning...
962 15:44:39.617044 scan_static_bus for USB2 port 0
963 15:44:39.620641 scan_static_bus for USB2 port 0 done
964 15:44:39.626863 scan_bus: scanning of bus USB2 port 0 took 9705 usecs
965 15:44:39.629900 USB2 port 1 scanning...
966 15:44:39.633545 scan_static_bus for USB2 port 1
967 15:44:39.637020 scan_static_bus for USB2 port 1 done
968 15:44:39.639999 scan_bus: scanning of bus USB2 port 1 took 9695 usecs
969 15:44:39.643662 USB2 port 6 scanning...
970 15:44:39.646980 scan_static_bus for USB2 port 6
971 15:44:39.650030 scan_static_bus for USB2 port 6 done
972 15:44:39.656490 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
973 15:44:39.660277 USB2 port 9 scanning...
974 15:44:39.662670 scan_static_bus for USB2 port 9
975 15:44:39.666381 scan_static_bus for USB2 port 9 done
976 15:44:39.669951 scan_bus: scanning of bus USB2 port 9 took 9704 usecs
977 15:44:39.673312 USB3 port 0 scanning...
978 15:44:39.676518 scan_static_bus for USB3 port 0
979 15:44:39.679720 scan_static_bus for USB3 port 0 done
980 15:44:39.686396 scan_bus: scanning of bus USB3 port 0 took 9694 usecs
981 15:44:39.690169 USB3 port 1 scanning...
982 15:44:39.693148 scan_static_bus for USB3 port 1
983 15:44:39.696275 scan_static_bus for USB3 port 1 done
984 15:44:39.703026 scan_bus: scanning of bus USB3 port 1 took 9704 usecs
985 15:44:39.703508 USB3 port 2 scanning...
986 15:44:39.705931 scan_static_bus for USB3 port 2
987 15:44:39.709380 scan_static_bus for USB3 port 2 done
988 15:44:39.716554 scan_bus: scanning of bus USB3 port 2 took 9696 usecs
989 15:44:39.719215 USB3 port 3 scanning...
990 15:44:39.722928 scan_static_bus for USB3 port 3
991 15:44:39.726404 scan_static_bus for USB3 port 3 done
992 15:44:39.732655 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
993 15:44:39.736200 scan_static_bus for USB0 port 0 done
994 15:44:39.739521 scan_bus: scanning of bus USB0 port 0 took 155329 usecs
995 15:44:39.745948 scan_static_bus for PCI: 00:14.0 done
996 15:44:39.749722 scan_bus: scanning of bus PCI: 00:14.0 took 172948 usecs
997 15:44:39.752458 PCI: 00:15.0 scanning...
998 15:44:39.756176 scan_generic_bus for PCI: 00:15.0
999 15:44:39.759253 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1000 15:44:39.765915 scan_generic_bus for PCI: 00:15.0 done
1001 15:44:39.769178 scan_bus: scanning of bus PCI: 00:15.0 took 14295 usecs
1002 15:44:39.772447 PCI: 00:15.1 scanning...
1003 15:44:39.775920 scan_generic_bus for PCI: 00:15.1
1004 15:44:39.779010 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1005 15:44:39.785801 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1006 15:44:39.789231 scan_generic_bus for PCI: 00:15.1 done
1007 15:44:39.792275 scan_bus: scanning of bus PCI: 00:15.1 took 18592 usecs
1008 15:44:39.795434 PCI: 00:19.0 scanning...
1009 15:44:39.799210 scan_generic_bus for PCI: 00:19.0
1010 15:44:39.806009 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1011 15:44:39.808742 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1012 15:44:39.811940 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1013 15:44:39.815294 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1014 15:44:39.818619 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1015 15:44:39.825575 scan_generic_bus for PCI: 00:19.0 done
1016 15:44:39.828954 scan_bus: scanning of bus PCI: 00:19.0 took 30722 usecs
1017 15:44:39.831946 PCI: 00:1d.0 scanning...
1018 15:44:39.835651 do_pci_scan_bridge for PCI: 00:1d.0
1019 15:44:39.838694 PCI: pci_scan_bus for bus 01
1020 15:44:39.842107 PCI: 01:00.0 [1c5c/1327] enabled
1021 15:44:39.845501 Enabling Common Clock Configuration
1022 15:44:39.852447 L1 Sub-State supported from root port 29
1023 15:44:39.853042 L1 Sub-State Support = 0xf
1024 15:44:39.855650 CommonModeRestoreTime = 0x28
1025 15:44:39.861736 Power On Value = 0x16, Power On Scale = 0x0
1026 15:44:39.862286 ASPM: Enabled L1
1027 15:44:39.868698 scan_bus: scanning of bus PCI: 00:1d.0 took 32773 usecs
1028 15:44:39.871562 PCI: 00:1e.2 scanning...
1029 15:44:39.874889 scan_generic_bus for PCI: 00:1e.2
1030 15:44:39.878767 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1031 15:44:39.881656 scan_generic_bus for PCI: 00:1e.2 done
1032 15:44:39.888606 scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs
1033 15:44:39.889226 PCI: 00:1e.3 scanning...
1034 15:44:39.895453 scan_generic_bus for PCI: 00:1e.3
1035 15:44:39.898443 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1036 15:44:39.902075 scan_generic_bus for PCI: 00:1e.3 done
1037 15:44:39.908175 scan_bus: scanning of bus PCI: 00:1e.3 took 14002 usecs
1038 15:44:39.908617 PCI: 00:1f.0 scanning...
1039 15:44:39.911770 scan_static_bus for PCI: 00:1f.0
1040 15:44:39.914689 PNP: 0c09.0 enabled
1041 15:44:39.918253 scan_static_bus for PCI: 00:1f.0 done
1042 15:44:39.924908 scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
1043 15:44:39.928794 PCI: 00:1f.3 scanning...
1044 15:44:39.931693 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1045 15:44:39.935017 PCI: 00:1f.4 scanning...
1046 15:44:39.938320 scan_generic_bus for PCI: 00:1f.4
1047 15:44:39.941707 scan_generic_bus for PCI: 00:1f.4 done
1048 15:44:39.948148 scan_bus: scanning of bus PCI: 00:1f.4 took 10185 usecs
1049 15:44:39.951815 PCI: 00:1f.5 scanning...
1050 15:44:39.955304 scan_generic_bus for PCI: 00:1f.5
1051 15:44:39.957974 scan_generic_bus for PCI: 00:1f.5 done
1052 15:44:39.964353 scan_bus: scanning of bus PCI: 00:1f.5 took 10193 usecs
1053 15:44:39.971599 scan_bus: scanning of bus DOMAIN: 0000 took 604937 usecs
1054 15:44:39.974779 scan_static_bus for Root Device done
1055 15:44:39.977819 scan_bus: scanning of bus Root Device took 624817 usecs
1056 15:44:39.981597 done
1057 15:44:39.984615 Chrome EC: UHEPI supported
1058 15:44:39.988038 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1059 15:44:39.994361 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1060 15:44:40.000876 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1061 15:44:40.007415 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1062 15:44:40.011094 SPI flash protection: WPSW=0 SRP0=0
1063 15:44:40.017472 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1064 15:44:40.021188 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1065 15:44:40.024914 found VGA at PCI: 00:02.0
1066 15:44:40.027695 Setting up VGA for PCI: 00:02.0
1067 15:44:40.034863 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1068 15:44:40.038080 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1069 15:44:40.041227 Allocating resources...
1070 15:44:40.041799 Reading resources...
1071 15:44:40.047921 Root Device read_resources bus 0 link: 0
1072 15:44:40.051260 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1073 15:44:40.057627 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1074 15:44:40.060673 DOMAIN: 0000 read_resources bus 0 link: 0
1075 15:44:40.068215 PCI: 00:14.0 read_resources bus 0 link: 0
1076 15:44:40.070658 USB0 port 0 read_resources bus 0 link: 0
1077 15:44:40.078878 USB0 port 0 read_resources bus 0 link: 0 done
1078 15:44:40.082493 PCI: 00:14.0 read_resources bus 0 link: 0 done
1079 15:44:40.089349 PCI: 00:15.0 read_resources bus 1 link: 0
1080 15:44:40.092716 PCI: 00:15.0 read_resources bus 1 link: 0 done
1081 15:44:40.099339 PCI: 00:15.1 read_resources bus 2 link: 0
1082 15:44:40.102477 PCI: 00:15.1 read_resources bus 2 link: 0 done
1083 15:44:40.109857 PCI: 00:19.0 read_resources bus 3 link: 0
1084 15:44:40.116996 PCI: 00:19.0 read_resources bus 3 link: 0 done
1085 15:44:40.120028 PCI: 00:1d.0 read_resources bus 1 link: 0
1086 15:44:40.126910 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1087 15:44:40.130061 PCI: 00:1e.2 read_resources bus 4 link: 0
1088 15:44:40.136988 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1089 15:44:40.140421 PCI: 00:1e.3 read_resources bus 5 link: 0
1090 15:44:40.147100 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1091 15:44:40.150232 PCI: 00:1f.0 read_resources bus 0 link: 0
1092 15:44:40.157430 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1093 15:44:40.163364 DOMAIN: 0000 read_resources bus 0 link: 0 done
1094 15:44:40.166891 Root Device read_resources bus 0 link: 0 done
1095 15:44:40.170064 Done reading resources.
1096 15:44:40.173585 Show resources in subtree (Root Device)...After reading.
1097 15:44:40.180306 Root Device child on link 0 CPU_CLUSTER: 0
1098 15:44:40.183629 CPU_CLUSTER: 0 child on link 0 APIC: 00
1099 15:44:40.184207 APIC: 00
1100 15:44:40.186556 APIC: 02
1101 15:44:40.187032 APIC: 01
1102 15:44:40.190115 APIC: 06
1103 15:44:40.190688 APIC: 07
1104 15:44:40.191060 APIC: 05
1105 15:44:40.193585 APIC: 03
1106 15:44:40.194165 APIC: 04
1107 15:44:40.196759 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1108 15:44:40.253218 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1109 15:44:40.254276 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1110 15:44:40.254710 PCI: 00:00.0
1111 15:44:40.255520 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1112 15:44:40.255924 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1113 15:44:40.256277 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1114 15:44:40.302793 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1115 15:44:40.303424 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1116 15:44:40.304292 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1117 15:44:40.304707 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1118 15:44:40.305487 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1119 15:44:40.305886 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1120 15:44:40.353248 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1121 15:44:40.354223 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1122 15:44:40.354668 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1123 15:44:40.355461 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1124 15:44:40.355853 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1125 15:44:40.397233 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1126 15:44:40.398237 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1127 15:44:40.398660 PCI: 00:02.0
1128 15:44:40.399042 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1129 15:44:40.399395 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1130 15:44:40.401282 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1131 15:44:40.401730 PCI: 00:04.0
1132 15:44:40.402199 PCI: 00:08.0
1133 15:44:40.411259 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1134 15:44:40.414719 PCI: 00:12.0
1135 15:44:40.424664 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1136 15:44:40.428285 PCI: 00:14.0 child on link 0 USB0 port 0
1137 15:44:40.437986 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1138 15:44:40.441620 USB0 port 0 child on link 0 USB2 port 0
1139 15:44:40.444385 USB2 port 0
1140 15:44:40.444833 USB2 port 1
1141 15:44:40.447949 USB2 port 2
1142 15:44:40.451429 USB2 port 3
1143 15:44:40.451960 USB2 port 5
1144 15:44:40.454617 USB2 port 6
1145 15:44:40.455050 USB2 port 9
1146 15:44:40.457949 USB3 port 0
1147 15:44:40.458481 USB3 port 1
1148 15:44:40.461160 USB3 port 2
1149 15:44:40.461691 USB3 port 3
1150 15:44:40.464938 USB3 port 4
1151 15:44:40.465406 PCI: 00:14.2
1152 15:44:40.474370 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1153 15:44:40.484473 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1154 15:44:40.487989 PCI: 00:14.3
1155 15:44:40.497582 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1156 15:44:40.500827 PCI: 00:15.0 child on link 0 I2C: 01:15
1157 15:44:40.510627 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 15:44:40.513864 I2C: 01:15
1159 15:44:40.517591 PCI: 00:15.1 child on link 0 I2C: 02:5d
1160 15:44:40.527537 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 15:44:40.528074 I2C: 02:5d
1162 15:44:40.531130 GENERIC: 0.0
1163 15:44:40.531670 PCI: 00:16.0
1164 15:44:40.541129 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 15:44:40.543784 PCI: 00:17.0
1166 15:44:40.553732 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1167 15:44:40.560319 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1168 15:44:40.570431 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1169 15:44:40.577543 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1170 15:44:40.587338 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1171 15:44:40.597102 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1172 15:44:40.600430 PCI: 00:19.0 child on link 0 I2C: 03:1a
1173 15:44:40.610454 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1174 15:44:40.610927 I2C: 03:1a
1175 15:44:40.613212 I2C: 03:38
1176 15:44:40.613777 I2C: 03:39
1177 15:44:40.616788 I2C: 03:3a
1178 15:44:40.617247 I2C: 03:3b
1179 15:44:40.623479 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1180 15:44:40.629715 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1181 15:44:40.639901 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1182 15:44:40.649639 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1183 15:44:40.650183 PCI: 01:00.0
1184 15:44:40.659648 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 15:44:40.663401 PCI: 00:1e.0
1186 15:44:40.672908 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1187 15:44:40.682860 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1188 15:44:40.686064 PCI: 00:1e.2 child on link 0 SPI: 00
1189 15:44:40.695958 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 15:44:40.699708 SPI: 00
1191 15:44:40.702547 PCI: 00:1e.3 child on link 0 SPI: 01
1192 15:44:40.712901 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 15:44:40.713488 SPI: 01
1194 15:44:40.719269 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1195 15:44:40.725946 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1196 15:44:40.735954 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1197 15:44:40.739522 PNP: 0c09.0
1198 15:44:40.745968 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1199 15:44:40.749236 PCI: 00:1f.3
1200 15:44:40.759422 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1201 15:44:40.769283 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1202 15:44:40.769862 PCI: 00:1f.4
1203 15:44:40.779345 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1204 15:44:40.789000 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1205 15:44:40.789631 PCI: 00:1f.5
1206 15:44:40.799058 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1207 15:44:40.805330 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1208 15:44:40.812105 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1209 15:44:40.818768 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1210 15:44:40.821770 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1211 15:44:40.825313 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1212 15:44:40.828561 PCI: 00:17.0 18 * [0x60 - 0x67] io
1213 15:44:40.831873 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1214 15:44:40.838380 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1215 15:44:40.845039 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1216 15:44:40.855530 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1217 15:44:40.861970 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1218 15:44:40.868352 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1219 15:44:40.875278 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1220 15:44:40.881632 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1221 15:44:40.884828 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1222 15:44:40.891450 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1223 15:44:40.894914 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1224 15:44:40.901227 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1225 15:44:40.904890 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1226 15:44:40.911010 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1227 15:44:40.914608 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1228 15:44:40.921349 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1229 15:44:40.924109 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1230 15:44:40.931178 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1231 15:44:40.934459 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1232 15:44:40.941210 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1233 15:44:40.944343 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1234 15:44:40.950932 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1235 15:44:40.954331 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1236 15:44:40.957875 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1237 15:44:40.964349 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1238 15:44:40.967394 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1239 15:44:40.973970 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1240 15:44:40.977539 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1241 15:44:40.984404 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1242 15:44:40.987317 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1243 15:44:40.993972 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1244 15:44:41.000788 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1245 15:44:41.003839 avoid_fixed_resources: DOMAIN: 0000
1246 15:44:41.010117 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1247 15:44:41.017200 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1248 15:44:41.023366 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1249 15:44:41.034462 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1250 15:44:41.039863 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1251 15:44:41.046651 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1252 15:44:41.056524 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1253 15:44:41.063689 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1254 15:44:41.070000 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1255 15:44:41.080209 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1256 15:44:41.086360 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1257 15:44:41.093168 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1258 15:44:41.096327 Setting resources...
1259 15:44:41.099382 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1260 15:44:41.106230 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1261 15:44:41.109339 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1262 15:44:41.112639 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1263 15:44:41.116118 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1264 15:44:41.122525 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1265 15:44:41.128926 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1266 15:44:41.135838 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1267 15:44:41.142688 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1268 15:44:41.149535 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1269 15:44:41.152333 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1270 15:44:41.159424 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1271 15:44:41.162364 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1272 15:44:41.169147 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1273 15:44:41.172329 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1274 15:44:41.179238 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1275 15:44:41.182376 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1276 15:44:41.188946 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1277 15:44:41.192093 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1278 15:44:41.198424 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1279 15:44:41.202233 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1280 15:44:41.208348 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1281 15:44:41.211713 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1282 15:44:41.215090 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1283 15:44:41.221465 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1284 15:44:41.225026 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1285 15:44:41.231970 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1286 15:44:41.235052 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1287 15:44:41.241697 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1288 15:44:41.244956 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1289 15:44:41.251987 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1290 15:44:41.255345 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1291 15:44:41.261538 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1292 15:44:41.271420 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1293 15:44:41.278430 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1294 15:44:41.285157 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1295 15:44:41.291502 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1296 15:44:41.298010 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1297 15:44:41.301279 Root Device assign_resources, bus 0 link: 0
1298 15:44:41.307708 DOMAIN: 0000 assign_resources, bus 0 link: 0
1299 15:44:41.314434 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1300 15:44:41.324406 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1301 15:44:41.331078 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1302 15:44:41.340791 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1303 15:44:41.347481 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1304 15:44:41.357815 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1305 15:44:41.360592 PCI: 00:14.0 assign_resources, bus 0 link: 0
1306 15:44:41.364360 PCI: 00:14.0 assign_resources, bus 0 link: 0
1307 15:44:41.374155 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1308 15:44:41.380876 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1309 15:44:41.390800 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1310 15:44:41.397620 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1311 15:44:41.403795 PCI: 00:15.0 assign_resources, bus 1 link: 0
1312 15:44:41.407247 PCI: 00:15.0 assign_resources, bus 1 link: 0
1313 15:44:41.416942 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1314 15:44:41.420640 PCI: 00:15.1 assign_resources, bus 2 link: 0
1315 15:44:41.423643 PCI: 00:15.1 assign_resources, bus 2 link: 0
1316 15:44:41.433909 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1317 15:44:41.440403 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1318 15:44:41.450053 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1319 15:44:41.456954 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1320 15:44:41.463333 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1321 15:44:41.473095 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1322 15:44:41.480590 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1323 15:44:41.489994 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1324 15:44:41.493202 PCI: 00:19.0 assign_resources, bus 3 link: 0
1325 15:44:41.496662 PCI: 00:19.0 assign_resources, bus 3 link: 0
1326 15:44:41.506308 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1327 15:44:41.516069 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1328 15:44:41.522734 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1329 15:44:41.529412 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1330 15:44:41.536323 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1331 15:44:41.539370 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1332 15:44:41.549472 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1333 15:44:41.556003 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1334 15:44:41.563091 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1335 15:44:41.566353 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1336 15:44:41.576680 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1337 15:44:41.579232 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1338 15:44:41.585570 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1339 15:44:41.589135 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1340 15:44:41.596340 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1341 15:44:41.599239 LPC: Trying to open IO window from 800 size 1ff
1342 15:44:41.605640 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1343 15:44:41.615473 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1344 15:44:41.621962 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1345 15:44:41.632334 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1346 15:44:41.635396 DOMAIN: 0000 assign_resources, bus 0 link: 0
1347 15:44:41.641814 Root Device assign_resources, bus 0 link: 0
1348 15:44:41.642235 Done setting resources.
1349 15:44:41.648851 Show resources in subtree (Root Device)...After assigning values.
1350 15:44:41.655078 Root Device child on link 0 CPU_CLUSTER: 0
1351 15:44:41.658676 CPU_CLUSTER: 0 child on link 0 APIC: 00
1352 15:44:41.659224 APIC: 00
1353 15:44:41.661880 APIC: 02
1354 15:44:41.662403 APIC: 01
1355 15:44:41.665106 APIC: 06
1356 15:44:41.665527 APIC: 07
1357 15:44:41.665857 APIC: 05
1358 15:44:41.668834 APIC: 03
1359 15:44:41.669407 APIC: 04
1360 15:44:41.672048 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1361 15:44:41.682063 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1362 15:44:41.695388 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1363 15:44:41.695965 PCI: 00:00.0
1364 15:44:41.705102 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1365 15:44:41.714599 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1366 15:44:41.724481 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1367 15:44:41.734552 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1368 15:44:41.741023 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1369 15:44:41.751600 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1370 15:44:41.761232 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1371 15:44:41.770826 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1372 15:44:41.781183 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1373 15:44:41.788190 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1374 15:44:41.796748 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1375 15:44:41.806961 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1376 15:44:41.816545 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1377 15:44:41.827131 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1378 15:44:41.836345 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1379 15:44:41.846410 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1380 15:44:41.846892 PCI: 00:02.0
1381 15:44:41.856009 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1382 15:44:41.870024 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1383 15:44:41.876184 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1384 15:44:41.879486 PCI: 00:04.0
1385 15:44:41.880069 PCI: 00:08.0
1386 15:44:41.892790 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1387 15:44:41.893434 PCI: 00:12.0
1388 15:44:41.902640 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1389 15:44:41.909409 PCI: 00:14.0 child on link 0 USB0 port 0
1390 15:44:41.918870 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1391 15:44:41.922569 USB0 port 0 child on link 0 USB2 port 0
1392 15:44:41.925729 USB2 port 0
1393 15:44:41.926209 USB2 port 1
1394 15:44:41.929170 USB2 port 2
1395 15:44:41.929660 USB2 port 3
1396 15:44:41.932401 USB2 port 5
1397 15:44:41.932836 USB2 port 6
1398 15:44:41.935348 USB2 port 9
1399 15:44:41.935780 USB3 port 0
1400 15:44:41.938749 USB3 port 1
1401 15:44:41.939183 USB3 port 2
1402 15:44:41.942190 USB3 port 3
1403 15:44:41.942621 USB3 port 4
1404 15:44:41.945670 PCI: 00:14.2
1405 15:44:41.955419 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1406 15:44:41.965463 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1407 15:44:41.969050 PCI: 00:14.3
1408 15:44:41.979294 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1409 15:44:41.982071 PCI: 00:15.0 child on link 0 I2C: 01:15
1410 15:44:41.991818 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1411 15:44:41.994696 I2C: 01:15
1412 15:44:41.998470 PCI: 00:15.1 child on link 0 I2C: 02:5d
1413 15:44:42.008383 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1414 15:44:42.011140 I2C: 02:5d
1415 15:44:42.011591 GENERIC: 0.0
1416 15:44:42.014495 PCI: 00:16.0
1417 15:44:42.024712 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1418 15:44:42.025329 PCI: 00:17.0
1419 15:44:42.034828 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1420 15:44:42.044370 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1421 15:44:42.054893 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1422 15:44:42.064092 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1423 15:44:42.074074 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1424 15:44:42.083796 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1425 15:44:42.087483 PCI: 00:19.0 child on link 0 I2C: 03:1a
1426 15:44:42.097412 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1427 15:44:42.100926 I2C: 03:1a
1428 15:44:42.101531 I2C: 03:38
1429 15:44:42.104295 I2C: 03:39
1430 15:44:42.104871 I2C: 03:3a
1431 15:44:42.105286 I2C: 03:3b
1432 15:44:42.110556 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1433 15:44:42.120033 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1434 15:44:42.130579 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1435 15:44:42.140202 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1436 15:44:42.140786 PCI: 01:00.0
1437 15:44:42.153359 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1438 15:44:42.153925 PCI: 00:1e.0
1439 15:44:42.163153 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1440 15:44:42.176582 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1441 15:44:42.180236 PCI: 00:1e.2 child on link 0 SPI: 00
1442 15:44:42.190014 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1443 15:44:42.190594 SPI: 00
1444 15:44:42.193053 PCI: 00:1e.3 child on link 0 SPI: 01
1445 15:44:42.206421 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1446 15:44:42.207003 SPI: 01
1447 15:44:42.209730 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1448 15:44:42.219566 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1449 15:44:42.229399 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1450 15:44:42.229844 PNP: 0c09.0
1451 15:44:42.239319 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1452 15:44:42.239908 PCI: 00:1f.3
1453 15:44:42.248968 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1454 15:44:42.262166 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1455 15:44:42.262773 PCI: 00:1f.4
1456 15:44:42.272394 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1457 15:44:42.282256 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1458 15:44:42.282839 PCI: 00:1f.5
1459 15:44:42.292821 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1460 15:44:42.295534 Done allocating resources.
1461 15:44:42.302021 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1462 15:44:42.305177 Enabling resources...
1463 15:44:42.308753 PCI: 00:00.0 subsystem <- 8086/9b61
1464 15:44:42.311930 PCI: 00:00.0 cmd <- 06
1465 15:44:42.315268 PCI: 00:02.0 subsystem <- 8086/9b41
1466 15:44:42.318740 PCI: 00:02.0 cmd <- 03
1467 15:44:42.322097 PCI: 00:08.0 cmd <- 06
1468 15:44:42.324798 PCI: 00:12.0 subsystem <- 8086/02f9
1469 15:44:42.325394 PCI: 00:12.0 cmd <- 02
1470 15:44:42.332047 PCI: 00:14.0 subsystem <- 8086/02ed
1471 15:44:42.332626 PCI: 00:14.0 cmd <- 02
1472 15:44:42.335404 PCI: 00:14.2 cmd <- 02
1473 15:44:42.338335 PCI: 00:14.3 subsystem <- 8086/02f0
1474 15:44:42.341760 PCI: 00:14.3 cmd <- 02
1475 15:44:42.345030 PCI: 00:15.0 subsystem <- 8086/02e8
1476 15:44:42.348721 PCI: 00:15.0 cmd <- 02
1477 15:44:42.352139 PCI: 00:15.1 subsystem <- 8086/02e9
1478 15:44:42.355442 PCI: 00:15.1 cmd <- 02
1479 15:44:42.358516 PCI: 00:16.0 subsystem <- 8086/02e0
1480 15:44:42.361553 PCI: 00:16.0 cmd <- 02
1481 15:44:42.364778 PCI: 00:17.0 subsystem <- 8086/02d3
1482 15:44:42.368095 PCI: 00:17.0 cmd <- 03
1483 15:44:42.371691 PCI: 00:19.0 subsystem <- 8086/02c5
1484 15:44:42.372227 PCI: 00:19.0 cmd <- 02
1485 15:44:42.375426 PCI: 00:1d.0 bridge ctrl <- 0013
1486 15:44:42.381858 PCI: 00:1d.0 subsystem <- 8086/02b0
1487 15:44:42.382388 PCI: 00:1d.0 cmd <- 06
1488 15:44:42.385165 PCI: 00:1e.0 subsystem <- 8086/02a8
1489 15:44:42.388262 PCI: 00:1e.0 cmd <- 06
1490 15:44:42.391602 PCI: 00:1e.2 subsystem <- 8086/02aa
1491 15:44:42.394963 PCI: 00:1e.2 cmd <- 06
1492 15:44:42.398388 PCI: 00:1e.3 subsystem <- 8086/02ab
1493 15:44:42.401617 PCI: 00:1e.3 cmd <- 02
1494 15:44:42.404766 PCI: 00:1f.0 subsystem <- 8086/0284
1495 15:44:42.407987 PCI: 00:1f.0 cmd <- 407
1496 15:44:42.411645 PCI: 00:1f.3 subsystem <- 8086/02c8
1497 15:44:42.414464 PCI: 00:1f.3 cmd <- 02
1498 15:44:42.417756 PCI: 00:1f.4 subsystem <- 8086/02a3
1499 15:44:42.421372 PCI: 00:1f.4 cmd <- 03
1500 15:44:42.424544 PCI: 00:1f.5 subsystem <- 8086/02a4
1501 15:44:42.427979 PCI: 00:1f.5 cmd <- 406
1502 15:44:42.435603 PCI: 01:00.0 cmd <- 02
1503 15:44:42.440937 done.
1504 15:44:42.454915 ME: Version: 14.0.39.1367
1505 15:44:42.461110 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 13
1506 15:44:42.464348 Initializing devices...
1507 15:44:42.464830 Root Device init ...
1508 15:44:42.470912 Chrome EC: Set SMI mask to 0x0000000000000000
1509 15:44:42.474084 Chrome EC: clear events_b mask to 0x0000000000000000
1510 15:44:42.481290 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1511 15:44:42.487763 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1512 15:44:42.494404 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1513 15:44:42.497554 Chrome EC: Set WAKE mask to 0x0000000000000000
1514 15:44:42.500811 Root Device init finished in 35256 usecs
1515 15:44:42.504747 CPU_CLUSTER: 0 init ...
1516 15:44:42.511136 CPU_CLUSTER: 0 init finished in 2448 usecs
1517 15:44:42.514999 PCI: 00:00.0 init ...
1518 15:44:42.518749 CPU TDP: 15 Watts
1519 15:44:42.522173 CPU PL2 = 64 Watts
1520 15:44:42.525546 PCI: 00:00.0 init finished in 7081 usecs
1521 15:44:42.528383 PCI: 00:02.0 init ...
1522 15:44:42.531671 PCI: 00:02.0 init finished in 2253 usecs
1523 15:44:42.535333 PCI: 00:08.0 init ...
1524 15:44:42.538040 PCI: 00:08.0 init finished in 2254 usecs
1525 15:44:42.541453 PCI: 00:12.0 init ...
1526 15:44:42.545451 PCI: 00:12.0 init finished in 2254 usecs
1527 15:44:42.548041 PCI: 00:14.0 init ...
1528 15:44:42.551461 PCI: 00:14.0 init finished in 2253 usecs
1529 15:44:42.554972 PCI: 00:14.2 init ...
1530 15:44:42.557909 PCI: 00:14.2 init finished in 2253 usecs
1531 15:44:42.561311 PCI: 00:14.3 init ...
1532 15:44:42.564528 PCI: 00:14.3 init finished in 2272 usecs
1533 15:44:42.567658 PCI: 00:15.0 init ...
1534 15:44:42.571291 DW I2C bus 0 at 0xd121f000 (400 KHz)
1535 15:44:42.574710 PCI: 00:15.0 init finished in 5971 usecs
1536 15:44:42.578003 PCI: 00:15.1 init ...
1537 15:44:42.581667 DW I2C bus 1 at 0xd1220000 (400 KHz)
1538 15:44:42.587882 PCI: 00:15.1 init finished in 5977 usecs
1539 15:44:42.588368 PCI: 00:16.0 init ...
1540 15:44:42.594445 PCI: 00:16.0 init finished in 2254 usecs
1541 15:44:42.597552 PCI: 00:19.0 init ...
1542 15:44:42.601237 DW I2C bus 4 at 0xd1222000 (400 KHz)
1543 15:44:42.604303 PCI: 00:19.0 init finished in 5978 usecs
1544 15:44:42.607757 PCI: 00:1d.0 init ...
1545 15:44:42.610898 Initializing PCH PCIe bridge.
1546 15:44:42.613888 PCI: 00:1d.0 init finished in 5286 usecs
1547 15:44:42.617539 PCI: 00:1f.0 init ...
1548 15:44:42.620727 IOAPIC: Initializing IOAPIC at 0xfec00000
1549 15:44:42.627462 IOAPIC: Bootstrap Processor Local APIC = 0x00
1550 15:44:42.628038 IOAPIC: ID = 0x02
1551 15:44:42.630978 IOAPIC: Dumping registers
1552 15:44:42.633937 reg 0x0000: 0x02000000
1553 15:44:42.637243 reg 0x0001: 0x00770020
1554 15:44:42.637815 reg 0x0002: 0x00000000
1555 15:44:42.643983 PCI: 00:1f.0 init finished in 23548 usecs
1556 15:44:42.647418 PCI: 00:1f.4 init ...
1557 15:44:42.650389 PCI: 00:1f.4 init finished in 2263 usecs
1558 15:44:42.661225 PCI: 01:00.0 init ...
1559 15:44:42.664372 PCI: 01:00.0 init finished in 2254 usecs
1560 15:44:42.668873 PNP: 0c09.0 init ...
1561 15:44:42.672540 Google Chrome EC uptime: 11.074 seconds
1562 15:44:42.678826 Google Chrome AP resets since EC boot: 0
1563 15:44:42.682380 Google Chrome most recent AP reset causes:
1564 15:44:42.688758 Google Chrome EC reset flags at last EC boot: reset-pin
1565 15:44:42.692580 PNP: 0c09.0 init finished in 20583 usecs
1566 15:44:42.695888 Devices initialized
1567 15:44:42.696460 Show all devs... After init.
1568 15:44:42.698900 Root Device: enabled 1
1569 15:44:42.702117 CPU_CLUSTER: 0: enabled 1
1570 15:44:42.705730 DOMAIN: 0000: enabled 1
1571 15:44:42.706306 APIC: 00: enabled 1
1572 15:44:42.709056 PCI: 00:00.0: enabled 1
1573 15:44:42.712112 PCI: 00:02.0: enabled 1
1574 15:44:42.715684 PCI: 00:04.0: enabled 0
1575 15:44:42.716190 PCI: 00:05.0: enabled 0
1576 15:44:42.718593 PCI: 00:12.0: enabled 1
1577 15:44:42.721953 PCI: 00:12.5: enabled 0
1578 15:44:42.722428 PCI: 00:12.6: enabled 0
1579 15:44:42.725725 PCI: 00:14.0: enabled 1
1580 15:44:42.728752 PCI: 00:14.1: enabled 0
1581 15:44:42.732007 PCI: 00:14.3: enabled 1
1582 15:44:42.732573 PCI: 00:14.5: enabled 0
1583 15:44:42.735458 PCI: 00:15.0: enabled 1
1584 15:44:42.738965 PCI: 00:15.1: enabled 1
1585 15:44:42.741625 PCI: 00:15.2: enabled 0
1586 15:44:42.742104 PCI: 00:15.3: enabled 0
1587 15:44:42.745624 PCI: 00:16.0: enabled 1
1588 15:44:42.748240 PCI: 00:16.1: enabled 0
1589 15:44:42.751510 PCI: 00:16.2: enabled 0
1590 15:44:42.751988 PCI: 00:16.3: enabled 0
1591 15:44:42.755199 PCI: 00:16.4: enabled 0
1592 15:44:42.758259 PCI: 00:16.5: enabled 0
1593 15:44:42.761599 PCI: 00:17.0: enabled 1
1594 15:44:42.762076 PCI: 00:19.0: enabled 1
1595 15:44:42.764749 PCI: 00:19.1: enabled 0
1596 15:44:42.768309 PCI: 00:19.2: enabled 0
1597 15:44:42.768816 PCI: 00:1a.0: enabled 0
1598 15:44:42.771273 PCI: 00:1c.0: enabled 0
1599 15:44:42.774557 PCI: 00:1c.1: enabled 0
1600 15:44:42.777825 PCI: 00:1c.2: enabled 0
1601 15:44:42.778257 PCI: 00:1c.3: enabled 0
1602 15:44:42.781411 PCI: 00:1c.4: enabled 0
1603 15:44:42.784818 PCI: 00:1c.5: enabled 0
1604 15:44:42.788246 PCI: 00:1c.6: enabled 0
1605 15:44:42.788779 PCI: 00:1c.7: enabled 0
1606 15:44:42.791374 PCI: 00:1d.0: enabled 1
1607 15:44:42.794671 PCI: 00:1d.1: enabled 0
1608 15:44:42.797791 PCI: 00:1d.2: enabled 0
1609 15:44:42.798227 PCI: 00:1d.3: enabled 0
1610 15:44:42.801589 PCI: 00:1d.4: enabled 0
1611 15:44:42.805161 PCI: 00:1d.5: enabled 0
1612 15:44:42.808267 PCI: 00:1e.0: enabled 1
1613 15:44:42.808795 PCI: 00:1e.1: enabled 0
1614 15:44:42.811654 PCI: 00:1e.2: enabled 1
1615 15:44:42.814516 PCI: 00:1e.3: enabled 1
1616 15:44:42.815062 PCI: 00:1f.0: enabled 1
1617 15:44:42.817827 PCI: 00:1f.1: enabled 0
1618 15:44:42.820896 PCI: 00:1f.2: enabled 0
1619 15:44:42.824356 PCI: 00:1f.3: enabled 1
1620 15:44:42.824896 PCI: 00:1f.4: enabled 1
1621 15:44:42.828111 PCI: 00:1f.5: enabled 1
1622 15:44:42.831395 PCI: 00:1f.6: enabled 0
1623 15:44:42.834252 USB0 port 0: enabled 1
1624 15:44:42.834832 I2C: 01:15: enabled 1
1625 15:44:42.837369 I2C: 02:5d: enabled 1
1626 15:44:42.841662 GENERIC: 0.0: enabled 1
1627 15:44:42.842399 I2C: 03:1a: enabled 1
1628 15:44:42.844359 I2C: 03:38: enabled 1
1629 15:44:42.847855 I2C: 03:39: enabled 1
1630 15:44:42.848337 I2C: 03:3a: enabled 1
1631 15:44:42.850747 I2C: 03:3b: enabled 1
1632 15:44:42.854415 PCI: 00:00.0: enabled 1
1633 15:44:42.854999 SPI: 00: enabled 1
1634 15:44:42.857802 SPI: 01: enabled 1
1635 15:44:42.860796 PNP: 0c09.0: enabled 1
1636 15:44:42.861306 USB2 port 0: enabled 1
1637 15:44:42.864139 USB2 port 1: enabled 1
1638 15:44:42.867118 USB2 port 2: enabled 0
1639 15:44:42.870912 USB2 port 3: enabled 0
1640 15:44:42.871389 USB2 port 5: enabled 0
1641 15:44:42.873672 USB2 port 6: enabled 1
1642 15:44:42.877358 USB2 port 9: enabled 1
1643 15:44:42.877900 USB3 port 0: enabled 1
1644 15:44:42.880457 USB3 port 1: enabled 1
1645 15:44:42.884211 USB3 port 2: enabled 1
1646 15:44:42.884751 USB3 port 3: enabled 1
1647 15:44:42.887307 USB3 port 4: enabled 0
1648 15:44:42.890675 APIC: 02: enabled 1
1649 15:44:42.891213 APIC: 01: enabled 1
1650 15:44:42.893955 APIC: 06: enabled 1
1651 15:44:42.897235 APIC: 07: enabled 1
1652 15:44:42.897772 APIC: 05: enabled 1
1653 15:44:42.900782 APIC: 03: enabled 1
1654 15:44:42.901366 APIC: 04: enabled 1
1655 15:44:42.904408 PCI: 00:08.0: enabled 1
1656 15:44:42.907092 PCI: 00:14.2: enabled 1
1657 15:44:42.910746 PCI: 01:00.0: enabled 1
1658 15:44:42.913942 Disabling ACPI via APMC:
1659 15:44:42.917244 done.
1660 15:44:42.920351 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1661 15:44:42.923976 ELOG: NV offset 0xaf0000 size 0x4000
1662 15:44:42.930912 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1663 15:44:42.937630 ELOG: Event(17) added with size 13 at 2022-06-24 15:40:17 UTC
1664 15:44:42.943845 ELOG: Event(92) added with size 9 at 2022-06-24 15:40:17 UTC
1665 15:44:42.950360 ELOG: Event(93) added with size 9 at 2022-06-24 15:40:17 UTC
1666 15:44:42.956960 ELOG: Event(9A) added with size 9 at 2022-06-24 15:40:17 UTC
1667 15:44:42.963943 ELOG: Event(9E) added with size 10 at 2022-06-24 15:40:17 UTC
1668 15:44:42.970245 ELOG: Event(9F) added with size 14 at 2022-06-24 15:40:17 UTC
1669 15:44:42.973622 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1670 15:44:42.980789 ELOG: Event(A1) added with size 10 at 2022-06-24 15:40:17 UTC
1671 15:44:42.990836 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1672 15:44:42.997289 ELOG: Event(A0) added with size 9 at 2022-06-24 15:40:17 UTC
1673 15:44:43.000831 elog_add_boot_reason: Logged dev mode boot
1674 15:44:43.004537 Finalize devices...
1675 15:44:43.005155 PCI: 00:17.0 final
1676 15:44:43.007782 Devices finalized
1677 15:44:43.010681 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1678 15:44:43.017365 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1679 15:44:43.020260 ME: HFSTS1 : 0x90000245
1680 15:44:43.023803 ME: HFSTS2 : 0x3B850126
1681 15:44:43.030346 ME: HFSTS3 : 0x00000020
1682 15:44:43.033713 ME: HFSTS4 : 0x00004800
1683 15:44:43.037634 ME: HFSTS5 : 0x00000000
1684 15:44:43.040815 ME: HFSTS6 : 0x40400006
1685 15:44:43.043448 ME: Manufacturing Mode : NO
1686 15:44:43.046753 ME: FW Partition Table : OK
1687 15:44:43.050377 ME: Bringup Loader Failure : NO
1688 15:44:43.053643 ME: Firmware Init Complete : YES
1689 15:44:43.057048 ME: Boot Options Present : NO
1690 15:44:43.060618 ME: Update In Progress : NO
1691 15:44:43.063419 ME: D0i3 Support : YES
1692 15:44:43.066677 ME: Low Power State Enabled : NO
1693 15:44:43.070177 ME: CPU Replaced : NO
1694 15:44:43.073580 ME: CPU Replacement Valid : YES
1695 15:44:43.076988 ME: Current Working State : 5
1696 15:44:43.080012 ME: Current Operation State : 1
1697 15:44:43.083471 ME: Current Operation Mode : 0
1698 15:44:43.086832 ME: Error Code : 0
1699 15:44:43.089887 ME: CPU Debug Disabled : YES
1700 15:44:43.093019 ME: TXT Support : NO
1701 15:44:43.099944 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1702 15:44:43.106525 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1703 15:44:43.107115 CBFS @ c08000 size 3f8000
1704 15:44:43.113424 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1705 15:44:43.116121 CBFS: Locating 'fallback/dsdt.aml'
1706 15:44:43.119452 CBFS: Found @ offset 10bb80 size 3fa5
1707 15:44:43.126036 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1708 15:44:43.129411 CBFS @ c08000 size 3f8000
1709 15:44:43.136172 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1710 15:44:43.136712 CBFS: Locating 'fallback/slic'
1711 15:44:43.141625 CBFS: 'fallback/slic' not found.
1712 15:44:43.147965 ACPI: Writing ACPI tables at 99b3e000.
1713 15:44:43.148570 ACPI: * FACS
1714 15:44:43.151153 ACPI: * DSDT
1715 15:44:43.154451 Ramoops buffer: 0x100000@0x99a3d000.
1716 15:44:43.157841 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1717 15:44:43.164550 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1718 15:44:43.167721 Google Chrome EC: version:
1719 15:44:43.171039 ro: helios_v2.0.2659-56403530b
1720 15:44:43.174400 rw: helios_v2.0.2849-c41de27e7d
1721 15:44:43.174984 running image: 1
1722 15:44:43.178681 ACPI: * FADT
1723 15:44:43.179262 SCI is IRQ9
1724 15:44:43.185979 ACPI: added table 1/32, length now 40
1725 15:44:43.186572 ACPI: * SSDT
1726 15:44:43.189020 Found 1 CPU(s) with 8 core(s) each.
1727 15:44:43.192107 Error: Could not locate 'wifi_sar' in VPD.
1728 15:44:43.198734 Checking CBFS for default SAR values
1729 15:44:43.202460 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1730 15:44:43.205798 CBFS @ c08000 size 3f8000
1731 15:44:43.211924 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1732 15:44:43.215727 CBFS: Locating 'wifi_sar_defaults.hex'
1733 15:44:43.218280 CBFS: Found @ offset 5fac0 size 77
1734 15:44:43.221951 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1735 15:44:43.228277 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1736 15:44:43.231952 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1737 15:44:43.238278 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1738 15:44:43.242035 failed to find key in VPD: dsm_calib_r0_0
1739 15:44:43.251396 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1740 15:44:43.254891 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1741 15:44:43.258673 failed to find key in VPD: dsm_calib_r0_1
1742 15:44:43.268005 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1743 15:44:43.274457 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1744 15:44:43.277926 failed to find key in VPD: dsm_calib_r0_2
1745 15:44:43.287959 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1746 15:44:43.291264 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1747 15:44:43.297952 failed to find key in VPD: dsm_calib_r0_3
1748 15:44:43.304810 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1749 15:44:43.311289 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1750 15:44:43.314219 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1751 15:44:43.320741 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1752 15:44:43.323997 EC returned error result code 1
1753 15:44:43.327881 EC returned error result code 1
1754 15:44:43.331569 EC returned error result code 1
1755 15:44:43.334531 PS2K: Bad resp from EC. Vivaldi disabled!
1756 15:44:43.341351 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1757 15:44:43.348177 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1758 15:44:43.351225 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1759 15:44:43.358001 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1760 15:44:43.361288 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1761 15:44:43.367518 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1762 15:44:43.374126 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1763 15:44:43.380961 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1764 15:44:43.384536 ACPI: added table 2/32, length now 44
1765 15:44:43.385153 ACPI: * MCFG
1766 15:44:43.390726 ACPI: added table 3/32, length now 48
1767 15:44:43.391300 ACPI: * TPM2
1768 15:44:43.394585 TPM2 log created at 99a2d000
1769 15:44:43.397526 ACPI: added table 4/32, length now 52
1770 15:44:43.400884 ACPI: * MADT
1771 15:44:43.401507 SCI is IRQ9
1772 15:44:43.404465 ACPI: added table 5/32, length now 56
1773 15:44:43.407958 current = 99b43ac0
1774 15:44:43.408547 ACPI: * DMAR
1775 15:44:43.411039 ACPI: added table 6/32, length now 60
1776 15:44:43.414423 ACPI: * IGD OpRegion
1777 15:44:43.417552 GMA: Found VBT in CBFS
1778 15:44:43.420551 GMA: Found valid VBT in CBFS
1779 15:44:43.424313 ACPI: added table 7/32, length now 64
1780 15:44:43.424904 ACPI: * HPET
1781 15:44:43.427277 ACPI: added table 8/32, length now 68
1782 15:44:43.430542 ACPI: done.
1783 15:44:43.433681 ACPI tables: 31744 bytes.
1784 15:44:43.437315 smbios_write_tables: 99a2c000
1785 15:44:43.440495 EC returned error result code 3
1786 15:44:43.443937 Couldn't obtain OEM name from CBI
1787 15:44:43.447239 Create SMBIOS type 17
1788 15:44:43.450389 PCI: 00:00.0 (Intel Cannonlake)
1789 15:44:43.450979 PCI: 00:14.3 (Intel WiFi)
1790 15:44:43.453788 SMBIOS tables: 939 bytes.
1791 15:44:43.457238 Writing table forward entry at 0x00000500
1792 15:44:43.463958 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1793 15:44:43.466963 Writing coreboot table at 0x99b62000
1794 15:44:43.473644 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1795 15:44:43.476973 1. 0000000000001000-000000000009ffff: RAM
1796 15:44:43.483404 2. 00000000000a0000-00000000000fffff: RESERVED
1797 15:44:43.486960 3. 0000000000100000-0000000099a2bfff: RAM
1798 15:44:43.493866 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1799 15:44:43.497114 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1800 15:44:43.503483 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1801 15:44:43.510775 7. 000000009a000000-000000009f7fffff: RESERVED
1802 15:44:43.513684 8. 00000000e0000000-00000000efffffff: RESERVED
1803 15:44:43.520089 9. 00000000fc000000-00000000fc000fff: RESERVED
1804 15:44:43.523158 10. 00000000fe000000-00000000fe00ffff: RESERVED
1805 15:44:43.526616 11. 00000000fed10000-00000000fed17fff: RESERVED
1806 15:44:43.533472 12. 00000000fed80000-00000000fed83fff: RESERVED
1807 15:44:43.536465 13. 00000000fed90000-00000000fed91fff: RESERVED
1808 15:44:43.543341 14. 00000000feda0000-00000000feda1fff: RESERVED
1809 15:44:43.546127 15. 0000000100000000-000000045e7fffff: RAM
1810 15:44:43.549348 Graphics framebuffer located at 0xc0000000
1811 15:44:43.552718 Passing 5 GPIOs to payload:
1812 15:44:43.559787 NAME | PORT | POLARITY | VALUE
1813 15:44:43.562685 write protect | undefined | high | low
1814 15:44:43.569518 lid | undefined | high | high
1815 15:44:43.576174 power | undefined | high | low
1816 15:44:43.579647 oprom | undefined | high | low
1817 15:44:43.586281 EC in RW | 0x000000cb | high | low
1818 15:44:43.586888 Board ID: 4
1819 15:44:43.592269 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1820 15:44:43.592712 CBFS @ c08000 size 3f8000
1821 15:44:43.599524 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1822 15:44:43.606334 Wrote coreboot table at: 99b62000, 0x594 bytes, checksum 407
1823 15:44:43.609773 coreboot table: 1452 bytes.
1824 15:44:43.613286 IMD ROOT 0. 99fff000 00001000
1825 15:44:43.615770 IMD SMALL 1. 99ffe000 00001000
1826 15:44:43.618977 FSP MEMORY 2. 99c4e000 003b0000
1827 15:44:43.622331 CONSOLE 3. 99c2e000 00020000
1828 15:44:43.625828 FMAP 4. 99c2d000 0000054e
1829 15:44:43.629095 TIME STAMP 5. 99c2c000 00000910
1830 15:44:43.632348 VBOOT WORK 6. 99c18000 00014000
1831 15:44:43.635612 MRC DATA 7. 99c16000 00001958
1832 15:44:43.639193 ROMSTG STCK 8. 99c15000 00001000
1833 15:44:43.642475 AFTER CAR 9. 99c0b000 0000a000
1834 15:44:43.645663 RAMSTAGE 10. 99baf000 0005c000
1835 15:44:43.649472 REFCODE 11. 99b7a000 00035000
1836 15:44:43.652672 SMM BACKUP 12. 99b6a000 00010000
1837 15:44:43.655700 COREBOOT 13. 99b62000 00008000
1838 15:44:43.659008 ACPI 14. 99b3e000 00024000
1839 15:44:43.662314 ACPI GNVS 15. 99b3d000 00001000
1840 15:44:43.665656 RAMOOPS 16. 99a3d000 00100000
1841 15:44:43.668993 TPM2 TCGLOG17. 99a2d000 00010000
1842 15:44:43.672521 SMBIOS 18. 99a2c000 00000800
1843 15:44:43.673136 IMD small region:
1844 15:44:43.675635 IMD ROOT 0. 99ffec00 00000400
1845 15:44:43.682133 FSP RUNTIME 1. 99ffebe0 00000004
1846 15:44:43.685670 EC HOSTEVENT 2. 99ffebc0 00000008
1847 15:44:43.688836 POWER STATE 3. 99ffeb80 00000040
1848 15:44:43.692289 ROMSTAGE 4. 99ffeb60 00000004
1849 15:44:43.695470 MEM INFO 5. 99ffe9a0 000001b9
1850 15:44:43.698553 MTRR: Physical address space:
1851 15:44:43.705241 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1852 15:44:43.712226 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1853 15:44:43.715456 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1854 15:44:43.721603 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1855 15:44:43.728487 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1856 15:44:43.734855 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1857 15:44:43.741687 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1858 15:44:43.744784 MTRR: Fixed MSR 0x250 0x0606060606060606
1859 15:44:43.748007 MTRR: Fixed MSR 0x258 0x0606060606060606
1860 15:44:43.754766 MTRR: Fixed MSR 0x259 0x0000000000000000
1861 15:44:43.758205 MTRR: Fixed MSR 0x268 0x0606060606060606
1862 15:44:43.761660 MTRR: Fixed MSR 0x269 0x0606060606060606
1863 15:44:43.764894 MTRR: Fixed MSR 0x26a 0x0606060606060606
1864 15:44:43.771287 MTRR: Fixed MSR 0x26b 0x0606060606060606
1865 15:44:43.774507 MTRR: Fixed MSR 0x26c 0x0606060606060606
1866 15:44:43.777974 MTRR: Fixed MSR 0x26d 0x0606060606060606
1867 15:44:43.781463 MTRR: Fixed MSR 0x26e 0x0606060606060606
1868 15:44:43.787925 MTRR: Fixed MSR 0x26f 0x0606060606060606
1869 15:44:43.791387 call enable_fixed_mtrr()
1870 15:44:43.794719 CPU physical address size: 39 bits
1871 15:44:43.797871 MTRR: default type WB/UC MTRR counts: 6/8.
1872 15:44:43.801197 MTRR: WB selected as default type.
1873 15:44:43.807548 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1874 15:44:43.814405 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1875 15:44:43.820669 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1876 15:44:43.827488 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1877 15:44:43.834010 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1878 15:44:43.837159 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1879 15:44:43.844738 MTRR: Fixed MSR 0x250 0x0606060606060606
1880 15:44:43.848064 MTRR: Fixed MSR 0x258 0x0606060606060606
1881 15:44:43.851276 MTRR: Fixed MSR 0x259 0x0000000000000000
1882 15:44:43.854670 MTRR: Fixed MSR 0x268 0x0606060606060606
1883 15:44:43.861658 MTRR: Fixed MSR 0x269 0x0606060606060606
1884 15:44:43.864651 MTRR: Fixed MSR 0x26a 0x0606060606060606
1885 15:44:43.867646 MTRR: Fixed MSR 0x26b 0x0606060606060606
1886 15:44:43.871501 MTRR: Fixed MSR 0x26c 0x0606060606060606
1887 15:44:43.877561 MTRR: Fixed MSR 0x26d 0x0606060606060606
1888 15:44:43.880815 MTRR: Fixed MSR 0x26e 0x0606060606060606
1889 15:44:43.884384 MTRR: Fixed MSR 0x26f 0x0606060606060606
1890 15:44:43.884867
1891 15:44:43.887759 MTRR check
1892 15:44:43.888225 Fixed MTRRs : Enabled
1893 15:44:43.891088 Variable MTRRs: Enabled
1894 15:44:43.891644
1895 15:44:43.894333 call enable_fixed_mtrr()
1896 15:44:43.897635 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 3
1897 15:44:43.904090 CPU physical address size: 39 bits
1898 15:44:43.907592 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1899 15:44:43.910552 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 15:44:43.917219 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 15:44:43.920864 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 15:44:43.924429 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 15:44:43.927368 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 15:44:43.933911 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 15:44:43.937536 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 15:44:43.940898 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 15:44:43.943888 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 15:44:43.950378 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 15:44:43.953667 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 15:44:43.957411 MTRR: Fixed MSR 0x250 0x0606060606060606
1911 15:44:43.960668 call enable_fixed_mtrr()
1912 15:44:43.963495 MTRR: Fixed MSR 0x258 0x0606060606060606
1913 15:44:43.966835 MTRR: Fixed MSR 0x259 0x0000000000000000
1914 15:44:43.973675 MTRR: Fixed MSR 0x268 0x0606060606060606
1915 15:44:43.976967 MTRR: Fixed MSR 0x269 0x0606060606060606
1916 15:44:43.980938 MTRR: Fixed MSR 0x26a 0x0606060606060606
1917 15:44:43.983336 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 15:44:43.990155 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 15:44:43.993219 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 15:44:43.996936 MTRR: Fixed MSR 0x26e 0x0606060606060606
1921 15:44:44.000394 MTRR: Fixed MSR 0x26f 0x0606060606060606
1922 15:44:44.003530 CPU physical address size: 39 bits
1923 15:44:44.006800 call enable_fixed_mtrr()
1924 15:44:44.013494 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 15:44:44.016706 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 15:44:44.019981 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 15:44:44.023750 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 15:44:44.026846 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 15:44:44.033602 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 15:44:44.036667 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 15:44:44.040180 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 15:44:44.043466 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 15:44:44.050250 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 15:44:44.053017 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 15:44:44.056561 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 15:44:44.059916 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 15:44:44.062807 call enable_fixed_mtrr()
1938 15:44:44.066195 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 15:44:44.072693 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 15:44:44.076303 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 15:44:44.079480 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 15:44:44.082737 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 15:44:44.089318 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 15:44:44.092265 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 15:44:44.096132 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 15:44:44.099498 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 15:44:44.105979 CPU physical address size: 39 bits
1948 15:44:44.106558 call enable_fixed_mtrr()
1949 15:44:44.109183 CBFS @ c08000 size 3f8000
1950 15:44:44.116084 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1951 15:44:44.118896 CBFS: Locating 'fallback/payload'
1952 15:44:44.122383 CPU physical address size: 39 bits
1953 15:44:44.126365 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 15:44:44.129155 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 15:44:44.136209 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 15:44:44.139253 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 15:44:44.142821 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 15:44:44.145450 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 15:44:44.152399 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 15:44:44.155551 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 15:44:44.159300 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 15:44:44.162111 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 15:44:44.168763 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 15:44:44.172426 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 15:44:44.175647 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 15:44:44.178784 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 15:44:44.185617 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 15:44:44.188249 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 15:44:44.191845 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 15:44:44.194992 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 15:44:44.201669 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 15:44:44.205676 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 15:44:44.208537 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 15:44:44.211837 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 15:44:44.215564 call enable_fixed_mtrr()
1976 15:44:44.218657 call enable_fixed_mtrr()
1977 15:44:44.221898 CPU physical address size: 39 bits
1978 15:44:44.225202 CPU physical address size: 39 bits
1979 15:44:44.229159 CBFS: Found @ offset 1c96c0 size 3f798
1980 15:44:44.232245 CPU physical address size: 39 bits
1981 15:44:44.238342 Checking segment from ROM address 0xffdd16f8
1982 15:44:44.241623 Checking segment from ROM address 0xffdd1714
1983 15:44:44.245288 Loading segment from ROM address 0xffdd16f8
1984 15:44:44.248825 code (compression=0)
1985 15:44:44.258543 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1986 15:44:44.264850 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1987 15:44:44.268104 it's not compressed!
1988 15:44:44.360154 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1989 15:44:44.366445 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1990 15:44:44.369604 Loading segment from ROM address 0xffdd1714
1991 15:44:44.372805 Entry Point 0x30000000
1992 15:44:44.376403 Loaded segments
1993 15:44:44.381738 Finalizing chipset.
1994 15:44:44.385397 Finalizing SMM.
1995 15:44:44.388665 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1996 15:44:44.391634 mp_park_aps done after 0 msecs.
1997 15:44:44.398144 Jumping to boot code at 30000000(99b62000)
1998 15:44:44.405227 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1999 15:44:44.405808
2000 15:44:44.408402 Starting depthcharge on Helios...
2001 15:44:44.409658 end: 2.2.3 depthcharge-start (duration 00:00:18) [common]
2002 15:44:44.410236 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2003 15:44:44.410715 Setting prompt string to ['hatch:']
2004 15:44:44.411147 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2005 15:44:44.418611 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2006 15:44:44.425048 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2007 15:44:44.431572 board_setup: Info: eMMC controller not present; skipping
2008 15:44:44.434985 New NVMe Controller 0x30053ac0 @ 00:1d:00
2009 15:44:44.441117 board_setup: Info: SDHCI controller not present; skipping
2010 15:44:44.448242 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2011 15:44:44.448826 Wipe memory regions:
2012 15:44:44.451436 [0x00000000001000, 0x000000000a0000)
2013 15:44:44.454504 [0x00000000100000, 0x00000030000000)
2014 15:44:44.524227 [0x00000030657430, 0x00000099a2c000)
2015 15:44:44.674356 [0x00000100000000, 0x0000045e800000)
2016 15:44:46.130618 R8152: Initializing
2017 15:44:46.133255 Version 9 (ocp_data = 6010)
2018 15:44:46.137804 R8152: Done initializing
2019 15:44:46.141216 Adding net device
2020 15:44:46.516376 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2021 15:44:46.516952
2022 15:44:46.517771 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2024 15:44:46.619630 hatch: tftpboot 192.168.201.1 6677466/tftp-deploy-vwa2xkij/kernel/bzImage 6677466/tftp-deploy-vwa2xkij/kernel/cmdline 6677466/tftp-deploy-vwa2xkij/ramdisk/ramdisk.cpio.gz
2025 15:44:46.620330 Setting prompt string to ['Starting kernel']
2026 15:44:46.620771 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2027 15:44:46.621235 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:04:39)
2028 15:44:46.625301 tftpboot 192.168.201.1 6677466/tftp-deploy-vwa2xkij/kernel/bzImoy-vwa2xkij/kernel/cmdline 6677466/tftp-deploy-vwa2xkij/ramdisk/ramdisk.cpio.gz
2029 15:44:46.625799 Waiting for link
2030 15:44:46.826838 done.
2031 15:44:46.827395 MAC: f4:f5:e8:50:e3:ec
2032 15:44:46.829732 Sending DHCP discover... done.
2033 15:44:46.833191 Waiting for reply... done.
2034 15:44:46.836128 Sending DHCP request... done.
2035 15:44:46.843423 Waiting for reply... done.
2036 15:44:46.843903 My ip is 192.168.201.10
2037 15:44:46.846793 The DHCP server ip is 192.168.201.1
2038 15:44:46.853548 TFTP server IP predefined by user: 192.168.201.1
2039 15:44:46.860064 Bootfile predefined by user: 6677466/tftp-deploy-vwa2xkij/kernel/bzImage
2040 15:44:46.863333 Sending tftp read request... done.
2041 15:44:46.870094 Waiting for the transfer...
2042 15:44:47.253710 00000000 ################################################################
2043 15:44:47.503987 00080000 ################################################################
2044 15:44:47.748158 00100000 ################################################################
2045 15:44:47.987459 00180000 ################################################################
2046 15:44:48.230113 00200000 ################################################################
2047 15:44:48.540742 00280000 ################################################################
2048 15:44:48.846454 00300000 ################################################################
2049 15:44:49.158976 00380000 ################################################################
2050 15:44:49.455195 00400000 ################################################################
2051 15:44:49.752575 00480000 ################################################################
2052 15:44:50.142369 00500000 ################################################################
2053 15:44:50.447247 00580000 ################################################################
2054 15:44:50.761430 00600000 ################################################################
2055 15:44:51.077503 00680000 ################################################################
2056 15:44:51.374442 00700000 ################################################################
2057 15:44:51.770525 00780000 ################################################################
2058 15:44:52.140723 00800000 ################################################################
2059 15:44:52.518765 00880000 ################################################################
2060 15:44:52.932321 00900000 ################################################################
2061 15:44:53.176823 00980000 ######################################### done.
2062 15:44:53.180362 The bootfile was 10297184 bytes long.
2063 15:44:53.183630 Sending tftp read request... done.
2064 15:44:53.186602 Waiting for the transfer...
2065 15:44:53.457922 00000000 ################################################################
2066 15:44:53.715255 00080000 ################################################################
2067 15:44:53.973244 00100000 ################################################################
2068 15:44:54.229731 00180000 ################################################################
2069 15:44:54.485845 00200000 ################################################################
2070 15:44:54.742271 00280000 ################################################################
2071 15:44:55.001501 00300000 ################################################################
2072 15:44:55.252060 00380000 ################################################################
2073 15:44:55.497136 00400000 ################################################################
2074 15:44:55.742600 00480000 ################################################################
2075 15:44:55.892552 00500000 ######################################## done.
2076 15:44:55.896109 Sending tftp read request... done.
2077 15:44:55.899083 Waiting for the transfer...
2078 15:44:55.899187 00000000 # done.
2079 15:44:55.909016 Command line loaded dynamically from TFTP file: 6677466/tftp-deploy-vwa2xkij/kernel/cmdline
2080 15:44:55.935515 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6677466/extract-nfsrootfs-iz1iz35y,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2081 15:44:55.942385 ec_init(0): CrosEC protocol v3 supported (256, 256)
2082 15:44:55.949706 Shutting down all USB controllers.
2083 15:44:55.950274 Removing current net device
2084 15:44:55.953840 Finalizing coreboot
2085 15:44:55.960272 Exiting depthcharge with code 4 at timestamp: 18847092
2086 15:44:55.960707
2087 15:44:55.961050 Starting kernel ...
2088 15:44:55.961408
2089 15:44:55.961759
2090 15:44:55.962738 end: 2.2.4 bootloader-commands (duration 00:00:12) [common]
2091 15:44:55.963254 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
2092 15:44:55.963646 Setting prompt string to ['Linux version [0-9]']
2093 15:44:55.963998 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.']
2094 15:44:55.964359 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.'] (timeout 00:05:00)
2096 15:49:25.964139 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
2098 15:49:25.965159 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
2100 15:49:25.965939 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2103 15:49:25.967238 end: 2 depthcharge-action (duration 00:05:00) [common]
2105 15:49:25.968214 Cleaning after the job
2106 15:49:25.968610 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6677466/tftp-deploy-vwa2xkij/ramdisk
2107 15:49:25.969396 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6677466/tftp-deploy-vwa2xkij/kernel
2108 15:49:25.970206 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6677466/tftp-deploy-vwa2xkij/nfsrootfs
2109 15:49:26.005252 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6677466/tftp-deploy-vwa2xkij/modules
2110 15:49:26.005595 start: 5.1 power-off (timeout 00:00:30) [common]
2111 15:49:26.005782 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2112 15:49:26.026524 >> Command sent successfully.
2113 15:49:26.028651 Returned 0 in 0 seconds
2114 15:49:26.129587 end: 5.1 power-off (duration 00:00:00) [common]
2116 15:49:26.130990 start: 5.2 read-feedback (timeout 00:10:00) [common]
2117 15:49:26.132065 Listened to connection for namespace 'common' for up to 1s
2118 15:49:27.132302 Finalising connection for namespace 'common'
2119 15:49:27.132979 Disconnecting from shell: Finalise
2120 15:49:27.234322 end: 5.2 read-feedback (duration 00:00:01) [common]
2121 15:49:27.234896 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6677466
2122 15:49:27.373064 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6677466
2123 15:49:27.373312 JobError: Your job cannot terminate cleanly.