[Enter `^Ec?' for help]


coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
CPU: AES supported, TXT NOT supported, VT supported
MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
PCH: device id 0284 (rev 00) is Cometlake-U Premium
IGD: device id 9b41 (rev 02) is CometLake ULT GT2
VBOOT: Loading verstage.
FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
FMAP: area COREBOOT found @ c08000 (4161536 bytes)
CBFS @ c08000 size 3f8000
CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
CBFS: Locating 'fallback/verstage'
CBFS: Found @ offset 10fb80 size 1072c


coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
Probing TPM: . done!
TPM ready after 0 ms
Connected to device vid:did:rid of 1ae0:0028:00
Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
Initialized TPM device CR50 revision 0
tlcl_send_startup: Startup return code is 0
TPM: setup succeeded
src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
Chrome EC: UHEPI supported
Phase 1
FMAP: area GBB found @ c05000 (12288 bytes)
VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
Phase 2
Phase 3
FMAP: area GBB found @ c05000 (12288 bytes)
VB2:vb2_report_dev_firmware() This is developer signed firmware
FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
VB2:vb2_verify_keyblock() Checking keyblock signature...
FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
VB2:vb2_verify_fw_preamble() Verifying preamble.
Phase 4
FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
VB2:vb2_rsa_verify_digest() Digest check failed!
VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
Saving nvdata
Reboot requested (10020007)
board_reset() called!
full_reset() called!


coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
CPU: AES supported, TXT NOT supported, VT supported
MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
PCH: device id 0284 (rev 00) is Cometlake-U Premium
IGD: device id 9b41 (rev 02) is CometLake ULT GT2
VBOOT: Loading verstage.
FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
FMAP: area COREBOOT found @ c08000 (4161536 bytes)
CBFS @ c08000 size 3f8000
CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
CBFS: Locating 'fallback/verstage'
CBFS: Found @ offset 10fb80 size 1072c


coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
Probing TPM: . done!
TPM ready after 0 ms
Connected to device vid:did:rid of 1ae0:0028:00
Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
Initialized TPM device CR50 revision 0
tlcl_send_startup: Startup return code is 0
TPM: setup succeeded
src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
Chrome EC: UHEPI supported
Phase 1
FMAP: area GBB found @ c05000 (12288 bytes)
VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
Recovery requested (1009000e)
Saving nvdata
tlcl_extend: response is 0
tlcl_extend: response is 0
FMAP: area COREBOOT found @ c08000 (4161536 bytes)
CBFS @ c08000 size 3f8000
CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
CBFS: Locating 'fallback/romstage'
CBFS: Found @ offset 80 size 145fc
Accumulated console time in verstage 98 ms


coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
TCO_STS:   0000 0000
GEN_PMCON: e0015238 00000200
GBLRST_CAUSE: 00000000 00000000
prev_sleep_state 5
Boot Count incremented to 33140
FMAP: area COREBOOT found @ c08000 (4161536 bytes)
CBFS @ c08000 size 3f8000
CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
CBFS: Locating 'fspm.bin'
CBFS: Found @ offset 5ffc0 size 71000
Chrome EC: UHEPI supported
FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
Probing TPM:  done!
Connected to device vid:did:rid of 1ae0:0028:00
Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
Initialized TPM device CR50 revision 0
src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
MRC cache found, size 1948
bootmode is set to: 2
PRMRR disabled by config.
SPD INDEX = 1
FMAP: area COREBOOT found @ c08000 (4161536 bytes)
CBFS @ c08000 size 3f8000
CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
CBFS: Locating 'spd.bin'
CBFS: Found @ offset 5fb80 size 400
SPD: module type is LPDDR3
SPD: module part is 
SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
SPD: device width 4 bits, bus width 8 bits
SPD: module size is 4096 MB (per channel)
memory slot: 0 configuration done.
memory slot: 2 configuration done.
CBMEM:
IMD: root @ 99fff000 254 entries.
IMD: root @ 99ffec00 62 entries.
External stage cache:
IMD: root @ 9abff000 254 entries.
IMD: root @ 9abfec00 62 entries.
Chrome EC: clear events_b mask to 0x0000000020004000
src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
tlcl_write: response is 0
src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
MRC: TPM MRC hash updated successfully.
2 DIMMs found
SMM Memory Map
SMRAM       : 0x9a000000 0x1000000
 Subregion 0: 0x9a000000 0xa00000
 Subregion 1: 0x9aa00000 0x200000
 Subregion 2: 0x9ac00000 0x400000
top_of_ram = 0x9a000000
MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
MTRR Range: Start=ff000000 End=0 (Size 1000000)
FMAP: area COREBOOT found @ c08000 (4161536 bytes)
CBFS @ c08000 size 3f8000
CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
CBFS: Locating 'fallback/postcar'
CBFS: Found @ offset 107000 size 4b44
Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
Processing 180 relocs. Offset value of 0x97c0c000
Accumulated console time in romstage 286 ms


coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
FMAP: area COREBOOT found @ c08000 (4161536 bytes)
CBFS @ c08000 size 3f8000
CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 43380 size 1b9e8
Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
Processing 3976 relocs. Offset value of 0x98db0000
Accumulated console time in postcar 52 ms


coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
FMAP: area RO_VPD found @ c00000 (16384 bytes)
WARNING: RO_VPD is uninitialized or empty.
FMAP: area RW_VPD found @ af8000 (8192 bytes)
FMAP: area RW_VPD found @ af8000 (8192 bytes)
Normal boot.
BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
FMAP: area COREBOOT found @ c08000 (4161536 bytes)
CBFS @ c08000 size 3f8000
CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 14700 size 2ec00
microcode: sig=0x806ec pf=0x4 revision=0xc9
Skip microcode update
FMAP: area COREBOOT found @ c08000 (4161536 bytes)
CBFS @ c08000 size 3f8000
CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
CBFS: Locating 'fsps.bin'
CBFS: Found @ offset d1fc0 size 35000
Detected 4 core, 8 thread CPU.
Setting up SMI for CPU
IED base = 0x9ac00000
IED size = 0x00400000
Will perform SMM setup.
CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
Processing 16 relocs. Offset value of 0x00030000
Attempting to start 7 APs
Waiting for 10ms after sending INIT.
Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
done.
AP: slot 6 apic_id 6.
AP: slot 7 apic_id 7.
Waiting for 2nd SIPI to complete...done.
AP: slot 5 apic_id 5.
AP: slot 4 apic_id 4.
AP: slot 3 apic_id 2.
AP: slot 1 apic_id 3.
Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
Processing 13 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
Installing SMM handler to 0x9a000000
Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
Processing 658 relocs. Offset value of 0x9a010000
Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
Processing 13 relocs. Offset value of 0x9a008000
SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
Clearing SMI status registers
SMI_STS: PM1 
PM1_STS: PWRBTN 
TCO_STS: SECOND_TO 
New SMBASE 0x9a000000
In relocation handler: CPU 0
New SMBASE=0x9a000000 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
New SMBASE 0x99fff800
In relocation handler: CPU 2
New SMBASE=0x99fff800 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
New SMBASE 0x99ffe800
In relocation handler: CPU 6
New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
New SMBASE 0x99ffe400
In relocation handler: CPU 7
New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
New SMBASE 0x99fffc00
In relocation handler: CPU 1
New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
New SMBASE 0x99fff400
In relocation handler: CPU 3
New SMBASE=0x99fff400 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
New SMBASE 0x99ffec00
In relocation handler: CPU 5
New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
New SMBASE 0x99fff000
In relocation handler: CPU 4
New SMBASE=0x99fff000 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
Initializing CPU #0
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Setting up local APIC...
 apic_id: 0x00 done.
Turbo is available but hidden
Turbo is available and visible
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
Skip microcode update
CPU #0 initialized
Initializing CPU #2
Initializing CPU #3
Initializing CPU #1
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Clearing out pending MCEs
Setting up local APIC...
Initializing CPU #4
Initializing CPU #5
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Clearing out pending MCEs
Setting up local APIC...
Initializing CPU #7
Initializing CPU #6
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Clearing out pending MCEs
Setting up local APIC...
 apic_id: 0x03 done.
Setting up local APIC...
 apic_id: 0x04 done.
Setting up local APIC...
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Setting up local APIC...
Setting up local APIC...
 apic_id: 0x05 done.
VMX status: enabled
 apic_id: 0x02 done.
VMX status: enabled
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
IA32_FEATURE_CONTROL status: locked
Skip microcode update
Skip microcode update
CPU #1 initialized
CPU #3 initialized
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
IA32_FEATURE_CONTROL status: locked
Skip microcode update
 apic_id: 0x01 done.
CPU #4 initialized
Skip microcode update
 apic_id: 0x06 done.
 apic_id: 0x07 done.
VMX status: enabled
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
IA32_FEATURE_CONTROL status: locked
CPU #5 initialized
Skip microcode update
Skip microcode update
VMX status: enabled
CPU #7 initialized
CPU #6 initialized
IA32_FEATURE_CONTROL status: locked
Skip microcode update
CPU #2 initialized
bsp_do_flight_plan done after 461 msecs.
CPU: frequency set to 4200 MHz
Enabling SMIs.
Locking SMM.
FMAP: area COREBOOT found @ c08000 (4161536 bytes)
CBFS @ c08000 size 3f8000
CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
CBFS: Locating 'vbt.bin'
CBFS: Found @ offset 5f5c0 size 499
Found a VBT of 4608 bytes after decompression
Display FSP Version Info HOB
Reference Code - CPU = 9.0.1e.30
uCode Version = 0.0.0.ca
TXT ACM version = ff.ff.ff.ffff
Display FSP Version Info HOB
Reference Code - ME = 9.0.1e.30
MEBx version = 0.0.0.0
ME Firmware Version = Consumer SKU
Display FSP Version Info HOB
Reference Code - CML PCH = 9.0.1e.30
PCH-CRID Status = Disabled
PCH-CRID Original Value = ff.ff.ff.ffff
PCH-CRID New Value = ff.ff.ff.ffff
OPROM - RST - RAID = ff.ff.ff.ffff
ChipsetInit Base Version = ff.ff.ff.ffff
ChipsetInit Oem Version = ff.ff.ff.ffff
Display FSP Version Info HOB
Reference Code - SA - System Agent = 9.0.1e.30
Reference Code - MRC = 0.7.1.6c
SA - PCIe Version = 9.0.1e.30
SA-CRID Status = Disabled
SA-CRID Original Value = 0.0.0.c
SA-CRID New Value = 0.0.0.c
OPROM - VBIOS = ff.ff.ff.ffff
RTC Init
Set power on after power failure.
Disabling Deep S3
Disabling Deep S3
Disabling Deep S4
Disabling Deep S4
Disabling Deep S5
Disabling Deep S5
BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
APIC: 00: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:04.0: enabled 0
PCI: 00:05.0: enabled 0
PCI: 00:12.0: enabled 1
PCI: 00:12.5: enabled 0
PCI: 00:12.6: enabled 0
PCI: 00:14.0: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.3: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:16.4: enabled 0
PCI: 00:16.5: enabled 0
PCI: 00:17.0: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 0
PCI: 00:19.2: enabled 0
PCI: 00:1a.0: enabled 0
PCI: 00:1c.0: enabled 0
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 0
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1d.1: enabled 0
PCI: 00:1d.2: enabled 0
PCI: 00:1d.3: enabled 0
PCI: 00:1d.4: enabled 0
PCI: 00:1d.5: enabled 1
PCI: 00:1e.0: enabled 1
PCI: 00:1e.1: enabled 0
PCI: 00:1e.2: enabled 1
PCI: 00:1e.3: enabled 1
PCI: 00:1f.0: enabled 1
PCI: 00:1f.1: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.4: enabled 1
PCI: 00:1f.5: enabled 1
PCI: 00:1f.6: enabled 0
USB0 port 0: enabled 1
I2C: 00:15: enabled 1
I2C: 00:5d: enabled 1
GENERIC: 0.0: enabled 1
I2C: 00:1a: enabled 1
I2C: 00:38: enabled 1
I2C: 00:39: enabled 1
I2C: 00:3a: enabled 1
I2C: 00:3b: enabled 1
PCI: 00:00.0: enabled 1
SPI: 00: enabled 1
SPI: 01: enabled 1
PNP: 0c09.0: enabled 1
USB2 port 0: enabled 1
USB2 port 1: enabled 1
USB2 port 2: enabled 0
USB2 port 3: enabled 0
USB2 port 5: enabled 0
USB2 port 6: enabled 1
USB2 port 9: enabled 1
USB3 port 0: enabled 1
USB3 port 1: enabled 1
USB3 port 2: enabled 1
USB3 port 3: enabled 1
USB3 port 4: enabled 0
APIC: 03: enabled 1
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 04: enabled 1
APIC: 05: enabled 1
APIC: 06: enabled 1
APIC: 07: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
  APIC: 03: enabled 1
  APIC: 01: enabled 1
  APIC: 02: enabled 1
  APIC: 04: enabled 1
  APIC: 05: enabled 1
  APIC: 06: enabled 1
  APIC: 07: enabled 1
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:02.0: enabled 1
  PCI: 00:04.0: enabled 0
  PCI: 00:05.0: enabled 0
  PCI: 00:12.0: enabled 1
  PCI: 00:12.5: enabled 0
  PCI: 00:12.6: enabled 0
  PCI: 00:14.0: enabled 1
   USB0 port 0: enabled 1
    USB2 port 0: enabled 1
    USB2 port 1: enabled 1
    USB2 port 2: enabled 0
    USB2 port 3: enabled 0
    USB2 port 5: enabled 0
    USB2 port 6: enabled 1
    USB2 port 9: enabled 1
    USB3 port 0: enabled 1
    USB3 port 1: enabled 1
    USB3 port 2: enabled 1
    USB3 port 3: enabled 1
    USB3 port 4: enabled 0
  PCI: 00:14.1: enabled 0
  PCI: 00:14.3: enabled 1
  PCI: 00:14.5: enabled 0
  PCI: 00:15.0: enabled 1
   I2C: 00:15: enabled 1
  PCI: 00:15.1: enabled 1
   I2C: 00:5d: enabled 1
   GENERIC: 0.0: enabled 1
  PCI: 00:15.2: enabled 0
  PCI: 00:15.3: enabled 0
  PCI: 00:16.0: enabled 1
  PCI: 00:16.1: enabled 0
  PCI: 00:16.2: enabled 0
  PCI: 00:16.3: enabled 0
  PCI: 00:16.4: enabled 0
  PCI: 00:16.5: enabled 0
  PCI: 00:17.0: enabled 1
  PCI: 00:19.0: enabled 1
   I2C: 00:1a: enabled 1
   I2C: 00:38: enabled 1
   I2C: 00:39: enabled 1
   I2C: 00:3a: enabled 1
   I2C: 00:3b: enabled 1
  PCI: 00:19.1: enabled 0
  PCI: 00:19.2: enabled 0
  PCI: 00:1a.0: enabled 0
  PCI: 00:1c.0: enabled 0
  PCI: 00:1c.1: enabled 0
  PCI: 00:1c.2: enabled 0
  PCI: 00:1c.3: enabled 0
  PCI: 00:1c.4: enabled 0
  PCI: 00:1c.5: enabled 0
  PCI: 00:1c.6: enabled 0
  PCI: 00:1c.7: enabled 0
  PCI: 00:1d.0: enabled 1
  PCI: 00:1d.1: enabled 0
  PCI: 00:1d.2: enabled 0
  PCI: 00:1d.3: enabled 0
  PCI: 00:1d.4: enabled 0
  PCI: 00:1d.5: enabled 1
   PCI: 00:00.0: enabled 1
  PCI: 00:1e.0: enabled 1
  PCI: 00:1e.1: enabled 0
  PCI: 00:1e.2: enabled 1
   SPI: 00: enabled 1
  PCI: 00:1e.3: enabled 1
   SPI: 01: enabled 1
  PCI: 00:1f.0: enabled 1
   PNP: 0c09.0: enabled 1
  PCI: 00:1f.1: enabled 1
  PCI: 00:1f.2: enabled 1
  PCI: 00:1f.3: enabled 1
  PCI: 00:1f.4: enabled 1
  PCI: 00:1f.5: enabled 1
  PCI: 00:1f.6: enabled 0
Root Device scanning...
scan_static_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0000] ops
PCI: 00:00.0 [8086/9b61] enabled
PCI: 00:02.0 [8086/0000] bus ops
PCI: 00:02.0 [8086/9b41] enabled
PCI: 00:04.0 [8086/1903] disabled
PCI: 00:08.0 [8086/1911] enabled
PCI: 00:12.0 [8086/02f9] enabled
PCI: 00:14.0 [8086/0000] bus ops
PCI: 00:14.0 [8086/02ed] enabled
PCI: 00:14.2 [8086/02ef] enabled
PCI: 00:14.3 [8086/02f0] enabled
PCI: 00:15.0 [8086/0000] bus ops
PCI: 00:15.0 [8086/02e8] enabled
PCI: 00:15.1 [8086/0000] bus ops
PCI: 00:15.1 [8086/02e9] enabled
PCI: 00:16.0 [8086/0000] ops
PCI: 00:16.0 [8086/02e0] enabled
PCI: 00:17.0 [8086/0000] ops
PCI: 00:17.0 [8086/02d3] enabled
PCI: 00:19.0 [8086/0000] bus ops
PCI: 00:19.0 [8086/02c5] enabled
PCI: 00:1d.0 [8086/0000] bus ops
PCI: 00:1d.0 [8086/02b0] enabled
PCI: Static device PCI: 00:1d.5 not found, disabling it.
PCI: 00:1e.0 [8086/0000] ops
PCI: 00:1e.0 [8086/02a8] enabled
PCI: 00:1e.2 [8086/0000] bus ops
PCI: 00:1e.2 [8086/02aa] enabled
PCI: 00:1e.3 [8086/0000] bus ops
PCI: 00:1e.3 [8086/02ab] enabled
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/0284] enabled
PCI: Static device PCI: 00:1f.1 not found, disabling it.
PCI: Static device PCI: 00:1f.2 not found, disabling it.
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/02c8] enabled
PCI: 00:1f.4 [8086/0000] bus ops
PCI: 00:1f.4 [8086/02a3] enabled
PCI: 00:1f.5 [8086/0000] bus ops
PCI: 00:1f.5 [8086/02a4] enabled
PCI: Leftover static devices:
PCI: 00:05.0
PCI: 00:12.5
PCI: 00:12.6
PCI: 00:14.1
PCI: 00:14.5
PCI: 00:15.2
PCI: 00:15.3
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:16.4
PCI: 00:16.5
PCI: 00:19.1
PCI: 00:19.2
PCI: 00:1a.0
PCI: 00:1c.0
PCI: 00:1c.1
PCI: 00:1c.2
PCI: 00:1c.3
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.7
PCI: 00:1d.1
PCI: 00:1d.2
PCI: 00:1d.3
PCI: 00:1d.4
PCI: 00:1d.5
PCI: 00:1e.1
PCI: 00:1f.1
PCI: 00:1f.2
PCI: 00:1f.6
PCI: Check your devicetree.cb.
PCI: 00:02.0 scanning...
scan_generic_bus for PCI: 00:02.0
scan_generic_bus for PCI: 00:02.0 done
scan_bus: scanning of bus PCI: 00:02.0 took 10188 usecs
PCI: 00:14.0 scanning...
scan_static_bus for PCI: 00:14.0
USB0 port 0 enabled
USB0 port 0 scanning...
scan_static_bus for USB0 port 0
USB2 port 0 enabled
USB2 port 1 enabled
USB2 port 2 disabled
USB2 port 3 disabled
USB2 port 5 disabled
USB2 port 6 enabled
USB2 port 9 enabled
USB3 port 0 enabled
USB3 port 1 enabled
USB3 port 2 enabled
USB3 port 3 enabled
USB3 port 4 disabled
USB2 port 0 scanning...
scan_static_bus for USB2 port 0
scan_static_bus for USB2 port 0 done
scan_bus: scanning of bus USB2 port 0 took 9699 usecs
USB2 port 1 scanning...
scan_static_bus for USB2 port 1
scan_static_bus for USB2 port 1 done
scan_bus: scanning of bus USB2 port 1 took 9698 usecs
USB2 port 6 scanning...
scan_static_bus for USB2 port 6
scan_static_bus for USB2 port 6 done
scan_bus: scanning of bus USB2 port 6 took 9707 usecs
USB2 port 9 scanning...
scan_static_bus for USB2 port 9
scan_static_bus for USB2 port 9 done
scan_bus: scanning of bus USB2 port 9 took 9706 usecs
USB3 port 0 scanning...
scan_static_bus for USB3 port 0
scan_static_bus for USB3 port 0 done
scan_bus: scanning of bus USB3 port 0 took 9709 usecs
USB3 port 1 scanning...
scan_static_bus for USB3 port 1
scan_static_bus for USB3 port 1 done
scan_bus: scanning of bus USB3 port 1 took 9682 usecs
USB3 port 2 scanning...
scan_static_bus for USB3 port 2
scan_static_bus for USB3 port 2 done
scan_bus: scanning of bus USB3 port 2 took 9707 usecs
USB3 port 3 scanning...
scan_static_bus for USB3 port 3
scan_static_bus for USB3 port 3 done
scan_bus: scanning of bus USB3 port 3 took 9698 usecs
scan_static_bus for USB0 port 0 done
scan_bus: scanning of bus USB0 port 0 took 155356 usecs
scan_static_bus for PCI: 00:14.0 done
scan_bus: scanning of bus PCI: 00:14.0 took 172988 usecs
PCI: 00:15.0 scanning...
scan_generic_bus for PCI: 00:15.0
bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
scan_generic_bus for PCI: 00:15.0 done
scan_bus: scanning of bus PCI: 00:15.0 took 14310 usecs
PCI: 00:15.1 scanning...
scan_generic_bus for PCI: 00:15.1
bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
scan_generic_bus for PCI: 00:15.1 done
scan_bus: scanning of bus PCI: 00:15.1 took 18668 usecs
PCI: 00:19.0 scanning...
scan_generic_bus for PCI: 00:19.0
bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
scan_generic_bus for PCI: 00:19.0 done
scan_bus: scanning of bus PCI: 00:19.0 took 30742 usecs
PCI: 00:1d.0 scanning...
do_pci_scan_bridge for PCI: 00:1d.0
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [1c5c/1327] enabled
Enabling Common Clock Configuration
L1 Sub-State supported from root port 29
L1 Sub-State Support = 0xf
CommonModeRestoreTime = 0x28
Power On Value = 0x16, Power On Scale = 0x0
ASPM: Enabled L1
scan_bus: scanning of bus PCI: 00:1d.0 took 32785 usecs
PCI: 00:1e.2 scanning...
scan_generic_bus for PCI: 00:1e.2
bus: PCI: 00:1e.2[0]->SPI: 00 enabled
scan_generic_bus for PCI: 00:1e.2 done
scan_bus: scanning of bus PCI: 00:1e.2 took 14013 usecs
PCI: 00:1e.3 scanning...
scan_generic_bus for PCI: 00:1e.3
bus: PCI: 00:1e.3[0]->SPI: 01 enabled
scan_generic_bus for PCI: 00:1e.3 done
scan_bus: scanning of bus PCI: 00:1e.3 took 14016 usecs
PCI: 00:1f.0 scanning...
scan_static_bus for PCI: 00:1f.0
PNP: 0c09.0 enabled
scan_static_bus for PCI: 00:1f.0 done
scan_bus: scanning of bus PCI: 00:1f.0 took 12041 usecs
PCI: 00:1f.3 scanning...
scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
PCI: 00:1f.4 scanning...
scan_generic_bus for PCI: 00:1f.4
scan_generic_bus for PCI: 00:1f.4 done
scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
PCI: 00:1f.5 scanning...
scan_generic_bus for PCI: 00:1f.5
scan_generic_bus for PCI: 00:1f.5 done
scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 605167 usecs
scan_static_bus for Root Device done
scan_bus: scanning of bus Root Device took 625040 usecs
done
Chrome EC: UHEPI supported
FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
SPI flash protection: WPSW=0 SRP0=0
MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:14.0 read_resources bus 0 link: 0
USB0 port 0 read_resources bus 0 link: 0
USB0 port 0 read_resources bus 0 link: 0 done
PCI: 00:14.0 read_resources bus 0 link: 0 done
PCI: 00:15.0 read_resources bus 1 link: 0
PCI: 00:15.0 read_resources bus 1 link: 0 done
PCI: 00:15.1 read_resources bus 2 link: 0
PCI: 00:15.1 read_resources bus 2 link: 0 done
PCI: 00:19.0 read_resources bus 3 link: 0
PCI: 00:19.0 read_resources bus 3 link: 0 done
PCI: 00:1d.0 read_resources bus 1 link: 0
PCI: 00:1d.0 read_resources bus 1 link: 0 done
PCI: 00:1e.2 read_resources bus 4 link: 0
PCI: 00:1e.2 read_resources bus 4 link: 0 done
PCI: 00:1e.3 read_resources bus 5 link: 0
PCI: 00:1e.3 read_resources bus 5 link: 0 done
PCI: 00:1f.0 read_resources bus 0 link: 0
PCI: 00:1f.0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: 03
   APIC: 01
   APIC: 02
   APIC: 04
   APIC: 05
   APIC: 06
   APIC: 07
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
   PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
   PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
   PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
   PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
   PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
   PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
   PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
   PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
   PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
   PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
   PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
   PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
   PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
   PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
   PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
   PCI: 00:02.0
   PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
   PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
   PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
   PCI: 00:04.0
   PCI: 00:08.0
   PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:12.0
   PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:14.0 child on link 0 USB0 port 0
   PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
    USB0 port 0 child on link 0 USB2 port 0
     USB2 port 0
     USB2 port 1
     USB2 port 2
     USB2 port 3
     USB2 port 5
     USB2 port 6
     USB2 port 9
     USB3 port 0
     USB3 port 1
     USB3 port 2
     USB3 port 3
     USB3 port 4
   PCI: 00:14.2
   PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
   PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:14.3
   PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:15.0 child on link 0 I2C: 01:15
   PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
    I2C: 01:15
   PCI: 00:15.1 child on link 0 I2C: 02:5d
   PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
    I2C: 02:5d
    GENERIC: 0.0
   PCI: 00:16.0
   PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
   PCI: 00:17.0
   PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
   PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
   PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
   PCI: 00:19.0 child on link 0 I2C: 03:1a
   PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
    I2C: 03:1a
    I2C: 03:38
    I2C: 03:39
    I2C: 03:3a
    I2C: 03:3b
   PCI: 00:1d.0 child on link 0 PCI: 01:00.0
   PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1e.0
   PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
   PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
   PCI: 00:1e.2 child on link 0 SPI: 00
   PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
    SPI: 00
   PCI: 00:1e.3 child on link 0 SPI: 01
   PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
    SPI: 01
   PCI: 00:1f.0 child on link 0 PNP: 0c09.0
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
   PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
    PNP: 0c09.0
    PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
   PCI: 00:1f.3
   PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
   PCI: 00:1f.4
   PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
   PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1f.5
   PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:02.0 20 *  [0x0 - 0x3f] io
PCI: 00:17.0 20 *  [0x40 - 0x5f] io
PCI: 00:17.0 18 *  [0x60 - 0x67] io
PCI: 00:17.0 1c *  [0x68 - 0x6b] io
DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
Setting resources...
DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:14.0 assign_resources, bus 0 link: 0
PCI: 00:14.0 assign_resources, bus 0 link: 0
PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
PCI: 00:15.0 assign_resources, bus 1 link: 0
PCI: 00:15.0 assign_resources, bus 1 link: 0
PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
PCI: 00:15.1 assign_resources, bus 2 link: 0
PCI: 00:15.1 assign_resources, bus 2 link: 0
PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
PCI: 00:19.0 assign_resources, bus 3 link: 0
PCI: 00:19.0 assign_resources, bus 3 link: 0
PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:1d.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1d.0 assign_resources, bus 1 link: 0
PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
PCI: 00:1e.2 assign_resources, bus 4 link: 0
PCI: 00:1e.2 assign_resources, bus 4 link: 0
PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
PCI: 00:1e.3 assign_resources, bus 5 link: 0
PCI: 00:1e.3 assign_resources, bus 5 link: 0
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.0 assign_resources, bus 0 link: 0
LPC: Trying to open IO window from 800 size 1ff
PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: 03
   APIC: 01
   APIC: 02
   APIC: 04
   APIC: 05
   APIC: 06
   APIC: 07
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
  DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
   PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
   PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
   PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
   PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
   PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
   PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
   PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
   PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
   PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
   PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
   PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
   PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
   PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
   PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
   PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
   PCI: 00:02.0
   PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
   PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
   PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
   PCI: 00:04.0
   PCI: 00:08.0
   PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
   PCI: 00:12.0
   PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
   PCI: 00:14.0 child on link 0 USB0 port 0
   PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
    USB0 port 0 child on link 0 USB2 port 0
     USB2 port 0
     USB2 port 1
     USB2 port 2
     USB2 port 3
     USB2 port 5
     USB2 port 6
     USB2 port 9
     USB3 port 0
     USB3 port 1
     USB3 port 2
     USB3 port 3
     USB3 port 4
   PCI: 00:14.2
   PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
   PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
   PCI: 00:14.3
   PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
   PCI: 00:15.0 child on link 0 I2C: 01:15
   PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
    I2C: 01:15
   PCI: 00:15.1 child on link 0 I2C: 02:5d
   PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
    I2C: 02:5d
    GENERIC: 0.0
   PCI: 00:16.0
   PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
   PCI: 00:17.0
   PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
   PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
   PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
   PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
   PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
   PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
   PCI: 00:19.0 child on link 0 I2C: 03:1a
   PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
    I2C: 03:1a
    I2C: 03:38
    I2C: 03:39
    I2C: 03:3a
    I2C: 03:3b
   PCI: 00:1d.0 child on link 0 PCI: 01:00.0
   PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
   PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
   PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
    PCI: 01:00.0
    PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
   PCI: 00:1e.0
   PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
   PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
   PCI: 00:1e.2 child on link 0 SPI: 00
   PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
    SPI: 00
   PCI: 00:1e.3 child on link 0 SPI: 01
   PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
    SPI: 01
   PCI: 00:1f.0 child on link 0 PNP: 0c09.0
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
   PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
    PNP: 0c09.0
    PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
   PCI: 00:1f.3
   PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
   PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
   PCI: 00:1f.4
   PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
   PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
   PCI: 00:1f.5
   PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
Done allocating resources.
BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
Enabling resources...
PCI: 00:00.0 subsystem <- 8086/9b61
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 8086/9b41
PCI: 00:02.0 cmd <- 03
PCI: 00:08.0 cmd <- 06
PCI: 00:12.0 subsystem <- 8086/02f9
PCI: 00:12.0 cmd <- 02
PCI: 00:14.0 subsystem <- 8086/02ed
PCI: 00:14.0 cmd <- 02
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 8086/02f0
PCI: 00:14.3 cmd <- 02
PCI: 00:15.0 subsystem <- 8086/02e8
PCI: 00:15.0 cmd <- 02
PCI: 00:15.1 subsystem <- 8086/02e9
PCI: 00:15.1 cmd <- 02
PCI: 00:16.0 subsystem <- 8086/02e0
PCI: 00:16.0 cmd <- 02
PCI: 00:17.0 subsystem <- 8086/02d3
PCI: 00:17.0 cmd <- 03
PCI: 00:19.0 subsystem <- 8086/02c5
PCI: 00:19.0 cmd <- 02
PCI: 00:1d.0 bridge ctrl <- 0013
PCI: 00:1d.0 subsystem <- 8086/02b0
PCI: 00:1d.0 cmd <- 06
PCI: 00:1e.0 subsystem <- 8086/02a8
PCI: 00:1e.0 cmd <- 06
PCI: 00:1e.2 subsystem <- 8086/02aa
PCI: 00:1e.2 cmd <- 06
PCI: 00:1e.3 subsystem <- 8086/02ab
PCI: 00:1e.3 cmd <- 02
PCI: 00:1f.0 subsystem <- 8086/0284
PCI: 00:1f.0 cmd <- 407
PCI: 00:1f.3 subsystem <- 8086/02c8
PCI: 00:1f.3 cmd <- 02
PCI: 00:1f.4 subsystem <- 8086/02a3
PCI: 00:1f.4 cmd <- 03
PCI: 00:1f.5 subsystem <- 8086/02a4
PCI: 00:1f.5 cmd <- 406
PCI: 01:00.0 cmd <- 02
done.
ME: Version: 14.0.39.1367
BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
Initializing devices...
Root Device init ...
Chrome EC: Set SMI mask to 0x0000000000000000
Chrome EC: clear events_b mask to 0x0000000000000000
Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
Chrome EC: Set WAKE mask to 0x0000000000000000
Root Device init finished in 35211 usecs
CPU_CLUSTER: 0 init ...
CPU_CLUSTER: 0 init finished in 2447 usecs
PCI: 00:00.0 init ...
CPU TDP: 15 Watts
CPU PL2 = 64 Watts
PCI: 00:00.0 init finished in 7076 usecs
PCI: 00:02.0 init ...
PCI: 00:02.0 init finished in 2252 usecs
PCI: 00:08.0 init ...
PCI: 00:08.0 init finished in 2250 usecs
PCI: 00:12.0 init ...
PCI: 00:12.0 init finished in 2250 usecs
PCI: 00:14.0 init ...
PCI: 00:14.0 init finished in 2251 usecs
PCI: 00:14.2 init ...
PCI: 00:14.2 init finished in 2252 usecs
PCI: 00:14.3 init ...
PCI: 00:14.3 init finished in 2271 usecs
PCI: 00:15.0 init ...
DW I2C bus 0 at 0xd121f000 (400 KHz)
PCI: 00:15.0 init finished in 5976 usecs
PCI: 00:15.1 init ...
DW I2C bus 1 at 0xd1220000 (400 KHz)
PCI: 00:15.1 init finished in 5974 usecs
PCI: 00:16.0 init ...
PCI: 00:16.0 init finished in 2252 usecs
PCI: 00:19.0 init ...
DW I2C bus 4 at 0xd1222000 (400 KHz)
PCI: 00:19.0 init finished in 5974 usecs
PCI: 00:1d.0 init ...
Initializing PCH PCIe bridge.
PCI: 00:1d.0 init finished in 5284 usecs
PCI: 00:1f.0 init ...
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
  reg 0x0000: 0x02000000
  reg 0x0001: 0x00770020
  reg 0x0002: 0x00000000
PCI: 00:1f.0 init finished in 23530 usecs
PCI: 00:1f.4 init ...
PCI: 00:1f.4 init finished in 2262 usecs
PCI: 01:00.0 init ...
PCI: 01:00.0 init finished in 2252 usecs
PNP: 0c09.0 init ...
Google Chrome EC uptime: 11.067 seconds
Google Chrome AP resets since EC boot: 0
Google Chrome most recent AP reset causes:
Google Chrome EC reset flags at last EC boot: reset-pin
PNP: 0c09.0 init finished in 20567 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
APIC: 00: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:04.0: enabled 0
PCI: 00:05.0: enabled 0
PCI: 00:12.0: enabled 1
PCI: 00:12.5: enabled 0
PCI: 00:12.6: enabled 0
PCI: 00:14.0: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.3: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 1
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:16.4: enabled 0
PCI: 00:16.5: enabled 0
PCI: 00:17.0: enabled 1
PCI: 00:19.0: enabled 1
PCI: 00:19.1: enabled 0
PCI: 00:19.2: enabled 0
PCI: 00:1a.0: enabled 0
PCI: 00:1c.0: enabled 0
PCI: 00:1c.1: enabled 0
PCI: 00:1c.2: enabled 0
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1d.1: enabled 0
PCI: 00:1d.2: enabled 0
PCI: 00:1d.3: enabled 0
PCI: 00:1d.4: enabled 0
PCI: 00:1d.5: enabled 0
PCI: 00:1e.0: enabled 1
PCI: 00:1e.1: enabled 0
PCI: 00:1e.2: enabled 1
PCI: 00:1e.3: enabled 1
PCI: 00:1f.0: enabled 1
PCI: 00:1f.1: enabled 0
PCI: 00:1f.2: enabled 0
PCI: 00:1f.3: enabled 1
PCI: 00:1f.4: enabled 1
PCI: 00:1f.5: enabled 1
PCI: 00:1f.6: enabled 0
USB0 port 0: enabled 1
I2C: 01:15: enabled 1
I2C: 02:5d: enabled 1
GENERIC: 0.0: enabled 1
I2C: 03:1a: enabled 1
I2C: 03:38: enabled 1
I2C: 03:39: enabled 1
I2C: 03:3a: enabled 1
I2C: 03:3b: enabled 1
PCI: 00:00.0: enabled 1
SPI: 00: enabled 1
SPI: 01: enabled 1
PNP: 0c09.0: enabled 1
USB2 port 0: enabled 1
USB2 port 1: enabled 1
USB2 port 2: enabled 0
USB2 port 3: enabled 0
USB2 port 5: enabled 0
USB2 port 6: enabled 1
USB2 port 9: enabled 1
USB3 port 0: enabled 1
USB3 port 1: enabled 1
USB3 port 2: enabled 1
USB3 port 3: enabled 1
USB3 port 4: enabled 0
APIC: 03: enabled 1
APIC: 01: enabled 1
APIC: 02: enabled 1
APIC: 04: enabled 1
APIC: 05: enabled 1
APIC: 06: enabled 1
APIC: 07: enabled 1
PCI: 00:08.0: enabled 1
PCI: 00:14.2: enabled 1
PCI: 01:00.0: enabled 1
Disabling ACPI via APMC:
done.
FMAP: area RW_ELOG found @ af0000 (16384 bytes)
ELOG: NV offset 0xaf0000 size 0x4000
ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
ELOG: Event(17) added with size 13 at 2022-10-26 09:58:37 UTC
ELOG: Event(92) added with size 9 at 2022-10-26 09:58:37 UTC
ELOG: Event(93) added with size 9 at 2022-10-26 09:58:38 UTC
ELOG: Event(9A) added with size 9 at 2022-10-26 09:58:38 UTC
ELOG: Event(9E) added with size 10 at 2022-10-26 09:58:38 UTC
ELOG: Event(9F) added with size 14 at 2022-10-26 09:58:38 UTC
BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
ELOG: Event(A1) added with size 10 at 2022-10-26 09:58:38 UTC
elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
ELOG: Event(A0) added with size 9 at 2022-10-26 09:58:38 UTC
elog_add_boot_reason: Logged dev mode boot
Finalize devices...
PCI: 00:17.0 final
Devices finalized
FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
ME: HFSTS1